From 9c2474630cd0097e0a74504fcdb81d1ca31a6412 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 21 Feb 2026 16:18:51 +0100 Subject: [PATCH 001/351] bus/pci/aha2940au.cpp: hookup original AHA-2940/W [bitsavers] --- src/devices/bus/pci/aha2940au.cpp | 163 ++++++++++++++++++++++++------ src/devices/bus/pci/aha2940au.h | 30 ++++-- src/devices/bus/pci/pci_slot.cpp | 1 + src/mame/pc/mdartstr.cpp | 3 +- 4 files changed, 156 insertions(+), 41 deletions(-) diff --git a/src/devices/bus/pci/aha2940au.cpp b/src/devices/bus/pci/aha2940au.cpp index 2eb465d21b4..5e5ea695cb8 100644 --- a/src/devices/bus/pci/aha2940au.cpp +++ b/src/devices/bus/pci/aha2940au.cpp @@ -7,6 +7,7 @@ Adaptec AHA-2940AU PCI Based off AIC-7860/7861 References: +- AIC-7870 Data Book - https://github.com/torvalds/linux/tree/master/drivers/scsi/aic7xxx TODO: @@ -27,28 +28,146 @@ TODO: #define LOGWARN(...) LOGMASKED(LOG_WARN, __VA_ARGS__) -DEFINE_DEVICE_TYPE(AHA2940AU, aha2940au_scsi_device, "aha2940au", "Adaptec AHA-2940AU SCSI controller") +DEFINE_DEVICE_TYPE(AHA2940, aha2940_scsi_device, "aha2940", "Adaptec AHA-2940/W SCSI controller") +DEFINE_DEVICE_TYPE(AHA2940AU, aha2940au_scsi_device, "aha2940au", "Adaptec AHA-2940AU SCSI controller") -aha2940au_scsi_device::aha2940au_scsi_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) +aha2940_scsi_device::aha2940_scsi_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) + , m_bios(*this, "bios") , m_eeprom(*this, "eeprom") - , m_scsi_rom(*this, "scsi_rom") +{ +} + +aha2940_scsi_device::aha2940_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : aha2940_scsi_device(mconfig, AHA2940, tag, owner, clock) +{ + set_ids(0x90047178, 0x01, 0x010000, 0x90047178); +} + +ROM_START( aha2940 ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) + ROM_SYSTEM_BIOS( 0, "v1.11", "AHA-2940/AHA-2940W (v1.11)" ) + ROMX_LOAD( "589201e.u5", 0x0000, 0x10000, CRC(9f9507cd) SHA1(f134df1a542d6af8dd1878c6db0c734b7701d756), ROM_BIOS(0) ) + + ROM_REGION16_LE( 0x80, "eeprom", ROMREGION_ERASEFF ) +ROM_END + +const tiny_rom_entry *aha2940_scsi_device::device_rom_region() const +{ + return ROM_NAME(aha2940); +} + +void aha2940_scsi_device::device_add_mconfig(machine_config &config) +{ + // AIC-7870 + + // C06/C46/C56/C66 compatible + // TODO: doesn't seem to work properly, wrong type? + EEPROM_93C46_16BIT(config, m_eeprom); +} + +void aha2940_scsi_device::device_start() +{ + pci_card_device::device_start(); + + add_map( 256, M_IO, FUNC(aha2940_scsi_device::io_map)); + add_map( 4096, M_MEM, FUNC(aha2940_scsi_device::mem_map)); + + // NOTE: doesn't work at $c8000 compared to the later AU variant + add_rom((u8 *)m_bios->base(), 0x10000); + expansion_rom_base = 0xd0000; + + // TODO: BIST capable + + // INTA# + intr_pin = 1; + // TODO: definitely uses PCI regs 0x3e/0x3f + // max_lat = 0x08, min_gnt = 0x08 +} + +void aha2940_scsi_device::device_reset() +{ + pci_card_device::device_reset(); + + command = 0x0000; + // Can be bus master (bit 2), can use Memory Write and Invalidate (bit 4), + // can set bit 6 (Parity Error Response Enable) + command_mask = 0x57; + // fast back-to-back (bit 7), medium DEVSEL# + status = 0x0280; + + remap_cb(); +} + +void aha2940_scsi_device::config_map(address_map &map) +{ + pci_card_device::config_map(map); + // TODO: can set cache line size & latency timer (port 0x0c) +// map(0x40, 0x40) DEVCONFIG +// map(0x41, 0x41) DEVSTATUS + +// map(0x80, 0x81) DSVENDID 0x9004 +// map(0x82, 0x83) DSDEVID 0x7078 +// map(0x84, 0x84) DSCOMMAND +// map(0x85, 0x85) DSLATTIME +// map(0x86, 0x86) DSPCISTATUS +// map(0x87, 0x87) HCNTRL +// map(0x88, 0x8b) LHADDR / HHADDR +// map(0x8c, 0x8f) HCNT + + // TODO: other stuff in between +// map(0x91, 0x91) INTSTAT +// map(0x92, 0x92) CLRINT (w) ERROR (r) +// map(0x93, 0x93) DFCNTRL +// map(0x94, 0x94) DFSTATUS +// map(0x9d, 0x9d) QOUTFIFO +// map(0x9e, 0x9e) QOUTCNT +// map(0x9f, 0x9f) SFUNCT + +// map(0x90, 0x90) SCBPTR +// map(0x1c, 0x1c) SLEEPCTL (in I/O only?) +} + +void aha2940_scsi_device::io_map(address_map &map) +{ + // SEECTL + map(0x1e, 0x1e).lrw8( + NAME([this] (offs_t offset) { + return 0x10 | m_eeprom->do_read(); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SEECTL %02x\n", data); + m_eeprom->di_write(BIT(data, 1)); + m_eeprom->clk_write(BIT(data, 2)); + m_eeprom->cs_write(BIT(data, 3)); + }) + ); + // HCNTRL + map(0x87, 0x87).lr8(NAME([] () { return 0xff; })); +} + +void aha2940_scsi_device::mem_map(address_map &map) +{ +} + +/* + * AHA-2940AU + * + */ + +aha2940au_scsi_device::aha2940au_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : aha2940_scsi_device(mconfig, AHA2940AU, tag, owner, clock) { // TODO: unknown revision // class code should be 0x01'0000 as per AIC-7890 manual set_ids(0x90046178, 0x00, 0x010000, 0x90046178); } -aha2940au_scsi_device::aha2940au_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : aha2940au_scsi_device(mconfig, AHA2940AU, tag, owner, clock) -{ -} - // NOTE: BIOS is FAT compressed, decompress as 8bios.bin under the hood. ROM_START( aha2940au ) - ROM_REGION32_LE( 0x8000, "scsi_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "v1.30", "AHA-2940AU (v1.30)" ) // "589247-00_c_bios_2400_(C)1996_v1.30.u3" ROMX_LOAD( "589247-00.u3", 0x0000, 0x8000, CRC(de00492b) SHA1(a6015bcd51e51015a5710d7ac1929e28bf033db4), ROM_BIOS(0) ) @@ -79,7 +198,7 @@ void aha2940au_scsi_device::device_start() // TODO: enables M_64A on demand add_map( 4096, M_MEM, FUNC(aha2940au_scsi_device::mem_map)); - add_rom((u8 *)m_scsi_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc8000; // TODO: BIST capable @@ -111,7 +230,7 @@ u8 aha2940au_scsi_device::capptr_r() void aha2940au_scsi_device::config_map(address_map &map) { - pci_card_device::config_map(map); + aha2940_scsi_device::config_map(map); // map(0x40, 0x40) DEVCONFIG // map(0x41, 0x41) DEVSTATUS0 // map(0x42, 0x42) DEVSTATUS1 @@ -125,25 +244,3 @@ void aha2940au_scsi_device::config_map(address_map &map) // map(0xff, 0xff) IDENREG } -void aha2940au_scsi_device::io_map(address_map &map) -{ - // SEECTL - map(0x1e, 0x1e).lrw8( - NAME([this] (offs_t offset) { - return 0x10 | m_eeprom->do_read(); - }), - NAME([this] (offs_t offset, u8 data) { - LOG("SEECTL %02x\n", data); - m_eeprom->di_write(BIT(data, 1)); - m_eeprom->clk_write(BIT(data, 2)); - m_eeprom->cs_write(BIT(data, 3)); - }) - ); - // HCNTRL - map(0x87, 0x87).lr8(NAME([] () { return 0xff; })); -} - -void aha2940au_scsi_device::mem_map(address_map &map) -{ -} - diff --git a/src/devices/bus/pci/aha2940au.h b/src/devices/bus/pci/aha2940au.h index c7964e672b7..87d6102d538 100644 --- a/src/devices/bus/pci/aha2940au.h +++ b/src/devices/bus/pci/aha2940au.h @@ -10,15 +10,15 @@ #include "machine/eepromser.h" -class aha2940au_scsi_device : public pci_card_device +class aha2940_scsi_device : public pci_card_device { public: - aha2940au_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + aha2940_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); static constexpr feature_type unemulated_features() { return feature::MEDIA; } protected: - aha2940au_scsi_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + aha2940_scsi_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; @@ -31,17 +31,33 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; - virtual u8 capptr_r() override; - + required_memory_region m_bios; required_device m_eeprom; -private: void io_map(address_map &map); void mem_map(address_map &map); +private: - required_memory_region m_scsi_rom; }; +class aha2940au_scsi_device : public aha2940_scsi_device +{ +public: + aha2940au_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + + virtual void config_map(address_map &map) override ATTR_COLD; + virtual u8 capptr_r() override; +}; + +DECLARE_DEVICE_TYPE(AHA2940, aha2940_scsi_device) DECLARE_DEVICE_TYPE(AHA2940AU, aha2940au_scsi_device) #endif // MAME_BUS_PCI_AHA2940AU_H diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp index a4e3a9ed708..49896f9f37b 100644 --- a/src/devices/bus/pci/pci_slot.cpp +++ b/src/devices/bus/pci/pci_slot.cpp @@ -118,6 +118,7 @@ void pci_cards(device_slot_interface &device) device.option_add("vision964", VISION964_PCI); // 0x01 - mass storage controllers + device.option_add("aha2940", AHA2940); device.option_add("aha2940au", AHA2940AU); device.option_add("ncr53c825", NCR53C825_PCI); device.option_add("pdc20262", PDC20262); diff --git a/src/mame/pc/mdartstr.cpp b/src/mame/pc/mdartstr.cpp index 591dd5e0bb9..d4dedaec670 100644 --- a/src/mame/pc/mdartstr.cpp +++ b/src/mame/pc/mdartstr.cpp @@ -125,7 +125,8 @@ void isa16_medalist_rom_disk::device_add_mconfig(machine_config &config) SPEAKER(config, "mono").front_center(); IDT7202(config, m_fifo); -#if 0 // TODO: one byte off (speaker pops), may disconnect timer on FIFO empty? +#if 0 + // TODO: one byte off (speaker pops), may disconnect timer on FIFO empty? m_fifo->ef_handler().set([this] (int state) { printf("%d\n", state); if (state) From 1ba32aeed57f11b6b4b91e719ebd5bedc1ce1b32 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 21 Feb 2026 10:43:53 -0500 Subject: [PATCH 002/351] apple/apple2video.cpp: Fixed 'dodo' and 'albert' regressions from f8ecff4. (Github #14999) [R. Belmont] --- src/mame/apple/apple2.cpp | 4 ++-- src/mame/apple/apple2video.cpp | 4 +++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/mame/apple/apple2.cpp b/src/mame/apple/apple2.cpp index 4761485a488..1dd32668b31 100644 --- a/src/mame/apple/apple2.cpp +++ b/src/mame/apple/apple2.cpp @@ -946,13 +946,13 @@ void apple2_state::apple2jp(machine_config &config) void apple2_state::dodo(machine_config &config) { apple2p(config); - m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); + m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); } void apple2_state::albert(machine_config &config) { apple2p(config); - m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); + m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); } void apple2_state::ivelultr(machine_config &config) diff --git a/src/mame/apple/apple2video.cpp b/src/mame/apple/apple2video.cpp index 1d1b106fe60..b09bbd25e81 100644 --- a/src/mame/apple/apple2video.cpp +++ b/src/mame/apple/apple2video.cpp @@ -474,7 +474,7 @@ unsigned a2_video_device::get_text_character(uint32_t code, int row) /* look up the character data */ unsigned bits = m_char_ptr[code * 8 + row]; - bits = (Model == model::IVEL_ULTRA && Invert && !Flip) ? (bits >> 1) : (bits & 0x7f); + bits = ((Model == model::IVEL_ULTRA && Invert && !Flip) || Model == model::DODO) ? (bits >> 1) : (bits & 0x7f); bits ^= invert_mask; return Flip ? reverse_7_bits[bits] : bits; } @@ -1063,6 +1063,8 @@ template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); +template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); +template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); static INPUT_PORTS_START( a2_vidconfig_composite ); PORT_START("a2_video_config") From 9c9da743c577dcc61b2060ef67db93bc9b421a6c Mon Sep 17 00:00:00 2001 From: cracyc Date: Sat, 21 Feb 2026 10:29:05 -0600 Subject: [PATCH 003/351] i386: fix smm --- src/devices/cpu/i386/i386.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 99b7846ca0b..3f6114b20ce 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -2610,14 +2610,17 @@ void i386_device::enter_smm() m_sreg[DS].limit = m_sreg[ES].limit = m_sreg[FS].limit = m_sreg[GS].limit = m_sreg[SS].limit = 0xffffffff; m_sreg[DS].flags = m_sreg[ES].flags = m_sreg[FS].flags = m_sreg[GS].flags = m_sreg[SS].flags = 0x8093; m_sreg[DS].valid = m_sreg[ES].valid = m_sreg[FS].valid = m_sreg[GS].valid = m_sreg[SS].valid = true; + m_sreg[DS].d = m_sreg[ES].d = m_sreg[FS].d = m_sreg[GS].d = m_sreg[SS].d = 0; m_sreg[CS].selector = 0x3000; // pentium only, ppro sel = smbase >> 4 m_sreg[CS].base = m_smbase; m_sreg[CS].limit = 0xffffffff; m_sreg[CS].flags = 0x8093; m_sreg[CS].valid = true; + m_sreg[CS].d = 0; m_cr[4] = 0; m_dr[7] = 0x400; m_eip = 0x8000; + m_CPL = 0; m_nmi_masked = true; CHANGE_PC(m_eip); @@ -2683,15 +2686,13 @@ void i386_device::leave_smm() m_cr[3] = READ32(smram_state + SMRAM_CR3); m_cr[0] = READ32(smram_state + SMRAM_CR0); - m_CPL = (m_sreg[SS].flags >> 13) & 3; // cpl == dpl of ss + m_CPL = (m_sreg[SS].flags >> 12) & 3; // cpl == dpl of ss for (int i = 0; i <= GS; i++) { + m_sreg[i].d = (m_sreg[i].flags & 0x4000) ? 1 : 0; if (PROTECTED_MODE && !V8086_MODE) - { m_sreg[i].valid = m_sreg[i].selector ? true : false; - m_sreg[i].d = (m_sreg[i].flags & 0x4000) ? 1 : 0; - } else m_sreg[i].valid = true; } From 45a08999c0669f864e24a6356e9c201fdb880489 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 21 Feb 2026 11:52:44 -0500 Subject: [PATCH 004/351] apple2video: Add missing header change. [R. Belmont] --- src/mame/apple/apple2video.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/apple/apple2video.h b/src/mame/apple/apple2video.h index f68098c4aaa..d0484b48033 100644 --- a/src/mame/apple/apple2video.h +++ b/src/mame/apple/apple2video.h @@ -19,7 +19,7 @@ class a2_video_device : public device_t, public device_palette_interface, public { public: // Models with different text-mode behavior. II includes the II+ and IIE includes the IIc and IIc Plus. - enum class model { II, IIE, PRAVETZ_8C, IIGS, II_J_PLUS, IVEL_ULTRA }; + enum class model { II, IIE, PRAVETZ_8C, IIGS, II_J_PLUS, IVEL_ULTRA, DODO }; // construction/destruction a2_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); From a0c5fbd2525e81f61d6fa705aecaf3d70a2ef403 Mon Sep 17 00:00:00 2001 From: cracyc Date: Sat, 21 Feb 2026 11:21:00 -0600 Subject: [PATCH 005/351] i386: use the correct bits for dpl --- src/devices/cpu/i386/i386.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 3f6114b20ce..02255cefde4 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -2686,7 +2686,7 @@ void i386_device::leave_smm() m_cr[3] = READ32(smram_state + SMRAM_CR3); m_cr[0] = READ32(smram_state + SMRAM_CR0); - m_CPL = (m_sreg[SS].flags >> 12) & 3; // cpl == dpl of ss + m_CPL = (m_sreg[SS].flags >> 5) & 3; // cpl == dpl of ss for (int i = 0; i <= GS; i++) { From abab448512924721c69142a522be04cb580b3c48 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 21 Feb 2026 14:38:42 -0500 Subject: [PATCH 006/351] nscsi/cd.cpp: Support the revised BlueSCSI host transfer protocol which allows up to 64K per chunk instead of 4K. [saybur, R. Belmont] --- src/devices/bus/nscsi/cd.cpp | 54 ++++++++++++++++++++++++++++++++---- 1 file changed, 49 insertions(+), 5 deletions(-) diff --git a/src/devices/bus/nscsi/cd.cpp b/src/devices/bus/nscsi/cd.cpp index 9ff240fa31d..112f100cf8f 100644 --- a/src/devices/bus/nscsi/cd.cpp +++ b/src/devices/bus/nscsi/cd.cpp @@ -25,6 +25,8 @@ DEFINE_DEVICE_TYPE(NSCSI_XM5701SUN, nscsi_toshiba_xm5701_sun_device, "nxm5701sun DEFINE_DEVICE_TYPE(NSCSI_CDROM_APPLE, nscsi_cdrom_apple_device, "scsi_cdrom_apple", "Apple SCSI CD-ROM") DEFINE_DEVICE_TYPE(NSCSI_CDROM_APPLE_EXT, nscsi_cdrom_apple_ext_device, "scsi_cdrom_apple_ext", "Apple SCSI CD-ROM (external)") +static constexpr int XFER_MAX_SIZE = (64*1024); // ZuluSCSI/BlueSCSI maximum transfer size is 64KB + // ZuluSCSI/BlueSCSI toolbox commands. All are 10 bytes as of protocol version 0. static constexpr uint8_t TOOLBOX_LIST_FILES = 0xd0; static constexpr uint8_t TOOLBOX_GET_FILE = 0xd1; @@ -35,7 +37,7 @@ static constexpr uint8_t TOOLBOX_SEND_FILE_END = 0xd5; static constexpr uint8_t TOOLBOX_TOGGLE_DEBUG = 0xd6; static constexpr uint8_t TOOLBOX_LIST_CDS = 0xd7; static constexpr uint8_t TOOLBOX_SET_NEXT_CD = 0xd8; -static constexpr uint8_t TOOLBOX_LIST_DEVICES = 0xd9; +static constexpr uint8_t TOOLBOX_METADATA = 0xd9; static constexpr uint8_t TOOLBOX_COUNT_CDS = 0xda; nscsi_cdrom_device::nscsi_cdrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : @@ -121,7 +123,7 @@ void nscsi_cdrom_device::device_start() { nscsi_full_device::device_start(); - m_xfer_buffer.resize(8192); + m_xfer_buffer.resize(XFER_MAX_SIZE); save_item(NAME(sector_buffer)); save_item(NAME(lba)); @@ -993,7 +995,18 @@ void nscsi_cdrom_device::scsi_command() } uint32_t offset = scsi_cmdbuf[2] << 24 | scsi_cmdbuf[3] << 16 | scsi_cmdbuf[4] << 8 | scsi_cmdbuf[5]; - LOG("TOOLBOX_GET_FILE: file # %d (%s), offset %08x\n", scsi_cmdbuf[1], m_directory[scsi_cmdbuf[1]].name, offset); + uint32_t blocks = scsi_cmdbuf[6]; + LOG("TOOLBOX_GET_FILE: file # %d (%s), offset %08x, blocks %d\n", scsi_cmdbuf[1], m_directory[scsi_cmdbuf[1]].name, offset, blocks); + if (blocks == 0) + { + blocks = 1; + } + else if ((blocks * 4096) > m_xfer_buffer.size()) + { + scsi_status_complete(SS_CHECK_CONDITION); + sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB); + return; + } std::string tmpPath(machine().options().share_directory()); tmpPath.append(PATH_SEPARATOR); @@ -1009,7 +1022,7 @@ void nscsi_cdrom_device::scsi_command() return; } u32 actualRead; - file->read(&m_xfer_buffer[0], offset * 4096, 4096, actualRead); + file->read(&m_xfer_buffer[0], offset * 4096, blocks * 4096, actualRead); if (actualRead == 0) { @@ -1035,7 +1048,22 @@ void nscsi_cdrom_device::scsi_command() case TOOLBOX_SEND_FILE_10: m_xfer_position = 0; m_write_is_setup = false; - m_write_length = scsi_cmdbuf[1] << 8 | scsi_cmdbuf[2]; + if (scsi_cmdbuf[6] > 0) + { + // Yes, the block size for GET_FILE is 4K and for SEND_FILE is 512 bytes. + // Verified in BlueSCSI's GitHub repo. + if ((scsi_cmdbuf[6] * 512) > m_xfer_buffer.size()) + { + scsi_status_complete(SS_CHECK_CONDITION); + sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB); + return; + } + m_write_length = scsi_cmdbuf[6] * 512; + } + else + { + m_write_length = scsi_cmdbuf[1] << 8 | scsi_cmdbuf[2]; + } m_write_offset = scsi_cmdbuf[3] << 16 | scsi_cmdbuf[4] << 8 | scsi_cmdbuf[5]; LOG("TOOLBOX_SEND_FILE_10 offset %08x len %04x\n", m_write_offset, m_write_length); scsi_data_out(4, m_write_length); @@ -1047,6 +1075,22 @@ void nscsi_cdrom_device::scsi_command() scsi_status_complete(SS_GOOD); break; + case TOOLBOX_METADATA: + LOG("TOOLBOX_METADATA\n"); + if (scsi_cmdbuf[1] == 1) + { + memset(scsi_cmdbuf, 0, 8); + scsi_cmdbuf[1] = 0x03; + } + else + { + memset(scsi_cmdbuf, 0, 8); + scsi_cmdbuf[3] = 0x02; + } + scsi_data_in(0, 8); + scsi_status_complete(SS_GOOD); + break; + case TOOLBOX_COUNT_CDS: LOG("TOOLBOX_COUNT_CDS\n"); scsi_cmdbuf[0] = 0; From b23a858b61c2b8940c5ddc33827e83cc4a68aebb Mon Sep 17 00:00:00 2001 From: cracyc Date: Sat, 21 Feb 2026 13:43:08 -0600 Subject: [PATCH 007/351] i386: adjust cs for ppro+ --- src/devices/cpu/i386/i386.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 02255cefde4..99fc471bf07 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -2611,7 +2611,10 @@ void i386_device::enter_smm() m_sreg[DS].flags = m_sreg[ES].flags = m_sreg[FS].flags = m_sreg[GS].flags = m_sreg[SS].flags = 0x8093; m_sreg[DS].valid = m_sreg[ES].valid = m_sreg[FS].valid = m_sreg[GS].valid = m_sreg[SS].valid = true; m_sreg[DS].d = m_sreg[ES].d = m_sreg[FS].d = m_sreg[GS].d = m_sreg[SS].d = 0; - m_sreg[CS].selector = 0x3000; // pentium only, ppro sel = smbase >> 4 + if((m_cpu_version >> 8) == 5) + m_sreg[CS].selector = 0x3000; + else + m_sreg[CS].selector = m_smbase >> 4; m_sreg[CS].base = m_smbase; m_sreg[CS].limit = 0xffffffff; m_sreg[CS].flags = 0x8093; From 26247d4e91a75151ee2ed6ad5b11ee0a71a45c0b Mon Sep 17 00:00:00 2001 From: cracyc Date: Sat, 21 Feb 2026 14:44:08 -0600 Subject: [PATCH 008/351] i386: include the 486 --- src/devices/cpu/i386/i386.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 99fc471bf07..9daec3ec4e0 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -2611,10 +2611,7 @@ void i386_device::enter_smm() m_sreg[DS].flags = m_sreg[ES].flags = m_sreg[FS].flags = m_sreg[GS].flags = m_sreg[SS].flags = 0x8093; m_sreg[DS].valid = m_sreg[ES].valid = m_sreg[FS].valid = m_sreg[GS].valid = m_sreg[SS].valid = true; m_sreg[DS].d = m_sreg[ES].d = m_sreg[FS].d = m_sreg[GS].d = m_sreg[SS].d = 0; - if((m_cpu_version >> 8) == 5) - m_sreg[CS].selector = 0x3000; - else - m_sreg[CS].selector = m_smbase >> 4; + m_sreg[CS].selector = (m_cpu_version >= 6) ? m_smbase >> 4 : 0x3000; // k6 reports family 6 but may also force 0x3000 m_sreg[CS].base = m_smbase; m_sreg[CS].limit = 0xffffffff; m_sreg[CS].flags = 0x8093; From 0b5cf596056ca62ed4cb7c0b4262846f778679de Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 21 Feb 2026 22:32:53 -0500 Subject: [PATCH 009/351] apple/apple2video.cpp: Fix the Albert clone. Again. [R. Belmont] --- src/mame/apple/apple2.cpp | 2 +- src/mame/apple/apple2video.cpp | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mame/apple/apple2.cpp b/src/mame/apple/apple2.cpp index 1dd32668b31..15a3cd6049d 100644 --- a/src/mame/apple/apple2.cpp +++ b/src/mame/apple/apple2.cpp @@ -952,7 +952,7 @@ void apple2_state::dodo(machine_config &config) void apple2_state::albert(machine_config &config) { apple2p(config); - m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); + m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); } void apple2_state::ivelultr(machine_config &config) diff --git a/src/mame/apple/apple2video.cpp b/src/mame/apple/apple2video.cpp index b09bbd25e81..3f8487a281a 100644 --- a/src/mame/apple/apple2video.cpp +++ b/src/mame/apple/apple2video.cpp @@ -1064,7 +1064,6 @@ template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); -template uint32_t a2_video_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); static INPUT_PORTS_START( a2_vidconfig_composite ); PORT_START("a2_video_config") From 629a4e63a564ec05ab0a648b87b23bce9f0e00c8 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 22 Feb 2026 09:41:48 +0100 Subject: [PATCH 010/351] New systems marked not working ------------------------------ Cranky Condor [unknown] Thunder V [unknown] Versus [unknown] --- src/mame/mame.lst | 5 ++ src/mame/universal/pachislo_z80.cpp | 103 ++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+) create mode 100644 src/mame/universal/pachislo_z80.cpp diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 98df0c43188..fc7643c88d0 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -48257,6 +48257,11 @@ mrdofabr mrdobl yankeedo +@source:universal/pachislo_z80.cpp +crankyc +thunderv +versus + @source:universal/sraider.cpp mrsdyna sraider diff --git a/src/mame/universal/pachislo_z80.cpp b/src/mame/universal/pachislo_z80.cpp new file mode 100644 index 00000000000..f1418bc2c0c --- /dev/null +++ b/src/mame/universal/pachislo_z80.cpp @@ -0,0 +1,103 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +Universal mechanical pachislo. Z80-based. + +Only hardware info available: + +CPU : Z-80 +SOUND : YM2413 +*/ + + +#include "emu.h" + +#include "cpu/z80/z80.h" +#include "sound/ymopl.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" +#include "tilemap.h" + + +namespace { + +class pachislo_z80_state : public driver_device +{ +public: + pachislo_z80_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") + { } + + void pachislo_z80(machine_config &config) ATTR_COLD; + +private: + required_device m_maincpu; + + void program_map(address_map &map) ATTR_COLD; +}; + + +void pachislo_z80_state::program_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x0000, 0x1fff).rom(); + map(0x2000, 0x21ff).ram(); + map(0x4000, 0x4001).w("ym", FUNC(ym2413_device::write)); + map(0x6000, 0x6000).portr("IN0"); + // map(0x6001, 0x6001).w(); +} + + +static INPUT_PORTS_START( pachislo ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + + +void pachislo_z80_state::pachislo_z80(machine_config &config) +{ + Z80(config, m_maincpu, 3'000'000); // clock not verified + m_maincpu->set_addrmap(AS_PROGRAM, &pachislo_z80_state::program_map); + m_maincpu->set_periodic_int(FUNC(pachislo_z80_state::irq0_line_hold), attotime::from_hz(4*60)); // source? + + // TODO: other hw? + + SPEAKER(config, "mono").front_center(); + + YM2413(config, "ym", 3'000'000).add_route(ALL_OUTPUTS, "mono", 1.0); // clock not verified +} + + +ROM_START( crankyc ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "crankyc.bin", 0x0000, 0x2000, CRC(af7af60c) SHA1(40840030826089299de0ad1eb29ba1dfb7bb6a1c) ) +ROM_END + +ROM_START( thunderv ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "thunderv.bin", 0x0000, 0x2000, CRC(00b9f00c) SHA1(472aca09113efc11934ce94c68373fe1c15c9a5b) ) +ROM_END + +ROM_START( versus ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "versus.bin", 0x0000, 0x2000, CRC(2ed3eb61) SHA1(1d0b4c61ff44fd6447d4e1f529a8efed221af3c7) ) +ROM_END + +} // anonymous namespace + + +GAME( 1997, crankyc, 0, pachislo_z80, pachislo, pachislo_z80_state, empty_init, ROT0, "Universal", "Cranky Condor", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL ) // 1997.02.17 +GAME( 1997, thunderv, 0, pachislo_z80, pachislo, pachislo_z80_state, empty_init, ROT0, "Universal", "Thunder V", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL ) // 1997.09.08 +GAME( 1997, versus, 0, pachislo_z80, pachislo, pachislo_z80_state, empty_init, ROT0, "Universal", "Versus", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL ) // 1997.11.17 From 1f94a288731e143546c1a768fff844b0446add7e Mon Sep 17 00:00:00 2001 From: m1macrophage <168948267+m1macrophage@users.noreply.github.com> Date: Sun, 22 Feb 2026 01:39:23 -0800 Subject: [PATCH 011/351] multiple synth layouts: rotating knob pointers and click states. (#15004) --- src/mame/layout/linn_linndrum.lay | 6 +- src/mame/layout/oberheim_dmx.lay | 158 ++++++++++++--- src/mame/layout/paia_fatman.lay | 203 ++++++++++++++++--- src/mame/layout/pg1000.lay | 251 ++++++++++++++++++------ src/mame/layout/roland_tr707.lay | 197 ++++++++++++++++--- src/mame/layout/sequential_prophet5.lay | 141 +++++++++++-- src/mame/layout/sequential_sixtrak.lay | 150 ++++++++++++-- 7 files changed, 925 insertions(+), 181 deletions(-) diff --git a/src/mame/layout/linn_linndrum.lay b/src/mame/layout/linn_linndrum.lay index e52c010a65a..a6f89bab326 100644 --- a/src/mame/layout/linn_linndrum.lay +++ b/src/mame/layout/linn_linndrum.lay @@ -648,7 +648,7 @@ copyright-holders:m1macrophage ----------------------------------------------------------------------- -- Slider and knob library starts. -- Can be copied as-is to other layouts. - -- version: 10 + -- version: 11 ----------------------------------------------------------------------- -- Global configuration. Can be overwritten in the resolve_tags callback. @@ -680,6 +680,7 @@ copyright-holders:m1macrophage -- `dot_id` is optional. If not nil, this script will take control of the -- element's position as the knob rotates. The distance of the dot from -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) table.insert(widgets, { clickarea = get_layout_item(view, clickarea_id), @@ -687,7 +688,7 @@ copyright-holders:m1macrophage is_knob = true, scale = scale, is_horizontal = (drag_direction == HORIZONTAL), - knob_dot = get_layout_item(view, dot_id) }) + knob_dot = dot_id and get_layout_item(view, dot_id) }) end function get_layout_item(view, item_id) @@ -902,4 +903,3 @@ copyright-holders:m1macrophage ----------------------------------------------------------------------- ]]> - diff --git a/src/mame/layout/oberheim_dmx.lay b/src/mame/layout/oberheim_dmx.lay index 27b2e21e940..1972c3ceaab 100644 --- a/src/mame/layout/oberheim_dmx.lay +++ b/src/mame/layout/oberheim_dmx.lay @@ -84,7 +84,10 @@ copyright-holders:m1macrophage - + + + + @@ -108,7 +111,8 @@ copyright-holders:m1macrophage - + + @@ -557,12 +561,12 @@ copyright-holders:m1macrophage -- Configure volume faders. for i = 1, 10 do - add_vertical_slider(view, "fader_" .. i, "fader_knob_" .. i, "fader_p" .. i) + add_slider(view, "fader_" .. i, "fader_knob_" .. i, "fader_p" .. i) end -- Configure tuning trimmers. for i = 1, 8 do - add_vertical_slider(view, "trimmer_" .. i, "trimmer_knob_" .. i, "pitch_adj_" .. i) + add_slider(view, "trimmer_" .. i, "trimmer_knob_" .. i, "pitch_adj_" .. i) end view.items["warning"]:set_state(0) @@ -571,14 +575,24 @@ copyright-holders:m1macrophage ----------------------------------------------------------------------- -- Slider and knob library starts. -- Can be copied as-is to other layouts. + -- version: 11 ----------------------------------------------------------------------- + + -- Global configuration. Can be overwritten in the resolve_tags callback. + KNOB_DOT_ANGLE_SPAN = 150 -- -/+ 150 degrees from top center. + UPDATE_CLICK_STATE = true + + -- Constants. + VERTICAL = 0 + HORIZONTAL = 1 + local widgets = {} -- Stores slider and knob information. local pointers = {} -- Tracks pointer state. -- The knob's Y position must be animated using . -- The click area's vertical size must exactly span the range of the -- knob's movement. - function add_vertical_slider(view, clickarea_id, knob_id, port_name) + function add_slider(view, clickarea_id, knob_id, port_name) table.insert(widgets, { clickarea = get_layout_item(view, clickarea_id), slider_knob = get_layout_item(view, knob_id), @@ -587,13 +601,21 @@ copyright-holders:m1macrophage end -- A sweep between the attached field's min and max values requires - -- moving the pointer by `scale * clickarea.height` pixes. - function add_simplecounter_knob(view, clickarea_id, port_name, scale) + -- moving the pointer by `scale * clickarea.height` pixels, when drag + -- direction is VERTICAL. Replace `height` with `width` when HORIZONTAL. + -- + -- `dot_id` is optional. If not nil, this script will take control of the + -- element's position as the knob rotates. The distance of the dot from + -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. + function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) table.insert(widgets, { - clickarea = get_layout_item(view, clickarea_id), - field = get_port_field(port_name), - is_knob = true, - scale = scale }) + clickarea = get_layout_item(view, clickarea_id), + field = get_port_field(port_name), + is_knob = true, + scale = scale, + is_horizontal = (drag_direction == HORIZONTAL), + knob_dot = dot_id and get_layout_item(view, dot_id) }) end function get_layout_item(view, item_id) @@ -615,17 +637,44 @@ copyright-holders:m1macrophage field = val break end + local field_msg = "Needs to either be an IPT_ADJUSTER, or an analog port with auto-center." if field == nil then - emu.print_error("Port: '" .. port_name .."' does not seem to be an IPT_ADJUSTER.") + emu.print_error("Port '" .. port_name .."' " .. field_msg) + return nil + end + if field.is_analog and (not field.centerdelta or field.centerdelta == 0) then + emu.print_error("Port '" .. port_name .."' " .. field_msg) return nil end return field end + local function set_click_state(widget, state) + if UPDATE_CLICK_STATE then + if widget.is_knob then + widget.clickarea:set_state(state) + else + widget.slider_knob:set_state(state) + end + end + end + + local function release_pointer(pointer_id) + if pointers[pointer_id] then + local widget = widgets[pointers[pointer_id].selected_widget] + set_click_state(widget, 0) + local field = widget.field + if field.is_analog then + field:clear_value() + end + end + pointers[pointer_id] = nil + end + local function pointer_updated(type, id, dev, x, y, btn, dn, up, cnt) -- If a button is not pressed, reset the state of the current pointer. if btn & 1 == 0 then - pointers[id] = nil + release_pointer(id) return end @@ -641,11 +690,13 @@ copyright-holders:m1macrophage relative = false end if found then + set_click_state(widgets[i], 1) pointers[id] = { selected_widget = i, relative = relative, + start_x = x, start_y = y, - start_value = widgets[i].field.user_value } + start_value = widgets[i].field.port:read() } break end end @@ -656,8 +707,7 @@ copyright-holders:m1macrophage return end - -- A widget is selected. Update its state based on the pointer's Y - -- position. It is assumed the attached IO field is an IPT_ADJUSTER. + -- A widget is selected. Update its state based on the pointer's position. local pointer = pointers[id] local widget = widgets[pointer.selected_widget] @@ -668,8 +718,13 @@ copyright-holders:m1macrophage local new_value if widget.is_knob then - local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) - new_value = pointer.start_value + (pointer.start_y - y) * step_y + if widget.is_horizontal then + local step_x = value_range / (widget.scale * widget.clickarea.bounds.width) + new_value = pointer.start_value + (x - pointer.start_x) * step_x + else + local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) + new_value = pointer.start_value + (pointer.start_y - y) * step_y + end else local knob_half_height = widget.slider_knob.bounds.height / 2 local min_y = widget.clickarea.bounds.y0 + knob_half_height @@ -689,22 +744,82 @@ copyright-holders:m1macrophage new_value = math.floor(new_value + 0.5) if new_value < min_value then new_value = min_value end if new_value > max_value then new_value = max_value end - widget.field.user_value = new_value + + if widget.field.is_analog then + widget.field:set_value(new_value) + else + widget.field.user_value = new_value + end + end + + local function get_knob_dot_bounds(widget) + local dot = widget.knob_dot_cache + local value = (widget.field.port:read() - dot.value_min) / dot.value_range + local angle = dot.angle_min + value * dot.angle_range + local rx = -dot.center_y * math.sin(angle) * dot.aspect + local ry = dot.center_y * math.cos(angle) + local x = rx + dot.dx + local y = ry + dot.dy + return emu.render_bounds(x, y, x + dot.width, y + dot.height) + end + + local function configure_knob_dots() + for i = 1, #widgets do + local dot = widgets[i].knob_dot + if dot then + -- Remove bounds callback, since we need to access the + -- configured bounds. + dot:set_bounds_callback(nil) + + local field = widgets[i].field + local knob_bounds = widgets[i].clickarea.bounds + local dot_bounds = dot.bounds + local max_angle = KNOB_DOT_ANGLE_SPAN * 2.0 * math.pi / 360.0 + + -- Compute the distance of the knob dot from the knob center. + local dot_x = dot_bounds.x0 + dot_bounds.width / 2.0 + local dot_y = dot_bounds.y0 + dot_bounds.height / 2.0 + local knob_x = knob_bounds.x0 + knob_bounds.width / 2.0 + local knob_y = knob_bounds.y0 + knob_bounds.height / 2.0 + local radius = math.sqrt((dot_y - knob_y) ^ 2 + (dot_x - knob_x) ^ 2) + + widgets[i].knob_dot_cache = { + width = dot_bounds.width, + height = dot_bounds.height, + aspect = dot_bounds.aspect, + value_min = field.minvalue, + value_range = field.maxvalue - field.minvalue, + angle_min = -max_angle, + angle_range = 2.0 * max_angle, + center_y = -radius, + dx = knob_bounds.x0 + (knob_bounds.width - dot_bounds.width) / 2.0, + dy = knob_bounds.y0 + (knob_bounds.height - dot_bounds.height) / 2.0 } + + dot:set_bounds_callback( + function() + return get_knob_dot_bounds(widgets[i]) + end) + end + end end local function pointer_left(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function pointer_aborted(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function forget_pointers() + for id, pointer in pairs(pointers) do + release_pointer(id) + end pointers = {} end function install_slider_callbacks(view) + view:set_recomputed_callback(configure_knob_dots) view:set_pointer_updated_callback(pointer_updated) view:set_pointer_left_callback(pointer_left) view:set_pointer_aborted_callback(pointer_aborted) @@ -715,4 +830,3 @@ copyright-holders:m1macrophage ----------------------------------------------------------------------- ]]> - diff --git a/src/mame/layout/paia_fatman.lay b/src/mame/layout/paia_fatman.lay index 15f9d910049..19903c5a5bc 100644 --- a/src/mame/layout/paia_fatman.lay +++ b/src/mame/layout/paia_fatman.lay @@ -189,13 +189,9 @@ copyright-holders:m1macrophage - + - - - - @@ -205,11 +201,39 @@ copyright-holders:m1macrophage - + + + + + + + + + + + + + + + + + + + + - + + + + + + + + + + @@ -219,9 +243,15 @@ copyright-holders:m1macrophage - + + + + + + + @@ -231,7 +261,7 @@ copyright-holders:m1macrophage - + @@ -334,11 +364,11 @@ copyright-holders:m1macrophage - + - + - + @@ -420,7 +450,8 @@ copyright-holders:m1macrophage local knobs = {"VCF_attack", "VCF_release", "VCA_attack", "VCA_decay", "VCA_sustain", "VCA_release"} for i, knob_id in ipairs(knobs) do - add_simplecounter_knob(view, knob_id, knob_id, 1.5) + add_knob(view, knob_id, knob_id, 1.5, VERTICAl, knob_id .. "_dot") + get_layout_item(view, knob_id .. "_dot"):set_state(1) end view.items["warning"]:set_state(0) @@ -429,14 +460,24 @@ copyright-holders:m1macrophage ----------------------------------------------------------------------- -- Slider and knob library starts. -- Can be copied as-is to other layouts. + -- version: 11 ----------------------------------------------------------------------- + + -- Global configuration. Can be overwritten in the resolve_tags callback. + KNOB_DOT_ANGLE_SPAN = 150 -- -/+ 150 degrees from top center. + UPDATE_CLICK_STATE = true + + -- Constants. + VERTICAL = 0 + HORIZONTAL = 1 + local widgets = {} -- Stores slider and knob information. local pointers = {} -- Tracks pointer state. -- The knob's Y position must be animated using . -- The click area's vertical size must exactly span the range of the -- knob's movement. - function add_vertical_slider(view, clickarea_id, knob_id, port_name) + function add_slider(view, clickarea_id, knob_id, port_name) table.insert(widgets, { clickarea = get_layout_item(view, clickarea_id), slider_knob = get_layout_item(view, knob_id), @@ -445,13 +486,21 @@ copyright-holders:m1macrophage end -- A sweep between the attached field's min and max values requires - -- moving the pointer by `scale * clickarea.height` pixes. - function add_simplecounter_knob(view, clickarea_id, port_name, scale) + -- moving the pointer by `scale * clickarea.height` pixels, when drag + -- direction is VERTICAL. Replace `height` with `width` when HORIZONTAL. + -- + -- `dot_id` is optional. If not nil, this script will take control of the + -- element's position as the knob rotates. The distance of the dot from + -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. + function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) table.insert(widgets, { - clickarea = get_layout_item(view, clickarea_id), - field = get_port_field(port_name), - is_knob = true, - scale = scale }) + clickarea = get_layout_item(view, clickarea_id), + field = get_port_field(port_name), + is_knob = true, + scale = scale, + is_horizontal = (drag_direction == HORIZONTAL), + knob_dot = dot_id and get_layout_item(view, dot_id) }) end function get_layout_item(view, item_id) @@ -473,17 +522,44 @@ copyright-holders:m1macrophage field = val break end + local field_msg = "Needs to either be an IPT_ADJUSTER, or an analog port with auto-center." if field == nil then - emu.print_error("Port: '" .. port_name .."' does not seem to be an IPT_ADJUSTER.") + emu.print_error("Port '" .. port_name .."' " .. field_msg) + return nil + end + if field.is_analog and (not field.centerdelta or field.centerdelta == 0) then + emu.print_error("Port '" .. port_name .."' " .. field_msg) return nil end return field end + local function set_click_state(widget, state) + if UPDATE_CLICK_STATE then + if widget.is_knob then + widget.clickarea:set_state(state) + else + widget.slider_knob:set_state(state) + end + end + end + + local function release_pointer(pointer_id) + if pointers[pointer_id] then + local widget = widgets[pointers[pointer_id].selected_widget] + set_click_state(widget, 0) + local field = widget.field + if field.is_analog then + field:clear_value() + end + end + pointers[pointer_id] = nil + end + local function pointer_updated(type, id, dev, x, y, btn, dn, up, cnt) -- If a button is not pressed, reset the state of the current pointer. if btn & 1 == 0 then - pointers[id] = nil + release_pointer(id) return end @@ -499,11 +575,13 @@ copyright-holders:m1macrophage relative = false end if found then + set_click_state(widgets[i], 1) pointers[id] = { selected_widget = i, relative = relative, + start_x = x, start_y = y, - start_value = widgets[i].field.user_value } + start_value = widgets[i].field.port:read() } break end end @@ -514,8 +592,7 @@ copyright-holders:m1macrophage return end - -- A widget is selected. Update its state based on the pointer's Y - -- position. It is assumed the attached IO field is an IPT_ADJUSTER. + -- A widget is selected. Update its state based on the pointer's position. local pointer = pointers[id] local widget = widgets[pointer.selected_widget] @@ -526,8 +603,13 @@ copyright-holders:m1macrophage local new_value if widget.is_knob then - local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) - new_value = pointer.start_value + (pointer.start_y - y) * step_y + if widget.is_horizontal then + local step_x = value_range / (widget.scale * widget.clickarea.bounds.width) + new_value = pointer.start_value + (x - pointer.start_x) * step_x + else + local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) + new_value = pointer.start_value + (pointer.start_y - y) * step_y + end else local knob_half_height = widget.slider_knob.bounds.height / 2 local min_y = widget.clickarea.bounds.y0 + knob_half_height @@ -547,22 +629,82 @@ copyright-holders:m1macrophage new_value = math.floor(new_value + 0.5) if new_value < min_value then new_value = min_value end if new_value > max_value then new_value = max_value end - widget.field.user_value = new_value + + if widget.field.is_analog then + widget.field:set_value(new_value) + else + widget.field.user_value = new_value + end + end + + local function get_knob_dot_bounds(widget) + local dot = widget.knob_dot_cache + local value = (widget.field.port:read() - dot.value_min) / dot.value_range + local angle = dot.angle_min + value * dot.angle_range + local rx = -dot.center_y * math.sin(angle) * dot.aspect + local ry = dot.center_y * math.cos(angle) + local x = rx + dot.dx + local y = ry + dot.dy + return emu.render_bounds(x, y, x + dot.width, y + dot.height) + end + + local function configure_knob_dots() + for i = 1, #widgets do + local dot = widgets[i].knob_dot + if dot then + -- Remove bounds callback, since we need to access the + -- configured bounds. + dot:set_bounds_callback(nil) + + local field = widgets[i].field + local knob_bounds = widgets[i].clickarea.bounds + local dot_bounds = dot.bounds + local max_angle = KNOB_DOT_ANGLE_SPAN * 2.0 * math.pi / 360.0 + + -- Compute the distance of the knob dot from the knob center. + local dot_x = dot_bounds.x0 + dot_bounds.width / 2.0 + local dot_y = dot_bounds.y0 + dot_bounds.height / 2.0 + local knob_x = knob_bounds.x0 + knob_bounds.width / 2.0 + local knob_y = knob_bounds.y0 + knob_bounds.height / 2.0 + local radius = math.sqrt((dot_y - knob_y) ^ 2 + (dot_x - knob_x) ^ 2) + + widgets[i].knob_dot_cache = { + width = dot_bounds.width, + height = dot_bounds.height, + aspect = dot_bounds.aspect, + value_min = field.minvalue, + value_range = field.maxvalue - field.minvalue, + angle_min = -max_angle, + angle_range = 2.0 * max_angle, + center_y = -radius, + dx = knob_bounds.x0 + (knob_bounds.width - dot_bounds.width) / 2.0, + dy = knob_bounds.y0 + (knob_bounds.height - dot_bounds.height) / 2.0 } + + dot:set_bounds_callback( + function() + return get_knob_dot_bounds(widgets[i]) + end) + end + end end local function pointer_left(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function pointer_aborted(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function forget_pointers() + for id, pointer in pairs(pointers) do + release_pointer(id) + end pointers = {} end function install_slider_callbacks(view) + view:set_recomputed_callback(configure_knob_dots) view:set_pointer_updated_callback(pointer_updated) view:set_pointer_left_callback(pointer_left) view:set_pointer_aborted_callback(pointer_aborted) @@ -573,4 +715,3 @@ copyright-holders:m1macrophage ----------------------------------------------------------------------- ]]> - diff --git a/src/mame/layout/pg1000.lay b/src/mame/layout/pg1000.lay index 1786fbb32f1..230bb410fcb 100644 --- a/src/mame/layout/pg1000.lay +++ b/src/mame/layout/pg1000.lay @@ -765,15 +765,15 @@ license:CC0-1.0 install_slider_callbacks(view) for i = 0, 12 do - add_vertical_slider(view, "top_slider_" .. i, "knob_top_slider_" .. i, "top_slider_" .. i) + add_slider(view, "top_slider_" .. i, "knob_top_slider_" .. i, "top_slider_" .. i) end for i = 0, 22 do - add_vertical_slider(view, "middle_slider_" .. i, "knob_middle_slider_" .. i, "middle_slider_" .. i) + add_slider(view, "middle_slider_" .. i, "knob_middle_slider_" .. i, "middle_slider_" .. i) end for i = 0, 19 do - add_vertical_slider(view, "bottom_slider_" .. i, "knob_bottom_slider_" .. i, "bottom_slider_" .. i) + add_slider(view, "bottom_slider_" .. i, "knob_bottom_slider_" .. i, "bottom_slider_" .. i) end -- TODO: Display a warning about how to enable sliders @@ -782,137 +782,260 @@ license:CC0-1.0 end) ----------------------------------------------------------------------- - -- Slider library starts. + -- Slider and knob library starts. -- Can be copied as-is to other layouts. + -- version: 11 ----------------------------------------------------------------------- - local sliders = {} -- Stores slider information. + + -- Global configuration. Can be overwritten in the resolve_tags callback. + KNOB_DOT_ANGLE_SPAN = 150 -- -/+ 150 degrees from top center. + UPDATE_CLICK_STATE = true + + -- Constants. + VERTICAL = 0 + HORIZONTAL = 1 + + local widgets = {} -- Stores slider and knob information. local pointers = {} -- Tracks pointer state. -- The knob's Y position must be animated using . -- The click area's vertical size must exactly span the range of the -- knob's movement. - function add_vertical_slider(view, clickarea_id, knob_id, port_name) - local slider = {} + function add_slider(view, clickarea_id, knob_id, port_name) + table.insert(widgets, { + clickarea = get_layout_item(view, clickarea_id), + slider_knob = get_layout_item(view, knob_id), + field = get_port_field(port_name), + is_knob = false }) + end - slider.clickarea = view.items[clickarea_id] - if slider.clickarea == nil then - emu.print_error("Slider element: '" .. clickarea_id .. "' not found.") - return - end + -- A sweep between the attached field's min and max values requires + -- moving the pointer by `scale * clickarea.height` pixels, when drag + -- direction is VERTICAL. Replace `height` with `width` when HORIZONTAL. + -- + -- `dot_id` is optional. If not nil, this script will take control of the + -- element's position as the knob rotates. The distance of the dot from + -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. + function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) + table.insert(widgets, { + clickarea = get_layout_item(view, clickarea_id), + field = get_port_field(port_name), + is_knob = true, + scale = scale, + is_horizontal = (drag_direction == HORIZONTAL), + knob_dot = dot_id and get_layout_item(view, dot_id) }) + end - slider.knob = view.items[knob_id] - if slider.knob == nil then - emu.print_error("Slider knob element: '" .. knob_id .. "' not found.") - return + function get_layout_item(view, item_id) + local item = view.items[item_id] + if item == nil then + emu.print_error("Layout element: '" .. item_id .. "' not found.") end + return item + end + function get_port_field(port_name) local port = file.device:ioport(port_name) if port == nil then emu.print_error("Port: '" .. port_name .. "' not found.") - return + return nil end - - slider.field = nil + local field = nil for k, val in pairs(port.fields) do - slider.field = val + field = val break end - if slider.field == nil then - emu.print_error("Port: '" .. port_name .."' does not seem to be an IPT_ADJUSTER.") - return + local field_msg = "Needs to either be an IPT_ADJUSTER, or an analog port with auto-center." + if field == nil then + emu.print_error("Port '" .. port_name .."' " .. field_msg) + return nil end + if field.is_analog and (not field.centerdelta or field.centerdelta == 0) then + emu.print_error("Port '" .. port_name .."' " .. field_msg) + return nil + end + return field + end - table.insert(sliders, slider) + local function set_click_state(widget, state) + if UPDATE_CLICK_STATE then + if widget.is_knob then + widget.clickarea:set_state(state) + else + widget.slider_knob:set_state(state) + end + end + end + + local function release_pointer(pointer_id) + if pointers[pointer_id] then + local widget = widgets[pointers[pointer_id].selected_widget] + set_click_state(widget, 0) + local field = widget.field + if field.is_analog then + field:clear_value() + end + end + pointers[pointer_id] = nil end local function pointer_updated(type, id, dev, x, y, btn, dn, up, cnt) -- If a button is not pressed, reset the state of the current pointer. if btn & 1 == 0 then - pointers[id] = nil - for i = 1, #sliders do - sliders[i].knob:set_state(0) - end + release_pointer(id) return end - -- If a button was just pressed, find the affected slider, if any. + -- If a button was just pressed, find the affected widget, if any. if dn & 1 ~= 0 then - for i = 1, #sliders do - if sliders[i].knob.bounds:includes(x, y) then - sliders[i].knob:set_state(1) + for i = 1, #widgets do + local found, relative + if widgets[i].slider_knob and widgets[i].slider_knob.bounds:includes(x, y) then + found = true + relative = true + elseif widgets[i].clickarea.bounds:includes(x, y) then + found = true + relative = false + end + if found then + set_click_state(widgets[i], 1) pointers[id] = { - selected_slider = i, - relative = true, + selected_widget = i, + relative = relative, + start_x = x, start_y = y, - start_value = sliders[i].field.user_value } - break - elseif sliders[i].clickarea.bounds:includes(x, y) then - sliders[i].knob:set_state(1) - pointers[id] = { - selected_slider = i, - relative = false } + start_value = widgets[i].field.port:read() } break end end end - -- If there is no slider selected by the current pointer, we are done. + -- If there is no widget selected by the current pointer, we are done. if pointers[id] == nil then return end - -- A slider is selected. Update state and, indirectly, slider knob position, - -- based on the pointer's Y position. It is assumed the attached IO field is - -- an IPT_ADJUSTER. + -- A widget is selected. Update its state based on the pointer's position. local pointer = pointers[id] - local slider = sliders[pointer.selected_slider] + local widget = widgets[pointer.selected_widget] - local min_value = slider.field.minvalue - local max_value = slider.field.maxvalue + local min_value = widget.field.minvalue + local max_value = widget.field.maxvalue local value_range = max_value - min_value - local knob_half_height = slider.knob.bounds.height / 2 - local min_y = slider.clickarea.bounds.y0 + knob_half_height - local max_y = slider.clickarea.bounds.y1 - knob_half_height - - local new_value = 0 - if pointer.relative then - -- User clicked on the knob. The new value will depend on how much the - -- knob was dragged. - new_value = pointer.start_value - value_range * (y - pointer.start_y) / (max_y - min_y) + local new_value + if widget.is_knob then + if widget.is_horizontal then + local step_x = value_range / (widget.scale * widget.clickarea.bounds.width) + new_value = pointer.start_value + (x - pointer.start_x) * step_x + else + local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) + new_value = pointer.start_value + (pointer.start_y - y) * step_y + end else - -- User clicked elsewhere on the slider. The new value will depend on - -- the absolute position of the click. - new_value = max_value - value_range * (y - min_y) / (max_y - min_y) + local knob_half_height = widget.slider_knob.bounds.height / 2 + local min_y = widget.clickarea.bounds.y0 + knob_half_height + local max_y = widget.clickarea.bounds.y1 - knob_half_height + + if pointer.relative then + -- User clicked on the knob. The new value will depend on how + -- much the knob was dragged. + new_value = pointer.start_value - value_range * (y - pointer.start_y) / (max_y - min_y) + else + -- User clicked elsewhere on the slider. The new value will depend on + -- the absolute position of the click. + new_value = max_value - value_range * (y - min_y) / (max_y - min_y) + end end new_value = math.floor(new_value + 0.5) if new_value < min_value then new_value = min_value end if new_value > max_value then new_value = max_value end - slider.field.user_value = new_value + + if widget.field.is_analog then + widget.field:set_value(new_value) + else + widget.field.user_value = new_value + end + end + + local function get_knob_dot_bounds(widget) + local dot = widget.knob_dot_cache + local value = (widget.field.port:read() - dot.value_min) / dot.value_range + local angle = dot.angle_min + value * dot.angle_range + local rx = -dot.center_y * math.sin(angle) * dot.aspect + local ry = dot.center_y * math.cos(angle) + local x = rx + dot.dx + local y = ry + dot.dy + return emu.render_bounds(x, y, x + dot.width, y + dot.height) + end + + local function configure_knob_dots() + for i = 1, #widgets do + local dot = widgets[i].knob_dot + if dot then + -- Remove bounds callback, since we need to access the + -- configured bounds. + dot:set_bounds_callback(nil) + + local field = widgets[i].field + local knob_bounds = widgets[i].clickarea.bounds + local dot_bounds = dot.bounds + local max_angle = KNOB_DOT_ANGLE_SPAN * 2.0 * math.pi / 360.0 + + -- Compute the distance of the knob dot from the knob center. + local dot_x = dot_bounds.x0 + dot_bounds.width / 2.0 + local dot_y = dot_bounds.y0 + dot_bounds.height / 2.0 + local knob_x = knob_bounds.x0 + knob_bounds.width / 2.0 + local knob_y = knob_bounds.y0 + knob_bounds.height / 2.0 + local radius = math.sqrt((dot_y - knob_y) ^ 2 + (dot_x - knob_x) ^ 2) + + widgets[i].knob_dot_cache = { + width = dot_bounds.width, + height = dot_bounds.height, + aspect = dot_bounds.aspect, + value_min = field.minvalue, + value_range = field.maxvalue - field.minvalue, + angle_min = -max_angle, + angle_range = 2.0 * max_angle, + center_y = -radius, + dx = knob_bounds.x0 + (knob_bounds.width - dot_bounds.width) / 2.0, + dy = knob_bounds.y0 + (knob_bounds.height - dot_bounds.height) / 2.0 } + + dot:set_bounds_callback( + function() + return get_knob_dot_bounds(widgets[i]) + end) + end + end end local function pointer_left(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function pointer_aborted(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function forget_pointers() + for id, pointer in pairs(pointers) do + release_pointer(id) + end pointers = {} end function install_slider_callbacks(view) + view:set_recomputed_callback(configure_knob_dots) view:set_pointer_updated_callback(pointer_updated) view:set_pointer_left_callback(pointer_left) view:set_pointer_aborted_callback(pointer_aborted) view:set_forget_pointers_callback(forget_pointers) end ----------------------------------------------------------------------- - -- Slider library ends. + -- Slider and knob library ends. ----------------------------------------------------------------------- ]]> diff --git a/src/mame/layout/roland_tr707.lay b/src/mame/layout/roland_tr707.lay index 9a93c129326..e181e1b2cb7 100644 --- a/src/mame/layout/roland_tr707.lay +++ b/src/mame/layout/roland_tr707.lay @@ -260,8 +260,16 @@ the visibility and style of elements that differ between the two. - - + + + + + + + + + + @@ -278,8 +286,16 @@ the visibility and style of elements that differ between the two. - - + + + + + + + + + + @@ -384,7 +400,18 @@ the visibility and style of elements that differ between the two. - + + + + + + + + + + + + @@ -762,7 +789,8 @@ the visibility and style of elements that differ between the two. - + + @@ -933,10 +961,16 @@ the visibility and style of elements that differ between the two. local view = file.views["Default Layout"] install_slider_callbacks(view) - add_simplecounter_knob(view, "tempo_knob", "TEMPO", 1.5) - add_vertical_slider(view, "master_volume_area", "master_volume_knob", "VOLUME") + add_knob(view, "tempo_knob", "TEMPO", 1.5, VERTICAL, "tempo_dot") + get_layout_item(view, "tempo_dot"):set_state(1) + get_layout_item(view, "tempo_value"):set_color_callback( + function() + return emu.render_color(0, 0, 0, 0) + end) + + add_slider(view, "master_volume_area", "master_volume_knob", "VOLUME") for i = 1, 11 do - add_vertical_slider(view, "slider_area_" .. i, "slider_knob_" .. i, "SLIDER_" .. i) + add_slider(view, "slider_area_" .. i, "slider_knob_" .. i, "SLIDER_" .. i) end view.items["warning"]:set_state(0) @@ -945,14 +979,24 @@ the visibility and style of elements that differ between the two. ----------------------------------------------------------------------- -- Slider and knob library starts. -- Can be copied as-is to other layouts. + -- version: 11 ----------------------------------------------------------------------- + + -- Global configuration. Can be overwritten in the resolve_tags callback. + KNOB_DOT_ANGLE_SPAN = 150 -- -/+ 150 degrees from top center. + UPDATE_CLICK_STATE = true + + -- Constants. + VERTICAL = 0 + HORIZONTAL = 1 + local widgets = {} -- Stores slider and knob information. local pointers = {} -- Tracks pointer state. -- The knob's Y position must be animated using . -- The click area's vertical size must exactly span the range of the -- knob's movement. - function add_vertical_slider(view, clickarea_id, knob_id, port_name) + function add_slider(view, clickarea_id, knob_id, port_name) table.insert(widgets, { clickarea = get_layout_item(view, clickarea_id), slider_knob = get_layout_item(view, knob_id), @@ -961,13 +1005,21 @@ the visibility and style of elements that differ between the two. end -- A sweep between the attached field's min and max values requires - -- moving the pointer by `scale * clickarea.height` pixes. - function add_simplecounter_knob(view, clickarea_id, port_name, scale) + -- moving the pointer by `scale * clickarea.height` pixels, when drag + -- direction is VERTICAL. Replace `height` with `width` when HORIZONTAL. + -- + -- `dot_id` is optional. If not nil, this script will take control of the + -- element's position as the knob rotates. The distance of the dot from + -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. + function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) table.insert(widgets, { - clickarea = get_layout_item(view, clickarea_id), - field = get_port_field(port_name), - is_knob = true, - scale = scale }) + clickarea = get_layout_item(view, clickarea_id), + field = get_port_field(port_name), + is_knob = true, + scale = scale, + is_horizontal = (drag_direction == HORIZONTAL), + knob_dot = dot_id and get_layout_item(view, dot_id) }) end function get_layout_item(view, item_id) @@ -989,17 +1041,44 @@ the visibility and style of elements that differ between the two. field = val break end + local field_msg = "Needs to either be an IPT_ADJUSTER, or an analog port with auto-center." if field == nil then - emu.print_error("Port: '" .. port_name .."' does not seem to be an IPT_ADJUSTER.") + emu.print_error("Port '" .. port_name .."' " .. field_msg) + return nil + end + if field.is_analog and (not field.centerdelta or field.centerdelta == 0) then + emu.print_error("Port '" .. port_name .."' " .. field_msg) return nil end return field end + local function set_click_state(widget, state) + if UPDATE_CLICK_STATE then + if widget.is_knob then + widget.clickarea:set_state(state) + else + widget.slider_knob:set_state(state) + end + end + end + + local function release_pointer(pointer_id) + if pointers[pointer_id] then + local widget = widgets[pointers[pointer_id].selected_widget] + set_click_state(widget, 0) + local field = widget.field + if field.is_analog then + field:clear_value() + end + end + pointers[pointer_id] = nil + end + local function pointer_updated(type, id, dev, x, y, btn, dn, up, cnt) -- If a button is not pressed, reset the state of the current pointer. if btn & 1 == 0 then - pointers[id] = nil + release_pointer(id) return end @@ -1015,11 +1094,13 @@ the visibility and style of elements that differ between the two. relative = false end if found then + set_click_state(widgets[i], 1) pointers[id] = { selected_widget = i, relative = relative, + start_x = x, start_y = y, - start_value = widgets[i].field.user_value } + start_value = widgets[i].field.port:read() } break end end @@ -1030,8 +1111,7 @@ the visibility and style of elements that differ between the two. return end - -- A widget is selected. Update its state based on the pointer's Y - -- position. It is assumed the attached IO field is an IPT_ADJUSTER. + -- A widget is selected. Update its state based on the pointer's position. local pointer = pointers[id] local widget = widgets[pointer.selected_widget] @@ -1042,8 +1122,13 @@ the visibility and style of elements that differ between the two. local new_value if widget.is_knob then - local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) - new_value = pointer.start_value + (pointer.start_y - y) * step_y + if widget.is_horizontal then + local step_x = value_range / (widget.scale * widget.clickarea.bounds.width) + new_value = pointer.start_value + (x - pointer.start_x) * step_x + else + local step_y = value_range / (widget.scale * widget.clickarea.bounds.height) + new_value = pointer.start_value + (pointer.start_y - y) * step_y + end else local knob_half_height = widget.slider_knob.bounds.height / 2 local min_y = widget.clickarea.bounds.y0 + knob_half_height @@ -1063,22 +1148,82 @@ the visibility and style of elements that differ between the two. new_value = math.floor(new_value + 0.5) if new_value < min_value then new_value = min_value end if new_value > max_value then new_value = max_value end - widget.field.user_value = new_value + + if widget.field.is_analog then + widget.field:set_value(new_value) + else + widget.field.user_value = new_value + end + end + + local function get_knob_dot_bounds(widget) + local dot = widget.knob_dot_cache + local value = (widget.field.port:read() - dot.value_min) / dot.value_range + local angle = dot.angle_min + value * dot.angle_range + local rx = -dot.center_y * math.sin(angle) * dot.aspect + local ry = dot.center_y * math.cos(angle) + local x = rx + dot.dx + local y = ry + dot.dy + return emu.render_bounds(x, y, x + dot.width, y + dot.height) + end + + local function configure_knob_dots() + for i = 1, #widgets do + local dot = widgets[i].knob_dot + if dot then + -- Remove bounds callback, since we need to access the + -- configured bounds. + dot:set_bounds_callback(nil) + + local field = widgets[i].field + local knob_bounds = widgets[i].clickarea.bounds + local dot_bounds = dot.bounds + local max_angle = KNOB_DOT_ANGLE_SPAN * 2.0 * math.pi / 360.0 + + -- Compute the distance of the knob dot from the knob center. + local dot_x = dot_bounds.x0 + dot_bounds.width / 2.0 + local dot_y = dot_bounds.y0 + dot_bounds.height / 2.0 + local knob_x = knob_bounds.x0 + knob_bounds.width / 2.0 + local knob_y = knob_bounds.y0 + knob_bounds.height / 2.0 + local radius = math.sqrt((dot_y - knob_y) ^ 2 + (dot_x - knob_x) ^ 2) + + widgets[i].knob_dot_cache = { + width = dot_bounds.width, + height = dot_bounds.height, + aspect = dot_bounds.aspect, + value_min = field.minvalue, + value_range = field.maxvalue - field.minvalue, + angle_min = -max_angle, + angle_range = 2.0 * max_angle, + center_y = -radius, + dx = knob_bounds.x0 + (knob_bounds.width - dot_bounds.width) / 2.0, + dy = knob_bounds.y0 + (knob_bounds.height - dot_bounds.height) / 2.0 } + + dot:set_bounds_callback( + function() + return get_knob_dot_bounds(widgets[i]) + end) + end + end end local function pointer_left(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function pointer_aborted(type, id, dev, x, y, up, cnt) - pointers[id] = nil + release_pointer(id) end local function forget_pointers() + for id, pointer in pairs(pointers) do + release_pointer(id) + end pointers = {} end function install_slider_callbacks(view) + view:set_recomputed_callback(configure_knob_dots) view:set_pointer_updated_callback(pointer_updated) view:set_pointer_left_callback(pointer_left) view:set_pointer_aborted_callback(pointer_aborted) diff --git a/src/mame/layout/sequential_prophet5.lay b/src/mame/layout/sequential_prophet5.lay index 10ff66121d1..d2fc9f93443 100644 --- a/src/mame/layout/sequential_prophet5.lay +++ b/src/mame/layout/sequential_prophet5.lay @@ -245,7 +245,7 @@ copyright-holders:m1macrophage - + @@ -254,7 +254,7 @@ copyright-holders:m1macrophage - + @@ -265,7 +265,7 @@ copyright-holders:m1macrophage - + @@ -274,7 +274,7 @@ copyright-holders:m1macrophage - + @@ -365,11 +365,19 @@ copyright-holders:m1macrophage - + + + + + - + + + + + @@ -377,6 +385,18 @@ copyright-holders:m1macrophage + + + + + + + + + + + + @@ -384,7 +404,10 @@ copyright-holders:m1macrophage - + + + + @@ -966,22 +989,36 @@ copyright-holders:m1macrophage add_slider(view, "wheel_pitch", "wheel_pitch_dent", "wheel_pitch") add_slider(view, "wheel_mod", "wheel_mod_dent", "wheel_mod") - local knob_scale = 1.6 - add_knob(view, "pot_tune", "pot_tune", knob_scale, VERTICAL) - add_knob(view, "pot_volume", "pot_volume", knob_scale, VERTICAL) + add_prophet_knob(view, "pot_tune") + add_prophet_knob(view, "pot_volume") for i = 0, 23 do - local knob = "pot_" .. i - add_knob(view, knob, knob, knob_scale, VERTICAL) + add_prophet_knob(view, "pot_" .. i) end view.items["warning"]:set_state(0) end) + function add_prophet_knob(view, knob_id) + add_knob(view, knob_id, knob_id, 1.6, VERTICAL, knob_id .. "_dot") + get_layout_item(view, knob_id .. "_dot"):set_state(1) + get_layout_item(view, knob_id .. "_value"):set_color_callback( + function() + return emu.render_color(0, 0, 0, 0) + end) + end + ----------------------------------------------------------------------- -- Slider and knob library starts. -- Can be copied as-is to other layouts. + -- version: 11 ----------------------------------------------------------------------- + + -- Global configuration. Can be overwritten in the resolve_tags callback. + KNOB_DOT_ANGLE_SPAN = 150 -- -/+ 150 degrees from top center. + UPDATE_CLICK_STATE = true + + -- Constants. VERTICAL = 0 HORIZONTAL = 1 @@ -1000,14 +1037,21 @@ copyright-holders:m1macrophage end -- A sweep between the attached field's min and max values requires - -- moving the pointer by `scale * clickarea.height` pixes. - function add_knob(view, clickarea_id, port_name, scale, drag_direction) + -- moving the pointer by `scale * clickarea.height` pixels, when drag + -- direction is VERTICAL. Replace `height` with `width` when HORIZONTAL. + -- + -- `dot_id` is optional. If not nil, this script will take control of the + -- element's position as the knob rotates. The distance of the dot from + -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. + function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) table.insert(widgets, { clickarea = get_layout_item(view, clickarea_id), field = get_port_field(port_name), is_knob = true, scale = scale, - is_horizontal = (drag_direction == HORIZONTAL) }) + is_horizontal = (drag_direction == HORIZONTAL), + knob_dot = dot_id and get_layout_item(view, dot_id) }) end function get_layout_item(view, item_id) @@ -1041,9 +1085,21 @@ copyright-holders:m1macrophage return field end + local function set_click_state(widget, state) + if UPDATE_CLICK_STATE then + if widget.is_knob then + widget.clickarea:set_state(state) + else + widget.slider_knob:set_state(state) + end + end + end + local function release_pointer(pointer_id) if pointers[pointer_id] then - local field = widgets[pointers[pointer_id].selected_widget].field + local widget = widgets[pointers[pointer_id].selected_widget] + set_click_state(widget, 0) + local field = widget.field if field.is_analog then field:clear_value() end @@ -1070,6 +1126,7 @@ copyright-holders:m1macrophage relative = false end if found then + set_click_state(widgets[i], 1) pointers[id] = { selected_widget = i, relative = relative, @@ -1131,6 +1188,57 @@ copyright-holders:m1macrophage end end + local function get_knob_dot_bounds(widget) + local dot = widget.knob_dot_cache + local value = (widget.field.port:read() - dot.value_min) / dot.value_range + local angle = dot.angle_min + value * dot.angle_range + local rx = -dot.center_y * math.sin(angle) * dot.aspect + local ry = dot.center_y * math.cos(angle) + local x = rx + dot.dx + local y = ry + dot.dy + return emu.render_bounds(x, y, x + dot.width, y + dot.height) + end + + local function configure_knob_dots() + for i = 1, #widgets do + local dot = widgets[i].knob_dot + if dot then + -- Remove bounds callback, since we need to access the + -- configured bounds. + dot:set_bounds_callback(nil) + + local field = widgets[i].field + local knob_bounds = widgets[i].clickarea.bounds + local dot_bounds = dot.bounds + local max_angle = KNOB_DOT_ANGLE_SPAN * 2.0 * math.pi / 360.0 + + -- Compute the distance of the knob dot from the knob center. + local dot_x = dot_bounds.x0 + dot_bounds.width / 2.0 + local dot_y = dot_bounds.y0 + dot_bounds.height / 2.0 + local knob_x = knob_bounds.x0 + knob_bounds.width / 2.0 + local knob_y = knob_bounds.y0 + knob_bounds.height / 2.0 + local radius = math.sqrt((dot_y - knob_y) ^ 2 + (dot_x - knob_x) ^ 2) + + widgets[i].knob_dot_cache = { + width = dot_bounds.width, + height = dot_bounds.height, + aspect = dot_bounds.aspect, + value_min = field.minvalue, + value_range = field.maxvalue - field.minvalue, + angle_min = -max_angle, + angle_range = 2.0 * max_angle, + center_y = -radius, + dx = knob_bounds.x0 + (knob_bounds.width - dot_bounds.width) / 2.0, + dy = knob_bounds.y0 + (knob_bounds.height - dot_bounds.height) / 2.0 } + + dot:set_bounds_callback( + function() + return get_knob_dot_bounds(widgets[i]) + end) + end + end + end + local function pointer_left(type, id, dev, x, y, up, cnt) release_pointer(id) end @@ -1147,6 +1255,7 @@ copyright-holders:m1macrophage end function install_slider_callbacks(view) + view:set_recomputed_callback(configure_knob_dots) view:set_pointer_updated_callback(pointer_updated) view:set_pointer_left_callback(pointer_left) view:set_pointer_aborted_callback(pointer_aborted) diff --git a/src/mame/layout/sequential_sixtrak.lay b/src/mame/layout/sequential_sixtrak.lay index b20b27dda20..db2a756bb3a 100644 --- a/src/mame/layout/sequential_sixtrak.lay +++ b/src/mame/layout/sequential_sixtrak.lay @@ -582,12 +582,12 @@ copyright-holders:m1macrophage - + - + @@ -599,10 +599,6 @@ copyright-holders:m1macrophage - - - - ]]> @@ -709,6 +705,18 @@ copyright-holders:m1macrophage + + + + + + + + + + + + @@ -717,17 +725,30 @@ copyright-holders:m1macrophage + + + + + + + - + - + + + + + + + @@ -750,7 +771,10 @@ copyright-holders:m1macrophage - + + + + @@ -1046,11 +1070,11 @@ copyright-holders:m1macrophage local view = file.views["Default Layout"] install_slider_callbacks(view) - add_knob(view, "track_volume_knob", "track_volume_knob", 1.2, HORIZONTAL) - add_knob(view, "speed_knob", "speed_knob", 1.2, HORIZONTAL) - add_knob(view, "value_knob", "value_knob", 2, HORIZONTAL) - add_knob(view, "tune_knob", "tune_knob", 2, HORIZONTAL) - add_knob(view, "master_volume_knob", "master_volume_knob", 1.2, HORIZONTAL) + add_sixtrak_knob(view, "track_volume_knob", 1.2) + add_sixtrak_knob(view, "speed_knob", 1.2) + add_sixtrak_knob(view, "value_knob", 2) + add_sixtrak_knob(view, "tune_knob", 2) + add_sixtrak_knob(view, "master_volume_knob", 1.2) add_slider(view, "pitch_wheel", "pitch_wheel_dent", "wheel_0") add_slider(view, "mod_wheel", "mod_wheel_dent", "wheel_1") @@ -1058,10 +1082,26 @@ copyright-holders:m1macrophage view.items["warning"]:set_state(0) end) + function add_sixtrak_knob(view, knob_id, scale) + add_knob(view, knob_id, knob_id, scale, HORIZONTAL, knob_id .. "_dot") + get_layout_item(view, knob_id .. "_dot"):set_state(1) + get_layout_item(view, knob_id .. "_value"):set_color_callback( + function() + return emu.render_color(0, 0, 0, 0) + end) + end + ----------------------------------------------------------------------- -- Slider and knob library starts. -- Can be copied as-is to other layouts. + -- version: 11 ----------------------------------------------------------------------- + + -- Global configuration. Can be overwritten in the resolve_tags callback. + KNOB_DOT_ANGLE_SPAN = 150 -- -/+ 150 degrees from top center. + UPDATE_CLICK_STATE = true + + -- Constants. VERTICAL = 0 HORIZONTAL = 1 @@ -1080,14 +1120,21 @@ copyright-holders:m1macrophage end -- A sweep between the attached field's min and max values requires - -- moving the pointer by `scale * clickarea.height` pixes. - function add_knob(view, clickarea_id, port_name, scale, drag_direction) + -- moving the pointer by `scale * clickarea.height` pixels, when drag + -- direction is VERTICAL. Replace `height` with `width` when HORIZONTAL. + -- + -- `dot_id` is optional. If not nil, this script will take control of the + -- element's position as the knob rotates. The distance of the dot from + -- the center of `clickarea` will be preserved during rotation. + -- It is suggested you place the dot at the top-center of the knob. + function add_knob(view, clickarea_id, port_name, scale, drag_direction, dot_id) table.insert(widgets, { clickarea = get_layout_item(view, clickarea_id), field = get_port_field(port_name), is_knob = true, scale = scale, - is_horizontal = (drag_direction == HORIZONTAL) }) + is_horizontal = (drag_direction == HORIZONTAL), + knob_dot = dot_id and get_layout_item(view, dot_id) }) end function get_layout_item(view, item_id) @@ -1121,9 +1168,21 @@ copyright-holders:m1macrophage return field end + local function set_click_state(widget, state) + if UPDATE_CLICK_STATE then + if widget.is_knob then + widget.clickarea:set_state(state) + else + widget.slider_knob:set_state(state) + end + end + end + local function release_pointer(pointer_id) if pointers[pointer_id] then - local field = widgets[pointers[pointer_id].selected_widget].field + local widget = widgets[pointers[pointer_id].selected_widget] + set_click_state(widget, 0) + local field = widget.field if field.is_analog then field:clear_value() end @@ -1150,6 +1209,7 @@ copyright-holders:m1macrophage relative = false end if found then + set_click_state(widgets[i], 1) pointers[id] = { selected_widget = i, relative = relative, @@ -1211,6 +1271,57 @@ copyright-holders:m1macrophage end end + local function get_knob_dot_bounds(widget) + local dot = widget.knob_dot_cache + local value = (widget.field.port:read() - dot.value_min) / dot.value_range + local angle = dot.angle_min + value * dot.angle_range + local rx = -dot.center_y * math.sin(angle) * dot.aspect + local ry = dot.center_y * math.cos(angle) + local x = rx + dot.dx + local y = ry + dot.dy + return emu.render_bounds(x, y, x + dot.width, y + dot.height) + end + + local function configure_knob_dots() + for i = 1, #widgets do + local dot = widgets[i].knob_dot + if dot then + -- Remove bounds callback, since we need to access the + -- configured bounds. + dot:set_bounds_callback(nil) + + local field = widgets[i].field + local knob_bounds = widgets[i].clickarea.bounds + local dot_bounds = dot.bounds + local max_angle = KNOB_DOT_ANGLE_SPAN * 2.0 * math.pi / 360.0 + + -- Compute the distance of the knob dot from the knob center. + local dot_x = dot_bounds.x0 + dot_bounds.width / 2.0 + local dot_y = dot_bounds.y0 + dot_bounds.height / 2.0 + local knob_x = knob_bounds.x0 + knob_bounds.width / 2.0 + local knob_y = knob_bounds.y0 + knob_bounds.height / 2.0 + local radius = math.sqrt((dot_y - knob_y) ^ 2 + (dot_x - knob_x) ^ 2) + + widgets[i].knob_dot_cache = { + width = dot_bounds.width, + height = dot_bounds.height, + aspect = dot_bounds.aspect, + value_min = field.minvalue, + value_range = field.maxvalue - field.minvalue, + angle_min = -max_angle, + angle_range = 2.0 * max_angle, + center_y = -radius, + dx = knob_bounds.x0 + (knob_bounds.width - dot_bounds.width) / 2.0, + dy = knob_bounds.y0 + (knob_bounds.height - dot_bounds.height) / 2.0 } + + dot:set_bounds_callback( + function() + return get_knob_dot_bounds(widgets[i]) + end) + end + end + end + local function pointer_left(type, id, dev, x, y, up, cnt) release_pointer(id) end @@ -1227,6 +1338,7 @@ copyright-holders:m1macrophage end function install_slider_callbacks(view) + view:set_recomputed_callback(configure_knob_dots) view:set_pointer_updated_callback(pointer_updated) view:set_pointer_left_callback(pointer_left) view:set_pointer_aborted_callback(pointer_aborted) From 7652ea043186d04a636ad85a518f1c5f4bc6f949 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 21 Feb 2026 17:37:43 +0100 Subject: [PATCH 012/351] bus/pci/aha2940au.cpp: fix EEPROM access --- src/devices/bus/pci/aha2940au.cpp | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/src/devices/bus/pci/aha2940au.cpp b/src/devices/bus/pci/aha2940au.cpp index 5e5ea695cb8..80360721024 100644 --- a/src/devices/bus/pci/aha2940au.cpp +++ b/src/devices/bus/pci/aha2940au.cpp @@ -12,7 +12,8 @@ References: TODO: - Stub, enough to make it surpass initial POST and nothing else; -- Lack specific documentation for AIC-7860, we base on AIC-7890 for now; +- What "SCSI Disk Utilities" does in SCSI Select, scan LUNs for HDD format? +- aha2940au: Lack specific documentation for AIC-7860, we base on AIC-7890 for now; **************************************************************************************************/ @@ -63,8 +64,7 @@ void aha2940_scsi_device::device_add_mconfig(machine_config &config) { // AIC-7870 - // C06/C46/C56/C66 compatible - // TODO: doesn't seem to work properly, wrong type? + // C06/C46/C56/C66 compatible, confirmed C46 in this case EEPROM_93C46_16BIT(config, m_eeprom); } @@ -139,9 +139,14 @@ void aha2940_scsi_device::io_map(address_map &map) }), NAME([this] (offs_t offset, u8 data) { LOG("SEECTL %02x\n", data); - m_eeprom->di_write(BIT(data, 1)); - m_eeprom->clk_write(BIT(data, 2)); - m_eeprom->cs_write(BIT(data, 3)); + // SEEMS (Serial EEPROM Mode Select) must be selected for r/w to actually work + // (at least in SCSI Select menu) + if (BIT(data, 5)) + { + m_eeprom->di_write(BIT(data, 1)); + m_eeprom->clk_write(BIT(data, 2)); + m_eeprom->cs_write(BIT(data, 3)); + } }) ); // HCNTRL From 3b7b0752d0ea0a00e5804af7c9df03a741eacde9 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sun, 22 Feb 2026 14:22:37 +0100 Subject: [PATCH 013/351] machine/it8671f.cpp: improve device selection a bit --- src/devices/machine/it8671f.cpp | 289 ++++++++++++++++++++----- src/devices/machine/it8671f.h | 26 ++- src/devices/machine/it8705f.cpp | 7 +- src/devices/machine/vt82c586b_acpi.cpp | 6 +- src/devices/machine/vt82c598mvp.cpp | 6 +- src/devices/machine/vt82c598mvp.h | 2 + 6 files changed, 271 insertions(+), 65 deletions(-) diff --git a/src/devices/machine/it8671f.cpp b/src/devices/machine/it8671f.cpp index 3a7e197fc15..c911db06bf5 100644 --- a/src/devices/machine/it8671f.cpp +++ b/src/devices/machine/it8671f.cpp @@ -8,12 +8,14 @@ ITE IT8673F Advanced I/O ITE IT8680F Super AT I/O Chipset (& IT8680RF) TODO: +- Move common parts to ISA bus, cfr. ISA PnP spec 1.0a; +- ISA PnP mode; +\- Has ACPI resource collision(s) with the AGP card(s) in win98se, related to the missing ROM + resource readback? - Emulate the other flavours here (probably more of them with some digging); - IT8687R looks to be a transceiver chip, tied with 8671 and 8680; - GPIO; -- Keyboard A20 doesn't work right (most likely needs own BIOS); -- SMI source; -- ISA PnP mode; +- ite8671: SMI source; **************************************************************************************************/ @@ -26,14 +28,19 @@ TODO: #include +#define LOG_LOCK (1U << 1) // log PnP lock/unlock phases + #define VERBOSE (LOG_GENERAL) //#define LOG_OUTPUT_FUNC osd_printf_info + #include "logmacro.h" +#define LOGLOCK(...) LOGMASKED(LOG_LOCK, __VA_ARGS__) + DEFINE_DEVICE_TYPE(IT8661F, it8661f_device, "it8661f", "ITE IT8661F PnP Super AT I/O") DEFINE_DEVICE_TYPE(IT8671F, it8671f_device, "it8671f", "ITE IT8671F Giga I/O") -it8661f_device::it8661f_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) +it8661f_device::it8661f_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock) , device_isa16_card_interface(mconfig, *this) , device_memory_interface(mconfig, *this) @@ -57,7 +64,7 @@ it8661f_device::it8661f_device(const machine_config &mconfig, device_type type, std::fill(std::begin(m_activate), std::end(m_activate), false); } -it8661f_device::it8661f_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +it8661f_device::it8661f_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : it8661f_device(mconfig, IT8661F, tag, owner, clock) { m_space_config = address_space_config("superio_config_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(it8661f_device::config_map), this)); @@ -81,6 +88,7 @@ void it8661f_device::device_start() m_isa->set_dma_channel(1, this, true); m_isa->set_dma_channel(2, this, true); m_isa->set_dma_channel(3, this, true); + save_item(NAME(m_activate)); save_item(NAME(m_port_select_index)); save_item(NAME(m_port_select_data)); @@ -88,6 +96,16 @@ void it8661f_device::device_start() save_item(NAME(m_port_config)); save_item(NAME(m_lock_port_index)); save_item(NAME(m_lock_sequence_index)); + save_item(NAME(m_mc)); + save_item(NAME(m_pnp_ldn)); + save_item(NAME(m_input_clock_select)); + + save_item(NAME(m_iorange)); + + save_item(NAME(m_fdc_address)); + save_item(NAME(m_lpt_address)); + save_item(NAME(m_com_address)); + save_item(NAME(m_gpio_address)); save_item(NAME(m_fdc_irq_line)); save_item(NAME(m_fdc_drq_line)); @@ -105,6 +123,7 @@ void it8661f_device::device_reset() m_port_select_index = 0x3f0; m_port_select_data = 0x3f1; std::fill(std::begin(m_activate), std::end(m_activate), false); + std::fill(std::begin(m_iorange), std::end(m_iorange), 0); m_fdc_irq_line = 6; m_fdc_drq_line = 2; @@ -123,7 +142,7 @@ void it8661f_device::device_reset() m_last_dma_line = -1; - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); } device_memory_interface::space_config_vector it8661f_device::memory_space_config() const @@ -179,22 +198,22 @@ void it8661f_device::remap(int space_id, offs_t start, offs_t end) if (space_id == AS_IO) { if (m_config_phase == config_phase_t::WAIT_FOR_KEY) - m_isa->install_device(0x0000, 0x03ff, *this, &it8661f_device::port_map); + m_isa->install_device(0x0000, 0x0fff, *this, &it8661f_device::port_map); else { m_isa->install_device(m_port_select_index, m_port_select_data, read8sm_delegate(*this, FUNC(it8661f_device::read)), write8sm_delegate(*this, FUNC(it8661f_device::write))); } - if (m_activate[0]) + if (m_activate[0] && m_fdc_address & 0xf00) { m_isa->install_device(m_fdc_address, m_fdc_address + 7, *m_fdc, &n82077aa_device::map); } for (int i = 0; i < 2; i++) { - if (m_activate[i + 1]) + const u16 uart_addr = m_com_address[i]; + if (m_activate[i + 1] && uart_addr & 0xf00) { - const u16 uart_addr = m_com_address[i]; m_isa->install_device(uart_addr, uart_addr + 7, read8sm_delegate(*m_com[i], FUNC(ns16450_device::ins8250_r)), write8sm_delegate(*m_com[i], FUNC(ns16450_device::ins8250_w))); } } @@ -204,21 +223,33 @@ void it8661f_device::remap(int space_id, offs_t start, offs_t end) { m_isa->install_device(m_lpt_address, m_lpt_address + 3, read8sm_delegate(*m_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_lpt, FUNC(pc_lpt_device::write))); } + + // TODO: GPIO (with a variable configuration ID because IT8671F moves around) } } // Goofy, but it's the only way that we can install a byte-wide write only I/O handler in ISA bus +// TODO: this really needs to be moved as ISA PnP void it8661f_device::port_map(address_map &map) { - map(0x0279, 0x0279).w(FUNC(it8661f_device::port_select_w)); + map(0x0279, 0x0279).w(FUNC(it8661f_device::pnp_address_w)); + map(0x0a79, 0x0a79).w(FUNC(it8661f_device::pnp_write_data_w)); } -void it8661f_device::port_select_w(offs_t offset, uint8_t data) +void it8661f_device::pnp_address_w(offs_t offset, u8 data) { if (m_config_phase == config_phase_t::WAIT_FOR_KEY) { m_port_config[m_lock_port_index++] = data; - // TODO: simplified, may really discard oldest result + + if (m_lock_port_index == 1 && m_port_config[0] != m_unlock_byte_seq[0]) + { + // avoid a drift when selecting + LOGLOCK("Invalid first lock sequence %02x\n", data); + m_lock_port_index = 0; + return; + } + if (m_lock_port_index == 4) { bool valid = false; @@ -243,27 +274,32 @@ void it8661f_device::port_select_w(offs_t offset, uint8_t data) default: // invalid, reset lock sequence valid = false; - LOG("Invalid lock port sequence 2-3 %02x %02x\n", m_port_config[2], m_port_config[3]); + LOGLOCK("Invalid lock port sequence 2-3 %02x %02x\n", m_port_config[2], m_port_config[3]); break; } if (m_port_config[0] != m_unlock_byte_seq[0] || m_port_config[1] != m_unlock_byte_seq[1]) { - LOG("Invalid lock port sequence 0-1 %02x %02x\n", m_port_config[0], m_port_config[1]); + LOGLOCK("Invalid lock port sequence 0-1 %02x %02x\n", m_port_config[0], m_port_config[1]); valid = false; } m_lock_port_index = 0; if (valid) { - LOG("Unlock PnP phase at %04x %04x\n", m_port_select_index, m_port_select_data); + LOGLOCK("Unlock PnP phase at %04x %04x\n", m_port_select_index, m_port_select_data); m_config_phase = config_phase_t::UNLOCK_PNP; - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); m_lock_sequence_index = 0; } } } } -uint8_t it8661f_device::read(offs_t offset) +void it8661f_device::pnp_write_data_w(offs_t offset, u8 data) +{ + LOG("$a79 PnP WRITE_DATA: %02x\n", data); +} + +u8 it8661f_device::read(offs_t offset) { if (!machine().side_effects_disabled() && m_config_phase != config_phase_t::MB_PNP_MODE) { @@ -287,6 +323,7 @@ void it8661f_device::write(offs_t offset, u8 data) m_unlock_sequence[m_lock_sequence_index] = data; m_lock_sequence_index++; + // TODO: convert to LFSR, resets with Wake[CSN] if (m_lock_sequence_index == 32) { m_lock_sequence_index = 0; @@ -305,9 +342,9 @@ void it8661f_device::write(offs_t offset, u8 data) } if (valid) { - LOG("Unlock MB PnP phase\n"); + LOGLOCK("Unlock MB PnP phase\n"); m_config_phase = config_phase_t::MB_PNP_MODE; - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); } } } @@ -328,31 +365,103 @@ void it8661f_device::write(offs_t offset, u8 data) void it8661f_device::config_map(address_map &map) { -// map(0x00, 0x00) (ISA PnP) set RD_DATA Port -// map(0x01, 0x01) (ISA PnP) Serial isolation + // (ISA PnP) set RD_DATA Port + map(0x00, 0x00).lw8( + NAME([this] (offs_t offset, u8 data) { + LOG("ISA PnP: set RD_DATA Port %02x (%04x)\n", data, (data << 2) | 3); + }) + ); + // (ISA PnP) Serial isolation + map(0x01, 0x01).lr8( + NAME([this] (offs_t offset) { + if (!machine().side_effects_disabled()) + LOG("ISA PnP: Serial Isolation read"); + return 0; + }) + ); + // Configure Control map(0x02, 0x02).lw8( NAME([this] (offs_t offset, u8 data) { + if (BIT(data, 2)) + LOG("Configure Control: Reset CSN to 0\n"); + if (BIT(data, 1)) { // TODO: throws several phase drifts with the theoretically more correct WAIT_FOR_KEY // Notice however that doing so it will BSoD in comebaby, missing setting? - m_config_phase = config_phase_t::UNLOCK_PNP; - remap(AS_IO, 0, 0x400); - LOG("Exit setup mode\n"); + m_config_phase = config_phase_t::WAIT_FOR_KEY; + remap(AS_IO, 0, 0xfff); + LOGLOCK("Exit setup mode\n"); } - // TODO: bit 0 for global reset + if (BIT(data, 0)) + LOG("Configure Control: Reset logical devices issued\n"); + }) + ); + // (ISA PnP) Wake[CSN] + map(0x03, 0x03).lw8(NAME([this] (offs_t offset, u8 data){ + LOG("ISA PnP: Wake[CSN] %02x\n", data); + })); + // (ISA PnP) Resource Data + map(0x04, 0x04).lr8(NAME([this] () { + if (!machine().side_effects_disabled()) + LOG("ISA PnP: Resource Data read\n"); + return 0; + })); + // (ISA PnP) Status + map(0x05, 0x05).lr8(NAME([this] (offs_t offset) { + if (!machine().side_effects_disabled()) + LOG("ISA PnP: Status read\n"); + return 0; + })); + // (ISA PnP) Card Select Number + map(0x06, 0x06).lrw8( + NAME([this] () { + if (!machine().side_effects_disabled()) + LOG("ISA PnP: Card Select number read\n"); + return 2; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("(ISA PnP) Card Select Number %02x\n", data); }) ); -// map(0x03, 0x03) (ISA PnP) Wake[CSN] -// map(0x04, 0x04) (ISA PnP) Resource Data -// map(0x05, 0x05) (ISA PnP) Status -// map(0x06, 0x06) (ISA PnP) Card Select Number map(0x07, 0x07).lr8(NAME([this] () { return m_logical_index; })).w(FUNC(it8661f_device::logical_device_select_w)); map(0x20, 0x20).lr8(NAME([] () { return 0x86; })); // chip ID byte 1 map(0x21, 0x21).lr8(NAME([this] () { return m_chip_id_2; })); // chip ID byte 2 - map(0x22, 0x22).lr8(NAME([] () { return 0x00; })); // version -// map(0x23, 0x23) (MB PnP) Logical Device Enable -// map(0x24, 0x24) (MB PnP) Software Suspend + // version + multichip identification + map(0x22, 0x22).lrw8( + NAME([this] () { + // TODO: bit 0 reads 1 in RF variant(s) + return 0x00 | m_mc; + }), + NAME([this] (offs_t offset, u8 data) { + m_mc = data & 0x30; + LOG("Multichip identification %02x\n", data); + }) + ); + // (MB PnP) Logical Device Enable + map(0x23, 0x23).lrw8( + NAME([this] () { + return m_pnp_ldn; + }), + NAME([this] (offs_t offset, u8 data) { + m_pnp_ldn = data; + LOG("(MB PnP) Logical Device Enable %02x\n", data); + }) + ); + // (MB PnP) Software Suspend + map(0x24, 0x24).lrw8( + NAME([this] () { + return m_input_clock_select << 1; + }), + NAME([this] (offs_t offset, u8 data) { + m_input_clock_select = !!BIT(data, 1); + LOG("(MB PnP) Software Suspend %02x -> Input Clock Select %s Suspend %d\n" + , data + , BIT(data, 1) ? "48 MHz" : "24 MHz" + , BIT(data, 0) + ); + }) + ); // map(0x25, 0x26) (MB PnP) GPIO Function Enable // map(0x2e, 0x2e) (MB PnP) // map(0x2f, 0x2f) (MB PnP) LDN=F4 Test Enable @@ -360,6 +469,7 @@ void it8661f_device::config_map(address_map &map) map(0x30, 0xff).view(m_logical_view); // FDC m_logical_view[0](0x30, 0x30).rw(FUNC(it8661f_device::activate_r<0>), FUNC(it8661f_device::activate_w<0>)); + m_logical_view[0](0x31, 0x31).rw(FUNC(it8661f_device::iorange_check_r<0>), FUNC(it8661f_device::iorange_check_w<0>)); m_logical_view[0](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { return (m_fdc_address >> (offset * 8)) & 0xff; @@ -371,7 +481,7 @@ void it8661f_device::config_map(address_map &map) m_fdc_address &= ~0xf007; LOG("LDN0 (FDC): remap %04x ([%d] %02x)\n", m_fdc_address, offset, data); - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); }) ); m_logical_view[0](0x70, 0x70).lrw8( @@ -383,6 +493,7 @@ void it8661f_device::config_map(address_map &map) LOG("LDN0 (FDC): irq routed to %02x\n", m_fdc_irq_line); }) ); + m_logical_view[0](0x71, 0x71).lr8(NAME([] () { return 2; })); m_logical_view[0](0x74, 0x74).lrw8( NAME([this] () { return m_fdc_drq_line; @@ -417,34 +528,41 @@ void it8661f_device::config_map(address_map &map) // UART1 m_logical_view[1](0x30, 0x30).rw(FUNC(it8661f_device::activate_r<1>), FUNC(it8661f_device::activate_w<1>)); + m_logical_view[1](0x31, 0x31).rw(FUNC(it8661f_device::iorange_check_r<1>), FUNC(it8661f_device::iorange_check_w<1>)); m_logical_view[1](0x60, 0x61).rw(FUNC(it8661f_device::uart_address_r<0>), FUNC(it8661f_device::uart_address_w<0>)); m_logical_view[1](0x70, 0x70).rw(FUNC(it8661f_device::uart_irq_r<0>), FUNC(it8661f_device::uart_irq_w<0>)); + m_logical_view[1](0x71, 0x71).lr8(NAME([] () { return 2; })); m_logical_view[1](0xf0, 0xf0).rw(FUNC(it8661f_device::uart_config_r<0>), FUNC(it8661f_device::uart_config_w<0>)); // UART2 m_logical_view[2](0x30, 0x30).rw(FUNC(it8661f_device::activate_r<2>), FUNC(it8661f_device::activate_w<2>)); + m_logical_view[2](0x31, 0x31).rw(FUNC(it8661f_device::iorange_check_r<2>), FUNC(it8661f_device::iorange_check_w<2>)); m_logical_view[2](0x60, 0x61).rw(FUNC(it8661f_device::uart_address_r<1>), FUNC(it8661f_device::uart_address_w<1>)); m_logical_view[2](0x70, 0x70).rw(FUNC(it8661f_device::uart_irq_r<1>), FUNC(it8661f_device::uart_irq_w<1>)); + m_logical_view[2](0x71, 0x71).lr8(NAME([] () { return 2; })); m_logical_view[2](0xf0, 0xf0).rw(FUNC(it8661f_device::uart_config_r<1>), FUNC(it8661f_device::uart_config_w<1>)); // LPT m_logical_view[3](0x30, 0x30).rw(FUNC(it8661f_device::activate_r<3>), FUNC(it8661f_device::activate_w<3>)); + m_logical_view[3](0x31, 0x31).rw(FUNC(it8661f_device::iorange_check_r<3>), FUNC(it8661f_device::iorange_check_w<3>)); m_logical_view[3](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { - return (m_lpt_address >> (offset * 8)) & 0xff; + if (offset) + return m_lpt_address & 0xfc; + + return (m_lpt_address >> 8) & 0xf; }), NAME([this] (offs_t offset, u8 data) { const u8 shift = offset * 8; m_lpt_address &= 0xff << shift; m_lpt_address |= data << (shift ^ 8); - m_lpt_address &= ~0xf003; + m_lpt_address &= 0x0ffc; LOG("LDN3 (LPT): remap %04x ([%d] %02x)\n", m_lpt_address, offset, data); - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); }) ); //m_logical_view[3](0x62, 0x63) secondary base address - //m_logical_view[3](0x64, 0x65) POST data port base address m_logical_view[3](0x70, 0x70).lrw8( NAME([this] () { return m_lpt_irq_line; @@ -454,6 +572,7 @@ void it8661f_device::config_map(address_map &map) LOG("LDN3 (LPT): irq routed to %02x\n", m_lpt_irq_line); }) ); + m_logical_view[3](0x71, 0x71).lr8(NAME([] () { return 2; })); m_logical_view[3](0x74, 0x74).lrw8( NAME([this] () { return m_lpt_drq_line; @@ -467,11 +586,15 @@ void it8661f_device::config_map(address_map &map) // IR Configuration m_logical_view[4](0x30, 0x30).rw(FUNC(it8661f_device::activate_r<4>), FUNC(it8661f_device::activate_w<4>)); - m_logical_view[4](0x31, 0xff).unmaprw(); + m_logical_view[4](0x31, 0x31).rw(FUNC(it8661f_device::iorange_check_r<4>), FUNC(it8661f_device::iorange_check_w<4>)); + m_logical_view[4](0x32, 0xff).unmaprw(); // GPIO & Alternate Function m_logical_view[5](0x30, 0x30).rw(FUNC(it8661f_device::activate_r<5>), FUNC(it8661f_device::activate_w<5>)); - m_logical_view[5](0x31, 0xff).unmaprw(); + // No I/O Range check + m_logical_view[5](0x31, 0x5f).unmaprw(); + m_logical_view[5](0x60, 0x67).rw(FUNC(it8661f_device::gpio_address_r), FUNC(it8661f_device::gpio_address_w<5>)); + m_logical_view[5](0x68, 0xff).unmaprw(); } /* @@ -496,7 +619,28 @@ template void it8661f_device::activate_w(offs_t offset, u8 data) { m_activate[N] = data & 1; LOG("LDN%d Device %s\n", N, data & 1 ? "enabled" : "disabled"); - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); +} + +template u8 it8661f_device::iorange_check_r(offs_t offset) +{ + return m_iorange[N]; +} + +template void it8661f_device::iorange_check_w(offs_t offset, u8 data) +{ + m_iorange[N] = data & 3; + if (m_activate[N]) + LOG("LDN%d I/O Range check %02x while enabled!\n", N, data); + else + { + LOG("LDN%d I/O Range check %02x -> %s seq %02x\n" + , N + , BIT(data, 1) + , BIT(data, 0) ? 0x55 : 0xaa + ); + // remap(AS_IO, 0, 0xfff); + } } void it8661f_device::request_irq(int irq, int state) @@ -565,7 +709,7 @@ void it8661f_device::request_dma(int dreq, int state) } /* - * Device #0 (FDC) + * LDN0 (FDC) */ void it8661f_device::irq_floppy_w(int state) @@ -583,12 +727,15 @@ void it8661f_device::drq_floppy_w(int state) } /* - * Device #1/#2 (UART) + * LDN1/LDN2 (UART) */ template u8 it8661f_device::uart_address_r(offs_t offset) { - return (m_com_address[N] >> (offset * 8)) & 0xff; + if (offset) + return m_com_address[N] & 0xf8; + + return (m_com_address[N] >> 8) & 0xf; } template void it8661f_device::uart_address_w(offs_t offset, u8 data) @@ -596,10 +743,10 @@ template void it8661f_device::uart_address_w(offs_t offset, u8 data const u8 shift = offset * 8; m_com_address[N] &= 0xff << shift; m_com_address[N] |= data << (shift ^ 8); - m_com_address[N] &= ~0xf007; - LOG("LDN%d (COM%d): remap %04x ([%d] %02x)\n", N + 1, N + 1, m_com_address[N], offset, data); + m_com_address[N] &= 0xff8; + LOG("LDN%d (COM%d): remap at %04x ([%d] %02x)\n", N + 1, N + 1, m_com_address[N], offset, data); - remap(AS_IO, 0, 0x400); + remap(AS_IO, 0, 0xfff); } template u8 it8661f_device::uart_irq_r(offs_t offset) @@ -737,7 +884,7 @@ void it8661f_device::ncts2_w(int state) } /* - * Device #3 (Parallel) + * LDN3 (Parallel) */ void it8661f_device::irq_parallel_w(int state) @@ -747,6 +894,34 @@ void it8661f_device::irq_parallel_w(int state) request_irq(m_lpt_irq_line, state ? ASSERT_LINE : CLEAR_LINE); } +/* + * LDN5 (GPIO) + * LDN7 on IT8671F + */ + +u8 it8661f_device::gpio_address_r(offs_t offset) +{ + const u8 which = offset >> 1; + if (offset & 1) + return m_gpio_address[which] & 0xf8; + + return (m_gpio_address[which] >> 8) & 0xf; +} + +template void it8661f_device::gpio_address_w(offs_t offset, u8 data) +{ + const u8 which = offset >> 1; + const u8 shift = (offset & 1) * 8; + m_gpio_address[which] &= 0xff << shift; + m_gpio_address[which] |= data << (shift ^ 8); + m_gpio_address[which] &= 0xff8; + // for simplicity we map this as CS0 ~ CS3, but CS3 itself is really "Simple I/O" + LOG("LDN%d (GPIO): CS%d remap at %04x ([%d] %02x)\n", N, m_gpio_address[which], which, offset & 1, data); + + remap(AS_IO, 0, 0xfff); +} + + /* * DMA */ @@ -778,7 +953,7 @@ void it8661f_device::eop_w(int state) } // TODO: LPT bindings -uint8_t it8661f_device::dack_r(int line) +u8 it8661f_device::dack_r(int line) { // transferring data from device to memory using dma // read one byte from device @@ -793,7 +968,7 @@ uint8_t it8661f_device::dack_r(int line) return 0; } -void it8661f_device::dack_w(int line, uint8_t data) +void it8661f_device::dack_w(int line, u8 data) { // transferring data from memory to device using dma // write one byte to device @@ -814,7 +989,7 @@ void it8661f_device::dack_w(int line, uint8_t data) * */ -it8671f_device::it8671f_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +it8671f_device::it8671f_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : it8661f_device(mconfig, IT8671F, tag, owner, clock) , m_keybc(*this, "keybc") , m_ps2_con(*this, "ps2_con") @@ -879,13 +1054,17 @@ void it8671f_device::device_add_mconfig(machine_config &config) void it8671f_device::config_map(address_map &map) { it8661f_device::config_map(map); + //m_logical_view[3](0x64, 0x65) POST data port base address + // APC Configuration m_logical_view[4](0x30, 0x30).rw(FUNC(it8671f_device::activate_r<4>), FUNC(it8671f_device::activate_w<4>)); + // APC has no I/O Range check support m_logical_view[4](0x31, 0xff).unmaprw(); // Keyboard m_logical_view[5](0x30, 0x30).rw(FUNC(it8671f_device::activate_r<5>), FUNC(it8671f_device::activate_w<5>)); - m_logical_view[5](0x31, 0x6f).unmaprw(); + m_logical_view[5](0x31, 0x31).rw(FUNC(it8671f_device::iorange_check_r<5>), FUNC(it8671f_device::iorange_check_w<5>)); + m_logical_view[5](0x32, 0x6f).unmaprw(); m_logical_view[5](0x70, 0x70).lrw8( NAME([this] () { return m_key_irq_line; @@ -899,6 +1078,7 @@ void it8671f_device::config_map(address_map &map) // Mouse m_logical_view[6](0x30, 0x30).rw(FUNC(it8671f_device::activate_r<6>), FUNC(it8671f_device::activate_w<6>)); + // no I/O Range check support m_logical_view[6](0x31, 0x6f).unmaprw(); m_logical_view[6](0x70, 0x70).lrw8( NAME([this] () { @@ -914,7 +1094,10 @@ void it8671f_device::config_map(address_map &map) // GPIO & Alternate Function // TODO: check if just moved around vs. '8661 m_logical_view[7](0x30, 0x30).rw(FUNC(it8671f_device::activate_r<7>), FUNC(it8671f_device::activate_w<7>)); - m_logical_view[7](0x31, 0xff).unmaprw(); + // No I/O Range check + m_logical_view[7](0x31, 0x5f).unmaprw(); + m_logical_view[7](0x60, 0x67).rw(FUNC(it8671f_device::gpio_address_r), FUNC(it8671f_device::gpio_address_w<7>)); + m_logical_view[5](0x68, 0xff).unmaprw(); } void it8671f_device::remap(int space_id, offs_t start, offs_t end) diff --git a/src/devices/machine/it8671f.h b/src/devices/machine/it8671f.h index 06cd4f498ae..934fb30d9ec 100644 --- a/src/devices/machine/it8671f.h +++ b/src/devices/machine/it8671f.h @@ -20,7 +20,7 @@ class it8661f_device : public device_t, public device_memory_interface { public: - it8661f_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + it8661f_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); virtual ~it8661f_device(); void remap(int space_id, offs_t start, offs_t end) override; @@ -57,12 +57,13 @@ protected: virtual space_config_vector memory_space_config() const override; virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; - virtual uint8_t dack_r(int line) override; - virtual void dack_w(int line, uint8_t data) override; + virtual u8 dack_r(int line) override; + virtual void dack_w(int line, u8 data) override; virtual void eop_w(int state) override; void update_dreq_mapping(int dreq, int logical); bool m_activate[8]{}; + u8 m_iorange[8]{}; memory_view m_logical_view; // configuration options @@ -74,6 +75,8 @@ protected: template u8 activate_r(offs_t offset); template void activate_w(offs_t offset, u8 data); + template u8 iorange_check_r(offs_t offset); + template void iorange_check_w(offs_t offset, u8 data); void request_irq(int irq, int state); void request_dma(int dreq, int state); @@ -113,9 +116,14 @@ private: u8 m_port_config[4]; u8 m_unlock_sequence[32]; - uint8_t read(offs_t offset); + u8 m_mc; + u8 m_pnp_ldn; + bool m_input_clock_select; + + u8 read(offs_t offset); void write(offs_t offset, u8 data); - void port_select_w(offs_t offset, u8 data); + void pnp_address_w(offs_t offset, u8 data); + void pnp_write_data_w(offs_t offset, u8 data); void port_map(address_map &map); void logical_device_select_w(offs_t offset, u8 data); @@ -155,12 +163,18 @@ private: template void uart_irq_w(offs_t offset, u8 data); template u8 uart_config_r(offs_t offset); template void uart_config_w(offs_t offset, u8 data); + +protected: + u8 gpio_address_r(offs_t offset); + template void gpio_address_w(offs_t offset, u8 data); +private: + u16 m_gpio_address[4]; }; class it8671f_device : public it8661f_device { public: - it8671f_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + it8671f_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); void remap(int space_id, offs_t start, offs_t end) override; diff --git a/src/devices/machine/it8705f.cpp b/src/devices/machine/it8705f.cpp index 2c837669c7c..2d49dafc665 100644 --- a/src/devices/machine/it8705f.cpp +++ b/src/devices/machine/it8705f.cpp @@ -463,7 +463,10 @@ void it8705f_device::drq_floppy_w(int state) template u8 it8705f_device::uart_address_r(offs_t offset) { - return (m_com_address[N] >> (offset * 8)) & 0xff; + if (offset) + return m_com_address[N] & 0xf8; + + return (m_com_address[N] >> 8) & 0xf; } template void it8705f_device::uart_address_w(offs_t offset, u8 data) @@ -471,7 +474,7 @@ template void it8705f_device::uart_address_w(offs_t offset, u8 data const u8 shift = offset * 8; m_com_address[N] &= 0xff << shift; m_com_address[N] |= data << (shift ^ 8); - m_com_address[N] &= ~0xf007; + m_com_address[N] &= 0xff8; LOG("LDN%d (COM%d): remap %04x ([%d] %02x)\n", N + 1, N + 1, m_com_address[N], offset, data); remap(AS_IO, 0, 0x400); diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index 3d97949c3c4..bb2366c729c 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -26,7 +26,7 @@ TODO: #define LOG_ACPI (1U << 1) // log ACPI internals #define LOG_ACPIEX (1U << 2) // verbose ACPI internals #define LOG_GPIO (1U << 3) -#define LOG_PMTMR (1U << 4) // verbose timer reads +#define LOG_PMTMR (1U << 4) // verbose timer reads and processor levels #define VERBOSE (LOG_GENERAL | LOG_ACPI | LOG_ACPIEX | LOG_GPIO) //#define LOG_OUTPUT_FUNC osd_printf_warning @@ -369,10 +369,10 @@ void acpi_pipc_device::map(address_map &map) NAME([this] (offs_t offset, u16 mem_mask) { if (!machine().side_effects_disabled()) { - LOGACPI("PLVL%d read\n", offset + 2); + LOGPMTR("PLVL%d read\n", offset + 2); // Must be byte access if (mem_mask == 0xffff) - LOG("\tInvalid word access!\n"); + LOG("\tPLVL%d Invalid word access!\n", offset + 2); } return 0; }) diff --git a/src/devices/machine/vt82c598mvp.cpp b/src/devices/machine/vt82c598mvp.cpp index 4c5f49b98e7..acfe539f3ff 100644 --- a/src/devices/machine/vt82c598mvp.cpp +++ b/src/devices/machine/vt82c598mvp.cpp @@ -36,7 +36,7 @@ void vt82c598mvp_host_device::device_start() m_ram.resize(m_ram_size/4); // TODO: special, uses register 84h to define the size -// add_map(256 * 1024 * 1024, M_MEM | M_PREF, FUNC(vt82c598mvp_host_device::aperture_map)); + add_map(64 * 1024 * 1024, M_MEM | M_PREF, FUNC(vt82c598mvp_host_device::aperture_map)); save_item(NAME(m_cache_control_1)); save_item(NAME(m_cache_control_2)); @@ -380,6 +380,10 @@ void vt82c598mvp_host_device::config_map(address_map &map) // 0xfc ~ 0xff } +void vt82c598mvp_host_device::aperture_map(address_map &map) +{ +} + void vt82c598mvp_host_device::map_shadowram(address_space *memory_space, offs_t start_offs, offs_t end_offs, u8 setting) { LOGMAP("- 0x%08x-0x%08x ", start_offs, end_offs); diff --git a/src/devices/machine/vt82c598mvp.h b/src/devices/machine/vt82c598mvp.h index 1fc3d375a59..9f266c997d0 100644 --- a/src/devices/machine/vt82c598mvp.h +++ b/src/devices/machine/vt82c598mvp.h @@ -48,6 +48,8 @@ private: void map_shadowram(address_space *memory_space, offs_t start_offs, offs_t end_offs, u8 setting); + void aperture_map(address_map &map); + u8 m_cache_control_1; u8 m_cache_control_2; u8 m_noncache_control; From 032c17ed6723252df7e591afa8e63769736ae496 Mon Sep 17 00:00:00 2001 From: cam900 Date: Sun, 22 Feb 2026 22:36:51 +0900 Subject: [PATCH 014/351] kaneko/kaneko16.cpp: Added licensees to metadata, tidied code. (#14994) --- src/mame/kaneko/kaneko16.cpp | 26 +++++++++++++++++--------- src/mame/kaneko/kaneko16.h | 2 +- src/mame/kaneko/kaneko16_v.cpp | 4 ++-- 3 files changed, 20 insertions(+), 12 deletions(-) diff --git a/src/mame/kaneko/kaneko16.cpp b/src/mame/kaneko/kaneko16.cpp index 99cf7e47519..8f0c1783341 100644 --- a/src/mame/kaneko/kaneko16.cpp +++ b/src/mame/kaneko/kaneko16.cpp @@ -49,6 +49,12 @@ Note: Decapping shows the CALC3 MCU to be a NEC uPD78322 series MCU with 16K int To Do: +[blazeon, wingforc] +- Hardware has 2 sprite hardware for swapping sprite otuput buffer? + +[bonkadv] +- Needs to verify sprite/background offset and/or screen resolution? + [gtmr] - Stage 4: The layers' scrolling is very jerky for a couple of seconds in the middle of this level (probably interrupt related) @@ -115,12 +121,12 @@ Non-Bugs (happen on real PCB) MACHINE_RESET_MEMBER(kaneko16_state,gtmr) { - m_VIEW2_2_pri = 1; + m_view2_2_pri = 1; } MACHINE_RESET_MEMBER(kaneko16_state,mgcrystl) { - m_VIEW2_2_pri = 0; + m_view2_2_pri = 0; } @@ -176,8 +182,10 @@ void kaneko16_state::ym2149_w(offs_t offset, u16 data, u16 mem_mask) /* Each 2149 register is mapped to a different address */ m_ym2149[Chip]->address_w(offset); /* The registers are mapped to odd addresses, except one! */ - if (ACCESSING_BITS_0_7) m_ym2149[Chip]->data_w( data & 0xff); - else m_ym2149[Chip]->data_w((data >> 8) & 0xff); + if (ACCESSING_BITS_0_7) + m_ym2149[Chip]->data_w( data & 0xff); + else + m_ym2149[Chip]->data_w((data >> 8) & 0xff); } template @@ -505,7 +513,8 @@ u16 kaneko16_gtmr_state::gtmr2_wheel_r() case 0x0800: // 360' Wheel return (m_wheel_port[2]->read() << 8); default: - logerror("gtmr2_wheel_r : read at %06x with joystick\n", m_maincpu->pc()); + if (!machine().side_effects_disabled()) + logerror("%s: gtmr2_wheel_r : read at %06x with joystick\n", machine().describe_context(), m_maincpu->pc()); return (~0); } } @@ -657,9 +666,8 @@ void kaneko16_blazeon_state::blazeon_soundport(address_map &map) void kaneko16_blazeon_state::wingforc_soundport(address_map &map) { map.global_mask(0xff); + blazeon_soundport(map); // map(0x00, 0x00) // 02 written at boot - map(0x02, 0x03).rw(m_ymsnd, FUNC(ym2151_device::read), FUNC(ym2151_device::write)); - map(0x06, 0x06).r(m_soundlatch, FUNC(generic_latch_8_device::read)); map(0x0a, 0x0a).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write)); map(0x0c, 0x0c).w(FUNC(kaneko16_blazeon_state::oki_bank0_w<0x3>)); } @@ -4518,8 +4526,8 @@ GAME( 1992, explbrkrk, explbrkr, bakubrkr, bakubrkr, kaneko16_state, GAME( 1992, bakubrkr, explbrkr, bakubrkr, bakubrkr, kaneko16_state, init_bakubrkr, ROT90, "Kaneko", "Bakuretsu Breaker (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, wingforc, 0, wingforc, wingforc, kaneko16_blazeon_state, init_bakubrkr, ROT270,"A.I (Atlus license)", "Wing Force (Japan, prototype)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, bonkadv, 0, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "B.C. Kid / Bonk's Adventure / Kyukyoku!! PC Genjin", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, bonkadva, bonkadv, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Bonk's Adventure (prototype)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // shows an upside down KO! sprite, probably cause of check failing. Playable apart from that +GAME( 1994, bonkadv, 0, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko (Hudson soft / Red license)", "B.C. Kid (World) / Bonk's Adventure - Arcade Version (US, China, Korea) / Kyukyoku!! PC Genjin - Special Arcade Version (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, bonkadva, bonkadv, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko (Hudson soft / Red license)", "Bonk's Adventure - Arcade version (prototype)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // shows an upside down KO! sprite, probably cause of check failing. Playable apart from that GAME( 1994, bloodwar, 0, bloodwar, bloodwar, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Blood Warrior", MACHINE_SUPPORTS_SAVE ) GAME( 1994, oedfight, bloodwar, bloodwar, bloodwar, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Oedo Fight (Japan, Bloodshed version)", MACHINE_SUPPORTS_SAVE ) // shows blood effects like Blood Warrior version GAME( 1994, oedfighta, bloodwar, bloodwar, bloodwar, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Oedo Fight (Japan, Bloodless version)", MACHINE_SUPPORTS_SAVE ) // shows no blood effects diff --git a/src/mame/kaneko/kaneko16.h b/src/mame/kaneko/kaneko16.h index 40ca5e46818..e923ec59dd7 100644 --- a/src/mame/kaneko/kaneko16.h +++ b/src/mame/kaneko/kaneko16.h @@ -90,7 +90,7 @@ protected: u16 m_disp_enable = 0U; - int m_VIEW2_2_pri = 0; + int m_view2_2_pri = 0; virtual void common_oki_bank_install(int bankno, size_t fixedsize, size_t bankedsize) ATTR_COLD; void coin_lockout_w(u8 data); diff --git a/src/mame/kaneko/kaneko16_v.cpp b/src/mame/kaneko/kaneko16_v.cpp index a87090bb783..3e34aa0df7a 100644 --- a/src/mame/kaneko/kaneko16_v.cpp +++ b/src/mame/kaneko/kaneko16_v.cpp @@ -51,9 +51,9 @@ u32 kaneko16_state::screen_update_common(screen_device &screen, BitmapClass &bit for (int i = 0; i < 8; i++) { if (m_view2[0].found()) - m_view2[0]->render_tilemap(screen,bitmap,cliprect,i); + m_view2[0]->render_tilemap(screen, bitmap, cliprect, i); if (m_view2[1].found()) - m_view2[1]->render_tilemap_alt(screen,bitmap,cliprect,i, m_VIEW2_2_pri); + m_view2[1]->render_tilemap_alt(screen, bitmap, cliprect, i, m_view2_2_pri); } return 0; From 562c543ac6ccffa73370454cc0592219d241e7b4 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 23 Feb 2026 01:40:03 +1100 Subject: [PATCH 015/351] scripts/src/3rdparty.lua: Allow USE_SYSTEM_whatever=0 to use local copies of third party libraries. --- scripts/src/3rdparty.lua | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/scripts/src/3rdparty.lua b/scripts/src/3rdparty.lua index 1482c3d71a4..a62513b5639 100755 --- a/scripts/src/3rdparty.lua +++ b/scripts/src/3rdparty.lua @@ -14,7 +14,7 @@ -- expat library objects -------------------------------------------------- -if not _OPTIONS["with-system-expat"] then +if _OPTIONS["with-system-expat"] ~= "0" then project "expat" uuid "f4cd40b1-c37c-452d-9785-640f26f0bf54" kind "StaticLib" @@ -120,7 +120,7 @@ end -- zlib library objects -------------------------------------------------- -if not _OPTIONS["with-system-zlib"] then +if _OPTIONS["with-system-zlib"] ~= "0" then project "zlib" uuid "3d78bd2a-2bd0-4449-8087-42ddfaef7ec9" kind "StaticLib" @@ -181,7 +181,7 @@ end -- zstd library objects -------------------------------------------------- -if not _OPTIONS["with-system-zstd"] then +if _OPTIONS["with-system-zstd"] ~= "0" then project "zstd" uuid "5edd8713-bc60-456d-9c95-b928a913c84b" kind "StaticLib" @@ -655,7 +655,7 @@ end -- libJPEG library objects -------------------------------------------------- -if not _OPTIONS["with-system-jpeg"] then +if _OPTIONS["with-system-jpeg"] ~= "0" then project "jpeg" uuid "447c6800-dcfd-4c48-b72a-a8223bb409ca" kind "StaticLib" @@ -734,7 +734,7 @@ end -- libflac library objects -------------------------------------------------- -if not _OPTIONS["with-system-flac"] then +if _OPTIONS["with-system-flac"] ~= "0" then project "flac" uuid "b6fc19e8-073a-4541-bb7b-d24b548d424a" kind "StaticLib" @@ -977,7 +977,7 @@ end -------------------------------------------------- if (STANDALONE~=true) then -if not _OPTIONS["with-system-lua"] then +if _OPTIONS["with-system-lua"] ~= "0" then project "lua" uuid "d9e2eed1-f1ab-4737-a6ac-863700b1a5a9" kind "StaticLib" @@ -1011,7 +1011,7 @@ end "LUA_COMPAT_5_1", "LUA_COMPAT_5_2", } - if not (_OPTIONS["targetos"]=="windows") and not (_OPTIONS["targetos"]=="asmjs") then + if (_OPTIONS["targetos"] ~= "windows") and (_OPTIONS["targetos"] ~= "asmjs") then defines { "LUA_USE_POSIX", } @@ -1128,7 +1128,7 @@ end -- SQLite3 library objects -------------------------------------------------- -if not _OPTIONS["with-system-sqlite3"] then +if _OPTIONS["with-system-sqlite3"] ~= "0" then project "sqlite3" uuid "5cb3d495-57ed-461c-81e5-80dc0857517d" kind "StaticLib" @@ -1179,8 +1179,8 @@ end -- portmidi library objects -------------------------------------------------- -if _OPTIONS["NO_USE_MIDI"]~="1" then -if not _OPTIONS["with-system-portmidi"] then +if _OPTIONS["NO_USE_MIDI"] ~= "1" then +if _OPTIONS["with-system-portmidi"] ~= "0" then project "portmidi" uuid "587f2da6-3274-4a65-86a2-f13ea315bb98" kind "StaticLib" @@ -1688,8 +1688,8 @@ end -- PortAudio library objects -------------------------------------------------- -if _OPTIONS["NO_USE_PORTAUDIO"]~="1" then -if not _OPTIONS["with-system-portaudio"] then +if _OPTIONS["NO_USE_PORTAUDIO"] ~= "1" then +if _OPTIONS["with-system-portaudio"] ~= "0" then project "portaudio" uuid "0755c5f5-eccf-47f3-98a9-df67018a94d4" kind "StaticLib" @@ -1897,7 +1897,7 @@ end -- utf8proc library objects -------------------------------------------------- -if not _OPTIONS["with-system-utf8proc"] then +if _OPTIONS["with-system-utf8proc"] ~= "0" then project "utf8proc" uuid "1f881f09-0395-4483-ac37-2935fb092187" kind "StaticLib" From bd99544939ac04b5a81e6568c7b88870988e7420 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 22 Feb 2026 16:09:38 +0100 Subject: [PATCH 016/351] taitojc: change screen raw params (matches vsync measurement 99.999%) --- src/mame/taito/taitojc.cpp | 41 +++++++++++++------------------------- 1 file changed, 14 insertions(+), 27 deletions(-) diff --git a/src/mame/taito/taitojc.cpp b/src/mame/taito/taitojc.cpp index 61fd8d752c5..7245d2ed67c 100644 --- a/src/mame/taito/taitojc.cpp +++ b/src/mame/taito/taitojc.cpp @@ -27,6 +27,8 @@ TODO: - landgear has huge 3d problems on gameplay (CPU comms?) - dangcurv DSP program crashes very soon, so no 3d is currently shown. Is it due to undumped rom? maybe not? +- verify screen raw params, current params match vsync measurement, I suspect + hsync measurement (see PCB notes) was inaccurate - add idle skips if possible BTANB: @@ -409,23 +411,7 @@ Notes: #include "dendego.lh" -// hmm, what is the pixel clock? let's assume it's same as the 68040 -// 54MHz(/4) or 16MHz would make HTOTAL unrealistically short -static constexpr XTAL PIXEL_CLOCK = XTAL(10'000'000)*2; - -// VSync - 55.6795Hz -// HSync - 24.639kHz / 24.690kHz (may be inaccurate) -// TODO: why different HSyncs? 24 kHz assumes medium res monitor, so it can't be interlacing. -static constexpr unsigned HTOTAL = 812; -static constexpr unsigned HBEND = 0; -static constexpr unsigned HBSTART = 512; - -static constexpr unsigned VTOTAL = 443; -static constexpr unsigned VBEND = 0; -static constexpr unsigned VBSTART = 400; - - -#define DSP_IDLESKIP 1 /* dsp idle skipping speedup hack */ +#define DSP_IDLESKIP 1 /* dsp idle skipping speedup hack */ void taitojc_state::coin_control_w(uint8_t data) @@ -1130,13 +1116,13 @@ void dendego_state::machine_start() void taitojc_state::taitojc(machine_config &config) { - /* basic machine hardware */ - M68040(config, m_maincpu, XTAL(10'000'000)*2); // 20MHz, clock source = CY7C991 + // basic machine hardware + M68040(config, m_maincpu, 10_MHz_XTAL*2); // 20MHz, clock source = CY7C991 m_maincpu->set_addrmap(AS_PROGRAM, &taitojc_state::taitojc_map); m_maincpu->set_vblank_int("screen", FUNC(taitojc_state::vblank)); m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &taitojc_state::cpu_space_map); - mc68hc11_cpu_device &sub(MC68HC11M0(config, "sub", XTAL(16'000'000)/2)); + mc68hc11_cpu_device &sub(MC68HC11M0(config, "sub", 16_MHz_XTAL/2)); sub.set_addrmap(AS_PROGRAM, &taitojc_state::hc11_pgm_map); sub.in_pa_callback().set_constant(0); // ? sub.in_pg_callback().set(FUNC(taitojc_state::hc11_comm_r)); @@ -1153,7 +1139,7 @@ void taitojc_state::taitojc(machine_config &config) sub.in_an6_callback().set(FUNC(taitojc_state::hc11_analog_r<6>)); sub.in_an7_callback().set(FUNC(taitojc_state::hc11_analog_r<7>)); - TMS320C51(config, m_dsp, XTAL(10'000'000)*4); // 40MHz, clock source = CY7C991 + TMS320C51(config, m_dsp, 10_MHz_XTAL*4); // 40MHz, clock source = CY7C991 m_dsp->set_addrmap(AS_PROGRAM, &taitojc_state::tms_program_map); m_dsp->set_addrmap(AS_DATA, &taitojc_state::tms_data_map); @@ -1171,9 +1157,9 @@ void taitojc_state::taitojc(machine_config &config) GFXDECODE(config, m_gfxdecode, m_palette, gfxdecode_device::empty); - /* video hardware */ + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(PIXEL_CLOCK, HTOTAL, HBEND, HBSTART, VTOTAL, VBEND, VBSTART); + m_screen->set_raw(54_MHz_XTAL/3, 720, 0, 512, 449, 0, 400); m_screen->set_screen_update(FUNC(taitojc_state::screen_update)); m_screen->set_palette(m_palette); @@ -1181,7 +1167,7 @@ void taitojc_state::taitojc(machine_config &config) TC0780FPA(config, m_tc0780fpa, 0); - /* sound hardware */ + // sound hardware SPEAKER(config, "speaker", 2).front(); taito_en_device &taito_en(TAITO_EN(config, "taito_en", 0)); @@ -1193,13 +1179,14 @@ void dendego_state::dendego(machine_config &config) { taitojc(config); - /* basic machine hardware */ + // basic machine hardware m_maincpu->set_addrmap(AS_PROGRAM, &dendego_state::dendego_map); - /* sound hardware */ + // sound hardware SPEAKER(config, "vibration").lfe(); - OKIM6295(config, "oki", 1056000, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "vibration", 0.20); /* clock frequency & pin 7 not verified */ + okim6295_device &oki(OKIM6295(config, "oki", 1056000, okim6295_device::PIN7_HIGH)); // clock frequency & pin 7 not verified + oki.add_route(ALL_OUTPUTS, "vibration", 0.20); } From 59fb82f02f90dda52b0040c3141d058054ce9ba0 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 22 Feb 2026 16:38:00 +0100 Subject: [PATCH 017/351] New systems marked not working ------------------------------ Ultraman Club 3 [unknown] --- src/mame/mame.lst | 3 + src/mame/skeleton/sammy_pachislo.z80.cpp | 101 +++++++++++++++++++++++ src/mame/universal/pachislo_z80.cpp | 2 + 3 files changed, 106 insertions(+) create mode 100644 src/mame/skeleton/sammy_pachislo.z80.cpp diff --git a/src/mame/mame.lst b/src/mame/mame.lst index fc7643c88d0..3849aec8ece 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -44332,6 +44332,9 @@ rvoicepc @source:skeleton/sacstate.cpp sacstate +@source:skeleton/sammy_pachislo_z80.cpp +ultracl3 + @source:skeleton/sansa_fuze.cpp sanfuze2 diff --git a/src/mame/skeleton/sammy_pachislo.z80.cpp b/src/mame/skeleton/sammy_pachislo.z80.cpp new file mode 100644 index 00000000000..d5791793034 --- /dev/null +++ b/src/mame/skeleton/sammy_pachislo.z80.cpp @@ -0,0 +1,101 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +Sammy mechanical pachislo. Z80-based. + +Only hardware info available: + +CPU : Z-80 +SOUND : YMF281-D ? (if confirmed, YM2413 compatbile with different presets) + +Possibly only sound program? +*/ + + +#include "emu.h" + +#include "cpu/z80/z80.h" +#include "sound/ymopl.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" +#include "tilemap.h" + + +namespace { + +class sammy_pachislo_z80_state : public driver_device +{ +public: + sammy_pachislo_z80_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") + { } + + void sammy_pachislo_z80(machine_config &config) ATTR_COLD; + +private: + required_device m_maincpu; + + void program_map(address_map &map) ATTR_COLD; + void io_map(address_map &map) ATTR_COLD; +}; + + +void sammy_pachislo_z80_state::program_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x0000, 0x1fff).rom(); + map(0xfe00, 0xffff).ram(); +} + +void sammy_pachislo_z80_state::io_map(address_map &map) +{ + map.global_mask(0xff); + + // map(0xfe, 0xfe).r(); + map(0xfe, 0xff).w("ym", FUNC(ym2413_device::write)); +} + + +static INPUT_PORTS_START( pachislo ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + + +void sammy_pachislo_z80_state::sammy_pachislo_z80(machine_config &config) +{ + Z80(config, m_maincpu, 3'000'000); // clock not verified + m_maincpu->set_addrmap(AS_PROGRAM, &sammy_pachislo_z80_state::program_map); + m_maincpu->set_addrmap(AS_IO, &sammy_pachislo_z80_state::io_map); + m_maincpu->set_periodic_int(FUNC(sammy_pachislo_z80_state::nmi_line_pulse), attotime::from_hz(4*60)); // source? + + // TODO: other hw? + + SPEAKER(config, "mono").front_center(); + + YM2413(config, "ym", 3'000'000).add_route(ALL_OUTPUTS, "mono", 1.0); // should be YMF281-D, clock not verified +} + + +// ウルトラマン倶楽部3 (Ultraman Club 3) +ROM_START( ultracl3 ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "ultracl3.bin", 0x0000, 0x2000, CRC(7f6ea8c6) SHA1(8a65a6e9ddd6b61405f41b4684f30a38829c5165) ) +ROM_END + +} // anonymous namespace + + +GAME( 1997, ultracl3, 0, sammy_pachislo_z80, pachislo, sammy_pachislo_z80_state, empty_init, ROT0, "Sammy", "Ultraman Club 3", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL ) // 1997/12/25 diff --git a/src/mame/universal/pachislo_z80.cpp b/src/mame/universal/pachislo_z80.cpp index f1418bc2c0c..25974f6d035 100644 --- a/src/mame/universal/pachislo_z80.cpp +++ b/src/mame/universal/pachislo_z80.cpp @@ -8,6 +8,8 @@ Only hardware info available: CPU : Z-80 SOUND : YM2413 + +Possibly only sound programs? */ From e896880ff26ea93dbf5e45c0b5087bc78b2f2cc3 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sun, 22 Feb 2026 19:17:22 +0100 Subject: [PATCH 018/351] skeleton/sammy_pachislo_z80.cpp: corrected file name --- .../skeleton/{sammy_pachislo.z80.cpp => sammy_pachislo_z80.cpp} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename src/mame/skeleton/{sammy_pachislo.z80.cpp => sammy_pachislo_z80.cpp} (100%) diff --git a/src/mame/skeleton/sammy_pachislo.z80.cpp b/src/mame/skeleton/sammy_pachislo_z80.cpp similarity index 100% rename from src/mame/skeleton/sammy_pachislo.z80.cpp rename to src/mame/skeleton/sammy_pachislo_z80.cpp From 23b560af1fa9b39616b4c217db4edb949753c3b5 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sun, 22 Feb 2026 15:06:15 +0100 Subject: [PATCH 019/351] machine/pc_lpt.cpp: add address_map variant for ISA PnP targets * LPT port 279 is read only, writes are routed to ISA PnP mode. --- src/devices/machine/fdc37c665ir.cpp | 2 +- src/devices/machine/fdc37c93x.cpp | 2 +- src/devices/machine/it8671f.cpp | 10 +++++++--- src/devices/machine/it8705f.cpp | 17 ++++++++++++----- src/devices/machine/pc87306.cpp | 2 +- src/devices/machine/pc97338.cpp | 2 +- src/devices/machine/pc_lpt.cpp | 7 +++++++ src/devices/machine/pc_lpt.h | 3 +++ src/devices/machine/w83787f.cpp | 2 +- src/devices/machine/w83977tf.cpp | 16 +++++++++++----- 10 files changed, 45 insertions(+), 18 deletions(-) diff --git a/src/devices/machine/fdc37c665ir.cpp b/src/devices/machine/fdc37c665ir.cpp index 76d5baa3ba6..beb3c84f5cd 100644 --- a/src/devices/machine/fdc37c665ir.cpp +++ b/src/devices/machine/fdc37c665ir.cpp @@ -189,7 +189,7 @@ void fdc37c665ir_device::remap(int space_id, offs_t start, offs_t end) const u16 lpt_start = lpt_addresses[(m_cr[1] & 3) - 1]; const u16 lpt_end = lpt_start + 3; LOG("Map LPT: %04x-%04x\n", lpt_start, lpt_end); - m_isa->install_device(lpt_start, lpt_end, read8sm_delegate(*m_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(lpt_start, lpt_end, *m_lpt, &pc_lpt_device::isa_map); } // COM1 diff --git a/src/devices/machine/fdc37c93x.cpp b/src/devices/machine/fdc37c93x.cpp index 83fc547ff1c..08e777f4d14 100644 --- a/src/devices/machine/fdc37c93x.cpp +++ b/src/devices/machine/fdc37c93x.cpp @@ -558,7 +558,7 @@ void fdc37c93x_device::unmap_fdc_addresses() void fdc37c93x_device::map_lpt(address_map &map) { - map(0x0, 0x3).rw(pc_lpt_lptdev, FUNC(pc_lpt_device::read), FUNC(pc_lpt_device::write)); + map(0x0, 0x3).m(pc_lpt_lptdev, FUNC(pc_lpt_device::isa_map)); } void fdc37c93x_device::map_lpt_addresses() diff --git a/src/devices/machine/it8671f.cpp b/src/devices/machine/it8671f.cpp index c911db06bf5..0022e3c34c9 100644 --- a/src/devices/machine/it8671f.cpp +++ b/src/devices/machine/it8671f.cpp @@ -221,7 +221,7 @@ void it8661f_device::remap(int space_id, offs_t start, offs_t end) // can't map below 0x100 if (m_activate[3] & 1 && m_lpt_address & 0xf00) { - m_isa->install_device(m_lpt_address, m_lpt_address + 3, read8sm_delegate(*m_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(m_lpt_address, m_lpt_address + 3, *m_lpt, &pc_lpt_device::isa_map); } // TODO: GPIO (with a variable configuration ID because IT8671F moves around) @@ -236,6 +236,7 @@ void it8661f_device::port_map(address_map &map) map(0x0a79, 0x0a79).w(FUNC(it8661f_device::pnp_write_data_w)); } +// TODO: implement extra LFSR writes for ISA PnP mode void it8661f_device::pnp_address_w(offs_t offset, u8 data) { if (m_config_phase == config_phase_t::WAIT_FOR_KEY) @@ -472,13 +473,16 @@ void it8661f_device::config_map(address_map &map) m_logical_view[0](0x31, 0x31).rw(FUNC(it8661f_device::iorange_check_r<0>), FUNC(it8661f_device::iorange_check_w<0>)); m_logical_view[0](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { - return (m_fdc_address >> (offset * 8)) & 0xff; + if (offset) + return m_fdc_address & 0xf8; + + return (m_fdc_address >> 8) & 0xf; }), NAME([this] (offs_t offset, u8 data) { const u8 shift = offset * 8; m_fdc_address &= 0xff << shift; m_fdc_address |= data << (shift ^ 8); - m_fdc_address &= ~0xf007; + m_fdc_address &= 0x0ff8; LOG("LDN0 (FDC): remap %04x ([%d] %02x)\n", m_fdc_address, offset, data); remap(AS_IO, 0, 0xfff); diff --git a/src/devices/machine/it8705f.cpp b/src/devices/machine/it8705f.cpp index 2d49dafc665..3b330bdab7c 100644 --- a/src/devices/machine/it8705f.cpp +++ b/src/devices/machine/it8705f.cpp @@ -6,6 +6,7 @@ Winbond IT8705F LPC Super I/O TODO: - Move stuff from sis950_lpc; +- Maps on PCI not on ISA; - shutms11 fails detecting FDC (error 80, no motor activity); **************************************************************************************************/ @@ -162,7 +163,7 @@ void it8705f_device::remap(int space_id, offs_t start, offs_t end) // can't map below 0x100 if (m_activate[3] & 1 && m_lpt_address & 0xf00) { - m_isa->install_device(m_lpt_address, m_lpt_address + 3, read8sm_delegate(*m_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(m_lpt_address, m_lpt_address + 3, *m_lpt, &pc_lpt_device::isa_map); } } } @@ -225,13 +226,16 @@ void it8705f_device::config_map(address_map &map) m_logical_view[0](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<0>), FUNC(it8705f_device::activate_w<0>)); m_logical_view[0](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { - return (m_fdc_address >> (offset * 8)) & 0xff; + if (offset) + return m_fdc_address & 0xf8; + + return (m_fdc_address >> 8) & 0xf; }), NAME([this] (offs_t offset, u8 data) { const u8 shift = offset * 8; m_fdc_address &= 0xff << shift; m_fdc_address |= data << (shift ^ 8); - m_fdc_address &= ~0xf007; + m_fdc_address &= 0x0ff8; LOG("LDN0 (FDC): remap %04x ([%d] %02x)\n", m_fdc_address, offset, data); remap(AS_IO, 0, 0x400); @@ -294,13 +298,16 @@ void it8705f_device::config_map(address_map &map) m_logical_view[3](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<3>), FUNC(it8705f_device::activate_w<3>)); m_logical_view[3](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { - return (m_lpt_address >> (offset * 8)) & 0xff; + if (offset) + return m_lpt_address & 0xfc; + + return (m_lpt_address >> 8) & 0xf; }), NAME([this] (offs_t offset, u8 data) { const u8 shift = offset * 8; m_lpt_address &= 0xff << shift; m_lpt_address |= data << (shift ^ 8); - m_lpt_address &= ~0xf003; + m_lpt_address &= 0xffc; LOG("LDN3 (LPT): remap %04x ([%d] %02x)\n", m_lpt_address, offset, data); remap(AS_IO, 0, 0x400); diff --git a/src/devices/machine/pc87306.cpp b/src/devices/machine/pc87306.cpp index 8bc2deb00b0..e29490214e8 100644 --- a/src/devices/machine/pc87306.cpp +++ b/src/devices/machine/pc87306.cpp @@ -126,7 +126,7 @@ void pc87306_device::remap(int space_id, offs_t start, offs_t end) m_isa->install_device(0x70, 0x71, read8sm_delegate(*this, FUNC(pc87306_device::rtc_r)), write8sm_delegate(*this, FUNC(pc87306_device::rtc_w))); if (BIT(m_fer, 0)) - m_isa->install_device(0x378, 0x37f, read8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(0x378, 0x37f, *m_pc_lpt, &pc_lpt_device::isa_map); if (BIT(m_fer, 1)) m_isa->install_device(0x3f8, 0x3ff, read8sm_delegate(*m_pc_com[0], FUNC(ns16450_device::ins8250_r)), write8sm_delegate(*m_pc_com[0], FUNC(ns16450_device::ins8250_w))); diff --git a/src/devices/machine/pc97338.cpp b/src/devices/machine/pc97338.cpp index a7ad2c0bb40..895e17ceb19 100644 --- a/src/devices/machine/pc97338.cpp +++ b/src/devices/machine/pc97338.cpp @@ -94,7 +94,7 @@ void pc97338_device::remap(int space_id, offs_t start, offs_t end) m_isa->install_device(superio_base, superio_base + 1, read8sm_delegate(*this, FUNC(pc97338_device::read)), write8sm_delegate(*this, FUNC(pc97338_device::write))); if (BIT(m_fer, 0)) - m_isa->install_device(0x378, 0x37f, read8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(0x378, 0x37f, *m_pc_lpt, &pc_lpt_device::isa_map); if (BIT(m_fer, 1)) m_isa->install_device(0x3f8, 0x3ff, read8sm_delegate(*m_pc_com[0], FUNC(ns16450_device::ins8250_r)), write8sm_delegate(*m_pc_com[0], FUNC(ns16450_device::ins8250_w))); diff --git a/src/devices/machine/pc_lpt.cpp b/src/devices/machine/pc_lpt.cpp index 1c4b0349046..ffa7dbeea62 100644 --- a/src/devices/machine/pc_lpt.cpp +++ b/src/devices/machine/pc_lpt.cpp @@ -130,6 +130,13 @@ void pc_lpt_device::write(offs_t offset, uint8_t data) } } +void pc_lpt_device::isa_map(address_map &map) +{ + map(0x00, 0x00).rw(FUNC(pc_lpt_device::data_r), FUNC(pc_lpt_device::data_w)); + map(0x01, 0x01).r(FUNC(pc_lpt_device::status_r)); + map(0x02, 0x02).rw(FUNC(pc_lpt_device::control_r), FUNC(pc_lpt_device::control_w)); +} + void pc_lpt_device::update_irq() { int irq = 1; // high impedance diff --git a/src/devices/machine/pc_lpt.h b/src/devices/machine/pc_lpt.h index cfa74aaf0f5..cfc04ca516a 100644 --- a/src/devices/machine/pc_lpt.h +++ b/src/devices/machine/pc_lpt.h @@ -29,6 +29,9 @@ public: uint8_t read(offs_t offset); void write(offs_t offset, uint8_t data); + // alias of above for ISA PnP targets (where $279 writes are really routed there) + void isa_map(address_map &map); + uint8_t data_r(); void data_w(uint8_t data); uint8_t status_r(); diff --git a/src/devices/machine/w83787f.cpp b/src/devices/machine/w83787f.cpp index 751766294a0..2a90b821b27 100644 --- a/src/devices/machine/w83787f.cpp +++ b/src/devices/machine/w83787f.cpp @@ -96,7 +96,7 @@ void w83787f_device::remap(int space_id, offs_t start, offs_t end) const u16 lpt_addr = lpt_port[lpt_setting & 3]; LOG("Map LPT1 to I/O port %04x-%04x\n", lpt_addr, lpt_addr + 3); - m_isa->install_device(lpt_addr, lpt_addr + 3, read8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(lpt_addr, lpt_addr + 3, *m_pc_lpt, &pc_lpt_device::isa_map); } for (int i = 0; i < 2; i++) diff --git a/src/devices/machine/w83977tf.cpp b/src/devices/machine/w83977tf.cpp index 6f1fdb79f90..1e1c8e8492c 100644 --- a/src/devices/machine/w83977tf.cpp +++ b/src/devices/machine/w83977tf.cpp @@ -185,7 +185,7 @@ void w83977tf_device::remap(int space_id, offs_t start, offs_t end) // can't map below 0x100 if (m_activate[1] & 1 && m_lpt_address & 0xf00) { - m_isa->install_device(m_lpt_address, m_lpt_address + 3, read8sm_delegate(*m_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_lpt, FUNC(pc_lpt_device::write))); + m_isa->install_device(m_lpt_address, m_lpt_address + 3, *m_lpt, &pc_lpt_device::isa_map); } if (m_activate[5] & 1) @@ -278,13 +278,16 @@ void w83977tf_device::config_map(address_map &map) m_logical_view[0](0x30, 0x30).rw(FUNC(w83977tf_device::activate_r<0>), FUNC(w83977tf_device::activate_w<0>)); m_logical_view[0](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { - return (m_fdc_address >> (offset * 8)) & 0xff; + if (offset) + return m_fdc_address & 0xf8; + + return (m_fdc_address >> 8) & 0xf; }), NAME([this] (offs_t offset, u8 data) { const u8 shift = offset * 8; m_fdc_address &= 0xff << shift; m_fdc_address |= data << (shift ^ 8); - m_fdc_address &= ~0xf007; + m_fdc_address &= 0xff8; LOGFDC("LD0 (FDC): remap %04x ([%d] %02x)\n", m_fdc_address, offset, data); remap(AS_IO, 0, 0x400); @@ -364,13 +367,16 @@ void w83977tf_device::config_map(address_map &map) m_logical_view[1](0x30, 0x30).rw(FUNC(w83977tf_device::activate_r<1>), FUNC(w83977tf_device::activate_w<1>)); m_logical_view[1](0x60, 0x61).lrw8( NAME([this] (offs_t offset) { - return (m_lpt_address >> (offset * 8)) & 0xff; + if (offset) + return m_lpt_address & 0xfc; + + return (m_lpt_address >> 8) & 0xf; }), NAME([this] (offs_t offset, u8 data) { const u8 shift = offset * 8; m_lpt_address &= 0xff << shift; m_lpt_address |= data << (shift ^ 8); - m_lpt_address &= ~0xf003; + m_lpt_address &= 0xffc; LOG("LD1 (LPT): remap %04x ([%d] %02x)\n", m_lpt_address, offset, data); remap(AS_IO, 0, 0x400); From 999591a171f5fb9a9de563bf4125534b368218ed Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 23 Feb 2026 11:09:43 +0100 Subject: [PATCH 020/351] pc/pcipc_via.cpp: fix AGP card ID --- src/devices/bus/pci/sis6326.cpp | 4 ++-- src/devices/machine/vt82c598mvp.cpp | 5 +++++ src/mame/misc/comebaby.cpp | 2 +- src/mame/misc/ez2d.cpp | 4 ++-- src/mame/misc/savquest.cpp | 2 +- src/mame/misc/startouch.cpp | 2 +- src/mame/pc/pcipc.cpp | 4 ++-- src/mame/pc/pcipc_via.cpp | 6 ++++-- src/mame/pc/quakeat.cpp | 2 +- 9 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 91ad861fd6d..60b91020c68 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -77,7 +77,7 @@ void sis6326_agp_device::device_start() { pci_card_device::device_start(); - add_map(4*1024*1024, M_MEM, FUNC(sis6326_agp_device::vram_aperture_map)); + add_map(4*1024*1024, M_MEM | M_PREF, FUNC(sis6326_agp_device::vram_aperture_map)); add_map(64*1024, M_MEM, FUNC(sis6326_agp_device::mmio_map)); add_map(16, M_IO, FUNC(sis6326_agp_device::vmi_map)); @@ -154,7 +154,7 @@ void sis6326_agp_device::config_map(address_map &map) void sis6326_agp_device::vram_aperture_map(address_map &map) { - map(0x0000000, 0x3ffffff).rw(m_vga, FUNC(sis6326_vga_device::mem_linear_r), FUNC(sis6326_vga_device::mem_linear_w)); + map(0x0000000, 0x3f'ffff).rw(m_vga, FUNC(sis6326_vga_device::mem_linear_r), FUNC(sis6326_vga_device::mem_linear_w)); } void sis6326_agp_device::mmio_map(address_map &map) diff --git a/src/devices/machine/vt82c598mvp.cpp b/src/devices/machine/vt82c598mvp.cpp index acfe539f3ff..e4a4b1de109 100644 --- a/src/devices/machine/vt82c598mvp.cpp +++ b/src/devices/machine/vt82c598mvp.cpp @@ -513,6 +513,11 @@ void vt82c598mvp_bridge_device::device_reset() { pci_bridge_device::device_reset(); + command = 0x0007; + command_mask = 0x0047; + // Medium DEVSEL#, 66 MHz Capable + status = 0x0220; + std::fill(std::begin(m_pci2_flow_control), std::end(m_pci2_flow_control), 0); m_pci2_master_control = 0; } diff --git a/src/mame/misc/comebaby.cpp b/src/mame/misc/comebaby.cpp index caa940efefd..c0012d0ad5e 100644 --- a/src/mame/misc/comebaby.cpp +++ b/src/mame/misc/comebaby.cpp @@ -325,7 +325,7 @@ void comebaby_state::comebaby(machine_config &config) screen.set_visarea(0, 640 - 1, 0, 480 - 1); screen.set_screen_update(PCI_AGP_ID, FUNC(voodoo_3_pci_device::screen_update)); #else - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, "rivatnt").set_fixed(true); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "rivatnt").set_fixed(true); #endif PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:2", pci_cards, 14, 1, 2, 3, 0, nullptr); diff --git a/src/mame/misc/ez2d.cpp b/src/mame/misc/ez2d.cpp index b7c8a125aac..2686fd56b2f 100644 --- a/src/mame/misc/ez2d.cpp +++ b/src/mame/misc/ez2d.cpp @@ -187,14 +187,14 @@ void ez2d_state::cubx(machine_config &config) serport1.cts_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ncts2_w)); #endif - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, "rivatnt").set_fixed(true); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "rivatnt").set_fixed(true); } void ez2d_state::ez2d(machine_config &config) { ez2d_state::cubx(config); - PCI_SLOT(config.replace(), "pci:01.0:1", agp_cards, 0, 0, 1, 2, 3, "rivatnt2_m64").set_fixed(true); + PCI_SLOT(config.replace(), "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "rivatnt2_m64").set_fixed(true); // TODO: Sound Blaster Live CT4830 } diff --git a/src/mame/misc/savquest.cpp b/src/mame/misc/savquest.cpp index c3f6b867ac9..c5785b5d5d7 100644 --- a/src/mame/misc/savquest.cpp +++ b/src/mame/misc/savquest.cpp @@ -505,7 +505,7 @@ void savquest_state::savquest(machine_config &config) screen.set_visarea(0, 512 - 1, 0, 240 - 1); screen.set_screen_update("pci:0d.0", FUNC(voodoo_2_pci_device::screen_update)); - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:1", pci_cards, 9, 0, 1, 2, 3, "trio64dx").set_fixed(true); PCI_SLOT(config, "pci:2", pci_cards, 10, 1, 2, 3, 0, nullptr); diff --git a/src/mame/misc/startouch.cpp b/src/mame/misc/startouch.cpp index 879d82b8389..54acc453f23 100644 --- a/src/mame/misc/startouch.cpp +++ b/src/mame/misc/startouch.cpp @@ -155,7 +155,7 @@ void startouch_state::europl01(machine_config &config) VT82C586B_ACPI(config, "pci:07.3", 0); ACPI_PIPC (config, "pci:07.3:acpi"); - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:2", pci_cards, 14, 1, 2, 3, 0, nullptr); diff --git a/src/mame/pc/pcipc.cpp b/src/mame/pc/pcipc.cpp index 248c5bf8e44..8cb295ac76e 100644 --- a/src/mame/pc/pcipc.cpp +++ b/src/mame/pc/pcipc.cpp @@ -719,7 +719,7 @@ void pcipc_state::pciagp(machine_config &config) #endif // FIXME: int mapping is unchecked for all slots - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, "riva128"); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "riva128"); PCI_SLOT(config, "pci:1", pci_cards, 9, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:2", pci_cards, 10, 1, 2, 3, 0, nullptr); @@ -779,7 +779,7 @@ void pcipc_state::se440bx2(machine_config &config) serport1.cts_handler().set("board4:fdc37m707", FUNC(fdc37c93x_device::ncts2_w)); // FIXME: int mapping is unchecked for all slots - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, "laguna3d"); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "laguna3d"); // TODO: 0c is for YMF740 audio PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, nullptr); diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index e8b010c5ca7..b514d22e29a 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -7,7 +7,9 @@ * * Notes: * - need to map_first the IDE for make it recognize both that and floppy disks; - * - Serial Port "Auto" doesn't seem to work off the bat, need manual setup in CMOS; + * + * TODO: + * - win98se: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine; * */ @@ -130,7 +132,7 @@ void mvp3_state::mvp3(machine_config &config) acpi_dev.smi().set_inputline("maincpu", INPUT_LINE_SMI); //acpi_dev.sci(). - PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, "sis6326_agp"); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "sis6326_agp"); PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:2", pci_cards, 14, 1, 2, 3, 0, nullptr); diff --git a/src/mame/pc/quakeat.cpp b/src/mame/pc/quakeat.cpp index fa2ec0fab98..dbd40089efa 100644 --- a/src/mame/pc/quakeat.cpp +++ b/src/mame/pc/quakeat.cpp @@ -213,7 +213,7 @@ void quakeat_state::quake(machine_config &config) // (different legacy control method?) // config.device_remove(PCI_AGP_ID); // config.device_remove("screen"); -// PCI_SLOT(config, "pci:01.0:1", agp_cards, 1, 0, 1, 2, 3, "rivatnt").set_fixed(true); +// PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "rivatnt").set_fixed(true); } ROM_START( ga6la7 ) From 187d832231b84646935dbeb6b7dae05f66aecc9c Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 23 Feb 2026 12:00:49 +0100 Subject: [PATCH 021/351] New systems marked not working ------------------------------ Agro's Fantastic Video Game [Guru] --- src/mame/mame.lst | 3 ++ src/mame/pc/agro.cpp | 84 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 87 insertions(+) create mode 100644 src/mame/pc/agro.cpp diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 3849aec8ece..2096a2a3ecc 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -37058,6 +37058,9 @@ visor @source:palm/palmz22.cpp palmz22 +@source:pc/agro.cpp +agro + @source:pc/asst128.cpp asst128 diff --git a/src/mame/pc/agro.cpp b/src/mame/pc/agro.cpp new file mode 100644 index 00000000000..804ae68ea1b --- /dev/null +++ b/src/mame/pc/agro.cpp @@ -0,0 +1,84 @@ +// license:BSD-3-Clause +// copyright-holders: +/************************************************************************************************** + +Agro's ~~Good~~ Fantastic Video Game +(where Good is strikethrough) + +Redemption machine, single button. + +- PCChips/Hsin Tech M590 motherboard; +- SiS5591 + SiS5595; +- SiS 3D Pro on-board (SiS6326 equivalent); +- SoundPro HT1869 on-board, CMI8330A/C3D equivalent; +- ITE IT8770F Super I/O, seems a minor undocumented upgrade from IT8661F (cfr. BIOS at $ffe90); +- Unspecified RAM size, 384MB is the max; +- 3x PCI + 2x ISA card slots; +- Winbond W83194R-17 PLL; + +TODO: +- stub; +- On shutms11 pre-breakage it will start MS-DOS then quickly access $1000'0000, is the protection + device mapping on PCI space? +- analyze autoexec.bat / config.sys; + +**************************************************************************************************/ + +#include "emu.h" +#include "cpu/i386/i386.h" +#include "machine/pci.h" + +namespace { + +class agro_state : public driver_device +{ +public: + agro_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void agro(machine_config &config); + +private: + required_device m_maincpu; + + void agro_map(address_map &map) ATTR_COLD; +}; + + +void agro_state::agro_map(address_map &map) +{ + map(0x00000000, 0x0009ffff).ram(); + map(0x000e0000, 0x000fffff).rom().region("bios", 0xe0000); + map(0xfff00000, 0xffffffff).rom().region("bios", 0); +} + +void agro_state::agro(machine_config &config) +{ + // Socket 7 / PGA321 + // dump was using a Cyrix MII-333 + PENTIUM_MMX(config, m_maincpu, 66'000'000); + m_maincpu->set_addrmap(AS_PROGRAM, &agro_state::agro_map); + + PCI_ROOT(config, "pci", 0); + // ... +} + +ROM_START( agro ) + // AMIBIOS based + ROM_REGION32_LE( 0x100000, "bios", 0 ) + // BADADDR -x-xxxxxxxxxxxxxxxxx, oversized? + ROM_LOAD( "du98504.u38", 0, 0x100000, CRC(f0d44dbe) SHA1(e66e1c4839ef6595e4ced6ac0f3651291abb0b28) ) +// ROM_LOAD( "5901202s.rom", 0xe0000, 0x20000, CRC(2ccdef7a) SHA1(ce2a62540e253679c31dbebd0a9bee7ff0afdeec) ) + + DISK_REGION( "pci:07.0:ide1:0:cdrom" ) + DISK_IMAGE( "agro", 0, SHA1(edf27fd243944c0ff1468b532874f15346f74442) ) +ROM_END + +} // Anonymous namespace + + +// version 1 is a prototype JAMMA, unknown specifics +// distributed by Associated Leisure +GAME(1997, agro, 0, agro, 0, agro_state, empty_init, ROT0, "Kyle Hodgetts / The Game Room", "Agro's Fantastic Video Game (version 2)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) From 2cd1f59899875a9d44bc19beeb4f5b098abb0d3b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Felipe=20Corr=C3=AAa=20da=20Silva=20Sanches?= Date: Mon, 23 Feb 2026 14:48:08 +0000 Subject: [PATCH 022/351] tmp94c241: Implement DMA subsystem (HDMA + DMAR) and fix port reads (#15003) --- src/devices/cpu/tlcs900/tmp94c241.cpp | 342 +++++++++++++++++++++++++- src/devices/cpu/tlcs900/tmp94c241.h | 4 +- 2 files changed, 342 insertions(+), 4 deletions(-) diff --git a/src/devices/cpu/tlcs900/tmp94c241.cpp b/src/devices/cpu/tlcs900/tmp94c241.cpp index 4d5a7cf2cf7..06e2ded25ca 100644 --- a/src/devices/cpu/tlcs900/tmp94c241.cpp +++ b/src/devices/cpu/tlcs900/tmp94c241.cpp @@ -10,6 +10,13 @@ #include "tmp94c241.h" #include "dasm900.h" +#define LOG_DMA (1U << 1) +#define LOG_SERIAL (1U << 2) +#define LOG_IRQ (1U << 3) + +#define VERBOSE (0) +#include "logmacro.h" + //************************************************************************** // GLOBAL VARIABLES //************************************************************************** @@ -361,6 +368,22 @@ void tmp94c241_device::dmav_w(offs_t offset, uint8_t data) m_dma_vector[offset] = data; } +void tmp94c241_device::dmar_w(uint8_t data) +{ + // DMAR register (0x109) - DMA software request trigger + // Writing bit N triggers ONE DMA transfer on channel N (same as HDMA). + // For example, the Technics KN5000 driver writes DMAR once per INT0 + // to transfer a single byte from the inter-CPU latch, relying on the + // DMA count to track how many bytes remain in the current transfer block. + for (int channel = 0; channel < 4; channel++) + { + if (BIT(data, channel)) + { + tlcs900_process_software_dma(channel); + } + } +} + template void tmp94c241_device::bNcs_w(offs_t offset, uint16_t data, uint16_t mem_mask) { @@ -707,7 +730,7 @@ void tmp94c241_device::scNbuf_w(uint8_t data) // Fake finish sending data m_int_reg[(Channel == 0) ? INTES0 : INTES1] |= 0x80; m_check_irqs = 1; - logerror("sc%dbuf write: %02X\n", Channel, data); + LOGMASKED(LOG_SERIAL, "sc%dbuf write: %02X\n", Channel, data); //machine().debugger().debug_break(); } @@ -830,7 +853,12 @@ void tmp94c241_device::port_w(uint8_t data) template uint8_t tmp94c241_device::port_r() { - return m_port_read[P](0); + /* Reading a port returns: + - Output latch value for bits configured as output (PXCR bit = 1) + - External pin level for bits configured as input (PXCR bit = 0) */ + uint8_t dir = m_port_control[P]; + uint8_t external = m_port_read[P](0); + return (m_port_latch[P] & dir) | (external & ~dir); } template @@ -952,6 +980,7 @@ void tmp94c241_device::internal_mem(address_map &map) map(0x0000f7, 0x0000f7).rw(FUNC(tmp94c241_device::intnmwdt_r), FUNC(tmp94c241_device::intnmwdt_w)); map(0x0000f8, 0x0000f8).w(FUNC(tmp94c241_device::intclr_w)); map(0x000100, 0x000103).w(FUNC(tmp94c241_device::dmav_w)); + map(0x000109, 0x000109).w(FUNC(tmp94c241_device::dmar_w)); map(0x000110, 0x000110).rw(FUNC(tmp94c241_device::wdmod_r), FUNC(tmp94c241_device::wdmod_w)); map(0x000111, 0x000111).w(FUNC(tmp94c241_device::wdcr_w)); map(0x000120, 0x000127).r(FUNC(tmp94c241_device::adreg_r)); @@ -985,11 +1014,272 @@ void tmp94c241_device::internal_mem(address_map &map) //************************************************************************** //------------------------------------------------- -// tlcs900_check_hdma - +// tlcs900_process_hdma - process a single HDMA +// transfer for a channel +//------------------------------------------------- + +int tmp94c241_device::tlcs900_process_hdma(int channel) +{ + // Get DMA start vector for this channel + uint8_t start_vector = m_dma_vector[channel]; + if (start_vector == 0) + return 0; // Channel not configured + + // Find which interrupt this start vector corresponds to + int irq = -1; + for (int i = 0; i < NUM_MASKABLE_IRQS; i++) + { + if (tmp94c241_irq_vector_map[i].dma_start_vector == start_vector) + { + irq = i; + break; + } + } + + if (irq < 0) + return 0; // No matching interrupt found + + // Check if the interrupt flag is set (DMA trigger condition) + if (!(m_int_reg[tmp94c241_irq_vector_map[irq].reg] & tmp94c241_irq_vector_map[irq].iff)) + return 0; // Interrupt not pending + + // Decode DMAM mode register + // TMP94C241 DMAM format (same as TMP95C061): + // Bits 4-0 encode transfer mode: + // Bits 1-0: Transfer size (00=byte, 01=word, 10=long) + // Bits 3-2: Direction mode: + // 00 = dest increment, src fixed (I/O -> memory) + // 01 = dest decrement, src fixed + // 10 = dest fixed, src increment (memory -> I/O) + // 11 = dest fixed, src decrement + // Bit 4: Counter mode / both fixed + uint8_t dmam = m_dmam[channel].b.l; + + // Use switch-based decoding matching TMP95C061 proven implementation + switch (dmam & 0x1f) + { + case 0x00: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmad[channel].d += 1; + m_cycles += 8; + break; + case 0x01: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_dmad[channel].d += 2; + m_cycles += 8; + break; + case 0x02: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_dmad[channel].d += 4; + m_cycles += 12; + break; + case 0x04: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmad[channel].d -= 1; + m_cycles += 8; + break; + case 0x05: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_dmad[channel].d -= 2; + m_cycles += 8; + break; + case 0x06: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_dmad[channel].d -= 4; + m_cycles += 12; + break; + case 0x08: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmas[channel].d += 1; + m_cycles += 8; + break; + case 0x09: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_dmas[channel].d += 2; + m_cycles += 8; + break; + case 0x0a: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_dmas[channel].d += 4; + m_cycles += 12; + break; + case 0x0c: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmas[channel].d -= 1; + m_cycles += 8; + break; + case 0x0d: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_dmas[channel].d -= 2; + m_cycles += 8; + break; + case 0x0e: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_dmas[channel].d -= 4; + m_cycles += 12; + break; + case 0x10: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_cycles += 8; + break; + case 0x11: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_cycles += 8; + break; + case 0x12: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_cycles += 12; + break; + case 0x14: + m_dmas[channel].d += 1; + m_cycles += 5; + break; + default: + LOGMASKED(LOG_DMA, "HDMA ch%d: unknown DMAM mode 0x%02X\n", channel, dmam); + m_cycles += 8; + break; + } + + // Decrement transfer count + m_dmac[channel].w.l -= 1; + + // Check for transfer completion + if (m_dmac[channel].w.l == 0) + { + LOGMASKED(LOG_DMA, "HDMA ch%d complete: src=%06X dst=%06X (vec=%02X)\n", + channel, m_dmas[channel].d, m_dmad[channel].d, start_vector); + + // Clear DMA vector to disable channel + m_dma_vector[channel] = 0; + + // Set completion interrupt flag + switch (channel) + { + case 0: m_int_reg[INTETC01] |= 0x08; break; + case 1: m_int_reg[INTETC01] |= 0x80; break; + case 2: m_int_reg[INTETC23] |= 0x08; break; + case 3: m_int_reg[INTETC23] |= 0x80; break; + } + m_check_irqs = 1; + } + + // Clear the triggering interrupt flag + m_int_reg[tmp94c241_irq_vector_map[irq].reg] &= ~tmp94c241_irq_vector_map[irq].iff; + + return 1; // Transfer performed +} + + +//------------------------------------------------- +// tlcs900_process_software_dma - process a +// software-triggered DMA transfer (one unit). +// Each DMAR write transfers ONE unit, same as +// HDMA. E.g. the Technics KN5000 driver writes +// DMAR once per INT0 to receive one byte from +// the inter-CPU latch. +// Fires INTTC when the count reaches zero. +//------------------------------------------------- + +void tmp94c241_device::tlcs900_process_software_dma(int channel) +{ + if (m_dmac[channel].w.l == 0) + return; // No transfer to do + + uint8_t dmam = m_dmam[channel].b.l; + + switch (dmam & 0x1f) + { + case 0x00: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmad[channel].d += 1; + m_cycles += 8; + break; + case 0x01: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_dmad[channel].d += 2; + m_cycles += 8; + break; + case 0x02: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_dmad[channel].d += 4; + m_cycles += 12; + break; + case 0x04: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmad[channel].d -= 1; + m_cycles += 8; + break; + case 0x08: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmas[channel].d += 1; + m_cycles += 8; + break; + case 0x09: + WRMEMW(m_dmad[channel].d, RDMEMW(m_dmas[channel].d)); + m_dmas[channel].d += 2; + m_cycles += 8; + break; + case 0x0a: + WRMEML(m_dmad[channel].d, RDMEML(m_dmas[channel].d)); + m_dmas[channel].d += 4; + m_cycles += 12; + break; + case 0x0c: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_dmas[channel].d -= 1; + m_cycles += 8; + break; + case 0x10: + WRMEM(m_dmad[channel].d, RDMEM(m_dmas[channel].d)); + m_cycles += 8; + break; + case 0x14: + m_dmas[channel].d += 1; + m_cycles += 5; + break; + default: + LOGMASKED(LOG_DMA, "Software DMA ch%d: unknown DMAM mode 0x%02X\n", channel, dmam); + m_cycles += 8; + break; + } + + m_dmac[channel].w.l -= 1; + + // Check for transfer completion + if (m_dmac[channel].w.l == 0) + { + LOGMASKED(LOG_DMA, "Software DMA ch%d complete: src=%06X dst=%06X\n", + channel, m_dmas[channel].d, m_dmad[channel].d); + + // Set transfer completion interrupt flag (INTTC0-3) + switch (channel) + { + case 0: m_int_reg[INTETC01] |= 0x08; break; + case 1: m_int_reg[INTETC01] |= 0x80; break; + case 2: m_int_reg[INTETC23] |= 0x08; break; + case 3: m_int_reg[INTETC23] |= 0x80; break; + } + m_check_irqs = 1; + } +} + + +//------------------------------------------------- +// tlcs900_check_hdma - check and process HDMA //------------------------------------------------- void tmp94c241_device::tlcs900_check_hdma() { + // HDMA can only be performed if interrupts are allowed + if ((m_sr.b.h & 0x70) == 0x70) + return; // All interrupts masked + + // Check channels in priority order (0 highest, 3 lowest) + for (int channel = 0; channel < 4; channel++) + { + if (tlcs900_process_hdma(channel)) + return; // Only process one transfer per call + } } @@ -1021,6 +1311,21 @@ void tmp94c241_device::tlcs900_check_irqs() { if (m_int_reg[tmp94c241_irq_vector_map[i].reg] & tmp94c241_irq_vector_map[i].iff) { + // HDMA priority: skip interrupts targeted by active HDMA channels. + // On real hardware, HDMA consumes the interrupt trigger instead of + // dispatching to the interrupt handler. + bool hdma_targeted = false; + for (int ch = 0; ch < 4; ch++) + { + if (m_dma_vector[ch] == tmp94c241_irq_vector_map[i].dma_start_vector) + { + hdma_targeted = true; + break; + } + } + if (hdma_targeted) + continue; + switch (tmp94c241_irq_vector_map[i].iff) { case 0x80: @@ -1050,6 +1355,12 @@ void tmp94c241_device::tlcs900_check_irqs() { uint8_t vector = tmp94c241_irq_vector_map[irq].vector; + // Log only DMA completion interrupts (INTTC0/INTTC2) — key milestones + if (vector == 0x94) + LOGMASKED(LOG_IRQ, "IRQ: INTTC0 (DMA ch0 done) level=%d PC=%06X\n", level, m_pc.d); + else if (vector == 0x9c) + LOGMASKED(LOG_IRQ, "IRQ: INTTC2 (DMA ch2 done) level=%d PC=%06X\n", level, m_pc.d); + m_xssp.d -= 4; WRMEML(m_xssp.d, m_pc.d); m_xssp.d -= 2; @@ -1067,6 +1378,31 @@ void tmp94c241_device::tlcs900_check_irqs() // Clear taken IRQ m_int_reg[tmp94c241_irq_vector_map[irq].reg] &= ~ tmp94c241_irq_vector_map[irq].iff; + + // Level-detect re-assertion: Level-triggered interrupt + // flags are continuously driven by the input level. Clearing the flag + // during dispatch has no lasting effect if the input is still asserted. + // Re-assert INT0 flag if input is still active in level-detect mode. + if (tmp94c241_irq_vector_map[irq].reg == INTE0AD && + tmp94c241_irq_vector_map[irq].iff == 0x08 && + !(m_iimc & 0x02) && + m_level[TLCS900_INT0] == ASSERT_LINE) + { + m_int_reg[INTE0AD] |= 0x08; + m_check_irqs = 1; + } + + // Compute the default priority index from the vector table. + // The datasheet's "default priority" numbering is vector/4 + 1, + // with a gap at 0x3c (reserved), so entries above that shift down by one. + int8_t default_priority = vector / 4 + 1; + if (vector > 0x3c) + default_priority--; + + // The IRQ level passed here corresponds to the datasheet's + // "default priority" number, so e.g. "IRQ 20" means + // "INTT0: 8-bit timer (Timer 0)" in the TMP94C241 interrupt table. + standard_irq_callback(default_priority, m_pc.d); } } diff --git a/src/devices/cpu/tlcs900/tmp94c241.h b/src/devices/cpu/tlcs900/tmp94c241.h index bb83a748f73..bba00b4e7a5 100644 --- a/src/devices/cpu/tlcs900/tmp94c241.h +++ b/src/devices/cpu/tlcs900/tmp94c241.h @@ -13,7 +13,6 @@ #include "tlcs900.h" - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -125,6 +124,8 @@ protected: virtual std::unique_ptr create_disassembler() override; private: + int tlcs900_process_hdma(int channel); + void tlcs900_process_software_dma(int channel); void change_timer_flipflop(uint8_t flipflop, uint8_t operation); // Ports @@ -195,6 +196,7 @@ private: void iimc_w(uint8_t data); void intclr_w(uint8_t data); void dmav_w(offs_t offset, uint8_t data); + void dmar_w(uint8_t data); uint8_t drefcr1_r(); void drefcr1_w(uint8_t data); uint8_t dmemcr1_r(); From fb1496201c9ef2df4e5fbe92e8a0ffd1f652e944 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 23 Feb 2026 16:48:58 +0100 Subject: [PATCH 023/351] New clones marked not working ----------------------------- Prophet-600 (set 2) [Siftware] --- src/mame/mame.lst | 1 + src/mame/sequential/prophet600.cpp | 42 ++++++++++++++++-------------- 2 files changed, 24 insertions(+), 19 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 2096a2a3ecc..2684d1a5662 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -42977,6 +42977,7 @@ prophet5rev30 @source:sequential/prophet600.cpp prpht600 +prpht600a @source:sequential/sixtrak.cpp sixtrak diff --git a/src/mame/sequential/prophet600.cpp b/src/mame/sequential/prophet600.cpp index 254a3c96b63..3a680d4e33b 100644 --- a/src/mame/sequential/prophet600.cpp +++ b/src/mame/sequential/prophet600.cpp @@ -49,10 +49,11 @@ ***************************************************************************/ #include "emu.h" -#include "machine/clock.h" -#include "cpu/z80/z80.h" + #include "bus/midi/midi.h" +#include "cpu/z80/z80.h" #include "machine/6850acia.h" +#include "machine/clock.h" #include "machine/pit8253.h" #include "prophet600.lh" @@ -60,10 +61,6 @@ namespace { -#define MAINCPU_TAG "z80" -#define PIT_TAG "pit" -#define UART_TAG "uart" - enum { CV_CV_Osc1A = 0, CV_Osc2A, CV_Osc3A, CV_Osc4A, CV_Osc5A, CV_Osc6A, @@ -78,10 +75,10 @@ enum class prophet600_state : public driver_device { public: - prophet600_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, MAINCPU_TAG), - m_acia(*this, UART_TAG), + prophet600_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_acia(*this, "uart"), m_digits(*this, "digit%u", 0U), m_dac(0), m_scanrow(0), @@ -91,9 +88,10 @@ public: void prophet600(machine_config &config); -private: +protected: virtual void machine_start() override ATTR_COLD; +private: void pit_ch0_tick_w(int state); void pit_ch2_tick_w(int state); void acia_irq_w(int state); @@ -208,7 +206,7 @@ void prophet600_state::mask_w(uint8_t data) m_comparitor &= ~0x04; } -// printf("8253 gate = %x\n", data & 0x02); + //printf("8253 gate = %x\n", data & 0x02); } void prophet600_state::cv_w(uint8_t data) @@ -243,13 +241,13 @@ void prophet600_state::potmux_w(uint8_t data) uint8_t prophet600_state::comparitor_r() { -// m_comparitor ^= 0x04; + //m_comparitor ^= 0x04; return m_comparitor; } void prophet600_state::cpu_map(address_map &map) { - map(0x0000, 0x1fff).rom().region(MAINCPU_TAG, 0); + map(0x0000, 0x1fff).rom().region("maincpu", 0); map(0x2000, 0x27ff).ram(); map(0x3000, 0x37ff).ram(); map(0x4000, 0x4001).w(FUNC(prophet600_state::dac_w)); @@ -259,7 +257,7 @@ void prophet600_state::cpu_map(address_map &map) void prophet600_state::io_map(address_map &map) { - map(0x00, 0x07).mirror(0xff00).rw(PIT_TAG, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); + map(0x00, 0x07).mirror(0xff00).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); map(0x08, 0x08).mirror(0xff00).w(FUNC(prophet600_state::scanrow_w)); map(0x09, 0x09).mirror(0xff00).rw(FUNC(prophet600_state::comparitor_r), FUNC(prophet600_state::led_w)); map(0x0a, 0x0a).mirror(0xff00).rw(FUNC(prophet600_state::scan_r), FUNC(prophet600_state::potmux_w)); @@ -282,7 +280,7 @@ void prophet600_state::prophet600(machine_config &config) config.set_default_layout(layout_prophet600); - pit8253_device &pit8253(PIT8253(config, PIT_TAG, XTAL(8'000'000)/4)); + pit8253_device &pit8253(PIT8253(config, "pit", XTAL(8'000'000)/4)); pit8253.set_clk<0>(XTAL(8'000'000)/4); pit8253.set_clk<1>(XTAL(8'000'000)/4); pit8253.set_clk<2>(XTAL(8'000'000)/4); @@ -305,11 +303,17 @@ static INPUT_PORTS_START( prophet600 ) INPUT_PORTS_END ROM_START( prpht600 ) - ROM_REGION(0x2000, MAINCPU_TAG, 0) - ROM_LOAD( "p600.bin", 0x000000, 0x002000, CRC(78e3f048) SHA1(61548b6de3d9b5c0ae76f8e751ece0b57de17118) ) + ROM_REGION(0x2000, "maincpu", 0) + ROM_LOAD( "p600.bin", 0x0000, 0x2000, CRC(78e3f048) SHA1(61548b6de3d9b5c0ae76f8e751ece0b57de17118) ) +ROM_END + +ROM_START( prpht600a ) + ROM_REGION(0x2000, "maincpu", 0) + ROM_LOAD( "1982_sci_six-0-2-1.10", 0x0000, 0x2000, CRC(ea89c882) SHA1(a0a21b365ac69c10005daa0802d07618a8b6bd19) ) ROM_END } // anonymous namespace -CONS( 1983, prpht600, 0, 0, prophet600, prophet600, prophet600_state, empty_init, "Sequential Circuits", "Prophet-600", MACHINE_NOT_WORKING|MACHINE_NO_SOUND ) +CONS( 1983, prpht600, 0, 0, prophet600, prophet600, prophet600_state, empty_init, "Sequential Circuits", "Prophet-600 (set 1)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +CONS( 1983, prpht600a, prpht600, 0, prophet600, prophet600, prophet600_state, empty_init, "Sequential Circuits", "Prophet-600 (set 2)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) From 5b2c070d9afd64969ab9476352f0adc58dcb89e8 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 23 Feb 2026 17:05:08 +0100 Subject: [PATCH 024/351] prophet600: use pwm_display_device --- src/mame/layout/prophet600.lay | 4 +-- src/mame/sequential/prophet600.cpp | 52 ++++++++++++++---------------- 2 files changed, 27 insertions(+), 29 deletions(-) diff --git a/src/mame/layout/prophet600.lay b/src/mame/layout/prophet600.lay index f55d8fd6af6..31706ecbb83 100644 --- a/src/mame/layout/prophet600.lay +++ b/src/mame/layout/prophet600.lay @@ -16,10 +16,10 @@ copyright-holders:R. Belmont - + - + diff --git a/src/mame/sequential/prophet600.cpp b/src/mame/sequential/prophet600.cpp index 3a680d4e33b..3eda3e0794b 100644 --- a/src/mame/sequential/prophet600.cpp +++ b/src/mame/sequential/prophet600.cpp @@ -55,6 +55,7 @@ #include "machine/6850acia.h" #include "machine/clock.h" #include "machine/pit8253.h" +#include "video/pwm.h" #include "prophet600.lh" @@ -79,11 +80,7 @@ public: driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_acia(*this, "uart"), - m_digits(*this, "digit%u", 0U), - m_dac(0), - m_scanrow(0), - m_comparitor(0), - m_nmi_gate(false) + m_display(*this, "display") { } void prophet600(machine_config &config); @@ -112,17 +109,22 @@ private: required_device m_maincpu; required_device m_acia; + required_device m_display; - output_finder<2> m_digits; + uint16_t m_dac = 0; + uint8_t m_scanrow = 0; + uint8_t m_comparitor = 0; - uint16_t m_dac; - uint8_t m_scanrow; - uint8_t m_comparitor; - - bool m_nmi_gate; + bool m_nmi_gate = false; // gates - bool m_ASaw = false, m_ATri = false, m_Sync = false, m_BSaw = false, m_BTri = false, m_PModFA = false, m_PModFil = false; + bool m_ASaw = false; + bool m_ATri = false; + bool m_Sync = false; + bool m_BSaw = false; + bool m_BTri = false; + bool m_PModFA = false; + bool m_PModFil = false; // control voltages uint16_t m_CVs[CV_MAX]{}; @@ -170,23 +172,16 @@ void prophet600_state::dac_w(offs_t offset, uint8_t data) void prophet600_state::scanrow_w(uint8_t data) { m_scanrow = data; + + // scanrow 0x10 = LEDs, 0x20 = 7-segment #1, 0x40 = 7-segment #2 + m_display->write_my(data >> 4 & 7); } // scanrow 0x10 = LEDs, 0x20 = 7-segment #1, 0x40 = 7-segment #2 void prophet600_state::led_w(uint8_t data) { - if (m_scanrow & 0x10) - { - // LEDs in row 0x10 are Seq1=0, Seq2=1, ArpUD=2, ArpAssign=3, Preset=4, Record=5, ToTape=6, FromTape=7 - } - else if (m_scanrow & 0x20) - { - m_digits[0] = data; - } - else if (m_scanrow & 0x40) - { - m_digits[1] = data; - } + // LEDs in row 0x10 are Seq1=0, Seq2=1, ArpUD=2, ArpAssign=3, Preset=4, Record=5, ToTape=6, FromTape=7 + m_display->write_mx(data); } uint8_t prophet600_state::scan_r() @@ -268,7 +263,7 @@ void prophet600_state::io_map(address_map &map) void prophet600_state::machine_start() { - m_digits.resolve(); + // TODO: savestate } // master crystal is 8 MHz, all clocks derived from there @@ -278,8 +273,6 @@ void prophet600_state::prophet600(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &prophet600_state::cpu_map); m_maincpu->set_addrmap(AS_IO, &prophet600_state::io_map); - config.set_default_layout(layout_prophet600); - pit8253_device &pit8253(PIT8253(config, "pit", XTAL(8'000'000)/4)); pit8253.set_clk<0>(XTAL(8'000'000)/4); pit8253.set_clk<1>(XTAL(8'000'000)/4); @@ -297,6 +290,11 @@ void prophet600_state::prophet600(machine_config &config) clock_device &acia_clock(CLOCK(config, "acia_clock", XTAL(8'000'000)/16)); // 500kHz = 16 times the MIDI rate acia_clock.signal_handler().set(FUNC(prophet600_state::acia_clock_w)); + + PWM_DISPLAY(config, m_display).set_size(3, 8); + m_display->set_segmask(0x6, 0xff); + + config.set_default_layout(layout_prophet600); } static INPUT_PORTS_START( prophet600 ) From afc59bb969a70d5aef41565f2992b49b0958f98e Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 23 Feb 2026 17:22:41 +0100 Subject: [PATCH 025/351] prpht600: correct rom label --- src/mame/sequential/prophet600.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/sequential/prophet600.cpp b/src/mame/sequential/prophet600.cpp index 3eda3e0794b..9ab2e3db649 100644 --- a/src/mame/sequential/prophet600.cpp +++ b/src/mame/sequential/prophet600.cpp @@ -302,7 +302,7 @@ INPUT_PORTS_END ROM_START( prpht600 ) ROM_REGION(0x2000, "maincpu", 0) - ROM_LOAD( "p600.bin", 0x0000, 0x2000, CRC(78e3f048) SHA1(61548b6de3d9b5c0ae76f8e751ece0b57de17118) ) + ROM_LOAD( "six-0-8.10", 0x0000, 0x2000, CRC(78e3f048) SHA1(61548b6de3d9b5c0ae76f8e751ece0b57de17118) ) ROM_END ROM_START( prpht600a ) From 1a53035fb5b3691b8f02a14a35466af8b848e20d Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 23 Feb 2026 18:04:41 +0100 Subject: [PATCH 026/351] prophet600: correction to cv_w (probably still not right) --- src/mame/sequential/prophet600.cpp | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/src/mame/sequential/prophet600.cpp b/src/mame/sequential/prophet600.cpp index 9ab2e3db649..7fec0a31f9a 100644 --- a/src/mame/sequential/prophet600.cpp +++ b/src/mame/sequential/prophet600.cpp @@ -168,16 +168,15 @@ void prophet600_state::dac_w(offs_t offset, uint8_t data) m_dac |= data; } -// also selects LEDs and keyboard keys to check void prophet600_state::scanrow_w(uint8_t data) { + // selects LEDs and keyboard keys to check m_scanrow = data; // scanrow 0x10 = LEDs, 0x20 = 7-segment #1, 0x40 = 7-segment #2 m_display->write_my(data >> 4 & 7); } -// scanrow 0x10 = LEDs, 0x20 = 7-segment #1, 0x40 = 7-segment #2 void prophet600_state::led_w(uint8_t data) { // LEDs in row 0x10 are Seq1=0, Seq2=1, ArpUD=2, ArpAssign=3, Preset=4, Record=5, ToTape=6, FromTape=7 @@ -208,10 +207,10 @@ void prophet600_state::cv_w(uint8_t data) { int cvnum = data & 7; - if (!(cvnum & 0x08)) m_CVs[cvnum] = m_dac; - if (!(cvnum & 0x10)) m_CVs[cvnum+8] = m_dac; - if (!(cvnum & 0x20)) m_CVs[cvnum+16] = m_dac; - if (!(cvnum & 0x40)) m_CVs[cvnum+24] = m_dac; + if (!(data & 0x08)) m_CVs[cvnum] = m_dac; + if (!(data & 0x10)) m_CVs[cvnum+8] = m_dac; + if (!(data & 0x20)) m_CVs[cvnum+16] = m_dac; + if (!(data & 0x40)) m_CVs[cvnum+24] = m_dac; } void prophet600_state::gate_w(uint8_t data) @@ -252,13 +251,14 @@ void prophet600_state::cpu_map(address_map &map) void prophet600_state::io_map(address_map &map) { - map(0x00, 0x07).mirror(0xff00).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); - map(0x08, 0x08).mirror(0xff00).w(FUNC(prophet600_state::scanrow_w)); - map(0x09, 0x09).mirror(0xff00).rw(FUNC(prophet600_state::comparitor_r), FUNC(prophet600_state::led_w)); - map(0x0a, 0x0a).mirror(0xff00).rw(FUNC(prophet600_state::scan_r), FUNC(prophet600_state::potmux_w)); - map(0x0b, 0x0b).mirror(0xff00).w(FUNC(prophet600_state::gate_w)); - map(0x0d, 0x0d).mirror(0xff00).w(FUNC(prophet600_state::cv_w)); - map(0x0e, 0x0e).mirror(0xff00).w(FUNC(prophet600_state::mask_w)); + map.global_mask(0xff); + map(0x00, 0x07).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write)); + map(0x08, 0x08).w(FUNC(prophet600_state::scanrow_w)); + map(0x09, 0x09).rw(FUNC(prophet600_state::comparitor_r), FUNC(prophet600_state::led_w)); + map(0x0a, 0x0a).rw(FUNC(prophet600_state::scan_r), FUNC(prophet600_state::potmux_w)); + map(0x0b, 0x0b).w(FUNC(prophet600_state::gate_w)); + map(0x0d, 0x0d).w(FUNC(prophet600_state::cv_w)); + map(0x0e, 0x0e).w(FUNC(prophet600_state::mask_w)); } void prophet600_state::machine_start() @@ -288,7 +288,7 @@ void prophet600_state::prophet600(machine_config &config) MIDI_PORT(config, "mdout", midiout_slot, "midiout"); - clock_device &acia_clock(CLOCK(config, "acia_clock", XTAL(8'000'000)/16)); // 500kHz = 16 times the MIDI rate + clock_device &acia_clock(CLOCK(config, "acia_clock", XTAL(8'000'000)/16)); // 500kHz = 16 times the MIDI rate acia_clock.signal_handler().set(FUNC(prophet600_state::acia_clock_w)); PWM_DISPLAY(config, m_display).set_size(3, 8); From b96c3ded9278741b570b3b17802d5f0a6a803397 Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 23 Feb 2026 17:02:27 +0100 Subject: [PATCH 027/351] machine/vt82c586b_acpi.cpp: map ACPI_PIPC on 8-bit units, use a device_memory_interface workaround to avoid emumem mapping bug --- src/devices/machine/it8671f.cpp | 2 + src/devices/machine/vt82c586b_acpi.cpp | 505 +++++++++++++++---------- src/devices/machine/vt82c586b_acpi.h | 21 +- src/devices/machine/vt82c586b_isa.h | 2 +- src/devices/video/pc_vga_sis.cpp | 22 +- src/mame/pc/pcipc_via.cpp | 4 +- 6 files changed, 358 insertions(+), 198 deletions(-) diff --git a/src/devices/machine/it8671f.cpp b/src/devices/machine/it8671f.cpp index 0022e3c34c9..abc3ae853c0 100644 --- a/src/devices/machine/it8671f.cpp +++ b/src/devices/machine/it8671f.cpp @@ -84,6 +84,8 @@ ALLOW_SAVE_TYPE(it8661f_device::config_phase_t); void it8661f_device::device_start() { set_isa_device(); + m_last_dma_line = -1; + m_isa->set_dma_channel(0, this, true); m_isa->set_dma_channel(1, this, true); m_isa->set_dma_channel(2, this, true); diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index bb2366c729c..4bfc84a4069 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -183,7 +183,8 @@ void vt82c586b_acpi_device::map_extra( { if (BIT(m_general_config, 7)) { - io_space->install_device(m_iobase & 0xfffe, m_iobase | 0xff, *m_acpi, &acpi_pipc_device::map); +// io_space->install_device(m_iobase & 0xfffe, m_iobase | 0xff, *m_acpi, &acpi_pipc_device::map); + m_acpi->map_device(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, m_iobase, io_space); } } @@ -192,10 +193,12 @@ void vt82c586b_acpi_device::map_extra( */ acpi_pipc_device::acpi_pipc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, ACPI_PIPC, tag, owner, clock) + : lpc_device(mconfig, ACPI_PIPC, tag, owner, clock) + , device_memory_interface(mconfig, *this) , m_write_smi(*this) , m_write_sci(*this) { + m_space_config = address_space_config("io_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(acpi_pipc_device::io_map), this)); } void acpi_pipc_device::device_start() @@ -248,18 +251,30 @@ void acpi_pipc_device::device_validity_check(validity_checker &valid) const osd_printf_error("%s: clock set to 0 MHz, please use implicit default of 3.5 MHz in config setter instead\n", this->tag()); } -void acpi_pipc_device::check_smi() +device_memory_interface::space_config_vector acpi_pipc_device::memory_space_config() const { - if (m_global_status & m_global_enable && BIT(m_gbl_ctl, 0)) - { - m_write_smi(1); - } - else - m_write_smi(0); + return space_config_vector { + std::make_pair(0, &m_space_config) + }; +} + +void acpi_pipc_device::map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) +{ + io_space->install_device(io_offset, io_window_end, *this, &acpi_pipc_device::map, 0xffffffff); +} + +// FIXME: trampoline to avoid mapping getting confused and overrides nibbles on 32-bit word units +void acpi_pipc_device::map(address_map &map) +{ + map(0x00, 0xff).lrw8( + NAME([this] (offs_t offset) { return space(0).read_byte(offset); }), + NAME([this] (offs_t offset, u8 data) { space(0).write_byte(offset, data); }) + ); } // Similar but not exactly identical to Intel PIIX4 equivalent -void acpi_pipc_device::map(address_map &map) +void acpi_pipc_device::io_map(address_map &map) { // Power Management Status // x--- ---- ---- ---- WAK_STS @@ -269,110 +284,141 @@ void acpi_pipc_device::map(address_map &map) // ---- ---- --x- ---- GBL_STS (set by BIOS_RLS) // ---- ---- ---x ---- BM_STS (Bus Master) // ---- ---- ---- ---x TMR_STS - map(0x00, 0x01).lrw16( - NAME([this] () { return m_pmsts; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - m_pmsts &= ~(data & 0x8d31); - // clear BIOS_RLS - if (ACCESSING_BITS_0_7 && BIT(data, 5)) - m_gbl_ctl &= ~(1 << 5); + map(0x00, 0x01).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_pmsts >> 8 : m_pmsts & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + if (offset) + { + m_pmsts &= ~(data & 0x8d00); + } + else + { + m_pmsts &= ~(data & 0x31); + // clear BIOS_RLS + if (BIT(data, 5)) + m_gbl_ctl &= ~(1 << 5); + } }) ); // Power Management Resume Enable - map(0x02, 0x03).lrw16( - NAME([this] () { return m_pmen; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_pmen); - m_pmen &= 0x0521; - LOGACPI("PMEN: %04x & %04x\n", data, mem_mask); + map(0x02, 0x03).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_pmen >> 8 : m_pmen & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGACPI("PMEN: [%d] %02x\n", offset, data); + if (offset) + { + m_pmen &= 0x00ff; + m_pmen |= (data & 0x5) << 8; + } + else + { + m_pmen &= 0xff00; + m_pmen |= data & 0x21; + } LOGACPIEX("\tRTC_EN %d PWRBTN_EN %d GBL_EN %d TMROF_EN %d\n" - , BIT(data, 10) - , BIT(data, 8) - , BIT(data, 5) - , BIT(data, 0) + , BIT(m_pmen, 10) + , BIT(m_pmen, 8) + , BIT(m_pmen, 5) + , BIT(m_pmen, 0) ); }) ); // Power Management Control - map(0x04, 0x05).lrw16( - NAME([this] (offs_t offset) { return m_pmcntrl; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_pmcntrl); - // TODO: SUS_EN cannot be '1' - // (generates a suspend mode if enabled, flips to '0') - LOGACPI("PMCNTRL: %04x & %04x\n", data, mem_mask); - // SLP_EN / SLP_TYP in this variant - LOGACPIEX("\tSUS_EN %d SUS_TYPE %d GBL_RLS %d BRLD_EN_BM %d SCI_EN %d\n" - , BIT(data, 13) - , (data >> 10) & 7 - , BIT(data, 2) - , BIT(data, 1) - , BIT(data, 0) + map(0x04, 0x05).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_pmcntrl >> 8 : m_pmcntrl & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGACPI("PMCNTRL: [%d] %02x\n", offset, data); + if (offset) + { + m_pmcntrl &= 0x00ff; + m_pmcntrl |= (data & 0x3c) << 8; + if (BIT(m_pmcntrl, 13)) + { + LOGACPI("SLP_EN Sleep Enable issued %d\n", (m_pmcntrl >> 10) & 7); + // TODO: SLP_EN cannot be '1' + // (generates a suspend mode if enabled, flips to '0') + } + } + else + { + m_pmcntrl &= 0xff00; + m_pmcntrl |= (data & 0x7); + } + + LOGACPIEX("\tSLP_EN %d SLP_TYP %d GBL_RLS %d BRLD_EN_BM %d SCI_EN %d\n" + , BIT(m_pmcntrl, 13) + , (m_pmcntrl >> 10) & 7 + , BIT(m_pmcntrl, 2) + , BIT(m_pmcntrl, 1) + , BIT(m_pmcntrl, 0) ); }) ); // Power Management Timer - map(0x08, 0x0b).lr16( - NAME([this] (offs_t offset) { + map(0x08, 0x0b).lr8( + NAME([this] (offs_t offset) -> u8 { const u32 tmr_val = machine().time().as_ticks(clock()); // TODO: resets with PCI reset // TODO: sets TMROF_STS to 1 on bit 23 transitions, generates a SCI irq with TMROF_EN - // TODO: can be configured with 32-bit resolution in this variant + // TODO: can be configured with 32-bit resolution in this variant (from PCI ACPI) LOGPMTR("PMTMR%d: %08x\n", offset, tmr_val); - if (offset) - return (tmr_val >> 16) & 0xff; + if (offset == 3) + return 0; - return tmr_val & 0xffff; + const unsigned shift = offset * 8; + return (tmr_val >> shift) & 0xff; }) ); // General Purpose Enable - map(0x0e, 0x0f).lrw16( - NAME([this] (offs_t offset) { return m_gpen; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_gpen); - LOGACPI("GPEN: %04x & %04x\n", data, mem_mask); + map(0x0e, 0x0f).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_gpen >> 8 : m_gpen & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGACPI("GPEN: [%d] %02x\n", offset, data); + if (offset) + { + m_gpen &= 0x00ff; + m_gpen |= (data & 0xf) << 8; + } + else + { + m_gpen &= 0xff00; + m_gpen |= (data & 1); + } LOGACPIEX("\tLID_EN %d RI_EN %d GPI_EN %d USB_EN %d THRM_EN %d\n" - , BIT(data, 11) - , BIT(data, 10) - , BIT(data, 9) - , BIT(data, 8) - , BIT(data, 0) + , BIT(m_gpen, 11) + , BIT(m_gpen, 10) + , BIT(m_gpen, 9) + , BIT(m_gpen, 8) + , BIT(m_gpen, 0) ); }) ); // Processor Control (I/O) - map(0x10, 0x11).lr16(NAME([this] () { - // CC_STS (r/o) - if (!machine().side_effects_disabled()) - LOGACPI("PCNTRL: CC_STS read\n"); - return 0x0002; - })); - map(0x12, 0x13).lrw16( - NAME([this] () { return m_pcntrl; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_pcntrl); - LOGACPI("PCNTRL: %04x & %04x\n", data, mem_mask); - LOGACPIEX("\tCLKRUN_EN %d STPCLK_EN %d SLEEP_EN %d BST_EN %d CC_EN %d THT_EN %d THTL_DTY %f%\n" - , BIT(data, 13) - , BIT(data, 12) - , BIT(data, 11) - , BIT(data, 10) - , BIT(data, 9) - , BIT(data, 4) - // NOTE: setting 0 - , ((data >> 1) & 7) * 12.5 - ); + // bits 31-5 are + // has just bits 4-1 compared to Intel equivalent + // TODO: different on 3040 Silicon + map(0x10, 0x13).lrw8( + NAME([this] (offs_t offset) { return (offset) ? 0 : m_pcntrl & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + if (offset == 0) + { + m_pcntrl &= 0xffff'ff00; + m_pcntrl |= data & 0x1e; + LOGACPI("PCNTRL: %02x\n", data); + LOGACPIEX("\tTHT_EN %d THTL_DTY %f%\n" + , BIT(m_pcntrl, 4) + // NOTE: setting 0 + , ((m_pcntrl >> 1) & 7) * 12.5 + ); + } }) ); // Processor Level 2/3 - map(0x14, 0x15).lr16( + map(0x14, 0x15).lr8( NAME([this] (offs_t offset, u16 mem_mask) { if (!machine().side_effects_disabled()) { LOGPMTR("PLVL%d read\n", offset + 2); - // Must be byte access - if (mem_mask == 0xffff) - LOG("\tPLVL%d Invalid word access!\n", offset + 2); } return 0; }) @@ -384,42 +430,43 @@ void acpi_pipc_device::map(address_map &map) // ---- --x- ---- ---- USB_STS // ---- ---x ---- ---- RI_STS // ---- ---- xxxx xxxx EXTSMI7~0 - map(0x20, 0x21).lrw16( - NAME([this] () { return m_gpsts; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - if (ACCESSING_BITS_0_7) - m_gpsts &= ~(data & 0x00ff); - if (ACCESSING_BITS_8_15) - m_gpsts &= ~(data & 0x0300); + map(0x20, 0x21).rw(FUNC(acpi_pipc_device::gpsts_r), FUNC(acpi_pipc_device::gpsts_w)); + map(0x22, 0x23).rw(FUNC(acpi_pipc_device::gp_sci_enable_r), FUNC(acpi_pipc_device::gp_sci_enable_w)); + map(0x24, 0x25).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_gp_smi_enable >> 8 : m_gp_smi_enable & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGACPI("General Purpose SMI Enable: [%d] %02x\n", offset, data); + if (offset) + { + m_gp_smi_enable &= 0x00ff; + m_gp_smi_enable |= (data & 3) << 8; + } + else + { + m_gp_smi_enable &= 0xff00; + m_gp_smi_enable |= data; + } }) ); - map(0x22, 0x23).lrw16( - NAME([this] () { return m_gp_sci_enable; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_gp_sci_enable); - m_gp_sci_enable &= 0x3ff; - LOGACPI("General Purpose SCI Enable: %04x & %04x\n", data, mem_mask); - }) - ); - map(0x24, 0x25).lrw16( - NAME([this] () { return m_gp_smi_enable; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_gp_smi_enable); - m_gp_smi_enable &= 0x3ff; - LOGACPI("General Purpose SMI Enable: %04x & %04x\n", data, mem_mask); - }) - ); - map(0x26, 0x27).lrw16( - NAME([this] () { return m_power_supply_control; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_power_supply_control); - m_power_supply_control &= 0x701; - LOGACPI("Power Supply Control: %04x & %04x\n", data, mem_mask); + map(0x26, 0x27).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_power_supply_control >> 8 : m_power_supply_control & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGACPI("Power Supply Control: [%d] %02x\n", offset, data); + if (offset) + { + m_power_supply_control &= 0x00ff; + m_power_supply_control |= (data & 7) << 8; + } + else + { + m_power_supply_control &= 0xff00; + m_power_supply_control |= (data & 1); + } LOGACPIEX("\tRI_PS_CTL %d PB_CTL %d RTC_PS_CTL %d E0_PS_CTL\n" - , BIT(data, 10) - , BIT(data, 9) - , BIT(data, 8) - , BIT(data, 0) + , BIT(m_power_supply_control, 10) + , BIT(m_power_supply_control, 9) + , BIT(m_power_supply_control, 8) + , BIT(m_power_supply_control, 0) ); }) ); @@ -430,58 +477,66 @@ void acpi_pipc_device::map(address_map &map) // ---- -x-- GP0TO_STS // ---- --x- STTO_STS // ---- ---x PACT_STS - map(0x28, 0x29).lrw16( - NAME([this] () { return m_global_status; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - if (ACCESSING_BITS_0_7) + map(0x28, 0x29).lrw8( + NAME([this] (offs_t offset) { return (offset) ? 0 : m_global_status & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + if (!offset) { m_global_status &= ~(data & 0x7f); check_smi(); } }) ); - map(0x2a, 0x2b).lrw16( - NAME([this] () { return m_global_enable; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_global_enable); - m_global_enable &= 0x7f; - LOGACPI("Global Enable: %04x & %04x\n", data, mem_mask); - LOGACPIEX("\tSW_SMI_EN %d BIOS_EN %d LEG_USB_EN %d GP1TO_EN %d GP0TO_EN %d STTO_EN %d PACT_EN %d\n" - , BIT(data, 6) - , BIT(data, 5) - , BIT(data, 4) - , BIT(data, 3) - , BIT(data, 2) - , BIT(data, 1) - , BIT(data, 0) - ); + map(0x2a, 0x2b).lrw8( + NAME([this] (offs_t offset) { return (offset) ? 0 : m_global_enable & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + if (!offset) + { + LOGACPI("Global Enable: %02x\n", data); + m_global_enable = data & 0x7f; + LOGACPIEX("\tSW_SMI_EN %d BIOS_EN %d LEG_USB_EN %d GP1TO_EN %d GP0TO_EN %d STTO_EN %d PACT_EN %d\n" + , BIT(m_global_enable, 6) + , BIT(m_global_enable, 5) + , BIT(m_global_enable, 4) + , BIT(m_global_enable, 3) + , BIT(m_global_enable, 2) + , BIT(m_global_enable, 1) + , BIT(m_global_enable, 0) + ); + } }) ); - map(0x2c, 0x2d).lrw16( - NAME([this] () { return m_gbl_ctl; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_gbl_ctl); - m_gbl_ctl &= 0x117; - // set GBL_STS - if (ACCESSING_BITS_0_7) + map(0x2c, 0x2d).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_gbl_ctl >> 8 : m_gbl_ctl & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGACPI("Global Control: [%d] %02x\n", offset, data); + if (offset) { - if (BIT(data, 1)) + m_gbl_ctl &= 0x00ff; + m_gbl_ctl |= (data & 1) << 8; + } + else + { + m_gbl_ctl &= 0xff00; + m_gbl_ctl |= (data & 0x17); + + // set GBL_STS + if (BIT(m_gbl_ctl, 1)) m_pmsts |= 1 << 5; // refresh for SMI_EN (global SMI enable) check_smi(); } - LOGACPI("Global Control: %04x & %04x\n", data, mem_mask); LOGACPIEX("\tINSMI %d SMIIG %d Power Button Trigger %d BIOS_RLS %d SMI_EN %d\n" - , BIT(data, 8) - , BIT(data, 4) - , BIT(data, 2) - , BIT(data, 1) - , BIT(data, 0) + , BIT(m_gbl_ctl, 8) + , BIT(m_gbl_ctl, 4) + , BIT(m_gbl_ctl, 2) + , BIT(m_gbl_ctl, 1) + , BIT(m_gbl_ctl, 0) ); }) ); map(0x2f, 0x2f).lrw8( - NAME([this] () { + NAME([this] (offs_t offset) { return m_smi_cmd; }), NAME([this] (offs_t offset, u8 data) { @@ -491,49 +546,58 @@ void acpi_pipc_device::map(address_map &map) LOGACPIEX("SMI_CMD %02x (SW_SMI_EN=%d)\n", data, BIT(m_global_enable, 6)); }) ); - map(0x30, 0x33).lrw32( - NAME([this] () { return m_primary_activity_status; }), - NAME([this] (offs_t offset, u32 data, u32 mem_mask) { - if (ACCESSING_BITS_0_7) + map(0x30, 0x33).lrw8( + NAME([this] (offs_t offset) { return (offset) ? 0 : m_primary_activity_status & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + if (!offset) + { m_primary_activity_status &= ~(data & 0xfb); + // check_activity(); + } }) ); - map(0x34, 0x37).lrw32( - NAME([this] () { return m_primary_activity_enable; }), - NAME([this] (offs_t offset, u32 data, u32 mem_mask) { - COMBINE_DATA(&m_primary_activity_enable); - m_primary_activity_enable &= data & 0xfb; - LOGACPI("Primary Activity Enable: %08x & %08x\n", data, mem_mask); - LOGACPIEX("\tKBC_EN %d SER_EN %d PAR_EN %d VID_EN %d IDE_EN %d PIRQ_EN %d DRQ_EN %d\n" - , BIT(data, 7) - , BIT(data, 6) - , BIT(data, 5) - , BIT(data, 4) - , BIT(data, 3) - , BIT(data, 1) - , BIT(data, 0) - ); + map(0x34, 0x37).lrw8( + NAME([this] (offs_t offset) { return (offset) ? 0 : m_primary_activity_enable; }), + NAME([this] (offs_t offset, u8 data) { + if (!offset) + { + LOGACPI("Primary Activity Enable: %02x\n", data); + m_primary_activity_enable = data & 0xfb; + // TODO: set PACT_STS bit 0 + // check_activity(); + LOGACPIEX("\tKBC_EN %d SER_EN %d PAR_EN %d VID_EN %d IDE_EN %d PIRQ_EN %d DRQ_EN %d\n" + , BIT(m_primary_activity_enable, 7) + , BIT(m_primary_activity_enable, 6) + , BIT(m_primary_activity_enable, 5) + , BIT(m_primary_activity_enable, 4) + , BIT(m_primary_activity_enable, 3) + , BIT(m_primary_activity_enable, 1) + , BIT(m_primary_activity_enable, 0) + ); + } }) ); - map(0x38, 0x3b).lrw32( - NAME([this] () { return m_gp_timer_reload_enable; }), - NAME([this] (offs_t offset, u32 data, u32 mem_mask) { - COMBINE_DATA(&m_gp_timer_reload_enable); - m_gp_timer_reload_enable &= data & 0xf9; - LOGACPI("GP Timer Reload Enable: %08x & %08x\n", data, mem_mask); - LOGACPIEX("\tGP1 Reload = KBC %d SER %d VID %d IDE/Floppy %d | GP0 Reload = Primary %d\n" - , BIT(data, 7) - , BIT(data, 6) - , BIT(data, 4) - , BIT(data, 3) - , BIT(data, 0) - ); + map(0x38, 0x3b).lrw8( + NAME([this] (offs_t offset) { return (offset) ? 0 : m_gp_timer_reload_enable; }), + NAME([this] (offs_t offset, u8 data) { + if (!offset) + { + LOGACPI("GP Timer Reload Enable: %02x\n", data); + m_gp_timer_reload_enable = data & 0xf9; + LOGACPIEX("\tGP1 Reload = KBC %d SER %d VID %d IDE/Floppy %d | GP0 Reload = Primary %d\n" + , BIT(m_gp_timer_reload_enable, 7) + , BIT(m_gp_timer_reload_enable, 6) + , BIT(m_gp_timer_reload_enable, 4) + , BIT(m_gp_timer_reload_enable, 3) + , BIT(m_gp_timer_reload_enable, 0) + ); + } }) ); // GPIO map(0x40, 0x40).lrw8( - NAME([this] () { return m_gpio_dir; }), + NAME([this] (offs_t offset) { return m_gpio_dir; }), NAME([this] (offs_t offset, u8 data) { m_gpio_dir = data & 0x7f; LOGGPIO("GPIO Dir: %02x (%02x)\n", data, data & 0x1f); @@ -544,29 +608,84 @@ void acpi_pipc_device::map(address_map &map) }) ); map(0x42, 0x42).lrw8( - NAME([this] () { return m_gpio_val; }), + NAME([this] (offs_t offset) { return m_gpio_val; }), NAME([this] (offs_t offset, u8 data) { m_gpio_val = data & 0x1f; LOGGPIO("GPIO Output: %02x\n", data); }) ); map(0x44, 0x44).lr8( - NAME([this] () { - LOGGPIO("GPIO Input read (EXTSMI_VAL)\n"); + NAME([this] (offs_t offset) { + if (!machine().side_effects_disabled()) + LOGGPIO("GPIO Input read (EXTSMI_VAL)\n"); return 0; }) ); - map(0x46, 0x47).lrw16( - NAME([this] () { return m_gpo_val; }), - NAME([this] (offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_gpo_val); - LOGGPIO("GPO_VAL %04x & %04x\n", data, mem_mask); + map(0x46, 0x47).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_gpo_val >> 8 : m_gpo_val & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + LOGGPIO("GPO_VAL [%d] %02x\n", offset, data); + if (offset) + { + m_gpo_val &= 0x00ff; + m_gpo_val |= data << 8; + } + else + { + m_gpo_val &= 0xff00; + m_gpo_val |= data; + } }) ); - map(0x48, 0x49).lr16( - NAME([this] () -> u16 { - LOGGPIO("GPI Port Input read (GPI_VAL)\n"); + map(0x48, 0x49).lr8( + NAME([this] (offs_t offset) -> u8 { + if (!machine().side_effects_disabled()) + LOGGPIO("GPI Port Input read %d (GPI_VAL%d-%d)\n", offset, offset * 8 + 7, offset * 8); return 0; }) ); } + +void acpi_pipc_device::check_smi() +{ + if (m_global_status & m_global_enable && BIT(m_gbl_ctl, 0)) + { + m_write_smi(1); + } + else + m_write_smi(0); +} + +u8 acpi_pipc_device::gpsts_r(offs_t offset) +{ + return (offset) ? m_gpsts >> 8 : m_gpsts & 0xff; +} + +void acpi_pipc_device::gpsts_w(offs_t offset, u8 data) +{ + if (!offset) + m_gpsts &= ~(data & 0x00ff); + else + m_gpsts &= ~((data << 8) & 0x0300); +} + +u8 acpi_pipc_device::gp_sci_enable_r(offs_t offset) +{ + return (offset) ? m_gp_sci_enable >> 8 : m_gp_sci_enable & 0xff; +} + +void acpi_pipc_device::gp_sci_enable_w(offs_t offset, u8 data) +{ + LOGACPI("General Purpose SCI Enable: [%d] %02x\n", offset, data); + if (offset) + { + m_gp_sci_enable &= 0x00ff; + m_gp_sci_enable |= (data & 3) << 8; + } + else + { + m_gp_sci_enable &= 0xff00; + m_gp_sci_enable |= data; + } +} + diff --git a/src/devices/machine/vt82c586b_acpi.h b/src/devices/machine/vt82c586b_acpi.h index f47236dc39d..b67e5bb2608 100644 --- a/src/devices/machine/vt82c586b_acpi.h +++ b/src/devices/machine/vt82c586b_acpi.h @@ -6,6 +6,7 @@ #pragma once +#include "lpc.h" #include "pci.h" class acpi_pipc_device; @@ -36,11 +37,16 @@ private: u16 m_irq_channel[2]; }; -class acpi_pipc_device : public device_t +class acpi_pipc_device : public lpc_device + , public device_memory_interface { public: acpi_pipc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = XTAL(3'579'545).value()); + virtual void map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + + void map(address_map &map); auto smi() { return m_write_smi.bind(); } @@ -51,15 +57,21 @@ protected: virtual void device_reset() override; virtual void device_validity_check(validity_checker &valid) const override; + virtual space_config_vector memory_space_config() const override; + private: devcb_write_line m_write_smi; devcb_write_line m_write_sci; + address_space_config m_space_config; + + void io_map(address_map &map); + u16 m_pmsts; u16 m_pmen; u16 m_pmcntrl; u16 m_gpen; - u16 m_pcntrl; + u32 m_pcntrl; u16 m_gpsts; u16 m_gp_sci_enable; @@ -76,6 +88,11 @@ private: u8 m_gpio_val; u16 m_gpo_val; + u8 gpsts_r(offs_t offset); + void gpsts_w(offs_t offset, u8 data); + u8 gp_sci_enable_r(offs_t offset); + void gp_sci_enable_w(offs_t offset, u8 data); + void check_smi(); }; diff --git a/src/devices/machine/vt82c586b_isa.h b/src/devices/machine/vt82c586b_isa.h index 0dca7de2e2f..0e276793cd9 100644 --- a/src/devices/machine/vt82c586b_isa.h +++ b/src/devices/machine/vt82c586b_isa.h @@ -48,6 +48,7 @@ public: void pc_irq6_w(int state); void pc_irq7_w(int state); void pc_irq8n_w(int state); + void pc_irq12m_w(int state); // TODO: remaps externally for IDE, cfr. config $4a void pc_irq14_w(int state); void pc_irq15_w(int state); @@ -160,7 +161,6 @@ private: void pc_irq9_w(int state); void pc_irq10_w(int state); void pc_irq11_w(int state); - void pc_irq12m_w(int state); void iochck_w(int state); void pc_select_dma_channel(int channel, bool state); uint8_t at_page8_r(offs_t offset); diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 2290d0d7050..b9ebb8f5abc 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -248,7 +248,26 @@ void sis6326_vga_device::sequencer_map(address_map &map) m_ext_sr0c = data; }) ); - //map(0x0e, 0x0f) Ext. Config Status (r/o) + //map(0x0d, 0x0e) Ext. Config Status (r/o) + map(0x0d, 0x0d).lr8( + // x--- ---- MD23 Enable 64K ROM + // -x-- ---- MD22 Clock Generator Select (0) internal (1) external (test only) + // --x- ---- MD21 AGP 2X Transfer enable + // ---x ---- MD20 AGP bus enable + // ---- x--- MD19 + // ---- -x-- MD18 NTSC (0) PAL (1) + // ---- --x- MD17 Video subsystem power-on disable + // ---- ---x MD16 Video subsystem port (0) $3c3 (1) $46e8 + NAME([] () { return 0x80 | 0x20 | 0x10 | 1; }) + ); + map(0x0e, 0x0e).lr8( + // xxx- ---- MD31~MD29 DRAM speed setting (000) SGRAM 66 MHz + // ---x ---- MD28 disable VMI interface + // ---- x--- MD27 INTA# enable + // ---- -x-- MD26 BIOS ROM disable + // ---- --xx MD25~MD24 + NAME([] () { return 8; }) + ); map(0x0f, 0x10).lrw8( NAME([this] (offs_t offset) { return m_ext_scratch[offset]; @@ -602,6 +621,7 @@ void sis630_vga_device::sequencer_map(address_map &map) vga.crtc.start_addr_latch |= data << 16; }) ); + map(0x0e, 0x0e).unmapr(); map(0x0e, 0x0e).lw8( NAME([this] (offs_t offset, u8 data) { LOG("SR0E: Extended pitch register %02x\n", data); diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index b514d22e29a..e0a85d4a9c9 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -10,6 +10,7 @@ * * TODO: * - win98se: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine; + * - freedos13: APMDOS hangs system with JEMMEX preloaded, works when issued standalone; * */ @@ -58,6 +59,7 @@ private: static void ite_superio_config(device_t *device); }; +// NOTE: something between these two will corrupt the Energy Star logo if mapped low void mvp3_state::main_map(address_map &map) { map.unmap_value_high(); @@ -130,7 +132,7 @@ void mvp3_state::mvp3(machine_config &config) VT82C586B_ACPI(config, "pci:07.3", 0); acpi_pipc_device &acpi_dev(ACPI_PIPC (config, "pci:07.3:acpi")); acpi_dev.smi().set_inputline("maincpu", INPUT_LINE_SMI); - //acpi_dev.sci(). +// acpi_dev.sci().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_irq12m_w)); PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "sis6326_agp"); From e8d940cad27012a6e211f6c619c011313bac3041 Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 23 Feb 2026 19:09:30 +0100 Subject: [PATCH 028/351] skeleton/huangyeh_m68k.cpp: fix GFX ROM loading, fix ACRTC hookup * this will now actually throw a fatalerror with unsupported HD63484 COMMAND_DWT after few frames, as stated in header; --- src/mame/skeleton/huangyeh_m68k.cpp | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/src/mame/skeleton/huangyeh_m68k.cpp b/src/mame/skeleton/huangyeh_m68k.cpp index 54b094f921c..3e4cfd583a2 100644 --- a/src/mame/skeleton/huangyeh_m68k.cpp +++ b/src/mame/skeleton/huangyeh_m68k.cpp @@ -120,8 +120,7 @@ void huangyeh_m68k_state::main_program_map(address_map &map) map(0x100051, 0x100051).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0x100060, 0x100061).nopw(); // key matrix at $100061 map(0x130000, 0x130001).portr("DSW2"); - map(0x1d0000, 0x1d0001).rw("acrtc", FUNC(hd63484_device::read16), FUNC(hd63484_device::write16)); - map(0x1d0002, 0x1d0003).noprw(); // TODO: A0 of acrtc + map(0x1d0000, 0x1d0003).rw("acrtc", FUNC(hd63484_device::read16), FUNC(hd63484_device::write16)); map(0x1d0009, 0x1d0009).w("ramdac", FUNC(ramdac_device::index_w)); map(0x1d000b, 0x1d000b).w("ramdac", FUNC(ramdac_device::pal_w)); map(0x1d000d, 0x1d000d).w("ramdac", FUNC(ramdac_device::mask_w)); @@ -250,10 +249,10 @@ ROM_START( wlzb ) ROM_LOAD( "w7.u34", 0x0000, 0x8000, CRC(c00786b3) SHA1(a8b3ddf3dd1b702d8719eace1b65f42c727b9473) ) ROM_REGION16_BE( 0x200000, "tiles", 0 ) - ROM_LOAD( "w3.u41", 0x000000, 0x080000, CRC(58e57d87) SHA1(f870d0729528b2fda495da059f110e466ea58de5) ) - ROM_LOAD( "w4.u45", 0x080000, 0x080000, CRC(5e993a35) SHA1(ed39dbc89cafebc8348f05a6327efa1ea26ff466) ) - ROM_LOAD( "w5.u42", 0x100000, 0x080000, CRC(e728751d) SHA1(00bc65793a65ede318e5412d06eb85259015a5c1) ) - ROM_LOAD( "w6.u46", 0x180000, 0x080000, CRC(a0ea7f31) SHA1(ef985de34485cb65ac59f7938583a0607213c81a) ) + ROM_LOAD16_BYTE( "w3.u41", 0x000001, 0x080000, CRC(58e57d87) SHA1(f870d0729528b2fda495da059f110e466ea58de5) ) + ROM_LOAD16_BYTE( "w5.u42", 0x000000, 0x080000, CRC(e728751d) SHA1(00bc65793a65ede318e5412d06eb85259015a5c1) ) + ROM_LOAD16_BYTE( "w4.u45", 0x100001, 0x080000, CRC(5e993a35) SHA1(ed39dbc89cafebc8348f05a6327efa1ea26ff466) ) + ROM_LOAD16_BYTE( "w6.u46", 0x100000, 0x080000, CRC(a0ea7f31) SHA1(ef985de34485cb65ac59f7938583a0607213c81a) ) ROM_REGION( 0x80000, "oki", 0 ) ROM_LOAD( "w8.u28", 0x00000, 0x80000, CRC(aad9367b) SHA1(e0b20087a8eab9d16e5cb1ed6415ca5373a43da7) ) From 828a0396f1bbbb30669a1babb678113c345e72b5 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 23 Feb 2026 19:35:40 +0100 Subject: [PATCH 029/351] New working systems ------------------- Triv III [chaneman] --- src/mame/mame.lst | 1 + src/mame/misc/statriv2.cpp | 29 +++++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 2684d1a5662..1bae2d932f1 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -33335,6 +33335,7 @@ quaquiz2 sextriv statriv2 statriv2v +statriv3 statriv4 statriv5se statusbj diff --git a/src/mame/misc/statriv2.cpp b/src/mame/misc/statriv2.cpp index e616abef342..c1fe1ba5d42 100644 --- a/src/mame/misc/statriv2.cpp +++ b/src/mame/misc/statriv2.cpp @@ -968,6 +968,34 @@ ROM_START( statriv2v ) ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ ROM_END +ROM_START( statriv3 ) // Triv Quiz III ROM PCB. All labels removed. In the labels below, a stands for main PCB, b for ROM PCB. + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "a.u7", 0x00000, 0x01000, CRC(b82e76b7) SHA1(f6e0705f12e9804a897ad4f3a83f40793c7ef6ec) ) + ROM_LOAD( "a.u8", 0x01000, 0x01000, CRC(a58d83e2) SHA1(b6e88305b61af1ea8949282589d53c30b1e95939) ) + ROM_LOAD( "a.u9", 0x02000, 0x01000, CRC(db630ef9) SHA1(1c9eb49426d095f9681cde52e5439b5aaaea59a0) ) + + ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) + ROM_LOAD( "a.u36", 0x00000, 0x01000, CRC(af5f434a) SHA1(1e7ae7ad7ea697007a30f5ba89127802a835eddc) ) + + ROM_REGION( 0x10000, "questions", 0 ) + ROM_LOAD( "b.u1", 0x00000, 0x02000, CRC(63e3744c) SHA1(7be1d6d9dc546fec05f4a631bcd40d16de53faee) ) + ROM_LOAD( "b.u2", 0x02000, 0x02000, CRC(8b5837c3) SHA1(ca3a1d8eedd1036d66088922bfe7879acf533d6a) ) + ROM_LOAD( "b.u3", 0x04000, 0x02000, CRC(b5896a53) SHA1(ce1ad5c91a7b8c0af09936b5e312ef03913d2e45) ) + ROM_LOAD( "b.u4", 0x06000, 0x02000, CRC(e3137ffc) SHA1(d3fea66fbfbecf951d7c2b6ff88b1698226fd6f3) ) + ROM_LOAD( "b.u5", 0x08000, 0x02000, CRC(f84612e7) SHA1(01ed349d6eaa296a3fe27b82a875976075ee9a20) ) + ROM_LOAD( "b.u6", 0x0a000, 0x02000, CRC(69917d9a) SHA1(ced5be682484a3bcf98a38500c0d1e3f6a29cc75) ) + ROM_LOAD( "b.u7", 0x0c000, 0x02000, CRC(7b65f147) SHA1(352a81b70b03a78e36af583586d80e1ee7b0fb72) ) + ROM_LOAD( "b.u8", 0x0e000, 0x02000, CRC(e7577c53) SHA1(e3373c17bcfc45142ec4972f9803b57349a0c5f4) ) + + ROM_REGION( 0x0100, "nvram", 0 ) + ROM_LOAD( "statriv3.nv", 0x0000, 0x0100, CRC(60c9b350) SHA1(a2085230fe90f2dbb3dca8b8ae7ca126b4b27188) ) + + ROM_REGION( 0x0140, "proms", 0 ) + ROM_LOAD( "74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ + ROM_LOAD( "74s288.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) /* Soldered in (Color?) */ + ROM_LOAD( "74s287.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ +ROM_END + ROM_START( statriv4 ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "triv4.u07", 0x00000, 0x01000, CRC(38800e01) SHA1(3d174c4194169eae7c033e8bb30bd02779170d42) ) @@ -1723,6 +1751,7 @@ GAME( 1984, hangman, 0, statriv2, hangman, statriv2_state, init_addr GAME( 1984, trivquiz, 0, statriv2, statriv2, statriv2_state, init_addr_lhx, ROT0, "Status Games", "Triv Quiz", MACHINE_SUPPORTS_SAVE ) GAME( 1984, statriv2, 0, statriv2, statriv2, statriv2_state, init_addr_xlh, ROT0, "Status Games", "Triv Two", MACHINE_SUPPORTS_SAVE ) GAME( 1985, statriv2v, statriv2, statriv2v, statriv2, statriv2_state, init_addr_xlh, ROT90, "Status Games", "Triv Two (Vertical)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, statriv3, 0, statriv2, statriv2, statriv2_state, init_addr_xhl, ROT0, "Status Games", "Triv III", MACHINE_SUPPORTS_SAVE ) GAME( 1985, statriv4, 0, statriv2, statriv4, statriv2_state, init_addr_xhl, ROT0, "Status Games", "Triv Four", MACHINE_SUPPORTS_SAVE ) GAME( 1985, statriv5se, statriv4, statriv2, statriv4, statriv2_state, init_addr_xhl, ROT0, "Status Games", "Triv Five Special Edition", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // missing questions' ROMs GAME( 1985, sextriv, 0, statriv2, sextriv, statriv2_state, init_addr_lhx, ROT0, "Status Games", "Sex Triv", MACHINE_SUPPORTS_SAVE ) From 2c9b22082852dd888361ed5f5bb4ecfa0ea72623 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 23 Feb 2026 21:21:03 +0100 Subject: [PATCH 030/351] sprcros2: assume z80b is 5mhz, assume screen refresh rate is closer to 60hz --- src/mame/misc/sprcros2.cpp | 37 +++++++++++++++++-------------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/src/mame/misc/sprcros2.cpp b/src/mame/misc/sprcros2.cpp index 10cd782a4a2..25307b3a54c 100644 --- a/src/mame/misc/sprcros2.cpp +++ b/src/mame/misc/sprcros2.cpp @@ -1,17 +1,20 @@ // license:BSD-3-Clause // copyright-holders:Angelo Salese -/*************************************************************************** +/* Super Cross II (c) 1987 GM Shoji - driver by Angelo Salese, based off "wiped off due of not anymore licenseable" driver by insideoutboy. + driver by Angelo Salese, based on "wiped off due to not anymore + licenseable" driver by insideoutboy. TODO: - - scanline renderer; + - scanline renderer, or change to tilemaps; - understand irq 0 source; - - output bit 0 might be watchdog armed bit/sprite start DMA instead of irq enable; - - weird visible area resolution, 224 or 240 x 224? Maybe it's really just 256 x 224 and then it's supposed - to show garbage/nothing on the edges? + - output bit 0 might be watchdog armed bit/sprite start DMA instead of + irq enable; + - weird visible area resolution, 224 or 240 x 224? Maybe it's really just + 256 x 224 and then it's supposed to show garbage/nothing on the edges? + - verify hsync/vsync, current screen raw params are guessed =================================== @@ -50,7 +53,7 @@ SCM-23.5B SC-60.4K SC-61.5A -***************************************************************************/ +*/ #include "emu.h" #include "cpu/z80/z80.h" @@ -63,8 +66,6 @@ SC-61.5A namespace { -#define MAIN_CLOCK XTAL(10'000'000) - class sprcros2_state : public driver_device { public: @@ -202,7 +203,6 @@ void sprcros2_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &clipre - uint32_t sprcros2_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) { if(m_screen_enable == false) @@ -450,7 +450,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(sprcros2_state::master_scanline) { int scanline = param; - if(scanline == 0 && m_master_irq_enable == true) m_master_cpu->set_input_line(0, HOLD_LINE); } @@ -458,24 +457,24 @@ TIMER_DEVICE_CALLBACK_MEMBER(sprcros2_state::master_scanline) void sprcros2_state::sprcros2(machine_config &config) { /* basic machine hardware */ - Z80(config, m_master_cpu, MAIN_CLOCK/4); + Z80(config, m_master_cpu, 10_MHz_XTAL/2); m_master_cpu->set_addrmap(AS_PROGRAM, &sprcros2_state::master_map); m_master_cpu->set_addrmap(AS_IO, &sprcros2_state::master_io); m_master_cpu->set_vblank_int("screen", FUNC(sprcros2_state::master_vblank_irq)); TIMER(config, "scantimer").configure_scanline(FUNC(sprcros2_state::master_scanline), "screen", 0, 1); - Z80(config, m_slave_cpu, MAIN_CLOCK/4); + Z80(config, m_slave_cpu, 10_MHz_XTAL/2); m_slave_cpu->set_addrmap(AS_PROGRAM, &sprcros2_state::slave_map); m_slave_cpu->set_addrmap(AS_IO, &sprcros2_state::slave_io); m_slave_cpu->set_vblank_int("screen", FUNC(sprcros2_state::slave_vblank_irq)); - config.set_perfect_quantum(m_master_cpu); + config.set_maximum_quantum(attotime::from_hz(m_master_cpu->clock() / 4)); /* video hardware */ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_screen_update(FUNC(sprcros2_state::screen_update)); - screen.set_raw(MAIN_CLOCK/2, 343, 8, 256-8, 262, 16, 240); // TODO: Wrong screen parameters + screen.set_raw(10_MHz_XTAL/2, 320, 8, 256-8, 262, 16, 240); screen.set_palette("palette"); GFXDECODE(config, m_gfxdecode, "palette", gfx_sprcros2); @@ -484,9 +483,9 @@ void sprcros2_state::sprcros2(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); - SN76489(config, "sn1", 10000000/4).add_route(ALL_OUTPUTS, "mono", 0.50); - SN76489(config, "sn2", 10000000/4).add_route(ALL_OUTPUTS, "mono", 0.50); - SN76489(config, "sn3", 10000000/4).add_route(ALL_OUTPUTS, "mono", 0.50); + SN76489(config, "sn1", 10_MHz_XTAL/4).add_route(ALL_OUTPUTS, "mono", 0.50); + SN76489(config, "sn2", 10_MHz_XTAL/4).add_route(ALL_OUTPUTS, "mono", 0.50); + SN76489(config, "sn3", 10_MHz_XTAL/4).add_route(ALL_OUTPUTS, "mono", 0.50); } @@ -496,8 +495,6 @@ void sprcros2_state::sprcros2(machine_config &config) ***************************************************************************/ - - ROM_START( sprcros2 ) ROM_REGION( 0x0c000, "master", 0 ) ROM_LOAD( "scm-03.10g", 0x00000, 0x4000, CRC(b9757908) SHA1(d59cb2aac1b6268fc766306850f5711d4a12d897) ) From 26786bb05364e921041026bcbd708d192054033a Mon Sep 17 00:00:00 2001 From: ClawGrip Date: Tue, 24 Feb 2026 13:12:04 +0100 Subject: [PATCH 031/351] capcom/gng.cpp: Add a mask ROMs version of Ghosts'n Goblins (#15017) New working systems ------------------- Ghosts'n Goblins (World? set 1) [Tailsnic Retroworks] --- src/mame/capcom/gng.cpp | 118 ++++++++++++++++++++++++++++------------ src/mame/mame.lst | 1 + 2 files changed, 83 insertions(+), 36 deletions(-) diff --git a/src/mame/capcom/gng.cpp b/src/mame/capcom/gng.cpp index 90aa6939f6d..9ec3f8f76ca 100644 --- a/src/mame/capcom/gng.cpp +++ b/src/mame/capcom/gng.cpp @@ -631,7 +631,53 @@ void gng_state::diamrun(machine_config &config) ***************************************************************************/ +/* Newer PCB, with visible wires and mask ROMs (85606-A-5 / 85606-B-4). + The ROM contents are a mix between 'gnga' and 'makaimurb'. + + The ROM configuration is set with a jumpers bank at 1F. + Mask ROMs: EPROMs (eg. gnga): + J2 = Short Open + J3 = Short Open + J4 = Open Short + J5 = Short Open + J6 = Open Short + J7 = Short Open +*/ ROM_START( gng ) + ROM_REGION( 0x18000, "maincpu", 0 ) // All EPROMs + ROM_LOAD( "mjg_04.10n", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) // 4000-5fff is page 4 + ROM_LOAD( "mjg_03.8n", 0x08000, 0x8000, CRC(9e01c65e) SHA1(a87880d87c64a6d61313c3bc69c8d49511e0f9c3) ) + ROM_LOAD( "mjg_05.12n", 0x10000, 0x8000, CRC(d6397b2b) SHA1(39aa3cb8c229e60ac0ac410ff61e0c09dba78501) ) // page 0, 1, 2, 3 + + ROM_REGION( 0x10000, "audiocpu", 0 ) // Mask ROM + ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_02.14h", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) // yes, really "CAPSOM" (same goes for the other mask ROMs) + + ROM_REGION( 0x04000, "chars", 0 ) // Mask ROM + ROM_LOAD( "capsom_m5m23256p_p_616105_mjg_01.11e", 0x00000, 0x4000, CRC(1ab9038a) SHA1(907f2e2753f8e11a4addd19c225a5f333ff74344) ) + ROM_IGNORE( 0x4000 ) + + ROM_REGION( 0x18000, "tiles", 0 ) // All mask ROMs + ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_08.3e", 0x00000, 0x8000, CRC(c09a716f) SHA1(d30d31ae8458ac22b61a01bf52dd50788e15c51f) ) // 0-1-2-3 Plane 1 + ROM_LOAD( "capsom_m5m23256p_p_61710z_mmg_07.3c", 0x08000, 0x8000, CRC(0b92b129) SHA1(8e06b03323b470482e068a9d60f0263ac5088876) ) // 0-1-2-3 Plane 2 + ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_06.3b", 0x10000, 0x8000, CRC(830176af) SHA1(1053adf458f2613a3ce6f3eb5d7d917906341d5c) ) // 0-1-2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) // All mask ROMs + ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_12.4n", 0x00000, 0x8000, CRC(dbf05081) SHA1(c0a327e8c1a899a7b6c35ae197f2640b89491dd9) ) // sprites 0 Plane 1-2, sprites 1 Plane 1-2 + ROM_LOAD( "capsom_m5m23256p_p_620108_mjg_11.3n", 0x08000, 0x4000, CRC(cf533077) SHA1(9ad39aa884daaf757668063f6c8a1a2037308441) ) // sprites 2 Plane 1-2 + ROM_IGNORE( 0x4000 ) + ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_10.4l", 0x10000, 0x8000, CRC(5f36734e) SHA1(b0eb666b2ef31c0a801f17cc797bd0d2fdae9511) ) // sprites 0 Plane 3-4, sprites 1 Plane 3-4 + ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_09.3l", 0x18000, 0x4000, CRC(89c71940) SHA1(9dd7decf4c776a2ebcf27a4b71e520774b9563eb) ) // sprites 2 Plane 3-4 + ROM_IGNORE( 0x4000 ) + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "m-02_63s141.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) + ROM_LOAD( "m-01_63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) + + ROM_REGION( 0x0100, "plds", 0 ) + ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) +ROM_END + +ROM_START( gnga ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "gg4.bin", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) // 4000-5fff is page 4 ROM_LOAD( "gg3.bin", 0x08000, 0x8000, CRC(9e01c65e) SHA1(a87880d87c64a6d61313c3bc69c8d49511e0f9c3) ) @@ -667,7 +713,7 @@ ROM_START( gng ) ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) ROM_END -ROM_START( gnga ) +ROM_START( gngb ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "gng.n10", 0x04000, 0x4000, CRC(60343188) SHA1(dfc95d3f23a3a4b05b559f1dc76488b2659fbf66) ) ROM_LOAD( "gng.n9", 0x08000, 0x4000, CRC(b6b91cfb) SHA1(019a38b1c4e987715be1575948a3dc06ee59123d) ) @@ -702,6 +748,39 @@ ROM_START( gnga ) ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) ROM_END +ROM_START( gngc ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "mm_c_04", 0x04000, 0x4000, CRC(4f94130f) SHA1(6863fee3c97c76ba314ccbada7efacb6783e7d32) ) + ROM_LOAD( "mm_c_03", 0x08000, 0x8000, CRC(1def138a) SHA1(d29e12082c4d5c06a9910b3500ef66242cdec905) ) + ROM_LOAD( "mm_c_05", 0x10000, 0x8000, CRC(ed28e86e) SHA1(064871918547a56be330c6994d4db2c9932e14db) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) + + ROM_REGION( 0x18000, "tiles", 0 ) + ROM_LOAD( "gg11.bin", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 + ROM_LOAD( "gg10.bin", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 + ROM_LOAD( "gg9.bin", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 + ROM_LOAD( "gg8.bin", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 + ROM_LOAD( "gg7.bin", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 + ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) + ROM_LOAD( "gg17.bin", 0x00000, 0x4000, CRC(93e50a8f) SHA1(42d367f57bb2fdf60a0445ac1533da99cfeaa617) ) // sprites 0 Plane 1-2 + ROM_LOAD( "gg16.bin", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 + ROM_LOAD( "gg15.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 + ROM_LOAD( "gg14.bin", 0x10000, 0x4000, CRC(6aaf12f9) SHA1(207a7407288182a4f3eddaea634c6a6452131182) ) // sprites 0 Plane 3-4 + ROM_LOAD( "gg13.bin", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 + ROM_LOAD( "gg12.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "tbp24s10.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) + ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) +ROM_END + ROM_START( gngbl ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "5.84490.10n", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) @@ -832,39 +911,6 @@ ROM_START( gngblita ) ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) ROM_END -ROM_START( gngc ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "mm_c_04", 0x04000, 0x4000, CRC(4f94130f) SHA1(6863fee3c97c76ba314ccbada7efacb6783e7d32) ) - ROM_LOAD( "mm_c_03", 0x08000, 0x8000, CRC(1def138a) SHA1(d29e12082c4d5c06a9910b3500ef66242cdec905) ) - ROM_LOAD( "mm_c_05", 0x10000, 0x8000, CRC(ed28e86e) SHA1(064871918547a56be330c6994d4db2c9932e14db) ) - - ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) - - ROM_REGION( 0x04000, "chars", 0 ) - ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) - - ROM_REGION( 0x18000, "tiles", 0 ) - ROM_LOAD( "gg11.bin", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 - ROM_LOAD( "gg10.bin", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 - ROM_LOAD( "gg9.bin", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 - ROM_LOAD( "gg8.bin", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 - ROM_LOAD( "gg7.bin", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 - ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 - - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) - ROM_LOAD( "gg17.bin", 0x00000, 0x4000, CRC(93e50a8f) SHA1(42d367f57bb2fdf60a0445ac1533da99cfeaa617) ) // sprites 0 Plane 1-2 - ROM_LOAD( "gg16.bin", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 - ROM_LOAD( "gg15.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 - ROM_LOAD( "gg14.bin", 0x10000, 0x4000, CRC(6aaf12f9) SHA1(207a7407288182a4f3eddaea634c6a6452131182) ) // sprites 0 Plane 3-4 - ROM_LOAD( "gg13.bin", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 - ROM_LOAD( "gg12.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 - - ROM_REGION( 0x0200, "proms", 0 ) - ROM_LOAD( "tbp24s10.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) - ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) -ROM_END - /* Ghosts'n Goblins (US) @@ -872,7 +918,6 @@ ROM_END CPU/Sound Board: 85606-A-4 Video Board: 85606-B-3 */ - ROM_START( gngt ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "mmt04d.10n", 0x04000, 0x4000, CRC(652406f6) SHA1(3b2bafd31f670ea26c568c48f3bd00597e5a2ed6) ) // 4000-5fff is page 4 @@ -1113,11 +1158,12 @@ ROM_END GAME( 1985, gng, 0, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gnga, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gngb, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 3)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gngc, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 4)", MACHINE_SUPPORTS_SAVE ) // rev c? GAME( 1985, gngbl, gng, gng, gng, gng_state, empty_init, ROT0, "bootleg", "Ghosts'n Goblins (bootleg with Cross)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngbla, gng, gng, gng, gng_state, empty_init, ROT0, "bootleg", "Ghosts'n Goblins (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngprot, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (prototype)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngblita, gng, gng, gng, gng_state, empty_init, ROT0, "bootleg", "Ghosts'n Goblins (Italian bootleg, harder)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, gngc, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 3)", MACHINE_SUPPORTS_SAVE ) // rev c? GAME( 1985, gngt, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom (Taito America license)", "Ghosts'n Goblins (US)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, makaimur, gng, gng, makaimur, gng_state, empty_init, ROT0, "Capcom", "Makaimura (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, makaimurb, gng, gng, makaimur, gng_state, empty_init, ROT0, "Capcom", "Makaimura (Japan revision B)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 1bae2d932f1..ceea72d6b8a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -16120,6 +16120,7 @@ wofr1bl diamrun gng gnga +gngb gngbl gngbla gngblita From f5607a93510c2aefefd76e4c2fb5db70b49d5403 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Tue, 24 Feb 2026 18:39:14 +0100 Subject: [PATCH 032/351] misc/statriv2.cpp: got rid of tag lookups, made use of derived classes and other small cleanups --- src/emu/xtal.cpp | 1 + src/mame/misc/statriv2.cpp | 489 ++++++++++++++++++++----------------- 2 files changed, 265 insertions(+), 225 deletions(-) diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index fa7875faa39..bbed8cd4a8d 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -220,6 +220,7 @@ const double XTAL::known_xtals[] = { 12'292'000, // 12.292_MHz_XTAL Northwest Digitial Systems GP-19 12'324'000, // 12.324_MHz_XTAL Otrona Attache 12'335'600, // 12.3356_MHz_XTAL RasterOps ColorBoard 264 (~784x NTSC line rate) + 12'440'000, // 12.44_MHz_XTAL Status casino / trivia games 12'472'500, // 12.4725_MHz_XTAL Bonanza's Mini Boy 7 12'480'000, // 12.48_MHz_XTAL TRS-80 Model II 12'500'000, // 12.5_MHz_XTAL Red Alert audio board diff --git a/src/mame/misc/statriv2.cpp b/src/mame/misc/statriv2.cpp index c1fe1ba5d42..72b3a135329 100644 --- a/src/mame/misc/statriv2.cpp +++ b/src/mame/misc/statriv2.cpp @@ -70,11 +70,13 @@ Issues: */ #include "emu.h" + #include "cpu/i8085/i8085.h" #include "machine/i8255.h" #include "machine/nvram.h" #include "sound/ay8910.h" #include "video/tms9927.h" + #include "emupal.h" #include "screen.h" #include "speaker.h" @@ -83,69 +85,94 @@ Issues: namespace { -class statriv2_state : public driver_device +class casino_state : public driver_device { public: - statriv2_state(const machine_config &mconfig, device_type type, const char *tag) + casino_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_tms(*this, "tms") - , m_videoram(*this, "videoram") - , m_question_offset(*this, "question_offset") , m_gfxdecode(*this, "gfxdecode") + , m_videoram(*this, "videoram") + , m_tms(*this, "tms") , m_palette(*this, "palette") + , m_coin(*this, "COIN") { } - void statriv2(machine_config &config); - void statusbj(machine_config &config); - void funcsino(machine_config &config); - void tripdraw(machine_config &config); - void statriv2v(machine_config &config); + void statusbj(machine_config &config) ATTR_COLD; + void funcsino(machine_config &config) ATTR_COLD; + void tripdraw(machine_config &config) ATTR_COLD; - void init_addr_xlh(); - void init_addr_lhx(); - void init_addr_lmh(); - void init_addr_lmhe(); - void init_addr_xhl(); - void init_laserdisc(); + void init_laserdisc() ATTR_COLD; int latched_coin_r(); -private: +protected: + virtual void machine_start() override ATTR_COLD; + virtual void video_start() override ATTR_COLD; + required_device m_maincpu; - required_device m_tms; - required_shared_ptr m_videoram; - tilemap_t *m_tilemap = nullptr; - optional_shared_ptr m_question_offset; required_device m_gfxdecode; + required_shared_ptr m_videoram; + + tilemap_t *m_tilemap = nullptr; + + void io_map(address_map &map) ATTR_COLD; + +private: + required_device m_tms; required_device m_palette; - uint8_t m_question_offset_low = 0; - uint8_t m_question_offset_mid = 0; - uint8_t m_question_offset_high = 0; + + required_ioport m_coin; + uint8_t m_latched_coin = 0; uint8_t m_last_coin = 0; - void statriv2_videoram_w(offs_t offset, uint8_t data); - uint8_t question_data_r(); + void videoram_w(offs_t offset, uint8_t data); void ppi_portc_hi_w(uint8_t data); TILE_GET_INFO_MEMBER(horizontal_tile_info); - TILE_GET_INFO_MEMBER(vertical_tile_info); - virtual void video_start() override ATTR_COLD; - void statriv2_palette(palette_device &palette) const; + void palette_init(palette_device &palette) const ATTR_COLD; void check_coin_status(); - DECLARE_VIDEO_START(vertical); - uint32_t screen_update_statriv2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - INTERRUPT_GEN_MEMBER(statriv2_interrupt); - INTERRUPT_GEN_MEMBER(tripdraw_interrupt); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + INTERRUPT_GEN_MEMBER(rst75_interrupt); + INTERRUPT_GEN_MEMBER(rst55_interrupt); - void statriv2_map(address_map &map) ATTR_COLD; - void statusbj_io_map(address_map &map) ATTR_COLD; - void statriv2_io_map(address_map &map) ATTR_COLD; + void program_map(address_map &map) ATTR_COLD; }; +class trivia_state : public casino_state +{ +public: + trivia_state(const machine_config &mconfig, device_type type, const char *tag) + : casino_state(mconfig, type, tag) + , m_question_offset(*this, "question_offset") + , m_questions_rom(*this, "questions") + { } -#define MASTER_CLOCK 12440000 + void statriv2(machine_config &config) ATTR_COLD; + void statriv2v(machine_config &config) ATTR_COLD; + + void init_addr_xlh() ATTR_COLD; + void init_addr_lhx() ATTR_COLD; + void init_addr_lmh() ATTR_COLD; + void init_addr_lmhe() ATTR_COLD; + void init_addr_xhl() ATTR_COLD; + +private: + required_shared_ptr m_question_offset; + required_region_ptr m_questions_rom; + + uint8_t m_question_offset_low = 0; + uint8_t m_question_offset_mid = 0; + uint8_t m_question_offset_high = 0; + + uint8_t question_data_r(); + + TILE_GET_INFO_MEMBER(vertical_tile_info); + DECLARE_VIDEO_START(vertical); + + void io_map(address_map &map) ATTR_COLD; +}; /************************************* @@ -154,18 +181,18 @@ private: * *************************************/ -TILE_GET_INFO_MEMBER(statriv2_state::horizontal_tile_info) +TILE_GET_INFO_MEMBER(casino_state::horizontal_tile_info) { - int code = m_videoram[0x400 + tile_index]; - int attr = m_videoram[tile_index] & 0x3f; + int const code = m_videoram[0x400 + tile_index]; + int const attr = m_videoram[tile_index] & 0x3f; tileinfo.set(0, code, attr, 0); } -TILE_GET_INFO_MEMBER(statriv2_state::vertical_tile_info) +TILE_GET_INFO_MEMBER(trivia_state::vertical_tile_info) { - int code = m_videoram[0x400 + tile_index]; - int attr = m_videoram[tile_index] & 0x3f; + int const code = m_videoram[0x400 + tile_index]; + int const attr = m_videoram[tile_index] & 0x3f; tileinfo.set(0, ((code & 0x7f) << 1) | ((code & 0x80) >> 7), attr, 0); } @@ -178,7 +205,7 @@ TILE_GET_INFO_MEMBER(statriv2_state::vertical_tile_info) * *************************************/ -void statriv2_state::statriv2_palette(palette_device &palette) const +void casino_state::palette_init(palette_device &palette) const { for (int i = 0; i < 64; i++) { @@ -187,14 +214,14 @@ void statriv2_state::statriv2_palette(palette_device &palette) const } } -void statriv2_state::video_start() +void casino_state::video_start() { - m_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(statriv2_state::horizontal_tile_info)), TILEMAP_SCAN_ROWS, 8, 15, 64, 16); + m_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(casino_state::horizontal_tile_info)), TILEMAP_SCAN_ROWS, 8, 15, 64, 16); } -VIDEO_START_MEMBER(statriv2_state,vertical) +VIDEO_START_MEMBER(trivia_state, vertical) { - m_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(statriv2_state::vertical_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(trivia_state::vertical_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); } @@ -205,7 +232,7 @@ VIDEO_START_MEMBER(statriv2_state,vertical) * *************************************/ -void statriv2_state::statriv2_videoram_w(offs_t offset, uint8_t data) +void casino_state::videoram_w(offs_t offset, uint8_t data) { m_videoram[offset] = data; m_tilemap->mark_tile_dirty(offset & 0x3ff); @@ -219,7 +246,7 @@ void statriv2_state::statriv2_videoram_w(offs_t offset, uint8_t data) * *************************************/ -uint32_t statriv2_state::screen_update_statriv2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t casino_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { if (m_tms->screen_reset()) bitmap.fill(m_palette->black_pen(), cliprect); @@ -230,31 +257,42 @@ uint32_t statriv2_state::screen_update_statriv2(screen_device &screen, bitmap_in +/************************************* + * + * Machine start + * + *************************************/ + +void casino_state::machine_start() +{ + save_item(NAME(m_latched_coin)); + save_item(NAME(m_last_coin)); +} + /************************************* * * Interrupt generation * *************************************/ -void statriv2_state::check_coin_status() +void casino_state::check_coin_status() { - uint8_t new_coin = ioport("COIN")->read(); + uint8_t new_coin = m_coin->read(); - /* check the coin inputs once per frame */ + // check the coin inputs once per frame m_latched_coin |= new_coin & (new_coin ^ m_last_coin); m_last_coin = new_coin; } -INTERRUPT_GEN_MEMBER(statriv2_state::statriv2_interrupt) +INTERRUPT_GEN_MEMBER(casino_state::rst75_interrupt) { - if (ioport("COIN")) - check_coin_status(); + check_coin_status(); device.execute().set_input_line(I8085_RST75_LINE, ASSERT_LINE); device.execute().set_input_line(I8085_RST75_LINE, CLEAR_LINE); } -INTERRUPT_GEN_MEMBER(statriv2_state::tripdraw_interrupt) +INTERRUPT_GEN_MEMBER(casino_state::rst55_interrupt) { check_coin_status(); @@ -268,21 +306,17 @@ INTERRUPT_GEN_MEMBER(statriv2_state::tripdraw_interrupt) * *************************************/ -uint8_t statriv2_state::question_data_r() +uint8_t trivia_state::question_data_r() { - const uint8_t *qrom = memregion("questions")->base(); - uint32_t qromsize = memregion("questions")->bytes(); - uint32_t address; - if (m_question_offset_high == 0xff && !machine().side_effects_disabled()) m_question_offset[m_question_offset_low]++; - address = m_question_offset[m_question_offset_low]; + uint32_t address = m_question_offset[m_question_offset_low]; address |= m_question_offset[m_question_offset_mid] << 8; if (m_question_offset_high != 0xff) address |= m_question_offset[m_question_offset_high] << 16; - return (address < qromsize) ? qrom[address] : 0xff; + return (address < m_questions_rom.bytes()) ? m_questions_rom[address] : 0xff; } @@ -293,13 +327,13 @@ uint8_t statriv2_state::question_data_r() * *************************************/ -int statriv2_state::latched_coin_r() +int casino_state::latched_coin_r() { return m_latched_coin; } -void statriv2_state::ppi_portc_hi_w(uint8_t data) +void casino_state::ppi_portc_hi_w(uint8_t data) { data >>= 4; if (data != 0x0f) @@ -313,15 +347,15 @@ void statriv2_state::ppi_portc_hi_w(uint8_t data) * *************************************/ -void statriv2_state::statriv2_map(address_map &map) +void casino_state::program_map(address_map &map) { map(0x0000, 0x3fff).rom(); map(0x4000, 0x43ff).ram(); map(0x4800, 0x48ff).ram().share("nvram"); - map(0xc800, 0xcfff).ram().w(FUNC(statriv2_state::statriv2_videoram_w)).share("videoram"); + map(0xc800, 0xcfff).ram().w(FUNC(casino_state::videoram_w)).share(m_videoram); } -void statriv2_state::statusbj_io_map(address_map &map) +void casino_state::io_map(address_map &map) { map(0x20, 0x23).rw("ppi8255", FUNC(i8255_device::read), FUNC(i8255_device::write)); map(0xb0, 0xb1).w("aysnd", FUNC(ay8910_device::address_data_w)); @@ -329,10 +363,11 @@ void statriv2_state::statusbj_io_map(address_map &map) map(0xc0, 0xcf).rw(m_tms, FUNC(tms9927_device::read), FUNC(tms9927_device::write)); } -void statriv2_state::statriv2_io_map(address_map &map) +void trivia_state::io_map(address_map &map) { - statusbj_io_map(map); - map(0x28, 0x2b).r(FUNC(statriv2_state::question_data_r)).writeonly().share("question_offset"); + casino_state::io_map(map); + + map(0x28, 0x2b).r(FUNC(trivia_state::question_data_r)).writeonly().share(m_question_offset); } @@ -356,13 +391,13 @@ static INPUT_PORTS_START( statusbj ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(statriv2_state::latched_coin_r)) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(casino_state::latched_coin_r)) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coinage ) ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x10, DEF_STR( 1C_4C ) ) PORT_DIPSETTING( 0x20, DEF_STR( 1C_5C ) ) -// PORT_DIPSETTING( 0x30, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x30, DEF_STR( 1C_5C ) ) PORT_DIPNAME( 0x40, 0x40, "DIP switch?" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x40, DEF_STR( On ) ) @@ -389,7 +424,7 @@ static INPUT_PORTS_START( funcsino ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_STAND ) PORT_CODE(KEYCODE_4) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Select Game") PORT_CODE(KEYCODE_S) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(statriv2_state::latched_coin_r)) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(casino_state::latched_coin_r)) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_DIPNAME( 0x10, 0x10, "DIP switch? 10" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) @@ -425,7 +460,7 @@ static INPUT_PORTS_START( tripdraw ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_STAND ) PORT_CODE(KEYCODE_4) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(statriv2_state::latched_coin_r)) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(casino_state::latched_coin_r)) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_DIPNAME( 0x10, 0x10, "DIP switch? 10" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) @@ -461,7 +496,7 @@ static INPUT_PORTS_START( bigcsino ) // flyer shows 8 buttons on the cabinet PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(statriv2_state::latched_coin_r)) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(casino_state::latched_coin_r)) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_DIPNAME( 0x10, 0x10, "DIP switch? 10" ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) @@ -538,7 +573,7 @@ static INPUT_PORTS_START( statriv2 ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Play 1000") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(statriv2_state::latched_coin_r)) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(casino_state::latched_coin_r)) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_SERVICE( 0x10, IP_ACTIVE_HIGH ) PORT_DIPNAME( 0x20, 0x20, "Show Correct Answer" ) @@ -647,6 +682,9 @@ static INPUT_PORTS_START( bbchall ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("COIN") + PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED ) INPUT_PORTS_END /************************************* @@ -682,14 +720,14 @@ GFXDECODE_END * *************************************/ -void statriv2_state::statriv2(machine_config &config) +void casino_state::statusbj(machine_config &config) { - /* basic machine hardware */ - /* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */ - I8085A(config, m_maincpu, MASTER_CLOCK); - m_maincpu->set_addrmap(AS_PROGRAM, &statriv2_state::statriv2_map); - m_maincpu->set_addrmap(AS_IO, &statriv2_state::statriv2_io_map); - m_maincpu->set_vblank_int("screen", FUNC(statriv2_state::statriv2_interrupt)); + // basic machine hardware + // FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! + I8085A(config, m_maincpu, 12.44_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &casino_state::program_map); + m_maincpu->set_addrmap(AS_IO, &casino_state::io_map); + m_maincpu->set_vblank_int("screen", FUNC(casino_state::rst75_interrupt)); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); @@ -700,58 +738,59 @@ void statriv2_state::statriv2(machine_config &config) ppi.in_pa_callback().set_ioport("IN0"); ppi.in_pb_callback().set_ioport("IN1"); ppi.in_pc_callback().set_ioport("IN2"); - ppi.out_pc_callback().set(FUNC(statriv2_state::ppi_portc_hi_w)); + ppi.out_pc_callback().set(FUNC(casino_state::ppi_portc_hi_w)); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(MASTER_CLOCK/2, 384, 0, 320, 270, 0, 240); - screen.set_screen_update(FUNC(statriv2_state::screen_update_statriv2)); + screen.set_raw(12.44_MHz_XTAL / 2, 384, 0, 320, 270, 0, 240); + screen.set_screen_update(FUNC(casino_state::screen_update)); screen.set_palette(m_palette); - TMS9927(config, m_tms, MASTER_CLOCK/2/8).set_char_width(8); + TMS9927(config, m_tms, 12.44_MHz_XTAL / 2 / 8).set_char_width(8); GFXDECODE(config, m_gfxdecode, m_palette, gfx_horizontal); - PALETTE(config, m_palette, FUNC(statriv2_state::statriv2_palette), 2*64); + PALETTE(config, m_palette, FUNC(casino_state::palette_init), 2*64); - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); - AY8910(config, "aysnd", MASTER_CLOCK/8).add_route(ALL_OUTPUTS, "mono", 1.0); + AY8910(config, "aysnd", 12.44_MHz_XTAL / 8).add_route(ALL_OUTPUTS, "mono", 1.0); } -void statriv2_state::statusbj(machine_config &config) +void trivia_state::statriv2(machine_config &config) { - statriv2(config); - m_maincpu->set_addrmap(AS_IO, &statriv2_state::statusbj_io_map); // no question data + statusbj(config); + + m_maincpu->set_addrmap(AS_IO, &trivia_state::io_map); // question data } -void statriv2_state::statriv2v(machine_config &config) +void trivia_state::statriv2v(machine_config &config) { statriv2(config); - /* basic machine hardware */ + // basic machine hardware - subdevice("screen")->set_raw(MASTER_CLOCK/2, 392, 0, 256, 262, 0, 256); + subdevice("screen")->set_raw(12.44_MHz_XTAL / 2, 392, 0, 256, 262, 0, 256); - MCFG_VIDEO_START_OVERRIDE(statriv2_state, vertical) + MCFG_VIDEO_START_OVERRIDE(trivia_state, vertical) m_gfxdecode->set_info(gfx_vertical); } -void statriv2_state::funcsino(machine_config &config) +void casino_state::funcsino(machine_config &config) { statusbj(config); - /* basic machine hardware */ + // basic machine hardware - m_maincpu->set_clock(MASTER_CLOCK/2); /* 3 MHz?? seems accurate */ + m_maincpu->set_clock(12.44_MHz_XTAL / 2); // 3 MHz?? seems accurate } -void statriv2_state::tripdraw(machine_config &config) +void casino_state::tripdraw(machine_config &config) { statusbj(config); - /* basic machine hardware */ - m_maincpu->set_vblank_int("screen", FUNC(statriv2_state::tripdraw_interrupt)); + // basic machine hardware + m_maincpu->set_vblank_int("screen", FUNC(casino_state::rst55_interrupt)); } @@ -784,9 +823,9 @@ ROM_START( statusbj ) ROM_LOAD( "statusbj.vid", 0x0000, 0x0800, CRC(99ade7a2) SHA1(98704ca3a9fcfc4590f850c8ae24445baaed6dfa) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "prom.u17", 0x0000, 0x0020, NO_DUMP ) /* Socketed */ - ROM_LOAD( "prom.u21", 0x0020, 0x0020, NO_DUMP ) /* Soldered in (Color?) */ - ROM_LOAD( "prom.u22", 0x0040, 0x0100, NO_DUMP ) /* Soldered in */ + ROM_LOAD( "prom.u17", 0x0000, 0x0020, NO_DUMP ) // Socketed + ROM_LOAD( "prom.u21", 0x0020, 0x0020, NO_DUMP ) // Soldered in (Color?) + ROM_LOAD( "prom.u22", 0x0040, 0x0100, NO_DUMP ) // Soldered in ROM_END ROM_START( tripdraw ) @@ -798,9 +837,9 @@ ROM_START( tripdraw ) ROM_LOAD( "u36_td0.bin", 0x0000, 0x0800, CRC(2faa1942) SHA1(0205bf9eb86ef1c32f1ae959d0e02001393db3af) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "prom.u17", 0x0000, 0x0020, NO_DUMP ) /* Socketed */ - ROM_LOAD( "prom.u21", 0x0020, 0x0020, NO_DUMP ) /* Soldered in (Color?) */ - ROM_LOAD( "prom.u22", 0x0040, 0x0100, NO_DUMP ) /* Soldered in */ + ROM_LOAD( "prom.u17", 0x0000, 0x0020, NO_DUMP ) // Socketed + ROM_LOAD( "prom.u21", 0x0020, 0x0020, NO_DUMP ) // Soldered in (Color?) + ROM_LOAD( "prom.u22", 0x0040, 0x0100, NO_DUMP ) // Soldered in ROM_END /* @@ -831,9 +870,9 @@ ROM_START( funcsino ) ROM_LOAD( "u36", 0x0000, 0x1000, CRC(79eaf78b) SHA1(9df5f90344bbb9f1d196f35d910bb09fe6f74aa1) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "prom.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed */ - ROM_LOAD( "prom.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) /* Soldered in (Color?) */ - ROM_LOAD( "prom.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "prom.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed + ROM_LOAD( "prom.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) // Soldered in (Color?) + ROM_LOAD( "prom.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( bigcsino ) // 5 in 1 of: Joker Poker, Blackjack, Baccarat, Craps and Race Time @@ -847,9 +886,9 @@ ROM_START( bigcsino ) // 5 in 1 of: Joker Poker, Blackjack, Baccarat, Craps and ROM_LOAD( "bc0k.u36", 0x0000, 0x1000, CRC(baf66e19) SHA1(4b78571e9370453e96e64c08d69b92b4d64e1a41) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "82s123.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed */ - ROM_LOAD( "82s123.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) /* Soldered in (Color?) */ - ROM_LOAD( "82s123.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "82s123.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed + ROM_LOAD( "82s123.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) // Soldered in (Color?) + ROM_LOAD( "82s123.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( hangman ) @@ -861,7 +900,7 @@ ROM_START( hangman ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "main_hang_0b_2732.u36", 0x0000, 0x1000, CRC(e031dbf8) SHA1(ae6d34ad02b2d7deb1665d2420f8399a3ca88585) ) - ROM_REGION( 0x16000, "questions", 0 ) /* question data */ + ROM_REGION( 0x16000, "questions", 0 ) ROM_LOAD( "aux_27c256.8", 0x00000, 0x8000, CRC(c7d76338) SHA1(40e88efd7e250ad867772258eb6dc3b225de781f) ) ROM_LOAD( "aux_2764.1", 0x08000, 0x2000, CRC(a88563c8) SHA1(23cb169268ded6c81494197cfb9b34180667fc8c) ) ROM_LOAD( "aux_2764.2", 0x0a000, 0x2000, CRC(4bddbe3c) SHA1(391012de04e8a3638fac6f173a81cf1f86d8f751) ) @@ -875,9 +914,9 @@ ROM_START( hangman ) ROM_LOAD( "hangman.nv", 0x0000, 0x0100, CRC(4cecee6f) SHA1(bd9fe7bea081c87033993f809ed0b2c727ab5e88) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( trivquiz ) @@ -889,7 +928,7 @@ ROM_START( trivquiz ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "triv1-0f.u7", 0x00000, 0x01000, CRC(af5f434a) SHA1(1e7ae7ad7ea697007a30f5ba89127802a835eddc) ) - ROM_REGION( 0x10000, "questions", 0 ) /* question data */ + ROM_REGION( 0x10000, "questions", 0 ) ROM_LOAD( "qmt11.rom", 0x00000, 0x02000, CRC(82107565) SHA1(28d71340873330df7d15f1bc55cee78a9c7c31a6) ) ROM_LOAD( "qmt12.rom", 0x02000, 0x02000, CRC(68667637) SHA1(df6ad3e624dcad57ce176912931660c6c1780369) ) ROM_LOAD( "qmt13.rom", 0x04000, 0x02000, CRC(e0d01a68) SHA1(22bb2a8628a3764d733748e4f5f3bad881371a29) ) @@ -903,9 +942,9 @@ ROM_START( trivquiz ) ROM_LOAD( "trivquiz.nv", 0x0000, 0x0100, CRC(bd07a964) SHA1(a1fe68d95c79ac99cfca8a468073b5c838e1cd49) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, not verified the same! */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, not verified the same! + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( statriv2 ) @@ -917,7 +956,7 @@ ROM_START( statriv2 ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "trivii0c.u36", 0x00000, 0x01000, CRC(af5f434a) SHA1(1e7ae7ad7ea697007a30f5ba89127802a835eddc) ) - ROM_REGION( 0x10000, "questions", 0 ) /* question data */ + ROM_REGION( 0x10000, "questions", 0 ) ROM_LOAD( "statuspb.u1", 0x00000, 0x02000, CRC(a50c0313) SHA1(f9bf84613e2ebb952a81a10ee1da49a37423b717) ) ROM_LOAD( "statuspb.u2", 0x02000, 0x02000, CRC(0bc03294) SHA1(c4873cd065c9eb237b03a4195332b7629abac327) ) ROM_LOAD( "statuspb.u3", 0x04000, 0x02000, CRC(d1732f3b) SHA1(c4e862bd98f237e1d2ecad430226cba6aba4ebb8) ) @@ -931,9 +970,9 @@ ROM_START( statriv2 ) ROM_LOAD( "statriv2.nv", 0x0000, 0x0100, CRC(3edb2bd1) SHA1(fdda1310f519054eb5e6ea498d27555f96b370eb) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, not verified the same! */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, not verified the same! + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( statriv2v ) @@ -946,10 +985,10 @@ ROM_START( statriv2v ) ROM_LOAD( "status.u36", 0x00000, 0x00800, CRC(ae1d07c0) SHA1(2b657ba58e3ae7cceb8cf23cba3e1f0d20817933) ) // first half is garbage? ROM_CONTINUE(0x0000, 0x800) - /* other roms were not from this set, missing sub-board?, but as the game is 'triv two' like the parent + /* other ROMs were not from this set, missing sub-board?, but as the game is 'triv two' like the parent it seems compatible with the same question board */ - ROM_REGION( 0x10000, "questions", 0 ) /* question data */ + ROM_REGION( 0x10000, "questions", 0 ) ROM_LOAD( "statuspb.u1", 0x00000, 0x02000, CRC(a50c0313) SHA1(f9bf84613e2ebb952a81a10ee1da49a37423b717) ) ROM_LOAD( "statuspb.u2", 0x02000, 0x02000, CRC(0bc03294) SHA1(c4873cd065c9eb237b03a4195332b7629abac327) ) ROM_LOAD( "statuspb.u3", 0x04000, 0x02000, CRC(d1732f3b) SHA1(c4e862bd98f237e1d2ecad430226cba6aba4ebb8) ) @@ -963,9 +1002,9 @@ ROM_START( statriv2v ) ROM_LOAD( "statriv2v.nv", 0x0000, 0x0100, CRC(3a9c7db7) SHA1(3d5a78beed26a73320f1f0748944b7fd87794bc7) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, not verified the same! */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, not verified the same! + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( statriv3 ) // Triv Quiz III ROM PCB. All labels removed. In the labels below, a stands for main PCB, b for ROM PCB. @@ -991,9 +1030,9 @@ ROM_START( statriv3 ) // Triv Quiz III ROM PCB. All labels removed. In the label ROM_LOAD( "statriv3.nv", 0x0000, 0x0100, CRC(60c9b350) SHA1(a2085230fe90f2dbb3dca8b8ae7ca126b4b27188) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ - ROM_LOAD( "74s288.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) /* Soldered in (Color?) */ - ROM_LOAD( "74s287.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, verified + ROM_LOAD( "74s288.u21", 0x0020, 0x0020, CRC(e8f60d23) SHA1(2070b8201b75a13e416f597d6b2473d0027f420c) ) // Soldered in (Color?) + ROM_LOAD( "74s287.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( statriv4 ) @@ -1005,7 +1044,7 @@ ROM_START( statriv4 ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "triv4.u36", 0x00000, 0x01000, CRC(af5f434a) SHA1(1e7ae7ad7ea697007a30f5ba89127802a835eddc) ) - ROM_REGION( 0x10000, "questions", 0 ) /* question data */ + ROM_REGION( 0x10000, "questions", 0 ) ROM_LOAD( "triv4.u41", 0x00000, 0x02000, CRC(aed8eead) SHA1(a615786d11c879875e9b7d3c3593fe0334e79178) ) ROM_LOAD( "triv4.u42", 0x02000, 0x02000, CRC(3354d389) SHA1(527e46e9276f4dfaad57a77f0b549d9d26c59226) ) ROM_LOAD( "triv4.u43", 0x04000, 0x02000, CRC(de7513e8) SHA1(c2e38cb39aacf57edb27cf5ee0b0fd49a44befa3) ) @@ -1019,9 +1058,9 @@ ROM_START( statriv4 ) ROM_LOAD( "statriv4.nv", 0x0000, 0x0100, CRC(ab449099) SHA1(80fe9e07068a1034f8c0b233a7d37f6b40644be5) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, verified + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( statriv5se ) @@ -1033,7 +1072,7 @@ ROM_START( statriv5se ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "tr-4-sped0a.u36", 0x00000, 0x01000, CRC(8e57d527) SHA1(ddb2719fd5d3e8c476e4f10158a9d83e0a759aa4) ) - ROM_REGION( 0x10000, "questions", 0 ) /* question data, not dumped */ + ROM_REGION( 0x10000, "questions", 0 ) ROM_LOAD( "triv5.u41", 0x00000, 0x02000, NO_DUMP ) ROM_LOAD( "triv5.u42", 0x02000, 0x02000, NO_DUMP ) ROM_LOAD( "triv5.u43", 0x04000, 0x02000, NO_DUMP ) @@ -1044,9 +1083,9 @@ ROM_START( statriv5se ) ROM_LOAD( "triv5.u48", 0x0e000, 0x02000, NO_DUMP ) ROM_REGION( 0x0140, "proms", 0 ) // not dumped for this set, probably same as statriv4 - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, BAD_DUMP CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, BAD_DUMP CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, verified + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, BAD_DUMP CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, BAD_DUMP CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( sextriv ) @@ -1058,7 +1097,7 @@ ROM_START( sextriv ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "sex.u36", 0x00000, 0x1000, CRC(fe3fa087) SHA1(356b3fe62b4c600ff5a625bc3e1c53d8143f55df) ) - ROM_REGION( 0x10000, "questions", 0 ) /* question data */ + ROM_REGION( 0x10000, "questions", 0 ) ROM_LOAD( "sex1.bin", 0x00000, 0x2000, CRC(7b55360b) SHA1(c38b1be8cb7c6c40e167c449c75b9ca0596affe9) ) ROM_LOAD( "sex2.bin", 0x02000, 0x2000, CRC(a88563c8) SHA1(23cb169268ded6c81494197cfb9b34180667fc8c) ) ROM_LOAD( "sex3.bin", 0x04000, 0x2000, CRC(da1e00a5) SHA1(d70b0a1ecaf7913cfbf3d218ff05e8511be6ab26) ) @@ -1072,9 +1111,9 @@ ROM_START( sextriv ) ROM_LOAD( "sextriv.nv", 0x0000, 0x0100, CRC(33fae98c) SHA1(11aaca7706460dbad750c11c794bbe20084a8ff6) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( quaquiz2 ) @@ -1087,7 +1126,7 @@ ROM_START( quaquiz2 ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "qquiz.u36", 0x00000, 0x01000, CRC(468dca15) SHA1(4ace7b3cd233f826949b65e2ab71e94ac6a293a0) ) - ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) /* question data - inverted */ + ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) ROM_LOAD( "gst.01", 0x00000, 0x08000, CRC(c0d83049) SHA1(94c750068e550cdaf4f6f5416bc7c160a759dd5a) ) ROM_LOAD( "gst.02", 0x08000, 0x08000, CRC(b844743e) SHA1(4a75e4956c568bad70130a326c0fc691a11ff04c) ) ROM_LOAD( "gst.03", 0x10000, 0x08000, CRC(4c734bc5) SHA1(48171494f183dec01732b2d6a0f2af0c1b173dba) ) @@ -1101,12 +1140,12 @@ ROM_START( quaquiz2 ) ROM_LOAD( "quaquiz2.nv", 0x0000, 0x0100, CRC(dad239cf) SHA1(c46380d7b673a1367f14364ae47cd46ebe080e1b) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, not verified the same! */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, not verified the same! + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END -// Dumper's note: I got the pcb with Triv Quiz (trivquiz) question rom pcb, but I don't think that's the correct one. +// Dumper's note: I got the PCB with Triv Quiz (trivquiz) question ROM PCB, but I don't think that's the correct one. // If you use Triv Quiz question data the game will boot to playable state ROM_START( supertr ) @@ -1130,9 +1169,9 @@ ROM_START( supertr ) ROM_LOAD( "q8.rom", 0x38000, 0x08000, NO_DUMP ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, verified + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( supertr2 ) @@ -1145,7 +1184,7 @@ ROM_START( supertr2 ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "ast2-0d.rom", 0x00000, 0x01000, CRC(a40f9201) SHA1(a87cfc3dbe5cff82926f5f8486c37fd3f4449135) ) - ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) /* question data - inverted */ + ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) ROM_LOAD( "astq2-1.rom", 0x00000, 0x08000, CRC(4af390cb) SHA1(563c6210f2fcc8ee9b5112e2d6f522ddfca2ddea) ) ROM_LOAD( "astq2-2.rom", 0x08000, 0x08000, CRC(91a7b4f6) SHA1(c8ff2e8475ae889be14086a04275df94efd66156) ) ROM_LOAD( "astq2-3.rom", 0x10000, 0x08000, CRC(e6a50944) SHA1(e3fad344d4bedfd14f307445334903c35e745d9b) ) @@ -1156,9 +1195,9 @@ ROM_START( supertr2 ) ROM_LOAD( "astq2-8.rom", 0x38000, 0x08000, CRC(cd2674d5) SHA1(7fb6513172ffe8e3b9e0f4dc9ecdb42d954b1ff0) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, not verified the same! */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, BAD_DUMP CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, not verified the same! + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( supertr3 ) @@ -1171,7 +1210,7 @@ ROM_START( supertr3 ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "triv3.u36", 0x00000, 0x01000, CRC(79277b08) SHA1(e8de06809853e030d1ee29a788f9bc8ff7175af0) ) - ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) /* question data - inverted */ + ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) ROM_LOAD( "triv3.u41", 0x00000, 0x08000, CRC(d62960c4) SHA1(d6f7dbdb016c14ca1cab5a0e965c9ae40dcbbc28) ) ROM_LOAD( "triv3.u42", 0x08000, 0x08000, CRC(6d50fec9) SHA1(6edb3ed92781e8961eacc342c0bceeb052b81a3e) ) ROM_LOAD( "triv3.u43", 0x10000, 0x08000, CRC(8c0a73de) SHA1(2a7175b7845b26b8d0d53279cd8793edee95d3a1) ) @@ -1182,9 +1221,9 @@ ROM_START( supertr3 ) ROM_LOAD( "triv3.u48", 0x38000, 0x08000, CRC(1a99b268) SHA1(6369c79f645962b4a2f85b18e9d93c3cc65defc1) ) ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, verified + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( nsupertr3 ) @@ -1197,7 +1236,7 @@ ROM_START( nsupertr3 ) ROM_REGION( 0x1000, "tiles", ROMREGION_INVERT ) ROM_LOAD( "triv3.u36", 0x00000, 0x01000, CRC(79277b08) SHA1(e8de06809853e030d1ee29a788f9bc8ff7175af0) ) - ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) /* question data - inverted */ + ROM_REGION( 0x40000, "questions", ROMREGION_INVERT ) ROM_LOAD( "astqiii-1.bin", 0x00000, 0x08000, CRC(d62960c4) SHA1(d6f7dbdb016c14ca1cab5a0e965c9ae40dcbbc28) ) ROM_LOAD( "astqiii-2.bin", 0x08000, 0x08000, CRC(fdd5a792) SHA1(aeff26f919abc5bbeb1903c674a5d59f5e7aed27) ) // different from set supertrv3 ROM_LOAD( "astqiii-3.bin", 0x10000, 0x08000, CRC(8c0a73de) SHA1(2a7175b7845b26b8d0d53279cd8793edee95d3a1) ) @@ -1208,9 +1247,9 @@ ROM_START( nsupertr3 ) ROM_LOAD( "astqiii-8.bin", 0x38000, 0x08000, CRC(c2141a9e) SHA1(7e6a32b5b49d53936192eb87bf8bd7a5977d7597) ) // different from set supertrv3 ROM_REGION( 0x0140, "proms", 0 ) - ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) /* Socketed, verified */ - ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) /* Soldered in (Color?) */ - ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) /* Soldered in */ + ROM_LOAD( "dm74s288.u17", 0x0000, 0x0020, CRC(63b8a63e) SHA1(d59ad84edd583f7befce73b79e12dfb58a204c4f) ) // Socketed, verified + ROM_LOAD( "dm74s288.u21", 0x0020, 0x0020, CRC(853d6172) SHA1(4aaab0faeaa1a07ee883fbed021f8dcd7e0ba549) ) // Soldered in (Color?) + ROM_LOAD( "dm74s282.u22", 0x0040, 0x0100, CRC(0421b8e0) SHA1(8b786eed86397a1463ad37b9b011edf83d76dd63) ) // Soldered in ROM_END ROM_START( bbchall ) // ROMs came from a blister, Baby Boom Challenge title found in bbu2.2b @@ -1609,39 +1648,39 @@ ROM_END * *************************************/ -/* question address is stored as L/H/X (low/high/don't care) */ -void statriv2_state::init_addr_lhx() +// question address is stored as L/H/X (low/high/don't care) +void trivia_state::init_addr_lhx() { m_question_offset_low = 0; m_question_offset_mid = 1; m_question_offset_high = 0xff; } -/* question address is stored as X/L/H (don't care/low/high) */ -void statriv2_state::init_addr_xlh() +// question address is stored as X/L/H (don't care/low/high) +void trivia_state::init_addr_xlh() { m_question_offset_low = 1; m_question_offset_mid = 2; m_question_offset_high = 0xff; } -/* question address is stored as X/H/L (don't care/high/low) */ -void statriv2_state::init_addr_xhl() +// question address is stored as X/H/L (don't care/high/low) +void trivia_state::init_addr_xhl() { m_question_offset_low = 2; m_question_offset_mid = 1; m_question_offset_high = 0xff; } -/* question address is stored as L/M/H (low/mid/high) */ -void statriv2_state::init_addr_lmh() +// question address is stored as L/M/H (low/mid/high) +void trivia_state::init_addr_lmh() { m_question_offset_low = 0; m_question_offset_mid = 1; m_question_offset_high = 2; } -void statriv2_state::init_addr_lmhe() +void trivia_state::init_addr_lmhe() { /***************************************************\ * * @@ -1705,17 +1744,13 @@ void statriv2_state::init_addr_lmhe() * * \***************************************************/ - uint8_t *qrom = memregion("questions")->base(); - uint32_t length = memregion("questions")->bytes(); - uint32_t address; - - for (address = 0; address < length; address++) - qrom[address] ^= bitswap<8>(address, 4,3,3,2,2,1,1,0); + for (uint32_t address = 0; address < m_questions_rom.bytes(); address++) + m_questions_rom[address] ^= bitswap<8>(address, 4, 3, 3, 2, 2, 1, 1, 0); init_addr_lmh(); } -void statriv2_state::init_laserdisc() +void casino_state::init_laserdisc() { address_space &iospace = m_maincpu->space(AS_IO); iospace.install_readwrite_handler(0x28, 0x2b, @@ -1743,42 +1778,46 @@ void statriv2_state::init_laserdisc() * *************************************/ -GAME( 1981, statusbj, 0, statusbj, statusbj, statriv2_state, empty_init, ROT0, "Status Games", "Status Black Jack (V1.0c)", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, funcsino, 0, funcsino, funcsino, statriv2_state, empty_init, ROT0, "Status Games", "Status Fun Casino (V1.3s)", MACHINE_SUPPORTS_SAVE ) -GAME( 1981, tripdraw, 0, tripdraw, tripdraw, statriv2_state, empty_init, ROT0, "Status Games", "Tripple Draw (V3.1 s)", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, bigcsino, 0, statusbj, bigcsino, statriv2_state, empty_init, ROT0, "Status Games", "Big Casino", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, hangman, 0, statriv2, hangman, statriv2_state, init_addr_lmh, ROT0, "Status Games", "Hangman", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, trivquiz, 0, statriv2, statriv2, statriv2_state, init_addr_lhx, ROT0, "Status Games", "Triv Quiz", MACHINE_SUPPORTS_SAVE ) -GAME( 1984, statriv2, 0, statriv2, statriv2, statriv2_state, init_addr_xlh, ROT0, "Status Games", "Triv Two", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, statriv2v, statriv2, statriv2v, statriv2, statriv2_state, init_addr_xlh, ROT90, "Status Games", "Triv Two (Vertical)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, statriv3, 0, statriv2, statriv2, statriv2_state, init_addr_xhl, ROT0, "Status Games", "Triv III", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, statriv4, 0, statriv2, statriv4, statriv2_state, init_addr_xhl, ROT0, "Status Games", "Triv Four", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, statriv5se, statriv4, statriv2, statriv4, statriv2_state, init_addr_xhl, ROT0, "Status Games", "Triv Five Special Edition", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // missing questions' ROMs -GAME( 1985, sextriv, 0, statriv2, sextriv, statriv2_state, init_addr_lhx, ROT0, "Status Games", "Sex Triv", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, quaquiz2, 0, statriv2, quaquiz2, statriv2_state, init_addr_lmh, ROT0, "Status Games", "Quadro Quiz II", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1985, supertr, 0, statriv2, supertr2, statriv2_state, init_addr_lhx, ROT0, "Status Games", "Super Triv Quiz I", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // missing questions' ROMs -GAME( 1986, bbchall, 0, statriv2, bbchall, statriv2_state, empty_init, ROT0, "Status Games", "Baby Boom Challenge", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // wrong satellite board message at startup. Also missing questions' ROMs. -GAME( 1986, supertr2, 0, statriv2, supertr2, statriv2_state, init_addr_lmhe, ROT0, "Status Games", "Super Triv II", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, supertr3, 0, statriv2, supertr2, statriv2_state, init_addr_lmh, ROT0, "Status Games", "Super Triv III", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, nsupertr3, supertr3, statriv2, supertr2, statriv2_state, init_addr_lmh, ROT0, "Status Games", "New Super Triv III", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // new questions don't appear correctly, coinage problems -// The following Casino Strip sets don't show the version on screen (at least without the laserdisc video). It was taken from the rom labels / from the Dragon's Lair Project archive. -GAME( 1984, cs1_spp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip I (Poker version, for Pioneer LD, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1984, cs1_spp2, cs1_spp, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip I (Poker version, for Pioneer LD, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs2_sps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip II (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1992, cs3_qps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip III (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1985, cs5_spp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip V (Poker version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1985, cs5_ssp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip V (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs6_sps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VI (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1985, cs6_ssp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VI (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1986, cs8_ssp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VIII (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1985, cs8_spp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VIII (Poker version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs8_sps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VIII (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1992, cs9_qps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip IX (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1985, cs9_spp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip IX (Poker version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs10_sps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip X (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs11_ssp, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XI (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs11_sps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XI (Poker version, for Sony LD, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs11_sps2, cs11_sps, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XI (Poker version, for Sony LD, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1988, cs12_sps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XII (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1996, cspe_qps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip Private Eyes / All Start (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) -GAME( 1993, csv1_qps, 0, statusbj, funcsino, statriv2_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip Vivid 1 (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +// card games +GAME( 1981, statusbj, 0, statusbj, statusbj, casino_state, empty_init, ROT0, "Status Games", "Status Black Jack (V1.0c)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, funcsino, 0, funcsino, funcsino, casino_state, empty_init, ROT0, "Status Games", "Status Fun Casino (V1.3s)", MACHINE_SUPPORTS_SAVE ) +GAME( 1981, tripdraw, 0, tripdraw, tripdraw, casino_state, empty_init, ROT0, "Status Games", "Tripple Draw (V3.1 s)", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, bigcsino, 0, statusbj, bigcsino, casino_state, empty_init, ROT0, "Status Games", "Big Casino", MACHINE_SUPPORTS_SAVE ) + +// trivia +GAME( 1984, hangman, 0, statriv2, hangman, trivia_state, init_addr_lmh, ROT0, "Status Games", "Hangman", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, trivquiz, 0, statriv2, statriv2, trivia_state, init_addr_lhx, ROT0, "Status Games", "Triv Quiz", MACHINE_SUPPORTS_SAVE ) +GAME( 1984, statriv2, 0, statriv2, statriv2, trivia_state, init_addr_xlh, ROT0, "Status Games", "Triv Two", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, statriv2v, statriv2, statriv2v, statriv2, trivia_state, init_addr_xlh, ROT90, "Status Games", "Triv Two (Vertical)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, statriv3, 0, statriv2, statriv2, trivia_state, init_addr_xhl, ROT0, "Status Games", "Triv III", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, statriv4, 0, statriv2, statriv4, trivia_state, init_addr_xhl, ROT0, "Status Games", "Triv Four", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, statriv5se, statriv4, statriv2, statriv4, trivia_state, init_addr_xhl, ROT0, "Status Games", "Triv Five Special Edition", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // missing questions' ROMs +GAME( 1985, sextriv, 0, statriv2, sextriv, trivia_state, init_addr_lhx, ROT0, "Status Games", "Sex Triv", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, quaquiz2, 0, statriv2, quaquiz2, trivia_state, init_addr_lmh, ROT0, "Status Games", "Quadro Quiz II", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1985, supertr, 0, statriv2, supertr2, trivia_state, init_addr_lhx, ROT0, "Status Games", "Super Triv Quiz I", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // missing questions' ROMs +GAME( 1986, bbchall, 0, statriv2, bbchall, trivia_state, empty_init, ROT0, "Status Games", "Baby Boom Challenge", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // wrong satellite board message at startup. Also missing questions' ROMs. +GAME( 1986, supertr2, 0, statriv2, supertr2, trivia_state, init_addr_lmhe, ROT0, "Status Games", "Super Triv II", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, supertr3, 0, statriv2, supertr2, trivia_state, init_addr_lmh, ROT0, "Status Games", "Super Triv III", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, nsupertr3, supertr3, statriv2, supertr2, trivia_state, init_addr_lmh, ROT0, "Status Games", "New Super Triv III", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) // new questions don't appear correctly, coinage problems + +// The following Casino Strip sets don't show the version on screen (at least without the laserdisc video). It was taken from the ROM labels / from the Dragon's Lair Project archive. +GAME( 1984, cs1_spp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip I (Poker version, for Pioneer LD, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1984, cs1_spp2, cs1_spp, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip I (Poker version, for Pioneer LD, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs2_sps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip II (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1992, cs3_qps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip III (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1985, cs5_spp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip V (Poker version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1985, cs5_ssp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip V (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs6_sps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VI (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1985, cs6_ssp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VI (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1986, cs8_ssp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VIII (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1985, cs8_spp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VIII (Poker version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs8_sps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip VIII (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1992, cs9_qps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip IX (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1985, cs9_spp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip IX (Poker version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs10_sps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip X (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs11_ssp, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XI (Shooting Game version, for Pioneer LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs11_sps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XI (Poker version, for Sony LD, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs11_sps2, cs11_sps, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XI (Poker version, for Sony LD, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1988, cs12_sps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Status Games", "Casino Strip XII (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1996, cspe_qps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip Private Eyes / All Start (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) +GAME( 1993, csv1_qps, 0, statusbj, funcsino, casino_state, init_laserdisc, ROT0, "Quantum Industries", "Casino Strip Vivid 1 (Poker version, for Sony LD)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) From 35a4120c2adf1e32b54cf939169248282dba8ed8 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 25 Feb 2026 05:12:21 +1100 Subject: [PATCH 033/351] formats/mz_cas.cpp: Fixed gross copy/pasta. The new function was just the old function copy/pasted with the comments stripped out and some constants changed. That just causes duplicate maintenance. --- src/lib/formats/mz_cas.cpp | 585 ++++++++++++----------------------- src/mame/philips/cdicdic.cpp | 2 +- src/mame/tvgames/xavix.cpp | 32 +- 3 files changed, 212 insertions(+), 407 deletions(-) diff --git a/src/lib/formats/mz_cas.cpp b/src/lib/formats/mz_cas.cpp index 6f3a036955e..5eb2af7cce8 100644 --- a/src/lib/formats/mz_cas.cpp +++ b/src/lib/formats/mz_cas.cpp @@ -2,6 +2,8 @@ // copyright-holders:Nathan Woods #include "mz_cas.h" +#include "util/coretmpl.h" // BIT + #include #ifndef VERBOSE @@ -9,149 +11,159 @@ #endif //#define LOG(N,M,A) -// if(VERBOSE>=N){ if( M )LOG_FORMATS("%11.6f: %-24s",machine.time().as_double(), (const char*)M ); LOG_FORMATS A; } +// if (VERBOSE>=N) { if( M )LOG_FORMATS("%11.6f: %-24s",machine.time().as_double(), (const char*)M ); LOG_FORMATS A; } #define LOG(N,M,A) \ - if(VERBOSE>=N){ if( M )printf("%-24s",(const char*)M ); printf A; } + do { if (VERBOSE >= (N)) { if (M) printf("%-24s", (const char*)M); printf A; } } while (false) -static constexpr int LO = -32768; -static constexpr int HI = +32767; +namespace { -static constexpr int SHORT_PULSE = 2; -static constexpr int LONG_PULSE = 4; - -/* MZ-80B @ 48 kHz: 16 samples = 333µs, 32 samples = 666µs (8x MZ-700 resolution) */ -static constexpr int SHORT_PULSE_MZ80B = 16; -static constexpr int LONG_PULSE_MZ80B = 32; - -static constexpr int BYTE_SAMPLES = (LONG_PULSE+8*LONG_PULSE); -static constexpr int BYTE_SAMPLES_MZ80B = (LONG_PULSE_MZ80B+8*LONG_PULSE_MZ80B); - -static constexpr int SILENCE = 8000; - -/* long gap and tape mark */ -static constexpr int LGAP = 22000; -static constexpr int LGAP_MZ80B = 10000; /* MZ-80B uses 10,000 pulses (vs 22,000 for MZ-700) */ -static constexpr int LTM_1 = 40; -static constexpr int LTM_0 = 40; -static constexpr int LTM_L = 1; - -/* short gap and tape mark */ -static constexpr int SGAP = 11000; -static constexpr int SGAP_MZ80B = 5000; /* MZ-80B uses 5,000 pulses (proportional to LGAP) */ -static constexpr int STM_1 = 20; -static constexpr int STM_0 = 20; -static constexpr int STM_L = 1; - -static int fill_wave_1(int16_t *buffer, int offs) +struct mz_cass_params { - buffer[offs++] = HI; - buffer[offs++] = HI; - buffer[offs++] = LO; - buffer[offs++] = LO; - return LONG_PULSE; + int SHORT_PULSE, LONG_PULSE; + int SILENCE; + int LGAP, LTM_1, LTM_0, LTM_L; + int SGAP, STM_1, STM_0, STM_L; + + constexpr int byte_samples() const { return LONG_PULSE + (8 * LONG_PULSE); } + constexpr int wavesamples_header() const + { + return + LGAP * SHORT_PULSE + + LTM_1 * LONG_PULSE + + LTM_0 * SHORT_PULSE + + LTM_L * LONG_PULSE + + 2 * 2 * byte_samples() + + SILENCE + + SGAP * SHORT_PULSE + + STM_1 * LONG_PULSE + + STM_0 * SHORT_PULSE + + STM_L * LONG_PULSE + + 2 * 2 * byte_samples(); + } +}; + +constexpr int LO = -32768; +constexpr int HI = +32767; + +static constexpr mz_cass_params MZ700_PARAMS +{ + 2, // SHORT_PULSE + 4, // LONG_PULSE + + 8000, // SILENCE + + // long gap and tape mark + 22000, // LGAP + 40, // LTM_1 + 40, // LTM_0 + 1, // LTM_L + + 11000, // SGAP + 20, // STM_1 + 20, // STM_0 + 1 // STM_L +}; + +// MZ-80B @ 48 kHz, LGAP 10k, SGAP 5k, 16/32 sample pulses for sharp edges +// 16 samples = 333µs, 32 samples = 666µs (8x MZ-700 resolution) +static constexpr mz_cass_params MZ80B_PARAMS +{ + 16, // SHORT_PULSE + 32, // LONG_PULSE + + 8000, // SILENCE + + // long gap and tape mark + 10000, // LGAP - MZ-80B uses 10,000 pulses (vs 22,000 for MZ-700) + 40, // LTM_1 + 40, // LTM_0 + 1, // LTM_L + + 5000, // SGAP - MZ-80B uses 5,000 pulses (proportional to LGAP) + 20, // STM_1 + 20, // STM_0 + 1 // STM_L +}; + +template +int fill_wave_0(int16_t *buffer, int offs) +{ + for (int i = 0; i < Params.SHORT_PULSE / 2; i++) + buffer[offs + i] = HI; + for (int i = Params.SHORT_PULSE / 2; i < Params.SHORT_PULSE; i++) + buffer[offs + i] = LO; + return Params.SHORT_PULSE; } -static int fill_wave_0(int16_t *buffer, int offs) +template +int fill_wave_1(int16_t *buffer, int offs) { - buffer[offs++] = HI; - buffer[offs++] = LO; - return SHORT_PULSE; + for (int i = 0; i < Params.LONG_PULSE / 2; i++) + buffer[offs + i] = HI; + for (int i = Params.LONG_PULSE / 2; i < Params.LONG_PULSE; i++) + buffer[offs + i] = LO; + return Params.LONG_PULSE; } -static int fill_wave_b(int16_t *buffer, int offs, int byte) +template +int fill_wave_b(int16_t *buffer, int offs, int byte) { - int i, count = 0; + int count = 0; /* data bits are preceded by a long pulse */ - count += fill_wave_1(buffer, offs + count); + count += fill_wave_1(buffer, offs + count); - for( i = 7; i >= 0; i-- ) + for (int i = 7; i >= 0; i--) { - if( (byte >> i) & 1 ) - count += fill_wave_1(buffer, offs + count); + if (util::BIT(byte, i)) + count += fill_wave_1(buffer, offs + count); else - count += fill_wave_0(buffer, offs + count); + count += fill_wave_0(buffer, offs + count); } return count; } -/* MZ-80B @ 48 kHz: 16/32 samples per pulse for sharp edges */ -static int fill_wave_0_mz80b(int16_t *buffer, int offs) +template +int fill_wave(int16_t *buffer, int length, const uint8_t *code, int) { - int i; - for (i = 0; i < SHORT_PULSE_MZ80B / 2; i++) - buffer[offs + i] = HI; - for (i = SHORT_PULSE_MZ80B / 2; i < SHORT_PULSE_MZ80B; i++) - buffer[offs + i] = LO; - return SHORT_PULSE_MZ80B; -} + const int BYTE_SAMPLES = Params.LONG_PULSE + (8 * Params.LONG_PULSE); -static int fill_wave_1_mz80b(int16_t *buffer, int offs) -{ - int i; - for (i = 0; i < LONG_PULSE_MZ80B / 2; i++) - buffer[offs + i] = HI; - for (i = LONG_PULSE_MZ80B / 2; i < LONG_PULSE_MZ80B; i++) - buffer[offs + i] = LO; - return LONG_PULSE_MZ80B; -} - -static int fill_wave_b_mz80b(int16_t *buffer, int offs, int byte) -{ - int i, count = 0; - - count += fill_wave_1_mz80b(buffer, offs + count); - - for( i = 7; i >= 0; i-- ) - { - if( (byte >> i) & 1 ) - count += fill_wave_1_mz80b(buffer, offs + count); - else - count += fill_wave_0_mz80b(buffer, offs + count); - } - return count; -} - -static int fill_wave(int16_t *buffer, int length, const uint8_t *code, int) -{ static int16_t *beg; static uint16_t csum = 0; static int header = 1, bytecount = 0; int count = 0; - if( code == CODE_HEADER ) + if (code == CODE_HEADER) { - int i; - /* is there insufficient space for the LGAP? */ - if( count + LGAP * SHORT_PULSE > length ) + if (count + Params.LGAP * Params.SHORT_PULSE > length) return -1; - LOG(1,"mz700 fill_wave",("LGAP %d samples\n", LGAP * SHORT_PULSE)); + LOG(1,"mz_cass fill_wave",("LGAP %d samples\n", Params.LGAP * Params.SHORT_PULSE)); /* fill long gap */ - for( i = 0; i < LGAP; i++ ) - count += fill_wave_0(buffer, count); + for (int i = 0; i < Params.LGAP; i++) + count += fill_wave_0(buffer, count); /* make a long tape mark */ /* is there insufficient space for the LTM 1? */ - if( count + LTM_1 * LONG_PULSE > length ) + if (count + Params.LTM_1 * Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("LTM 1 %d samples\n", LTM_1 * LONG_PULSE)); - for( i = 0; i < LTM_1; i++ ) - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("LTM 1 %d samples\n", Params.LTM_1 * Params.LONG_PULSE)); + for (int i = 0; i < Params.LTM_1; i++) + count += fill_wave_1(buffer, count); /* is there insufficient space for the LTM 0? */ - if( count + LTM_0 * SHORT_PULSE > length ) + if (count + Params.LTM_0 * Params.SHORT_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("LTM 0 %d samples\n", LTM_0 * SHORT_PULSE)); - for( i = 0; i < LTM_0; i++ ) - count += fill_wave_0(buffer, count); + LOG(1,"mz_cass fill_wave",("LTM 0 %d samples\n", Params.LTM_0 * Params.SHORT_PULSE)); + for (int i = 0; i < Params.LTM_0; i++) + count += fill_wave_0(buffer, count); /* is there insufficient space for the L? */ - if( count + LTM_L * LONG_PULSE > length ) + if (count + Params.LTM_L * Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE)); - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("L %d samples\n", Params.LONG_PULSE)); + count += fill_wave_1(buffer, count); /* reset header, bytecount and checksum */ header = 1; @@ -164,143 +176,141 @@ static int fill_wave(int16_t *buffer, int length, const uint8_t *code, int) return count; } - if( code == CODE_TRAILER ) + if (code == CODE_TRAILER) { - int i, file_length; int16_t *end = buffer; /* is there insufficient space for the CHKF? */ - if( count + 2 * BYTE_SAMPLES > length ) + if (count + 2 * BYTE_SAMPLES > length) return -1; - LOG(1,"mz700_fill_wave",("CHKF 0x%04X\n", csum)); - count += fill_wave_b(buffer, count, csum >> 8); - count += fill_wave_b(buffer, count, csum & 0xff); + LOG(1,"mz_cass fill_wave",("CHKF 0x%04X\n", csum)); + count += fill_wave_b(buffer, count, csum >> 8); + count += fill_wave_b(buffer, count, csum & 0xff); /* is there insufficient space for the L */ - if( count + LTM_L * LONG_PULSE > length ) + if (count + Params.LTM_L * Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("L\n")); - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("L\n")); + count += fill_wave_1(buffer, count); /* is there insufficient space for the 256S pulses? */ - if( count + 256 * SHORT_PULSE > length ) + if (count + 256 * Params.SHORT_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("256S\n")); - for (i = 0; i < 256; i++) - count += fill_wave_0(buffer, count); + LOG(1,"mz_cass fill_wave",("256S\n")); + for (int i = 0; i < 256; i++) + count += fill_wave_0(buffer, count); - file_length = (int)(end - beg) / sizeof(int16_t); + const int file_length = int(end - beg) / sizeof(int16_t); /* is there insufficient space for the FILEC ? */ - if( count + file_length > length ) + if (count + file_length > length) return -1; - LOG(1,"mz700_fill_wave",("FILEC %d samples\n", file_length)); + LOG(1,"mz_cass fill_wave",("FILEC %d samples\n", file_length)); memcpy(buffer + count, beg, file_length * sizeof(int16_t)); count += file_length; /* is there insufficient space for the CHKF ? */ - if( count + 2 * BYTE_SAMPLES > length ) + if (count + 2 * BYTE_SAMPLES > length) return -1; - LOG(1,"mz700_fill_wave",("CHKF 0x%04X\n", csum)); - count += fill_wave_b(buffer, count, csum >> 8); - count += fill_wave_b(buffer, count, csum & 0xff); + LOG(1,"mz_cass fill_wave",("CHKF 0x%04X\n", csum)); + count += fill_wave_b(buffer, count, csum >> 8); + count += fill_wave_b(buffer, count, csum & 0xff); /* is there insufficient space for the L ? */ - if( count + STM_L * LONG_PULSE > length ) + if (count + Params.STM_L * Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE)); - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("L %d samples\n", Params.LONG_PULSE)); + count += fill_wave_1(buffer, count); - LOG(1,"mz700_fill_wave",("silence %d samples\n", SILENCE)); + LOG(1,"mz_cass fill_wave",("silence %d samples\n", Params.SILENCE)); /* silence at the end */ - for( i = 0; i < SILENCE; i++ ) + for (int i = 0; i < Params.SILENCE; i++) buffer[count++] = 0; return count; } - if( header == 1 && bytecount == 128 ) + if (header == 1 && bytecount == 128) { - int i, hdr_length; int16_t *end = buffer; /* is there insufficient space for the CHKH ? */ - if( count + 2 * BYTE_SAMPLES > length ) + if (count + 2 * BYTE_SAMPLES > length) return -1; - LOG(1,"mz700_fill_wave",("CHKH 0x%04X\n", csum & 0xffff)); - count += fill_wave_b(buffer, count, (csum >> 8) & 0xff); - count += fill_wave_b(buffer, count, csum & 0xff); + LOG(1,"mz_cass fill_wave",("CHKH 0x%04X\n", csum & 0xffff)); + count += fill_wave_b(buffer, count, (csum >> 8) & 0xff); + count += fill_wave_b(buffer, count, csum & 0xff); /* is there insufficient space for the L ? */ - if( count + LONG_PULSE > length ) + if (count + Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE)); - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("L %d samples\n", Params.LONG_PULSE)); + count += fill_wave_1(buffer, count); /* is there insufficient space for the 256S ? */ - if( count + 256 * SHORT_PULSE > length ) + if (count + 256 * Params.SHORT_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("256S\n")); - for (i = 0; i < 256; i++) - count += fill_wave_0(buffer, count); + LOG(1,"mz_cass fill_wave",("256S\n")); + for (int i = 0; i < 256; i++) + count += fill_wave_0(buffer, count); - hdr_length = (int)(end - beg) / sizeof(int16_t); + const int hdr_length = int(end - beg) / sizeof(int16_t); /* is there insufficient space for the HDRC ? */ - if( count + hdr_length > length ) + if (count + hdr_length > length) return -1; - LOG(1,"mz700_fill_wave",("HDRC %d samples\n", hdr_length)); + LOG(1,"mz_cass fill_wave",("HDRC %d samples\n", hdr_length)); memcpy(buffer + count, beg, hdr_length * sizeof(int16_t)); count += hdr_length; /* is there insufficient space for CHKH ? */ - if( count + 2 * BYTE_SAMPLES > length ) + if (count + 2 * BYTE_SAMPLES > length) return -1; - LOG(1,"mz700_fill_wave",("CHKH 0x%04X\n", csum & 0xffff)); - count += fill_wave_b(buffer, count, (csum >> 8) & 0xff); - count += fill_wave_b(buffer, count, csum & 0xff); + LOG(1,"mz_cass fill_wave",("CHKH 0x%04X\n", csum & 0xffff)); + count += fill_wave_b(buffer, count, (csum >> 8) & 0xff); + count += fill_wave_b(buffer, count, csum & 0xff); /* is there insufficient space for the L ? */ - if( count + LONG_PULSE > length ) + if (count + Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE)); - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("L %d samples\n", Params.LONG_PULSE)); + count += fill_wave_1(buffer, count); /* is there sufficient space for the SILENCE? */ - if( count + SILENCE > length ) + if (count + Params.SILENCE > length) return -1; - LOG(1,"mz700_fill_wave",("SILENCE %d samples\n", SILENCE)); + LOG(1,"mz_cass fill_wave",("SILENCE %d samples\n", Params.SILENCE)); /* fill silence */ - for( i = 0; i < SILENCE; i++ ) + for (int i = 0; i < Params.SILENCE; i++) buffer[count++] = 0; /* is there sufficient space for the SGAP? */ - if( count + SGAP * SHORT_PULSE > length ) + if (count + Params.SGAP * Params.SHORT_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("SGAP %d samples\n", SGAP * SHORT_PULSE)); + LOG(1,"mz_cass fill_wave",("SGAP %d samples\n", Params.SGAP * Params.SHORT_PULSE)); /* fill short gap */ - for( i = 0; i < SGAP; i++ ) - count += fill_wave_0(buffer, count); + for (int i = 0; i < Params.SGAP; i++) + count += fill_wave_0(buffer, count); /* make a short tape mark */ /* is there sufficient space for the STM 1? */ - if( count + STM_1 * LONG_PULSE > length ) + if (count + Params.STM_1 * Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("STM 1 %d samples\n", STM_1 * LONG_PULSE)); - for( i = 0; i < STM_1; i++ ) - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("STM 1 %d samples\n", Params.STM_1 * Params.LONG_PULSE)); + for (int i = 0; i < Params.STM_1; i++) + count += fill_wave_1(buffer, count); /* is there sufficient space for the STM 0? */ - if( count + STM_0 * SHORT_PULSE > length ) + if (count + Params.STM_0 * Params.SHORT_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("STM 0 %d samples\n", STM_0 * SHORT_PULSE)); - for( i = 0; i < STM_0; i++ ) - count += fill_wave_0(buffer, count); + LOG(1,"mz_cass fill_wave",("STM 0 %d samples\n", Params.STM_0 * Params.SHORT_PULSE)); + for (int i = 0; i < Params.STM_0; i++) + count += fill_wave_0(buffer, count); /* is there sufficient space for the L? */ - if( count + STM_L * LONG_PULSE > length ) + if (count + Params.STM_L * Params.LONG_PULSE > length) return -1; - LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE)); - count += fill_wave_1(buffer, count); + LOG(1,"mz_cass fill_wave",("L %d samples\n", Params.LONG_PULSE)); + count += fill_wave_1(buffer, count); bytecount = 0; header = 0; @@ -310,7 +320,7 @@ static int fill_wave(int16_t *buffer, int length, const uint8_t *code, int) beg = buffer + count; } - if( length < BYTE_SAMPLES ) + if (length < BYTE_SAMPLES) return -1; if (*code & 0x01) csum++; @@ -324,217 +334,12 @@ static int fill_wave(int16_t *buffer, int length, const uint8_t *code, int) bytecount++; - count += fill_wave_b(buffer, count, *code); + count += fill_wave_b(buffer, count, *code); return count; } -/* MZ-80B fill_wave: 48 kHz, LGAP 10k, SGAP 5k, 16/32 sample pulses for sharp edges */ -static int fill_wave_mz80b(int16_t *buffer, int length, const uint8_t *code, int) -{ - static int16_t *beg; - static uint16_t csum = 0; - static int header = 1, bytecount = 0; - int count = 0; - - if( code == CODE_HEADER ) - { - int i; - - if( count + LGAP_MZ80B * SHORT_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("LGAP %d samples\n", LGAP_MZ80B * SHORT_PULSE_MZ80B)); - for( i = 0; i < LGAP_MZ80B; i++ ) - count += fill_wave_0_mz80b(buffer, count); - - if( count + LTM_1 * LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("LTM 1 %d samples\n", LTM_1 * LONG_PULSE_MZ80B)); - for( i = 0; i < LTM_1; i++ ) - count += fill_wave_1_mz80b(buffer, count); - - if( count + LTM_0 * SHORT_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("LTM 0 %d samples\n", LTM_0 * SHORT_PULSE_MZ80B)); - for( i = 0; i < LTM_0; i++ ) - count += fill_wave_0_mz80b(buffer, count); - - if( count + LTM_L * LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("L %d samples\n", LONG_PULSE_MZ80B)); - count += fill_wave_1_mz80b(buffer, count); - - header = 1; - bytecount = 0; - csum = 0; - beg = buffer + count; - return count; - } - - if( code == CODE_TRAILER ) - { - int i, file_length; - int16_t *end = buffer; - - if( count + 2 * BYTE_SAMPLES_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("CHKF 0x%04X\n", csum)); - count += fill_wave_b_mz80b(buffer, count, csum >> 8); - count += fill_wave_b_mz80b(buffer, count, csum & 0xff); - - if( count + LTM_L * LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("L\n")); - count += fill_wave_1_mz80b(buffer, count); - - if( count + 256 * SHORT_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("256S\n")); - for (i = 0; i < 256; i++) - count += fill_wave_0_mz80b(buffer, count); - - file_length = (int)(end - beg) / sizeof(int16_t); - if( count + file_length > length ) - return -1; - LOG(1,"mz80b fill_wave",("FILEC %d samples\n", file_length)); - memcpy(buffer + count, beg, file_length * sizeof(int16_t)); - count += file_length; - - if( count + 2 * BYTE_SAMPLES_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("CHKF 0x%04X\n", csum)); - count += fill_wave_b_mz80b(buffer, count, csum >> 8); - count += fill_wave_b_mz80b(buffer, count, csum & 0xff); - - if( count + STM_L * LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("L %d samples\n", LONG_PULSE_MZ80B)); - count += fill_wave_1_mz80b(buffer, count); - - LOG(1,"mz80b fill_wave",("silence %d samples\n", SILENCE)); - for( i = 0; i < SILENCE; i++ ) - buffer[count++] = 0; - - return count; - } - - if( header == 1 && bytecount == 128 ) - { - int i, hdr_length; - int16_t *end = buffer; - - if( count + 2 * BYTE_SAMPLES_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("CHKH 0x%04X\n", csum & 0xffff)); - count += fill_wave_b_mz80b(buffer, count, (csum >> 8) & 0xff); - count += fill_wave_b_mz80b(buffer, count, csum & 0xff); - - if( count + LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("L %d samples\n", LONG_PULSE_MZ80B)); - count += fill_wave_1_mz80b(buffer, count); - - if( count + 256 * SHORT_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("256S\n")); - for (i = 0; i < 256; i++) - count += fill_wave_0_mz80b(buffer, count); - - hdr_length = (int)(end - beg) / sizeof(int16_t); - if( count + hdr_length > length ) - return -1; - LOG(1,"mz80b fill_wave",("HDRC %d samples\n", hdr_length)); - memcpy(buffer + count, beg, hdr_length * sizeof(int16_t)); - count += hdr_length; - - if( count + 2 * BYTE_SAMPLES_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("CHKH 0x%04X\n", csum & 0xffff)); - count += fill_wave_b_mz80b(buffer, count, (csum >> 8) & 0xff); - count += fill_wave_b_mz80b(buffer, count, csum & 0xff); - - if( count + LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("L %d samples\n", LONG_PULSE_MZ80B)); - count += fill_wave_1_mz80b(buffer, count); - - if( count + SILENCE > length ) - return -1; - LOG(1,"mz80b fill_wave",("SILENCE %d samples\n", SILENCE)); - for( i = 0; i < SILENCE; i++ ) - buffer[count++] = 0; - - if( count + SGAP_MZ80B * SHORT_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("SGAP %d samples\n", SGAP_MZ80B * SHORT_PULSE_MZ80B)); - for( i = 0; i < SGAP_MZ80B; i++ ) - count += fill_wave_0_mz80b(buffer, count); - - if( count + STM_1 * LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("STM 1 %d samples\n", STM_1 * LONG_PULSE_MZ80B)); - for( i = 0; i < STM_1; i++ ) - count += fill_wave_1_mz80b(buffer, count); - - if( count + STM_0 * SHORT_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("STM 0 %d samples\n", STM_0 * SHORT_PULSE_MZ80B)); - for( i = 0; i < STM_0; i++ ) - count += fill_wave_0_mz80b(buffer, count); - - if( count + STM_L * LONG_PULSE_MZ80B > length ) - return -1; - LOG(1,"mz80b fill_wave",("L %d samples\n", LONG_PULSE_MZ80B)); - count += fill_wave_1_mz80b(buffer, count); - - bytecount = 0; - header = 0; - csum = 0; - beg = buffer + count; - } - - if( length < BYTE_SAMPLES_MZ80B ) - return -1; - - if (*code & 0x01) csum++; - if (*code & 0x02) csum++; - if (*code & 0x04) csum++; - if (*code & 0x08) csum++; - if (*code & 0x10) csum++; - if (*code & 0x20) csum++; - if (*code & 0x40) csum++; - if (*code & 0x80) csum++; - - bytecount++; - count += fill_wave_b_mz80b(buffer, count, *code); - return count; -} - -#define MZ700_WAVESAMPLES_HEADER ( \ - LGAP * SHORT_PULSE + \ - LTM_1 * LONG_PULSE + \ - LTM_0 * SHORT_PULSE + \ - LTM_L * LONG_PULSE + \ - 2 * 2 * BYTE_SAMPLES + \ - SILENCE + \ - SGAP * SHORT_PULSE + \ - STM_1 * LONG_PULSE + \ - STM_0 * SHORT_PULSE + \ - STM_L * LONG_PULSE + \ - 2 * 2 * BYTE_SAMPLES) - -#define MZ80B_WAVESAMPLES_HEADER ( \ - LGAP_MZ80B * SHORT_PULSE_MZ80B + \ - LTM_1 * LONG_PULSE_MZ80B + \ - LTM_0 * SHORT_PULSE_MZ80B + \ - LTM_L * LONG_PULSE_MZ80B + \ - 2 * 2 * BYTE_SAMPLES_MZ80B + \ - SILENCE + \ - SGAP_MZ80B * SHORT_PULSE_MZ80B + \ - STM_1 * LONG_PULSE_MZ80B + \ - STM_0 * SHORT_PULSE_MZ80B + \ - STM_L * LONG_PULSE_MZ80B + \ - 2 * 2 * BYTE_SAMPLES_MZ80B) +} // anonymous namespace @@ -542,26 +347,26 @@ static int fill_wave_mz80b(int16_t *buffer, int length, const uint8_t *code, int // MZ-700/MZ-80A/MZ-700/MZ-800: 1200 baud Sharp PWM static const cassette_image::LegacyWaveFiller mz700_legacy_fill_wave = { - fill_wave, /* fill_wave */ - 1, /* chunk_size */ - 2 * BYTE_SAMPLES, /* chunk_samples */ - nullptr, /* chunk_sample_calc */ - 4400, /* sample_frequency (1200 baud) */ - MZ700_WAVESAMPLES_HEADER, /* header_samples */ - 1 /* trailer_samples */ + fill_wave, /* fill_wave */ + 1, /* chunk_size */ + 2 * MZ700_PARAMS.byte_samples(), /* chunk_samples */ + nullptr, /* chunk_sample_calc */ + 4400, /* sample_frequency (1200 baud) */ + MZ700_PARAMS.wavesamples_header(), /* header_samples */ + 1 /* trailer_samples */ }; // MZ-80B / MZ-2000: 1800 baud @ 48 kHz (Logic 0=~333µs, Logic 1=~667µs; CPU read @ 255µs) // 48 kHz avoids upsampling jitter; 16/32 sample pulses give sharp edges for edge detection static const cassette_image::LegacyWaveFiller mz80b_legacy_fill_wave = { - fill_wave_mz80b, /* fill_wave: LGAP 10000, SGAP 5000, 16/32 sample pulses */ - 1, /* chunk_size */ - 2 * BYTE_SAMPLES_MZ80B, /* chunk_samples */ - nullptr, /* chunk_sample_calc */ - 48000, /* sample_frequency: native MAME rate, sharp edges */ - MZ80B_WAVESAMPLES_HEADER, /* header_samples */ - 16 /* trailer_samples: scaled for 48 kHz */ + fill_wave, /* fill_wave: LGAP 10000, SGAP 5000, 16/32 sample pulses */ + 1, /* chunk_size */ + 2 * MZ80B_PARAMS.byte_samples(), /* chunk_samples */ + nullptr, /* chunk_sample_calc */ + 48000, /* sample_frequency: native MAME rate, sharp edges */ + MZ80B_PARAMS.wavesamples_header(), /* header_samples */ + 16 /* trailer_samples: scaled for 48 kHz */ }; diff --git a/src/mame/philips/cdicdic.cpp b/src/mame/philips/cdicdic.cpp index 0b767d2356f..d81570e7281 100644 --- a/src/mame/philips/cdicdic.cpp +++ b/src/mame/philips/cdicdic.cpp @@ -322,7 +322,7 @@ void cdicdic_device::play_xa_group(const uint8_t coding, const uint8_t *data) static const uint16_t DATA_OFFSET_8BIT[4] = { 16, 17, 18, 19 }; int16_t samples[28]; - uint8_t num_samples = coding & CODING_8BPS ? 4 : 8; + const uint8_t num_samples = (coding & CODING_8BPS) ? 4 : 8; for (uint8_t i = 0; i < num_samples; i++) { diff --git a/src/mame/tvgames/xavix.cpp b/src/mame/tvgames/xavix.cpp index 88da71ae6f1..c5524063be7 100644 --- a/src/mame/tvgames/xavix.cpp +++ b/src/mame/tvgames/xavix.cpp @@ -866,26 +866,26 @@ static INPUT_PORTS_START( ekara ) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_POWER_OFF ) PORT_NAME("Power Switch") // pressing this will turn the game off. PORT_START("EXTRA0") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Echo") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Effects") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Echo") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Effects") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_NAME("Key Down") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_NAME("Key Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("BGM Down") - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("BGM Up") - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Tempo Down") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_NAME("Tempo Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Select") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Cancel") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Tempo Down") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_NAME("Tempo Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_NAME("Key Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Select") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Cancel") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Tempo Down") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_NAME("Tempo Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("BGM Down") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("BGM Up") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Tempo Down") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_NAME("Tempo Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_NAME("Key Down") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_NAME("Key Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_NAME("Key Up") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) PORT_START("EXTRA1") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Select") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Cancel") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Echo") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Effects") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Select") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Cancel") PORT_CONDITION("IN0", 0x80, EQUALS, 0x00) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Echo") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Effects") PORT_CONDITION("IN0", 0x80, EQUALS, 0x80) PORT_BIT( 0x3c, IP_ACTIVE_HIGH, IPT_UNUSED ) // no 40/80 due to multiplexer code INPUT_PORTS_END From 2eec6e9cbbd52cd1ecdb10c0d85c3ac8a1f9a351 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 25 Feb 2026 07:31:47 +1100 Subject: [PATCH 034/351] Tidy some things. --- src/devices/bus/spectrum/kempmouse.cpp | 4 ++-- src/devices/cpu/es5510/es5510.cpp | 14 +++++++------- src/lib/formats/mz_cas.cpp | 2 +- src/mame/canon/x07.cpp | 8 ++++---- src/mame/sharp/mz2000.cpp | 2 +- 5 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/devices/bus/spectrum/kempmouse.cpp b/src/devices/bus/spectrum/kempmouse.cpp index 9185e88e219..7f04a3ab69e 100644 --- a/src/devices/bus/spectrum/kempmouse.cpp +++ b/src/devices/bus/spectrum/kempmouse.cpp @@ -7,7 +7,7 @@ Description: https://k1.spdns.de/Vintage/Sinclair/82/Peripherals/Mouse%20Interfaces/Kempston%20Mouse%20Interface/ - Mouse interface with two 8bit reverse counters. Readed in ports: + Mouse interface with two 8bit reverse counters. Read in ports: 0xFADF (button bits: 0 - right, 1 - left) 0xFBDF - X 0xFFDF - Y @@ -54,7 +54,7 @@ void spectrum_kempmouse_device::device_start() uint8_t spectrum_kempmouse_device::iorq_r(offs_t offset) { - uint8_t data = offset & 1 ? m_slot->fb_r() : 0xff; + uint8_t data = (offset & 1) ? m_slot->fb_r() : 0xff; switch (offset & 0xffff) { diff --git a/src/devices/cpu/es5510/es5510.cpp b/src/devices/cpu/es5510/es5510.cpp index 3d3b080043b..3b2e98f4cca 100644 --- a/src/devices/cpu/es5510/es5510.cpp +++ b/src/devices/cpu/es5510/es5510.cpp @@ -102,13 +102,13 @@ inline static int32_t negate(int32_t value) { } inline static int32_t asl(int32_t value, int shift, uint8_t &flags) { - int32_t src24 = value & 0x00ffffff; - bool carry = ((src24 >> (24 - shift)) & 1) != 0; - int64_t shifted = util::sext(src24, 24) << shift; - bool overflow = (shifted > 0x007fffffLL) || (shifted < -0x00800000LL); - int32_t result = overflow - ? (shifted < 0 ? 0x00800000 : 0x007fffff) - : (static_cast(shifted) & 0x00ffffff); + const int32_t src24 = value & 0x00ffffff; + const bool carry = BIT(src24, 24 - shift); + const int64_t shifted = util::sext(src24, 24) << shift; + const bool overflow = (shifted > 0x007fffffLL) || (shifted < -0x00800000LL); + const int32_t result = overflow + ? ((shifted < 0) ? 0x00800000 : 0x007fffff) + : (int32_t(shifted) & 0x00ffffff); flags = setFlagTo(flags, FLAG_C, carry); flags = setFlagTo(flags, FLAG_V, overflow); diff --git a/src/lib/formats/mz_cas.cpp b/src/lib/formats/mz_cas.cpp index 5eb2af7cce8..0adfd24bde0 100644 --- a/src/lib/formats/mz_cas.cpp +++ b/src/lib/formats/mz_cas.cpp @@ -127,7 +127,7 @@ int fill_wave_b(int16_t *buffer, int offs, int byte) template int fill_wave(int16_t *buffer, int length, const uint8_t *code, int) { - const int BYTE_SAMPLES = Params.LONG_PULSE + (8 * Params.LONG_PULSE); + const int BYTE_SAMPLES = Params.byte_samples(); static int16_t *beg; static uint16_t csum = 0; diff --git a/src/mame/canon/x07.cpp b/src/mame/canon/x07.cpp index c614143c7db..5e79091208a 100644 --- a/src/mame/canon/x07.cpp +++ b/src/mame/canon/x07.cpp @@ -106,8 +106,8 @@ void x07_state::t6834_cmd (uint8_t cmd) else if (address >= 0xe000 && address < 0xe200 && ((address & 0xf) != 0xf)) // VRAM and col 0-119 ? { data = 0; - const int y = (address & 0x1ff) >> 4; - const int x = (address & 0x000f) * 8; + const int y = (address >> 4) & 0x001f; + const int x = (address & 0x000f) << 3; // Read video data from LCD for (int p = 0; p < 8; ++p) data |= (m_lcd_map[y][x+p] ? (1 << (7-p)) : 0); @@ -129,8 +129,8 @@ void x07_state::t6834_cmd (uint8_t cmd) if (address >= 0xe000 && address < 0xe200 && ((address & 0xf) != 0xf)) // VRAM and col 0-119 ? { - const int y = (address & 0x1ff) >> 4; - const int x = (address & 0x000f) * 8; + const int y = (address >> 4) & 0x001f; + const int x = (address & 0x000f) << 3; // Write video data to LCD for (int p = 0; p < 8; ++p) { diff --git a/src/mame/sharp/mz2000.cpp b/src/mame/sharp/mz2000.cpp index a0ebe8e4ff9..3478b4b0a1e 100644 --- a/src/mame/sharp/mz2000.cpp +++ b/src/mame/sharp/mz2000.cpp @@ -1430,7 +1430,7 @@ void mz80b_state::mz80b(machine_config &config) void mz2000_state::mz2000(machine_config &config) { mz80b(config); - // MZ-2000 also uses 1800 baud (same as MZ-80B), so mz80b_cassette_formats is correct + m_maincpu->set_addrmap(AS_PROGRAM, &mz2000_state::mz2000_map); m_maincpu->set_addrmap(AS_IO, &mz2000_state::mz2000_io); From 01aeb066ec3edcb1d7c85c46270f4748d2df5a26 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 25 Feb 2026 00:52:34 +0100 Subject: [PATCH 035/351] video/pc_vga_sis.cpp: start hooking up MD config pins, base hookup of TV Out space --- src/devices/machine/vt82c586b_isa.cpp | 3 - src/devices/video/pc_vga.cpp | 1 + src/devices/video/pc_vga_sis.cpp | 200 ++++++++++++++++++++++++-- src/devices/video/pc_vga_sis.h | 31 +++- src/mame/misc/silverball.cpp | 2 +- src/mame/pc/pcipc_via.cpp | 7 +- src/mame/pc/queen.cpp | 3 +- 7 files changed, 224 insertions(+), 23 deletions(-) diff --git a/src/devices/machine/vt82c586b_isa.cpp b/src/devices/machine/vt82c586b_isa.cpp index 4542ae954fa..847f2b8f810 100644 --- a/src/devices/machine/vt82c586b_isa.cpp +++ b/src/devices/machine/vt82c586b_isa.cpp @@ -4,9 +4,6 @@ VT82C586B PCIC ISA section -TODO: -- win98se: PS/2 keyboard becomes unresponsive after a while during install; - **************************************************************************************************/ #include "emu.h" diff --git a/src/devices/video/pc_vga.cpp b/src/devices/video/pc_vga.cpp index 8c4e0cfaef7..560061e9171 100644 --- a/src/devices/video/pc_vga.cpp +++ b/src/devices/video/pc_vga.cpp @@ -138,6 +138,7 @@ void vga_device::device_start() memset(&vga.memory[0], 0, vga.svga_intf.vram_size); save_pointer(NAME(vga.memory), vga.svga_intf.vram_size); save_item(NAME(vga.pens)); + save_item(NAME(m_ioas)); save_item(NAME(vga.miscellaneous_output)); save_item(NAME(vga.feature_control)); diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index b9ebb8f5abc..d766775e132 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -42,19 +42,24 @@ DEFINE_DEVICE_TYPE(SIS630_VGA, sis630_vga_device, "sis630_vga", "SiS 630 VGA i/f sis6326_vga_device::sis6326_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : sis6326_vga_device(mconfig, SIS6326_VGA, tag, owner, clock) { + m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis6326_vga_device::crtc_map), this)); m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis6326_vga_device::sequencer_map), this)); + m_tvout_space_config = address_space_config("tvout_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis6326_vga_device::tvout_map), this)); } sis6326_vga_device::sis6326_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : svga_device(mconfig, type, tag, owner, clock) + , m_md20_cb(*this, 0) + , m_md21_cb(*this, 0) + , m_md23_cb(*this, 0) { } -sis630_vga_device::sis630_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : sis6326_vga_device(mconfig, SIS630_VGA, tag, owner, clock) +device_memory_interface::space_config_vector sis6326_vga_device::memory_space_config() const { - m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::crtc_map), this)); - m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::sequencer_map), this)); + auto r = svga_device::memory_space_config(); + r.emplace_back(std::make_pair(EXT_REG, &m_tvout_space_config)); + return r; } void sis6326_vga_device::device_start() @@ -69,9 +74,12 @@ void sis6326_vga_device::device_start() vga.memory = std::make_unique(vga.svga_intf.vram_size); memset(&vga.memory[0], 0, vga.svga_intf.vram_size); + save_item(NAME(m_crtc_unlock_reg)); + save_item(NAME(m_seq_unlock_reg)); save_item(NAME(m_ext_sr07)); save_item(NAME(m_ext_sr0b)); save_item(NAME(m_ext_sr0c)); + save_item(NAME(m_ext_ddc)); save_item(NAME(m_ext_sr23)); save_item(NAME(m_ext_sr33)); save_item(NAME(m_ext_sr34)); @@ -81,16 +89,26 @@ void sis6326_vga_device::device_start() save_item(NAME(m_ext_sr3c)); save_item(NAME(m_ext_ge26)); save_item(NAME(m_ext_ge27)); + save_item(NAME(m_linear_address)); + + save_item(STRUCT_MEMBER(m_tv, pycin)); + save_item(STRUCT_MEMBER(m_tv, enyf)); + save_item(STRUCT_MEMBER(m_tv, encf)); + save_item(STRUCT_MEMBER(m_tv, tvsense)); } void sis6326_vga_device::device_reset() { svga_device::device_reset(); - m_unlock_reg = false; + m_crtc_unlock_reg = false; + m_seq_unlock_reg = false; m_ext_sr07 = m_ext_sr0b = m_ext_sr0c = m_ext_sr23 = m_ext_sr33 = 0; m_ext_sr34 = m_ext_sr35 = m_ext_sr38 = m_ext_sr39 = m_ext_sr3c = 0; m_ext_ge26 = m_ext_ge27 = 0; + m_linear_address[0] = 0; + m_linear_address[1] = 0; + m_ext_ddc = 0; } void sis6326_vga_device::io_3cx_map(address_map &map) @@ -128,18 +146,73 @@ void sis6326_vga_device::io_3cx_map(address_map &map) ); } -void sis6326_vga_device::sequencer_map(address_map &map) +void sis6326_vga_device::crtc_map(address_map &map) { - svga_device::sequencer_map(map); - // extended ID register - map(0x05, 0x05).lrw8( + svga_device::crtc_map(map); + // Password/Identification Register + map(0x80, 0x80).lrw8( NAME([this] (offs_t offset) { - return m_unlock_reg ? 0xa1 : 0x21; + return m_crtc_unlock_reg ? 0xa1 : 0x21; }), NAME([this] (offs_t offset, u8 data) { // TODO: reimplement me thru memory_view or direct handler override - m_unlock_reg = (data == 0x86); - //LOG("SR5: Unlock register write %02x (%s)\n", data, m_unlock_reg ? "unlocked" : "locked"); + m_crtc_unlock_reg = (data == 0x86); + LOG("CR80: Unlock register write %02x (%s)\n", data, m_crtc_unlock_reg ? "unlocked" : "locked"); + }) + ); + // ... + + map(0xe0, 0xe0).lrw8( + NAME([this] (offs_t offset) -> u8 { + if (!m_crtc_unlock_reg) + { + LOG("CRE0: attempt to read TV OUT index while locked\n"); + return 0xff; + } + return m_tvout_index; + }), + NAME([this] (offs_t offset, u8 data) { + if (!m_crtc_unlock_reg) + { + LOG("CRE0: attempt to write TV OUT index while locked %02x\n", data); + return; + } + m_tvout_index = data; + }) + ); + map(0xe1, 0xe1).lrw8( + NAME([this] (offs_t offset) -> u8 { + if (!m_crtc_unlock_reg) + { + LOG("CRE0: attempt to read TV OUT data while locked [%02x]\n", m_tvout_index); + return 0; + } + return space(EXT_REG).read_byte(m_tvout_index); + }), + NAME([this] (offs_t offset, u8 data) { + if (!m_crtc_unlock_reg) + { + LOG("CRE0: attempt to write TV OUT data while locked [%02x] %02x\n", m_tvout_index, data); + return; + } + space(EXT_REG).write_byte(m_tvout_index, data); + }) + ); + // TODO: e2 / e3 accessed (alias of TV OUT?) +} + +void sis6326_vga_device::sequencer_map(address_map &map) +{ + svga_device::sequencer_map(map); + // Password/Identification register + map(0x05, 0x05).lrw8( + NAME([this] (offs_t offset) { + return m_seq_unlock_reg ? 0xa1 : 0x21; + }), + NAME([this] (offs_t offset, u8 data) { + // TODO: reimplement me thru memory_view or direct handler override + m_seq_unlock_reg = (data == 0x86); + LOG("SR5: Unlock register write %02x (%s)\n", data, m_seq_unlock_reg ? "unlocked" : "locked"); }) ); /* @@ -215,6 +288,10 @@ void sis6326_vga_device::sequencer_map(address_map &map) ); // x--- ---- True Color RGB select (0) RGB (1) BGR // -xx- ---- MMIO select + // -00- ---- Disable + // -01- ---- Select A:0000 segment + // -10- ---- Select B:0000 segment + // -11- ---- Select PCI BAR1 // ---x ---- True Color frame rate modulation // ---- x--- Dual Segment register // ---- -x-- I/O gating enable while write-buffer not empty @@ -258,7 +335,9 @@ void sis6326_vga_device::sequencer_map(address_map &map) // ---- -x-- MD18 NTSC (0) PAL (1) // ---- --x- MD17 Video subsystem power-on disable // ---- ---x MD16 Video subsystem port (0) $3c3 (1) $46e8 - NAME([] () { return 0x80 | 0x20 | 0x10 | 1; }) + NAME([this] () { + return (m_md23_cb() << 7) | (m_md21_cb() << 5) | (m_md20_cb() << 4) | 1; + }) ); map(0x0e, 0x0e).lr8( // xxx- ---- MD31~MD29 DRAM speed setting (000) SGRAM 66 MHz @@ -266,7 +345,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) // ---- x--- MD27 INTA# enable // ---- -x-- MD26 BIOS ROM disable // ---- --xx MD25~MD24 - NAME([] () { return 8; }) + NAME([this] () { return (0 << 3); }) ); map(0x0f, 0x10).lrw8( NAME([this] (offs_t offset) { @@ -277,7 +356,18 @@ void sis6326_vga_device::sequencer_map(address_map &map) m_ext_scratch[offset] = data; }) ); - //map(0x11, 0x11) DDC register + /// DDC register + map(0x11, 0x11).lrw8( + NAME([this] (offs_t offset) { + //LOG("SR11: DDC and Power Control read (%02x)\n", m_ext_ddc); + return m_ext_ddc; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR11: DDC and Power Control %02x\n", data); + m_ext_ddc = data; + }) + ); + //map(0x12, 0x12) Ext. Horizontal Overflow //map(0x13, 0x13) Ext. Clock Generator / 25MHz/28MHz Video Clock //map(0x14, 0x16) HW Cursor Color 0 @@ -287,6 +377,23 @@ void sis6326_vga_device::sequencer_map(address_map &map) //map(0x1d, 0x1e) HW Cursor Vertical Start 0/1 //map(0x1f, 0x1f) HW Cursor Vertical Preset //map(0x20, 0x21) Linear Addressing Base Address 0/1 + map(0x20, 0x21).lrw8( + NAME([this] (offs_t offset) { + return m_linear_address[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + m_linear_address[offset] = data; + LOG("SR%02X: Extended Linear Addressing Base %02x\n", offset + 0x20, data); + LOG("\tBase %08x Size %d\n" + , (m_linear_address[0] << 19) | ((m_linear_address[1] & 0xf) << 27) + // 00 512 KiB + // 01 1 MiB + // 10 2 MiB + // 11 4 MiB + , (m_linear_address[1] >> 5) & 3 + ); + }) + ); //map(0x22, 0x22) Standby/Suspend Timer map(0x23, 0x23).lrw8( NAME([this] (offs_t offset) { @@ -460,6 +567,60 @@ void sis6326_vga_device::sequencer_map(address_map &map) ); } +void sis6326_vga_device::tvout_map(address_map &map) +{ + map(0x00, 0x00).lrw8( + NAME([this] (offs_t offset) { + LOG("VR00: Basic TV Function Control read (%02x)\n", m_tv.control); + return m_tv.control; + }), + NAME([this] (offs_t offset, u8 data) { + m_tv.control = data; + LOG("VR00: Basic TV Function Control %02x\n", data); + LOG("\tFSEL %d COMPN %d SVIDEON %d ENTV %d SHRINK %d REGODD %d\n" + , (data >> 5) & 7 + , !BIT(data, 4) + , !BIT(data, 3) + , BIT(data, 2) + , BIT(data, 1) + , BIT(data, 0) + ); + }) + ); + // ... + map(0x42, 0x42).lrw8( + NAME([this] (offs_t offset) { return m_tv.pycin & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + m_tv.pycin &= 0x0300; + m_tv.pycin |= (data & 0xff); + LOG("VR42: TV DAC Sense Input Register 1 %02x\n", data); + }) + ); + map(0x43, 0x43).lrw8( + NAME([this] (offs_t offset) { + return (m_tv.enyf << 4) | (m_tv.encf << 3) | (m_tv.tvsense << 2) | ((m_tv.pycin >> 8) & 0x3); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("VR43: TV DAC Sense Input Register 2 %02x\n", data); + m_tv.enyf = !!BIT(data, 4); + m_tv.encf = !!BIT(data, 3); + m_tv.tvsense = !!BIT(data, 2); + m_tv.pycin &= 0x00ff; + m_tv.pycin |= (data & 3) << 8; + }) + ); + // ---- -x-- RSENY Y signal readback + // ---- --x- RSENC Cb & Cr signal readback + // ---- ---x RSENCO Composite signal readback + map(0x44, 0x44).lr8( + NAME([this] (offs_t offset) { + LOG("VR44: TV DAC Sense Read-back\n"); + // Pull high to enable TV mode + return 0; + }) + ); +} + // original SiS6326 seems unable to do 32-bit mode std::tuple sis6326_vga_device::flush_true_color_mode() { @@ -526,6 +687,14 @@ uint32_t sis6326_vga_device::latch_start_addr() * SiS630 overrides */ + sis630_vga_device::sis630_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : sis6326_vga_device(mconfig, SIS630_VGA, tag, owner, clock) +{ + m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::crtc_map), this)); + m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::sequencer_map), this)); + m_tvout_space_config = address_space_config("tvout_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::tvout_map), this)); +} + // Page 144 void sis630_vga_device::crtc_map(address_map &map) { @@ -663,6 +832,7 @@ void sis630_vga_device::sequencer_map(address_map &map) popmessage("pc_vga_sis: SR20 %s %s", BIT(data, 7) ? "PCI address enabled" : "", BIT(data, 0) ? "memory map I/O enable" : ""); }) ); + map(0x21, 0x21).unmaprw(); //map(0x21, 0x21) GUI HostBus state machine setting //map(0x22, 0x22) GUI HostBus controller timing //map(0x23, 0x23) GUI HostBus timer diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index 8ba27d94db8..020c293d332 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -19,6 +19,14 @@ public: virtual uint8_t mem_r(offs_t offset) override; virtual void mem_w(offs_t offset, uint8_t data) override; + // Configuration pins + // AGP bus enable + auto md20_cb() { return m_md20_cb.bind(); } + // AGP 2X transfer mode + auto md21_cb() { return m_md21_cb.bind(); } + // Enable 64K ROM + auto md23_cb() { return m_md23_cb.bind(); } + protected: sis6326_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -27,15 +35,26 @@ protected: virtual void io_3cx_map(address_map &map) override ATTR_COLD; + virtual void crtc_map(address_map &map) override ATTR_COLD; virtual void sequencer_map(address_map &map) override ATTR_COLD; + virtual void tvout_map(address_map &map) ATTR_COLD; virtual uint16_t offset() override; virtual void recompute_params() override; + virtual space_config_vector memory_space_config() const override; + + address_space_config m_tvout_space_config; + + devcb_read_line m_md20_cb; + devcb_read_line m_md21_cb; + + devcb_read_line m_md23_cb; u8 m_ramdac_mode = 0; u8 m_ext_sr07; u8 m_ext_sr0b; u8 m_ext_sr0c; + u8 m_ext_ddc; u8 m_ext_sr23; u8 m_ext_sr33; u8 m_ext_sr34; @@ -54,7 +73,17 @@ protected: u8 m_ext_eclk[3]{}; u8 m_ext_clock_gen = 0; u8 m_ext_clock_source_select = 0; - bool m_unlock_reg = false; + bool m_crtc_unlock_reg = false; + bool m_seq_unlock_reg = false; + u8 m_linear_address[2]; + + u8 m_tvout_index; + struct { + u8 control; + + u16 pycin; + bool enyf, encf, tvsense; + } m_tv; virtual uint32_t latch_start_addr() override; virtual std::tuple flush_true_color_mode(); diff --git a/src/mame/misc/silverball.cpp b/src/mame/misc/silverball.cpp index 7dc350fe8ed..252dc7e73bc 100644 --- a/src/mame/misc/silverball.cpp +++ b/src/mame/misc/silverball.cpp @@ -191,7 +191,7 @@ void silverball_state::silverball_i440zx(machine_config &config) ROM_SYSTEM_BIOS(16, "bios30", "BIOS30 (Soyo SY-7IZB+)") \ ROMX_LOAD("bios30.bin", 0x00000, 0x40000, CRC(c6e30fb1) SHA1(1d9a900a5383bf58b66a2e9f7fb34c61397dd327), ROM_BIOS(16)) /* Soyo Computer Inc. SY-7IZB+ */ \ /* Soyo SY-5EAS */ \ - ROM_SYSTEM_BIOS(17, "bios29", "BIOS29 (Soyo 5EAS)") /* Dumped from the actual Silverball 8.06 machine */ \ + ROM_SYSTEM_BIOS(17, "bios29", "BIOS29 (Soyo SY-5EAS)") /* Dumped from the actual Silverball 8.06 machine */ \ ROMX_LOAD("bios29.bin", 0x00000, 0x20000, CRC(ddbd94f4) SHA1(60ad74e56265a7936cf19e8480c657223d11f2d0), ROM_BIOS(17)) /* 06/18/1998-EQ82C6618A-ET-2A5LDS2FC-29 */ \ ROM_RELOAD( 0x20000, 0x20000 ) \ ROM_SYSTEM_BIOS(18, "test", "TEST (Soyo SY-5EAS)") /* BIOS update labeled as "TEST", from the Silverball software update files */ \ diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index e0a85d4a9c9..00e5a693935 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -10,6 +10,8 @@ * * TODO: * - win98se: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine; + * - win98se: PS/2 keyboard becomes unresponsive after a while; + * - win98se: ACPI has issues on power off and reboot (workaround: use restart in MSDOS mode); * - freedos13: APMDOS hangs system with JEMMEX preloaded, works when issued standalone; * */ @@ -134,9 +136,9 @@ void mvp3_state::mvp3(machine_config &config) acpi_dev.smi().set_inputline("maincpu", INPUT_LINE_SMI); // acpi_dev.sci().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_irq12m_w)); - PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, "sis6326_agp"); + PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, nullptr); - PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, "sis6326_pci"); PCI_SLOT(config, "pci:2", pci_cards, 14, 1, 2, 3, 0, nullptr); PCI_SLOT(config, "pci:3", pci_cards, 15, 2, 3, 0, 1, nullptr); PCI_SLOT(config, "pci:4", pci_cards, 16, 3, 0, 1, 2, nullptr); @@ -177,4 +179,5 @@ ROM_END } // anonymous namespace + COMP(1998, ls5amvp3, 0, 0, mvp3, 0, mvp3_state, empty_init, "Lucky Star", "5AMVP3 (VIA MVP3 chipset)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/pc/queen.cpp b/src/mame/pc/queen.cpp index 015adb7bec0..83937785dd6 100644 --- a/src/mame/pc/queen.cpp +++ b/src/mame/pc/queen.cpp @@ -10,11 +10,12 @@ CPU main PCB is a standard EPIA ROMs epia BIOS + solid state HD 1x VIA EPIA5000EAG (main PCB) with: +VT6801A North Bridge PLE133 VT8231 South Bridge VIA Eden Processor VIA EPIA Companion Chip VT1612A (Audio CODEC) VIA EPIA Companion Chip VT6103 (Networking) -processor speed is 533MHz <- likely to be a Celeron / Pentium III Socket 370 -AS +processor speed is 533MHz, EBGA368 socket (VIA C3 or later, Pentium 3 equivalent + 3DNow as bare minimum) it's a 2002 era PC at least based on the BIOS, almost certainly newer than the standard 'PENTIUM' CPU From 678947615f6742c65223423123869f80d3c885b1 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 25 Feb 2026 00:56:56 +0100 Subject: [PATCH 036/351] bus/pci/sis6326.cpp: hookup PCI variant, hookup VGA in VMI space --- src/devices/bus/pci/pci_slot.cpp | 1 + src/devices/bus/pci/sis6326.cpp | 213 ++++++++++++++++++++----------- src/devices/bus/pci/sis6326.h | 29 ++++- src/mame/pc/pcipc_via.cpp | 3 +- 4 files changed, 164 insertions(+), 82 deletions(-) diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp index 49896f9f37b..a2c0a37116c 100644 --- a/src/devices/bus/pci/pci_slot.cpp +++ b/src/devices/bus/pci/pci_slot.cpp @@ -137,6 +137,7 @@ void pci_cards(device_slot_interface &device) device.option_add("promotion3210", PROMOTION3210); device.option_add("gd5446", GD5446_PCI); device.option_add("oti64111", OTI64111_PCI); + device.option_add("sis6326_pci", SIS6326_PCI); device.option_add("wd9710", WD9710_PCI); // 0x04 - multimedia controllers diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 60b91020c68..598032889c1 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -20,11 +20,12 @@ SiS 6326 #define LOGAGP(...) LOGMASKED(LOG_AGP, __VA_ARGS__) +DEFINE_DEVICE_TYPE(SIS6326_PCI, sis6326_pci_device, "sis6326_pci", "SiS 6326 PCI card") DEFINE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device, "sis6326_agp", "SiS 6326 AGP card") -sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) +sis6326_pci_device::sis6326_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) , m_vga(*this, "vga") , m_vga_rom(*this, "vga_rom") @@ -32,8 +33,138 @@ sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, device_typ set_ids(0x10396326, 0xa0, 0x030000, 0x10396326); } +sis6326_pci_device::sis6326_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : sis6326_pci_device(mconfig, SIS6326_PCI, tag, owner, clock) +{ +} + +ROM_START( sis6326pci ) + ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_DEFAULT_BIOS("sis") + + ROM_SYSTEM_BIOS( 0, "sis", "SiS6326 4MB 1.25" ) + ROMX_LOAD( "sis6326_75mhz.vbi", 0x000000, 0x008000, CRC(1c74109d) SHA1(c9180a32e78481c9082ad5bc75082ef4b289ad76), ROM_BIOS(0) ) +ROM_END + +const tiny_rom_entry *sis6326_pci_device::device_rom_region() const +{ + return ROM_NAME(sis6326pci); +} + +void sis6326_pci_device::device_add_mconfig(machine_config &config) +{ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); + screen.set_screen_update(m_vga, FUNC(sis6326_vga_device::screen_update)); + + SIS6326_VGA(config, m_vga, 0); + m_vga->set_screen("screen"); + // 4MB, max 8MB + m_vga->set_vram_size(4*1024*1024); + m_vga->md20_cb().set_constant(0); + m_vga->md21_cb().set_constant(0); + m_vga->md23_cb().set_constant(1); +} + +void sis6326_pci_device::device_start() +{ + pci_card_device::device_start(); + + add_map(4*1024*1024, M_MEM | M_PREF, FUNC(sis6326_pci_device::vram_aperture_map)); + add_map(64*1024, M_MEM, FUNC(sis6326_pci_device::mmio_map)); + // "32-bit for 16 I/O space" + add_map(128, M_IO, FUNC(sis6326_pci_device::vmi_map)); + + // TODO: should really read the actual BIOS size and set md23 accordingly + add_rom((u8 *)m_vga_rom->base(), 0x10000); + expansion_rom_base = 0xc0000; + + // INTA# + // TODO: VGA D3/MD27 can strap this to no irq pin + // ls5amvp3 goes N/A, assume it's disabled by default + intr_pin = 0; +} + +void sis6326_pci_device::device_reset() +{ + pci_card_device::device_reset(); + + // doc makes multiple ninja jumps in messing up these defaults + // bus master (hardwired) + command = 0x0004; + command_mask = 0x23; + // medium DEVSEL#, 66 MHz capable, has capabilities list + status = 0x0200; + + remap_cb(); +} + +void sis6326_pci_device::config_map(address_map &map) +{ + pci_card_device::config_map(map); +} + + +void sis6326_pci_device::vram_aperture_map(address_map &map) +{ + map(0x0000000, 0x3f'ffff).rw(m_vga, FUNC(sis6326_vga_device::mem_linear_r), FUNC(sis6326_vga_device::mem_linear_w)); +} + +void sis6326_pci_device::mmio_map(address_map &map) +{ + // HACK: fake Turbo Queue so to not lockup windows + map(0x82a8, 0x82ab).lr32(NAME([] () { return 0x8000'0100; })); + // Same deal, 3D Engine Status + map(0x89fc, 0x89ff).lr32(NAME([] () { return (0x3ff << 16) | 3; })); +} + +void sis6326_pci_device::vmi_map(address_map &map) +{ + // same as later '630, win98se expects VGA to be mapped here for extended GFX setups + map(0x30, 0x5f).m(m_vga, FUNC(sis6326_vga_device::io_map)); +} + +// TODO: this should really be a subclass of VGA +void sis6326_pci_device::legacy_memory_map(address_map &map) +{ + map(0xa0000, 0xbffff).rw(FUNC(sis6326_pci_device::vram_r), FUNC(sis6326_pci_device::vram_w)); +} + +void sis6326_pci_device::legacy_io_map(address_map &map) +{ + map(0, 0x02f).m(m_vga, FUNC(sis6326_vga_device::io_map)); +} + +uint8_t sis6326_pci_device::vram_r(offs_t offset) +{ + return downcast(m_vga.target())->mem_r(offset); +} + +void sis6326_pci_device::vram_w(offs_t offset, uint8_t data) +{ + downcast(m_vga.target())->mem_w(offset, data); +} + +void sis6326_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) +{ + if (BIT(command, 1)) + { + memory_space->install_readwrite_handler(0x000a'0000, 0x000b'ffff, read8sm_delegate(*this, FUNC(sis6326_pci_device::vram_r)), write8sm_delegate(*this, FUNC(sis6326_pci_device::vram_w))); + } + + if (BIT(command, 0)) + { + io_space->install_device(0x03b0, 0x03df, *this, &sis6326_pci_device::legacy_io_map); + } +} + +/* + * AGP overrides + */ + sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : sis6326_agp_device(mconfig, SIS6326_AGP, tag, owner, clock) + : sis6326_pci_device(mconfig, SIS6326_AGP, tag, owner, clock) { } @@ -63,30 +194,10 @@ const tiny_rom_entry *sis6326_agp_device::device_rom_region() const void sis6326_agp_device::device_add_mconfig(machine_config &config) { - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); - screen.set_screen_update(m_vga, FUNC(sis6326_vga_device::screen_update)); - - SIS6326_VGA(config, m_vga, 0); - m_vga->set_screen("screen"); - // 4MB, max 8MB - m_vga->set_vram_size(4*1024*1024); -} - -void sis6326_agp_device::device_start() -{ - pci_card_device::device_start(); - - add_map(4*1024*1024, M_MEM | M_PREF, FUNC(sis6326_agp_device::vram_aperture_map)); - add_map(64*1024, M_MEM, FUNC(sis6326_agp_device::mmio_map)); - add_map(16, M_IO, FUNC(sis6326_agp_device::vmi_map)); - - add_rom((u8 *)m_vga_rom->base(), 0x10000); - expansion_rom_base = 0xc0000; - - // INTA# - // TODO: SRE D3 can strap this to no irq pin - intr_pin = 1; + sis6326_pci_device::device_add_mconfig(config); + m_vga->md20_cb().set_constant(1); + m_vga->md21_cb().set_constant(1); + m_vga->md23_cb().set_constant(1); } void sis6326_agp_device::device_reset() @@ -103,6 +214,7 @@ void sis6326_agp_device::device_reset() remap_cb(); } + u8 sis6326_agp_device::capptr_r() { return 0x50; @@ -144,7 +256,7 @@ void sis6326_agp_device::agp_command_w(offs_t offset, uint32_t data, uint32_t me void sis6326_agp_device::config_map(address_map &map) { - pci_card_device::config_map(map); + sis6326_pci_device::config_map(map); // AGP map(0x50, 0x53).lr32(NAME([] () { return 0x00105c02; } )); map(0x54, 0x57).lr32(NAME([] () { return 0x01000003; } )); @@ -152,50 +264,3 @@ void sis6326_agp_device::config_map(address_map &map) map(0x5c, 0x5f).lr32(NAME([] () { return 0x00000000; } )); // NULL terminator } -void sis6326_agp_device::vram_aperture_map(address_map &map) -{ - map(0x0000000, 0x3f'ffff).rw(m_vga, FUNC(sis6326_vga_device::mem_linear_r), FUNC(sis6326_vga_device::mem_linear_w)); -} - -void sis6326_agp_device::mmio_map(address_map &map) -{ -} - -void sis6326_agp_device::vmi_map(address_map &map) -{ -} - -// TODO: this should really be a subclass of VGA -void sis6326_agp_device::legacy_memory_map(address_map &map) -{ - map(0xa0000, 0xbffff).rw(FUNC(sis6326_agp_device::vram_r), FUNC(sis6326_agp_device::vram_w)); -} - -void sis6326_agp_device::legacy_io_map(address_map &map) -{ - map(0, 0x02f).m(m_vga, FUNC(sis6326_vga_device::io_map)); -} - -uint8_t sis6326_agp_device::vram_r(offs_t offset) -{ - return downcast(m_vga.target())->mem_r(offset); -} - -void sis6326_agp_device::vram_w(offs_t offset, uint8_t data) -{ - downcast(m_vga.target())->mem_w(offset, data); -} - -void sis6326_agp_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, - uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) -{ - if (BIT(command, 1)) - { - memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(sis6326_agp_device::vram_r)), write8sm_delegate(*this, FUNC(sis6326_agp_device::vram_w))); - } - - if (BIT(command, 0)) - { - io_space->install_device(0x03b0, 0x03df, *this, &sis6326_agp_device::legacy_io_map); - } -} diff --git a/src/devices/bus/pci/sis6326.h b/src/devices/bus/pci/sis6326.h index 25b83457b05..bd79771a13e 100644 --- a/src/devices/bus/pci/sis6326.h +++ b/src/devices/bus/pci/sis6326.h @@ -9,15 +9,15 @@ #include "pci_slot.h" #include "video/pc_vga_sis.h" -class sis6326_agp_device : public pci_card_device +class sis6326_pci_device : public pci_card_device { public: - sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + sis6326_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); static constexpr feature_type unemulated_features() { return feature::GRAPHICS; } protected: - sis6326_agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + sis6326_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; @@ -30,21 +30,35 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; - virtual u8 capptr_r() override; - void vram_aperture_map(address_map &map) ATTR_COLD; void mmio_map(address_map &map) ATTR_COLD; void vmi_map(address_map &map) ATTR_COLD; -private: + required_device m_vga; required_memory_region m_vga_rom; - +private: void legacy_memory_map(address_map &map) ATTR_COLD; void legacy_io_map(address_map &map) ATTR_COLD; u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); +}; +class sis6326_agp_device : public sis6326_pci_device +{ +public: + sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_reset() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + + virtual void config_map(address_map &map) override ATTR_COLD; + + virtual u8 capptr_r() override; +private: struct { bool enable = false; u8 data_rate = 0; @@ -54,6 +68,7 @@ private: void agp_command_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); }; +DECLARE_DEVICE_TYPE(SIS6326_PCI, sis6326_pci_device) DECLARE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device) #endif // MAME_BUS_PCI_SIS6326_H diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index 00e5a693935..8e82d7ef19a 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -9,7 +9,8 @@ * - need to map_first the IDE for make it recognize both that and floppy disks; * * TODO: - * - win98se: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine; + * - win98se/win98me: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine. + * Bridge memory/io bases not passed properly? * - win98se: PS/2 keyboard becomes unresponsive after a while; * - win98se: ACPI has issues on power off and reboot (workaround: use restart in MSDOS mode); * - freedos13: APMDOS hangs system with JEMMEX preloaded, works when issued standalone; From 6140d191d72f34dddcc77ab74282f521d0134018 Mon Sep 17 00:00:00 2001 From: cam900 Date: Wed, 25 Feb 2026 11:07:28 +0900 Subject: [PATCH 037/351] video/imagetek_i4100.cpp: Fix tilemap scroll in flip screen set (#15022) This commit fixes MT #09376. --- src/devices/video/imagetek_i4100.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/devices/video/imagetek_i4100.cpp b/src/devices/video/imagetek_i4100.cpp index b7937a8fb57..61ddd0302f7 100644 --- a/src/devices/video/imagetek_i4100.cpp +++ b/src/devices/video/imagetek_i4100.cpp @@ -1380,15 +1380,15 @@ void imagetek_i4100_device::draw_tilemap(screen_device &screen, bitmap_rgb32 &bi int const windowwidth = width >> 2; int const windowheight = height >> 3; - int const dx = m_screen_flip ? m_tilemap_flip_scrolldx[layer] : m_tilemap_scrolldx[layer]; - int const dy = m_screen_flip ? m_tilemap_flip_scrolldy[layer] : m_tilemap_scrolldy[layer]; + int const dx = m_screen_flip ? -m_tilemap_flip_scrolldx[layer] : m_tilemap_scrolldx[layer]; + int const dy = m_screen_flip ? -m_tilemap_flip_scrolldy[layer] : m_tilemap_scrolldy[layer]; sx += dx; sy += dy; for (int y = cliprect.min_y; y <= cliprect.max_y; y++) { - int const resy = (sy + y - wy); + int const resy = m_screen_flip ? (wy + y - sy) : (sy + y - wy); int const scrolly = (m_screen_flip ? (scrheight - resy - 1) : resy) & (windowheight - 1); int srcline = (wy + scrolly) & (height - 1); int const srctilerow = srcline >> tileshift; @@ -1399,7 +1399,7 @@ void imagetek_i4100_device::draw_tilemap(screen_device &screen, bitmap_rgb32 &bi for (int x = cliprect.min_x; x <= cliprect.max_x; x++) { - int const resx = (sx + x - wx); + int const resx = m_screen_flip ? (wx + x - sx) : (sx + x - wx); int const scrollx = (m_screen_flip ? (scrwidth - resx - 1) : resx) & (windowwidth - 1); int srccol = (wx + scrollx) & (width - 1); int const srctilecol = srccol >> tileshift; From 48de5878936ff22a484c960cb086a77ce5e7688e Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 25 Feb 2026 10:25:14 +0100 Subject: [PATCH 038/351] video/pc_vga_sis.cpp: fix lambda capture --- src/devices/bus/pci/sis6326.cpp | 3 ++- src/devices/video/pc_vga_sis.cpp | 2 +- src/mame/pc/pcipc_via.cpp | 3 +++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 598032889c1..9a457faaf6d 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -93,7 +93,8 @@ void sis6326_pci_device::device_reset() // bus master (hardwired) command = 0x0004; command_mask = 0x23; - // medium DEVSEL#, 66 MHz capable, has capabilities list + // medium DEVSEL# + // assume capability list & 66 MHz disabled in this variant status = 0x0200; remap_cb(); diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index d766775e132..2e930bd3890 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -345,7 +345,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) // ---- x--- MD27 INTA# enable // ---- -x-- MD26 BIOS ROM disable // ---- --xx MD25~MD24 - NAME([this] () { return (0 << 3); }) + NAME([] () { return (0 << 3); }) ); map(0x0f, 0x10).lrw8( NAME([this] (offs_t offset) { diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index 8e82d7ef19a..90b7ea64ba9 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -7,6 +7,9 @@ * * Notes: * - need to map_first the IDE for make it recognize both that and floppy disks; + * - win98se: none of the via4in1 drivers seems to actually work with this BIOS. It will return + * "registry error, please reboot", with CD-ROM drive becoming non-functional afterwards. + * winme acts mostly the same, except that it manages to install with v4.17 * * TODO: * - win98se/win98me: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine. From 1a257c6686f2698593197822584e7f0ef31c691e Mon Sep 17 00:00:00 2001 From: sairuk Date: Wed, 25 Feb 2026 12:44:54 +0000 Subject: [PATCH 039/351] Implement SDL_MouseWheelEvent integer member fallback for version less than 3.2.12 (#15024) * Add fallback for SDL_MouseWheelEvent when build with SDL3 < 3.2.12 --- src/osd/modules/input/input_sdl3.cpp | 10 ++++++++++ src/osd/sdl3/osdsdl.cpp | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/src/osd/modules/input/input_sdl3.cpp b/src/osd/modules/input/input_sdl3.cpp index 02155bf4d91..e69a7b02ceb 100644 --- a/src/osd/modules/input/input_sdl3.cpp +++ b/src/osd/modules/input/input_sdl3.cpp @@ -781,8 +781,13 @@ public: case SDL_EVENT_MOUSE_WHEEL: // adjust SDL 1-per-click to match Win32 120-per-click +#if SDL_VERSION_ATLEAST(3, 2, 12) m_v += std::lround(event.wheel.integer_y * 120 * input_device::RELATIVE_PER_PIXEL); m_h += std::lround(event.wheel.integer_x * 120 * input_device::RELATIVE_PER_PIXEL); +#else + m_v += std::lround(event.wheel.y * 120 * input_device::RELATIVE_PER_PIXEL); + m_h += std::lround(event.wheel.x * 120 * input_device::RELATIVE_PER_PIXEL); +#endif break; } } @@ -878,8 +883,13 @@ public: case SDL_EVENT_MOUSE_WHEEL: // adjust SDL 1-per-click to match Win32 120-per-click +#if SDL_VERSION_ATLEAST(3, 2, 12) m_v += std::lround(event.wheel.integer_y * 120 * input_device::RELATIVE_PER_PIXEL); m_h += std::lround(event.wheel.integer_x * 120 * input_device::RELATIVE_PER_PIXEL); +#else + m_v += std::lround(event.wheel.y * 120 * input_device::RELATIVE_PER_PIXEL); + m_h += std::lround(event.wheel.x * 120 * input_device::RELATIVE_PER_PIXEL); +#endif break; case SDL_EVENT_WINDOW_MOUSE_LEAVE: diff --git a/src/osd/sdl3/osdsdl.cpp b/src/osd/sdl3/osdsdl.cpp index 276085462c6..b6b45533f08 100644 --- a/src/osd/sdl3/osdsdl.cpp +++ b/src/osd/sdl3/osdsdl.cpp @@ -640,7 +640,11 @@ void sdl_osd_interface::process_events() osd_printf_error("sdl_osd_interface: error allocating pointer data\n"); break; } +#if SDL_VERSION_ATLEAST(3, 2, 12) window->mouse_wheel(device, std::lround(event.wheel.integer_y * 120)); +#else + window->mouse_wheel(device, std::lround(event.wheel.y * 120)); +#endif } } break; From 5739ba13687574de53ef9342eecfba53d5a3b1c5 Mon Sep 17 00:00:00 2001 From: cam900 Date: Thu, 26 Feb 2026 01:33:01 +0900 Subject: [PATCH 040/351] -kaneko/kaneko_grap2.cpp: Cleaned up code: (#15016) * Suppress side effects for debugger reads. * Reduced unnecessary memory accesses in RLE decompression. * Made some variables const, use abbreviated integer types consistently. -kaneko/galpani3.cpp: Cleanup: * Replaced macros with lambdas, reduced literal tags. * Updated notes, use abbreviated integer types consistently. --- src/mame/kaneko/galpani3.cpp | 349 +++++++++++++++---------------- src/mame/kaneko/kaneko_grap2.cpp | 65 +++--- src/mame/kaneko/kaneko_grap2.h | 105 +++++----- 3 files changed, 255 insertions(+), 264 deletions(-) diff --git a/src/mame/kaneko/galpani3.cpp b/src/mame/kaneko/galpani3.cpp index 480264fa260..b9b8190dbda 100644 --- a/src/mame/kaneko/galpani3.cpp +++ b/src/mame/kaneko/galpani3.cpp @@ -95,7 +95,10 @@ public: m_sprite_bitmap(1024, 1024) { } - void galpani3(machine_config &config); + void galpani3(machine_config &config) ATTR_COLD; + +protected: + virtual void video_start() override ATTR_COLD; private: required_device m_maincpu; @@ -103,27 +106,25 @@ private: required_device m_palette; required_device m_spritegen; - required_shared_ptr m_paletteram; - optional_shared_ptr m_spriteram; - required_shared_ptr m_priority_buffer; - required_shared_ptr m_sprregs; + required_shared_ptr m_paletteram; + required_shared_ptr m_spriteram; + required_shared_ptr m_priority_buffer; + required_shared_ptr m_sprregs; bitmap_ind16 m_sprite_bitmap; - uint16_t m_priority_buffer_scrollx = 0; - uint16_t m_priority_buffer_scrolly = 0; - std::unique_ptr m_spriteram32; - std::unique_ptr m_spc_regs; + u16 m_priority_buffer_scrollx = 0; + u16 m_priority_buffer_scrolly = 0; + std::unique_ptr m_spriteram32; + std::unique_ptr m_spc_regs; - void galpani3_suprnova_sprite32_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void galpani3_suprnova_sprite32regs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void galpani3_priority_buffer_scrollx_w(uint16_t data); - void galpani3_priority_buffer_scrolly_w(uint16_t data); + void sprite32_w(offs_t offset, u16 data, u16 mem_mask = ~0); + void sprite32regs_w(offs_t offset, u16 data, u16 mem_mask = ~0); + void priority_buffer_scrollx_w(u16 data); + void priority_buffer_scrolly_w(u16 data); - virtual void video_start() override ATTR_COLD; - - uint32_t screen_update_galpani3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - TIMER_DEVICE_CALLBACK_MEMBER(galpani3_vblank); - void galpani3_map(address_map &map) ATTR_COLD; + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + TIMER_DEVICE_CALLBACK_MEMBER(scanline); + void main_map(address_map &map) ATTR_COLD; }; @@ -135,200 +136,192 @@ private: -TIMER_DEVICE_CALLBACK_MEMBER(galpani3_state::galpani3_vblank)// 2, 3, 5 ? +TIMER_DEVICE_CALLBACK_MEMBER(galpani3_state::scanline) // 2, 3, 5 ? { - int scanline = param; + const int scanline = param; - if(scanline == 240) + if (scanline == 240) m_maincpu->set_input_line(2, HOLD_LINE); - if(scanline == 0) + if (scanline == 0) m_maincpu->set_input_line(3, HOLD_LINE); - if(scanline == 128) + if (scanline == 128) m_maincpu->set_input_line(5, HOLD_LINE); // timer, related to sound chip? } void galpani3_state::video_start() { - /* so we can use video/sknsspr.c */ + /* so we can use kaneko/sknsspr.cpp */ m_spritegen->skns_sprite_kludge(0,0); - m_spriteram32 = make_unique_clear(0x4000/4); - m_spc_regs = make_unique_clear(0x40/4); + m_spriteram32 = make_unique_clear(0x4000 / 4); + m_spc_regs = make_unique_clear(0x40 / 4); save_item(NAME(m_priority_buffer_scrollx)); save_item(NAME(m_priority_buffer_scrolly)); - save_pointer(NAME(m_spriteram32), 0x4000/4); - save_pointer(NAME(m_spc_regs), 0x40/4); + save_pointer(NAME(m_spriteram32), 0x4000 / 4); + save_pointer(NAME(m_spc_regs), 0x40 / 4); } -#define SPRITE_DRAW_PIXEL(_pri) \ - if (((sprdat & 0xc000) == _pri) && ((sprdat & 0xff) != 0)) \ - { \ - dst[drawx] = paldata[sprdat & 0x3fff]; \ - } - -// Switchable brightness value in highest bit of palette -// TODO : m_framebuffer_bright1 is alpha-blended? -#define FB_DRAW_PIXEL(_chip, _pixel) \ - int alpha = 0xff; \ - const pen_t &pal = m_grap2[_chip]->pen(_pixel); \ - if (m_grap2[_chip]->m_framebuffer_palette[_pixel] & 0x8000) \ - { \ - alpha = (m_grap2[_chip]->m_framebuffer_bright2 & 0xff); \ - } \ - else \ - { \ - alpha = (m_grap2[_chip]->m_framebuffer_bright1 & 0xff); \ - } \ - if (alpha) \ - { \ - if (alpha == 0xff) \ - dst[drawx] = pal; \ - else \ - dst[drawx] = alpha_blend_r32(dst[drawx], pal, alpha); \ - } - -uint32_t galpani3_state::screen_update_galpani3(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +u32 galpani3_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { pen_t const *const paldata = m_palette->pens(); bitmap.fill(0, cliprect); - m_spritegen->skns_draw_sprites(m_sprite_bitmap, cliprect, m_spriteram32.get(), 0x4000, m_spc_regs.get() ); + m_spritegen->skns_draw_sprites(m_sprite_bitmap, cliprect, m_spriteram32.get(), 0x4000, m_spc_regs.get()); -// popmessage("%02x %02x", m_grap2[0]->m_framebuffer_bright2, m_grap2[1]->m_framebuffer_bright2); +// popmessage("%02x %02x", m_grap2[0]->framebuffer1_fbbright2_r(), m_grap2[1]->framebuffer1_fbbright2_r()); - for (int drawy=cliprect.min_y;drawy<=cliprect.max_y;drawy++) + for (int drawy = cliprect.min_y; drawy <= cliprect.max_y; drawy++) { - uint16_t const *const sprline = &m_sprite_bitmap.pix(drawy); - uint16_t const *const srcline1 = m_grap2[0]->m_framebuffer.get() + ((drawy+m_grap2[0]->m_framebuffer_scrolly+11)&0x1ff) * 0x200; - uint16_t const *const srcline2 = m_grap2[1]->m_framebuffer.get() + ((drawy+m_grap2[1]->m_framebuffer_scrolly+11)&0x1ff) * 0x200; - uint16_t const *const srcline3 = m_grap2[2]->m_framebuffer.get() + ((drawy+m_grap2[2]->m_framebuffer_scrolly+11)&0x1ff) * 0x200; + u16 const *const sprline = &m_sprite_bitmap.pix(drawy); + u16 const *const srcline1 = m_grap2[0]->framebuffer() + ((drawy + m_grap2[0]->framebuffer_scrolly() + 11) & 0x1ff) * 0x200; + u16 const *const srcline2 = m_grap2[1]->framebuffer() + ((drawy + m_grap2[1]->framebuffer_scrolly() + 11) & 0x1ff) * 0x200; + u16 const *const srcline3 = m_grap2[2]->framebuffer() + ((drawy + m_grap2[2]->framebuffer_scrolly() + 11) & 0x1ff) * 0x200; - uint16_t const *const priline = m_priority_buffer + ((drawy+m_priority_buffer_scrolly+11)&0x1ff) * 0x200; + u16 const *const priline = m_priority_buffer + ((drawy + m_priority_buffer_scrolly + 11) & 0x1ff) * 0x200; - uint32_t *const dst = &bitmap.pix(drawy & 0x3ff); + u32 *const dst = &bitmap.pix(drawy & 0x3ff); - for (int drawx=cliprect.min_x;drawx<=cliprect.max_x;drawx++) + for (int drawx = cliprect.min_x; drawx <= cliprect.max_x; drawx++) { - int sproffs = drawx & 0x3ff; - int srcoffs1 = (drawx+m_grap2[0]->m_framebuffer_scrollx+67)&0x1ff; - int srcoffs2 = (drawx+m_grap2[1]->m_framebuffer_scrollx+67)&0x1ff; - int srcoffs3 = (drawx+m_grap2[2]->m_framebuffer_scrollx+67)&0x1ff; + const int sproffs = drawx & 0x3ff; + const int srcoffs1 = (drawx + m_grap2[0]->framebuffer_scrollx() + 67) & 0x1ff; + const int srcoffs2 = (drawx + m_grap2[1]->framebuffer_scrollx() + 67) & 0x1ff; + const int srcoffs3 = (drawx + m_grap2[2]->framebuffer_scrollx() + 67) & 0x1ff; - int prioffs = (drawx+m_priority_buffer_scrollx+66)&0x1ff; + const int prioffs = (drawx + m_priority_buffer_scrollx + 66) & 0x1ff; - uint16_t sprdat = sprline[sproffs]; - uint8_t dat1 = srcline1[srcoffs1]; - uint8_t dat2 = srcline2[srcoffs2]; - uint8_t dat3 = srcline3[srcoffs3]; + const u16 sprdat = sprline[sproffs]; + const u8 dat1 = srcline1[srcoffs1]; + const u8 dat2 = srcline2[srcoffs2]; + const u8 dat3 = srcline3[srcoffs3]; - uint8_t pridat = priline[prioffs]; + const u8 pridat = priline[prioffs]; + + auto const sprite_draw_pixel = + [paldata] (u32 &dst, u16 sprdat, u16 pri) + { + if (((sprdat & 0xc000) == pri) && ((sprdat & 0xff) != 0)) + { + dst = paldata[sprdat & 0x3fff]; + } + }; + + // Switchable brightness value in highest bit of palette + // TODO : framebuffer1_fbbright1_r() is alpha-blended? + auto const fb_draw_pixel = + [this] (u32 &dst, u8 _chip, u16 _pixel) + { + int alpha = 0xff; + const pen_t &pal = m_grap2[_chip]->pen(_pixel); + if (BIT(m_grap2[_chip]->pal_r(_pixel), 15)) + { + alpha = (m_grap2[_chip]->framebuffer1_fbbright2_r() & 0xff); + } + else + { + alpha = (m_grap2[_chip]->framebuffer1_fbbright1_r() & 0xff); + } + if (alpha) + { + if (alpha == 0xff) + dst = pal; + else + dst = alpha_blend_r32(dst, pal, alpha); + } + }; // TODO : Verify priorities, blendings from real PCB. - if (pridat==0x0f) // relates to the area you've drawn over + if (pridat == 0x0f) // relates to the area you've drawn over { - SPRITE_DRAW_PIXEL(0x0000); - if (m_grap2[2]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(2, dat3); - } - SPRITE_DRAW_PIXEL(0x4000); - if (dat1 && m_grap2[0]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(0, dat1); - } - SPRITE_DRAW_PIXEL(0x8000); - if (dat2 && m_grap2[1]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(1, dat2); - } - SPRITE_DRAW_PIXEL(0xc000); + sprite_draw_pixel(dst[drawx], sprdat, 0x0000); + if (m_grap2[2]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 2, dat3); + + sprite_draw_pixel(dst[drawx], sprdat, 0x4000); + if (dat1 && m_grap2[0]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 0, dat1); + + sprite_draw_pixel(dst[drawx], sprdat, 0x8000); + if (dat2 && m_grap2[1]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 1, dat2); + + sprite_draw_pixel(dst[drawx], sprdat, 0xc000); } - else if (pridat==0xcf) // the girl + else if (pridat == 0xcf) // the girl { - SPRITE_DRAW_PIXEL(0x0000); - if (m_grap2[0]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(0, 0x100); - } - SPRITE_DRAW_PIXEL(0x4000); - if (m_grap2[1]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(1, 0x100); - } - SPRITE_DRAW_PIXEL(0x8000); - if (dat3 && m_grap2[2]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(2, dat3); - } - SPRITE_DRAW_PIXEL(0xc000); + sprite_draw_pixel(dst[drawx], sprdat, 0x0000); + if (m_grap2[0]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 0, 0x100); + + sprite_draw_pixel(dst[drawx], sprdat, 0x4000); + if (m_grap2[1]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 1, 0x100); + + sprite_draw_pixel(dst[drawx], sprdat, 0x8000); + if (dat3 && m_grap2[2]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 2, dat3); + + sprite_draw_pixel(dst[drawx], sprdat, 0xc000); } - else if (pridat==0x30) // during the 'gals boxes' on the intro + else if (pridat == 0x30) // during the 'gals boxes' on the intro { - SPRITE_DRAW_PIXEL(0x0000); - if (m_grap2[1]->m_framebuffer_enable) // TODO : Opaqued and Swapped order? - { - FB_DRAW_PIXEL(1, dat2); - } - SPRITE_DRAW_PIXEL(0x4000); - if (dat1 && m_grap2[0]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(0, dat1); - } - SPRITE_DRAW_PIXEL(0x8000); - if (dat3 && m_grap2[2]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(2, dat3); - } - SPRITE_DRAW_PIXEL(0xc000); + sprite_draw_pixel(dst[drawx], sprdat, 0x0000); + if (m_grap2[1]->framebuffer_enable()) // TODO : Opaqued and Swapped order? + fb_draw_pixel(dst[drawx], 1, dat2); + + sprite_draw_pixel(dst[drawx], sprdat, 0x4000); + if (dat1 && m_grap2[0]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 0, dat1); + + sprite_draw_pixel(dst[drawx], sprdat, 0x8000); + if (dat3 && m_grap2[2]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 2, dat3); + + sprite_draw_pixel(dst[drawx], sprdat, 0xc000); } else { - SPRITE_DRAW_PIXEL(0x0000); - if (m_grap2[0]->m_framebuffer_enable) // TODO : Opaque drawing 1st framebuffer in real PCB? - { - FB_DRAW_PIXEL(0, dat1); - } - SPRITE_DRAW_PIXEL(0x4000); - if (dat2 && m_grap2[1]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(1, dat2); - } - SPRITE_DRAW_PIXEL(0x8000); - if (dat3 && m_grap2[2]->m_framebuffer_enable) - { - FB_DRAW_PIXEL(2, dat3); - } - SPRITE_DRAW_PIXEL(0xc000); - } + sprite_draw_pixel(dst[drawx], sprdat, 0x0000); + if (m_grap2[0]->framebuffer_enable()) // TODO : Opaque drawing 1st framebuffer in real PCB? + fb_draw_pixel(dst[drawx], 0, dat1); - /* - else if (pridat==0x2f) // area outside of the girl - { - //dst[drawx] = machine().rand()&0x3fff; - } + sprite_draw_pixel(dst[drawx], sprdat, 0x4000); + if (dat2 && m_grap2[1]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 1, dat2); - else if (pridat==0x00) // the initial line / box that gets drawn - { - //dst[drawx] = machine().rand()&0x3fff; + sprite_draw_pixel(dst[drawx], sprdat, 0x8000); + if (dat3 && m_grap2[2]->framebuffer_enable()) + fb_draw_pixel(dst[drawx], 2, dat3); + + sprite_draw_pixel(dst[drawx], sprdat, 0xc000); } - else if (pridat==0x30) // during the 'gals boxes' on the intro +#if 0 + else if (pridat == 0x2f) // area outside of the girl { - //dst[drawx] = machine().rand()&0x3fff; + //dst[drawx] = machine().rand() & 0x3fff; } - else if (pridat==0x0c) // 'nice' at end of level + else if (pridat == 0x00) // the initial line / box that gets drawn { - //dst[drawx] = machine().rand()&0x3fff; + //dst[drawx] = machine().rand() & 0x3fff; + } + else if (pridat == 0x30) // during the 'gals boxes' on the intro + { + //dst[drawx] = machine().rand() & 0x3fff; + } + else if (pridat == 0x0c) // 'nice' at end of level + { + //dst[drawx] = machine().rand() & 0x3fff; } else { - //printf("%02x, ",pridat); + //printf("%02x, ",pridat); } - */ +#endif } } return 0; @@ -386,40 +379,40 @@ static INPUT_PORTS_START( galpani3 ) INPUT_PORTS_END -void galpani3_state::galpani3_suprnova_sprite32_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void galpani3_state::sprite32_w(offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_spriteram[offset]); - offset>>=1; - m_spriteram32[offset]=(m_spriteram[offset*2+1]<<16) | (m_spriteram[offset*2]); + offset >>= 1; + m_spriteram32[offset] = (m_spriteram[offset * 2 + 1] << 16) | (m_spriteram[offset * 2]); } -void galpani3_state::galpani3_suprnova_sprite32regs_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void galpani3_state::sprite32regs_w(offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_sprregs[offset]); - offset>>=1; - m_spc_regs[offset]=(m_sprregs[offset*2+1]<<16) | (m_sprregs[offset*2]); + offset >>= 1; + m_spc_regs[offset] = (m_sprregs[offset * 2 + 1] << 16) | (m_sprregs[offset * 2]); } -void galpani3_state::galpani3_priority_buffer_scrollx_w(uint16_t data) +void galpani3_state::priority_buffer_scrollx_w(u16 data) { m_priority_buffer_scrollx = data; } -void galpani3_state::galpani3_priority_buffer_scrolly_w(uint16_t data) +void galpani3_state::priority_buffer_scrolly_w(u16 data) { m_priority_buffer_scrolly = data; } -void galpani3_state::galpani3_map(address_map &map) +void galpani3_state::main_map(address_map &map) { map(0x000000, 0x17ffff).rom(); map(0x200000, 0x20ffff).ram(); // area [B] - Work RAM map(0x280000, 0x287fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // area [A] - palette for sprites - map(0x300000, 0x303fff).ram().w(FUNC(galpani3_state::galpani3_suprnova_sprite32_w)).share("spriteram"); - map(0x380000, 0x38003f).ram().w(FUNC(galpani3_state::galpani3_suprnova_sprite32regs_w)).share("sprregs"); + map(0x300000, 0x303fff).ram().w(FUNC(galpani3_state::sprite32_w)).share(m_spriteram); + map(0x380000, 0x38003f).ram().w(FUNC(galpani3_state::sprite32regs_w)).share(m_sprregs); map(0x400000, 0x40ffff).ram().share("mcuram"); // area [C] @@ -429,14 +422,14 @@ void galpani3_state::galpani3_map(address_map &map) map(0x700000, 0x700001).w("toybox", FUNC(kaneko_toybox_device::mcu_com3_w)); map(0x780000, 0x780001).r("toybox", FUNC(kaneko_toybox_device::mcu_status_r)); - map(0x800000, 0x9fffff).m("grap2_0", FUNC(kaneko_grap2_device::grap2_map)); - map(0xa00000, 0xbfffff).m("grap2_1", FUNC(kaneko_grap2_device::grap2_map)); - map(0xc00000, 0xdfffff).m("grap2_2", FUNC(kaneko_grap2_device::grap2_map)); + map(0x800000, 0x9fffff).m(m_grap2[0], FUNC(kaneko_grap2_device::grap2_map)); + map(0xa00000, 0xbfffff).m(m_grap2[1], FUNC(kaneko_grap2_device::grap2_map)); + map(0xc00000, 0xdfffff).m(m_grap2[2], FUNC(kaneko_grap2_device::grap2_map)); // ?? priority / alpha buffer? - map(0xe00000, 0xe7ffff).ram().share("priority_buffer"); // area [J] - A area ? odd bytes only, initialized 00..ff,00..ff,..., then cleared - map(0xe80000, 0xe80001).w(FUNC(galpani3_state::galpani3_priority_buffer_scrollx_w)); // scroll? - map(0xe80002, 0xe80003).w(FUNC(galpani3_state::galpani3_priority_buffer_scrolly_w)); // scroll? + map(0xe00000, 0xe7ffff).ram().share(m_priority_buffer); // area [J] - A area ? odd bytes only, initialized 00..ff,00..ff,..., then cleared + map(0xe80000, 0xe80001).w(FUNC(galpani3_state::priority_buffer_scrollx_w)); // scroll? + map(0xe80002, 0xe80003).w(FUNC(galpani3_state::priority_buffer_scrolly_w)); // scroll? map(0xf00000, 0xf00001).noprw(); // ? written once (2nd opcode, $1.b) @@ -453,8 +446,8 @@ void galpani3_state::galpani3_map(address_map &map) void galpani3_state::galpani3(machine_config &config) { M68000(config, m_maincpu, XTAL(28'636'363)/2); // Confirmed from PCB - m_maincpu->set_addrmap(AS_PROGRAM, &galpani3_state::galpani3_map); - TIMER(config, "scantimer").configure_scanline(FUNC(galpani3_state::galpani3_vblank), "screen", 0, 1); + m_maincpu->set_addrmap(AS_PROGRAM, &galpani3_state::main_map); + TIMER(config, "scantimer").configure_scanline(FUNC(galpani3_state::scanline), "screen", 0, 1); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); @@ -462,7 +455,7 @@ void galpani3_state::galpani3(machine_config &config) screen.set_size(64*8, 64*8); screen.set_visarea(0*8, 40*8-1, 0*8, 30*8-1); //screen.set_visarea(0*8, 64*8-1, 0*8, 64*8-1); - screen.set_screen_update(FUNC(galpani3_state::screen_update_galpani3)); + screen.set_screen_update(FUNC(galpani3_state::screen_update)); EEPROM_93C46_16BIT(config, "eeprom"); diff --git a/src/mame/kaneko/kaneko_grap2.cpp b/src/mame/kaneko/kaneko_grap2.cpp index 6d6d2984aa6..f2f59a885a9 100644 --- a/src/mame/kaneko/kaneko_grap2.cpp +++ b/src/mame/kaneko/kaneko_grap2.cpp @@ -31,7 +31,7 @@ void kaneko_grap2_device::grap2_map(address_map &map) DEFINE_DEVICE_TYPE(KANEKO_GRAP2, kaneko_grap2_device, "kaneko_grap2", "Kaneko GRAP2") -kaneko_grap2_device::kaneko_grap2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +kaneko_grap2_device::kaneko_grap2_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, KANEKO_GRAP2, tag, owner, clock) , device_rom_interface(mconfig, *this) , device_palette_interface(mconfig, *this) @@ -40,15 +40,15 @@ kaneko_grap2_device::kaneko_grap2_device(const machine_config &mconfig, const ch void kaneko_grap2_device::device_start() { - m_framebuffer = make_unique_clear(0x80000/2); - m_framebuffer_palette = make_unique_clear(PALETTE_SIZE); - m_framebuffer_unk1 = make_unique_clear(0x400/2); - m_framebuffer_unk2 = make_unique_clear(0x400/2); + m_framebuffer = make_unique_clear(0x80000 / 2); + m_framebuffer_palette = make_unique_clear(PALETTE_SIZE); + m_framebuffer_unk1 = make_unique_clear(0x400 / 2); + m_framebuffer_unk2 = make_unique_clear(0x400 / 2); - save_pointer(NAME(m_framebuffer), 0x80000/2); + save_pointer(NAME(m_framebuffer), 0x80000 / 2); save_pointer(NAME(m_framebuffer_palette), PALETTE_SIZE); - save_pointer(NAME(m_framebuffer_unk1), 0x400/2); - save_pointer(NAME(m_framebuffer_unk2), 0x400/2); + save_pointer(NAME(m_framebuffer_unk1), 0x400 / 2); + save_pointer(NAME(m_framebuffer_unk2), 0x400 / 2); save_item(NAME(m_framebuffer_scrolly)); save_item(NAME(m_framebuffer_scrollx)); @@ -71,7 +71,7 @@ void kaneko_grap2_device::device_reset() m_framebuffer_bright2 = 0; } -uint16_t kaneko_grap2_device::regs1_r(offs_t offset, uint16_t mem_mask) +u16 kaneko_grap2_device::regs1_r(offs_t offset, u16 mem_mask) { switch (offset) { @@ -79,14 +79,13 @@ uint16_t kaneko_grap2_device::regs1_r(offs_t offset, uint16_t mem_mask) return m_framebuffer_enable; case 0xb: - { - m_regs1_i ^= 1; - if (m_regs1_i) return 0xfffe; - else return 0xffff; - } + if (!machine().side_effects_disabled()) + m_regs1_i ^= 1; + return 0xfffe | ((~m_regs1_i) & 1); default: - logerror("%s: regs1_r %02x %04x\n", machine().describe_context(), offset, mem_mask); + if (!machine().side_effects_disabled()) + logerror("%s: regs1_r %02x %04x\n", machine().describe_context(), offset, mem_mask); break; } @@ -95,75 +94,65 @@ uint16_t kaneko_grap2_device::regs1_r(offs_t offset, uint16_t mem_mask) -void kaneko_grap2_device::do_rle(uint32_t address, uint32_t dstaddress) +void kaneko_grap2_device::do_rle(u32 address, u32 dstaddress) { int rle_count = 0; int normal_count = 0; - uint8_t data; + u8 data; while (dstaddress < 0x40000) { if (rle_count == 0 && normal_count == 0) // we need a new code byte { - data = read_byte(address); + data = read_byte(address++); if ((data & 0x80)) // stream of normal bytes follows { normal_count = (data & 0x7f) + 1; - address++; } else // rle block { rle_count = (data & 0x7f) + 1; - address++; + data = read_byte(address++); } } else if (rle_count) { - data = read_byte(address); - m_framebuffer[dstaddress] = data; - dstaddress++; + m_framebuffer[dstaddress++] = data; rle_count--; - - if (rle_count == 0) - { - address++; - } } else if (normal_count) { - data = read_byte(address); - m_framebuffer[dstaddress] = data; - dstaddress++; + data = read_byte(address++); + m_framebuffer[dstaddress++] = data; normal_count--; - address++; } } } -void kaneko_grap2_device::regs1_go_w(uint16_t data) +void kaneko_grap2_device::regs1_go_w(u16 data) { - uint32_t address = m_regs1_address_regs[1] | (m_regs1_address_regs[0] << 16); - uint32_t dstaddress = (data & 0x1ff) | ((m_regs2 & 0x1ff) << 9); + const u32 address = m_regs1_address_regs[1] | (m_regs1_address_regs[0] << 16); + const u32 dstaddress = (data & 0x1ff) | ((m_regs2 & 0x1ff) << 9); if ((data & 0xf000) == 0x3000) do_rle(address, dstaddress); } -void kaneko_grap2_device::set_color_555(pen_t color, int rshift, int gshift, int bshift, uint16_t data) +void kaneko_grap2_device::set_color_555(pen_t color, int rshift, int gshift, int bshift, u16 data) { set_pen_color(color, pal5bit(data >> rshift), pal5bit(data >> gshift), pal5bit(data >> bshift)); } -void kaneko_grap2_device::framebuffer1_palette_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void kaneko_grap2_device::framebuffer1_palette_w(offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_framebuffer_palette[offset]); set_color_555(offset, 5, 10, 0, m_framebuffer_palette[offset]); } /* definitely looks like a cycling bg colour used for the girls */ -void kaneko_grap2_device::framebuffer1_bgcol_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void kaneko_grap2_device::framebuffer1_bgcol_w(offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_framebuffer_palette[0x100]); set_color_555(0x100, 5, 10, 0, m_framebuffer_palette[0x100]); diff --git a/src/mame/kaneko/kaneko_grap2.h b/src/mame/kaneko/kaneko_grap2.h index 548fec5e08d..0bc2975d775 100644 --- a/src/mame/kaneko/kaneko_grap2.h +++ b/src/mame/kaneko/kaneko_grap2.h @@ -14,63 +14,72 @@ class kaneko_grap2_device : public device_t, public device_rom_interface<32>, pu public: static constexpr unsigned PALETTE_SIZE = 256 + 1; // 0x00-0xff is internal palette, 0x100 is background colour - kaneko_grap2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + kaneko_grap2_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - uint16_t regs1_r(offs_t offset, uint16_t mem_mask = ~0); - void regs1_go_w(uint16_t data); + // getters + u16 *framebuffer() { return m_framebuffer.get(); } + u16 framebuffer_scrollx() { return m_framebuffer_scrollx; } + u16 framebuffer_scrolly() { return m_framebuffer_scrolly; } + u16 framebuffer_enable() { return m_framebuffer_enable; } + + // handlers + u16 regs1_r(offs_t offset, u16 mem_mask = ~0); + void regs1_go_w(u16 data); + + void framebuffer1_enable_w(u16 data) { m_framebuffer_enable = data; } + + void framebuffer1_scrolly_w(u16 data) { m_framebuffer_scrolly = data; } + void framebuffer1_scrollx_w(u16 data) { m_framebuffer_scrollx = data; } + + u16 framebuffer1_fbbright1_r() { return m_framebuffer_bright1; } + u16 framebuffer1_fbbright2_r() { return m_framebuffer_bright2; } + + void framebuffer1_fbbright1_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_bright1); } + void framebuffer1_fbbright2_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_bright2); } + + void framebuffer1_bgcol_w(offs_t offset, u16 data, u16 mem_mask = ~0); + + void regs1_address_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_regs1_address_regs[offset]); } + void regs2_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_regs2); } + + u16 framebuffer_r(offs_t offset) { return m_framebuffer[offset]; } + void framebuffer_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_framebuffer[offset]); } + u16 pal_r(offs_t offset) { return m_framebuffer_palette[offset]; } + void framebuffer1_palette_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 unk1_r(offs_t offset) { return m_framebuffer_unk1[offset]; } + void unk1_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_unk1[offset]); } + u16 unk2_r(offs_t offset) { return m_framebuffer_unk2[offset]; } + void unk2_w(offs_t offset, u16 data, u16 mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_unk2[offset]); } void grap2_map(address_map &map) ATTR_COLD; - void do_rle(uint32_t address, uint32_t dstaddress); - void set_color_555(pen_t color, int rshift, int gshift, int bshift, uint16_t data); - - uint16_t m_framebuffer_scrolly = 0; - uint16_t m_framebuffer_scrollx = 0; - uint16_t m_framebuffer_enable = 0; - int m_regs1_i = 0; - - uint16_t m_framebuffer_bright1 = 0; - uint16_t m_framebuffer_bright2 = 0; - - uint16_t m_regs1_address_regs[0x2]{}; - uint16_t m_regs2 = 0; - - void framebuffer1_enable_w(uint16_t data) { m_framebuffer_enable = data; } - - void framebuffer1_scrolly_w(uint16_t data) { m_framebuffer_scrolly = data; } - void framebuffer1_scrollx_w(uint16_t data) { m_framebuffer_scrollx = data; } - - uint16_t framebuffer1_fbbright1_r() { return m_framebuffer_bright1; } - uint16_t framebuffer1_fbbright2_r() { return m_framebuffer_bright2; } - - void framebuffer1_fbbright1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_bright1); } - void framebuffer1_fbbright2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_bright2); } - - void framebuffer1_bgcol_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - - void regs1_address_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_regs1_address_regs[offset]); } - void regs2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_regs2); } - - uint16_t framebuffer_r(offs_t offset) { return m_framebuffer[offset]; } - void framebuffer_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_framebuffer[offset]); } - uint16_t pal_r(offs_t offset) { return m_framebuffer_palette[offset]; } - void framebuffer1_palette_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t unk1_r(offs_t offset) { return m_framebuffer_unk1[offset]; } - void unk1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_unk1[offset]); } - uint16_t unk2_r(offs_t offset) { return m_framebuffer_unk2[offset]; } - void unk2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) { COMBINE_DATA(&m_framebuffer_unk2[offset]); } - - std::unique_ptr m_framebuffer; - std::unique_ptr m_framebuffer_palette; - std::unique_ptr m_framebuffer_unk1; - std::unique_ptr m_framebuffer_unk2; - protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; // device_palette_interface overrides - virtual uint32_t palette_entries() const noexcept override { return PALETTE_SIZE; } + virtual u32 palette_entries() const noexcept override { return PALETTE_SIZE; } + +private: + void do_rle(u32 address, u32 dstaddress); + void set_color_555(pen_t color, int rshift, int gshift, int bshift, u16 data); + + u16 m_framebuffer_scrolly = 0; + u16 m_framebuffer_scrollx = 0; + u16 m_framebuffer_enable = 0; + u8 m_regs1_i = 0; + + u16 m_framebuffer_bright1 = 0; + u16 m_framebuffer_bright2 = 0; + + u16 m_regs1_address_regs[0x2]{}; + u16 m_regs2 = 0; + + std::unique_ptr m_framebuffer; + std::unique_ptr m_framebuffer_palette; + std::unique_ptr m_framebuffer_unk1; + std::unique_ptr m_framebuffer_unk2; + }; From 68e9fdf318e2c3def82602be67bf9e297dfeeae8 Mon Sep 17 00:00:00 2001 From: James Charles Taylor <125845637+JimCarlTay@users.noreply.github.com> Date: Thu, 26 Feb 2026 00:50:53 +0800 Subject: [PATCH 041/351] tvgames: Changed manufacturer to "Takara Tomy" for dressmtv, prail07 and tomycar. --- src/mame/tvgames/generalplus_gpl16250_rom.cpp | 2 +- src/mame/tvgames/generalplus_gpl16250_romram.cpp | 2 +- src/mame/tvgames/spg29x.cpp | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/tvgames/generalplus_gpl16250_rom.cpp b/src/mame/tvgames/generalplus_gpl16250_rom.cpp index 4300b01af3a..088faa57bda 100644 --- a/src/mame/tvgames/generalplus_gpl16250_rom.cpp +++ b/src/mame/tvgames/generalplus_gpl16250_rom.cpp @@ -813,7 +813,7 @@ CONS(2009, smartfpf, smartfp, 0, base, smartfp, gcm394_game_state, empty_init, CONS(2008, fpsport, 0, 0, base, base, gcm394_game_state, empty_init, "Fisher-Price", "3-in-1 Smart Sports! (US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND) // uses a barcode card scanner device with custom cards -CONS(200?, dressmtv, 0, 0, base_alt_irq, dressmtv, gcm394_game_state, empty_init, "Tomy Takara", "Disney Princess Dress Mania TV (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) +CONS(200?, dressmtv, 0, 0, base_alt_irq, dressmtv, gcm394_game_state, empty_init, "Takara Tomy", "Disney Princess Dress Mania TV (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) // These are ports of the 'Family Sport' games to GPL16250 type hardware, but they don't seem to use many unSP 2.0 instructions. // The menu style is close to 'm505neo' but the game selection is closer to 'dnv200fs' (but without the Sports titles removed, and with a few other extras not found on that unit) diff --git a/src/mame/tvgames/generalplus_gpl16250_romram.cpp b/src/mame/tvgames/generalplus_gpl16250_romram.cpp index c55eca3a08a..ac7e94cd0c2 100644 --- a/src/mame/tvgames/generalplus_gpl16250_romram.cpp +++ b/src/mame/tvgames/generalplus_gpl16250_romram.cpp @@ -667,5 +667,5 @@ CONS(2011, jak_sinv, 0, 0, gpl16250_romram, jak_s500, jak_s500_game_state, init_ CONS(2011, wrlshunt, 0, 0, gpl16250_romram, wrlshunt, wrlshunt_game_state, init_wrlshunt, "Hamy / Kids Station Toys Inc", "Wireless Hunting Video Game System", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) // ぼくはトミカドライバー はたらくのりもの大集合！ -CONS(2014, tomycar, 0, 0, gpl16250_romram, paccon, jak_prft_game_state, init_wrlshunt, "Tomy Takara", "Boku wa Tomica Driver - Hataraku Norimono Daishuugou! (Japan)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) +CONS(2014, tomycar, 0, 0, gpl16250_romram, paccon, jak_prft_game_state, init_wrlshunt, "Takara Tomy", "Boku wa Tomica Driver - Hataraku Norimono Daishuugou! (Japan)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) diff --git a/src/mame/tvgames/spg29x.cpp b/src/mame/tvgames/spg29x.cpp index 4395319a0c9..f57c4ea6433 100644 --- a/src/mame/tvgames/spg29x.cpp +++ b/src/mame/tvgames/spg29x.cpp @@ -625,7 +625,7 @@ COMP( 2011, jak_bbsf, 0, 0, spg29x, hyperscan, spg29x_nand_game_stat COMP( 201?, zonefamf, 0, 0, spg29x, hyperscan, spg29x_zonefamf_game_state, nand_zonefamf,"Zone", "Zone Family Fit", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // uses SPG291A-Hl171 -COMP( 2007, prail07, 0, 0, spg29x, hyperscan, spg29x_zonefamf_game_state, nand_zonefamf,"Tomy Takara", "Boku wa Plarail Untenshi - Shinkansen de Ikou! (2007 version) (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 2007, prail07, 0, 0, spg29x, hyperscan, spg29x_zonefamf_game_state, nand_zonefamf,"Takara Tomy", "Boku wa Plarail Untenshi - Shinkansen de Ikou! (2007 version) (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) CONS( 2007, bratzlfe, 0, 0, spg29x, hyperscan, spg29x_game_state, empty_init, "MGA", "Bratz Life", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) From e66fe474c0f49dae3efb0715ed88ad2cabf60f12 Mon Sep 17 00:00:00 2001 From: Matthew Daniels <108370479+gm-matthew@users.noreply.github.com> Date: Wed, 25 Feb 2026 16:58:22 +0000 Subject: [PATCH 042/351] cpu/sharc: Hooked up flag pin outputs for the interpreter. (#15020) --- src/devices/cpu/sharc/sharc.cpp | 1 + src/devices/cpu/sharc/sharc.h | 4 ++++ src/devices/cpu/sharc/sharcops.hxx | 12 +++++++++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index 08acb98f5b3..4104f82aab2 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -158,6 +158,7 @@ adsp21062_device::adsp21062_device( , m_swap_dag2_4_7(nullptr) , m_swap_r0_7(nullptr) , m_swap_r8_15(nullptr) + , m_flag_out_cb(*this) , m_blocks(*this, "block%u", 0U) , m_flag_pending_val{ 0, 0, 0, 0 } , m_write_stalled_pending_val{ false } diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 01852a02a67..88682984b5f 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -30,6 +30,8 @@ public: virtual ~adsp21062_device() override; // configuration helpers + template auto flag_out() { return m_flag_out[N].bind(); } + void set_boot_mode(const sharc_boot_mode boot_mode) { m_boot_mode = boot_mode; } void enable_recompiler(); @@ -289,6 +291,8 @@ private: memory_access<24, 3, -3, ENDIANNESS_LITTLE>::specific m_program; memory_access<32, 2, -2, ENDIANNESS_LITTLE>::specific m_data; + devcb_write8::array<4> m_flag_out_cb; + required_shared_ptr_array m_blocks; opcode_func m_sharc_op[512]; diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index 3277d7d9fd9..b1bcced67c7 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -448,7 +448,17 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) m_core->mode1 = data; break; - case 0xc: m_core->astat = data; break; /* ASTAT */ + case 0xc: /* ASTAT */ + { + u8 const flags = (m_core->astat ^ data) & (BIT(m_core->mode2, 15, 4) << FLG0_SHIFT); + m_core->astat = data; + for (unsigned i = 0; i < 4; i++) + { + if (BIT(flags, FLG0_SHIFT + i)) + m_flag_out_cb[i](BIT(data, FLG0_SHIFT + i)); + } + break; + } case 0xd: /* IMASK */ check_interrupts(); From 66cca629d007cfcf0498690f43ff234647f17d79 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Thu, 26 Feb 2026 04:05:09 +1100 Subject: [PATCH 043/351] kaneko/kaneko_grap2.cpp: Don't split initialisation between files; cpu/sharc: Fixed build. --- src/devices/cpu/sharc/sharc.h | 2 +- src/mame/kaneko/kaneko_grap2.cpp | 8 ++++++++ src/mame/kaneko/kaneko_grap2.h | 17 ++++++++--------- 3 files changed, 17 insertions(+), 10 deletions(-) diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 88682984b5f..9c96bb7b36c 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -30,7 +30,7 @@ public: virtual ~adsp21062_device() override; // configuration helpers - template auto flag_out() { return m_flag_out[N].bind(); } + template auto flag_out() { return m_flag_out_cb[N].bind(); } void set_boot_mode(const sharc_boot_mode boot_mode) { m_boot_mode = boot_mode; } void enable_recompiler(); diff --git a/src/mame/kaneko/kaneko_grap2.cpp b/src/mame/kaneko/kaneko_grap2.cpp index f2f59a885a9..7322087382d 100644 --- a/src/mame/kaneko/kaneko_grap2.cpp +++ b/src/mame/kaneko/kaneko_grap2.cpp @@ -35,6 +35,14 @@ kaneko_grap2_device::kaneko_grap2_device(const machine_config &mconfig, const ch : device_t(mconfig, KANEKO_GRAP2, tag, owner, clock) , device_rom_interface(mconfig, *this) , device_palette_interface(mconfig, *this) + , m_framebuffer_scrolly(0) + , m_framebuffer_scrollx(0) + , m_framebuffer_enable(0) + , m_regs1_i(0) + , m_framebuffer_bright1(0) + , m_framebuffer_bright2(0) + , m_regs1_address_regs{ 0, 0 } + , m_regs2(0) { } diff --git a/src/mame/kaneko/kaneko_grap2.h b/src/mame/kaneko/kaneko_grap2.h index 0bc2975d775..d4b8b8bddbd 100644 --- a/src/mame/kaneko/kaneko_grap2.h +++ b/src/mame/kaneko/kaneko_grap2.h @@ -64,22 +64,21 @@ private: void do_rle(u32 address, u32 dstaddress); void set_color_555(pen_t color, int rshift, int gshift, int bshift, u16 data); - u16 m_framebuffer_scrolly = 0; - u16 m_framebuffer_scrollx = 0; - u16 m_framebuffer_enable = 0; - u8 m_regs1_i = 0; + u16 m_framebuffer_scrolly; + u16 m_framebuffer_scrollx; + u16 m_framebuffer_enable; + u8 m_regs1_i; - u16 m_framebuffer_bright1 = 0; - u16 m_framebuffer_bright2 = 0; + u16 m_framebuffer_bright1; + u16 m_framebuffer_bright2; - u16 m_regs1_address_regs[0x2]{}; - u16 m_regs2 = 0; + u16 m_regs1_address_regs[0x2]; + u16 m_regs2; std::unique_ptr m_framebuffer; std::unique_ptr m_framebuffer_palette; std::unique_ptr m_framebuffer_unk1; std::unique_ptr m_framebuffer_unk2; - }; From 8da92cd9ada1e6bba5e4877fd200bc410ad47779 Mon Sep 17 00:00:00 2001 From: A-Noid33 <108240177+A-Noid33@users.noreply.github.com> Date: Wed, 25 Feb 2026 12:59:53 -0500 Subject: [PATCH 044/351] apple2_flop_orig.xml, apple2_flop_clcracked.xml: Added 50 dumps, combined 2 item, and metadata updates cleanups. (#15018) Focus: The great MECC metadata cleanup. New working software list items (apple2_flop_orig.xml) ------------------------------- Bluegrass Bluff (A-256 version 1.0) (800K 3.5") [4am, A-Noid] Chemistry: The Periodic Table (A-251 version 1.0) (800K 3.5") [4am, A-Noid] Chemistry: The Periodic Table (A-251 version 1.1) (800K 3.5") [4am, A-Noid] Conquering Math Series: Conquering Math Worksheet Generator (A-260 version 1.0) (800K 3.5") [4am, A-Noid] Conquering Math Series: Conquering Percents (A-210 version 1.0) (800K 3.5") [4am, A-Noid] Conquering Math Series: Conquering Percents (A-210 version 1.1) (800K 3.5") [4am, A-Noid] Conquering Math Series: Conquering Ratios and Proportions (A-209 version 1.1) (800K 3.5") [4am, A-Noid] Conquering Math Series: Decimal Concepts (A-206 version 1.0) (800K 3.5") [4am, A-Noid] Equation Math (A-193 version 1.1) (800K 3.5") [4am, A-Noid] Estimation Collection: Estimation: Quick Solve II (A-259 version 1.0) (800K 3.5") [4am, A-Noid] Exploring Sequences and Series (A-263 version 1.0) (800K 3.5") [4am, A-Noid] EZ Logo: Revised Edition (version 2.1) (800K 3.5") [4am, A-Noid] Frames: A Reading Comprehension Series: Vacation Nation Travel (A-291 version 1.0) (800K 3.5") [4am, A-Noid] LabelMaker (A-241 version 1.0) (800K 3.5") [4am, A-Noid] Mastering Math Series: Diagnostic System (A-149 version 1.2) (800K 3.5") [4am, A-Noid] MECC Copy System / Label Utility (A-7013 version 3.0) (800K 3.5") [4am, A-Noid] MECC Outliner (A-228 version 1.0) (800K 3.5") [4am, A-Noid] MECC Science Inquiry Collection: Cavity Busters (A-284 version 1.0) (800K 3.5") [4am, A-Noid] MECC Science Inquiry Collection: Invisible Bugs (A-218 version 1.0) (800K 3.5") [4am, A-Noid] MECC Science Inquiry Collection: Wood Car Rally (A-214 version 1.1) (800K 3.5") [4am, A-Noid] Sky Lab (A-155 version 1.1) (800K 3.5") [4am, A-Noid] Teacher Option Organizer (A-242 version 1.0) (800K 3.5") [4am, A-Noid] Teacher Option Organizer (A-242 version 1.2) (800K 3.5") [4am, A-Noid] Teaching Scientific Inquiry with Computers (T-638 version 1.0) (800K 3.5") [4am, A-Noid] The Living Cell (A-278 version 1.0) (800K 3.5") [4am, A-Noid] Time Navigator Around the World (A-277 version 1.0) (800K 3.5") [4am, A-Noid] Time Navigator Leaps Back (A-225 version 1.0) (800K 3.5") [4am, A-Noid] To Preserve, Protect and Defend (A-198 version 1.1) (800K 3.5") [4am, A-Noid] New working software list items (apple2_flop_clcracked.xml) ------------------------------- 1991-92 MECC Sampler (T-632 version 1.0) (4am crack) [4am, A-Noid] Accessing Information Series: MECC Stuff and Fetch (A-138 version 1.0) (4am crack) [4am, A-Noid] Accessing Information Series: MECC Trivia Machine (A-139 version 1.1) (4am crack) [4am, A-Noid] Business Utilities (A-143 version 1.0) (4am crack) [4am, A-Noid] Computers in Teaching (T-612 version 1.1) (4am crack) [4am, A-Noid] Displaying Information Series: MECC Graph (A-137 version 1.3) (4am crack) [4am, A-Noid] Elementary Volume 1: Mathematics (Games and Drills) (A-702 version 3.4) (4am crack) [4am, A-Noid] Elementary Volume 2: Language Arts (A-703 version 3.1) (4am crack) [4am, A-Noid] Elementary Volume 4: Math / Science (Ecology, Astronomy, and Arithmetic) (A-705 version 4.2) (4am crack) [4am, A-Noid] Elementary Volume 4: Math / Science (Ecology, Astronomy, and Arithmetic) (A-705 version 4.3) (4am crack) [4am, A-Noid] Labels, Letters, and Lists (A-144 version 1.0) (4am crack) [4am, A-Noid] Labels, Letters, and Lists (A-144 version 1.2) (4am crack) [4am, A-Noid] Mathematics Volume 1: Graphing, Logic, and Equations (A-706 version 3.2) (4am crack) [4am, A-Noid] MECC Early Learning Series: First-Letter Fun (A-154 version 1.0) (4am crack) [4am, A-Noid] MECC Early Learning Series: First-Letter Fun (A-154 version 1.1) (4am crack) [4am, A-Noid] MECC Early Learning Series: Paint with Words (A-158 version 1.0) (4am crack) [4am, A-Noid] MECC Early Learning Series: Paint with Words (A-158 version 1.3) (4am crack) [4am, A-Noid] Sky Lab (A-155 version 1.0) (4am crack) [4am, A-Noid] Sky Lab (A-155 version 1.1) (4am crack) [4am, A-Noid] Student Stories (A-152 version 1.0) (4am crack) [4am, A-Noid] Word Munchers (A-153 version 1.3) (4am crack) [4am, A-Noid] Word Munchers (A-153 version 1.4) (4am crack) [4am, A-Noid] Combined software list items (apple2_flop_clcracked.xml) ------------------------------- Spare Moments: Solitare & Spare Moments: With a Friend (H-111) (4am crack). Side A & B of the same release. --- hash/apple2_flop_clcracked.xml | 8598 +++++++++++++++++------------- hash/apple2_flop_orig.xml | 7690 +++++++++++++++----------- hash/apple2gs_flop_clcracked.xml | 70 +- hash/apple2gs_flop_misc.xml | 133 +- hash/apple2gs_flop_orig.xml | 34 +- 5 files changed, 9844 insertions(+), 6681 deletions(-) diff --git a/hash/apple2_flop_clcracked.xml b/hash/apple2_flop_clcracked.xml index b29a4d7b1c7..9449da1846d 100644 --- a/hash/apple2_flop_clcracked.xml +++ b/hash/apple2_flop_clcracked.xml @@ -6124,629 +6124,6 @@ license:CC0-1.0 - - MECC-A132 MECC Writer (version 1.1a) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - MECC-A136 MECC Graphing Primer (version 1.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - MECC-A141 MECC Information Manager (version 1.0) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - - - - - - - MECC-A141 MECC Information Manager (version 1.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - - - - - - - MECC-A153 Word Munchers (version 1.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - MECC-A172 MECC Dataquest Composer (version 1.1) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A197 MECC Dataquest - The World Community (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - MECC-A197 MECC Dataquest - The World Community (version 1.1) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - MECC-A211 Mystery Objects (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - MECC-A227 Patterns (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - MECC-A232 Spelling Press (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - MECC-A234 Spelling Puzzles and Tests (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - MECC-A242 Teacher Option Organizer (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - MECC-A242 Teacher Option Organizer (version 1.3) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - MECC-A243 MECC Dataquest - Latin America (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - MECC-A253 MECC Dataquest - Europe and Soviet Union (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - MECC-A277 Time Navigator Around The World (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - - MECC-A313 History Makers (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - MECC-A316 Exploring Chaos (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - MECC-A702 Elementary Vol. 1 (version 3.5) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A703 Elementary Vol. 2 (version 3.2) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A704 Elementary Vol. 3 Science (version 4.5) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A704 Elementary vol. 3 (version 4.7) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A704 Elementary Vol. 3 (version 4.8) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A708 Science Vol. 1 (version 2.2) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A712 Music Theory Vol. 1 (version 2.2) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A714 Business vol. 1 - Utilities (version 4.5) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A721 Business vol. 3 (version 1.5) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - MECC-A725 Elementary Vol. 6 (version 1.3) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A726 Spelling Vol. 1 (version 3.0) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - MECC-A738 Mathematics Vol. 3 (version 1.2) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - MECC-A744 Mathematics vol. 4 (version 1.3) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - MECC-A746 English Vol. 1 (version 1.2) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - MECC-A753 Nutrition vol. 2 (version 1.2) (cleanly cracked) - 1982 - MECC - - - - - - - - - - - MECC-A756 Food Facts (version 1.0) (cleanly cracked) - 1982 - MECC - - - - - - - - - - - MECC-A756 Food Facts (version 1.2) (cleanly cracked) - 1982 - MECC - - - - - - - - - - - MECC-A761 Health Immunization (version 1.1) (cleanly cracked) - 1984 - MECC - - - - - - - - - - - MECC-A779 The Friendly Computer (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A785 Writing A Character Sketch (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A787 Guide de l'Enseignant (version 1.4) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A811 The Three R's of Microcomputing (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A819 Number Systems (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A821 Probability (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A822 Nutrition and Food Groups (version 1.2) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-H111A Spare Moments Solitaire (cleanly cracked) - 1985 - MECC - - - - - - - - - - - MECC-H111B Spare Moments with a Friend (cleanly cracked) - 1985 - MECC - - - - - - - - - Memory Minder (cleanly cracked) 1984 @@ -6780,48 +6157,6 @@ license:CC0-1.0 - - MECC-A157 Oregon Trail (version 1.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - - - - - - - - MECC-A157 Oregon Trail (version 1.4) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - - - - - MicroTutor II - Prefixes, Suffixes, Capitalization (cleanly cracked) 1982 @@ -8472,45 +7807,6 @@ license:CC0-1.0 - - MECC-A191 Odell Lake (version 1.1) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - MECC A-732 Elementary Volume 8 Geometry (Points and Angles) (version 1.0) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - MECC-A756 Food Facts (version 1.1) (cleanly cracked) - 1982 - MECC - - - - - - - - - Money and Time Adventures of the Lollipop Dragon (cleanly cracked) 1984 @@ -9191,19 +8487,6 @@ license:CC0-1.0 - - Science Volume 3: Matter, Liquid, and Solid (cleanly cracked) - 1986 - Decision Development - - - - - - - - - Who Am I? Birds, Trees, and Flowers (cleanly cracked) 1986 @@ -9561,6 +8844,19 @@ license:CC0-1.0 + + Science Volume 3: Matter, Liquid, and Solid (cleanly cracked) + 1986 + Decision Development + + + + + + + + + Science Volume 4: Space (cleanly cracked) 1987 @@ -12152,19 +11448,6 @@ license:CC0-1.0 - - MECC-A771 Grade Manager (version 1.2) (cleanly cracked) - 1983 - MECC - - - - - - - - - Readability Analysis (version 1.5) (cleanly cracked) 1984 @@ -14505,26 +13788,6 @@ license:CC0-1.0 - - MECC-A315 Freedom! (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - Labyrinth: The Computer Game (Lucasfilm Games) (cleanly cracked) 1986 @@ -14983,32 +14246,6 @@ license:CC0-1.0 - - MECC-A816 Electronic Money (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - MECC-A816 Electronic Money (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - Dinosaur Construction Kit: Tyrannosaurus Rex (cleanly cracked) 1987 @@ -15330,19 +14567,6 @@ license:CC0-1.0 - - MECC-A308 Rocket Factory (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - Solving Word Problems 1 (cleanly cracked) 1985 @@ -15434,19 +14658,6 @@ license:CC0-1.0 - - MECC-A746 English Volume 1: Parts of Speech (version 1.5) (cleanly cracked) - 1981 - MECC - - - - - - - - - Scoring Higher: Mathematics A, Grade Level 3 (cleanly cracked) 1987 @@ -16105,1960 +15316,6 @@ license:CC0-1.0 - - MECC-A132 MECC Writer (version 1.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A132 MECC Writer (version 1.2) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A133 MECC Writer (version 1.2) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A134 MECC Speller (version 1.0) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - - - - - - - - MECC-A135 MECC Editor (version 1.0) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A136 MECC Graphing Primer (version 1.0) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A137 MECC Graph (version 1.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A343 Science Giants (version 1.0) (cleanly cracked) - 1994 - MECC - - - - - - - - - - - - - - - MECC-A351 Get Well, Woolly! (version 1.0) (cleanly cracked) - 1994 - MECC - - - - - - - - - - - - - - - - MECC-A211 Mystery Objects (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - - MECC-A212 Mystery Matter (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A213 Miner's Cave (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - - MECC-A214 Wood Car Rally (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A214 Wood Car Rally (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A215 Lunar Greenhouse (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - MECC-A217 Weeds to Trees (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - MECC-A218 Invisible Bugs (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - MECC-A219 Five-Star Forecast (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - MECC-A220 Fossil Hunter (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - MECC-A221 Murphy's Minerals (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - - MECC-A222 Sun and Seasons (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - MECC-A224 Instant Survey (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - MECC-A225 Time Navigator Leaps Back (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - - - - - - - - - - - - MECC-A227 Patterns (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A228 MECC Outliner (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A227 Patterns (version 1.2) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A229 Exploring Gas Laws (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - - MECC-A230 Spelling Workout (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - - - MECC-A230 Spelling Workout (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - - - MECC-A230B Spelling List Editor (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A230B Spelling List Editor (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A230B Spelling List Editor (version 1.2) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A230B Spelling List Editor (version 1.4) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A230B Spelling List Editor (version 1.3) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - MECC-A231 Spellevator (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A231 Spellevator (version 1.2) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A231 Spellevator (version 1.3) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - - MECC-A232 Spelling Press (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - MECC-A241 LabelMaker (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - MECC-A242 Teach Option Organizer (version 1.2) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - - - - - - - MECC-A244 MECC Dataquest: The Middle East and North Africa (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - MECC-A245 Instant Survey (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - - - - - - - MECC-A246 Measure Works (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - - MECC-A247 Time Navigator (version 1.0) (cleanly cracked) - 1989 - MECC - - - - - - - - - - - - - - - - - - - - - - - - - - - - MECC-A250 MECC Dataquest: North American Mammals (version 1.0) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - MECC-A250 MECC Dataquest: North American Mammals (version 1.1) (cleanly cracked) - 1988 - MECC - - - - - - - - - - - - MECC-A254 MECC Dataquest: Asia and Oceania (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - MECC-A255 Picture Chompers (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - - - - - MECC-A257 Problem Solving with Nim (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - MECC-A262 Probability Lab (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - MECC-A263 Exploring Sequences and Series (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - - MECC-A271 Grammar Toy Shop (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - - - MECC-A272 Grammar Monsters (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - MECC-A273 Grammar Gazette (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - MECC-A278 The Living Cell (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - MECC-A279 Lewis and Clark Stayed Home (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - - - - - - - - MECC-A281 Paper Plane Pilot (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - - MECC-A283 Woolly Bounce (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - MECC-A290 Space Station Freedom (version 1.0) (cleanly cracked) - 1990 - MECC - - - - - - - - - - - - - - - - - - - - - - - - MECC-A291 Vacation Nation Travel (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - - - - - - - MECC-A292 Littletown Zoo (version 1.0) (cleanly cracked) - 1991 - MECC - - - - - - - - - - - - - - - - - - - - - - - - MECC-A302 Fish School (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - - MECC-A303 Moving Museum (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - - MECC-A306 Grammar Gobble (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - MECC-A307 Grammar Madness (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - MECC-A309 Woolly's Garden (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - MECC-A310 Wonderland Puzzles (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - MECC-A311 Picture A Story (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - MECC-A317 Take A Chance! (version 1.0) (cleanly cracked) - 1992 - MECC - - - - - - - - - - - - - - - - - - MECC-A330 Nutrition Nabber (version 1.0) (cleanly cracked) - 1993 - MECC - - - - - - - - - - - - - - - - - MECC-A333 Pizza to Go (version 1.0) (cleanly cracked) - 1993 - MECC - - - - - - - - - - - - - - - - - MECC-A159 Sound Tracks (version 1.0) (cleanly cracked) - 1984 - MECC - - - - - - - - - - - - MECC-A160 The Market Place (version 1.0) (cleanly cracked) - 1984 - MECC - - - - - - - - - - - - MECC-A161 Jenny's Journeys (version 1.0) (cleanly cracked) - 1984 - MECC - - - - - - - - - - - - MECC-A162 Path Tactics (version 1.0) (cleanly cracked) - 1984 - MECC - - - - - - - - - - - - MECC-A163 MECC Dataquest: The Fifty States (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A167 Quickflash (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A169 Speedway Math (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A170 Number Munchers (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A170 Number Munchers (version 1.3) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A171 Show Time (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - - - - - - - - MECC-A171 Show Time (version 1.1) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - - - - - - - - MECC-A172 MECC Dataquest Composer (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A175 Phonics Prime Time: Initial Consonants (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A176 Phonics Prime Time: Final Consonants (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A177 Phonics Prime Time: Vowels I (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A178 Phonics Prime Time: Vowels II (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A179 Phonics Prime Time: Blends and Digraphs (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A180 Words at Work: Contraction Action (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A181 Words at Work: Prefix Power (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A182 Words at Work: Suffix Sense (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A183 Words at Work: Compound It (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A185 Those Amazing Reading Machines (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A337 Treasures for Sale (version 1.0) (cleanly cracked) - 1993 - MECC - - - - - - - - - - - - - - - - - MECC-A186 Those Amazing Reading Machines II (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A187 Those Amazing Reading Machines III (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A188 Those Amazing Reading Machines IV (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A191 Odell Lake (version 1.0) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A191 Odell Lake (version 1.2) (cleanly cracked) - 1986 - MECC - - - - - - - - - - - - MECC-A193 Equation Math (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A193 Equation Math (version 1.1) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A195 Money Works (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A195 Money Works (version 1.1) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A196 Fraction Munchers (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A198 To Preserve, Protect and Defend (version 1.1) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - MECC-A199 Zoyon Patrol (version 1.0) (cleanly cracked) - 1987 - MECC - - - - - - - - - - - - - - - - - - - MECC-A712 Music Theory: Music Fundamentals (version 1.0) (cleanly cracked) - 1979 - MECC - - - - - - - - - - - - MECC-A719 Elementary Volume 5: Language Arts: Prefixes (version 1.5) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - MECC-A719 Elementary Volume 5: Language Arts: Prefixes (version 1.7) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - MECC-A721 Business Volume 3: Accounting (version 1.8) (cleanly cracked) - 1981 - MECC - - - - - - - - - - GATO (version 1.2) (cleanly cracked) 1985 @@ -18098,520 +15355,6 @@ license:CC0-1.0 - - MECC-A726 Spelling Volume 1: Primary (version 2.0) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - MECC-A726 Spelling Volume 1: Primary (version 3.1) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - MECC-A728 Spelling Volume 2: Secondary (version 2.0) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - MECC-A728 Spelling Volume 2: Secondary (version 3.1) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - MECC-A731 Elementary Volume 7: Pre-Reading and Counting (version 1.0) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - MECC-A731 Elementary Volume 7: Pre-Reading and Counting (version 1.1) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - MECC-A733 Elementary Volume 9: Geometry (version 1.0) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - MECC-A733 Elementary Volume 9: Geometry (version 2.1) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - MECC-A734 Elementary Volume 10: Geometry (version 1.1) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - MECC-A735 Elementary Volume 11: Language Arts (version 1.1) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - - - - MECC-A736 Elementary Volume 12: Language Arts (version 1.0) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - - - - - - - - - - MECC-A736 Elementary Volume 12: Language Arts (version 2.0) (cleanly cracked) - 1980 - MECC - - - - - - - - - - - - - - - - - - - - - MECC-A737 Mathematics Volume 2: Measurement (version 1.2) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - - - MECC-A738 Mathematics Volume 3: Geometry (version 1.3) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - MECC-A738 Mathematics Volume 3: Geometry - (Limited Boot Backup) (version 1.3) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - - MECC-A743 Elementary Volume 13: Nutrition (version 1.0) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - - - MECC-A746 English Volume 1: Parts of Speech (version 1.3) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - - - MECC-A746 English Volume 1: Parts of Speech (version 1.4) (cleanly cracked) - 1981 - MECC - - - - - - - - - - - - - - MECC-A749 School Utilities Volume 2: Readability (cleanly cracked) - 1982 - MECC - - - - - - - - - - - - MECC-A751 Health Maintenance Volume 2: Assessment (version 1.0) (cleanly cracked) - 1982 - MECC - - - - - - - - - - - - - - MECC-A752 Nutrition Volume 1 (version 1.2) (cleanly cracked) - 1982 - MECC - - - - - - - - - - - - MECC-A753 Nutrition Volume 2 (version 1.5) (cleanly cracked) - 1982 - MECC - - - - - - - - - - - - MECC-A771 Grade Manager (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A771 Grade Manager (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A771 Grade Manager Revised Edition (version 2.1) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A771 Grade Manager Revised Edition (version 2.2) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A771 Grade Manager Revised Edition (version 2.3) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A773 Growgins' Fractions (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - - - MECC-A773 Growgins' Fractions (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - - - MECC-A775 EZ Logo (version 2.0) (cleanly cracked) - 1985 - MECC - - - - - - - - - - - - MECC-A776 Writing a Narrative (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A776 Writing a Narrative (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A777 Blissymbolics: Blissymbol Concepts (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A779 The Friendly Computer (version 1.5) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - PlayWriter: Mystery (cleanly cracked) 1985 @@ -18633,113 +15376,6 @@ license:CC0-1.0 - - MECC-A781 Oh, Deer! (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - - - MECC-A785 Writing a Character Sketch (version 1.1) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A785 Writing a Character Sketch (version 1.2) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A810 Experiencing Procedures (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - - - MECC-A811 The Three R's of Microcomputing (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - MECC-A813 Processing Words (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - - - - MECC-A822 Nutrition (version 1.0) (cleanly cracked) - 1983 - MECC - - - - - - - - - - - - The Voyage of the Valkyrie (cleanly cracked) 1980 @@ -20518,6 +17154,24 @@ license:CC0-1.0 + + 1991-92 MECC Sampler (T-632 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + 2400 A.D. (4am crack) 1987 @@ -20767,6 +17421,207 @@ license:CC0-1.0 + + Accessing Information Series: Databases in the Classroom: Dataquest: Sampler (A-173 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest Composer (A-172 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest Composer (A-172 version 1.1) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The Fifty States (A-163 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The Presidents (A-140 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The Presidents (A-140 version 1.2) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The World Community (A-197 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The World Community (A-197 version 1.1) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Stuff and Fetch (A-138 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Trivia Machine (A-139 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + Ace Detective (revision 1) (4am crack) 1987 @@ -23530,7 +20385,7 @@ license:CC0-1.0 - Audubon Wildlife Adventrues: Grizzly Bears (4am crack) + Audubon Wildlife Adventures: Grizzly Bears (4am crack) 1988 Advanced Ideas @@ -23691,28 +20546,6 @@ license:CC0-1.0 - - Backyard Birds (A-216 version 1.0) (4am crack) - 1989 - MECC - - - - - - - - - - - - - - - - - - Bake & Taste (4am crack) 1986 @@ -24719,6 +21552,24 @@ license:CC0-1.0 + + Blissymbolics: Blissymbol Concepts (A-777 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + Blockers and Finders (4am crack) 1987 @@ -24736,7 +21587,7 @@ license:CC0-1.0 - + Bluegrass Bluff (A-256 version 1.0) (4am crack) 1991 MECC @@ -24796,7 +21647,7 @@ license:CC0-1.0 1985 MECC - + @@ -25312,6 +22163,78 @@ license:CC0-1.0 + + Business Education Volume 1: Utilities (A-714 version 4.5) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Business Education Volume 3: Accounting (A-721 version 1.5) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Business Education Volume 3: Accounting (A-721 version 1.8) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Business Utilities (A-143 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + Buzz Bang Harvey (4am crack) 1984 @@ -26038,29 +22961,6 @@ license:CC0-1.0 - - Cavity Busters (A-284 version 1.0) (4am crack) - 1991 - MECC - - - - - - - - - - - - - - - - - - - Centauri Alliance (4am crack) 1990 @@ -26428,7 +23328,7 @@ license:CC0-1.0 - + Chemistry: The Periodic Table (A-251 version 1.1) (4am crack) 1988 MECC @@ -26575,7 +23475,7 @@ license:CC0-1.0 MECC - + @@ -26593,7 +23493,7 @@ license:CC0-1.0 MECC - + @@ -26657,26 +23557,6 @@ license:CC0-1.0 - - Cleanwater Detectives (A-282 version 1.0) (4am crack) - 1991 - MECC - - - - - - - - - - - - - - - - Clef Notes Drill (4am crack) 1983 @@ -26741,12 +23621,15 @@ license:CC0-1.0 - + Clock Works (A-168 version 1.0) (4am crack) 1986 MECC - + + + + @@ -27071,7 +23954,7 @@ license:CC0-1.0 - + CommuniKeys (A-248 version 1.0) (4am crack) 1989 MECC @@ -27095,7 +23978,7 @@ license:CC0-1.0 - + CommuniKeys (A-248 version 1.1) (4am crack) 1989 MECC @@ -27182,6 +24065,124 @@ license:CC0-1.0 + + Composing Information Series: MECC Editor (A-135 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Composing Information Series: MECC Speller (A-134 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Composing Information Series: MECC Write Start (A-133 version 1.2) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Composing Information Series: MECC Writer (A-132 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + Composing Information Series: MECC Writer (A-132 version 1.1a) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + Composing Information Series: MECC Writer (A-132 version 1.2) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + Comprehension Power Program: Level E-2 (4am crack) 1981 @@ -27563,6 +24564,35 @@ license:CC0-1.0 + + Computers in Teaching (T-612 version 1.1) (4am crack) + 1984 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + Con-Putation (Softsmith) (4am and san inc crack) 1983 @@ -27664,7 +24694,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Decimals (×, ÷) (A-208 version 1.0) (4am crack) 1988 MECC @@ -27689,7 +24719,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Decimals (×, ÷) (A-208 version 1.1) (4am crack) 1988 MECC @@ -27714,7 +24744,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Fractions (+, -) (A-204 version 1.0) (4am crack) 1988 MECC @@ -27739,7 +24769,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Fractions (+, -) (A-204 version 1.1) (4am crack) 1988 MECC @@ -27764,7 +24794,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Fractions (×, ÷) (A-205 version 1.0) (4am crack) 1988 MECC @@ -27789,7 +24819,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Fractions (×, ÷) (A-205 version 1.1) (4am crack) 1988 MECC @@ -27814,7 +24844,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Math Worksheet Generator (A-260 version 1.0) (4am crack) 1989 MECC @@ -27835,7 +24865,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Percents (A-210 version 1.0) (4am crack) 1989 MECC @@ -27861,7 +24891,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Percents (A-210 version 1.1) (4am crack) 1989 MECC @@ -27912,7 +24942,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Whole Numbers (A-201 version 1.0) (4am crack) 1987 MECC @@ -27930,7 +24960,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Whole Numbers (A-201 version 1.1) (4am crack) 1987 MECC @@ -27948,7 +24978,7 @@ license:CC0-1.0 - + Conquering Math Series: Decimal Concepts (A-206 version 1.0) (4am crack) 1988 MECC @@ -27973,7 +25003,7 @@ license:CC0-1.0 - + Conquering Math Series: Fraction Concepts, Inc. (A-202 version 1.0) (4am crack) 1987 MECC @@ -27991,7 +25021,7 @@ license:CC0-1.0 - + Conquering Math Series: Fraction Concepts, Inc. (A-202 version 1.1) (4am crack) 1987 MECC @@ -28009,7 +25039,7 @@ license:CC0-1.0 - + Conquering Math Series: Fraction Concepts, Inc. (A-202 version 1.2) (4am crack) 1987 MECC @@ -28027,7 +25057,7 @@ license:CC0-1.0 - + Conquering Math Series: Fraction Practice Unlimited (A-203 version 1.0) (4am crack) 1987 MECC @@ -28045,7 +25075,7 @@ license:CC0-1.0 - + Conquering Math Series: Fraction Practice Unlimited (A-203 version 1.1) (4am crack) 1987 MECC @@ -28063,7 +25093,7 @@ license:CC0-1.0 - + Conquering Math Series: Fraction Practice Unlimited (A-203 version 1.2) (4am crack) 1987 MECC @@ -28189,7 +25219,7 @@ license:CC0-1.0 - + Coordinate Math (A-192 version 1.0) (4am crack) 1987 MECC @@ -28207,7 +25237,7 @@ license:CC0-1.0 - + Coordinate Math (A-192 version 1.1) (4am crack) 1987 MECC @@ -28960,7 +25990,7 @@ license:CC0-1.0 - + CryptoQuest (A-340 version 1.0) (4am crack) 1993 MECC @@ -29199,9 +26229,9 @@ license:CC0-1.0 Data Handler (A-129 version 1.0) (4am crack) 1983 MECC + - - + @@ -29533,24 +26563,6 @@ license:CC0-1.0 - - Dataquest: Sampler (A-173 version 1.0) (4as crack) - 1986 - MECC - - - - - - - - - - - - - - Death in the Caribbean (4am crack) 1983 @@ -30210,8 +27222,8 @@ license:CC0-1.0 Discovery Lab (A-128 version 1.0) (4am crack) 1984 MECC + - @@ -30257,6 +27269,78 @@ license:CC0-1.0 + + Displaying Information Series: MECC Graph (A-137 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Displaying Information Series: MECC Graph (A-137 version 1.3) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Displaying Information Series: MECC Graphing Primer (A-136 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Displaying Information Series: MECC Graphing Primer (A-136 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + Division Skills (4am crack) 1982 @@ -30274,7 +27358,7 @@ license:CC0-1.0 - + Dog Sled Ambassadors (A-339 version 1.0) (4am and san inc crack) 1993 MECC @@ -30491,7 +27575,7 @@ license:CC0-1.0 - + Dr. Livingstone, I Presume? (A-314 version 1.0) (4am crack) 1992 MECC @@ -30555,8 +27639,8 @@ license:CC0-1.0 Ducks (A-107 version 1.1) (4am crack) 1984 MECC + - @@ -31089,28 +28173,6 @@ license:CC0-1.0 - - Eerieville Library (A-304 version 1.0) (4am crack) - 1993 - MECC - - - - - - - - - - - - - - - - - - Effective Study Skills (4am crack) 1983 @@ -31185,6 +28247,42 @@ license:CC0-1.0 + + Electronic Money (A-816 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Electronic Money (A-816 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + Elementary Genetics (A-402 version 1.1) (4am crack) 1986 @@ -31207,6 +28305,427 @@ license:CC0-1.0 + + Elementary Volume 1: Mathematics (Games and Drills) (A-702 version 3.4) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + Elementary Volume 1: Mathematics (Games and Drills) (A-702 version 3.5) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + Elementary Volume 2: Language Arts (A-703 version 3.1) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + + + + Elementary Volume 2: Language Arts (A-703 version 3.2) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + + + + + Elementary Volume 3: Social Studies (History, Ecomonics, and Geography) (A-704 version 4.7) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 3: Social Studies (History, Ecomonics, and Geography) (A-704 version 4.8) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 4: Math / Science (Ecology, Astronomy, and Arithmetic) (A-705 version 4.2) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + Elementary Volume 4: Math / Science (Ecology, Astronomy, and Arithmetic) (A-705 version 4.3) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + Elementary Volume 5: Language Arts (Prefixes) (A-719 version 1.5) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 5: Language Arts (Prefixes) (A-719 version 1.7) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 6: Social Studies (Simulations) (A-725 version 1.3) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 7: Pre-Reading / Counting (A-731 version 1.0) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 7: Pre-Reading / Counting (A-731 version 1.1) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 8: Geometry (Points and Angles) (A-732 version 1.0) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 9: Geometry (Lines and Triangles) (A-733 version 1.0) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 9: Geometry (Lines and Triangles) (A-733 version 2.1) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 10: Geometry (Quadrilaterals: Area and Perimeter) (A-734 version 1.1) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 11: Language Arts (Phonetics) (A-735 version 1.1) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + + Elementary Volume 12: Language Arts (SIMS) (A-736 version 1.0) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + + + + Elementary Volume 12: Language Arts (SIMS) (A-736 version 2.0) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + + + + Elementary Volume 13: Nutrition (A-743 version 1.0) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + Elements of Music (4am crack) 1981 @@ -31372,6 +28891,82 @@ license:CC0-1.0 + + English Volume 1: Parts of Speech (A-746 version 1.2) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + English Volume 1: Parts of Speech (A-746 version 1.3) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + English Volume 1: Parts of Speech (A-746 version 1.4) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + English Volume 1: Parts of Speech (A-746 version 1.5) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + Epidemic (4am and san inc crack) 1983 @@ -31408,6 +29003,42 @@ license:CC0-1.0 + + Equation Math (A-193 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + Equation Math (A-193 version 1.1) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + Equations I (version 1983) (4am crack) 1983 @@ -31458,7 +29089,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation Activities (A-296 version 1.0) (4am crack) 1991 MECC @@ -31481,7 +29112,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation Strategies (A-295 version 1.0) (4am crack) 1991 MECC @@ -31502,7 +29133,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation: Quick Solve I (A-258 version 1.0) (version 1.0) (4am crack) 1990 MECC @@ -31526,7 +29157,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation: Quick Solve II (A-259 version 1.0) (4am crack) 1990 MECC @@ -31565,6 +29196,56 @@ license:CC0-1.0 + + Evaluating Information Series: MECC Information Manager (A-141 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Evaluating Information Series: MECC Information Manager (A-141 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + Excel-A-Read (4am crack) 1985 @@ -31604,6 +29285,92 @@ license:CC0-1.0 + + Experiencing Procedures (A-810 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + + Exploring Chaos (A-316 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + Exploring Gas Laws (A-229 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + Exploring Sequences and Series (A-263 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + Exploring Science: Temperature (4am crack) 1988 @@ -31622,7 +29389,7 @@ license:CC0-1.0 - Exploring Sorting Routines (version 1.1) (4am crack) + Exploring Sorting Routines (A-110 version 1.1) (4am crack) 1984 MECC @@ -31639,6 +29406,72 @@ license:CC0-1.0 + + Express Delivery Reading Series: Eerieville Library (A-304 version 1.0) (4am crack) + 1993 + MECC + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Fish School (A-302 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Moving Museum (A-303 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + Extra! Extra! (Milton Bradley) (version 1984) (4am crack) 1984 @@ -31691,6 +29524,27 @@ license:CC0-1.0 + + EZ Logo (A-775 version 2.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + Facemaker (4am crack) 1982 @@ -32339,6 +30193,60 @@ license:CC0-1.0 + + Food Facts (A-756 version 1.0) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + + + Food Facts (A-756 version 1.1) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + + + Food Facts (A-756 version 1.2) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + FOR Your NEXT Adventure: FOR-NEXT Loops (4am crack) 1985 @@ -32499,6 +30407,31 @@ license:CC0-1.0 + + Fraction Munchers (A-196 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + + + + + + Fraction Word Problems (4am crack) 1983 @@ -32680,6 +30613,92 @@ license:CC0-1.0 + + Frames: A Reading Comprehension Series: Littletown Zoo (A-292 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + Frames: A Reading Comprehension Series: Space Station Freedom (A-290 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + Frames: A Reading Comprehension Series: Vacation Nation Travel (A-291 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + + + Freddy's Puzzling Adventures (revision D) (4am crack) 1984 @@ -32697,6 +30716,33 @@ license:CC0-1.0 + + Freedom! (A-315 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + + + French Achievement III: Grammar (version 1.0) (4am crack) 1984 @@ -33650,6 +31696,29 @@ license:CC0-1.0 + + Get Well, Woolly! (A-351 version 1.0) (4am crack) + 1994 + MECC + + + + + + + + + + + + + + + + + + + Getting Ready to Read and Add (4am crack) 1984 @@ -33828,6 +31897,114 @@ license:CC0-1.0 + + Grade Manager (A-771 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Grade Manager (A-771 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Grade Manager (A-771 version 1.2) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Grade Manager: Revised Edition (A-771 version 2.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Grade Manager: Revised Edition (A-771 version 2.2) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Grade Manager: Revised Edition (A-771 version 2.3) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + Grammar Gremlins (version 1986) (4am crack) 1986 @@ -34244,6 +32421,44 @@ license:CC0-1.0 + + Growgins' Fractions (A-773 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + + Growgins' Fractions (A-773 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + Guadalcanal Campaign (version 1.0) (4am and san inc crack) 1982 @@ -34295,6 +32510,25 @@ license:CC0-1.0 + + Guide de l'Enseignant (French) (A-787 version 1.4) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + Guitar Wizard (version 11601) (4am crack) 1986 @@ -34463,6 +32697,43 @@ license:CC0-1.0 + + Health Immunization Record Keeping (A-761 version 1.1) (4am crack) + 1984 + MECC + + + + + + + + + + + + + + + + Health Maintenance Volume 2: Assessment (A-751 version 1.0) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + + Hear Today... Play Tomorrow: Descending/Ascending Intervals (4am crack) 1986 @@ -34884,6 +33155,26 @@ license:CC0-1.0 + + History Makers (A-313 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + Home Row (version 10.12.87) (4am crack) 1987 @@ -35517,6 +33808,71 @@ license:CC0-1.0 + + Instant Survey (A-245 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + Instant Survey Sampler (A-224 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Integers/Equations I (version 04.27.85) (4am crack) 1985 @@ -35664,13 +34020,32 @@ license:CC0-1.0 - + + Jenny's Journeys (A-161 version 1.0) (4am crack) + 1984 + MECC + + + + + + + + + + + + + + + Jeux Mathématiques Classiques (French) (A-121 version 1.0) (4am crack) 1984 MECC + + - @@ -36173,7 +34548,7 @@ license:CC0-1.0 - Keyboarding Series: MECC Keyboarding Primer (Student Program) (A-130 version 1.0) (4am crack) + Keyboarding Series: MECC Keyboarding Primer (Student Program / Teacher Utilities) (A-130 version 1.0) (4am crack) 1985 MECC @@ -37082,6 +35457,60 @@ license:CC0-1.0 + + LabelMaker (A-241 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + Labels, Letters, and Lists (A-144 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Labels, Letters, and Lists (A-144 version 1.2) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + Labyrinth (4am and san inc crack) 1982 @@ -37652,6 +36081,32 @@ license:CC0-1.0 + + Lewis and Clark Stayed Home (A-279 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + Library Adventure: Blue Level (4am crack) 1984 @@ -38954,6 +37409,10 @@ license:CC0-1.0 1983 MECC + + + + @@ -38973,6 +37432,10 @@ license:CC0-1.0 1983 MECC + + + + @@ -38992,6 +37455,10 @@ license:CC0-1.0 1983 MECC + + + + @@ -39010,8 +37477,13 @@ license:CC0-1.0 Mastering Math Series 2: Circus Math (A-109 version 1.0) (4am crack) 1984 MECC - + + + + + + @@ -39046,8 +37518,14 @@ license:CC0-1.0 Mastering Math Series 4: Space Subtraction (A-145 version 1.0) (4am crack) 1985 MECC - + + + + + + + @@ -39190,8 +37668,10 @@ license:CC0-1.0 Mastering Math Series: Worksheet Generator (A-151 version 1.0) (4am crack) 1985 MECC - + + + @@ -39208,8 +37688,10 @@ license:CC0-1.0 Mastering Math Series: Worksheet Generator (A-151 version 1.1) (4am crack) 1985 MECC - + + + @@ -40894,6 +39376,121 @@ license:CC0-1.0 + + Mathematics Volume 1: Graphing, Logic, and Equations (A-706 version 3.2) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + Mathematics Volume 2: Measurement (A-737 version 1.2) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + Mathematics Volume 3: Geometry (Formulas, Shapes, and Skills) (A-738 version 1.2) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Mathematics Volume 3: Geometry (Formulas, Shapes, and Skills) (A-738 version 1.3) (limited boot backup) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + + Mathematics Volume 3: Geometry (Formulas, Shapes, and Skills) (A-738 version 1.3) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + + + Mathematics Volume 4: Advanced Math (A-744 version 1.3) (4am crack) + 1981 + MECC + + + + + + + + + + + + + + Mathematics Word Problems Grade 2 (4am crack) 1983 @@ -40990,6 +39587,29 @@ license:CC0-1.0 + + Measure Works (A-246 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + Measuring Economic Activity (4am crack) 1985 @@ -41006,50 +39626,111 @@ license:CC0-1.0 - - MECC Dataquest: The Presidents (A-140 version 1.1) (4am crack) - 1985 + + MECC Dataquest: Asia and Oceania (A-254 version 1.0) (4am crack) + 1990 MECC - - - - - + + + + + + - - - - - - - - + - - MECC Dataquest: The Presidents (A-140 version 1.2) (4am crack) - 1985 + + MECC Dataquest: Europe and the Soviet Union (A-253 version 1.0) (4am crack) + 1990 MECC - - - - - + + + + + + + - - + - - + + + + MECC Dataquest: Latin America (A-243 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + - + + + + + + + MECC Dataquest: North American Mammals (A-250 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + MECC Dataquest: North American Mammals (A-250 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + MECC Dataquest: The Middle East and North Africa (A-244 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + @@ -41058,8 +39739,12 @@ license:CC0-1.0 MECC Early Learning Series: Arithmetic Critters (A-166 version 1.0) (4am crack) 1986 MECC - + + + + + @@ -41076,8 +39761,12 @@ license:CC0-1.0 MECC Early Learning Series: Counting Critters (A-165 version 1.0) (4am crack) 1985 MECC - + + + + + @@ -41090,12 +39779,63 @@ license:CC0-1.0 + + MECC Early Learning Series: First-Letter Fun (A-154 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: First-Letter Fun (A-154 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Fun from A to Z (A-164 version 1.0) (4am crack) 1985 MECC - + + + + @@ -41108,6 +39848,1231 @@ license:CC0-1.0 + + MECC Early Learning Series: Paint with Words (A-158 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Paint with Words (A-158 version 1.3) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Patterns (A-227 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Patterns (A-227 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Patterns (A-227 version 1.2) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Picture Chompers (A-255 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Gazette (A-273 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Gobble (A-306 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Madness (A-307 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Monsters (A-272 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Toy Shop (A-271 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Outliner (A-228 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Blends and Digraphs (A-179 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Final Consonants (A-176 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Initial Consonants (A-175 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Vowels I (A-177 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Vowels II (A-178 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines I (A-185 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines II (A-186 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines III (A-187 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines IV (A-188 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Compound It! (A-183 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Contraction Action (A-180 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Prefix Power (A-181 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Suffix Sense (A-182 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Backyard Birds (A-216 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Cavity Busters (A-284 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Cleanwater Detectives (A-282 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Five-Star Forecast (A-219 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Fossil Hunter (A-220 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Invisible Bugs (A-218 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Lunar Greenhouse (A-215 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Miner's Cave (A-213 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Murphy's Minerals (A-221 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Matter (A-212 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Objects (A-211 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Objects (A-211 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Paper Plane Pilot (A-281 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Sun and Seasons (A-222 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Weeds to Trees (A-217 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Wood Car Rally (A-214 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Wood Car Rally (A-214 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Woolly Bounce (A-283 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Puzzles and Tests (A-234 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spellevator (A-231 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spellevator (A-231 version 1.2) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spellevator (A-231 version 1.3) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling List Editor (A-230B version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling List Editor (A-230B version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling List Editor (A-230B version 1.2) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling List Editor (A-230B version 1.3) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling List Editor (A-230B version 1.4) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Press (A-232 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Press (A-232 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Workout (A-230 version 1.0) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Workout (A-230 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + Mech Brigade (version 1.2) (4am and san inc crack) 1985 @@ -42977,6 +42942,7 @@ license:CC0-1.0 Modeling (A-823 version 1.0) (4am crack) 1983 MECC + @@ -43056,6 +43022,42 @@ license:CC0-1.0 + + Money Works (A-195 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + Money Works (A-195 version 1.1) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + Money! Money! (version 09.19.83) (4am crack) 1983 @@ -44048,6 +44050,44 @@ license:CC0-1.0 + + Music Theory: Music Fundamentals Volume 1 (A-712 version 1.0) (4am crack) + 1979 + MECC + + + + + + + + + + + + + + + + + Music Theory: Music Fundamentals Volume 1 (A-712 version 2.2) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + Music Theory Flash Cards (version 10/2/84) (4am crack) 1984 @@ -44643,6 +44683,42 @@ license:CC0-1.0 + + Number Munchers (A-170 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + Number Munchers (A-170 version 1.3) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + Number Please: Visual and Sequential Memory Practice (release 2) (4am crack) 1985 @@ -44693,6 +44769,24 @@ license:CC0-1.0 + + Number Systems (A-819 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + Number Words: Level 1 (version 04.13.84) (4am crack) 1983 @@ -44726,6 +44820,122 @@ license:CC0-1.0 + + Nutrition and Food Groups (A-822 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + + + Nutrition and Food Groups (A-822 version 1.2) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + + + Nutrition Nabber (A-330 version 1.0) (4am crack) + 1993 + MECC + + + + + + + + + + + + + + + + + + + + Nutrition Volume 1 (A-752 version 1.2) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + + + Nutrition Volume 2 (A-753 version 1.2) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + + + Nutrition Volume 2 (A-753 version 1.5) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + OGRE (4am crack) 1986 @@ -44780,6 +44990,82 @@ license:CC0-1.0 + + Odell Lake (A-191 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + Odell Lake (A-191 version 1.1) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + Odell Lake (A-191 version 1.2) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + Oh, Deer! (A-781 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + Oil's Well (4am crack) 1983 @@ -45309,6 +45595,25 @@ license:CC0-1.0 + + Path Tactics (A-162 version 1.0) (4am crack) + 1984 + MECC + + + + + + + + + + + + + + + Pathwords (Thunder Mountain) (4am crack) 1984 @@ -45467,8 +45772,8 @@ license:CC0-1.0 Payroll System: A Business Simulation (A-104 version 1.2) (4am crack) 1985 MECC + - @@ -45738,7 +46043,7 @@ license:CC0-1.0 - + Pet Shop (A-347 version 1.0) (4am crack) 1994 MECC @@ -45762,8 +46067,9 @@ license:CC0-1.0 Pets, Ltd. (A-111 version 1.0) (4am crack) 1984 MECC - + + @@ -45910,6 +46216,26 @@ license:CC0-1.0 + + Picture a Story (A-311 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + Picture Parade (version 11.24.88) (4am crack) 1988 @@ -46049,6 +46375,28 @@ license:CC0-1.0 + + Pizza to Go (A-333 version 1.0) (4am crack) + 1993 + MECC + + + + + + + + + + + + + + + + + + Place Value: Ones, Tens, and Hundreds (4am crack) 1986 @@ -46171,6 +46519,7 @@ license:CC0-1.0 Polls and Politics Volume 1 (A-820 version 1.0) (4am crack) 1984 MECC + @@ -46833,7 +47182,7 @@ license:CC0-1.0 MECC - + @@ -46966,6 +47315,44 @@ license:CC0-1.0 + + Probability (A-821 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Probability Lab (A-262 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + Problem Solving in Algebra (4am crack) 1983 @@ -47007,6 +47394,27 @@ license:CC0-1.0 + + Problem-Solving with Nim (A-257 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + Problem-Solving Strategies (A-784 version 1.0) (4am crack) 1983 @@ -47065,6 +47473,26 @@ license:CC0-1.0 + + Processing Words (A-813 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Profession Détective: Qui a volé Lily (French) (4am crack) @@ -47342,7 +47770,7 @@ license:CC0-1.0 MECC - + @@ -47360,7 +47788,7 @@ license:CC0-1.0 MECC - + @@ -47378,7 +47806,7 @@ license:CC0-1.0 MECC - + @@ -47396,7 +47824,7 @@ license:CC0-1.0 MECC - + @@ -47609,6 +48037,28 @@ license:CC0-1.0 + + Quickflash! (A-167 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + Quink (Thunder Mountain) (4am crack) 1984 @@ -49573,6 +50023,29 @@ license:CC0-1.0 + + Rocket Factory (A-308 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + Rocky's Boots (version 1.0 earlier) (4am crack) 1982 @@ -49960,9 +50433,9 @@ license:CC0-1.0 Salt and You (A-127 version 1.0) (4am crack) 1984 MECC + - - + @@ -50047,6 +50520,24 @@ license:CC0-1.0 + + School Utilities Volume 2: Readability (A-749 version 1.3) (4am crack) + 1982 + MECC + + + + + + + + + + + + + + Science Explorers Volume 1 Grades 1-3: Plants (800K 3.5") (4am crack) 1990 @@ -50223,6 +50714,26 @@ license:CC0-1.0 + + Science Giants (A-343 version 1.0) (4am crack) + 1994 + MECC + + + + + + + + + + + + + + + + Scientific Simulations (version 1.0) (4am crack) 1983 @@ -50241,6 +50752,45 @@ license:CC0-1.0 + + Science Volume 1: Biology / Physics (A-708 version 2.2) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Science Volume 3: Earth / Life Science (A-707 version 4.5) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + + Scoop Mahoney: Investigative Reader (4am crack) 1988 @@ -50995,6 +51545,66 @@ license:CC0-1.0 + + Show Time (A-171 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + Show Time (A-171 version 1.1) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + Shutterbug's Pictures (4am crack) 1985 @@ -51181,6 +51791,42 @@ license:CC0-1.0 + + Sky Lab (A-155 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + Sky Lab (A-155 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + Skyfox (4am and san inc crack) 1984 @@ -51274,9 +51920,9 @@ license:CC0-1.0 Smoking: It's Up To You (A-103 version 1.0) (4am crack) 1984 MECC + - - + @@ -51737,6 +52383,24 @@ license:CC0-1.0 + + Sound Tracks (A-159 version 1.0) (4am crack) + 1984 + MECC + + + + + + + + + + + + + + Southern Command (4am and san inc crack) 1981 @@ -52096,6 +52760,31 @@ license:CC0-1.0 + + Spare Moments: Solitare & With a Friend (H-111) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + Spectrum: Programs and Patterns (4am crack) 1984 @@ -52188,6 +52877,24 @@ license:CC0-1.0 + + Speedway Math (A-169 version 1.0) (4am crack) + 1986 + MECC + + + + + + + + + + + + + + Speedy Delivery (4am crack) 1985 @@ -52523,6 +53230,96 @@ license:CC0-1.0 + + Spelling Volume 1: Primary (A-726 version 2.0) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Spelling Volume 1: Primary (A-726 version 3.0) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Spelling Volume 1: Primary (A-726 version 3.1) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Spelling Volume 2: Secondary (A-728 version 2.0) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + + + Spelling Volume 2: Secondary (A-728 version 3.1) (4am crack) + 1980 + MECC + + + + + + + + + + + + + + Spider Hunt Spelling (version 4.1.6) (4am crack) 1991 @@ -53857,6 +54654,24 @@ license:CC0-1.0 + + Student Stories (A-152 version 1.0) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + Study Guide (A-126 version 1.4) (4am crack) 1984 @@ -54663,6 +55478,29 @@ license:CC0-1.0 + + Take a Chance! (A-317 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + Take Me North (4am crack) 1985 @@ -54987,6 +55825,75 @@ license:CC0-1.0 + + Teacher Option Organizer (A-242 version 1.1) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + Teacher Option Organizer (A-242 version 1.2) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + Teacher Option Organizer (A-242 version 1.3) (4am crack) + 1988 + MECC + + + + + + + + + + + + + + + + + + + Teacher's Pet (4am crack) 1980 @@ -56344,6 +57251,42 @@ license:CC0-1.0 + + The Friendly Computer (A-779 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + The Friendly Computer (A-779 version 1.5) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + The Game Show (Softsmith) (4am and san inc crack) 1983 @@ -56945,6 +57888,27 @@ license:CC0-1.0 + + The Living Cell (A-278 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + The Magic Cash Register (4am crack) 1984 @@ -56977,6 +57941,24 @@ license:CC0-1.0 + + The Market Place (A-160 version 1.0) (4am crack) + 1984 + MECC + + + + + + + + + + + + + + The Mask of the Sun (version 2.1) (4am crack) 1982 @@ -57216,6 +58198,56 @@ license:CC0-1.0 + + The Oregon Trail (A-157 version 1.1 revision 325) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + The Oregon Trail (A-157 version 1.4) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + The Perfect College (4am crack) 1987 @@ -58402,6 +59434,42 @@ license:CC0-1.0 + + The Three R's of Microcomputing & The Glass Computer (A-811 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + The Three R's of Microcomputing & The Glass Computer (A-811 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + The Time Tunnel: Sports Edition (4am crack) 1985 @@ -59172,6 +60240,100 @@ license:CC0-1.0 + + Time Navigator (A-247 version 1.0) (4am crack) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Time Navigator Around the World (A-277 version 1.0) (4am crack) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + Time Navigator Leaps Back (A-225 version 1.0) (4am crack) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + Tink!Tonk!: Tinka's Mazes (4am crack) 1985 @@ -59281,6 +60443,24 @@ license:CC0-1.0 + + To Preserve, Protect and Defend (A-198 version 1.1) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + Tobbs Learns Algebra: Puzzles and Problem Solving (version 1.1) (4am crack) 1983 @@ -59655,6 +60835,28 @@ license:CC0-1.0 + + Treasures for Sale (A-337 version 1.0) (4am crack) + 1993 + MECC + + + + + + + + + + + + + + + + + + Trigonometry of the Right Triangle (version 1.0) (4am crack) 1985 @@ -62349,6 +63551,48 @@ license:CC0-1.0 + + Wonderland Puzzles (A-310 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + + + Woolly's Garden (A-309 version 1.0) (4am crack) + 1992 + MECC + + + + + + + + + + + + + + + + + Word Attack! (version 1983) (4am crack) 1983 @@ -62589,6 +63833,81 @@ license:CC0-1.0 + + Word Munchers (A-153 version 1.1) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Word Munchers (A-153 version 1.3) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Word Munchers (A-153 version 1.4) (4am crack) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + WordMath: Addition and Subtraction (4am crack) 1986 @@ -62858,9 +64177,9 @@ license:CC0-1.0 Word Herd: Look-Alikes (A-120 version 1.0) (4am crack) 1984 MECC + - - + @@ -62876,9 +64195,9 @@ license:CC0-1.0 Word Herd: Sound-Alikes (A-106 version 1.0) (4am crack) 1984 MECC + - - + @@ -63044,7 +64363,7 @@ license:CC0-1.0 MECC - + @@ -63062,7 +64381,7 @@ license:CC0-1.0 MECC - + @@ -63080,7 +64399,7 @@ license:CC0-1.0 MECC - + @@ -63451,6 +64770,96 @@ license:CC0-1.0 + + Writing A Character Sketch (A-785 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Writing A Character Sketch (A-785 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Writing A Character Sketch (A-785 version 1.2) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Writing a Narrative (A-776 version 1.0) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + + + Writing a Narrative (A-776 version 1.1) (4am crack) + 1983 + MECC + + + + + + + + + + + + + + Writing an Opinion Paper (A-114 version 1.0) (4am crack) 1984 @@ -63733,6 +65142,31 @@ license:CC0-1.0 + + Zoyon Patrol (A-199 version 1.0) (4am crack) + 1987 + MECC + + + + + + + + + + + + + + + + + + + + + microAddition (4am crack) 1983 diff --git a/hash/apple2_flop_orig.xml b/hash/apple2_flop_orig.xml index 29873f5a843..dbcb9ddf4ce 100644 --- a/hash/apple2_flop_orig.xml +++ b/hash/apple2_flop_orig.xml @@ -3000,28 +3000,6 @@ license:CC0-1.0 - - MECC-A279 Lewis and Clark Stayed Home (version 1.0) - 1991 - MECC - - - - - - - - - - - - - - - - - - Dr. Ruth's Computer Game of Good Sex 1986 @@ -3044,28 +3022,6 @@ license:CC0-1.0 - - MECC-A315 Freedom! (version 1.0) - 1992 - MECC - - - - - - - - - - - - - - - - - - Race For Midnight 1981 @@ -5431,96 +5387,6 @@ license:CC0-1.0 - - Path Tactics (version 1.0) - 1984 - MECC - - - - - - - - - - - - - Picture Chompers (version 1.0) - 1990 - MECC - - - - - - - - - - - - - History Makers (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Phonics Prime Time: Vowels II (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Number Munchers (version 1.3) - 1986 - MECC - - - - - - - - - - - - - To Preserve, Protect and Defend (version 1.0) - 1987 - MECC - - - - - - - - - - - Tycoon (version 2.1) 1985 @@ -5573,673 +5439,6 @@ license:CC0-1.0 - - Rocket Factory (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Exploring Chaos (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Wonderland Puzzles (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Treasures for Sale (version 1.0) - 1993 - MECC - - - - - - - - - - - - - Take a Chance! (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Pizza To Go (version 1.0) - 1993 - MECC - - - - - - - - - - - - - Moving Museum (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Nutrition Nabber (version 1.0) - 1993 - MECC - - - - - - - - - - - - - Fish School (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Picture a Story (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Grammar Madness (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Grammar Gobble (version 1.0) - 1992 - MECC - - - - - - - - - - - - - Exploring Sequences and Series (version 1.0) - 1991 - MECC - - - - - - - - - - - - - Sun and Seasons (version 1.0) - 1990 - MECC - - - - - - - - - - - - - The Living Cell (version 1.0) - 1991 - MECC - - - - - - - - - - - - - Problem Solving with Nim (version 1.0) - 1991 - MECC - - - - - - - - - - - - - Paper Plane Pilot (version 1.0) - 1991 - MECC - - - - - - - - - - - - - Five-Star Forecast (version 1.0) - 1990 - MECC - - - - - - - - - - - - - Grammar Toy Shop (version 1.0) - 1990 - MECC - - - - - - - - - - - - - Murphy's Minerals (version 1.0) - 1990 - MECC - - - - - - - - - - - - - Lunar Greenhouse (version 1.0) - 1989 - MECC - - - - - - - - - - - - - Fossil Hunter (version 1.0) - 1990 - MECC - - - - - - - - - - - - - Weeds to Trees (version 1.0) - 1989 - MECC - - - - - - - - - - - - - Miner's Cave (version 1.0) - 1988 - MECC - - - - - - - - - - - - - Exploring Gas Laws (version 1.0) - 1989 - MECC - - - - - - - - - - - - - Invisible Bugs (version 1.0) - 1989 - MECC - - - - - - - - - - - - - Time Navigator Around The World (version 1.0) - 1991 - MECC - - - - - - - - - - - - - - - - - - - - Fraction Munchers (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Those Amazing Reading Machines I (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Those Amazing Reading Machines II (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Those Amazing Reading Machines III (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Measure Works (version 1.0) - 1989 - MECC - - - - - - - - - - - - - Money Works (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Words at Work: Compound It! (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Words at Work: Contraction Action (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Words at Work: Prefix Power (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Words at Work: Suffix Sense (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Phonics Prime Time: Blends and Digraphs (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Phonics Prime Time: Initial Consonants (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Phonics Prime Time: Final Consonants (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Phonics Prime Time: Vowels I (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Those Amazing Reading Machines IV (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Speedway Math (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Quickflash! (version 1.0) - 1986 - MECC - - - - - - - - - - - Jaws 1989 @@ -7465,22 +6664,6 @@ license:CC0-1.0 - - Woolly's Birthday (version 1.0) (800K 3.5") - 1994 - MECC - - - - - - - - - - - - Rampage (800K 3.5") 1988 @@ -7616,38 +6799,6 @@ license:CC0-1.0 - - Word Munchers (version 1.4) (800K 3.5") - 1985 - MECC - - - - - - - - - - - - - - Woolly Bounce (version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - The Hitchhiker's Guide to the Galaxy (Release 56 / 841221) 1984 @@ -7811,86 +6962,6 @@ license:CC0-1.0 - - Picture Chompers (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Number Munchers (version 1.3) (800K 3.5") - 1986 - MECC - - - - - - - - - - - - - - Mystery Objects (version 1.1) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - - - Littletown Zoo (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - - Invisible Bugs (version 1.1) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - Killed Until Dead 1987 @@ -8843,765 +7914,6 @@ license:CC0-1.0 - - Exploring Gas Laws (version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - Wonderland Puzzles (version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - Science Giants (version 1.0) (800K 3.5") - 1994 - MECC - - - - - - - - - - - - - - Freedom! (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Rescue in the Outback (version 1.0) (800K 3.5") - 1994 - MECC - - - - - - - - - - - - - - Woolly's Garden (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Exploring Chaos (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Moving Museum (version 1.0) (800K 3.5") - 1993 - MECC - - - - - - - - - - - - - - Take a Chance! (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Treasures for Sale (version 1.0) (800K 3.5") - 1993 - MECC - - - - - - - - - - - - - - Picture a Story (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Number Jumpers (version 1.0) (800K 3.5") - 1994 - MECC - - - - - - - - - - - - - - Windy City (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Word Builder (version 1.0) (800K 3.5") - 1994 - MECC - - - - - - - - - - - - - - History Makers (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Fish School (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Grammar Gobble (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Grammar Madness (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Nutrition Nabber (version 1.0) (800K 3.5") - 1993 - MECC - - - - - - - - - - - - - - On Stage (version 1.0) (800K 3.5") - 1993 - MECC - - - - - - - - - - - - - - Sum Stories (version 1.0) (800K 3.5") - 1994 - MECC - - - - - - - - - - - - - - Rocket Factory (version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - Probability Lab (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Space Station Freedom (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Weeds to Trees (version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - Sun and Seasons (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Paper Plane Pilot (version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - - Patterns (version 1.2) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - - - Lewis and Clark Stayed Home (version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - - Grammar Toy Shop (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Fossil Hunter (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Murphy's Minerals (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Grammar Monsters (version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - - Mystery Matter (version 1.1) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - - - Grammar Gazette (version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - - Five Star Forecast (version 1.0) (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Lunar Greenhouse (version 1.1) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - Miner's Cave (version 1.0) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - - - Measure Works (version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - Money Works (version 1.1) (800K 3.5") - 1987 - MECC - - - - - - - - - - - - - - Fraction Munchers (version 1.0) (800K 3.5") - 1987 - MECC - - - - - - - - - - - - - - Instant Survey (version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - - - - - - - - Spellevator (version 1.3) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - - - Spelling Puzzles and Tests (800K 3.5") - 1990 - MECC - - - - - - - - - - - - - - Spelling Series Toolkit (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - Spelling Workout (version 1.1) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - - - Teacher Option Organizer (version 1.1) (800K 3.5") - 1988 - MECC - - - - - - - - - - - - Intrigue! 1986 @@ -9713,102 +8025,6 @@ license:CC0-1.0 - - First-Letter Fun (version 1.1) (800K 3.5") - 1985 - MECC - - - - - - - - - - - - - - Jenny's Journeys (version 1.0) (800K 3.5") - 1984 - MECC - - - - - - - - - - - - - - Odell Lake (version 1.2) (800K 3.5") - 1986 - MECC - - - - - - - - - - - - - - Speedway Math (version 1.0) (800K 3.5") - 1986 - MECC - - - - - - - - - - - - - - The Friendly Computer (version 1.5) (800K 3.5") - 1983 - MECC - - - - - - - - - - - - - - The Oregon Trail (version 1.4) (800K 3.5") - 1985 - MECC - - - - - - - - - - - - Super Disk Copy (version 3.6) 1981 @@ -10860,66 +9076,6 @@ license:CC0-1.0 - - Phonics Prime Time: Blends and Digraphs (version 1.0) (800K 3.5") - 1987 - MECC - - - - - - - - - - - - - Problem-Solving with Nim (version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - The Market Place (version 1.0) (800K 3.5") - 1984 - MECC - - - - - - - - - - - - - Time Navigator (version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - Brainteaser Boulevard 1982 @@ -11594,939 +9750,6 @@ license:CC0-1.0 - - Elementary Volume 3: Social Studies (version 4.8) - 1980 - MECC - - - - - - - - - - - - - Elementary Volume 5: Language Arts (Prefixes) (version 1.5) - 1980 - MECC - - - - - - - - - - - - - Elementary Volume 8: Geometry (Points and Angles) (version 1.0) - 1981 - MECC - - - - - - - - - - - - - Elementary Volume 9: Geometry (Lines and Triangles) (version 2.1) - 1981 - MECC - - - - - - - - - - - - - Elementary Volume 10: Geometry (Quadrilaterals: Area and Perimeter) (version 1.0) - 1981 - MECC - - - - - - - - - - - - - Elementary Volume 10: Geometry (Quadrilaterals: Area and Perimeter) (version 1.1) - 1981 - MECC - - - - - - - - - - - - - Elementary Volume 12: Language Arts (SIMS) (version 1.0) - 1980 - MECC - - - - - - - - - - - - - English Parts of Speech (version 1.5) - 1981 - MECC - - - - - - - - - - - - - Experiencing Procedures (version 1.0) - 1983 - MECC - - - - - - - - - - - - - Extensions to Applesoft BASIC (version 1.0) - 1983 - MECC - - - - - - - - - - - - - Extensions to Applesoft BASIC (version 1.2) - 1983 - MECC - - - - - - - - - - - - - Genetics (version 1.1) - 1986 - MECC - - - - - - - - - - - - - Growgins' Fractions (version 1.0) - 1983 - MECC - - - - - - - - - - - - - Mathematics Volume 1: Graphing, Logic, and Equations (version 3.2) - 1980 - MECC - - - - - - - - - - - - - Mathematics Volume 2: Measurement (version 1.2) - 1981 - MECC - - - - - - - - - - - - - Mathematics Volume 3: Formulas, Shapes, and Skills (version 1.3) - 1981 - MECC - - - - - - - - - - - - - Mathematics Volume 3: Formulas, Shapes, and Skills (version 1.3) (limited boot backup) - 1981 - MECC - - - - - - - - - - - - - MECC Apple Demonstration (version 1.1) - 1980 - MECC - - - - - - - - - - - - - Probability (version 1.0) - 1983 - MECC - - - - - - - - - - - - - Spelling Volume 2: Secondary (version 2.0) - 1980 - MECC - - - - - - - - - - - - - The Three Rs of Microcomputing (version 1.1) - 1983 - MECC - - - - - - - - - - - - - Jenny's Journeys (version 1.0) - 1984 - MECC - - - - - - - - - - - - - MECC Graph (version 1.1) - 1985 - MECC - - - - - - - - - - - - - MECC Graphing Primer (version 1.0) - 1985 - MECC - - - - - - - - - - - - - Odell Lake (version 1.0) - 1986 - MECC - - - - - - - - - - - - - Odell Lake (version 1.2) - 1986 - MECC - - - - - - - - - - - - - The Market Place (version 1.0) - 1984 - MECC - - - - - - - - - - - - - The Oregon Trail (version 1.4) - 1985 - MECC - - - - - - - - - - - - - - - - - - - - Word Processing on the Apple (version 2.0) - 1984 - MECC - - - - - - - - - - - - - - - - - - - - Equation Math (version 1.0) - 1987 - MECC - - - - - - - - - - - - - Ghost Writer (version 1.0) - 1985 - MECC - - - - - - - - - - - - - Instant Survey (version 1.0) - 1989 - MECC - - - - - - - - - - - - - - - - - - - - LabelMaker (version 1.0) - 1988 - MECC - - - - - - - - - - - - - MECC Dataquest: Europe and the Soviet Union (version 1.0) - 1990 - MECC - - - - - - - - - - - - - MECC Dataquest: Latin America (version 1.0) - 1989 - MECC - - - - - - - - - - - - - MECC Dataquest: Middle East and North Africa (version 1.0) - 1989 - MECC - - - - - - - - - - - - - MECC Dataquest: North American Mammals (version 1.1) - 1988 - MECC - - - - - - - - - - - - - MECC Dataquest: The World Community (version 1.1) - 1987 - MECC - - - - - - - - - - - - - MECC Editor (version 1.0) - 1985 - MECC - - - - - - - - - - - - - MECC Outliner (version 1.0) - 1988 - MECC - - - - - - - - - - - - - MECC Stuff and Fetch (version 1.0) - 1985 - MECC - - - - - - - - - - - - - MECC Write Start (version 1.2) - 1985 - MECC - - - - - - - - - - - - - MECC Writer (version 1.2) - 1985 - MECC - - - - - - - - - - - - - Mystery Matter (version 1.0) - 1988 - MECC - - - - - - - - - - - - - Mystery Objects (version 1.0) - 1988 - MECC - - - - - - - - - - - - - Patterns (version 1.0) - 1988 - MECC - - - - - - - - - - - - - Quilting Bee (version 1.0) - 1994 - MECC - - - - - - - - - - - - - Show Time (version 1.1) - 1986 - MECC - - - - - - - - - - - - - - - - - - - - Space Station Freedom (version 1.0) - 1990 - MECC - - - - - - - - - - - - - - - - - - - - Spelling Press (version 1.1) - 1988 - MECC - - - - - - - - - - - - - Teacher Option Organizer (version 1.1) - 1988 - MECC - - - - - - - - - - - - - Teaching Scientific Inquiry (version 1.0) - 1989 - MECC - - - - - - - - - - - - - Time Navigator Leaps Back (version 1.0) - 1990 - MECC - - - - - - - - - - - - - - - - - - - - Time Navigator (version 1.0) - 1989 - MECC - - - - - - - - - - - - - - - - - - - - Vacation Nation Travel (version 1.0) - 1991 - MECC - - - - - - - - - - - - - - - - - - - - Wood Car Rally (version 1.0) - 1988 - MECC - - - - - - - - - - - - - Woolly Bounce (version 1.0) - 1991 - MECC - - - - - - - - - - - - - Zoyon Patrol (version 1.0) - 1987 - MECC - - - - - - - - - - - - - - - - - - Dungeon of Doom 1980 @@ -12832,6 +10055,110 @@ license:CC0-1.0 + + Accessing Information Series: Databases in the Classroom: Dataquest: Sampler (A-173 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The Presidents (A-140 version 1.1) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The Presidents (A-140 version 1.2) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Accessing Information Series: MECC Dataquest: The World Community (A-197 version 1.1) + 1987 + MECC + + + + + + + + + + + + + + + + Accessing Information Series: MECC Stuff and Fetch (A-138 version 1.0) + 1985 + MECC + + + + + + + + + + + + + + Accounts Receivable (version 2.1) (Softsmith) 1980 @@ -14911,7 +12238,7 @@ license:CC0-1.0 - Automotive Technician Mathematics Volume 1: Whole Numbers and Fractions (A-762 version 1.0) + Automotive Technician Mathematics Volume 1: Whole Numbers & Fractions (A-762 version 1.0) 1983 MECC @@ -14929,7 +12256,7 @@ license:CC0-1.0 - Automotive Technician Mathematics Volume 2: Decimals and Percents (A-763 version 1.0) + Automotive Technician Mathematics Volume 2: Decimals & Percents (A-763 version 1.0) 1983 MECC @@ -15117,50 +12444,6 @@ license:CC0-1.0 - - Backyard Birds (A-216 version 1.0) - 1989 - MECC - - - - - - - - - - - - - - - - - - - - Backyard Birds (A-216 version 1.0) (800K 3.5") - 1989 - MECC - - - - - - - - - - - - - - - - - - Bag of Tricks 2 (version 2.0) 1985 @@ -16253,7 +13536,7 @@ license:CC0-1.0 - + Bluegrass Bluff (A-256 version 1.0) 1991 MECC @@ -16275,6 +13558,28 @@ license:CC0-1.0 + + Bluegrass Bluff (A-256 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + Bolo 1982 @@ -16987,10 +14292,10 @@ license:CC0-1.0 + - @@ -17192,29 +14497,6 @@ license:CC0-1.0 - - Cavity Busters (A-284 version 1.0) - 1991 - MECC - - - - - - - - - - - - - - - - - - - Centauri Alliance 1989 @@ -17455,7 +14737,7 @@ license:CC0-1.0 - + Chemistry: The Periodic Table (A-251 version 1.0) 1988 MECC @@ -17477,6 +14759,50 @@ license:CC0-1.0 + + Chemistry: The Periodic Table (A-251 version 1.0) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + Chemistry: The Periodic Table (A-251 version 1.1) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + Choplifter 1982 @@ -17551,46 +14877,6 @@ license:CC0-1.0 - - Cleanwater Detectives (A-282 version 1.0) - 1991 - MECC - - - - - - - - - - - - - - - - - - Cleanwater Detectives (A-282 version 1.0) (800K 3.5") - 1991 - MECC - - - - - - - - - - - - - - - - Clef Notes Drill 1983 @@ -17611,8 +14897,11 @@ license:CC0-1.0 Clock Works (A-168 version 1.0) 1986 MECC - + + + + @@ -17629,8 +14918,11 @@ license:CC0-1.0 Clock Works (A-168 version 1.0) (800K 3.5") 1986 MECC - + + + + @@ -17736,7 +15028,7 @@ license:CC0-1.0 - + CommuniKeys (A-248 version 1.1) 1989 MECC @@ -17817,6 +15109,61 @@ license:CC0-1.0 + + Composing Information Series: MECC Editor (A-135 version 1.0) + 1985 + MECC + + + + + + + + + + + + + + + + Composing Information Series: MECC Write Start (A-133 version 1.2) + 1985 + MECC + + + + + + + + + + + + + + + + Composing Information Series: MECC Writer (A-132 version 1.2) + 1985 + MECC + + + + + + + + + + + + + + + Comprehensive Grammar Review II (version 1988) 1988 @@ -18273,7 +15620,7 @@ license:CC0-1.0 - + Conquering Math Series: Conquering Math Worksheet Generator (A-260 version 1.0) 1989 MECC @@ -18294,7 +15641,28 @@ license:CC0-1.0 - + + Conquering Math Series: Conquering Math Worksheet Generator (A-260 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + Conquering Math Series: Conquering Percents (A-210 version 1.0) 1989 MECC @@ -18320,7 +15688,59 @@ license:CC0-1.0 - + + Conquering Math Series: Conquering Percents (A-210 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + Conquering Math Series: Conquering Percents (A-210 version 1.1) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + Conquering Math Series: Conquering Ratios and Proportions (A-209 version 1.1) 1989 MECC @@ -18345,6 +15765,31 @@ license:CC0-1.0 + + Conquering Math Series: Conquering Ratios and Proportions (A-209 version 1.1) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + Conquering Math Series: Conquering Whole Numbers (A-201 version 1.1) (800K 3.5") 1987 @@ -18363,7 +15808,7 @@ license:CC0-1.0 - + Conquering Math Series: Decimal Concepts (A-206 version 1.0) 1988 MECC @@ -18388,7 +15833,32 @@ license:CC0-1.0 - + + Conquering Math Series: Decimal Concepts (A-206 version 1.0) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + Conquering Math Series: Fraction Concepts, Inc. (A-202 version 1.2) 1987 MECC @@ -20289,24 +17759,6 @@ license:CC0-1.0 - - Dataquest: Sampler (A-173 version 1.0) - 1986 - MECC - - - - - - - - - - - - - - David's Midnight Magic 1982 @@ -20905,6 +18357,42 @@ license:CC0-1.0 + + Displaying Information Series: MECC Graph (A-137 version 1.1) + 1985 + MECC + + + + + + + + + + + + + + + + Displaying Information Series: MECC Graphing Primer (A-136 version 1.0) + 1985 + MECC + + + + + + + + + + + + + + Dive Bomber 1988 @@ -20926,7 +18414,7 @@ license:CC0-1.0 - + Dog Sled Ambassadors (A-339 version 1.0) 1993 MECC @@ -21046,7 +18534,7 @@ license:CC0-1.0 - + Dr. Livingstone, I Presume? (A-314 version 1.0) 1992 MECC @@ -21703,51 +19191,6 @@ license:CC0-1.0 - - Eerieville Library (A-304 version 1.0) - 1993 - MECC - - - - - - - - - - - - - - - - - - - - Eerieville Library (A-304 version 1.0) (800K 3.5") - 1992 - MECC - - - - - - - - - - - - - - - - - - - Electrifying Adventures (A-334 version 1.0) 1993 @@ -21769,6 +19212,162 @@ license:CC0-1.0 + + Elementary Genetics (A-402 version 1.1) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + Elementary Volume 3: Social Studies (History, Ecomonics, and Geography) (A-704 version 4.8) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 5: Language Arts (Prefixes) (A-719 version 1.5) + 1980 + MECC + + + + + + + + + + + + + + + + Elementary Volume 8: Geometry (Points and Angles) (A-732 version 1.0) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 9: Geometry (Lines and Triangles) (A-733 version 2.1) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 10: Geometry (Quadrilaterals: Area and Perimeter) (A-734 version 1.0) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 10: Geometry (Quadrilaterals: Area and Perimeter) (A-734 version 1.1) + 1981 + MECC + + + + + + + + + + + + + + + + Elementary Volume 12: Language Arts (SIMS) (A-736 version 1.0) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + + English MicroLab: Assessment of English Skills (version A1) 1985 @@ -21787,6 +19386,61 @@ license:CC0-1.0 + + English Volume 1: Parts of Speech (A-746 version 1.5) + 1981 + MECC + + + + + + + + + + + + + + + + + Equation Math (A-193 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + Equation Math (A-193 version 1.1) (800K 3.5") + 1987 + MECC + + + + + + + + + + + + + + Equations I (version 1983) 1983 @@ -22001,7 +19655,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation Activities (A-296 version 1.0) 1991 MECC @@ -22024,7 +19678,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation Activities (A-296 version 1.0) (800K 3.5") 1991 MECC @@ -22047,7 +19701,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation Strategies (A-295 version 1.0) 1991 MECC @@ -22068,7 +19722,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation Strategies (A-295 version 1.0) (800K 3.5") 1991 MECC @@ -22089,7 +19743,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation: Quick Solve I (A-258 version 1.0) 1990 MECC @@ -22113,7 +19767,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation: Quick Solve I (A-258 version 1.0) (800K 3.5") 1990 MECC @@ -22137,7 +19791,7 @@ license:CC0-1.0 - + Estimation Collection: Estimation: Quick Solve II (A-259 version 1.0) 1990 MECC @@ -22160,6 +19814,30 @@ license:CC0-1.0 + + Estimation Collection: Estimation: Quick Solve II (A-259 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + + Europe Ablaze (version 1.0) 1985 @@ -22233,6 +19911,160 @@ license:CC0-1.0 + + Experiencing Procedures (A-810 version 1.0) + 1983 + MECC + + + + + + + + + + + + + + + + + Exploring Chaos (A-316 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + Exploring Chaos (A-316 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + Exploring Gas Laws (A-229 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + Exploring Gas Laws (A-229 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + Exploring Sequences and Series (A-263 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + Exploring Sequences and Series (A-263 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + Exploring Science: Temperature 1988 @@ -22268,6 +20100,221 @@ license:CC0-1.0 + + Express Delivery Reading Series: Eerieville Library (A-304 version 1.0) + 1993 + MECC + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Eerieville Library (A-304 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Fish School (A-302 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Fish School (A-302 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Moving Museum (A-303 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Moving Museum (A-303 version 1.0) (800K 3.5") + 1993 + MECC + + + + + + + + + + + + + + + + + + + + + Express Delivery Reading Series: Windy City (A-301 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + Extensions to Applesoft BASIC (A-786 version 1.0) + 1983 + MECC + + + + + + + + + + + + + + + + Extensions to Applesoft BASIC (A-786 version 1.2) + 1983 + MECC + + + + + + + + + + + + + + + + EZ Logo: Revised Edition (A-775 version 2.1) (800K 3.5") + 1985 + MECC + + + + + + + + + + + + + + + + + F-15 Strike Eagle (revision 1) 1985 @@ -22796,6 +20843,56 @@ license:CC0-1.0 + + Fraction Munchers (A-196 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + + + + + + + + Fraction Munchers (A-196 version 1.0) (800K 3.5") + 1987 + MECC + + + + + + + + + + + + + + + + + + + + + Fraction Word Problems 1983 @@ -22847,6 +20944,128 @@ license:CC0-1.0 + + Frames: A Reading Comprehension Series: Littletown Zoo (A-292 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + + Frames: A Reading Comprehension Series: Space Station Freedom (A-290 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + Frames: A Reading Comprehension Series: Space Station Freedom (A-290 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + + Frames: A Reading Comprehension Series: Vacation Nation Travel (A-291 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + Frames: A Reading Comprehension Series: Vacation Nation Travel (A-291 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + Freddy's Puzzling Adventures (revision D) 1984 @@ -22864,6 +21083,54 @@ license:CC0-1.0 + + Freedom! (A-315 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + Freedom! (A-315 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + Frenzy & Flip Flop 1981 @@ -23493,6 +21760,25 @@ license:CC0-1.0 + + Ghost Writer (A-156 version 1.0) + 1985 + MECC + + + + + + + + + + + + + + + Go (Hayden Book Company) 1982 @@ -23872,6 +22158,25 @@ license:CC0-1.0 + + Growgins' Fractions (A-773 version 1.0) + 1983 + MECC + + + + + + + + + + + + + + + Guardian (Continental Software) 1982 @@ -24413,6 +22718,47 @@ license:CC0-1.0 + + History Makers (A-313 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + History Makers (A-313 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + Homonyms (version 01.19.89) 1989 @@ -24778,6 +23124,78 @@ license:CC0-1.0 + + Instant Survey Sampler (A-224 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Instant Survey Sampler (A-224 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + International Hockey 1987 @@ -24944,6 +23362,42 @@ license:CC0-1.0 + + Jenny's Journeys (A-161 version 1.0) + 1984 + MECC + + + + + + + + + + + + + + + + Jenny's Journeys (A-161 version 1.0) (800K 3.5") + 1984 + MECC + + + + + + + + + + + + + + John Madden Football 1988 @@ -25974,6 +24428,42 @@ license:CC0-1.0 + + LabelMaker (A-241 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + LabelMaker (A-241 version 1.0) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + Labyrinth 1982 @@ -26335,6 +24825,51 @@ license:CC0-1.0 + + Lewis and Clark Stayed Home (A-279 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + + + Lewis and Clark Stayed Home (A-279 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + Library Skills: Let's Learn About The Library 1986 @@ -27324,6 +25859,10 @@ license:CC0-1.0 1983 MECC + + + + @@ -27342,8 +25881,13 @@ license:CC0-1.0 Mastering Math Series 2: Circus Math (A-109 version 1.0) 1984 MECC - + + + + + + @@ -27361,7 +25905,12 @@ license:CC0-1.0 1984 MECC - + + + + + + @@ -27414,8 +25963,14 @@ license:CC0-1.0 Mastering Math Series 4: Space Subtraction (A-145 version 1.0) 1985 MECC - + + + + + + + @@ -27482,12 +26037,32 @@ license:CC0-1.0 + + Mastering Math Series: Diagnostic System (A-149 version 1.2) (800K 3.5") + 1985 + MECC + + + + + + + + + + + + + + Mastering Math Series: Worksheet Generator (A-151 version 1.1) (800K 3.5") 1985 MECC - + + + @@ -27913,6 +26488,85 @@ license:CC0-1.0 + + Mathematics Volume 1: Graphing, Logic, and Equations (A-706 version 3.2) + 1980 + MECC + + + + + + + + + + + + + + + + + + + + + Mathematics Volume 2: Measurement (A-737 version 1.2) + 1981 + MECC + + + + + + + + + + + + + + + + + Mathematics Volume 3: Geometry (Formulas, Shapes, and Skills) (A-738 version 1.3) (limited boot backup) + 1981 + MECC + + + + + + + + + + + + + + + + + Mathematics Volume 3: Geometry (Formulas, Shapes, and Skills) (A-738 version 1.3) + 1981 + MECC + + + + + + + + + + + + + + Mathematics Word Problems Grade 2 1983 @@ -28009,6 +26663,52 @@ license:CC0-1.0 + + Measure Works (A-246 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + Measure Works (A-246 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + Measuring Economic Activity 1985 @@ -28025,50 +26725,115 @@ license:CC0-1.0 - - MECC Dataquest: The Presidents (A-140 version 1.1) - 1985 + + MECC Apple Demonstration: Volume 1 (A-701 version 1.1) + 1980 MECC - - + + + - + - - - - - - - - - + + - - MECC Dataquest: The Presidents (A-140 version 1.2) - 1985 + + MECC Copy System / Label Utility (A-7013 version 3.0) (800K 3.5") + 1993 MECC - - - - + + + + + + + + + + + + + + + + + + + + MECC Dataquest: Europe and the Soviet Union (A-253 version 1.0) + 1990 + MECC + + + + + + - - - + + - - - - + + + + MECC Dataquest: Latin America (A-243 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + MECC Dataquest: North American Mammals (A-250 version 1.1) + 1988 + MECC + + + + + + + + + + + + + + + + MECC Dataquest: The Middle East and North Africa (A-244 version 1.0) + 1989 + MECC + + + + + + + + + + @@ -28077,8 +26842,12 @@ license:CC0-1.0 MECC Early Learning Series: Arithmetic Critters (A-166 version 1.0) 1986 MECC - + + + + + @@ -28095,8 +26864,12 @@ license:CC0-1.0 MECC Early Learning Series: Arithmetic Critters (A-166 version 1.0) (800K 3.5") 1986 MECC - + + + + + @@ -28113,8 +26886,12 @@ license:CC0-1.0 MECC Early Learning Series: Counting Critters (A-165 version 1.0) 1985 MECC - + + + + + @@ -28127,12 +26904,39 @@ license:CC0-1.0 + + MECC Early Learning Series: First-Letter Fun (A-154 version 1.1) (800K 3.5") + 1985 + MECC + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Fun from A to Z (A-164 version 1.0) 1985 MECC - + + + + @@ -28149,8 +26953,11 @@ license:CC0-1.0 MECC Early Learning Series: Fun from A to Z (A-164 version 1.0) (800K 3.5") 1985 MECC - + + + + @@ -28163,6 +26970,279 @@ license:CC0-1.0 + + MECC Early Learning Series: Patterns (A-227 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Patterns (A-227 version 1.2) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Picture Chompers (A-255 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Early Learning Series: Picture Chompers (A-255 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Gazette (A-273 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Gobble (A-306 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Gobble (A-306 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Madness (A-307 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Madness (A-307 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Monsters (A-272 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Toy Shop (A-271 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Grammar Series: Grammar Toy Shop (A-271 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Hi-Res Toolkit (A-105 version 1.0) 1984 @@ -28181,6 +27261,1167 @@ license:CC0-1.0 + + MECC Outliner (A-228 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Outliner (A-228 version 1.0) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Blends and Digraphs (A-179 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Blends and Digraphs (A-179 version 1.0) (800K 3.5") + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Final Consonants (A-176 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Initial Consonants (A-175 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Vowels I (A-177 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Phonics Prime Time: Vowels II (A-178 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines I (A-185 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines II (A-186 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines III (A-187 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Those Amazing Reading Machines IV (A-188 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Compound It! (A-183 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Contraction Action (A-180 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Prefix Power (A-181 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Reading Collection: Words at Work: Suffix Sense (A-182 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Backyard Birds (A-216 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Backyard Birds (A-216 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Cavity Busters (A-284 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Cavity Busters (A-284 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Cleanwater Detectives (A-282 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Cleanwater Detectives (A-282 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Five-Star Forecast (A-219 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Five-Star Forecast (A-219 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Fossil Hunter (A-220 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Fossil Hunter (A-220 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Invisible Bugs (A-218 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Invisible Bugs (A-218 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Invisible Bugs (A-218 version 1.1) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Lunar Greenhouse (A-215 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Lunar Greenhouse (A-215 version 1.1) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Miner's Cave (A-213 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Miner's Cave (A-213 version 1.0) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Murphy's Minerals (A-221 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Murphy's Minerals (A-221 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Matter (A-212 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Matter (A-212 version 1.1) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Objects (A-211 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Mystery Objects (A-211 version 1.1) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Paper Plane Pilot (A-281 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Paper Plane Pilot (A-281 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Sun and Seasons (A-222 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Sun and Seasons (A-222 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Weeds to Trees (A-217 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Weeds to Trees (A-217 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Wood Car Rally (A-214 version 1.0) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Wood Car Rally (A-214 version 1.1) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Woolly Bounce (A-283 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + MECC Science Inquiry Collection: Woolly Bounce (A-283 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Puzzles and Tests (A-234 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spellevator (A-231 version 1.3) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Press (A-232 version 1.1) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Series Toolkit (A-233 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + MECC Spelling Series: Spelling Workout (A-230 version 1.1) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + + Mech Brigade (version 1.2) 1985 @@ -31038,6 +31279,7 @@ license:CC0-1.0 Modeling (A-823 version 1.0) 1983 MECC + @@ -31132,6 +31374,43 @@ license:CC0-1.0 + + Money Works (A-195 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + Money Works (A-195 version 1.1) (800K 3.5") + 1987 + MECC + + + + + + + + + + + + + + + Money! Money! (version 09.13.84) 1984 @@ -32438,6 +32717,64 @@ license:CC0-1.0 + + Number Jumpers (A-341 version 1.0) (800K 3.5") + 1994 + MECC + + + + + + + + + + + + + + + + + + + + Number Munchers (A-170 version 1.3) + 1986 + MECC + + + + + + + + + + + + + + + + Number Munchers (A-170 version 1.3) (800K 3.5") + 1986 + MECC + + + + + + + + + + + + + + Number Stumper 1984 @@ -32504,6 +32841,51 @@ license:CC0-1.0 + + Nutrition Nabber (A-330 version 1.0) + 1993 + MECC + + + + + + + + + + + + + + + + + + + + Nutrition Nabber (A-330 version 1.0) (800K 3.5") + 1993 + MECC + + + + + + + + + + + + + + + + + + + Odd One Out (version 1986) 1986 @@ -32542,6 +32924,63 @@ license:CC0-1.0 + + Odell Lake (A-191 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + + Odell Lake (A-191 version 1.2) + 1986 + MECC + + + + + + + + + + + + + + + + + Odell Lake (A-191 version 1.2) (800K 3.5") + 1986 + MECC + + + + + + + + + + + + + + + OGRE 1986 @@ -32638,6 +33077,28 @@ license:CC0-1.0 + + On Stage (A-312 version 1.0) (800K 3.5") + 1993 + MECC + + + + + + + + + + + + + + + + + + Oo-Topos 1986 @@ -33087,6 +33548,25 @@ license:CC0-1.0 + + Path Tactics (A-162 version 1.0) + 1984 + MECC + + + + + + + + + + + + + + + Patterns in Pitch (Composition and Dictation): Level One 1986 @@ -33327,6 +33807,7 @@ license:CC0-1.0 + @@ -33382,6 +33863,47 @@ license:CC0-1.0 + + Picture a Story (A-311 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + Picture a Story (A-311 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + Picture Perfect (version 1989) 1989 @@ -33558,6 +34080,28 @@ license:CC0-1.0 + + Pizza to Go (A-333 version 1.0) + 1993 + MECC + + + + + + + + + + + + + + + + + + Plant and Animal Cells 1986 @@ -33679,6 +34223,7 @@ license:CC0-1.0 Polls and Politics Volume 1 (A-820 version 1.0) 1984 MECC + @@ -33926,6 +34471,86 @@ license:CC0-1.0 + + Probability (A-821 version 1.0) + 1983 + MECC + + + + + + + + + + + + + + + + Probability Lab (A-262 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + Problem-Solving with Nim (A-257 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + Problem-Solving with Nim (A-257 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + Problem-Solving Strategies (A-784 version 1.0) 1983 @@ -34068,6 +34693,22 @@ license:CC0-1.0 + + Qix + 1989 + Taito America + + + + + + + + + + + + Quations: The Crossmath Game 1985 @@ -34214,18 +34855,48 @@ license:CC0-1.0 - - Qix - 1989 - Taito America - - - - - + + Quickflash! (A-167 version 1.0) + 1986 + MECC + + + + + + + + + + + - - + + + + + + + + Quilting Bee (A-349 version 1.0) + 1994 + MECC + + + + + + + + + + + + + + + + @@ -35040,6 +35711,32 @@ license:CC0-1.0 + + Rescue in the Outback (A-342 version 1.0) (800K 3.5") + 1994 + MECC + + + + + + + + + + + + + + + + + + + + + + Rescue Raiders 1984 @@ -35423,6 +36120,53 @@ license:CC0-1.0 + + Rocket Factory (A-308 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + Rocket Factory (A-308 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + Rocky's Boots (version 1.0 later) 1982 @@ -35943,6 +36687,27 @@ license:CC0-1.0 + + Science Giants (A-343 version 1.0) (800K 3.5") + 1994 + MECC + + + + + + + + + + + + + + + + + Science Toolkit 1985 @@ -36534,6 +37299,36 @@ license:CC0-1.0 + + Show Time (A-171 version 1.1) + 1986 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + Shutterbug's Pictures 1985 @@ -36787,6 +37582,24 @@ license:CC0-1.0 + + Sky Lab (A-155 version 1.1) (800K 3.5") + 1985 + MECC + + + + + + + + + + + + + + Skyfox 1984 @@ -37222,6 +38035,42 @@ license:CC0-1.0 + + Speedway Math (A-169 version 1.0) + 1986 + MECC + + + + + + + + + + + + + + + + Speedway Math (A-169 version 1.0) (800K 3.5") + 1986 + MECC + + + + + + + + + + + + + + Speedy Delivery 1985 @@ -37386,6 +38235,24 @@ license:CC0-1.0 + + Spelling Volume 2: Secondary (A-728 version 2.0) + 1980 + MECC + + + + + + + + + + + + + + Spiderbot 1988 @@ -38445,6 +39312,28 @@ license:CC0-1.0 + + Sum Stories (A-344 version 1.0) (800K 3.5") + 1994 + MECC + + + + + + + + + + + + + + + + + + Summer Games 1984 @@ -38892,6 +39781,53 @@ license:CC0-1.0 + + Take a Chance! (A-317 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + + + Take a Chance! (A-317 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + + + Taking Chances 1991 @@ -39169,6 +40105,135 @@ license:CC0-1.0 + + Teacher Option Organizer (A-242 version 1.0) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + Teacher Option Organizer (A-242 version 1.1) + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + Teacher Option Organizer (A-242 version 1.1) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + Teacher Option Organizer (A-242 version 1.2) (800K 3.5") + 1988 + MECC + + + + + + + + + + + + + + + + + + + + + Teaching Scientific Inquiry with Computers (T-638 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + Teaching Scientific Inquiry with Computers (T-638 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + TEAM Vocabulary: Science and Health (version 1.0) (800K 3.5") 1990 @@ -40540,6 +41605,24 @@ license:CC0-1.0 + + The Friendly Computer (A-779 version 1.5) (800K 3.5") + 1983 + MECC + + + + + + + + + + + + + + The Games: Summer Edition 1988 @@ -41032,6 +42115,48 @@ license:CC0-1.0 + + The Living Cell (A-278 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + The Living Cell (A-278 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + The Lüscher Profile 1985 @@ -41064,6 +42189,42 @@ license:CC0-1.0 + + The Market Place (A-160 version 1.0) + 1984 + MECC + + + + + + + + + + + + + + + + The Market Place (A-160 version 1.0) (800K 3.5") + 1984 + MECC + + + + + + + + + + + + + + The Mask of the Sun (version 2.1) 1982 @@ -41451,6 +42612,49 @@ license:CC0-1.0 + + The Oregon Trail (A-157 version 1.4) + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + The Oregon Trail (A-157 version 1.4) (800K 3.5") + 1985 + MECC + + + + + + + + + + + + + + The Playroom (version 1.0) 1989 @@ -42070,6 +43274,24 @@ license:CC0-1.0 + + The Three R's of Microcomputing & The Glass Computer (A-811 version 1.1) + 1983 + MECC + + + + + + + + + + + + + + The Time Tunnel: American History Series 1984 @@ -42519,6 +43741,173 @@ license:CC0-1.0 + + Time Navigator (A-247 version 1.0) + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Time Navigator (A-247 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + + + + + + Time Navigator Around the World (A-277 version 1.0) + 1991 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + Time Navigator Around the World (A-277 version 1.0) (800K 3.5") + 1991 + MECC + + + + + + + + + + + + + + + + + + + + Time Navigator Leaps Back (A-225 version 1.0) + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Time Navigator Leaps Back (A-225 version 1.0) (800K 3.5") + 1990 + MECC + + + + + + + + + + + + + + + + + + + + + Times of Lore 1988 @@ -42635,6 +44024,42 @@ license:CC0-1.0 + + To Preserve, Protect and Defend (A-198 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + To Preserve, Protect and Defend (A-198 version 1.1) (800K 3.5") + 1987 + MECC + + + + + + + + + + + + + + Tobbs Learns Algebra: Puzzles and Problem Solving (version 1.1) 1983 @@ -42947,6 +44372,51 @@ license:CC0-1.0 + + Treasures for Sale (A-337 version 1.0) + 1993 + MECC + + + + + + + + + + + + + + + + + + + + Treasures for Sale (A-337 version 1.0) (800K 3.5") + 1993 + MECC + + + + + + + + + + + + + + + + + + + Triad (version 1.0) 1983 @@ -45097,6 +46567,94 @@ license:CC0-1.0 + + Wonderland Puzzles (A-310 version 1.0) + 1992 + MECC + + + + + + + + + + + + + + + + + + + Wonderland Puzzles (A-310 version 1.0) (800K 3.5") + 1989 + MECC + + + + + + + + + + + + + + + + + + + Woolly's Birthday (A-350 version 1.0) (800K 3.5") + 1994 + MECC + + + + + + + + + + + + + + + + + + + + + + Woolly's Garden (A-309 version 1.0) (800K 3.5") + 1992 + MECC + + + + + + + + + + + + + + + + + + Word Attack! (version 09.12.86) 1986 @@ -45218,6 +46776,56 @@ license:CC0-1.0 + + Word Munchers (A-153 version 1.4) (800K 3.5") + 1985 + MECC + + + + + + + + + + + + + + + + + + + + + + + Word Processing on the Apple (A-769 version 2.0) + 1984 + MECC + + + + + + + + + + + + + + + + + + + + + Wortgefecht 1984 @@ -45242,6 +46850,27 @@ license:CC0-1.0 + + Word Builder (A-346 version 1.0) (800K 3.5") + 1994 + MECC + + + + + + + + + + + + + + + + + Word Quest: Binary Search Strategies 1985 @@ -45653,4 +47282,29 @@ license:CC0-1.0 + + Zoyon Patrol (A-199 version 1.0) + 1987 + MECC + + + + + + + + + + + + + + + + + + + + + diff --git a/hash/apple2gs_flop_clcracked.xml b/hash/apple2gs_flop_clcracked.xml index 2a4ae5b680a..254bc89d9ef 100644 --- a/hash/apple2gs_flop_clcracked.xml +++ b/hash/apple2gs_flop_clcracked.xml @@ -1464,10 +1464,10 @@ license:CC0-1.0 - Mercury (version 1.0) (cleanly cracked) + Mercury (A-249 version 1.0) (trex crack) 1989 MECC - + @@ -1478,18 +1478,16 @@ license:CC0-1.0 - - + - - + - + @@ -2132,10 +2130,10 @@ license:CC0-1.0 - Storybook Weaver (version 1.0) (cleanly cracked) + Storybook Weaver (A-275 version 1.0) (trex crack) 1990 MECC - + @@ -2146,18 +2144,16 @@ license:CC0-1.0 - - + - - + - + @@ -2165,10 +2161,10 @@ license:CC0-1.0 - Storybook Weaver - World of Adventure (version 1.0) (cleanly cracked) + Storybook Weaver: World of Adventure (A-276 version 1.0) (trex crack) 1991 MECC - + @@ -2177,18 +2173,16 @@ license:CC0-1.0 - - + - - + - + @@ -2196,10 +2190,10 @@ license:CC0-1.0 - Storybook Weaver - World of Make-Believe (version 1.0) (cleanly cracked) + Storybook Weaver: World of Make-Believe (A-298 version 1.0) (trex crack) 1991 MECC - + @@ -2207,18 +2201,16 @@ license:CC0-1.0 - - + - - + - + @@ -3003,9 +2995,10 @@ license:CC0-1.0 - USA GeoGraph (Version 1.0) (cleanly cracked) + USA GeoGraph (A-300 version 1.0) (trex crack) 1989 MECC + @@ -3016,18 +3009,16 @@ license:CC0-1.0 - - + - - + - + @@ -3237,9 +3228,10 @@ license:CC0-1.0 - World GeoGraph (Version 1.3) (cleanly cracked) + World GeoGraph (USG-100 version 1.3) (trex crack) 1989 MECC + @@ -3251,18 +3243,16 @@ license:CC0-1.0 - - + - - + - + diff --git a/hash/apple2gs_flop_misc.xml b/hash/apple2gs_flop_misc.xml index d4a7fc5b0f2..128dda75696 100644 --- a/hash/apple2gs_flop_misc.xml +++ b/hash/apple2gs_flop_misc.xml @@ -695,11 +695,20 @@ Generated by SLIST 0.1 - - Calendar Crafter + + Calendar Crafter (A-194 version 1.0) 1987 MECC - + + + + + + + + + + @@ -1442,10 +1451,18 @@ Generated by SLIST 0.1 - Designer Prints + Designer Prints (A-252 version 1.0) 1989 MECC - + + + + + + + + + @@ -1454,10 +1471,18 @@ Generated by SLIST 0.1 - Designer Puzzles + Designer Puzzles (A-223 version 1.0) 1990 MECC - + + + + + + + + + @@ -3687,10 +3712,20 @@ Generated by SLIST 0.1 - Mercury + Mercury (A-249 version 1.0) 1990 MECC - + + + + + + + + + + + @@ -5942,10 +5977,20 @@ Generated by SLIST 0.1 - Storybook Weaver + Storybook Weaver (A-275 version 1.0) 1990 MECC - + + + + + + + + + + + @@ -5953,26 +5998,41 @@ Generated by SLIST 0.1 - - Storybook Weaver World of Make Believe + + Storybook Weaver: World of Adventure (A-276 version 1.0) 1991 MECC - + + + + + + + + + - + - - Storybook Weaver World of Adventure + + Storybook Weaver: World of Make-Believe (A-298 version 1.0) 1991 MECC - + + + + + + + + - + @@ -7119,16 +7179,28 @@ Generated by SLIST 0.1 - USA Geography + USA GeoGraph (A-300 version 1.0) 1989 MECC - + + + + + + + + + + + + + @@ -7381,17 +7453,30 @@ Generated by SLIST 0.1 - - World Geograph + + World GeoGraph (USG-100 version 1.0) 1989 MECC - + + + + + + + + + + + + + + diff --git a/hash/apple2gs_flop_orig.xml b/hash/apple2gs_flop_orig.xml index 35e80aec4a5..fdb2833ed8d 100644 --- a/hash/apple2gs_flop_orig.xml +++ b/hash/apple2gs_flop_orig.xml @@ -3915,7 +3915,7 @@ license:CC0-1.0 Designer Puzzles (A-223 version 1.0) 1990 MECC - + @@ -3940,10 +3940,10 @@ license:CC0-1.0 - Mercury (version 1.0) + Mercury (A-249 version 1.0) 1989 MECC - + @@ -3956,13 +3956,13 @@ license:CC0-1.0 - + - + @@ -3970,10 +3970,10 @@ license:CC0-1.0 - Storybook Weaver + Storybook Weaver (A-275 version 1.0) 1990 MECC - + @@ -3986,13 +3986,13 @@ license:CC0-1.0 - + - + @@ -4000,10 +4000,10 @@ license:CC0-1.0 - Storybook Weaver: World of Adventure (version 1.0) + Storybook Weaver: World of Adventure (A-276 version 1.0) 1991 MECC - + @@ -4014,13 +4014,13 @@ license:CC0-1.0 - + - + @@ -4028,10 +4028,10 @@ license:CC0-1.0 - Storybook Weaver: World of Make-Believe (version 1.0) + Storybook Weaver: World of Make-Believe (A-298 version 1.0) 1991 MECC - + @@ -4041,13 +4041,13 @@ license:CC0-1.0 - + - + From b04bec523a06c6ff7f373165ee12c6e8a9787fa1 Mon Sep 17 00:00:00 2001 From: BlueRain-debug <68976789+BlueRain-debug@users.noreply.github.com> Date: Thu, 26 Feb 2026 03:04:55 +0800 Subject: [PATCH 045/351] pc9821.cpp: Implement PC-9821 PEGC Planar Mode (#15001) --- src/mame/nec/pc9821.cpp | 311 +++++++++++++++++++++++++++++++++------- src/mame/nec/pc9821.h | 14 +- 2 files changed, 271 insertions(+), 54 deletions(-) diff --git a/src/mame/nec/pc9821.cpp b/src/mame/nec/pc9821.cpp index f8f7d34bebc..6ae1aa2d0d4 100644 --- a/src/mame/nec/pc9821.cpp +++ b/src/mame/nec/pc9821.cpp @@ -313,13 +313,74 @@ void pc9821_state::ext2_video_ff_w(uint8_t data) // (it's seemingly the official NEC naming) uint16_t pc9821_state::pc9821_grcg_gvram_r(offs_t offset, uint16_t mem_mask) { - if(m_ex_video_ff[ANALOG_256_MODE]) + if (m_ex_video_ff[ANALOG_256_MODE]) { - u16 *ext_gvram = (u16 *)m_ext_gvram.target(); - int bank = offset >> 14; - if(bank <= 1) - return ext_gvram[((m_pegc.bank[bank])*0x4000) + (offset & 0x3fff)]; - return 0xffff; + int bank_idx = offset >> 14; + if (bank_idx > 1) return 0xffff; + + u8 *ext_gvram = (u8 *)m_ext_gvram.target(); + + if (m_pegc.packed_mode) + { + // Packed Mode Read + //logerror("Packed Mode R Used\n"); + u16 *ext_gvram16 = (u16 *)m_ext_gvram.target(); + return ext_gvram16[(m_pegc.bank[bank_idx] * 0x4000) + (offset & 0x3fff)]; + } + else + { + // Planar Mode Read + //logerror("Planar Mode R Used\n"); + u32 addr = (offset * 16); + u16 ret = 0; + u8 plane_mask = m_pegc.regs[0x04]; + u8 pal1 = m_pegc.regs[0x14]; + u16 rop = m_pegc.regs[0x08] | (m_pegc.regs[0x09] << 8); + bool cpu_data = BIT(rop, 8); + bool shift_dir = BIT(rop, 9); + bool pat_update = BIT(rop, 13); + + for (int i = 0; i < 16; i++) + { + u32 tmp = (shift_dir ? (addr + 15 - i) : (addr + i)) & 0x7ffff; + u8 pixel_data = ext_gvram[tmp]; + + if ((pixel_data ^ pal1) & ~plane_mask) + ret |= (1 << i); + + if (pat_update) + { + m_pegc.pattern[tmp & m_pegc.pattern_mask] = pixel_data; + } + } + + // VRAM to VRAM + if (!cpu_data) + { + if (m_pegc.remain == 0) { + m_pegc.remain = ((m_pegc.regs[0x10] | (m_pegc.regs[0x11] << 8)) & 0x0fff) + 1; + m_pegc.first_process_w = true; + m_pegc.first_process_r = true; + m_pegc.shift_cnt = 0; + } + + u32 src_shift = m_pegc.first_process_r ? (m_pegc.regs[0x12] & 0x1f) : 0; + int read_count = m_pegc.first_process_r ? (16 - src_shift) : 16; + + for (int i = 0; i < read_count; i++) + { + u32 tmp = (shift_dir ? (addr + 15 - src_shift - i) : (addr + src_shift + i)) & 0x7ffff; + u8 pixel_data = ext_gvram[tmp]; + + if (m_pegc.shift_cnt < sizeof(m_pegc.shift_buffer)) + { + m_pegc.shift_buffer[m_pegc.shift_cnt++] = pixel_data; + } + } + m_pegc.first_process_r = false; + } + return ret; + } } return grcg_gvram_r(offset, mem_mask); @@ -327,13 +388,138 @@ uint16_t pc9821_state::pc9821_grcg_gvram_r(offs_t offset, uint16_t mem_mask) void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - if(m_ex_video_ff[ANALOG_256_MODE]) + //logerror("PEGC_W: PC=%08x Off=%05x Data=%04x\n", m_maincpu->pc(), offset, data); + if (m_ex_video_ff[ANALOG_256_MODE]) { - u16 *ext_gvram = (u16 *)m_ext_gvram.target(); - int bank = offset >> 14; - if(bank <= 1) - COMBINE_DATA(&ext_gvram[((m_pegc.bank[bank])*0x4000) + (offset & 0x3fff)]); - return; + int bank_idx = offset >> 14; + if (bank_idx > 1) return; + + u8 *ext_gvram = (u8 *)m_ext_gvram.target(); + + if (m_pegc.packed_mode) + { + // Packed Mode + //logerror("Packed Mode W Used\n"); + u16 *ext_gvram16 = (u16 *)m_ext_gvram.target(); + COMBINE_DATA(&ext_gvram16[(m_pegc.bank[bank_idx] * 0x4000) + (offset & 0x3fff)]); + } + else + { + // Planar Mode + //logerror("Planar Mode W Used\n"); + u8 plane_mask = m_pegc.regs[0x04]; + u16 rop = m_pegc.regs[0x08] | (m_pegc.regs[0x09] << 8); + u32 pixel_mask = m_pegc.regs[0x0c] | (m_pegc.regs[0x0d] << 8) | (m_pegc.regs[0x0e] << 16) | (m_pegc.regs[0x0f] << 24); + + bool cpu_data = BIT(rop, 8); + bool shift_dir = BIT(rop, 9); + u8 ropmethod = (rop >> 10) & 3; + bool ropupdmode = BIT(rop, 12); + u8 pal1 = m_pegc.regs[0x14]; + u8 pal2 = m_pegc.regs[0x18]; + + if (m_pegc.remain == 0) { + m_pegc.remain = ((m_pegc.regs[0x10] | (m_pegc.regs[0x11] << 8)) & 0x0fff) + 1; + m_pegc.first_process_w = true; + m_pegc.first_process_r = true; + m_pegc.shift_cnt = 0; + } + + u32 dst_shift = m_pegc.first_process_w ? (m_pegc.regs[0x13] & 0x1f) : 0; + u32 addr = (offset * 16); + + if (cpu_data) + { + u32 src_shift = m_pegc.first_process_w ? (m_pegc.regs[0x12] & 0x1f) : 0; + int push_count = m_pegc.first_process_w ? (16 - src_shift) : 16; + + for (int i = 0; i < push_count; i++) { + int orig_i = i + src_shift; + int bit_idx = ((orig_i / 8) * 8) + (7 - (orig_i % 8)); + + if (m_pegc.shift_cnt < sizeof(m_pegc.shift_buffer)) { + m_pegc.shift_buffer[m_pegc.shift_cnt++] = (data & (1 << bit_idx)) ? 0xff : 0x00; + } + } + } + + int process_count = m_pegc.first_process_w ? (16 - dst_shift) : 16; + if (process_count > m_pegc.remain) process_count = m_pegc.remain; + if (process_count > m_pegc.shift_cnt) process_count = m_pegc.shift_cnt; + + // ROP + for (int i = 0; i < process_count; i++) + { + u32 tmp = (shift_dir ? (addr + 15 - dst_shift - i) : (addr + dst_shift + i)) & 0x7ffff; + + int p_idx = i + dst_shift; + u32 pixel_mask_pos = 1 << ((p_idx / 8) * 8 + (7 - (p_idx & 7))); + + if (pixel_mask & pixel_mask_pos) + { + u8 src = m_pegc.shift_buffer[i]; + u8 dst = ext_gvram[tmp]; + + if (ropupdmode) + { + ext_gvram[tmp] &= plane_mask; + + u8 c4 = 0, c8 = 0; + if (ropmethod == 0) { c4 = c8 = m_pegc.pattern[tmp & m_pegc.pattern_mask]; } + else if (ropmethod == 1) { c4 = c8 = pal2; } + else if (ropmethod == 2) { c4 = c8 = pal1; } + else { c4 = pal1; c8 = pal2; } + + u8 res = 0; + /* + bit 7: S and D and C4 + bit 6: S and D and ~C4 + bit 5: S and ~D and C4 + bit 4: S and ~D and ~C4 + bit 3: ~S and D and C8 + bit 2: ~S and D and ~C8 + bit 1: ~S and ~D and C8 + bit 0: ~S and ~D and ~C8 + */ + if (rop & 0x80) res |= (src & dst & c4); + if (rop & 0x40) res |= (src & dst & ~c4); + if (rop & 0x20) res |= (src & ~dst & c4); + if (rop & 0x10) res |= (src & ~dst & ~c4); + if (rop & 0x08) res |= (~src & dst & c8); + if (rop & 0x04) res |= (~src & dst & ~c8); + if (rop & 0x02) res |= (~src & ~dst & c8); + if (rop & 0x01) res |= (~src & ~dst & ~c8); + + ext_gvram[tmp] |= (res & ~plane_mask); + } + else + { + u8 res = 0; + for(int j = 0; j < 8; j++) { + if (src & (1 << j)) res |= (~plane_mask | dst) & (1 << j); + else res |= (plane_mask & dst) & (1 << j); + } + ext_gvram[tmp] = res; + } + } + m_pegc.remain--; + } + + if (m_pegc.remain == 0) { + m_pegc.first_process_w = true; + m_pegc.first_process_r = true; + m_pegc.shift_cnt = 0; + } else { + m_pegc.first_process_w = false; + + int remaining_shift = m_pegc.shift_cnt - process_count; + for (int i = 0; i < remaining_shift; i++) { + m_pegc.shift_buffer[i] = m_pegc.shift_buffer[i + process_count]; + } + m_pegc.shift_cnt = remaining_shift; + } + return; + } } grcg_gvram_w(offset,data,mem_mask); @@ -374,7 +560,7 @@ void pc9821_state::pegc_mmio_map(address_map &map) ); map(0x100, 0x100).lw8( NAME([this] (u8 data) { - m_pegc.packed_mode = bool(BIT(data, 0)); + m_pegc.packed_mode = !bool(BIT(data, 0)); logerror("$e0100 packed mode %02x\n", data); }) ); @@ -389,48 +575,67 @@ void pc9821_state::pegc_mmio_map(address_map &map) m_pegc_vram_view.disable(); }) ); - // $4a0 alias - map(0x104, 0x104).lw8( - NAME([this] (u8 data) { - pc9821_egc_w(0x0 / 2, data, 0x00ff); + map(0x104, 0x11f).lrw8( + NAME([this] (offs_t offset) { + return m_pegc.regs[4 + offset]; + }), + NAME([this] (offs_t offset, u8 data) { + m_pegc.regs[4 + offset] = data; }) ); - // $4a4 alias - map(0x108, 0x109).lw16( - NAME([this] (u16 data, u16 mem_mask) { - pc9821_egc_w(0x4 / 2, data, mem_mask); - }) - ); -// map(0x10a, 0x10a) enable color comparator when reading VRAM - // $4a8 alias (mask) - // TODO: verify what happens on 32-bit accesses - map(0x10c, 0x10d).lw16( - NAME([this] (u16 data, u16 mem_mask) { - pc9821_egc_w(0x8 / 2, data, mem_mask); - }) - ); - // $4ae alias (block transfer) - map(0x110, 0x111).lw16( - NAME([this] (u16 data, u16 mem_mask) { - pc9821_egc_w(0xe / 2, data, mem_mask); - }) - ); - // $4ac alias (shift reg) - map(0x112, 0x113).lw16( - NAME([this] (u16 data, u16 mem_mask) { - pc9821_egc_w(0xc / 2, data, mem_mask); - }) - ); - // $4a6 alias (foreground color) - map(0x114, 0x114).lw8( - NAME([this] (u8 data) { - pc9821_egc_w(0x6 / 2, data, 0xff); - }) - ); - // $4aa alias (background color) - map(0x118, 0x118).lw8( - NAME([this] (u8 data) { - pc9821_egc_w(0xa / 2, data, 0xff); + map(0x120, 0x19f).lrw32( + NAME([this] (offs_t offset, u32 mem_mask) -> u32 { + u16 rop = m_pegc.regs[0x08] | (m_pegc.regs[0x09] << 8); + u32 ret = 0; + + if (rop & 0x8000) + { + // Mode 1: 1 palette x 32 pixels + int pix_idx = offset; + if (pix_idx < 32 && ACCESSING_BITS_0_7) { + ret = m_pegc.pattern[pix_idx]; + } + return ret; + } + else + { + // Mode 0: 32 pixels x 8 planes + int plane = offset; + if (plane < 8) { + for (int i = 0; i < 32; i++) { + if (BIT(m_pegc.pattern[i], plane)) + ret |= (1U << i); + } + } + return ret; + } + }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + u16 rop = m_pegc.regs[0x08] | (m_pegc.regs[0x09] << 8); + + if (rop & 0x8000) + { + // Mode 1: 1 palette x 32 pixels + int pix_idx = offset; + + if (pix_idx < 32 && ACCESSING_BITS_0_7) { + m_pegc.pattern[pix_idx] = data & 0xff; + } + } + else + { + m_pegc.pattern_mask = (mem_mask == 0xffffffff) ? 31 : 15; + // Mode 0: 32 pixels x 8 planes + int plane = offset; + if (plane < 8) { + for (int i = 0; i < 32; i++) { + if (BIT(mem_mask, i)) { + if (BIT(data, i)) m_pegc.pattern[i] |= (1 << plane); + else m_pegc.pattern[i] &= ~(1 << plane); + } + } + } + } }) ); // map(0x120, 0x19f) pattern register (image_xfer? relates to bit 15 of $108) diff --git a/src/mame/nec/pc9821.h b/src/mame/nec/pc9821.h index 250165f63eb..167603c4bfb 100644 --- a/src/mame/nec/pc9821.h +++ b/src/mame/nec/pc9821.h @@ -64,7 +64,19 @@ private: uint8_t r[0x100]{}, g[0x100]{}, b[0x100]{}; uint16_t bank[2]{}; bool packed_mode = false; - }m_pegc; + + uint8_t regs[0x100]{}; + uint8_t lastdata[64]{}; + uint8_t pattern[32]{}; + uint32_t pattern_mask = 31; + int32_t lastdatalen = 0; + uint32_t remain = 0; + + bool first_process_w = true; + bool first_process_r = true; + uint8_t shift_buffer[64]{}; + uint32_t shift_cnt = 0; + } m_pegc; void pc9821_egc_w(offs_t offset, u16 data, u16 mem_mask = ~0); void pegc_mmio_map(address_map &map); From c0fe790aa216e19748aee8c6ed466c18242b4a06 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 25 Feb 2026 20:53:07 +0100 Subject: [PATCH 046/351] sprcros2, statriv2: update notes --- src/mame/misc/sprcros2.cpp | 35 ++++++++++++++++++++++------------- src/mame/misc/statriv2.cpp | 12 +++++++----- 2 files changed, 29 insertions(+), 18 deletions(-) diff --git a/src/mame/misc/sprcros2.cpp b/src/mame/misc/sprcros2.cpp index 25307b3a54c..5a94de8fed7 100644 --- a/src/mame/misc/sprcros2.cpp +++ b/src/mame/misc/sprcros2.cpp @@ -2,19 +2,28 @@ // copyright-holders:Angelo Salese /* - Super Cross II (c) 1987 GM Shoji +Super Cross II (c) 1986 GM Shoji - driver by Angelo Salese, based on "wiped off due to not anymore - licenseable" driver by insideoutboy. +driver by Angelo Salese, based on "wiped off due to not anymore +licenseable" driver by insideoutboy. - TODO: - - scanline renderer, or change to tilemaps; - - understand irq 0 source; - - output bit 0 might be watchdog armed bit/sprite start DMA instead of - irq enable; - - weird visible area resolution, 224 or 240 x 224? Maybe it's really just - 256 x 224 and then it's supposed to show garbage/nothing on the edges? - - verify hsync/vsync, current screen raw params are guessed +TODO: +- scanline renderer, or change to tilemaps; +- understand irq 0 source; +- output bit 0 might be watchdog armed bit/sprite start DMA instead of irq + enable; +- weird visible area resolution, 224 or 240 x 224? Maybe it's really just + 256 x 224 and then it's supposed to show garbage/nothing on the edges? +- verify hsync/vsync, current screen raw params are guessed; +- verify Z80 frequency, it has slowdowns at 2.5MHz, and Z80B is rated 6MHz + +The hardware has similarities with Sanritsu's Bank Panic, PCB label is similar +as well: C2-00170-A for Bank Panic, C2-00171-D/C2-00172-D for Super Cross II. +There's also an unused SEGA logo in the gfx0 region. + +GM Shoji is not a game developer. It's probably an old Sanritsu game that was +canceled/rejected by Sega. Sanritsu's involvement is also mentioned in a +preview in the Japanese magazine GAME FREAK Vol 21. =================================== @@ -574,5 +583,5 @@ ROM_END } // anonymous namespace -GAME( 1986, sprcros2, 0, sprcros2, sprcros2, sprcros2_state, empty_init, ROT0, "GM Shoji", "Super Cross II (Japan, set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1986, sprcros2a, sprcros2, sprcros2, sprcros2, sprcros2_state, empty_init, ROT0, "GM Shoji", "Super Cross II (Japan, set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, sprcros2, 0, sprcros2, sprcros2, sprcros2_state, empty_init, ROT0, "Sanritsu / GM Shoji", "Super Cross II (Japan, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, sprcros2a, sprcros2, sprcros2, sprcros2, sprcros2_state, empty_init, ROT0, "Sanritsu / GM Shoji", "Super Cross II (Japan, set 2)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/misc/statriv2.cpp b/src/mame/misc/statriv2.cpp index 72b3a135329..1a49198ffba 100644 --- a/src/mame/misc/statriv2.cpp +++ b/src/mame/misc/statriv2.cpp @@ -62,7 +62,9 @@ U22 is a soldered in 74s287 (compatible with 82s129) PROM use is unknown -Issues: +TODO: + * all - verify CPU speed, 8085AH-1 can run at 6MHz (12MHz XTAL), but PCBs have + a standard 8085A? Most games will run too slow at 6MHz, eg. try with hangman * statusbj - very glitchy, bad video, seems to spin * hangman - keys are weird, spinner is busted * quaquiz2 - no inputs, needs NVRAM @@ -269,6 +271,7 @@ void casino_state::machine_start() save_item(NAME(m_last_coin)); } + /************************************* * * Interrupt generation @@ -300,6 +303,7 @@ INTERRUPT_GEN_MEMBER(casino_state::rst55_interrupt) device.execute().set_input_line(I8085_RST55_LINE, CLEAR_LINE); } + /************************************* * * Question address computation @@ -687,6 +691,7 @@ static INPUT_PORTS_START( bbchall ) PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED ) INPUT_PORTS_END + /************************************* * * Graphics decoding @@ -723,7 +728,6 @@ GFXDECODE_END void casino_state::statusbj(machine_config &config) { // basic machine hardware - // FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! I8085A(config, m_maincpu, 12.44_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &casino_state::program_map); m_maincpu->set_addrmap(AS_IO, &casino_state::io_map); @@ -769,7 +773,6 @@ void trivia_state::statriv2v(machine_config &config) statriv2(config); // basic machine hardware - subdevice("screen")->set_raw(12.44_MHz_XTAL / 2, 392, 0, 256, 262, 0, 256); MCFG_VIDEO_START_OVERRIDE(trivia_state, vertical) @@ -781,8 +784,7 @@ void casino_state::funcsino(machine_config &config) statusbj(config); // basic machine hardware - - m_maincpu->set_clock(12.44_MHz_XTAL / 2); // 3 MHz?? seems accurate + m_maincpu->set_clock(12.44_MHz_XTAL / 2); // 6 MHz? seems accurate } void casino_state::tripdraw(machine_config &config) From 5ae742cd00a9ce865b00e0954511a61300ddf0cd Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 25 Feb 2026 20:53:33 +0100 Subject: [PATCH 047/351] kiwako: add sanritsu to company string --- src/mame/kiwako/jongkyo.cpp | 2 +- src/mame/kiwako/koikoi.cpp | 2 +- src/mame/kiwako/mrjong.cpp | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mame/kiwako/jongkyo.cpp b/src/mame/kiwako/jongkyo.cpp index 2cf241bd234..9623a4c034b 100644 --- a/src/mame/kiwako/jongkyo.cpp +++ b/src/mame/kiwako/jongkyo.cpp @@ -592,4 +592,4 @@ void jongkyo_state::init_jongkyo() * *************************************/ -GAME( 1985, jongkyo, 0, jongkyo, jongkyo, jongkyo_state, init_jongkyo, ROT0, "Kiwako", "Jongkyo", MACHINE_IMPERFECT_COLORS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) +GAME( 1985, jongkyo, 0, jongkyo, jongkyo, jongkyo_state, init_jongkyo, ROT0, "Sanritsu / Kiwako", "Jongkyo", MACHINE_IMPERFECT_COLORS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/kiwako/koikoi.cpp b/src/mame/kiwako/koikoi.cpp index 6a2ccb958e2..b55207cd086 100644 --- a/src/mame/kiwako/koikoi.cpp +++ b/src/mame/kiwako/koikoi.cpp @@ -474,5 +474,5 @@ ROM_END * *************************************/ -GAME( 1982, koikoip2, 0, koikoi, koikoi, koikoi_state, empty_init, ROT270, "Kiwako", "Koi Koi Part 2", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) +GAME( 1982, koikoip2, 0, koikoi, koikoi, koikoi_state, empty_init, ROT270, "Sanritsu / Kiwako", "Koi Koi Part 2", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) GAME( 1982, koikoi, 0, koikoi, koikoi, koikoi_state, empty_init, ROT270, "Chubukiko / Best Data System", "Koi Koi", MACHINE_NOT_WORKING | MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/kiwako/mrjong.cpp b/src/mame/kiwako/mrjong.cpp index b494165dbbe..5e9e69808d7 100644 --- a/src/mame/kiwako/mrjong.cpp +++ b/src/mame/kiwako/mrjong.cpp @@ -449,6 +449,6 @@ ROM_END * *************************************/ -GAME( 1983, mrjong, 0, mrjong, mrjong, mrjong_state, empty_init, ROT90, "Kiwako", "Mr. Jong (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, crazyblk, mrjong, mrjong, mrjong, mrjong_state, empty_init, ROT90, "Kiwako (ECI license)", "Crazy Blocks", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, blkbustr, mrjong, mrjong, mrjong, mrjong_state, empty_init, ROT90, "Kiwako (ECI license)", "BlockBuster", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, mrjong, 0, mrjong, mrjong, mrjong_state, empty_init, ROT90, "Sanritsu / Kiwako", "Mr. Jong (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, crazyblk, mrjong, mrjong, mrjong, mrjong_state, empty_init, ROT90, "Sanritsu / Kiwako (ECI license)", "Crazy Blocks", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, blkbustr, mrjong, mrjong, mrjong, mrjong_state, empty_init, ROT90, "Sanritsu / Kiwako (ECI license)", "BlockBuster", MACHINE_SUPPORTS_SAVE ) From 29759c05a7b659346762ccecbc125a3a4062fc5e Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 25 Feb 2026 20:58:53 +0100 Subject: [PATCH 048/351] source org: merge sanritsu/kiwako folders, move sprcros2 to sanritsu folder --- src/mame/mame.lst | 32 +++++++++++------------ src/mame/{kiwako => sanritsu}/jongkyo.cpp | 0 src/mame/{kiwako => sanritsu}/koikoi.cpp | 0 src/mame/{kiwako => sanritsu}/mrjong.cpp | 0 src/mame/{misc => sanritsu}/sprcros2.cpp | 0 5 files changed, 16 insertions(+), 16 deletions(-) rename src/mame/{kiwako => sanritsu}/jongkyo.cpp (100%) rename src/mame/{kiwako => sanritsu}/koikoi.cpp (100%) rename src/mame/{kiwako => sanritsu}/mrjong.cpp (100%) rename src/mame/{misc => sanritsu}/sprcros2.cpp (100%) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index ceea72d6b8a..85d515ab549 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -24676,18 +24676,6 @@ omni2 omni4 robie -@source:kiwako/jongkyo.cpp -jongkyo - -@source:kiwako/koikoi.cpp -koikoi -koikoip2 - -@source:kiwako/mrjong.cpp -blkbustr -crazyblk -mrjong - @source:koei/pasogo.cpp pasogo @@ -33292,10 +33280,6 @@ meteors spcforc2 spcforce -@source:misc/sprcros2.cpp -sprcros2 -sprcros2a - @source:misc/sshanghai.cpp ssh2000 ssh2000a @@ -40628,6 +40612,13 @@ drmicro @source:sanritsu/jantotsu.cpp jantotsu +@source:kiwako/jongkyo.cpp +jongkyo + +@source:kiwako/koikoi.cpp +koikoi +koikoip2 + @source:sanritsu/mermaid.cpp mermaid rougien @@ -40636,9 +40627,18 @@ yachtmn @source:sanritsu/mjkjidai.cpp mjkjidai +@source:kiwako/mrjong.cpp +blkbustr +crazyblk +mrjong + @source:sanritsu/ron.cpp ron2 +@source:misc/sprcros2.cpp +sprcros2 +sprcros2a + @source:sanyo/mbc55x.cpp mbc55x diff --git a/src/mame/kiwako/jongkyo.cpp b/src/mame/sanritsu/jongkyo.cpp similarity index 100% rename from src/mame/kiwako/jongkyo.cpp rename to src/mame/sanritsu/jongkyo.cpp diff --git a/src/mame/kiwako/koikoi.cpp b/src/mame/sanritsu/koikoi.cpp similarity index 100% rename from src/mame/kiwako/koikoi.cpp rename to src/mame/sanritsu/koikoi.cpp diff --git a/src/mame/kiwako/mrjong.cpp b/src/mame/sanritsu/mrjong.cpp similarity index 100% rename from src/mame/kiwako/mrjong.cpp rename to src/mame/sanritsu/mrjong.cpp diff --git a/src/mame/misc/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp similarity index 100% rename from src/mame/misc/sprcros2.cpp rename to src/mame/sanritsu/sprcros2.cpp From bd405e9b01f5cc7d812aea44d14c4663a1b9feca Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 25 Feb 2026 23:31:39 +0100 Subject: [PATCH 049/351] mame.lst: correct folder names after my prev commit --- src/mame/mame.lst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 85d515ab549..e8bca369e43 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -40612,10 +40612,10 @@ drmicro @source:sanritsu/jantotsu.cpp jantotsu -@source:kiwako/jongkyo.cpp +@source:sanritsu/jongkyo.cpp jongkyo -@source:kiwako/koikoi.cpp +@source:sanritsu/koikoi.cpp koikoi koikoip2 @@ -40627,7 +40627,7 @@ yachtmn @source:sanritsu/mjkjidai.cpp mjkjidai -@source:kiwako/mrjong.cpp +@source:sanritsu/mrjong.cpp blkbustr crazyblk mrjong @@ -40635,7 +40635,7 @@ mrjong @source:sanritsu/ron.cpp ron2 -@source:misc/sprcros2.cpp +@source:sanritsu/sprcros2.cpp sprcros2 sprcros2a From 11a2f0605b1582e8d2a10ba2c916e58538615863 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Thu, 26 Feb 2026 22:27:50 +1100 Subject: [PATCH 050/351] cpu/sharc: Hooked up flag outputs for the recompiler, push out flag latch state when switching from input to output. --- src/devices/cpu/sharc/sharc.h | 32 +-- src/devices/cpu/sharc/sharcdrc.cpp | 331 ++++++++++++++++++++--------- src/devices/cpu/sharc/sharcops.hxx | 14 +- 3 files changed, 258 insertions(+), 119 deletions(-) diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 9c96bb7b36c..b11b47f8688 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -499,29 +499,17 @@ private: bool if_condition_always_true(int condition); uint32_t do_condition_astat_bits(int condition); - void sharc_cfunc_unimplemented(); - void sharc_cfunc_read_iop(); - void sharc_cfunc_write_iop(); - void sharc_cfunc_pcstack_overflow(); - void sharc_cfunc_pcstack_underflow(); - void sharc_cfunc_loopstack_overflow(); - void sharc_cfunc_loopstack_underflow(); - void sharc_cfunc_statusstack_overflow(); - void sharc_cfunc_statusstack_underflow(); + template static void cfunc_update_flag_out(void *param); - void sharc_cfunc_unimplemented_compute(); - void sharc_cfunc_unimplemented_shiftimm(); - void sharc_cfunc_write_snoop(); - - static void cfunc_unimplemented(void *param); - static void cfunc_pcstack_overflow(void *param); - static void cfunc_pcstack_underflow(void *param); - static void cfunc_loopstack_overflow(void *param); - static void cfunc_loopstack_underflow(void *param); - static void cfunc_statusstack_overflow(void *param); - static void cfunc_statusstack_underflow(void *param); - static void cfunc_unimplemented_compute(void *param); - static void cfunc_unimplemented_shiftimm(void *param); + [[noreturn]] static void cfunc_unimplemented(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_unimplemented_compute(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_unimplemented_shiftimm(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_pcstack_overflow(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_pcstack_underflow(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_loopstack_overflow(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_loopstack_underflow(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_statusstack_overflow(void *param) ATTR_COLD; + [[noreturn]] static void cfunc_statusstack_underflow(void *param) ATTR_COLD; }; diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index f5cafb85916..5ec296217ed 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -125,105 +125,68 @@ inline void adsp21062_device::alloc_handle(uml::code_handle *&handleptr, const c +template +void adsp21062_device::cfunc_update_flag_out(void *param) +{ + auto &sharc = *reinterpret_cast(param); + sharc.m_flag_out_cb[N](BIT(sharc.m_core->astat, FLG0_SHIFT + N)); +} + void adsp21062_device::cfunc_unimplemented(void *param) { - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_unimplemented(); -} - -void adsp21062_device::cfunc_pcstack_overflow(void *param) -{ - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_pcstack_overflow(); -} - -void adsp21062_device::cfunc_pcstack_underflow(void *param) -{ - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_pcstack_underflow(); -} - -void adsp21062_device::cfunc_loopstack_overflow(void *param) -{ - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_loopstack_overflow(); -} - -void adsp21062_device::cfunc_loopstack_underflow(void *param) -{ - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_loopstack_underflow(); -} - -void adsp21062_device::cfunc_statusstack_overflow(void *param) -{ - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_statusstack_overflow(); -} - -void adsp21062_device::cfunc_statusstack_underflow(void *param) -{ - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_statusstack_underflow(); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Unimplemented op %012X", sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64); } void adsp21062_device::cfunc_unimplemented_compute(void *param) { - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_unimplemented_compute(); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Unimplemented compute %012X", sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64); } void adsp21062_device::cfunc_unimplemented_shiftimm(void *param) { - adsp21062_device *sharc = (adsp21062_device *)param; - sharc->sharc_cfunc_unimplemented_shiftimm(); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Unimplemented shiftimm %012X", sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64); } -void adsp21062_device::sharc_cfunc_unimplemented() +void adsp21062_device::cfunc_pcstack_overflow(void *param) { - fatalerror("PC=%08X: Unimplemented op %012X\n", m_core->pc, m_core->arg64); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: PCStack overflow", sharc.tag(), sharc.m_core->pc); } -void adsp21062_device::sharc_cfunc_unimplemented_compute() +void adsp21062_device::cfunc_pcstack_underflow(void *param) { - fatalerror("PC=%08X: Unimplemented compute %012X\n", m_core->pc, m_core->arg64); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: PCStack underflow", sharc.tag(), sharc.m_core->pc); } -void adsp21062_device::sharc_cfunc_unimplemented_shiftimm() +void adsp21062_device::cfunc_loopstack_overflow(void *param) { - fatalerror("PC=%08X: Unimplemented shiftimm %012X\n", m_core->pc, m_core->arg64); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Loop Stack overflow", sharc.tag(), sharc.m_core->pc); } -void adsp21062_device::sharc_cfunc_pcstack_overflow() +void adsp21062_device::cfunc_loopstack_underflow(void *param) { - fatalerror("SHARC: PCStack overflow"); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Loop Stack underflow", sharc.tag(), sharc.m_core->pc); } -void adsp21062_device::sharc_cfunc_pcstack_underflow() +void adsp21062_device::cfunc_statusstack_overflow(void *param) { - fatalerror("SHARC: PCStack underflow"); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Status Stack overflow", sharc.tag(), sharc.m_core->pc); } -void adsp21062_device::sharc_cfunc_loopstack_overflow() +void adsp21062_device::cfunc_statusstack_underflow(void *param) { - fatalerror("SHARC: Loop Stack overflow"); + auto &sharc = *reinterpret_cast(param); + throw emu_fatalerror("%s: PC=%08X: Status Stack underflow", sharc.tag(), sharc.m_core->pc); } -void adsp21062_device::sharc_cfunc_loopstack_underflow() -{ - fatalerror("SHARC: Loop Stack underflow"); -} - -void adsp21062_device::sharc_cfunc_statusstack_overflow() -{ - fatalerror("SHARC: Status Stack overflow"); -} - -void adsp21062_device::sharc_cfunc_statusstack_underflow() -{ - fatalerror("SHARC: Status Stack underflow"); -} bool adsp21062_device::if_condition_always_true(int condition) @@ -2158,8 +2121,33 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & UML_MOV(block, mem(&m_core->irptl), imm ? data : I0); break; case 0x7a: // MODE2 - UML_MOV(block, mem(&m_core->mode2), imm ? data : I0); + { + uml::code_label const skip0 = compiler.labelnum++; + uml::code_label const skip1 = compiler.labelnum++; + uml::code_label const skip2 = compiler.labelnum++; + uml::code_label const skip3 = compiler.labelnum++; + + UML_XOR(block, I1, MODE2, 0xffffffff); + UML_MOV(block, MODE2, imm ? data : I0); + UML_AND(block, I1, I1, imm ? data : I0); + UML_TEST(block, I1, 1 << (15 + 0)); + UML_JMPc(block, COND_Z, skip0); + UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_LABEL(block, skip0); + UML_TEST(block, I1, 1 << (15 + 1)); + UML_JMPc(block, COND_Z, skip1); + UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_LABEL(block, skip1); + UML_TEST(block, I1, 1 << (15 + 2)); + UML_JMPc(block, COND_Z, skip2); + UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_LABEL(block, skip2); + UML_TEST(block, I1, 1 << (15 + 3)); + UML_JMPc(block, COND_Z, skip3); + UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_LABEL(block, skip3); break; + } case 0x7b: // MODE1 // MODE1 needs to be written delayed if (imm) @@ -2176,24 +2164,74 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & } break; case 0x7c: // ASTAT - UML_AND(block, mem(&m_core->astat), I0, FLG0 | FLG1 | FLG2 | FLG3); - UML_BFXU(block, mem(&m_core->astat_drc.cacc), I0, 24, 8); - UML_BFXU(block, ASTAT_AF, I0, AF_SHIFT, 1); - UML_BFXU(block, ASTAT_BTF, I0, BTF_SHIFT, 1); - UML_BFXU(block, ASTAT_SS, I0, SS_SHIFT, 1); - UML_BFXU(block, ASTAT_SZ, I0, SZ_SHIFT, 1); - UML_BFXU(block, ASTAT_SV, I0, SV_SHIFT, 1); - UML_BFXU(block, ASTAT_MI, I0, MI_SHIFT, 1); - UML_BFXU(block, ASTAT_MU, I0, MU_SHIFT, 1); - UML_BFXU(block, ASTAT_MV, I0, MV_SHIFT, 1); - UML_BFXU(block, ASTAT_MN, I0, MN_SHIFT, 1); - UML_BFXU(block, ASTAT_AI, I0, AI_SHIFT, 1); - UML_BFXU(block, ASTAT_AS, I0, AS_SHIFT, 1); - UML_BFXU(block, ASTAT_AC, I0, AC_SHIFT, 1); - UML_BFXU(block, ASTAT_AN, I0, AN_SHIFT, 1); - UML_BFXU(block, ASTAT_AV, I0, AV_SHIFT, 1); - UML_BFXU(block, ASTAT_AZ, I0, AZ_SHIFT, 1); + { + uml::code_label const skip0 = compiler.labelnum++; + uml::code_label const skip1 = compiler.labelnum++; + uml::code_label const skip2 = compiler.labelnum++; + uml::code_label const skip3 = compiler.labelnum++; + + if (imm) + { + UML_XOR(block, I1, mem(&m_core->astat), data); + UML_MOV(block, mem(&m_core->astat), data & (FLG0 | FLG1 | FLG2 | FLG3)); + UML_MOV(block, mem(&m_core->astat_drc.cacc), BIT(data, 24, 8)); + UML_MOV(block, ASTAT_AF, BIT(data, AF_SHIFT)); + UML_MOV(block, ASTAT_BTF, BIT(data, BTF_SHIFT)); + UML_MOV(block, ASTAT_SS, BIT(data, SS_SHIFT)); + UML_MOV(block, ASTAT_SZ, BIT(data, SZ_SHIFT)); + UML_MOV(block, ASTAT_SV, BIT(data, SV_SHIFT)); + UML_MOV(block, ASTAT_MI, BIT(data, MI_SHIFT)); + UML_MOV(block, ASTAT_MU, BIT(data, MU_SHIFT)); + UML_MOV(block, ASTAT_MV, BIT(data, MV_SHIFT)); + UML_MOV(block, ASTAT_MN, BIT(data, MN_SHIFT)); + UML_MOV(block, ASTAT_AI, BIT(data, AI_SHIFT)); + UML_MOV(block, ASTAT_AS, BIT(data, AS_SHIFT)); + UML_MOV(block, ASTAT_AC, BIT(data, AC_SHIFT)); + UML_MOV(block, ASTAT_AN, BIT(data, AN_SHIFT)); + UML_MOV(block, ASTAT_AV, BIT(data, AV_SHIFT)); + UML_MOV(block, ASTAT_AZ, BIT(data, AZ_SHIFT)); + } + else + { + UML_XOR(block, I1, I0, mem(&m_core->astat)); + UML_AND(block, mem(&m_core->astat), I0, FLG0 | FLG1 | FLG2 | FLG3); + UML_BFXU(block, mem(&m_core->astat_drc.cacc), I0, 24, 8); + UML_BFXU(block, ASTAT_AF, I0, AF_SHIFT, 1); + UML_BFXU(block, ASTAT_BTF, I0, BTF_SHIFT, 1); + UML_BFXU(block, ASTAT_SS, I0, SS_SHIFT, 1); + UML_BFXU(block, ASTAT_SZ, I0, SZ_SHIFT, 1); + UML_BFXU(block, ASTAT_SV, I0, SV_SHIFT, 1); + UML_BFXU(block, ASTAT_MI, I0, MI_SHIFT, 1); + UML_BFXU(block, ASTAT_MU, I0, MU_SHIFT, 1); + UML_BFXU(block, ASTAT_MV, I0, MV_SHIFT, 1); + UML_BFXU(block, ASTAT_MN, I0, MN_SHIFT, 1); + UML_BFXU(block, ASTAT_AI, I0, AI_SHIFT, 1); + UML_BFXU(block, ASTAT_AS, I0, AS_SHIFT, 1); + UML_BFXU(block, ASTAT_AC, I0, AC_SHIFT, 1); + UML_BFXU(block, ASTAT_AN, I0, AN_SHIFT, 1); + UML_BFXU(block, ASTAT_AV, I0, AV_SHIFT, 1); + UML_BFXU(block, ASTAT_AZ, I0, AZ_SHIFT, 1); + } + UML_SHL(block, I0, MODE2, FLG0_SHIFT - 15); + UML_AND(block, I0, I0, I1); + UML_TEST(block, I0, FLG0); + UML_JMPc(block, COND_Z, skip0); + UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_LABEL(block, skip0); + UML_TEST(block, I0, FLG1); + UML_JMPc(block, COND_Z, skip1); + UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_LABEL(block, skip1); + UML_TEST(block, I0, FLG2); + UML_JMPc(block, COND_Z, skip2); + UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_LABEL(block, skip2); + UML_TEST(block, I0, FLG3); + UML_JMPc(block, COND_Z, skip3); + UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_LABEL(block, skip3); break; + } case 0x7d: // IMASK UML_MOV(block, mem(&m_core->imask), imm ? data : I0); break; @@ -2775,7 +2813,47 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp UML_OR(block, IRPTL, IRPTL, data); break; case 0xa: // MODE2 - UML_OR(block, MODE2, MODE2, data); + if (BIT(data, 15, 4)) + { + UML_MOV(block, I0, MODE2); + UML_OR(block, MODE2, I0, data); + if (BIT(data, 15 + 0)) + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, 1 << (15 + 0)); + UML_JMPc(block, COND_NZ, skip); + UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_LABEL(block, skip); + } + if (BIT(data, 15 + 1)) + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, 1 << (15 + 1)); + UML_JMPc(block, COND_NZ, skip); + UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_LABEL(block, skip); + } + if (BIT(data, 15 + 2)) + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, 1 << (15 + 2)); + UML_JMPc(block, COND_NZ, skip); + UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_LABEL(block, skip); + } + if (BIT(data, 15 + 3)) + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, 1 << (15 + 3)); + UML_JMPc(block, COND_NZ, skip); + UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_LABEL(block, skip); + } + } + else + { + UML_OR(block, MODE2, MODE2, data); + } break; case 0xb: // MODE1 compiler.mode1_delay.counter = 2; @@ -2814,14 +2892,46 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp UML_MOV(block, ASTAT_SS, 1); if (data & ASTAT_FLAGS::BTF) UML_MOV(block, ASTAT_BTF, 1); + if (data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)) + { + UML_MOV(block, I0, mem(&m_core->astat)); + UML_ROLAND(block, I1, MODE2, FLG0_SHIFT - 15, data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); + UML_OR(block, mem(&m_core->astat), I0, data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); + UML_XOR(block, I0, I0, 0xffffffff); + UML_AND(block, I0, I0, I1); + } if (data & ASTAT_FLAGS::FLG0) - UML_MOV(block, FLAG0, 1); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG0); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_LABEL(block, skip); + } if (data & ASTAT_FLAGS::FLG1) - UML_MOV(block, FLAG1, 1); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG1); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_LABEL(block, skip); + } if (data & ASTAT_FLAGS::FLG2) - UML_MOV(block, FLAG2, 1); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG2); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_LABEL(block, skip); + } if (data & ASTAT_FLAGS::FLG3) - UML_MOV(block, FLAG3, 1); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG3); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_LABEL(block, skip); + } if (data & 0xff000000) { UML_OR(block, mem(&m_core->astat_drc.cacc), mem(&m_core->astat_drc.cacc), data >> 24); @@ -2895,14 +3005,45 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp UML_MOV(block, ASTAT_SS, 0); if (data & ASTAT_FLAGS::BTF) UML_MOV(block, ASTAT_BTF, 0); + if (data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)) + { + UML_MOV(block, I0, mem(&m_core->astat)); + UML_ROLAND(block, I1, MODE2, FLG0_SHIFT - 15, data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); + UML_AND(block, mem(&m_core->astat), I0, ~data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); + UML_AND(block, I0, I0, I1); + } if (data & ASTAT_FLAGS::FLG0) - UML_MOV(block, FLAG0, 0); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG0); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_LABEL(block, skip); + } if (data & ASTAT_FLAGS::FLG1) - UML_MOV(block, FLAG1, 0); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG1); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_LABEL(block, skip); + } if (data & ASTAT_FLAGS::FLG2) - UML_MOV(block, FLAG2, 0); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG2); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_LABEL(block, skip); + } if (data & ASTAT_FLAGS::FLG3) - UML_MOV(block, FLAG3, 0); + { + uml::code_label const skip = compiler.labelnum++; + UML_TEST(block, I0, ASTAT_FLAGS::FLG3); + UML_JMPc(block, COND_Z, skip); + UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_LABEL(block, skip); + } if (data & 0xff000000) { UML_AND(block, mem(&m_core->astat_drc.cacc), mem(&m_core->astat_drc.cacc), ~(data >> 24)); diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index b1bcced67c7..648ffdccefa 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -441,7 +441,17 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) case 0x1: m_core->ustat2 = data; break; /* USTAT2 */ case 0x9: m_core->irptl = data; break; /* IRPTL */ - case 0xa: m_core->mode2 = data; break; /* MODE2 */ + case 0xa: /* MODE2 */ + { + u32 const set = ~m_core->mode2 & data; + m_core->mode2 = data; + for (unsigned i = 0; i < 4; i++) + { + if (BIT(set, 15 + i)) + m_flag_out_cb[i](BIT(m_core->astat, FLG0_SHIFT + i)); + } + break; + } case 0xb: /* MODE1 */ add_systemreg_write_latency_effect(reg, data, m_core->mode1); @@ -450,7 +460,7 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) case 0xc: /* ASTAT */ { - u8 const flags = (m_core->astat ^ data) & (BIT(m_core->mode2, 15, 4) << FLG0_SHIFT); + u32 const flags = (m_core->astat ^ data) & (BIT(m_core->mode2, 15, 4) << FLG0_SHIFT); m_core->astat = data; for (unsigned i = 0; i < 4; i++) { From 76a0dde560bd73cf59889d48dde7ce23fe1a0762 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 27 Feb 2026 03:02:32 +1100 Subject: [PATCH 051/351] emu/diimage.cpp: Notify on changing preset images. ui/filemngr.cpp, ui/prscntrl.cpp: Fixed some cosmetic issues. --- src/emu/diimage.cpp | 18 ++++++++---- src/frontend/mame/ui/filemngr.cpp | 47 ++++++++++++++++--------------- src/frontend/mame/ui/imgcntrl.h | 2 -- src/frontend/mame/ui/prscntrl.cpp | 9 ++++-- 4 files changed, 43 insertions(+), 33 deletions(-) diff --git a/src/emu/diimage.cpp b/src/emu/diimage.cpp index 59d1523a6b1..16cc0b0800a 100644 --- a/src/emu/diimage.cpp +++ b/src/emu/diimage.cpp @@ -226,18 +226,27 @@ chd_file *device_image_interface::current_preset_image_chd() const void device_image_interface::switch_preset_image(int id) { - for (unsigned int i = 0; i != m_preset_images.size(); i++) + for (unsigned i = 0; i != m_preset_images.size(); i++) + { if (m_preset_images[i]) { - if(!id) + if (!id) { - call_unload(); + if (is_loaded() || loaded_through_softlist()) + { + call_unload(); + clear(); + m_media_change_notifier(media_change_event::UNLOADED); + } m_current_region = i; - call_load(); + auto const err = call_load(); + if (!err.first) + m_media_change_notifier(media_change_event::LOADED); break; } id--; } + } return; } @@ -1095,7 +1104,6 @@ void device_image_interface::unload() { if (is_loaded() || loaded_through_softlist()) { - m_sequence_counter++; call_unload(); clear(); m_media_change_notifier(media_change_event::UNLOADED); diff --git a/src/frontend/mame/ui/filemngr.cpp b/src/frontend/mame/ui/filemngr.cpp index abbe2e29a8b..2d6f87afba5 100644 --- a/src/frontend/mame/ui/filemngr.cpp +++ b/src/frontend/mame/ui/filemngr.cpp @@ -115,32 +115,24 @@ void menu_file_manager::fill_image_line(device_image_interface &img, std::string // get the image type/id instance = string_format("%s (%s)", img.instance_name(), img.brief_instance_name()); - // get the base name - if (img.basename()) + if (!img.basename()) { - filename.assign(img.basename()); - - // if the image has been loaded through softlist, also show the loaded part - if (img.loaded_through_softlist()) - { - const software_part *tmp = img.part_entry(); - if (!tmp->name().empty()) - { - filename.append(" ("); - filename.append(tmp->name()); - // also check if this part has a specific part_id (e.g. "Map Disc", "Bonus Disc", etc.), and in case display it - if (img.get_feature("part_id") != nullptr) - { - filename.append(": "); - filename.append(img.get_feature("part_id")); - } - filename.append(")"); - } - } + filename = "---"; + } + else if (!img.loaded_through_softlist()) + { + filename = img.basename(); } else { - filename.assign("---"); + // if the image has been loaded through softlist, also show the loaded part + // also check if this part has a specific part_id (e.g. "Map Disc", "Bonus Disc", etc.) + software_part const *const part = img.part_entry(); + auto const partid = img.get_feature("part_id"); + if (partid) + filename = string_format(_("%1$s (%2$s: %3$s)"), img.basename(), part->name(), partid); + else + filename = string_format(_("%1$s (%2$s)"), img.basename(), part->name()); } } @@ -232,7 +224,7 @@ bool menu_file_manager::handle(event const *ev) if (ev) { - if ((uintptr_t)ev->itemref == 1) + if (uintptr_t(ev->itemref) == 1) { if (m_selected_device) { @@ -268,6 +260,15 @@ bool menu_file_manager::handle(event const *ev) } } } + else + { + auto const selected = get_selection_ref(); + if (selected && (uintptr_t(selected) != 1) && (selected != m_selected_device)) + { + m_selected_device = (device_image_interface *)selected; + result = true; + } + } return result; } diff --git a/src/frontend/mame/ui/imgcntrl.h b/src/frontend/mame/ui/imgcntrl.h index c41f6a25993..44d9b66b8e1 100644 --- a/src/frontend/mame/ui/imgcntrl.h +++ b/src/frontend/mame/ui/imgcntrl.h @@ -19,8 +19,6 @@ namespace ui { -// ======================> menu_control_device_image - class menu_control_device_image : public menu { public: diff --git a/src/frontend/mame/ui/prscntrl.cpp b/src/frontend/mame/ui/prscntrl.cpp index 1d5d2fb4f81..39d3cd3fab4 100644 --- a/src/frontend/mame/ui/prscntrl.cpp +++ b/src/frontend/mame/ui/prscntrl.cpp @@ -27,6 +27,7 @@ menu_control_device_preset::menu_control_device_preset(mame_ui_manager &mui, ren : menu(mui, container) , m_image(image) { + set_heading(string_format(_("[root%1$s] %2$s"), image.device().tag(), image.instance_name())); } @@ -46,8 +47,9 @@ menu_control_device_preset::~menu_control_device_preset() void menu_control_device_preset::populate() { auto presets = m_image.preset_images_list(); - for(uintptr_t i = 0; i != uintptr_t(presets.size()); i++) + for (uintptr_t i = 0; i != uintptr_t(presets.size()); i++) item_append(presets[i], 0, reinterpret_cast(i)); + item_append(menu_item_type::SEPARATOR); set_selection(reinterpret_cast(uintptr_t(m_image.current_preset_image_id()))); } @@ -58,8 +60,9 @@ void menu_control_device_preset::populate() bool menu_control_device_preset::handle(event const *ev) { - if (ev && (ev->iptkey == IPT_UI_SELECT)) { - int id = reinterpret_cast(ev->itemref); + if (ev && (ev->iptkey == IPT_UI_SELECT)) + { + int const id = reinterpret_cast(ev->itemref); m_image.switch_preset_image(id); stack_pop(); } From b569c0562c5d50dc4a2a1ddfc866e9f51fd7c07e Mon Sep 17 00:00:00 2001 From: cam900 Date: Fri, 27 Feb 2026 01:37:40 +0900 Subject: [PATCH 052/351] metro/metro.cpp: Improved metadata: (#15023) * Added region-specific titles to descriptions, and explanatory comments. * Added assumed regions to descriptions based on game UI language. * Fixed toride2gg set title (non-adauchi gaiden set unlike previously described metadata). * Add distributor metadata for lastfortk set. --- src/mame/metro/metro.cpp | 121 ++++++++++++++++++++------------------- 1 file changed, 63 insertions(+), 58 deletions(-) diff --git a/src/mame/metro/metro.cpp b/src/mame/metro/metro.cpp index 161a91de70a..eedd8a71028 100644 --- a/src/mame/metro/metro.cpp +++ b/src/mame/metro/metro.cpp @@ -75,7 +75,7 @@ To Do: causes scrolling glitches in some games. Test cases Mouse Go Go title screen, GunMaster title screen. Changing it can cause excessive slowdown in said games however. -- karatour, ladykill, 3kokushi: understand what the irq source 5 is really tied to. +- karatour, ladykill, 3kokushi: understand what the IRQ source 5 is really tied to. All these games also have a vblank delay check outside irq routine, cfr. PC=1322 in karatour; - vmetal: ES8712 actually controls a M6585 and an unknown logic selector chip. @@ -84,11 +84,11 @@ To Do: Notes: -- To enter service mode in ladykill, 3kokushi: toggle the dip switch and reset +- To enter service mode in ladykill, 3kokushi: toggle the DIP switch and reset keeping start 2 pressed. - Sprite zoom in Mouja at the end of a match looks wrong, but it's been verified to be the same on the original board -- vmetal: has Sega and Taito logos in the roms ?! +- vmetal: has Sega and Taito logos in the ROMs?! driver modified by Hau ***************************************************************************/ @@ -96,11 +96,11 @@ driver modified by Hau #include "emu.h" #include "metro.h" -#include "cpu/z80/z80.h" +#include "cpu/h8/h83006.h" #include "cpu/m68000/m68000.h" #include "cpu/upd7810/upd7810.h" -#include "cpu/h8/h83006.h" #include "cpu/z8/z8.h" +#include "cpu/z80/z80.h" #include "machine/watchdog.h" #include "sound/msm5205.h" #include "sound/ymopl.h" @@ -160,12 +160,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(metro_state::bangball_scanline) int const scanline = param; // vblank irq - if(scanline == 224) + if (scanline == 224) { m_vdp2->set_irq(4); // ??? m_vdp2->screen_eof(ASSERT_LINE); } - else if(scanline < 224 && (m_vdp2->irq_enable() & 2) == 0) + else if (scanline < 224 && (m_vdp2->irq_enable() & 2) == 0) { // pretty likely hblank irq (pressing a button when clearing a stage) m_vdp2->set_irq(1); @@ -269,7 +269,7 @@ void metro_upd7810_state::soundstatus_w(u8 data) m_soundstatus = data & 0x01; } -template +template void metro_upd7810_state::upd7810_rombank_w(u8 data) { m_audiobank->set_entry((data >> 4) & Mask); @@ -404,7 +404,7 @@ void metro_state::coin_lockout_1word_w(u8 data) machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); - if (data & ~3) logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", m_maincpu->pc(), data); + if (data & ~3) logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", m_maincpu->pc(), data); } // value written doesn't matter, also each counted coin gets reported after one full second. @@ -414,7 +414,7 @@ void metro_state::coin_lockout_4words_w(offs_t offset, u16 data) machine().bookkeeping().coin_counter_w((offset >> 1) & 1, offset & 1); // machine().bookkeeping().coin_lockout_w((offset >> 1) & 1, offset & 1); - if (data & ~1) logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", m_maincpu->pc(), data); + if (data & ~1) logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", m_maincpu->pc(), data); } /*************************************************************************** @@ -434,9 +434,9 @@ void metro_state::coin_lockout_4words_w(offs_t offset, u16 data) void metro_upd7810_state::upd7810_map(address_map &map) { - map(0x0000, 0x3fff).rom(); // External ROM - map(0x4000, 0x7fff).bankr(m_audiobank); // External ROM (Banked) - map(0x8000, 0x87ff).ram(); // External RAM + map(0x0000, 0x3fff).rom(); // External ROM + map(0x4000, 0x7fff).bankr(m_audiobank); // External ROM (Banked) + map(0x8000, 0x87ff).ram(); // External RAM } /*****************/ @@ -547,16 +547,16 @@ void metro_state::batlbubl_map(address_map &map) void metro_state::msgogo_map(address_map &map) { - map(0x000000, 0x07ffff).rom(); // ROM + map(0x000000, 0x07ffff).rom(); // ROM map(0x100000, 0x17ffff).m(m_vdp2, FUNC(imagetek_i4220_device::v2_map)); - map(0x200000, 0x200001).portr("COINS"); // Inputs - map(0x200002, 0x200003).portr("JOYS"); // - map(0x200006, 0x200007).nopr(); // - map(0x200002, 0x200009).w(FUNC(metro_state::coin_lockout_4words_w)); // Coin Lockout - map(0x300000, 0x31ffff).r(FUNC(metro_state::balcube_dsw_r)); // 3 x DSW - map(0x400001, 0x400001).r("ymf", FUNC(ymf278b_device::read)); // Sound + map(0x200000, 0x200001).portr("COINS"); // Inputs + map(0x200002, 0x200003).portr("JOYS"); // + map(0x200006, 0x200007).nopr(); // + map(0x200002, 0x200009).w(FUNC(metro_state::coin_lockout_4words_w)); // Coin Lockout + map(0x300000, 0x31ffff).r(FUNC(metro_state::balcube_dsw_r)); // 3 x DSW + map(0x400001, 0x400001).r("ymf", FUNC(ymf278b_device::read)); // Sound map(0x400000, 0x40000b).w("ymf", FUNC(ymf278b_device::write)).umask16(0x00ff); // - map(0xf00000, 0xf0ffff).ram().mirror(0x0f0000); // RAM (mirrored) + map(0xf00000, 0xf0ffff).ram().mirror(0x0f0000); // RAM (mirrored) } /*************************************************************************** @@ -565,16 +565,16 @@ void metro_state::msgogo_map(address_map &map) void metro_upd7810_state::daitorid_map(address_map &map) { - map(0x000000, 0x03ffff).rom(); // ROM + map(0x000000, 0x03ffff).rom(); // ROM map(0x400000, 0x47ffff).m(m_vdp2, FUNC(imagetek_i4220_device::v2_map)); - map(0x4788a9, 0x4788a9).w(FUNC(metro_upd7810_state::sound_data_w)); // To Sound CPU - map(0x800000, 0x80ffff).ram().mirror(0x0f0000); // RAM (mirrored) + map(0x4788a9, 0x4788a9).w(FUNC(metro_upd7810_state::sound_data_w)); // To Sound CPU + map(0x800000, 0x80ffff).ram().mirror(0x0f0000); // RAM (mirrored) map(0xc00000, 0xc00001).portr("IN0"); - map(0xc00001, 0xc00001).w(FUNC(metro_upd7810_state::soundstatus_w)); // To Sound CPU - map(0xc00002, 0xc00003).portr("IN1"); // - map(0xc00004, 0xc00005).portr("DSW0"); // - map(0xc00006, 0xc00007).portr("IN2"); // - map(0xc00002, 0xc00009).w(FUNC(metro_upd7810_state::coin_lockout_4words_w)); // Coin Lockout + map(0xc00001, 0xc00001).w(FUNC(metro_upd7810_state::soundstatus_w)); // To Sound CPU + map(0xc00002, 0xc00003).portr("IN1"); // + map(0xc00004, 0xc00005).portr("DSW0"); // + map(0xc00006, 0xc00007).portr("IN2"); // + map(0xc00002, 0xc00009).w(FUNC(metro_upd7810_state::coin_lockout_4words_w)); // Coin Lockout } @@ -584,16 +584,16 @@ void metro_upd7810_state::daitorid_map(address_map &map) void metro_upd7810_state::dharma_map(address_map &map) { - map(0x000000, 0x03ffff).rom(); // ROM - map(0x400000, 0x40ffff).ram().mirror(0x0f0000); // RAM (mirrored) + map(0x000000, 0x03ffff).rom(); // ROM + map(0x400000, 0x40ffff).ram().mirror(0x0f0000); // RAM (mirrored) map(0x800000, 0x87ffff).m(m_vdp2, FUNC(imagetek_i4220_device::v2_map)); - map(0x8788a9, 0x8788a9).w(FUNC(metro_upd7810_state::sound_data_w)); // To Sound CPU + map(0x8788a9, 0x8788a9).w(FUNC(metro_upd7810_state::sound_data_w)); // To Sound CPU map(0xc00000, 0xc00001).portr("IN0"); - map(0xc00001, 0xc00001).w(FUNC(metro_upd7810_state::soundstatus_w)); // To Sound CPU - map(0xc00002, 0xc00003).portr("IN1"); // - map(0xc00004, 0xc00005).portr("DSW0"); // - map(0xc00006, 0xc00007).portr("IN2"); // - map(0xc00002, 0xc00009).w(FUNC(metro_upd7810_state::coin_lockout_4words_w)); // Coin Lockout + map(0xc00001, 0xc00001).w(FUNC(metro_upd7810_state::soundstatus_w)); // To Sound CPU + map(0xc00002, 0xc00003).portr("IN1"); // + map(0xc00004, 0xc00005).portr("DSW0"); // + map(0xc00006, 0xc00007).portr("IN2"); // + map(0xc00002, 0xc00009).w(FUNC(metro_upd7810_state::coin_lockout_4words_w)); // Coin Lockout } @@ -1063,7 +1063,7 @@ void vmetal_state::vmetal_control_w(u8 data) /* Lower nibble is the coin control bits shown in service mode, but in game mode they're different */ machine().bookkeeping().coin_counter_w(0, BIT(data, 2)); - machine().bookkeeping().coin_counter_w(1, BIT(data, 3)); // 2nd coin schute activates coin 0 counter in game mode?? + machine().bookkeeping().coin_counter_w(1, BIT(data, 3)); // 2nd coin chute activates coin 0 counter in game mode?? // machine().bookkeeping().coin_lockout_w(0, BIT(data, 0)); // always on in game mode?? machine().bookkeeping().coin_lockout_w(1, BIT(data, 1)); // never activated in game mode?? @@ -1934,10 +1934,10 @@ static INPUT_PORTS_START( lastfort ) COINS PORT_START("IN1") /*$c00006*/ - JOY_LSB(1, BUTTON1, UNKNOWN, UNKNOWN, UNKNOWN) // BUTTON2 and BUTTON3 in "test mode" only*/ + JOY_LSB(1, BUTTON1, UNKNOWN, UNKNOWN, UNKNOWN) // BUTTON2 and BUTTON3 in "test mode" only PORT_START("IN2") /*$c00008*/ - JOY_LSB(2, BUTTON1, UNKNOWN, UNKNOWN, UNKNOWN) /*BUTTON2 and BUTTON3 in "test mode" only*/ + JOY_LSB(2, BUTTON1, UNKNOWN, UNKNOWN, UNKNOWN) // BUTTON2 and BUTTON3 in "test mode" only PORT_START("DSW0") /*$c0000a*/ COINAGE_SERVICE_LOC(SW1) @@ -4717,7 +4717,7 @@ Video: Imagetek I4220 071 9430WK440 SW3 - Not Populated -ms_ja-1.1 tms27c240 <-- Is there an undumped MS_WA1 World rom?? +ms_ja-1.1 tms27c240 <-- Is there an undumped MS_WA1 World ROM?? ms_wa-2.2 tms27c240 ms_wa-3.3 tms27c240 ms_wa-4.4 tms27c240 @@ -5487,43 +5487,48 @@ GAME( 1992, pangpomsn, pangpoms, pangpoms, pangpoms, metro_upd7810_state, emp GAME( 1992, skyalert, 0, skyalert, skyalert, metro_upd7810_state, empty_init, ROT270, "Metro", "Sky Alert", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ladykill, 0, karatour, ladykill, metro_upd7810_state, init_karatour, ROT90, "Yanyaka (Mitchell license)", "Lady Killer", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1993, moegonta, ladykill, karatour, moegonta, metro_upd7810_state, init_karatour, ROT90, "Yanyaka", "Moeyo Gonta!! (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +// Japanese subtitle in Japanese set, English otherwise; Kanji title is the same regardless region GAME( 1994, lastfort, 0, lastfort, lastfort, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (Japan, VG420 PCB)", MACHINE_SUPPORTS_SAVE ) // VG420 PCB GAME( 1994, lastforte, lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (China, Rev C)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, lastfortea,lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (China, Rev A)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, lastfortk, lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (Korea)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, lastfortk, lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro (Grand Computer license)", "Last Fortress - Toride (Korea)", MACHINE_SUPPORTS_SAVE ) // distributor name is korean (그랜드컴퓨터) GAME( 1994, lastfortj, lastfort, lastforg, ladykill, metro_upd7810_state, init_karatour, ROT0, "Metro", "Last Fortress - Toride (Japan, VG460 PCB)", MACHINE_SUPPORTS_SAVE ) // VG460-(A) PCB -GAME( 1994, lastfortg, lastfort, lastforg, ladykill, metro_upd7810_state, init_karatour, ROT0, "Metro", "Last Fortress - Toride (Germany)", MACHINE_SUPPORTS_SAVE ) // VG460-(A) PCB +// Germany set has Mah-Jong subtitle +GAME( 1994, lastfortg, lastfort, lastforg, ladykill, metro_upd7810_state, init_karatour, ROT0, "Metro", "Last Fortress - Toride: Mah-jong (Germany)", MACHINE_SUPPORTS_SAVE ) // VG460-(A) PCB // MTR5260 / MTR527 -GAME( 1993, poitto, 0, poitto, poitto, metro_upd7810_state, empty_init, ROT0, "Metro / Able Corp.", "Poitto! (revision D)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, poitto, 0, poitto, poitto, metro_upd7810_state, empty_init, ROT0, "Metro / Able Corp.", "Poitto! (Japan revision D)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, poittoc, poitto, poitto, poitto, metro_upd7810_state, empty_init, ROT0, "Metro / Able Corp.", "Poitto! (revision C)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // missing 1 program ROM +// All set except Korean region has "DHARMA" subtitle GAME( 1994, dharma, 0, dharma, dharma, metro_upd7810_state, init_dharmak, ROT0, "Metro", "Dharma Doujou", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dharmag, dharma, dharma, dharma, metro_upd7810_state, init_dharmak, ROT0, "Metro", "Dharma Doujou (Germany)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dharmaj, dharma, dharma, dharma, metro_upd7810_state, empty_init, ROT0, "Metro", "Dharma Doujou (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, dharmak, dharma, dharma, dharma, metro_upd7810_state, init_dharmak, ROT0, "Metro", "Dharma Doujou (Korea)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, toride2g, 0, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II Adauchi Gaiden", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1994, toride2gg, toride2g, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II Adauchi Gaiden (German)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1994, dharmak, dharma, dharma, dharma, metro_upd7810_state, init_dharmak, ROT0, "Metro", "Dharma Dojang - Mangchi Man (Korea)", MACHINE_SUPPORTS_SAVE ) // 다루마 도장: 망치맨 +// Toride II Adauchi Gaiden set: Same title screen regardless region +GAME( 1994, toride2g, 0, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II Adauchi Gaiden (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1994, toride2gk, toride2g, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II Bok Su Oi Jeon Adauchi Gaiden (Korea)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +// Toride II set (non - Adauchi Gaiden revision) +GAME( 1994, toride2gg, toride2g, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II (German)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1994, toride2j, toride2g, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II (Japan, revision K)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1994, toride2ji, toride2g, toride2g, toride2g, metro_upd7810_state, empty_init, ROT0, "Metro", "Toride II (Japan, revision I)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1994, gunmast, 0, pururun, gunmast, metro_upd7810_state, empty_init, ROT0, "Metro", "Gun Master", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, daitorid, 0, daitorid, daitorid, metro_upd7810_state, empty_init, ROT0, "Metro", "Daitoride", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1995, pururun, 0, pururun, pururun, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Pururun (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, pururuna, pururun, pururun, pururun, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Pururun (set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, puzzli, 0, puzzli, puzzli, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Puzzli (revision B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1995, puzzlia, puzzli, puzzlia, puzzli, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Puzzli (revision A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, daitorid, 0, daitorid, daitorid, metro_upd7810_state, empty_init, ROT0, "Metro", "Daitoride (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, pururun, 0, pururun, pururun, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Pururun (Japan set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, pururuna, pururun, pururun, pururun, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Pururun (Japan set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, puzzli, 0, puzzli, puzzli, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Puzzli (Japan revision B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1995, puzzlia, puzzli, puzzlia, puzzli, metro_upd7810_state, empty_init, ROT0, "Metro / Banpresto", "Puzzli (Japan revision A)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1996, 3kokushi, 0, sankokushi,sankokushi, metro_upd7810_state, init_karatour, ROT0, "Mitchell", "Sankokushi (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // ? with additional gfx data scramble (probably MTR5260 based) -GAME( 1995, msgogo, 0, msgogo, msgogo, metro_state, init_balcube, ROT0, "Metro", "Mouse Shooter GoGo", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1996, daitorida, daitorid, daitoa, daitoa, metro_state, init_balcube, ROT0, "Metro", "Daitoride (YMF278B version)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1996, balcube, 0, balcube, balcube, metro_state, init_balcube, ROT0, "Metro", "Bal Cube", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, bangball, 0, bangball, bangball, metro_state, init_balcube, ROT0, "Banpresto / Kunihiko Tashiro+Goodhouse", "Bang Bang Ball (v1.05)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, msgogo, 0, msgogo, msgogo, metro_state, init_balcube, ROT0, "Metro", "Mouse Shooter GoGo", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // Either English or Japanese +GAME( 1996, daitorida, daitorid, daitoa, daitoa, metro_state, init_balcube, ROT0, "Metro", "Daitoride (Japan, YMF278B version)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1996, balcube, 0, balcube, balcube, metro_state, init_balcube, ROT0, "Metro", "Bal Cube (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, bangball, 0, bangball, bangball, metro_state, init_balcube, ROT0, "Banpresto / Kunihiko Tashiro+Goodhouse", "Bang Bang Ball (v1.05)", MACHINE_SUPPORTS_SAVE ) // Either English or Japanese GAME( 1999, batlbubl, bangball, batlbubl, batlbubl, metro_state, init_balcube, ROT0, "Banpresto (Limenko license?)", "Battle Bubble (v2.00)", MACHINE_SUPPORTS_SAVE ) // or bootleg? // VG330 / VG340 / VG410 -GAME( 1995, dokyusei, 0, dokyusei, dokyusei, gakusai_state, empty_init, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, dokyusp, 0, dokyusp, gakusai, gakusai_state, empty_init, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei Special", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, dokyusei, 0, dokyusei, dokyusei, gakusai_state, empty_init, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, dokyusp, 0, dokyusp, gakusai, gakusai_state, empty_init, ROT0, "Make Software / Elf / Media Trading", "Mahjong Doukyuusei Special (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, mouja, 0, mouja, mouja, mouja_state, empty_init, ROT0, "Etona", "Mouja (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, gakusai, 0, gakusai, gakusai, gakusai_state, empty_init, ROT0, "MakeSoft", "Mahjong Gakuensai (Japan, set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1997, gakusaia, gakusai, gakusai, gakusai, gakusai_state, empty_init, ROT0, "MakeSoft", "Mahjong Gakuensai (Japan, set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) From 5b674daaf35d84509194fc9065cdc1261f64a8d7 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 27 Feb 2026 03:52:17 +1100 Subject: [PATCH 053/351] metro/metro.cpp: Use the standard mahjong matrix. --- src/mame/metro/metro.cpp | 81 +++++++++------------------------------- 1 file changed, 17 insertions(+), 64 deletions(-) diff --git a/src/mame/metro/metro.cpp b/src/mame/metro/metro.cpp index eedd8a71028..7fdf5c23f66 100644 --- a/src/mame/metro/metro.cpp +++ b/src/mame/metro/metro.cpp @@ -96,6 +96,8 @@ driver modified by Hau #include "emu.h" #include "metro.h" +#include "mahjong.h" + #include "cpu/h8/h83006.h" #include "cpu/m68000/m68000.h" #include "cpu/upd7810/upd7810.h" @@ -702,14 +704,14 @@ void gakusai_state::oki_bank_lo_w(u8 data) u16 gakusai_state::input_r() { u16 const input_sel = *m_input_sel; - u16 result = 0xffff; + u16 result = 0x003f; // Bit 0 ?? if (!BIT(input_sel, 1)) result &= m_io_key[0]->read(); if (!BIT(input_sel, 2)) result &= m_io_key[1]->read(); if (!BIT(input_sel, 3)) result &= m_io_key[2]->read(); if (!BIT(input_sel, 4)) result &= m_io_key[3]->read(); if (!BIT(input_sel, 5)) result &= m_io_key[4]->read(); - return result; + return (result << 1) | 0xff81; } u8 gakusai_state::gakusai_eeprom_r() @@ -1994,56 +1996,13 @@ INPUT_PORTS_END /*************************************************************************** - Mahjong Doukyuusei + Mahjong Gakuensai 1 & 2 ***************************************************************************/ -static INPUT_PORTS_START( mj_panel ) - PORT_START("KEY0") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_A ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_E ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_I ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_M ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) +// Same as dokyusei, without the DSWs (these games have an EEPROM) - PORT_START("KEY1") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_B ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_F ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_J ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_N ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("KEY2") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_C ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_G ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_K ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("KEY3") - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_D ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_H ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_L ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("KEY4") - PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) +static INPUT_PORTS_START( gakusai ) + PORT_INCLUDE( mahjong_matrix_1p ) PORT_START("IN0") PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -2057,8 +2016,15 @@ static INPUT_PORTS_START( mj_panel ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END + +/*************************************************************************** + Mahjong Doukyuusei +***************************************************************************/ + +// Same as gakusai, with DSWs (these games have no EEPROM) + static INPUT_PORTS_START( dokyusei ) - PORT_INCLUDE( mj_panel ) + PORT_INCLUDE( gakusai ) PORT_START("DSW0") // $478884.w PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2") @@ -2111,19 +2077,6 @@ static INPUT_PORTS_START( dokyusei ) INPUT_PORTS_END -/*************************************************************************** - Mahjong Gakuensai 1 & 2 -***************************************************************************/ - -// Same as dokyusei, without the DSWs (these games have an eeprom) - -static INPUT_PORTS_START( gakusai ) - - PORT_INCLUDE( mj_panel ) - -INPUT_PORTS_END - - /*************************************************************************** Mouja ***************************************************************************/ @@ -5491,7 +5444,7 @@ GAME( 1993, moegonta, ladykill, karatour, moegonta, metro_upd7810_state, ini GAME( 1994, lastfort, 0, lastfort, lastfort, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (Japan, VG420 PCB)", MACHINE_SUPPORTS_SAVE ) // VG420 PCB GAME( 1994, lastforte, lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (China, Rev C)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, lastfortea,lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro", "Last Fortress - Toride (China, Rev A)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, lastfortk, lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro (Grand Computer license)", "Last Fortress - Toride (Korea)", MACHINE_SUPPORTS_SAVE ) // distributor name is korean (그랜드컴퓨터) +GAME( 1994, lastfortk, lastfort, lastfort, lastfero, metro_upd7810_state, empty_init, ROT0, "Metro (Grand Computer license)", "Last Fortress - Toride (Korea)", MACHINE_SUPPORTS_SAVE ) // distributor name is Korean (그랜드컴퓨터) GAME( 1994, lastfortj, lastfort, lastforg, ladykill, metro_upd7810_state, init_karatour, ROT0, "Metro", "Last Fortress - Toride (Japan, VG460 PCB)", MACHINE_SUPPORTS_SAVE ) // VG460-(A) PCB // Germany set has Mah-Jong subtitle GAME( 1994, lastfortg, lastfort, lastforg, ladykill, metro_upd7810_state, init_karatour, ROT0, "Metro", "Last Fortress - Toride: Mah-jong (Germany)", MACHINE_SUPPORTS_SAVE ) // VG460-(A) PCB From 0327ef2faf809d8ce8bd790d8659c832881def12 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 26 Feb 2026 18:28:22 +0100 Subject: [PATCH 054/351] mario: walk sound trigger is from WR pin instead of D0 --- src/mame/nintendo/mario.cpp | 110 +++++++++++++++++------------------- 1 file changed, 51 insertions(+), 59 deletions(-) diff --git a/src/mame/nintendo/mario.cpp b/src/mame/nintendo/mario.cpp index 4f332fa4fc2..d0d28a9aef3 100644 --- a/src/mame/nintendo/mario.cpp +++ b/src/mame/nintendo/mario.cpp @@ -146,9 +146,7 @@ public: m_palette(*this, "palette"), m_z80dma(*this, "z80dma"), m_soundlatch(*this, "soundlatch%u", 0), - m_audio_snd0(*this, "snd_nl:snd0"), - m_audio_snd1(*this, "snd_nl:snd1"), - m_audio_snd7(*this, "snd_nl:snd7"), + m_audio_snd(*this, { { "snd_nl:snd0", "snd_nl:snd1", "snd_nl:snd7" } }), m_audio_dac(*this, "snd_nl:dac"), m_soundrom(*this, "soundrom"), m_spriteram(*this, "spriteram"), @@ -176,9 +174,7 @@ private: required_device m_palette; required_device m_z80dma; optional_device_array m_soundlatch; - optional_device m_audio_snd0; - optional_device m_audio_snd1; - optional_device m_audio_snd7; + optional_device_array m_audio_snd; optional_device m_audio_dac; // memory pointers @@ -192,17 +188,18 @@ private: tilemap_t *m_bg_tilemap = nullptr; // misc - uint8_t m_irq_clock = 0; bool m_nmi_mask = false; bool m_z80_sync = false; + uint8_t m_soundirq = false; + emu_timer *m_walk_timer[2] = { }; // handlers - uint8_t mario_sh_tune_r(offs_t offset); - void mario_sh_sound_w(uint8_t data); - void masao_sh_irqtrigger_w(uint8_t data); - void mario_sh1_w(uint8_t data) { m_audio_snd0->write(data); } - void mario_sh2_w(uint8_t data) { m_audio_snd1->write(data); } - void mario_sh3_w(offs_t offset, uint8_t data); + uint8_t tune_r(offs_t offset); + void dac_w(uint8_t data) { m_audio_dac->write(data); } + TIMER_CALLBACK_MEMBER(walk_off) { m_audio_snd[param & 1]->write(1); } + template void walk_w(uint8_t data); + void samples_w(offs_t offset, uint8_t data); + void masao_soundirq_w(uint8_t data); TILE_GET_INFO_MEMBER(get_bg_tile_info); void set_palette(int monitor); @@ -269,7 +266,10 @@ void mario_state::sound_start() SND[0x0002] = 0x00; } - save_item(NAME(m_irq_clock)); + save_item(NAME(m_soundirq)); + + for (int i = 0; i < 2; i++) + m_walk_timer[i] = timer_alloc(FUNC(mario_state::walk_off), this); } void mario_state::sound_reset() @@ -278,7 +278,7 @@ void mario_state::sound_reset() if (m_soundlatch[1]) m_soundlatch[1]->clear_w(); if (m_soundlatch[3]) m_soundlatch[3]->clear_w(); - m_irq_clock = 0; + m_soundirq = false; } @@ -288,7 +288,7 @@ void mario_state::sound_reset() * *************************************/ -uint8_t mario_state::mario_sh_tune_r(offs_t offset) +uint8_t mario_state::tune_r(offs_t offset) { if (!machine().side_effects_disabled()) { @@ -307,24 +307,16 @@ uint8_t mario_state::mario_sh_tune_r(offs_t offset) return m_soundrom[(p2 & 0x0f) << 8 | offset]; } -void mario_state::mario_sh_sound_w(uint8_t data) +template +void mario_state::walk_w(uint8_t data) { - m_audio_dac->write(data); + m_audio_snd[N]->write(0); + + // WR is asserted for 3 cycles + m_walk_timer[N]->adjust(attotime::from_ticks(3, m_maincpu->clock()), N); } -void mario_state::masao_sh_irqtrigger_w(uint8_t data) -{ - data &= 1; - - // setting bit 0 high then low triggers IRQ on the sound CPU - if (m_irq_clock && !data) - m_audiocpu->set_input_line(0, HOLD_LINE); - - m_irq_clock = data; -} - - -void mario_state::mario_sh3_w(offs_t offset, uint8_t data) +void mario_state::samples_w(offs_t offset, uint8_t data) { data &= 1; @@ -353,11 +345,22 @@ void mario_state::mario_sh3_w(offs_t offset, uint8_t data) // skid case 7: - m_audio_snd7->write(data ^ 1); + m_audio_snd[2]->write(data ^ 1); break; } } +void mario_state::masao_soundirq_w(uint8_t data) +{ + data &= 1; + + // setting bit 0 high then low triggers IRQ on the sound CPU + if (m_soundirq && !data) + m_audiocpu->set_input_line(0, HOLD_LINE); + + m_soundirq = bool(data); +} + /************************************* * @@ -496,21 +499,21 @@ void mario_state::scroll_w(uint8_t data) void mario_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) { - const bool flip = flip_screen(); + const uint8_t flip = flip_screen() ? 0xff : 0; int offs = 0; while (offs != m_spriteram.bytes()) { if (m_spriteram[offs]) { - // from schematics .... + // from schematics... int y = (m_spriteram[offs + 0] + (flip ? 0xf7 : 0xf9) + 1) & 0xff; int x = m_spriteram[offs + 3]; // sprite will be drawn if (y + scanline) & 0xF0 = 0xF0 y = 240 - y; // logical screen position - y = y ^ (flip ? 0xff : 0x00); // physical screen location - x = x ^ (flip ? 0xff : 0x00); // physical screen location + y ^= flip; // physical screen location + x ^= flip; // physical screen location int code = m_spriteram[offs + 2]; int color = (m_spriteram[offs + 1] & 0x0f) + 16 * m_palette_bank; @@ -521,6 +524,8 @@ void mario_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) { y -= 14; x -= 7; + flipx = !flipx; + flipy = !flipy; } else { @@ -528,22 +533,11 @@ void mario_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) x -= 8; } - if (flip) - { - m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, - code, - color, - !flipx, !flipy, - x, y, 0); - } - else - { - m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, + m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, code, color, flipx, flipy, x, y, 0); - } } offs += 4; @@ -626,15 +620,15 @@ void mario_state::base_map(address_map &map) void mario_state::mario_map(address_map &map) { base_map(map); - map(0x7c00, 0x7c00).w(FUNC(mario_state::mario_sh1_w)); // Mario run sample - map(0x7c80, 0x7c80).w(FUNC(mario_state::mario_sh2_w)); // Luigi run sample - map(0x7f00, 0x7f07).w(FUNC(mario_state::mario_sh3_w)); // misc samples + map(0x7c00, 0x7c00).w(FUNC(mario_state::walk_w<0>)); // Mario walk sample + map(0x7c80, 0x7c80).w(FUNC(mario_state::walk_w<1>)); // Luigi walk sample + map(0x7f00, 0x7f07).w(FUNC(mario_state::samples_w)); // misc samples } void mario_state::masao_map(address_map &map) { base_map(map); - map(0x7f00, 0x7f00).w(FUNC(mario_state::masao_sh_irqtrigger_w)); + map(0x7f00, 0x7f00).w(FUNC(mario_state::masao_soundirq_w)); } void mario_state::mario_io_map(address_map &map) @@ -652,7 +646,7 @@ void mario_state::mario_sound_map(address_map &map) void mario_state::mario_sound_io_map(address_map &map) { - map(0x00, 0xff).r(FUNC(mario_state::mario_sh_tune_r)).w(FUNC(mario_state::mario_sh_sound_w)); + map(0x00, 0xff).r(FUNC(mario_state::tune_r)).w(FUNC(mario_state::dac_w)); } void mario_state::masao_sound_map(address_map &map) @@ -859,13 +853,11 @@ void mario_state::mario(machine_config &config) for (int i = 0; i < 4; i++) GENERIC_LATCH_8(config, m_soundlatch[i]); - NETLIST_SOUND(config, "snd_nl", 48000) - .set_source(netlist_mario) - .add_route(ALL_OUTPUTS, "mono", 0.5); + NETLIST_SOUND(config, "snd_nl", 48000).set_source(netlist_mario).add_route(ALL_OUTPUTS, "mono", 0.5); - NETLIST_LOGIC_INPUT(config, m_audio_snd0, "SOUND0.IN", 0); - NETLIST_LOGIC_INPUT(config, m_audio_snd1, "SOUND1.IN", 0); - NETLIST_LOGIC_INPUT(config, m_audio_snd7, "SOUND7.IN", 0); + NETLIST_LOGIC_INPUT(config, m_audio_snd[0], "SOUND0.IN", 0); + NETLIST_LOGIC_INPUT(config, m_audio_snd[1], "SOUND1.IN", 0); + NETLIST_LOGIC_INPUT(config, m_audio_snd[2], "SOUND7.IN", 0); NETLIST_INT_INPUT(config, m_audio_dac, "DAC.VAL", 0, 255); NETLIST_STREAM_OUTPUT(config, "snd_nl:cout0", 0, "ROUT.1").set_mult_offset(150000.0 / 32768.0, 0.0); From 192dfb4d85c5eb1d86bea953f8c556f80ac3d0f2 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 26 Feb 2026 18:46:15 +0100 Subject: [PATCH 055/351] mario: put the masao bootleg in a subclass --- src/mame/nintendo/mario.cpp | 130 ++++++++++++++++++++++-------------- 1 file changed, 79 insertions(+), 51 deletions(-) diff --git a/src/mame/nintendo/mario.cpp b/src/mame/nintendo/mario.cpp index d0d28a9aef3..e1583f0206c 100644 --- a/src/mame/nintendo/mario.cpp +++ b/src/mame/nintendo/mario.cpp @@ -154,7 +154,6 @@ public: { } void mario_base(machine_config &config); - void masao(machine_config &config); void mario(machine_config &config); DECLARE_INPUT_CHANGED_MEMBER(adjust_palette) { set_palette(newval); } @@ -166,7 +165,38 @@ protected: virtual void sound_start() override ATTR_COLD; virtual void sound_reset() override ATTR_COLD; -private: + // handlers + uint8_t tune_r(offs_t offset); + void dac_w(uint8_t data) { m_audio_dac->write(data); } + TIMER_CALLBACK_MEMBER(walk_off) { m_audio_snd[param & 1]->write(1); } + template void walk_w(uint8_t data); + void samples_w(offs_t offset, uint8_t data); + + TILE_GET_INFO_MEMBER(get_bg_tile_info); + void set_palette(int monitor); + void palette(palette_device &palette); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); + + void videoram_w(offs_t offset, uint8_t data); + void gfx_bank_w(int state); + void palette_bank_w(int state); + void scroll_w(uint8_t data); + void nmi_mask_w(int state); + void coin_counter_1_w(int state); + void coin_counter_2_w(int state); + void vblank_irq(int state); + uint8_t memory_read_byte(offs_t offset); + void memory_write_byte(offs_t offset, uint8_t data); + + // address maps + void base_map(address_map &map) ATTR_COLD; + void mario_map(address_map &map) ATTR_COLD; + void mario_io_map(address_map &map) ATTR_COLD; + + void mario_sound_map(address_map &map) ATTR_COLD; + void mario_sound_io_map(address_map &map) ATTR_COLD; + // devices required_device m_maincpu; required_device m_audiocpu; @@ -190,42 +220,29 @@ private: // misc bool m_nmi_mask = false; bool m_z80_sync = false; - uint8_t m_soundirq = false; emu_timer *m_walk_timer[2] = { }; +}; - // handlers - uint8_t tune_r(offs_t offset); - void dac_w(uint8_t data) { m_audio_dac->write(data); } - TIMER_CALLBACK_MEMBER(walk_off) { m_audio_snd[param & 1]->write(1); } - template void walk_w(uint8_t data); - void samples_w(offs_t offset, uint8_t data); - void masao_soundirq_w(uint8_t data); +// different sound hardware +class masao_state : public mario_state +{ +public: + masao_state(const machine_config &mconfig, device_type type, const char *tag) : + mario_state(mconfig, type, tag) + { } - TILE_GET_INFO_MEMBER(get_bg_tile_info); - void set_palette(int monitor); - void palette(palette_device &palette); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); + void masao(machine_config &config); - void videoram_w(offs_t offset, uint8_t data); - void gfx_bank_w(int state); - void palette_bank_w(int state); - void scroll_w(uint8_t data); - void nmi_mask_w(int state); - void coin_counter_1_w(int state); - void coin_counter_2_w(int state); - void vblank_irq(int state); - uint8_t memory_read_byte(offs_t offset); - void memory_write_byte(offs_t offset, uint8_t data); +protected: + virtual void sound_start() override ATTR_COLD; + virtual void sound_reset() override ATTR_COLD; + + void soundirq_w(uint8_t data); - void base_map(address_map &map) ATTR_COLD; - void mario_map(address_map &map) ATTR_COLD; void masao_map(address_map &map) ATTR_COLD; - void mario_io_map(address_map &map) ATTR_COLD; - - void mario_sound_map(address_map &map) ATTR_COLD; - void mario_sound_io_map(address_map &map) ATTR_COLD; void masao_sound_map(address_map &map) ATTR_COLD; + + bool m_soundirq = false; }; @@ -256,17 +273,12 @@ void mario_state::machine_reset() void mario_state::sound_start() { - if (m_audiocpu->type() != Z80) - { - uint8_t *SND = memregion("audiocpu")->base(); + uint8_t *SND = memregion("audiocpu")->base(); - // Hack to bootstrap MCU program into external MB1 - SND[0x0000] = 0xf5; - SND[0x0001] = 0x04; - SND[0x0002] = 0x00; - } - - save_item(NAME(m_soundirq)); + // Hack to bootstrap MCU program into external MB1 + SND[0x0000] = 0xf5; + SND[0x0001] = 0x04; + SND[0x0002] = 0x00; for (int i = 0; i < 2; i++) m_walk_timer[i] = timer_alloc(FUNC(mario_state::walk_off), this); @@ -275,9 +287,25 @@ void mario_state::sound_start() void mario_state::sound_reset() { m_soundlatch[0]->clear_w(); - if (m_soundlatch[1]) m_soundlatch[1]->clear_w(); - if (m_soundlatch[3]) m_soundlatch[3]->clear_w(); + m_soundlatch[1]->clear_w(); + m_soundlatch[3]->clear_w(); + m_audio_snd[0]->write(1); + m_audio_snd[1]->write(1); +} + +void masao_state::sound_start() +{ + //mario_state::sound_start(); // don't + + save_item(NAME(m_soundirq)); +} + +void masao_state::sound_reset() +{ + //mario_state::sound_reset(); // don't + + m_soundlatch[0]->clear_w(); m_soundirq = false; } @@ -350,7 +378,7 @@ void mario_state::samples_w(offs_t offset, uint8_t data) } } -void mario_state::masao_soundirq_w(uint8_t data) +void masao_state::soundirq_w(uint8_t data) { data &= 1; @@ -625,10 +653,10 @@ void mario_state::mario_map(address_map &map) map(0x7f00, 0x7f07).w(FUNC(mario_state::samples_w)); // misc samples } -void mario_state::masao_map(address_map &map) +void masao_state::masao_map(address_map &map) { base_map(map); - map(0x7f00, 0x7f00).w(FUNC(mario_state::masao_soundirq_w)); + map(0x7f00, 0x7f00).w(FUNC(masao_state::soundirq_w)); } void mario_state::mario_io_map(address_map &map) @@ -649,7 +677,7 @@ void mario_state::mario_sound_io_map(address_map &map) map(0x00, 0xff).r(FUNC(mario_state::tune_r)).w(FUNC(mario_state::dac_w)); } -void mario_state::masao_sound_map(address_map &map) +void masao_state::masao_sound_map(address_map &map) { map(0x0000, 0x0fff).rom(); map(0x2000, 0x23ff).ram(); @@ -863,16 +891,16 @@ void mario_state::mario(machine_config &config) NETLIST_STREAM_OUTPUT(config, "snd_nl:cout0", 0, "ROUT.1").set_mult_offset(150000.0 / 32768.0, 0.0); } -void mario_state::masao(machine_config &config) +void masao_state::masao(machine_config &config) { mario_base(config); m_maincpu->set_clock(4'000'000); // 4MHz? - m_maincpu->set_addrmap(AS_PROGRAM, &mario_state::masao_map); + m_maincpu->set_addrmap(AS_PROGRAM, &masao_state::masao_map); // sound hardware Z80(config, m_audiocpu, 14'318'181 / 8); // 1.79MHz? - m_audiocpu->set_addrmap(AS_PROGRAM, &mario_state::masao_sound_map); + m_audiocpu->set_addrmap(AS_PROGRAM, &masao_state::masao_sound_map); SPEAKER(config, "mono").front_center(); @@ -1090,4 +1118,4 @@ GAME( 1983, mariog, mario, mario, mario, mario_state, empty_init, ROT0, "Ninte GAME( 1983, mariof, mario, mario, mariof, mario_state, empty_init, ROT0, "Nintendo of America", "Mario Bros. (US, revision F)", MACHINE_SUPPORTS_SAVE ) GAME( 1983, marioj, mario, mario, marioj, mario_state, empty_init, ROT0, "Nintendo", "Mario Bros. (Japan, revision C)", MACHINE_SUPPORTS_SAVE ) // probably newer than US revision E GAME( 1983, marioja, mario, mario, mariof, mario_state, empty_init, ROT0, "Nintendo", "Mario Bros. (Japan, older)", MACHINE_SUPPORTS_SAVE ) -GAME( 1983, masao, mario, masao, mario, mario_state, empty_init, ROT0, "bootleg", "Masao", MACHINE_SUPPORTS_SAVE ) +GAME( 1983, masao, mario, masao, mario, masao_state, empty_init, ROT0, "bootleg", "Masao", MACHINE_SUPPORTS_SAVE ) From 2c8593f661750e6a8e7a5bbbb717ec8bbfa6b621 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Thu, 26 Feb 2026 19:43:06 +0100 Subject: [PATCH 056/351] New working clones ------------------ Gals Panic 4 (Asia) [f205v, Sean Sutton, Smitdogg, Brian Troha, rtw, The Dumping Union] John Elway's Team Quarterback (rev 1) [coolmod, The Dumping Union] --- src/mame/cinematronics/leland.cpp | 43 +++++++++++++++++++++++++++++++ src/mame/kaneko/suprnova.cpp | 29 +++++++++++++++++++++ src/mame/mame.lst | 2 ++ 3 files changed, 74 insertions(+) diff --git a/src/mame/cinematronics/leland.cpp b/src/mame/cinematronics/leland.cpp index 1766ef78b19..720bfac3b4c 100644 --- a/src/mame/cinematronics/leland.cpp +++ b/src/mame/cinematronics/leland.cpp @@ -2223,6 +2223,48 @@ ROM_START( teamqb2 ) ROM_LOAD16_WORD( "eeprom-teamqb.bin", 0x0000, 0x0080, CRC(119fb1e7) SHA1(1a3be0e2415c789a517b21c99e6d60d3ac18a092) ) ROM_END +ROM_START( teamqb1 ) + ROM_REGION( 0x20000, "master", 0 ) + ROM_LOAD( "03-15618-02.u58t", 0x00000, 0x10000, CRC(d175a252) SHA1(f5d38b599ac7a3999dbd7fd60b96c7a48f6288b3) ) + ROM_LOAD( "03-15619-01.u59t", 0x10000, 0x10000, CRC(6e48c7c5) SHA1(1ad2218c6a09d332a133a84da844a8643074a2a9) ) + + ROM_REGION( 0x80000, "slave", 0 ) + ROM_LOAD( "03-15600-01.u3", 0x00000, 0x02000, CRC(46615844) SHA1(cb73dd73d389d1f6a5da91d0935b5461649ba706) ) + ROM_LOAD( "03-15601-01.u2t", 0x10000, 0x10000, CRC(8e523c58) SHA1(7f1133144177c39849fd6355bf9250895b2d597f) ) + ROM_LOAD( "03-15602-01.u3t", 0x20000, 0x10000, CRC(545b27a1) SHA1(1e8beebc1384cf6513bff7c2381ca214967ff135) ) + ROM_LOAD( "03-15603-01.u4t", 0x30000, 0x10000, CRC(cdc9c09d) SHA1(8641312638507d027948c17c042417b0d0362714) ) + ROM_LOAD( "03-15604-01.u5t", 0x40000, 0x10000, CRC(3c03e92e) SHA1(7cd9b02bbf1d30a8432632d902c4ea6c8108210b) ) + ROM_LOAD( "03-15605-01.u6t", 0x50000, 0x10000, CRC(cdf7d19c) SHA1(577c8bf5964d77dbfef4840c53ae40cda68bf4f3) ) + ROM_LOAD( "03-15606-01.u7t", 0x60000, 0x10000, CRC(8eeb007c) SHA1(6f9d4132c7e5e6502108cb3e8eab9114f07848b4) ) + ROM_LOAD( "03-15607-01.u8t", 0x70000, 0x10000, CRC(57cb6d2d) SHA1(56e364aedca25935a5cd7ab4460d9213fcc58b4a) ) + + ROM_REGION( 0x100000, "custom:audiocpu", 0 ) + ROM_LOAD16_BYTE( "03-15623-01.u25t", 0x040001, 0x10000, CRC(710bdc76) SHA1(610f7baa17adf2d16c9494b05556b49ae376fe81) ) + ROM_LOAD16_BYTE( "03-15620-01.u13t", 0x040000, 0x10000, CRC(7e5cb8ad) SHA1(aaff4e93053638955b95951dceea3b35e842e80f) ) + ROM_LOAD16_BYTE( "03-15624-01.u26t", 0x060001, 0x10000, CRC(dd090d33) SHA1(09a3fa4fa3a50c6692be2bc5fec2c4e9a5072d5d) ) + ROM_LOAD16_BYTE( "03-15621-01.u14t", 0x060000, 0x10000, CRC(f68c68c9) SHA1(a7d77c36831d455a8c36d2156460287cf28c9694) ) + ROM_LOAD16_BYTE( "03-15625-01.u27t", 0x0e0001, 0x10000, CRC(ac442523) SHA1(d05dcc413eb39b0938890ef80ec7b636773bb1a3) ) + ROM_LOAD16_BYTE( "03-15622-01.u15t", 0x0e0000, 0x10000, CRC(9e84509a) SHA1(4c3a3e5192ba6c38d8391eedf817350795bddb8f) ) + + ROM_REGION( 0x0c000, "bg_gfx", 0 ) + ROM_LOAD( "03-15615-01.u93", 0x00000, 0x04000, CRC(a7ea6a87) SHA1(5cfd9ed6a5ffc8e86d18b7d8496761b9086b6368) ) + ROM_LOAD( "03-15616-01.u94", 0x04000, 0x04000, CRC(4a9b3900) SHA1(00398cc5056c999673604e414c9c0338d83b13d4) ) + ROM_LOAD( "03-15617-01.u95", 0x08000, 0x04000, CRC(2cd95edb) SHA1(939ff97562535b05f427186b085a74a8fe5a332a) ) + + ROM_REGION( 0x20000, "bg_prom", 0 ) // Ordering: 70/92/69/91/68/90/67/89 + ROM_LOAD( "03-15611-01.u70", 0x00000, 0x4000, CRC(bf2695fb) SHA1(58a6d1e9e83912f7567eabdf54278db85061c284) ) + ROM_LOAD( "03-15614-01.u92", 0x04000, 0x4000, CRC(c93fd870) SHA1(1086334496a4d1900a2d697cbd2575a77df89d65) ) + ROM_LOAD( "03-15610-01.u69", 0x08000, 0x4000, CRC(3e5b786f) SHA1(13d2ab7b6a1182933272b597718d3e715b547a10) ) + // U91 = Empty + ROM_LOAD( "03-15609-01.u68", 0x10000, 0x4000, CRC(0319aec7) SHA1(e4f14ce9b4712c1cee69141165d187e9068101fc) ) + ROM_LOAD( "03-15613-01.u90", 0x14000, 0x4000, CRC(4805802e) SHA1(a121aec2b0340773288687baccf85519c0ef3160) ) + ROM_LOAD( "03-15608-01.u67", 0x18000, 0x4000, CRC(78f0fd2b) SHA1(e83b1106411bb03c64a985a08c5f20c2eb397140) ) + // U89 = Empty + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) + ROM_LOAD16_WORD( "eeprom-teamqb.bin", 0x0000, 0x0080, CRC(119fb1e7) SHA1(1a3be0e2415c789a517b21c99e6d60d3ac18a092) ) +ROM_END + ROM_START( aafb ) ROM_REGION( 0x20000, "master", 0 ) @@ -3574,6 +3616,7 @@ GAME( 1987, quarterbc, quarterb, quarterb, quarterb, redline_state, init_quar GAME( 1988, viper, 0, lelandi, dangerz, redline_state, init_viper, ROT0, "Leland Corporation", "Viper (rev 3)", 0 ) GAME( 1988, teamqb, 0, lelandi, teamqb, redline_state, init_teamqb, ROT270, "Leland Corporation", "John Elway's Team Quarterback (rev 3)", 0 ) GAME( 1988, teamqb2, teamqb, lelandi, teamqb, redline_state, init_teamqb, ROT270, "Leland Corporation", "John Elway's Team Quarterback (rev 2)", 0 ) +GAME( 1988, teamqb1, teamqb, lelandi, teamqb, redline_state, init_teamqb, ROT270, "Leland Corporation", "John Elway's Team Quarterback (rev 1)", 0 ) GAME( 1989, aafb, 0, lelandi, teamqb, redline_state, init_aafb, ROT270, "Leland Corporation", "All American Football (Leland, rev E)", 0 ) GAME( 1989, aafbd2p, aafb, lelandi, aafb2p, redline_state, init_aafbd2p, ROT270, "Leland Corporation", "All American Football (Leland, rev D, 2 players)", 0 ) GAME( 1989, aafbc, aafb, lelandi, teamqb, redline_state, init_aafbb, ROT270, "Leland Corporation", "All American Football (Leland, rev C)", 0 ) diff --git a/src/mame/kaneko/suprnova.cpp b/src/mame/kaneko/suprnova.cpp index 4be2282da0b..2f6704bdf60 100644 --- a/src/mame/kaneko/suprnova.cpp +++ b/src/mame/kaneko/suprnova.cpp @@ -1174,6 +1174,34 @@ ROM_START( galpani4j ) ROM_LOAD( "gp4-300-00.u4", 0x000000, 0x200000, CRC(8374663a) SHA1(095512564f4de25dc3752d9fbd254b9dabd16d1b) ) ROM_END +ROM_START( galpani4a ) // ROM-BOARD NEP-16 part number GP04A00068 with extra sound sample ROM at U7 + SKNS_ASIA + + ROM_REGION32_BE( 0x200000, "game", 0 ) // SH-2 Code mapped at 0x04000000 + ROM_LOAD16_BYTE( "gp4a1_u10.u10", 0x000000, 0x080000, CRC(b14adfbb) SHA1(3b857a6f46a6f39716c5aa8d9df7907ae1856761) ) // labeled as: KANEKO GP4A1 /U10 (green stripe across bottom of label) + ROM_LOAD16_BYTE( "gp4a1_u8.u8", 0x000001, 0x080000, CRC(77fe1f40) SHA1(8c0549d05d4ad7332fdd10a69ce8f4d9cd1ff336) ) // labeled as: KANEKO GP4A1 /U8 (green stripe across bottom of label) + + ROM_REGION( 0x400000, "spritegen", 0 ) // Sprites + ROM_LOAD( "gp4-100-00.u24", 0x000000, 0x200000, CRC(1df61f01) SHA1(a9e95bbb3013e8f2fd01243b1b392ff07b4f7d02) ) + ROM_LOAD( "gp4-101-00.u20", 0x200000, 0x100000, CRC(8e2c9349) SHA1(a58fa9bcc9684ed4558e3395d592b64a1978a902) ) + + ROM_REGION( 0x400000, "gfx2", 0 ) // Tiles Plane A + ROM_LOAD( "gp4-200-00.u16", 0x000000, 0x200000, CRC(f0781376) SHA1(aeab9553a9af922524e528eb2d019cf36b6e2094) ) + ROM_LOAD( "gp4-201-00.u18", 0x200000, 0x200000, CRC(10c4b183) SHA1(80e05f3932495ad4fc9bf928fa66e6d2931bbb06) ) + + ROM_REGION( 0x800000, "gfx3", ROMREGION_ERASE00 ) // Tiles Plane B + // First 0x040000 bytes (0x03ff Tiles) are RAM Based Tiles + // 0x040000 - 0x3fffff empty? + + ROM_REGION( 0x400000, "ymz", 0 ) // Samples + ROM_LOAD( "gp4-300-00.u4", 0x000000, 0x200000, CRC(8374663a) SHA1(095512564f4de25dc3752d9fbd254b9dabd16d1b) ) // Doesn't seem to use these samples at all + ROM_LOAD( "gp4-301-00.u7", 0x200000, 0x200000, CRC(53e9f8fb) SHA1(72104f31089f42cd3384d9494952f33b15cd18ad) ) // Changed some samples when compared to U4 ROM - Different then GP4-301-01 used below + + ROM_REGION( 0x400, "plds", 0 ) + ROM_LOAD( "skns-r09.u9", 0x000, 0x117, CRC(b02058d9) SHA1(77d07e0f329fb1969aa4543cd124e36ad34b07ba) ) // Atmel ATF16V8B + ROM_LOAD( "skns-r11.u11", 0x200, 0x117, CRC(a9f05af4) SHA1(018684c1f9f7c2e1c86f0cb2db2ec7fb02e35cd8) ) // Atmel ATF16V8B +ROM_END + ROM_START( galpani4k ) /* ROM-BOARD NEP-16 part number GP04K00372 with extra sound sample ROM at U7 */ SKNS_KOREA @@ -2058,6 +2086,7 @@ GAME( 1996, skns, 0, skns, skns, skns_state, empty_init, GAME( 1996, galpani4, skns, sknse, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Europe)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, galpani4j, galpani4, sknsj, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Japan)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1996, galpani4a, galpani4, sknsa, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Asia)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, galpani4k, galpani4, sknsk, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic 4 (Korea)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 2000, galpaniex, galpani4, sknsa, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic EX (Korea)", MACHINE_IMPERFECT_GRAPHICS ) // copyright 2000, re-release for the Asian/Korean market? GAME( 2000, galpanisu, galpani4, sknsk, cyvern, skns_state, init_galpani4, ROT0, "Kaneko", "Gals Panic SU (Korea, Gals Panic 4 re-release)", MACHINE_IMPERFECT_GRAPHICS ) // copyright 2000, re-release for the Asian/Korean market? diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e8bca369e43..1347a44ae0c 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -16638,6 +16638,7 @@ quarterbc redlin2p strkzone teamqb +teamqb1 teamqb2 upyoural viper @@ -24594,6 +24595,7 @@ yutnori cyvern cyvernj galpani4 +galpani4a galpani4j galpani4k galpanidx From d7abdb1cfd8c5300340e1261cf3fc2de4c78a752 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 25 Feb 2026 13:21:40 +0100 Subject: [PATCH 057/351] video/pc_vga_sis.cpp: preliminary HW cursor --- src/devices/bus/pci/sis6326.cpp | 2 + src/devices/video/pc_vga_sis.cpp | 188 ++++++++++++++++++++++++++++++- src/devices/video/pc_vga_sis.h | 17 +++ 3 files changed, 203 insertions(+), 4 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 9a457faaf6d..966c25f7844 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -115,6 +115,8 @@ void sis6326_pci_device::mmio_map(address_map &map) { // HACK: fake Turbo Queue so to not lockup windows map(0x82a8, 0x82ab).lr32(NAME([] () { return 0x8000'0100; })); + + map(0x8378, 0x837f).w(m_vga, FUNC(sis6326_vga_device::cursor_mmio_w)); // Same deal, 3D Engine Status map(0x89fc, 0x89ff).lr32(NAME([] () { return (0x3ff << 16) | 3; })); } diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 2e930bd3890..6302a6d9d34 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -34,6 +34,8 @@ TODO: #include "logmacro.h" +#define DEBUG_VRAM_VIEWER 0 + // TODO: later variant of 5598 // (definitely doesn't have dual segment mode for instance) DEFINE_DEVICE_TYPE(SIS6326_VGA, sis6326_vga_device, "sis6326_vga", "SiS 6326 VGA i/f") @@ -91,6 +93,16 @@ void sis6326_vga_device::device_start() save_item(NAME(m_ext_ge27)); save_item(NAME(m_linear_address)); + save_item(STRUCT_MEMBER(m_cursor, address_base)); + save_item(STRUCT_MEMBER(m_cursor, color_cache)); + save_item(STRUCT_MEMBER(m_cursor, color)); + save_item(STRUCT_MEMBER(m_cursor, x)); + save_item(STRUCT_MEMBER(m_cursor, y)); + save_item(STRUCT_MEMBER(m_cursor, x_preset)); + save_item(STRUCT_MEMBER(m_cursor, y_preset)); + save_item(STRUCT_MEMBER(m_cursor, pattern_select)); + save_item(STRUCT_MEMBER(m_cursor, side_pattern_enable)); + save_item(STRUCT_MEMBER(m_tv, pycin)); save_item(STRUCT_MEMBER(m_tv, enyf)); save_item(STRUCT_MEMBER(m_tv, encf)); @@ -106,6 +118,12 @@ void sis6326_vga_device::device_reset() m_ext_sr07 = m_ext_sr0b = m_ext_sr0c = m_ext_sr23 = m_ext_sr33 = 0; m_ext_sr34 = m_ext_sr35 = m_ext_sr38 = m_ext_sr39 = m_ext_sr3c = 0; m_ext_ge26 = m_ext_ge27 = 0; + + // everything else shouldn't matter for cursor + // initialize fixed part here: HW cannot set any other bit beyond 21 ~ 18. + // On win98se this will map at bottom of VRAM i.e. at $3f'fc00 on 4MiB cards + m_cursor.address_base = 0x03'fc00; + m_linear_address[0] = 0; m_linear_address[1] = 0; m_ext_ddc = 0; @@ -370,11 +388,63 @@ void sis6326_vga_device::sequencer_map(address_map &map) //map(0x12, 0x12) Ext. Horizontal Overflow //map(0x13, 0x13) Ext. Clock Generator / 25MHz/28MHz Video Clock - //map(0x14, 0x16) HW Cursor Color 0 - //map(0x17, 0x19) HW Cursor Color 1 - //map(0x1a, 0x1b) HW Cursor Horizontal Start 0/1 + // HW Cursor Color 0/1 + map(0x14, 0x19).lrw8( + NAME([this] (offs_t offset) { + return m_cursor.color_cache[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + m_cursor.color_cache[offset] = data; + const u8 pen_color = offset / 3; + const u8 pal_offset = pen_color * 3; + // RGB555 format + m_cursor.color[pen_color] = ( + (pal5bit(m_cursor.color_cache[0 + pal_offset]) << 16) + | (pal5bit(m_cursor.color_cache[1 + pal_offset]) << 8) + | (pal5bit(m_cursor.color_cache[2 + pal_offset]) << 0) + ); + }) + ); + // HW Cursor Horizontal Start 0/1 + map(0x1a, 0x1b).lrw8( + NAME([this] (offs_t offset) { return (offset) ? m_cursor.x >> 8 : m_cursor.x & 0xff; }), + NAME([this] (offs_t offset, u8 data) { + if (offset) + { + m_cursor.x &= 0x00ff; + m_cursor.x |= (data & 0x07) << 8; + } + else + { + m_cursor.x &= 0xff00; + m_cursor.x |= data & 0xff; + } + }) + ); //map(0x1c, 0x1c) HW Cursor Horizontal Preset - //map(0x1d, 0x1e) HW Cursor Vertical Start 0/1 + // HW Cursor Vertical Start 0/1 + map(0x1d, 0x1e).lrw8( + NAME([this] (offs_t offset) { + if (offset) + return (m_cursor.pattern_select << 4) | (m_cursor.side_pattern_enable << 3) | ((m_cursor.y >> 8) & 7); + return m_cursor.y & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + if (offset) + { + m_cursor.y &= 0x00ff; + m_cursor.y |= (data & 0x07) << 8; + m_cursor.side_pattern_enable = !!BIT(data, 3); + m_cursor.pattern_select = (data >> 4) & 0x0f; + } + else + { + m_cursor.y &= 0xff00; + m_cursor.y |= data & 0xff; + } + }) + ); + //map(0x1f, 0x1f) HW Cursor Vertical Preset //map(0x20, 0x21) Linear Addressing Base Address 0/1 map(0x20, 0x21).lrw8( @@ -527,6 +597,8 @@ void sis6326_vga_device::sequencer_map(address_map &map) NAME([this] (offs_t offset, u8 data) { LOG("SR38: Extended Misc. Control 7 %02x\n", data); m_ext_sr38 = data; + m_cursor.address_base &= ~0x3c'0000; + m_cursor.address_base |= (data >> 4) << 18; }) ); // ---x ---- Select external TVCLK as internal TVCLK enable @@ -682,6 +754,113 @@ uint32_t sis6326_vga_device::latch_start_addr() return vga.crtc.start_addr_latch << (svga.rgb8_en ? 2 : 0); } +// undocumented, win98se access this for X/Y positions to actually work +// [1]/[3] are probably X/Y preset registers (byte accesses) +void sis6326_vga_device::cursor_mmio_w(offs_t offset, u16 data, u16 mem_mask) +{ + switch(offset) + { + case 0: + COMBINE_DATA(&m_cursor.x); + break; + case 2: + COMBINE_DATA(&m_cursor.y); + break; + } +} + +uint32_t sis6326_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + svga_device::screen_update(screen, bitmap, cliprect); + + // HW cursor + if (BIT(m_ramdac_mode, 6)) + { + // TODO: preliminary, likely using pattern_select for switching modes + // Drawing specifics aren't really documented beyond what the register does. + + const u32 base_offs = (m_cursor.address_base); + const u8 transparent_pen = 2; + + for (int y = 0; y < 64; y ++) + { + int res_y = y + m_cursor.y; + for (int x = 0; x < 64; x++) + { + int res_x = x + m_cursor.x; + if (!cliprect.contains(res_x, res_y)) + continue; + const u32 cursor_address = ((x >> 2) + y * 16) + base_offs; + const int xi = (3 - (x & 3)) * 2; + u8 cursor_gfx = (vga.memory[(cursor_address) % vga.svga_intf.vram_size] >> (xi) & 3); + + if (cursor_gfx == transparent_pen) + continue; + + bitmap.pix(res_y, res_x) = m_cursor.color[cursor_gfx & 1]; + } + } + } + +#if DEBUG_VRAM_VIEWER + static int m_test_x = 640, m_start_offs; + static int m_test_trigger = 1; + const int m_test_y = cliprect.max_y; + + if(machine().input().code_pressed(KEYCODE_RIGHT)) + m_test_x += 1 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 4 : 0); + + if(machine().input().code_pressed(KEYCODE_LEFT)) + m_test_x -= 1 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 4 : 0); + + //if(machine().input().code_pressed(JOYCODE_Y_DOWN_SWITCH)) + // m_test_y++; + + //if(machine().input().code_pressed(JOYCODE_Y_UP_SWITCH)) + // m_test_y--; + + if(machine().input().code_pressed(KEYCODE_DOWN)) + m_start_offs+= 0x100 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 8 : 0); + + if(machine().input().code_pressed(KEYCODE_UP)) + m_start_offs-= 0x100 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 8 : 0); + + m_start_offs %= vga.svga_intf.vram_size; + + if(machine().input().code_pressed_once(JOYCODE_BUTTON1)) + m_test_trigger ^= 1; + + if (!m_test_trigger) + return 0; + + popmessage("%d %d %04x", m_test_x, m_test_y, m_start_offs); + + bitmap.fill(0, cliprect); + + int count = m_start_offs; + + for(int y = 0; y < m_test_y; y++) + { + for(int x = 0; x < m_test_x; x ++) + { + u8 color = vga.memory[count % vga.svga_intf.vram_size]; + + if(cliprect.contains(x, y)) + { + //bitmap.pix(y, x) = pal565(color, 11, 5, 0); + bitmap.pix(y, x) = pen(color); + } + + count ++; + // count += 2; + } + } +#endif + + + return 0; +} + /* * SiS630 overrides @@ -818,6 +997,7 @@ void sis630_vga_device::sequencer_map(address_map &map) }) ); //map(0x1d, 0x1d) Segment Selection Overflow + map(0x15, 0x1d).unmaprw(); map(0x1e, 0x1e).lw8( NAME([this] (offs_t offset, u8 data) { if (BIT(data, 6)) diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index 020c293d332..e903bc65bc7 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -27,6 +27,10 @@ public: // Enable 64K ROM auto md23_cb() { return m_md23_cb.bind(); } + virtual uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) override; + + void cursor_mmio_w(offs_t offset, u16 data, u16 mem_mask); + protected: sis6326_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -64,6 +68,19 @@ protected: u8 m_ext_sr3c; u8 m_ext_ge26; u8 m_ext_ge27; + + struct { + u32 address_base; + u8 color_cache[6]; + u32 color[2]; + u16 x; + u16 y; + u8 x_preset; + u8 y_preset; + u8 pattern_select; + bool side_pattern_enable; + } m_cursor; + //u16 m_ext_config_status = 0; u8 m_ext_scratch[5]{}; u8 m_ext_vert_overflow = 0; From 35ddefa8f160a39b8237c92b39c245d1f3d68773 Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 26 Feb 2026 19:46:24 +0100 Subject: [PATCH 058/351] bus/pci/sis6326.cpp: initial BitBlt implementation --- src/devices/bus/pci/sis6326.cpp | 378 +++++++++++++++++++++++++++- src/devices/bus/pci/sis6326.h | 34 ++- src/devices/video/pc_vga_matrox.cpp | 12 +- src/devices/video/pc_vga_sis.cpp | 16 +- src/devices/video/pc_vga_sis.h | 10 + 5 files changed, 434 insertions(+), 16 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 966c25f7844..6bb7dc70ec3 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -14,6 +14,7 @@ SiS 6326 #define VERBOSE (LOG_GENERAL | LOG_WARN | LOG_AGP) //#define LOG_OUTPUT_FUNC osd_printf_info + #include "logmacro.h" #define LOGWARN(...) LOGMASKED(LOG_WARN, __VA_ARGS__) @@ -113,11 +114,108 @@ void sis6326_pci_device::vram_aperture_map(address_map &map) void sis6326_pci_device::mmio_map(address_map &map) { + map(0x8280, 0x8283).lw32( + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + COMBINE_DATA(&m_src_start_addr); + m_src_start_addr &= 0x3f'ffff; + }) + ); + // TODO: bit 31 is read only for Enhanced Color Expansion busy bit + map(0x8284, 0x8287).lw32( + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + COMBINE_DATA(&m_dst_start_addr); + m_dst_start_addr &= 0x3f'ffff; + if (ACCESSING_BITS_24_31) + m_draw_sel = data >> 24; + }) + ); + map(0x8288, 0x8289).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_src_pitch); + m_src_pitch &= 0x7ff; + }) + ); + map(0x828a, 0x828b).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_dst_pitch); + m_dst_pitch &= 0x7ff; + }) + ); + map(0x828c, 0x828d).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_rect_width); + m_rect_width &= 0x7ff; + m_rect_width ++; + }) + ); + map(0x828e, 0x828f).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_rect_height); + m_rect_height &= 0x7ff; + m_rect_height ++; + }) + ); + map(0x8290, 0x8293).lw32( + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + COMBINE_DATA(&m_fg_color); + m_fg_color &= 0xff'ffff; + if (ACCESSING_BITS_24_31) + m_fg_rop = data >> 24; + }) + ); + map(0x8294, 0x8297).lw32( + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + COMBINE_DATA(&m_bg_color); + m_bg_color &= 0xff'ffff; + if (ACCESSING_BITS_24_31) + m_bg_rop = data >> 24; + }) + ); + map(0x8298, 0x829f).lw8(NAME([this] (offs_t offset, u8 data) { m_mask[offset] = data; })); + map(0x82a0, 0x82a1).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_clip_left); + m_clip_left &= 0x7ff; + }) + ); + map(0x82a2, 0x82a3).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_clip_top); + m_clip_top &= 0x7ff; + }) + ); + map(0x82a4, 0x82a5).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_clip_right); + m_clip_right &= 0x7ff; + }) + ); + map(0x82a6, 0x82a7).lw16( + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_clip_bottom); + m_clip_bottom &= 0x7ff; + }) + ); + // HACK: fake Turbo Queue so to not lockup windows - map(0x82a8, 0x82ab).lr32(NAME([] () { return 0x8000'0100; })); + map(0x82a8, 0x82a9).lr16( + NAME([] (offs_t offset) { return 0x0100; }) + ); + map(0x82aa, 0x82ab).lrw16( + NAME([] (offs_t offset) { return 0x8000; }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + COMBINE_DATA(&m_draw_command); + if (mem_mask == 0xffff) + trigger_2d_command(); + }) + ); + + map(0x82ac, 0x82eb).lw8(NAME([this] (offs_t offset, u8 data) { + m_pattern_data[offset] = data; + })); map(0x8378, 0x837f).w(m_vga, FUNC(sis6326_vga_device::cursor_mmio_w)); - // Same deal, 3D Engine Status + // HACK: Same deal for 3D Engine Status map(0x89fc, 0x89ff).lr32(NAME([] () { return (0x3ff << 16) | 3; })); } @@ -162,6 +260,282 @@ void sis6326_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory } } +/* + * 2d drawing + */ + +const sis6326_pci_device::get_src_func sis6326_pci_device::get_src_table[4] = +{ + &sis6326_pci_device::get_src_bgcol, + &sis6326_pci_device::get_src_fgcol, + &sis6326_pci_device::get_src_mem, + &sis6326_pci_device::get_src_cpu +}; + + +u8 sis6326_pci_device::get_src_bgcol(u32 offset_base, u32 x) +{ + return m_bg_color; +} + +u8 sis6326_pci_device::get_src_fgcol(u32 offset_base, u32 x) +{ + return m_fg_color; +} + +u8 sis6326_pci_device::get_src_mem(u32 offset_base, u32 x) +{ + return m_vga->read_memory(offset_base + x); +} + +// TODO: no idea about this yet +u8 sis6326_pci_device::get_src_cpu(u32 offset_base, u32 x) +{ + return x & 1 ? 0x55 : 0xaa; +} + +const sis6326_pci_device::get_pat_func sis6326_pci_device::get_pat_table[4] = +{ + &sis6326_pci_device::get_pat_bgcol, + &sis6326_pci_device::get_pat_fgcol, + &sis6326_pci_device::get_pat_regs, + &sis6326_pci_device::get_pat_ddraw +}; + +u8 sis6326_pci_device::get_pat_bgcol(u32 y, u32 x) +{ + return m_bg_color; +} + +u8 sis6326_pci_device::get_pat_fgcol(u32 y, u32 x) +{ + return m_fg_color; +} + +// TODO: not yet sure about how this works either +// testable in win98se shutdown options +u8 sis6326_pci_device::get_pat_regs(u32 y, u32 x) +{ + return m_pattern_data[x & 3]; +} + +// TODO: this is special, uses regs in a different way +u8 sis6326_pci_device::get_pat_ddraw(u32 y, u32 x) +{ + return x & 1 ? 0x55 : 0xaa; +} + +// TODO: copied from s3virge, really needs moving in a common interface +// https://learn.microsoft.com/en-us/windows/win32/gdi/ternary-raster-operations +uint32_t sis6326_pci_device::GetROP(uint8_t rop, uint32_t src, uint32_t dst, uint32_t pat) +{ + uint32_t ret = 0; + + switch(rop) + { + case 0x00: // 0 + ret = 0; + break; + case 0x0a: // DPna + ret = (dst & (~pat)); + break; + case 0x22: // DSna + ret = (dst & (~src)); + break; + case 0x33: // Sn + ret = ~src; + break; + case 0x55: // Dn + ret = ~dst; + break; + case 0x5a: // DPx + ret = dst ^ pat; + break; + case 0x66: // DSx + ret = dst ^ src; + break; + case 0x88: // DSa + ret = dst & src; + break; + case 0xaa: // D + ret = dst; + break; + case 0xb8: // PSDPxax + ret = ((dst ^ pat) & src) ^ pat; + break; + case 0xbb: // DSno + ret = (dst | (~src)); + break; + case 0xca: // DPSDxax (moneynet install screen, no effective change?) + ret = ((src ^ dst) & pat) ^ dst; + break; + case 0xcc: + ret = src; + break; + case 0xe2: // DSPDxax + ret = ((pat ^ dst) & src) ^ dst; + break; + case 0xee: // DSo + ret = (dst | src); + break; + case 0xf0: + ret = pat; + break; + case 0xff: // 1 + ret = 0xffffffff; + break; + default: + popmessage("bus/pci/sis6326.cpp: Unimplemented ROP 0x%02x",rop); + } + + return ret; +} + + +void sis6326_pci_device::trigger_2d_command() +{ + const u8 src_select = m_draw_command & 3; + const u8 pat_select = (m_draw_command >> 2) & 3; + const s8 x_dir = BIT(m_draw_command, 4) ? 1 : -1; + const s8 y_dir = BIT(m_draw_command, 5) ? 1 : -1; + const bool clip_enable = !!BIT(m_draw_command, 6); + const bool clip_external = !!BIT(m_draw_command, 7); + const u8 cmd_type = (m_draw_command >> 8) & 3; + const std::string src_types[] = { "bgcol", "fgcol", "memory", "CPU" }; + // NOTE: pat type 3 may really select Direct Draw mode + const std::string pat_types[] = { "bgcol", "fgcol", "pattern", "" }; + LOG("Command: %04x: SRC %s, PAT %s, XY: %d|%d, clip: %d%d\n" + , m_draw_command, src_types[src_select], pat_types[pat_select] + , x_dir, y_dir, clip_enable, clip_external + ); + if (clip_enable) + { + LOG("cliprange X %d %d ~ Y %d %d\n", m_clip_left, m_clip_right, m_clip_top, m_clip_bottom); + // (a very unlikely) sanity check + if (m_dst_pitch == 0) + { + LOG("\tWarning: dst pitch == 0, ignored!\n"); + return; + } + } + + // bits 15-14 are r/o + // TODO: currently using 256 colors only + // how this even acknowledge a change in color mode? + switch(cmd_type) + { + case 0: + { + LOG("\tBitBlt\n"); + LOG("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); + LOG("\tSRC Pitch %d DST Pitch %d Rect %dx%d\n", m_src_pitch, m_dst_pitch, m_rect_width, m_rect_height); + LOG("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); + + for (s32 y = 0; y < m_rect_height; y++) + { + const s32 yi = y * y_dir; + if (clip_enable) + { + // clipping ranges are derived from the addresses (no explicit X/Y) + const s16 dst_y = yi + (m_dst_start_addr / m_dst_pitch); + if ((dst_y == std::clamp(dst_y, m_clip_top, m_clip_bottom)) ^ clip_external) + continue; + } + + const u32 src_base = (yi * m_src_pitch) + m_src_start_addr; + const u32 dst_base = (yi * m_dst_pitch) + m_dst_start_addr; + for (s32 x = 0; x < m_rect_width; x++) + { + const s32 xi = x * x_dir; + + if (clip_enable) + { + const u16 dst_x = xi + (m_dst_start_addr % m_dst_pitch); + if ((dst_x == std::clamp(dst_x, m_clip_left, m_clip_right)) ^ clip_external) + continue; + } + + const u8 src = (this->*get_src_table[src_select])(src_base, xi); + const u8 dst = m_vga->read_memory(xi + dst_base); + const u8 pat = (this->*get_pat_table[pat_select])(y, x); + const u8 res = GetROP(m_fg_rop, src, dst, pat) & 0xff; + m_vga->write_memory(xi + dst_base, res); + } + } + + break; + } + case 1: + { + LOG("\tBitBlt with mask\n"); + // ... + break; + } + case 2: + { + const bool color_exp = !!BIT(m_draw_command, 12); + const bool font_exp = !!BIT(m_draw_command, 13); + LOG("\tColor/Font expansion: Color enhanced %d Font enhanced %d\n", color_exp, font_exp); + LOG("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); + LOG("\tSRC Pitch %d DST Pitch %d Rect %dx%d\n", m_src_pitch, m_dst_pitch, m_rect_width, m_rect_height); + LOG("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); + + if (m_rect_width > 8) + { + LOG("\tWarning: rect width > 8, ignored!\n"); + return; + } + + for (s32 y = 0; y < m_rect_height; y++) + { + const s32 yi = y * y_dir; + + if (clip_enable) + { + const u16 dst_y = yi + (m_dst_start_addr / m_dst_pitch); + if ((dst_y == std::clamp(dst_y, m_clip_top, m_clip_bottom)) ^ clip_external) + continue; + } + + const u8 pattern_base = y; + const u32 src_base = (y * m_src_pitch * y_dir) + m_src_start_addr; + const u32 dst_base = (y * m_dst_pitch * y_dir) + m_dst_start_addr; + + for (s32 x = 0; x < m_rect_width; x++) + { + const s32 xi = x * x_dir; + + if (clip_enable) + { + const u16 dst_x = xi + (m_dst_start_addr % m_dst_pitch); + if ((dst_x == std::clamp(dst_x, m_clip_left, m_clip_right)) ^ clip_external) + continue; + } + + const u8 src = (this->*get_src_table[src_select])(src_base, xi); + const u8 dst = m_vga->read_memory(xi + dst_base); + const u8 dot = (m_pattern_data[pattern_base] >> (7 - x) & 1); + // ROP and pattern depends on pattern + // win98se start menu hovering depends on this + const u8 res = GetROP(dot ? m_fg_rop : m_bg_rop, src, dst, dot ? m_fg_color : m_bg_color) & 0xff; + m_vga->write_memory(xi + dst_base, res & 0xff); + } + } + + break; + } + case 3: + { + const bool major_axis = !!BIT(m_draw_command, 10); + const bool last_pixel = !!BIT(m_draw_command, 11); + LOG("\tLine: major axis %s %d\n", major_axis ? "Y" : "X", !last_pixel); + // ... + break; + } + } + +} + /* * AGP overrides */ diff --git a/src/devices/bus/pci/sis6326.h b/src/devices/bus/pci/sis6326.h index bd79771a13e..ab5db4f566b 100644 --- a/src/devices/bus/pci/sis6326.h +++ b/src/devices/bus/pci/sis6326.h @@ -14,7 +14,8 @@ class sis6326_pci_device : public pci_card_device public: sis6326_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - static constexpr feature_type unemulated_features() { return feature::GRAPHICS; } + // Partial working 2d graphics, no Turbo Queue, no 3d graphics, no TV Out + static constexpr feature_type imperfect_features() { return feature::GRAPHICS; } protected: sis6326_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -42,6 +43,37 @@ private: u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); + + // BitBlt engine + void trigger_2d_command(); + u32 m_src_start_addr; + u32 m_dst_start_addr; + u8 m_draw_sel; + u16 m_src_pitch, m_dst_pitch; + u16 m_rect_width, m_rect_height; + u32 m_fg_color, m_bg_color; + u8 m_fg_rop, m_bg_rop; + u8 m_mask[8]; + u16 m_clip_top, m_clip_left, m_clip_bottom, m_clip_right; + + u16 m_draw_command; + u8 m_pattern_data[128]; + + typedef u8 (sis6326_pci_device::*get_src_func)(u32 offset_base, u32 x); + static const get_src_func get_src_table[4]; + u8 get_src_bgcol(u32 offset_base, u32 x); + u8 get_src_fgcol(u32 offset_base, u32 x); + u8 get_src_mem(u32 offset_base, u32 x); + u8 get_src_cpu(u32 offset_base, u32 x); + + typedef u8 (sis6326_pci_device::*get_pat_func)(u32 offset_base, u32 x); + static const get_pat_func get_pat_table[4]; + u8 get_pat_bgcol(u32 y, u32 x); + u8 get_pat_fgcol(u32 y, u32 x); + u8 get_pat_regs(u32 y, u32 x); + u8 get_pat_ddraw(u32 y, u32 x); + u32 GetROP(u8 rop, u32 src, u32 dst, u32 pat); + }; class sis6326_agp_device : public sis6326_pci_device diff --git a/src/devices/video/pc_vga_matrox.cpp b/src/devices/video/pc_vga_matrox.cpp index f9551f21935..27b65ac35dc 100644 --- a/src/devices/video/pc_vga_matrox.cpp +++ b/src/devices/video/pc_vga_matrox.cpp @@ -732,22 +732,22 @@ uint32_t matrox_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &b static int m_test_trigger = 1; const int m_test_y = cliprect.max_y; - if(machine().input().code_pressed(JOYCODE_X_RIGHT_SWITCH)) + if(machine().input().code_pressed(JOYCODE_HAT1RIGHT)) m_test_x += 1 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 4 : 0); - if(machine().input().code_pressed(JOYCODE_X_LEFT_SWITCH)) + if(machine().input().code_pressed(JOYCODE_HAT1LEFT)) m_test_x -= 1 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 4 : 0); - //if(machine().input().code_pressed(JOYCODE_Y_DOWN_SWITCH)) + //if(machine().input().code_pressed(JOYCODE_HAT1DOWN)) // m_test_y++; - //if(machine().input().code_pressed(JOYCODE_Y_UP_SWITCH)) + //if(machine().input().code_pressed(JOYCODE_HAT1UP)) // m_test_y--; - if(machine().input().code_pressed(JOYCODE_Y_DOWN_SWITCH)) + if(machine().input().code_pressed(JOYCODE_HAT1DOWN)) m_start_offs+= 0x100 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 8 : 0); - if(machine().input().code_pressed(JOYCODE_Y_UP_SWITCH)) + if(machine().input().code_pressed(JOYCODE_HAT1UP)) m_start_offs-= 0x100 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 8 : 0); m_start_offs %= vga.svga_intf.vram_size; diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 6302a6d9d34..0359520ff8c 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -78,6 +78,7 @@ void sis6326_vga_device::device_start() save_item(NAME(m_crtc_unlock_reg)); save_item(NAME(m_seq_unlock_reg)); + save_item(NAME(m_ramdac_mode)); save_item(NAME(m_ext_sr07)); save_item(NAME(m_ext_sr0b)); save_item(NAME(m_ext_sr0c)); @@ -115,6 +116,7 @@ void sis6326_vga_device::device_reset() m_crtc_unlock_reg = false; m_seq_unlock_reg = false; + m_ramdac_mode = 0; m_ext_sr07 = m_ext_sr0b = m_ext_sr0c = m_ext_sr23 = m_ext_sr33 = 0; m_ext_sr34 = m_ext_sr35 = m_ext_sr38 = m_ext_sr39 = m_ext_sr3c = 0; m_ext_ge26 = m_ext_ge27 = 0; @@ -803,26 +805,26 @@ uint32_t sis6326_vga_device::screen_update(screen_device &screen, bitmap_rgb32 & } #if DEBUG_VRAM_VIEWER - static int m_test_x = 640, m_start_offs; + static int m_test_x = 1024, m_start_offs; static int m_test_trigger = 1; const int m_test_y = cliprect.max_y; - if(machine().input().code_pressed(KEYCODE_RIGHT)) + if(machine().input().code_pressed(JOYCODE_HAT1RIGHT)) m_test_x += 1 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 4 : 0); - if(machine().input().code_pressed(KEYCODE_LEFT)) + if(machine().input().code_pressed(JOYCODE_HAT1LEFT)) m_test_x -= 1 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 4 : 0); - //if(machine().input().code_pressed(JOYCODE_Y_DOWN_SWITCH)) + //if(machine().input().code_pressed(JOYCODE_HAT1DOWN)) // m_test_y++; - //if(machine().input().code_pressed(JOYCODE_Y_UP_SWITCH)) + //if(machine().input().code_pressed(JOYCODE_HAT1UP)) // m_test_y--; - if(machine().input().code_pressed(KEYCODE_DOWN)) + if(machine().input().code_pressed(JOYCODE_HAT1DOWN)) m_start_offs+= 0x100 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 8 : 0); - if(machine().input().code_pressed(KEYCODE_UP)) + if(machine().input().code_pressed(JOYCODE_HAT1UP)) m_start_offs-= 0x100 << (machine().input().code_pressed(JOYCODE_BUTTON2) ? 8 : 0); m_start_offs %= vga.svga_intf.vram_size; diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index e903bc65bc7..0b771d75a90 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -31,6 +31,16 @@ public: void cursor_mmio_w(offs_t offset, u16 data, u16 mem_mask); + u8 read_memory(u32 address) + { + return vga.memory[address % vga.svga_intf.vram_size]; + } + + void write_memory(u32 address, u8 data) + { + vga.memory[address % vga.svga_intf.vram_size] = data; + } + protected: sis6326_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); From 9b51ff6f5ea545b20fe6ba12ce356c82651fe147 Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 26 Feb 2026 20:59:51 +0100 Subject: [PATCH 059/351] machine/vt82c586b_isa.cpp: add IDE and ACPI irq routing --- src/devices/machine/bitmap_printer.cpp | 2 +- src/devices/machine/vt82c586b_acpi.cpp | 7 +++-- src/devices/machine/vt82c586b_acpi.h | 4 +++ src/devices/machine/vt82c586b_isa.cpp | 39 +++++++++++++++++++------- src/devices/machine/vt82c586b_isa.h | 12 ++++++++ src/mame/pc/pcipc_via.cpp | 13 +++++---- 6 files changed, 58 insertions(+), 19 deletions(-) diff --git a/src/devices/machine/bitmap_printer.cpp b/src/devices/machine/bitmap_printer.cpp index ca552a14694..a522411fb68 100644 --- a/src/devices/machine/bitmap_printer.cpp +++ b/src/devices/machine/bitmap_printer.cpp @@ -284,7 +284,7 @@ void bitmap_printer_device::draw_printhead(bitmap_rgb32 &bitmap, int x, int y) void bitmap_printer_device::draw7seg(u8 data, bool is_digit, int x0, int y0, int width, int height, int thick, bitmap_rgb32 &bitmap, u32 color, u32 erasecolor) { // pass nonzero erasecolor to erase blank segments - const u8 pat[] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7f, 0x6f, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x71 }; + const u8 pat[] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x07, 0x7f, 0x6f, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x71 }; u8 seg = is_digit ? pat[data & 0xf] : data; if (BIT(seg,0) || erasecolor) bitmap.plot_box(x0, y0, width, thick, BIT(seg,0) ? color : erasecolor); diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index 4bfc84a4069..53802e1a3d4 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -44,6 +44,7 @@ DEFINE_DEVICE_TYPE(ACPI_PIPC, acpi_pipc_device, "acpi_pipc", "ACPI PIPC") vt82c586b_acpi_device::vt82c586b_acpi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, VT82C586B_ACPI, tag, owner, clock) , m_acpi(*this, "acpi") + , m_sci_pin_cb(*this) { // xxxx ---- Silicon Version Code // ---- xxxx Silicon Revision Code @@ -110,7 +111,8 @@ void vt82c586b_acpi_device::config_map(address_map &map) NAME([this] () { return m_sci_irq_config; }), NAME([this] (offs_t offset, u8 data) { m_sci_irq_config = data & 0xf; - LOG("42h: SCI Interrupt Configuration %02x\n", data); + LOG("42h: SCI Interrupt Configuration %02x (%d)\n", data, data); + m_sci_pin_cb(m_sci_irq_config); }) ); map(0x44, 0x47).lrw16( @@ -334,7 +336,8 @@ void acpi_pipc_device::io_map(address_map &map) m_pmcntrl |= (data & 0x3c) << 8; if (BIT(m_pmcntrl, 13)) { - LOGACPI("SLP_EN Sleep Enable issued %d\n", (m_pmcntrl >> 10) & 7); + const u8 slp_typ = (m_pmcntrl >> 10) & 7; + LOGACPI("SLP_EN Sleep Enable issued %d\n", slp_typ); // TODO: SLP_EN cannot be '1' // (generates a suspend mode if enabled, flips to '0') } diff --git a/src/devices/machine/vt82c586b_acpi.h b/src/devices/machine/vt82c586b_acpi.h index b67e5bb2608..bbc3514ffc4 100644 --- a/src/devices/machine/vt82c586b_acpi.h +++ b/src/devices/machine/vt82c586b_acpi.h @@ -16,6 +16,8 @@ class vt82c586b_acpi_device : public pci_device public: vt82c586b_acpi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + auto sci_pin_cb() { return m_sci_pin_cb.bind(); } + protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; @@ -28,6 +30,7 @@ protected: void acpi_map(address_map &map) ATTR_COLD; private: required_device m_acpi; + devcb_write8 m_sci_pin_cb; u8 m_pin_config; u8 m_general_config; @@ -94,6 +97,7 @@ private: void gp_sci_enable_w(offs_t offset, u8 data); void check_smi(); +// void check_sci(); }; DECLARE_DEVICE_TYPE(VT82C586B_ACPI, vt82c586b_acpi_device) diff --git a/src/devices/machine/vt82c586b_isa.cpp b/src/devices/machine/vt82c586b_isa.cpp index 847f2b8f810..59e6aca6f57 100644 --- a/src/devices/machine/vt82c586b_isa.cpp +++ b/src/devices/machine/vt82c586b_isa.cpp @@ -180,6 +180,9 @@ void vt82c586b_isa_device::device_start() save_item(NAME(m_pirqrc)); save_item(NAME(m_mirq)); save_item(NAME(m_mirq_pin_config)); + + save_item(NAME(m_ide_pin_config)); + save_item(NAME(m_acpi_pin_config)); } void vt82c586b_isa_device::device_reset() @@ -201,6 +204,8 @@ void vt82c586b_isa_device::device_reset() m_dma_control_typef = 0; std::fill(std::begin(m_misc_control), std::end(m_misc_control), 0); m_ide_irq_routing = 0x00 | (1 << 2) | (0 << 0); + m_ide_pin_config[0] = 14; + m_ide_pin_config[1] = 15; std::fill(std::begin(m_pirqrc), std::end(m_pirqrc), 0); std::fill(std::begin(m_mirq), std::end(m_mirq), 0); m_mirq_pin_config = 0; @@ -301,13 +306,7 @@ void vt82c586b_isa_device::config_map(address_map &map) // TODO: remap cb for bit 3 }) ); - map(0x4a, 0x4a).lrw8( - NAME([this] () { return m_ide_irq_routing; }), - NAME([this] (offs_t offset, u8 data) { - m_ide_irq_routing = data; - LOG("4Ah: IDE Interrupt Routing %02x\n", data); - }) - ); + map(0x4a, 0x4a).rw(FUNC(vt82c586b_isa_device::ide_irq_routing_r), FUNC(vt82c586b_isa_device::ide_irq_routing_w)); map(0x4c, 0x4c).lrw8( NAME([this] () { return m_pci_memory_hole_bottom; }), NAME([this] (offs_t offset, u8 data) { @@ -428,6 +427,21 @@ void vt82c586b_isa_device::config_map(address_map &map) // 0x70 ~ 0x73 Subsystem ID } +u8 vt82c586b_isa_device::ide_irq_routing_r(offs_t offset) +{ + return m_ide_irq_routing; +} + +void vt82c586b_isa_device::ide_irq_routing_w(offs_t offset, u8 data) +{ + m_ide_irq_routing = data; + LOG("4Ah: IDE Interrupt Routing %02x\n", data); + static const u8 irq_nums[4] = { 14, 15, 10, 11 }; + m_ide_pin_config[0] = irq_nums[m_ide_irq_routing & 3]; + m_ide_pin_config[1] = irq_nums[(m_ide_irq_routing >> 2) & 3]; + LOG("\tIDE Primary IRQ%d Secondary IRQ%d", m_ide_pin_config[0], m_ide_pin_config[1]); +} + void vt82c586b_isa_device::internal_io_map(address_map &map) { map(0x0000, 0x001f).rw(m_dma[0], FUNC(am9517a_device::read), FUNC(am9517a_device::write)); @@ -825,9 +839,6 @@ void vt82c586b_isa_device::redirect_irq(int irq, int state) { case 0: case 2: - case 8: - case 13: - break; // Claims irq 1 to be selectable vs. other PCI ISAs case 1: m_pic[0]->ir1_w(state); @@ -847,9 +858,14 @@ void vt82c586b_isa_device::redirect_irq(int irq, int state) case 7: m_pic[0]->ir7_w(state); break; + // selectable by SCI irq + case 8: + m_pic[1]->ir0_w(state); + break; case 9: m_pic[1]->ir1_w(state); break; + // selectable by SCI irq case 10: m_pic[1]->ir2_w(state); break; @@ -859,6 +875,9 @@ void vt82c586b_isa_device::redirect_irq(int irq, int state) case 12: m_pic[1]->ir4_w(state); break; + case 13: + m_pic[1]->ir5_w(state); + break; case 14: m_pic[1]->ir6_w(state); break; diff --git a/src/devices/machine/vt82c586b_isa.h b/src/devices/machine/vt82c586b_isa.h index 0e276793cd9..9aea3f51b90 100644 --- a/src/devices/machine/vt82c586b_isa.h +++ b/src/devices/machine/vt82c586b_isa.h @@ -42,6 +42,13 @@ public: auto cpureset() { return m_write_cpureset.bind(); } auto pcirst() { return m_write_pcirst.bind(); } + // external, from ACPI + void acpi_pin_config_w(u8 data) { m_acpi_pin_config = data & 0xf; } + void pc_acpi_w(int state) { redirect_irq(m_acpi_pin_config, state); } + + void pc_ide0_w(int state) { redirect_irq(m_ide_pin_config[0], state); } + void pc_ide1_w(int state) { redirect_irq(m_ide_pin_config[1], state); } + void pc_irq1_w(int state); void pc_irq3_w(int state); void pc_irq4_w(int state); @@ -196,6 +203,11 @@ private: u8 m_pirq_select; u8 m_mirq[3]; u8 m_mirq_pin_config; + + u8 ide_irq_routing_r(offs_t offset); + void ide_irq_routing_w(offs_t offset, u8 data); + u8 m_ide_pin_config[2]; + u8 m_acpi_pin_config; }; DECLARE_DEVICE_TYPE(VT82C586B_ISA, vt82c586b_isa_device) diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index 90b7ea64ba9..32b32898635 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -130,15 +130,16 @@ void mvp3_state::mvp3(machine_config &config) //isa.smi().set_inputline("maincpu", INPUT_LINE_SMI); vt82c586b_ide_device &ide(VT82C586B_IDE(config, "pci:07.1", 0, m_maincpu)); - // TODO: use ad-hoc remapping from ISA - ide.irq_pri().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_irq14_w)); - ide.irq_sec().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_irq15_w)); + ide.irq_pri().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_ide0_w)); + ide.irq_sec().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_ide1_w)); VT82C586B_USB (config, "pci:07.2", 0); - VT82C586B_ACPI(config, "pci:07.3", 0); - acpi_pipc_device &acpi_dev(ACPI_PIPC (config, "pci:07.3:acpi")); + + vt82c586b_acpi_device &acpi_pci(VT82C586B_ACPI(config, "pci:07.3", 0)); + acpi_pci.sci_pin_cb().set("pci:07.0", FUNC(vt82c586b_isa_device::acpi_pin_config_w)); + acpi_pipc_device &acpi_dev(ACPI_PIPC(config, "pci:07.3:acpi")); acpi_dev.smi().set_inputline("maincpu", INPUT_LINE_SMI); -// acpi_dev.sci().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_irq12m_w)); + acpi_dev.sci().set("pci:07.0", FUNC(vt82c586b_isa_device::pc_acpi_w)); PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, nullptr); From ed346880755b7d144600475a0f860305b0d3fc5a Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 26 Feb 2026 22:00:19 +0100 Subject: [PATCH 060/351] video/pc_vga_sis.cpp: add line compare "disable", fix display at 1600x1200 --- src/devices/bus/pci/sis6326.cpp | 16 +++++----- src/devices/video/pc_vga_sis.cpp | 51 ++++++++++++++++++++++---------- src/devices/video/pc_vga_sis.h | 2 ++ 3 files changed, 46 insertions(+), 23 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 6bb7dc70ec3..03eb7e35a2c 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -132,26 +132,26 @@ void sis6326_pci_device::mmio_map(address_map &map) map(0x8288, 0x8289).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_src_pitch); - m_src_pitch &= 0x7ff; + m_src_pitch &= 0xfff; }) ); map(0x828a, 0x828b).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_dst_pitch); - m_dst_pitch &= 0x7ff; + m_dst_pitch &= 0xfff; }) ); map(0x828c, 0x828d).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_rect_width); - m_rect_width &= 0x7ff; + m_rect_width &= 0xfff; m_rect_width ++; }) ); map(0x828e, 0x828f).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_rect_height); - m_rect_height &= 0x7ff; + m_rect_height &= 0xfff; m_rect_height ++; }) ); @@ -175,25 +175,25 @@ void sis6326_pci_device::mmio_map(address_map &map) map(0x82a0, 0x82a1).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_clip_left); - m_clip_left &= 0x7ff; + m_clip_left &= 0xfff; }) ); map(0x82a2, 0x82a3).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_clip_top); - m_clip_top &= 0x7ff; + m_clip_top &= 0xfff; }) ); map(0x82a4, 0x82a5).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_clip_right); - m_clip_right &= 0x7ff; + m_clip_right &= 0xfff; }) ); map(0x82a6, 0x82a7).lw16( NAME([this] (offs_t offset, u16 data, u16 mem_mask) { COMBINE_DATA(&m_clip_bottom); - m_clip_bottom &= 0x7ff; + m_clip_bottom &= 0xfff; }) ); diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 0359520ff8c..8e88f7e0dfa 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -2,25 +2,28 @@ // copyright-holders:Angelo Salese /************************************************************************************************** -Implementation of SiS family (S)VGA chipset (SiS630) +Implementation of SiS family (S)VGA chipset -VBE 3.0, Multi Buffering & Virtual Scrolling available +SiS6326: VBE 2.0, Multi Buffering & Virtual Scrolling available +SiS630: VBE 3.0, Multi Buffering & Virtual Scrolling available TODO: - Extended 4bpp modes don't work (cfr. SDD item); - Refresh rate for extended modes; -- interlace; -- linear addressing; -- HW cursor; -- Output scaling, cfr. xubuntu 6.10 splash screen at 1024x768x32; +- interlace scaling; +- linear addressing +\- currently hardwired in BAR0, which matches the setup done here. What happens when it don't? - Interrupts; - Verify single segment mode; -- AGP/HostBus/Turbo Queue i/f; -- 2D/3D pipeline; +- AGP/HostBus/Turbo Queue i/f (as separate device, currently in sis6326 PCI); - DDC; -- Bridge with a secondary TV out (SiS301); -- Verify matches with other SiS PCI cards, backport; -- sis630: fails banked modes (different setup?), fails extended start addresses; +- Bridge with a secondary TV out (SiS301 for '630); +- Verify matches with earlier SiS PCI cards, backport; +- win98se: dxdiag eventually craps out at the end of Direct Draw testing, why? + +TODO (sis630): +- Output scaling, cfr. xubuntu 6.10 splash screen at 1024x768x32 (really interlace as above?); +- fails banked modes (different setup?), fails extended start addresses; **************************************************************************************************/ @@ -36,10 +39,17 @@ TODO: #define DEBUG_VRAM_VIEWER 0 -// TODO: later variant of 5598 -// (definitely doesn't have dual segment mode for instance) -DEFINE_DEVICE_TYPE(SIS6326_VGA, sis6326_vga_device, "sis6326_vga", "SiS 6326 VGA i/f") -DEFINE_DEVICE_TYPE(SIS630_VGA, sis630_vga_device, "sis630_vga", "SiS 630 VGA i/f") +// NOTE: several of these are actually MB integrated with different names + +// retroactively known as 6201 in drivers +//DEFINE_DEVICE_TYPE(SIS86C201_VGA, sis86c201_vga_device, "sis86c201_vga", "SiS 86C201 VGA i/f") +//DEFINE_DEVICE_TYPE(SIS6202_VGA, sis6202_vga_device, "sis6202_vga", "SiS 6202 VGA i/f") +//DEFINE_DEVICE_TYPE(SIS6205_VGA, sis6205_vga_device, "sis6205_vga", "SiS 6205 VGA i/f") +//DEFINE_DEVICE_TYPE(SIS6225_VGA, sis6225_vga_device, "sis6225_vga", "SiS 6225 VGA i/f") +//DEFINE_DEVICE_TYPE(SIS6215_VGA, sis6215_vga_device, "sis6215_vga", "SiS 6215 VGA i/f") + +DEFINE_DEVICE_TYPE(SIS6326_VGA, sis6326_vga_device, "sis6326_vga", "SiS 6326 VGA i/f") +DEFINE_DEVICE_TYPE(SIS630_VGA, sis630_vga_device, "sis630_vga", "SiS 630 VGA i/f") sis6326_vga_device::sis6326_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : sis6326_vga_device(mconfig, SIS6326_VGA, tag, owner, clock) @@ -601,6 +611,10 @@ void sis6326_vga_device::sequencer_map(address_map &map) m_ext_sr38 = data; m_cursor.address_base &= ~0x3c'0000; m_cursor.address_base |= (data >> 4) << 18; + // TODO: doc claims to be line compare disable, may just be bit 10 really? + // testable at 1600x1200, needs HW test + vga.crtc.line_compare = (vga.crtc.line_compare & 0x3ff) | (BIT(data, 2) * 0xfc00); + //vga.crtc.line_compare = (vga.crtc.line_compare & 0x3ff) | (BIT(data, 2) << 10); }) ); // ---x ---- Select external TVCLK as internal TVCLK enable @@ -733,6 +747,13 @@ uint16_t sis6326_vga_device::offset() return svga_device::offset(); } +u16 sis6326_vga_device::line_compare_mask() +{ + // trick to make line compare to never occur + // (assuming it's true, cfr. above) + return 0x3ff | (vga.crtc.line_compare & 0xfc00); +} + uint8_t sis6326_vga_device::mem_r(offs_t offset) { if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en) diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index 0b771d75a90..5bdeb2dc2b7 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -116,6 +116,8 @@ protected: virtual std::tuple flush_true_color_mode(); // TODO: 1024x768x16bpp wants it, mapped odd/even //virtual bool get_interlace_mode() override { return BIT(m_ramdac_mode, 5); } + + virtual u16 line_compare_mask() override; }; class sis630_vga_device : public sis6326_vga_device From 3781db17e2d016798d269e14367ff6b62761ff0e Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 26 Feb 2026 23:50:58 +0100 Subject: [PATCH 061/351] pc/pcipc.cpp: hookup IT8671F to pcipctx, allows partial boot --- src/mame/jaleco/jaleco_vj_pc.cpp | 2 +- src/mame/pc/pcipc.cpp | 71 +++++++++++++++++++++++++++----- 2 files changed, 61 insertions(+), 12 deletions(-) diff --git a/src/mame/jaleco/jaleco_vj_pc.cpp b/src/mame/jaleco/jaleco_vj_pc.cpp index 893ef25d1fd..9782716c525 100644 --- a/src/mame/jaleco/jaleco_vj_pc.cpp +++ b/src/mame/jaleco/jaleco_vj_pc.cpp @@ -111,7 +111,7 @@ void jaleco_vj_pc_device::device_add_mconfig(machine_config &config) m_maincpu->smiact().set("pci:00.0", FUNC(i82439hx_host_device::smi_act_w)); PCI_ROOT(config, "pci", 0); - I82439HX(config, "pci:00.0", 0, m_maincpu, 256*1024*1024); // TODO: Should be 0x05851106 VIA VT82C585 Apollo VP,VPX,VPX-97 System Controller + I82439HX(config, "pci:00.0", 0, m_maincpu, 256*1024*1024); // TODO: Should be 0x11060585 VIA VT82C585 Apollo VP,VPX,VPX-97 System Controller i82371sb_isa_device &isa(I82371SB_ISA(config, "pci:07.0", 0, m_maincpu)); // isa.set_ids(0x11060586, 0x23, 0x060100, 0x00000000); // TODO: Should be VIA VT82C586B, PCI-to-ISA Bridge diff --git a/src/mame/pc/pcipc.cpp b/src/mame/pc/pcipc.cpp index 8cb295ac76e..db4af1684ce 100644 --- a/src/mame/pc/pcipc.cpp +++ b/src/mame/pc/pcipc.cpp @@ -36,6 +36,7 @@ #include "machine/i82439hx.h" #include "machine/i82439tx.h" #include "machine/i82443bx_host.h" +#include "machine/it8671f.h" #include "machine/pci.h" #include "machine/w83977tf.h" @@ -84,6 +85,7 @@ private: static void smc_superio_config(device_t *device); static void smc707_superio_config(device_t *device); static void winbond_superio_config(device_t *device); + static void ite_superio_config(device_t *device); }; pcipc_state::pcipc_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) @@ -506,6 +508,7 @@ static void isa_internal_devices(device_slot_interface &device) device.option_add("fdc37c93x", FDC37C93X); device.option_add("fdc37m707", FDC37M707); device.option_add("w83977tf", W83977TF); + device.option_add("it8671f", IT8671F); } static void isa_com(device_slot_interface &device) @@ -568,6 +571,22 @@ void pcipc_state::winbond_superio_config(device_t *device) // fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); } +void pcipc_state::ite_superio_config(device_t *device) +{ + // TODO: IT8679F (same ID as 8671F) + it8671f_device &ite = *downcast(device); + ite.krst_gpio2().set_inputline(":maincpu", INPUT_LINE_RESET); + ite.ga20_gpio6().set(":pci:07.0", FUNC(i82371eb_isa_device::a20gate_w)); + ite.irq1().set(":pci:07.0", FUNC(i82371eb_isa_device::pc_irq1_w)); + ite.irq8().set(":pci:07.0", FUNC(i82371eb_isa_device::pc_irq8n_w)); + ite.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); + ite.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); + ite.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); + ite.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); + ite.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); + ite.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); +} + void pcipc_state::pcipc_map(address_map &map) { @@ -653,20 +672,55 @@ void pcipc_state::pcipcs7(machine_config &config) void pcipc_state::pcipctx(machine_config &config) { + // Socket 7 / PGA321 pentium_device &maincpu(PENTIUM(config, "maincpu", 60000000)); maincpu.set_irq_acknowledge_callback("pci:07.0:pic8259_master", FUNC(pic8259_device::inta_cb)); +// maincpu.smiact().set("pci:00.0", FUNC(i82439tx_host_device::smi_act_w)); PCI_ROOT(config, "pci", 0); I82439TX(config, "pci:00.0", 0, "maincpu", 256*1024*1024); - i82371sb_isa_device &isa(I82371SB_ISA(config, "pci:07.0", 0, "maincpu")); + // Really 'AB + // IT8680F claims to have an RTC but it doesn't seem enabled, assume internal RTC used instead. + i82371eb_isa_device &isa(I82371EB_ISA(config, "pci:07.0", 0, "maincpu", true)); isa.boot_state_hook().set(FUNC(pcipc_state::boot_state_award_w)); +// isa.smi().set_inputline("maincpu", INPUT_LINE_SMI); + isa.a20m().set_inputline("maincpu", INPUT_LINE_A20); + + i82371eb_ide_device &ide(I82371EB_IDE(config, "pci:07.1", 0, "maincpu")); + ide.irq_pri().set("pci:07.0", FUNC(i82371eb_isa_device::pc_irq14_w)); + ide.irq_sec().set("pci:07.0", FUNC(i82371eb_isa_device::pc_mirq0_w)); + + I82371EB_USB (config, "pci:07.2", 0); + I82371EB_ACPI(config, "pci:07.3", 0); + ACPI_PIIX4 (config, "pci:07.3:acpi"); + SMBUS (config, "pci:07.3:smbus", 0); PCI_SLOT(config, "pci:1", pci_cards, 15, 0, 1, 2, 3, nullptr); PCI_SLOT(config, "pci:2", pci_cards, 16, 1, 2, 3, 0, nullptr); PCI_SLOT(config, "pci:3", pci_cards, 17, 2, 3, 0, 1, nullptr); PCI_SLOT(config, "pci:4", pci_cards, 18, 3, 0, 1, 2, "mga2064w"); + ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "it8671f", true).set_option_machine_config("it8671f", ite_superio_config); + ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "isa2", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "isa3", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + + rs232_port_device &serport0(RS232_PORT(config, "serport0", isa_com, nullptr)); + serport0.rxd_handler().set("board4:it8671f", FUNC(it8671f_device::rxd1_w)); + serport0.dcd_handler().set("board4:it8671f", FUNC(it8671f_device::ndcd1_w)); + serport0.dsr_handler().set("board4:it8671f", FUNC(it8671f_device::ndsr1_w)); + serport0.ri_handler().set("board4:it8671f", FUNC(it8671f_device::nri1_w)); + serport0.cts_handler().set("board4:it8671f", FUNC(it8671f_device::ncts1_w)); + + rs232_port_device &serport1(RS232_PORT(config, "serport1", isa_com, nullptr)); + serport1.rxd_handler().set("board4:it8671f", FUNC(it8671f_device::rxd2_w)); + serport1.dcd_handler().set("board4:it8671f", FUNC(it8671f_device::ndcd2_w)); + serport1.dsr_handler().set("board4:it8671f", FUNC(it8671f_device::ndsr2_w)); + serport1.ri_handler().set("board4:it8671f", FUNC(it8671f_device::nri2_w)); + serport1.cts_handler().set("board4:it8671f", FUNC(it8671f_device::ncts2_w)); + + x86_softlists(config); } @@ -802,8 +856,6 @@ ROM_START(pcipc) // FIXME: this is incompatible, it's a Gigabyte GA-586HX with W83877F Super I/O ROM_SYSTEM_BIOS(3, "5hx29", "5hx29") ROMX_LOAD("5hx29.bin", 0x20000, 0x20000, CRC(07719a55) SHA1(b63993fd5186cdb4f28c117428a507cd069e1f68), ROM_BIOS(3) ) -// ROM_REGION(0x8000,"ibm_vga", 0) -// ROM_LOAD("ibm-vga.bin", 0x00000, 0x8000, BAD_DUMP CRC(74e3fadb) SHA1(dce6491424f1726203776dfae9a967a98a4ba7b5) ) ROM_END #define rom_pcipcs7 rom_pcipc @@ -812,9 +864,6 @@ ROM_START(pcipctx) ROM_REGION32_LE(0x40000, "pci:07.0", 0) /* PC bios */ ROM_SYSTEM_BIOS(0, "ga586t2", "Gigabyte GA-586T2") // ITE 8679 I/O ROMX_LOAD("gb_ga586t2.bin", 0x20000, 0x20000, CRC(3a50a6e1) SHA1(dea859b4f1492d0d08aacd260ed1e83e00ebac08), ROM_BIOS(0)) - - ROM_REGION(0x8000,"ibm_vga", 0) - ROM_LOAD("ibm-vga.bin", 0x00000, 0x8000, BAD_DUMP CRC(74e3fadb) SHA1(dce6491424f1726203776dfae9a967a98a4ba7b5) ) ROM_END ROM_START(pciagp) @@ -862,8 +911,8 @@ ROM_END } // anonymous namespace -COMP(1998, pcipc, 0, 0, pcipc, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI PC (430HX)", MACHINE_NO_SOUND ) -COMP(1998, pcipcs7, pcipc, 0, pcipcs7, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI PC (430HX, Socket 7 CPU)", MACHINE_NO_SOUND ) // alternative of above, for running already installed OSes at their nominal speed + fiddling with MMX -COMP(1998, pcipctx, 0, 0, pcipctx, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI PC (430TX)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) // unemulated super I/O -COMP(1999, pciagp, 0, 0, pciagp, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI/AGP PC (440BX)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) // eventually PnP breaks OS booting, AGP cards aren't good enough, has issues with PCI pin mapper (no ROM present?) -COMP(1998, se440bx2, 0, 0, se440bx2,0, pcipc_state, empty_init, "Intel", "SE440BX-2 \"Seattle 2\"", MACHINE_NO_SOUND | MACHINE_NOT_WORKING) // Initial rev in '98. Black screen, never wake up video card after SMI. Wants better ACPI, eventually do the same SMBus loop as midqslvr.cpp +COMP(1998, pcipc, 0, 0, pcipc, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI PC (430HX)", 0 ) +COMP(1998, pcipcs7, pcipc, 0, pcipcs7, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI PC (430HX, Socket 7 CPU)", 0 ) // alternative of above, for running already installed OSes at their nominal speed + fiddling with MMX +COMP(1998, pcipctx, 0, 0, pcipctx, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI PC (430TX)", MACHINE_NOT_WORKING) // shows the initial Award logo then crashes on ISA state 0xbf: chipset init +COMP(1999, pciagp, 0, 0, pciagp, 0, pcipc_state, empty_init, "Hack Inc.", "Sandbox PCI/AGP PC (440BX)", MACHINE_NOT_WORKING) // eventually PnP breaks OS booting, AGP cards aren't good enough, has issues with PCI pin mapper (no ROM present?) +COMP(1998, se440bx2, 0, 0, se440bx2,0, pcipc_state, empty_init, "Intel", "SE440BX-2 \"Seattle 2\"", MACHINE_NOT_WORKING) // Initial rev in '98. Black screen, never wake up video card after SMI. Wants better ACPI, eventually do the same SMBus loop as midqslvr.cpp From 1b6d94aec6f774a32f1fdac235c4a580cc35e34c Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 27 Feb 2026 14:37:20 +1100 Subject: [PATCH 062/351] capcom/lastduel.cpp: Reduced RAM size for Last Duel. [Jim Westfall] --- src/mame/capcom/lastduel.cpp | 16 +++++++-------- src/mame/capcom/lastduel_v.cpp | 37 +++++++++++++++++----------------- 2 files changed, 26 insertions(+), 27 deletions(-) diff --git a/src/mame/capcom/lastduel.cpp b/src/mame/capcom/lastduel.cpp index 294733dd162..0aa34f1214e 100644 --- a/src/mame/capcom/lastduel.cpp +++ b/src/mame/capcom/lastduel.cpp @@ -161,11 +161,11 @@ void lastduel_state::lastduel_map(address_map &map) map(0xfc4004, 0xfc4005).portr("DSW1"); map(0xfc4006, 0xfc4007).portr("DSW2"); map(0xfc8000, 0xfc800f).w(FUNC(lastduel_state::vctrl_w)); - map(0xfcc000, 0xfcdfff).ram().w(FUNC(lastduel_state::txram_w)).share("txram"); - map(0xfd0000, 0xfd3fff).ram().w(FUNC(lastduel_state::lastduel_vram_w<0>)).share("vram_0"); - map(0xfd4000, 0xfd7fff).ram().w(FUNC(lastduel_state::lastduel_vram_w<1>)).share("vram_1"); + map(0xfcc000, 0xfcdfff).ram().w(FUNC(lastduel_state::txram_w)).share(m_txram); + map(0xfd0000, 0xfd3fff).ram().w(FUNC(lastduel_state::lastduel_vram_w<0>)).share(m_vram[0]); + map(0xfd4000, 0xfd7fff).ram().w(FUNC(lastduel_state::lastduel_vram_w<1>)).share(m_vram[1]); map(0xfd8000, 0xfd87ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0xfe0000, 0xffffff).ram(); + map(0xfe0000, 0xfe7fff).mirror(0x018000).ram(); } void lastduel_state::madgear_map(address_map &map) @@ -178,11 +178,11 @@ void lastduel_state::madgear_map(address_map &map) map(0xfc4003, 0xfc4003).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0xfc4004, 0xfc4005).portr("P1_P2"); map(0xfc4006, 0xfc4007).portr("SYSTEM"); - map(0xfc8000, 0xfc9fff).ram().w(FUNC(lastduel_state::txram_w)).share("txram"); + map(0xfc8000, 0xfc9fff).ram().w(FUNC(lastduel_state::txram_w)).share(m_txram); map(0xfcc000, 0xfcc7ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); map(0xfd0000, 0xfd000f).w(FUNC(lastduel_state::vctrl_w)); - map(0xfd4000, 0xfd7fff).ram().w(FUNC(lastduel_state::madgear_vram_w<0>)).share("vram_0"); - map(0xfd8000, 0xfdffff).ram().w(FUNC(lastduel_state::madgear_vram_w<1>)).share("vram_1"); + map(0xfd4000, 0xfd7fff).ram().w(FUNC(lastduel_state::madgear_vram_w<0>)).share(m_vram[0]); + map(0xfd8000, 0xfdffff).ram().w(FUNC(lastduel_state::madgear_vram_w<1>)).share(m_vram[1]); map(0xff0000, 0xffffff).ram(); } @@ -205,7 +205,7 @@ void lastduel_state::mg_bankswitch_w(uint8_t data) void lastduel_state::madgear_sound_map(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xcfff).bankr("audiobank"); + map(0x8000, 0xcfff).bankr(m_audiobank); map(0xd000, 0xd7ff).ram(); map(0xf000, 0xf001).rw("ym1", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); map(0xf002, 0xf003).rw("ym2", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); diff --git a/src/mame/capcom/lastduel_v.cpp b/src/mame/capcom/lastduel_v.cpp index 18bbd23bfea..1ffe562b5f1 100644 --- a/src/mame/capcom/lastduel_v.cpp +++ b/src/mame/capcom/lastduel_v.cpp @@ -116,12 +116,12 @@ VIDEO_START_MEMBER(lastduel_state,madgear) void lastduel_state::flip_w(uint8_t data) { - flip_screen_set(data & 0x01); + flip_screen_set(BIT(data, 0)); - machine().bookkeeping().coin_lockout_w(0, ~data & 0x10); - machine().bookkeeping().coin_lockout_w(1, ~data & 0x20); - machine().bookkeeping().coin_counter_w(0, data & 0x40); - machine().bookkeeping().coin_counter_w(1, data & 0x80); + machine().bookkeeping().coin_lockout_w(0, BIT(~data, 4)); + machine().bookkeeping().coin_lockout_w(1, BIT(~data, 5)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 7)); } void lastduel_state::vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) @@ -133,6 +133,7 @@ void lastduel_state::vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) case 1: m_tilemap[0]->set_scrollx(0, data); break; case 2: m_tilemap[1]->set_scrolly(0, data); break; case 3: m_tilemap[1]->set_scrollx(0, data); break; + //case 4: sprite DMA trigger case 7: m_tilemap_priority = data; break; default: logerror("Unmapped video write %d %04x\n", offset, data); @@ -166,7 +167,7 @@ rgb_t lastduel_state::lastduel_RRRRGGGGBBBBIIII(uint32_t raw) void lastduel_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect, int pri ) { - const uint16_t *buffered_spriteram16 = m_spriteram->buffer(); + uint16_t const *const buffered_spriteram16 = m_spriteram->buffer(); int offs; if (!m_sprite_pri_mask) @@ -175,9 +176,7 @@ void lastduel_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &clipre for (offs = 0x400 - 4; offs >= 0; offs -= 4) { - int attr, sy, sx, flipx, flipy, code, color; - - attr = buffered_spriteram16[offs + 1]; + int const attr = buffered_spriteram16[offs + 1]; if (m_sprite_pri_mask) /* only madgear seems to have this */ { if (pri == 1 && (attr & m_sprite_pri_mask)) @@ -186,15 +185,15 @@ void lastduel_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &clipre continue; } - code = buffered_spriteram16[offs]; - sx = buffered_spriteram16[offs + 3] & 0x1ff; - sy = buffered_spriteram16[offs + 2] & 0x1ff; + int const code = buffered_spriteram16[offs]; + int sx = buffered_spriteram16[offs + 3] & 0x1ff; + int sy = buffered_spriteram16[offs + 2] & 0x1ff; if (sy > 0x100) sy -= 0x200; - flipx = attr & 0x20; - flipy = attr & m_sprite_flipy_mask; /* 0x40 for lastduel, 0x80 for madgear */ - color = attr & 0x0f; + int flipx = attr & 0x20; + int flipy = attr & m_sprite_flipy_mask; /* 0x40 for lastduel, 0x80 for madgear */ + int const color = attr & 0x0f; if (flip_screen()) { @@ -205,10 +204,10 @@ void lastduel_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &clipre } m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, - code, - color, - flipx,flipy, - sx,sy,15); + code, + color, + flipx,flipy, + sx, sy, 15); } } From 9eb45e183eec229236e171ae8be5baf08d6fba5d Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 27 Feb 2026 13:21:54 +0100 Subject: [PATCH 063/351] mario: add note about mcu internal rom --- src/mame/nintendo/mario.cpp | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/src/mame/nintendo/mario.cpp b/src/mame/nintendo/mario.cpp index e1583f0206c..1b9008b1aa4 100644 --- a/src/mame/nintendo/mario.cpp +++ b/src/mame/nintendo/mario.cpp @@ -40,6 +40,9 @@ TODO: - draw_sprites should adopt the scanline logic from dkong, the schematics have the same logic for sprite buffering - a lot of soundlatch warnings in error.log, it's probably harmless +- Dump M58715 internal ROM. The EA pin dumping method does not work, is the + MCU read protected? It's probably a small initialization routine, followed + by a jump to external ROM. MAME has a fake bootstrap for now. BTANB: - erratic line at top when scrolling down "Mario Bros" title is confirmed @@ -273,15 +276,15 @@ void mario_state::machine_reset() void mario_state::sound_start() { - uint8_t *SND = memregion("audiocpu")->base(); - - // Hack to bootstrap MCU program into external MB1 - SND[0x0000] = 0xf5; - SND[0x0001] = 0x04; - SND[0x0002] = 0x00; - for (int i = 0; i < 2; i++) m_walk_timer[i] = timer_alloc(FUNC(mario_state::walk_off), this); + + // Hack to bootstrap MCU program into external MB1 + uint8_t *SND = memregion("audiocpu")->base(); + + SND[0x0000] = 0xf5; // sel mb1 + SND[0x0001] = 0x04; // jmp 0 + SND[0x0002] = 0x00; } void mario_state::sound_reset() From 48b16d570fb06113bb5d248e4913f4f8599d05a5 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 27 Feb 2026 13:22:23 +0100 Subject: [PATCH 064/351] lastduel: remove unneeded variables, init palette to black --- src/mame/capcom/lastduel.cpp | 5 ++-- src/mame/capcom/lastduel.h | 6 ++-- src/mame/capcom/lastduel_v.cpp | 52 ++++++++++++++-------------------- 3 files changed, 25 insertions(+), 38 deletions(-) diff --git a/src/mame/capcom/lastduel.cpp b/src/mame/capcom/lastduel.cpp index 0aa34f1214e..c0b8da62be1 100644 --- a/src/mame/capcom/lastduel.cpp +++ b/src/mame/capcom/lastduel.cpp @@ -504,7 +504,6 @@ MACHINE_START_MEMBER(lastduel_state,lastduel) MACHINE_START_MEMBER(lastduel_state,madgear) { uint8_t *ROM = memregion("audiocpu")->base(); - m_audiobank->configure_entries(0, 2, &ROM[0x8000], 0x4000); MACHINE_START_CALL_MEMBER(lastduel); @@ -540,7 +539,7 @@ void lastduel_state::lastduel(machine_config &config) BUFFERED_SPRITERAM16(config, m_spriteram); GFXDECODE(config, m_gfxdecode, m_palette, gfx_lastduel); - PALETTE(config, m_palette).set_format(2, &lastduel_state::lastduel_RRRRGGGGBBBBIIII, 1024); + PALETTE(config, m_palette, palette_device::BLACK).set_format(2, &lastduel_state::lastduel_RRRRGGGGBBBBIIII, 1024); MCFG_VIDEO_START_OVERRIDE(lastduel_state,lastduel) @@ -579,7 +578,7 @@ void lastduel_state::madgear(machine_config &config) BUFFERED_SPRITERAM16(config, m_spriteram); GFXDECODE(config, m_gfxdecode, m_palette, gfx_lastduel); - PALETTE(config, m_palette).set_format(2, &lastduel_state::lastduel_RRRRGGGGBBBBIIII, 1024); + PALETTE(config, m_palette, palette_device::BLACK).set_format(2, &lastduel_state::lastduel_RRRRGGGGBBBBIIII, 1024); MCFG_VIDEO_START_OVERRIDE(lastduel_state,madgear) diff --git a/src/mame/capcom/lastduel.h b/src/mame/capcom/lastduel.h index c62aa1274c8..91c481ff8e2 100644 --- a/src/mame/capcom/lastduel.h +++ b/src/mame/capcom/lastduel.h @@ -53,9 +53,7 @@ private: tilemap_t *m_tilemap[2]{}; tilemap_t *m_tx_tilemap = nullptr; uint16_t m_vctrl[8]{}; - int m_sprite_flipy_mask = 0; - int m_sprite_pri_mask = 0; - int m_tilemap_priority = 0; + uint16_t m_tilemap_priority = 0; void mg_bankswitch_w(uint8_t data); void flip_w(uint8_t data); @@ -78,7 +76,7 @@ private: uint32_t screen_update_madgear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void lastduel_interrupt(int state); void madgear_interrupt(int state); - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri); + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int pri_mask, int flipy_mask); void lastduel_map(address_map &map) ATTR_COLD; void madgear_map(address_map &map) ATTR_COLD; void madgear_sound_map(address_map &map) ATTR_COLD; diff --git a/src/mame/capcom/lastduel_v.cpp b/src/mame/capcom/lastduel_v.cpp index 1ffe562b5f1..a134396dbdd 100644 --- a/src/mame/capcom/lastduel_v.cpp +++ b/src/mame/capcom/lastduel_v.cpp @@ -85,10 +85,6 @@ VIDEO_START_MEMBER(lastduel_state,lastduel) m_tilemap[0]->set_transmask(0, 0xffff, 0x0001); m_tilemap[0]->set_transmask(1, 0xf07f, 0x0f81); m_tx_tilemap->set_transparent_pen(3); - - m_sprite_flipy_mask = 0x40; - m_sprite_pri_mask = 0x00; - m_tilemap_priority = 0; } VIDEO_START_MEMBER(lastduel_state,madgear) @@ -101,9 +97,6 @@ VIDEO_START_MEMBER(lastduel_state,madgear) m_tilemap[0]->set_transmask(1, 0x80ff, 0xff00); m_tx_tilemap->set_transparent_pen(3); m_tilemap[1]->set_transparent_pen(15); - - m_sprite_flipy_mask = 0x80; - m_sprite_pri_mask = 0x10; } @@ -159,40 +152,36 @@ rgb_t lastduel_state::lastduel_RRRRGGGGBBBBIIII(uint32_t raw) return rgb_t(red, green, blue); } + /*************************************************************************** Display refresh ***************************************************************************/ -void lastduel_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect, int pri ) +void lastduel_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int pri_mask, int flipy_mask) { - uint16_t const *const buffered_spriteram16 = m_spriteram->buffer(); - int offs; + uint16_t const *const spriteram = m_spriteram->buffer(); - if (!m_sprite_pri_mask) - if (pri == 1) - return; /* only low priority sprites in lastduel */ - - for (offs = 0x400 - 4; offs >= 0; offs -= 4) + for (int offs = 0x400 - 4; offs >= 0; offs -= 4) { - int const attr = buffered_spriteram16[offs + 1]; - if (m_sprite_pri_mask) /* only madgear seems to have this */ + int const attr = spriteram[offs + 1]; + if (pri_mask) // only madgear seems to have this { - if (pri == 1 && (attr & m_sprite_pri_mask)) + if (pri == 1 && (attr & pri_mask)) continue; - if (pri == 0 && !(attr & m_sprite_pri_mask)) + if (pri == 0 && !(attr & pri_mask)) continue; } - int const code = buffered_spriteram16[offs]; - int sx = buffered_spriteram16[offs + 3] & 0x1ff; - int sy = buffered_spriteram16[offs + 2] & 0x1ff; + int const code = spriteram[offs]; + int sx = spriteram[offs + 3] & 0x1ff; + int sy = spriteram[offs + 2] & 0x1ff; if (sy > 0x100) sy -= 0x200; int flipx = attr & 0x20; - int flipy = attr & m_sprite_flipy_mask; /* 0x40 for lastduel, 0x80 for madgear */ + int flipy = attr & flipy_mask; // 0x40 for lastduel, 0x80 for madgear int const color = attr & 0x0f; if (flip_screen()) @@ -213,33 +202,34 @@ void lastduel_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &clipre uint32_t lastduel_state::screen_update_lastduel(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - m_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0); + m_tilemap[1]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0); - draw_sprites(bitmap, cliprect, 0); + draw_sprites(bitmap, cliprect, 0, 0, 0x40); m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); - draw_sprites(bitmap, cliprect, 1); m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); + return 0; } uint32_t lastduel_state::screen_update_madgear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - if (m_tilemap_priority) + if (m_tilemap_priority & 0x80) { m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1 | TILEMAP_DRAW_OPAQUE, 0); - draw_sprites(bitmap, cliprect, 0); + draw_sprites(bitmap, cliprect, 0, 0x10, 0x80); m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); m_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0); - draw_sprites(bitmap, cliprect, 1); + draw_sprites(bitmap, cliprect, 1, 0x10, 0x80); } else { m_tilemap[1]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0); - draw_sprites(bitmap, cliprect, 0); + draw_sprites(bitmap, cliprect, 0, 0x10, 0x80); m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); - draw_sprites(bitmap, cliprect, 1); + draw_sprites(bitmap, cliprect, 1, 0x10, 0x80); } m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); + return 0; } From 4a77749aa2a09f02d350cd13e8e81d373b0c1acb Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 27 Feb 2026 13:47:38 +0100 Subject: [PATCH 065/351] lastduel: merge driver --- src/mame/capcom/lastduel.cpp | 482 ++++++++++++++++++++++++++++----- src/mame/capcom/lastduel.h | 86 ------ src/mame/capcom/lastduel_v.cpp | 235 ---------------- src/mame/nintendo/mario.cpp | 1 + 4 files changed, 409 insertions(+), 395 deletions(-) delete mode 100644 src/mame/capcom/lastduel.h delete mode 100644 src/mame/capcom/lastduel_v.cpp diff --git a/src/mame/capcom/lastduel.cpp b/src/mame/capcom/lastduel.cpp index c0b8da62be1..cb17c4da00b 100644 --- a/src/mame/capcom/lastduel.cpp +++ b/src/mame/capcom/lastduel.cpp @@ -1,6 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Bryan McPhail -/************************************************************************** +/******************************************************************************* Last Duel - Capcom, 1988 LED Storm - Capcom, 1988 @@ -118,20 +118,350 @@ Notes: 81301 - ? (SDIP28) 29 - 63S141 bipolar PROM (DIP16) -**************************************************************************/ +*******************************************************************************/ #include "emu.h" -#include "lastduel.h" -#include "cpu/z80/z80.h" #include "cpu/m68000/m68000.h" +#include "cpu/z80/z80.h" +#include "machine/gen_latch.h" #include "sound/okim6295.h" #include "sound/ymopn.h" +#include "video/bufsprite.h" + +#include "emupal.h" #include "screen.h" #include "speaker.h" +#include "tilemap.h" -/******************************************************************************/ +namespace { + +class lastduel_state : public driver_device +{ +public: + lastduel_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_gfxdecode(*this, "gfxdecode"), + m_palette(*this, "palette"), + m_soundlatch(*this, "soundlatch"), + m_spriteram(*this, "spriteram"), + m_txram(*this, "txram"), + m_vram(*this, "vram_%u", 0U), + m_audiobank(*this, "audiobank") + { } + + void init_madgear(); + + void lastduel(machine_config &config); + void madgear(machine_config &config); + +protected: + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + +private: + TILE_GET_INFO_MEMBER(ld_get_bg_tile_info); + TILE_GET_INFO_MEMBER(ld_get_fg_tile_info); + TILE_GET_INFO_MEMBER(get_bg_tile_info); + TILE_GET_INFO_MEMBER(get_fg_tile_info); + TILE_GET_INFO_MEMBER(get_fix_info); + static rgb_t lastduel_RRRRGGGGBBBBIIII(uint32_t raw); + DECLARE_VIDEO_START(lastduel); + DECLARE_VIDEO_START(madgear); + + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int pri_mask, int flipy_mask); + uint32_t screen_update_lastduel(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_madgear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void flip_w(uint8_t data); + void vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void txram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + template void lastduel_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + template void madgear_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void lastduel_interrupt(int state); + void madgear_interrupt(int state); + + void lastduel_map(address_map &map) ATTR_COLD; + void madgear_map(address_map &map) ATTR_COLD; + void sound_map(address_map &map) ATTR_COLD; + void madgear_sound_map(address_map &map) ATTR_COLD; + + // devices + required_device m_maincpu; + required_device m_audiocpu; + required_device m_gfxdecode; + required_device m_palette; + required_device m_soundlatch; + + // memory pointers + required_device m_spriteram; + required_shared_ptr m_txram; + required_shared_ptr_array m_vram; + + optional_memory_bank m_audiobank; + + // video-related + tilemap_t *m_tilemap[2]{}; + tilemap_t *m_tx_tilemap = nullptr; + uint16_t m_vctrl[8]{}; + uint16_t m_tilemap_priority = 0; +}; + + + +/******************************************************************************* + + Machine initialization + +*******************************************************************************/ + +void lastduel_state::init_madgear() +{ + uint8_t *ROM = memregion("audiocpu")->base(); + m_audiobank->configure_entries(0, 2, &ROM[0x8000], 0x4000); +} + +void lastduel_state::machine_start() +{ + save_item(NAME(m_tilemap_priority)); + save_item(NAME(m_vctrl)); +} + +void lastduel_state::machine_reset() +{ + m_tilemap_priority = 0; + + for (int i = 0; i < 8; i++) + m_vctrl[i] = 0; +} + + + +/******************************************************************************* + + Callbacks for the TileMap code + +*******************************************************************************/ + +TILE_GET_INFO_MEMBER(lastduel_state::ld_get_bg_tile_info) +{ + int const tile = m_vram[1][2 * tile_index] & 0x1fff; + int const color = m_vram[1][2 * tile_index + 1]; + tileinfo.set(2, + tile,color & 0xf, + TILE_FLIPYX((color & 0x60) >> 5)); +} + +TILE_GET_INFO_MEMBER(lastduel_state::ld_get_fg_tile_info) +{ + int const tile = m_vram[0][2 * tile_index] & 0x1fff; + int const color = m_vram[0][2 * tile_index + 1]; + tileinfo.set(3, + tile, + color & 0xf, + TILE_FLIPYX((color & 0x60) >> 5)); + tileinfo.group = (color & 0x80) >> 7; +} + +TILE_GET_INFO_MEMBER(lastduel_state::get_bg_tile_info) +{ + int const tile = m_vram[1][tile_index] & 0x1fff; + int const color = m_vram[1][tile_index + 0x0800]; + tileinfo.set(2, + tile, + color & 0xf, + TILE_FLIPYX((color & 0x60) >> 5)); +} + +TILE_GET_INFO_MEMBER(lastduel_state::get_fg_tile_info) +{ + int const tile = m_vram[0][tile_index] & 0x1fff; + int const color = m_vram[0][tile_index + 0x0800]; + tileinfo.set(3, + tile, + color & 0xf, + TILE_FLIPYX((color & 0x60) >> 5)); + tileinfo.group = (color & 0x10) >> 4; +} + +TILE_GET_INFO_MEMBER(lastduel_state::get_fix_info) +{ + int const tile = m_txram[tile_index]; + tileinfo.set(1, + tile & 0x7ff, + tile>>12, + (tile & 0x800) ? TILE_FLIPY : 0); +} + + + +/******************************************************************************* + + Start the video hardware emulation + +*******************************************************************************/ + +rgb_t lastduel_state::lastduel_RRRRGGGGBBBBIIII(uint32_t raw) +{ + // Brightness parameter interpreted same way as CPS1 + int const bright = 0x10 + (raw & 0x0f); + + int const red = ((raw >> 12) & 0x0f) * bright * 0x11 / 0x1f; + int const green = ((raw >> 8) & 0x0f) * bright * 0x11 / 0x1f; + int const blue = ((raw >> 4) & 0x0f) * bright * 0x11 / 0x1f; + + return rgb_t(red, green, blue); +} + +VIDEO_START_MEMBER(lastduel_state,lastduel) +{ + m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::ld_get_bg_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 64, 64); + m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::ld_get_fg_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 64, 64); + m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_fix_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + + m_tilemap[0]->set_transmask(0, 0xffff, 0x0001); + m_tilemap[0]->set_transmask(1, 0xf07f, 0x0f81); + m_tx_tilemap->set_transparent_pen(3); +} + +VIDEO_START_MEMBER(lastduel_state,madgear) +{ + m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_bg_tile_info)), TILEMAP_SCAN_COLS, 16, 16, 64, 32); + m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_fg_tile_info)), TILEMAP_SCAN_COLS, 16, 16, 64, 32); + m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_fix_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + + m_tilemap[0]->set_transmask(0, 0xffff, 0x8000); + m_tilemap[0]->set_transmask(1, 0x80ff, 0xff00); + m_tx_tilemap->set_transparent_pen(3); + m_tilemap[1]->set_transparent_pen(15); +} + + + +/******************************************************************************* + + Display refresh + +*******************************************************************************/ + +void lastduel_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int pri_mask, int flipy_mask) +{ + uint16_t const *const spriteram = m_spriteram->buffer(); + + for (int offs = 0x400 - 4; offs >= 0; offs -= 4) + { + int const attr = spriteram[offs + 1]; + if (pri_mask) // only madgear seems to have this + { + if (pri == 1 && (attr & pri_mask)) + continue; + if (pri == 0 && !(attr & pri_mask)) + continue; + } + + int const code = spriteram[offs]; + int sx = spriteram[offs + 3] & 0x1ff; + int sy = spriteram[offs + 2] & 0x1ff; + if (sy > 0x100) + sy -= 0x200; + + int flipx = attr & 0x20; + int flipy = attr & flipy_mask; // 0x40 for lastduel, 0x80 for madgear + int const color = attr & 0x0f; + + if (flip_screen()) + { + sx = 496 - sx; + sy = 240 - sy; + flipx = !flipx; + flipy = !flipy; + } + + m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, + code, + color, + flipx,flipy, + sx, sy, 15); + } +} + +uint32_t lastduel_state::screen_update_lastduel(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + m_tilemap[1]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); + m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0); + draw_sprites(bitmap, cliprect, 0, 0, 0x40); + m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); + m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + return 0; +} + +uint32_t lastduel_state::screen_update_madgear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + if (m_tilemap_priority & 0x80) + { + m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1 | TILEMAP_DRAW_OPAQUE, 0); + draw_sprites(bitmap, cliprect, 0, 0x10, 0x80); + m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); + m_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0); + draw_sprites(bitmap, cliprect, 1, 0x10, 0x80); + } + else + { + m_tilemap[1]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); + m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0); + draw_sprites(bitmap, cliprect, 0, 0x10, 0x80); + m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); + draw_sprites(bitmap, cliprect, 1, 0x10, 0x80); + } + m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + return 0; +} + + + +/******************************************************************************* + + Memory handlers + +*******************************************************************************/ + +void lastduel_state::flip_w(uint8_t data) +{ + flip_screen_set(BIT(data, 0)); + + machine().bookkeeping().coin_lockout_w(0, BIT(~data, 4)); + machine().bookkeeping().coin_lockout_w(1, BIT(~data, 5)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 7)); +} + +void lastduel_state::vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + data = COMBINE_DATA(&m_vctrl[offset]); + switch (offset) + { + case 0: m_tilemap[0]->set_scrolly(0, data); break; + case 1: m_tilemap[0]->set_scrollx(0, data); break; + case 2: m_tilemap[1]->set_scrolly(0, data); break; + case 3: m_tilemap[1]->set_scrollx(0, data); break; + //case 4: sprite DMA trigger + case 7: m_tilemap_priority = data; break; + default: + logerror("Unmapped video write %d %04x\n", offset, data); + break; + } +} + +void lastduel_state::txram_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_txram[offset]); + m_tx_tilemap->mark_tile_dirty(offset); +} template void lastduel_state::lastduel_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask) @@ -147,12 +477,35 @@ void lastduel_state::madgear_vram_w(offs_t offset, uint16_t data, uint16_t mem_m m_tilemap[Layer]->mark_tile_dirty(offset & 0x7ff); } -/******************************************************************************/ + +void lastduel_state::lastduel_interrupt(int state) +{ + if (state) + m_maincpu->set_input_line(2, HOLD_LINE); // vblank + else + m_maincpu->set_input_line(4, HOLD_LINE); // controls +} + +void lastduel_state::madgear_interrupt(int state) +{ + if (state) + m_maincpu->set_input_line(5, HOLD_LINE); // vblank + else + m_maincpu->set_input_line(6, HOLD_LINE); // controls +} + + + +/******************************************************************************* + + Address maps + +*******************************************************************************/ void lastduel_state::lastduel_map(address_map &map) { map(0x000000, 0x05ffff).rom(); - map(0xfc0000, 0xfc0003).nopw(); /* Written rarely */ + map(0xfc0000, 0xfc0003).nopw(); // written rarely map(0xfc0800, 0xfc0fff).ram().share("spriteram"); map(0xfc4000, 0xfc4001).portr("P1_P2"); map(0xfc4001, 0xfc4001).w(FUNC(lastduel_state::flip_w)); @@ -186,8 +539,6 @@ void lastduel_state::madgear_map(address_map &map) map(0xff0000, 0xffffff).ram(); } -/******************************************************************************/ - void lastduel_state::sound_map(address_map &map) { map(0x0000, 0xdfff).rom(); @@ -197,11 +548,6 @@ void lastduel_state::sound_map(address_map &map) map(0xf800, 0xf800).r(m_soundlatch, FUNC(generic_latch_8_device::read)); } -void lastduel_state::mg_bankswitch_w(uint8_t data) -{ - m_audiobank->set_entry(data & 0x01); -} - void lastduel_state::madgear_sound_map(address_map &map) { map(0x0000, 0x7fff).rom(); @@ -211,10 +557,16 @@ void lastduel_state::madgear_sound_map(address_map &map) map(0xf002, 0xf003).rw("ym2", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); map(0xf004, 0xf004).w("oki", FUNC(okim6295_device::write)); map(0xf006, 0xf006).r(m_soundlatch, FUNC(generic_latch_8_device::read)); - map(0xf00a, 0xf00a).w(FUNC(lastduel_state::mg_bankswitch_w)); + map(0xf00a, 0xf00a).lw8(NAME([this] (uint8_t data) { m_audiobank->set_entry(data & 0x01); })); } -/******************************************************************************/ + + +/******************************************************************************* + + Input ports + +*******************************************************************************/ static INPUT_PORTS_START( lastduel ) PORT_START("P1_P2") @@ -434,7 +786,12 @@ static INPUT_PORTS_START( leds2011p ) INPUT_PORTS_END -/******************************************************************************/ + +/******************************************************************************* + + GFX layouts + +*******************************************************************************/ static const gfx_layout sprite_layout = { @@ -477,58 +834,24 @@ static GFXDECODE_START( gfx_lastduel ) GFXDECODE_ENTRY( "gfx4", 0, madgear_tile, 0x100, 16 ) /* colors 0x100-0x1ff */ GFXDECODE_END -/******************************************************************************/ -void lastduel_state::lastduel_interrupt(int state) -{ - if (state) - m_maincpu->set_input_line(2, HOLD_LINE); // vblank - else - m_maincpu->set_input_line(4, HOLD_LINE); // controls -} -void lastduel_state::madgear_interrupt(int state) -{ - if (state) - m_maincpu->set_input_line(5, HOLD_LINE); // vblank - else - m_maincpu->set_input_line(6, HOLD_LINE); // controls -} +/******************************************************************************* -MACHINE_START_MEMBER(lastduel_state,lastduel) -{ - save_item(NAME(m_tilemap_priority)); - save_item(NAME(m_vctrl)); -} + Machine configs -MACHINE_START_MEMBER(lastduel_state,madgear) -{ - uint8_t *ROM = memregion("audiocpu")->base(); - m_audiobank->configure_entries(0, 2, &ROM[0x8000], 0x4000); - - MACHINE_START_CALL_MEMBER(lastduel); -} - -void lastduel_state::machine_reset() -{ - m_tilemap_priority = 0; - - for (int i = 0; i < 8; i++) - m_vctrl[i] = 0; -} +*******************************************************************************/ void lastduel_state::lastduel(machine_config &config) { - /* basic machine hardware */ + // basic machine hardware M68000(config, m_maincpu, 10_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &lastduel_state::lastduel_map); Z80(config, m_audiocpu, 3.579545_MHz_XTAL); m_audiocpu->set_addrmap(AS_PROGRAM, &lastduel_state::sound_map); - MCFG_MACHINE_START_OVERRIDE(lastduel_state,lastduel) - - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(24_MHz_XTAL / 3, 512, 64, 448, 272, 8, 248); screen.set_screen_update(FUNC(lastduel_state::screen_update_lastduel)); @@ -543,7 +866,7 @@ void lastduel_state::lastduel(machine_config &config) MCFG_VIDEO_START_OVERRIDE(lastduel_state,lastduel) - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); GENERIC_LATCH_8(config, m_soundlatch); @@ -558,16 +881,14 @@ void lastduel_state::lastduel(machine_config &config) void lastduel_state::madgear(machine_config &config) { - /* basic machine hardware */ + // basic machine hardware M68000(config, m_maincpu, 10_MHz_XTAL); m_maincpu->set_addrmap(AS_PROGRAM, &lastduel_state::madgear_map); Z80(config, m_audiocpu, 3.579545_MHz_XTAL); m_audiocpu->set_addrmap(AS_PROGRAM, &lastduel_state::madgear_sound_map); - MCFG_MACHINE_START_OVERRIDE(lastduel_state,madgear) - - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(24_MHz_XTAL / 3, 512, 64, 448, 272, 8, 248); // measured 57.4444Hz screen.set_screen_update(FUNC(lastduel_state::screen_update_madgear)); @@ -582,7 +903,7 @@ void lastduel_state::madgear(machine_config &config) MCFG_VIDEO_START_OVERRIDE(lastduel_state,madgear) - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); GENERIC_LATCH_8(config, m_soundlatch); @@ -598,7 +919,12 @@ void lastduel_state::madgear(machine_config &config) oki.add_route(ALL_OUTPUTS, "mono", 0.98); } -/******************************************************************************/ + +/******************************************************************************* + + ROM definitions + +*******************************************************************************/ ROM_START( lastduel ) ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */ @@ -948,19 +1274,27 @@ ROM_START( leds2011p ) /* CAPCOM 87616A-2 PCB connected to a CAPCOM 87616B-2 + 4 ROM_LOAD( "63s141an.15k", 0x0000, 0x0100, CRC(7f862e1e) SHA1(7134c4f741463007a177d55922e1284d132f60e3) ) /* priority (not used) BPROM type MMI 63S141AN or compatible like 82S129A */ ROM_END -/******************************************************************************/ +} // anonymous namespace -GAME( 1988, lastduel, 0, lastduel, lastduel, lastduel_state, empty_init, ROT270, "Capcom", "Last Duel (US New Ver.)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, lastduelo, lastduel, lastduel, lastduel, lastduel_state, empty_init, ROT270, "Capcom", "Last Duel (US Old Ver.)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, lastduelj, lastduel, lastduel, lastduel, lastduel_state, empty_init, ROT270, "Capcom", "Last Duel (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, lastduelb, lastduel, lastduel, lastduel, lastduel_state, empty_init, ROT270, "bootleg", "Last Duel (bootleg)", MACHINE_SUPPORTS_SAVE ) + + +/******************************************************************************* + + Game drivers + +*******************************************************************************/ + +GAME( 1988, lastduel, 0, lastduel, lastduel, lastduel_state, empty_init, ROT270, "Capcom", "Last Duel (US New Ver.)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, lastduelo, lastduel, lastduel, lastduel, lastduel_state, empty_init, ROT270, "Capcom", "Last Duel (US Old Ver.)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, lastduelj, lastduel, lastduel, lastduel, lastduel_state, empty_init, ROT270, "Capcom", "Last Duel (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, lastduelb, lastduel, lastduel, lastduel, lastduel_state, empty_init, ROT270, "bootleg", "Last Duel (bootleg)", MACHINE_SUPPORTS_SAVE ) // are both Mad Gear and Led Storm really US sets, both have a (c) Capcom USA, but so do several World sets from Capcom during this era, including Led Storm Rally 2011. None of these display a region warning, 2011 does. // the region warning text is however still present in the ROM (albeit unused) and does appear to indicate both are US sets, so it's possible the title was revised to avoid confusion with the older Led Storm Rally 2011. -GAME( 1989, madgear, 0, madgear, madgear, lastduel_state, empty_init, ROT270, "Capcom", "Mad Gear (US)", MACHINE_SUPPORTS_SAVE ) -GAME( 1989, madgearj, madgear, madgear, madgear, lastduel_state, empty_init, ROT270, "Capcom", "Mad Gear (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, ledstorm, madgear, madgear, madgear, lastduel_state, empty_init, ROT270, "Capcom", "Led Storm (US)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, madgear, 0, madgear, madgear, lastduel_state, init_madgear, ROT270, "Capcom", "Mad Gear (US)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, madgearj, madgear, madgear, madgear, lastduel_state, init_madgear, ROT270, "Capcom", "Mad Gear (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, ledstorm, madgear, madgear, madgear, lastduel_state, init_madgear, ROT270, "Capcom", "Led Storm (US)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, leds2011, 0, madgear, leds2011, lastduel_state, empty_init, ROT270, "Capcom", "Led Storm Rally 2011 (World)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, leds2011u, leds2011, madgear, leds2011, lastduel_state, empty_init, ROT270, "Capcom", "Led Storm Rally 2011 (US)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, leds2011p, leds2011, madgear, leds2011p,lastduel_state, empty_init, ROT270, "Capcom", "Led Storm Rally 2011 (US, prototype 12)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, leds2011, 0, madgear, leds2011, lastduel_state, init_madgear, ROT270, "Capcom", "Led Storm Rally 2011 (World)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, leds2011u, leds2011, madgear, leds2011, lastduel_state, init_madgear, ROT270, "Capcom", "Led Storm Rally 2011 (US)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, leds2011p, leds2011, madgear, leds2011p,lastduel_state, init_madgear, ROT270, "Capcom", "Led Storm Rally 2011 (US, prototype 12)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/capcom/lastduel.h b/src/mame/capcom/lastduel.h deleted file mode 100644 index 91c481ff8e2..00000000000 --- a/src/mame/capcom/lastduel.h +++ /dev/null @@ -1,86 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Bryan McPhail -/************************************************************************* - - Last Duel - -*************************************************************************/ -#ifndef MAME_CAPCOM_LASTDUEL_H -#define MAME_CAPCOM_LASTDUEL_H - -#pragma once - -#include "machine/gen_latch.h" -#include "video/bufsprite.h" -#include "emupal.h" -#include "tilemap.h" - -class lastduel_state : public driver_device -{ -public: - lastduel_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_audiocpu(*this, "audiocpu"), - m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette"), - m_soundlatch(*this, "soundlatch"), - m_spriteram(*this, "spriteram"), - m_txram(*this, "txram"), - m_vram(*this, "vram_%u", 0U), - m_audiobank(*this, "audiobank") - { } - - void lastduel(machine_config &config); - void madgear(machine_config &config); - -private: - /* devices */ - required_device m_maincpu; - required_device m_audiocpu; - required_device m_gfxdecode; - required_device m_palette; - required_device m_soundlatch; - - /* memory pointers */ - required_device m_spriteram; - required_shared_ptr m_txram; - required_shared_ptr_array m_vram; - - optional_memory_bank m_audiobank; - - /* video-related */ - tilemap_t *m_tilemap[2]{}; - tilemap_t *m_tx_tilemap = nullptr; - uint16_t m_vctrl[8]{}; - uint16_t m_tilemap_priority = 0; - - void mg_bankswitch_w(uint8_t data); - void flip_w(uint8_t data); - void vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - template void lastduel_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void txram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - template void madgear_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - static rgb_t lastduel_RRRRGGGGBBBBIIII(uint32_t raw); - TILE_GET_INFO_MEMBER(ld_get_bg_tile_info); - TILE_GET_INFO_MEMBER(ld_get_fg_tile_info); - TILE_GET_INFO_MEMBER(get_bg_tile_info); - TILE_GET_INFO_MEMBER(get_fg_tile_info); - TILE_GET_INFO_MEMBER(get_fix_info); - virtual void machine_reset() override ATTR_COLD; - DECLARE_MACHINE_START(lastduel); - DECLARE_VIDEO_START(lastduel); - DECLARE_MACHINE_START(madgear); - DECLARE_VIDEO_START(madgear); - uint32_t screen_update_lastduel(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_madgear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void lastduel_interrupt(int state); - void madgear_interrupt(int state); - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int pri_mask, int flipy_mask); - void lastduel_map(address_map &map) ATTR_COLD; - void madgear_map(address_map &map) ATTR_COLD; - void madgear_sound_map(address_map &map) ATTR_COLD; - void sound_map(address_map &map) ATTR_COLD; -}; - -#endif // MAME_CAPCOM_LASTDUEL_H diff --git a/src/mame/capcom/lastduel_v.cpp b/src/mame/capcom/lastduel_v.cpp deleted file mode 100644 index a134396dbdd..00000000000 --- a/src/mame/capcom/lastduel_v.cpp +++ /dev/null @@ -1,235 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Bryan McPhail -/*************************************************************************** - - video.c - - Functions to emulate the video hardware of the machine. - -***************************************************************************/ - -#include "emu.h" -#include "lastduel.h" - - -/*************************************************************************** - - Callbacks for the TileMap code - -***************************************************************************/ - -TILE_GET_INFO_MEMBER(lastduel_state::ld_get_bg_tile_info) -{ - int const tile = m_vram[1][2 * tile_index] & 0x1fff; - int const color = m_vram[1][2 * tile_index + 1]; - tileinfo.set(2, - tile,color & 0xf, - TILE_FLIPYX((color & 0x60) >> 5)); -} - -TILE_GET_INFO_MEMBER(lastduel_state::ld_get_fg_tile_info) -{ - int const tile = m_vram[0][2 * tile_index] & 0x1fff; - int const color = m_vram[0][2 * tile_index + 1]; - tileinfo.set(3, - tile, - color & 0xf, - TILE_FLIPYX((color & 0x60) >> 5)); - tileinfo.group = (color & 0x80) >> 7; -} - -TILE_GET_INFO_MEMBER(lastduel_state::get_bg_tile_info) -{ - int const tile = m_vram[1][tile_index] & 0x1fff; - int const color = m_vram[1][tile_index + 0x0800]; - tileinfo.set(2, - tile, - color & 0xf, - TILE_FLIPYX((color & 0x60) >> 5)); -} - -TILE_GET_INFO_MEMBER(lastduel_state::get_fg_tile_info) -{ - int const tile = m_vram[0][tile_index] & 0x1fff; - int const color = m_vram[0][tile_index + 0x0800]; - tileinfo.set(3, - tile, - color & 0xf, - TILE_FLIPYX((color & 0x60) >> 5)); - tileinfo.group = (color & 0x10) >> 4; -} - -TILE_GET_INFO_MEMBER(lastduel_state::get_fix_info) -{ - int const tile = m_txram[tile_index]; - tileinfo.set(1, - tile & 0x7ff, - tile>>12, - (tile & 0x800) ? TILE_FLIPY : 0); -} - - - -/*************************************************************************** - - Start the video hardware emulation. - -***************************************************************************/ - -VIDEO_START_MEMBER(lastduel_state,lastduel) -{ - m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::ld_get_bg_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 64, 64); - m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::ld_get_fg_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 64, 64); - m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_fix_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - - m_tilemap[0]->set_transmask(0, 0xffff, 0x0001); - m_tilemap[0]->set_transmask(1, 0xf07f, 0x0f81); - m_tx_tilemap->set_transparent_pen(3); -} - -VIDEO_START_MEMBER(lastduel_state,madgear) -{ - m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_bg_tile_info)), TILEMAP_SCAN_COLS, 16, 16, 64, 32); - m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_fg_tile_info)), TILEMAP_SCAN_COLS, 16, 16, 64, 32); - m_tx_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(lastduel_state::get_fix_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - - m_tilemap[0]->set_transmask(0, 0xffff, 0x8000); - m_tilemap[0]->set_transmask(1, 0x80ff, 0xff00); - m_tx_tilemap->set_transparent_pen(3); - m_tilemap[1]->set_transparent_pen(15); -} - - - -/*************************************************************************** - - Memory handlers - -***************************************************************************/ - -void lastduel_state::flip_w(uint8_t data) -{ - flip_screen_set(BIT(data, 0)); - - machine().bookkeeping().coin_lockout_w(0, BIT(~data, 4)); - machine().bookkeeping().coin_lockout_w(1, BIT(~data, 5)); - machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); - machine().bookkeeping().coin_counter_w(1, BIT(data, 7)); -} - -void lastduel_state::vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - data = COMBINE_DATA(&m_vctrl[offset]); - switch (offset) - { - case 0: m_tilemap[0]->set_scrolly(0, data); break; - case 1: m_tilemap[0]->set_scrollx(0, data); break; - case 2: m_tilemap[1]->set_scrolly(0, data); break; - case 3: m_tilemap[1]->set_scrollx(0, data); break; - //case 4: sprite DMA trigger - case 7: m_tilemap_priority = data; break; - default: - logerror("Unmapped video write %d %04x\n", offset, data); - break; - } -} - -void lastduel_state::txram_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_txram[offset]); - m_tx_tilemap->mark_tile_dirty(offset); -} - -rgb_t lastduel_state::lastduel_RRRRGGGGBBBBIIII(uint32_t raw) -{ - // Brightness parameter interpreted same way as CPS1 - int const bright = 0x10 + (raw & 0x0f); - - int const red = ((raw >> 12) & 0x0f) * bright * 0x11 / 0x1f; - int const green = ((raw >> 8) & 0x0f) * bright * 0x11 / 0x1f; - int const blue = ((raw >> 4) & 0x0f) * bright * 0x11 / 0x1f; - - return rgb_t(red, green, blue); -} - - -/*************************************************************************** - - Display refresh - -***************************************************************************/ - -void lastduel_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri, int pri_mask, int flipy_mask) -{ - uint16_t const *const spriteram = m_spriteram->buffer(); - - for (int offs = 0x400 - 4; offs >= 0; offs -= 4) - { - int const attr = spriteram[offs + 1]; - if (pri_mask) // only madgear seems to have this - { - if (pri == 1 && (attr & pri_mask)) - continue; - if (pri == 0 && !(attr & pri_mask)) - continue; - } - - int const code = spriteram[offs]; - int sx = spriteram[offs + 3] & 0x1ff; - int sy = spriteram[offs + 2] & 0x1ff; - if (sy > 0x100) - sy -= 0x200; - - int flipx = attr & 0x20; - int flipy = attr & flipy_mask; // 0x40 for lastduel, 0x80 for madgear - int const color = attr & 0x0f; - - if (flip_screen()) - { - sx = 496 - sx; - sy = 240 - sy; - flipx = !flipx; - flipy = !flipy; - } - - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, - code, - color, - flipx,flipy, - sx, sy, 15); - } -} - -uint32_t lastduel_state::screen_update_lastduel(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - m_tilemap[1]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); - m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0); - draw_sprites(bitmap, cliprect, 0, 0, 0x40); - m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); - m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); - - return 0; -} - -uint32_t lastduel_state::screen_update_madgear(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - if (m_tilemap_priority & 0x80) - { - m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1 | TILEMAP_DRAW_OPAQUE, 0); - draw_sprites(bitmap, cliprect, 0, 0x10, 0x80); - m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); - m_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0); - draw_sprites(bitmap, cliprect, 1, 0x10, 0x80); - } - else - { - m_tilemap[1]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_OPAQUE, 0); - m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER1, 0); - draw_sprites(bitmap, cliprect, 0, 0x10, 0x80); - m_tilemap[0]->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0, 0); - draw_sprites(bitmap, cliprect, 1, 0x10, 0x80); - } - m_tx_tilemap->draw(screen, bitmap, cliprect, 0, 0); - - return 0; -} diff --git a/src/mame/nintendo/mario.cpp b/src/mame/nintendo/mario.cpp index 1b9008b1aa4..4207724ece0 100644 --- a/src/mame/nintendo/mario.cpp +++ b/src/mame/nintendo/mario.cpp @@ -240,6 +240,7 @@ protected: virtual void sound_start() override ATTR_COLD; virtual void sound_reset() override ATTR_COLD; +private: void soundirq_w(uint8_t data); void masao_map(address_map &map) ATTR_COLD; From 4f7ba93aa9c43eee2b87767ea5299c96f914fa0c Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 27 Feb 2026 13:54:04 +0100 Subject: [PATCH 066/351] lastduel: add manual sprite dma trigger [Jim Westfall] --- src/mame/capcom/lastduel.cpp | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/mame/capcom/lastduel.cpp b/src/mame/capcom/lastduel.cpp index cb17c4da00b..a685022f452 100644 --- a/src/mame/capcom/lastduel.cpp +++ b/src/mame/capcom/lastduel.cpp @@ -449,7 +449,7 @@ void lastduel_state::vctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) case 1: m_tilemap[0]->set_scrollx(0, data); break; case 2: m_tilemap[1]->set_scrolly(0, data); break; case 3: m_tilemap[1]->set_scrollx(0, data); break; - //case 4: sprite DMA trigger + case 4: m_spriteram->copy(); break; case 7: m_tilemap_priority = data; break; default: logerror("Unmapped video write %d %04x\n", offset, data); @@ -856,7 +856,6 @@ void lastduel_state::lastduel(machine_config &config) screen.set_raw(24_MHz_XTAL / 3, 512, 64, 448, 272, 8, 248); screen.set_screen_update(FUNC(lastduel_state::screen_update_lastduel)); screen.screen_vblank().set(FUNC(lastduel_state::lastduel_interrupt)); - screen.screen_vblank().append("spriteram", FUNC(buffered_spriteram16_device::vblank_copy_rising)); screen.set_palette(m_palette); BUFFERED_SPRITERAM16(config, m_spriteram); @@ -893,7 +892,6 @@ void lastduel_state::madgear(machine_config &config) screen.set_raw(24_MHz_XTAL / 3, 512, 64, 448, 272, 8, 248); // measured 57.4444Hz screen.set_screen_update(FUNC(lastduel_state::screen_update_madgear)); screen.screen_vblank().set(FUNC(lastduel_state::madgear_interrupt)); - screen.screen_vblank().append("spriteram", FUNC(buffered_spriteram16_device::vblank_copy_rising)); screen.set_palette(m_palette); BUFFERED_SPRITERAM16(config, m_spriteram); From 515ccad7702e095038df5b14a12f1a23c4f294e1 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Fri, 27 Feb 2026 16:55:14 +0100 Subject: [PATCH 067/351] New working clones ------------------ Express Raider (bootleg) [Hammy] --- src/mame/dataeast/exprraid.cpp | 36 ++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + src/mame/misc/gluck2.cpp | 2 +- src/mame/misc/goldnpkr.cpp | 2 +- src/mame/misc/norautp.cpp | 2 +- src/mame/suna/go2000.cpp | 2 +- 6 files changed, 41 insertions(+), 4 deletions(-) diff --git a/src/mame/dataeast/exprraid.cpp b/src/mame/dataeast/exprraid.cpp index c287c93f5be..790cab4df6d 100644 --- a/src/mame/dataeast/exprraid.cpp +++ b/src/mame/dataeast/exprraid.cpp @@ -875,6 +875,41 @@ ROM_START( exprraidi ) // PCB manufactured in Italy by Gecas under Data East lic ROM_LOAD( "pal16r4a.5e", 0x0200, 0x0104, CRC(9a8766a7) SHA1(5f84ad9e633daeb14531ef527827ef3d9b269437) ) ROM_END +ROM_START( exprraidbl ) // basically wexpress3 with Express Raider tilemap ROMs + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "2.15b", 0x4000, 0x4000, CRC(40d70fcb) SHA1(1327d39f872a39e020972952e5756ca59c55f9d0) ) + ROM_LOAD( "3.15a", 0x8000, 0x8000, CRC(d983e9b8) SHA1(21a2ceaf1f08cbd81907cdaa82fcbe262e2600d2) ) + + ROM_REGION( 0x10000, "slave", 0 ) + ROM_LOAD( "7.1a", 0x8000, 0x8000, CRC(552e6112) SHA1(f8412a63cab0aa47321d602f69bf534426c6aa5d) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "5b", 0x00000, 0x4000, CRC(686bac23) SHA1(b6c96ed40e90a8ba32c2e78a65f9589d387b0254) ) + + ROM_REGION( 0x30000, "sprites", 0 ) + ROM_LOAD( "16h", 0x00000, 0x8000, CRC(1ed250d1) SHA1(c98b0440e4319308e683e857bbfeb6a150c76ff3) ) + ROM_LOAD( "14h", 0x08000, 0x8000, CRC(2293fc61) SHA1(bf81db375f5424396559dcf0e04d34a52f6a020a) ) + ROM_LOAD( "16k", 0x10000, 0x8000, CRC(7c3bfd00) SHA1(87b48e09aaeacf78f3260df893b0922e25d10a5d) ) + ROM_LOAD( "14k", 0x18000, 0x8000, CRC(ea2294c8) SHA1(bc996351921e68e6237cee2d29fee882931ce0ea) ) + ROM_LOAD( "13k", 0x20000, 0x8000, CRC(b7418335) SHA1(e9d08ee651b9221c371e2629a757bceca7b6192b) ) + ROM_LOAD( "11k", 0x28000, 0x8000, CRC(2f611978) SHA1(fb60be573184d2af1dfdd543e68eeec53f2788f2) ) + + ROM_REGION( 0x20000, "bgtiles", 0 ) + ROM_LOAD( "6.8e", 0x00000, 0x8000, CRC(643a1bd3) SHA1(b23631d96cb413808f65f3ebe8fe6539b6140606) ) + // Save 0x08000-0x0ffff to expand the previous so we can decode the thing + ROM_LOAD( "5.8f", 0x10000, 0x8000, CRC(c44570bf) SHA1(3e9b8b6b36c7f5ae016dba3987ea19a29bd5ee5b) ) + ROM_LOAD( "4.8g", 0x18000, 0x8000, CRC(b9bb448b) SHA1(84974b1f3a5b58cd427d874f805a6dd9244c1101) ) + + ROM_REGION( 0x8000, "bgtilemap", 0 ) + ROM_LOAD( "1.12f", 0x0000, 0x8000, CRC(6ce11971) SHA1(16bfa69b3ad02253e81c8110c9b840be03952790) ) + + ROM_REGION( 0x0400, "proms", 0 ) // PROMs weren't dumped for this set, using the ones from the other + ROM_LOAD( "5b", 0x0000, 0x0100, CRC(da31dfbc) SHA1(ac476440864f538918f7bef2e1db82fd19195f89) ) // red + ROM_LOAD( "6b", 0x0100, 0x0100, CRC(51f25b4c) SHA1(bfcca57613fbb22919e00db1f6a8c7ca50faa60b) ) // green + ROM_LOAD( "7b", 0x0200, 0x0100, CRC(a6168d7f) SHA1(0c7b31adcd764ce2631c3fb5c1a968b01f65e741) ) // blue + ROM_LOAD( "9b", 0x0300, 0x0100, CRC(52aad300) SHA1(ff09772b930afa87e28d0628ef85a589a3d149c9) ) // priority +ROM_END + ROM_START( wexpress ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "cy01-2.16b", 0x4000, 0x4000, CRC(a0ae6756) SHA1(7f7ec1efddbb62e9d201c6013bca8ab72c3f75f6) ) @@ -1064,6 +1099,7 @@ void exprraid_state::init_wexpressb() GAME( 1986, exprraid, 0, exprraid, exprraid, exprraid_state, gfx_expand, ROT0, "Data East Corporation", "Express Raider (World, Rev 4)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, exprraidu, exprraid, exprraid, exprraid, exprraid_state, gfx_expand, ROT0, "Data East USA", "Express Raider (US, rev 5)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, exprraidi, exprraid, exprraid, exprraid, exprraid_state, gfx_expand, ROT0, "Data East Corporation", "Express Raider (Italy)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, exprraidbl, exprraid, wexpressb3, exprboot, exprraid_state, gfx_expand, ROT0, "bootleg", "Express Raider (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, wexpress, exprraid, exprraid, exprraid, exprraid_state, gfx_expand, ROT0, "Data East Corporation", "Western Express (Japan, rev 4)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, wexpressb1, exprraid, exprraid, exprraid, exprraid_state, init_wexpressb, ROT0, "bootleg", "Western Express (bootleg set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, wexpressb2, exprraid, wexpressb2, exprboot, exprraid_state, gfx_expand, ROT0, "bootleg", "Western Express (bootleg set 2)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 1347a44ae0c..cc6d5f14821 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -17272,6 +17272,7 @@ dreambal @source:dataeast/exprraid.cpp exprraid +exprraidbl exprraidi exprraidu wexpress diff --git a/src/mame/misc/gluck2.cpp b/src/mame/misc/gluck2.cpp index 9ad24d2a1c6..50d7dbebf6a 100644 --- a/src/mame/misc/gluck2.cpp +++ b/src/mame/misc/gluck2.cpp @@ -175,7 +175,7 @@ Good Luck II. There are pieces of code that initialize two PIA 6821s, that are not included - in the PCB. Seems a leftover. Also the program try to handle a suppossed lamps + in the PCB. Seems a leftover. Also the program tries to handle a supposed lamps system through these 'phantom' PIAs... The sound system is through a YM2413, and sound a lot nicer than the former diff --git a/src/mame/misc/goldnpkr.cpp b/src/mame/misc/goldnpkr.cpp index 8c5c8c9a103..cf4559e242a 100644 --- a/src/mame/misc/goldnpkr.cpp +++ b/src/mame/misc/goldnpkr.cpp @@ -12575,7 +12575,7 @@ ROM_START( pokersis ) ROM_REGION( 0x1800, "gfx1", 0 ) ROM_FILL( 0x0000, 0x1000, 0x0000 ) // filling the R-G bitplanes - ROM_COPY( "gfx", 0x14800, 0x1000, 0x0800 ) // text and suppossed 1bpp gfx + ROM_COPY( "gfx", 0x14800, 0x1000, 0x0800 ) // text and supposed 1bpp gfx ROM_REGION( 0x1800, "gfx2", 0 ) ROM_COPY( "gfx", 0x04000, 0x0000, 0x0800 ) // cards gfx, bitplane 1 diff --git a/src/mame/misc/norautp.cpp b/src/mame/misc/norautp.cpp index 758711053da..51000c1bb01 100644 --- a/src/mame/misc/norautp.cpp +++ b/src/mame/misc/norautp.cpp @@ -1474,7 +1474,7 @@ void norautp_state::tpoker2_map(address_map &map) Create dynamic code in RAM at $C276 to handle the I/O through the PPI8255's. Also initialize the devices and handle the handshaking lines in the same way. - The code read on port $62, when is suppossed to be set as output. + The code read on port $62, when is supposed to be set as output. */ void norautp_state::kimbldhl_map(address_map &map) diff --git a/src/mame/suna/go2000.cpp b/src/mame/suna/go2000.cpp index 9e1f32cf394..b728005b07d 100644 --- a/src/mame/suna/go2000.cpp +++ b/src/mame/suna/go2000.cpp @@ -13,7 +13,7 @@ OSC: 32.000MHz 2 8-way Dipswitch banks Ram: 2 UM61256FK-15 (near 3 & 4 (68k program roms)) - 3 Windbond W24257AK-15 (near TM29F550ZX) + 3 Winbond W24257AK-15 (near TM29F550ZX) 2 UM61256AK-15 (near Z80) P1, P2 & P3 4-pin connectors (unknown purpose) From 5e7b044a73d0baebbbf0eeb001440e34d8512de1 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 27 Feb 2026 12:38:47 +0100 Subject: [PATCH 068/351] misc/chameleonrx1.cpp: rename driver to chamrx1.cpp, expand MB notes --- src/mame/cave/cavepc.cpp | 2 +- src/mame/mame.lst | 2 +- src/mame/misc/chameleonrx1.cpp | 79 --------------------------------- src/mame/misc/chamrx1.cpp | 81 ++++++++++++++++++++++++++++++++++ 4 files changed, 83 insertions(+), 81 deletions(-) delete mode 100644 src/mame/misc/chameleonrx1.cpp create mode 100644 src/mame/misc/chamrx1.cpp diff --git a/src/mame/cave/cavepc.cpp b/src/mame/cave/cavepc.cpp index 73625c3d84e..c4f2d5d3b45 100644 --- a/src/mame/cave/cavepc.cpp +++ b/src/mame/cave/cavepc.cpp @@ -99,7 +99,7 @@ INPUT_PORTS_END void cavepc_state::cavepc(machine_config &config) { - PENTIUM3(config, m_maincpu, 200'000'000); /* AMD Athlon 64 X2 5050e Brisbane 2.60GHz, 1024KB L2 Cache ! */ + PENTIUM3(config, m_maincpu, 200'000'000); /* AMD Athlon 64 X2 5050e Brisbane 2.60GHz, 1024KB L2 Cache */ m_maincpu->set_addrmap(AS_PROGRAM, &cavepc_state::cavepc_map); m_maincpu->set_addrmap(AS_IO, &cavepc_state::cavepc_io); diff --git a/src/mame/mame.lst b/src/mame/mame.lst index cc6d5f14821..5687e1d1f20 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -30202,7 +30202,7 @@ tripjack tripjack07 tripjack11 -@source:misc/chameleonrx1.cpp +@source:misc/chamrx1.cpp chamrx1 @source:misc/chance32.cpp diff --git a/src/mame/misc/chameleonrx1.cpp b/src/mame/misc/chameleonrx1.cpp deleted file mode 100644 index c6198e89815..00000000000 --- a/src/mame/misc/chameleonrx1.cpp +++ /dev/null @@ -1,79 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders: -/* - Chameleon RX-1 by Digital Sunnil, licensed to Covielsa for distribution in Spain - - Intel Pentium 4 2.66GHZ/512/533 - ASUS P4B533-M motherboard - 2x Samsung 256MB DDR PC2100 CL2.5 RAM - SUMA GFX 5600X 128MB (Model SV3MDN0) - Sound Blaster Live! 5.1 Digital (Model SB0220) - Samsung SP6003H/OMD REV. A PUMA 60.0 GB - - TODO: - - in shutms11 loads Windows 2000 fine but MAME throws "Caught unhandled exception" as soon - as progress bar completes. -*/ - -#include "emu.h" -#include "cpu/i386/i386.h" -#include "machine/pci.h" - -namespace { - -class chameleonrx1_state : public driver_device -{ -public: - chameleonrx1_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { } - - void chameleonrx1(machine_config &config); - -private: - required_device m_maincpu; - - void chameleonrx1_map(address_map &map) ATTR_COLD; -}; - - - -void chameleonrx1_state::chameleonrx1_map(address_map &map) -{ - map(0x00000000, 0x0009ffff).ram(); - map(0x000e0000, 0x000fffff).rom().region("bios", 0x20000); - map(0xfffc0000, 0xffffffff).rom().region("bios", 0); -} - -static INPUT_PORTS_START( chameleonrx1 ) -INPUT_PORTS_END - -void chameleonrx1_state::chameleonrx1(machine_config &config) -{ - /* basic machine hardware */ - PENTIUM4(config, m_maincpu, 100'000'000); // actually 2.66 GHz - m_maincpu->set_addrmap(AS_PROGRAM, &chameleonrx1_state::chameleonrx1_map); - - PCI_ROOT(config, "pci", 0); - // ... -} - -/*************************************************************************** - - Game drivers - -***************************************************************************/ - -ROM_START( chamrx1 ) - ROM_REGION32_LE(0x40000, "bios", 0) - ROM_LOAD("p45m6_1010_c728_gm_u5_sst49lf002a.u26", 0x00000, 0x40000, CRC(2dd3d3eb) SHA1(5bf639442807cc1aa2ad910817a2e8d2a80e7226) ) - - DISK_REGION( "ide:0:hdd" ) // Samsung SP6003H/OMD Rev.A. LBA 117,304,992 60GB PUMA - DISK_IMAGE( "chamrx1", 0, SHA1(01da428b8aa347222856afbdfe9dbc083ae2171c) ) -ROM_END - -} // Anonymous namespace - - -GAME( 2003, chamrx1, 0, chameleonrx1, chameleonrx1, chameleonrx1_state, empty_init, ROT0, "Digital Sunnil (Covielsa license)", "Chameleon RX-1", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/misc/chamrx1.cpp b/src/mame/misc/chamrx1.cpp new file mode 100644 index 00000000000..0ae3f008f93 --- /dev/null +++ b/src/mame/misc/chamrx1.cpp @@ -0,0 +1,81 @@ +// license:BSD-3-Clause +// copyright-holders: +/* +Chameleon RX-1 by Digital Sunnil, licensed to Covielsa for distribution in Spain + +Intel Pentium 4 2.66GHZ/512/533 +ASUS P4B533-M motherboard +Intel 845E MCH / 82801DB ICH4 chipset +2x Samsung 256MB DDR PC2100 CL2.5 RAM +SUMA GFX 5600X 128MB (Model SV3MDN0) -> Korean OEM Nvidia GeForce FX 5600 XT (NV31) +Sound Blaster Live! 5.1 Digital (Model SB0220) +Samsung SP6003H/OMD REV. A PUMA 60.0 GB +On-board C-Media CMI9738 AC'97 +Texas Instruments TSB43AA22 FireWire +Intel 82562ET ethernet +ITE IT8708F Super I/O + +TODO: +- in shutms11 loads Windows 2000 fine but goes triple fault as soon as progress bar completes. + +*/ + +#include "emu.h" +#include "cpu/i386/i386.h" +#include "machine/pci.h" + +namespace { + +class chamrx1_state : public driver_device +{ +public: + chamrx1_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void chamrx1(machine_config &config); + +private: + required_device m_maincpu; + + void chamrx1_map(address_map &map) ATTR_COLD; +}; + + + +void chamrx1_state::chamrx1_map(address_map &map) +{ + map(0x00000000, 0x0009ffff).ram(); + map(0x000e0000, 0x000fffff).rom().region("bios", 0x20000); + map(0xfffc0000, 0xffffffff).rom().region("bios", 0); +} + +void chamrx1_state::chamrx1(machine_config &config) +{ + // Socket 478 (mPGA478) + PENTIUM4(config, m_maincpu, 100'000'000); // actually 2.66 GHz + m_maincpu->set_addrmap(AS_PROGRAM, &chamrx1_state::chamrx1_map); + + PCI_ROOT(config, "pci", 0); + // ... +} + +/*************************************************************************** + + Game drivers + +***************************************************************************/ + +ROM_START( chamrx1 ) + ROM_REGION32_LE(0x40000, "bios", 0) + ROM_LOAD("p45m6_1010_c728_gm_u5_sst49lf002a.u26", 0x00000, 0x40000, CRC(2dd3d3eb) SHA1(5bf639442807cc1aa2ad910817a2e8d2a80e7226) ) + + DISK_REGION( "ide:0:hdd" ) // Samsung SP6003H/OMD Rev.A. LBA 117,304,992 60GB PUMA + DISK_IMAGE( "chamrx1", 0, SHA1(01da428b8aa347222856afbdfe9dbc083ae2171c) ) +ROM_END + +} // Anonymous namespace + + +GAME( 2003, chamrx1, 0, chamrx1, 0, chamrx1_state, empty_init, ROT0, "Digital Sunnil (Covielsa license)", "Chameleon RX-1", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) From 15b0c6548c5235b0b9b2ed769a19fc213d6837c9 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 27 Feb 2026 14:14:43 +0100 Subject: [PATCH 069/351] pc/sis630.cpp: move ACPI implementation in own core, add enough SMI glue logic --- scripts/src/machine.lua | 2 + src/devices/machine/sis630_host.cpp | 34 ++- src/devices/machine/sis630_host.h | 3 + src/devices/machine/sis950_acpi.cpp | 432 +++++++++++++++++++++++++++ src/devices/machine/sis950_acpi.h | 97 ++++++ src/devices/machine/sis950_lpc.cpp | 3 +- src/devices/machine/sis950_lpc.h | 4 +- src/devices/machine/sis950_smbus.cpp | 6 +- src/mame/misc/gfamily.cpp | 6 +- src/mame/pc/pulltrig.cpp | 6 +- src/mame/pc/sis630.cpp | 6 +- 11 files changed, 577 insertions(+), 22 deletions(-) create mode 100644 src/devices/machine/sis950_acpi.cpp create mode 100644 src/devices/machine/sis950_acpi.h diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index b01ffab496e..caece4fe09a 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2940,6 +2940,8 @@ if MACHINES["PCI"] then MAME_DIR .. "src/devices/machine/sis7018_audio.h", MAME_DIR .. "src/devices/machine/sis900_eth.cpp", MAME_DIR .. "src/devices/machine/sis900_eth.h", + MAME_DIR .. "src/devices/machine/sis950_acpi.cpp", + MAME_DIR .. "src/devices/machine/sis950_acpi.h", MAME_DIR .. "src/devices/machine/sis950_lpc.cpp", MAME_DIR .. "src/devices/machine/sis950_lpc.h", MAME_DIR .. "src/devices/machine/sis950_smbus.cpp", diff --git a/src/devices/machine/sis630_host.cpp b/src/devices/machine/sis630_host.cpp index e5c9f897cde..dca6fdad62f 100644 --- a/src/devices/machine/sis630_host.cpp +++ b/src/devices/machine/sis630_host.cpp @@ -2,16 +2,16 @@ // copyright-holders: Angelo Salese /************************************************************************************************** - SiS630 host implementation (northbridge) +SiS630 host implementation (northbridge) - TODO: - - AGP and VGA interfaces; - - Is ACPI declared here shared with LPC or a different one? - \- shutms11 maps it to the exact same place (I/O $5000), may be interleaved? - - HW trap control; - - PCI-Hole; - - Convert RAM to device; - - Integrated VGA control; +TODO: +- AGP and VGA interfaces; +- Is ACPI declared here shared with LPC or a different one? +\- shutms11 maps it to the exact same place (I/O $5000), may be interleaved? +- HW trap control; +- PCI-Hole; +- Convert RAM to device; +- Integrated VGA control; **************************************************************************************************/ @@ -68,6 +68,7 @@ void sis630_host_device::device_reset() m_shadow_ram_ctrl = 0; m_vga_control = 0; + m_smiact = 1; std::fill(std::begin(m_agp_mailbox), std::end(m_agp_mailbox), 0); remap_cb(); @@ -185,6 +186,19 @@ void sis630_host_device::map_shadowram(address_space *memory_space, uint32_t sta } } +// SMIACT# is canonically active low +void sis630_host_device::smi_act_w(int state) +{ + if (state) + m_smiact = 0; + else + m_smiact = 1; + + if (m_smiact == 0) + machine().debug_break(); + remap_cb(); +} + void sis630_host_device::map_extra( uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, @@ -219,7 +233,7 @@ void sis630_host_device::map_extra( // System Management Memory Region handling // Potentially overrides VGA VRAM if on - if (BIT(m_smram, 4)) + if (BIT(m_smram, 4) || m_smiact == 0) { u8 smram_config = m_smram >> 5; diff --git a/src/devices/machine/sis630_host.h b/src/devices/machine/sis630_host.h index c9ab299f4d6..227773f9de1 100644 --- a/src/devices/machine/sis630_host.h +++ b/src/devices/machine/sis630_host.h @@ -27,6 +27,7 @@ public: sis630_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); void set_ram_size(int ram_size) { m_ram_size = ram_size; } + void smi_act_w(int state); protected: virtual void device_start() override ATTR_COLD; @@ -90,6 +91,8 @@ private: bool enable = false; u8 data_rate = 0; } m_agp; + + int m_smiact; }; DECLARE_DEVICE_TYPE(SIS630_HOST, sis630_host_device) diff --git a/src/devices/machine/sis950_acpi.cpp b/src/devices/machine/sis950_acpi.cpp new file mode 100644 index 00000000000..cf4b54bf217 --- /dev/null +++ b/src/devices/machine/sis950_acpi.cpp @@ -0,0 +1,432 @@ +// license: BSD-3-Clause +// copyright-holders: Angelo Salese +/************************************************************************************************** + +SiS 950 ACPI implementation + +Based on lpc-acpi + +TODO: +- basically ported over plus the extra register required by SMI to work; +- gamecstl: still fails BIOS boot after entering SMI from here at 0xf3cf2 (on jp $-2) + +**************************************************************************************************/ + +#include "emu.h" +#include "sis950_acpi.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_warning + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(SIS950_ACPI, sis950_acpi_device, "sis950_acpi", "SiS 950 ACPI interface") + +sis950_acpi_device::sis950_acpi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : lpc_device(mconfig, SIS950_ACPI, tag, owner, clock) + , m_write_smi(*this) +// , m_write_sci(*this) +{ +} + +void sis950_acpi_device::device_start() +{ +} + +void sis950_acpi_device::device_reset() +{ + m_leg_sts = m_leg_en = 0; + pm1_sts = 0; + pm1_en = 0; + pm1_cnt = 0; + proc_cnt = 0; + gpe0_sts = 0; + gpe0_en = 0; + smi_en = 0; + smi_sts = 0; + alt_gp_smi_en = 0; + alt_gp_smi_sts = 0; + devact_sts = 0; + devtrap_en = 0; + + tco_rld = 0; + tco_tmr = 0; + tco_dat_in = 0; + tco_dat_out = 0; + tco1_sts = 0; + tco2_sts = 0; + tco1_cnt = 0; + tco2_cnt = 0; + tco_message1 = 0; + tco_message2 = 0; + tco_wdstatus = 0; + sw_irq_gen = 0; +} + + +void sis950_acpi_device::map(address_map &map) +{ + map(0x00, 0x01).rw(FUNC(sis950_acpi_device::pm1_sts_r), FUNC(sis950_acpi_device::pm1_sts_w)); + map(0x02, 0x03).rw(FUNC(sis950_acpi_device::pm1_en_r), FUNC(sis950_acpi_device::pm1_en_w)); + map(0x04, 0x07).rw(FUNC(sis950_acpi_device::pm1_cnt_r), FUNC(sis950_acpi_device::pm1_cnt_w)); + map(0x08, 0x0b).r(FUNC(sis950_acpi_device::pm1_tmr_r)); + map(0x10, 0x13).rw(FUNC(sis950_acpi_device::proc_cnt_r), FUNC(sis950_acpi_device::proc_cnt_w)); + map(0x14, 0x14).r(FUNC(sis950_acpi_device::lv2_r)); + + map(0x28, 0x2b).rw(FUNC(sis950_acpi_device::gpe0_sts_r), FUNC(sis950_acpi_device::gpe0_sts_w)); + map(0x2c, 0x2f).rw(FUNC(sis950_acpi_device::gpe0_en_r), FUNC(sis950_acpi_device::gpe0_en_w)); + map(0x30, 0x33).rw(FUNC(sis950_acpi_device::smi_en_r), FUNC(sis950_acpi_device::smi_en_w)); + map(0x34, 0x37).rw(FUNC(sis950_acpi_device::smi_sts_r), FUNC(sis950_acpi_device::smi_sts_w)); + map(0x38, 0x39).rw(FUNC(sis950_acpi_device::alt_gp_smi_en_r), FUNC(sis950_acpi_device::alt_gp_smi_en_w)); + map(0x3a, 0x3b).rw(FUNC(sis950_acpi_device::alt_gp_smi_sts_r), FUNC(sis950_acpi_device::alt_gp_smi_sts_w)); + + map(0x40, 0x43).lrw32( + NAME([this] (offs_t offset) { return m_leg_sts | (m_leg_en << 16); }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + if (ACCESSING_BITS_0_7) + m_leg_sts &= ~(data & 0xfd); + if (ACCESSING_BITS_8_15) + m_leg_sts &= ~(data & 0xff); + if (ACCESSING_BITS_16_31) + { + m_leg_en = (data >> 16) & 0x0fff; + LOG("%s: leg_en = %08x & %08x -> %04x\n", tag(), data, mem_mask, m_leg_en); + } + check_smi(); + }) + ); + map(0x44, 0x45).rw(FUNC(sis950_acpi_device::devact_sts_r), FUNC(sis950_acpi_device::devact_sts_w)); + map(0x48, 0x49).rw(FUNC(sis950_acpi_device::devtrap_en_r), FUNC(sis950_acpi_device::devtrap_en_w)); + map(0x4c, 0x4d).r(FUNC(sis950_acpi_device::bus_addr_track_r)); + map(0x4e, 0x4e).r(FUNC(sis950_acpi_device::bus_cyc_track_r)); + + map(0x60, 0x60).rw(FUNC(sis950_acpi_device::tco_rld_r), FUNC(sis950_acpi_device::tco_rld_w)); + map(0x61, 0x61).rw(FUNC(sis950_acpi_device::tco_tmr_r), FUNC(sis950_acpi_device::tco_tmr_w)); + map(0x62, 0x62).rw(FUNC(sis950_acpi_device::tco_dat_in_r), FUNC(sis950_acpi_device::tco_dat_in_w)); + map(0x63, 0x63).rw(FUNC(sis950_acpi_device::tco_dat_out_r), FUNC(sis950_acpi_device::tco_dat_out_w)); + map(0x64, 0x65).rw(FUNC(sis950_acpi_device::tco1_sts_r), FUNC(sis950_acpi_device::tco1_sts_w)); + map(0x66, 0x67).rw(FUNC(sis950_acpi_device::tco2_sts_r), FUNC(sis950_acpi_device::tco2_sts_w)); + map(0x68, 0x69).rw(FUNC(sis950_acpi_device::tco1_cnt_r), FUNC(sis950_acpi_device::tco1_cnt_w)); + map(0x6a, 0x6b).rw(FUNC(sis950_acpi_device::tco2_cnt_r), FUNC(sis950_acpi_device::tco2_cnt_w)); + map(0x6c, 0x6c).rw(FUNC(sis950_acpi_device::tco_message1_r), FUNC(sis950_acpi_device::tco_message1_w)); + map(0x6d, 0x6d).rw(FUNC(sis950_acpi_device::tco_message2_r), FUNC(sis950_acpi_device::tco_message2_w)); + map(0x6e, 0x6e).rw(FUNC(sis950_acpi_device::tco_wdstatus_r), FUNC(sis950_acpi_device::tco_wdstatus_w)); + map(0x70, 0x70).rw(FUNC(sis950_acpi_device::sw_irq_gen_r), FUNC(sis950_acpi_device::sw_irq_gen_w)); +} + +void sis950_acpi_device::map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) +{ + io_space->install_device(io_offset, io_window_end, *this, &sis950_acpi_device::map); +} + + +uint16_t sis950_acpi_device::pm1_sts_r() +{ + return pm1_sts; +} + +void sis950_acpi_device::pm1_sts_w(uint16_t data) +{ + pm1_sts &= ~data; + LOG("%s: pm1_sts = %04x\n", tag(), pm1_sts); +} + +uint16_t sis950_acpi_device::pm1_en_r() +{ + return pm1_en; +} + +void sis950_acpi_device::pm1_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&pm1_en); + LOG("%s: pm1_en = %04x\n", tag(), pm1_en); +} + +uint32_t sis950_acpi_device::pm1_cnt_r() +{ + return pm1_cnt; +} + +void sis950_acpi_device::pm1_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&pm1_cnt); + LOG("%s: pm1_cnt = %08x\n", tag(), pm1_cnt); +} + +uint32_t sis950_acpi_device::pm1_tmr_r() +{ + return machine().time().as_ticks(3579545) & 0xffffff; +} + +uint32_t sis950_acpi_device::proc_cnt_r() +{ + return proc_cnt; +} + +void sis950_acpi_device::proc_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&proc_cnt); + LOG("%s: proc_cnt = %08x\n", tag(), proc_cnt); +} + +uint8_t sis950_acpi_device::lv2_r() +{ + return 0x00; +} + +uint32_t sis950_acpi_device::gpe0_sts_r() +{ + return gpe0_sts; +} + +void sis950_acpi_device::gpe0_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&gpe0_sts); + LOG("%s: gpe0_sts = %08x\n", tag(), gpe0_sts); +} + +uint32_t sis950_acpi_device::gpe0_en_r() +{ + return gpe0_en; +} + +void sis950_acpi_device::gpe0_en_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&gpe0_en); + LOG("%s: gpe0_en = %08x\n", tag(), gpe0_en); +} + +uint32_t sis950_acpi_device::smi_en_r() +{ + return smi_en; +} + +void sis950_acpi_device::smi_en_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&smi_en); + LOG("%s: smi_en = %08x\n", tag(), smi_en); +} + +uint32_t sis950_acpi_device::smi_sts_r() +{ + return smi_sts; +} + +void sis950_acpi_device::smi_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + COMBINE_DATA(&smi_sts); + LOG("%s: smi_sts = %08x\n", tag(), smi_sts); +} + +uint16_t sis950_acpi_device::alt_gp_smi_en_r() +{ + return alt_gp_smi_en; +} + +void sis950_acpi_device::alt_gp_smi_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&alt_gp_smi_en); + LOG("%s: alt_gp_smi_en = %04x\n", tag(), alt_gp_smi_en); +} + +uint16_t sis950_acpi_device::alt_gp_smi_sts_r() +{ + return alt_gp_smi_sts; +} + +void sis950_acpi_device::alt_gp_smi_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&alt_gp_smi_sts); + LOG("%s: alt_gp_smi_sts = %04x\n", tag(), alt_gp_smi_sts); +} + +uint16_t sis950_acpi_device::devact_sts_r() +{ + return devact_sts; +} + +void sis950_acpi_device::devact_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (ACCESSING_BITS_0_7) + { + devact_sts &= ~(data & 0xff); + } + if (ACCESSING_BITS_8_15) + { + devact_sts &= ~(data & 0xcf); + } + //LOG("%s: devact_sts = %04x\n", tag(), devact_sts); +} + +uint16_t sis950_acpi_device::devtrap_en_r() +{ + return devtrap_en; +} + +// TODO: 48h is SMICMD_PORT, 49h is MAIL_BOX, 4A / 4Bh are SW watchdog related +void sis950_acpi_device::devtrap_en_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&devtrap_en); + LOG("%s: devtrap_en = %04x & %04x\n", tag(), devtrap_en, mem_mask); + if (ACCESSING_BITS_0_7) + { + m_leg_sts |= 1 << 5; + check_smi(); + } +} + +uint16_t sis950_acpi_device::bus_addr_track_r() +{ + LOG("%s: read bus_addr_track\n", tag()); + return 0; +} + +uint8_t sis950_acpi_device::bus_cyc_track_r() +{ + LOG("%s: read bus_cyc_track\n", tag()); + return 0; +} + + +uint8_t sis950_acpi_device::tco_rld_r() +{ + return tco_rld; +} + +void sis950_acpi_device::tco_rld_w(uint8_t data) +{ + tco_rld = data; + LOG("%s: tco_rld = %02x\n", tag(), tco_rld); +} + +uint8_t sis950_acpi_device::tco_tmr_r() +{ + return tco_tmr; +} + +void sis950_acpi_device::tco_tmr_w(uint8_t data) +{ + tco_tmr = data; + LOG("%s: tco_tmr = %02x\n", tag(), tco_tmr); +} + +uint8_t sis950_acpi_device::tco_dat_in_r() +{ + return tco_dat_in; +} + +void sis950_acpi_device::tco_dat_in_w(uint8_t data) +{ + tco_dat_in = data; + LOG("%s: tco_dat_in = %02x\n", tag(), tco_dat_in); +} + +uint8_t sis950_acpi_device::tco_dat_out_r() +{ + return tco_dat_out; +} + +void sis950_acpi_device::tco_dat_out_w(uint8_t data) +{ + tco_dat_out = data; + LOG("%s: tco_dat_out = %02x\n", tag(), tco_dat_out); +} + +uint16_t sis950_acpi_device::tco1_sts_r() +{ + return tco1_sts; +} + +void sis950_acpi_device::tco1_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&tco1_sts); + LOG("%s: tco1_sts = %04x\n", tag(), tco1_sts); +} + +uint16_t sis950_acpi_device::tco2_sts_r() +{ + return tco2_sts; +} + +void sis950_acpi_device::tco2_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&tco2_sts); + LOG("%s: tco2_sts = %04x\n", tag(), tco2_sts); +} + +uint16_t sis950_acpi_device::tco1_cnt_r() +{ + return tco1_cnt; +} + +void sis950_acpi_device::tco1_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&tco1_cnt); + LOG("%s: tco1_cnt = %04x\n", tag(), tco1_cnt); +} + +uint16_t sis950_acpi_device::tco2_cnt_r() +{ + return tco2_cnt; +} + +void sis950_acpi_device::tco2_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&tco2_cnt); + LOG("%s: tco2_cnt = %04x\n", tag(), tco2_cnt); +} + +uint8_t sis950_acpi_device::tco_message1_r() +{ + return tco_message1; +} + +void sis950_acpi_device::tco_message1_w(uint8_t data) +{ + tco_message1 = data; + LOG("%s: tco_message1 = %02x\n", tag(), tco_message1); +} + +uint8_t sis950_acpi_device::tco_message2_r() +{ + return tco_message2; +} + +void sis950_acpi_device::tco_message2_w(uint8_t data) +{ + tco_message2 = data; + LOG("%s: tco_message2 = %02x\n", tag(), tco_message2); +} + +uint8_t sis950_acpi_device::tco_wdstatus_r() +{ + return tco_wdstatus; +} + +void sis950_acpi_device::tco_wdstatus_w(uint8_t data) +{ + tco_wdstatus = data; + LOG("%s: tco_wdstatus = %02x\n", tag(), tco_wdstatus); +} + +uint8_t sis950_acpi_device::sw_irq_gen_r() +{ + return sw_irq_gen; +} + +void sis950_acpi_device::sw_irq_gen_w(uint8_t data) +{ + sw_irq_gen = data; + LOG("%s: sw_irq_gen = %02x\n", tag(), sw_irq_gen); +} + +void sis950_acpi_device::check_smi() +{ + if (m_leg_sts & m_leg_en && BIT(m_leg_en, 0)) + { + m_write_smi(1); + } + else + m_write_smi(0); +} diff --git a/src/devices/machine/sis950_acpi.h b/src/devices/machine/sis950_acpi.h new file mode 100644 index 00000000000..a0a6cdcc857 --- /dev/null +++ b/src/devices/machine/sis950_acpi.h @@ -0,0 +1,97 @@ +// license: BSD-3-Clause +// copyright-holders: Angelo Salese + +#ifndef MAME_MACHINE_SIS950_ACPI_H +#define MAME_MACHINE_SIS950_ACPI_H + +#pragma once + +#include "lpc.h" + +class sis950_acpi_device : public lpc_device +{ +public: + sis950_acpi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void map_device(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + + auto smi() { return m_write_smi.bind(); } + +protected: + void device_start() override ATTR_COLD; + void device_reset() override ATTR_COLD; + +private: + devcb_write_line m_write_smi; + + uint32_t pm1_cnt, proc_cnt, gpe0_sts, gpe0_en, smi_en, smi_sts; + uint16_t pm1_sts, pm1_en, alt_gp_smi_en, alt_gp_smi_sts, devact_sts, devtrap_en; + uint16_t tco1_sts, tco2_sts, tco1_cnt, tco2_cnt; + uint8_t tco_rld, tco_tmr, tco_dat_in, tco_dat_out, tco_message1, tco_message2; + uint8_t tco_wdstatus, sw_irq_gen; + + uint16_t m_leg_en, m_leg_sts; + + void map(address_map &map) ATTR_COLD; + + uint16_t pm1_sts_r(); + void pm1_sts_w(uint16_t data); + uint16_t pm1_en_r(); + void pm1_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint32_t pm1_cnt_r(); + void pm1_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t pm1_tmr_r(); + uint32_t proc_cnt_r(); + void proc_cnt_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint8_t lv2_r(); + uint32_t gpe0_sts_r(); + void gpe0_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t gpe0_en_r(); + void gpe0_en_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t smi_en_r(); + void smi_en_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t smi_sts_r(); + void smi_sts_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint16_t alt_gp_smi_en_r(); + void alt_gp_smi_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t alt_gp_smi_sts_r(); + void alt_gp_smi_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t devact_sts_r(); + void devact_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t devtrap_en_r(); + void devtrap_en_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t bus_addr_track_r(); + uint8_t bus_cyc_track_r(); + + uint8_t tco_rld_r(); + void tco_rld_w(uint8_t data); + uint8_t tco_tmr_r(); + void tco_tmr_w(uint8_t data); + uint8_t tco_dat_in_r(); + void tco_dat_in_w(uint8_t data); + uint8_t tco_dat_out_r(); + void tco_dat_out_w(uint8_t data); + uint16_t tco1_sts_r(); + void tco1_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tco2_sts_r(); + void tco2_sts_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tco1_cnt_r(); + void tco1_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tco2_cnt_r(); + void tco2_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint8_t tco_message1_r(); + void tco_message1_w(uint8_t data); + uint8_t tco_message2_r(); + void tco_message2_w(uint8_t data); + uint8_t tco_wdstatus_r(); + void tco_wdstatus_w(uint8_t data); + uint8_t sw_irq_gen_r(); + void sw_irq_gen_w(uint8_t data); + + void check_smi(); +}; + +DECLARE_DEVICE_TYPE(SIS950_ACPI, sis950_acpi_device) + +#endif // MAME_MACHINE_SIS950_ACPI_H diff --git a/src/devices/machine/sis950_lpc.cpp b/src/devices/machine/sis950_lpc.cpp index 645cc189eaf..94aede3def1 100644 --- a/src/devices/machine/sis950_lpc.cpp +++ b/src/devices/machine/sis950_lpc.cpp @@ -476,6 +476,7 @@ void sis950_lpc_device::io_map(address_map &map) // map(0x00e0, 0x00ef) MCA bus (cfr. Bochs) or PnP map(0x00eb, 0x00eb).lw8(NAME([] (offs_t offset, u8 data) { })); + map(0x00ed, 0x00ed).lw8(NAME([] (offs_t offset, u8 data) { })); // map(0x00f0, 0x00f0) COPRO error // map(0x0480, 0x048f) DMA high page registers @@ -549,7 +550,7 @@ void sis950_lpc_device::map_extra(uint64_t memory_window_start, uint64_t memory_ if (BIT(m_bios_control, 7)) { LOGMAP("- ACPI enable (%02x) %04x-%04x\n", m_bios_control, m_acpi_base, m_acpi_base + 0xff); - // shutms11 BIOS POST maps this at $5000 + // shutms11 BIOS POST maps this at $5000, gamecstl at $8000 m_acpi->map_device(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, m_acpi_base, io_space); io_space->install_device(m_acpi_base | 0x80, m_acpi_base | 0xff, *m_smbus, &sis950_smbus_device::map); } diff --git a/src/devices/machine/sis950_lpc.h b/src/devices/machine/sis950_lpc.h index 8aada11ff92..df4b99bfd74 100644 --- a/src/devices/machine/sis950_lpc.h +++ b/src/devices/machine/sis950_lpc.h @@ -10,7 +10,7 @@ #include "bus/ata/ataintf.h" #include "bus/isa/isa.h" -#include "lpc-acpi.h" +#include "sis950_acpi.h" #include "sis950_smbus.h" #include "cpu/i386/i386.h" @@ -95,7 +95,7 @@ private: required_device m_rtc; required_device m_ps2_con; required_device m_aux_con; - required_device m_acpi; + required_device m_acpi; required_device m_smbus; devcb_write_line m_fast_reset_cb; diff --git a/src/devices/machine/sis950_smbus.cpp b/src/devices/machine/sis950_smbus.cpp index b96898cbbe0..67a9f8331ac 100644 --- a/src/devices/machine/sis950_smbus.cpp +++ b/src/devices/machine/sis950_smbus.cpp @@ -2,10 +2,10 @@ // copyright-holders:Angelo Salese /************************************************************************************************** - SiS 950 SMBus implementation +SiS 950 SMBus implementation - TODO: - - Stub, needs an smbus_interface, bare minimum to make shutms11 happy; +TODO: +- Stub, needs an smbus_interface, bare minimum to make shutms11 happy; **************************************************************************************************/ #include "emu.h" diff --git a/src/mame/misc/gfamily.cpp b/src/mame/misc/gfamily.cpp index 5af8ae419f6..a7153d9e750 100644 --- a/src/mame/misc/gfamily.cpp +++ b/src/mame/misc/gfamily.cpp @@ -42,6 +42,7 @@ TODO: #include "machine/sis7001_usb.h" #include "machine/sis7018_audio.h" #include "machine/sis900_eth.h" +#include "machine/sis950_acpi.h" #include "machine/sis950_lpc.h" #include "machine/sis950_smbus.h" @@ -109,7 +110,7 @@ void gfamily_state::gfamily(machine_config &config) // Actually an Intel Celeron SL6SC 1.7GHz (with the config found with the default BIOS) PENTIUM4(config, m_maincpu, 100'000'000); //1'700'000'000); m_maincpu->set_irq_acknowledge_callback("pci:01.0:pic_master", FUNC(pic8259_device::inta_cb)); -// m_maincpu->smiact().set("pci:00.0", FUNC(sis950_lpc_device::smi_act_w)); + m_maincpu->smiact().set("pci:00.0", FUNC(sis630_host_device::smi_act_w)); // TODO: everything below needs upgrading to SiS651 // TODO: unknown flash ROM types @@ -131,7 +132,8 @@ void gfamily_state::gfamily(machine_config &config) if (state) machine().schedule_soft_reset(); }); - LPC_ACPI(config, "pci:01.0:acpi", 0); + sis950_acpi_device &acpi(SIS950_ACPI(config, "pci:01.0:acpi", 0)); + acpi.smi().set_inputline("maincpu", INPUT_LINE_SMI); SIS950_SMBUS(config, "pci:01.0:smbus", 0); SIS900_ETH(config, "pci:01.1", 0); diff --git a/src/mame/pc/pulltrig.cpp b/src/mame/pc/pulltrig.cpp index dfb505f0ee5..8c53f5b50bb 100644 --- a/src/mame/pc/pulltrig.cpp +++ b/src/mame/pc/pulltrig.cpp @@ -53,6 +53,7 @@ named "DSR-PT1 MEMORY" (they were probably for sale). #include "machine/sis7001_usb.h" #include "machine/sis7018_audio.h" #include "machine/sis900_eth.h" +#include "machine/sis950_acpi.h" #include "machine/sis950_lpc.h" #include "machine/sis950_smbus.h" @@ -117,7 +118,7 @@ void pulltrig_state::pulltrig(machine_config &config) { PENTIUM4(config, m_maincpu, 100'000'000); // Exact CPU and frequency unknown m_maincpu->set_irq_acknowledge_callback("pci:01.0:pic_master", FUNC(pic8259_device::inta_cb)); -// m_maincpu->smiact().set("pci:00.0", FUNC(sis950_lpc_device::smi_act_w)); + m_maincpu->smiact().set("pci:00.0", FUNC(sis630_host_device::smi_act_w)); // TODO: everything below needs upgrading to SiS651 // TODO: unknown flash ROM type (wrong one) @@ -138,7 +139,8 @@ void pulltrig_state::pulltrig(machine_config &config) if (state) machine().schedule_soft_reset(); }); - LPC_ACPI(config, "pci:01.0:acpi", 0); + sis950_acpi_device &acpi(SIS950_ACPI(config, "pci:01.0:acpi", 0)); + acpi.smi().set_inputline("maincpu", INPUT_LINE_SMI); SIS950_SMBUS(config, "pci:01.0:smbus", 0); SIS900_ETH(config, "pci:01.1", 0); diff --git a/src/mame/pc/sis630.cpp b/src/mame/pc/sis630.cpp index 5977298e454..a3e8f867539 100644 --- a/src/mame/pc/sis630.cpp +++ b/src/mame/pc/sis630.cpp @@ -189,6 +189,7 @@ Notes on possible shutms11 BIOS bugs: #include "machine/sis7001_usb.h" #include "machine/sis7018_audio.h" #include "machine/sis900_eth.h" +#include "machine/sis950_acpi.h" #include "machine/sis950_lpc.h" #include "machine/sis950_smbus.h" @@ -266,7 +267,7 @@ void sis630_state::sis630(machine_config &config) // m_maincpu->set_addrmap(AS_PROGRAM, &sis630_state::main_map); // m_maincpu->set_addrmap(AS_IO, &sis630_state::main_io); m_maincpu->set_irq_acknowledge_callback("pci:01.0:pic_master", FUNC(pic8259_device::inta_cb)); -// m_maincpu->smiact().set("pci:00.0", FUNC(sis950_lpc_device::smi_act_w)); + m_maincpu->smiact().set("pci:00.0", FUNC(sis630_host_device::smi_act_w)); // TODO: unknown flash ROM types // Needs a $80000 sized ROM @@ -287,7 +288,8 @@ void sis630_state::sis630(machine_config &config) if (state) machine().schedule_soft_reset(); }); - LPC_ACPI(config, "pci:01.0:acpi", 0); + sis950_acpi_device &acpi(SIS950_ACPI(config, "pci:01.0:acpi", 0)); + acpi.smi().set_inputline("maincpu", INPUT_LINE_SMI); SIS950_SMBUS(config, "pci:01.0:smbus", 0); SIS900_ETH(config, "pci:01.1", 0); From e37cad15b6d307206d66eaac19478c2e9ac678aa Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 27 Feb 2026 16:34:36 +0100 Subject: [PATCH 070/351] misc/gfamily.cpp: update QA notes --- src/devices/machine/sis950_acpi.cpp | 1 + src/mame/misc/gfamily.cpp | 20 ++++++++++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/src/devices/machine/sis950_acpi.cpp b/src/devices/machine/sis950_acpi.cpp index cf4b54bf217..915d832f6da 100644 --- a/src/devices/machine/sis950_acpi.cpp +++ b/src/devices/machine/sis950_acpi.cpp @@ -9,6 +9,7 @@ Based on lpc-acpi TODO: - basically ported over plus the extra register required by SMI to work; - gamecstl: still fails BIOS boot after entering SMI from here at 0xf3cf2 (on jp $-2) +- win2k based HDDs wants an event at $[50]04 to not throw an ACPI BSoD after a while **************************************************************************************************/ diff --git a/src/mame/misc/gfamily.cpp b/src/mame/misc/gfamily.cpp index a7153d9e750..5cf821c7596 100644 --- a/src/mame/misc/gfamily.cpp +++ b/src/mame/misc/gfamily.cpp @@ -3,13 +3,15 @@ /* Games Family P4-4P (Pentium 4 - 4 Players) -PC with Chinese Windows 2000 Pro and several emulators, including (programs may change on other revisions): +PC with Chinese Windows 2000 Pro (build 2195: "Service Pack 4Free") and several emulators, including: -MAME v0.78 (Dec 30 2003) -MAME v0.96u3 (May 25 2005) -MAME v0.106 (May 16 2006) -Nebula 2.1.5 -FB Alpha v0.2.94.98 -ZiNc 1.1 + -A copy of "KOF2002_WinKawaks1.45" in roms folder (leftover?) +(programs may change on other revisions) SiS651/SiS962 based chipset plus an additional PCB for JAMMA, inputs and basic config (and protection) with: Atmel AT89C2051 (near a 4 dipswitches bank and a 6.000 MHz xtal) @@ -17,10 +19,24 @@ SiS651/SiS962 based chipset plus an additional PCB for JAMMA, inputs and basic c 2 x Microchip PIC12F508 Altera Max EPM7128SQC100-10 CPLD +HDD has traces of following drivers: +- C-Media 3D Audio +- SiS651 VGA and AGP drivers +- Realtek/Avance Logic ALC201A(101) AC'97 (SiS OEM?) +- a PPJoyBus.sys and PPortJoy.sys +- a C:\VGATVWIN folder (may need typical SiS TV Out) +- C:\mamep\babystar.exe loads an English version frontend, C:\mamew\babystar.exe loads a Chinese one; +- C:\emu\game2\play1.exe is a stock MAME 0.106. Notice that has -ddraw and -direct3d enabled by + default (which you have to disable if fiddling in Safe Mode) + TODO: - Upgrade '630 to '651 variants; - Hangs at ISA $c1 the first time around, soft reset makes it to go further; - Hangs on CPU check; +- On shutms11 tries to install Ethernet and SiS7018 drivers, shows "System Loading" for a split + second then proceeds in pinging the USB port (on Safe Mode too, dongle?); +- MAME runs at 800x600@37fps, fix it in pc_vga_sis; +- "Type OK" screen cannot be surpassed, bug in keyboard emulation or just like above? */ @@ -205,4 +221,4 @@ ROM_END } // Anonymous namespace -GAME( 200?, gmfamily, 0, gfamily, 0, gfamily_state, empty_init, ROT0, "bootleg", "Games Family", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2007?, gmfamily, 0, gfamily, 0, gfamily_state, empty_init, ROT0, "bootleg", "Games Family", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // C:\Windows\system32\drivers folder has a 2007-11-11 timestamp From 00150d6d0c18eee1b2efe1616e184e47afffd7a0 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 27 Feb 2026 17:32:30 +0100 Subject: [PATCH 071/351] bus/pci: streamline VGA based PCI/AGP cards legacy structures * bus/pci/wd9710_pci.cpp: add extended ports so that it doesn't drop in MDA mode --- src/devices/bus/pci/clgd5446.cpp | 16 ++++---- src/devices/bus/pci/clgd5446.h | 2 +- src/devices/bus/pci/clgd546x_laguna.cpp | 16 ++++---- src/devices/bus/pci/clgd546x_laguna.h | 2 +- src/devices/bus/pci/geforce.cpp | 8 ++-- src/devices/bus/pci/mga2064w.cpp | 52 ++++++++++++------------- src/devices/bus/pci/mga2064w.h | 4 +- src/devices/bus/pci/neon250.cpp | 30 +++++++------- src/devices/bus/pci/neon250.h | 4 +- src/devices/bus/pci/oti_spitfire.cpp | 34 ++++++++-------- src/devices/bus/pci/oti_spitfire.h | 4 +- src/devices/bus/pci/permedia2.cpp | 21 +++++----- src/devices/bus/pci/permedia2.h | 2 +- src/devices/bus/pci/promotion.cpp | 16 ++++---- src/devices/bus/pci/promotion.h | 2 +- src/devices/bus/pci/riva128.cpp | 31 ++++++++------- src/devices/bus/pci/riva128.h | 4 +- src/devices/bus/pci/rivatnt.cpp | 14 +++---- src/devices/bus/pci/sis6326.cpp | 12 +++--- src/devices/bus/pci/sis6326.h | 2 +- src/devices/bus/pci/virge_pci.cpp | 4 +- src/devices/bus/pci/vision.cpp | 12 +++--- src/devices/bus/pci/wd9710_pci.cpp | 30 +++++++------- src/devices/bus/pci/wd9710_pci.h | 4 +- 24 files changed, 168 insertions(+), 158 deletions(-) diff --git a/src/devices/bus/pci/clgd5446.cpp b/src/devices/bus/pci/clgd5446.cpp index 39d26fd94c1..16ccd2c3c01 100644 --- a/src/devices/bus/pci/clgd5446.cpp +++ b/src/devices/bus/pci/clgd5446.cpp @@ -27,8 +27,8 @@ DEFINE_DEVICE_TYPE(GD5446_PCI, cirrus_gd5446_pci_device, "clgd5446_pci", "Cirrus cirrus_gd5446_pci_device::cirrus_gd5446_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, GD5446_PCI, tag, owner, clock) - , m_vga(*this, "svga") - , m_vga_rom(*this, "vga_rom") + , m_vga(*this, "vga") + , m_bios(*this, "bios") { // subvendor ID: Returns values from ROM 0x7ffc-0x7ffe set_ids(0x101300b8, 0x00, 0x030000, 0x10130000); @@ -37,7 +37,7 @@ cirrus_gd5446_pci_device::cirrus_gd5446_pci_device(const machine_config &mconfig ROM_START( gd5446 ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31, AT27C256R // from photoply - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "quadtel", "Quadtel CL-GD5446 1.31" ) ROMX_LOAD( "cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c), ROM_BIOS(0) ) // Chip:CL-GD5446-HC-A - ROM: CL-GD5436/46 PCI VGA BIOS Version 1.25 - RAM: 1MB, 2MB, 4MB - @@ -75,7 +75,7 @@ void cirrus_gd5446_pci_device::device_start() // TODO: Rev B do the same, except it just maps GPIO here thru CF8 / CF4 add_map( 512, M_MEM, FUNC(cirrus_gd5446_pci_device::gpio_map)); - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -122,7 +122,7 @@ void cirrus_gd5446_pci_device::legacy_memory_map(address_map &map) void cirrus_gd5446_pci_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_vga, FUNC(cirrus_gd5446_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(cirrus_gd5446_vga_device::io_map)); } uint8_t cirrus_gd5446_pci_device::vram_r(offs_t offset) @@ -138,9 +138,9 @@ void cirrus_gd5446_pci_device::vram_w(offs_t offset, uint8_t data) void cirrus_gd5446_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { - { + if (BIT(command, 1)) memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(cirrus_gd5446_pci_device::vram_r)), write8sm_delegate(*this, FUNC(cirrus_gd5446_pci_device::vram_w))); - io_space->install_device(0x03b0, 0x03df, *this, &cirrus_gd5446_pci_device::legacy_io_map); - } + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &cirrus_gd5446_pci_device::legacy_io_map); } diff --git a/src/devices/bus/pci/clgd5446.h b/src/devices/bus/pci/clgd5446.h index 9bb9b54a676..332ff441fbb 100644 --- a/src/devices/bus/pci/clgd5446.h +++ b/src/devices/bus/pci/clgd5446.h @@ -33,7 +33,7 @@ protected: virtual void gpio_map(address_map &map) ATTR_COLD; private: required_device m_vga; - required_memory_region m_vga_rom; + required_memory_region m_bios; u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); diff --git a/src/devices/bus/pci/clgd546x_laguna.cpp b/src/devices/bus/pci/clgd546x_laguna.cpp index ff9e3b309db..2e20a559249 100644 --- a/src/devices/bus/pci/clgd546x_laguna.cpp +++ b/src/devices/bus/pci/clgd546x_laguna.cpp @@ -21,7 +21,7 @@ DEFINE_DEVICE_TYPE(GD5465_LAGUNA3D, cirrus_gd5465_laguna3d_device, "clgd5465_lag cirrus_gd5465_laguna3d_device::cirrus_gd5465_laguna3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, GD5465_LAGUNA3D, tag, owner, clock) , m_vga(*this, "vga") - , m_vga_rom(*this, "vga_rom") + , m_bios(*this, "bios") { // device ID 0x1013 Cirrus Logic // 0x00dx for Laguna revs @@ -34,7 +34,7 @@ cirrus_gd5465_laguna3d_device::cirrus_gd5465_laguna3d_device(const machine_confi Cirrus Logic CL-GD5464 Laguna3D // DSystems Wizar3D PCI graphics card - Chip: CL-GD5464-HC-A - ROM: DSystems Wizar3D 144a.10H - RAM: 2MB, 4MB, 8MB - Connector: DB15 - VESA feature connector ROM_START( clgd5464 ) - ROM_REGION32_LE( 0x08000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x08000, "bios", ROMREGION_ERASEFF ) ROM_LOAD("dsystems_wizard3d.vbi", 0x00000, 0x08000, CRC(df9f1570), SHA1(4e611f4039b851fd4237d450e38c9d764920a747) ) ROM_END @@ -42,7 +42,7 @@ ROM_END ROM_START( gd5465 ) // Chaintech GA-5465AS AGP graphics card - Chip: CL-GD5465 - ROM: CL-GD546x Laguna PCI VGA BIOS Version 1.62c - RAM: 4MB, 8MB - OSC: 14.3C7Y - Connector: DB15 - VESA feature connector - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "chaintech", "Chaintech GA-5465AS 1.62c" ) ROMX_LOAD( "chaintech.vbi", 0x0000, 0x8000, CRC(8afa1afb) SHA1(251a953d442dc34738f80371cfbd0fd9f1097635), ROM_BIOS(0) ) ROM_END @@ -73,7 +73,7 @@ void cirrus_gd5465_laguna3d_device::device_start() add_map( 32*1024, M_MEM, FUNC(cirrus_gd5465_laguna3d_device::mmio_map)); add_map( 32*1024*1024, M_MEM, FUNC(cirrus_gd5465_laguna3d_device::vram_aperture_map)); - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -121,7 +121,7 @@ void cirrus_gd5465_laguna3d_device::legacy_memory_map(address_map &map) void cirrus_gd5465_laguna3d_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_vga, FUNC(cirrus_gd5446_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(cirrus_gd5446_vga_device::io_map)); } uint8_t cirrus_gd5465_laguna3d_device::vram_r(offs_t offset) @@ -139,9 +139,11 @@ void cirrus_gd5465_laguna3d_device::map_extra(uint64_t memory_window_start, uint { if (m_vga_legacy_enable) { - memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(cirrus_gd5465_laguna3d_device::vram_r)), write8sm_delegate(*this, FUNC(cirrus_gd5465_laguna3d_device::vram_w))); + if (BIT(command, 1)) + memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(cirrus_gd5465_laguna3d_device::vram_r)), write8sm_delegate(*this, FUNC(cirrus_gd5465_laguna3d_device::vram_w))); - io_space->install_device(0x03b0, 0x03df, *this, &cirrus_gd5465_laguna3d_device::legacy_io_map); + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &cirrus_gd5465_laguna3d_device::legacy_io_map); } } diff --git a/src/devices/bus/pci/clgd546x_laguna.h b/src/devices/bus/pci/clgd546x_laguna.h index 601378e1d73..1146d5fb077 100644 --- a/src/devices/bus/pci/clgd546x_laguna.h +++ b/src/devices/bus/pci/clgd546x_laguna.h @@ -32,7 +32,7 @@ protected: virtual void vram_aperture_map(address_map &map) ATTR_COLD; private: required_device m_vga; - required_memory_region m_vga_rom; + required_memory_region m_bios; u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); diff --git a/src/devices/bus/pci/geforce.cpp b/src/devices/bus/pci/geforce.cpp index 7ebe882ede4..5fcb12182f2 100644 --- a/src/devices/bus/pci/geforce.cpp +++ b/src/devices/bus/pci/geforce.cpp @@ -38,7 +38,7 @@ geforce256_device::geforce256_device(const machine_config &mconfig, const char * ROM_START( geforce256 ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "elsa", "ELSA Synergy Force (Ver 7.03.00 01/11/00)" ) ROMX_LOAD( "nv10.bin", 0x0000, 0xac00, BAD_DUMP CRC(3525816d) SHA1(6fef6773dd1b18148890f8c3d45f988e5e06b50d), ROM_BIOS(0) ) ROM_END @@ -55,7 +55,7 @@ void geforce256_device::device_start() add_map( 16*1024*1024, M_MEM, FUNC(geforce256_device::mmio_map)); add_map(128*1024*1024, M_MEM, FUNC(geforce256_device::vram_aperture_map)); - add_rom((u8 *)m_vga_rom->base(), 0x10000); + add_rom((u8 *)m_bios->base(), 0x10000); expansion_rom_base = 0xc0000; // INTA# @@ -74,7 +74,7 @@ geforce256_ddr_device::geforce256_ddr_device(const machine_config &mconfig, cons } ROM_START( geforce256_ddr ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "creative", "Creative GeForce CT6971 AGP (Ver 2.10.4.02.04)" ) ROMX_LOAD( "creative.rom", 0x000000, 0x009800, CRC(fd956e0b) SHA1(aaac61e99193221280c5913cf3ca503e5b5ea408), ROM_BIOS(0) ) ROM_END @@ -99,7 +99,7 @@ quadro_device::quadro_device(const machine_config &mconfig, const char *tag, dev } ROM_START( quadro ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) // NB: difference between these two is type of RAM used (SDR vs. DDR) and // interface type (AGP x4 vs. Pro) ROM_SYSTEM_BIOS( 0, "elsa", "Elsa GLoria II (Ver 7.02.02)" ) diff --git a/src/devices/bus/pci/mga2064w.cpp b/src/devices/bus/pci/mga2064w.cpp index 559b2e012a3..f79606fd944 100644 --- a/src/devices/bus/pci/mga2064w.cpp +++ b/src/devices/bus/pci/mga2064w.cpp @@ -23,15 +23,15 @@ DEFINE_DEVICE_TYPE(MGA2064W, mga2064w_device, "mga2064w", "Matrox Millennium \"I mga2064w_device::mga2064w_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, MGA2064W, tag, owner, clock) , device_memory_interface(mconfig, *this) - , m_svga(*this, "svga") - , m_vga_rom(*this, "vga_rom") + , m_vga(*this, "vga") + , m_bios(*this, "bios") { set_ids(0x102b0519, 0x01, 0x030000, 0x00000000); m_mgabase1_real_space_config = address_space_config("mgabase1_regs", ENDIANNESS_LITTLE, 32, 14, 0, address_map_constructor(FUNC(mga2064w_device::mgabase1_map), this)); } ROM_START( mga2064w ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "rev3", "Matrox Power Graphics Accelerator V2.4 IS-MGA-2064W R3" ) ROMX_LOAD( "rev3.bin", 0x000000, 0x010000, CRC(cb623dab) SHA1(4dc10755613a8fa9599331d78995cfb15145440b), ROM_BIOS(0) ) // TODO: verify label naming for these @@ -54,11 +54,11 @@ void mga2064w_device::device_add_mconfig(machine_config &config) { screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); - screen.set_screen_update(m_svga, FUNC(matrox_vga_device::screen_update)); + screen.set_screen_update(m_vga, FUNC(matrox_vga_device::screen_update)); - MATROX_VGA(config, m_svga, 0); - m_svga->set_screen("screen"); - m_svga->set_vram_size(8*1024*1024); + MATROX_VGA(config, m_vga, 0); + m_vga->set_screen("screen"); + m_vga->set_vram_size(8*1024*1024); } void mga2064w_device::device_start() @@ -69,7 +69,7 @@ void mga2064w_device::device_start() add_map(8*1024*1024, M_MEM, FUNC(mga2064w_device::mgabase2_map)); // add_rom_from_region(); - add_rom((u8 *)m_vga_rom->base(), 0x10000); + add_rom((u8 *)m_bios->base(), 0x10000); } void mga2064w_device::device_reset() @@ -106,18 +106,18 @@ void mga2064w_device::mgabase1_map(address_map &map) map(0x1e14, 0x1e17).r(FUNC(mga2064w_device::status_r)); // map(0x1e18, 0x1e1b) ICLEAR // map(0x1e1c, 0x1e1f) IEN - map(0x1e20, 0x1e23).r(m_svga, FUNC(matrox_vga_device::vcount_r)); + map(0x1e20, 0x1e23).r(m_vga, FUNC(matrox_vga_device::vcount_r)); // map(0x1e40, 0x1e43) Reset // map(0x1e54, 0x1e57) OPMODE // map(0x1f00, 0x1fff) VGA CRTC linear I/O - map(0x1fb0, 0x1fdf).m(m_svga, FUNC(matrox_vga_device::io_map)); - map(0x3c00, 0x3c1f).m(m_svga, FUNC(matrox_vga_device::ramdac_ext_map)); + map(0x1fb0, 0x1fdf).m(m_vga, FUNC(matrox_vga_device::io_map)); + map(0x3c00, 0x3c1f).m(m_vga, FUNC(matrox_vga_device::ramdac_ext_map)); // map(0x3e00, 0x3fff) EXPDEV Expansion bus } void mga2064w_device::mgabase2_map(address_map &map) { - map(0x000000, 0x7fffff).rw(m_svga, FUNC(matrox_vga_device::mem_linear_r), FUNC(matrox_vga_device::mem_linear_w)); + map(0x000000, 0x7fffff).rw(m_vga, FUNC(matrox_vga_device::mem_linear_r), FUNC(matrox_vga_device::mem_linear_w)); } // assume all registers to work with dword accesses only @@ -484,7 +484,7 @@ u32 mga2064w_device::fifo_status_r() */ u32 mga2064w_device::status_r() { - return m_svga->vsync_status() << 3; + return m_vga->vsync_status() << 3; } void mga2064w_device::draw_trigger() @@ -521,7 +521,7 @@ void mga2064w_device::draw_trigger() { for (int x = xstart; x < xend; x++) { - m_svga->write_memory(x + (y * m_dwgreg.pitch), m_dwgreg.fcol & 0xff); + m_vga->write_memory(x + (y * m_dwgreg.pitch), m_dwgreg.fcol & 0xff); } } break; @@ -545,13 +545,13 @@ void mga2064w_device::draw_trigger() for (int x = xstart; x < xend; x+=8, src_x ++) { const u32 char_position = (src_x + src_y * source_pitch); - const u8 char_data = m_svga->read_memory(source_base + char_position); + const u8 char_data = m_vga->read_memory(source_base + char_position); for (int xi = 0; xi < 8; xi ++) { const u8 pen_dot = (char_data >> (7-xi)) & 1; u8 color_pen = (pen_dot ? m_dwgreg.fcol : m_dwgreg.bcol) & 0xff; - m_svga->write_memory((x + xi) + m_dwgreg.pitch * y, color_pen); + m_vga->write_memory((x + xi) + m_dwgreg.pitch * y, color_pen); } } @@ -568,8 +568,8 @@ void mga2064w_device::draw_trigger() { for (int x = xstart; x < xend; x++, src_x++) { - u8 color_pen = m_svga->read_memory(source_base + (source_pitch * src_y) + src_x); - m_svga->write_memory(x + y * m_dwgreg.pitch, color_pen); + u8 color_pen = m_vga->read_memory(source_base + (source_pitch * src_y) + src_x); + m_vga->write_memory(x + y * m_dwgreg.pitch, color_pen); } } } @@ -604,7 +604,7 @@ u32 mga2064w_device::dmawin_idump_r(offs_t offset, u32 mem_mask) const u32 x_base = m_dwgreg.current_x + m_dwgreg.fxleft; for (int xi = 0; xi < 4; xi ++) - res |= m_svga->read_memory((y_base) + (x_base + xi)) << (xi * 8); + res |= m_vga->read_memory((y_base) + (x_base + xi)) << (xi * 8); m_dwgreg.current_x += 4; if (m_dwgreg.current_x > m_dwgreg.ar[0]) { @@ -638,7 +638,7 @@ void mga2064w_device::dmawin_iload_w(offs_t offset, u32 data, u32 mem_mask) for (int xi = 0; xi < 4; xi++) { u8 color_pen = (data >> (8 * xi)) & 0xff; - m_svga->write_memory((y_base) + (x_base + xi), color_pen); + m_vga->write_memory((y_base) + (x_base + xi), color_pen); } m_dwgreg.current_x += 4; if (m_dwgreg.current_x > m_dwgreg.ar[0]) @@ -666,28 +666,28 @@ void mga2064w_device::legacy_memory_map(address_map &map) void mga2064w_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_svga, FUNC(matrox_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(matrox_vga_device::io_map)); } uint8_t mga2064w_device::vram_r(offs_t offset) { - return downcast(m_svga.target())->mem_r(offset); + return downcast(m_vga.target())->mem_r(offset); } void mga2064w_device::vram_w(offs_t offset, uint8_t data) { - downcast(m_svga.target())->mem_w(offset, data); + downcast(m_vga.target())->mem_w(offset, data); } void mga2064w_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { // TODO: both can be disabled thru config options - { + if (BIT(command, 1)) memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(mga2064w_device::vram_r)), write8sm_delegate(*this, FUNC(mga2064w_device::vram_w))); - io_space->install_device(0x03b0, 0x03df, *this, &mga2064w_device::legacy_io_map); - } + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &mga2064w_device::legacy_io_map); } /* diff --git a/src/devices/bus/pci/mga2064w.h b/src/devices/bus/pci/mga2064w.h index 3d557083679..e44ecc9758c 100644 --- a/src/devices/bus/pci/mga2064w.h +++ b/src/devices/bus/pci/mga2064w.h @@ -41,8 +41,8 @@ protected: u32 dmawin_idump_r(offs_t offset, u32 mem_mask = ~0); void dmawin_iload_w(offs_t offset, u32 data, u32 mem_mask = ~0); - required_device m_svga; - required_memory_region m_vga_rom; + required_device m_vga; + required_memory_region m_bios; private: u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); diff --git a/src/devices/bus/pci/neon250.cpp b/src/devices/bus/pci/neon250.cpp index b0908182e9c..9b6d017a688 100644 --- a/src/devices/bus/pci/neon250.cpp +++ b/src/devices/bus/pci/neon250.cpp @@ -28,8 +28,8 @@ DEFINE_DEVICE_TYPE(NEON250, neon250_device, "neon250", "VideoLogic PowerVR neon250_device::neon250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) - , m_svga(*this, "svga") - , m_vga_rom(*this, "vga_rom") + , m_vga(*this, "vga") + , m_bios(*this, "bios") { // PowerVR Neon 250 AGP (NEC branded) set_ids_agp(0x10330067, 0x02, 0x10100120); @@ -41,7 +41,7 @@ neon250_device::neon250_device(const machine_config &mconfig, const char *tag, d } ROM_START( neon250 ) - ROM_REGION32_LE( 0x20000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x20000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "neon250", "NEC Neon 250" ) ROMX_LOAD( "n0020331.bin", 0x000000, 0x20000, CRC(e76008f5) SHA1(1ddda1494d5b32148e2c9e7a6557f00ee9cffea6), ROM_BIOS(0) ) // ROMX_LOAD( "ppvr201i.bin", 0x000000, 0x10000, CRC(b6e763c9) SHA1(1e1fecbb663dde5295a9db98dde70a4e1bd8338d), ROM_BIOS(0) ) @@ -59,12 +59,12 @@ void neon250_device::device_add_mconfig(machine_config &config) { screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); - screen.set_screen_update(m_svga, FUNC(vga_device::screen_update)); + screen.set_screen_update(m_vga, FUNC(vga_device::screen_update)); // TODO: PVR "VGA Emulator" - VGA(config, m_svga, 0); - m_svga->set_screen("screen"); - m_svga->set_vram_size(32*1024*1024); + VGA(config, m_vga, 0); + m_vga->set_screen("screen"); + m_vga->set_vram_size(32*1024*1024); } @@ -80,7 +80,7 @@ void neon250_device::device_start() // not indicated, assume no-pref again add_map( 256, M_IO, FUNC(neon250_device::pvr_io_map)); - add_rom((u8 *)m_vga_rom->base(), 128*1024 ); + add_rom((u8 *)m_bios->base(), 128*1024 ); expansion_rom_base = 0xc0000; // INTA# @@ -162,27 +162,29 @@ void neon250_device::legacy_memory_map(address_map &map) void neon250_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_svga, FUNC(vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(vga_device::io_map)); } uint8_t neon250_device::vram_r(offs_t offset) { - return downcast(m_svga.target())->mem_r(offset); + return downcast(m_vga.target())->mem_r(offset); } void neon250_device::vram_w(offs_t offset, uint8_t data) { - downcast(m_svga.target())->mem_w(offset, data); + downcast(m_vga.target())->mem_w(offset, data); } void neon250_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { - if (command & 7) + if (BIT(command, 1)) { memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(neon250_device::vram_r)), write8sm_delegate(*this, FUNC(neon250_device::vram_w))); + } - io_space->install_device(0x03b0, 0x03df, *this, &neon250_device::legacy_io_map); - //memory_space->install_rom(0xc0000, 0xcffff, (void *)expansion_rom); + if (BIT(command, 0)) + { + io_space->install_device(0x0000, 0xffff, *this, &neon250_device::legacy_io_map); } } diff --git a/src/devices/bus/pci/neon250.h b/src/devices/bus/pci/neon250.h index 286f25a4343..0e490f110f1 100644 --- a/src/devices/bus/pci/neon250.h +++ b/src/devices/bus/pci/neon250.h @@ -30,8 +30,8 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; - required_device m_svga; - required_memory_region m_vga_rom; + required_device m_vga; + required_memory_region m_bios; virtual u8 capptr_r() override; diff --git a/src/devices/bus/pci/oti_spitfire.cpp b/src/devices/bus/pci/oti_spitfire.cpp index a3e6ecbf7b9..3c2cdc06b0a 100644 --- a/src/devices/bus/pci/oti_spitfire.cpp +++ b/src/devices/bus/pci/oti_spitfire.cpp @@ -25,15 +25,15 @@ TODO: //OTI-64105 //OTI-64107 -DEFINE_DEVICE_TYPE(OTI64111_PCI, oti64111_pci_device, "oti64111_pci", "OTI-64111 \"Spitfire\"") +DEFINE_DEVICE_TYPE(OTI64111_PCI, oti64111_pci_device, "oti64111_pci", "Oak Technology OTI-64111 \"Spitfire\"") //OTI-64217 //OTI-64317 oti64111_pci_device::oti64111_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) - , m_svga(*this, "svga") - , m_vga_rom(*this, "vga_rom") + , m_vga(*this, "vga") + , m_bios(*this, "bios") { // Rev C set_ids(0x104e0111, 0x30, 0x030000, 0x104e0111); @@ -45,7 +45,7 @@ oti64111_pci_device::oti64111_pci_device(const machine_config &mconfig, const ch } ROM_START( oti64111 ) - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "spitfire", "v111.20 10/10/96" ) ROMX_LOAD( "ot64111spitfire.vbi", 0x0000, 0x8000, CRC(fb031e98) SHA1(16826d93bc2a09d91b52cca3f72447501daee2d2), ROM_BIOS(0) ) ROM_END @@ -59,11 +59,11 @@ void oti64111_pci_device::device_add_mconfig(machine_config &config) { screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); - screen.set_screen_update(m_svga, FUNC(oak_oti111_vga_device::screen_update)); + screen.set_screen_update(m_vga, FUNC(oak_oti111_vga_device::screen_update)); - OTI111(config, m_svga, 0); - m_svga->set_screen("screen"); - m_svga->set_vram_size(4*1024*1024); + OTI111(config, m_vga, 0); + m_vga->set_screen("screen"); + m_vga->set_vram_size(4*1024*1024); } void oti64111_pci_device::device_start() @@ -74,7 +74,7 @@ void oti64111_pci_device::device_start() add_map(8*1024*1024, M_MEM, FUNC(oti64111_pci_device::vram_aperture_map)); add_map( 256, M_IO, FUNC(oti64111_pci_device::extio_map)); - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -102,33 +102,33 @@ void oti64111_pci_device::config_map(address_map &map) void oti64111_pci_device::mmio_map(address_map &map) { - map(0x00, 0x7f).rw(m_svga, FUNC(oak_oti111_vga_device::xga_read), FUNC(oak_oti111_vga_device::xga_write)); - map(0x80, 0xbf).m(m_svga, FUNC(oak_oti111_vga_device::multimedia_map)); + map(0x00, 0x7f).rw(m_vga, FUNC(oak_oti111_vga_device::xga_read), FUNC(oak_oti111_vga_device::xga_write)); + map(0x80, 0xbf).m(m_vga, FUNC(oak_oti111_vga_device::multimedia_map)); } void oti64111_pci_device::vram_aperture_map(address_map &map) { - map(0x000000, 0x7fffff).rw(m_svga, FUNC(oak_oti111_vga_device::mem_linear_r), FUNC(oak_oti111_vga_device::mem_linear_w)); + map(0x000000, 0x7fffff).rw(m_vga, FUNC(oak_oti111_vga_device::mem_linear_r), FUNC(oak_oti111_vga_device::mem_linear_w)); } void oti64111_pci_device::extio_map(address_map &map) { - map(0x00e0, 0x00ef).m(m_svga, FUNC(oak_oti111_vga_device::ramdac_mmio_map)); + map(0x00e0, 0x00ef).m(m_vga, FUNC(oak_oti111_vga_device::ramdac_mmio_map)); } void oti64111_pci_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_svga, FUNC(oak_oti111_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(oak_oti111_vga_device::io_map)); } uint8_t oti64111_pci_device::vram_r(offs_t offset) { - return downcast(m_svga.target())->mem_r(offset); + return downcast(m_vga.target())->mem_r(offset); } void oti64111_pci_device::vram_w(offs_t offset, uint8_t data) { - downcast(m_svga.target())->mem_w(offset, data); + downcast(m_vga.target())->mem_w(offset, data); } void oti64111_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, @@ -141,6 +141,6 @@ void oti64111_pci_device::map_extra(uint64_t memory_window_start, uint64_t memor if (BIT(command, 0)) { - io_space->install_device(0x03b0, 0x03df, *this, &oti64111_pci_device::legacy_io_map); + io_space->install_device(0x0000, 0xffff, *this, &oti64111_pci_device::legacy_io_map); } } diff --git a/src/devices/bus/pci/oti_spitfire.h b/src/devices/bus/pci/oti_spitfire.h index 5494f9701c3..4835b9c00e9 100644 --- a/src/devices/bus/pci/oti_spitfire.h +++ b/src/devices/bus/pci/oti_spitfire.h @@ -31,8 +31,8 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; - required_device m_svga; - required_memory_region m_vga_rom; + required_device m_vga; + required_memory_region m_bios; private: void mmio_map(address_map &map) ATTR_COLD; void vram_aperture_map(address_map &map) ATTR_COLD; diff --git a/src/devices/bus/pci/permedia2.cpp b/src/devices/bus/pci/permedia2.cpp index b00b0a2b7d2..a903b131c22 100644 --- a/src/devices/bus/pci/permedia2.cpp +++ b/src/devices/bus/pci/permedia2.cpp @@ -2,6 +2,11 @@ // copyright-holders: /************************************************************************************************** +3Dlabs Permedia 2 + +TODO: +- placeholder for roms; +- black screen when mounted; **************************************************************************************************/ @@ -22,7 +27,7 @@ DEFINE_DEVICE_TYPE(PERMEDIA2, permedia2_device, "permedia2", "3Dlabs Permedi permedia2_device::permedia2_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) , m_vga(*this, "vga") - , m_vga_rom(*this, "vga_rom") + , m_bios(*this, "bios") { // TODO: can change class code set_ids(0x104c3d07, 0x01, 0x030100, 0x104c3d07); @@ -35,7 +40,7 @@ permedia2_device::permedia2_device(const machine_config &mconfig, const char *ta } ROM_START( permedia2 ) - ROM_REGION32_LE( 0x20000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x20000, "bios", ROMREGION_ERASEFF ) // TODO: 4 other dumps available on VGALegacyMK3, separate Sun versions to own subclass ROM_SYSTEM_BIOS( 0, "creative", "03/03/98 Creative Graphics Blaster Exxtreme" ) ROMX_LOAD( "creative.vbi", 0x00000, 0x08000, CRC(3e622da7) SHA1(b06f89777badfdb7cd4c76b414ba19fcaed243c9), ROM_BIOS(0) ) @@ -82,7 +87,7 @@ void permedia2_device::device_start() add_map(8*1024*1024, M_MEM, FUNC(permedia2_device::aperture1_map)); add_map(8*1024*1024, M_MEM, FUNC(permedia2_device::aperture2_map)); - add_rom((u8 *)m_vga_rom->base(), 128*1024 ); + add_rom((u8 *)m_bios->base(), 128*1024 ); expansion_rom_base = 0xc0000; // INTA# @@ -139,7 +144,7 @@ void permedia2_device::legacy_memory_map(address_map &map) void permedia2_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_vga, FUNC(vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(vga_device::io_map)); } uint8_t permedia2_device::vram_r(offs_t offset) @@ -155,12 +160,10 @@ void permedia2_device::vram_w(offs_t offset, uint8_t data) void permedia2_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { - if (command & 7) - { + if (BIT(command, 1)) memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(permedia2_device::vram_r)), write8sm_delegate(*this, FUNC(permedia2_device::vram_w))); - io_space->install_device(0x03b0, 0x03df, *this, &permedia2_device::legacy_io_map); - //memory_space->install_rom(0xc0000, 0xcffff, (void *)expansion_rom); - } + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &permedia2_device::legacy_io_map); } diff --git a/src/devices/bus/pci/permedia2.h b/src/devices/bus/pci/permedia2.h index 603afc4723d..40bf1fe8eb5 100644 --- a/src/devices/bus/pci/permedia2.h +++ b/src/devices/bus/pci/permedia2.h @@ -37,7 +37,7 @@ protected: virtual u8 capptr_r() override; private: required_device m_vga; - required_memory_region m_vga_rom; + required_memory_region m_bios; u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); diff --git a/src/devices/bus/pci/promotion.cpp b/src/devices/bus/pci/promotion.cpp index 68396af870b..0380679de85 100644 --- a/src/devices/bus/pci/promotion.cpp +++ b/src/devices/bus/pci/promotion.cpp @@ -44,7 +44,7 @@ DEFINE_DEVICE_TYPE(PROMOTION3210, promotion3210_device, "promotion3210", " promotion3210_device::promotion3210_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) , m_vga(*this, "vga") - , m_vga_rom(*this, "vga_rom") + , m_bios(*this, "bios") { // vendor ID 0x1142 Alliance Semiconductor Corporation // subvendor unknown @@ -57,7 +57,7 @@ promotion3210_device::promotion3210_device(const machine_config &mconfig, const } ROM_START( promotion3210 ) - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "miro", "miro Video 12PD" ) ROMX_LOAD( "mirovideo12pd.vbi", 0x0000, 0x8000, CRC(46041709) SHA1(bd43f05ae7ddb4bbf515132b72b32719b60e6950), ROM_BIOS(0) ) ROM_END @@ -89,7 +89,7 @@ void promotion3210_device::device_start() add_map( 4*1024*1024, M_MEM, FUNC(promotion3210_device::vram_aperture_map)); - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -127,7 +127,7 @@ void promotion3210_device::legacy_memory_map(address_map &map) void promotion3210_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_vga, FUNC(vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(vga_device::io_map)); } uint8_t promotion3210_device::vram_r(offs_t offset) @@ -143,11 +143,9 @@ void promotion3210_device::vram_w(offs_t offset, uint8_t data) void promotion3210_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { -// if (1) - { + if (BIT(command, 1)) memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(promotion3210_device::vram_r)), write8sm_delegate(*this, FUNC(promotion3210_device::vram_w))); - io_space->install_device(0x03b0, 0x03df, *this, &promotion3210_device::legacy_io_map); - //memory_space->install_rom(0xc0000, 0xcffff, (void *)expansion_rom); - } + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &promotion3210_device::legacy_io_map); } diff --git a/src/devices/bus/pci/promotion.h b/src/devices/bus/pci/promotion.h index 704d6deb354..7c0b4cf98f8 100644 --- a/src/devices/bus/pci/promotion.h +++ b/src/devices/bus/pci/promotion.h @@ -36,7 +36,7 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; required_device m_vga; - required_memory_region m_vga_rom; + required_memory_region m_bios; private: u8 vram_r(offs_t offset); void vram_w(offs_t offset, uint8_t data); diff --git a/src/devices/bus/pci/riva128.cpp b/src/devices/bus/pci/riva128.cpp index e1a41a4818a..6b97ce5d204 100644 --- a/src/devices/bus/pci/riva128.cpp +++ b/src/devices/bus/pci/riva128.cpp @@ -33,8 +33,8 @@ DEFINE_DEVICE_TYPE(RIVA128ZX, riva128zx_device, "riva128zx", "SGS-Thompson/nVidi riva128_device::riva128_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) - , m_svga(*this, "svga") - , m_vga_rom(*this, "vga_rom") + , m_vga(*this, "vga") + , m_bios(*this, "bios") { // device ID 0x12d2 SGS-Thompson/nVidia joint venture // 0x0018 RIVA 128 (NV3) @@ -49,7 +49,7 @@ riva128_device::riva128_device(const machine_config &mconfig, const char *tag, d } ROM_START( riva128 ) - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "diamond", "Diamond Viper V330 1.62-CO 01/14/98" ) ROMX_LOAD( "diamond_v330_rev-e.vbi", 0x0000, 0x8000, CRC(68686ddc) SHA1(cd2e299acd79624c7d82ce3317004c96bd4e36f7), ROM_BIOS(0) ) ROM_SYSTEM_BIOS( 1, "asus", "ASUS AGP/3DP-V3000 1.51B 09/06/97" ) @@ -67,13 +67,13 @@ void riva128_device::device_add_mconfig(machine_config &config) { screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); - screen.set_screen_update(m_svga, FUNC(nvidia_nv3_vga_device::screen_update)); + screen.set_screen_update(m_vga, FUNC(nvidia_nv3_vga_device::screen_update)); - NVIDIA_NV3_VGA(config, m_svga, 0); - m_svga->set_screen("screen"); + NVIDIA_NV3_VGA(config, m_vga, 0); + m_vga->set_screen("screen"); // FIXME: shared RAM // reports as 4MB in AIDA16 - m_svga->set_vram_size(4*1024*1024); + m_vga->set_vram_size(4*1024*1024); } void riva128_device::device_start() @@ -86,7 +86,7 @@ void riva128_device::device_start() add_map(0x100, M_IO, FUNC(riva128_device::indirect_io_map)); // TODO: Windows 98 expects an extra range mapped at 0x10000000-0x10007fff - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -194,17 +194,17 @@ void riva128_device::legacy_memory_map(address_map &map) void riva128_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_svga, FUNC(nvidia_nv3_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(nvidia_nv3_vga_device::io_map)); } uint8_t riva128_device::vram_r(offs_t offset) { - return downcast(m_svga.target())->mem_r(offset); + return downcast(m_vga.target())->mem_r(offset); } void riva128_device::vram_w(offs_t offset, uint8_t data) { - downcast(m_svga.target())->mem_w(offset, data); + downcast(m_vga.target())->mem_w(offset, data); } void riva128_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, @@ -212,10 +212,11 @@ void riva128_device::map_extra(uint64_t memory_window_start, uint64_t memory_win { if (m_vga_legacy_enable) { - memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(riva128_device::vram_r)), write8sm_delegate(*this, FUNC(riva128_device::vram_w))); + if (BIT(command, 1)) + memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(riva128_device::vram_r)), write8sm_delegate(*this, FUNC(riva128_device::vram_w))); - io_space->install_device(0x03b0, 0x03df, *this, &riva128_device::legacy_io_map); - //memory_space->install_rom(0xc0000, 0xcffff, (void *)expansion_rom); + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &riva128_device::legacy_io_map); } } @@ -233,7 +234,7 @@ riva128zx_device::riva128zx_device(const machine_config &mconfig, const char *ta } ROM_START( riva128zx ) - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "asus", "ASUS AGP-V3000 ZX TV (V1.70D.03)" ) ROMX_LOAD( "asus_agp-v3000zx.vbi", 0x000000, 0x008000, CRC(8319de18) SHA1(837fe8afdf03196550c51ff4987e7f25cc75222c), ROM_BIOS(0) ) // TODO: confirm if this is really a 128ZX diff --git a/src/devices/bus/pci/riva128.h b/src/devices/bus/pci/riva128.h index a01d8721729..7d176e1b44c 100644 --- a/src/devices/bus/pci/riva128.h +++ b/src/devices/bus/pci/riva128.h @@ -36,8 +36,8 @@ protected: virtual void vram_aperture_map(address_map &map) ATTR_COLD; virtual void indirect_io_map(address_map &map) ATTR_COLD; - required_device m_svga; - required_memory_region m_vga_rom; + required_device m_vga; + required_memory_region m_bios; bool m_vga_legacy_enable = false; private: diff --git a/src/devices/bus/pci/rivatnt.cpp b/src/devices/bus/pci/rivatnt.cpp index 5eca413fa4e..3a88c6fcc2a 100644 --- a/src/devices/bus/pci/rivatnt.cpp +++ b/src/devices/bus/pci/rivatnt.cpp @@ -52,7 +52,7 @@ rivatnt_device::rivatnt_device(const machine_config &mconfig, const char *tag, d } ROM_START( rivatnt ) - ROM_REGION32_LE( 0x8800, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8800, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "creative", "Creative Graphics Blaster RIVA TNT (V2.04.6.18)" ) ROMX_LOAD( "nv4_creative.rom", 0x0000, 0x8000, CRC(fe527a82) SHA1(2bb22bbaa7d2b61bce403f3163197abef85abdaa), ROM_BIOS(0) ) ROM_SYSTEM_BIOS( 1, "stb", "STB Velocity 4400 (ver. 1.01)" ) @@ -76,7 +76,7 @@ void rivatnt_device::device_start() add_map( 16*1024*1024, M_MEM, FUNC(rivatnt_device::mmio_map)); add_map(128*1024*1024, M_MEM, FUNC(rivatnt_device::vram_aperture_map)); - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -103,7 +103,7 @@ rivatnt2_device::rivatnt2_device(const machine_config &mconfig, const char *tag, } ROM_START( rivatnt2 ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) // Despite the versioning it claims to be (C) 1999-2001 ROM_SYSTEM_BIOS( 0, "leadtek", "Leadtek WinFast 3D S320 II (V99.04.12)" ) ROMX_LOAD( "rivatnt2leadteks320ii.bin", 0x000000, 0x010000, CRC(f1379a55) SHA1(1ea0216df1fee9ee1bcd66c26adafbbdb6a0f1f1), ROM_BIOS(0) ) @@ -124,7 +124,7 @@ void rivatnt2_device::device_start() add_map( 16*1024*1024, M_MEM, FUNC(rivatnt2_device::mmio_map)); add_map(128*1024*1024, M_MEM, FUNC(rivatnt2_device::vram_aperture_map)); - add_rom((u8 *)m_vga_rom->base(), 0x10000); + add_rom((u8 *)m_bios->base(), 0x10000); expansion_rom_base = 0xc0000; // INTA# @@ -142,7 +142,7 @@ rivatnt2_ultra_device::rivatnt2_ultra_device(const machine_config &mconfig, cons } ROM_START( rivatnt2_ultra ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "creative", "Creative 3D Blaster RIVA TNT2 Ultra AGP" ) ROMX_LOAD( "creative.bin", 0x000000, 0x010000, CRC(cf3828ce) SHA1(733d8c3f179f89f0e238ffb95717c0fafd1053aa), ROM_BIOS(0) ) ROM_END @@ -163,7 +163,7 @@ vanta_device::vanta_device(const machine_config &mconfig, const char *tag, devic // TODO: None of the Vanta BIOSes returns a real vendor inside, confirm OEM card names ROM_START( vanta ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "inno3d", "InnoVISION Inno3D Vanta (V2.05.13)" ) ROMX_LOAD( "inno3d_nv5.bin", 0x000000, 0x00a800, CRC(9574114f) SHA1(f0e684bca6cc9c1e51a91dccdd5f216b16ea4fe1), ROM_BIOS(0) ) ROM_SYSTEM_BIOS( 1, "pine", "Pine Vanta (V2.05.17.04.00)" ) @@ -188,7 +188,7 @@ rivatnt2_model64_device::rivatnt2_model64_device(const machine_config &mconfig, } ROM_START( rivatnt2_m64 ) - ROM_REGION32_LE( 0x20000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x20000, "bios", ROMREGION_ERASEFF ) ROM_SYSTEM_BIOS( 0, "asus", "ASUS AGP-V3800M (V3.05.00.10.31)" ) ROMX_LOAD( "asus_125-143mhz32mb.rom", 0x000000, 0x00b000, CRC(be95dc0c) SHA1(35c367b4f9d2db1bfca6d829744d9ffbd2db6e8a), ROM_BIOS(0) ) ROM_SYSTEM_BIOS( 1, "ct6980", "Creative CT6984 AGP (V2.05.4.17.03)" ) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 03eb7e35a2c..3b8efe1e87f 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -29,7 +29,7 @@ DEFINE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device, "sis6326_agp", "SiS 6326 sis6326_pci_device::sis6326_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) , m_vga(*this, "vga") - , m_vga_rom(*this, "vga_rom") + , m_bios(*this, "bios") { set_ids(0x10396326, 0xa0, 0x030000, 0x10396326); } @@ -40,7 +40,7 @@ sis6326_pci_device::sis6326_pci_device(const machine_config &mconfig, const char } ROM_START( sis6326pci ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) ROM_DEFAULT_BIOS("sis") ROM_SYSTEM_BIOS( 0, "sis", "SiS6326 4MB 1.25" ) @@ -77,7 +77,7 @@ void sis6326_pci_device::device_start() add_map(128, M_IO, FUNC(sis6326_pci_device::vmi_map)); // TODO: should really read the actual BIOS size and set md23 accordingly - add_rom((u8 *)m_vga_rom->base(), 0x10000); + add_rom((u8 *)m_bios->base(), 0x10000); expansion_rom_base = 0xc0000; // INTA# @@ -233,7 +233,7 @@ void sis6326_pci_device::legacy_memory_map(address_map &map) void sis6326_pci_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_vga, FUNC(sis6326_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(sis6326_vga_device::io_map)); } uint8_t sis6326_pci_device::vram_r(offs_t offset) @@ -256,7 +256,7 @@ void sis6326_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory if (BIT(command, 0)) { - io_space->install_device(0x03b0, 0x03df, *this, &sis6326_pci_device::legacy_io_map); + io_space->install_device(0x0000, 0xffff, *this, &sis6326_pci_device::legacy_io_map); } } @@ -546,7 +546,7 @@ sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, const char } ROM_START( sis6326agp ) - ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) // Default is AOpen for supporting OpenGL ROM_DEFAULT_BIOS("aopen") diff --git a/src/devices/bus/pci/sis6326.h b/src/devices/bus/pci/sis6326.h index ab5db4f566b..cbbbf1da449 100644 --- a/src/devices/bus/pci/sis6326.h +++ b/src/devices/bus/pci/sis6326.h @@ -36,7 +36,7 @@ protected: void vmi_map(address_map &map) ATTR_COLD; required_device m_vga; - required_memory_region m_vga_rom; + required_memory_region m_bios; private: void legacy_memory_map(address_map &map) ATTR_COLD; void legacy_io_map(address_map &map) ATTR_COLD; diff --git a/src/devices/bus/pci/virge_pci.cpp b/src/devices/bus/pci/virge_pci.cpp index 04020efc32b..ad54f89fe16 100644 --- a/src/devices/bus/pci/virge_pci.cpp +++ b/src/devices/bus/pci/virge_pci.cpp @@ -87,7 +87,7 @@ void virge_pci_device::config_map(address_map &map) void virge_pci_device::legacy_io_map(address_map &map) { - map(0x00, 0x2f).m(m_vga, FUNC(s3virge_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(s3virge_vga_device::io_map)); } // FIXME: belongs to s3virge_vga_device. @@ -257,7 +257,7 @@ void virge_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_w if (BIT(command, 0)) { - io_space->install_device(0x03b0, 0x03df, *this, &virge_pci_device::legacy_io_map); + io_space->install_device(0x0000, 0xffff, *this, &virge_pci_device::legacy_io_map); // Available at MMFF20 only if true if (m_vga->read_pd26_strapping() == false) diff --git a/src/devices/bus/pci/vision.cpp b/src/devices/bus/pci/vision.cpp index ab21fecfa68..f2ba4715cdb 100644 --- a/src/devices/bus/pci/vision.cpp +++ b/src/devices/bus/pci/vision.cpp @@ -102,11 +102,6 @@ void vision864_pci_device::device_reset() remap_cb(); } -void vision864_pci_device::legacy_io_map(address_map &map) -{ - map(0, 0x02f).m(m_vga, FUNC(s3vision864_vga_device::io_map)); -} - uint8_t vision864_pci_device::vram_r(offs_t offset) { return downcast(m_vga.target())->mem_r(offset); @@ -117,6 +112,11 @@ void vision864_pci_device::vram_w(offs_t offset, uint8_t data) downcast(m_vga.target())->mem_w(offset, data); } +void vision864_pci_device::legacy_io_map(address_map &map) +{ + map(0x03b0, 0x03df).m(m_vga, FUNC(s3vision864_vga_device::io_map)); +} + void vision864_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { @@ -127,7 +127,7 @@ void vision864_pci_device::map_extra(uint64_t memory_window_start, uint64_t memo if (BIT(command, 0)) { - io_space->install_device(0x03b0, 0x03df, *this, &vision864_pci_device::legacy_io_map); + io_space->install_device(0x0000, 0xffff, *this, &vision864_pci_device::legacy_io_map); } } diff --git a/src/devices/bus/pci/wd9710_pci.cpp b/src/devices/bus/pci/wd9710_pci.cpp index 4e4ec013bb5..83bc4ea33f3 100644 --- a/src/devices/bus/pci/wd9710_pci.cpp +++ b/src/devices/bus/pci/wd9710_pci.cpp @@ -29,8 +29,8 @@ DEFINE_DEVICE_TYPE(WD9710_PCI, wd9710_pci_device, "wd9710_pci", "Western Dig wd9710_pci_device::wd9710_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) - , m_svga(*this, "svga") - , m_vga_rom(*this, "vga_rom") + , m_vga(*this, "vga") + , m_bios(*this, "bios") { set_ids(0x101c9710, 0x00, 0x030000, 0x101c9710); } @@ -41,7 +41,7 @@ wd9710_pci_device::wd9710_pci_device(const machine_config &mconfig, const char * } ROM_START( wd9710mz ) - ROM_REGION32_LE( 0x8000, "vga_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) // Philips Paradise Pipeline 64 ROM_SYSTEM_BIOS( 0, "paradise", "Paradise WD9710 v1.01.00 12/06/95") ROMX_LOAD( "bios.bin", 0x0000, 0x8000, CRC(98338249) SHA1(b5dbb28d60adf53c711ec16bc45eab102e40b6a2), ROM_BIOS(0) ) @@ -57,13 +57,13 @@ void wd9710_pci_device::device_add_mconfig(machine_config &config) { screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(25.175_MHz_XTAL, 800, 0, 640, 524, 0, 480); - screen.set_screen_update("svga", FUNC(wd90c33_vga_device::screen_update)); + screen.set_screen_update("vga", FUNC(wd90c33_vga_device::screen_update)); // TODO: bump to specific WD9710 VGA core - WD90C33(config, m_svga, 0); - m_svga->set_screen("screen"); + WD90C33(config, m_vga, 0); + m_vga->set_screen("screen"); // 2MB, 4MB - m_svga->set_vram_size(4*1024*1024); + m_vga->set_vram_size(4*1024*1024); } void wd9710_pci_device::device_start() @@ -72,7 +72,7 @@ void wd9710_pci_device::device_start() add_map(4*1024*1024, M_MEM, FUNC(wd9710_pci_device::vram_aperture_map)); - add_rom((u8 *)m_vga_rom->base(), 0x8000); + add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; // INTA# @@ -98,22 +98,26 @@ void wd9710_pci_device::config_map(address_map &map) void wd9710_pci_device::vram_aperture_map(address_map &map) { - map(0x000000, 0x3fffff).rw(m_svga, FUNC(wd90c33_vga_device::mem_linear_r), FUNC(wd90c33_vga_device::mem_linear_w)); + map(0x000000, 0x3fffff).rw(m_vga, FUNC(wd90c33_vga_device::mem_linear_r), FUNC(wd90c33_vga_device::mem_linear_w)); } void wd9710_pci_device::legacy_io_map(address_map &map) { - map(0, 0x02f).m(m_svga, FUNC(wd90c33_vga_device::io_map)); + map(0x03b0, 0x03df).m(m_vga, FUNC(wd90c33_vga_device::io_map)); + map(0x23c0, 0x23c7).m(m_vga, FUNC(wd90c33_vga_device::ext_io_map)); + map(0x23d0, 0x23d3).m(m_vga, FUNC(wd90c33_vga_device::localbus_if_map)); + // NOTE: akin to base wd90c33 ISA card, wants mode setup to avoid dropping in MDA mode + map(0x46e8, 0x46e8).w(m_vga, FUNC(wd90c33_vga_device::mode_setup_w)); } uint8_t wd9710_pci_device::vram_r(offs_t offset) { - return downcast(m_svga.target())->mem_r(offset); + return downcast(m_vga.target())->mem_r(offset); } void wd9710_pci_device::vram_w(offs_t offset, uint8_t data) { - downcast(m_svga.target())->mem_w(offset, data); + downcast(m_vga.target())->mem_w(offset, data); } void wd9710_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, @@ -126,7 +130,7 @@ void wd9710_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_ if (BIT(command, 0)) { - io_space->install_device(0x03b0, 0x03df, *this, &wd9710_pci_device::legacy_io_map); + io_space->install_device(0x0000, 0xffff, *this, &wd9710_pci_device::legacy_io_map); // TODO: PnP ports (shouldn't have any other BAR space) } } diff --git a/src/devices/bus/pci/wd9710_pci.h b/src/devices/bus/pci/wd9710_pci.h index 13bf3961e7c..0daefe8d2e8 100644 --- a/src/devices/bus/pci/wd9710_pci.h +++ b/src/devices/bus/pci/wd9710_pci.h @@ -35,8 +35,8 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; private: - required_device m_svga; - required_memory_region m_vga_rom; + required_device m_vga; + required_memory_region m_bios; void vram_aperture_map(address_map &map) ATTR_COLD; From c4f99561abef8ff36534f0847df3384c8193f3b7 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 27 Feb 2026 20:12:21 +0100 Subject: [PATCH 072/351] bus/pci/sis6326.cpp: fix pattern regs mode, fix mouse caret in notepad --- src/devices/bus/pci/sis6326.cpp | 3 +-- src/devices/video/pc_vga_sis.cpp | 9 ++++++++- src/mame/pc/pulltrig.cpp | 2 +- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 3b8efe1e87f..332e93dc93c 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -312,11 +312,10 @@ u8 sis6326_pci_device::get_pat_fgcol(u32 y, u32 x) return m_fg_color; } -// TODO: not yet sure about how this works either // testable in win98se shutdown options u8 sis6326_pci_device::get_pat_regs(u32 y, u32 x) { - return m_pattern_data[x & 3]; + return m_pattern_data[((y & 7) << 3) | (x & 7)]; } // TODO: this is special, uses regs in a different way diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 8e88f7e0dfa..c904de9e735 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -820,7 +820,14 @@ uint32_t sis6326_vga_device::screen_update(screen_device &screen, bitmap_rgb32 & if (cursor_gfx == transparent_pen) continue; - bitmap.pix(res_y, res_x) = m_cursor.color[cursor_gfx & 1]; + // RMW invert (win98se NotePad "I" caret) + if (cursor_gfx == 3) + { + u32 const *dot = &bitmap.pix(res_y, 0); + bitmap.pix(res_y, res_x) = dot[res_x] ^ 0xffffff; + } + else + bitmap.pix(res_y, res_x) = m_cursor.color[cursor_gfx & 1]; } } } diff --git a/src/mame/pc/pulltrig.cpp b/src/mame/pc/pulltrig.cpp index 8c53f5b50bb..7ed16e11874 100644 --- a/src/mame/pc/pulltrig.cpp +++ b/src/mame/pc/pulltrig.cpp @@ -10,7 +10,7 @@ TODO: - At startup it needs a missing soft reset trigger; - It then draw a basic Phoenix BIOS but afterwards it accesses a missing BAR I/O which craps out the flash memory somehow; -- In shutms11 HDD image just resets during loading; +- In shutms11 HDD image just triple faults during loading; =================================================================================================== From 88d3d5fde04e046ef02a5f89f4e93cdd6e7d791b Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 28 Feb 2026 04:39:43 +0100 Subject: [PATCH 073/351] sprcros2: change video emulation to tilemaps, add flipscreen, fix savestates, small cleanup --- src/mame/capcom/lastduel.cpp | 2 - src/mame/sanritsu/sprcros2.cpp | 868 +++++++++++++++++++-------------- 2 files changed, 490 insertions(+), 380 deletions(-) diff --git a/src/mame/capcom/lastduel.cpp b/src/mame/capcom/lastduel.cpp index a685022f452..fdfde7eae2e 100644 --- a/src/mame/capcom/lastduel.cpp +++ b/src/mame/capcom/lastduel.cpp @@ -25,8 +25,6 @@ To advance test mode screens: TODO: - There seem to be minor priority issues in Mad Gear, but the game might just be like that. The priority PROM is dumped but currently not used. -- Verify lastduel clocks, XTALs on photos are the same as leds2011 PCB notes - below, so: 10MHz, 3.57MHz, 24MHz, CPU is MC68000P10. ************************************************************************** diff --git a/src/mame/sanritsu/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp index 5a94de8fed7..804eb579314 100644 --- a/src/mame/sanritsu/sprcros2.cpp +++ b/src/mame/sanritsu/sprcros2.cpp @@ -4,18 +4,17 @@ Super Cross II (c) 1986 GM Shoji -driver by Angelo Salese, based on "wiped off due to not anymore -licenseable" driver by insideoutboy. +driver by Angelo Salese, based on "wiped off due to not anymore licenseable" +driver by insideoutboy. TODO: -- scanline renderer, or change to tilemaps; -- understand irq 0 source; -- output bit 0 might be watchdog armed bit/sprite start DMA instead of irq - enable; -- weird visible area resolution, 224 or 240 x 224? Maybe it's really just - 256 x 224 and then it's supposed to show garbage/nothing on the edges? -- verify hsync/vsync, current screen raw params are guessed; -- verify Z80 frequency, it has slowdowns at 2.5MHz, and Z80B is rated 6MHz +- verify screen timing, it's either 320*264, or if bankp is accurate, then + it's 330*256 - visible width is probably correct +- verify Z80 frequency, it runs laggy at 2.5MHz that isn't evident on PCB + video, and Z80B is rated 6MHz, maybe there are waitstates though? + +BTANB: +- occasional 1-frame sprite glitches at the edge of the screen The hardware has similarities with Sanritsu's Bank Panic, PCB label is similar as well: C2-00170-A for Bank Panic, C2-00171-D/C2-00172-D for Super Cross II. @@ -65,12 +64,15 @@ SC-61.5A */ #include "emu.h" + #include "cpu/z80/z80.h" #include "machine/timer.h" #include "sound/sn76496.h" + #include "emupal.h" #include "screen.h" #include "speaker.h" +#include "tilemap.h" namespace { @@ -80,14 +82,17 @@ class sprcros2_state : public driver_device public: sprcros2_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) - , m_master_cpu(*this, "master_cpu") - , m_slave_cpu(*this, "slave_cpu") + , m_maincpu(*this, "maincpu") + , m_subcpu(*this, "subcpu") + , m_screen(*this, "screen") , m_gfxdecode(*this, "gfxdecode") - , m_fgvram(*this, "fgvram") - , m_fgattr(*this, "fgattr") - , m_bgvram(*this, "bgvram") - , m_bgattr(*this, "bgattr") - , m_sprram(*this, "sprram") + , m_mainbank(*this, "mainbank") + , m_subbank(*this, "subbank") + , m_fg_vram(*this, "fg_vram") + , m_fg_attr(*this, "fg_attr") + , m_bg_vram(*this, "bg_vram") + , m_bg_attr(*this, "bg_attr") + , m_spriteram(*this, "spriteram") { } void sprcros2(machine_config &config); @@ -101,301 +106,91 @@ protected: private: // devices - required_device m_master_cpu; - required_device m_slave_cpu; + required_device m_maincpu; + required_device m_subcpu; + required_device m_screen; required_device m_gfxdecode; - required_shared_ptr m_fgvram; - required_shared_ptr m_fgattr; - required_shared_ptr m_bgvram; - required_shared_ptr m_bgattr; - required_shared_ptr m_sprram; + required_memory_bank m_mainbank; + required_memory_bank m_subbank; - bool m_master_nmi_enable = false; - bool m_master_irq_enable = false; - bool m_slave_nmi_enable = false; + required_shared_ptr m_fg_vram; + required_shared_ptr m_fg_attr; + required_shared_ptr m_bg_vram; + required_shared_ptr m_bg_attr; + required_shared_ptr m_spriteram; + + // misc + bool m_main_nmi_enable = false; + bool m_main_irq_enable = false; + bool m_sub_nmi_enable = false; bool m_screen_enable = false; - uint8_t m_bg_scrollx = 0, m_bg_scrolly = 0; + uint8_t m_bg_scrollx = 0; + uint8_t m_bg_scrolly = 0; + tilemap_t *m_bg_tilemap = nullptr; + tilemap_t *m_fg_tilemap = nullptr; - // screen updates + // handlers + void palette(palette_device &palette) const; + TILE_GET_INFO_MEMBER(get_bg_tile_info); + TILE_GET_INFO_MEMBER(get_fg_tile_info); + + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void sprcros2_palette(palette_device &palette) const; - void master_output_w(uint8_t data); - void slave_output_w(uint8_t data); + + INTERRUPT_GEN_MEMBER(main_vblank_irq); + INTERRUPT_GEN_MEMBER(sub_vblank_irq); + TIMER_DEVICE_CALLBACK_MEMBER(scanline); + + void bg_vram_w(offs_t offset, uint8_t data); + void bg_attr_w(offs_t offset, uint8_t data); + void fg_vram_w(offs_t offset, uint8_t data); + void fg_attr_w(offs_t offset, uint8_t data); void bg_scrollx_w(uint8_t data); void bg_scrolly_w(uint8_t data); - INTERRUPT_GEN_MEMBER(master_vblank_irq); - INTERRUPT_GEN_MEMBER(slave_vblank_irq); - TIMER_DEVICE_CALLBACK_MEMBER(master_scanline); + void main_output_w(uint8_t data); + void sub_output_w(uint8_t data); - void master_io(address_map &map) ATTR_COLD; - void master_map(address_map &map) ATTR_COLD; - void slave_io(address_map &map) ATTR_COLD; - void slave_map(address_map &map) ATTR_COLD; - - void legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); - void legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); - void legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect); + void main_io(address_map &map) ATTR_COLD; + void main_map(address_map &map) ATTR_COLD; + void sub_io(address_map &map) ATTR_COLD; + void sub_map(address_map &map) ATTR_COLD; }; -void sprcros2_state::video_start() -{ -} -void sprcros2_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) -{ - gfx_element *gfx_0 = m_gfxdecode->gfx(0); - int count = 0; - - for (int y=0;y<32;y++) - { - for (int x=0;x<32;x++) - { - uint16_t tile = m_bgvram[count]; - tile |= (m_bgattr[count] & 7) << 8; - bool flipx = bool(m_bgattr[count] & 0x08); - uint8_t color = (m_bgattr[count] & 0xf0) >> 4; - - gfx_0->opaque(bitmap,cliprect,tile,color,flipx,0,x*8-m_bg_scrollx,y*8-m_bg_scrolly); - gfx_0->opaque(bitmap,cliprect,tile,color,flipx,0,x*8+256-m_bg_scrollx,y*8-m_bg_scrolly); - gfx_0->opaque(bitmap,cliprect,tile,color,flipx,0,x*8-m_bg_scrollx,y*8+256-m_bg_scrolly); - gfx_0->opaque(bitmap,cliprect,tile,color,flipx,0,x*8+256-m_bg_scrollx,y*8+256-m_bg_scrolly); - - count++; - } - } - -} - -void sprcros2_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) -{ - gfx_element *gfx_1 = m_gfxdecode->gfx(1); - - for(int count=0x40-4;count>-1;count-=4) - { - uint8_t x,y,tile,color; - bool flipx; - - y = 224-m_sprram[count+2]; - x = m_sprram[count+3]; - tile = m_sprram[count+0]; - flipx = bool(m_sprram[count+1] & 2); - color = (m_sprram[count+1] & 0x38) >> 3; - gfx_1->transpen(bitmap,cliprect,tile,color,flipx,0,x,y & 0xff,0); - } -} - -void sprcros2_state::legacy_fg_draw(bitmap_ind16 &bitmap,const rectangle &cliprect) -{ - gfx_element *gfx_2 = m_gfxdecode->gfx(2); - int count = 0; - - for (int y=0;y<32;y++) - { - for (int x=0;x<32;x++) - { - uint16_t tile = m_fgvram[count]; - tile |= (m_fgattr[count] & 3) << 8; - uint8_t color = (m_fgattr[count] & 0xfc) >> 2; - - // TODO: was using tileinfo.group, which I don't know what's for at all. - // This guess seems as good as the original one for all I know. - if((color & 0x30) != 0x30) - gfx_2->opaque(bitmap,cliprect,tile,color,0,0,x*8,y*8); - else - gfx_2->transpen(bitmap,cliprect,tile,color,0,0,x*8,y*8,0); - - count++; - } - } -} - - - -uint32_t sprcros2_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) -{ - if(m_screen_enable == false) - { - bitmap.fill(0,cliprect); - return 0; - } - legacy_bg_draw(bitmap,cliprect); - legacy_obj_draw(bitmap,cliprect); - legacy_fg_draw(bitmap,cliprect); - return 0; -} - -void sprcros2_state::master_output_w(uint8_t data) -{ - //popmessage("%02x",data); - //if(data & 0xbe) - // printf("master 07 -> %02x\n",data); - - membank("master_rombank")->set_entry((data&0x40)>>6); - m_master_nmi_enable = bool(data & 1); - m_screen_enable = bool(data & 4); - m_master_irq_enable = bool(data & 8); -// if(data & 0x80) -// m_master_cpu->set_input_line(0,HOLD_LINE); -} - -void sprcros2_state::slave_output_w(uint8_t data) -{ - //if(data & 0xf6) - // printf("slave 03 -> %02x\n",data); - - m_slave_nmi_enable = bool(data & 1); - membank("slave_rombank")->set_entry((data&8)>>3); -} - -void sprcros2_state::bg_scrollx_w(uint8_t data) -{ - m_bg_scrollx = data; -} - -void sprcros2_state::bg_scrolly_w(uint8_t data) -{ - m_bg_scrolly = data; -} - -void sprcros2_state::master_map(address_map &map) -{ - map(0x0000, 0xbfff).rom().region("master", 0); - map(0xc000, 0xdfff).bankr("master_rombank"); - map(0xe000, 0xe3ff).ram().share("fgvram"); - map(0xe400, 0xe7ff).ram().share("fgattr"); - map(0xe800, 0xe83f).ram().share("sprram"); - map(0xe840, 0xf7ff).ram(); - map(0xf800, 0xffff).ram().share("shared_ram"); -} - -void sprcros2_state::master_io(address_map &map) -{ - map.global_mask(0xff); - map(0x00, 0x00).portr("P1").w("sn1", FUNC(sn76489_device::write)); - map(0x01, 0x01).portr("P2").w("sn2", FUNC(sn76489_device::write)); - map(0x02, 0x02).portr("EXTRA").w("sn3", FUNC(sn76489_device::write)); - map(0x04, 0x04).portr("DSW1"); - map(0x05, 0x05).portr("DSW2"); - map(0x07, 0x07).w(FUNC(sprcros2_state::master_output_w)); -} - -void sprcros2_state::slave_map(address_map &map) -{ - map(0x0000, 0xbfff).rom().region("slave", 0); - map(0xc000, 0xdfff).bankr("slave_rombank"); - map(0xe000, 0xe3ff).ram().share("bgvram"); - map(0xe400, 0xe7ff).ram().share("bgattr"); - map(0xe800, 0xf7ff).ram(); - map(0xf800, 0xffff).ram().share("shared_ram"); -} - -void sprcros2_state::slave_io(address_map &map) -{ - map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(sprcros2_state::bg_scrollx_w)); - map(0x01, 0x01).w(FUNC(sprcros2_state::bg_scrolly_w)); - map(0x03, 0x03).w(FUNC(sprcros2_state::slave_output_w)); -} - -static INPUT_PORTS_START( sprcros2 ) - PORT_START("P1") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("P2") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 ) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("EXTRA") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON2 ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_COCKTAIL - PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("DSW1") - PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) - PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ) ) - PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) ) - PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) ) - PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNUSED ) - - PORT_START("DSW2") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Upright ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) ) - PORT_BIT( 0x0e, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_UNUSED ) //unused coinage bits - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) -INPUT_PORTS_END - -static const gfx_layout sprite_layout = -{ - 32,32, - RGN_FRAC(1,3), - 3, - { RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) }, - { STEP8(0,1), STEP8(256,1), STEP8(512,1), STEP8(768,1) }, - { STEP16(0,8), STEP16(128,8) }, - 32*32 -}; - -static const gfx_layout fg_layout = -{ - 8,8, - RGN_FRAC(1,1), - 2, - { 0, 4 }, - { STEP4(64,1), STEP4(0,1) }, - { STEP8(0,8) }, - 8*8*2 -}; - -static GFXDECODE_START( gfx_sprcros2 ) - GFXDECODE_ENTRY( "gfx1", 0, gfx_8x8x3_planar, 0, 16 ) - GFXDECODE_ENTRY( "gfx2", 0, sprite_layout, 256, 32 ) - GFXDECODE_ENTRY( "gfx3", 0, fg_layout, 512, 64 ) -GFXDECODE_END +/******************************************************************************* + Machine initialization +*******************************************************************************/ void sprcros2_state::machine_start() { - membank("master_rombank")->configure_entries(0, 2, memregion("master_bank")->base(), 0x2000); - membank("slave_rombank")->configure_entries(0, 2, memregion("slave_bank")->base(), 0x2000); + m_mainbank->configure_entries(0, 2, memregion("maincpu")->base() + 0xc000, 0x2000); + m_subbank->configure_entries(0, 2, memregion("subcpu")->base() + 0xc000, 0x2000); + save_item(NAME(m_main_nmi_enable)); + save_item(NAME(m_main_irq_enable)); + save_item(NAME(m_sub_nmi_enable)); + save_item(NAME(m_screen_enable)); + save_item(NAME(m_bg_scrollx)); + save_item(NAME(m_bg_scrolly)); } void sprcros2_state::machine_reset() { - m_master_nmi_enable = false; - m_slave_nmi_enable = false; + main_output_w(0); + sub_output_w(0); } -void sprcros2_state::sprcros2_palette(palette_device &palette) const +/******************************************************************************* + + Video initialization + +*******************************************************************************/ + +void sprcros2_state::palette(palette_device &palette) const { const uint8_t *color_prom = memregion("proms")->base(); @@ -443,145 +238,462 @@ void sprcros2_state::sprcros2_palette(palette_device &palette) const } } -INTERRUPT_GEN_MEMBER(sprcros2_state::master_vblank_irq) +TILE_GET_INFO_MEMBER(sprcros2_state::get_bg_tile_info) { - if(m_master_nmi_enable == true) + const int code = m_bg_vram[tile_index] | (m_bg_attr[tile_index] & 0x07) << 8; + const int color = m_bg_attr[tile_index] >> 4 & 0x0f; + const int flags = (m_bg_attr[tile_index] & 0x08) ? TILE_FLIPX : 0; + + tileinfo.set(0, code, color, flags); +} + +TILE_GET_INFO_MEMBER(sprcros2_state::get_fg_tile_info) +{ + const int code = m_fg_vram[tile_index] | (m_fg_attr[tile_index] & 0x03) << 8; + const int color = m_fg_attr[tile_index] >> 2 & 0x3f; + + tileinfo.set(2, code, color, 0); + tileinfo.group = color; +} + +void sprcros2_state::video_start() +{ + m_fg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(sprcros2_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(sprcros2_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + + m_fg_tilemap->configure_groups(*m_gfxdecode->gfx(2), 0); +} + + +/******************************************************************************* + + Display refresh + +*******************************************************************************/ + +void sprcros2_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + for (int i = m_spriteram.bytes() - 4; i >= 0; i -= 4) + { + int y = ((224 - m_spriteram[i + 2]) & 0xff) + 1; + int x = m_spriteram[i + 3]; + int code = m_spriteram[i + 0] & 0x7f; + int flipx = BIT(m_spriteram[i + 1], 1); + int flipy = 0; + int color = (m_spriteram[i + 1] & 0x38) >> 3; + + if (flip_screen()) + { + x = 224 - x; + y = 224 - y; + flipx = !flipx; + flipy = !flipy; + } + + m_gfxdecode->gfx(1)->transpen( + bitmap, cliprect, + code, color, + flipx, flipy, + x, y, 0); + } +} + +uint32_t sprcros2_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + if (!m_screen_enable) + { + bitmap.fill(0, cliprect); + return 0; + } + + m_bg_tilemap->set_scrollx(0, flip_screen() ? 256 - m_bg_scrollx : m_bg_scrollx); + m_bg_tilemap->set_scrolly(0, m_bg_scrolly); + + m_bg_tilemap->draw(screen, bitmap, cliprect); + draw_sprites(bitmap, cliprect); + m_fg_tilemap->draw(screen, bitmap, cliprect); + + return 0; +} + + +/******************************************************************************* + + Interrupts + +*******************************************************************************/ + +INTERRUPT_GEN_MEMBER(sprcros2_state::main_vblank_irq) +{ + if (m_main_nmi_enable) device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -INTERRUPT_GEN_MEMBER(sprcros2_state::slave_vblank_irq) +INTERRUPT_GEN_MEMBER(sprcros2_state::sub_vblank_irq) { - if(m_slave_nmi_enable == true) + if (m_sub_nmi_enable) device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -TIMER_DEVICE_CALLBACK_MEMBER(sprcros2_state::master_scanline) +TIMER_DEVICE_CALLBACK_MEMBER(sprcros2_state::scanline) { - int scanline = param; + const int scanline = param; - if(scanline == 0 && m_master_irq_enable == true) - m_master_cpu->set_input_line(0, HOLD_LINE); + // 2 sound interrupts per frame + if ((scanline & 0x7f) == 0x40 && m_main_irq_enable) + m_maincpu->set_input_line(0, HOLD_LINE); } + +/******************************************************************************* + + Memory & I/O handlers + +*******************************************************************************/ + +void sprcros2_state::bg_vram_w(offs_t offset, uint8_t data) +{ + m_bg_vram[offset] = data; + m_bg_tilemap->mark_tile_dirty(offset); +} + +void sprcros2_state::bg_attr_w(offs_t offset, uint8_t data) +{ + m_bg_attr[offset] = data; + m_bg_tilemap->mark_tile_dirty(offset); +} + +void sprcros2_state::fg_vram_w(offs_t offset, uint8_t data) +{ + m_fg_vram[offset] = data; + m_fg_tilemap->mark_tile_dirty(offset); +} + +void sprcros2_state::fg_attr_w(offs_t offset, uint8_t data) +{ + m_fg_attr[offset] = data; + m_fg_tilemap->mark_tile_dirty(offset); +} + +void sprcros2_state::bg_scrollx_w(uint8_t data) +{ + m_bg_scrollx = data; +} + +void sprcros2_state::bg_scrolly_w(uint8_t data) +{ + m_bg_scrolly = data; +} + + +void sprcros2_state::main_output_w(uint8_t data) +{ + // bit 0: enable vblank NMI + m_main_nmi_enable = BIT(data, 0); + + // bit 1: flip screen + flip_screen_set(BIT(data, 1)); + + // bit 2: enable display + m_screen_enable = BIT(data, 2); + + // bit 3: enable IRQ + m_main_irq_enable = BIT(data, 3); + + // bit 6: bankswitch + m_mainbank->set_entry(BIT(data, 6)); + + // other: unused + //if (data & 0xb0) printf("main 07 -> %02x\n",data); +} + +void sprcros2_state::sub_output_w(uint8_t data) +{ + // bit 0: enable vblank NMI + m_sub_nmi_enable = BIT(data, 0); + + // bit 3: bankswitch + m_subbank->set_entry(BIT(data, 3)); + + // other: unused + //if (data & 0xf6) printf("sub 03 -> %02x\n",data); +} + + +/******************************************************************************* + + Address maps + +*******************************************************************************/ + +void sprcros2_state::main_map(address_map &map) +{ + map(0x0000, 0xbfff).rom().region("maincpu", 0); + map(0xc000, 0xdfff).bankr(m_mainbank); + map(0xe000, 0xe3ff).ram().w(FUNC(sprcros2_state::fg_vram_w)).share(m_fg_vram); + map(0xe400, 0xe7ff).ram().w(FUNC(sprcros2_state::fg_attr_w)).share(m_fg_attr); + map(0xe800, 0xe83f).ram().share(m_spriteram); + map(0xe840, 0xf7ff).ram(); + map(0xf800, 0xffff).ram().share("shared_ram"); +} + +void sprcros2_state::main_io(address_map &map) +{ + map.global_mask(0xff); + map(0x00, 0x00).portr("P1").w("sn1", FUNC(sn76489_device::write)); + map(0x01, 0x01).portr("P2").w("sn2", FUNC(sn76489_device::write)); + map(0x02, 0x02).portr("EXTRA").w("sn3", FUNC(sn76489_device::write)); + map(0x04, 0x04).portr("DSW1"); + map(0x05, 0x05).portr("DSW2"); + map(0x07, 0x07).w(FUNC(sprcros2_state::main_output_w)); +} + +void sprcros2_state::sub_map(address_map &map) +{ + map(0x0000, 0xbfff).rom().region("subcpu", 0); + map(0xc000, 0xdfff).bankr(m_subbank); + map(0xe000, 0xe3ff).ram().w(FUNC(sprcros2_state::bg_vram_w)).share(m_bg_vram); + map(0xe400, 0xe7ff).ram().w(FUNC(sprcros2_state::bg_attr_w)).share(m_bg_attr); + map(0xe800, 0xf7ff).ram(); + map(0xf800, 0xffff).ram().share("shared_ram"); +} + +void sprcros2_state::sub_io(address_map &map) +{ + map.global_mask(0xff); + map(0x00, 0x00).w(FUNC(sprcros2_state::bg_scrollx_w)); + map(0x01, 0x01).w(FUNC(sprcros2_state::bg_scrolly_w)); + map(0x03, 0x03).w(FUNC(sprcros2_state::sub_output_w)); +} + + +/******************************************************************************* + + Input ports + +*******************************************************************************/ + +static INPUT_PORTS_START( sprcros2 ) + PORT_START("P1") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("P2") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("EXTRA") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON2 ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_COCKTAIL + PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("DSW1") + PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!1,!2,!3") + PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ) ) + PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) + PORT_DIPSETTING( 0x03, DEF_STR( 1C_4C ) ) + PORT_DIPSETTING( 0x04, DEF_STR( 1C_5C ) ) + PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) ) + PORT_DIPUNUSED_DIPLOC( 0x08, 0x00, "SW1:!4" ) + PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW1:!5" ) + PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW1:!6" ) + PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW1:!7" ) + PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW1:!8" ) + + PORT_START("DSW2") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:!1") + PORT_DIPSETTING( 0x01, DEF_STR( Upright ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) ) + PORT_DIPUNUSED_DIPLOC( 0x02, 0x00, "SW2:!2" ) + PORT_DIPUNUSED_DIPLOC( 0x04, 0x00, "SW2:!3" ) + PORT_DIPUNUSED_DIPLOC( 0x08, 0x00, "SW2:!4" ) + PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW2:!5" ) + PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:!6" ) + PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:!7" ) + PORT_DIPNAME( 0x80, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:!8") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x80, DEF_STR( On ) ) +INPUT_PORTS_END + + +/******************************************************************************* + + GFX layouts + +*******************************************************************************/ + +static const gfx_layout sprite_layout = +{ + 32,32, + RGN_FRAC(1,3), + 3, + { RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) }, + { STEP8(0,1), STEP8(256,1), STEP8(512,1), STEP8(768,1) }, + { STEP16(0,8), STEP16(128,8) }, + 32*32 +}; + +static const gfx_layout fgtiles_layout = +{ + 8,8, + RGN_FRAC(1,1), + 2, + { 0, 4 }, + { STEP4(64,1), STEP4(0,1) }, + { STEP8(0,8) }, + 8*8*2 +}; + +static GFXDECODE_START( gfx_sprcros2 ) + GFXDECODE_ENTRY( "bgtiles", 0, gfx_8x8x3_planar, 0, 16 ) + GFXDECODE_ENTRY( "sprites", 0, sprite_layout, 256, 8 ) + GFXDECODE_ENTRY( "fgtiles", 0, fgtiles_layout, 512, 64 ) +GFXDECODE_END + + +/******************************************************************************* + + Machine configs + +*******************************************************************************/ + void sprcros2_state::sprcros2(machine_config &config) { - /* basic machine hardware */ - Z80(config, m_master_cpu, 10_MHz_XTAL/2); - m_master_cpu->set_addrmap(AS_PROGRAM, &sprcros2_state::master_map); - m_master_cpu->set_addrmap(AS_IO, &sprcros2_state::master_io); - m_master_cpu->set_vblank_int("screen", FUNC(sprcros2_state::master_vblank_irq)); + // basic machine hardware + Z80(config, m_maincpu, 10_MHz_XTAL / 2); + m_maincpu->set_addrmap(AS_PROGRAM, &sprcros2_state::main_map); + m_maincpu->set_addrmap(AS_IO, &sprcros2_state::main_io); + m_maincpu->set_vblank_int("screen", FUNC(sprcros2_state::main_vblank_irq)); - TIMER(config, "scantimer").configure_scanline(FUNC(sprcros2_state::master_scanline), "screen", 0, 1); + TIMER(config, "scantimer").configure_scanline(FUNC(sprcros2_state::scanline), "screen", 0, 1); - Z80(config, m_slave_cpu, 10_MHz_XTAL/2); - m_slave_cpu->set_addrmap(AS_PROGRAM, &sprcros2_state::slave_map); - m_slave_cpu->set_addrmap(AS_IO, &sprcros2_state::slave_io); - m_slave_cpu->set_vblank_int("screen", FUNC(sprcros2_state::slave_vblank_irq)); + Z80(config, m_subcpu, 10_MHz_XTAL / 2); + m_subcpu->set_addrmap(AS_PROGRAM, &sprcros2_state::sub_map); + m_subcpu->set_addrmap(AS_IO, &sprcros2_state::sub_io); + m_subcpu->set_vblank_int("screen", FUNC(sprcros2_state::sub_vblank_irq)); - config.set_maximum_quantum(attotime::from_hz(m_master_cpu->clock() / 4)); + config.set_maximum_quantum(attotime::from_hz(m_maincpu->clock() / 4)); - /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_screen_update(FUNC(sprcros2_state::screen_update)); - screen.set_raw(10_MHz_XTAL/2, 320, 8, 256-8, 262, 16, 240); - screen.set_palette("palette"); + // video hardware + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_screen_update(FUNC(sprcros2_state::screen_update)); + m_screen->set_raw(10_MHz_XTAL / 2, 320, 8, 256-8, 264, 16, 240); // measured ~59.2Hz + m_screen->set_palette("palette"); GFXDECODE(config, m_gfxdecode, "palette", gfx_sprcros2); - PALETTE(config, "palette", FUNC(sprcros2_state::sprcros2_palette), 768, 32); + PALETTE(config, "palette", FUNC(sprcros2_state::palette), 768, 32); - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); - SN76489(config, "sn1", 10_MHz_XTAL/4).add_route(ALL_OUTPUTS, "mono", 0.50); - SN76489(config, "sn2", 10_MHz_XTAL/4).add_route(ALL_OUTPUTS, "mono", 0.50); - SN76489(config, "sn3", 10_MHz_XTAL/4).add_route(ALL_OUTPUTS, "mono", 0.50); + + SN76489(config, "sn1", 10_MHz_XTAL / 4).add_route(ALL_OUTPUTS, "mono", 0.50); + SN76489(config, "sn2", 10_MHz_XTAL / 4).add_route(ALL_OUTPUTS, "mono", 0.50); + SN76489(config, "sn3", 10_MHz_XTAL / 4).add_route(ALL_OUTPUTS, "mono", 0.50); } -/*************************************************************************** +/******************************************************************************* - Machine driver(s) + ROM definitions -***************************************************************************/ +*******************************************************************************/ ROM_START( sprcros2 ) - ROM_REGION( 0x0c000, "master", 0 ) - ROM_LOAD( "scm-03.10g", 0x00000, 0x4000, CRC(b9757908) SHA1(d59cb2aac1b6268fc766306850f5711d4a12d897) ) - ROM_LOAD( "scm-02.10j", 0x04000, 0x4000, CRC(849c5c87) SHA1(0e02c4990e371d6a290efa53301818e769648945) ) - ROM_LOAD( "scm-01.10k", 0x08000, 0x4000, CRC(385a62de) SHA1(847bf9d97ab3fa8949d9198e4e509948a940d6aa) ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "scm-03.10g", 0x0000, 0x4000, CRC(b9757908) SHA1(d59cb2aac1b6268fc766306850f5711d4a12d897) ) + ROM_LOAD( "scm-02.10j", 0x4000, 0x4000, CRC(849c5c87) SHA1(0e02c4990e371d6a290efa53301818e769648945) ) + ROM_LOAD( "scm-01.10k", 0x8000, 0x4000, CRC(385a62de) SHA1(847bf9d97ab3fa8949d9198e4e509948a940d6aa) ) + ROM_LOAD( "scm-00.10l", 0xc000, 0x4000, CRC(13fa3684) SHA1(611b7a237e394f285dcc5beb027dacdbdd58a7a0) ) - ROM_REGION( 0x4000, "master_bank", 0) - ROM_LOAD( "scm-00.10l", 0x00000, 0x4000, CRC(13fa3684) SHA1(611b7a237e394f285dcc5beb027dacdbdd58a7a0) ) + ROM_REGION( 0x10000, "subcpu", 0 ) + ROM_LOAD( "scs-30.5f", 0x0000, 0x4000, CRC(c0a40e41) SHA1(e74131b353855749258dffa45091c825ccdbf05a) ) + ROM_LOAD( "scs-29.5h", 0x4000, 0x4000, CRC(83d49fa5) SHA1(7112110df2f382bbc0e651adcec975054a485b9b) ) + ROM_LOAD( "scs-28.5j", 0x8000, 0x4000, CRC(480d351f) SHA1(d1b86f441ae0e58b30e0f089ab25de219d5f30e3) ) + ROM_LOAD( "scs-27.5k", 0xc000, 0x4000, CRC(2cf720cb) SHA1(a95c5b8c88371cf597bb7d80afeca6a48c7b74e6) ) - ROM_REGION( 0xc000, "slave", 0 ) - ROM_LOAD( "scs-30.5f", 0x00000, 0x4000, CRC(c0a40e41) SHA1(e74131b353855749258dffa45091c825ccdbf05a) ) - ROM_LOAD( "scs-29.5h", 0x04000, 0x4000, CRC(83d49fa5) SHA1(7112110df2f382bbc0e651adcec975054a485b9b) ) - ROM_LOAD( "scs-28.5j", 0x08000, 0x4000, CRC(480d351f) SHA1(d1b86f441ae0e58b30e0f089ab25de219d5f30e3) ) + ROM_REGION( 0xc000, "bgtiles", 0 ) + ROM_LOAD( "scs-26.4b", 0x8000, 0x4000, CRC(f958b56d) SHA1(a1973179d336d2ba57294155550515f2b8a33a09) ) + ROM_LOAD( "scs-25.4c", 0x4000, 0x4000, CRC(d6fd7ba5) SHA1(1c26c4c1655b2be9cb6103e75386cc2f0cf27fc5) ) + ROM_LOAD( "scs-24.4e", 0x0000, 0x4000, CRC(87783c36) SHA1(7102be795afcddd76b4d41823e95c65fe1ffbca0) ) - ROM_REGION( 0x4000, "slave_bank", 0) - ROM_LOAD( "scs-27.5k", 0x00000, 0x4000, CRC(2cf720cb) SHA1(a95c5b8c88371cf597bb7d80afeca6a48c7b74e6) ) + ROM_REGION( 0xc000, "sprites", 0 ) + ROM_LOAD( "scm-23.5b", 0x0000, 0x4000, CRC(ab42f8e3) SHA1(8c2213b7c47a48e223fc3f7d323d16c0e4cd0457) ) + ROM_LOAD( "scm-22.5e", 0x4000, 0x4000, CRC(0cad254c) SHA1(36e30e30b652b3a388a3c4a82251196f79368f59) ) + ROM_LOAD( "scm-21.5g", 0x8000, 0x4000, CRC(b6b68998) SHA1(cc3c6d996beeedcc7e5199f10d65c5b1d3c6e666) ) - ROM_REGION( 0xc000, "gfx1", 0 ) //bg - ROM_LOAD( "scs-26.4b", 0x8000, 0x4000, CRC(f958b56d) SHA1(a1973179d336d2ba57294155550515f2b8a33a09) ) - ROM_LOAD( "scs-25.4c", 0x4000, 0x4000, CRC(d6fd7ba5) SHA1(1c26c4c1655b2be9cb6103e75386cc2f0cf27fc5) ) - ROM_LOAD( "scs-24.4e", 0x0000, 0x4000, CRC(87783c36) SHA1(7102be795afcddd76b4d41823e95c65fe1ffbca0) ) - - ROM_REGION( 0xc000, "gfx2", 0 ) - ROM_LOAD( "scm-23.5b", 0x0000, 0x4000, CRC(ab42f8e3) SHA1(8c2213b7c47a48e223fc3f7d323d16c0e4cd0457) ) - ROM_LOAD( "scm-22.5e", 0x4000, 0x4000, CRC(0cad254c) SHA1(36e30e30b652b3a388a3c4a82251196f79368f59) ) - ROM_LOAD( "scm-21.5g", 0x8000, 0x4000, CRC(b6b68998) SHA1(cc3c6d996beeedcc7e5199f10d65c5b1d3c6e666) ) - - ROM_REGION( 0x4000, "gfx3", 0 ) //fg - ROM_LOAD( "scm-20.5k", 0x0000, 0x4000, CRC(67a099a6) SHA1(43981abdcaa0ff36183027a3c691ce2df7f06ec7) ) + ROM_REGION( 0x4000, "fgtiles", 0 ) + ROM_LOAD( "scm-20.5k", 0x0000, 0x4000, CRC(67a099a6) SHA1(43981abdcaa0ff36183027a3c691ce2df7f06ec7) ) ROM_REGION( 0x0420, "proms", 0 ) - ROM_LOAD( "sc-64.6a", 0x0000, 0x0020, CRC(336dd1c0) SHA1(f0a0d2c13617fd84ee55c0cb96643761a8735147) ) //palette - ROM_LOAD( "sc-63.3b", 0x0020, 0x0100, CRC(9034a059) SHA1(1801965b4f0f3e04ca4b3faf0ba3a27dbb008474) ) //bg clut lo nibble - ROM_LOAD( "sc-62.3a", 0x0120, 0x0100, CRC(3c78a14f) SHA1(8f9c196a3e18bdce2d4855bc285bd5bde534bf09) ) //bg clut hi nibble - ROM_LOAD( "sc-61.5a", 0x0220, 0x0100, CRC(2f71185d) SHA1(974fbb52285f01f4353e9acb1992dcd6fdefedcb) ) //sprite clut - ROM_LOAD( "sc-60.4k", 0x0320, 0x0100, CRC(d7a4e57d) SHA1(6db02ec6aa55b05422cb505e63c71e36b4b11b4a) ) //fg clut + ROM_LOAD( "sc-64.6a", 0x0000, 0x0020, CRC(336dd1c0) SHA1(f0a0d2c13617fd84ee55c0cb96643761a8735147) ) // palette + ROM_LOAD( "sc-63.3b", 0x0020, 0x0100, CRC(9034a059) SHA1(1801965b4f0f3e04ca4b3faf0ba3a27dbb008474) ) // bg clut lo nibble + ROM_LOAD( "sc-62.3a", 0x0120, 0x0100, CRC(3c78a14f) SHA1(8f9c196a3e18bdce2d4855bc285bd5bde534bf09) ) // bg clut hi nibble + ROM_LOAD( "sc-61.5a", 0x0220, 0x0100, CRC(2f71185d) SHA1(974fbb52285f01f4353e9acb1992dcd6fdefedcb) ) // sprite clut + ROM_LOAD( "sc-60.4k", 0x0320, 0x0100, CRC(d7a4e57d) SHA1(6db02ec6aa55b05422cb505e63c71e36b4b11b4a) ) // fg clut ROM_END -ROM_START( sprcros2a ) - ROM_REGION( 0xc000, "master", 0 ) - ROM_LOAD( "15.bin", 0x00000, 0x4000, CRC(b9d02558) SHA1(775404c6c7648d9dab02b496541739ea700cd481) ) - ROM_LOAD( "scm-02.10j", 0x04000, 0x4000, CRC(849c5c87) SHA1(0e02c4990e371d6a290efa53301818e769648945) ) - ROM_LOAD( "scm-01.10k", 0x08000, 0x4000, CRC(385a62de) SHA1(847bf9d97ab3fa8949d9198e4e509948a940d6aa) ) +ROM_START( sprcros2a ) // bootleg PCB, but ROMs look untampered, just an earlier revision + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "15.bin", 0x0000, 0x4000, CRC(b9d02558) SHA1(775404c6c7648d9dab02b496541739ea700cd481) ) + ROM_LOAD( "scm-02.10j", 0x4000, 0x4000, CRC(849c5c87) SHA1(0e02c4990e371d6a290efa53301818e769648945) ) + ROM_LOAD( "scm-01.10k", 0x8000, 0x4000, CRC(385a62de) SHA1(847bf9d97ab3fa8949d9198e4e509948a940d6aa) ) + ROM_LOAD( "scm-00.10l", 0xc000, 0x4000, CRC(13fa3684) SHA1(611b7a237e394f285dcc5beb027dacdbdd58a7a0) ) - ROM_REGION( 0x4000, "master_bank", 0) - ROM_LOAD( "scm-00.10l", 0x00000, 0x4000, CRC(13fa3684) SHA1(611b7a237e394f285dcc5beb027dacdbdd58a7a0) ) + ROM_REGION( 0x10000, "subcpu", 0 ) + ROM_LOAD( "scs-30.5f", 0x0000, 0x4000, CRC(c0a40e41) SHA1(e74131b353855749258dffa45091c825ccdbf05a) ) + ROM_LOAD( "scs-29.5h", 0x4000, 0x4000, CRC(83d49fa5) SHA1(7112110df2f382bbc0e651adcec975054a485b9b) ) + ROM_LOAD( "scs-28.5j", 0x8000, 0x4000, CRC(480d351f) SHA1(d1b86f441ae0e58b30e0f089ab25de219d5f30e3) ) + ROM_LOAD( "scs-27.5k", 0xc000, 0x4000, CRC(2cf720cb) SHA1(a95c5b8c88371cf597bb7d80afeca6a48c7b74e6) ) - ROM_REGION( 0xc000, "slave", 0 ) - ROM_LOAD( "scs-30.5f", 0x00000, 0x4000, CRC(c0a40e41) SHA1(e74131b353855749258dffa45091c825ccdbf05a) ) - ROM_LOAD( "scs-29.5h", 0x04000, 0x4000, CRC(83d49fa5) SHA1(7112110df2f382bbc0e651adcec975054a485b9b) ) - ROM_LOAD( "scs-28.5j", 0x08000, 0x4000, CRC(480d351f) SHA1(d1b86f441ae0e58b30e0f089ab25de219d5f30e3) ) + ROM_REGION( 0xc000, "bgtiles", 0 ) + ROM_LOAD( "scs-26.4b", 0x8000, 0x4000, CRC(f958b56d) SHA1(a1973179d336d2ba57294155550515f2b8a33a09) ) + ROM_LOAD( "scs-25.4c", 0x4000, 0x4000, CRC(d6fd7ba5) SHA1(1c26c4c1655b2be9cb6103e75386cc2f0cf27fc5) ) + ROM_LOAD( "scs-24.4e", 0x0000, 0x4000, CRC(87783c36) SHA1(7102be795afcddd76b4d41823e95c65fe1ffbca0) ) - ROM_REGION( 0x4000, "slave_bank", 0) - ROM_LOAD( "scs-27.5k", 0x00000, 0x4000, CRC(2cf720cb) SHA1(a95c5b8c88371cf597bb7d80afeca6a48c7b74e6) ) + ROM_REGION( 0xc000, "sprites", 0 ) + ROM_LOAD( "scm-23.5b", 0x0000, 0x4000, CRC(ab42f8e3) SHA1(8c2213b7c47a48e223fc3f7d323d16c0e4cd0457) ) + ROM_LOAD( "scm-22.5e", 0x4000, 0x4000, CRC(0cad254c) SHA1(36e30e30b652b3a388a3c4a82251196f79368f59) ) + ROM_LOAD( "scm-21.5g", 0x8000, 0x4000, CRC(b6b68998) SHA1(cc3c6d996beeedcc7e5199f10d65c5b1d3c6e666) ) - ROM_REGION( 0xc000, "gfx1", 0 ) //bg - ROM_LOAD( "scs-26.4b", 0x8000, 0x4000, CRC(f958b56d) SHA1(a1973179d336d2ba57294155550515f2b8a33a09) ) - ROM_LOAD( "scs-25.4c", 0x4000, 0x4000, CRC(d6fd7ba5) SHA1(1c26c4c1655b2be9cb6103e75386cc2f0cf27fc5) ) - ROM_LOAD( "scs-24.4e", 0x0000, 0x4000, CRC(87783c36) SHA1(7102be795afcddd76b4d41823e95c65fe1ffbca0) ) - - ROM_REGION( 0xc000, "gfx2", 0 ) - ROM_LOAD( "scm-23.5b", 0x0000, 0x4000, CRC(ab42f8e3) SHA1(8c2213b7c47a48e223fc3f7d323d16c0e4cd0457) ) - ROM_LOAD( "scm-22.5e", 0x4000, 0x4000, CRC(0cad254c) SHA1(36e30e30b652b3a388a3c4a82251196f79368f59) ) - ROM_LOAD( "scm-21.5g", 0x8000, 0x4000, CRC(b6b68998) SHA1(cc3c6d996beeedcc7e5199f10d65c5b1d3c6e666) ) - - ROM_REGION( 0x4000, "gfx3", 0 ) //fg - ROM_LOAD( "scm-20.5k", 0x0000, 0x4000, CRC(67a099a6) SHA1(43981abdcaa0ff36183027a3c691ce2df7f06ec7) ) + ROM_REGION( 0x4000, "fgtiles", 0 ) + ROM_LOAD( "scm-20.5k", 0x0000, 0x4000, CRC(67a099a6) SHA1(43981abdcaa0ff36183027a3c691ce2df7f06ec7) ) ROM_REGION( 0x0420, "proms", 0 ) - ROM_LOAD( "sc-64.6a", 0x0000, 0x0020, CRC(336dd1c0) SHA1(f0a0d2c13617fd84ee55c0cb96643761a8735147) ) //palette - ROM_LOAD( "sc-63.3b", 0x0020, 0x0100, CRC(9034a059) SHA1(1801965b4f0f3e04ca4b3faf0ba3a27dbb008474) ) //bg clut lo nibble - ROM_LOAD( "sc-62.3a", 0x0120, 0x0100, CRC(3c78a14f) SHA1(8f9c196a3e18bdce2d4855bc285bd5bde534bf09) ) //bg clut hi nibble - ROM_LOAD( "sc-61.5a", 0x0220, 0x0100, CRC(2f71185d) SHA1(974fbb52285f01f4353e9acb1992dcd6fdefedcb) ) //sprite clut - ROM_LOAD( "sc-60.4k", 0x0320, 0x0100, CRC(d7a4e57d) SHA1(6db02ec6aa55b05422cb505e63c71e36b4b11b4a) ) //fg clut + ROM_LOAD( "sc-64.6a", 0x0000, 0x0020, CRC(336dd1c0) SHA1(f0a0d2c13617fd84ee55c0cb96643761a8735147) ) // palette + ROM_LOAD( "sc-63.3b", 0x0020, 0x0100, CRC(9034a059) SHA1(1801965b4f0f3e04ca4b3faf0ba3a27dbb008474) ) // bg clut lo nibble + ROM_LOAD( "sc-62.3a", 0x0120, 0x0100, CRC(3c78a14f) SHA1(8f9c196a3e18bdce2d4855bc285bd5bde534bf09) ) // bg clut hi nibble + ROM_LOAD( "sc-61.5a", 0x0220, 0x0100, CRC(2f71185d) SHA1(974fbb52285f01f4353e9acb1992dcd6fdefedcb) ) // sprite clut + ROM_LOAD( "sc-60.4k", 0x0320, 0x0100, CRC(d7a4e57d) SHA1(6db02ec6aa55b05422cb505e63c71e36b4b11b4a) ) // fg clut ROM_END } // anonymous namespace +/******************************************************************************* + + Game drivers + +*******************************************************************************/ + GAME( 1986, sprcros2, 0, sprcros2, sprcros2, sprcros2_state, empty_init, ROT0, "Sanritsu / GM Shoji", "Super Cross II (Japan, set 1)", MACHINE_SUPPORTS_SAVE ) GAME( 1986, sprcros2a, sprcros2, sprcros2, sprcros2, sprcros2_state, empty_init, ROT0, "Sanritsu / GM Shoji", "Super Cross II (Japan, set 2)", MACHINE_SUPPORTS_SAVE ) From 82f571c019478c730d90b55ecf36dec9fcc6b980 Mon Sep 17 00:00:00 2001 From: James Wallace Date: Sat, 28 Feb 2026 12:45:54 +0000 Subject: [PATCH 074/351] BFM_Cobra3 - attempt to improve non-MPEG hardware parts. (#14588) * New systems marked not working ------------------------------ Telly Addicts (New Series) (Bellfruit) (Cobra 3) [James Wallace, blueonesarefaster] --- src/devices/machine/68340.cpp | 13 +- src/mame/bfm/bfm_cobra3.cpp | 603 ++++++++++++++++++++++++++++++++++ src/mame/bfm/bfm_swp.cpp | 303 ----------------- src/mame/mame.lst | 3 +- 4 files changed, 616 insertions(+), 306 deletions(-) create mode 100644 src/mame/bfm/bfm_cobra3.cpp delete mode 100644 src/mame/bfm/bfm_swp.cpp diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp index 84d0d698d6a..e4271107f9b 100644 --- a/src/devices/machine/68340.cpp +++ b/src/devices/machine/68340.cpp @@ -130,8 +130,16 @@ uint8_t m68340_cpu_device::int_ack(offs_t offset) uint16_t m68340_cpu_device::m68340_internal_base_r(offs_t offset, uint16_t mem_mask) { if (!machine().side_effects_disabled()) - LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x)\n", m_ppc, offset*2,mem_mask); - return ((!BIT(offset, 0) ? (m_m68340_base >> 16): m_m68340_base)) & 0xffff; + LOGMASKED(LOG_BASE, "%08x m68340_internal_base_r %08x, (%08x) (%08x)\n", m_ppc, offset*2,mem_mask, m_sfc); + + if (m_sfc==0x7) + { + return ((!BIT(offset, 0) ? (m_m68340_base >> 16): m_m68340_base)) & 0xffff; + } + else + { + return m_internal->unmap(); + } } void m68340_cpu_device::m68340_internal_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) @@ -269,6 +277,7 @@ void m68340_cpu_device::device_start() m_m68340_base = 0x00000000; m_internal = &space(AS_PROGRAM); + m_internal->unmap_value_high(); } diff --git a/src/mame/bfm/bfm_cobra3.cpp b/src/mame/bfm/bfm_cobra3.cpp new file mode 100644 index 00000000000..7092809f570 --- /dev/null +++ b/src/mame/bfm/bfm_cobra3.cpp @@ -0,0 +1,603 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood, James Wallace, blueonesarefaster + +/* Bellfruit SWP (Skill With Prizes) Video hardware + aka Cobra 3 + + TODO: MPEG decoding currently not implemented +*/ + + + +#include "emu.h" +#include "bus/nscsi/cd.h" +#include "machine/68340.h" +#include "machine/meters.h" +#include "machine/ncr5380.h" +#include "machine/nscsi_bus.h" +#include "machine/nvram.h" +#include "video/ramdac.h" +#include "machine/rescap.h" +#include "machine/scc66470.h" +#include "machine/watchdog.h" +#include "sound/ymz280b.h" +#include "screen.h" +#include "speaker.h" + + +namespace { + +class bfm_cobra3_state : public driver_device +{ +public: + bfm_cobra3_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_cpuregion(*this, "maincpu"), + m_nvram(*this, "nvram"), + m_ymz(*this, "ymz280b"), + m_palette(*this, "palette"), + m_ramdac(*this, "ramdac"), + m_scc66470(*this, "scc66470"), + m_strobein(*this, "STROBE%u", 0), + m_meters(*this, "meters"), + m_lamps(*this, "lamp%u", 0U), + m_scsibus(*this, "scsi"), + m_scsic(*this, "scsi:6:ncr5380"), + m_watchdog(*this, "watchdog") + { } + + std::unique_ptr m_mainram; + + void volume_control(uint8_t direction, uint8_t clock); + uint16_t mem_r(offs_t offset, uint16_t mem_mask = ~0); + void mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + void bfm_cobra3(machine_config &config); + void ramdac_map(address_map &map); + void bfm_cobra3_map(address_map &map) ATTR_COLD; +protected: + + // devices + required_device m_maincpu; + required_region_ptr m_cpuregion; + required_device m_nvram; + required_device m_ymz; + required_device m_palette; + required_device m_ramdac; + required_device m_scc66470; + required_ioport_array<5> m_strobein; + optional_device m_meters; + output_finder<256> m_lamps; + required_device m_scsibus; + required_device m_scsic; + required_device m_watchdog; + + uint8_t m_active_strobe; + uint8_t m_triac_latch; + uint8_t m_vol_clock; + uint8_t m_volume; + + virtual void machine_start() override ATTR_COLD; + static void scsi_devices(device_slot_interface &device); + void dma1_drq(int state); + void scc66470_map(address_map &map); + void scc66470_irq(int state); + +}; + +void bfm_cobra3_state::volume_control(uint8_t direction, uint8_t clock) +{ + int clock_changed = m_vol_clock^clock; + + m_vol_clock = clock; + if ( clock_changed ) + { // digital volume clock line changed + if ( !(clock) ) + { // changed from high to low, + if ( !(direction) ) + { + if ( m_volume < 31 ) m_volume++; //0-31 expressed as 1-32 + } + else + { + if ( m_volume > 0 ) m_volume--; + } + + float percent = (64 - m_volume) / 64.0f; + + m_ymz->set_output_gain(0, percent); + m_ymz->set_output_gain(1, percent); + } + } +} + +uint16_t bfm_cobra3_state::mem_r(offs_t offset, uint16_t mem_mask) +{ + int cs = m_maincpu->get_cs(offset * 2); + + switch ( cs ) + { + case 1: // ROM + return m_cpuregion[offset & 0x7ffff]; + case 2:// (NV)RAM + return m_mainram[offset & 0x1fff]; + + case 3: // I/O + { + offset &= 0x7ff; + offs_t cs_addr_8_11 = (offset * 2) & 0xf00; + + switch(cs_addr_8_11) + { + case 0x300: //YMZ stereo sound accesses + if(ACCESSING_BITS_0_7) + { + return m_ymz->read(offset & 1); + } + break; + + case 0x400: + { + //input reads, haven't got far enough to trigger any + return m_strobein[m_active_strobe]->read(); + } + case 0x500: //SCSI DMA + if(ACCESSING_BITS_8_15) + { + return m_scsic->dma_r() << 8; + } + break; + + case 0x600: //Looks like the RAMDAC hookup + if(ACCESSING_BITS_0_7) + { + if((offset & 7) == 1) + { + return m_ramdac->pal_r(); + } + } + break; + + default: + logerror("%s maincpu read access offset %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, mem_mask, cs); + break; + } + } + break; + + case 4: // SCSI controller + if(ACCESSING_BITS_8_15) + { + return(m_scsic->read(offset & 0x0f) << 8); + } + break; + + default: + logerror("%s maincpu read access offset %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, mem_mask, cs); + } + + return 0x0000; +} + +void bfm_cobra3_state::mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + int cs = m_maincpu->get_cs(offset * 2); + + switch (cs) + { + case 1:// ROM, shouldn't write here? + logerror("%sx maincpu write access(1) offset %08x data %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, data, mem_mask, cs); + break; + + case 2:// (NV)RAM + COMBINE_DATA(&m_mainram[offset & 0x1fff]); + break; + + case 3: // I/O + { + offset &= 0x7ff; + offs_t cs_addr_8_11 = (offset * 2) & 0xf00; + switch(cs_addr_8_11) + { + case 0x000: + logerror("%s maincpu write access lamp drive io latch offset %08x data %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, data, mem_mask, cs); + // lamps; + break; + + case 0x100: + logerror("%s maincpu write access lockout latch offset %08x data %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, data, mem_mask, cs); + //TODO, does this need the ACCESSING_BITS_8_15? + // coin lockout and optional vfd (debug only?) + break; + + case 0x200: + if (data > 0x100) + { + logerror("%s maincpu write access io latch offset %08x data %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, data, mem_mask, cs); + } + for (int i=0; i<4; i++) + { + m_meters->update(i, BIT(data, i)); + + } + for (int i=4; i<6; i++) + { + //triacs + } + m_triac_latch = BIT(data, 9); + volume_control(BIT(data,7), BIT(data,15)); + m_watchdog->reset_line_w(BIT(data , 8)); + + for (int i=10; i<15; i++) + { + if (BIT(data, i)) + { + m_active_strobe = i - 10; + } + } + break; + + case 0x300: + if(ACCESSING_BITS_0_7) + { + m_ymz->write(offset & 1, data); + } + break; + + case 0x500: // SCSI DMA + if(ACCESSING_BITS_8_15) + { + m_scsic->dma_w(data >> 8); + } + break; + + case 0x700: // RAMDAC for palettes + if(ACCESSING_BITS_0_7) + { + offset &= 7; + switch (offset) + { + case 0: + m_ramdac->index_w(data); + break; + case 1: + m_ramdac->pal_w(data); + break; + case 2: + m_ramdac->mask_w(data); + break; + case 3: + m_ramdac->index_r_w(data); + break; + } + } + break; + + default: + // coin divert, hoppers, note validator must be somewhere + logerror("%s maincpu write access(3) offset %08x data %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, data, mem_mask, cs); + break; + } + } + break; + + case 4: // SCSI controller + offset &= 0x0f; + if(ACCESSING_BITS_8_15) + { + m_scsic->write(offset, data >> 8); + } + break; + + default: + logerror("%s maincpu write access(0) offset %08x data %08x mem_mask %08x cs %d\n", machine().describe_context(), offset*4, data, mem_mask, cs); + break; + } +} + + +void bfm_cobra3_state::bfm_cobra3_map(address_map &map) +{ + map(0x00000000, 0xffffffff).rw(FUNC(bfm_cobra3_state::mem_r), FUNC(bfm_cobra3_state::mem_w)); + map(0x00800000, 0x009fffff).m(m_scc66470, FUNC(scc66470_device::map)).cswidth(16); +} + +void bfm_cobra3_state::ramdac_map(address_map &map) +{ + map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); +} + +void bfm_cobra3_state::scc66470_map(address_map &map) +{ + map(0x00000, 0x7ffff).ram(); +} + +static INPUT_PORTS_START( bfm_cobra3 ) + // TODO: Fix inputs + PORT_START("STROBE0") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN5 ) PORT_IMPULSE(3) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Green Test") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Red Test") + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + + PORT_START("STROBE1") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) + + PORT_START("STROBE2") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON2 ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON3 ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON4 ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON5 ) // collect? + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON6 ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON7 ) + + PORT_START("STROBE3") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON8 ) // service? + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON9 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON10 ) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON11 ) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON12 ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON13 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON14 ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON15 ) + + PORT_START("STROBE4") + PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x00, "DIL:!01" ) + PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "DIL:!02" ) + PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "DIL:!03" ) + PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "DIL:!04" ) + PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x00, "DIL:!05" ) + PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "DIL:!06" ) + PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "DIL:!07" ) + PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "DIL:!08" ) + +INPUT_PORTS_END + + +void bfm_cobra3_state::machine_start() +{ + m_active_strobe = 0; + m_lamps.resolve(); + m_mainram = make_unique_clear((1024 * 16) / 2); + m_nvram->set_base(m_mainram.get(), 1024 * 16); +} + + +static void cobra_scsi_devices(device_slot_interface &device) +{ + device.option_add("cdrom", NSCSI_CDROM); + device.option_add_internal("ncr53c80", NCR53C80); +} + +void bfm_cobra3_state::dma1_drq(int state) +{ +// m_maincpu->dma_dreq1_w(state); +} + +void bfm_cobra3_state::scc66470_irq(int state) +{ + m_maincpu->set_input_line(5, !state); +} + +uint32_t bfm_cobra3_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + if(m_scc66470->display_enabled()) + { + if(cliprect.min_y == cliprect.max_y) + { + uint32_t *dest = &bitmap.pix(cliprect.min_y); + uint8_t buffer[768]; + uint8_t *src = buffer; + m_scc66470->line(cliprect.min_y, buffer, sizeof(buffer)); + + src = buffer; + + if(*src == 254) + { + // Other implementations suggest leaving transparency / MPEG border colour here to ease blending + src += 32; + } + else + { + dest = std::fill_n(dest, 32, m_palette->pen(*src)); + src += 32; + } + + /* mpeg video has significant overscan, 4 lines either side. + + Just crop it out to fit, presume the chip does this IRL */ + + for(int x = 0 ; x < 352 ; x++) + { + if(*src == 254) + { + *dest++ = 0; // Will allow MPEG to be drawn i.e. transparent + src++; + } + else + { + *dest++ = m_palette->pen(*src++); + } + + if(*src == 254) + { + *dest++ = 0; // This should be mpeg video pixel i.e. transparent + src++; + } + else + { + *dest++ = m_palette->pen(*src++); + } + } + // TODO: MPEG image will write a border of 32 pixels of mpeg border colour here when it's mixed in, see above. + + if(*src != 254) + { + std::fill_n(dest, 32, m_palette->pen(*src)); + } + } + } + return 0; +} + + +void bfm_cobra3_state::bfm_cobra3(machine_config &config) +{ + M68340(config, m_maincpu, 16000000); + m_maincpu->set_addrmap(AS_PROGRAM, &bfm_cobra3_state::bfm_cobra3_map); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(15000000, 960, 0, 768, 312, 32, 312); + screen.set_video_attributes(VIDEO_UPDATE_SCANLINE); + screen.set_screen_update(FUNC(bfm_cobra3_state::screen_update)); + + PALETTE(config, m_palette).set_entries(256); + + RAMDAC(config, m_ramdac, 0, m_palette); // MUSIC Semiconductor TR9C1710 RAMDAC + m_ramdac->set_addrmap(0, &bfm_cobra3_state::ramdac_map); + m_ramdac->set_split_read(1); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + YMZ280B(config, m_ymz, 16.9344_MHz_XTAL); + m_ymz->add_route(0, "lspeaker", 1.0); + m_ymz->add_route(1, "rspeaker", 1.0); + + SCC66470(config,m_scc66470,30000000); + m_scc66470->set_addrmap(0, &bfm_cobra3_state::scc66470_map); + m_scc66470->set_screen("screen"); + m_scc66470->irq().set(FUNC(bfm_cobra3_state::scc66470_irq)); + + NSCSI_BUS(config, m_scsibus); + + NSCSI_CONNECTOR(config, "scsi:2", cobra_scsi_devices, "cdrom"); + NSCSI_CONNECTOR(config, "scsi:6").option_set("ncr5380", NCR5380).machine_config( + [this] (device_t *device) + { + ncr53c80_device &adapter = downcast(*device); + adapter.drq_handler().set(*this, FUNC(bfm_cobra3_state::dma1_drq)); + }); + + WATCHDOG_TIMER(config, "watchdog").set_time(PERIOD_OF_555_MONOSTABLE(120000,100e-9)); //TODO: Check timings + METERS(config, m_meters, 0).set_number(4); +} + +ROM_START( c3_rtime ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "95400009.bin", 0x00001, 0x080000, CRC(a5e0a5ca) SHA1(e7063ddfb436152f15267fde2aa7695c8a262191) ) + ROM_LOAD16_BYTE( "95400010.bin", 0x00000, 0x080000, CRC(03fd5f72) SHA1(379cfc4ef5087f24989bc1f2246b6056e33fd472) ) + + ROM_REGION( 0x100000, "altrevs", 0 ) + ROM_LOAD16_BYTE( "95400063.lhs", 0x00001, 0x080000, CRC(eecb5f3b) SHA1(a1c6ad61a65c5361c38aaae2a064983a978c45ea) ) + ROM_LOAD16_BYTE( "95400064.rhs", 0x00000, 0x080000, CRC(251689f5) SHA1(4589a409c6b0f2869f99a08df8d76223e54d5b3c) ) + ROM_LOAD16_BYTE( "95401063.lhs", 0x00001, 0x080000, CRC(ea98c159) SHA1(6f665d80b71af57b31194fdc981707822e62053e) ) + ROM_LOAD16_BYTE( "95401064.rhs", 0x00000, 0x080000, CRC(bc125897) SHA1(a83fdb54349d3ea5d183754bf4b9fee1f0b73be3) ) + ROM_LOAD16_BYTE( "radtimes.lhs", 0x00001, 0x080000, CRC(c6574297) SHA1(bd9744c4b08f9ae35fe1523ebcd68c52a36a32e0) ) + ROM_LOAD16_BYTE( "radtimes.rhs", 0x00000, 0x080000, CRC(ed2c24f0) SHA1(5f06b2de7e2b2dccee7763ea0938849d67256ff2) ) + ROM_LOAD16_BYTE( "rt017.lhs", 0x00001, 0x080000, CRC(d2272c39) SHA1(f583fe39c153dca2e86e875ca39056a8756e0d2c) ) + ROM_LOAD16_BYTE( "rt018.rhs", 0x00000, 0x080000, CRC(52999d03) SHA1(21d1e9034a26f6f73109e9e83272dcff104993e5) ) + ROM_LOAD16_BYTE( "rtimesp1", 0x00001, 0x080000, CRC(f856d377) SHA1(a9fac7e2188bbd087f70c1c00cbf790bc52d573b) ) + ROM_LOAD16_BYTE( "rtimesp2", 0x00000, 0x080000, CRC(130d0864) SHA1(034d6c4fdec3acd4329d16315aeac43b1f1a5e91) ) + + ROM_REGION( 0x1000000, "ymz280b", 0 ) + ROM_LOAD( "95004056.bin", 0x000000, 0x080000, CRC(24e8f9fb) SHA1(0d484a8f368b0f2140f148a1dc84db85a100af38) ) + ROM_LOAD( "95004057.bin", 0x080000, 0x080000, CRC(f73c92d6) SHA1(08c7db2baccb703f99efb81f618719a7789ca564) ) + + DISK_REGION("scsi:2:cdrom") + DISK_IMAGE_READONLY( "95100302", 0, SHA1(20accfe236a0c85108cd2a205399ed8959f1a638) ) +ROM_END + +ROM_START( c3_telly ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "95400021.p1", 0x00001, 0x080000, CRC(5c969746) SHA1(7458c613d7a3e7cf6a21e55f74dcdc052404f29c) ) + ROM_LOAD16_BYTE( "95400022.p2", 0x00000, 0x080000, CRC(fa1fdb7b) SHA1(eff87c197a62dba49d95810e8669026db2edb187) ) + + ROM_REGION( 0x100000, "altrevs", 0 ) + ROM_LOAD16_BYTE( "95401021.p1", 0x00001, 0x080000, CRC(24a334d3) SHA1(672f16cbd2ddf627213de71024b6fbaa28f526a5) ) + ROM_LOAD16_BYTE( "95401022.p2", 0x00000, 0x080000, CRC(90af3767) SHA1(e529ad7eef5e6d2a6951d46e77aaad2087890445) ) + ROM_LOAD16_BYTE( "tadd13lh", 0x00001, 0x080000, CRC(2d6ed08c) SHA1(efa39b9ff5605c2e29971fb5e874c9a0c178b1f0) ) + ROM_LOAD16_BYTE( "tadd14rh", 0x00000, 0x080000, CRC(26dd6ed6) SHA1(553f29017494b6f7ecc98940d527f498316ea55e) ) + ROM_LOAD16_BYTE( "telad.tl", 0x00001, 0x080000, CRC(e6906027) SHA1(20ca64417ea3795dc26adfea717cb3d724019c34) ) + ROM_LOAD16_BYTE( "telad.tr", 0x00000, 0x080000, CRC(38dbee05) SHA1(ee33cdaa7f817beb49a3cff49a5493a50d8d4504) ) + ROM_LOAD16_BYTE( "tasndl", 0x00001, 0x080000, CRC(3f0b9d2b) SHA1(6db3451c26a3e673204c316403e0bb7127191a1f) ) + ROM_LOAD16_BYTE( "tasndr", 0x00000, 0x080000, CRC(2dd9ebcf) SHA1(4d118d37e18266f82fb2acb37f5fd106e0f25a1f) ) + + ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) + ROM_LOAD( "telsndl", 0x0000, 0x080000, CRC(74996fbd) SHA1(90e46130dccf47be1fcfaf549e548cdd4883e59d) ) + + DISK_REGION("scsi:2:cdrom") + DISK_IMAGE_READONLY( "95100300", 0, SHA1(98905cbff24c576c58210d1d003f710fa7064762) ) +ROM_END + + +ROM_START( c3_tellyns ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "95400023.lhs", 0x00001, 0x080000, CRC(b79279b8) SHA1(010edf0c299b0b01ab43f52dce540ff0847fb4c5) ) + ROM_LOAD16_BYTE( "95400024.rhs", 0x00000, 0x080000, CRC(835d25fd) SHA1(6d780332f6016d6e1404922e0ac439a499211be3) ) + + ROM_REGION( 0x100000, "altrevs", 0 ) + ROM_LOAD16_BYTE( "95401023.lhs", 0x00001, 0x080000, CRC(85b95b56) SHA1(106e617fc92f95a6b3769db1fd4e5ab47c752c08) ) + ROM_LOAD16_BYTE( "95401024.rhs", 0x00000, 0x080000, CRC(835d25fd) SHA1(6d780332f6016d6e1404922e0ac439a499211be3) ) + + ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) + ROM_LOAD( "telsndl", 0x0000, 0x080000, CRC(74996fbd) SHA1(90e46130dccf47be1fcfaf549e548cdd4883e59d) ) + + DISK_REGION("scsi:2:cdrom") + DISK_IMAGE_READONLY( "95100301", 0, SHA1(dbce040a6fb7916a240d24e2207cf6e1b3f572e7) ) +ROM_END + +ROM_START( c3_totp ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "95400101.lo", 0x00001, 0x080000, CRC(c95164c7) SHA1(7b2fada6a3208666219a53cba08f7acad015763d) ) + ROM_LOAD16_BYTE( "95400102.hi", 0x00000, 0x080000, CRC(5ebba159) SHA1(34bcf48140261cd87d81a32581e965d722f42f71) ) + + ROM_REGION( 0x100000, "altrevs", 0 ) + ROM_LOAD16_BYTE( "95401101.lo", 0x00001, 0x080000, CRC(97d2d90a) SHA1(d4a2afd3cc551986e76f107beb66e8c660a6ee1d) ) + ROM_LOAD16_BYTE( "95401102.hi", 0x00000, 0x080000, CRC(3599427f) SHA1(16d915553b2b490a047888c64ebcf952714b3168) ) + + ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) + ROM_LOAD( "totpsnd.lhs", 0x000000, 0x080000, CRC(56a73136) SHA1(10656ede18de9432a8a728cc59d000b5b1bf0150) ) + ROM_LOAD( "totpsnd.rhs", 0x080000, 0x080000, CRC(28d156ab) SHA1(ebf5c4e008015b9b56b3aa5228c05b8e298daa80) ) + + DISK_REGION("scsi:2:cdrom") + DISK_IMAGE_READONLY( "95100307", 0, SHA1(27ad1565f9a153fe71b72d9c597a6e3c3f13ded0) ) +ROM_END + +ROM_START( c3_ppays ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "95400687.hi", 0x00000, 0x080000, CRC(56080e1c) SHA1(49391059b5a758690d4972abad04d7e7aef23423) ) + ROM_LOAD16_BYTE( "95400687.lo", 0x00001, 0x080000, CRC(8b2c9c3d) SHA1(921c900447870f6ae51a4f3baeb60ce94e732291) ) + + ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) + ROM_LOAD( "phrasesn.l", 0x0000, 0x080000, CRC(a436ccf8) SHA1(18c39aa2e68c32242e0de1347b25d4af44b84548) ) + + DISK_REGION("scsi:2:cdrom") + DISK_IMAGE_READONLY( "95100315", 0, SHA1(fc76d3ab5ff38c2dc4f06399f5399a1ae3c136e9) ) +ROM_END + +} + +GAME( 1995, c3_telly, 0, bfm_cobra3, bfm_cobra3, bfm_cobra3_state, empty_init, ROT0, "BFM", "Telly Addicts (Bellfruit) (Cobra 3)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAME( 1995, c3_tellyns,0, bfm_cobra3, bfm_cobra3, bfm_cobra3_state, empty_init, ROT0, "BFM", "Telly Addicts (New Series) (Bellfruit) (Cobra 3)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAME( 1996, c3_rtime, 0, bfm_cobra3, bfm_cobra3, bfm_cobra3_state, empty_init, ROT0, "BFM", "Radio Times (Bellfruit) (Cobra 3)", MACHINE_IMPERFECT_GRAPHICS| MACHINE_NOT_WORKING ) +GAME( 1997, c3_totp, 0, bfm_cobra3, bfm_cobra3, bfm_cobra3_state, empty_init, ROT0, "BFM", "Top of the Pops (Bellfruit) (Cobra 3?)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) +GAME( 1998, c3_ppays, 0, bfm_cobra3, bfm_cobra3, bfm_cobra3_state, empty_init, ROT0, "BFM", "The Phrase That Pays (Bellfruit) (Cobra 3?)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) diff --git a/src/mame/bfm/bfm_swp.cpp b/src/mame/bfm/bfm_swp.cpp deleted file mode 100644 index 89f7988c1c9..00000000000 --- a/src/mame/bfm/bfm_swp.cpp +++ /dev/null @@ -1,303 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood -/* Bellfruit SWP (Skill With Prizes) Video hardware - aka Cobra 3 - -*/ - -/* Radio Times readme #1 ---------------------------------------------- - -Music TR9C1710 (Video RAMDAC) - -Part number : STV8438CV - Manufacture : ST Microelectronics -Specification(s) - Description : 8-Bit Triple DAC with Analog Switch - Package : PQFP44 - -MC68340 : Integrated Processor with DMA - The MC68340 is a high-performance 32-bit integrated processor with direct memory access (DMA), combining an enhanced M68000-compatible processor, 32-bit DMA, and other peripheral subsystems on a single integrated circuit. The MC68340 CPU32 delivers 32-bit CISC processor performance from a lower cost 16-bit memory system. The combination of peripherals offered in the MC68340 can be found in a diverse range of microprocessor-based systems. Systems requiring very high-speed block transfers of data can benefit from the MC68340. - - - Block Diagram - - -MC68340 Features -CPU32 Core -Two-Channel DMA Controller -DUART Compatible with 68681 -Two 16-Bit Timer/Counters -Four Chip Selects -System Integration -32 Address Lines, 16 Data Lines -Low Power Management -4.8 MIPS @ 25 MHz -Available in 16 and 25 MHz -Available in 3.3 and 5V - - -l5380 -scsi controller - -ymz280b - in MAME - sound chip - -audio board - -75585116 - PALCE 16V8H -75585118 - PALCE 16V8H - -TI introduce the TMS320AV110 MPEG audio decoder based on TI's 16 bits -DSPs (about $14). - -roms - -game 95 400 009 type swp left ver. radt 1.1 - ST 27C4001 -game 95 400 010 type swp right ver. radt 1.1 - ST 27C4001 -95 004 056 sound left - ST 27C4001 -95 004 057 sound right - AM 27C040 - -cd - -version 95-100-302 -*/ - -/* Radio Times readme #2 ---------------------------------------------- - -Board -Difficult to make things out on this one, but the SCSI socket is clear to see - this is where the CDROM drive hooks in - -CPU -Again, a 68k processor - -DSP - Cobra 3 - -Just a board to decode the audio from the CD video. no ROM's feed it. - -GLUE - No idea - -Just some logic to sync audio with video with realtime graphics? - Clearly something is needed, as three separate boards are used to process this. - -Music - video RAMDAC - have nothing extra to add, this clearly plays the video portion. - -SCSI controller - just like in any PC - -Sound - -All related to the Yamaha YMZ280B-F, a very good music/PCM chip, probably not used to full potential here. - -CD-ROM - I'm prepared to put money on Telly Addicts and TOTP being like this, with some minor alterations. - -Ordinary ISO standard CDROM with 2048 byte sectors. Can be read on a PC to give MPEG-1 video files (.mpg) at 352x288 pixel resolution, which would probably expand to full screen - some have their own soundtracks, others subtitles. The frame rate of the video is 25fps, and the audio (where available) is 44KHz Stereo, 128Kbps MPEG Layer II (Which is not supported by Sellenoff's Capcom sound driver). Some graphics are stored encoded as .gfx files, whereas clip list data is either stored as an .stl file (listing 'number of clips' and clip name) or in .clp files (same, but larger - different round?) - -Final.lis is a list of the questions asked in the end game, where players are asked to match the programme to the channel it is broadcasted on (Very easy to decode, listed in numerical order of channel as channel (space) programme name (not alphabetical, but accessed at random - end marker is blank line, Channel '5' is radio, since there was no Five TV in those days.) (Why am I telling you this - it's practically an emptier.) - -Questions are listed by clip, in .QQQ files, encrypted. - -.SEQ files are 'sequences' instructions to the video board, in the form of renamed .MPG files, again 352x288, MPEG-1. - -TEST.TXT - suggests the content of a prototype version, which was expanded to make this. If the volume name is to be believed I may be related to the person who compiled this (though it's a big clan, highly unlikely ;)) - -*/ - - -#include "emu.h" -#include "machine/68340.h" -#include "sound/ymz280b.h" -#include "screen.h" -#include "speaker.h" - - -namespace { - -class bfm_swp_state : public driver_device -{ -public: - bfm_swp_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_cpuregion(*this, "maincpu") - { } - - std::unique_ptr m_mainram; - - uint16_t bfm_swp_mem_r(offs_t offset, uint16_t mem_mask = ~0); - void bfm_swp_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - - - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) - { - return 0; - } - - void bfm_swp(machine_config &config); - void bfm_swp_map(address_map &map) ATTR_COLD; -protected: - - // devices - required_device m_maincpu; - required_region_ptr m_cpuregion; - - virtual void machine_start() override ATTR_COLD; -}; - -uint16_t bfm_swp_state::bfm_swp_mem_r(offs_t offset, uint16_t mem_mask) -{ - int pc = m_maincpu->pc(); - int cs = m_maincpu->get_cs(offset * 2); - - switch ( cs ) - { - case 1: - return m_cpuregion[offset & 0x7ffff]; - case 2: - return m_mainram[offset & 0x1fff]; - - default: - logerror("%08x maincpu read access offset %08x mem_mask %08x cs %d\n", pc, offset*4, mem_mask, cs); - } - - return 0x0000; -} - -void bfm_swp_state::bfm_swp_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - int pc = m_maincpu->pc(); - int cs = m_maincpu->get_cs(offset * 2); - - switch ( cs ) - { - default: - logerror("%08x maincpu write access offset %08x data %08x mem_mask %08x cs %d\n", pc, offset*4, data, mem_mask, cs); - [[fallthrough]]; - case 2: - COMBINE_DATA(&m_mainram[offset & 0x1fff]); - } - -} - - - - -void bfm_swp_state::bfm_swp_map(address_map &map) -{ - map(0x00000000, 0xffffffff).rw(FUNC(bfm_swp_state::bfm_swp_mem_r), FUNC(bfm_swp_state::bfm_swp_mem_w)); -} - - -static INPUT_PORTS_START( bfm_swp ) -INPUT_PORTS_END - - -void bfm_swp_state::machine_start() -{ - m_mainram = make_unique_clear((1024 * 16) / 2); -} - - -void bfm_swp_state::bfm_swp(machine_config &config) -{ - /* basic machine hardware */ - M68340(config, m_maincpu, 16000000); - m_maincpu->set_addrmap(AS_PROGRAM, &bfm_swp_state::bfm_swp_map); - - - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_screen_update(FUNC(bfm_swp_state::screen_update)); - screen.set_size(64*8, 64*8); - screen.set_visarea(0*8, 32*8-1, 0*8, 32*8-1); - - SPEAKER(config, "mono").front_center(); - - YMZ280B(config, "ymz", 10000000).add_route(ALL_OUTPUTS, "mono", 1.0); -} - -ROM_START( c3_rtime ) - ROM_REGION( 0x100000, "maincpu", 0 ) - ROM_LOAD16_BYTE( "95400009.bin", 0x00001, 0x080000, CRC(a5e0a5ca) SHA1(e7063ddfb436152f15267fde2aa7695c8a262191) ) - ROM_LOAD16_BYTE( "95400010.bin", 0x00000, 0x080000, CRC(03fd5f72) SHA1(379cfc4ef5087f24989bc1f2246b6056e33fd472) ) - - ROM_REGION( 0x100000, "altrevs", 0 ) - ROM_LOAD16_BYTE( "95400063.lhs", 0x00001, 0x080000, CRC(eecb5f3b) SHA1(a1c6ad61a65c5361c38aaae2a064983a978c45ea) ) - ROM_LOAD16_BYTE( "95400064.rhs", 0x00000, 0x080000, CRC(251689f5) SHA1(4589a409c6b0f2869f99a08df8d76223e54d5b3c) ) - ROM_LOAD16_BYTE( "95401063.lhs", 0x00001, 0x080000, CRC(ea98c159) SHA1(6f665d80b71af57b31194fdc981707822e62053e) ) - ROM_LOAD16_BYTE( "95401064.rhs", 0x00000, 0x080000, CRC(bc125897) SHA1(a83fdb54349d3ea5d183754bf4b9fee1f0b73be3) ) - ROM_LOAD16_BYTE( "radtimes.lhs", 0x00001, 0x080000, CRC(c6574297) SHA1(bd9744c4b08f9ae35fe1523ebcd68c52a36a32e0) ) - ROM_LOAD16_BYTE( "radtimes.rhs", 0x00000, 0x080000, CRC(ed2c24f0) SHA1(5f06b2de7e2b2dccee7763ea0938849d67256ff2) ) - ROM_LOAD16_BYTE( "rt017.lhs", 0x00001, 0x080000, CRC(d2272c39) SHA1(f583fe39c153dca2e86e875ca39056a8756e0d2c) ) - ROM_LOAD16_BYTE( "rt018.rhs", 0x00000, 0x080000, CRC(52999d03) SHA1(21d1e9034a26f6f73109e9e83272dcff104993e5) ) - ROM_LOAD16_BYTE( "rtimesp1", 0x00001, 0x080000, CRC(f856d377) SHA1(a9fac7e2188bbd087f70c1c00cbf790bc52d573b) ) - ROM_LOAD16_BYTE( "rtimesp2", 0x00000, 0x080000, CRC(130d0864) SHA1(034d6c4fdec3acd4329d16315aeac43b1f1a5e91) ) - - ROM_REGION( 0x1000000, "ymz280b", 0 ) - ROM_LOAD( "95004056.bin", 0x000000, 0x080000, CRC(24e8f9fb) SHA1(0d484a8f368b0f2140f148a1dc84db85a100af38) ) - ROM_LOAD( "95004057.bin", 0x080000, 0x080000, CRC(f73c92d6) SHA1(08c7db2baccb703f99efb81f618719a7789ca564) ) - - DISK_REGION( "scsi" ) // CDROM - DISK_IMAGE_READONLY( "rtimes", 0, SHA1(20accfe236a0c85108cd2a205399ed8959f1a638) ) -ROM_END - -ROM_START( c3_telly ) - ROM_REGION( 0x100000, "maincpu", 0 ) - ROM_LOAD16_BYTE( "95401023.lhs", 0x00001, 0x080000, CRC(85b95b56) SHA1(106e617fc92f95a6b3769db1fd4e5ab47c752c08) ) - ROM_LOAD16_BYTE( "95401024.rhs", 0x00000, 0x080000, CRC(835d25fd) SHA1(6d780332f6016d6e1404922e0ac439a499211be3) ) - - ROM_REGION( 0x100000, "altrevs", 0 ) - ROM_LOAD16_BYTE( "95400021.p1", 0x00001, 0x080000, CRC(5c969746) SHA1(7458c613d7a3e7cf6a21e55f74dcdc052404f29c) ) - ROM_LOAD16_BYTE( "95400022.p2", 0x00000, 0x080000, CRC(fa1fdb7b) SHA1(eff87c197a62dba49d95810e8669026db2edb187) ) - ROM_LOAD16_BYTE( "95400023.lhs", 0x00001, 0x080000, CRC(b79279b8) SHA1(010edf0c299b0b01ab43f52dce540ff0847fb4c5) ) - ROM_LOAD16_BYTE( "95400024.rhs", 0x00000, 0x080000, CRC(835d25fd) SHA1(6d780332f6016d6e1404922e0ac439a499211be3) ) - ROM_LOAD16_BYTE( "95401021.p1", 0x00001, 0x080000, CRC(24a334d3) SHA1(672f16cbd2ddf627213de71024b6fbaa28f526a5) ) - ROM_LOAD16_BYTE( "95401022.p2", 0x00000, 0x080000, CRC(90af3767) SHA1(e529ad7eef5e6d2a6951d46e77aaad2087890445) ) - ROM_LOAD16_BYTE( "tadd13lh", 0x00001, 0x080000, CRC(2d6ed08c) SHA1(efa39b9ff5605c2e29971fb5e874c9a0c178b1f0) ) - ROM_LOAD16_BYTE( "tadd14rh", 0x00000, 0x080000, CRC(26dd6ed6) SHA1(553f29017494b6f7ecc98940d527f498316ea55e) ) - ROM_LOAD16_BYTE( "telad.tl", 0x00001, 0x080000, CRC(e6906027) SHA1(20ca64417ea3795dc26adfea717cb3d724019c34) ) - ROM_LOAD16_BYTE( "telad.tr", 0x00000, 0x080000, CRC(38dbee05) SHA1(ee33cdaa7f817beb49a3cff49a5493a50d8d4504) ) - ROM_LOAD16_BYTE( "tasndl", 0x00001, 0x080000, CRC(3f0b9d2b) SHA1(6db3451c26a3e673204c316403e0bb7127191a1f) ) - ROM_LOAD16_BYTE( "tasndr", 0x00000, 0x080000, CRC(2dd9ebcf) SHA1(4d118d37e18266f82fb2acb37f5fd106e0f25a1f) ) - - ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) - ROM_LOAD( "telsndl", 0x0000, 0x080000, CRC(74996fbd) SHA1(90e46130dccf47be1fcfaf549e548cdd4883e59d) ) - - DISK_REGION( "scsi" ) // HDD - DISK_IMAGE_READONLY( "telly", 0, SHA1(6675b8ed6ea47bfb89fbd10a2740e1e0a3faec54) ) -ROM_END - -ROM_START( c3_totp ) - ROM_REGION( 0x100000, "maincpu", 0 ) - ROM_LOAD16_BYTE( "95400101.lo", 0x00001, 0x080000, CRC(c95164c7) SHA1(7b2fada6a3208666219a53cba08f7acad015763d) ) - ROM_LOAD16_BYTE( "95400102.hi", 0x00000, 0x080000, CRC(5ebba159) SHA1(34bcf48140261cd87d81a32581e965d722f42f71) ) - - ROM_REGION( 0x100000, "altrevs", 0 ) - ROM_LOAD16_BYTE( "95401101.lo", 0x00001, 0x080000, CRC(97d2d90a) SHA1(d4a2afd3cc551986e76f107beb66e8c660a6ee1d) ) - ROM_LOAD16_BYTE( "95401102.hi", 0x00000, 0x080000, CRC(3599427f) SHA1(16d915553b2b490a047888c64ebcf952714b3168) ) - - ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) - ROM_LOAD( "totpsnd.lhs", 0x000000, 0x080000, CRC(56a73136) SHA1(10656ede18de9432a8a728cc59d000b5b1bf0150) ) - ROM_LOAD( "totpsnd.rhs", 0x080000, 0x080000, CRC(28d156ab) SHA1(ebf5c4e008015b9b56b3aa5228c05b8e298daa80) ) - - DISK_REGION( "scsi" ) // uses a CD, only one we've seen has been damaged to a point where not all data could be read tho - DISK_IMAGE_READONLY( "cd", 0, NO_DUMP ) -ROM_END - -ROM_START( c3_ppays ) - ROM_REGION( 0x100000, "maincpu", 0 ) - ROM_LOAD16_BYTE( "95400687.hi", 0x00000, 0x080000, CRC(56080e1c) SHA1(49391059b5a758690d4972abad04d7e7aef23423) ) - ROM_LOAD16_BYTE( "95400687.lo", 0x00001, 0x080000, CRC(8b2c9c3d) SHA1(921c900447870f6ae51a4f3baeb60ce94e732291) ) - - ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) - ROM_LOAD( "phrasesn.l", 0x0000, 0x080000, CRC(a436ccf8) SHA1(18c39aa2e68c32242e0de1347b25d4af44b84548) ) - - DISK_REGION( "scsi" ) // CD or HDD - DISK_IMAGE_READONLY( "cd or hdd", 0, NO_DUMP ) -ROM_END - -} // anonymous namespace - - -GAME( 199?, c3_rtime, 0, bfm_swp, bfm_swp, bfm_swp_state, empty_init, ROT0, "BFM", "Radio Times (Bellfruit) (Cobra 3)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 199?, c3_telly, 0, bfm_swp, bfm_swp, bfm_swp_state, empty_init, ROT0, "BFM", "Telly Addicts (Bellfruit) (Cobra 3)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 199?, c3_totp, 0, bfm_swp, bfm_swp, bfm_swp_state, empty_init, ROT0, "BFM", "Top of the Pops (Bellfruit) (Cobra 3?)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 199?, c3_ppays, 0, bfm_swp, bfm_swp, bfm_swp_state, empty_init, ROT0, "BFM", "The Phrase That Pays (Bellfruit) (Cobra 3?)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 5687e1d1f20..5cc2108edac 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -15196,10 +15196,11 @@ sc6dndema sc6dndemb sc6dndemc -@source:bfm/bfm_swp.cpp +@source:bfm/bfm_cobra3.cpp c3_ppays c3_rtime c3_telly +c3_tellyns c3_totp @source:bfm/bfmsys83.cpp From b665b3fa0beced5e489c1ec401f063f373d4a053 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 28 Feb 2026 14:50:39 +0100 Subject: [PATCH 075/351] sprcros2: update notes --- src/mame/sanritsu/sprcros2.cpp | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mame/sanritsu/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp index 804eb579314..d7cb3bd5af6 100644 --- a/src/mame/sanritsu/sprcros2.cpp +++ b/src/mame/sanritsu/sprcros2.cpp @@ -8,10 +8,12 @@ driver by Angelo Salese, based on "wiped off due to not anymore licenseable" driver by insideoutboy. TODO: -- verify screen timing, it's either 320*264, or if bankp is accurate, then - it's 330*256 - visible width is probably correct -- verify Z80 frequency, it runs laggy at 2.5MHz that isn't evident on PCB - video, and Z80B is rated 6MHz, maybe there are waitstates though? +- Verify screen timing, it's either 320*264, or if bankp is accurate, then it's + 330*256. Visible width is probably correct. +- Verify Z80 frequency, it runs too laggy at 2.5MHz which isn't evident on PCB + video, and Z80B is rated 6MHz. Maybe there are waitstates though? + Also note that if it's clocked at 2.5MHz, it will sometimes write wrong tiles + to bg_vram, see MT 09395. BTANB: - occasional 1-frame sprite glitches at the edge of the screen From 87e09a4cc840a0cc9c4499ad697e201854728f36 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 28 Feb 2026 14:51:26 +0100 Subject: [PATCH 076/351] nl_mario: enable DYNAMIC_TS for clearer sound --- src/mame/nintendo/nl_mario.cpp | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/src/mame/nintendo/nl_mario.cpp b/src/mame/nintendo/nl_mario.cpp index b683b3ea260..290d8df7f8c 100644 --- a/src/mame/nintendo/nl_mario.cpp +++ b/src/mame/nintendo/nl_mario.cpp @@ -23,7 +23,6 @@ /* ---------------------------------------------------------------------- */ static NETLIST_START(nl_mario_snd0) { - RES(R17, RES_K(27)) /* 20 according to parts list */ /* 27 verified, 30K in schematics */ CAP(C14, CAP_U(4.7)) /* verified */ @@ -74,7 +73,6 @@ static NETLIST_START(nl_mario_snd0) /* ---------------------------------------------------------------------- */ static NETLIST_START(nl_mario_snd1) { - RES(R18, RES_K(30)) /* 20 according to parts list */ /* 27 verified, 30K in schematics */ CAP(C15, CAP_U(4.7)) /* verified */ @@ -123,7 +121,6 @@ static NETLIST_START(nl_mario_snd1) // FIXME: Diodes are 1S953 static NETLIST_START(nl_mario_snd7) { - RES(R61, RES_K(47)) CAP(C41, CAP_U(4.7)) /* verified */ @@ -169,7 +166,6 @@ static NETLIST_START(nl_mario_snd7) TTL_7486_XOR(1K_C, 3H.Q4, 4K_A.Y) TTL_7408_AND(2K_C, 4L_A.Q, 1K_C) - } /* ---------------------------------------------------------------------- */ @@ -222,7 +218,6 @@ static NETLIST_START(nl_mario_dac) NETLIST_START(mario) { - LOCAL_SOURCE(nl_mario_snd0) LOCAL_SOURCE(nl_mario_snd1) LOCAL_SOURCE(nl_mario_snd7) @@ -234,7 +229,7 @@ NETLIST_START(mario) PARAM(Solver.GS_LOOPS, 1) /* Dynamic timestepping avoids excessive newton loops on startup */ PARAM(Solver.DYNAMIC_LTE, 5e-2) - PARAM(Solver.DYNAMIC_TS, 0) + PARAM(Solver.DYNAMIC_TS, 1) ANALOG_INPUT(V5, 5) ALIAS(VCC, V5) // no-ttl-dip devices need VCC! From 2cabaf1541c070b9ba1b61ef98f2b12ed3e24a4f Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 1 Mar 2026 02:04:02 +1100 Subject: [PATCH 077/351] cpu/tms320c2x: Small optimisation and cleanup: [FlykeSpice] * Templated relevant member functions on ignore ARP hack avoiding a data member check. * Made IRQ cycles a local - it's never needed outside the scope where it's used. * Skip hold logic if hold read callback is unset. * Templated some member functions with simple variations. * namco/namcos21_dsp.cpp, namco/namcos21_dsp_c67.cpp: Don't hook up unused hold/ack. --- src/devices/cpu/tms320c2x/tms320c2x.cpp | 210 +++++++++++------------- src/devices/cpu/tms320c2x/tms320c2x.h | 55 ++----- src/mame/namco/namcos21_dsp.cpp | 2 - src/mame/namco/namcos21_dsp_c67.cpp | 2 - 4 files changed, 112 insertions(+), 157 deletions(-) diff --git a/src/devices/cpu/tms320c2x/tms320c2x.cpp b/src/devices/cpu/tms320c2x/tms320c2x.cpp index 396ad3cfaab..6bcfd028208 100644 --- a/src/devices/cpu/tms320c2x/tms320c2x.cpp +++ b/src/devices/cpu/tms320c2x/tms320c2x.cpp @@ -312,7 +312,7 @@ void tms320c2x_device::dxr_w(uint16_t data) if(TXM) { if(FSM) - m_waiting_for_serial_frame = 1; + m_waiting_for_serial_frame = true; else m_IFR |= 0x20; } @@ -370,12 +370,14 @@ inline void tms320c2x_device::MODIFY_DP(int data) m_STR0 |= (data & DP_REG); m_STR0 |= 0x0400; } + inline void tms320c2x_device::MODIFY_PM(int data) { m_STR1 &= ~PM_REG; m_STR1 |= (data & PM_REG); m_STR1 |= m_fixed_STR1; } + inline void tms320c2x_device::MODIFY_ARP(int data) { m_STR1 &= ~ARB_REG; @@ -386,12 +388,11 @@ inline void tms320c2x_device::MODIFY_ARP(int data) m_STR0 |= 0x0400; } -uint16_t tms320c2x_device::reverse_carry_add(uint16_t arg0, uint16_t arg1 ) +uint16_t tms320c2x_device::reverse_carry_add(uint16_t arg0, uint16_t arg1) { uint16_t result = 0; int carry = 0; - int count; - for (count = 0; count < 16; count++) + for (int count = 0; count < 16; count++) { int sum = (arg0 >> 15) + (arg1 >> 15) + carry; result = (result << 1) | (sum & 1); @@ -402,6 +403,7 @@ uint16_t tms320c2x_device::reverse_carry_add(uint16_t arg0, uint16_t arg1 ) return result; } +template inline void tms320c2x_device::MODIFY_AR_ARP() { /* modify address register referenced by ARP */ switch (m_opcode.b.l & 0x70) /* Cases ordered by predicted useage */ @@ -437,7 +439,7 @@ inline void tms320c2x_device::MODIFY_AR_ARP() break; } - if (!m_mHackIgnoreARP) + if (!IgnoreARPHack) { if (m_opcode.b.l & 8) { /* bit 3 determines if new value is loaded into ARP */ @@ -484,7 +486,7 @@ inline void tms320c2x_device::CALCULATE_ADD_OVERFLOW(int32_t addval) inline void tms320c2x_device::CALCULATE_SUB_OVERFLOW(int32_t subval) { - if ((int32_t)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0) + if (int32_t((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0) { SET0(OV_FLAG); if (OVM) @@ -501,6 +503,7 @@ inline uint16_t tms320c2x_device::POP_STACK() m_STACK[i] = m_STACK[i - 1]; return data; } + inline void tms320c2x_device::PUSH_STACK(uint16_t data) { for (unsigned i = 0; m_stack_limit > i; ++i) @@ -520,7 +523,8 @@ inline void tms320c2x_device::SHIFT_Preg_TO_ALU() } } -inline void tms320c2x_device::GETDATA(int shift,int signext) +template +inline void tms320c2x_device::GETDATA(int shift, int signext) { if (m_opcode.b.l & 0x80) { /* indirect memory access */ @@ -540,12 +544,12 @@ inline void tms320c2x_device::GETDATA(int shift,int signext) m_external_mem_access = 0; } - m_ALU.d = (uint16_t)m_data.read_word(m_memaccess); - if (signext) m_ALU.d = (int16_t)m_ALU.d; + m_ALU.d = uint16_t(m_data.read_word(m_memaccess)); + if (signext) m_ALU.sd = int16_t(uint16_t(m_ALU.d)); m_ALU.d <<= shift; /* next ARP */ - if (m_opcode.b.l & 0x80) MODIFY_AR_ARP(); + if (m_opcode.b.l & 0x80) MODIFY_AR_ARP(); } inline void tms320c2x_device::PUTDATA(uint16_t data) @@ -566,6 +570,7 @@ inline void tms320c2x_device::PUTDATA(uint16_t data) m_data.write_word(DMA, data); } } + inline void tms320c2x_device::PUTDATA_SST(uint16_t data) { if (m_opcode.b.l & 0x80) m_memaccess = IND; @@ -599,7 +604,7 @@ void tms320c2x_device::illegal() void tms320c2x_device::abst() { - if ( (int32_t)(m_ACC.d) < 0 ) { + if (int32_t(m_ACC.d) < 0) { m_ACC.d = -m_ACC.d; if (m_ACC.d == 0x80000000) { SET0(OV_FLAG); @@ -631,12 +636,12 @@ void tms320c2x_device::addh() m_oldacc.d = m_ACC.d; GETDATA(0, 0); m_ACC.w.h += m_ALU.w.l; - if ( (uint16_t)(m_oldacc.w.h) > (uint16_t)(m_ACC.w.h) ) { + if (uint16_t(m_oldacc.w.h) > uint16_t(m_ACC.w.h)) { SET1(C_FLAG); /* Carry flag is not cleared, if no carry occurred */ } - if ((int16_t)((m_ACC.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) { + if (int16_t((m_ACC.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) { SET0(OV_FLAG); - if (OVM) m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff; + if (OVM) m_ACC.w.h = (int16_t(m_oldacc.w.h) < 0) ? 0x8000 : 0x7fff; } } void tms320c2x_device::addk() @@ -734,13 +739,13 @@ void tms320c2x_device::bc() } void tms320c2x_device::bgez() { - if ( (int32_t)(m_ACC.d) >= 0 ) m_PC = m_cache.read_word(m_PC); + if (m_ACC.sd >= 0) m_PC = m_cache.read_word(m_PC); else m_PC++; MODIFY_AR_ARP(); } void tms320c2x_device::bgz() { - if ( (int32_t)(m_ACC.d) > 0 ) m_PC = m_cache.read_word(m_PC); + if (m_ACC.sd > 0) m_PC = m_cache.read_word(m_PC); else m_PC++; MODIFY_AR_ARP(); } @@ -764,7 +769,7 @@ void tms320c2x_device::bitt() } void tms320c2x_device::blez() { - if ( (int32_t)(m_ACC.d) <= 0 ) m_PC = m_cache.read_word(m_PC); + if (m_ACC.sd <= 0) m_PC = m_cache.read_word(m_PC); else m_PC++; MODIFY_AR_ARP(); } @@ -792,7 +797,7 @@ void tms320c2x_device::blkp() } void tms320c2x_device::blz() { - if ( (int32_t)(m_ACC.d) < 0 ) m_PC = m_cache.read_word(m_PC); + if (m_ACC.sd < 0) m_PC = m_cache.read_word(m_PC); else m_PC++; MODIFY_AR_ARP(); } @@ -853,19 +858,19 @@ void tms320c2x_device::cmpr() switch (m_opcode.b.l & 3) { case 0: - if ( (uint16_t)(m_AR[ARP]) == (uint16_t)(m_AR[0]) ) SET1(TC_FLAG); + if (uint16_t(m_AR[ARP]) == uint16_t(m_AR[0])) SET1(TC_FLAG); else CLR1(TC_FLAG); break; case 1: - if ( (uint16_t)(m_AR[ARP]) < (uint16_t)(m_AR[0]) ) SET1(TC_FLAG); + if (uint16_t(m_AR[ARP]) < uint16_t(m_AR[0])) SET1(TC_FLAG); else CLR1(TC_FLAG); break; case 2: - if ( (uint16_t)(m_AR[ARP]) > (uint16_t)(m_AR[0]) ) SET1(TC_FLAG); + if (uint16_t(m_AR[ARP]) > uint16_t(m_AR[0])) SET1(TC_FLAG); else CLR1(TC_FLAG); break; case 3: - if ( (uint16_t)(m_AR[ARP]) != (uint16_t)(m_AR[0]) ) SET1(TC_FLAG); + if (uint16_t(m_AR[ARP]) != uint16_t(m_AR[0])) SET1(TC_FLAG); else CLR1(TC_FLAG); break; } @@ -962,7 +967,7 @@ void tms320c2x_device::fort() void tms320c2x_device::idle() { CLR0(INTM_FLAG); - m_idle = 1; + m_idle = true; } void tms320c2x_device::in() { @@ -991,22 +996,13 @@ void tms320c2x_device::lalk() m_ALU.d <<= (m_opcode.b.h & 0xf); m_ACC.d = m_ALU.d; } -void tms320c2x_device::lar_ar0() { GETDATA(0, 0); m_AR[0] = m_ALU.w.l; } -void tms320c2x_device::lar_ar1() { GETDATA(0, 0); m_AR[1] = m_ALU.w.l; } -void tms320c2x_device::lar_ar2() { GETDATA(0, 0); m_AR[2] = m_ALU.w.l; } -void tms320c2x_device::lar_ar3() { GETDATA(0, 0); m_AR[3] = m_ALU.w.l; } -void tms320c2x_device::lar_ar4() { GETDATA(0, 0); m_AR[4] = m_ALU.w.l; } -void tms320c2x_device::lar_ar5() { GETDATA(0, 0); m_AR[5] = m_ALU.w.l; } -void tms320c2x_device::lar_ar6() { GETDATA(0, 0); m_AR[6] = m_ALU.w.l; } -void tms320c2x_device::lar_ar7() { GETDATA(0, 0); m_AR[7] = m_ALU.w.l; } -void tms320c2x_device::lark_ar0() { m_AR[0] = m_opcode.b.l; } -void tms320c2x_device::lark_ar1() { m_AR[1] = m_opcode.b.l; } -void tms320c2x_device::lark_ar2() { m_AR[2] = m_opcode.b.l; } -void tms320c2x_device::lark_ar3() { m_AR[3] = m_opcode.b.l; } -void tms320c2x_device::lark_ar4() { m_AR[4] = m_opcode.b.l; } -void tms320c2x_device::lark_ar5() { m_AR[5] = m_opcode.b.l; } -void tms320c2x_device::lark_ar6() { m_AR[6] = m_opcode.b.l; } -void tms320c2x_device::lark_ar7() { m_AR[7] = m_opcode.b.l; } + +template +void tms320c2x_device::lar_ar() { GETDATA(0, 0); m_AR[N] = m_ALU.w.l; } + +template +void tms320c2x_device::lark_ar() { m_AR[N] = m_opcode.b.l; } + void tms320c2x_device::ldp() { GETDATA(0, 0); @@ -1029,9 +1025,7 @@ void tms320c2x_device::lrlk() } void tms320c2x_device::lst() { - m_mHackIgnoreARP = 1; - GETDATA(0, 0); - m_mHackIgnoreARP = 0; + GETDATA(0, 0); m_ALU.w.l &= (~INTM_FLAG); m_STR0 &= INTM_FLAG; @@ -1040,9 +1034,7 @@ void tms320c2x_device::lst() } void tms320c2x_device::lst1() { - m_mHackIgnoreARP = 1; - GETDATA(0, 0); - m_mHackIgnoreARP = 0; + GETDATA(0, 0); m_STR1 = m_ALU.w.l | m_fixed_STR1; m_STR0 &= (~ARP_REG); /* ARB also gets copied to ARP */ @@ -1105,7 +1097,7 @@ void tms320c2x_device::mac() /** RAM blocks B0,B1,B2 may be important CALCULATE_ADD_CARRY(); GETDATA(0, 0); m_Treg = m_ALU.w.l; - m_Preg.d = ( (int16_t)m_ALU.w.l * (int16_t)m_cache.read_word(m_PFC) ); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_cache.read_word(m_PFC)); m_PFC++; m_tms320c2x_dec_cycles += (2*CLK); } @@ -1121,11 +1113,11 @@ void tms320c2x_device::macd() /** RAM blocks B0,B1,B2 may be important CALCULATE_ADD_OVERFLOW(m_ALU.d); CALCULATE_ADD_CARRY(); GETDATA(0, 0); - if ( (m_opcode.b.l & 0x80) || m_init_load_addr ) { /* No writing during repetition, or DMA mode */ + if ((m_opcode.b.l & 0x80) || m_init_load_addr) { /* No writing during repetition, or DMA mode */ m_data.write_word(m_memaccess+1, m_ALU.w.l); } m_Treg = m_ALU.w.l; - m_Preg.d = ( (int16_t)m_ALU.w.l * (int16_t)m_cache.read_word(m_PFC) ); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_cache.read_word(m_PFC)); m_PFC++; m_tms320c2x_dec_cycles += (2*CLK); } @@ -1136,7 +1128,7 @@ void tms320c2x_device::mar() /* LARP and NOP are a subset of this instruct void tms320c2x_device::mpy() { GETDATA(0, 0); - m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_Treg); } void tms320c2x_device::mpya() { @@ -1146,12 +1138,11 @@ void tms320c2x_device::mpya() CALCULATE_ADD_OVERFLOW(m_ALU.d); CALCULATE_ADD_CARRY(); GETDATA(0, 0); - m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_Treg); } void tms320c2x_device::mpyk() { - m_Preg.d = (int16_t)m_Treg * ((int16_t)(m_opcode.w.l << 3) >> 3); - + m_Preg.d = int16_t(m_Treg) * (int16_t(m_opcode.w.l << 3) >> 3); } void tms320c2x_device::mpys() { @@ -1161,12 +1152,12 @@ void tms320c2x_device::mpys() CALCULATE_SUB_OVERFLOW(m_ALU.d); CALCULATE_SUB_CARRY(); GETDATA(0, 0); - m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_Treg); } void tms320c2x_device::mpyu() { GETDATA(0, 0); - m_Preg.d = (uint16_t)(m_ALU.w.l) * (uint16_t)(m_Treg); + m_Preg.d = uint16_t(m_ALU.w.l) * uint16_t(m_Treg); } void tms320c2x_device::neg() { @@ -1183,7 +1174,7 @@ void tms320c2x_device::nop() { } // NOP is a subset of the MAR instruction */ void tms320c2x_device::norm() { - if (m_ACC.d !=0 && (int32_t)(m_ACC.d ^ (m_ACC.d << 1)) >= 0) + if (m_ACC.d != 0 && int32_t(m_ACC.d ^ (m_ACC.d << 1)) >= 0) { CLR1(TC_FLAG); m_ACC.d <<= 1; @@ -1305,14 +1296,9 @@ void tms320c2x_device::sacl() m_ALU.d = (m_ACC.d << (m_opcode.b.h & 7)); PUTDATA(m_ALU.w.l); } -void tms320c2x_device::sar_ar0() { PUTDATA(m_AR[0]); } -void tms320c2x_device::sar_ar1() { PUTDATA(m_AR[1]); } -void tms320c2x_device::sar_ar2() { PUTDATA(m_AR[2]); } -void tms320c2x_device::sar_ar3() { PUTDATA(m_AR[3]); } -void tms320c2x_device::sar_ar4() { PUTDATA(m_AR[4]); } -void tms320c2x_device::sar_ar5() { PUTDATA(m_AR[5]); } -void tms320c2x_device::sar_ar6() { PUTDATA(m_AR[6]); } -void tms320c2x_device::sar_ar7() { PUTDATA(m_AR[7]); } + +template +void tms320c2x_device::sar_ar() { PUTDATA(m_AR[N]); } void tms320c2x_device::sblk() { @@ -1393,7 +1379,7 @@ void tms320c2x_device::sqra() CALCULATE_ADD_CARRY(); GETDATA(0, 0); m_Treg = m_ALU.w.l; - m_Preg.d = ((int16_t)m_ALU.w.l * (int16_t)m_ALU.w.l); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_ALU.w.l); } void tms320c2x_device::sqrs() { @@ -1404,7 +1390,7 @@ void tms320c2x_device::sqrs() CALCULATE_SUB_CARRY(); GETDATA(0, 0); m_Treg = m_ALU.w.l; - m_Preg.d = ((int16_t)m_ALU.w.l * (int16_t)m_ALU.w.l); + m_Preg.d = int16_t(m_ALU.w.l) * int16_t(m_ALU.w.l); } void tms320c2x_device::sst() { @@ -1449,7 +1435,7 @@ void tms320c2x_device::subc() m_oldacc.d = m_ACC.d; GETDATA(15, SXM); m_ACC.d -= m_ALU.d; /* Temporary switch to ACC. Actual calculation is done as (ACC)-[mem] -> ALU, will be preserved later on. */ - if ((int32_t)((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0) { + if (int32_t((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0) { SET0(OV_FLAG); /* Not affected by OVM */ } CALCULATE_SUB_CARRY(); @@ -1467,12 +1453,12 @@ void tms320c2x_device::subh() m_oldacc.d = m_ACC.d; GETDATA(0, 0); m_ACC.w.h -= m_ALU.w.l; - if ( (uint16_t)(m_oldacc.w.h) < (uint16_t)(m_ACC.w.h) ) { + if (uint16_t(m_oldacc.w.h) < uint16_t(m_ACC.w.h)) { CLR1(C_FLAG); /* Carry flag is not affected, if no borrow occurred */ } - if ((int16_t)((m_oldacc.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) { + if (int16_t((m_oldacc.w.h ^ m_ALU.w.l) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) { SET0(OV_FLAG); - if (OVM) m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff; + if (OVM) m_ACC.w.h = (int16_t(m_oldacc.w.h) < 0) ? 0x8000 : 0x7fff; } } void tms320c2x_device::subk() @@ -1510,7 +1496,7 @@ void tms320c2x_device::tblr() m_PFC = m_ACC.w.l; } m_ALU.w.l = m_cache.read_word(m_PFC); - if ( (CNF0) && ( (uint16_t)(m_PFC) >= 0xff00 ) ) {} /** TMS320C25 only */ + if (CNF0 && (uint16_t(m_PFC) >= 0xff00)) {} /** TMS320C25 only */ else m_tms320c2x_dec_cycles += (1*CLK); PUTDATA(m_ALU.w.l); m_PFC++; @@ -1575,7 +1561,7 @@ const tms320c2x_device::tms320c2x_opcode tms320c2x_device::s_opcode_main[256]= /*18*/ {1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub },{1*CLK, &tms320c2x_device::sub }, /*20*/ {1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac }, /*28*/ {1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac },{1*CLK, &tms320c2x_device::lac }, -/*30*/ {1*CLK, &tms320c2x_device::lar_ar0 },{1*CLK, &tms320c2x_device::lar_ar1 },{1*CLK, &tms320c2x_device::lar_ar2 },{1*CLK, &tms320c2x_device::lar_ar3 },{1*CLK, &tms320c2x_device::lar_ar4 },{1*CLK, &tms320c2x_device::lar_ar5 },{1*CLK, &tms320c2x_device::lar_ar6 },{1*CLK, &tms320c2x_device::lar_ar7 }, +/*30*/ {1*CLK, &tms320c2x_device::lar_ar<0>},{1*CLK, &tms320c2x_device::lar_ar<1> },{1*CLK, &tms320c2x_device::lar_ar<2> },{1*CLK, &tms320c2x_device::lar_ar<3> },{1*CLK, &tms320c2x_device::lar_ar<4> },{1*CLK, &tms320c2x_device::lar_ar<5> },{1*CLK, &tms320c2x_device::lar_ar<6> },{1*CLK, &tms320c2x_device::lar_ar<7> }, /*38*/ {1*CLK, &tms320c2x_device::mpy },{1*CLK, &tms320c2x_device::sqra },{1*CLK, &tms320c2x_device::mpya },{1*CLK, &tms320c2x_device::mpys },{1*CLK, &tms320c2x_device::lt },{1*CLK, &tms320c2x_device::lta },{1*CLK, &tms320c2x_device::ltp },{1*CLK, &tms320c2x_device::ltd }, /*40*/ {1*CLK, &tms320c2x_device::zalh },{1*CLK, &tms320c2x_device::zals },{1*CLK, &tms320c2x_device::lact },{1*CLK, &tms320c2x_device::addc },{1*CLK, &tms320c2x_device::subh },{1*CLK, &tms320c2x_device::subs },{1*CLK, &tms320c2x_device::subt },{1*CLK, &tms320c2x_device::subc }, /*48*/ {1*CLK, &tms320c2x_device::addh },{1*CLK, &tms320c2x_device::adds },{1*CLK, &tms320c2x_device::addt },{1*CLK, &tms320c2x_device::rpt },{1*CLK, &tms320c2x_device::xor_ },{1*CLK, &tms320c2x_device::or_ },{1*CLK, &tms320c2x_device::and_ },{1*CLK, &tms320c2x_device::subb }, @@ -1583,7 +1569,7 @@ const tms320c2x_device::tms320c2x_opcode tms320c2x_device::s_opcode_main[256]= /*58*/ {3*CLK, &tms320c2x_device::tblr },{2*CLK, &tms320c2x_device::tblw },{1*CLK, &tms320c2x_device::sqrs },{1*CLK, &tms320c2x_device::lts },{2*CLK, &tms320c2x_device::macd },{2*CLK, &tms320c2x_device::mac },{2*CLK, &tms320c2x_device::bc },{2*CLK, &tms320c2x_device::bnc }, /*60*/ {1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl },{1*CLK, &tms320c2x_device::sacl }, /*68*/ {1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach },{1*CLK, &tms320c2x_device::sach }, -/*70*/ {1*CLK, &tms320c2x_device::sar_ar0 },{1*CLK, &tms320c2x_device::sar_ar1 },{1*CLK, &tms320c2x_device::sar_ar2 },{1*CLK, &tms320c2x_device::sar_ar3 },{1*CLK, &tms320c2x_device::sar_ar4 },{1*CLK, &tms320c2x_device::sar_ar5 },{1*CLK, &tms320c2x_device::sar_ar6 },{1*CLK, &tms320c2x_device::sar_ar7 }, +/*70*/ {1*CLK, &tms320c2x_device::sar_ar<0>},{1*CLK, &tms320c2x_device::sar_ar<1> },{1*CLK, &tms320c2x_device::sar_ar<2> },{1*CLK, &tms320c2x_device::sar_ar<3> },{1*CLK, &tms320c2x_device::sar_ar<4> },{1*CLK, &tms320c2x_device::sar_ar<5> },{1*CLK, &tms320c2x_device::sar_ar<6> },{1*CLK, &tms320c2x_device::sar_ar<7> }, /*78*/ {1*CLK, &tms320c2x_device::sst },{1*CLK, &tms320c2x_device::sst1 },{1*CLK, &tms320c2x_device::popd },{1*CLK, &tms320c2x_device::zalr },{1*CLK, &tms320c2x_device::spl },{1*CLK, &tms320c2x_device::sph },{1*CLK, &tms320c2x_device::adrk },{1*CLK, &tms320c2x_device::sbrk_ar }, /*80*/ {2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in }, /*88*/ {2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in },{2*CLK, &tms320c2x_device::in }, @@ -1593,7 +1579,7 @@ const tms320c2x_device::tms320c2x_opcode tms320c2x_device::s_opcode_main[256]= /*A8*/ {1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk }, /*B0*/ {1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk }, /*B8*/ {1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk },{1*CLK, &tms320c2x_device::mpyk }, -/*C0*/ {1*CLK, &tms320c2x_device::lark_ar0 },{1*CLK, &tms320c2x_device::lark_ar1 },{1*CLK, &tms320c2x_device::lark_ar2 },{1*CLK, &tms320c2x_device::lark_ar3 },{1*CLK, &tms320c2x_device::lark_ar4 },{1*CLK, &tms320c2x_device::lark_ar5 },{1*CLK, &tms320c2x_device::lark_ar6 },{1*CLK, &tms320c2x_device::lark_ar7 }, +/*C0*/ {1*CLK, &tms320c2x_device::lark_ar<0>},{1*CLK, &tms320c2x_device::lark_ar<1>},{1*CLK, &tms320c2x_device::lark_ar<2>},{1*CLK, &tms320c2x_device::lark_ar<3>},{1*CLK, &tms320c2x_device::lark_ar<4>},{1*CLK, &tms320c2x_device::lark_ar<5>},{1*CLK, &tms320c2x_device::lark_ar<6>},{1*CLK, &tms320c2x_device::lark_ar<7>}, /*C8*/ {1*CLK, &tms320c2x_device::ldpk },{1*CLK, &tms320c2x_device::ldpk },{1*CLK, &tms320c2x_device::lack },{1*CLK, &tms320c2x_device::rptk },{1*CLK, &tms320c2x_device::addk },{1*CLK, &tms320c2x_device::subk },{1*CLK, &tms320c2x_device::opcodes_CE},{1*CLK, &tms320c2x_device::mpyu }, /*D0*/ {1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{0*CLK, &tms320c2x_device::opcodes_Dx}, /*D8*/ {1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx},{1*CLK, &tms320c2x_device::opcodes_Dx}, @@ -1671,11 +1657,9 @@ void tms320c2x_device::device_start() m_timerover = 0; m_opcode.d = 0; m_external_mem_access = 0; - m_tms320c2x_irq_cycles = 0; m_oldacc.d = 0; m_memaccess = 0; - m_mHackIgnoreARP = 0; - m_waiting_for_serial_frame = 0; + m_waiting_for_serial_frame = false; save_item(NAME(m_PREVPC)); save_item(NAME(m_PC)); @@ -1811,8 +1795,8 @@ void tms320c2x_device::common_reset() m_prd = 0xffff; m_imr = 0xffc0; - m_idle = 0; - m_hold = 0; + m_idle = false; + m_hold = false; m_tms320c2x_dec_cycles = 0; m_init_load_addr = 1; } @@ -1843,70 +1827,70 @@ inline int tms320c2x_device::process_IRQs() | XINT| RINT| TINT| INT2| INT1| INT0| */ - m_tms320c2x_irq_cycles = 0; + int irq_cycles = 0; /* Dont service Interrupts if masked, or prev instruction was EINT ! */ - if ( (INTM == 0) && (m_opcode.w.l != 0xce00) && (m_IFR & m_imr) ) + if ((INTM == 0) && (m_opcode.w.l != 0xce00) && (m_IFR & m_imr)) { - m_tms320c2x_irq_cycles = (3*CLK); /* 3 clock cycles used due to PUSH and DINT operation ? */ + irq_cycles = (3*CLK); /* 3 clock cycles used due to PUSH and DINT operation ? */ PUSH_STACK(m_PC); if ((m_IFR & 0x01) && (m_imr & 0x01)) { /* IRQ line 0 */ //logerror("TMS320C2x: Active INT0\n"); standard_irq_callback(0, m_PC); m_PC = 0x0002; - m_idle = 0; + m_idle = false; m_IFR &= (~0x01); SET0(INTM_FLAG); - return m_tms320c2x_irq_cycles; + return irq_cycles; } if ((m_IFR & 0x02) && (m_imr & 0x02)) { /* IRQ line 1 */ //logerror("TMS320C2x: Active INT1\n"); standard_irq_callback(1, m_PC); m_PC = 0x0004; - m_idle = 0; + m_idle = false; m_IFR &= (~0x02); SET0(INTM_FLAG); - return m_tms320c2x_irq_cycles; + return irq_cycles; } if ((m_IFR & 0x04) && (m_imr & 0x04)) { /* IRQ line 2 */ //logerror("TMS320C2x: Active INT2\n"); standard_irq_callback(2, m_PC); m_PC = 0x0006; - m_idle = 0; + m_idle = false; m_IFR &= (~0x04); SET0(INTM_FLAG); - return m_tms320c2x_irq_cycles; + return irq_cycles; } if ((m_IFR & 0x08) && (m_imr & 0x08)) { /* Timer IRQ (internal) */ -// logerror("TMS320C2x: Active TINT (Timer)\n"); + //logerror("TMS320C2x: Active TINT (Timer)\n"); m_PC = 0x0018; - m_idle = 0; + m_idle = false; m_IFR &= (~0x08); SET0(INTM_FLAG); - return m_tms320c2x_irq_cycles; + return irq_cycles; } if ((m_IFR & 0x10) && (m_imr & 0x10)) { /* Serial port receive IRQ (internal) */ -// logerror("TMS320C2x: Active RINT (Serial receive)\n"); + //logerror("TMS320C2x: Active RINT (Serial receive)\n"); m_drr = m_dr_in(); m_PC = 0x001A; - m_idle = 0; + m_idle = false; m_IFR &= (~0x10); SET0(INTM_FLAG); - return m_tms320c2x_irq_cycles; + return irq_cycles; } if ((m_IFR & 0x20) && (m_imr & 0x20)) { /* Serial port transmit IRQ (internal) */ -// logerror("TMS320C2x: Active XINT (Serial transmit)\n"); + //logerror("TMS320C2x: Active XINT (Serial transmit)\n"); m_dx_out(m_dxr); m_PC = 0x001C; - m_idle = 0; + m_idle = false; m_IFR &= (~0x20); SET0(INTM_FLAG); - return m_tms320c2x_irq_cycles; + return irq_cycles; } } - return m_tms320c2x_irq_cycles; + return irq_cycles; } @@ -1950,26 +1934,22 @@ inline void tms320c2x_device::process_timer(int clocks) void tms320c2x_device::execute_run() { /**** Respond to external hold signal */ - if (m_hold_in() == ASSERT_LINE) { - if (m_hold == 0) { - m_hold_ack_out(ASSERT_LINE); /* Hold-Ack (active low) */ - } - m_hold = 1; - if (HM) { - m_icount = 0; /* Exit */ - } - else { - if (m_external_mem_access) { + if (!m_hold_in.isunset()) { + if (m_hold_in() == ASSERT_LINE) { + if (!m_hold) { + m_hold_ack_out(ASSERT_LINE); /* Hold-Ack (active low) */ + m_hold = true; + } + + if (HM || m_external_mem_access) { m_icount = 0; /* Exit */ } } - } - else { - if (m_hold == 1) { + else if (m_hold) { m_hold_ack_out(CLEAR_LINE); /* Hold-Ack (active low) */ process_timer(3); + m_hold = false; } - m_hold = 0; } /**** If idling, update timer and/or exit execution, but test for irqs first */ @@ -2055,7 +2035,7 @@ void tms320c2x_device::execute_run() } m_init_load_addr = 0; m_RPTC--; - } while ((int8_t)(m_RPTC) != -1); + } while (int8_t(m_RPTC) != -1); m_RPTC = 0; m_PFC = m_PC; m_init_load_addr = 1; @@ -2070,7 +2050,7 @@ void tms320c2x_device::execute_run() /**** If hold pin is active, exit if accessing external memory or if HM is set */ if (m_hold) { - if (m_external_mem_access || (HM)) { + if (m_external_mem_access || HM) { if (m_icount > 0) { m_icount = 0; } @@ -2086,10 +2066,10 @@ void tms320c2x_device::execute_run() ****************************************************************************/ void tms320c2x_device::execute_set_input(int irqline, int state) { - if ( irqline == TMS320C2X_FSX ) { + if (irqline == TMS320C2X_FSX) { if (state != CLEAR_LINE && m_waiting_for_serial_frame) { - m_waiting_for_serial_frame = 0; + m_waiting_for_serial_frame = false; m_IFR = 0x20; } } diff --git a/src/devices/cpu/tms320c2x/tms320c2x.h b/src/devices/cpu/tms320c2x/tms320c2x.h index 513b6bd7c0b..0465501564f 100644 --- a/src/devices/cpu/tms320c2x/tms320c2x.h +++ b/src/devices/cpu/tms320c2x/tms320c2x.h @@ -139,32 +139,30 @@ protected: uint16_t m_STR0, m_STR1; uint8_t m_IFR; uint8_t m_RPTC; - PAIR m_ACC; - PAIR m_Preg; + PAIR m_ACC; + PAIR m_Preg; uint16_t m_Treg; uint16_t m_AR[8]; // 5 for TMS32020, 8 for rest uint16_t m_STACK[8]; // 4 level for TMS32020, 8 level for rest - PAIR m_ALU; + PAIR m_ALU; uint16_t m_drr, m_dxr, m_tim, m_prd, m_imr, m_greg; - uint16_t m_fixed_STR1; + uint16_t m_fixed_STR1; uint8_t m_timerover; /********************** Status data ****************************/ PAIR m_opcode; - int m_idle; - int m_hold; + bool m_idle; + bool m_hold; int m_external_mem_access; /** required for hold mode. Implement it ! */ int m_init_load_addr; /* 0=No, 1=Yes, 2=Once for repeat mode */ - int m_tms320c2x_irq_cycles; int m_tms320c2x_dec_cycles; - PAIR m_oldacc; + PAIR m_oldacc; uint32_t m_memaccess; - int m_icount; - int m_mHackIgnoreARP; /* special handling for lst, lst1 instructions */ - int m_waiting_for_serial_frame; + int m_icount; + bool m_waiting_for_serial_frame; uint16_t drr_r(); void drr_w(uint16_t data); @@ -186,8 +184,8 @@ protected: void MODIFY_DP(int data); void MODIFY_PM(int data); void MODIFY_ARP(int data); - uint16_t reverse_carry_add(uint16_t arg0, uint16_t arg1 ); - void MODIFY_AR_ARP(); + uint16_t reverse_carry_add(uint16_t arg0, uint16_t arg1); + template void MODIFY_AR_ARP(); void CALCULATE_ADD_CARRY(); void CALCULATE_SUB_CARRY(); void CALCULATE_ADD_OVERFLOW(int32_t addval); @@ -195,9 +193,10 @@ protected: uint16_t POP_STACK(); void PUSH_STACK(uint16_t data); void SHIFT_Preg_TO_ALU(); - void GETDATA(int shift,int signext); + template void GETDATA(int shift, int signext); void PUTDATA(uint16_t data); void PUTDATA_SST(uint16_t data); + void opcodes_CE(); void opcodes_Dx(); void illegal(); @@ -250,22 +249,8 @@ protected: void lack(); void lact(); void lalk(); - void lar_ar0(); - void lar_ar1(); - void lar_ar2(); - void lar_ar3(); - void lar_ar4(); - void lar_ar5(); - void lar_ar6(); - void lar_ar7(); - void lark_ar0(); - void lark_ar1(); - void lark_ar2(); - void lark_ar3(); - void lark_ar4(); - void lark_ar5(); - void lark_ar6(); - void lark_ar7(); + template void lar_ar(); + template void lark_ar(); void ldp(); void ldpk(); void lph(); @@ -310,14 +295,7 @@ protected: void rxf(); void sach(); void sacl(); - void sar_ar0(); - void sar_ar1(); - void sar_ar2(); - void sar_ar3(); - void sar_ar4(); - void sar_ar5(); - void sar_ar6(); - void sar_ar7(); + template void sar_ar(); void sblk(); void sbrk_ar(); void sc(); @@ -353,6 +331,7 @@ protected: void zalh(); void zalr(); void zals(); + int process_IRQs(); void process_timer(int clocks); }; diff --git a/src/mame/namco/namcos21_dsp.cpp b/src/mame/namco/namcos21_dsp.cpp index 4119934ffaa..b7fecc3a16e 100644 --- a/src/mame/namco/namcos21_dsp.cpp +++ b/src/mame/namco/namcos21_dsp.cpp @@ -264,8 +264,6 @@ void namcos21_dsp_device::device_add_mconfig(machine_config &config) dsp.set_addrmap(AS_DATA, &namcos21_dsp_device::winrun_dsp_data); dsp.set_addrmap(AS_IO, &namcos21_dsp_device::winrun_dsp_io); dsp.bio_in_cb().set(FUNC(namcos21_dsp_device::winrun_poly_reset_r)); - dsp.hold_in_cb().set_constant(0); - dsp.hold_ack_out_cb().set_nop(); dsp.xf_out_cb().set_nop(); } diff --git a/src/mame/namco/namcos21_dsp_c67.cpp b/src/mame/namco/namcos21_dsp_c67.cpp index 6e4b5567f62..62a4f82035d 100644 --- a/src/mame/namco/namcos21_dsp_c67.cpp +++ b/src/mame/namco/namcos21_dsp_c67.cpp @@ -129,8 +129,6 @@ void namcos21_dsp_c67_device::device_add_mconfig(machine_config &config) dspmaster.set_addrmap(AS_PROGRAM, &namcos21_dsp_c67_device::master_dsp_program); dspmaster.set_addrmap(AS_DATA, &namcos21_dsp_c67_device::master_dsp_data); dspmaster.set_addrmap(AS_IO, &namcos21_dsp_c67_device::master_dsp_io); - dspmaster.hold_in_cb().set_constant(0); - dspmaster.hold_ack_out_cb().set_nop(); dspmaster.xf_out_cb().set(FUNC(namcos21_dsp_c67_device::dsp_xf_w)); for (int i = 0; i < 4; i++) From 172635dec6365048134c598019d44cd60a547775 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 28 Feb 2026 19:56:51 +0100 Subject: [PATCH 078/351] lastduel: correct spriteram range [Jim Westfall] --- src/mame/capcom/lastduel.cpp | 9 +++++---- src/mame/sanritsu/sprcros2.cpp | 2 +- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/src/mame/capcom/lastduel.cpp b/src/mame/capcom/lastduel.cpp index fdfde7eae2e..d7f15fd5317 100644 --- a/src/mame/capcom/lastduel.cpp +++ b/src/mame/capcom/lastduel.cpp @@ -349,7 +349,7 @@ void lastduel_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec { uint16_t const *const spriteram = m_spriteram->buffer(); - for (int offs = 0x400 - 4; offs >= 0; offs -= 4) + for (int offs = m_spriteram->length() - 4; offs >= 0; offs -= 4) { int const attr = spriteram[offs + 1]; if (pri_mask) // only madgear seems to have this @@ -503,8 +503,8 @@ void lastduel_state::madgear_interrupt(int state) void lastduel_state::lastduel_map(address_map &map) { map(0x000000, 0x05ffff).rom(); - map(0xfc0000, 0xfc0003).nopw(); // written rarely - map(0xfc0800, 0xfc0fff).ram().share("spriteram"); + map(0xfc0000, 0xfc07ff).mirror(0x003000).ram(); // unused + map(0xfc0800, 0xfc0fff).mirror(0x003000).ram().share("spriteram"); map(0xfc4000, 0xfc4001).portr("P1_P2"); map(0xfc4001, 0xfc4001).w(FUNC(lastduel_state::flip_w)); map(0xfc4002, 0xfc4003).portr("SYSTEM"); @@ -522,7 +522,8 @@ void lastduel_state::lastduel_map(address_map &map) void lastduel_state::madgear_map(address_map &map) { map(0x000000, 0x07ffff).rom(); - map(0xfc1800, 0xfc1fff).ram().share("spriteram"); + map(0xfc0000, 0xfc07ff).mirror(0x003000).ram(); // unused + map(0xfc0800, 0xfc0fff).mirror(0x003000).ram().share("spriteram"); map(0xfc4000, 0xfc4001).portr("DSW1"); map(0xfc4001, 0xfc4001).w(FUNC(lastduel_state::flip_w)); map(0xfc4002, 0xfc4003).portr("DSW2"); diff --git a/src/mame/sanritsu/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp index d7cb3bd5af6..db7f4cc83c7 100644 --- a/src/mame/sanritsu/sprcros2.cpp +++ b/src/mame/sanritsu/sprcros2.cpp @@ -2,7 +2,7 @@ // copyright-holders:Angelo Salese /* -Super Cross II (c) 1986 GM Shoji +Super Cross II (スーパークロスⅡ) (c) 1986 GM Shoji driver by Angelo Salese, based on "wiped off due to not anymore licenseable" driver by insideoutboy. From 06006dcddebe5c599eda7e714a84c444bae4ad1f Mon Sep 17 00:00:00 2001 From: "Sergio G." Date: Sat, 28 Feb 2026 20:12:28 +0100 Subject: [PATCH 079/351] jalmah.cpp: added the actual references for some of the MCUs in filenames (#15037) --- src/mame/jaleco/jalmah.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mame/jaleco/jalmah.cpp b/src/mame/jaleco/jalmah.cpp index 0235d4c022b..0650adf72b4 100644 --- a/src/mame/jaleco/jalmah.cpp +++ b/src/mame/jaleco/jalmah.cpp @@ -1245,7 +1245,7 @@ ROM_START( daireika ) ROM_RELOAD( 0x40000, 0x20000 ) ROM_REGION( 0x2000, "mcu", 0 ) /* M50747 MCU Code */ - ROM_LOAD( "m50747-a46sp.bin", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "mo-88015_m50747-a46sp.2c", 0x0000, 0x2000, NO_DUMP ) LOAD_FAKE_MCU_ROM @@ -1291,7 +1291,7 @@ ROM_START( mjzoomin ) ROM_RELOAD( 0x40000, 0x20000 ) ROM_REGION( 0x2000, "mcu", 0 ) /* M50747 MCU Code */ - ROM_LOAD( "m50747", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "rf16_m50747esp.2c", 0x0000, 0x2000, NO_DUMP ) LOAD_FAKE_MCU_ROM @@ -1335,7 +1335,7 @@ ROM_START( kakumei ) ROM_RELOAD( 0x40000, 0x20000 ) ROM_REGION( 0x2000, "mcu", 0 ) /* M50747 MCU Code */ - ROM_LOAD( "m50747-b84sp.bin", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "m50747-b84sp.2c", 0x0000, 0x2000, NO_DUMP ) ROM_REGION( 0x140000, "oki", ROMREGION_ERASEFF ) /* Samples */ ROM_LOAD( "rom3.bin", 0x00000, 0x40000, CRC(c9b7a526) SHA1(edec57e66d4ff601c8fdef7b1405af84a3f3d883) ) @@ -1374,7 +1374,7 @@ ROM_START( kakumei2 ) ROM_LOAD16_BYTE( "mj-8956.2", 0x00000, 0x40000, CRC(0f942507) SHA1(7ec2fbeb9a34dfc80c4df3de8397388db13f5c7c) ) ROM_REGION( 0x2000, "mcu", 0 ) /* M50747 MCU Code */ - ROM_LOAD( "m50747", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "mo-92000_m50747.2c", 0x0000, 0x2000, NO_DUMP ) ROM_REGION( 0x140000, "oki", ROMREGION_ERASEFF ) /* Samples */ ROM_LOAD( "92000-01.3", 0x040000, 0x80000, CRC(4b0ed440) SHA1(11961d217a41f92b60d5083a5e346c245f7db620) ) @@ -1449,7 +1449,7 @@ ROM_START( suchiesp ) ROM_LOAD16_BYTE( "2.bin", 0x00000, 0x40000, CRC(42ecf88a) SHA1(7bb85470bc9f94c867646afeb91c4730599ea299) ) ROM_REGION( 0x2000, "mcu", 0 ) /* M50747 MCU Code */ - ROM_LOAD( "m50747", 0x0000, 0x2000, NO_DUMP ) + ROM_LOAD( "mo-92000_m50747.2c", 0x0000, 0x2000, NO_DUMP ) /* Same label on kamukei2 MCU but not sure if same internal ROM */ ROM_REGION( 0x100000, "oki_data", ROMREGION_ERASEFF ) /* Samples */ ROM_LOAD( "3.bin", 0x00000, 0x80000, CRC(691b5387) SHA1(b8bc9f904eab7653566042b18d89276d537ba586) ) From bdd5fb804d5002c80e8a9a325772a60f82709c80 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 28 Feb 2026 14:30:33 -0500 Subject: [PATCH 080/351] sdl3: Set hint to disable the accents popup on macOS when holding down keys. [R. Belmont] --- src/osd/sdl3/sdlmain.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/osd/sdl3/sdlmain.cpp b/src/osd/sdl3/sdlmain.cpp index 99f319a946a..445a156fdde 100644 --- a/src/osd/sdl3/sdlmain.cpp +++ b/src/osd/sdl3/sdlmain.cpp @@ -80,10 +80,15 @@ int main(int argc, char** argv) diagnostics_module::get_instance()->init_crash_diagnostics(); #if defined(SDLMAME_ANDROID) - /* Enable standard application logging */ + // Enable standard application logging SDL_SetLogPriority(SDL_LOG_CATEGORY_APPLICATION, SDL_LOG_PRIORITY_VERBOSE); #endif +#if defined(SDLMAME_MACOSX) + // disable the popup accents menu on macOS + SDL_SetHint(SDL_HINT_MAC_PRESS_AND_HOLD, 0); +#endif + // FIXME: this should be done differently #ifdef SDLMAME_UNIX From 8e7c20a498e2809b384d09857dbf54098926896a Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 1 Mar 2026 00:55:02 +0100 Subject: [PATCH 081/351] galivan,dangar: remove button 3, ninjemak: button 3 is on 0x40 according to testmode (although no button 3 on cpanel) --- src/mame/nichibutsu/galivan.cpp | 62 +++++++++++++++++++-------------- 1 file changed, 35 insertions(+), 27 deletions(-) diff --git a/src/mame/nichibutsu/galivan.cpp b/src/mame/nichibutsu/galivan.cpp index dc68af59c29..554b39bfb11 100644 --- a/src/mame/nichibutsu/galivan.cpp +++ b/src/mame/nichibutsu/galivan.cpp @@ -639,7 +639,7 @@ void galivan_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect flipy = !flipy; } -// int const code = buffered_spriteram[offs + 1] + ((attr & 0x02) << 7); + //int const code = buffered_spriteram[offs + 1] + ((attr & 0x02) << 7); int const code = buffered_spriteram[offs + 1] + ((attr & 0x06) << 7); // for ninjemak, not sure ? gfx->transpen(bitmap, cliprect, @@ -833,12 +833,9 @@ void youmab_state::_84_w(uint8_t data) void youmab_state::_86_w(uint8_t data) { // latch values - { - m_scrolly = (m_shift_val & 0x0003ff); - m_scrollx = (m_shift_val & 0x7ffc00) >> 10; - - //popmessage("%08x %08x %08x", m_scrollx, m_scrolly, m_shift_val); - } + m_scrolly = (m_shift_val & 0x0003ff); + m_scrollx = (m_shift_val & 0x7ffc00) >> 10; + //popmessage("%08x %08x %08x", m_scrollx, m_scrolly, m_shift_val); m_shift_val = 0; m_shift_scroll = 0; @@ -872,27 +869,32 @@ void galivan_state::sound_io_map(address_map &map) } -/*************** - Dip Switches - ***************/ +/*************************************************************************** -#define NIHON_JOYSTICK(_n_) \ - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(_n_) \ - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(_n_) \ - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(_n_) \ - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(_n_) \ - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(_n_) \ - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(_n_) \ - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) \ - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(_n_) + Input ports +***************************************************************************/ static INPUT_PORTS_START( galivan ) PORT_START("P1") - NIHON_JOYSTICK(1) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("P2") - NIHON_JOYSTICK(2) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("SYSTEM") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) @@ -1020,6 +1022,12 @@ INPUT_PORTS_END static INPUT_PORTS_START( ninjemak ) PORT_INCLUDE( galivan ) + PORT_MODIFY("P1") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) + + PORT_MODIFY("P2") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) + PORT_MODIFY("DSW1") PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6") PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) @@ -1906,9 +1914,9 @@ GAME( 1986, dangarj, dangar, dangarj, dangar2, dangarj_state, empty_init, GAME( 1986, dangarb, dangar, galivan, dangar2, galivan_state, empty_init, ROT270, "bootleg", "Ufo Robo Dangar (9/26/1986, bootleg set 1)", MACHINE_SUPPORTS_SAVE ) // checks protection like dangarj but check readback is patched at 0x9d58 (also checks I/O port 0xc0?) GAME( 1986, dangarbt, dangar, galivan, dangarb, galivan_state, empty_init, ROT270, "bootleg", "Ufo Robo Dangar (9/26/1986, bootleg set 2)", MACHINE_SUPPORTS_SAVE ) // directly patched at entry point 0x9d44 -GAME( 1986, ninjemak, 0, ninjemak, ninjemak, ninjemak_state, empty_init, ROT270, "Nichibutsu", "Ninja Emaki (US)", MACHINE_SUPPORTS_SAVE|MACHINE_UNEMULATED_PROTECTION ) -GAME( 1986, ninjemat, ninjemak, galivan, galivan, ninjemak_state, empty_init, ROT270, "Nichibutsu (Tecfri license)", "Ninja Emaki (Tecfri license)", MACHINE_NOT_WORKING|MACHINE_SUPPORTS_SAVE|MACHINE_UNEMULATED_PROTECTION ) -GAME( 1986, youma, ninjemak, ninjemak, ninjemak, ninjemak_state, empty_init, ROT270, "Nichibutsu", "Youma Ninpou Chou (Japan)", MACHINE_SUPPORTS_SAVE|MACHINE_UNEMULATED_PROTECTION ) -GAME( 1986, youma2, ninjemak, ninjemak, ninjemak, ninjemak_state, empty_init, ROT270, "Nichibutsu", "Youma Ninpou Chou (Japan, alt)", MACHINE_SUPPORTS_SAVE|MACHINE_UNEMULATED_PROTECTION ) -GAME( 1986, youmab, ninjemak, youmab, ninjemak, youmab_state, empty_init, ROT270, "bootleg", "Youma Ninpou Chou (Game Electronics bootleg, set 1)", MACHINE_NOT_WORKING|MACHINE_SUPPORTS_SAVE|MACHINE_UNEMULATED_PROTECTION ) // player is invincible -GAME( 1986, youmab2, ninjemak, youmab, ninjemak, youmab_state, empty_init, ROT270, "bootleg", "Youma Ninpou Chou (Game Electronics bootleg, set 2)", MACHINE_NOT_WORKING|MACHINE_SUPPORTS_SAVE|MACHINE_UNEMULATED_PROTECTION ) // "" +GAME( 1986, ninjemak, 0, ninjemak, ninjemak, ninjemak_state, empty_init, ROT270, "Nichibutsu", "Ninja Emaki (US)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1986, ninjemat, ninjemak, galivan, galivan, ninjemak_state, empty_init, ROT270, "Nichibutsu (Tecfri license)", "Ninja Emaki (Tecfri license)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1986, youma, ninjemak, ninjemak, ninjemak, ninjemak_state, empty_init, ROT270, "Nichibutsu", "Youma Ninpou Chou (Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1986, youma2, ninjemak, ninjemak, ninjemak, ninjemak_state, empty_init, ROT270, "Nichibutsu", "Youma Ninpou Chou (Japan, alt)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1986, youmab, ninjemak, youmab, ninjemak, youmab_state, empty_init, ROT270, "bootleg", "Youma Ninpou Chou (Game Electronics bootleg, set 1)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) // player is invincible +GAME( 1986, youmab2, ninjemak, youmab, ninjemak, youmab_state, empty_init, ROT270, "bootleg", "Youma Ninpou Chou (Game Electronics bootleg, set 2)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION ) // "" From b4e76ee73dbee436a09866ae437ef520c9de3d2b Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 1 Mar 2026 00:55:18 +0100 Subject: [PATCH 082/351] sanritsu*: small cleanup --- src/mame/sanritsu/appoooh.cpp | 13 +++++---- src/mame/sanritsu/chinsan.cpp | 36 ++++++++++++++----------- src/mame/sanritsu/jantotsu.cpp | 25 +++++++++-------- src/mame/sanritsu/jongkyo.cpp | 21 ++++++++------- src/mame/sanritsu/koikoi.cpp | 1 - src/mame/sanritsu/mermaid.h | 10 +++---- src/mame/sanritsu/mermaid_v.cpp | 1 - src/mame/sanritsu/mrjong.cpp | 4 +-- src/mame/sanritsu/ron.cpp | 48 +++++++++++++++------------------ src/mame/sanritsu/sprcros2.cpp | 5 ++-- 10 files changed, 79 insertions(+), 85 deletions(-) diff --git a/src/mame/sanritsu/appoooh.cpp b/src/mame/sanritsu/appoooh.cpp index 371769f750e..2466a865391 100644 --- a/src/mame/sanritsu/appoooh.cpp +++ b/src/mame/sanritsu/appoooh.cpp @@ -443,7 +443,7 @@ void base_state::draw_sprites(bitmap_ind16 &dest_bmp, const rectangle &cliprect, int sx = sprite[offs + 3]; int flipx = sprite[offs + 1] & 0x01; - if(sx >= 248) + if (sx >= 248) sx -= 256; if (flipy) @@ -454,10 +454,9 @@ void base_state::draw_sprites(bitmap_ind16 &dest_bmp, const rectangle &cliprect, } gfx->transpen(dest_bmp, cliprect, - code, - color, - flipx, flipy, - sx, sy, 0); + code, color, + flipx, flipy, + sx, sy, 0); } } @@ -581,7 +580,7 @@ static INPUT_PORTS_START( appoooh ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_START("P2") @@ -597,7 +596,7 @@ static INPUT_PORTS_START( appoooh ) PORT_START("BUTTON3") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_COCKTAIL - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // probably unused PORT_START("DSW1") diff --git a/src/mame/sanritsu/chinsan.cpp b/src/mame/sanritsu/chinsan.cpp index 99cc83d3e4b..7c4a5b438f3 100644 --- a/src/mame/sanritsu/chinsan.cpp +++ b/src/mame/sanritsu/chinsan.cpp @@ -58,26 +58,11 @@ public: m_adpcm_pos(0), m_adpcm_idle(1), m_adpcm_data(0), m_trigger(0) { } - void input_select_w(uint8_t data); - uint8_t input_p2_r(); - uint8_t input_p1_r(); - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - TILE_GET_INFO_MEMBER(tile_info); - - void adpcm_w(uint8_t data); - void adpcm_int_w(int state); - - INTERRUPT_GEN_MEMBER(vblank_int); - void ctrl_w(uint8_t data); void init_chinsan(); void chinsan(machine_config &config); void mayumi(machine_config &config); - void chinsan_io_map(address_map &map) ATTR_COLD; - void chinsan_map(address_map &map) ATTR_COLD; - void decrypted_opcodes_map(address_map &map) ATTR_COLD; - void mayumi_io_map(address_map &map) ATTR_COLD; + protected: virtual void machine_start() override ATTR_COLD; virtual void machine_reset() override ATTR_COLD; @@ -104,6 +89,24 @@ private: uint8_t m_adpcm_idle; uint8_t m_adpcm_data; uint8_t m_trigger; + + void input_select_w(uint8_t data); + uint8_t input_p2_r(); + uint8_t input_p1_r(); + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + TILE_GET_INFO_MEMBER(tile_info); + + void adpcm_w(uint8_t data); + void adpcm_int_w(int state); + + INTERRUPT_GEN_MEMBER(vblank_int); + void ctrl_w(uint8_t data); + + void chinsan_io_map(address_map &map) ATTR_COLD; + void chinsan_map(address_map &map) ATTR_COLD; + void decrypted_opcodes_map(address_map &map) ATTR_COLD; + void mayumi_io_map(address_map &map) ATTR_COLD; }; @@ -558,6 +561,7 @@ void chinsan_state::chinsan(machine_config &config) void chinsan_state::mayumi(machine_config &config) { chinsan(config); + // standard Z80 instead of MC-8123 Z80(config.replace(), m_maincpu, XTAL(10'000'000)/2); m_maincpu->set_addrmap(AS_PROGRAM, &chinsan_state::chinsan_map); diff --git a/src/mame/sanritsu/jantotsu.cpp b/src/mame/sanritsu/jantotsu.cpp index 992cf602a1b..8ab4892d47b 100644 --- a/src/mame/sanritsu/jantotsu.cpp +++ b/src/mame/sanritsu/jantotsu.cpp @@ -139,17 +139,16 @@ private: required_ioport m_coins, m_dsw2; // sound-related - uint32_t m_adpcm_pos; - uint8_t m_adpcm_idle; - uint8_t m_adpcm_data; - uint8_t m_adpcm_trigger; + uint32_t m_adpcm_pos = 0; + uint8_t m_adpcm_idle = 0; + uint8_t m_adpcm_data = 0; + uint8_t m_adpcm_trigger = 0; // misc - uint8_t m_mux_data; + uint8_t m_mux_data = 0; + uint8_t m_col_bank = 0; + uint8_t m_display_on = 0; - // video-related - uint8_t m_col_bank; - uint8_t m_display_on; void bankaddr_w(uint8_t data); uint8_t mux_r(); void mux_w(uint8_t data); @@ -246,7 +245,7 @@ void jantotsu_state::palette(palette_device &palette) const // Multiplexer is mapped as 6-bits reads, bits 6 & 7 are always connected to the coin mechs. uint8_t jantotsu_state::mux_r() { - // printf("%02x\n", m_mux_data); + //printf("%02x\n", m_mux_data); uint8_t res = m_coins->read(); for (uint8_t i = 0; i < 8; i++) @@ -284,13 +283,13 @@ void jantotsu_state::adpcm_w(offs_t offset, uint8_t data) (i.e. I'll probably never do a "nagare" in my entire life ;-) ) */ if (data & 0x20) popmessage("ADPCM called with data = %02x, contact MAMEdev", data); -// printf("%02x 0\n", data); + //printf("%02x 0\n", data); break; //same write as port 2? MSM sample ack? case 1: -// m_adpcm_idle = 1; -// m_adpcm->reset_w(1); -// printf("%02x 1\n", data); + //m_adpcm_idle = 1; + //m_adpcm->reset_w(1); + //printf("%02x 1\n", data); break; } } diff --git a/src/mame/sanritsu/jongkyo.cpp b/src/mame/sanritsu/jongkyo.cpp index 9623a4c034b..9aebbd3c155 100644 --- a/src/mame/sanritsu/jongkyo.cpp +++ b/src/mame/sanritsu/jongkyo.cpp @@ -68,9 +68,9 @@ protected: private: // misc - uint8_t m_rom_bank; - uint8_t m_key_rows; - uint8_t m_flip_screen; + uint8_t m_rom_bank = 0; + uint8_t m_key_rows = 0; + uint8_t m_flip_screen = 0; // memory pointers required_device m_maincpu; @@ -83,8 +83,10 @@ private: required_ioport m_coin_port; required_ioport_array<6> m_pl1_inputs; required_ioport_array<6> m_pl2_inputs; - uint8_t m_videoram2[0x4000]; + + uint8_t m_videoram2[0x4000]{}; std::unique_ptr m_opcodes; + void bank_select_w(offs_t offset, uint8_t data); void mux_w(uint8_t data); void coin_counter_w(uint8_t data); @@ -115,13 +117,12 @@ uint32_t jongkyo_state::screen_update(screen_device &screen, bitmap_ind16 &bitma { uint8_t data3; - // data3 = m_videoram2[x/4 + y*64]; // wrong + //data3 = m_videoram2[x/4 + y*64]; // wrong - // good mahjong tiles + // good mahjong tiles data3 = 0x0f; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow? - // good girl tiles - // data3 = 0x00; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow? - + // good girl tiles + //data3 = 0x00; // we're missing 2 bits.. there must be another piece of video ram somewhere or we can't use all the colours (6bpp).. banked somehow? uint8_t data1 = m_videoram[0x4000 + x / 4 + y * 64]; uint8_t data2 = m_videoram[x / 4 + y * 64]; @@ -512,7 +513,6 @@ void jongkyo_state::jongkyo(machine_config &config) maincpu.set_numbanks(8); maincpu.set_banksize(0x400); - // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); @@ -524,6 +524,7 @@ void jongkyo_state::jongkyo(machine_config &config) PALETTE(config, "palette", FUNC(jongkyo_state::palette), 0x100); + // sound hardware SPEAKER(config, "mono").front_center(); ay8910_device &aysnd(AY8910(config, "aysnd", 18.432_MHz_XTAL / 8)); aysnd.port_a_read_callback().set(FUNC(jongkyo_state::input_1p_r)); diff --git a/src/mame/sanritsu/koikoi.cpp b/src/mame/sanritsu/koikoi.cpp index b55207cd086..cbb3e6580d0 100644 --- a/src/mame/sanritsu/koikoi.cpp +++ b/src/mame/sanritsu/koikoi.cpp @@ -355,7 +355,6 @@ void koikoi_state::koikoi(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &koikoi_state::program_map); m_maincpu->set_addrmap(AS_IO, &koikoi_state::io_map); - // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); diff --git a/src/mame/sanritsu/mermaid.h b/src/mame/sanritsu/mermaid.h index 5b1b755c283..50316964e9f 100644 --- a/src/mame/sanritsu/mermaid.h +++ b/src/mame/sanritsu/mermaid.h @@ -71,11 +71,11 @@ private: int m_rougien_gfxbank2 = 0; /* sound-related */ - uint8_t m_adpcm_idle = 0; - int m_adpcm_data = 0; - uint8_t m_adpcm_trigger = 0; - uint8_t m_adpcm_rom_sel = 0; - bool m_ay8910_enable[2]; + uint8_t m_adpcm_idle = 0; + int m_adpcm_data = 0; + uint8_t m_adpcm_trigger = 0; + uint8_t m_adpcm_rom_sel = 0; + bool m_ay8910_enable[2] = { }; /* devices */ required_device m_maincpu; diff --git a/src/mame/sanritsu/mermaid_v.cpp b/src/mame/sanritsu/mermaid_v.cpp index 871d1a2b464..2d40202ac1d 100644 --- a/src/mame/sanritsu/mermaid_v.cpp +++ b/src/mame/sanritsu/mermaid_v.cpp @@ -210,7 +210,6 @@ void mermaid_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprec sy = 240 - sy; } - m_gfxdecode->gfx(1)->transpen(bitmap, clip, code, color, flipx, flipy, sx, sy, 0); } } diff --git a/src/mame/sanritsu/mrjong.cpp b/src/mame/sanritsu/mrjong.cpp index 5e9e69808d7..0546e1d0781 100644 --- a/src/mame/sanritsu/mrjong.cpp +++ b/src/mame/sanritsu/mrjong.cpp @@ -261,7 +261,7 @@ void mrjong_state::io_map(address_map &map) map(0x00, 0x00).portr("P2").w(FUNC(mrjong_state::flipscreen_w)); map(0x01, 0x01).portr("P1").w("sn1", FUNC(sn76489a_device::write)); map(0x02, 0x02).portr("DSW").w("sn2", FUNC(sn76489a_device::write)); - map(0x03, 0x03).r(FUNC(mrjong_state::io_0x03_r)); // Unknown + map(0x03, 0x03).r(FUNC(mrjong_state::io_0x03_r)); // Unknown } /************************************* @@ -279,7 +279,7 @@ static INPUT_PORTS_START( mrjong ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_START1 ) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ???? + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ???? PORT_START("P1") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1) diff --git a/src/mame/sanritsu/ron.cpp b/src/mame/sanritsu/ron.cpp index 5bb520ba65c..8e5076143e2 100644 --- a/src/mame/sanritsu/ron.cpp +++ b/src/mame/sanritsu/ron.cpp @@ -18,13 +18,14 @@ Debug cheats: #include "emu.h" + #include "cpu/z80/z80.h" #include "cpu/mcs48/mcs48.h" #include "sound/ay8910.h" + #include "emupal.h" #include "screen.h" #include "speaker.h" -#include "debugger.h" namespace { @@ -56,8 +57,13 @@ public: void ron(machine_config &config); +protected: + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + + virtual void video_start() override ATTR_COLD; + private: - // screen updates uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void ron_palette(palette_device &palette) const; void vblank_irq(int state); @@ -72,18 +78,13 @@ private: void audio_p2_w(uint8_t data); int audio_t1_r(); void ay_pa_w(uint8_t data); + uint8_t read_mux(bool which, bool side); void ron_audio_io(address_map &map) ATTR_COLD; void ron_audio_map(address_map &map) ATTR_COLD; void ron_io(address_map &map) ATTR_COLD; void ron_map(address_map &map) ATTR_COLD; - // driver_device overrides - virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; - - virtual void video_start() override ATTR_COLD; - // devices required_device m_maincpu; required_device m_audiocpu; @@ -98,12 +99,11 @@ private: required_ioport m_in2; required_ioport m_in3; - bool m_nmi_enable; - uint8_t m_mux_data; - uint8_t read_mux(bool which,bool side); - uint8_t m_prev_p2; - uint8_t m_sound_command; - bool m_ay_address_sel; + bool m_nmi_enable = false; + uint8_t m_mux_data = 0; + uint8_t m_prev_p2 = 0; + uint8_t m_sound_command = 0; + bool m_ay_address_sel = false; }; void ron_state::video_start() @@ -113,17 +113,14 @@ void ron_state::video_start() uint32_t ron_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect ) { gfx_element *gfx = m_gfxdecode->gfx(0); - int y,x; int count = 0; - for (y=0;y<32;y++) + for (int y = 0; y < 32; y++) { - for (x=0;x<32;x++) + for (int x = 0; x < 32; x++) { uint16_t tile = m_cram[count]; - - gfx->opaque(bitmap,cliprect,tile,0,0,0,x*8,y*8); - + gfx->opaque(bitmap, cliprect, tile, 0, 0, 0, x*8, y*8); count++; } } @@ -131,14 +128,12 @@ uint32_t ron_state::screen_update( screen_device &screen, bitmap_ind16 &bitmap, gfx = m_gfxdecode->gfx(1); count = 0; - for (y=0;y<32;y++) + for (int y = 0; y < 32; y++) { - for (x=0;x<32;x++) + for (int x = 0; x < 32; x++) { uint16_t tile = m_vram[count]; - - gfx->transpen(bitmap,cliprect,tile,0,0,0,x*8,y*8,0); - + gfx->transpen(bitmap, cliprect, tile, 0, 0, 0, x*8, y*8, 0); count++; } } @@ -230,7 +225,6 @@ void ron_state::ron_audio_map(address_map &map) void ron_state::ron_audio_io(address_map &map) { - } static INPUT_PORTS_START( ron ) @@ -465,7 +459,7 @@ void ron_state::audio_p2_w(uint8_t data) m_prev_p2 = data; //printf("p2 %02x\n",data); -// machine().debug_break(); + //machine().debug_break(); } int ron_state::audio_t1_r() diff --git a/src/mame/sanritsu/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp index db7f4cc83c7..0d8b2d72119 100644 --- a/src/mame/sanritsu/sprcros2.cpp +++ b/src/mame/sanritsu/sprcros2.cpp @@ -100,7 +100,6 @@ public: void sprcros2(machine_config &config); protected: - // driver_device overrides virtual void machine_start() override ATTR_COLD; virtual void machine_reset() override ATTR_COLD; @@ -483,7 +482,7 @@ static INPUT_PORTS_START( sprcros2 ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN1 ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("P2") @@ -499,7 +498,7 @@ static INPUT_PORTS_START( sprcros2 ) PORT_START("EXTRA") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_COCKTAIL From 1882dd3fd9456effb8332cfc1c9b2230c24b13b3 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 1 Mar 2026 01:36:36 +0100 Subject: [PATCH 083/351] galivan: re-add 3rd button anyway, tweak screen raw params (it *is* measured, see pcb notes) --- src/mame/nichibutsu/galivan.cpp | 35 +++++++++++++++++---------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/src/mame/nichibutsu/galivan.cpp b/src/mame/nichibutsu/galivan.cpp index 554b39bfb11..a4dfb474610 100644 --- a/src/mame/nichibutsu/galivan.cpp +++ b/src/mame/nichibutsu/galivan.cpp @@ -207,7 +207,6 @@ protected: void io_map(address_map &map) ATTR_COLD; void common(machine_config &config); - void video_config(machine_config &config); private: uint8_t m_scrollx[2]{}, m_scrolly[2]{}; @@ -884,7 +883,7 @@ static INPUT_PORTS_START( galivan ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) // hold to move while hanging PORT_START("P2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) @@ -894,7 +893,7 @@ static INPUT_PORTS_START( galivan ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) // hold to move while hanging PORT_START("SYSTEM") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) @@ -963,6 +962,12 @@ INPUT_PORTS_END static INPUT_PORTS_START( dangar ) PORT_INCLUDE( galivan ) + PORT_MODIFY("P1") + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_MODIFY("P2") + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_MODIFY("SYSTEM") PORT_SERVICE( 0x20, IP_ACTIVE_LOW ) @@ -1023,10 +1028,12 @@ static INPUT_PORTS_START( ninjemak ) PORT_INCLUDE( galivan ) PORT_MODIFY("P1") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) // only in test mode + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_MODIFY("P2") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) // only in test mode + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_MODIFY("DSW1") PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6") @@ -1156,17 +1163,6 @@ void ninjemak_state::machine_reset() m_dispdisable = 0; } -void galivan_state::video_config(machine_config &config) -{ - BUFFERED_SPRITERAM8(config, m_spriteram); - - SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - // TODO: not measured, ~60 Hz - m_screen->set_raw(XTAL(12'000'000) / 2, 382, 0, 32 * 8, 262, 2 * 8, 30 * 8); - m_screen->screen_vblank().set(m_spriteram, FUNC(buffered_spriteram8_device::vblank_copy_rising)); - m_screen->set_palette(m_palette); -} - void galivan_state::common(machine_config &config) { // basic machine hardware @@ -1179,7 +1175,12 @@ void galivan_state::common(machine_config &config) audiocpu.set_periodic_int(FUNC(galivan_state::irq0_line_hold), attotime::from_hz(XTAL(8'000'000) / 2 / 512)); // ? // video hardware - video_config(config); + BUFFERED_SPRITERAM8(config, m_spriteram); + + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(XTAL(12'000'000) / 2, 384, 0, 32 * 8, 263, 2 * 8, 30 * 8); + m_screen->screen_vblank().set(m_spriteram, FUNC(buffered_spriteram8_device::vblank_copy_rising)); + m_screen->set_palette(m_palette); // sound hardware SPEAKER(config, "speaker").front_center(); From ac492c02708b92ce76400214204a4fa9713d0a1a Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 1 Mar 2026 23:21:31 +0100 Subject: [PATCH 084/351] tmnt2: remove unneeded variable, add VIDEO_ALWAYS_UPDATE flag to glfgreat --- src/mame/konami/moo.cpp | 35 ++++++++------- src/mame/konami/tmnt2.cpp | 92 +++++++++++++++++---------------------- 2 files changed, 57 insertions(+), 70 deletions(-) diff --git a/src/mame/konami/moo.cpp b/src/mame/konami/moo.cpp index 2fde53827f1..e88068cede8 100644 --- a/src/mame/konami/moo.cpp +++ b/src/mame/konami/moo.cpp @@ -278,9 +278,9 @@ K053246_CB_MEMBER(moo_base_state::sprite_callback) else if (pri <= m_layerpri[1]) priority_mask = 0xf0; else if (pri <= m_layerpri[0]) - priority_mask = 0xf0|0xcc; + priority_mask = 0xf0 | 0xcc; else - priority_mask = 0xf0|0xcc|0xaa; + priority_mask = 0xf0 | 0xcc | 0xaa; color = m_sprite_colorbase | (color & 0x001f); } @@ -323,15 +323,12 @@ VIDEO_START_MEMBER(moo_prot_state,bucky) uint32_t moo_base_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { static const int K053251_CI[4] = { k053251_device::CI1, k053251_device::CI2, k053251_device::CI3, k053251_device::CI4 }; - int layers[3]; - int plane, dirty; - m_sprite_colorbase = m_k053251->get_palette_index(k053251_device::CI0); m_layer_colorbase[0] = 0x70; if (m_k056832->get_layer_association()) { - for (plane = 1; plane < 4; plane++) + for (int plane = 1; plane < 4; plane++) { const int new_colorbase = m_k053251->get_palette_index(K053251_CI[plane]); if (m_layer_colorbase[plane] != new_colorbase) @@ -343,27 +340,29 @@ uint32_t moo_base_state::screen_update(screen_device &screen, bitmap_rgb32 &bitm } else { - for (dirty = 0, plane = 1; plane < 4; plane++) + bool dirty = false; + for (int plane = 1; plane < 4; plane++) { const int new_colorbase = m_k053251->get_palette_index(K053251_CI[plane]); if (m_layer_colorbase[plane] != new_colorbase) { m_layer_colorbase[plane] = new_colorbase; - dirty = 1; + dirty = true; } } if (dirty) m_k056832->mark_all_tilemaps_dirty(); } - layers[0] = 1; - m_layerpri[0] = m_k053251->get_priority(k053251_device::CI2); - layers[1] = 2; - m_layerpri[1] = m_k053251->get_priority(k053251_device::CI3); - layers[2] = 3; - m_layerpri[2] = m_k053251->get_priority(k053251_device::CI4); + // sort layers and draw + int layer[3]; + for (int i = 0; i < 3; i++) + { + layer[i] = i + 1; + m_layerpri[i] = m_k053251->get_priority(K053251_CI[i + 1]); + } - konami_sortlayers3(layers, m_layerpri); + konami_sortlayers3(layer, m_layerpri); m_k054338->update_all_shadows(0, *m_palette); m_k054338->fill_solid_bg(bitmap, cliprect); @@ -371,9 +370,9 @@ uint32_t moo_base_state::screen_update(screen_device &screen, bitmap_rgb32 &bitm screen.priority().fill(0, cliprect); if (m_layerpri[0] < m_k053251->get_priority(k053251_device::CI1)) /* bucky hides back layer behind background */ - m_k056832->tilemap_draw(screen, bitmap, cliprect, layers[0], 0, 1); + m_k056832->tilemap_draw(screen, bitmap, cliprect, layer[0], 0, 1); - m_k056832->tilemap_draw(screen, bitmap, cliprect, layers[1], 0, 2); + m_k056832->tilemap_draw(screen, bitmap, cliprect, layer[1], 0, 2); // Enabling alpha improves fog and fading in Moo but causes other things to disappear. // There is probably a control bit somewhere to turn off alpha blending. @@ -382,7 +381,7 @@ uint32_t moo_base_state::screen_update(screen_device &screen, bitmap_rgb32 &bitm const int alpha = (m_alpha_enabled) ? m_k054338->set_alpha_level(1) & 0xff : 255; if (alpha > 0) - m_k056832->tilemap_draw(screen, bitmap, cliprect, layers[2], TILEMAP_DRAW_ALPHA(alpha), 4); + m_k056832->tilemap_draw(screen, bitmap, cliprect, layer[2], TILEMAP_DRAW_ALPHA(alpha), 4); m_k053246->k053247_sprites_draw( bitmap, cliprect); diff --git a/src/mame/konami/tmnt2.cpp b/src/mame/konami/tmnt2.cpp index ccd1a677786..cb074ceba53 100644 --- a/src/mame/konami/tmnt2.cpp +++ b/src/mame/konami/tmnt2.cpp @@ -115,14 +115,13 @@ protected: K052109_CB_MEMBER(tile_callback); // video-related - uint8_t m_layer_colorbase[3]{}; - uint8_t m_sprite_colorbase = 0; - int32_t m_layerpri[3]{}; - int32_t m_sorted_layer[3]{}; // this might not be necessary, but tmnt2 uses it in a strange way... + uint8_t m_layer_colorbase[3]{}; + uint8_t m_sprite_colorbase = 0; + int32_t m_layerpri[3]{}; // misc - emu_timer *m_nmi_blocked = nullptr; - uint8_t m_lastirq = 0; + emu_timer *m_nmi_blocked = nullptr; + uint8_t m_lastirq = 0; // devices required_device m_maincpu; @@ -237,7 +236,7 @@ private: void blswhstl_main_map(address_map &map) ATTR_COLD; // video-related - int32_t m_blswhstl_rombank = 0; + uint8_t m_tile_rombank = 0; }; // with protection and palette dimming @@ -319,9 +318,9 @@ protected: required_region_ptr m_zoomchar_rom; // video-related - tilemap_t *m_roz_tilemap = nullptr; - uint16_t m_glfgreat_pixel = 0; - uint8_t m_roz_char_bank = 0; + tilemap_t *m_roz_tilemap = nullptr; + uint16_t m_glfgreat_pixel = 0; + uint8_t m_roz_char_bank = 0; }; // with analog controller @@ -702,7 +701,7 @@ K052109_CB_MEMBER(sunsetbl_state::ssbl_tile_callback) K052109_CB_MEMBER(blswhstl_state::blswhstl_tile_callback) { /* (color & 0x02) is flip y handled internally by the 052109 */ - code |= ((color & 0x01) << 8) | ((color & 0x10) << 5) | ((color & 0x0c) << 8) | (bank << 12) | m_blswhstl_rombank << 14; + code |= ((color & 0x01) << 8) | ((color & 0x10) << 5) | ((color & 0x0c) << 8) | (bank << 12) | m_tile_rombank << 14; color = m_layer_colorbase[layer] + ((color & 0xe0) >> 5); } @@ -814,17 +813,9 @@ K053244_CB_MEMBER(prmrsocr_state::prmrsocr_sprite_callback) void tmnt2_base_state::video_start() { - m_sprite_colorbase = 0; - for (int i = 0; i < 3; i++) - { - m_layer_colorbase[i] = 0; - m_sorted_layer[i] = 0; - } - save_item(NAME(m_layer_colorbase)); save_item(NAME(m_sprite_colorbase)); save_item(NAME(m_layerpri)); - save_item(NAME(m_sorted_layer)); } void lgtnfght_state::video_start() @@ -847,8 +838,6 @@ void tmnt2_roz_base_state::video_start() { tmnt2_k053245_base_state::video_start(); - m_roz_char_bank = 0; - save_item(NAME(m_roz_char_bank)); } @@ -859,13 +848,11 @@ void glfgreat_state::video_start() m_roz_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(glfgreat_state::glfgreat_get_roz_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 512, 512); m_roz_tilemap->set_transparent_pen(0); - m_controller_select = 0; - m_roz_rom_bank = 0; - m_roz_rom_mode = 0; - save_item(NAME(m_controller_select)); save_item(NAME(m_roz_rom_bank)); save_item(NAME(m_roz_rom_mode)); + + save_item(NAME(m_glfgreat_pixel)); } void prmrsocr_state::video_start() @@ -875,8 +862,6 @@ void prmrsocr_state::video_start() m_roz_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(prmrsocr_state::prmrsocr_get_roz_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 512, 256); m_roz_tilemap->set_transparent_pen(0); - m_sprite_bank = 0; - save_item(NAME(m_sprite_bank)); } @@ -884,9 +869,7 @@ void blswhstl_state::video_start() { tmnt2_k053245_base_state::video_start(); - m_blswhstl_rombank = -1; - - save_item(NAME(m_blswhstl_rombank)); + save_item(NAME(m_tile_rombank)); } @@ -945,9 +928,9 @@ void blswhstl_state::blswhstl_700300_w(offs_t offset, uint16_t data, uint16_t me m_k052109->set_rmrd_line(BIT(data, 3) ? ASSERT_LINE : CLEAR_LINE); /* bit 7 = select char ROM bank */ - if (m_blswhstl_rombank != BIT(data, 7)) + if (m_tile_rombank != BIT(data, 7)) { - m_blswhstl_rombank = BIT(data, 7); + m_tile_rombank = BIT(data, 7); machine().tilemap().mark_all_dirty(); } @@ -1088,18 +1071,19 @@ uint32_t punkshot_state::screen_update_punkshot(screen_device &screen, bitmap_in } // sort layers and draw + int layer[3]; for (int i = 0; i < 3; i++) { - m_sorted_layer[i] = i; + layer[i] = i; m_layerpri[i] = m_k053251->get_priority(K053251_CI[i]); } - konami_sortlayers3(m_sorted_layer, m_layerpri); + konami_sortlayers3(layer, m_layerpri); screen.priority().fill(0, cliprect); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[0], TILEMAP_DRAW_OPAQUE, 1); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[1], 0, 2); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[2], 0, 4); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[0], TILEMAP_DRAW_OPAQUE, 1); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[1], 0, 2); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[2], 0, 4); m_k051960->k051960_sprites_draw(bitmap, cliprect, screen.priority(), -1, -1); return 0; @@ -1123,19 +1107,20 @@ uint32_t lgtnfght_state::screen_update_lgtnfght(screen_device &screen, bitmap_in } // sort layers and draw + int layer[3]; for (int i = 0; i < 3; i++) { - m_sorted_layer[i] = i; + layer[i] = i; m_layerpri[i] = m_k053251->get_priority(K053251_CI[i]); } - konami_sortlayers3(m_sorted_layer, m_layerpri); + konami_sortlayers3(layer, m_layerpri); screen.priority().fill(0, cliprect); bitmap.fill(16 * bg_colorbase, cliprect); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[0], 0, 1); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[1], 0, 2); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[2], 0, 4); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[0], 0, 1); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[1], 0, 2); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[2], 0, 4); m_k053245->sprites_draw(bitmap, cliprect, screen.priority()); return 0; @@ -1172,18 +1157,19 @@ uint32_t tmnt2_roz_base_state::screen_update(screen_device &screen, bitmap_ind16 } // sort layers and draw + int layer[3]; for (int i = 0; i < 3; i++) { - m_sorted_layer[i] = i; + layer[i] = i; m_layerpri[i] = m_k053251->get_priority(K053251_CI[i]); } - konami_sortlayers3(m_sorted_layer, m_layerpri); + konami_sortlayers3(layer, m_layerpri); // not sure about the 053936 priority, but it seems to work screen.priority().fill(0, cliprect); bitmap.fill(16 * bg_colorbase, cliprect); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[0], 0, 1); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[0], 0, 1); if (m_layerpri[0] >= 0x30 && m_layerpri[1] < 0x30) { @@ -1191,7 +1177,7 @@ uint32_t tmnt2_roz_base_state::screen_update(screen_device &screen, bitmap_ind16 m_glfgreat_pixel = bitmap.pix(0x80, 0x105); } - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[1], 0, 2); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[1], 0, 2); if (m_layerpri[1] >= 0x30 && m_layerpri[2] < 0x30) { @@ -1199,7 +1185,7 @@ uint32_t tmnt2_roz_base_state::screen_update(screen_device &screen, bitmap_ind16 m_glfgreat_pixel = bitmap.pix(0x80, 0x105); } - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[2], 0, 4); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[2], 0, 4); if (m_layerpri[2] >= 0x30) { @@ -1290,19 +1276,20 @@ uint32_t punkshot_state::screen_update_thndrx2(screen_device &screen, bitmap_ind } // sort layers and draw + int layer[3]; for (int i = 0; i < 3; i++) { - m_sorted_layer[i] = i; + layer[i] = i; m_layerpri[i] = m_k053251->get_priority(K053251_CI[i]); } - konami_sortlayers3(m_sorted_layer, m_layerpri); + konami_sortlayers3(layer, m_layerpri); screen.priority().fill(0, cliprect); bitmap.fill(16 * bg_colorbase, cliprect); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[0], 0, 1); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[1], 0, 2); - m_k052109->tilemap_draw(screen, bitmap, cliprect, m_sorted_layer[2], 0, 4); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[0], 0, 1); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[1], 0, 2); + m_k052109->tilemap_draw(screen, bitmap, cliprect, layer[2], 0, 4); m_k051960->k051960_sprites_draw(bitmap, cliprect, screen.priority(), -1, -1); return 0; @@ -2698,6 +2685,7 @@ void tmnt2_state::tmnt2(machine_config &config) SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_raw(24_MHz_XTAL / 4, 384, 0+8, 320-8, 264, 16, 240); m_screen->set_screen_update(FUNC(tmnt2_state::screen_update)); + m_screen->set_video_attributes(VIDEO_ALWAYS_UPDATE); // ball position m_screen->set_palette(m_palette); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 2048); From 366b485b037b404a4a71f1caa77a4cacb83e17ef Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 2 Mar 2026 09:25:23 +1100 Subject: [PATCH 085/351] Allow recompiling CPU cores to define their own opcode descriptions. The base opcode description now only has the parts that are used by the base recompiler front-end. CPU cores are free to define their own extensions as they see fit without being limited to pre-defined fields. The base recompiler front-end is now a template, eliminating the virtual member functions. It no longer has any dependencies on libemu, which paves the way to decoupling the recompiler front-ends and allowing the instruction analysis to be tested without the rest of the emulator. Also added a compile-time option to disable ASTAT flag update elision in the SHARC recompiler, and fixed some recompiler front-end bugs. --- scripts/src/cpu.lua | 5 +- src/devices/cpu/drcfe.h | 195 +++-- src/devices/cpu/{drcfe.cpp => drcfe.ipp} | 220 +++-- src/devices/cpu/dsp16/dsp16.h | 2 + src/devices/cpu/dsp16/dsp16fe.cpp | 138 +-- src/devices/cpu/dsp16/dsp16fe.h | 50 +- src/devices/cpu/dspp/dspp.cpp | 15 +- src/devices/cpu/dspp/dspp.h | 31 +- src/devices/cpu/dspp/dsppdrc.cpp | 64 +- src/devices/cpu/dspp/dsppfe.cpp | 187 ++-- src/devices/cpu/dspp/dsppfe.h | 92 +- src/devices/cpu/e132xs/e132xs.cpp | 2 +- src/devices/cpu/e132xs/e132xs.h | 12 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 72 +- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 140 +-- src/devices/cpu/e132xs/e132xsfe.cpp | 958 ++++++++++---------- src/devices/cpu/e132xs/e132xsfe.h | 56 +- src/devices/cpu/mb86235/mb86235.h | 20 +- src/devices/cpu/mb86235/mb86235defs.h | 20 - src/devices/cpu/mb86235/mb86235drc.cpp | 117 ++- src/devices/cpu/mb86235/mb86235fe.cpp | 518 ++++++----- src/devices/cpu/mb86235/mb86235fe.h | 165 +++- src/devices/cpu/mips/mips3.cpp | 7 +- src/devices/cpu/mips/mips3.h | 46 +- src/devices/cpu/mips/mips3drc.cpp | 216 +++-- src/devices/cpu/mips/mips3fe.cpp | 349 +++++--- src/devices/cpu/mips/mips3fe.h | 118 ++- src/devices/cpu/powerpc/ppc.h | 7 +- src/devices/cpu/powerpc/ppcdrc.cpp | 211 ++--- src/devices/cpu/powerpc/ppcfe.cpp | 240 +++-- src/devices/cpu/powerpc/ppcfe.h | 100 ++- src/devices/cpu/sh/sh.cpp | 159 ++-- src/devices/cpu/sh/sh.h | 47 +- src/devices/cpu/sh/sh2.cpp | 9 +- src/devices/cpu/sh/sh2.h | 19 +- src/devices/cpu/sh/sh2fe.cpp | 9 +- src/devices/cpu/sh/sh2fe.h | 28 + src/devices/cpu/sh/sh4.cpp | 101 ++- src/devices/cpu/sh/sh4.h | 40 +- src/devices/cpu/sh/sh4comn.h | 2 - src/devices/cpu/sh/sh4fe.cpp | 26 +- src/devices/cpu/sh/sh4fe.h | 36 + src/devices/cpu/sh/sh_fe.cpp | 591 +++++++------ src/devices/cpu/sh/sh_fe.h | 120 +++ src/devices/cpu/sharc/sharc.cpp | 2 +- src/devices/cpu/sharc/sharc.h | 55 +- src/devices/cpu/sharc/sharcdrc.cpp | 297 +++---- src/devices/cpu/sharc/sharcfe.cpp | 1013 +++++++++++----------- src/devices/cpu/sharc/sharcfe.h | 223 ++++- src/devices/cpu/sharc/sharcinternal.ipp | 15 - src/devices/cpu/unsp/unsp.cpp | 8 +- src/devices/cpu/unsp/unsp.h | 22 +- src/devices/cpu/unsp/unspdrc.cpp | 42 +- src/devices/cpu/unsp/unspfe.cpp | 214 +++-- src/devices/cpu/unsp/unspfe.h | 49 +- src/devices/sound/swp30.h | 2 +- 56 files changed, 4258 insertions(+), 3244 deletions(-) rename src/devices/cpu/{drcfe.cpp => drcfe.ipp} (62%) delete mode 100644 src/devices/cpu/mb86235/mb86235defs.h create mode 100644 src/devices/cpu/sh/sh2fe.h create mode 100644 src/devices/cpu/sh/sh4fe.h create mode 100644 src/devices/cpu/sh/sh_fe.h diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 121ec87a8a6..9bf32fcaf66 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -32,8 +32,8 @@ if CPU_INCLUDE_DRC then MAME_DIR .. "src/devices/cpu/drcbeut.h", MAME_DIR .. "src/devices/cpu/drccache.cpp", MAME_DIR .. "src/devices/cpu/drccache.h", - MAME_DIR .. "src/devices/cpu/drcfe.cpp", MAME_DIR .. "src/devices/cpu/drcfe.h", + MAME_DIR .. "src/devices/cpu/drcfe.ipp", MAME_DIR .. "src/devices/cpu/drcuml.cpp", MAME_DIR .. "src/devices/cpu/drcuml.h", MAME_DIR .. "src/devices/cpu/uml.cpp", @@ -879,11 +879,13 @@ end if CPUS["SH"] then files { MAME_DIR .. "src/devices/cpu/sh/sh_fe.cpp", + MAME_DIR .. "src/devices/cpu/sh/sh_fe.h", MAME_DIR .. "src/devices/cpu/sh/sh.cpp", MAME_DIR .. "src/devices/cpu/sh/sh.h", MAME_DIR .. "src/devices/cpu/sh/sh2.cpp", MAME_DIR .. "src/devices/cpu/sh/sh2.h", MAME_DIR .. "src/devices/cpu/sh/sh2fe.cpp", + MAME_DIR .. "src/devices/cpu/sh/sh2fe.h", MAME_DIR .. "src/devices/cpu/sh/sh3comn.cpp", MAME_DIR .. "src/devices/cpu/sh/sh3comn.h", MAME_DIR .. "src/devices/cpu/sh/sh4.cpp", @@ -893,6 +895,7 @@ if CPUS["SH"] then MAME_DIR .. "src/devices/cpu/sh/sh4dmac.cpp", MAME_DIR .. "src/devices/cpu/sh/sh4dmac.h", MAME_DIR .. "src/devices/cpu/sh/sh4fe.cpp", + MAME_DIR .. "src/devices/cpu/sh/sh4fe.h", MAME_DIR .. "src/devices/cpu/sh/sh4regs.h", MAME_DIR .. "src/devices/cpu/sh/sh4tmu.cpp", MAME_DIR .. "src/devices/cpu/sh/sh4tmu.h", diff --git a/src/devices/cpu/drcfe.h b/src/devices/cpu/drcfe.h index 8e2455c85d2..6822028428c 100644 --- a/src/devices/cpu/drcfe.h +++ b/src/devices/cpu/drcfe.h @@ -33,6 +33,9 @@ #pragma once +#include +#include + //************************************************************************** // CONSTANTS @@ -42,125 +45,161 @@ constexpr offs_t BRANCH_TARGET_DYNAMIC = ~offs_t(0); -// opcode branch flags -constexpr u32 OPFLAG_IS_UNCONDITIONAL_BRANCH = 0x00000001; // instruction is unconditional branch -constexpr u32 OPFLAG_IS_CONDITIONAL_BRANCH = 0x00000002; // instruction is conditional branch -constexpr u32 OPFLAG_IS_BRANCH = (OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_IS_CONDITIONAL_BRANCH); -constexpr u32 OPFLAG_IS_BRANCH_TARGET = 0x00000004; // instruction is the target of a branch -constexpr u32 OPFLAG_IN_DELAY_SLOT = 0x00000008; // instruction is in the delay slot of a branch -constexpr u32 OPFLAG_INTRABLOCK_BRANCH = 0x00000010; // instruction branches within the block - -// opcode exception flags -constexpr u32 OPFLAG_CAN_TRIGGER_SW_INT = 0x00000020; // instruction can trigger a software interrupt -constexpr u32 OPFLAG_CAN_EXPOSE_EXTERNAL_INT = 0x00000040; // instruction can expose an external interrupt -constexpr u32 OPFLAG_CAN_CAUSE_EXCEPTION = 0x00000080; // instruction may generate exception -constexpr u32 OPFLAG_WILL_CAUSE_EXCEPTION = 0x00000100; // instruction will generate exception -constexpr u32 OPFLAG_PRIVILEGED = 0x00000200; // instruction is privileged - -// opcode virtual->physical translation flags -constexpr u32 OPFLAG_VALIDATE_TLB = 0x00000400; // instruction must validate TLB before execution -constexpr u32 OPFLAG_MODIFIES_TRANSLATION = 0x00000800; // instruction modifies the TLB -constexpr u32 OPFLAG_COMPILER_PAGE_FAULT = 0x00001000; // compiler hit a page fault when parsing -constexpr u32 OPFLAG_COMPILER_UNMAPPED = 0x00002000; // compiler hit unmapped memory when parsing - -// opcode flags -constexpr u32 OPFLAG_INVALID_OPCODE = 0x00004000; // instruction is invalid -constexpr u32 OPFLAG_VIRTUAL_NOOP = 0x00008000; // instruction is a virtual no-op - -// opcode sequence flow flags -constexpr u32 OPFLAG_REDISPATCH = 0x00010000; // instruction must redispatch after completion -constexpr u32 OPFLAG_RETURN_TO_START = 0x00020000; // instruction must jump back to the beginning after completion -constexpr u32 OPFLAG_END_SEQUENCE = 0x00040000; // this is the last instruction in a sequence -constexpr u32 OPFLAG_CAN_CHANGE_MODES = 0x00080000; // instruction can change modes - -// execution semantics -constexpr u32 OPFLAG_READS_MEMORY = 0x00100000; // instruction reads memory -constexpr u32 OPFLAG_WRITES_MEMORY = 0x00200000; // instruction writes memory - - //************************************************************************** // TYPE DEFINITIONS //************************************************************************** // description of a given opcode -struct opcode_desc +template +class opcode_desc_base { - opcode_desc *next() const { return m_next; } +public: + using regmask = std::bitset; + + Impl *next() const { return m_next; } + + void set_is_unconditional_branch() { m_flags.set(IS_UNCONDITIONAL_BRANCH); } + void set_is_conditional_branch() { m_flags.set(IS_CONDITIONAL_BRANCH); } + void set_is_branch_target() { m_flags.set(IS_BRANCH_TARGET); } + void set_in_delay_slot() { m_flags.set(IN_DELAY_SLOT); } + void set_intrablock_branch() { m_flags.set(INTRABLOCK_BRANCH); } + void set_can_cause_exception() { m_flags.set(CAN_CAUSE_EXCEPTION); } + void set_will_cause_exception() { m_flags.set(WILL_CAUSE_EXCEPTION); } + void set_validate_tlb() { m_flags.set(VALIDATE_TLB); } + void set_compiler_page_fault() { m_flags.set(COMPILER_PAGE_FAULT); } + void set_invalid_opcode() { m_flags.set(INVALID_OPCODE); } + void set_virtual_noop() { m_flags.set(VIRTUAL_NOOP); } + void set_redispatch() { m_flags.set(REDISPATCH); } + void set_return_to_start() { m_flags.set(RETURN_TO_START); } + void set_end_sequence() { m_flags.set(END_SEQUENCE); } + + bool is_unconditional_branch() const { return m_flags[IS_UNCONDITIONAL_BRANCH]; } + bool is_conditional_branch() const { return m_flags[IS_CONDITIONAL_BRANCH]; } + bool is_branch() const { return is_unconditional_branch() || is_conditional_branch(); } + bool is_branch_target() const { return m_flags[IS_BRANCH_TARGET]; } + bool in_delay_slot() const { return m_flags[IN_DELAY_SLOT]; } + bool intrablock_branch() const { return m_flags[INTRABLOCK_BRANCH]; } + bool can_cause_exception() const { return m_flags[CAN_CAUSE_EXCEPTION]; } + bool will_cause_exception() const { return m_flags[WILL_CAUSE_EXCEPTION]; } + bool validate_tlb() const { return m_flags[VALIDATE_TLB]; } + bool compiler_page_fault() const { return m_flags[COMPILER_PAGE_FAULT]; } + bool invalid_opcode() const { return m_flags[INVALID_OPCODE]; } + bool virtual_noop() const { return m_flags[VIRTUAL_NOOP]; } + bool redispatch() const { return m_flags[REDISPATCH]; } + bool return_to_start() const { return m_flags[RETURN_TO_START]; } + bool end_sequence() const { return m_flags[END_SEQUENCE]; } // links to other descriptions - opcode_desc * m_next; // pointer to next description - opcode_desc * branch; // pointer back to branch description for delay slots - simple_list delay; // pointer to delay slot description + Impl * m_next; // pointer to next description + Impl * branch; // pointer back to branch description for delay slots + simple_list delay; // pointer to delay slot description // information about the current PC offs_t pc; // PC of this opcode - offs_t physpc; // physical PC of this opcode offs_t targetpc; // target PC if we are a branch, or BRANCH_TARGET_DYNAMIC - // copy of up to 16 bytes of opcode - union - { - u8 b[16]; - u16 w[8]; - u32 l[4]; - u64 q[2]; - } opptr; // pointer to opcode memory - // information about this instruction's execution u8 length; // length in bytes of this opcode u8 delayslots; // number of delay slots (for branches) u8 skipslots; // number of skip slots (for branches) - u32 flags; // OPFLAG_* opcode flags - u32 userflags; // core specific flags - u32 userdata0; // core specific data - u32 cycles; // number of cycles needed to execute // register usage information - u32 regin[4]; // input registers - u32 regout[4]; // output registers - u32 regreq[4]; // required output registers + regmask regin; // input registers + regmask regout; // output registers + regmask regreq; // required output registers + +protected: + enum + { + // opcode branch flags + IS_UNCONDITIONAL_BRANCH = 0, // instruction is unconditional branch + IS_CONDITIONAL_BRANCH, // instruction is conditional branch + IS_BRANCH_TARGET, // instruction is the target of a branch + IN_DELAY_SLOT, // instruction is in the delay slot of a branch + INTRABLOCK_BRANCH, // instruction branches within the block + + // opcode exception flags + CAN_CAUSE_EXCEPTION, // instruction may generate exception + WILL_CAUSE_EXCEPTION, // instruction will generate exception + + // opcode virtual->physical translation flags + VALIDATE_TLB, // instruction must validate TLB before execution + COMPILER_PAGE_FAULT, // compiler hit a page fault when parsing + + // opcode flags + INVALID_OPCODE, // instruction is invalid + VIRTUAL_NOOP, // instruction is a virtual no-op + + // opcode sequence flow flags + REDISPATCH, // instruction must redispatch after completion + RETURN_TO_START, // instruction must jump back to the beginning after completion + END_SEQUENCE, // this is the last instruction in a sequence + + FLAG_COUNT + }; + + void reset(offs_t curpc, bool in_delay_slot) + { + m_next = nullptr; + branch = nullptr; + delay.reset(); + pc = curpc; + targetpc = BRANCH_TARGET_DYNAMIC; + length = 0; + delayslots = 0; + skipslots = 0; + regin.reset(); + regout.reset(); + regreq.reset(); + m_flags.reset(); + + // set the delay slot flag + if (in_delay_slot) + set_in_delay_slot(); + } + + std::bitset m_flags; }; // DRC frontend state -class drc_frontend +template +class drc_frontend_base { public: // construction/destruction - drc_frontend(device_t &cpu, u32 window_start, u32 window_end, u32 max_sequence); - virtual ~drc_frontend(); + drc_frontend_base(offs_t pageshift, u32 window_start, u32 window_end, u32 max_sequence); + ~drc_frontend_base(); - // describe a block - opcode_desc const *describe_code(offs_t startpc); // get last opcode of block - opcode_desc const *get_last() { return m_desc_live_list.last(); } + Desc const *get_last() { return m_desc_live_list.last(); } protected: - // required overrides - virtual bool describe(opcode_desc &desc, opcode_desc const *prev) = 0; + // describe a block + template + Desc const *do_describe_code(T && describe, offs_t startpc); private: // internal helpers - opcode_desc *describe_one(offs_t curpc, opcode_desc const *prevdesc, bool in_delay_slot = false); - void build_sequence(int start, int end, u32 endflag); - void accumulate_required_backwards(opcode_desc &desc, u32 *reqmask); + template + Desc *describe_one(T &&describe, offs_t curpc, Desc const *prevdesc, bool in_delay_slot = false); + void build_sequence(int start, int end, bool redispatch); + void accumulate_required_backwards(Desc &desc, typename Desc::regmask &reqmask); void release_descriptions(); // configuration parameters - u32 m_window_start; // code window start offset = startpc - window_start - u32 m_window_end; // code window end offset = startpc + window_end - u32 m_max_sequence; // maximum instructions to include in a sequence + u32 const m_window_start; // code window start offset = startpc - window_start + u32 const m_window_end; // code window end offset = startpc + window_end + u32 const m_max_sequence; // maximum instructions to include in a sequence // CPU parameters - cpu_device & m_cpudevice; // CPU device object - address_space & m_program; // program address space for this CPU - offs_t m_pageshift; // shift to convert address to a page index + offs_t const m_pageshift; // shift to convert address to a page index // opcode descriptor arrays - simple_list m_desc_live_list; // list of live descriptions - fixed_allocator m_desc_allocator; // fixed allocator for descriptions - std::vector m_desc_array; // array of descriptions in PC order + simple_list m_desc_live_list; // list of live descriptions + fixed_allocator m_desc_allocator; // fixed allocator for descriptions + std::vector m_desc_array; // array of descriptions in PC order }; #endif // MAME_CPU_DRCFE_H diff --git a/src/devices/cpu/drcfe.cpp b/src/devices/cpu/drcfe.ipp similarity index 62% rename from src/devices/cpu/drcfe.cpp rename to src/devices/cpu/drcfe.ipp index a13f23f39f4..681cb85c50a 100644 --- a/src/devices/cpu/drcfe.cpp +++ b/src/devices/cpu/drcfe.ipp @@ -2,7 +2,7 @@ // copyright-holders:Aaron Giles /*************************************************************************** - drcfe.c + drcfe.ipp Generic dynamic recompiler frontend structures and utilities. @@ -14,34 +14,14 @@ intrablock branches ***************************************************************************/ +#ifndef MAME_CPU_DRCFE_IPP +#define MAME_CPU_DRCFE_IPP + +#pragma once -#include "emu.h" #include "drcfe.h" - -namespace { - -//************************************************************************** -// CONSTANTS -//************************************************************************** - -constexpr u32 MAX_STACK_DEPTH = 100; - - - -//************************************************************************** -// TYPE DEFINITIONS -//************************************************************************** - -// an entry that maps branches for our code walking -struct pc_stack_entry -{ - offs_t targetpc; - offs_t srcpc; -}; - -} // anonymous namespace - +#include //************************************************************************** @@ -49,26 +29,26 @@ struct pc_stack_entry //************************************************************************** //------------------------------------------------- -// drc_frontend - constructor +// drc_frontend_base - constructor //------------------------------------------------- -drc_frontend::drc_frontend(device_t &cpu, u32 window_start, u32 window_end, u32 max_sequence) +template +drc_frontend_base::drc_frontend_base(offs_t pageshift, u32 window_start, u32 window_end, u32 max_sequence) : m_window_start(window_start) , m_window_end(window_end) , m_max_sequence(max_sequence) - , m_cpudevice(downcast(cpu)) - , m_program(m_cpudevice.space(AS_PROGRAM)) - , m_pageshift(m_cpudevice.space_config(AS_PROGRAM)->page_shift()) + , m_pageshift(pageshift) , m_desc_array(window_end + window_start + 2, nullptr) { } //------------------------------------------------- -// ~drc_frontend - destructor +// ~drc_frontend_base - destructor //------------------------------------------------- -drc_frontend::~drc_frontend() +template +drc_frontend_base::~drc_frontend_base() { // release any descriptions we've accumulated release_descriptions(); @@ -81,8 +61,19 @@ drc_frontend::~drc_frontend() // relative to the specified startpc //------------------------------------------------- -const opcode_desc *drc_frontend::describe_code(offs_t startpc) +template +template +const Desc *drc_frontend_base::do_describe_code(T &&describe, offs_t startpc) { + constexpr u32 MAX_STACK_DEPTH = 100; + + // an entry that maps branches for our code walking + struct pc_stack_entry + { + offs_t targetpc; + offs_t srcpc; + }; + // release any descriptions we've accumulated release_descriptions(); @@ -100,14 +91,17 @@ const opcode_desc *drc_frontend::describe_code(offs_t startpc) { // if we've already hit this PC, just mark it a branch target and continue pc_stack_entry *const curstack = --pcstackptr; - opcode_desc *curdesc = m_desc_array[curstack->targetpc - minpc]; + Desc *curdesc = m_desc_array[curstack->targetpc - minpc]; if (curdesc != nullptr) { - curdesc->flags |= OPFLAG_IS_BRANCH_TARGET; + curdesc->set_is_branch_target(); // if the branch crosses a page boundary, mark the target as needing to revalidate if (m_pageshift != 0 && ((curstack->srcpc ^ curdesc->pc) >> m_pageshift) != 0) - curdesc->flags |= OPFLAG_VALIDATE_TLB | OPFLAG_CAN_CAUSE_EXCEPTION; + { + curdesc->set_validate_tlb(); + curdesc->set_can_cause_exception(); + } // continue processing continue; @@ -117,39 +111,42 @@ const opcode_desc *drc_frontend::describe_code(offs_t startpc) for (offs_t curpc = curstack->targetpc; curpc >= minpc && curpc < maxpc && m_desc_array[curpc - minpc] == nullptr; curpc += m_desc_array[curpc - minpc]->length) { // allocate a new description and describe this instruction - m_desc_array[curpc - minpc] = curdesc = describe_one(curpc, curdesc); + m_desc_array[curpc - minpc] = curdesc = describe_one(describe, curpc, curdesc); // first instruction in a sequence is always a branch target if (curpc == curstack->targetpc) - curdesc->flags |= OPFLAG_IS_BRANCH_TARGET; + curdesc->set_is_branch_target(); // stop if we hit a page fault - if (curdesc->flags & OPFLAG_COMPILER_PAGE_FAULT) + if (curdesc->compiler_page_fault()) break; // if we are the first instruction in the whole window, we must validate the TLB if (curpc == startpc && m_pageshift != 0) - curdesc->flags |= OPFLAG_VALIDATE_TLB | OPFLAG_CAN_CAUSE_EXCEPTION; + { + curdesc->set_validate_tlb(); + curdesc->set_can_cause_exception(); + } // if we are a branch within the block range, add the branch target to our stack - if ((curdesc->flags & OPFLAG_IS_BRANCH) && curdesc->targetpc >= minpc && curdesc->targetpc < maxpc && pcstackptr < &pcstack[MAX_STACK_DEPTH]) + if (curdesc->is_branch() && (curdesc->targetpc >= minpc) && (curdesc->targetpc < maxpc) && (pcstackptr < &pcstack[MAX_STACK_DEPTH])) { - curdesc->flags |= OPFLAG_INTRABLOCK_BRANCH; + curdesc->set_intrablock_branch(); pcstackptr->srcpc = curdesc->pc; pcstackptr->targetpc = curdesc->targetpc; pcstackptr++; } // if we're done, we're done - if (curdesc->flags & OPFLAG_END_SEQUENCE) + if (curdesc->end_sequence()) break; } } // now build the list of descriptions in order // first from startpc -> maxpc, then from minpc -> startpc - build_sequence(startpc - minpc, maxpc - minpc, OPFLAG_REDISPATCH); - build_sequence(minpc - minpc, startpc - minpc, OPFLAG_RETURN_TO_START); + build_sequence(startpc - minpc, maxpc - minpc, true); + build_sequence(minpc - minpc, startpc - minpc, false); return m_desc_live_list.first(); } @@ -160,62 +157,55 @@ const opcode_desc *drc_frontend::describe_code(offs_t startpc) // slots of branches as well //------------------------------------------------- -opcode_desc *drc_frontend::describe_one(offs_t curpc, opcode_desc const *prevdesc, bool in_delay_slot) +template +template +Desc *drc_frontend_base::describe_one(T &&describe, offs_t curpc, Desc const *prevdesc, bool in_delay_slot) { // initialize the description - opcode_desc *const desc = m_desc_allocator.alloc(); - desc->m_next = nullptr; - desc->branch = nullptr; - desc->delay.reset(); - desc->pc = curpc; - desc->physpc = curpc; - desc->targetpc = BRANCH_TARGET_DYNAMIC; - memset(&desc->opptr, 0x00, sizeof(desc->opptr)); - desc->length = 0; - desc->delayslots = 0; - desc->skipslots = 0; - // set the delay slot flag - desc->flags = in_delay_slot ? OPFLAG_IN_DELAY_SLOT : 0; - desc->userflags = 0; - desc->userdata0 = 0; - desc->cycles = 0; - memset(desc->regin, 0x00, sizeof(desc->regin)); - memset(desc->regout, 0x00, sizeof(desc->regout)); - memset(desc->regreq, 0x00, sizeof(desc->regreq)); + Desc *const desc = m_desc_allocator.alloc(); + desc->reset(curpc, in_delay_slot); // call the callback to describe an instruction if (!describe(*desc, prevdesc)) { - desc->flags |= OPFLAG_WILL_CAUSE_EXCEPTION | OPFLAG_INVALID_OPCODE; + desc->set_will_cause_exception(); + desc->set_invalid_opcode(); return desc; } // validate the TLB if we are exactly at the start of a page, or if we cross a page boundary if (m_pageshift != 0 && (((curpc - 1) ^ (curpc + desc->length - 1)) >> m_pageshift) != 0) - desc->flags |= OPFLAG_VALIDATE_TLB | OPFLAG_CAN_CAUSE_EXCEPTION; + { + desc->set_validate_tlb(); + desc->set_can_cause_exception(); + } // validate stuff - assert(desc->length > 0 || (desc->flags & OPFLAG_VIRTUAL_NOOP) != 0); + assert((desc->length > 0) || desc->virtual_noop()); // if we are a branch with delay slots, recursively walk those - if (desc->flags & OPFLAG_IS_BRANCH) + if (desc->is_branch()) { // iterate over slots and describe them offs_t delaypc = curpc + desc->length; // If this is a delay slot it is the true branch fork and the pc should be the previous branch target - if (desc->flags & OPFLAG_IN_DELAY_SLOT) { - if (prevdesc->targetpc != BRANCH_TARGET_DYNAMIC) { + if (desc->in_delay_slot()) + { + if (prevdesc->targetpc != BRANCH_TARGET_DYNAMIC) + { delaypc = prevdesc->targetpc; - //printf("drc_frontend::describe_one Branch in delay slot. curpc=%08X delaypc=%08X\n", curpc, delaypc); - } else { - //printf("drc_frontend::describe_one Warning! Branch in delay slot of dynamic target. curpc=%08X\n", curpc); + //printf("drc_frontend_base::describe_one Branch in delay slot. curpc=%08X delaypc=%08X\n", curpc, delaypc); + } + else + { + //printf("drc_frontend_base::describe_one Warning! Branch in delay slot of dynamic target. curpc=%08X\n", curpc); } } - opcode_desc *prev = desc; + Desc *prev = desc; for (u8 slotnum = 0; slotnum < desc->delayslots; slotnum++) { // recursively describe the next instruction - opcode_desc *delaydesc = describe_one(delaypc, prev, true); + Desc *delaydesc = describe_one(describe, delaypc, prev, true); if (delaydesc == nullptr) break; desc->delay.append(*delaydesc); @@ -225,7 +215,7 @@ opcode_desc *drc_frontend::describe_one(offs_t curpc, opcode_desc const *prevdes delaydesc->branch = desc; // stop if we hit a page fault - if (delaydesc->flags & OPFLAG_COMPILER_PAGE_FAULT) + if (delaydesc->compiler_page_fault()) break; // otherwise, advance @@ -241,19 +231,21 @@ opcode_desc *drc_frontend::describe_one(offs_t curpc, opcode_desc const *prevdes // of instructions //------------------------------------------------- -void drc_frontend::build_sequence(int start, int end, u32 endflag) +template +void drc_frontend_base::build_sequence(int start, int end, bool redispatch) { // iterate in order from start to end, picking up all non-NULL instructions int consecutive = 0; int seqstart = -1; int skipsleft = 0; for (int descnum = start; descnum < end; descnum++) + { if (m_desc_array[descnum] != nullptr) { // determine the next instruction, taking skips into account - opcode_desc *curdesc = m_desc_array[descnum]; + Desc *curdesc = m_desc_array[descnum]; int nextdescnum = descnum + curdesc->length; - opcode_desc *nextdesc = (nextdescnum < end) ? m_desc_array[nextdescnum] : nullptr; + Desc *nextdesc = (nextdescnum < end) ? m_desc_array[nextdescnum] : nullptr; for (u8 skipnum = 0; skipnum < curdesc->skipslots && nextdesc != nullptr; skipnum++) { nextdescnum = nextdescnum + nextdesc->length; @@ -264,16 +256,19 @@ void drc_frontend::build_sequence(int start, int end, u32 endflag) if (seqstart == -1 && skipsleft == 0) { // tag all start-of-sequence instructions as needing TLB verification - curdesc->flags |= OPFLAG_VALIDATE_TLB | OPFLAG_CAN_CAUSE_EXCEPTION; + curdesc->set_validate_tlb(); + curdesc->set_can_cause_exception(); seqstart = descnum; } // if we are the last instruction, indicate end-of-sequence and redispatch if (nextdesc == nullptr) { - curdesc->flags |= OPFLAG_END_SEQUENCE; - if (endflag != OPFLAG_RETURN_TO_START || nextdescnum == end) - curdesc->flags |= endflag; + curdesc->set_end_sequence(); + if (redispatch) + curdesc->set_redispatch(); + else if (nextdescnum == end) + curdesc->set_return_to_start(); } // otherwise, do some analysis based on the next instruction @@ -281,7 +276,7 @@ void drc_frontend::build_sequence(int start, int end, u32 endflag) { // if there are instructions between us and the next instruction, we must end our sequence here int scandescnum; - opcode_desc *scandesc = nullptr; + Desc *scandesc = nullptr; for (scandescnum = descnum + 1; scandescnum < end; scandescnum++) { scandesc = m_desc_array[scandescnum]; @@ -289,28 +284,33 @@ void drc_frontend::build_sequence(int start, int end, u32 endflag) break; } if (scandesc != nextdesc) - curdesc->flags |= OPFLAG_END_SEQUENCE; + curdesc->set_end_sequence(); // if the next instruction is a branch target, mark this instruction as end of sequence - if (nextdesc->flags & OPFLAG_IS_BRANCH_TARGET) - curdesc->flags |= OPFLAG_END_SEQUENCE; + if (nextdesc->is_branch_target()) + curdesc->set_end_sequence(); } // if we exceed the maximum consecutive count, cut off the sequence if (++consecutive >= m_max_sequence) - curdesc->flags |= OPFLAG_END_SEQUENCE; - if (curdesc->flags & OPFLAG_END_SEQUENCE) + curdesc->set_end_sequence(); + if (curdesc->end_sequence()) consecutive = 0; // if this is the end of a sequence, work backwards - if (curdesc->flags & OPFLAG_END_SEQUENCE) + if (curdesc->end_sequence()) { // figure out which registers we *must* generate, assuming at the end all must be - u32 reqmask[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff }; + typename Desc::regmask reqmask; + reqmask.set(); if (seqstart != -1) + { for (int backdesc = descnum; backdesc != seqstart - 1; backdesc--) + { if (m_desc_array[backdesc] != nullptr) accumulate_required_backwards(*m_desc_array[backdesc], reqmask); + } + } // reset the register states seqstart = -1; @@ -318,7 +318,7 @@ void drc_frontend::build_sequence(int start, int end, u32 endflag) // if we have instructions remaining to be skipped, and this instruction is a branch target // belay the skip order - if (skipsleft > 0 && (curdesc->flags & OPFLAG_IS_BRANCH_TARGET)) + if ((skipsleft > 0) && curdesc->is_branch_target()) skipsleft = 0; // if we're not getting skipped, add us to the end of the list and clear our array slot @@ -334,9 +334,10 @@ void drc_frontend::build_sequence(int start, int end, u32 endflag) else if (skipsleft > 0) skipsleft--; } + } // zap the array - memset(&m_desc_array[start], 0, (end - start) * sizeof(m_desc_array[0])); + std::fill_n(&m_desc_array[start], end - start, nullptr); } @@ -346,33 +347,25 @@ void drc_frontend::build_sequence(int start, int end, u32 endflag) // walking in a backwards direction //------------------------------------------------- -void drc_frontend::accumulate_required_backwards(opcode_desc &desc, u32 *reqmask) +template +void drc_frontend_base::accumulate_required_backwards(Desc &desc, typename Desc::regmask &reqmask) { // recursively handle delay slots if (desc.delay.first() != nullptr) accumulate_required_backwards(*desc.delay.first(), reqmask); // if this is a branch, we have to reset our requests - if (desc.flags & OPFLAG_IS_BRANCH) - reqmask[0] = reqmask[1] = reqmask[2] = reqmask[3] = 0xffffffff; + if (desc.is_branch()) + reqmask = reqmask = reqmask = reqmask.set(); // determine the required registers - desc.regreq[0] = desc.regout[0] & reqmask[0]; - desc.regreq[1] = desc.regout[1] & reqmask[1]; - desc.regreq[2] = desc.regout[2] & reqmask[2]; - desc.regreq[3] = desc.regout[3] & reqmask[3]; + desc.regreq = desc.regout & reqmask; // any registers modified by this instruction aren't required upstream until referenced - reqmask[0] &= ~desc.regout[0]; - reqmask[1] &= ~desc.regout[1]; - reqmask[2] &= ~desc.regout[2]; - reqmask[3] &= ~desc.regout[3]; + reqmask &= ~desc.regout; // any registers required by this instruction now get marked required - reqmask[0] |= desc.regin[0]; - reqmask[1] |= desc.regin[1]; - reqmask[2] |= desc.regin[2]; - reqmask[3] |= desc.regin[3]; + reqmask |= desc.regin; } @@ -382,12 +375,15 @@ void drc_frontend::accumulate_required_backwards(opcode_desc &desc, u32 *reqmask // free list //------------------------------------------------ -void drc_frontend::release_descriptions() +template +void drc_frontend_base::release_descriptions() { // release all delay slots first - for (opcode_desc *curdesc = m_desc_live_list.first(); curdesc != nullptr; curdesc = curdesc->next()) + for (Desc *curdesc = m_desc_live_list.first(); curdesc != nullptr; curdesc = curdesc->next()) m_desc_allocator.reclaim_all(curdesc->delay); // reclaim all the descriptors m_desc_allocator.reclaim_all(m_desc_live_list); } + +#endif // MAME_CPU_DRCFE_IPP diff --git a/src/devices/cpu/dsp16/dsp16.h b/src/devices/cpu/dsp16/dsp16.h index f969f14e851..3e4b6f941fc 100644 --- a/src/devices/cpu/dsp16/dsp16.h +++ b/src/devices/cpu/dsp16/dsp16.h @@ -17,6 +17,7 @@ #include #include + class dsp16_device_base : public cpu_device, protected dsp16_disassembler::cpu { public: @@ -173,6 +174,7 @@ private: // recompiler helpers class core_state; + class opcode_desc; class frontend; class recompiler; struct core_destructer { void operator()(core_state *obj) const noexcept; }; diff --git a/src/devices/cpu/dsp16/dsp16fe.cpp b/src/devices/cpu/dsp16/dsp16fe.cpp index 406cf205433..4c10ed14a49 100644 --- a/src/devices/cpu/dsp16/dsp16fe.cpp +++ b/src/devices/cpu/dsp16/dsp16fe.cpp @@ -9,28 +9,41 @@ #include "emu.h" #include "dsp16fe.h" +#include "cpu/drcfe.ipp" + /*********************************************************************** construction/destruction ***********************************************************************/ dsp16_device_base::frontend::frontend(dsp16_device_base &host, u32 window_start, u32 window_end, u32 max_sequence) - : drc_frontend(host, window_start, window_end, max_sequence) + : drc_frontend_base(host.space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_host(host) { } +dsp16_device_base::frontend::~frontend() +{ +} + /*********************************************************************** drc_frontend implementation ***********************************************************************/ +dsp16_device_base::opcode_desc const *dsp16_device_base::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const *prev) { // most instructions are one word long and run in one machine cycle desc.length = 1U; desc.cycles = 1U; - u16 const op(m_host.m_pcache.read_word(desc.physpc)); + u16 const op(m_host.m_pcache.read_word(desc.pc)); switch (op >> 11) { case 0x00: // goto JA @@ -38,8 +51,9 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const case 0x10: // call JA case 0x11: desc.cycles = 2U; - desc.targetpc = (desc.physpc & XAAU_I_EXT) | (op_ja(op) & XAAU_I_MASK); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH; + desc.targetpc = (desc.pc & XAAU_I_EXT) | (op_ja(op) & XAAU_I_MASK); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); if (BIT(op, 15)) flag_output_reg(desc, REG_BIT_XAAU_PR); return true; @@ -79,7 +93,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const case 0x08: // aT = R desc.cycles = 2U; if (op & 0x000fU) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); flag_output_reg(desc, op_d(op) ? REG_BIT_DAU_A0 : REG_BIT_DAU_A1, REG_BIT_DAU_PSW); describe_r(desc, op, true, false); return true; @@ -88,7 +102,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const case 0x0b: // R = a1 desc.cycles = 2U; if (op & 0x000fU) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); flag_input_reg(desc, BIT(op, 12) ? REG_BIT_DAU_A1 : REG_BIT_DAU_A0, REG_BIT_DAU_AUC); describe_r(desc, op, false, true); return true; @@ -97,14 +111,14 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const desc.length = 2U; desc.cycles = 2U; if (op & 0x000fU) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); describe_r(desc, op, false, true); return true; case 0x0c: // Y = R desc.cycles = 2U; if (op & 0x0400U) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); describe_r(desc, op, true, false); describe_y(desc, op, false, true); return true; @@ -124,7 +138,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const case 0x0f: // R = Y desc.cycles = 2U; if (op & 0x0400U) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); describe_r(desc, op, false, true); describe_y(desc, op, true, false); return true; @@ -175,7 +189,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const case 0x1b: // F1 ; y = a1 ; x = *pt++[i] desc.cycles = 2U; if (op & 0x000fU) - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); flag_input_reg(desc, BIT(op, 12) ? REG_BIT_DAU_A1 : REG_BIT_DAU_A0, REG_BIT_DAU_AUC); flag_output_reg(desc, REG_BIT_DAU_Y); describe_f1(desc, op); @@ -184,7 +198,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const case 0x1a: // if CON # icall if (op & 0x03e0U) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); if (BIT(op, 10)) return describe_icall(desc, op); else @@ -200,7 +214,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const return true; case 0x1e: // Reserved - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); return true; case 0x1f: // F1 ; y = Y ; x = *pt++[i] @@ -221,7 +235,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const u16 dsp16_device_base::frontend::read_op(opcode_desc const &desc, u16 offset) { - return m_host.m_pcache.read_word((desc.physpc & XAAU_I_EXT) | ((desc.physpc + offset) & XAAU_I_MASK)); + return m_host.m_pcache.read_word((desc.pc & XAAU_I_EXT) | ((desc.pc + offset) & XAAU_I_MASK)); } /*********************************************************************** @@ -232,16 +246,17 @@ bool dsp16_device_base::frontend::describe_goto_b(opcode_desc &desc, u16 op) { desc.cycles = 2U; if (op & 0x00ffU) - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); switch (op_b(op)) { case 0x0: // return flag_input_reg(desc, REG_BIT_XAAU_PR); break; case 0x1: // ireturn - desc.flags |= OPFLAG_CAN_CHANGE_MODES; // FIXME: is this flag useful for a switch in/out of interrupt service mode? + desc.set_can_change_modes(); // FIXME: is this flag useful for a switch in/out of interrupt service mode? flag_input_reg(desc, REG_BIT_XAAU_PI); break; case 0x2: // goto pt @@ -255,7 +270,7 @@ bool dsp16_device_base::frontend::describe_goto_b(opcode_desc &desc, u16 op) case 0x5: case 0x6: case 0x7: - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); break; } return true; @@ -276,16 +291,17 @@ bool dsp16_device_base::frontend::describe_if_con(opcode_desc &desc, u16 op) switch (op_con(op)) { case 0xe: // true - desc.targetpc = (desc.physpc & XAAU_I_EXT) | (op_ja(next) & XAAU_I_MASK); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH; + desc.targetpc = (desc.pc & XAAU_I_EXT) | (op_ja(next) & XAAU_I_MASK); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); if (BIT(next, 15)) flag_output_reg(desc, REG_BIT_XAAU_PR); break; case 0xf: // false break; default: - desc.targetpc = (desc.physpc & XAAU_I_EXT) | (op_ja(next) & XAAU_I_MASK); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.targetpc = (desc.pc & XAAU_I_EXT) | (op_ja(next) & XAAU_I_MASK); + desc.set_is_conditional_branch(); if (BIT(next, 15)) flag_output_reg(desc, REG_BIT_XAAU_PR); } @@ -306,13 +322,15 @@ bool dsp16_device_base::frontend::describe_if_con(opcode_desc &desc, u16 op) case 0x5: case 0x6: case 0x7: - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); break; } if (op_b(next) == 0x1) // can't predicate ireturn? { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_CAN_CHANGE_MODES; // FIXME: confirm appropriate flags + desc.set_is_unconditional_branch(); // FIXME: confirm appropriate flags + desc.set_end_sequence(); + desc.set_can_change_modes(); flag_input_reg(desc, REG_BIT_XAAU_PI); } else @@ -321,7 +339,8 @@ bool dsp16_device_base::frontend::describe_if_con(opcode_desc &desc, u16 op) { case 0xe: // true desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); switch (op_b(next)) { case 0x0: // return @@ -340,7 +359,7 @@ bool dsp16_device_base::frontend::describe_if_con(opcode_desc &desc, u16 op) break; default: desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); switch (op_b(next)) { case 0x0: // return @@ -359,7 +378,7 @@ bool dsp16_device_base::frontend::describe_if_con(opcode_desc &desc, u16 op) break; default: - desc.flags |= OPFLAG_INVALID_OPCODE; // can't predicate things that aren't branches? + desc.set_invalid_opcode(); // can't predicate things that aren't branches? } describe_con(desc, op, true); return true; @@ -369,18 +388,22 @@ bool dsp16_device_base::frontend::describe_icall(opcode_desc &desc, u16 op) { desc.cycles = 3U; if (0x000eU != op_con(op)) // CON must be true for icall? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); switch (op_con(op)) { case 0xe: // true desc.targetpc = 0x0002U; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_CAN_CHANGE_MODES; // FIXME: confirm appropriate flags + desc.set_is_unconditional_branch(); // FIXME: confirm appropriate flags + desc.set_end_sequence(); + desc.set_can_change_modes(); break; case 0xf: // false break; default: desc.targetpc = 0x0002U; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_CAN_CHANGE_MODES; // FIXME: confirm appropriate flags + desc.set_is_unconditional_branch(); // FIXME: confirm appropriate flags + desc.set_end_sequence(); + desc.set_can_change_modes(); } describe_con(desc, op, true); return true; @@ -390,7 +413,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) { u16 const ni(op_ni(op)), k(op_k(op)); if (2U > k) // p3-25: "The iteration count can be between 2 and 127, inclusive" - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); desc.length = ni + 1; u32 cycles(0U), romcycles(0U), cachecycles(0U); for (u16 i = 0; i < ni; ++i) @@ -436,7 +459,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) case 0x08: // aT = R romcycles = cachecycles = 2U; if (op & 0x000fU) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); flag_output_reg(desc, op_d(op) ? REG_BIT_DAU_A0 : REG_BIT_DAU_A1, REG_BIT_DAU_PSW); describe_r(desc, op, true, false); break; @@ -445,7 +468,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) case 0x0b: // R = a1 romcycles = cachecycles = 2U; if (op & 0x000fU) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); flag_input_reg(desc, BIT(op, 12) ? REG_BIT_DAU_A1 : REG_BIT_DAU_A0, REG_BIT_DAU_AUC); describe_r(desc, op, false, true); break; @@ -453,7 +476,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) case 0x0c: // Y = R romcycles = cachecycles = 2U; if (op & 0x0400U) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); describe_r(desc, op, true, false); describe_y(desc, op, false, true); break; @@ -467,7 +490,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) case 0x0f: // R = Y romcycles = cachecycles = 2U; if (op & 0x0400U) // reserved field? - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); describe_r(desc, op, false, true); describe_y(desc, op, true, false); break; @@ -520,7 +543,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) romcycles = 2U; cachecycles = 1U; if (op & 0x000fU) - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); flag_input_reg(desc, BIT(op, 12) ? REG_BIT_DAU_A1 : REG_BIT_DAU_A0, REG_BIT_DAU_AUC); flag_output_reg(desc, REG_BIT_DAU_Y); describe_f1(desc, op); @@ -554,7 +577,7 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) case 0x18: // goto B case 0x1a: // if CON # icall case 0x1e: // Reserved - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); m_cache_valid = false; return false; // not going to get into what happens if you cache ineligible instructions } @@ -563,10 +586,11 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) } m_cache_cycles = cycles; m_cache_last_cycles = cycles + (romcycles - cachecycles); - m_cache_flags = desc.flags & (OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY); - std::copy_n(desc.regin, std::size(desc.regin), m_cache_regin); - std::copy_n(desc.regout, std::size(desc.regout), m_cache_regout); - std::copy_n(desc.regreq, std::size(desc.regreq), m_cache_regreq); + m_cache_regin = desc.regin; + m_cache_regout = desc.regout; + m_cache_regreq = desc.regreq; + m_cache_reads_memory = desc.reads_memory(); + m_cache_writes_memory = desc.writes_memory(); m_cache_valid = true; desc.cycles += (2U - romcycles) + ((k - 1) * cycles) + (romcycles - cachecycles); return true; @@ -577,21 +601,24 @@ bool dsp16_device_base::frontend::describe_redo(opcode_desc &desc, u16 op) desc.cycles = 2U; u16 const k(op_k(op)); if (2U > k) // p3-25: "The iteration count can be between 2 and 127, inclusive" - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); - // assume that the block follwoing the last do K { ... } we examined is still cached - we can check properly when we actually run + // assume that the block following the last do K { ... } we examined is still cached - we can check properly when we actually run if (!m_cache_valid) { - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); return false; } else { desc.cycles += ((k - 1) * m_cache_cycles) + m_cache_last_cycles; - desc.flags |= m_cache_flags; - std::copy_n(m_cache_regin, std::size(desc.regin), desc.regin); - std::copy_n(m_cache_regout, std::size(desc.regout), desc.regout); - std::copy_n(m_cache_regreq, std::size(desc.regreq), desc.regreq); + desc.regin = m_cache_regin; + desc.regout = m_cache_regout; + desc.regreq = m_cache_regreq; + if (m_cache_reads_memory) + desc.set_reads_memory(); + if (m_cache_writes_memory) + desc.set_writes_memory(); return true; } } @@ -663,7 +690,7 @@ void dsp16_device_base::frontend::describe_r(opcode_desc &desc, u16 op, bool rea case 0x1e: // pdx1 break; default: - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); } } @@ -680,7 +707,7 @@ void dsp16_device_base::frontend::describe_con(opcode_desc &desc, u16 op, bool i flag_input_reg(desc, REG_BIT_DAU_PSW); break; case 0x4: // heads/tails - throw emu_fatalerror("DSP16: unimplemented CON value %02X (PC = %04X)\n", con, desc.physpc); + throw emu_fatalerror("DSP16: unimplemented CON value %02X (PC = %04X)\n", con, desc.pc); case 0x5: // c0ge/c0lt case 0x6: // c1ge/c1lt { @@ -694,7 +721,7 @@ void dsp16_device_base::frontend::describe_con(opcode_desc &desc, u16 op, bool i case 0x7: // true/false break; default: - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); } } @@ -796,7 +823,7 @@ void dsp16_device_base::frontend::describe_f2(opcode_desc &desc, u16 op) flag_output_reg(desc, d, REG_BIT_DAU_PSW); break; case 0xa: // Reserved - desc.flags |= OPFLAG_INVALID_OPCODE; + desc.set_invalid_opcode(); break; case 0xc: // aD = y flag_input_reg(desc, REG_BIT_DAU_Y); @@ -807,7 +834,7 @@ void dsp16_device_base::frontend::describe_f2(opcode_desc &desc, u16 op) void dsp16_device_base::frontend::describe_x(opcode_desc &desc, u16 op) { - desc.flags |= OPFLAG_READS_MEMORY; // TODO: is reading ROM the same as memory for dependency purposes? + desc.set_reads_memory(); // TODO: is reading ROM the same as memory for dependency purposes? flag_input_reg(desc, REG_BIT_XAAU_PT); flag_output_reg(desc, REG_BIT_XAAU_PT, REG_BIT_DAU_X); if (op_x(op)) @@ -818,9 +845,9 @@ void dsp16_device_base::frontend::describe_y(opcode_desc &desc, u16 op, bool rea { u32 const r(REG_BIT_YAAU_R0 + ((op >> 2) & 0x0003U)); if (read) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); if (write) - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); switch (op & 0x0003U) { case 0x0: // *rN @@ -845,7 +872,8 @@ void dsp16_device_base::frontend::describe_y(opcode_desc &desc, u16 op, bool rea void dsp16_device_base::frontend::describe_z(opcode_desc &desc, u16 op) { u32 const r(REG_BIT_YAAU_R0 + ((op >> 2) & 0x0003U)); - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY; + desc.set_reads_memory(); + desc.set_writes_memory(); flag_output_reg(desc, r); switch (op & 0x0003U) { diff --git a/src/devices/cpu/dsp16/dsp16fe.h b/src/devices/cpu/dsp16/dsp16fe.h index 8dc3b96700e..1045aa5e2aa 100644 --- a/src/devices/cpu/dsp16/dsp16fe.h +++ b/src/devices/cpu/dsp16/dsp16fe.h @@ -15,7 +15,37 @@ #include "cpu/drcfe.h" -class dsp16_device_base::frontend : public drc_frontend +class dsp16_device_base::opcode_desc : public opcode_desc_base +{ +public: + u32 cycles; + + void set_can_change_modes() { m_can_change_modes = true; } + void set_reads_memory() { m_reads_memory = true; } + void set_writes_memory() { m_writes_memory = true; } + + bool can_change_modes() const { return m_can_change_modes; } + bool reads_memory() const { return m_reads_memory; } + bool writes_memory() const { return m_writes_memory; } + + void reset(offs_t curpc, bool in_delay_slot) + { + opcode_desc_base::reset(curpc, in_delay_slot); + + cycles = 0; + m_can_change_modes = false; + m_reads_memory = false; + m_writes_memory = false; + } + +private: + bool m_can_change_modes; + bool m_reads_memory; + bool m_writes_memory; +}; + + +class dsp16_device_base::frontend : public drc_frontend_base { public: enum : u8 @@ -59,12 +89,13 @@ public: // construction/destruction frontend(dsp16_device_base &host, u32 window_start, u32 window_end, u32 max_sequence); + ~frontend(); -protected: - // drc_frontend implementation - virtual bool describe(opcode_desc &desc, opcode_desc const *prev) override; + opcode_desc const *describe_code(offs_t startpc); private: + bool describe(opcode_desc &desc, opcode_desc const *prev); + // program fetch helpers u16 read_op(opcode_desc const &desc, u16 offset); u16 read_op(opcode_desc const &desc) { return read_op(desc, 0U); } @@ -87,10 +118,10 @@ private: static void describe_z(opcode_desc &desc, u16 op); // field access helpers - static void flag_reg(u32 (&flags)[4]) { } - template static void flag_reg(u32 (&flags)[4], u8 reg0, T... regn) + static void flag_reg(opcode_desc::regmask &flags) { } + template static void flag_reg(opcode_desc::regmask &flags, u8 reg0, T... regn) { - flags[reg0 >> 5] |= (u32(1) << (reg0 & (u32(32) - 1))); + flags.set(reg0); flag_reg(flags, regn...); } template static void flag_input_reg(opcode_desc &desc, T... reg) { flag_reg(desc.regin, reg...); } @@ -101,8 +132,9 @@ private: dsp16_device_base &m_host; // for making sweeping assumptions - u32 m_cache_cycles = 0U, m_cache_last_cycles = 0U, m_cache_flags = 0U; - decltype(opcode_desc::regin) m_cache_regin, m_cache_regout, m_cache_regreq; + u32 m_cache_cycles = 0U, m_cache_last_cycles = 0U; + opcode_desc::regmask m_cache_regin, m_cache_regout, m_cache_regreq; + bool m_cache_reads_memory = false, m_cache_writes_memory = false; bool m_cache_valid = false; }; diff --git a/src/devices/cpu/dspp/dspp.cpp b/src/devices/cpu/dspp/dspp.cpp index 92aa9cb7f06..9d7ed45d37b 100644 --- a/src/devices/cpu/dspp/dspp.cpp +++ b/src/devices/cpu/dspp/dspp.cpp @@ -142,7 +142,14 @@ dspp_bulldog_device::dspp_bulldog_device(const machine_config &mconfig, const ch { } -dspp_device::dspp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor code_map_ctor, address_map_constructor data_map_ctor) : +dspp_device::dspp_device( + const machine_config &mconfig, + device_type type, + const char *tag, + device_t *owner, + uint32_t clock, + address_map_constructor code_map_ctor, + address_map_constructor data_map_ctor) : cpu_device(mconfig, type, tag, owner, clock), m_int_handler(*this), m_dma_read_handler(*this, 0), @@ -184,6 +191,10 @@ dspp_device::dspp_device(const machine_config &mconfig, device_type type, const #endif } +dspp_device::~dspp_device() +{ +} + //------------------------------------------------- // device_start - start up the device @@ -201,7 +212,7 @@ void dspp_device::device_start() uint32_t flags = 0; m_drcuml = std::make_unique(*this, m_cache, flags, 1, 16, 0); - m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); + m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); } else { diff --git a/src/devices/cpu/dspp/dspp.h b/src/devices/cpu/dspp/dspp.h index b7220dea5af..f5a2bd770b7 100644 --- a/src/devices/cpu/dspp/dspp.h +++ b/src/devices/cpu/dspp/dspp.h @@ -13,7 +13,6 @@ #pragma once -#include "cpu/drcfe.h" #include "cpu/drcuml.h" @@ -21,18 +20,14 @@ // TYPE DEFINITIONS //************************************************************************** -class dspp_frontend; - // ======================> dspp_device class dspp_device : public cpu_device { - friend class dspp_frontend; public: // Construction/destruction - dspp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor code_map_ctor, - address_map_constructor data_map_ctor); dspp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ~dspp_device(); // Static configuration helpers auto int_handler() { return m_int_handler.bind(); } @@ -73,24 +68,36 @@ public: void host_gw_control_write(offs_t offset, u16 data); protected: - // device-level overrides + class frontend; + class opcode_desc; + + dspp_device( + const machine_config &mconfig, + device_type type, + const char *tag, + device_t *owner, + uint32_t clock, + address_map_constructor code_map_ctor, + address_map_constructor data_map_ctor); + + // device_t implementation virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; - // device_execute_interface overrides + // device_execute_interface implementation virtual uint32_t execute_min_cycles() const noexcept override; virtual uint32_t execute_max_cycles() const noexcept override; virtual void execute_run() override; - // device_memory_interface overrides + // device_memory_interface implementation virtual space_config_vector memory_space_config() const override; - // device_state_interface overrides + // device_state_interface implementation virtual void state_import(const device_state_entry &entry) override; virtual void state_export(const device_state_entry &entry) override; virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - // device_disasm_interface overrides + // device_disasm_interface implementation virtual std::unique_ptr create_disassembler() override; void code_map(address_map &map) ATTR_COLD; @@ -309,7 +316,7 @@ private: bool m_cache_dirty; drc_cache m_cache; std::unique_ptr m_drcuml; - std::unique_ptr m_drcfe; + std::unique_ptr m_drcfe; uint32_t m_drcoptions; /* internal compiler state */ diff --git a/src/devices/cpu/dspp/dsppdrc.cpp b/src/devices/cpu/dspp/dsppdrc.cpp index 4992c0acf6d..6ba81c5baf5 100644 --- a/src/devices/cpu/dspp/dsppdrc.cpp +++ b/src/devices/cpu/dspp/dsppdrc.cpp @@ -35,11 +35,6 @@ inline void dspp_device::alloc_handle(code_handle **handleptr, const char *name) *handleptr = m_drcuml->handle_alloc(name); } -static inline uint32_t epc(const opcode_desc *desc) -{ - return desc->pc; -} - #if 0 static void cfunc_unimplemented(void *param) @@ -210,7 +205,7 @@ void dspp_device::compile_block(offs_t pc) /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + if (seqlast->end_sequence()) break; assert(seqlast != nullptr); @@ -238,7 +233,7 @@ void dspp_device::compile_block(offs_t pc) generate_checksum_block(block, &compiler, seqhead, seqlast); /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc compiler.abortlabel = compiler.labelnum++; @@ -249,7 +244,7 @@ void dspp_device::compile_block(offs_t pc) UML_LABEL(block, compiler.abortlabel); /* if we need to return to the start, do it */ - if (seqlast->flags & OPFLAG_RETURN_TO_START) + if (seqlast->return_to_start()) nextpc = pc; /* otherwise we just go to the next instruction */ @@ -281,13 +276,13 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c if (m_drcuml->logging()) block.append_comment("[Validation for %08X]", seqhead->pc); // comment - /* loose verify or single instruction: just compare and fail */ if (false/*!(m_drcoptions & DSPPDRC_STRICT_VERIFY)*/ || seqhead->next() == nullptr) { - if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + // loose verify or single instruction: just compare and fail + if (!seqhead->virtual_noop()) { - uint32_t sum = seqhead->opptr.w[0]; - uint32_t addr = seqhead->physpc; + uint32_t sum = seqhead->opptr[0]; + uint32_t addr = seqhead->pc; const void *base = m_code_cache.read_ptr(addr); UML_MOV(block, I0, 0); UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,word @@ -296,27 +291,28 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc } } - - /* full verification; sum up everything */ else { + // full verification; sum up everything uint32_t sum = 0; - uint32_t addr = seqhead->physpc; + uint32_t addr = seqhead->pc; const void *base = m_code_cache.read_ptr(addr); UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,dword - sum += seqhead->opptr.w[0]; + sum += seqhead->opptr[0]; for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + if (!curdesc->virtual_noop()) { - addr = curdesc->physpc; + addr = curdesc->pc; base = m_code_cache.read_ptr(addr); assert(base != nullptr); UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->opptr.w[0]; + sum += curdesc->opptr[0]; } + } UML_CMP(block, I0, sum); // cmp i0,sum - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); // exne nocode,seqhead->pc } } @@ -414,16 +410,8 @@ void dspp_device::generate_sequence_instruction(drcuml_block &block, compiler_st UML_DEBUG(block, desc->pc); // debug desc->pc } - /* if we hit an unmapped address, fatal error */ - if (desc->flags & OPFLAG_COMPILER_UNMAPPED) - { - UML_MOV(block, mem(&m_core->m_pc), desc->pc); // mov [pc],desc->pc - save_fast_iregs(block); // - UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE - } - /* unless this is a virtual no-op, it's a regular instruction */ - if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!desc->virtual_noop()) { generate_opcode(block, compiler, desc); } @@ -443,7 +431,7 @@ void dspp_device::generate_update_cycles(drcuml_block &block, compiler_state *co void dspp_device::generate_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint16_t op = desc->opptr.w[0]; + uint16_t op = desc->opptr[0]; UML_SUB(block, mem(&m_core->m_tclock), mem(&m_core->m_tclock), 1); UML_CALLC(block, cfunc_update_fifo_dma, this); @@ -457,7 +445,7 @@ void dspp_device::generate_opcode(drcuml_block &block, compiler_state *compiler, //UML_TEST(block, mem(&m_core->m_flag_sleep), 1); //UML_JMPc(block, COND_NZ, compiler->abortlabel); - //UML_MOV(block, mem(&m_core->m_arg0), desc->physpc); + //UML_MOV(block, mem(&m_core->m_arg0), desc->pc); //UML_MOV(block, mem(&m_core->m_arg1), op); //UML_CALLC(block, cfunc_print_sums, this); @@ -509,7 +497,7 @@ void dspp_device::generate_set_rbase(drcuml_block &block, compiler_state *compil void dspp_device::generate_super_special(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint16_t op = desc->opptr.w[0]; + uint16_t op = desc->opptr[0]; uint32_t sel = (op >> 7) & 7; switch (sel) @@ -560,7 +548,7 @@ void dspp_device::generate_super_special(drcuml_block &block, compiler_state *co void dspp_device::generate_special_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint16_t op = desc->opptr.w[0]; + uint16_t op = desc->opptr[0]; switch ((op >> 10) & 7) { @@ -666,7 +654,7 @@ void dspp_device::generate_branch(drcuml_block &block, compiler_state *compiler, if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { generate_update_cycles(block, &compiler_temp, desc->targetpc); // - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000 else UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp ,desc->targetpc,nocode @@ -686,7 +674,7 @@ void dspp_device::generate_branch(drcuml_block &block, compiler_state *compiler, void dspp_device::generate_branch_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint16_t op = desc->opptr.w[0]; + uint16_t op = desc->opptr[0]; if (m_drcuml->logging()) block.append_comment("branch_opcode"); @@ -734,7 +722,7 @@ void dspp_device::generate_branch_opcode(drcuml_block &block, compiler_state *co void dspp_device::generate_complex_branch_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint16_t op = desc->opptr.w[0]; + uint16_t op = desc->opptr[0]; switch ((op >> 10) & 7) { @@ -929,7 +917,7 @@ void dspp_device::generate_parse_operands(drcuml_block &block, compiler_state *c void dspp_device::generate_read_next_operand(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - //uint16_t op = (uint16_t)desc->opptr.w[0]; + //uint16_t op = desc->opptr[0]; code_label no_load; if (m_drcuml->logging()) @@ -977,7 +965,7 @@ void dspp_device::generate_write_next_operand(drcuml_block &block, compiler_stat void dspp_device::generate_arithmetic_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint16_t op = (uint16_t)desc->opptr.w[0]; + uint16_t op = desc->opptr[0]; uint32_t numops = (op >> 13) & 3; uint32_t muxa = (op >> 10) & 3; uint32_t muxb = (op >> 8) & 3; diff --git a/src/devices/cpu/dspp/dsppfe.cpp b/src/devices/cpu/dspp/dsppfe.cpp index 19b2cb1a3b8..f614a327bc9 100644 --- a/src/devices/cpu/dspp/dsppfe.cpp +++ b/src/devices/cpu/dspp/dsppfe.cpp @@ -10,71 +10,32 @@ #include "emu.h" #include "dsppfe.h" +#include "cpu/drcfe.ipp" -//#define REG_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0) -//#define REG_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0) -#define CC_C_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) -#define CC_C_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) -#define CC_Z_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) -#define CC_Z_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) -#define CC_N_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) -#define CC_N_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) -#define CC_V_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) -#define CC_V_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) -#define CC_X_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) -#define CC_X_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) - -#define CC_FLAGS_MODIFIED(desc) do { } while(0) - -dspp_frontend::dspp_frontend(dspp_device *dspp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*dspp, window_start, window_end, max_sequence), - m_dspp(dspp) +dspp_device::frontend::frontend(dspp_device *dspp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend_base(dspp->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) + , m_dspp(dspp) { } - -#if 0 -// opcode branch flags -const uint32_t OPFLAG_IS_UNCONDITIONAL_BRANCH = 0x00000001; // instruction is unconditional branch -const uint32_t OPFLAG_IS_CONDITIONAL_BRANCH = 0x00000002; // instruction is conditional branch -const uint32_t OPFLAG_IS_BRANCH = (OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_IS_CONDITIONAL_BRANCH); -const uint32_t OPFLAG_IS_BRANCH_TARGET = 0x00000004; // instruction is the target of a branch -const uint32_t OPFLAG_IN_DELAY_SLOT = 0x00000008; // instruction is in the delay slot of a branch -const uint32_t OPFLAG_INTRABLOCK_BRANCH = 0x00000010; // instruction branches within the block - -// opcode exception flags -const uint32_t OPFLAG_CAN_TRIGGER_SW_INT = 0x00000020; // instruction can trigger a software interrupt -const uint32_t OPFLAG_CAN_EXPOSE_EXTERNAL_INT = 0x00000040; // instruction can expose an external interrupt -const uint32_t OPFLAG_CAN_CAUSE_EXCEPTION = 0x00000080; // instruction may generate exception -const uint32_t OPFLAG_WILL_CAUSE_EXCEPTION = 0x00000100; // instruction will generate exception -const uint32_t OPFLAG_PRIVILEGED = 0x00000200; // instruction is privileged - -// opcode virtual->physical translation flags -const uint32_t OPFLAG_VALIDATE_TLB = 0x00000400; // instruction must validate TLB before execution -const uint32_t OPFLAG_MODIFIES_TRANSLATION = 0x00000800; // instruction modifies the TLB -const uint32_t OPFLAG_COMPILER_PAGE_FAULT = 0x00001000; // compiler hit a page fault when parsing -const uint32_t OPFLAG_COMPILER_UNMAPPED = 0x00002000; // compiler hit unmapped memory when parsing - -// opcode flags -const uint32_t OPFLAG_INVALID_OPCODE = 0x00004000; // instruction is invalid -const uint32_t OPFLAG_VIRTUAL_NOOP = 0x00008000; // instruction is a virtual no-op - -// opcode sequence flow flags -const uint32_t OPFLAG_REDISPATCH = 0x00010000; // instruction must redispatch after completion -const uint32_t OPFLAG_RETURN_TO_START = 0x00020000; // instruction must jump back to the beginning after completion -const uint32_t OPFLAG_END_SEQUENCE = 0x00040000; // this is the last instruction in a sequence -const uint32_t OPFLAG_CAN_CHANGE_MODES = 0x00080000; // instruction can change modes - -// execution semantics -const uint32_t OPFLAG_READS_MEMORY = 0x00100000; // instruction reads memory -const uint32_t OPFLAG_WRITES_MEMORY = 0x00200000; // instruction writes memory -#endif - -bool dspp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +dspp_device::frontend::~frontend() { - uint16_t op = desc.opptr.w[0] = m_dspp->read_op(desc.physpc); +} + + +dspp_device::opcode_desc const *dspp_device::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + + +bool dspp_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) +{ + const uint16_t op = desc.opptr[0] = m_dspp->read_op(desc.pc); desc.cycles = 1; desc.length = 1; @@ -104,7 +65,7 @@ bool dspp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return true; } -void dspp_frontend::describe_special(uint16_t op, opcode_desc &desc) +void dspp_device::frontend::describe_special(uint16_t op, opcode_desc &desc) { switch ((op >> 10) & 7) { @@ -115,13 +76,15 @@ void dspp_frontend::describe_special(uint16_t op, opcode_desc &desc) { case 1: // BAC { - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; return; } case 4: // RTS { - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; return; } @@ -133,7 +96,8 @@ void dspp_frontend::describe_special(uint16_t op, opcode_desc &desc) case 7: // SLEEP { - desc.flags |= OPFLAG_END_SEQUENCE | OPFLAG_RETURN_TO_START; + desc.set_end_sequence(); + desc.set_return_to_start(); return; } @@ -148,13 +112,15 @@ void dspp_frontend::describe_special(uint16_t op, opcode_desc &desc) } case 1: // JUMP { - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = op & 0x3ff; return; } case 2: // JSR { - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = op & 0x3ff; return; } @@ -165,11 +131,11 @@ void dspp_frontend::describe_special(uint16_t op, opcode_desc &desc) } case 4: // MOVEREG { - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); // Indirect if (op & 0x0010) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); parse_operands(op, desc, 1); return; @@ -180,84 +146,85 @@ void dspp_frontend::describe_special(uint16_t op, opcode_desc &desc) } case 6: // MOVED { - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); parse_operands(op, desc, 1); return; } case 7: // MOVEI { - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY; + desc.set_reads_memory(); + desc.set_writes_memory(); parse_operands(op, desc, 1); return; } } } -void dspp_frontend::describe_branch(uint16_t op, opcode_desc &desc) +void dspp_device::frontend::describe_branch(uint16_t op, opcode_desc &desc) { const uint32_t select = (op >> 12) & 1; if (select == 0) { - CC_N_USED(desc); - CC_V_USED(desc); + desc.set_cc_n_used(); + desc.set_cc_v_used(); } else { - CC_C_USED(desc); - CC_Z_USED(desc); + desc.set_cc_c_used(); + desc.set_cc_z_used(); } // TODO: Can these be unconditional? - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = op & 0x3ff; } -void dspp_frontend::describe_complex_branch(uint16_t op, opcode_desc &desc) +void dspp_device::frontend::describe_complex_branch(uint16_t op, opcode_desc &desc) { switch ((op >> 10) & 7) { case 0: // BLT - CC_N_USED(desc); - CC_V_USED(desc); + desc.set_cc_n_used(); + desc.set_cc_v_used(); break; case 1: // BLE - CC_N_USED(desc); - CC_V_USED(desc); - CC_Z_USED(desc); + desc.set_cc_n_used(); + desc.set_cc_v_used(); + desc.set_cc_z_used(); break; case 2: // BGE - CC_N_USED(desc); - CC_V_USED(desc); + desc.set_cc_n_used(); + desc.set_cc_v_used(); break; case 3: // BGT - CC_N_USED(desc); - CC_V_USED(desc); - CC_Z_USED(desc); + desc.set_cc_n_used(); + desc.set_cc_v_used(); + desc.set_cc_z_used(); break; case 4: // BHI case 5: // BLS - CC_C_USED(desc); - CC_Z_USED(desc); + desc.set_cc_c_used(); + desc.set_cc_z_used(); break; case 6: // BXS case 7: // BXC - CC_X_USED(desc); + desc.set_cc_x_used(); break; } - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = op & 0x3ff; } -void dspp_frontend::describe_arithmetic(uint16_t op, opcode_desc &desc) +void dspp_device::frontend::describe_arithmetic(uint16_t op, opcode_desc &desc) { // Decode the various fields uint32_t numops = (op >> 13) & 3; - uint32_t muxa = (op >> 10) & 3; - uint32_t muxb = (op >> 8) & 3; - uint32_t alu_op = (op >> 4) & 0xf; - uint32_t barrel_code = op & 0xf; + const uint32_t muxa = (op >> 10) & 3; + const uint32_t muxb = (op >> 8) & 3; + const uint32_t alu_op = (op >> 4) & 0xf; + const uint32_t barrel_code = op & 0xf; // Check for operand overflow if (numops == 0 && ((muxa == 1) || (muxa == 2) || (muxb == 1) || (muxb == 2))) @@ -278,7 +245,7 @@ void dspp_frontend::describe_arithmetic(uint16_t op, opcode_desc &desc) if (muxa > 0 || muxb > 0) { - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } switch (alu_op) @@ -304,32 +271,32 @@ void dspp_frontend::describe_arithmetic(uint16_t op, opcode_desc &desc) case 14: // _XOR case 15: // _XNOR { - CC_C_MODIFIED(desc); - CC_V_MODIFIED(desc); + desc.set_cc_c_modified(); + desc.set_cc_v_modified(); break; } case 3: // _+C case 5: // _-B { - CC_C_USED(desc); - CC_C_MODIFIED(desc); + desc.set_cc_c_used(); + desc.set_cc_c_modified(); break; } } - CC_N_MODIFIED(desc); - CC_Z_MODIFIED(desc); - CC_X_MODIFIED(desc); + desc.set_cc_n_modified(); + desc.set_cc_z_modified(); + desc.set_cc_x_modified(); } -void dspp_frontend::parse_operands(uint16_t op, opcode_desc &desc, uint32_t numops) +void dspp_device::frontend::parse_operands(uint16_t op, opcode_desc &desc, uint32_t numops) { uint32_t numregs = 0; uint32_t opidx = 0; while (opidx < numops) { - uint16_t operand = desc.opptr.w[opidx + 1] = m_dspp->read_op(desc.physpc + opidx + 1); + uint16_t operand = desc.opptr[opidx + 1] = m_dspp->read_op(desc.pc + opidx + 1); desc.length++; desc.cycles++; @@ -344,10 +311,10 @@ void dspp_frontend::parse_operands(uint16_t op, opcode_desc &desc, uint32_t numo else if((operand & 0xe000) == 0x8000) { if (operand & 0x0400) // Indirect - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); if (operand & 0x0800 )// Write Back - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); opidx++; } @@ -373,21 +340,21 @@ void dspp_frontend::parse_operands(uint16_t op, opcode_desc &desc, uint32_t numo if (regdi & 0x0010) { // Indirect - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } if (numregs == 2) { // Write back if ((i == 0) && (operand & 0x1000)) - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); else if ((i == 1) && (operand & 0x0800)) - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else if (numregs == 1) { if (operand & 0x800) - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } opidx++; } diff --git a/src/devices/cpu/dspp/dsppfe.h b/src/devices/cpu/dspp/dsppfe.h index 5c0023e313a..b4eccfda3ee 100644 --- a/src/devices/cpu/dspp/dsppfe.h +++ b/src/devices/cpu/dspp/dsppfe.h @@ -14,51 +14,81 @@ #pragma once #include "dspp.h" + #include "cpu/drcfe.h" - -//************************************************************************** -// MACROS -//************************************************************************** - -// register flags 0 -#define REGFLAG_R(n) (1 << (n)) -#define REGFLAG_RZ(n) (((n) == 0) ? 0 : REGFLAG_R(n)) - -// register flags 1 -#define REGFLAG_FR(n) (1 << (n)) - -// register flags 2 -#define REGFLAG_CR(n) (0xf0000000 >> (4 * (n))) -#define REGFLAG_CR_BIT(n) (0x80000000 >> (n)) - -// register flags 3 -#define REGFLAG_XER_CA (1 << 0) -#define REGFLAG_XER_OV (1 << 1) -#define REGFLAG_XER_SO (1 << 2) -#define REGFLAG_XER_COUNT (1 << 3) -#define REGFLAG_CTR (1 << 4) -#define REGFLAG_LR (1 << 5) -#define REGFLAG_FPSCR(n) (1 << (6 + (n))) - +#include +#include //************************************************************************** // TYPE DEFINITIONS //************************************************************************** -class dspp_frontend : public drc_frontend +class dspp_device::opcode_desc : public opcode_desc_base +{ +public: + uint16_t opptr[6]; // copy of opcode and operands + + uint32_t cycles; // number of cycles needed to execute + + void set_cc_c_used() { regin.set(REG_CC_C); } + void set_cc_c_modified() { regout.set(REG_CC_C); } + void set_cc_z_used() { regin.set(REG_CC_Z); } + void set_cc_z_modified() { regout.set(REG_CC_Z); } + void set_cc_n_used() { regin.set(REG_CC_N); } + void set_cc_n_modified() { regout.set(REG_CC_N); } + void set_cc_v_used() { regin.set(REG_CC_V); } + void set_cc_v_modified() { regout.set(REG_CC_V); } + void set_cc_x_used() { regin.set(REG_CC_X); } + void set_cc_x_modified() { regout.set(REG_CC_X); } + + void set_reads_memory() { m_reads_memory = true; } + void set_writes_memory() { m_writes_memory = true; } + + bool reads_memory() const { return m_reads_memory; } + bool writes_memory() const { return m_writes_memory; } + + uint32_t epc() const { return pc; } + + void reset(offs_t curpc, bool in_delay_slot) + { + static_assert(REG_COUNT <= 16); + + opcode_desc_base::reset(curpc, in_delay_slot); + + std::fill(std::begin(opptr), std::end(opptr), 0); + cycles = 0; + } + +private: + enum + { + REG_CC_C = 0, + REG_CC_Z, + REG_CC_N, + REG_CC_V, + REG_CC_X, + + REG_COUNT + }; + + bool m_reads_memory; + bool m_writes_memory; +}; + + +class dspp_device::frontend : public drc_frontend_base { public: // construction/destruction - dspp_frontend(dspp_device *dspp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + frontend(dspp_device *dspp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); -protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + opcode_desc const *describe_code(offs_t startpc); private: - // inlines + bool describe(opcode_desc &desc, opcode_desc const *prev); // internal helpers void describe_special(uint16_t op, opcode_desc &desc); diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index b3a44a8f923..6d4b1792552 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1620,7 +1620,7 @@ void hyperstone_device::device_start() m_drcuml->symbol_add(&m_core->arg1, sizeof(uint32_t), "arg1"); // initialize the front-end helper - m_drcfe = std::make_unique(*this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, m_single_instruction_mode ? 1 : COMPILE_MAX_SEQUENCE); + m_drcfe = std::make_unique(*this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, m_single_instruction_mode ? 1 : COMPILE_MAX_SEQUENCE); // generate invariant code generate_invariant(); diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 17b8012480b..a04c9762812 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -7,9 +7,7 @@ #include "32xsdasm.h" -#include "cpu/drcfe.h" #include "cpu/drcuml.h" -#include "cpu/drcumlsh.h" #include @@ -44,9 +42,6 @@ // TYPE DEFINITIONS //************************************************************************** -class e132xs_frontend; - - enum { E132XS_PC = 1, @@ -107,8 +102,6 @@ enum // Used by core CPU interface class hyperstone_device : public cpu_device, public hyperstone_disassembler::config { - friend class e132xs_frontend; - public: // input line numbers static inline constexpr int INPUT_INT1 = 0; @@ -125,6 +118,9 @@ public: virtual ~hyperstone_device() override; protected: + class frontend; + class opcode_desc; + using b_r_delegate = delegate; using hw_r_delegate = delegate; using w_r_delegate = delegate; @@ -445,7 +441,7 @@ private: drc_cache m_cache; std::unique_ptr m_drcuml; - std::unique_ptr m_drcfe; + std::unique_ptr m_drcfe; uint32_t m_drcoptions; bool m_single_instruction_mode; uint8_t m_cache_dirty; diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 597f7576eb8..88b7bdc11fa 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -3,8 +3,11 @@ #include "emu.h" #include "e132xs.h" -#include "e132xsfe.h" + #include "32xsdefs.h" +#include "e132xsfe.h" + +#include "cpu/drcumlsh.h" /* map variables */ @@ -13,17 +16,6 @@ -/*------------------------------------------------- - epc - compute the exception PC from a - descriptor --------------------------------------------------*/ - -static inline uint32_t epc(const opcode_desc *desc) -{ - return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->branch->pc : desc->pc; -} - - /*------------------------------------------------- alloc_handle - allocate a handle if not already allocated @@ -294,7 +286,7 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + if (seqlast->end_sequence()) break; assert(seqlast != nullptr); @@ -319,11 +311,11 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) } // validate this code block if we're not pointing into ROM - if (m_program->get_write_ptr(seqhead->physpc) != nullptr) + if (m_program->get_write_ptr(seqhead->pc) != nullptr) generate_checksum_block(block, compiler, seqhead, seqlast); // label this instruction, if it may be jumped to locally - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) UML_LABEL(block, seqhead->pc | 0x80000000); UML_MOV(block, I7, 0); @@ -337,7 +329,7 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) } uint32_t nextpc; - if (seqlast->flags & OPFLAG_RETURN_TO_START) /* if we need to return to the start, do it */ + if (seqlast->return_to_start()) /* if we need to return to the start, do it */ nextpc = pc; else /* otherwise we just go to the next instruction */ nextpc = seqlast->pc + seqlast->length; @@ -695,10 +687,10 @@ void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_st /* loose verify or single instruction: just compare and fail */ if (!(m_drcoptions & E132XS_STRICT_VERIFY) || !seqhead->next()) { - if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + if (!seqhead->virtual_noop()) { - uint32_t sum = seqhead->opptr.w[0]; - uint32_t addr = seqhead->physpc; + uint32_t sum = seqhead->opptr[0]; + uint32_t addr = seqhead->pc; const void *base = m_prptr(addr); if (!base) { @@ -708,32 +700,32 @@ void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_st auto const *delayslot = seqhead->delay.first(); const void *delaybase = nullptr; - if (delayslot && (seqhead->physpc != delayslot->physpc)) + if (delayslot && (seqhead->pc != delayslot->pc)) { - delaybase = m_prptr(delayslot->physpc); + delaybase = m_prptr(delayslot->pc); if (!delaybase) { - osd_printf_info("%s: cache read_ptr returned nullptr for address %08x\n", tag(), delayslot->physpc); + osd_printf_info("%s: cache read_ptr returned nullptr for address %08x\n", tag(), delayslot->pc); } } UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x1); - if (delayslot && (seqhead->physpc != delayslot->physpc)) + if (delayslot && (seqhead->pc != delayslot->pc)) { UML_LOAD(block, I1, delaybase, 0, SIZE_WORD, SCALE_x1); UML_ADD(block, I0, I0, I1); - sum += delayslot->opptr.w[0]; + sum += delayslot->opptr[0]; } UML_CMP(block, I0, sum); - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); } } else /* full verification; sum up everything */ { - uint32_t addr = seqhead->physpc; + uint32_t addr = seqhead->pc; const void *base = m_prptr(addr); if (!base) { @@ -743,32 +735,32 @@ void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_st UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x1); - uint32_t sum = seqhead->opptr.w[0]; + uint32_t sum = seqhead->opptr[0]; for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) { - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!curdesc->virtual_noop()) { - addr = curdesc->physpc; + addr = curdesc->pc; base = m_prptr(addr); assert(base != nullptr); UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x1); UML_ADD(block, I0, I0, I1); - sum += curdesc->opptr.w[0]; + sum += curdesc->opptr[0]; - if (curdesc->delay.first() != nullptr && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) + if (curdesc->delay.first() != nullptr && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->pc != curdesc->delay.first()->pc))) { - addr = curdesc->delay.first()->physpc; + addr = curdesc->delay.first()->pc; base = m_prptr(addr); assert(base != nullptr); UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x1); UML_ADD(block, I0, I0, I1); - sum += curdesc->delay.first()->opptr.w[0]; + sum += curdesc->delay.first()->opptr[0]; } } } UML_CMP(block, I0, sum); - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); } } @@ -800,7 +792,7 @@ void hyperstone_device::generate_branch(drcuml_block &block, compiler_state &com generate_update_cycles(block); - if (desc && (mode == compiler.mode()) && (desc->flags & OPFLAG_INTRABLOCK_BRANCH)) + if (desc && (mode == compiler.mode()) && desc->intrablock_branch()) { assert(desc->targetpc != BRANCH_TARGET_DYNAMIC); @@ -831,8 +823,8 @@ void hyperstone_device::generate_branch(drcuml_block &block, compiler_state &com void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { // add an entry for the log - if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); + if (m_drcuml->logging() && !desc->virtual_noop()) + log_add_disasm_comment(block, desc->pc, desc->opptr[0]); // check for pending interrupts UML_SUB(block, I0, mem(&m_core->intblock), 1); @@ -851,7 +843,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compi UML_DEBUG(block, desc->pc); } - if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!desc->virtual_noop()) { // set the PC map variable UML_MAPVAR(block, MAPVAR_PC, compiler.set_pc(desc->pc + desc->length)); @@ -898,7 +890,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compi } else { - UML_MOV(block, mem(&m_core->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_core->arg0), desc->opptr[0]); UML_CALLC(block, &c_funcs::unimplemented, this); } } @@ -908,7 +900,7 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compi bool hyperstone_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = (uint32_t)desc->opptr.w[0]; + uint32_t op = (uint32_t)desc->opptr[0]; switch (op >> 8) { diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index bc8675fa7c9..ee3cce9b584 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -37,7 +37,7 @@ uint32_t hyperstone_device::generate_get_const(const opcode_desc *desc) uint32_t hyperstone_device::generate_get_immediate_s(const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; switch (op & 0xf) { @@ -56,7 +56,7 @@ uint32_t hyperstone_device::generate_get_immediate_s(const opcode_desc *desc) uint32_t hyperstone_device::generate_get_pcrel(const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; if (op & 0x80) { @@ -332,7 +332,7 @@ uml::parameter hyperstone_device::generate_load_address_ad(drcuml_block &block, { return 0; } - else if ((code == PC_REGISTER) && ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay())) + else if ((code == PC_REGISTER) && (desc->in_delay_slot() || !compiler.check_delay())) { if (!compiler.pc()) generate_raise_exception(block, compiler, desc, TRAPNO_POINTER_ERROR); @@ -578,7 +578,7 @@ void hyperstone_device::generate_update_nz_d(drcuml_block &block, compiler_state void hyperstone_device::generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno, uml::parameter sr) { - if (desc->flags & OPFLAG_IN_DELAY_SLOT) + if (desc->in_delay_slot()) { // definitely in delay slot - saved PC/ILC reflect delayed branch UML_OR(block, sr, sr, P_MASK); @@ -684,7 +684,7 @@ inline void hyperstone_device::generate_logic_op(drcuml_block &block, compiler_s UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -751,7 +751,7 @@ void hyperstone_device::generate_software(drcuml_block &block, compiler_state &c { UML_MOV(block, I7, mem(&m_core->clock_cycles_6)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t num = op >> 8; const uint32_t src_code = op & 0xf; @@ -830,7 +830,7 @@ void hyperstone_device::generate_chk(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -891,7 +891,7 @@ void hyperstone_device::generate_movd(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t srcf_code = src_code + 1; @@ -1048,7 +1048,7 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_36)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t dstf_code = dst_code + 1; @@ -1131,7 +1131,7 @@ void hyperstone_device::generate_xm(drcuml_block &block, compiler_state &compile { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -1179,7 +1179,7 @@ void hyperstone_device::generate_mask(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1205,7 +1205,7 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1215,7 +1215,7 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil if (!SrcGlobal || !DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); - if (SrcGlobal && (src_code == PC_REGISTER) && ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay())) + if (SrcGlobal && (src_code == PC_REGISTER) && (desc->in_delay_slot() || !compiler.check_delay())) { const uint64_t result = uint64_t(compiler.pc()) + src; const uint32_t flags = @@ -1248,7 +1248,7 @@ void hyperstone_device::generate_sums(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1289,7 +1289,7 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1311,7 +1311,7 @@ void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1431,7 +1431,7 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1439,7 +1439,7 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil if (!SrcGlobal || !DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); - if ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay()) + if (desc->in_delay_slot() || !compiler.check_delay()) { const bool srcpc = SrcGlobal && (src_code == PC_REGISTER); const bool dstpc = DstGlobal && (dst_code == PC_REGISTER); @@ -1507,7 +1507,7 @@ void hyperstone_device::generate_adds(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1547,7 +1547,7 @@ void hyperstone_device::generate_cmpb(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1568,7 +1568,7 @@ void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1601,7 +1601,7 @@ void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1626,7 +1626,7 @@ void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1666,7 +1666,7 @@ void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1699,7 +1699,7 @@ void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -1723,7 +1723,7 @@ void hyperstone_device::generate_negs(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -1821,7 +1821,7 @@ void hyperstone_device::generate_not(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -1845,7 +1845,7 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; uint32_t src; @@ -1872,7 +1872,7 @@ void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; uint32_t src; @@ -1956,7 +1956,7 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const bool roundeven = !(op & 0x10f); @@ -1970,7 +1970,7 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi if (!DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); - if (DstGlobal && (dst_code == PC_REGISTER) && ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay())) + if (DstGlobal && (dst_code == PC_REGISTER) && (desc->in_delay_slot() || !compiler.check_delay())) { uint64_t result; uint32_t flags; @@ -2034,7 +2034,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = ((op & 0x100) >> 4) | (op & 0x0f); @@ -2092,7 +2092,7 @@ void hyperstone_device::generate_andni(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; uint32_t src; if (DRC_N_OP_MASK == 0x10f) @@ -2117,7 +2117,7 @@ void hyperstone_device::generate_ori(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; uint32_t src; if (ImmLong) @@ -2139,7 +2139,7 @@ void hyperstone_device::generate_xori(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; uint32_t src; if (ImmLong) @@ -2161,7 +2161,7 @@ void hyperstone_device::generate_shrdi(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE; @@ -2195,7 +2195,7 @@ void hyperstone_device::generate_shrd(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -2238,7 +2238,7 @@ void hyperstone_device::generate_shr(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -2270,7 +2270,7 @@ void hyperstone_device::generate_shri(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE; @@ -2300,7 +2300,7 @@ void hyperstone_device::generate_sardi(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE; @@ -2334,7 +2334,7 @@ void hyperstone_device::generate_sard(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -2377,7 +2377,7 @@ void hyperstone_device::generate_sar(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -2409,7 +2409,7 @@ void hyperstone_device::generate_sari(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE; @@ -2439,7 +2439,7 @@ void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE; @@ -2488,7 +2488,7 @@ void hyperstone_device::generate_shld(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -2544,7 +2544,7 @@ void hyperstone_device::generate_shl(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -2593,7 +2593,7 @@ void hyperstone_device::generate_shli(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE; @@ -2637,7 +2637,7 @@ void hyperstone_device::generate_testlz(drcuml_block &block, compiler_state &com { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -2655,7 +2655,7 @@ void hyperstone_device::generate_rol(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; @@ -2702,7 +2702,7 @@ void hyperstone_device::generate_rol(drcuml_block &block, compiler_state &compil template void hyperstone_device::generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t srcf_code = src_code + 1; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -2845,7 +2845,7 @@ void hyperstone_device::generate_ldxx1(drcuml_block &block, compiler_state &comp template void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t srcf_code = src_code + 1; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -2994,7 +2994,7 @@ void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &comp template void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3121,7 +3121,7 @@ void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &comp template void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3280,7 +3280,7 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_36)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t dstf_code = dst_code + 1; const uint32_t src_code = op & 0xf; @@ -3349,7 +3349,7 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp template void hyperstone_device::generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3399,7 +3399,7 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = op & 0xf; @@ -3479,7 +3479,7 @@ void hyperstone_device::generate_ldwr(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3504,7 +3504,7 @@ void hyperstone_device::generate_lddr(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3550,7 +3550,7 @@ void hyperstone_device::generate_ldwp(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3582,7 +3582,7 @@ void hyperstone_device::generate_lddp(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3634,7 +3634,7 @@ void hyperstone_device::generate_stwr(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3668,7 +3668,7 @@ void hyperstone_device::generate_stdr(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3719,7 +3719,7 @@ void hyperstone_device::generate_stwp(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3764,7 +3764,7 @@ void hyperstone_device::generate_stdp(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -3928,14 +3928,14 @@ void hyperstone_device::generate_dbr(drcuml_block &block, compiler_state &compil { UML_MOV(block, mem(&m_core->delay_slot_taken), 0); generate_update_cycles(block); - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->targetpc | 0x80000000); else UML_HASHJMP(block, compiler.mode(), desc->targetpc, *m_nocode); } else { - UML_MOV(block, mem(&m_core->arg0), delayslot->opptr.w[0]); + UML_MOV(block, mem(&m_core->arg0), delayslot->opptr[0]); UML_CALLC(block, &c_funcs::unimplemented, this); } } @@ -3948,7 +3948,7 @@ void hyperstone_device::generate_frame(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; UML_MOV(block, I2, DRC_SR); // I2 = SR @@ -3995,7 +3995,7 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; uint16_t imm_1 = m_pr16(desc->pc + 2); int32_t extra_s = 0; @@ -4079,7 +4079,7 @@ void hyperstone_device::generate_trap_op(drcuml_block &block, compiler_state &co false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false }; - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint8_t trapno = (op & 0xfc) >> 2; const uint8_t code = ((op & 0x300) >> 6) | (op & 0x03); @@ -4101,7 +4101,7 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); - const uint16_t op = desc->opptr.w[0]; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index 729bdad1a9f..87d9f0f36d1 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -10,38 +10,55 @@ #include "emu.h" #include "e132xsfe.h" + #include "32xsdefs.h" +#include "cpu/drcfe.ipp" + + #define FE_DST_CODE ((op & 0xf0) >> 4) #define FE_SRC_CODE (op & 0x0f) -#define SR_CODE (1 << 1) +#define SR_CODE (1) +#define G_CODE_BASE (0) + /*************************************************************************** INSTRUCTION PARSERS ***************************************************************************/ -e132xs_frontend::e132xs_frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(cpu, window_start, window_end, max_sequence) +hyperstone_device::frontend::frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend_base(cpu.space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_cpu(cpu) { } -inline uint16_t e132xs_frontend::read_word(opcode_desc &desc) +hyperstone_device::frontend::~frontend() { - return m_cpu.m_pr16(desc.physpc); } -inline uint16_t e132xs_frontend::read_imm1(opcode_desc &desc) +hyperstone_device::opcode_desc const *hyperstone_device::frontend::describe_code(offs_t startpc) { - return m_cpu.m_pr16(desc.physpc + 2); + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); } -inline uint16_t e132xs_frontend::read_imm2(opcode_desc &desc) +inline uint16_t hyperstone_device::frontend::read_word(opcode_desc &desc) { - return m_cpu.m_pr16(desc.physpc + 4); + return m_cpu.m_pr16(desc.pc); } -inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc) +inline uint16_t hyperstone_device::frontend::read_imm1(opcode_desc &desc) +{ + return m_cpu.m_pr16(desc.pc + 2); +} + +inline uint16_t hyperstone_device::frontend::read_imm2(opcode_desc &desc) +{ + return m_cpu.m_pr16(desc.pc + 4); +} + +inline uint32_t hyperstone_device::frontend::read_ldstxx_imm(opcode_desc &desc) { const uint16_t imm1 = read_imm1(desc); uint32_t extra_s; @@ -63,7 +80,7 @@ inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc) return extra_s; } -inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op) +inline uint32_t hyperstone_device::frontend::read_limm(opcode_desc &desc, uint16_t op) { static const int32_t immediate_values[16] = { @@ -88,7 +105,7 @@ inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op) } } -inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op) +inline int32_t hyperstone_device::frontend::decode_pcrel(opcode_desc &desc, uint16_t op) { if (op & 0x80) { @@ -111,7 +128,7 @@ inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op) } } -inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) +inline int32_t hyperstone_device::frontend::decode_call(opcode_desc &desc) { const uint16_t imm_1 = read_imm1(desc); int32_t extra_s = 0; @@ -140,9 +157,9 @@ inline int32_t e132xs_frontend::decode_call(opcode_desc &desc) instruction -------------------------------------------------*/ -bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint16_t op = desc.opptr.w[0] = read_word(desc); + uint16_t op = desc.opptr[0] = read_word(desc); /* most instructions are 2 bytes and a single cycle */ desc.length = 2; @@ -156,295 +173,306 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) switch (op >> 8) { case 0x00: // chk global,global - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.set_can_cause_exception(); break; case 0x01: // chk global,local - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.set_can_cause_exception(); break; case 0x02: // chk local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.set_can_cause_exception(); break; case 0x03: // chk local,local - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.set_can_cause_exception(); break; case 0x04: // movd global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gsrcf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gsrcf_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdstf_code); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_CHANGE_MODES; + desc.set_is_unconditional_branch(); + desc.set_can_cause_exception(); + desc.set_end_sequence(); + desc.set_can_change_modes(); + desc.set_reads_memory(); } - desc.regout[0] |= SR_CODE; + desc.regout.set(SR_CODE); break; case 0x05: // movd global,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdstf_code); if (gdst_code == 0) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_is_unconditional_branch(); + desc.set_can_cause_exception(); + desc.set_end_sequence(); + desc.set_reads_memory(); } - desc.regout[0] |= SR_CODE; + desc.regout.set(SR_CODE); break; case 0x06: // movd local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gsrcf_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gsrcf_code); + desc.regout.set(SR_CODE); break; case 0x07: // movd local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x08: // divu global,global case 0x0c: // divs global,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gdstf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; + desc.set_can_cause_exception(); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regin.set(G_CODE_BASE + gdstf_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdstf_code); + desc.regout.set(SR_CODE); break; case 0x09: // divu global,local case 0x0d: // divs global,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gdstf_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; + desc.set_can_cause_exception(); + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regin.set(G_CODE_BASE + gdstf_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdstf_code); + desc.regout.set(SR_CODE); break; case 0x0a: // divu local,global case 0x0e: // divs local,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.set_can_cause_exception(); + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0x0b: // divu local,local case 0x0f: // divs local,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.set_can_cause_exception(); + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x10: // xm global,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; + desc.set_can_cause_exception(); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(G_CODE_BASE + gdst_code); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x11: // xm global,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; + desc.set_can_cause_exception(); + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x12: // xm local,global - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; + desc.set_can_cause_exception(); + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x13: // xm local,local - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; - desc.regin[0] |= SR_CODE; + desc.set_can_cause_exception(); + desc.regin.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x14: // mask global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x15: // mask global,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x16: // mask local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x17: // mask local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0x18: // sum global,global case 0x1c: // sums global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (op & 0x4 && gsrc_code != SR_REGISTER) desc.set_can_cause_exception(); break; case 0x19: // sum global,local case 0x1d: // sums global,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (op & 0x4) desc.set_can_cause_exception(); break; case 0x1a: // sum local,global case 0x1e: // sums local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (op & 0x4 && gsrc_code != SR_REGISTER) desc.set_can_cause_exception(); break; case 0x1b: // sum local,local case 0x1f: // sums local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + if (op & 0x4) desc.set_can_cause_exception(); break; case 0x20: // cmp global,global case 0x30: // cmpb global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); break; case 0x21: // cmp global,local case 0x31: // cmpb global,local - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); break; case 0x22: // cmp local,global case 0x32: // cmpb local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0x23: // cmp local,local case 0x33: // cmpb local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x24: // mov global,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << (gsrc_code + 16); - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gsrc_code + 16); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); if (gdst_code == PC_REGISTER) { if (gsrc_code != PC_REGISTER) desc.targetpc = BRANCH_TARGET_DYNAMIC; else - desc.targetpc = desc.physpc + desc.length; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = desc.pc + desc.length; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } else if (gdst_code == 5) // TPR_REGISTER & 0xf { - desc.flags |= OPFLAG_END_SEQUENCE; + desc.set_end_sequence(); } break; case 0x25: // mov global,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } else if (gdst_code == 5) // TPR_REGISTER & 0xf { - desc.flags |= OPFLAG_END_SEQUENCE; + desc.set_end_sequence(); } break; case 0x26: // mov local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << (gsrc_code + 16); - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gsrc_code + 16); + desc.regout.set(SR_CODE); break; case 0x27: // mov local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x28: // add global,global case 0x2c: // adds global,global case 0x48: // sub global,global case 0x4c: // subs global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + if (op & 0x04) desc.set_can_cause_exception(); // adds, subs if (gdst_code == PC_REGISTER) { if (gsrc_code != PC_REGISTER) desc.targetpc = BRANCH_TARGET_DYNAMIC; else if (((op >> 8) == 0x28) || ((op >> 8) == 0x2c)) - desc.targetpc = (desc.physpc + desc.length) << 1; + desc.targetpc = (desc.pc + desc.length) << 1; else desc.targetpc = 0; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x29: // add global,local case 0x2d: // adds global,local case 0x49: // sub global,local case 0x4d: // subs global,local - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + if (op & 0x04) desc.set_can_cause_exception(); // adds, subs if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x2a: // add local,global case 0x2e: // adds local,global case 0x4a: // sub local,global case 0x4e: // subs local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); + if (op & 0x04) desc.set_can_cause_exception(); // adds, subs break; case 0x2b: // add local,local case 0x2f: // adds local,local case 0x4b: // sub local,local case 0x4f: // subs local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); + if (op & 0x04) desc.set_can_cause_exception(); // adds, subs break; case 0x34: // andn global,global case 0x38: // or global,global case 0x3c: // xor global,global case 0x54: // and global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { if (gsrc_code != PC_REGISTER) @@ -452,374 +480,393 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) else if (((op >> 8) == 0x34) || ((op >> 8) == 0x3c)) desc.targetpc = 0; else - desc.targetpc = desc.physpc + desc.length; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = desc.pc + desc.length; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x35: // andn global,local case 0x39: // or global,local case 0x3d: // xor global,local case 0x55: // and global,local - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x36: // andn local,global case 0x3a: // or local,global case 0x3e: // xor local,global case 0x56: // and local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0x37: // andn local,local case 0x3b: // or local,local case 0x3f: // xor local,local case 0x57: // and local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x40: // subc global,global case 0x50: // addc global,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x41: // subc global,local case 0x51: // addc global,local - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x42: // subc local,global case 0x52: // addc local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0x43: // subc local,local case 0x53: // addc local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x44: // not global,global case 0x58: // neg global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { if (gsrc_code != PC_REGISTER) desc.targetpc = BRANCH_TARGET_DYNAMIC; else if ((op >> 8) == 0x44) - desc.targetpc = ~uint32_t(desc.physpc + desc.length) & ~uint32_t(1); + desc.targetpc = ~uint32_t(desc.pc + desc.length) & ~uint32_t(1); else - desc.targetpc = uint32_t(-int32_t(desc.physpc + desc.length)) & ~uint32_t(1); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = uint32_t(-int32_t(desc.pc + desc.length)) & ~uint32_t(1); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x45: // not global,local case 0x59: // neg global,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x46: // not local,global case 0x5a: // neg local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0x47: // not local,local case 0x5b: // neg local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x5c: // negs global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); if (gdst_code == PC_REGISTER) { if (gsrc_code != PC_REGISTER) desc.targetpc = BRANCH_TARGET_DYNAMIC; else - desc.targetpc = uint32_t(-int32_t(desc.physpc + desc.length)) & ~uint32_t(1); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = uint32_t(-int32_t(desc.pc + desc.length)) & ~uint32_t(1); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x5d: // negs global,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x5e: // negs local,global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); break; case 0x5f: // negs local,local - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); break; case 0x60: // cmpi global,simm case 0x70: // cmpbi global,simm - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); break; case 0x61: // cmpi global,limm case 0x71: // cmpbi global,limm - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; break; case 0x62: // cmpi local,simm case 0x72: // cmpbi local,simm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x63: // cmpi local,limm case 0x73: // cmpbi local,limm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; break; case 0x64: // movi global,simm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << (gdst_code + 16); - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code + 16); + desc.regout.set(SR_CODE); + desc.set_can_cause_exception(); if (gdst_code == PC_REGISTER) { desc.targetpc = op & 0xe; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } else if (gdst_code == 5) // TPR_REGISTER & 0xf { - desc.flags |= OPFLAG_END_SEQUENCE; + desc.set_end_sequence(); } break; case 0x65: // movi global,limm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << (gdst_code + 16); - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code + 16); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); if (gdst_code == PC_REGISTER) { desc.targetpc = read_limm(desc, op) & ~uint32_t(1); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } else if (gdst_code == 5) // TPR_REGISTER & 0xf { - desc.flags |= OPFLAG_END_SEQUENCE; + desc.set_end_sequence(); } break; case 0x66: // movi local,simm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x67: // movi local,limm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; break; case 0x68: // addi global,simm case 0x6c: // addsi global,simm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); + if (op & 0x04) desc.set_can_cause_exception(); // addsi if (gdst_code == PC_REGISTER) { - desc.targetpc = desc.physpc + desc.length + (op & 0xe); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = desc.pc + desc.length + (op & 0xe); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x69: // addi global,limm case 0x6d: // addsi global,limm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + if (op & 0x04) desc.set_can_cause_exception(); // addsi if (gdst_code == PC_REGISTER) { desc.targetpc = desc.pc + desc.length + (read_limm(desc, op) & ~uint32_t(1)); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x6a: // addi local,simm case 0x6e: // addsi local,simm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); + if (op & 0x04) desc.set_can_cause_exception(); // addsi break; case 0x6b: // addi local,limm case 0x6f: // addsi local,limm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; - if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi + if (op & 0x04) desc.set_can_cause_exception(); // addsi break; case 0x74: // andni global,simm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { - desc.targetpc = (desc.physpc + desc.length) & ~uint32_t(op & 0xf); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = (desc.pc + desc.length) & ~uint32_t(op & 0xf); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x78: // ori global,simm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { - desc.targetpc = (desc.physpc + desc.length) | (op & 0xe); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = (desc.pc + desc.length) | (op & 0xe); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x7c: // xori global,simm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); if (gdst_code == PC_REGISTER) { - desc.targetpc = (desc.physpc + desc.length) ^ (op & 0xe); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = (desc.pc + desc.length) ^ (op & 0xe); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x75: // andni global,limm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; if (gdst_code == PC_REGISTER) { - desc.targetpc = (desc.physpc + desc.length) & ~read_limm(desc, op); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = (desc.pc + desc.length) & ~read_limm(desc, op); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x79: // ori global,limm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; if (gdst_code == PC_REGISTER) { - desc.targetpc = (desc.physpc + desc.length) | (read_limm(desc, op) & ~uint32_t(1)); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = (desc.pc + desc.length) | (read_limm(desc, op) & ~uint32_t(1)); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x7d: // xori global,limm - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; if (gdst_code == PC_REGISTER) { - desc.targetpc = (desc.physpc + desc.length) ^ (read_limm(desc, op) & ~uint32_t(1)); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.targetpc = (desc.pc + desc.length) ^ (read_limm(desc, op) & ~uint32_t(1)); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; case 0x76: // andni local,simm case 0x7a: // ori local,simm case 0x7e: // xori local,simm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x77: // andni local,limm case 0x7b: // ori local,limm case 0x7f: // xori local,limm - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.length = hyperstone_device::imm_length(op) << 1; break; case 0x80: case 0x81: // shrdi case 0x84: case 0x85: // sardi case 0x88: case 0x89: // shldi - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x82: // shrd case 0x86: // sard case 0x8a: // shld - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x83: // shr case 0x87: // sar case 0x8b: // shl case 0x8f: // rol - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0x8c: case 0x8d: // reserved return false; case 0x8e: // testlz - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); break; case 0x90: // ldxx1 global,global { const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; } @@ -828,15 +875,16 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; } @@ -845,12 +893,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; } case 0x93: // ldxx1 local,local @@ -858,10 +906,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; } case 0x94: // ldxx2 global,global @@ -869,17 +917,18 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; } @@ -888,16 +937,17 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); if (gdst_code == PC_REGISTER) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } break; } @@ -906,12 +956,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; } case 0x97: // ldxx2 local,local @@ -919,10 +969,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; } case 0x98: // stxx1 global,global @@ -930,12 +980,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regin.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x99: // stxx1 global,local @@ -943,11 +993,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x9a: // stxx1 local,global @@ -955,12 +1005,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x9b: // stxx1 local,local @@ -968,10 +1018,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x9c: // stxx2 global,global @@ -979,13 +1029,13 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= 1 << gdst_code; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; - desc.regout[0] |= 1 << gdst_code; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regin.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); + desc.regout.set(G_CODE_BASE + gdst_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x9d: // stxx2 global,local @@ -993,12 +1043,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x9e: // stxx2 local,global @@ -1006,12 +1056,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0x9f: // stxx2 local,local @@ -1019,10 +1069,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) const uint16_t imm1 = read_imm1(desc); [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); break; } case 0xa0: // shri global (lo n) @@ -1031,9 +1081,9 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0xa5: // sari global (hi n) case 0xa8: // shli global (lo n) case 0xa9: // shli global (hi n) - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); break; case 0xa2: // shri local (lo n) case 0xa3: // shri local (hi n) @@ -1041,183 +1091,197 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0xa7: // sari local (hi n) case 0xaa: // shli local (lo n) case 0xab: // shli local (hi n) - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); break; case 0xac: case 0xad: case 0xae: case 0xaf: // reserved return false; case 0xb0: // mulu global,global case 0xb4: // muls global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdstf_code); + desc.regout.set(SR_CODE); break; case 0xb1: // mulu global,local case 0xb5: // muls global,local - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdstf_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdstf_code); + desc.regout.set(SR_CODE); break; case 0xb2: // mulu local,global case 0xb6: // muls local,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0xb3: // mulu local,local case 0xb7: // muls local,local - desc.regout[0] |= SR_CODE; + desc.regout.set(SR_CODE); break; case 0xb8: // set global (lo n) case 0xb9: // set global (hi n) - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gdst_code; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gdst_code); break; case 0xba: // set local (lo n) case 0xbb: // set local (hi n) break; case 0xbc: // mul global,global - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); break; case 0xbd: // muls global,local - desc.regin[0] |= 1 << gdst_code; - desc.regout[0] |= 1 << gdst_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gdst_code); + desc.regout.set(G_CODE_BASE + gdst_code); + desc.regout.set(SR_CODE); break; case 0xbe: // muls local,global - desc.regin[0] |= 1 << gsrc_code; - desc.regout[0] |= SR_CODE; + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regout.set(SR_CODE); break; case 0xbf: // mulu local,local - desc.regout[0] |= SR_CODE; + desc.regout.set(SR_CODE); break; case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software case 0xc8: case 0xc9: case 0xca: case 0xcb: // software case 0xcc: case 0xcd: // software - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CHANGE_MODES; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_can_change_modes(); break; case 0xce: // extend - 4 bytes - desc.regin[0] |= SR_CODE; - desc.regin[0] |= (3 << 14); // global regs 14, 15 - desc.regout[0] |= (3 << 14); // global regs 14, 15 + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + 14); // global regs 14, 15 + desc.regin.set(G_CODE_BASE + 15); + desc.regout.set(G_CODE_BASE + 14); // global regs 14, 15 + desc.regout.set(G_CODE_BASE + 15); desc.length = 4; break; case 0xcf: // do return false; case 0xd0: // ldwr global case 0xd4: // ldwp global - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gsrc_code); + desc.set_reads_memory(); break; case 0xd1: // ldwr local case 0xd5: // ldwp local - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(SR_CODE); + desc.set_reads_memory(); break; case 0xd2: // lddr global case 0xd6: // lddp global - desc.regin[0] |= SR_CODE; - desc.regout[0] |= 1 << gsrc_code; - desc.regout[0] |= 1 << gsrcf_code; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(SR_CODE); + desc.regout.set(G_CODE_BASE + gsrc_code); + desc.regout.set(G_CODE_BASE + gsrcf_code); + desc.set_reads_memory(); break; case 0xd3: // lddr local case 0xd7: // lddp local - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(SR_CODE); + desc.set_reads_memory(); break; case 0xd8: // stwr global case 0xdc: // stwp global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.set_writes_memory(); break; case 0xd9: // stwr local case 0xdd: // stwp local - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.regin.set(SR_CODE); + desc.set_writes_memory(); break; case 0xda: // stdr global case 0xde: // stdp global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.regin[0] |= 1 << gsrcf_code; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.regin.set(G_CODE_BASE + gsrcf_code); + desc.set_writes_memory(); break; case 0xdb: // stdr local case 0xdf: // stdp local - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.regin.set(SR_CODE); + desc.set_writes_memory(); break; case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne - could be 4 bytes (pcrel) case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel) case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel) - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.regin.set(SR_CODE); + desc.set_is_conditional_branch(); desc.delayslots = 1; desc.length = (op & 0x80) ? 4 : 2; - desc.targetpc = desc.physpc + desc.length + decode_pcrel(desc, op); + desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); break; case 0xec: // dbr - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.delayslots = 1; desc.length = (op & 0x80) ? 4 : 2; - desc.targetpc = desc.physpc + desc.length + decode_pcrel(desc, op); + desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); break; case 0xed: // frame - desc.regin[0] |= SR_CODE; - desc.regout[0] |= SR_CODE; - desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.regin.set(SR_CODE); + desc.regout.set(SR_CODE); + desc.set_writes_memory(); break; case 0xee: // call global - desc.regin[0] |= SR_CODE; - desc.regin[0] |= 1 << gsrc_code; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.regin.set(SR_CODE); + desc.regin.set(G_CODE_BASE + gsrc_code); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; if (gsrc_code == PC_REGISTER) - desc.targetpc = desc.physpc + desc.length + (decode_call(desc) & ~uint32_t(1)); + desc.targetpc = desc.pc + desc.length + (decode_call(desc) & ~uint32_t(1)); else if (gsrc_code == SR_REGISTER) desc.targetpc = decode_call(desc) & ~uint32_t(1); else desc.targetpc = BRANCH_TARGET_DYNAMIC; break; case 0xef: // call local - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; break; case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt - desc.regin[0] |= SR_CODE; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.regin.set(SR_CODE); + desc.set_is_conditional_branch(); desc.length = (op & 0x80) ? 4 : 2; desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); break; case 0xfc: // br - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.length = (op & 0x80) ? 4 : 2; desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); break; case 0xfd: case 0xfe: case 0xff: // trap - desc.regin[0] |= SR_CODE; + desc.regin.set(SR_CODE); desc.targetpc = BRANCH_TARGET_DYNAMIC; if ((((op & 0x300) >> 6) | (op & 0x03)) == 15) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_CAN_CAUSE_EXCEPTION; + { + desc.set_is_conditional_branch(); + } + desc.set_can_cause_exception(); break; } return true; diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h index c71849228e8..22dbf96c89c 100644 --- a/src/devices/cpu/e132xs/e132xsfe.h +++ b/src/devices/cpu/e132xs/e132xsfe.h @@ -6,19 +6,65 @@ #pragma once #include "e132xs.h" + #include "cpu/drcfe.h" -class e132xs_frontend : public drc_frontend +#include +#include + + +class hyperstone_device::opcode_desc : public opcode_desc_base { public: - e132xs_frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - void flush(); + uint16_t opptr[3]; // copy of up to 3 halfwords of opcode + + void set_can_change_modes() { m_extra_flags.set(CAN_CHANGE_MODES); } + void set_reads_memory() { m_extra_flags.set(READS_MEMORY); } + void set_writes_memory() { m_extra_flags.set(WRITES_MEMORY); } + + bool can_change_modes() const { return m_extra_flags[CAN_CHANGE_MODES]; } + bool reads_memory() const { return m_extra_flags[READS_MEMORY]; } + bool writes_memory() const { return m_extra_flags[WRITES_MEMORY]; } + + // epc - compute the exception PC + uint32_t epc() const + { + return in_delay_slot() ? branch->pc : pc; + } + + void reset(offs_t curpc, bool in_delay_slot) + { + opcode_desc_base::reset(curpc, in_delay_slot); + + std::fill(std::begin(opptr), std::end(opptr), 0); + m_extra_flags.reset(); + } protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + enum + { + CAN_CHANGE_MODES = 0, + READS_MEMORY, + WRITES_MEMORY, + + EXTRA_FLAG_COUNT + }; + + std::bitset m_extra_flags; +}; + + +class hyperstone_device::frontend : public drc_frontend_base +{ +public: + frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); private: + bool describe(opcode_desc &desc, opcode_desc const *prev); + uint16_t read_word(opcode_desc &desc); uint16_t read_imm1(opcode_desc &desc); uint16_t read_imm2(opcode_desc &desc); diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h index e3a660f1987..b7b9a830a0c 100644 --- a/src/devices/cpu/mb86235/mb86235.h +++ b/src/devices/cpu/mb86235/mb86235.h @@ -11,18 +11,13 @@ #pragma once -#include "cpu/drcfe.h" #include "cpu/drcuml.h" #include "machine/gen_fifo.h" -class mb86235_frontend; - class mb86235_device : public cpu_device { - friend class mb86235_frontend; - public: // construction/destruction mb86235_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t clock); @@ -64,23 +59,26 @@ public: void internal_bbus(address_map &map) ATTR_COLD; protected: - // device-level overrides + class frontend; + class opcode_desc; + + // device_t implementation virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; - // device_execute_interface overrides + // device_execute_interface implementation virtual uint32_t execute_min_cycles() const noexcept override { return 1; } virtual uint32_t execute_max_cycles() const noexcept override { return 7; } virtual void execute_run() override; //virtual void execute_set_input(int inputnum, int state); - // device_memory_interface overrides + // device_memory_interface implementation virtual space_config_vector memory_space_config() const override; - // device_state_interface overrides + // device_state_interface implementation virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - // device_disasm_interface overrides + // device_disasm_interface implementation virtual std::unique_ptr create_disassembler() override; private: @@ -178,7 +176,7 @@ private: drc_cache m_cache; std::unique_ptr m_drcuml; - std::unique_ptr m_drcfe; + std::unique_ptr m_drcfe; memory_access<12, 3, -3, ENDIANNESS_LITTLE>::cache m_pcache; memory_access<12, 3, -3, ENDIANNESS_LITTLE>::specific m_program; diff --git a/src/devices/cpu/mb86235/mb86235defs.h b/src/devices/cpu/mb86235/mb86235defs.h deleted file mode 100644 index 3156c239788..00000000000 --- a/src/devices/cpu/mb86235/mb86235defs.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef MAME_CPU_MB86235_MB86235DEFS_H -#define MAME_CPU_MB86235_MB86235DEFS_H - -#pragma once - - -#define OP_USERFLAG_FIFOIN 0x1 -#define OP_USERFLAG_FIFOOUT 0x2 -#define OP_USERFLAG_REPEAT 0x8 -#define OP_USERFLAG_REPEATED_OP 0x10 -#define OP_USERFLAG_PR_MASK 0x300 -#define OP_USERFLAG_PR_INC 0x100 -#define OP_USERFLAG_PR_DEC 0x200 -#define OP_USERFLAG_PR_ZERO 0x300 -#define OP_USERFLAG_PW_MASK 0xc00 -#define OP_USERFLAG_PW_INC 0x400 -#define OP_USERFLAG_PW_DEC 0x800 -#define OP_USERFLAG_PW_ZERO 0xc00 - -#endif // MAME_CPU_MB86235_MB86235DEFS_H diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp index 67e562c865a..cfad532e8c3 100644 --- a/src/devices/cpu/mb86235/mb86235drc.cpp +++ b/src/devices/cpu/mb86235/mb86235drc.cpp @@ -8,14 +8,11 @@ #include "emu.h" #include "mb86235.h" + #include "mb86235fe.h" -#include "cpu/drcfe.h" -#include "cpu/drcuml.h" #include "cpu/drcumlsh.h" -#include "mb86235defs.h" - /* TODO: @@ -62,20 +59,20 @@ #define RPC uml::mem(&m_core->rpc) #define LPC uml::mem(&m_core->lpc) -#define AZ_CALC_REQUIRED ((desc->regreq[1] & 0x1) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AN_CALC_REQUIRED ((desc->regreq[1] & 0x2) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AV_CALC_REQUIRED ((desc->regreq[1] & 0x4) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AU_CALC_REQUIRED ((desc->regreq[1] & 0x8) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AD_CALC_REQUIRED ((desc->regreq[1] & 0x10) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define ZC_CALC_REQUIRED ((desc->regreq[1] & 0x20) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define IL_CALC_REQUIRED ((desc->regreq[1] & 0x40) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define NR_CALC_REQUIRED ((desc->regreq[1] & 0x80) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define ZD_CALC_REQUIRED ((desc->regreq[1] & 0x100) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MN_CALC_REQUIRED ((desc->regreq[1] & 0x200) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MZ_CALC_REQUIRED ((desc->regreq[1] & 0x400) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MV_CALC_REQUIRED ((desc->regreq[1] & 0x800) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MU_CALC_REQUIRED ((desc->regreq[1] & 0x1000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MD_CALC_REQUIRED ((desc->regreq[1] & 0x2000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AZ_CALC_REQUIRED (desc->az_calc_required()) +#define AN_CALC_REQUIRED (desc->an_calc_required()) +#define AV_CALC_REQUIRED (desc->av_calc_required()) +#define AU_CALC_REQUIRED (desc->au_calc_required()) +#define AD_CALC_REQUIRED (desc->ad_calc_required()) +#define ZC_CALC_REQUIRED (desc->zc_calc_required()) +#define IL_CALC_REQUIRED (desc->il_calc_required()) +#define NR_CALC_REQUIRED (desc->nr_calc_required()) +#define ZD_CALC_REQUIRED (desc->zd_calc_required()) +#define MN_CALC_REQUIRED (desc->mn_calc_required()) +#define MZ_CALC_REQUIRED (desc->mz_calc_required()) +#define MV_CALC_REQUIRED (desc->mv_calc_required()) +#define MU_CALC_REQUIRED (desc->mu_calc_required()) +#define MD_CALC_REQUIRED (desc->md_calc_required()) inline void mb86235_device::alloc_handle(uml::code_handle *&handleptr, const char *name) { @@ -267,7 +264,7 @@ void mb86235_device::compile_block(offs_t pc) /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + if (seqlast->end_sequence()) break; assert(seqlast != nullptr); @@ -292,7 +289,7 @@ void mb86235_device::compile_block(offs_t pc) } /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc /* iterate over instructions in the sequence and compile them */ @@ -300,7 +297,7 @@ void mb86235_device::compile_block(offs_t pc) generate_sequence_instruction(block, compiler, curdesc); /* if we need to return to the start, do it */ - if (seqlast->flags & OPFLAG_RETURN_TO_START) + if (seqlast->return_to_start()) nextpc = pc; /* otherwise we just go to the next instruction */ else @@ -497,14 +494,14 @@ void mb86235_device::flush_cache() void mb86235_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { /* add an entry for the log */ - // if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - // log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + // if (m_drcuml->logging() && !desc->virtual_noop()) + // log_add_disasm_comment(block, desc->pc, desc->opptr); /* set the PC map variable */ UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc /* accumulate total cycles */ - compiler.cycles += desc->cycles; + compiler.cycles += 1; /* update the icount map variable */ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles @@ -517,26 +514,18 @@ void mb86235_device::generate_sequence_instruction(drcuml_block &block, compiler UML_DEBUG(block, desc->pc); // debug desc->pc } - /* if we hit an unmapped address, fatal error */ - if (desc->flags & OPFLAG_COMPILER_UNMAPPED) - { - UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - save_fast_iregs(block); // - UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE - } - /* if this is an invalid opcode, generate the exception now */ - // if (desc->flags & OPFLAG_INVALID_OPCODE) + // if (desc->invalid_opcode()) // UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000 /* unless this is a virtual no-op, it's a regular instruction */ - if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!desc->virtual_noop()) { /* compile the instruction */ if (!generate_opcode(block, compiler, desc)) { UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); // dmov [arg64],*desc->opptr.q + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); // dmov [arg64],*desc->opptr UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc } } @@ -724,19 +713,19 @@ bool mb86235_device::has_register_clash(const opcode_desc *desc, int outreg) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: // MA0-7 - if (desc->regin[0] & (1 << (16 + (outreg & 7)))) return true; + if (desc->ma_used(outreg & 7)) return true; break; case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: // MB0-7 - if (desc->regin[0] & (1 << (24 + (outreg & 7)))) return true; + if (desc->mb_used(outreg & 7)) return true; break; case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: // AA0-7 - if (desc->regin[0] & (1 << (outreg & 7))) return true; + if (desc->aa_used(outreg & 7)) return true; break; case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // AB0-7 - if (desc->regin[0] & (1 << (8 + (outreg & 7)))) return true; + if (desc->ab_used(outreg & 7)) return true; break; } return false; @@ -761,26 +750,26 @@ bool mb86235_device::aluop_has_result(int aluop) bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t opcode = desc->opptr.q[0]; + uint64_t opcode = desc->opptr; bool fifoin_check = false; bool fifoout_check = false; // enable fifo in check if this opcode or the delay slot reads from FIFO - if (desc->userflags & OP_USERFLAG_FIFOIN) + if (desc->fifoin()) fifoin_check = true; if (desc->delayslots > 0) { - if (desc->delay.first()->userflags & OP_USERFLAG_FIFOIN) + if (desc->delay.first()->fifoin()) fifoin_check = true; } // enable fifo out check if this opcode or the delay slot writes to FIFO - if (desc->userflags & OP_USERFLAG_FIFOOUT) + if (desc->fifoout()) fifoout_check = true; if (desc->delayslots > 0) { - if (desc->delay.first()->userflags & OP_USERFLAG_FIFOOUT) + if (desc->delay.first()->fifoout()) fifoout_check = true; } @@ -912,48 +901,48 @@ bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compil } // update PR and PW if needed - if ((desc->userflags & OP_USERFLAG_PR_MASK) != 0) + if (desc->pr() != 0) { - switch ((desc->userflags & OP_USERFLAG_PR_MASK) >> 8) + switch (desc->pr()) { - case 1: // PR++ + case opcode_desc::INC: // PR++ UML_ADD(block, PRP, PRP, 1); UML_CMP(block, PRP, 24); UML_MOVc(block, COND_GE, PRP, 0); break; - case 2: // PR-- + case opcode_desc::DEC: // PR-- UML_SUB(block, PRP, PRP, 1); UML_CMP(block, PRP, 0); UML_MOVc(block, COND_L, PRP, 23); break; - case 3: // PR#0 + case opcode_desc::ZERO: // PR#0 UML_MOV(block, PRP, 0); break; } } - if ((desc->userflags & OP_USERFLAG_PW_MASK) != 0) + if (desc->pw() != 0) { - switch ((desc->userflags & OP_USERFLAG_PW_MASK) >> 10) + switch (desc->pw()) { - case 1: // PW++ + case opcode_desc::INC: // PW++ UML_ADD(block, PWP, PWP, 1); UML_CMP(block, PWP, 24); UML_MOVc(block, COND_GE, PWP, 0); break; - case 2: // PW-- + case opcode_desc::DEC: // PW-- UML_SUB(block, PWP, PWP, 1); UML_CMP(block, PWP, 0); UML_MOVc(block, COND_L, PWP, 23); break; - case 3: // PW#0 + case opcode_desc::ZERO: // PW#0 UML_MOV(block, PWP, 0); break; } } // handle repeat - if (desc->userflags & OP_USERFLAG_REPEATED_OP) + if (desc->repeated_op()) { uml::code_label const no_repeat = compiler.labelnum++; UML_SUB(block, RPC, RPC, 1); @@ -961,7 +950,7 @@ bool mb86235_device::generate_opcode(drcuml_block &block, compiler_state &compil UML_JMPc(block, COND_LE, no_repeat); generate_update_cycles(block, compiler, desc->pc, true); - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->pc | 0x80000000); else UML_HASHJMP(block, 0, desc->pc, *m_nocode); @@ -1365,7 +1354,7 @@ void mb86235_device::generate_branch(drcuml_block &block, compiler_state &compil if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { generate_update_cycles(block, compiler_temp, desc->targetpc, true); - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000 else UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode @@ -1484,7 +1473,7 @@ void mb86235_device::generate_condition(drcuml_block &block, compiler_state &com void mb86235_device::generate_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t op = desc->opptr.q[0]; + uint64_t op = desc->opptr; int ef1 = (op >> 16) & 0x3f; int ef2 = op & 0xffff; int cop = (op >> 22) & 0x1f; @@ -1593,7 +1582,7 @@ void mb86235_device::generate_control(drcuml_block &block, compiler_state &compi void mb86235_device::generate_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t opcode = desc->opptr.q[0]; + uint64_t opcode = desc->opptr; int dr = (opcode >> 12) & 0x7f; int sr = (opcode >> 19) & 0x7f; @@ -1657,13 +1646,13 @@ void mb86235_device::generate_xfer1(drcuml_block &block, compiler_state &compile void mb86235_device::generate_double_xfer1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { UML_MOV(block, mem(&m_core->pc), desc->pc); - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); UML_CALLC(block, cfunc_unimplemented_double_xfer1, this); } void mb86235_device::generate_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t opcode = desc->opptr.q[0]; + uint64_t opcode = desc->opptr; int op = (opcode >> 39) & 3; int trm = (opcode >> 38) & 1; @@ -1752,13 +1741,13 @@ void mb86235_device::generate_xfer2(drcuml_block &block, compiler_state &compile void mb86235_device::generate_double_xfer2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { UML_MOV(block, mem(&m_core->pc), desc->pc); - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); UML_CALLC(block, cfunc_unimplemented_double_xfer2, this); } void mb86235_device::generate_xfer3(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t opcode = desc->opptr.q[0]; + uint64_t opcode = desc->opptr; uint32_t imm = (uint32_t)(opcode >> 27); int dr = (opcode >> 19) & 0x7f; @@ -1790,7 +1779,7 @@ void mb86235_device::generate_xfer3(drcuml_block &block, compiler_state &compile void mb86235_device::generate_pre_control(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t op = desc->opptr.q[0]; + uint64_t op = desc->opptr; int ef1 = (op >> 16) & 0x3f; int ef2 = op & 0xffff; int cop = (op >> 22) & 0x1f; diff --git a/src/devices/cpu/mb86235/mb86235fe.cpp b/src/devices/cpu/mb86235/mb86235fe.cpp index 15151041d78..b82d1dca058 100644 --- a/src/devices/cpu/mb86235/mb86235fe.cpp +++ b/src/devices/cpu/mb86235/mb86235fe.cpp @@ -10,71 +10,41 @@ #include "emu.h" #include "mb86235fe.h" -#include "mb86235defs.h" +#include "cpu/drcfe.ipp" -#define AA_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0) -#define AA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0) -#define AB_USED(desc,x) do { (desc).regin[0] |= 1 << (8+(x)); } while(0) -#define AB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (8+(x)); } while(0) -#define MA_USED(desc,x) do { (desc).regin[0] |= 1 << (16+(x)); } while(0) -#define MA_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (16+(x)); } while(0) -#define MB_USED(desc,x) do { (desc).regin[0] |= 1 << (24+(x)); } while(0) -#define MB_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (24+(x)); } while(0) -#define AR_USED(desc,x) do { (desc).regin[1] |= 1 << (24+(x)); } while(0) -#define AR_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (24+(x)); } while(0) - -#define AZ_USED(desc) do { (desc).regin[1] |= 1 << 0; } while (0) -#define AZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 0; } while (0) -#define AN_USED(desc) do { (desc).regin[1] |= 1 << 1; } while (0) -#define AN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 1; } while (0) -#define AV_USED(desc) do { (desc).regin[1] |= 1 << 2; } while (0) -#define AV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 2; } while (0) -#define AU_USED(desc) do { (desc).regin[1] |= 1 << 3; } while (0) -#define AU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 3; } while (0) -#define AD_USED(desc) do { (desc).regin[1] |= 1 << 4; } while (0) -#define AD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 4; } while (0) -#define ZC_USED(desc) do { (desc).regin[1] |= 1 << 5; } while (0) -#define ZC_MODIFIED(desc) do { (desc).regout[1] |= 1 << 5; } while (0) -#define IL_USED(desc) do { (desc).regin[1] |= 1 << 6; } while (0) -#define IL_MODIFIED(desc) do { (desc).regout[1] |= 1 << 6; } while (0) -#define NR_USED(desc) do { (desc).regin[1] |= 1 << 7; } while (0) -#define NR_MODIFIED(desc) do { (desc).regout[1] |= 1 << 7; } while (0) -#define ZD_USED(desc) do { (desc).regin[1] |= 1 << 8; } while (0) -#define ZD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 8; } while (0) -#define MN_USED(desc) do { (desc).regin[1] |= 1 << 9; } while (0) -#define MN_MODIFIED(desc) do { (desc).regout[1] |= 1 << 9; } while (0) -#define MZ_USED(desc) do { (desc).regin[1] |= 1 << 10; } while (0) -#define MZ_MODIFIED(desc) do { (desc).regout[1] |= 1 << 10; } while (0) -#define MV_USED(desc) do { (desc).regin[1] |= 1 << 11; } while (0) -#define MV_MODIFIED(desc) do { (desc).regout[1] |= 1 << 11; } while (0) -#define MU_USED(desc) do { (desc).regin[1] |= 1 << 12; } while (0) -#define MU_MODIFIED(desc) do { (desc).regout[1] |= 1 << 12; } while (0) -#define MD_USED(desc) do { (desc).regin[1] |= 1 << 13; } while (0) -#define MD_MODIFIED(desc) do { (desc).regout[1] |= 1 << 13; } while (0) - - -mb86235_frontend::mb86235_frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*core, window_start, window_end, max_sequence), +mb86235_device::frontend::frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) : + drc_frontend_base(core->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence), m_core(core) { } - -bool mb86235_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +mb86235_device::frontend::~frontend() { - uint64_t opcode = desc.opptr.q[0] = m_core->m_pcache.read_qword(desc.pc, 0); +} + + +mb86235_device::opcode_desc const *mb86235_device::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + + +bool mb86235_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) +{ + uint64_t opcode = desc.opptr = m_core->m_pcache.read_qword(desc.pc, 0); desc.length = 1; - desc.cycles = 1; // repeatable instruction needs an entry point if (prev != nullptr) { - if (prev->userflags & OP_USERFLAG_REPEAT) + if (prev->repeat()) { - desc.flags |= OPFLAG_IS_BRANCH_TARGET; - desc.userflags |= OP_USERFLAG_REPEATED_OP; + desc.set_is_branch_target(); + desc.set_repeated_op(); } } @@ -127,32 +97,29 @@ bool mb86235_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return true; } -void mb86235_frontend::describe_alu_input(opcode_desc &desc, int reg) +void mb86235_device::frontend::describe_alu_input(opcode_desc &desc, int reg) { switch (reg) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: - AA_USED(desc, reg & 7); + desc.set_aa_used(reg & 7); break; case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: - AB_USED(desc, reg & 7); + desc.set_ab_used(reg & 7); break; case 0x10: // PR break; case 0x11: // PR++ - desc.userflags &= ~OP_USERFLAG_PR_MASK; - desc.userflags |= OP_USERFLAG_PR_INC; + desc.set_pr_inc(); break; case 0x12: // PR-- - desc.userflags &= ~OP_USERFLAG_PR_MASK; - desc.userflags |= OP_USERFLAG_PR_DEC; + desc.set_pr_dec(); break; case 0x13: // PR#0 - desc.userflags &= ~OP_USERFLAG_PR_MASK; - desc.userflags |= OP_USERFLAG_PR_ZERO; + desc.set_pr_zero(); break; @@ -161,37 +128,37 @@ void mb86235_frontend::describe_alu_input(opcode_desc &desc, int reg) } } -void mb86235_frontend::describe_mul_input(opcode_desc &desc, int reg) +void mb86235_device::frontend::describe_mul_input(opcode_desc &desc, int reg) { switch (reg) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: - MA_USED(desc, reg & 7); + desc.set_ma_used(reg & 7); break; case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: - MB_USED(desc, reg & 7); + desc.set_mb_used(reg & 7); break; case 0x10: // PR break; case 0x11: // PR++ - if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority + if (desc.pr() == 0) // ALU PR update has higher priority { - desc.userflags |= OP_USERFLAG_PR_INC; + desc.set_pr_inc(); } break; case 0x12: // PR-- - if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority + if (desc.pr() == 0) // ALU PR update has higher priority { - desc.userflags |= OP_USERFLAG_PR_DEC; + desc.set_pr_dec(); } break; case 0x13: // PR#0 - if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU PR update has higher priority + if (desc.pr() == 0) // ALU PR update has higher priority { - desc.userflags |= OP_USERFLAG_PR_ZERO; + desc.set_pr_zero(); } break; @@ -200,24 +167,24 @@ void mb86235_frontend::describe_mul_input(opcode_desc &desc, int reg) } } -void mb86235_frontend::describe_alumul_output(opcode_desc &desc, int reg) +void mb86235_device::frontend::describe_alumul_output(opcode_desc &desc, int reg) { switch (reg >> 3) { case 0: - MA_MODIFIED(desc, reg & 7); + desc.set_ma_modified(reg & 7); break; case 1: - MB_MODIFIED(desc, reg & 7); + desc.set_mb_modified(reg & 7); break; case 2: - AA_MODIFIED(desc, reg & 7); + desc.set_aa_modified(reg & 7); break; case 3: - AB_MODIFIED(desc, reg & 7); + desc.set_ab_modified(reg & 7); break; default: @@ -225,34 +192,34 @@ void mb86235_frontend::describe_alumul_output(opcode_desc &desc, int reg) } } -void mb86235_frontend::describe_reg_read(opcode_desc &desc, int reg) +void mb86235_device::frontend::describe_reg_read(opcode_desc &desc, int reg) { switch (reg) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: // MA0-7 - MA_USED(desc, reg & 7); + desc.set_ma_used(reg & 7); break; case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: // AA0-7 - AA_USED(desc, reg & 7); + desc.set_aa_used(reg & 7); break; case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // AR0-7 - AR_USED(desc, reg & 7); + desc.set_ar_used(reg & 7); break; case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: // MB0-7 - MB_USED(desc, reg & 7); + desc.set_mb_used(reg & 7); break; case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: // AB0-7 - AB_USED(desc, reg & 7); + desc.set_ab_used(reg & 7); break; case 0x31: // FI - desc.userflags |= OP_USERFLAG_FIFOIN; - desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target + desc.set_fifoin(); + desc.set_is_branch_target(); // fifo check makes this a branch target break; case 0x32: // FO0 @@ -273,37 +240,37 @@ void mb86235_frontend::describe_reg_read(opcode_desc &desc, int reg) break; case 0x30: // PR - if ((desc.userflags & OP_USERFLAG_PR_MASK) == 0) // ALU and MUL PR updates have higher priority + if (desc.pr() == 0) // ALU and MUL PR updates have higher priority { - desc.userflags |= OP_USERFLAG_PR_INC; + desc.set_pr_inc(); } break; } } -void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg) +void mb86235_device::frontend::describe_reg_write(opcode_desc &desc, int reg) { switch (reg) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: // MA0-7 - MA_MODIFIED(desc, reg & 7); + desc.set_ma_modified(reg & 7); break; case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: // AA0-7 - AA_MODIFIED(desc, reg & 7); + desc.set_aa_modified(reg & 7); break; case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // AR0-7 - AR_MODIFIED(desc, reg & 7); + desc.set_ar_modified(reg & 7); break; case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: // MB0-7 - MB_MODIFIED(desc, reg & 7); + desc.set_mb_modified(reg & 7); break; case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: // AB0-7 - AB_MODIFIED(desc, reg & 7); + desc.set_ab_modified(reg & 7); break; case 0x31: // FI @@ -311,8 +278,8 @@ void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg) case 0x32: // FO0 case 0x33: // FO1 - desc.userflags |= OP_USERFLAG_FIFOOUT; - desc.flags |= OPFLAG_IS_BRANCH_TARGET; // fifo check makes this a branch target + desc.set_fifoout(); + desc.set_is_branch_target(); // fifo check makes this a branch target break; case 0x10: // EB @@ -329,14 +296,13 @@ void mb86235_frontend::describe_reg_write(opcode_desc &desc, int reg) break; case 0x30: // PR - desc.userflags &= ~OP_USERFLAG_PW_MASK; - desc.userflags |= OP_USERFLAG_PW_INC; + desc.set_pw_inc(); break; } } -void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop) +void mb86235_device::frontend::describe_alu(opcode_desc &desc, uint32_t aluop) { int i1 = (aluop >> 10) & 0xf; int i2 = (aluop >> 5) & 0x1f; @@ -347,218 +313,218 @@ void mb86235_frontend::describe_alu(opcode_desc &desc, uint32_t aluop) { case 0x00: // FADD describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x01: // FADDZ describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - ZC_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_zc_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x02: // FSUB describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x03: // FSUBZ describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - ZC_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_zc_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x04: // FCMP describe_alu_input(desc, i1); describe_alu_input(desc, i2); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x05: // FABS describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_ad_modified(); break; case 0x06: // FABC describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x07: // NOP break; case 0x08: // FEA describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_ad_modified(); break; case 0x09: // FES describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x0a: // FRCP describe_alu_input(desc, i1); describe_alumul_output(desc, io); - ZD_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_zd_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x0b: // FRSQ describe_alu_input(desc, i1); describe_alumul_output(desc, io); - NR_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AU_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_nr_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_au_modified(); + desc.set_ad_modified(); break; case 0x0c: // FLOG describe_alu_input(desc, i1); describe_alumul_output(desc, io); - IL_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_il_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_ad_modified(); break; case 0x0d: // CIF describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); break; case 0x0e: // CFI describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AD_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_ad_modified(); break; case 0x0f: // CFIB describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AD_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_ad_modified(); + desc.set_au_modified(); break; case 0x10: // ADD describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); break; case 0x11: // ADDZ describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - ZC_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); + desc.set_zc_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); break; case 0x12: // SUB describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); break; case 0x13: // SUBZ describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - ZC_MODIFIED(desc); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); + desc.set_zc_modified(); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); break; case 0x14: // CMP describe_alu_input(desc, i1); describe_alu_input(desc, i2); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); break; case 0x15: // ABS describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); break; case 0x16: // ATR describe_alu_input(desc, i1); describe_alumul_output(desc, io); break; case 0x17: // ATRZ describe_alu_input(desc, i1); describe_alumul_output(desc, io); - ZC_MODIFIED(desc); + desc.set_zc_modified(); break; case 0x18: // AND describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x19: // OR describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x1a: // XOR describe_alu_input(desc, i1); describe_alu_input(desc, i2); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x1b: // NOT describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x1c: // LSR describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x1d: // LSL describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); - AV_MODIFIED(desc); - AU_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); + desc.set_av_modified(); + desc.set_au_modified(); break; case 0x1e: // ASR describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); break; case 0x1f: // ASL describe_alu_input(desc, i1); describe_alumul_output(desc, io); - AN_MODIFIED(desc); - AZ_MODIFIED(desc); + desc.set_an_modified(); + desc.set_az_modified(); break; } } -void mb86235_frontend::describe_mul(opcode_desc &desc, uint32_t mulop) +void mb86235_device::frontend::describe_mul(opcode_desc &desc, uint32_t mulop) { int i1 = (mulop >> 10) & 0xf; int i2 = (mulop >> 5) & 0x1f; @@ -572,78 +538,78 @@ void mb86235_frontend::describe_mul(opcode_desc &desc, uint32_t mulop) if (m) { // FMUL - MN_MODIFIED(desc); - MZ_MODIFIED(desc); - MV_MODIFIED(desc); - MU_MODIFIED(desc); - MD_MODIFIED(desc); + desc.set_mn_modified(); + desc.set_mz_modified(); + desc.set_mv_modified(); + desc.set_mu_modified(); + desc.set_md_modified(); } else { // MUL - MN_MODIFIED(desc); - MZ_MODIFIED(desc); - MV_MODIFIED(desc); + desc.set_mn_modified(); + desc.set_mz_modified(); + desc.set_mv_modified(); } } -void mb86235_frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary, int disp) +void mb86235_device::frontend::describe_ea(opcode_desc &desc, int md, int arx, int ary, int disp) { switch (md) { case 0x0: // @ARx - AR_USED(desc, arx); + desc.set_ar_used(arx); break; case 0x1: // @ARx++ - AR_USED(desc, arx); AR_MODIFIED(desc, arx); + desc.set_ar_used(arx); desc.set_ar_modified(arx); break; case 0x2: // @ARx-- - AR_USED(desc, arx); AR_MODIFIED(desc, arx); + desc.set_ar_used(arx); desc.set_ar_modified(arx); break; case 0x3: // @ARx++disp - AR_USED(desc, arx); AR_MODIFIED(desc, arx); + desc.set_ar_used(arx); desc.set_ar_modified(arx); break; case 0x4: // @ARx+ARy - AR_USED(desc, arx); AR_USED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); break; case 0x5: // @ARx+ARy++ - AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); desc.set_ar_modified(ary); break; case 0x6: // @ARx+ARy-- - AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); desc.set_ar_modified(ary); break; case 0x7: // @ARx+ARy++disp - AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); desc.set_ar_modified(ary); break; case 0x8: // @ARx+ARyU - AR_USED(desc, arx); AR_USED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); break; case 0x9: // @ARx+ARyL - AR_USED(desc, arx); AR_USED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); break; case 0xa: // @ARx+disp - AR_USED(desc, arx); + desc.set_ar_used(arx); break; case 0xb: // @ARx+ARy+disp - AR_USED(desc, arx); AR_USED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); break; case 0xc: // @disp break; case 0xd: // @ARx+[ARy++] - AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); desc.set_ar_modified(ary); break; case 0xe: // @ARx+[ARy--] - AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); desc.set_ar_modified(ary); break; case 0xf: // @ARx+[ARy++disp] - AR_USED(desc, arx); AR_USED(desc, ary); AR_MODIFIED(desc, ary); + desc.set_ar_used(arx); desc.set_ar_used(ary); desc.set_ar_modified(ary); break; } } -void mb86235_frontend::describe_xfer1(opcode_desc &desc) +void mb86235_device::frontend::describe_xfer1(opcode_desc &desc) { - uint64_t opcode = desc.opptr.q[0]; + uint64_t opcode = desc.opptr; int dr = (opcode >> 12) & 0x7f; int sr = (opcode >> 19) & 0x7f; @@ -666,7 +632,7 @@ void mb86235_frontend::describe_xfer1(opcode_desc &desc) else { describe_ea(desc, md, sr & 7, ary, disp5); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } if ((dr & 0x40) == 0) @@ -676,7 +642,7 @@ void mb86235_frontend::describe_xfer1(opcode_desc &desc) else { describe_ea(desc, md, dr & 7, ary, disp5); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } } else @@ -685,26 +651,26 @@ void mb86235_frontend::describe_xfer1(opcode_desc &desc) if (dir == 0) { describe_reg_read(desc, dr & 0x3f); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else { describe_reg_write(desc, dr & 0x3f); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } } } -void mb86235_frontend::describe_double_xfer1(opcode_desc &desc) +void mb86235_device::frontend::describe_double_xfer1(opcode_desc &desc) { - uint64_t opcode = desc.opptr.q[0]; + uint64_t opcode = desc.opptr; - fatalerror("mb86235_frontend: describe_double_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); + fatalerror("mb86235_device::frontend: describe_double_xfer1 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); } -void mb86235_frontend::describe_xfer2(opcode_desc &desc) +void mb86235_device::frontend::describe_xfer2(opcode_desc &desc) { - uint64_t opcode = desc.opptr.q[0]; + uint64_t opcode = desc.opptr; int op = (opcode >> 39) & 3; int trm = (opcode >> 38) & 1; @@ -730,7 +696,7 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc) else { describe_ea(desc, md, sr & 7, ary, disp14); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } if ((dr & 0x40) == 0) @@ -740,7 +706,7 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc) else { describe_ea(desc, md, dr & 7, ary, disp14); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } } else @@ -749,31 +715,31 @@ void mb86235_frontend::describe_xfer2(opcode_desc &desc) if (dir == 0) { describe_reg_read(desc, dr & 0x3f); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else { describe_reg_write(desc, dr & 0x3f); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } } } else if (op == 2) // MOV4 { - fatalerror("mb86235_frontend: describe_xfer2 MOV4 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); + fatalerror("mb86235_device::frontend: describe_xfer2 MOV4 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); } } -void mb86235_frontend::describe_double_xfer2(opcode_desc &desc) +void mb86235_device::frontend::describe_double_xfer2(opcode_desc &desc) { - uint64_t opcode = desc.opptr.q[0]; - fatalerror("mb86235_frontend: describe_double_xfer2 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); + uint64_t opcode = desc.opptr; + fatalerror("mb86235_device::frontend: describe_double_xfer2 at %08X (%08X%08X)", desc.pc, (uint32_t)(opcode >> 32), (uint32_t)(opcode)); } -void mb86235_frontend::describe_xfer3(opcode_desc &desc) +void mb86235_device::frontend::describe_xfer3(opcode_desc &desc) { - uint64_t opcode = desc.opptr.q[0]; + uint64_t opcode = desc.opptr; int dr = (opcode >> 19) & 0x7f; int disp = (opcode >> 7) & 0xfff; @@ -789,18 +755,18 @@ void mb86235_frontend::describe_xfer3(opcode_desc &desc) case 2: // RAM-A case 3: // RAM-B - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); describe_ea(desc, md, dr & 7, ary, disp); break; } } -void mb86235_frontend::describe_control(opcode_desc &desc) +void mb86235_device::frontend::describe_control(opcode_desc &desc) { - int ef1 = (desc.opptr.q[0] >> 16) & 0x3f; - int ef2 = desc.opptr.q[0] & 0xffff; - int cop = (desc.opptr.q[0] >> 22) & 0x1f; - int rel12 = util::sext(desc.opptr.q[0], 12); + int ef1 = (desc.opptr >> 16) & 0x3f; + int ef2 = desc.opptr & 0xffff; + int cop = (desc.opptr >> 22) & 0x1f; + int rel12 = util::sext(desc.opptr, 12); switch (cop) { @@ -808,13 +774,13 @@ void mb86235_frontend::describe_control(opcode_desc &desc) break; case 0x01: // REP if (ef1 != 0) // ARx - AR_USED(desc, (ef2 >> 12) & 7); + desc.set_ar_used((ef2 >> 12) & 7); - desc.userflags |= OP_USERFLAG_REPEAT; + desc.set_repeat(); break; case 0x02: // SETL if (ef1 != 0) // ARx - AR_USED(desc, (ef2 >> 12) & 7); + desc.set_ar_used((ef2 >> 12) & 7); break; case 0x03: // CLRFI/CLRFO/CLRF break; @@ -837,24 +803,25 @@ void mb86235_frontend::describe_control(opcode_desc &desc) case 0x0d: // SETM #imm1, WAIT break; case 0x13: // DBLP rel12 - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = desc.pc + rel12; desc.delayslots = 1; break; case 0x14: // DBBC ARx:y, rel12 - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = desc.pc + rel12; desc.delayslots = 1; - AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7)); + desc.set_ar_used(((desc.opptr >> 13) & 7)); break; case 0x15: // DBBS ARx:y, rel12 - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = desc.pc + rel12; desc.delayslots = 1; - AR_USED(desc, ((desc.opptr.q[0] >> 13) & 7)); + desc.set_ar_used(((desc.opptr >> 13) & 7)); break; case 0x1b: // DRET - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; break; @@ -864,7 +831,7 @@ void mb86235_frontend::describe_control(opcode_desc &desc) case 0x18: // DCcc case 0x19: // DCNcc { - switch ((desc.opptr.q[0] >> 12) & 0xf) + switch ((desc.opptr >> 12) & 0xf) { case 0x0: desc.targetpc = ef2 & 0xfff; break; case 0x1: desc.targetpc = desc.pc + rel12; break; @@ -884,7 +851,7 @@ void mb86235_frontend::describe_control(opcode_desc &desc) case 0xf: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; } - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.delayslots = 1; break; } @@ -892,7 +859,7 @@ void mb86235_frontend::describe_control(opcode_desc &desc) case 0x1a: // DCALL case 0x12: // DJMP { - switch ((desc.opptr.q[0] >> 12) & 0xf) + switch ((desc.opptr >> 12) & 0xf) { case 0x0: desc.targetpc = ef2 & 0xfff; break; case 0x1: desc.targetpc = desc.pc + rel12; break; @@ -912,7 +879,8 @@ void mb86235_frontend::describe_control(opcode_desc &desc) case 0xf: desc.targetpc = BRANCH_TARGET_DYNAMIC; describe_reg_read(desc, (ef2 >> 6) & 0x3f); break; } - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.delayslots = 1; break; } diff --git a/src/devices/cpu/mb86235/mb86235fe.h b/src/devices/cpu/mb86235/mb86235fe.h index ed160a98c0a..0cf63cb0982 100644 --- a/src/devices/cpu/mb86235/mb86235fe.h +++ b/src/devices/cpu/mb86235/mb86235fe.h @@ -13,20 +13,175 @@ #pragma once #include "mb86235.h" + #include "cpu/drcfe.h" -class mb86235_frontend : public drc_frontend +#include + + +class mb86235_device::opcode_desc : public opcode_desc_base { public: - mb86235_frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + enum : uint8_t { INC = 1, DEC, ZERO }; -protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + uint64_t opptr; // copy of opcode + + void set_aa_used(unsigned n) { regin.set(REG_AA0 + n); } + void set_aa_modified(unsigned n) { regout.set(REG_AA0 + n); } + void set_ab_used(unsigned n) { regin.set(REG_AB0 + n); } + void set_ab_modified(unsigned n) { regout.set(REG_AB0 + n); } + void set_ma_used(unsigned n) { regin.set(REG_MA0 + n); } + void set_ma_modified(unsigned n) { regout.set(REG_MA0 + n); } + void set_mb_used(unsigned n) { regin.set(REG_MB0 + n); } + void set_mb_modified(unsigned n) { regout.set(REG_MB0 + n); } + void set_ar_used(unsigned n) { regin.set(REG_AR0 + n); } + void set_ar_modified(unsigned n) { regout.set(REG_AR0 + n); } + + void set_az_used() { regin.set(REG_AZ); } + void set_az_modified() { regout.set(REG_AZ); } + void set_an_used() { regin.set(REG_AN); } + void set_an_modified() { regout.set(REG_AN); } + void set_av_used() { regin.set(REG_AV); } + void set_av_modified() { regout.set(REG_AV); } + void set_au_used() { regin.set(REG_AU); } + void set_au_modified() { regout.set(REG_AU); } + void set_ad_used() { regin.set(REG_AD); } + void set_ad_modified() { regout.set(REG_AD); } + void set_zc_used() { regin.set(REG_ZC); } + void set_zc_modified() { regout.set(REG_ZC); } + void set_il_used() { regin.set(REG_IL); } + void set_il_modified() { regout.set(REG_IL); } + void set_nr_used() { regin.set(REG_NR); } + void set_nr_modified() { regout.set(REG_NR); } + void set_zd_used() { regin.set(REG_ZD); } + void set_zd_modified() { regout.set(REG_ZD); } + void set_mn_used() { regin.set(REG_MN); } + void set_mn_modified() { regout.set(REG_MN); } + void set_mz_used() { regin.set(REG_MZ); } + void set_mz_modified() { regout.set(REG_MZ); } + void set_mv_used() { regin.set(REG_MV); } + void set_mv_modified() { regout.set(REG_MV); } + void set_mu_used() { regin.set(REG_MU); } + void set_mu_modified() { regout.set(REG_MU); } + void set_md_used() { regin.set(REG_MD); } + void set_md_modified() { regout.set(REG_MD); } + + bool aa_used(unsigned n) const { return regin[REG_AA0 + n]; } + bool aa_modified(unsigned n) const { return regout[REG_AA0 + n]; } + bool ab_used(unsigned n) const { return regin[REG_AB0 + n]; } + bool ab_modified(unsigned n) const { return regout[REG_AB0 + n]; } + bool ma_used(unsigned n) const { return regin[REG_MA0 + n]; } + bool ma_modified(unsigned n) const { return regout[REG_MA0 + n]; } + bool mb_used(unsigned n) const { return regin[REG_MB0 + n]; } + bool mb_modified(unsigned n) const { return regout[REG_MB0 + n]; } + bool ar_used(unsigned n) const { return regin[REG_AR0 + n]; } + bool ar_modified(unsigned n) const { return regout[REG_AR0 + n]; } + + bool az_calc_required() const { return regreq[REG_AZ] || in_delay_slot(); } + bool an_calc_required() const { return regreq[REG_AN] || in_delay_slot(); } + bool av_calc_required() const { return regreq[REG_AV] || in_delay_slot(); } + bool au_calc_required() const { return regreq[REG_AU] || in_delay_slot(); } + bool ad_calc_required() const { return regreq[REG_AD] || in_delay_slot(); } + bool zc_calc_required() const { return regreq[REG_ZC] || in_delay_slot(); } + bool il_calc_required() const { return regreq[REG_IL] || in_delay_slot(); } + bool nr_calc_required() const { return regreq[REG_NR] || in_delay_slot(); } + bool zd_calc_required() const { return regreq[REG_ZD] || in_delay_slot(); } + bool mn_calc_required() const { return regreq[REG_MN] || in_delay_slot(); } + bool mz_calc_required() const { return regreq[REG_MZ] || in_delay_slot(); } + bool mv_calc_required() const { return regreq[REG_MV] || in_delay_slot(); } + bool mu_calc_required() const { return regreq[REG_MU] || in_delay_slot(); } + bool md_calc_required() const { return regreq[REG_MD] || in_delay_slot(); } + + void set_reads_memory() { m_reads_memory = true; } + void set_writes_memory() { m_writes_memory = true; } + void set_fifoin() { m_fifoin = true; } + void set_fifoout() { m_fifoout = true; } + void set_repeat() { m_repeat = true; } + void set_repeated_op() { m_repeated_op = true; } + void set_pr_inc() { m_pr = INC; } + void set_pr_dec() { m_pr = DEC; } + void set_pr_zero() { m_pr = ZERO; } + void set_pw_inc() { m_pw = INC; } + void set_pw_dec() { m_pw = DEC; } + void set_pw_zero() { m_pw = ZERO; } + + bool reads_memory() const { return m_reads_memory; } + bool writes_memory() const { return m_writes_memory; } + bool fifoin() const { return m_fifoin; } + bool fifoout() const { return m_fifoout; } + bool repeat() const { return m_repeat; } + bool repeated_op() const { return m_repeated_op; } + uint8_t pr() const { return m_pr; } + uint8_t pw() const { return m_pw; } + + void reset(offs_t curpc, bool in_delay_slot) + { + static_assert(REG_COUNT <= 56); + + opcode_desc_base::reset(curpc, in_delay_slot); + + opptr = 0; + m_reads_memory = false; + m_writes_memory = false; + m_fifoin = false; + m_fifoout = false; + m_repeat = false; + m_repeated_op = false; + m_pr = 0; + m_pw = 0; + } + +private: + enum + { + REG_AA0 = 0, + REG_AB0 = REG_AA0 + 8, + REG_MA0 = REG_AB0 + 8, + REG_MB0 = REG_MA0 + 8, + REG_AR0 = REG_MB0 + 8, + + REG_AZ = REG_AR0 + 8, + REG_AN, + REG_AV, + REG_AU, + REG_AD, + REG_ZC, + REG_IL, + REG_NR, + REG_ZD, + REG_MN, + REG_MZ, + REG_MV, + REG_MU, + REG_MD, + + REG_COUNT + }; + + bool m_reads_memory; + bool m_writes_memory; + bool m_fifoin; + bool m_fifoout; + bool m_repeat; + bool m_repeated_op; + uint8_t m_pr; + uint8_t m_pw; +}; + + +class mb86235_device::frontend : public drc_frontend_base +{ +public: + frontend(mb86235_device *core, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); private: mb86235_device *m_core; + bool describe(opcode_desc &desc, opcode_desc const *prev); + void describe_alu(opcode_desc &desc, uint32_t aluop); void describe_mul(opcode_desc &desc, uint32_t mulop); void describe_xfer1(opcode_desc &desc); diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp index a56f19a3b21..110aef87928 100644 --- a/src/devices/cpu/mips/mips3.cpp +++ b/src/devices/cpu/mips/mips3.cpp @@ -13,6 +13,7 @@ #include "mips3com.h" #include "mips3dsm.h" +#include "mips3fe.h" #include "ps2vu.h" #include "emuopts.h" @@ -219,6 +220,10 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons set_vtlb_fixed_entries(2 * m_tlbentries + 2); } +mips3_device::~mips3_device() +{ +} + device_memory_interface::space_config_vector mips3_device::memory_space_config() const { return space_config_vector { @@ -486,7 +491,7 @@ void mips3_device::device_start() m_drcuml->symbol_add(&m_fpmode, sizeof(m_fpmode), "fpmode"); /* initialize the front-end helper */ - m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); + m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); /* allocate memory for cache-local state and initialize it */ memcpy(m_fpmode, fpmode_source, sizeof(fpmode_source)); diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h index 181df0e9a47..bcf6891bd0b 100644 --- a/src/devices/cpu/mips/mips3.h +++ b/src/devices/cpu/mips/mips3.h @@ -14,13 +14,14 @@ MIPS III/IV emulator. #pragma once - -#include "cpu/drcfe.h" -#include "cpu/drcuml.h" #include "ps2vu.h" +#include "cpu/drcuml.h" + #include "divtlb.h" +#include + DECLARE_DEVICE_TYPE(R4000BE, r4000be_device) DECLARE_DEVICE_TYPE(R4000LE, r4000le_device) @@ -257,11 +258,10 @@ INTERRUPT CONSTANTS STRUCTURES ***************************************************************************/ -class mips3_frontend; - class mips3_device : public cpu_device, public device_vtlb_interface { protected: - friend class mips3_frontend; + class frontend; + class opcode_desc; /* MIPS flavors */ enum mips3_flavor { @@ -303,6 +303,7 @@ protected: public: // construction/destruction mips3_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, mips3_flavor flavor, endianness_t endiannes, uint32_t data_bits); + virtual ~mips3_device(); void set_drc_cache_size(size_t bytes) { m_drc_cache.set_size(bytes); } void set_icache_size(size_t icache_size) { c_icache_size = icache_size; } @@ -480,8 +481,8 @@ protected: /* core state */ drc_cache m_drc_cache; /* pointer to the DRC code cache */ - std::unique_ptr m_drcuml;/* DRC UML generator state */ - std::unique_ptr m_drcfe; /* pointer to the DRC front-end state */ + std::unique_ptr m_drcuml; /* DRC UML generator state */ + std::unique_ptr m_drcfe; /* pointer to the DRC front-end state */ uint32_t m_drcoptions; /* configurable DRC options */ /* internal stuff */ @@ -655,8 +656,8 @@ private: void generate_badcop(drcuml_block &block, const int cop); void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); - const char *log_desc_flags_to_string(uint32_t flags); - void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist); + const char *log_desc_flags_to_string(opcode_desc const &desc); + void log_register_list(const char *string, const std::bitset<68> ®list, const std::bitset<68> *regnostarlist); void log_opcode_desc(const opcode_desc *desclist, int indent); void load_elf(); @@ -1011,31 +1012,6 @@ public: }; - -class mips3_frontend : public drc_frontend { -public: - // construction/destruction - mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - -protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; - -private: - // internal helpers - bool describe_special(uint32_t op, opcode_desc &desc); - bool describe_regimm(uint32_t op, opcode_desc &desc); - bool describe_idt(uint32_t op, opcode_desc &desc); - bool describe_cop0(uint32_t op, opcode_desc &desc); - bool describe_cop1(uint32_t op, opcode_desc &desc); - bool describe_cop1x(uint32_t op, opcode_desc &desc); - bool describe_cop2(uint32_t op, opcode_desc &desc); - - // internal state - mips3_device *m_mips3; -}; - - /*************************************************************************** COMPILER-SPECIFIC OPTIONS ***************************************************************************/ diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp index f682da6b212..383c90529d0 100644 --- a/src/devices/cpu/mips/mips3drc.cpp +++ b/src/devices/cpu/mips/mips3drc.cpp @@ -2,7 +2,7 @@ // copyright-holders:Aaron Giles /*************************************************************************** - mips3drc.c + mips3drc.cpp Universal machine language-based MIPS III/IV emulator. @@ -24,11 +24,13 @@ ***************************************************************************/ #include "emu.h" +#include "mips3.h" + #include "mips3com.h" #include "mips3fe.h" #include "mips3dsm.h" #include "ps2vu.h" -#include "cpu/drcfe.h" + #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" @@ -92,17 +94,6 @@ static const uint8_t fcc_shift[8] = { 23, 25, 26, 27, 28, 29, 30, 31 }; INLINE FUNCTIONS ***************************************************************************/ -/*------------------------------------------------- - epc - compute the exception PC from a - descriptor --------------------------------------------------*/ - -static inline uint32_t epc(const opcode_desc *desc) -{ - return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc; -} - - /*------------------------------------------------- alloc_handle - allocate a handle if not already allocated @@ -340,7 +331,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc) /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + if (seqlast->end_sequence()) break; assert(seqlast != nullptr); @@ -370,7 +361,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc) generate_checksum_block(block, compiler, seqhead, seqlast, codelast); /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) { UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000 } @@ -382,7 +373,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc) } /* if we need to return to the start, do it */ - if (seqlast->flags & OPFLAG_RETURN_TO_START) + if (seqlast->return_to_start()) nextpc = pc; /* otherwise we just go to the next instruction */ @@ -393,7 +384,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc) generate_update_cycles(block, compiler, nextpc, true); // /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ - if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES) + if (seqlast->can_change_modes()) { UML_HASHJMP(block, mem(&m_core->mode), nextpc, *m_nocode); // hashjmp ,nextpc,nocode } @@ -1155,18 +1146,18 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & if (m_drcuml->logging()) block.append_comment("[Validation for %08X]", seqhead->pc); // comment - /* loose verify or single instruction: just compare and fail */ if (!(m_drcoptions & MIPS3DRC_STRICT_VERIFY) || seqhead->next() == nullptr) { - if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + // loose verify or single instruction: just compare and fail + if (!seqhead->virtual_noop()) { - uint32_t sum = seqhead->opptr.l[0]; + uint32_t sum = seqhead->opptr; const void *base = m_prptr(seqhead->physpc); uint32_t low_bits = (seqhead->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i0,base,0,dword if (seqhead->delay.first() != nullptr - && !(seqhead->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) + && !seqhead->delay.first()->virtual_noop() && seqhead->physpc != seqhead->delay.first()->physpc) { uint32_t low_bits = (seqhead->delay.first()->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; @@ -1175,26 +1166,27 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += seqhead->delay.first()->opptr.l[0]; + sum += seqhead->delay.first()->opptr; } - UML_CMP(block, I0, sum); // cmp i0,opptr[0] - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc + UML_CMP(block, I0, sum); // cmp i0,opptr + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); // exne nocode,seqhead->pc } } - - /* full verification; sum up everything */ else { + // full verification; sum up everything #if 0 for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + if (!curdesc->virtual_noop()) { const void *base = m_prptr(seqhead->physpc); UML_LOAD(block, I0, base, m_dword_xor, SIZE_DWORD, SCALE_x1); // load i0,base,0,dword - UML_CMP(block, I0, curdesc->opptr.l[0]); // cmp i0,opptr[0] + UML_CMP(block, I0, curdesc->opptr); // cmp i0,opptr UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc } + } #else uint32_t sum = 0; const void *base = m_prptr(seqhead->physpc); @@ -1202,31 +1194,31 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & const uint32_t last_physpc = codelast->physpc; uint32_t low_bits = (seqhead->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i0,base,0,dword - sum += seqhead->opptr.l[0]; - if ((m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK) && !(codelast->flags & OPFLAG_VIRTUAL_NOOP) && last_physpc != seqhead->physpc) + sum += seqhead->opptr; + if ((m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK) && !codelast->virtual_noop() && last_physpc != seqhead->physpc) { base = m_prptr(last_physpc); assert(base != nullptr); low_bits = (last_physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += codelast->opptr.l[0]; + sum += codelast->opptr; } if (!(m_drcoptions & MIPS3DRC_EXTRA_INSTR_CHECK)) { for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) { - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!curdesc->virtual_noop()) { base = m_prptr(curdesc->physpc); assert(base != nullptr); low_bits = (curdesc->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->opptr.l[0]; + sum += curdesc->opptr; if (curdesc->delay.first() != nullptr - && !(curdesc->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) + && !curdesc->delay.first()->virtual_noop() && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) { base = m_prptr(curdesc->delay.first()->physpc); @@ -1234,7 +1226,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & low_bits = (curdesc->delay.first()->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->delay.first()->opptr.l[0]; + sum += curdesc->delay.first()->opptr; } } } @@ -1243,7 +1235,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & { for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) { - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!curdesc->virtual_noop()) { // Skip the last if it was already included above if (curdesc->physpc != last_physpc) @@ -1253,11 +1245,11 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & low_bits = (curdesc->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->opptr.l[0]; + sum += curdesc->opptr; } if (curdesc->delay.first() != nullptr - && !(curdesc->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) + && !curdesc->delay.first()->virtual_noop() && (curdesc == seqlast || (curdesc->next() != nullptr && curdesc->next()->physpc != curdesc->delay.first()->physpc))) { base = m_prptr(curdesc->delay.first()->physpc); @@ -1265,13 +1257,13 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & low_bits = (curdesc->delay.first()->physpc & data_bits_mask) ^ m_dword_xor; UML_LOAD(block, I1, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->delay.first()->opptr.l[0]; + sum += curdesc->delay.first()->opptr; } } } } UML_CMP(block, I0, sum); // cmp i0,sum - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); // exne nocode,seqhead->pc if (DEBUG_STRICT_VERIFY) { // This code will do additional checks on the last instruction and last delay slot and indicate if the check failed @@ -1279,13 +1271,13 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & uml::code_label check_failed = compiler.labelnum++; uml::code_label check_passed = compiler.labelnum++; // Check the last instruction - if (!(codelast->flags & OPFLAG_VIRTUAL_NOOP) && last_physpc != seqhead->physpc) + if (!codelast->virtual_noop() && (last_physpc != seqhead->physpc)) { base = m_prptr(last_physpc); assert(base != nullptr); low_bits = (last_physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword - sum = codelast->opptr.l[0]; + sum = codelast->opptr; UML_CMP(block, I0, sum); // cmp i0,sum UML_JMPc(block, COND_E, check_second); static const char text[] = "Last instr validation fail seq: %08X end: %08x\n"; @@ -1298,14 +1290,14 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & UML_JMP(block, check_failed); // Check the last instruction delay slot UML_LABEL(block, check_second); - if (codelast->delay.first() != nullptr && !(codelast->delay.first()->flags & OPFLAG_VIRTUAL_NOOP) + if (codelast->delay.first() != nullptr && !codelast->delay.first()->virtual_noop() && last_physpc != seqhead->physpc) { base = m_prptr(codelast->delay.first()->physpc); assert(base != nullptr); low_bits = (codelast->delay.first()->physpc & (m_data_bits == 64 ? 4 : 0)) ^ m_dword_xor; UML_LOAD(block, I0, base, low_bits, SIZE_DWORD, SCALE_x1); // load i1,base,dword - sum = codelast->delay.first()->opptr.l[0]; + sum = codelast->delay.first()->opptr; UML_CMP(block, I0, sum); // cmp i0,sum UML_JMPc(block, COND_E, check_passed); static const char text[] = "Last delay slot validation fail seq: %08X end: %08x\n"; @@ -1319,7 +1311,7 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & } UML_JMP(block, check_passed); UML_LABEL(block, check_failed); - UML_EXH(block, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc + UML_EXH(block, *m_nocode, seqhead->epc()); // exne nocode,seqhead->pc UML_LABEL(block, check_passed); } #endif @@ -1335,11 +1327,11 @@ void mips3_device::generate_checksum_block(drcuml_block &block, compiler_state & void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { /* add an entry for the log */ - if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + if (m_drcuml->logging() && !desc->virtual_noop()) + log_add_disasm_comment(block, desc->pc, desc->opptr); /* set the PC map variable */ - offs_t expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc; + const offs_t expc = desc->epc(); UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc /* accumulate total cycles */ @@ -1347,7 +1339,7 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s /* is this a hotspot? */ for (int hotnum = 0; hotnum < MIPS3_MAX_HOTSPOTS; hotnum++) - if (m_hotspot[hotnum].pc != 0 && desc->pc == m_hotspot[hotnum].pc && desc->opptr.l[0] == m_hotspot[hotnum].opcode) + if (m_hotspot[hotnum].pc != 0 && desc->pc == m_hotspot[hotnum].pc && desc->opptr == m_hotspot[hotnum].opcode) { compiler.cycles += m_hotspot[hotnum].cycles; break; @@ -1372,7 +1364,7 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s } /* if we hit an unmapped address, fatal error */ - if (desc->flags & OPFLAG_COMPILER_UNMAPPED) + if (desc->compiler_unmapped()) { UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc save_fast_iregs(block); @@ -1380,7 +1372,7 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s } /* if we hit a compiler page fault, it's just like a TLB mismatch */ - if (desc->flags & OPFLAG_COMPILER_PAGE_FAULT) + if (desc->compiler_page_fault()) { if (PRINTF_MMU) { @@ -1395,7 +1387,7 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s } /* validate our TLB entry at this PC; if we fail, we need to handle it */ - if ((desc->flags & OPFLAG_VALIDATE_TLB) && (desc->pc < 0x80000000 || desc->pc >= 0xc0000000)) + if (desc->validate_tlb() && (desc->pc < 0x80000000 || desc->pc >= 0xc0000000)) { const vtlb_entry *tlbtable = vtlb_table(); @@ -1430,18 +1422,19 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s } } - /* if this is an invalid opcode, generate the exception now */ - if (desc->flags & OPFLAG_INVALID_OPCODE) - UML_EXH(block, *m_exception[EXCEPTION_INVALIDOP], 0); // exh invalidop,0 - - /* otherwise, unless this is a virtual no-op, it's a regular instruction */ - else if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (desc->invalid_opcode()) { - /* compile the instruction */ + // if this is an invalid opcode, generate the exception now + UML_EXH(block, *m_exception[EXCEPTION_INVALIDOP], 0); // exh invalidop,0 + } + else if (!desc->virtual_noop()) + { + // otherwise, unless this is a virtual no-op, it's a regular instruction + // compile the instruction if (!generate_opcode(block, compiler, desc)) { UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - UML_MOV(block, mem(&m_core->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l + UML_MOV(block, mem(&m_core->arg0), desc->opptr); // mov [arg0],desc->opptr UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented } } @@ -1455,7 +1448,7 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s void mips3_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t linkreg) { compiler_state compiler_temp(compiler); - uint32_t op = desc->opptr.l[0]; + const uint32_t op = desc->opptr; /* fetch the target register if dynamic, in case it is modified by the delay slot */ if (desc->targetpc == BRANCH_TARGET_DYNAMIC) @@ -1478,7 +1471,7 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_ if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { generate_update_cycles(block, compiler_temp, desc->targetpc, true); // - if (!(m_drcoptions & MIPS3DRC_DISABLE_INTRABLOCK) && (desc->flags & OPFLAG_INTRABLOCK_BRANCH)) + if (!(m_drcoptions & MIPS3DRC_DISABLE_INTRABLOCK) && desc->intrablock_branch()) { UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000 } @@ -1509,9 +1502,9 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_ bool mips3_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0); - uint32_t op = desc->opptr.l[0]; - uint8_t opswitch = op >> 26; + const int in_delay_slot = desc->in_delay_slot(); + const uint32_t op = desc->opptr; + const uint8_t opswitch = op >> 26; uml::code_label skip; switch (opswitch) @@ -2047,8 +2040,8 @@ bool mips3_device::generate_opcode(drcuml_block &block, compiler_state &compiler bool mips3_device::generate_special(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; - uint8_t opswitch = op & 63; + const uint32_t op = desc->opptr; + const uint8_t opswitch = op & 63; switch (opswitch) { @@ -2440,8 +2433,8 @@ bool mips3_device::generate_special(drcuml_block &block, compiler_state &compile bool mips3_device::generate_regimm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; - uint8_t opswitch = RTREG; + const uint32_t op = desc->opptr; + const uint8_t opswitch = RTREG; uml::code_label skip; switch (opswitch) @@ -2527,8 +2520,8 @@ bool mips3_device::generate_regimm(drcuml_block &block, compiler_state &compiler bool mips3_device::generate_idt(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; - uint8_t opswitch = op & 0x1f; + const uint32_t op = desc->opptr; + const uint8_t opswitch = op & 0x1f; /* only enabled on IDT processors */ if (m_flavor != MIPS3_TYPE_R4650) @@ -2577,7 +2570,7 @@ bool mips3_device::generate_idt(drcuml_block &block, compiler_state &compiler, c bool mips3_device::generate_set_cop0_reg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t reg) { - int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0); + const int in_delay_slot = desc->in_delay_slot(); uml::code_label link; switch (reg) @@ -2729,8 +2722,8 @@ void mips3_device::check_cop0_access(drcuml_block &block) bool mips3_device::generate_cop0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; - uint8_t opswitch = RSREG; + const uint32_t op = desc->opptr; + const uint8_t opswitch = RSREG; int skip; /* generate an exception if COP0 is disabled unless we are in kernel mode */ @@ -2865,7 +2858,7 @@ void mips3_device::check_cop1_access(drcuml_block &block) bool mips3_device::generate_cop1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; + const uint32_t op = desc->opptr; uml::code_label skip; uml::condition_t condition; @@ -3386,8 +3379,8 @@ bool mips3_device::generate_cop1(drcuml_block &block, compiler_state &compiler, bool mips3_device::generate_cop1x(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0); - uint32_t op = desc->opptr.l[0]; + const int in_delay_slot = desc->in_delay_slot(); + const uint32_t op = desc->opptr; check_cop1_access(block); @@ -3505,52 +3498,52 @@ void mips3_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint flags -------------------------------------------------*/ -const char *mips3_device::log_desc_flags_to_string(uint32_t flags) +const char *mips3_device::log_desc_flags_to_string(opcode_desc const &desc) { static char tempbuf[30]; char *dest = tempbuf; /* branches */ - if (flags & OPFLAG_IS_UNCONDITIONAL_BRANCH) + if (desc.is_unconditional_branch()) *dest++ = 'U'; - else if (flags & OPFLAG_IS_CONDITIONAL_BRANCH) + else if (desc.is_conditional_branch()) *dest++ = 'C'; else *dest++ = '.'; /* intrablock branches */ - *dest++ = (flags & OPFLAG_INTRABLOCK_BRANCH) ? 'i' : '.'; + *dest++ = desc.intrablock_branch() ? 'i' : '.'; /* branch targets */ - *dest++ = (flags & OPFLAG_IS_BRANCH_TARGET) ? 'B' : '.'; + *dest++ = desc.is_branch_target() ? 'B' : '.'; /* delay slots */ - *dest++ = (flags & OPFLAG_IN_DELAY_SLOT) ? 'D' : '.'; + *dest++ = desc.in_delay_slot() ? 'D' : '.'; /* exceptions */ - if (flags & OPFLAG_WILL_CAUSE_EXCEPTION) + if (desc.will_cause_exception()) *dest++ = 'E'; - else if (flags & OPFLAG_CAN_CAUSE_EXCEPTION) + else if (desc.can_cause_exception()) *dest++ = 'e'; else *dest++ = '.'; /* read/write */ - if (flags & OPFLAG_READS_MEMORY) + if (desc.reads_memory()) *dest++ = 'R'; - else if (flags & OPFLAG_WRITES_MEMORY) + else if (desc.writes_memory()) *dest++ = 'W'; else *dest++ = '.'; /* TLB validation */ - *dest++ = (flags & OPFLAG_VALIDATE_TLB) ? 'V' : '.'; + *dest++ = desc.validate_tlb() ? 'V' : '.'; /* TLB modification */ - *dest++ = (flags & OPFLAG_MODIFIES_TRANSLATION) ? 'T' : '.'; + *dest++ = desc.modifies_translation() ? 'T' : '.'; /* redispatch */ - *dest++ = (flags & OPFLAG_REDISPATCH) ? 'R' : '.'; + *dest++ = desc.redispatch() ? 'R' : '.'; return tempbuf; } @@ -3559,49 +3552,52 @@ const char *mips3_device::log_desc_flags_to_string(uint32_t flags) log_register_list - log a list of GPR registers -------------------------------------------------*/ -void mips3_device::log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist) +void mips3_device::log_register_list(const char *string, const std::bitset<68> ®list, const std::bitset<68> *regnostarlist) { int count = 0; - int regnum; /* skip if nothing */ - if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0) + if (reglist.none()) return; m_drcuml->log_printf("[%s:", string); - for (regnum = 1; regnum < 32; regnum++) - if (reglist[0] & REGFLAG_R(regnum)) + for (int regnum = 1; regnum < 32; regnum++) + { + if (reglist[opcode_desc::REG_FLAG_R0 + regnum]) { m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[0] & REGFLAG_R(regnum))) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_FLAG_R0 + regnum]) m_drcuml->log_printf("*"); } + } - for (regnum = 0; regnum < 32; regnum++) - if (reglist[1] & REGFLAG_CPR1(regnum)) + for (int regnum = 0; regnum < 32; regnum++) + { + if (reglist[opcode_desc::REG_FLAG_CPR10 + regnum]) { m_drcuml->log_printf("%sfr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_CPR1(regnum))) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_FLAG_CPR10 + regnum]) m_drcuml->log_printf("*"); } + } - if (reglist[2] & REGFLAG_LO) + if (reglist[opcode_desc::REG_FLAG_LO]) { m_drcuml->log_printf("%slo", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_LO)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_FLAG_LO]) m_drcuml->log_printf("*"); } - if (reglist[2] & REGFLAG_HI) + if (reglist[opcode_desc::REG_FLAG_HI]) { m_drcuml->log_printf("%shi", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_HI)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_FLAG_HI]) m_drcuml->log_printf("*"); } - if (reglist[2] & REGFLAG_FCC) + if (reglist[opcode_desc::REG_FLAG_FCC]) { m_drcuml->log_printf("%sfcc", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[2] & REGFLAG_FCC)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_FLAG_FCC]) m_drcuml->log_printf("*"); } @@ -3627,23 +3623,23 @@ void mips3_device::log_opcode_desc(const opcode_desc *desclist, int indent) /* disassemle the current instruction and output it to the log */ if (m_drcuml->logging() || m_drcuml->logging_native()) { - if (desclist->flags & OPFLAG_VIRTUAL_NOOP) + if (desclist->virtual_noop()) buffer << ""; else { mips3_disassembler mips3d; - mips3d.dasm_one(buffer, desclist->pc, desclist->opptr.l[0]); + mips3d.dasm_one(buffer, desclist->pc, desclist->opptr); } } else buffer << "???"; const std::string buffer_string = buffer.str(); - m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer_string.c_str()); + m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(*desclist), buffer_string.c_str()); /* output register states */ log_register_list("use", desclist->regin, nullptr); - log_register_list("mod", desclist->regout, desclist->regreq); + log_register_list("mod", desclist->regout, &desclist->regreq); m_drcuml->log_printf("\n"); /* if we have a delay slot, output it recursively */ @@ -3651,7 +3647,7 @@ void mips3_device::log_opcode_desc(const opcode_desc *desclist, int indent) log_opcode_desc(desclist->delay.first(), indent + 1); /* at the end of a sequence add a dividing line */ - if (desclist->flags & OPFLAG_END_SEQUENCE) + if (desclist->end_sequence()) m_drcuml->log_printf("-----\n"); } } diff --git a/src/devices/cpu/mips/mips3fe.cpp b/src/devices/cpu/mips/mips3fe.cpp index 49b86be681b..9984626f760 100644 --- a/src/devices/cpu/mips/mips3fe.cpp +++ b/src/devices/cpu/mips/mips3fe.cpp @@ -10,8 +10,10 @@ #include "emu.h" #include "mips3fe.h" + #include "mips3com.h" -#include "ps2vu.h" + +#include "cpu/drcfe.ipp" //************************************************************************** @@ -22,22 +24,31 @@ // mips3_frontend - constructor //------------------------------------------------- -mips3_frontend::mips3_frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*mips3, window_start, window_end, max_sequence), - m_mips3(mips3) +mips3_device::frontend::frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend_base(mips3->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) + , m_mips3(mips3) { } +mips3_device::frontend::~frontend() +{ +} + +mips3_device::opcode_desc const *mips3_device::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + //------------------------------------------------- // describe - build a description of a single // instruction //------------------------------------------------- -bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +bool mips3_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint32_t op, opswitch; - // compute the physical PC assert((desc.physpc & 3) == 0); address_space *tspace; @@ -45,20 +56,24 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { // uh-oh: a page fault; leave the description empty and just if this is the first instruction, leave it empty and // mark as needing to validate; otherwise, just end the sequence here - desc.flags |= OPFLAG_VALIDATE_TLB | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_COMPILER_PAGE_FAULT | OPFLAG_VIRTUAL_NOOP | OPFLAG_END_SEQUENCE; + desc.set_validate_tlb(); + desc.set_can_cause_exception(); + desc.set_compiler_page_fault(); + desc.set_virtual_noop(); + desc.set_end_sequence(); return true; } // fetch the opcode assert((desc.physpc & 3) == 0); - op = desc.opptr.l[0] = m_mips3->m_pr32(desc.physpc); + const uint32_t op = desc.opptr = m_mips3->m_pr32(desc.physpc); // all instructions are 4 bytes and default to a single cycle each desc.length = 4; desc.cycles = 1; // parse the instruction - opswitch = op >> 26; + const uint32_t opswitch = op >> 26; switch (opswitch) { case 0x00: // SPECIAL @@ -85,14 +100,16 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return describe_idt(op, desc); case 0x02: // J - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = (desc.pc & 0xf0000000) | (LIMMVAL << 2); desc.delayslots = 1; return true; case 0x03: // JAL - desc.regout[0] |= REGFLAG_R(31); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_r_modified(31); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = (desc.pc & 0xf0000000) | (LIMMVAL << 2); desc.delayslots = 1; return true; @@ -102,11 +119,15 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x14: // BEQL case 0x15: // BNEL if ((opswitch == 0x04 || opswitch == 0x14) && RSREG == RTREG) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else { - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_is_conditional_branch(); } desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; @@ -118,11 +139,14 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x16: // BLEZL case 0x17: // BGTZL if ((opswitch == 0x06 || opswitch == 0x16) && RSREG == 0) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else { - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_r_used(RSREG); + desc.set_is_conditional_branch(); } desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; @@ -131,9 +155,9 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x08: // ADDI case 0x18: // DADDI - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[0] |= REGFLAG_R(RTREG); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_r_modified(RTREG); + desc.set_can_cause_exception(); return true; case 0x09: // ADDIU @@ -143,19 +167,19 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x0d: // ORI case 0x0e: // XORI case 0x19: // DADDIU - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_r_used(RSREG); + desc.set_r_modified(RTREG); return true; case 0x0f: // LUI - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_r_modified(RTREG); return true; case 0x1a: // LDL case 0x1b: // LDR case 0x22: // LWL case 0x26: // LWR - desc.regin[0] |= REGFLAG_R(RTREG); + desc.set_r_used(RTREG); [[fallthrough]]; case 0x20: // LB case 0x21: // LH @@ -166,9 +190,10 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x30: // LL case 0x34: // LLD case 0x37: // LD - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[0] |= REGFLAG_R(RTREG); - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_r_modified(RTREG); + desc.set_reads_memory(); + desc.set_can_cause_exception(); return true; case 0x28: // SB @@ -179,41 +204,49 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x2d: // SDR case 0x2e: // SWR case 0x3f: // SD - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_writes_memory(); + desc.set_can_cause_exception(); return true; case 0x38: // SC case 0x3c: // SCD - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[0] |= REGFLAG_R(RTREG); - desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_r_modified(RTREG); + desc.set_writes_memory(); + desc.set_can_cause_exception(); return true; case 0x31: // LWC1 case 0x35: // LDC1 - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[1] |= REGFLAG_CPR1(RTREG); - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_cpr1_modified(RTREG); + desc.set_reads_memory(); + desc.set_can_cause_exception(); return true; case 0x39: // SWC1 case 0x3d: // SDC1 - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regin[1] |= REGFLAG_CPR1(RTREG); - desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_cpr1_used(RTREG); + desc.set_writes_memory(); + desc.set_can_cause_exception(); return true; case 0x32: // LWC2 case 0x36: // LDC2 - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_reads_memory(); + desc.set_can_cause_exception(); return true; case 0x3a: // SWC2 case 0x3e: // SDC2 - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_writes_memory(); + desc.set_can_cause_exception(); return true; case 0x33: // PREF @@ -234,7 +267,7 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev) // single instruction in the 'special' group //------------------------------------------------- -bool mips3_frontend::describe_special(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_special(uint32_t op, opcode_desc &desc) { switch (op & 63) { @@ -247,15 +280,15 @@ bool mips3_frontend::describe_special(uint32_t op, opcode_desc &desc) case 0x3c: // DSLL32 case 0x3e: // DSRL32 case 0x3f: // DSRA32 - desc.regin[0] |= REGFLAG_R(RTREG); - desc.regout[0] |= REGFLAG_R(RDREG); + desc.set_r_used(RTREG); + desc.set_r_modified(RDREG); return true; case 0x0a: // MOVZ - MIPS IV case 0x0b: // MOVN - MIPS IV if (m_mips3->m_flavor < mips3_device::MIPS3_TYPE_MIPS_IV) return false; - desc.regin[0] |= REGFLAG_R(RDREG); + desc.set_r_used(RDREG); [[fallthrough]]; case 0x04: // SLLV case 0x06: // SRLV @@ -273,17 +306,19 @@ bool mips3_frontend::describe_special(uint32_t op, opcode_desc &desc) case 0x2b: // SLTU case 0x2d: // DADDU case 0x2f: // DSUBU - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[0] |= REGFLAG_R(RDREG); + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_r_modified(RDREG); return true; case 0x20: // ADD case 0x22: // SUB case 0x2c: // DADD case 0x2e: // DSUB - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[0] |= REGFLAG_R(RDREG); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_r_modified(RDREG); + desc.set_can_cause_exception(); return true; case 0x30: // TGE @@ -292,84 +327,96 @@ bool mips3_frontend::describe_special(uint32_t op, opcode_desc &desc) case 0x33: // TLTU case 0x34: // TEQ case 0x36: // TNE - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_can_cause_exception(); return true; case 0x01: // MOVF - MIPS IV if (m_mips3->m_flavor < mips3_device::MIPS3_TYPE_MIPS_IV) return false; - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regin[2] |= REGFLAG_FCC; - desc.regout[0] |= REGFLAG_R(RDREG); + desc.set_r_used(RSREG); + desc.set_fcc_used(); + desc.set_r_modified(RDREG); return true; case 0x08: // JR - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_r_used(RSREG); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; return true; case 0x09: // JALR - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[0] |= REGFLAG_R(RDREG); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_r_used(RSREG); + desc.set_r_modified(RDREG); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; return true; case 0x10: // MFHI - desc.regin[2] |= REGFLAG_HI; - desc.regout[0] |= REGFLAG_R(RDREG); + desc.set_hi_used(); + desc.set_r_modified(RDREG); return true; case 0x11: // MTHI - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[2] |= REGFLAG_HI; + desc.set_r_used(RSREG); + desc.set_hi_modified(); return true; case 0x12: // MFLO - desc.regin[2] |= REGFLAG_LO; - desc.regout[0] |= REGFLAG_R(RDREG); + desc.set_lo_used(); + desc.set_r_modified(RDREG); return true; case 0x13: // MTLO - desc.regin[0] |= REGFLAG_R(RSREG); - desc.regout[2] |= REGFLAG_LO; + desc.set_r_used(RSREG); + desc.set_lo_modified(); return true; case 0x18: // MULT case 0x19: // MULTU - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[2] |= REGFLAG_LO | REGFLAG_HI; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_lo_modified(); + desc.set_hi_modified(); desc.cycles = 3; return true; case 0x1a: // DIV case 0x1b: // DIVU - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[2] |= REGFLAG_LO | REGFLAG_HI; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_lo_modified(); + desc.set_hi_modified(); desc.cycles = 35; return true; case 0x1c: // DMULT case 0x1d: // DMULTU - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[2] |= REGFLAG_LO | REGFLAG_HI; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_lo_modified(); + desc.set_hi_modified(); desc.cycles = 7; return true; case 0x1e: // DDIV case 0x1f: // DDIVU - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[2] |= REGFLAG_LO | REGFLAG_HI; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_lo_modified(); + desc.set_hi_modified(); desc.cycles = 67; return true; case 0x0c: // SYSCALL case 0x0d: // BREAK - desc.flags |= OPFLAG_WILL_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE; + desc.set_will_cause_exception(); + desc.set_end_sequence(); return true; case 0x0f: // SYNC @@ -386,7 +433,7 @@ bool mips3_frontend::describe_special(uint32_t op, opcode_desc &desc) // single instruction in the 'regimm' group //------------------------------------------------- -bool mips3_frontend::describe_regimm(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_regimm(uint32_t op, opcode_desc &desc) { switch (RTREG) { @@ -395,11 +442,14 @@ bool mips3_frontend::describe_regimm(uint32_t op, opcode_desc &desc) case 0x02: // BLTZL case 0x03: // BGEZL if (RTREG == 0x01 && RSREG == 0) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else { - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_r_used(RSREG); + desc.set_is_conditional_branch(); } desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; @@ -412,8 +462,8 @@ bool mips3_frontend::describe_regimm(uint32_t op, opcode_desc &desc) case 0x0b: // TLTIU case 0x0c: // TEQI case 0x0e: // TNEI - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_r_used(RSREG); + desc.set_can_cause_exception(); return true; case 0x10: // BLTZAL @@ -421,13 +471,16 @@ bool mips3_frontend::describe_regimm(uint32_t op, opcode_desc &desc) case 0x12: // BLTZALL case 0x13: // BGEZALL if (RTREG == 0x11 && RSREG == 0) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else { - desc.regin[0] |= REGFLAG_R(RSREG); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_r_used(RSREG); + desc.set_is_conditional_branch(); } - desc.regout[0] |= REGFLAG_R(31); + desc.set_r_modified(31); desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; desc.skipslots = (RTREG & 0x02) ? 1 : 0; @@ -443,7 +496,7 @@ bool mips3_frontend::describe_regimm(uint32_t op, opcode_desc &desc) // instruction in the IDT-specific group //------------------------------------------------- -bool mips3_frontend::describe_idt(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_idt(uint32_t op, opcode_desc &desc) { // only on the R4650 if (m_mips3->m_flavor != mips3_device::MIPS3_TYPE_R4650) @@ -453,14 +506,18 @@ bool mips3_frontend::describe_idt(uint32_t op, opcode_desc &desc) { case 0: // MAD case 1: // MADU - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regin[2] |= REGFLAG_LO | REGFLAG_HI; - desc.regout[2] |= REGFLAG_LO | REGFLAG_HI; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_lo_used(); + desc.set_hi_used(); + desc.set_lo_modified(); + desc.set_hi_modified(); return true; case 2: // MUL - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[0] |= REGFLAG_R(RDREG); + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_r_modified(RDREG); desc.cycles = 3; return true; } @@ -474,10 +531,10 @@ bool mips3_frontend::describe_idt(uint32_t op, opcode_desc &desc) // single instruction in the COP0 group //------------------------------------------------- -bool mips3_frontend::describe_cop0(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_cop0(uint32_t op, opcode_desc &desc) { // any COP0 instruction can potentially cause an exception - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); switch (RSREG) { @@ -487,23 +544,27 @@ bool mips3_frontend::describe_cop0(uint32_t op, opcode_desc &desc) desc.cycles += MIPS3_COUNT_READ_CYCLES; if (RDREG == COP0_Cause) desc.cycles += MIPS3_CAUSE_READ_CYCLES; - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_r_modified(RTREG); return true; case 0x02: // CFCz - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_r_modified(RTREG); return true; case 0x04: // MTCz case 0x05: // DMTCz case 0x06: // CTCz - desc.regin[0] |= REGFLAG_R(RTREG); + desc.set_r_used(RTREG); if (RSREG == 0x04 || RSREG == 0x05) { if (RDREG == COP0_Cause) - desc.flags |= OPFLAG_CAN_TRIGGER_SW_INT; + desc.set_can_trigger_sw_int(); if (RDREG == COP0_Status) - desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT | OPFLAG_CAN_CHANGE_MODES | OPFLAG_END_SEQUENCE; + { + desc.set_can_expose_external_int(); + desc.set_can_change_modes(); + desc.set_end_sequence(); + } } return true; @@ -512,7 +573,7 @@ bool mips3_frontend::describe_cop0(uint32_t op, opcode_desc &desc) { case 0x00: // BCzF case 0x01: // BCzT - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; return true; @@ -530,11 +591,13 @@ bool mips3_frontend::describe_cop0(uint32_t op, opcode_desc &desc) case 0x02: // TLBWI case 0x06: // TLBWR - desc.flags |= OPFLAG_MODIFIES_TRANSLATION; + desc.set_modifies_translation(); return true; case 0x18: // ERET - desc.flags |= OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_can_change_modes(); return true; } return false; @@ -549,31 +612,31 @@ bool mips3_frontend::describe_cop0(uint32_t op, opcode_desc &desc) // single instruction in the COP1 group //------------------------------------------------- -bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_cop1(uint32_t op, opcode_desc &desc) { // any COP1 instruction can potentially cause an exception -// desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + //desc.set_can_cause_exception(); switch (RSREG) { case 0x00: // MFCz case 0x01: // DMFCz - desc.regin[1] |= REGFLAG_CPR1(RDREG); - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_cpr1_used(RDREG); + desc.set_r_modified(RTREG); return true; case 0x02: // CFCz - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_r_modified(RTREG); return true; case 0x04: // MTCz case 0x05: // DMTCz - desc.regin[0] |= REGFLAG_R(RTREG); - desc.regout[1] |= REGFLAG_CPR1(RDREG); + desc.set_r_used(RTREG); + desc.set_cpr1_modified(RDREG); return true; case 0x06: // CTCz - desc.regin[0] |= REGFLAG_R(RTREG); + desc.set_r_used(RTREG); return true; case 0x08: // BC @@ -583,8 +646,8 @@ bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc) case 0x01: // BCzT case 0x02: // BCzFL case 0x03: // BCzTL - desc.regin[2] |= REGFLAG_FCC; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_fcc_used(); + desc.set_is_conditional_branch(); desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; desc.skipslots = (RTREG & 0x02) ? 1 : 0; @@ -605,8 +668,9 @@ bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc) case 0x01: // SUB case 0x02: // MUL case 0x03: // DIV - desc.regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG); - desc.regout[1] |= REGFLAG_CPR1(FDREG); + desc.set_cpr1_used(FSREG); + desc.set_cpr1_used(FTREG); + desc.set_cpr1_modified(FDREG); return true; case 0x15: // RECIP - MIPS IV @@ -630,21 +694,21 @@ bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc) case 0x21: // CVT.D case 0x24: // CVT.W case 0x25: // CVT.L - desc.regin[1] |= REGFLAG_CPR1(FSREG); - desc.regout[1] |= REGFLAG_CPR1(FDREG); + desc.set_cpr1_used(FSREG); + desc.set_cpr1_modified(FDREG); return true; case 0x11: // MOVT/F - MIPS IV if (m_mips3->m_flavor < mips3_device::MIPS3_TYPE_MIPS_IV) return false; - desc.regin[1] |= REGFLAG_CPR1(FSREG); - desc.regin[2] |= REGFLAG_FCC; - desc.regout[1] |= REGFLAG_CPR1(FDREG); + desc.set_cpr1_used(FSREG); + desc.set_fcc_used(); + desc.set_cpr1_modified(FDREG); return true; case 0x30: case 0x38: // C.F case 0x31: case 0x39: // C.UN - desc.regout[2] |= REGFLAG_FCC; + desc.set_fcc_modified(); return true; case 0x32: case 0x3a: // C.EQ @@ -653,8 +717,9 @@ bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc) case 0x35: case 0x3d: // C.ULT case 0x36: case 0x3e: // C.OLE case 0x37: case 0x3f: // C.ULE - desc.regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG); - desc.regout[2] |= REGFLAG_FCC; + desc.set_cpr1_used(FSREG); + desc.set_cpr1_used(FTREG); + desc.set_fcc_modified(); return true; } return false; @@ -669,7 +734,7 @@ bool mips3_frontend::describe_cop1(uint32_t op, opcode_desc &desc) // single instruction in the COP1X group //------------------------------------------------- -bool mips3_frontend::describe_cop1x(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_cop1x(uint32_t op, opcode_desc &desc) { // any COP1 instruction can potentially cause an exception // desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; @@ -678,16 +743,18 @@ bool mips3_frontend::describe_cop1x(uint32_t op, opcode_desc &desc) { case 0x00: // LWXC1 case 0x01: // LDXC1 - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regout[1] |= REGFLAG_CPR1(FDREG); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_cpr1_modified(FDREG); + desc.set_reads_memory(); return true; case 0x08: // SWXC1 case 0x09: // SDXC1 - desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG); - desc.regin[1] |= REGFLAG_CPR1(FDREG); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(RSREG); + desc.set_r_used(RTREG); + desc.set_cpr1_used(FDREG); + desc.set_writes_memory(); return true; case 0x0f: // PREFX @@ -698,8 +765,10 @@ bool mips3_frontend::describe_cop1x(uint32_t op, opcode_desc &desc) case 0x28: case 0x29: // MSUB case 0x30: case 0x31: // NMADD case 0x38: case 0x39: // NMSUB - desc.regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG) | REGFLAG_CPR1(FRREG); - desc.regout[1] |= REGFLAG_CPR1(FDREG); + desc.set_cpr1_used(FSREG); + desc.set_cpr1_used(FTREG); + desc.set_cpr1_used(FRREG); + desc.set_cpr1_modified(FDREG); return true; } @@ -712,23 +781,23 @@ bool mips3_frontend::describe_cop1x(uint32_t op, opcode_desc &desc) // single instruction in the COP2 group //------------------------------------------------- -bool mips3_frontend::describe_cop2(uint32_t op, opcode_desc &desc) +bool mips3_device::frontend::describe_cop2(uint32_t op, opcode_desc &desc) { // any COP2 instruction can potentially cause an exception - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); switch (RSREG) { case 0x00: // MFCz case 0x01: // DMFCz case 0x02: // CFCz - desc.regout[0] |= REGFLAG_R(RTREG); + desc.set_r_modified(RTREG); return true; case 0x04: // MTCz case 0x05: // DMTCz case 0x06: // CTCz - desc.regin[0] |= REGFLAG_R(RTREG); + desc.set_r_used(RTREG); return true; case 0x08: // BC @@ -736,7 +805,7 @@ bool mips3_frontend::describe_cop2(uint32_t op, opcode_desc &desc) { case 0x00: // BCzF case 0x01: // BCzT - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.targetpc = desc.pc + 4 + SIMMVAL * 4; desc.delayslots = 1; return true; diff --git a/src/devices/cpu/mips/mips3fe.h b/src/devices/cpu/mips/mips3fe.h index 0b8e9d79fec..322c007417a 100644 --- a/src/devices/cpu/mips/mips3fe.h +++ b/src/devices/cpu/mips/mips3fe.h @@ -12,21 +12,121 @@ #pragma once +#include "mips3.h" + +#include "cpu/drcfe.h" + +#include +#include + //************************************************************************** -// MACROS +// STRUCTURES //************************************************************************** -// register flags 0 -#define REGFLAG_R(n) (((n) == 0) ? 0 : (1 << (n))) +class mips3_device::opcode_desc : public opcode_desc_base +{ +public: + enum + { + REG_FLAG_R0 = 0, + REG_FLAG_CPR10 = REG_FLAG_R0 + 32, + REG_FLAG_LO = REG_FLAG_CPR10 + 32, + REG_FLAG_HI, + REG_FLAG_FCC, -// register flags 1 -#define REGFLAG_CPR1(n) (1 << (n)) + REG_FLAG_COUNT + }; -// register flags 2 -#define REGFLAG_LO (1 << 0) -#define REGFLAG_HI (1 << 1) -#define REGFLAG_FCC (1 << 2) + offs_t physpc; // physical PC of this opcode + uint32_t opptr; // copy of opcode + + uint32_t cycles; // number of cycles needed to execute + + void set_r_used(unsigned n) { if (n) regin.set(REG_FLAG_R0 + n); } + void set_r_modified(unsigned n) { if (n) regout.set(REG_FLAG_R0 + n); } + void set_cpr1_used(unsigned n) { regin.set(REG_FLAG_CPR10 + n); } + void set_cpr1_modified(unsigned n) { regout.set(REG_FLAG_CPR10 + n); } + void set_lo_used() { regin.set(REG_FLAG_LO); } + void set_lo_modified() { regout.set(REG_FLAG_LO); } + void set_hi_used() { regin.set(REG_FLAG_HI); } + void set_hi_modified() { regout.set(REG_FLAG_HI); } + void set_fcc_used() { regin.set(REG_FLAG_FCC); } + void set_fcc_modified() { regout.set(REG_FLAG_FCC); } + + void set_can_trigger_sw_int() { m_extra_flags.set(CAN_TRIGGER_SW_INT); } + void set_can_expose_external_int() { m_extra_flags.set(CAN_EXPOSE_EXTERNAL_INT); } + void set_modifies_translation() { m_extra_flags.set(MODIFIES_TRANSLATION); } + void set_compiler_unmapped() { m_extra_flags.set(COMPILER_UNMAPPED); } + void set_can_change_modes() { m_extra_flags.set(CAN_CHANGE_MODES); } + void set_reads_memory() { m_extra_flags.set(READS_MEMORY); } + void set_writes_memory() { m_extra_flags.set(WRITES_MEMORY); } + + bool can_trigger_sw_int() { return m_extra_flags[CAN_TRIGGER_SW_INT]; } + bool can_expose_external_int() { return m_extra_flags[CAN_EXPOSE_EXTERNAL_INT]; } + bool modifies_translation() const { return m_extra_flags[MODIFIES_TRANSLATION]; } + bool compiler_unmapped() const { return m_extra_flags[COMPILER_UNMAPPED]; } + bool can_change_modes() const { return m_extra_flags[CAN_CHANGE_MODES]; } + bool reads_memory() const { return m_extra_flags[READS_MEMORY]; } + bool writes_memory() const { return m_extra_flags[WRITES_MEMORY]; } + + // compute the exception PC + uint32_t epc() const { return in_delay_slot() ? (pc - 3) : pc; } + + void reset(offs_t curpc, bool in_delay_slot) + { + static_assert(REG_FLAG_COUNT <= 68); + + opcode_desc_base::reset(curpc, in_delay_slot); + + physpc = curpc; + opptr = 0; + cycles = 0; + m_extra_flags.reset(); + } + +private: + enum + { + CAN_TRIGGER_SW_INT = 0, + CAN_EXPOSE_EXTERNAL_INT, + MODIFIES_TRANSLATION, + COMPILER_UNMAPPED, + CAN_CHANGE_MODES, + READS_MEMORY, + WRITES_MEMORY, + + EXTRA_FLAG_COUNT + }; + + std::bitset m_extra_flags; +}; + + +class mips3_device::frontend : public drc_frontend_base +{ +public: + // construction/destruction + frontend(mips3_device *mips3, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); + +private: + bool describe(opcode_desc &desc, opcode_desc const *prev); + + // internal helpers + bool describe_special(uint32_t op, opcode_desc &desc); + bool describe_regimm(uint32_t op, opcode_desc &desc); + bool describe_idt(uint32_t op, opcode_desc &desc); + bool describe_cop0(uint32_t op, opcode_desc &desc); + bool describe_cop1(uint32_t op, opcode_desc &desc); + bool describe_cop1x(uint32_t op, opcode_desc &desc); + bool describe_cop2(uint32_t op, opcode_desc &desc); + + // internal state + mips3_device *m_mips3; +}; #endif // MAME_CPU_MIPS_MIPS3FE_H diff --git a/src/devices/cpu/powerpc/ppc.h b/src/devices/cpu/powerpc/ppc.h index 08aedd46741..d00bcac10a1 100644 --- a/src/devices/cpu/powerpc/ppc.h +++ b/src/devices/cpu/powerpc/ppc.h @@ -15,13 +15,13 @@ #include "ppc_dasm.h" -#include "cpu/drcfe.h" #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" #include "divtlb.h" #include +#include /*************************************************************************** @@ -180,6 +180,7 @@ class ppc_device : public cpu_device, public device_vtlb_interface { protected: class frontend; + class opcode_desc; /* PowerPC flavors */ enum powerpc_flavor @@ -699,8 +700,8 @@ protected: bool generate_instruction_3b(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc); bool generate_instruction_3f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc); void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); - const char *log_desc_flags_to_string(uint32_t flags); - void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist); + const char *log_desc_flags_to_string(const opcode_desc &desc); + void log_register_list(const char *string, const std::bitset<128> ®list, const std::bitset<128> *regnostarlist); void log_opcode_desc(const opcode_desc *desclist, int indent); private: diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp index 38eaa3a6908..ecb4fe09024 100644 --- a/src/devices/cpu/powerpc/ppcdrc.cpp +++ b/src/devices/cpu/powerpc/ppcdrc.cpp @@ -16,10 +16,10 @@ #include "emu.h" #include "ppc.h" + #include "ppccom.h" #include "ppcfe.h" -#include "cpu/drcfe.h" #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" @@ -348,9 +348,11 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc) block.append_comment("-------------------------"); // comment /* determine the last instruction in this sequence */ - for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + for (seqlast = seqhead; seqlast; seqlast = seqlast->next()) + { + if (seqlast->end_sequence()) break; + } assert(seqlast != nullptr); /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */ @@ -379,7 +381,7 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc) generate_checksum_block(block, &compiler, seqhead, seqlast); // /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000 /* iterate over instructions in the sequence and compile them */ @@ -387,7 +389,7 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc) generate_sequence_instruction(block, &compiler, curdesc); // /* if we need to return to the start, do it */ - if (seqlast->flags & OPFLAG_RETURN_TO_START) + if (seqlast->return_to_start()) nextpc = pc; /* otherwise we just go to the next instruction */ @@ -398,7 +400,7 @@ void ppc_device::code_compile_block(uint8_t mode, offs_t pc) generate_update_cycles(block, &compiler, nextpc, true); // /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ - if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES) + if (seqlast->can_change_modes()) UML_HASHJMP(block, mem(&m_core->mode), nextpc, *m_nocode);// hashjmp ,nextpc,nocode else if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) UML_HASHJMP(block, m_core->mode, nextpc, *m_nocode);// hashjmp ,nextpc,nocode @@ -1573,11 +1575,11 @@ void ppc_device::generate_checksum_block(drcuml_block &block, compiler_state *co /* loose verify or single instruction: just compare and fail */ if (!(m_drcoptions & PPCDRC_STRICT_VERIFY) || seqhead->next() == nullptr) { - if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + if (!seqhead->virtual_noop()) { const void *base = m_prptr(seqhead->physpc); UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword - UML_CMP(block, I0, seqhead->opptr.l[0]); // cmp i0,*opptr + UML_CMP(block, I0, seqhead->opptr); // cmp i0,*opptr UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc } } @@ -1587,28 +1589,32 @@ void ppc_device::generate_checksum_block(drcuml_block &block, compiler_state *co { #if 0 for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + if (!curdesc->virtual_noop()) { const void *base = m_prptr(seqhead->physpc); - UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword - UML_CMP(block, I0, curdesc->opptr.l[0]); // cmp i0,*opptr - UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc + UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); + UML_CMP(block, I0, curdesc->opptr); + UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); } + } #else uint32_t sum = 0; const void *base = m_prptr(seqhead->physpc); - UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword - sum += seqhead->opptr.l[0]; + UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); + sum += seqhead->opptr; for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + if (!curdesc->virtual_noop()) { base = m_prptr(curdesc->physpc); - UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword - UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->opptr.l[0]; + UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); + UML_ADD(block, I0, I0, I1); + sum += curdesc->opptr; } - UML_CMP(block, I0, sum); // cmp i0,sum - UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc + } + UML_CMP(block, I0, sum); + UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); #endif } } @@ -1624,8 +1630,8 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta int hotnum; /* add an entry for the log */ - if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); + if (m_drcuml->logging() && !desc->virtual_noop()) + log_add_disasm_comment(block, desc->pc, desc->opptr); /* set the PC map variable */ UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc @@ -1635,7 +1641,7 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta /* is this a hotspot? */ for (hotnum = 0; hotnum < PPC_MAX_HOTSPOTS; hotnum++) - if (m_hotspot[hotnum].pc != 0 && desc->pc == m_hotspot[hotnum].pc && desc->opptr.l[0] == m_hotspot[hotnum].opcode) + if (m_hotspot[hotnum].pc != 0 && desc->pc == m_hotspot[hotnum].pc && desc->opptr == m_hotspot[hotnum].opcode) { compiler->cycles += m_hotspot[hotnum].cycles; break; @@ -1661,7 +1667,7 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta } /* if we hit an unmapped address, fatal error */ - if (desc->flags & OPFLAG_COMPILER_UNMAPPED) + if (desc->compiler_unmapped()) { UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc save_fast_iregs(block); // @@ -1670,7 +1676,7 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta } /* if we hit a compiler page fault, it's just like a TLB mismatch */ - if (desc->flags & OPFLAG_COMPILER_PAGE_FAULT) + if (desc->compiler_page_fault()) { if (PRINTF_MMU) { @@ -1687,7 +1693,7 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta // validate our TLB entry at this PC; if we fail, we need to handle it // TODO: this code is highly sus based on the PPC architecture manual, but I'll only disable for 601 for now - if ((desc->flags & OPFLAG_VALIDATE_TLB) && (m_core->mode & MODE_DATA_TRANSLATION) && !(m_cap & PPCCAP_601BAT)) + if (desc->validate_tlb() && (m_core->mode & MODE_DATA_TRANSLATION) && !(m_cap & PPCCAP_601BAT)) { const vtlb_entry *tlbtable = vtlb_table(); @@ -1725,23 +1731,25 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta } } - /* if this is an invalid opcode, generate the exception now */ - if (desc->flags & OPFLAG_INVALID_OPCODE) - UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000 - - /* if this is a privileged opcode in user mode, generate the exception */ - else if ((desc->flags & OPFLAG_PRIVILEGED) && (m_core->mode & MODE_USER)) - UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x40000); // exh exception_program,0x40000 - - /* otherwise, unless this is a virtual no-op, it's a regular instruction */ - else if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (desc->invalid_opcode()) { - /* compile the instruction */ + // if this is an invalid opcode, generate the exception now + UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); + } + else if (desc->privileged() && (m_core->mode & MODE_USER)) + { + // if this is a privileged opcode in user mode, generate the exception + UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x40000); // exh exception_program,0x40000 + } + else if (!desc->virtual_noop()) + { + // otherwise, unless this is a virtual no-op, it's a regular instruction + // compile the instruction if (!generate_opcode(block, compiler, desc)) { - UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - UML_MOV(block, mem(&m_core->arg0), desc->opptr.l[0]); // mov [arg0],*desc->opptr.l - UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_MOV(block, mem(&m_core->arg0), desc->opptr); + UML_CALLC(block, cfunc_unimplemented, this); } } } @@ -1758,9 +1766,9 @@ void ppc_device::generate_compute_flags(drcuml_block &block, const opcode_desc * /* modify inputs based on required flags */ if (!DISABLE_FLAG_OPTIMIZATIONS) { - if (!(desc->regreq[3] & frontend::REGFLAG_XER_CA)) + if (!frontend::REGFLAG_XER_CA(desc->regreq)) xermask &= ~XER_CA; - if (!(desc->regreq[2] & frontend::REGFLAG_CR(0))) + if (!frontend::REGFLAG_CR(desc->regreq, 0)) updatecr = 0; } xerflags = ((xermask & XER_OV) ? uml::FLAG_V : 0) | ((xermask & XER_CA) ? uml::FLAG_C : 0); @@ -1845,11 +1853,11 @@ void ppc_device::generate_fp_flags(drcuml_block &block, const opcode_desc *desc, /* for now, only handle the FPRF field */ if (updatefprf) { - int regnum = G_RD(desc->opptr.l[0]); + int regnum = G_RD(desc->opptr); if (m_fdregmap[regnum].is_float_register()) UML_FDMOV(block, mem(&m_core->f[regnum]), freg(m_fdregmap[regnum].freg() - REG_F0)); - UML_MOV(block, mem(&m_core->param0), G_RD(desc->opptr.l[0])); + UML_MOV(block, mem(&m_core->param0), G_RD(desc->opptr)); UML_CALLC(block, (c_function)cfunc_ppccom_update_fprf, this); } } @@ -1879,7 +1887,7 @@ void ppc_device::generate_branch(drcuml_block &block, compiler_state *compiler, if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { generate_update_cycles(block, &compiler_temp, desc->targetpc, true); // - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000 else UML_HASHJMP(block, m_core->mode, desc->targetpc, *m_nocode); @@ -1933,7 +1941,7 @@ void ppc_device::generate_branch_bo(drcuml_block &block, compiler_state *compile bool ppc_device::generate_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; + uint32_t op = desc->opptr; uint32_t opswitch = op >> 26; switch (opswitch) @@ -2331,7 +2339,7 @@ bool ppc_device::generate_opcode(drcuml_block &block, compiler_state *compiler, bool ppc_device::generate_instruction_13(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; + uint32_t op = desc->opptr; uint32_t opswitch = (op >> 1) & 0x3ff; switch (opswitch) @@ -2468,7 +2476,7 @@ bool ppc_device::generate_instruction_13(drcuml_block &block, compiler_state *co bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; + uint32_t op = desc->opptr; uint32_t opswitch = (op >> 1) & 0x3ff; int item; @@ -2963,7 +2971,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co UML_CMP(block, I2, 0x00000020); // cmp rb,0x20 UML_JMPc(block, COND_S, compiler->labelnum); // bs 1: - if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & frontend::REGFLAG_XER_CA)) + if (DISABLE_FLAG_OPTIMIZATIONS || frontend::REGFLAG_XER_CA(desc->regreq)) { // for shift amt > 32, carry flag is the sign bit of Rs and the sign bit fills all bit positions UML_TEST(block, R32(G_RS(op)), 0x80000000); @@ -2974,7 +2982,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co UML_JMP(block, compiler->labelnum+1); // bra 2: UML_LABEL(block, compiler->labelnum++); // 1: - if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & frontend::REGFLAG_XER_CA)) + if (DISABLE_FLAG_OPTIMIZATIONS || frontend::REGFLAG_XER_CA(desc->regreq)) { UML_SHL(block, I1, 0xffffffff, I2); // shl i1,0xffffffff,i2 UML_XOR(block, I1, I1, ~0); // xor i1,i1,~0 @@ -2995,7 +3003,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co return true; case 0x338: /* SRAWIx */ - if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & frontend::REGFLAG_XER_CA)) + if (DISABLE_FLAG_OPTIMIZATIONS || frontend::REGFLAG_XER_CA(desc->regreq)) { UML_AND(block, I0, R32(G_RS(op)), ~(0xffffffff << (G_SH(op) & 31)));// and i0,rs,~(0xffffffff << (sh & 31)) UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31 @@ -3618,7 +3626,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co bool ppc_device::generate_instruction_3b(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; + uint32_t op = desc->opptr; uint32_t opswitch = (op >> 1) & 0x1f; switch (opswitch) @@ -3726,7 +3734,7 @@ bool ppc_device::generate_instruction_3b(drcuml_block &block, compiler_state *co bool ppc_device::generate_instruction_3f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) { - uint32_t op = desc->opptr.l[0]; + uint32_t op = desc->opptr; uint32_t opswitch = (op >> 1) & 0x3ff; if (opswitch & 0x10) @@ -3916,52 +3924,49 @@ void ppc_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32 flags -------------------------------------------------*/ -const char *ppc_device::log_desc_flags_to_string(uint32_t flags) +const char *ppc_device::log_desc_flags_to_string(const opcode_desc &desc) { static char tempbuf[30]; char *dest = tempbuf; /* branches */ - if (flags & OPFLAG_IS_UNCONDITIONAL_BRANCH) + if (desc.is_unconditional_branch()) *dest++ = 'U'; - else if (flags & OPFLAG_IS_CONDITIONAL_BRANCH) + else if (desc.is_conditional_branch()) *dest++ = 'C'; else *dest++ = '.'; /* intrablock branches */ - *dest++ = (flags & OPFLAG_INTRABLOCK_BRANCH) ? 'i' : '.'; + *dest++ = desc.intrablock_branch() ? 'i' : '.'; /* branch targets */ - *dest++ = (flags & OPFLAG_IS_BRANCH_TARGET) ? 'B' : '.'; + *dest++ = desc.is_branch_target() ? 'B' : '.'; /* delay slots */ - *dest++ = (flags & OPFLAG_IN_DELAY_SLOT) ? 'D' : '.'; + *dest++ = desc.in_delay_slot() ? 'D' : '.'; /* exceptions */ - if (flags & OPFLAG_WILL_CAUSE_EXCEPTION) + if (desc.will_cause_exception()) *dest++ = 'E'; - else if (flags & OPFLAG_CAN_CAUSE_EXCEPTION) + else if (desc.can_cause_exception()) *dest++ = 'e'; else *dest++ = '.'; /* read/write */ - if (flags & OPFLAG_READS_MEMORY) + if (desc.reads_memory()) *dest++ = 'R'; - else if (flags & OPFLAG_WRITES_MEMORY) + else if (desc.writes_memory()) *dest++ = 'W'; else *dest++ = '.'; /* TLB validation */ - *dest++ = (flags & OPFLAG_VALIDATE_TLB) ? 'V' : '.'; - - /* TLB modification */ - *dest++ = (flags & OPFLAG_MODIFIES_TRANSLATION) ? 'T' : '.'; + *dest++ = desc.validate_tlb() ? 'V' : '.'; /* redispatch */ - *dest++ = (flags & OPFLAG_REDISPATCH) ? 'R' : '.'; + *dest++ = desc.redispatch() ? 'R' : '.'; return tempbuf; } @@ -3970,7 +3975,7 @@ const char *ppc_device::log_desc_flags_to_string(uint32_t flags) log_register_list - log a list of GPR registers -------------------------------------------------*/ -void ppc_device::log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist) +void ppc_device::log_register_list(const char *string, const std::bitset<128> ®list, const std::bitset<128> *regnostarlist) { static const char *const crtext[4] = { "lt", "gt", "eq", "so" }; int count = 0; @@ -3978,92 +3983,102 @@ void ppc_device::log_register_list(const char *string, const uint32_t *reglist, int crnum; /* skip if nothing */ - if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0 && reglist[3] == 0) + if (reglist.none()) return; m_drcuml->log_printf("[%s:", string); for (regnum = 0; regnum < 32; regnum++) - if (reglist[0] & frontend::REGFLAG_R(regnum)) + { + if (frontend::REGFLAG_R(reglist, regnum)) { m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[0] & frontend::REGFLAG_R(regnum))) + if (regnostarlist && !frontend::REGFLAG_R(*regnostarlist, regnum)) m_drcuml->log_printf("*"); } + } for (regnum = 0; regnum < 32; regnum++) - if (reglist[1] & frontend::REGFLAG_FR(regnum)) + { + if (frontend::REGFLAG_FR(reglist, regnum)) { m_drcuml->log_printf("%sfr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[1] & frontend::REGFLAG_FR(regnum))) + if (regnostarlist && !frontend::REGFLAG_FR(*regnostarlist, regnum)) m_drcuml->log_printf("*"); } + } for (regnum = 0; regnum < 8; regnum++) - if (reglist[2] & frontend::REGFLAG_CR(regnum)) + { + if (frontend::REGFLAG_CR(reglist, regnum)) { - if ((reglist[2] & frontend::REGFLAG_CR(regnum)) == frontend::REGFLAG_CR(regnum) && (regnostarlist == nullptr || (regnostarlist[2] & frontend::REGFLAG_CR(regnum)) == frontend::REGFLAG_CR(regnum))) + if ((frontend::REGFLAG_CR(reglist, regnum) == 0x0f) && (!regnostarlist || (frontend::REGFLAG_CR(*regnostarlist, regnum) == 0x0f))) { m_drcuml->log_printf("%scr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[2] & frontend::REGFLAG_CR(regnum))) + if (regnostarlist && !frontend::REGFLAG_CR(*regnostarlist, regnum)) m_drcuml->log_printf("*"); } else { for (crnum = 0; crnum < 4; crnum++) - if (reglist[2] & frontend::REGFLAG_CR_BIT(regnum * 4 + crnum)) + { + if (frontend::REGFLAG_CR_BIT(reglist, regnum * 4 + crnum)) { m_drcuml->log_printf("%scr%d[%s]", (count++ == 0) ? "" : ",", regnum, crtext[crnum]); - if (regnostarlist != nullptr && !(regnostarlist[2] & frontend::REGFLAG_CR_BIT(regnum * 4 + crnum))) + if (regnostarlist && !frontend::REGFLAG_CR_BIT(*regnostarlist, regnum * 4 + crnum)) m_drcuml->log_printf("*"); } + } } } + } - if (reglist[3] & frontend::REGFLAG_XER_CA) + if (frontend::REGFLAG_XER_CA(reglist)) { m_drcuml->log_printf("%sxer_ca", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_CA)) + if (regnostarlist && !frontend::REGFLAG_XER_CA(*regnostarlist)) m_drcuml->log_printf("*"); } - if (reglist[3] & frontend::REGFLAG_XER_OV) + if (frontend::REGFLAG_XER_OV(reglist)) { m_drcuml->log_printf("%sxer_ov", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_OV)) + if (regnostarlist && !frontend::REGFLAG_XER_OV(*regnostarlist)) m_drcuml->log_printf("*"); } - if (reglist[3] & frontend::REGFLAG_XER_SO) + if (frontend::REGFLAG_XER_SO(reglist)) { m_drcuml->log_printf("%sxer_so", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_SO)) + if (regnostarlist && !frontend::REGFLAG_XER_SO(*regnostarlist)) m_drcuml->log_printf("*"); } - if (reglist[3] & frontend::REGFLAG_XER_COUNT) + if (frontend::REGFLAG_XER_COUNT(reglist)) { m_drcuml->log_printf("%sxer_count", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_XER_COUNT)) + if (regnostarlist && !frontend::REGFLAG_XER_COUNT(*regnostarlist)) m_drcuml->log_printf("*"); } - if (reglist[3] & frontend::REGFLAG_CTR) + if (frontend::REGFLAG_CTR(reglist)) { m_drcuml->log_printf("%sctr", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_CTR)) + if (regnostarlist && !frontend::REGFLAG_CTR(*regnostarlist)) m_drcuml->log_printf("*"); } - if (reglist[3] & frontend::REGFLAG_LR) + if (frontend::REGFLAG_LR(reglist)) { m_drcuml->log_printf("%slr", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_LR)) + if (regnostarlist && !frontend::REGFLAG_LR(*regnostarlist)) m_drcuml->log_printf("*"); } for (regnum = 0; regnum < 8; regnum++) - if (reglist[3] & frontend::REGFLAG_FPSCR(regnum)) + { + if (frontend::REGFLAG_FPSCR(reglist, regnum)) { m_drcuml->log_printf("%sfpscr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[3] & frontend::REGFLAG_FPSCR(regnum))) + if (regnostarlist && !frontend::REGFLAG_FPSCR(*regnostarlist, regnum)) m_drcuml->log_printf("*"); } + } m_drcuml->log_printf("] "); } @@ -4090,20 +4105,20 @@ void ppc_device::log_opcode_desc(const opcode_desc *desclist, int indent) /* disassemble the current instruction and output it to the log */ if (m_drcuml->logging() || m_drcuml->logging_native()) { - if (desclist->flags & OPFLAG_VIRTUAL_NOOP) + if (desclist->virtual_noop()) buffer << ""; else - m_dasm.dasm_one(buffer, desclist->pc, desclist->opptr.l[0]); + m_dasm.dasm_one(buffer, desclist->pc, desclist->opptr); } else buffer << "???"; buffer.put('\0'); - m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), &buffer.vec()[0]); + m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(*desclist), &buffer.vec()[0]); /* output register states */ log_register_list("use", desclist->regin, nullptr); - log_register_list("mod", desclist->regout, desclist->regreq); + log_register_list("mod", desclist->regout, &desclist->regreq); m_drcuml->log_printf("\n"); /* if we have a delay slot, output it recursively */ @@ -4111,7 +4126,7 @@ void ppc_device::log_opcode_desc(const opcode_desc *desclist, int indent) log_opcode_desc(desclist->delay.first(), indent + 1); /* at the end of a sequence add a dividing line */ - if (desclist->flags & OPFLAG_END_SEQUENCE) + if (desclist->end_sequence()) m_drcuml->log_printf("-----\n"); } } diff --git a/src/devices/cpu/powerpc/ppcfe.cpp b/src/devices/cpu/powerpc/ppcfe.cpp index 1e8fb105ee1..1819d906ba7 100644 --- a/src/devices/cpu/powerpc/ppcfe.cpp +++ b/src/devices/cpu/powerpc/ppcfe.cpp @@ -10,41 +10,44 @@ #include "emu.h" #include "ppcfe.h" + #include "ppccom.h" +#include "cpu/drcfe.ipp" + //************************************************************************** // MACROS //************************************************************************** -#define GPR_USED(desc, x) do { (desc).regin[0] |= REGFLAG_R(x); } while (0) -#define GPR_USED_OR_ZERO(desc, x) do { (desc).regin[0] |= ((x) == 0 ? 0 : REGFLAG_R(x)); } while (0) -#define GPR_MODIFIED(desc, x) do { (desc).regout[0] |= REGFLAG_R(x); } while (0) +#define GPR_USED(desc, x) do { (desc).regin.set(REG_BIT_R0 + x); } while (0) +#define GPR_USED_OR_ZERO(desc, x) do { if (x) GPR_USED((desc), x); } while (0) +#define GPR_MODIFIED(desc, x) do { (desc).regout.set(REG_BIT_R0 + x); } while (0) -#define FPR_USED(desc, x) do { (desc).regin[1] |= REGFLAG_FR(x); } while (0) -#define FPR_MODIFIED(desc, x) do { (desc).regout[1] |= REGFLAG_FR(x); } while (0) +#define FPR_USED(desc, x) do { (desc).regin.set(REG_BIT_FR0 + x); } while (0) +#define FPR_MODIFIED(desc, x) do { (desc).regout.set(REG_BIT_FR0 + x); } while (0) -#define CR_USED(desc, x) do { (desc).regin[2] |= REGFLAG_CR(x); } while (0) -#define CR_BIT_USED(desc, x) do { (desc).regin[2] |= REGFLAG_CR_BIT(x); } while (0) -#define CR_MODIFIED(desc, x) do { (desc).regout[2] |= REGFLAG_CR(x); } while (0) -#define CR_BIT_MODIFIED(desc, x) do { (desc).regout[2] |= REGFLAG_CR_BIT(x); } while (0) +#define CR_USED(desc, x) do { CR_BIT_USED((desc), (x * 4) + 0); CR_BIT_USED((desc), (x * 4) + 1); CR_BIT_USED((desc), (x * 4) + 2); CR_BIT_USED((desc), (x * 4) + 3); } while (0) +#define CR_BIT_USED(desc, x) do { (desc).regin.set(64 + 31 - x); } while (0) +#define CR_MODIFIED(desc, x) do { CR_BIT_MODIFIED((desc), (x * 4) + 0); CR_BIT_MODIFIED((desc), (x * 4) + 1); CR_BIT_MODIFIED((desc), (x * 4) + 2); CR_BIT_MODIFIED((desc), (x * 4) + 3); } while (0) +#define CR_BIT_MODIFIED(desc, x) do { (desc).regout.set(64 + 31 - x); } while (0) -#define XER_CA_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_CA; } while (0) -#define XER_OV_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_OV; } while (0) -#define XER_SO_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_SO; } while (0) -#define XER_COUNT_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_COUNT; } while (0) -#define XER_CA_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_CA; } while (0) -#define XER_OV_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_OV; } while (0) -#define XER_SO_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_SO; } while (0) -#define XER_COUNT_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_COUNT; } while (0) +#define XER_CA_USED(desc) do { (desc).regin.set(REG_BIT_XER_CA); } while (0) +#define XER_OV_USED(desc) do { (desc).regin.set(REG_BIT_XER_OV); } while (0) +#define XER_SO_USED(desc) do { (desc).regin.set(REG_BIT_XER_SO); } while (0) +#define XER_COUNT_USED(desc) do { (desc).regin.set(REG_BIT_XER_COUNT); } while (0) +#define XER_CA_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_CA); } while (0) +#define XER_OV_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_OV); } while (0) +#define XER_SO_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_SO); } while (0) +#define XER_COUNT_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_COUNT); } while (0) -#define CTR_USED(desc) do { (desc).regin[3] |= REGFLAG_CTR; } while (0) -#define CTR_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_CTR; } while (0) -#define LR_USED(desc) do { (desc).regin[3] |= REGFLAG_LR; } while (0) -#define LR_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_LR; } while (0) +#define CTR_USED(desc) do { (desc).regin.set(REG_BIT_CTR); } while (0) +#define CTR_MODIFIED(desc) do { (desc).regout.set(REG_BIT_CTR); } while (0) +#define LR_USED(desc) do { (desc).regin.set(REG_BIT_LR); } while (0) +#define LR_MODIFIED(desc) do { (desc).regout.set(REG_BIT_LR); } while (0) -#define FPSCR_USED(desc, x) do { (desc).regin[3] |= REGFLAG_FPSCR(x); } while (0) -#define FPSCR_MODIFIED(desc, x) do { (desc).regout[3] |= REGFLAG_FPSCR(x); } while (0) +#define FPSCR_USED(desc, x) do { (desc).regin.set(REG_BIT_FPSCR0 + x); } while (0) +#define FPSCR_MODIFIED(desc, x) do { (desc).regout.set(REG_BIT_FPSCR0 + x); } while (0) @@ -57,11 +60,22 @@ //------------------------------------------------- ppc_device::frontend::frontend(ppc_device &ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(ppc, window_start, window_end, max_sequence) + : drc_frontend_base(ppc.space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_ppc(ppc) { } +ppc_device::frontend::~frontend() +{ +} + +ppc_device::opcode_desc const *ppc_device::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + //------------------------------------------------- // describe - build a description of a single @@ -70,7 +84,6 @@ ppc_device::frontend::frontend(ppc_device &ppc, uint32_t window_start, uint32_t bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint32_t op, opswitch; int regnum; // compute the physical PC @@ -78,19 +91,23 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { // uh-oh: a page fault; leave the description empty and just if this is the first instruction, leave it empty and // mark as needing to validate; otherwise, just end the sequence here - desc.flags |= OPFLAG_VALIDATE_TLB | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_COMPILER_PAGE_FAULT | OPFLAG_VIRTUAL_NOOP | OPFLAG_END_SEQUENCE; + desc.set_validate_tlb(); + desc.set_can_cause_exception(); + desc.set_compiler_page_fault(); + desc.set_virtual_noop(); + desc.set_end_sequence(); return true; } // fetch the opcode - op = desc.opptr.l[0] = m_ppc.m_pr32(desc.physpc); + const uint32_t op = desc.opptr = m_ppc.m_pr32(desc.physpc); // all instructions are 4 bytes and default to a single cycle each desc.length = 4; desc.cycles = 1; // parse the instruction - opswitch = op >> 26; + const uint32_t opswitch = op >> 26; switch (opswitch) { case 0x02: // TDI - 64-bit only @@ -101,7 +118,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x03: // TWI GPR_USED(desc, G_RA(op)); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); if (is_603_class()) desc.cycles = 2; // 603 return true; @@ -162,7 +179,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { CR_BIT_USED(desc, G_BI(op)); // branch folding - if (prev == nullptr || prev->regout[2] == 0) + if (prev == nullptr || REGFLAG_CR(prev->regout) == 0) desc.cycles = 0; } if (!(G_BO(op) & 0x04)) @@ -173,9 +190,14 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (op & M_LK) LR_MODIFIED(desc); if ((G_BO(op) & 0x14) == 0x14) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } desc.targetpc = (int16_t)(G_BD(op) << 2) + ((op & M_AA) ? 0 : desc.pc); if (desc.targetpc == desc.pc && desc.cycles == 0) desc.cycles = 1; @@ -184,7 +206,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x11: // SC if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX))) return false; - desc.flags |= OPFLAG_WILL_CAUSE_EXCEPTION; + desc.set_will_cause_exception(); if (is_601_class()) desc.cycles = 16; // 601 else if (is_603_class()) @@ -196,7 +218,8 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x12: // Bx if (op & M_LK) LR_MODIFIED(desc); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = ((int32_t)(G_LI(op) << 8) >> 6) + ((op & M_AA) ? 0 : desc.pc); // branch folding if (desc.targetpc != desc.pc) @@ -263,7 +286,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x2a: // LHA GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x21: // LWZU @@ -275,7 +298,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) GPR_USED(desc, G_RA(op)); GPR_MODIFIED(desc, G_RD(op)); GPR_MODIFIED(desc, G_RA(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x24: // STW @@ -283,7 +306,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x2c: // STH GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x25: // STWU @@ -294,7 +317,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) GPR_USED(desc, G_RA(op)); GPR_USED(desc, G_RS(op)); GPR_MODIFIED(desc, G_RA(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x2e: // LMW @@ -305,7 +328,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (regnum != G_RA(op) || ((m_ppc.m_cap & PPCCAP_4XX) && regnum == 31)) GPR_MODIFIED(desc, regnum); } - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); desc.cycles = 32 - G_RD(op); return true; @@ -313,7 +336,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) GPR_USED_OR_ZERO(desc, G_RA(op)); for (regnum = G_RS(op); regnum < 32; regnum++) GPR_USED(desc, regnum); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); desc.cycles = 32 - G_RS(op); return true; @@ -323,7 +346,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; GPR_USED_OR_ZERO(desc, G_RA(op)); FPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x31: // LFSU @@ -335,7 +358,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) GPR_USED(desc, G_RA(op)); GPR_MODIFIED(desc, G_RA(op)); FPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x34: // STFS @@ -344,7 +367,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; GPR_USED_OR_ZERO(desc, G_RA(op)); FPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x35: // STFSU @@ -356,7 +379,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) GPR_USED(desc, G_RA(op)); GPR_MODIFIED(desc, G_RA(op)); FPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x3b: // 0x3b group @@ -386,7 +409,7 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc CR_USED(desc, G_CRFS(op)); CR_MODIFIED(desc, G_CRFD(op)); // CR logical folding - if (prev == nullptr || prev->regout[2] == 0) + if (prev == nullptr || REGFLAG_CR(prev->regout) == 0) desc.cycles = 0; return true; @@ -402,9 +425,14 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc if (op & M_LK) LR_MODIFIED(desc); if ((G_BO(op) & 0x14) == 0x14) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } desc.targetpc = BRANCH_TARGET_DYNAMIC; return true; @@ -420,14 +448,18 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc CR_BIT_USED(desc, G_CRBB(op)); CR_BIT_MODIFIED(desc, G_CRBD(op)); // CR logical folding - if (prev == nullptr || prev->regout[2] == 0) + if (prev == nullptr || REGFLAG_CR(prev->regout) == 0) desc.cycles = 0; return true; case 0x032: // RFI if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX))) return false; - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_is_unconditional_branch(); + desc.set_can_cause_exception(); + desc.set_end_sequence(); + desc.set_privileged(); + desc.set_can_change_modes(); desc.targetpc = BRANCH_TARGET_DYNAMIC; if (is_601_class()) desc.cycles = 13; // 601 @@ -440,7 +472,11 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc case 0x033: // RFCI if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_is_unconditional_branch(); + desc.set_can_cause_exception(); + desc.set_end_sequence(); + desc.set_privileged(); + desc.set_can_change_modes(); desc.targetpc = BRANCH_TARGET_DYNAMIC; return true; @@ -460,9 +496,14 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc if (op & M_LK) LR_MODIFIED(desc); if ((G_BO(op) & 0x14) == 0x14) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } desc.targetpc = BRANCH_TARGET_DYNAMIC; return true; } @@ -523,7 +564,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x004: // TW GPR_USED(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); - desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); if (is_603_class()) desc.cycles = 2; // 603 return true; @@ -736,7 +777,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); GPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x018: // SLWx @@ -800,7 +841,8 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x037: // LWZUX @@ -813,7 +855,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED(desc, G_RB(op)); GPR_MODIFIED(desc, G_RD(op)); GPR_MODIFIED(desc, G_RA(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x153: // MFSPR @@ -831,7 +873,10 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc XER_SO_USED(desc); } if (spr & 0x010) - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + { + desc.set_can_cause_exception(); + desc.set_privileged(); + } if ((m_ppc.m_cap & PPCCAP_4XX) && spr == SPR4XX_TBLU) desc.cycles = POWERPC_COUNT_READ_TBL; else if ((m_ppc.m_cap & PPCCAP_VEA) && spr == SPRVEA_TBL_R) @@ -842,20 +887,24 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x053: // MFMSR GPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT; + desc.set_can_cause_exception(); + desc.set_can_expose_external_int(); + desc.set_privileged(); if (is_601_class()) desc.cycles = 2; // 601 return true; case 0x253: // MFSR GPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x293: // MFSRIN GPR_USED(desc, G_RB(op)); GPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x173: // MFTB @@ -900,7 +949,10 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x092: // MTMSR GPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_CHANGE_MODES | OPFLAG_END_SEQUENCE; + desc.set_can_cause_exception(); + desc.set_end_sequence(); + desc.set_privileged(); + desc.set_can_change_modes(); if (is_601_class()) desc.cycles = 17; // 601 else if (is_603_class()) @@ -911,7 +963,8 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc if (!(m_ppc.m_cap & PPCCAP_OEA)) return false; GPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x1d3: // MTSPR @@ -929,7 +982,10 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc XER_SO_MODIFIED(desc); } if (spr & 0x010) - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + { + desc.set_can_cause_exception(); + desc.set_privileged(); + } return true; case 0x1b6: // ECOWX @@ -945,7 +1001,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); GPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x0b7: // STWUX @@ -957,7 +1013,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED(desc, G_RB(op)); GPR_USED(desc, G_RS(op)); GPR_MODIFIED(desc, G_RA(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x0f2: // MTSRIN @@ -965,27 +1021,31 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; GPR_USED(desc, G_RS(op)); GPR_USED(desc, G_RB(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x132: // TLBIE if (!(m_ppc.m_cap & PPCCAP_OEA)) return false; GPR_USED(desc, G_RB(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x172: // TLBIA if (!(m_ppc.m_cap & PPCCAP_OEA) || (m_ppc.m_cap & PPCCAP_603_MMU)) return false; - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x3d2: // TLBLD case 0x3f2: // TLBLI if (!(m_ppc.m_cap & PPCCAP_603_MMU) && !is_602_class()) return false; - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x200: // MCRXR @@ -1004,7 +1064,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc XER_COUNT_USED(desc); for (regnum = 0; regnum < 32; regnum++) GPR_MODIFIED(desc, regnum); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x217: // LFSX @@ -1014,13 +1074,14 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); FPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x236: // TLBSYNC if (!(m_ppc.m_cap & PPCCAP_OEA)) return false; - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x256: // SYNC @@ -1041,14 +1102,14 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED(desc, G_RB(op)); GPR_MODIFIED(desc, G_RA(op)); FPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); return true; case 0x255: // LSWI GPR_USED_OR_ZERO(desc, G_RA(op)); for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4) GPR_MODIFIED(desc, (G_RD(op) + regnum / 4) % 32); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); desc.cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4; return true; @@ -1058,14 +1119,14 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc XER_COUNT_USED(desc); for (regnum = 0; regnum < 32; regnum++) GPR_USED(desc, regnum); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x2d5: // STSWI GPR_USED_OR_ZERO(desc, G_RA(op)); for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4) GPR_USED(desc, (G_RD(op) + regnum / 4) % 32); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); desc.cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4; return true; @@ -1077,7 +1138,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); FPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x2b7: // STFSUX @@ -1090,7 +1151,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED(desc, G_RB(op)); GPR_MODIFIED(desc, G_RA(op)); FPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x338: // SRAWIx @@ -1109,7 +1170,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x106: // ICBT @@ -1119,7 +1180,8 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x1e6: // DCREAD @@ -1129,42 +1191,48 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc GPR_USED_OR_ZERO(desc, G_RA(op)); GPR_USED(desc, G_RB(op)); GPR_MODIFIED(desc, G_RT(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x143: // MFDCR if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; GPR_MODIFIED(desc, G_RD(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION; + desc.set_can_cause_exception(); + desc.set_privileged(); return true; case 0x1c3: // MTDCR if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; GPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT; + desc.set_can_cause_exception(); + desc.set_can_expose_external_int(); + desc.set_privileged(); return true; case 0x083: // WRTEE if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; GPR_USED(desc, G_RS(op)); - desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT; + desc.set_can_expose_external_int(); return true; case 0x0a3: // WRTEEI if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; if (op & MSR_EE) - desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT; + desc.set_can_expose_external_int(); return true; case 0x254: // ESA case 0x274: // DSA if (!is_602_class()) return false; - desc.flags |= OPFLAG_CAN_CHANGE_MODES | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE; + desc.set_can_cause_exception(); + desc.set_end_sequence(); + desc.set_can_change_modes(); return true; case 0x14b: // DIV (POWER) diff --git a/src/devices/cpu/powerpc/ppcfe.h b/src/devices/cpu/powerpc/ppcfe.h index 40b82bd8756..840a72c448f 100644 --- a/src/devices/cpu/powerpc/ppcfe.h +++ b/src/devices/cpu/powerpc/ppcfe.h @@ -16,42 +16,101 @@ #include "cpu/drcfe.h" +#include + //************************************************************************** // TYPE DEFINITIONS //************************************************************************** -class ppc_device::frontend : public drc_frontend +class ppc_device::opcode_desc : public opcode_desc_base { public: - // register flags 0 - static constexpr u32 REGFLAG_R(unsigned n) { return 1U << n; } - static constexpr u32 REGFLAG_RZ(unsigned n) { return !n ? 0U : REGFLAG_R(n); } + offs_t physpc; // physical PC of this opcode - // register flags 1 - static constexpr u32 REGFLAG_FR(unsigned n) { return 1U << n; } + u32 opptr; // copy of opcode - // register flags 2 - static constexpr u32 REGFLAG_CR(unsigned n) { return 0xf0000000U >> (4 * n); } - static constexpr u32 REGFLAG_CR_BIT(unsigned n) { return 0x80000000U >> n; } + u32 cycles; // number of cycles needed to execute - // register flags 3 - static constexpr u32 REGFLAG_XER_CA = 1U << 0; - static constexpr u32 REGFLAG_XER_OV = 1U << 1; - static constexpr u32 REGFLAG_XER_SO = 1U << 2; - static constexpr u32 REGFLAG_XER_COUNT = 1U << 3; - static constexpr u32 REGFLAG_CTR = 1U << 4; - static constexpr u32 REGFLAG_LR = 1U << 5; - static constexpr u32 REGFLAG_FPSCR(unsigned n) { return 1U << (6 + n); } + void set_can_expose_external_int() { m_extra_flags.set(CAN_EXPOSE_EXTERNAL_INT); } + void set_privileged() { m_extra_flags.set(PRIVILEGED); } + void set_compiler_unmapped() { m_extra_flags.set(COMPILER_UNMAPPED); } + void set_can_change_modes() { m_extra_flags.set(CAN_CHANGE_MODES); } + void set_reads_memory() { m_extra_flags.set(READS_MEMORY); } + void set_writes_memory() { m_extra_flags.set(WRITES_MEMORY); } + + bool can_expose_external_int() const { return m_extra_flags[CAN_EXPOSE_EXTERNAL_INT]; } + bool privileged() const { return m_extra_flags[PRIVILEGED]; } + bool compiler_unmapped() const { return m_extra_flags[COMPILER_UNMAPPED]; } + bool can_change_modes() const { return m_extra_flags[CAN_CHANGE_MODES]; } + bool reads_memory() const { return m_extra_flags[READS_MEMORY]; } + bool writes_memory() const { return m_extra_flags[WRITES_MEMORY]; } + + void reset(offs_t curpc, bool in_delay_slot) + { + opcode_desc_base::reset(curpc, in_delay_slot); + + physpc = curpc; + opptr = 0; + cycles = 0; + m_extra_flags.reset(); + } + +protected: + enum + { + CAN_EXPOSE_EXTERNAL_INT = 0, + PRIVILEGED, + COMPILER_UNMAPPED, + CAN_CHANGE_MODES, + READS_MEMORY, + WRITES_MEMORY, + + EXTRA_FLAG_COUNT + }; + + std::bitset m_extra_flags; +}; + +class ppc_device::frontend : public drc_frontend_base +{ +public: + static constexpr bool REGFLAG_R(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_R0 + n]; } + static constexpr bool REGFLAG_RZ(const opcode_desc::regmask &r, unsigned n) { return n && REGFLAG_R(r, n); } + static constexpr bool REGFLAG_FR(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_FR0 + n]; } + static constexpr uint32_t REGFLAG_CR(const opcode_desc::regmask &r) { return uint32_t(((r << 32) >> (128 - 32)).to_ulong()); } + static constexpr uint8_t REGFLAG_CR(const opcode_desc::regmask &r, unsigned n) { return uint8_t(((r << ((4 * n) + 32)) >> (128 - 4)).to_ulong()); } + static constexpr bool REGFLAG_CR_BIT(const opcode_desc::regmask &r, unsigned n) { return r[64 + 31 - n]; } + static constexpr bool REGFLAG_XER_CA(const opcode_desc::regmask &r) { return r[REG_BIT_XER_CA]; } + static constexpr bool REGFLAG_XER_OV(const opcode_desc::regmask &r) { return r[REG_BIT_XER_OV]; } + static constexpr bool REGFLAG_XER_SO(const opcode_desc::regmask &r) { return r[REG_BIT_XER_SO]; } + static constexpr bool REGFLAG_XER_COUNT(const opcode_desc::regmask &r) { return r[REG_BIT_XER_COUNT]; } + static constexpr bool REGFLAG_CTR(const opcode_desc::regmask &r) { return r[REG_BIT_CTR]; } + static constexpr bool REGFLAG_LR(const opcode_desc::regmask &r) { return r[REG_BIT_LR]; } + static constexpr bool REGFLAG_FPSCR(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_FPSCR0 + n]; } // construction/destruction frontend(ppc_device &ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + enum + { + REG_BIT_R0 = 0, + REG_BIT_FR0 = 32, + REG_BIT_XER_CA = 96, + REG_BIT_XER_OV, + REG_BIT_XER_SO, + REG_BIT_XER_COUNT, + REG_BIT_CTR, + REG_BIT_LR, + REG_BIT_FPSCR0 + }; + + bool describe(opcode_desc &desc, const opcode_desc *prev); -private: // inlines uint32_t compute_spr(uint32_t spr) const { return ((spr >> 5) | (spr << 5)) & 0x3ff; } bool is_403_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_403GA || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GB || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GC || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GCX || m_ppc.m_flavor == ppc_device::PPC_MODEL_405GP); } @@ -69,5 +128,4 @@ private: ppc_device &m_ppc; }; - #endif // MAME_CPU_POWERPC_PPCFE_H diff --git a/src/devices/cpu/sh/sh.cpp b/src/devices/cpu/sh/sh.cpp index 4c1d987f639..c507410d759 100644 --- a/src/devices/cpu/sh/sh.cpp +++ b/src/devices/cpu/sh/sh.cpp @@ -5,6 +5,7 @@ #include "sh.h" #include "sh_dasm.h" +#include "sh_fe.h" #include "cpu/drcumlsh.h" @@ -1982,16 +1983,6 @@ void sh_common_execution::sh2drc_add_fastram(offs_t start, offs_t end, uint8_t r INLINE FUNCTIONS ***************************************************************************/ -/*------------------------------------------------- - epc - compute the exception PC from a - descriptor --------------------------------------------------*/ - -uint32_t sh_common_execution::epc(const opcode_desc *desc) -{ - return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 1) : desc->pc; -} - /*------------------------------------------------- alloc_handle - allocate a handle if not already allocated @@ -2043,52 +2034,49 @@ void sh_common_execution::save_fast_iregs(drcuml_block &block) flags -------------------------------------------------*/ -const char *sh_common_execution::log_desc_flags_to_string(uint32_t flags) +const char *sh_common_execution::log_desc_flags_to_string(const opcode_desc &desc) { static char tempbuf[30]; char *dest = tempbuf; /* branches */ - if (flags & OPFLAG_IS_UNCONDITIONAL_BRANCH) + if (desc.is_unconditional_branch()) *dest++ = 'U'; - else if (flags & OPFLAG_IS_CONDITIONAL_BRANCH) + else if (desc.is_conditional_branch()) *dest++ = 'C'; else *dest++ = '.'; /* intrablock branches */ - *dest++ = (flags & OPFLAG_INTRABLOCK_BRANCH) ? 'i' : '.'; + *dest++ = desc.intrablock_branch() ? 'i' : '.'; /* branch targets */ - *dest++ = (flags & OPFLAG_IS_BRANCH_TARGET) ? 'B' : '.'; + *dest++ = desc.is_branch_target() ? 'B' : '.'; /* delay slots */ - *dest++ = (flags & OPFLAG_IN_DELAY_SLOT) ? 'D' : '.'; + *dest++ = desc.in_delay_slot() ? 'D' : '.'; /* exceptions */ - if (flags & OPFLAG_WILL_CAUSE_EXCEPTION) + if (desc.will_cause_exception()) *dest++ = 'E'; - else if (flags & OPFLAG_CAN_CAUSE_EXCEPTION) + else if (desc.can_cause_exception()) *dest++ = 'e'; else *dest++ = '.'; /* read/write */ - if (flags & OPFLAG_READS_MEMORY) + if (desc.reads_memory()) *dest++ = 'R'; - else if (flags & OPFLAG_WRITES_MEMORY) + else if (desc.writes_memory()) *dest++ = 'W'; else *dest++ = '.'; /* TLB validation */ - *dest++ = (flags & OPFLAG_VALIDATE_TLB) ? 'V' : '.'; - - /* TLB modification */ - *dest++ = (flags & OPFLAG_MODIFIES_TRANSLATION) ? 'T' : '.'; + *dest++ = desc.validate_tlb() ? 'V' : '.'; /* redispatch */ - *dest++ = (flags & OPFLAG_REDISPATCH) ? 'R' : '.'; + *dest++ = desc.redispatch() ? 'R' : '.'; return tempbuf; } @@ -2097,66 +2085,65 @@ const char *sh_common_execution::log_desc_flags_to_string(uint32_t flags) log_register_list - log a list of GPR registers -------------------------------------------------*/ -void sh_common_execution::log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist) +void sh_common_execution::log_register_list(const char *string, const std::bitset<32> ®list, const std::bitset<32> *regnostarlist) { int count = 0; - int regnum; /* skip if nothing */ - if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0) + if (reglist.none()) return; m_drcuml->log_printf("[%s:", string); - for (regnum = 0; regnum < 16; regnum++) + for (int regnum = 0; regnum < 16; regnum++) { - if (reglist[0] & REGFLAG_R(regnum)) + if (reglist[opcode_desc::REG_R0 + regnum]) { m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist != nullptr && !(regnostarlist[0] & REGFLAG_R(regnum))) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_R0 + regnum]) m_drcuml->log_printf("*"); } } - if (reglist[1] & REGFLAG_PR) + if (reglist[opcode_desc::REG_PR]) { m_drcuml->log_printf("%spr", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_PR)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_PR]) m_drcuml->log_printf("*"); } - if (reglist[1] & REGFLAG_SR) + if (reglist[opcode_desc::REG_SR]) { m_drcuml->log_printf("%ssr", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_SR)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_SR]) m_drcuml->log_printf("*"); } - if (reglist[1] & REGFLAG_MACL) + if (reglist[opcode_desc::REG_MACL]) { m_drcuml->log_printf("%smacl", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_MACL)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_MACL]) m_drcuml->log_printf("*"); } - if (reglist[1] & REGFLAG_MACH) + if (reglist[opcode_desc::REG_MACH]) { m_drcuml->log_printf("%smach", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_MACH)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_MACH]) m_drcuml->log_printf("*"); } - if (reglist[1] & REGFLAG_GBR) + if (reglist[opcode_desc::REG_GBR]) { m_drcuml->log_printf("%sgbr", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_GBR)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_GBR]) m_drcuml->log_printf("*"); } - if (reglist[1] & REGFLAG_VBR) + if (reglist[opcode_desc::REG_VBR]) { m_drcuml->log_printf("%svbr", (count++ == 0) ? "" : ","); - if (regnostarlist != nullptr && !(regnostarlist[1] & REGFLAG_VBR)) + if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_VBR]) m_drcuml->log_printf("*"); } @@ -2181,21 +2168,21 @@ void sh_common_execution::log_opcode_desc(const opcode_desc *desclist, int inden /* disassemle the current instruction and output it to the log */ if (m_drcuml->logging() || m_drcuml->logging_native()) { - if (desclist->flags & OPFLAG_VIRTUAL_NOOP) + if (desclist->virtual_noop()) stream << ""; else { sh_disassembler sh2d(false); - sh2d.dasm_one(stream, desclist->pc, desclist->opptr.w[0]); + sh2d.dasm_one(stream, desclist->pc, desclist->opptr); } } else stream << "???"; - m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), stream.str().c_str()); + m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(*desclist), stream.str()); /* output register states */ log_register_list("use", desclist->regin, nullptr); - log_register_list("mod", desclist->regout, desclist->regreq); + log_register_list("mod", desclist->regout, &desclist->regreq); m_drcuml->log_printf("\n"); /* if we have a delay slot, output it recursively */ @@ -2203,7 +2190,7 @@ void sh_common_execution::log_opcode_desc(const opcode_desc *desclist, int inden log_opcode_desc(desclist->delay.first(), indent + 1); /* at the end of a sequence add a dividing line */ - if (desclist->flags & OPFLAG_END_SEQUENCE) + if (desclist->end_sequence()) m_drcuml->log_printf("-----\n"); } } @@ -2330,7 +2317,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc) /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + if (seqlast->end_sequence()) break; assert(seqlast != nullptr); @@ -2360,7 +2347,7 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc) generate_checksum_block(block, compiler, seqhead, seqlast); /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) { UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000 } @@ -2371,14 +2358,14 @@ void sh_common_execution::code_compile_block(uint8_t mode, offs_t pc) generate_sequence_instruction(block, compiler, curdesc, 0xffffffff); } - /* if we need to return to the start, do it */ - if (seqlast->flags & OPFLAG_RETURN_TO_START) + if (seqlast->return_to_start()) { + // if we need to return to the start, do it nextpc = pc; } - /* otherwise we just go to the next instruction */ else { + // otherwise we just go to the next instruction nextpc = seqlast->pc + (seqlast->skipslots + 1) * 2; } @@ -2459,38 +2446,39 @@ void sh_common_execution::generate_checksum_block(drcuml_block &block, compiler_ if (m_drcuml->logging()) block.append_comment("[Validation for %08X]", seqhead->pc); // comment - /* loose verify or single instruction: just compare and fail */ if (!(m_drcoptions & SH2DRC_STRICT_VERIFY) || seqhead->next() == nullptr) { - if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP)) + // loose verify or single instruction: just compare and fail + if (!seqhead->virtual_noop()) { const void *base = m_prptr(seqhead->physpc); UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,word - UML_CMP(block, I0, seqhead->opptr.w[0]); // cmp i0,*opptr - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc + UML_CMP(block, I0, seqhead->opptr); // cmp i0,*opptr + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); // exne nocode,seqhead->pc } } - - /* full verification; sum up everything */ else { + // full verification; sum up everything uint32_t sum = 0; const void *base = m_prptr(seqhead->physpc); UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x4); // load i0,base,word - sum += seqhead->opptr.w[0]; + sum += seqhead->opptr; for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + { + if (!curdesc->virtual_noop()) { base = m_prptr(curdesc->physpc); UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,*opptr,word UML_ADD(block, I0, I0, I1); // add i0,i0,i1 - sum += curdesc->opptr.w[0]; + sum += curdesc->opptr; } + } UML_CMP(block, I0, sum); // cmp i0,sum - UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc + UML_EXHc(block, COND_NE, *m_nocode, seqhead->epc()); // exne nocode,seqhead->pc } } @@ -2503,14 +2491,12 @@ void sh_common_execution::generate_checksum_block(drcuml_block &block, compiler_ void sh_common_execution::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc) { - offs_t expc; - /* add an entry for the log */ - if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); + if (m_drcuml->logging() && !desc->virtual_noop()) + log_add_disasm_comment(block, desc->pc, desc->opptr); /* set the PC map variable */ - expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 1 : desc->pc; + const offs_t expc = desc->epc(); UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc /* accumulate total cycles */ @@ -2554,29 +2540,20 @@ void sh_common_execution::generate_sequence_instruction(drcuml_block &block, com } - /* if we hit an unmapped address, fatal error */ - if (desc->flags & OPFLAG_COMPILER_UNMAPPED) - { - UML_MOV(block, mem(&m_sh2_state->pc), desc->pc); // mov [pc],desc->pc - save_fast_iregs(block); - UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE - } - - /* if this is an invalid opcode, die */ - if (desc->flags & OPFLAG_INVALID_OPCODE) + if (desc->invalid_opcode()) { + // if this is an invalid opcode, die fatalerror("SH2DRC: invalid opcode!\n"); } - - /* otherwise, unless this is a virtual no-op, it's a regular instruction */ - else if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + else if (!desc->virtual_noop()) { - /* compile the instruction */ + // otherwise, unless this is a virtual no-op, it's a regular instruction + // compile the instruction if (!generate_opcode(block, compiler, desc, ovrpc)) { // handle an illegal op UML_MOV(block, mem(&m_sh2_state->pc), desc->pc); // mov [pc],desc->pc - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); // mov [arg0],opcode + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); // mov [arg0],opcode UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented } } @@ -2716,9 +2693,9 @@ bool sh_common_execution::generate_opcode(drcuml_block &block, compiler_state &c { uint32_t scratch, scratch2; int32_t disp; - uint16_t opcode = desc->opptr.w[0]; - uint8_t opswitch = opcode >> 12; - int in_delay_slot = ((desc->flags & OPFLAG_IN_DELAY_SLOT) != 0); + const uint16_t opcode = desc->opptr; + const uint8_t opswitch = opcode >> 12; + const int in_delay_slot = desc->in_delay_slot(); //printf("generating %04x\n", opcode); @@ -3073,7 +3050,7 @@ bool sh_common_execution::generate_group_3(drcuml_block &block, compiler_state & case 4: // DIV1(Rm, Rn); save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_DIV1, this); load_fast_iregs(block); return true; @@ -3111,7 +3088,7 @@ bool sh_common_execution::generate_group_3(drcuml_block &block, compiler_state & case 11: // SUBV(Rm, Rn); save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_SUBV, this); load_fast_iregs(block); return true; @@ -3125,7 +3102,7 @@ bool sh_common_execution::generate_group_3(drcuml_block &block, compiler_state & case 15: // ADDV(Rm, Rn); save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_ADDV, this); load_fast_iregs(block); return true; @@ -3755,7 +3732,7 @@ bool sh_common_execution::generate_group_0(drcuml_block &block, compiler_state & if (m_cpu_type > CPU_TYPE_SH1) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_MAC_L, this); load_fast_iregs(block); return true; @@ -3968,7 +3945,7 @@ bool sh_common_execution::generate_group_4(drcuml_block &block, compiler_state & case 0x2f: // MAC_W(Rm, Rn); case 0x3f: // MAC_W(Rm, Rn); save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_MAC_W, this); load_fast_iregs(block); return true; diff --git a/src/devices/cpu/sh/sh.h b/src/devices/cpu/sh/sh.h index 44023ac096e..3d726db11bd 100644 --- a/src/devices/cpu/sh/sh.h +++ b/src/devices/cpu/sh/sh.h @@ -6,9 +6,11 @@ #pragma once -#include "cpu/drcfe.h" #include "cpu/drcuml.h" +#include + + /*************************************************************************** DEBUGGING **************************************************************************/ @@ -70,16 +72,6 @@ #define Q_SHIFT 8 #define M_SHIFT 9 -#define REGFLAG_R(n) (1 << (n)) - -/* register flags 1 */ -#define REGFLAG_PR (1 << 0) -#define REGFLAG_MACL (1 << 1) -#define REGFLAG_MACH (1 << 2) -#define REGFLAG_GBR (1 << 3) -#define REGFLAG_VBR (1 << 4) -#define REGFLAG_SR (1 << 5) - /*************************************************************************** MACROS ***************************************************************************/ @@ -186,6 +178,9 @@ protected: EXECUTE_RESET_CACHE = 3 }; + class frontend; + class opcode_desc; + sh_common_execution(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness, address_map_constructor internal); void ADD(uint32_t m, uint32_t n); @@ -448,8 +443,8 @@ public: void alloc_handle(uml::code_handle *&handleptr, const char *name); void load_fast_iregs(drcuml_block &block); void save_fast_iregs(drcuml_block &block); - const char *log_desc_flags_to_string(uint32_t flags); - void log_register_list(const char *string, const uint32_t *reglist, const uint32_t *regnostarlist); + const char *log_desc_flags_to_string(const opcode_desc &flags); + void log_register_list(const char *string, const std::bitset<32> ®list, const std::bitset<32> *regnostarlist); void log_opcode_desc(const opcode_desc *desclist, int indent); void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); void generate_delay_slot(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc); @@ -463,32 +458,8 @@ public: protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; }; -class sh_frontend : public drc_frontend -{ -public: - sh_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - -protected: - virtual uint16_t read_word(opcode_desc &desc); - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; - -private: - bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - -protected: - virtual bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - virtual bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - virtual bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) = 0; - - sh_common_execution *m_sh; -}; - #endif // MAME_CPU_SH_SH_H diff --git a/src/devices/cpu/sh/sh2.cpp b/src/devices/cpu/sh/sh2.cpp index ae8acd76ee4..fd4df324c72 100644 --- a/src/devices/cpu/sh/sh2.cpp +++ b/src/devices/cpu/sh/sh2.cpp @@ -15,7 +15,10 @@ #include "emu.h" #include "sh2.h" + +#include "sh2fe.h" #include "sh_dasm.h" + #include "cpu/drcumlsh.h" //#define VERBOSE 1 @@ -34,6 +37,10 @@ sh2_device::sh2_device(const machine_config &mconfig, device_type type, const ch m_isdrc = allow_drc(); } +sh2_device::~sh2_device() +{ +} + void sh2_device::device_start() { sh_common_execution::device_start(); @@ -492,7 +499,7 @@ void sh2_device::sh2_exception_internal(const char *message, int irqline, int ve ///////// // DRC -const opcode_desc* sh2_device::get_desclist(offs_t pc) +const sh2_device::opcode_desc* sh2_device::get_desclist(offs_t pc) { return m_drcfe->describe_code(pc); } diff --git a/src/devices/cpu/sh/sh2.h b/src/devices/cpu/sh/sh2.h index 7e7af7c7d1e..3aceb1ae522 100644 --- a/src/devices/cpu/sh/sh2.h +++ b/src/devices/cpu/sh/sh2.h @@ -19,19 +19,18 @@ #include "sh.h" -class sh2_frontend; - class sh2_device : public sh_common_execution { - friend class sh2_frontend; - public: void set_frt_input(int state) override {} // not every CPU needs this, let the ones that do override it void func_fastirq(); // required for DRC, needs to be public to be accessible through non-classed static trampoline function protected: + class sh2_frontend; + sh2_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int cpu_type, address_map_constructor internal_map, int addrlines, uint32_t address_mask); + virtual ~sh2_device(); void check_pending_irq(const char *message); @@ -99,16 +98,4 @@ private: int8_t m_irq_line_state[17]; }; - -class sh2_frontend : public sh_frontend -{ -public: - sh2_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - -protected: - -private: - virtual bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; -}; - #endif // MAME_CPU_SH_SH2_H diff --git a/src/devices/cpu/sh/sh2fe.cpp b/src/devices/cpu/sh/sh2fe.cpp index b21ea334ba0..000ecbc8977 100644 --- a/src/devices/cpu/sh/sh2fe.cpp +++ b/src/devices/cpu/sh/sh2fe.cpp @@ -9,22 +9,21 @@ ***************************************************************************/ #include "emu.h" -#include "sh2.h" -#include "cpu/drcfe.h" +#include "sh2fe.h" /*************************************************************************** INSTRUCTION PARSERS ***************************************************************************/ -sh2_frontend::sh2_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : sh_frontend(device, window_start, window_end, max_sequence) +sh2_device::sh2_frontend::sh2_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : frontend(device, window_start, window_end, max_sequence) { } -bool sh2_frontend::describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh2_device::sh2_frontend::describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { return true; } diff --git a/src/devices/cpu/sh/sh2fe.h b/src/devices/cpu/sh/sh2fe.h new file mode 100644 index 00000000000..b58fa79e705 --- /dev/null +++ b/src/devices/cpu/sh/sh2fe.h @@ -0,0 +1,28 @@ +// license:BSD-3-Clause +// copyright-holders:R. Belmont +/*************************************************************************** + + sh2fe.cpp + + Front end for SH-2 recompiler + +***************************************************************************/ +#ifndef MAME_CPU_SH_SH2FE_H +#define MAME_CPU_SH_SH2FE_H + +#pragma once + +#include "sh2.h" +#include "sh_fe.h" + + +class sh2_device::sh2_frontend : public sh_common_execution::frontend +{ +public: + sh2_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + +private: + virtual bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; +}; + +#endif // MAME_CPU_SH_SH2FE_H diff --git a/src/devices/cpu/sh/sh4.cpp b/src/devices/cpu/sh/sh4.cpp index 6e73b69a531..a47754ba4e0 100644 --- a/src/devices/cpu/sh/sh4.cpp +++ b/src/devices/cpu/sh/sh4.cpp @@ -26,11 +26,14 @@ #include "emu.h" #include "sh4.h" -#include "sh4regs.h" -#include "sh4comn.h" + #include "sh3comn.h" +#include "sh4fe.h" +#include "sh4comn.h" +#include "sh4regs.h" #include "sh4tmu.h" #include "sh_dasm.h" + #include "cpu/drcumlsh.h" @@ -937,6 +940,10 @@ sh3_base_device::sh3_base_device(const machine_config &mconfig, device_type type m_am = SH34_AM; } +sh3_base_device::~sh3_base_device() +{ +} + sh4_base_device::sh4_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness) : sh34_base_device(mconfig, type, tag, owner, clock, endianness, address_map_constructor(FUNC(sh4_base_device::sh4_internal_map), this)) @@ -945,6 +952,10 @@ sh4_base_device::sh4_base_device(const machine_config &mconfig, device_type type m_am = SH34_AM; } +sh4_base_device::~sh4_base_device() +{ +} + sh3_device::sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness) : sh3_base_device(mconfig, SH3, tag, owner, clock, endianness) @@ -4231,7 +4242,7 @@ void sh34_base_device::sh4_set_ftcsr_callback(sh4_ftcsr_callback callback) */ -const opcode_desc* sh4_base_device::get_desclist(offs_t pc) +const sh4_base_device::opcode_desc* sh4_base_device::get_desclist(offs_t pc) { return m_drcfe->describe_code(pc); } @@ -4241,7 +4252,7 @@ void sh4_base_device::init_drc_frontend() m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); } -const opcode_desc* sh3_base_device::get_desclist(offs_t pc) +const sh3_base_device::opcode_desc* sh3_base_device::get_desclist(offs_t pc) { return m_drcfe->describe_code(pc); } @@ -4548,7 +4559,7 @@ static void cfunc_STCRBANK(void *param) { ((sh34_base_device *)param)->func_STCR bool sh34_base_device::generate_group_0_STCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STCRBANK, this); load_fast_iregs(block); return true; @@ -4572,7 +4583,7 @@ static void cfunc_PREFM(void *param) { ((sh34_base_device *)param)->func_PREFM() bool sh34_base_device::generate_group_0_PREFM(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_PREFM, this); load_fast_iregs(block); return true; @@ -4593,7 +4604,7 @@ static void cfunc_LDTLB(void *param) { ((sh34_base_device *)param)->func_LDTLB() bool sh34_base_device::generate_group_0_LDTLB(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDTLB, this); load_fast_iregs(block); return true; @@ -4605,7 +4616,7 @@ static void cfunc_CLRS(void *param) { ((sh34_base_device *)param)->func_CLRS(); bool sh34_base_device::generate_group_0_CLRS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_CLRS, this); load_fast_iregs(block); return true; @@ -4617,7 +4628,7 @@ static void cfunc_SETS(void *param) { ((sh34_base_device *)param)->func_SETS(); bool sh34_base_device::generate_group_0_SETS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_SETS, this); load_fast_iregs(block); return true; @@ -4673,7 +4684,7 @@ static void cfunc_TRAPA(void *param) { ((sh34_base_device *)param)->func_TRAPA() bool sh34_base_device::generate_group_12_TRAPA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_MOV(block, mem(&m_sh2_state->pc), desc->pc + 2); // copy the PC because we need to use it UML_CALLC(block, cfunc_TRAPA, this); load_fast_iregs(block); @@ -4687,7 +4698,7 @@ static void cfunc_LDCSR(void *param) { ((sh34_base_device *)param)->func_LDCSR() bool sh34_base_device::generate_group_4_LDCSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCSR, this); load_fast_iregs(block); @@ -4702,7 +4713,7 @@ static void cfunc_LDCMSR(void *param) { ((sh34_base_device *)param)->func_LDCMSR bool sh34_base_device::generate_group_4_LDCMSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCMSR, this); load_fast_iregs(block); @@ -4719,7 +4730,7 @@ static void cfunc_SHAD(void *param) { ((sh34_base_device *)param)->func_SHAD(); bool sh34_base_device::generate_group_4_SHAD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_SHAD, this); load_fast_iregs(block); return true; @@ -4731,7 +4742,7 @@ static void cfunc_SHLD(void *param) { ((sh34_base_device *)param)->func_SHLD(); bool sh34_base_device::generate_group_4_SHLD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_SHLD, this); load_fast_iregs(block); return true; @@ -4867,7 +4878,7 @@ static void cfunc_LDCRBANK(void *param) { ((sh34_base_device *)param)->func_LDCR bool sh34_base_device::generate_group_4_LDCRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCRBANK, this); load_fast_iregs(block); return true; @@ -4879,7 +4890,7 @@ static void cfunc_STCMRBANK(void *param) { ((sh34_base_device *)param)->func_STC bool sh34_base_device::generate_group_4_STCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STCMRBANK, this); load_fast_iregs(block); return true; @@ -4891,7 +4902,7 @@ static void cfunc_LDCMRBANK(void *param) { ((sh34_base_device *)param)->func_LDC bool sh34_base_device::generate_group_4_LDCMRBANK(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCMRBANK, this); load_fast_iregs(block); return true; @@ -4903,7 +4914,7 @@ static void cfunc_STCMSGR(void *param) { ((sh34_base_device *)param)->func_STCMS bool sh34_base_device::generate_group_4_STCMSGR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STCMSGR, this); load_fast_iregs(block); return true; @@ -4915,7 +4926,7 @@ static void cfunc_STCMSSR(void *param) { ((sh34_base_device *)param)->func_STCMS bool sh34_base_device::generate_group_4_STCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STCMSSR, this); load_fast_iregs(block); return true; @@ -4927,7 +4938,7 @@ static void cfunc_LDCMSSR(void *param) { ((sh34_base_device *)param)->func_LDCMS bool sh34_base_device::generate_group_4_LDCMSSR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCMSSR, this); load_fast_iregs(block); return true; @@ -4945,7 +4956,7 @@ static void cfunc_STCMSPC(void *param) { ((sh34_base_device *)param)->func_STCMS bool sh34_base_device::generate_group_4_STCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STCMSPC, this); load_fast_iregs(block); return true; @@ -4957,7 +4968,7 @@ static void cfunc_LDCMSPC(void *param) { ((sh34_base_device *)param)->func_LDCMS bool sh34_base_device::generate_group_4_LDCMSPC(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCMSPC, this); load_fast_iregs(block); return true; @@ -4975,7 +4986,7 @@ static void cfunc_STSMFPUL(void *param) { ((sh34_base_device *)param)->func_STSM bool sh34_base_device::generate_group_4_STSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STSMFPUL, this); load_fast_iregs(block); return true; @@ -4987,7 +4998,7 @@ static void cfunc_LDSMFPUL(void *param) { ((sh34_base_device *)param)->func_LDSM bool sh34_base_device::generate_group_4_LDSMFPUL(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDSMFPUL, this); load_fast_iregs(block); return true; @@ -5005,7 +5016,7 @@ static void cfunc_STSMFPSCR(void *param) { ((sh34_base_device *)param)->func_STS bool sh34_base_device::generate_group_4_STSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STSMFPSCR, this); load_fast_iregs(block); return true; @@ -5018,7 +5029,7 @@ static void cfunc_LDSMFPSCR(void *param) { ((sh34_base_device *)param)->func_LDS bool sh34_base_device::generate_group_4_LDSMFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDSMFPSCR, this); load_fast_iregs(block); return true; @@ -5031,7 +5042,7 @@ static void cfunc_LDSFPSCR(void *param) { ((sh34_base_device *)param)->func_LDSF bool sh34_base_device::generate_group_4_LDSFPSCR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDSFPSCR, this); load_fast_iregs(block); return true; @@ -5043,7 +5054,7 @@ static void cfunc_STCMDBR(void *param) { ((sh34_base_device *)param)->func_STCMD bool sh34_base_device::generate_group_4_STCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_STCMDBR, this); load_fast_iregs(block); return true; @@ -5055,7 +5066,7 @@ static void cfunc_LDCMDBR(void *param) { ((sh34_base_device *)param)->func_LDCMD bool sh34_base_device::generate_group_4_LDCMDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCMDBR, this); load_fast_iregs(block); return true; @@ -5067,7 +5078,7 @@ static void cfunc_LDCDBR(void *param) { ((sh34_base_device *)param)->func_LDCDBR bool sh34_base_device::generate_group_4_LDCDBR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_LDCDBR, this); load_fast_iregs(block); return true; @@ -5211,7 +5222,7 @@ static void cfunc_FMOVS0FR(void *param) { ((sh34_base_device *)param)->func_FMOV bool sh34_base_device::generate_group_15_FMOVS0FR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVS0FR, this); load_fast_iregs(block); return true; @@ -5223,7 +5234,7 @@ static void cfunc_FMOVFRS0(void *param) { ((sh34_base_device *)param)->func_FMOV bool sh34_base_device::generate_group_15_FMOVFRS0(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVFRS0, this); load_fast_iregs(block); return true; @@ -5235,7 +5246,7 @@ static void cfunc_FMOVMRFR(void *param) { ((sh34_base_device *)param)->func_FMOV bool sh34_base_device::generate_group_15_FMOVMRFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVMRFR, this); load_fast_iregs(block); return true; @@ -5247,7 +5258,7 @@ static void cfunc_FMOVMRIFR(void *param) { ((sh34_base_device *)param)->func_FMO bool sh34_base_device::generate_group_15_FMOVMRIFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVMRIFR, this); load_fast_iregs(block); return true; @@ -5259,7 +5270,7 @@ static void cfunc_FMOVFRMR(void *param) { ((sh34_base_device *)param)->func_FMOV bool sh34_base_device::generate_group_15_FMOVFRMR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVFRMR, this); load_fast_iregs(block); return true; @@ -5271,7 +5282,7 @@ static void cfunc_FMOVFRMDR(void *param) { ((sh34_base_device *)param)->func_FMO bool sh34_base_device::generate_group_15_FMOVFRMDR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVFRMDR, this); load_fast_iregs(block); return true; @@ -5283,7 +5294,7 @@ static void cfunc_FMOVFR(void *param) { ((sh34_base_device *)param)->func_FMOVFR bool sh34_base_device::generate_group_15_FMOVFR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FMOVFR, this); load_fast_iregs(block); return true; @@ -5342,7 +5353,7 @@ static void cfunc_FLDS(void *param) { ((sh34_base_device *)param)->func_FLDS(); bool sh34_base_device::generate_group_15_op1111_0x13_FLDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FLDS, this); load_fast_iregs(block); return true; @@ -5429,7 +5440,7 @@ static void cfunc_FSQRT(void *param) { ((sh34_base_device *)param)->func_FSQRT() bool sh34_base_device::generate_group_15_op1111_0x13_FSQRT(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FSQRT, this); load_fast_iregs(block); return true; @@ -5441,7 +5452,7 @@ static void cfunc_FSRRA(void *param) { ((sh34_base_device *)param)->func_FSRRA() bool sh34_base_device::generate_group_15_op1111_0x13_FSRRA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FSRRA, this); load_fast_iregs(block); return true; @@ -5477,7 +5488,7 @@ static void cfunc_FCNVSD(void *param) { ((sh34_base_device *)param)->func_FCNVSD bool sh34_base_device::generate_group_15_op1111_0x13_FCNVSD(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FCNVSD, this); load_fast_iregs(block); return true; @@ -5489,7 +5500,7 @@ static void cfunc_FCNVDS(void *param) { ((sh34_base_device *)param)->func_FCNVDS bool sh34_base_device::generate_group_15_op1111_0x13_FCNVDS(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FCNVDS, this); load_fast_iregs(block); return true; @@ -5501,7 +5512,7 @@ static void cfunc_FIPR(void *param) { ((sh34_base_device *)param)->func_FIPR(); bool sh34_base_device::generate_group_15_op1111_0x13_FIPR(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FIPR, this); load_fast_iregs(block); return true; @@ -5572,7 +5583,7 @@ static void cfunc_FTRV(void *param) { ((sh34_base_device *)param)->func_FTRV(); bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FTRV(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FTRV, this); load_fast_iregs(block); return true; @@ -5584,7 +5595,7 @@ static void cfunc_FSSCA(void *param) { ((sh34_base_device *)param)->func_FSSCA() bool sh34_base_device::generate_group_15_op1111_0x13_op1111_0xf13_FSSCA(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) { save_fast_iregs(block); - UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_sh2_state->arg0), desc->opptr); UML_CALLC(block, cfunc_FSSCA, this); load_fast_iregs(block); return true; diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h index c4fc1c0cd1c..d92e374bc5e 100644 --- a/src/devices/cpu/sh/sh4.h +++ b/src/devices/cpu/sh/sh4.h @@ -155,8 +155,6 @@ struct sh4_utlb typedef void (*sh4_ftcsr_callback)(uint32_t); -class sh4_frontend; - class sh34_base_device : public sh_common_execution { public: @@ -250,6 +248,8 @@ public: void func_STCSPC(); protected: + class sh4_frontend; + // construction/destruction sh34_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness, address_map_constructor internal); @@ -684,7 +684,8 @@ private: class sh3_base_device : public sh34_base_device { - friend class sh4_frontend; +public: + virtual ~sh3_base_device(); protected: // construction/destruction @@ -1234,9 +1235,10 @@ protected: class sh4_base_device : public sh34_base_device { -protected: - friend class sh4_frontend; +public: + virtual ~sh4_base_device(); +protected: // construction/destruction sh4_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness); @@ -1972,32 +1974,18 @@ protected: virtual void sh4_register_map(address_map& map) override ATTR_COLD; }; -class sh4_frontend : public sh_frontend -{ -public: - sh4_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); -protected: - virtual uint16_t read_word(opcode_desc &desc) override; - -private: - virtual bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; - virtual bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; - virtual bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; - bool describe_op1111_0x13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); - bool describe_op1111_0xf13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); -}; - -DECLARE_DEVICE_TYPE(SH3, sh3_device) +DECLARE_DEVICE_TYPE(SH3, sh3_device) DECLARE_DEVICE_TYPE(SH7708S, sh7708s_device) -DECLARE_DEVICE_TYPE(SH7709, sh7709_device) +DECLARE_DEVICE_TYPE(SH7709, sh7709_device) DECLARE_DEVICE_TYPE(SH7709S, sh7709s_device) -DECLARE_DEVICE_TYPE(SH4, sh4_device) -DECLARE_DEVICE_TYPE(SH7091, sh7091_device) -DECLARE_DEVICE_TYPE(SH7750, sh7750_device) + +DECLARE_DEVICE_TYPE(SH4, sh4_device) +DECLARE_DEVICE_TYPE(SH7091, sh7091_device) +DECLARE_DEVICE_TYPE(SH7750, sh7750_device) DECLARE_DEVICE_TYPE(SH7750R, sh7750r_device) DECLARE_DEVICE_TYPE(SH7750S, sh7750s_device) -DECLARE_DEVICE_TYPE(SH7751, sh7751_device) +DECLARE_DEVICE_TYPE(SH7751, sh7751_device) DECLARE_DEVICE_TYPE(SH7751R, sh7751r_device) #endif // MAME_CPU_SH_SH4_H diff --git a/src/devices/cpu/sh/sh4comn.h b/src/devices/cpu/sh/sh4comn.h index bac004d36b4..00eab9bf51c 100644 --- a/src/devices/cpu/sh/sh4comn.h +++ b/src/devices/cpu/sh/sh4comn.h @@ -63,8 +63,6 @@ enum #define SZ 0x00100000 #define FR 0x00200000 -#define REGFLAG_R(n) (1 << (n)) - /* additional register flags 1 */ #define REGFLAG_SGR (1 << 6) #define REGFLAG_FPUL (1 << 7) diff --git a/src/devices/cpu/sh/sh4fe.cpp b/src/devices/cpu/sh/sh4fe.cpp index 8474cb48171..d05bd07751f 100644 --- a/src/devices/cpu/sh/sh4fe.cpp +++ b/src/devices/cpu/sh/sh4fe.cpp @@ -9,21 +9,23 @@ ***************************************************************************/ #include "emu.h" -#include "sh4.h" +#include "sh4fe.h" + #include "sh4comn.h" -#include "cpu/drcfe.h" + +// FIXME: if the code generation is to be improved, this needs to actually describe the instructions /*************************************************************************** INSTRUCTION PARSERS ***************************************************************************/ -sh4_frontend::sh4_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : sh_frontend(device, window_start, window_end, max_sequence) +sh34_base_device::sh4_frontend::sh4_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : frontend(device, window_start, window_end, max_sequence) { } -uint16_t sh4_frontend::read_word(opcode_desc &desc) +uint16_t sh34_base_device::sh4_frontend::read_word(opcode_desc &desc) { if (desc.physpc >= 0xe0000000) return m_sh->m_pr16(desc.physpc); @@ -33,13 +35,13 @@ uint16_t sh4_frontend::read_word(opcode_desc &desc) } -bool sh4_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh34_base_device::sh4_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 0xff) { default: // fall through to SH2 handlers - return sh_frontend::describe_group_0(desc, prev, opcode); + return frontend::describe_group_0(desc, prev, opcode); case 0x52: case 0x62: @@ -105,14 +107,14 @@ bool sh4_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, } -bool sh4_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh34_base_device::sh4_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 0xff) { default: // LDCMSR (0x0e) has sh2/4 flag difference // fall through to SH2 handlers - return sh_frontend::describe_group_4(desc, prev, opcode); + return frontend::describe_group_4(desc, prev, opcode); case 0x42: case 0x46: @@ -231,7 +233,7 @@ bool sh4_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, } // SH4 only (FPU ops) -bool sh4_frontend::describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh34_base_device::sh4_frontend::describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 0x0f) { @@ -258,7 +260,7 @@ bool sh4_frontend::describe_group_15(opcode_desc &desc, const opcode_desc *prev, return false; } -bool sh4_frontend::describe_op1111_0x13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh34_base_device::sh4_frontend::describe_op1111_0x13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch ((opcode >> 4) & 0x0f) { @@ -282,7 +284,7 @@ bool sh4_frontend::describe_op1111_0x13(opcode_desc &desc, const opcode_desc *pr return false; } -bool sh4_frontend::describe_op1111_0xf13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh34_base_device::sh4_frontend::describe_op1111_0xf13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { if (opcode & 0x100) { diff --git a/src/devices/cpu/sh/sh4fe.h b/src/devices/cpu/sh/sh4fe.h new file mode 100644 index 00000000000..f3ce57bf74a --- /dev/null +++ b/src/devices/cpu/sh/sh4fe.h @@ -0,0 +1,36 @@ +// license:BSD-3-Clause +// copyright-holders:R. Belmont +/*************************************************************************** + + sh4fe.h + + Front end for SH-4 recompiler + +***************************************************************************/ +#ifndef MAME_CPU_SH_SH4FE_H +#define MAME_CPU_SH_SH4FE_H + +#pragma once + +#include "sh4.h" +#include "sh_fe.h" + + +class sh34_base_device::sh4_frontend : public sh_common_execution::frontend +{ +public: + sh4_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + +protected: + virtual uint16_t read_word(opcode_desc &desc) override; + + virtual bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; + virtual bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; + virtual bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) override; + +private: + bool describe_op1111_0x13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + bool describe_op1111_0xf13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); +}; + +#endif // MAME_CPU_SH_SH4FE_H diff --git a/src/devices/cpu/sh/sh_fe.cpp b/src/devices/cpu/sh/sh_fe.cpp index 5e803b8ee00..f62ecf110fb 100644 --- a/src/devices/cpu/sh/sh_fe.cpp +++ b/src/devices/cpu/sh/sh_fe.cpp @@ -4,41 +4,52 @@ sh_fe.cpp - Front end for SH recompiler + Front end for SuperH recompiler ***************************************************************************/ #include "emu.h" -#include "sh2.h" -#include "cpu/drcfe.h" +#include "sh_fe.h" + +#include "cpu/drcfe.ipp" /*************************************************************************** INSTRUCTION PARSERS ***************************************************************************/ -sh_frontend::sh_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*device, window_start, window_end, max_sequence) +sh_common_execution::frontend::frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend_base(device->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_sh(device) { } +sh_common_execution::frontend::~frontend() +{ +} + +sh_common_execution::opcode_desc const *sh_common_execution::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + + +inline uint16_t sh_common_execution::frontend::read_word(opcode_desc &desc) +{ + return m_sh->m_pr16(desc.physpc); +} + /*------------------------------------------------- describe_instruction - build a description of a single instruction -------------------------------------------------*/ -inline uint16_t sh_frontend::read_word(opcode_desc &desc) +bool sh_common_execution::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - return m_sh->m_pr16(desc.physpc); -} - -bool sh_frontend::describe(opcode_desc &desc, const opcode_desc *prev) -{ - uint16_t opcode; - /* fetch the opcode */ - opcode = desc.opptr.w[0] = read_word(desc); + const uint16_t opcode = desc.opptr = read_word(desc); /* all instructions are 2 bytes and most are a single cycle */ desc.length = 2; @@ -46,88 +57,91 @@ bool sh_frontend::describe(opcode_desc &desc, const opcode_desc *prev) switch (opcode>>12) { - case 0: - return describe_group_0(desc, prev, opcode); + case 0: + return describe_group_0(desc, prev, opcode); - case 1: // MOVLS4 - desc.regin[0] |= REGFLAG_R(REG_N) | REGFLAG_R(REG_M); - desc.flags |= OPFLAG_WRITES_MEMORY; + case 1: // MOVLS4 + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_writes_memory(); + return true; + + case 2: + return describe_group_2(desc, prev, opcode); + + case 3: + return describe_group_3(desc, prev, opcode); + + case 4: + return describe_group_4(desc, prev, opcode); + + case 5: // MOVLL4 + desc.set_r_used(REG_M); + desc.set_r_modified(REG_N); + desc.set_reads_memory(); + return true; + + case 6: + return describe_group_6(desc, prev, opcode); + + case 7: // ADDI + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + return true; + + case 8: + return describe_group_8(desc, prev, opcode); + + case 9: // MOVWI + desc.set_r_modified(REG_N); + desc.set_reads_memory(); + return true; + + case 11: // BSR + desc.set_pr_modified(); + [[fallthrough]]; // BSR is BRA with the addition of PR = the return address + case 10: // BRA + { + int32_t disp = util::sext(opcode, 12); + + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.targetpc = (desc.pc + 2) + disp * 2 + 2; + desc.delayslots = 1; + desc.cycles = 2; return true; + } - case 2: - return describe_group_2(desc, prev, opcode); + case 12: + return describe_group_12(desc, prev, opcode); - case 3: - return describe_group_3(desc, prev, opcode); + case 13: // MOVLI + desc.set_r_modified(REG_N); + desc.set_reads_memory(); + return true; - case 4: - return describe_group_4(desc, prev, opcode); + case 14: // MOVI + desc.set_r_modified(REG_N); + return true; - case 5: // MOVLL4 - desc.regin[0] |= REGFLAG_R(REG_M); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_READS_MEMORY; - return true; - - case 6: - return describe_group_6(desc, prev, opcode); - - case 7: // ADDI - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - return true; - - case 8: - return describe_group_8(desc, prev, opcode); - - case 9: // MOVWI - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_READS_MEMORY; - return true; - - case 11: // BSR - desc.regout[1] |= REGFLAG_PR; - [[fallthrough]]; // BSR is BRA with the addition of PR = the return address - case 10: // BRA - { - int32_t disp = util::sext(opcode, 12); - - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - desc.targetpc = (desc.pc + 2) + disp * 2 + 2; - desc.delayslots = 1; - desc.cycles = 2; - return true; - } - - case 12: - return describe_group_12(desc, prev, opcode); - - case 13: // MOVLI - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_READS_MEMORY; - return true; - - case 14: // MOVI - desc.regout[0] |= REGFLAG_R(REG_N); - return true; - - case 15: // NOP - return describe_group_15(desc, prev, opcode); + case 15: // NOP + return describe_group_15(desc, prev, opcode); } return false; } -bool sh_frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 15) { case 0: // MOVBS(Rm, Rn); case 1: // MOVWS(Rm, Rn); case 2: // MOVLS(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_writes_memory(); return true; case 3: // NOP(); @@ -137,29 +151,33 @@ bool sh_frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev, u case 5: // MOVWM(Rm, Rn); case 6: // MOVLM(Rm, Rn); case 13: // XTRCT(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_writes_memory(); return true; case 7: // DIV0S(Rm, Rn); case 8: // TST(Rm, Rn); case 12: // CMPSTR(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_sr_modified(); return true; case 9: // AND(Rm, Rn); case 10: // XOR(Rm, Rn); case 11: // OR(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); return true; case 14: // MULU(Rm, Rn); case 15: // MULS(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACL | REGFLAG_MACH; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_mac_modified(); desc.cycles = 2; return true; } @@ -167,7 +185,7 @@ bool sh_frontend::describe_group_2(opcode_desc &desc, const opcode_desc *prev, u return false; } -bool sh_frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 15) { @@ -176,8 +194,9 @@ bool sh_frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev, u case 3: // CMPGE(Rm, Rn); case 6: // CMPHI(Rm, Rn); case 7: // CMPGT(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_sr_modified(); return true; case 1: // NOP(); @@ -185,39 +204,43 @@ bool sh_frontend::describe_group_3(opcode_desc &desc, const opcode_desc *prev, u return true; case 4: // DIV1(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; case 5: // DMULU(Rm, Rn); case 13: // DMULS(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACL | REGFLAG_MACH; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_mac_modified(); desc.cycles = 2; return true; case 8: // SUB(Rm, Rn); case 12: // ADD(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); return true; case 10: // SUBC(Rm, Rn); case 11: // SUBV(Rm, Rn); case 14: // ADDC(Rm, Rn); case 15: // ADDV(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_SR; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_sr_used(); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; } return false; } -bool sh_frontend::describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 15) { @@ -232,33 +255,35 @@ bool sh_frontend::describe_group_6(opcode_desc &desc, const opcode_desc *prev, u case 13: // EXTUW(Rm, Rn); case 14: // EXTSB(Rm, Rn); case 15: // EXTSW(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_used(REG_M); + desc.set_r_modified(REG_N); return true; case 4: // MOVBP(Rm, Rn); case 5: // MOVWP(Rm, Rn); case 6: // MOVLP(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_reads_memory(); return true; case 8: // SWAPB(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); return true; case 10: // NEGC(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_M); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; } return false; } -bool sh_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { int32_t disp; @@ -266,8 +291,9 @@ bool sh_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, u { case 0 << 8: // MOVBS4(opcode & 0x0f, Rm); case 1 << 8: // MOVWS4(opcode & 0x0f, Rm); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(0); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(0); + desc.set_writes_memory(); return true; case 2 << 8: // NOP(); @@ -281,20 +307,20 @@ bool sh_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, u case 4 << 8: // MOVBL4(Rm, opcode & 0x0f); case 5 << 8: // MOVWL4(Rm, opcode & 0x0f); - desc.regin[0] |= REGFLAG_R(REG_M); - desc.regout[0] |= REGFLAG_R(0); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_modified(0); + desc.set_reads_memory(); return true; case 8 << 8: // CMPIM(opcode & 0xff); - desc.regin[0] |= REGFLAG_R(REG_M); - desc.regin[1] |= REGFLAG_SR; - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_M); + desc.set_sr_used(); + desc.set_sr_modified(); return true; case 9 << 8: // BT(opcode & 0xff); case 11 << 8: // BF(opcode & 0xff); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.cycles = 3; disp = util::sext(opcode, 8); desc.targetpc = (desc.pc + 2) + disp * 2 + 2; @@ -302,7 +328,7 @@ bool sh_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, u case 13 << 8: // BTS(opcode & 0xff); case 15 << 8: // BFS(opcode & 0xff); - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + desc.set_is_conditional_branch(); desc.cycles = 2; disp = util::sext(opcode, 8); desc.targetpc = (desc.pc + 2) + disp * 2 + 2; @@ -313,55 +339,58 @@ bool sh_frontend::describe_group_8(opcode_desc &desc, const opcode_desc *prev, u return false; } -bool sh_frontend::describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & (15<<8)) { case 0 << 8: // MOVBSG(opcode & 0xff); case 1 << 8: // MOVWSG(opcode & 0xff); case 2 << 8: // MOVLSG(opcode & 0xff); - desc.regin[0] |= REGFLAG_R(0); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(0); + desc.set_writes_memory(); return true; case 3 << 8: // TRAPA(opcode & 0xff); - desc.regin[0] |= REGFLAG_R(15); - desc.regin[1] |= REGFLAG_VBR; - desc.regout[0] |= REGFLAG_R(15); + desc.set_r_used(15); + desc.set_vbr_used(); + desc.set_r_modified(15); desc.cycles = 8; desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_reads_memory(); return true; case 4 << 8: // MOVBLG(opcode & 0xff); case 5 << 8: // MOVWLG(opcode & 0xff); case 6 << 8: // MOVLLG(opcode & 0xff); case 7 << 8: // MOVA(opcode & 0xff); - desc.regout[0] |= REGFLAG_R(0); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_modified(0); + desc.set_reads_memory(); return true; case 8 << 8: // TSTI(opcode & 0xff); - desc.regin[0] |= REGFLAG_R(0); - desc.regin[1] |= REGFLAG_SR; - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(0); + desc.set_sr_used(); + desc.set_sr_modified(); return true; case 9 << 8: // ANDI(opcode & 0xff); case 10 << 8: // XORI(opcode & 0xff); case 11 << 8: // ORI(opcode & 0xff); - desc.regin[0] |= REGFLAG_R(0); - desc.regout[0] |= REGFLAG_R(0); + desc.set_r_used(0); + desc.set_r_modified(0); return true; case 12 << 8: // TSTM(opcode & 0xff); case 13 << 8: // ANDM(opcode & 0xff); case 14 << 8: // XORM(opcode & 0xff); case 15 << 8: // ORM(opcode & 0xff); - desc.regin[0] |= REGFLAG_R(0); - desc.regin[1] |= REGFLAG_SR | REGFLAG_GBR; - desc.regout[1] |= REGFLAG_SR; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(0); + desc.set_sr_used(); + desc.set_gbr_used(); + desc.set_sr_modified(); + desc.set_reads_memory(); return true; } @@ -370,9 +399,9 @@ bool sh_frontend::describe_group_12(opcode_desc &desc, const opcode_desc *prev, -bool sh_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { - switch (opcode & 0x3F) + switch (opcode & 0x3f) { case 0x00: // NOP(); case 0x01: // NOP(); @@ -393,13 +422,14 @@ bool sh_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, u return true; case 0x02: // STCSR(Rn); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_modified(REG_N); return true; case 0x03: // BSRF(Rn); - desc.regout[1] |= REGFLAG_PR; + desc.set_pr_modified(); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; @@ -417,32 +447,36 @@ bool sh_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, u case 0x34: // MOVBS0(Rm, Rn); case 0x35: // MOVWS0(Rm, Rn); case 0x36: // MOVLS0(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N) | REGFLAG_R(0); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_used(0); + desc.set_writes_memory(); return true; case 0x07: // MULL(Rm, Rn); case 0x17: // MULL(Rm, Rn); case 0x27: // MULL(Rm, Rn); case 0x37: // MULL(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_N) | REGFLAG_R(REG_M); - desc.regout[1] |= REGFLAG_MACL; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_macl_modified(); desc.cycles = 2; return true; case 0x08: // CLRT(); - desc.regout[1] |= REGFLAG_SR; + desc.set_sr_modified(); return true; case 0x0a: // STSMACH(Rn); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACH; + desc.set_r_modified(REG_N); + desc.set_mach_modified(); return true; case 0x0b: // RTS(); - desc.regin[1] |= REGFLAG_PR; + desc.set_pr_used(); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; desc.cycles = 2; @@ -461,36 +495,38 @@ bool sh_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, u case 0x3c: // MOVBL0(Rm, Rn); case 0x3d: // MOVWL0(Rm, Rn); case 0x3e: // MOVLL0(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(0); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(0); + desc.set_r_modified(REG_N); + desc.set_reads_memory(); return true; case 0x0f: // MAC_L(Rm, Rn); case 0x1f: // MAC_L(Rm, Rn); case 0x2f: // MAC_L(Rm, Rn); case 0x3f: // MAC_L(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACL | REGFLAG_MACH; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_mac_modified(); desc.cycles = 3; return true; case 0x12: // STCGBR(Rn); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_GBR; + desc.set_r_modified(REG_N); + desc.set_gbr_used(); return true; case 0x18: // SETT(); - desc.regout[1] |= REGFLAG_SR; + desc.set_sr_modified(); return true; case 0x19: // DIV0U(); - desc.regout[1] |= REGFLAG_SR; + desc.set_sr_modified(); return true; case 0x1a: // STSMACL(Rn); - desc.regin[1] |= REGFLAG_MACL; - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_macl_used(); + desc.set_r_modified(REG_N); return true; case 0x1b: // SLEEP(); @@ -498,37 +534,40 @@ bool sh_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, u return true; case 0x22: // STCVBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_VBR; + desc.set_r_used(REG_N); + desc.set_vbr_modified(); return true; case 0x23: // BRAF(Rn); - desc.regin[0] |= REGFLAG_R(REG_M); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_r_used(REG_M); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; desc.cycles = 2; return true; case 0x28: // CLRMAC(); - desc.regout[1] |= REGFLAG_MACL | REGFLAG_MACH; + desc.set_mac_modified(); return true; case 0x29: // MOVT(Rn); - desc.regin[1] |= REGFLAG_SR; - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_sr_used(); + desc.set_r_modified(REG_N); return true; case 0x2a: // STSPR(Rn); - desc.regin[1] |= REGFLAG_PR; - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_pr_used(); + desc.set_r_modified(REG_N); return true; case 0x2b: // RTE(); - desc.regin[0] |= REGFLAG_R(15); - desc.regout[0] |= REGFLAG_R(15); + desc.set_r_used(15); + desc.set_r_modified(15); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_EXPOSE_EXTERNAL_INT; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_can_expose_external_int(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; desc.cycles = 4; @@ -540,7 +579,7 @@ bool sh_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, u } -bool sh_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) +bool sh_common_execution::frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { switch (opcode & 0x3F) { @@ -548,38 +587,40 @@ bool sh_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, u case 0x01: // SHLR(Rn); case 0x04: // ROTL(Rn); case 0x05: // ROTR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; case 0x02: // STSMMACH(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_MACH; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_N); + desc.set_mach_used(); + desc.set_r_modified(REG_N); + desc.set_writes_memory(); return true; case 0x03: // STCMSR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); desc.cycles = 2; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; case 0x06: // LDSMMACH(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACH; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_mach_modified(); + desc.set_reads_memory(); return true; case 0x07: // LDCMSR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); desc.cycles = 3; - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_EXPOSE_EXTERNAL_INT | OPFLAG_END_SEQUENCE; + desc.set_end_sequence(); + desc.set_reads_memory(); + desc.set_can_expose_external_int(); return true; case 0x08: // SHLL2(Rn); @@ -588,158 +629,166 @@ bool sh_frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, u case 0x19: // SHLR8(Rn); case 0x28: // SHLL16(Rn); case 0x29: // SHLR16(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); return true; case 0x0a: // LDSMACH(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACH; + desc.set_r_used(REG_N); + desc.set_mach_modified(); return true; case 0x0b: // JSR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_PR; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_r_used(REG_N); + desc.set_pr_modified(); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; return true; case 0x0e: // LDCSR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; - desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT | OPFLAG_END_SEQUENCE; + desc.set_r_used(REG_N); + desc.set_sr_modified(); + desc.set_end_sequence(); + desc.set_can_expose_external_int(); return true; case 0x0f: // MAC_W(Rm, Rn); case 0x1f: // MAC_W(Rm, Rn); case 0x2f: // MAC_W(Rm, Rn); case 0x3f: // MAC_W(Rm, Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_MACL | REGFLAG_MACH; - desc.regout[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACL | REGFLAG_MACH; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_mac_used(); + desc.set_r_modified(REG_M); + desc.set_r_modified(REG_N); + desc.set_mac_modified(); desc.cycles = 3; return true; case 0x10: // DT(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_SR; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_sr_used(); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; case 0x11: // CMPPZ(Rn); case 0x15: // CMPPL(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_SR; - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_sr_used(); + desc.set_sr_modified(); return true; case 0x12: // STSMMACL(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_MACL; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_N); + desc.set_macl_used(); + desc.set_r_modified(REG_N); + desc.set_writes_memory(); return true; case 0x13: // STCMGBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_GBR; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_N); + desc.set_gbr_used(); + desc.set_r_modified(REG_N); + desc.set_writes_memory(); return true; case 0x16: // LDSMMACL(Rn); - desc.regin[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_M) | REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACL; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_M); + desc.set_r_used(REG_N); + desc.set_r_modified(REG_M); + desc.set_r_modified(REG_N); + desc.set_macl_modified(); + desc.set_reads_memory(); return true; case 0x17: // LDCMGBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_GBR; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_gbr_modified(); + desc.set_reads_memory(); return true; case 0x1a: // LDSMACL(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_MACL; + desc.set_r_used(REG_N); + desc.set_macl_modified(); return true; case 0x1b: // TAS(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_SR; - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_sr_used(); + desc.set_sr_modified(); desc.cycles = 4; - desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY; + desc.set_reads_memory(); + desc.set_writes_memory(); return true; case 0x1e: // LDCGBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_GBR; + desc.set_r_used(REG_N); + desc.set_gbr_modified(); return true; case 0x20: // SHAL(Rn); case 0x21: // SHAR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; case 0x22: // STSMPR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_PR; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_N); + desc.set_pr_used(); + desc.set_r_modified(REG_N); + desc.set_writes_memory(); return true; case 0x23: // STCMVBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_VBR; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_r_used(REG_N); + desc.set_vbr_used(); + desc.set_r_modified(REG_N); + desc.set_writes_memory(); return true; case 0x24: // ROTCL(Rn); case 0x25: // ROTCR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regin[1] |= REGFLAG_SR; - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_SR; + desc.set_r_used(REG_N); + desc.set_sr_used(); + desc.set_r_modified(REG_N); + desc.set_sr_modified(); return true; case 0x26: // LDSMPR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_PR; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_pr_modified(); + desc.set_reads_memory(); return true; case 0x27: // LDCMVBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_VBR; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_r_used(REG_N); + desc.set_r_modified(REG_N); + desc.set_vbr_modified(); + desc.set_reads_memory(); return true; case 0x2a: // LDSPR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_PR; + desc.set_r_used(REG_N); + desc.set_pr_modified(); return true; case 0x2b: // JMP(Rm); - desc.regin[0] |= REGFLAG_R(REG_M); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_r_used(REG_M); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.delayslots = 1; return true; case 0x2e: // LDCVBR(Rn); - desc.regin[0] |= REGFLAG_R(REG_N); - desc.regout[1] |= REGFLAG_VBR; + desc.set_r_used(REG_N); + desc.set_vbr_modified(); return true; case 0x0c: // NOP(); diff --git a/src/devices/cpu/sh/sh_fe.h b/src/devices/cpu/sh/sh_fe.h new file mode 100644 index 00000000000..26439f8af8d --- /dev/null +++ b/src/devices/cpu/sh/sh_fe.h @@ -0,0 +1,120 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood, R. Belmont +/*************************************************************************** + + shfe.h + + Front end for SuperH recompiler + +***************************************************************************/ +#ifndef MAME_CPU_SH_SH_FE_H +#define MAME_CPU_SH_SH_FE_H + +#pragma once + +#include "sh.h" + +#include "cpu/drcfe.h" + + +class sh_common_execution::opcode_desc : public opcode_desc_base +{ +public: + enum + { + REG_R0 = 0, + + REG_PR = REG_R0 + 16, + REG_SR, + REG_MACL, + REG_MACH, + REG_GBR, + REG_VBR, + + REG_COUNT + }; + + offs_t physpc; // physical PC of this opcode + + uint16_t opptr; // copy of opcode + + uint32_t cycles; // number of cycles needed to execute + + void set_r_used(unsigned n) { regin.set(REG_R0 + n); } + void set_pr_used() { regin.set(REG_PR); } + void set_sr_used() { regin.set(REG_SR); } + void set_macl_used() { regin.set(REG_MACL); } + void set_mach_used() { regin.set(REG_MACH); } + void set_mac_used() { set_macl_used(); set_mach_used(); } + void set_gbr_used() { regin.set(REG_GBR); } + void set_vbr_used() { regin.set(REG_VBR); } + + void set_r_modified(unsigned n) { regout.set(REG_R0 + n); } + void set_pr_modified() { regout.set(REG_PR); } + void set_sr_modified() { regout.set(REG_SR); } + void set_macl_modified() { regout.set(REG_MACL); } + void set_mach_modified() { regout.set(REG_MACH); } + void set_mac_modified() { set_macl_modified(); set_mach_modified(); } + void set_gbr_modified() { regout.set(REG_GBR); } + void set_vbr_modified() { regout.set(REG_VBR); } + + void set_reads_memory() { m_reads_memory = true; } + void set_writes_memory() { m_writes_memory = true; } + void set_can_expose_external_int() { m_can_expose_external_int = true; } + + bool reads_memory() const { return m_reads_memory; } + bool writes_memory() const { return m_writes_memory; } + bool can_expose_external_int() const { return m_can_expose_external_int; } + + // compute the exception PC + uint32_t epc() const { return in_delay_slot() ? (pc - 1) : pc; } + + void reset(offs_t curpc, bool in_delay_slot) + { + static_assert(REG_COUNT <= 32); + + opcode_desc_base::reset(curpc, in_delay_slot); + + physpc = curpc; + opptr = 0; + cycles = 0; + m_reads_memory = false; + m_writes_memory = false; + m_can_expose_external_int = false; + } + +private: + bool m_reads_memory; + bool m_writes_memory; + bool m_can_expose_external_int; +}; + + +class sh_common_execution::frontend : public drc_frontend_base +{ +public: + frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + virtual ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); + +protected: + virtual uint16_t read_word(opcode_desc &desc); + + virtual bool describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + virtual bool describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + virtual bool describe_group_15(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) = 0; + + sh_common_execution *m_sh; + +private: + bool describe(opcode_desc &desc, const opcode_desc *prev); + + bool describe_group_2(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + bool describe_group_3(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + bool describe_group_6(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + bool describe_group_8(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); + bool describe_group_12(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode); +}; + +#endif // MAME_CPU_SH_SH_FE_H diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index 4104f82aab2..a7466fd012f 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -619,7 +619,7 @@ void adsp21062_device::device_start() m_drcuml->symbol_add(&m_core->lstkp, sizeof(m_core->lstkp), "lstkp"); m_drcuml->symbol_add(&m_core->px, sizeof(m_core->px), "px"); - m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, COMPILE_MAX_SEQUENCE); + m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, COMPILE_MAX_SEQUENCE); for (int i = 0; i < 16; i++) m_regmap[i] = uml::mem(&m_core->r[i]); diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index b11b47f8688..0094437238f 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -5,16 +5,11 @@ #pragma once -#include "cpu/drcfe.h" #include "cpu/drcuml.h" -class sharc_frontend; - class adsp21062_device : public cpu_device { - friend class sharc_frontend; - public: enum sharc_boot_mode { @@ -48,30 +43,6 @@ public: uint32_t iop_r(offs_t offset); void iop_w(offs_t offset, uint32_t data); - enum ASTAT_FLAGS : uint32_t - { - // ASTAT flags - AZ = 0x000001, // ALU result zero - AV = 0x000002, // ALU overflow - AN = 0x000004, // ALU result negative - AC = 0x000008, // ALU fixed-point carry - AS = 0x000010, // ALU X input sign - AI = 0x000020, // ALU floating-point invalid operation - MN = 0x000040, // Multiplier result negative - MV = 0x000080, // Multiplier overflow - MU = 0x000100, // Multiplier underflow - MI = 0x000200, // Multiplier floating-point invalid operation - AF = 0x000400, - SV = 0x000800, // Shifter overflow - SZ = 0x001000, // Shifter result zero - SS = 0x002000, // Shifter input sign - BTF = 0x040000, // Bit Test Flag - FLG0 = 0x080000, // FLAG0 - FLG1 = 0x100000, // FLAG1 - FLG2 = 0x200000, // FLAG2 - FLG3 = 0x400000 // FLAG3 - }; - enum ASTAT_SHIFT { AZ_SHIFT = 0, @@ -148,6 +119,27 @@ protected: void data_4m(address_map &map) ATTR_COLD; private: + // ASTAT flags + static constexpr uint32_t AZ = 0x0000'0001; // ALU result zero + static constexpr uint32_t AV = 0x0000'0002; // ALU overflow + static constexpr uint32_t AN = 0x0000'0004; // ALU result negative + static constexpr uint32_t AC = 0x0000'0008; // ALU fixed-point carry + static constexpr uint32_t AS = 0x0000'0010; // ALU X input sign + static constexpr uint32_t AI = 0x0000'0020; // ALU floating-point invalid operation + static constexpr uint32_t MN = 0x0000'0040; // Multiplier result negative + static constexpr uint32_t MV = 0x0000'0080; // Multiplier overflow + static constexpr uint32_t MU = 0x0000'0100; // Multiplier underflow + static constexpr uint32_t MI = 0x0000'0200; // Multiplier floating-point invalid operation + static constexpr uint32_t AF = 0x0000'0400; + static constexpr uint32_t SV = 0x0000'0800; // Shifter overflow + static constexpr uint32_t SZ = 0x0000'1000; // Shifter result zero + static constexpr uint32_t SS = 0x0000'2000; // Shifter input sign + static constexpr uint32_t BTF = 0x0004'0000; // Bit Test Flag + static constexpr uint32_t FLG0 = 0x0008'0000; // FLAG0 + static constexpr uint32_t FLG1 = 0x0010'0000; // FLAG1 + static constexpr uint32_t FLG2 = 0x0020'0000; // FLAG2 + static constexpr uint32_t FLG3 = 0x0040'0000; // FLAG3 + // STKY flags static constexpr uint32_t AUS = 0x0000'0001; // ALU floating-point underflow static constexpr uint32_t AVS = 0x0000'0002; // ALU floating-point overflow @@ -242,6 +234,9 @@ private: struct alignas(16) sharc_internal_state; + class frontend; + class opcode_desc; + static const SHARC_OP s_sharc_opcode_table[]; static const size_t s_num_ops; @@ -259,7 +254,7 @@ private: // UML stuff drc_cache m_cache; std::unique_ptr m_drcuml; - std::unique_ptr m_drcfe; + std::unique_ptr m_drcfe; uml::parameter m_regmap[16]; uml::code_handle *m_entry; diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index 5ec296217ed..f3ecdfe3b1a 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -13,11 +13,11 @@ #include "sharcfe.h" #include "sharcinternal.ipp" -#include "cpu/drcfe.h" #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" +#define USE_ASTAT_ELISION 1 #define USE_FAST_APPROX 0 #define USE_SWAPDQ 0 @@ -77,21 +77,21 @@ #define MRF mem(&m_core->mrf) #define MRB mem(&m_core->mrb) -#define AZ_CALC_REQUIRED ((desc->regreq[0] & 0x00010000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AV_CALC_REQUIRED ((desc->regreq[0] & 0x00020000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AN_CALC_REQUIRED ((desc->regreq[0] & 0x00040000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AC_CALC_REQUIRED ((desc->regreq[0] & 0x00080000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AS_CALC_REQUIRED ((desc->regreq[0] & 0x00100000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AI_CALC_REQUIRED ((desc->regreq[0] & 0x00200000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MN_CALC_REQUIRED ((desc->regreq[0] & 0x00400000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MV_CALC_REQUIRED ((desc->regreq[0] & 0x00800000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MU_CALC_REQUIRED ((desc->regreq[0] & 0x01000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define MI_CALC_REQUIRED ((desc->regreq[0] & 0x02000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define SV_CALC_REQUIRED ((desc->regreq[0] & 0x04000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define SZ_CALC_REQUIRED ((desc->regreq[0] & 0x08000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define SS_CALC_REQUIRED ((desc->regreq[0] & 0x10000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define BTF_CALC_REQUIRED ((desc->regreq[0] & 0x20000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) -#define AF_CALC_REQUIRED ((desc->regreq[0] & 0x40000000) || desc->flags & OPFLAG_IN_DELAY_SLOT) +#define AZ_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->az_calc_required()) +#define AV_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->av_calc_required()) +#define AN_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->an_calc_required()) +#define AC_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->ac_calc_required()) +#define AS_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->as_calc_required()) +#define AI_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->ai_calc_required()) +#define MN_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->mn_calc_required()) +#define MV_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->mv_calc_required()) +#define MU_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->mu_calc_required()) +#define MI_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->mi_calc_required()) +#define SV_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->sv_calc_required()) +#define SZ_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->sz_calc_required()) +#define SS_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->ss_calc_required()) +#define BTF_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->btf_calc_required()) +#define AF_CALC_REQUIRED (!USE_ASTAT_ELISION || desc->af_calc_required()) namespace { @@ -1160,7 +1160,7 @@ void adsp21062_device::compile_block(offs_t pc) { // determine the last instruction in this sequence seqlast = seqhead; - while (seqlast && !(seqlast->flags & OPFLAG_END_SEQUENCE)) + while (seqlast && !seqlast->end_sequence()) seqlast = seqlast->next(); assert(seqlast != nullptr); @@ -1185,7 +1185,7 @@ void adsp21062_device::compile_block(offs_t pc) } // label this instruction, if it may be jumped to locally - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) UML_LABEL(block, seqhead->pc | 0x80000000); // iterate over instructions in the sequence and compile them @@ -1200,7 +1200,7 @@ void adsp21062_device::compile_block(offs_t pc) } uint32_t nextpc; - if (seqlast->flags & OPFLAG_RETURN_TO_START) + if (seqlast->return_to_start()) nextpc = pc; // if we need to return to the start, do it else nextpc = seqlast->pc + (seqlast->skipslots + 1); // otherwise we just go to the next instruction @@ -1352,14 +1352,14 @@ void adsp21062_device::static_generate_reset_cache() void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool last_delayslot) { /* add an entry for the log */ -// if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) -// log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]); +// if (m_drcuml->logging() && !desc->virtual_noop()) +// log_add_disasm_comment(block, desc->pc, desc->opptr); /* set the PC map variable */ UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc /* accumulate total cycles */ - compiler.cycles += desc->cycles; + compiler.cycles += 1; /* update the icount map variable */ UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles @@ -1372,33 +1372,25 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil UML_DEBUG(block, desc->pc); // debug desc->pc } - /* if we hit an unmapped address, fatal error */ - if (desc->flags & OPFLAG_COMPILER_UNMAPPED) - { - UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - save_fast_iregs(block); // - UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE - } - // handle a special case where call is used as the last operation in a loop - if ((desc->userflags & OP_USERFLAG_CALL) && (desc->userflags & OP_USERFLAG_LOOP)) + if (desc->call() && desc->loop()) { UML_MOV(block, I0, desc->pc); UML_CALLH(block, *m_call_loop_check); } /* if this is an invalid opcode, generate the exception now */ -// if (desc->flags & OPFLAG_INVALID_OPCODE) +// if (desc->invalid_opcode()) // UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000 /* unless this is a virtual no-op, it's a regular instruction */ - if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!desc->virtual_noop()) { /* compile the instruction */ if (!generate_opcode(block, compiler, desc)) { UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); // dmov [arg64],*desc->opptr.q + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); // dmov [arg64],*desc->opptr UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc } } @@ -1438,34 +1430,31 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil // insert loop check at this instruction if needed - if (desc->userflags & OP_USERFLAG_LOOP) + if (desc->loop()) { UML_DMOV(block, I0, (uint64_t(compiler.cycles) << 32) | desc->pc); UML_CALLH(block, *m_loop_check); } // copy ASTAT bits over for conditional loop - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY) - { - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AZ) - UML_MOV(block, mem(&m_core->astat_delay_copy.az), mem(&m_core->astat_drc.az)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AN) - UML_MOV(block, mem(&m_core->astat_delay_copy.an), mem(&m_core->astat_drc.an)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AV) - UML_MOV(block, mem(&m_core->astat_delay_copy.av), mem(&m_core->astat_drc.av)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AC) - UML_MOV(block, mem(&m_core->astat_delay_copy.ac), mem(&m_core->astat_drc.ac)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_MN) - UML_MOV(block, mem(&m_core->astat_delay_copy.mn), mem(&m_core->astat_drc.mn)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_MV) - UML_MOV(block, mem(&m_core->astat_delay_copy.mv), mem(&m_core->astat_drc.mv)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_SV) - UML_MOV(block, mem(&m_core->astat_delay_copy.sv), mem(&m_core->astat_drc.sv)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_SZ) - UML_MOV(block, mem(&m_core->astat_delay_copy.sz), mem(&m_core->astat_drc.sz)); - if (desc->userflags & OP_USERFLAG_ASTAT_DELAY_COPY_BTF) - UML_MOV(block, mem(&m_core->astat_delay_copy.btf), mem(&m_core->astat_drc.btf)); - } + if (desc->astat_delay_copy_az()) + UML_MOV(block, mem(&m_core->astat_delay_copy.az), mem(&m_core->astat_drc.az)); + if (desc->astat_delay_copy_an()) + UML_MOV(block, mem(&m_core->astat_delay_copy.an), mem(&m_core->astat_drc.an)); + if (desc->astat_delay_copy_av()) + UML_MOV(block, mem(&m_core->astat_delay_copy.av), mem(&m_core->astat_drc.av)); + if (desc->astat_delay_copy_ac()) + UML_MOV(block, mem(&m_core->astat_delay_copy.ac), mem(&m_core->astat_drc.ac)); + if (desc->astat_delay_copy_mn()) + UML_MOV(block, mem(&m_core->astat_delay_copy.mn), mem(&m_core->astat_drc.mn)); + if (desc->astat_delay_copy_mv()) + UML_MOV(block, mem(&m_core->astat_delay_copy.mv), mem(&m_core->astat_drc.mv)); + if (desc->astat_delay_copy_sv()) + UML_MOV(block, mem(&m_core->astat_delay_copy.sv), mem(&m_core->astat_drc.sv)); + if (desc->astat_delay_copy_sz()) + UML_MOV(block, mem(&m_core->astat_delay_copy.sz), mem(&m_core->astat_drc.sz)); + if (desc->astat_delay_copy_btf()) + UML_MOV(block, mem(&m_core->astat_delay_copy.btf), mem(&m_core->astat_drc.btf)); } void adsp21062_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) @@ -1714,7 +1703,7 @@ void adsp21062_device::generate_call(drcuml_block &block, compiler_state &compil } // if this is the last instruction of a loop, we need to use the return PC from the resolved loop - if (desc->userflags & OP_USERFLAG_CALL && desc->userflags & OP_USERFLAG_LOOP) + if (desc->call() && desc->loop()) { UML_MOV(block, I0, mem(&m_core->temp_return)); } @@ -1732,7 +1721,7 @@ void adsp21062_device::generate_call(drcuml_block &block, compiler_state &compil if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { generate_update_cycles(block, compiler_temp, desc->targetpc, true); - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->targetpc | 0x80000000); else UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); @@ -1799,7 +1788,7 @@ void adsp21062_device::generate_jump(drcuml_block &block, compiler_state &compil if (desc->targetpc != BRANCH_TARGET_DYNAMIC) { generate_update_cycles(block, compiler_temp, desc->targetpc, true); - if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) + if (desc->intrablock_branch()) UML_JMP(block, desc->targetpc | 0x80000000); // jmp targetpc | 0x80000000 else UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp 0,targetpc,nocode @@ -2175,42 +2164,42 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & UML_XOR(block, I1, mem(&m_core->astat), data); UML_MOV(block, mem(&m_core->astat), data & (FLG0 | FLG1 | FLG2 | FLG3)); UML_MOV(block, mem(&m_core->astat_drc.cacc), BIT(data, 24, 8)); - UML_MOV(block, ASTAT_AF, BIT(data, AF_SHIFT)); - UML_MOV(block, ASTAT_BTF, BIT(data, BTF_SHIFT)); - UML_MOV(block, ASTAT_SS, BIT(data, SS_SHIFT)); - UML_MOV(block, ASTAT_SZ, BIT(data, SZ_SHIFT)); - UML_MOV(block, ASTAT_SV, BIT(data, SV_SHIFT)); - UML_MOV(block, ASTAT_MI, BIT(data, MI_SHIFT)); - UML_MOV(block, ASTAT_MU, BIT(data, MU_SHIFT)); - UML_MOV(block, ASTAT_MV, BIT(data, MV_SHIFT)); - UML_MOV(block, ASTAT_MN, BIT(data, MN_SHIFT)); - UML_MOV(block, ASTAT_AI, BIT(data, AI_SHIFT)); - UML_MOV(block, ASTAT_AS, BIT(data, AS_SHIFT)); - UML_MOV(block, ASTAT_AC, BIT(data, AC_SHIFT)); - UML_MOV(block, ASTAT_AN, BIT(data, AN_SHIFT)); - UML_MOV(block, ASTAT_AV, BIT(data, AV_SHIFT)); - UML_MOV(block, ASTAT_AZ, BIT(data, AZ_SHIFT)); + if (AF_CALC_REQUIRED) UML_MOV(block, ASTAT_AF, BIT(data, AF_SHIFT)); + if (BTF_CALC_REQUIRED) UML_MOV(block, ASTAT_BTF, BIT(data, BTF_SHIFT)); + if (SS_CALC_REQUIRED) UML_MOV(block, ASTAT_SS, BIT(data, SS_SHIFT)); + if (SZ_CALC_REQUIRED) UML_MOV(block, ASTAT_SZ, BIT(data, SZ_SHIFT)); + if (SV_CALC_REQUIRED) UML_MOV(block, ASTAT_SV, BIT(data, SV_SHIFT)); + if (MI_CALC_REQUIRED) UML_MOV(block, ASTAT_MI, BIT(data, MI_SHIFT)); + if (MU_CALC_REQUIRED) UML_MOV(block, ASTAT_MU, BIT(data, MU_SHIFT)); + if (MV_CALC_REQUIRED) UML_MOV(block, ASTAT_MV, BIT(data, MV_SHIFT)); + if (MN_CALC_REQUIRED) UML_MOV(block, ASTAT_MN, BIT(data, MN_SHIFT)); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, BIT(data, AI_SHIFT)); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, BIT(data, AS_SHIFT)); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, BIT(data, AC_SHIFT)); + if (AN_CALC_REQUIRED) UML_MOV(block, ASTAT_AN, BIT(data, AN_SHIFT)); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, BIT(data, AV_SHIFT)); + if (AZ_CALC_REQUIRED) UML_MOV(block, ASTAT_AZ, BIT(data, AZ_SHIFT)); } else { UML_XOR(block, I1, I0, mem(&m_core->astat)); UML_AND(block, mem(&m_core->astat), I0, FLG0 | FLG1 | FLG2 | FLG3); UML_BFXU(block, mem(&m_core->astat_drc.cacc), I0, 24, 8); - UML_BFXU(block, ASTAT_AF, I0, AF_SHIFT, 1); - UML_BFXU(block, ASTAT_BTF, I0, BTF_SHIFT, 1); - UML_BFXU(block, ASTAT_SS, I0, SS_SHIFT, 1); - UML_BFXU(block, ASTAT_SZ, I0, SZ_SHIFT, 1); - UML_BFXU(block, ASTAT_SV, I0, SV_SHIFT, 1); - UML_BFXU(block, ASTAT_MI, I0, MI_SHIFT, 1); - UML_BFXU(block, ASTAT_MU, I0, MU_SHIFT, 1); - UML_BFXU(block, ASTAT_MV, I0, MV_SHIFT, 1); - UML_BFXU(block, ASTAT_MN, I0, MN_SHIFT, 1); - UML_BFXU(block, ASTAT_AI, I0, AI_SHIFT, 1); - UML_BFXU(block, ASTAT_AS, I0, AS_SHIFT, 1); - UML_BFXU(block, ASTAT_AC, I0, AC_SHIFT, 1); - UML_BFXU(block, ASTAT_AN, I0, AN_SHIFT, 1); - UML_BFXU(block, ASTAT_AV, I0, AV_SHIFT, 1); - UML_BFXU(block, ASTAT_AZ, I0, AZ_SHIFT, 1); + if (AF_CALC_REQUIRED) UML_BFXU(block, ASTAT_AF, I0, AF_SHIFT, 1); + if (BTF_CALC_REQUIRED) UML_BFXU(block, ASTAT_BTF, I0, BTF_SHIFT, 1); + if (SS_CALC_REQUIRED) UML_BFXU(block, ASTAT_SS, I0, SS_SHIFT, 1); + if (SZ_CALC_REQUIRED) UML_BFXU(block, ASTAT_SZ, I0, SZ_SHIFT, 1); + if (SV_CALC_REQUIRED) UML_BFXU(block, ASTAT_SV, I0, SV_SHIFT, 1); + if (MI_CALC_REQUIRED) UML_BFXU(block, ASTAT_MI, I0, MI_SHIFT, 1); + if (MU_CALC_REQUIRED) UML_BFXU(block, ASTAT_MU, I0, MU_SHIFT, 1); + if (MV_CALC_REQUIRED) UML_BFXU(block, ASTAT_MV, I0, MV_SHIFT, 1); + if (MN_CALC_REQUIRED) UML_BFXU(block, ASTAT_MN, I0, MN_SHIFT, 1); + if (AI_CALC_REQUIRED) UML_BFXU(block, ASTAT_AI, I0, AI_SHIFT, 1); + if (AS_CALC_REQUIRED) UML_BFXU(block, ASTAT_AS, I0, AS_SHIFT, 1); + if (AC_CALC_REQUIRED) UML_BFXU(block, ASTAT_AC, I0, AC_SHIFT, 1); + if (AN_CALC_REQUIRED) UML_BFXU(block, ASTAT_AN, I0, AN_SHIFT, 1); + if (AV_CALC_REQUIRED) UML_BFXU(block, ASTAT_AV, I0, AV_SHIFT, 1); + if (AZ_CALC_REQUIRED) UML_BFXU(block, ASTAT_AZ, I0, AZ_SHIFT, 1); } UML_SHL(block, I0, MODE2, FLG0_SHIFT - 15); UML_AND(block, I0, I0, I1); @@ -2284,7 +2273,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t opcode = desc->opptr.q[0]; + uint64_t const opcode = desc->opptr; switch ((opcode >> 45) & 7) { @@ -2862,72 +2851,72 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp break; case 0xc: // ASTAT // TODO: does this need delay? - if (data & ASTAT_FLAGS::AZ) + if (AZ_CALC_REQUIRED && (data & AZ)) UML_MOV(block, ASTAT_AZ, 1); - if (data & ASTAT_FLAGS::AV) + if (AV_CALC_REQUIRED && (data & AV)) UML_MOV(block, ASTAT_AV, 1); - if (data & ASTAT_FLAGS::AN) + if (AN_CALC_REQUIRED && (data & AN)) UML_MOV(block, ASTAT_AN, 1); - if (data & ASTAT_FLAGS::AC) + if (AC_CALC_REQUIRED && (data & AC)) UML_MOV(block, ASTAT_AC, 1); - if (data & ASTAT_FLAGS::AS) + if (AS_CALC_REQUIRED && (data & AS)) UML_MOV(block, ASTAT_AS, 1); - if (data & ASTAT_FLAGS::AI) + if (AI_CALC_REQUIRED && (data & AI)) UML_MOV(block, ASTAT_AI, 1); - if (data & ASTAT_FLAGS::MN) + if (MN_CALC_REQUIRED && (data & MN)) UML_MOV(block, ASTAT_MN, 1); - if (data & ASTAT_FLAGS::MV) + if (MV_CALC_REQUIRED && (data & MV)) UML_MOV(block, ASTAT_MV, 1); - if (data & ASTAT_FLAGS::MU) + if (MU_CALC_REQUIRED && (data & MU)) UML_MOV(block, ASTAT_MU, 1); - if (data & ASTAT_FLAGS::MI) + if (MI_CALC_REQUIRED && (data & MI)) UML_MOV(block, ASTAT_MI, 1); - if (data & ASTAT_FLAGS::AF) + if (AF_CALC_REQUIRED && (data & AF)) UML_MOV(block, ASTAT_AF, 1); - if (data & ASTAT_FLAGS::SV) + if (SV_CALC_REQUIRED && (data & SV)) UML_MOV(block, ASTAT_SV, 1); - if (data & ASTAT_FLAGS::SZ) + if (SZ_CALC_REQUIRED && (data & SZ)) UML_MOV(block, ASTAT_SZ, 1); - if (data & ASTAT_FLAGS::SS) + if (SS_CALC_REQUIRED && (data & SS)) UML_MOV(block, ASTAT_SS, 1); - if (data & ASTAT_FLAGS::BTF) + if (BTF_CALC_REQUIRED && (data & BTF)) UML_MOV(block, ASTAT_BTF, 1); - if (data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)) + if (data & (FLG0 | FLG1 | FLG2 | FLG3)) { UML_MOV(block, I0, mem(&m_core->astat)); - UML_ROLAND(block, I1, MODE2, FLG0_SHIFT - 15, data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); - UML_OR(block, mem(&m_core->astat), I0, data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); + UML_ROLAND(block, I1, MODE2, FLG0_SHIFT - 15, data & (FLG0 | FLG1 | FLG2 | FLG3)); + UML_OR(block, mem(&m_core->astat), I0, data & (FLG0 | FLG1 | FLG2 | FLG3)); UML_XOR(block, I0, I0, 0xffffffff); UML_AND(block, I0, I0, I1); } - if (data & ASTAT_FLAGS::FLG0) + if (data & FLG0) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG0); + UML_TEST(block, I0, FLG0); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<0>, this); UML_LABEL(block, skip); } - if (data & ASTAT_FLAGS::FLG1) + if (data & FLG1) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG1); + UML_TEST(block, I0, FLG1); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<1>, this); UML_LABEL(block, skip); } - if (data & ASTAT_FLAGS::FLG2) + if (data & FLG2) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG2); + UML_TEST(block, I0, FLG2); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<2>, this); UML_LABEL(block, skip); } - if (data & ASTAT_FLAGS::FLG3) + if (data & FLG3) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG3); + UML_TEST(block, I0, FLG3); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<3>, this); UML_LABEL(block, skip); @@ -2975,71 +2964,71 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp break; case 0xc: // ASTAT // TODO: does this need delay? - if (data & ASTAT_FLAGS::AZ) + if (AZ_CALC_REQUIRED && (data & AZ)) UML_MOV(block, ASTAT_AZ, 0); - if (data & ASTAT_FLAGS::AV) + if (AV_CALC_REQUIRED && (data & AV)) UML_MOV(block, ASTAT_AV, 0); - if (data & ASTAT_FLAGS::AN) + if (AN_CALC_REQUIRED && (data & AN)) UML_MOV(block, ASTAT_AN, 0); - if (data & ASTAT_FLAGS::AC) + if (AC_CALC_REQUIRED && (data & AC)) UML_MOV(block, ASTAT_AC, 0); - if (data & ASTAT_FLAGS::AS) + if (AS_CALC_REQUIRED && (data & AS)) UML_MOV(block, ASTAT_AS, 0); - if (data & ASTAT_FLAGS::AI) + if (AI_CALC_REQUIRED && (data & AI)) UML_MOV(block, ASTAT_AI, 0); - if (data & ASTAT_FLAGS::MN) + if (MN_CALC_REQUIRED && (data & MN)) UML_MOV(block, ASTAT_MN, 0); - if (data & ASTAT_FLAGS::MV) + if (MV_CALC_REQUIRED && (data & MV)) UML_MOV(block, ASTAT_MV, 0); - if (data & ASTAT_FLAGS::MU) + if (MU_CALC_REQUIRED && (data & MU)) UML_MOV(block, ASTAT_MU, 0); - if (data & ASTAT_FLAGS::MI) + if (MI_CALC_REQUIRED && (data & MI)) UML_MOV(block, ASTAT_MI, 0); - if (data & ASTAT_FLAGS::AF) + if (AF_CALC_REQUIRED && (data & AF)) UML_MOV(block, ASTAT_AF, 0); - if (data & ASTAT_FLAGS::SV) + if (SV_CALC_REQUIRED && (data & SV)) UML_MOV(block, ASTAT_SV, 0); - if (data & ASTAT_FLAGS::SZ) + if (SZ_CALC_REQUIRED && (data & SZ)) UML_MOV(block, ASTAT_SZ, 0); - if (data & ASTAT_FLAGS::SS) + if (SS_CALC_REQUIRED && (data & SS)) UML_MOV(block, ASTAT_SS, 0); - if (data & ASTAT_FLAGS::BTF) + if (BTF_CALC_REQUIRED && (data & BTF)) UML_MOV(block, ASTAT_BTF, 0); - if (data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)) + if (data & (FLG0 | FLG1 | FLG2 | FLG3)) { UML_MOV(block, I0, mem(&m_core->astat)); - UML_ROLAND(block, I1, MODE2, FLG0_SHIFT - 15, data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); - UML_AND(block, mem(&m_core->astat), I0, ~data & (ASTAT_FLAGS::FLG0 | ASTAT_FLAGS::FLG1 | ASTAT_FLAGS::FLG2 | ASTAT_FLAGS::FLG3)); + UML_ROLAND(block, I1, MODE2, FLG0_SHIFT - 15, data & (FLG0 | FLG1 | FLG2 | FLG3)); + UML_AND(block, mem(&m_core->astat), I0, ~data & (FLG0 | FLG1 | FLG2 | FLG3)); UML_AND(block, I0, I0, I1); } - if (data & ASTAT_FLAGS::FLG0) + if (data & FLG0) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG0); + UML_TEST(block, I0, FLG0); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<0>, this); UML_LABEL(block, skip); } - if (data & ASTAT_FLAGS::FLG1) + if (data & FLG1) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG1); + UML_TEST(block, I0, FLG1); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<1>, this); UML_LABEL(block, skip); } - if (data & ASTAT_FLAGS::FLG2) + if (data & FLG2) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG2); + UML_TEST(block, I0, FLG2); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<2>, this); UML_LABEL(block, skip); } - if (data & ASTAT_FLAGS::FLG3) + if (data & FLG3) { uml::code_label const skip = compiler.labelnum++; - UML_TEST(block, I0, ASTAT_FLAGS::FLG3); + UML_TEST(block, I0, FLG3); UML_JMPc(block, COND_Z, skip); UML_CALLC(block, cfunc_update_flag_out<3>, this); UML_LABEL(block, skip); @@ -3251,13 +3240,13 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp int const compute = op_get_compute(opcode); bool temp_pm_dreg = false; - if (compute != 0 && pmd && desc->regout[0] & (1 << pm_dreg)) + if (compute != 0 && pmd && desc->regout[pm_dreg]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(pm_dreg)); temp_pm_dreg = true; } bool temp_dm_dreg = false; - if (compute != 0 && dmd && desc->regout[0] & (1 << dm_dreg)) + if (compute != 0 && dmd && desc->regout[dm_dreg]) { UML_MOV(block, mem(&m_core->dreg_temp2), REG(dm_dreg)); temp_dm_dreg = true; @@ -3342,7 +3331,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp bool temp_ureg = false; // save UREG if compute writes to it - if (compute != 0 && ureg_is_dreg && desc->regout[0] & (1 << (ureg & 0xf))) + if (compute != 0 && ureg_is_dreg && desc->regout[ureg & 0xf]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(ureg & 0xf)); temp_ureg = true; @@ -3427,7 +3416,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp bool temp_ureg = false; // save UREG if compute writes to it - if (compute != 0 && src_is_dreg && desc->regout[0] & (1 << (src_ureg & 0xf))) + if (compute != 0 && src_is_dreg && desc->regout[src_ureg & 0xf]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(src_ureg & 0xf)); temp_ureg = true; @@ -3479,7 +3468,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp bool temp_dreg = false; // save dreg if compute writes to it - if (compute != 0 && BIT(desc->regout[0], dreg)) + if (compute != 0 && desc->regout[dreg]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(dreg)); temp_dreg = true; @@ -3586,7 +3575,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp bool temp_dreg = false; // save dreg if shiftop writes to it - if (BIT(desc->regout[0], dreg)) + if (desc->regout[dreg]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(dreg)); temp_dreg = true; @@ -3689,7 +3678,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp // DREG -> DM bool temp_dreg = false; // save dreg if compute writes to it - if (BIT(desc->regout[0], dreg)) + if (desc->regout[dreg]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(dreg)); temp_dreg = true; @@ -3747,7 +3736,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp // DREG -> DM bool temp_dreg = false; // save dreg if compute writes to it - if (BIT(desc->regout[0], dreg)) + if (desc->regout[dreg]) { UML_MOV(block, mem(&m_core->dreg_temp), REG(dreg)); temp_dreg = true; @@ -3792,13 +3781,13 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp void adsp21062_device::generate_unimplemented_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { UML_MOV(block, mem(&m_core->pc), desc->pc); - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); UML_CALLC(block, cfunc_unimplemented_compute, this); } void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint64_t const opcode = desc->opptr.q[0]; + uint64_t const opcode = desc->opptr; if (op_get_compute(opcode) == 0) return; @@ -5635,7 +5624,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block &block, compiler_state &c case 0x13: // FDEP Rx BY : (SE) case 0x1b: // Rn = Rn OR FDEP Rx BY : (SE) UML_MOV(block, mem(&m_core->pc), desc->pc); - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); UML_CALLC(block, cfunc_unimplemented_shiftimm, this); break; @@ -5811,7 +5800,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block &block, compiler_state &c default: UML_MOV(block, mem(&m_core->pc), desc->pc); - UML_DMOV(block, mem(&m_core->arg64), desc->opptr.q[0]); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); UML_CALLC(block, cfunc_unimplemented_compute, this); return; } diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp index ff0074b02bf..6fee42cf68d 100644 --- a/src/devices/cpu/sharc/sharcfe.cpp +++ b/src/devices/cpu/sharc/sharcfe.cpp @@ -12,92 +12,47 @@ #include "sharcinternal.ipp" - -#define REG_USED(desc,x) do { (desc).regin[0] |= 1 << (x); } while(0) -#define REG_MODIFIED(desc,x) do { (desc).regout[0] |= 1 << (x); } while(0) - -#define AZ_USED(desc) do { (desc).regin[0] |= 1 << 16; } while(0) -#define AZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 16; } while(0) -#define AV_USED(desc) do { (desc).regin[0] |= 1 << 17; } while(0) -#define AV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 17; } while(0) -#define AN_USED(desc) do { (desc).regin[0] |= 1 << 18; } while(0) -#define AN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 18; } while(0) -#define AC_USED(desc) do { (desc).regin[0] |= 1 << 19; } while(0) -#define AC_MODIFIED(desc) do { (desc).regout[0] |= 1 << 19; } while(0) -#define AS_USED(desc) do { (desc).regin[0] |= 1 << 20; } while(0) -#define AS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 20; } while(0) -#define AI_USED(desc) do { (desc).regin[0] |= 1 << 21; } while(0) -#define AI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 21; } while(0) -#define MN_USED(desc) do { (desc).regin[0] |= 1 << 22; } while(0) -#define MN_MODIFIED(desc) do { (desc).regout[0] |= 1 << 22; } while(0) -#define MV_USED(desc) do { (desc).regin[0] |= 1 << 23; } while(0) -#define MV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 23; } while(0) -#define MU_USED(desc) do { (desc).regin[0] |= 1 << 24; } while(0) -#define MU_MODIFIED(desc) do { (desc).regout[0] |= 1 << 24; } while(0) -#define MI_USED(desc) do { (desc).regin[0] |= 1 << 25; } while(0) -#define MI_MODIFIED(desc) do { (desc).regout[0] |= 1 << 25; } while(0) -#define SV_USED(desc) do { (desc).regin[0] |= 1 << 26; } while(0) -#define SV_MODIFIED(desc) do { (desc).regout[0] |= 1 << 26; } while(0) -#define SZ_USED(desc) do { (desc).regin[0] |= 1 << 27; } while(0) -#define SZ_MODIFIED(desc) do { (desc).regout[0] |= 1 << 27; } while(0) -#define SS_USED(desc) do { (desc).regin[0] |= 1 << 28; } while(0) -#define SS_MODIFIED(desc) do { (desc).regout[0] |= 1 << 28; } while(0) -#define BTF_USED(desc) do { (desc).regin[0] |= 1 << 29; } while(0) -#define BTF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 29; } while(0) -#define AF_USED(desc) do { (desc).regin[0] |= 1 << 30; } while(0) -#define AF_MODIFIED(desc) do { (desc).regout[0] |= 1 << 30; } while(0) - -#define ALU_FLAGS_MODIFIED(desc) do { AZ_MODIFIED(desc);AN_MODIFIED(desc);AV_MODIFIED(desc);AC_MODIFIED(desc);AS_MODIFIED(desc);AI_MODIFIED(desc); } while(0) -#define MULT_FLAGS_MODIFIED(desc) do { MN_MODIFIED(desc);MV_MODIFIED(desc);MU_MODIFIED(desc);MI_MODIFIED(desc); } while(0) -#define SHIFT_FLAGS_MODIFIED(desc) do { SZ_MODIFIED(desc);SV_MODIFIED(desc);SS_MODIFIED(desc); } while(0) +#include "cpu/drcfe.ipp" -#define PM_I_USED(desc,x) do { (desc).regin[1] |= 1 << (x); } while(0) -#define PM_I_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << (x); } while(0) -#define PM_M_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 8); } while(0) -#define PM_M_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 8); } while(0) -#define PM_B_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 16); } while(0) -#define PM_B_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 16); } while(0) -#define PM_L_USED(desc,x) do { (desc).regin[1] |= 1 << ((x) + 24); } while(0) -#define PM_L_MODIFIED(desc,x) do { (desc).regout[1] |= 1 << ((x) + 24); } while(0) - -#define DM_I_USED(desc,x) do { (desc).regin[2] |= 1 << (x); } while(0) -#define DM_I_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << (x); } while(0) -#define DM_M_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 8); } while(0) -#define DM_M_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 8); } while(0) -#define DM_B_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 16); } while(0) -#define DM_B_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 16); } while(0) -#define DM_L_USED(desc,x) do { (desc).regin[2] |= 1 << ((x) + 24); } while(0) -#define DM_L_MODIFIED(desc,x) do { (desc).regout[2] |= 1 << ((x) + 24); } while(0) - - -sharc_frontend::sharc_frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*sharc, window_start, window_end, max_sequence) +adsp21062_device::frontend::frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend_base(sharc->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_sharc(sharc) { m_loopmap = std::make_unique(0x20000); } - - -void sharc_frontend::flush() +adsp21062_device::frontend::~frontend() { - LOOP_ENTRY* map = m_loopmap.get(); +} + + +adsp21062_device::opcode_desc const *adsp21062_device::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + + +void adsp21062_device::frontend::flush() +{ + LOOP_ENTRY *map = m_loopmap.get(); memset(map, 0, sizeof(LOOP_ENTRY) * 0x20000); } -void sharc_frontend::add_loop_entry(uint32_t pc, uint8_t type, uint32_t userflags) +void adsp21062_device::frontend::add_loop_entry(uint32_t pc, uint8_t type, opcode_desc::extra_flags const &userflags) { uint32_t l2 = pc >> 17; uint32_t l1 = pc & 0x1ffff; if (l2 != 0x1) - fatalerror("sharc_frontend::add_loop_entry: PC = %08X", pc); + fatalerror("adsp21062_device::frontend::add_loop_entry: PC = %08X", pc); LOOP_ENTRY* map = m_loopmap.get(); uint32_t current_type = map[l1].entrytype; - uint32_t current_userflags = map[l1].userflags; + opcode_desc::extra_flags current_userflags = map[l1].userflags; current_type |= type; current_userflags |= userflags; @@ -106,28 +61,29 @@ void sharc_frontend::add_loop_entry(uint32_t pc, uint8_t type, uint32_t userflag map[l1].userflags = current_userflags; } -void sharc_frontend::insert_loop(const LOOP_DESCRIPTOR &loopdesc) +void adsp21062_device::frontend::insert_loop(const LOOP_DESCRIPTOR &loopdesc) { add_loop_entry(loopdesc.start_pc, LOOP_ENTRY_START, 0); add_loop_entry(loopdesc.end_pc, LOOP_ENTRY_EVALUATION, 0); if (loopdesc.astat_check_pc != 0xffffffff) { uint32_t flags = m_sharc->do_condition_astat_bits(loopdesc.condition); - uint32_t userflags = 0; - if (flags & adsp21062_device::ASTAT_FLAGS::AZ) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AZ; } - if (flags & adsp21062_device::ASTAT_FLAGS::AN) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AN; } - if (flags & adsp21062_device::ASTAT_FLAGS::AV) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AV; } - if (flags & adsp21062_device::ASTAT_FLAGS::AC) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_AC; } - if (flags & adsp21062_device::ASTAT_FLAGS::MN) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_MN; } - if (flags & adsp21062_device::ASTAT_FLAGS::MV) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_MV; } - if (flags & adsp21062_device::ASTAT_FLAGS::SV) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_SV; } - if (flags & adsp21062_device::ASTAT_FLAGS::SZ) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_SZ; } - if (flags & adsp21062_device::ASTAT_FLAGS::BTF) { userflags |= OP_USERFLAG_ASTAT_DELAY_COPY_BTF; } + opcode_desc::extra_flags userflags; + userflags.reset(); + if (flags & AZ) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AZ); } + if (flags & AN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AN); } + if (flags & AV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AV); } + if (flags & AC) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AC); } + if (flags & MN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_MN); } + if (flags & MV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_MV); } + if (flags & SV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_SV); } + if (flags & SZ) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_SZ); } + if (flags & BTF) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_BTF); } add_loop_entry(loopdesc.astat_check_pc, LOOP_ENTRY_ASTAT_CHECK, userflags); } } -bool sharc_frontend::is_loop_evaluation(uint32_t pc) +bool adsp21062_device::frontend::is_loop_evaluation(uint32_t pc) { uint32_t l2 = pc >> 17; uint32_t l1 = pc & 0x1ffff; @@ -142,7 +98,7 @@ bool sharc_frontend::is_loop_evaluation(uint32_t pc) return false; } -bool sharc_frontend::is_loop_start(uint32_t pc) +bool adsp21062_device::frontend::is_loop_start(uint32_t pc) { uint32_t l2 = pc >> 17; uint32_t l1 = pc & 0x1ffff; @@ -157,7 +113,7 @@ bool sharc_frontend::is_loop_start(uint32_t pc) return false; } -bool sharc_frontend::is_astat_delay_check(uint32_t pc) +bool adsp21062_device::frontend::is_astat_delay_check(uint32_t pc) { uint32_t l2 = pc >> 17; uint32_t l1 = pc & 0x1ffff; @@ -173,39 +129,38 @@ bool sharc_frontend::is_astat_delay_check(uint32_t pc) } -bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +bool adsp21062_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint64_t opcode = desc.opptr.q[0] = m_sharc->pm_read48(desc.physpc); + uint64_t opcode = desc.opptr = m_sharc->pm_read48(desc.pc); desc.length = 1; - desc.cycles = 1; // handle looping if (is_astat_delay_check(desc.pc)) { - LOOP_ENTRY* map = m_loopmap.get(); + LOOP_ENTRY *map = m_loopmap.get(); int index = desc.pc & 0x1ffff; - desc.userflags |= map[index].userflags; - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AZ) { AZ_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AN) { AN_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AV) { AV_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_AC) { AC_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_MN) { MN_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_MV) { MV_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_SV) { SV_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_SZ) { SZ_USED(desc); } - if (map[index].userflags & OP_USERFLAG_ASTAT_DELAY_COPY_BTF) { BTF_USED(desc); } + desc.set_extra_flags(map[index].userflags); + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AZ]) { desc.set_az_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AN]) { desc.set_an_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AV]) { desc.set_av_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AC]) { desc.set_ac_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_MN]) { desc.set_mn_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_MV]) { desc.set_mv_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_SV]) { desc.set_sv_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_SZ]) { desc.set_sz_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_BTF]) { desc.set_btf_used(); } } if (is_loop_start(desc.pc)) { - desc.flags |= OPFLAG_IS_BRANCH_TARGET; + desc.set_is_branch_target(); } if (is_loop_evaluation(desc.pc)) { - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; - desc.userflags |= OP_USERFLAG_LOOP; + desc.set_is_conditional_branch(); + desc.set_loop(); } @@ -220,7 +175,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (opcode & 0x008000000000U) { // IDLE - desc.flags |= OPFLAG_END_SEQUENCE; + desc.set_end_sequence(); } else { @@ -267,16 +222,16 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (g) { // PM - PM_I_USED(desc, i); - PM_I_MODIFIED(desc, i); - PM_M_USED(desc, m); + desc.set_pm_i_used(i); + desc.set_pm_i_modified(i); + desc.set_pm_m_used(m); } else { // DM - DM_I_USED(desc, i); - DM_I_MODIFIED(desc, i); - DM_M_USED(desc, m); + desc.set_dm_i_used(i); + desc.set_dm_i_modified(i); + desc.set_dm_m_used(m); } break; } @@ -289,16 +244,21 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) uint32_t const address = opcode & 0xffffff; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } describe_if_condition(desc, cond); desc.targetpc = address; - desc.delayslots = (j) ? 2 : 0; + desc.delayslots = j ? 2 : 0; - desc.userflags |= (b) ? OP_USERFLAG_CALL : 0; + if (b) desc.set_call(); break; } @@ -310,16 +270,21 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) uint32_t const address = opcode & 0xffffff; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } describe_if_condition(desc, cond); desc.targetpc = desc.pc + util::sext(address, 24); - desc.delayslots = (j) ? 2 : 0; + desc.delayslots = j ? 2 : 0; - desc.userflags |= (b) ? OP_USERFLAG_CALL : 0; + if (b) desc.set_call(); break; } @@ -335,19 +300,24 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } describe_if_condition(desc, cond); - PM_I_USED(desc, pmi); - PM_M_USED(desc, pmm); + desc.set_pm_i_used(pmi); + desc.set_pm_m_used(pmm); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.delayslots = (j) ? 2 : 0; + desc.delayslots = j ? 2 : 0; - desc.userflags |= (b) ? OP_USERFLAG_CALL : 0; + if (b) desc.set_call(); break; } @@ -361,16 +331,21 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } describe_if_condition(desc, cond); desc.targetpc = desc.pc + op_get_reladdr(opcode); - desc.delayslots = (j) ? 2 : 0; + desc.delayslots = j ? 2 : 0; - desc.userflags |= (b) ? OP_USERFLAG_CALL : 0; + if (b) desc.set_call(); break; } @@ -383,14 +358,19 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } describe_if_condition(desc, cond); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.delayslots = (j) ? 2 : 0; + desc.delayslots = j ? 2 : 0; break; } @@ -403,14 +383,19 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; + { + desc.set_is_conditional_branch(); + } describe_if_condition(desc, cond); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.delayslots = (j) ? 2 : 0; + desc.delayslots = j ? 2 : 0; break; } @@ -473,7 +458,6 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) else loop.astat_check_pc = loop.end_pc; - insert_loop(loop); break; } @@ -497,13 +481,13 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { if (!describe_ureg_access(desc, ureg, UREG_READ)) return false; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else { if (!describe_ureg_access(desc, ureg, UREG_WRITE)) return false; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } break; } @@ -518,79 +502,98 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { case 0: // SET case 1: // CLEAR + if (sreg == 0x7c) // ASTAT + { + if (data & AZ) desc.set_az_modified(); + if (data & AV) desc.set_av_modified(); + if (data & AN) desc.set_an_modified(); + if (data & AC) desc.set_ac_modified(); + if (data & AS) desc.set_as_modified(); + if (data & AI) desc.set_ai_modified(); + if (data & MN) desc.set_mn_modified(); + if (data & MV) desc.set_mv_modified(); + if (data & MU) desc.set_mu_modified(); + if (data & MI) desc.set_mi_modified(); + if (data & SV) desc.set_sv_modified(); + if (data & SZ) desc.set_sz_modified(); + if (data & SS) desc.set_ss_modified(); + if (data & BTF) desc.set_btf_modified(); + if (data & AF) desc.set_af_modified(); + } + break; case 2: // TOGGLE if (sreg == 0x7c) // ASTAT { - if (data & adsp21062_device::AZ) + if (data & AZ) { - AZ_USED(desc); AZ_MODIFIED(desc); + desc.set_az_used(); desc.set_az_modified(); } - if (data & adsp21062_device::AV) + if (data & AV) { - AV_USED(desc); AV_MODIFIED(desc); + desc.set_av_used(); desc.set_av_modified(); } - if (data & adsp21062_device::AN) + if (data & AN) { - AN_USED(desc); AN_MODIFIED(desc); + desc.set_an_used(); desc.set_an_modified(); } - if (data & adsp21062_device::AC) + if (data & AC) { - AC_USED(desc); AC_MODIFIED(desc); + desc.set_ac_used(); desc.set_ac_modified(); } - if (data & adsp21062_device::AS) + if (data & AS) { - AS_USED(desc); AS_MODIFIED(desc); + desc.set_as_used(); desc.set_as_modified(); } - if (data & adsp21062_device::AI) + if (data & AI) { - AI_USED(desc); AI_MODIFIED(desc); + desc.set_ai_used(); desc.set_ai_modified(); } - if (data & adsp21062_device::MN) + if (data & MN) { - MN_USED(desc); MN_MODIFIED(desc); + desc.set_mn_used(); desc.set_mn_modified(); } - if (data & adsp21062_device::MV) + if (data & MV) { - MV_USED(desc); MV_MODIFIED(desc); + desc.set_mv_used(); desc.set_mv_modified(); } - if (data & adsp21062_device::MU) + if (data & MU) { - MU_USED(desc); MU_MODIFIED(desc); + desc.set_mu_used(); desc.set_mu_modified(); } - if (data & adsp21062_device::MI) + if (data & MI) { - MI_USED(desc); MI_MODIFIED(desc); + desc.set_mi_used(); desc.set_mi_modified(); } - if (data & adsp21062_device::SV) + if (data & SV) { - SV_USED(desc); SV_MODIFIED(desc); + desc.set_sv_used(); desc.set_sv_modified(); } - if (data & adsp21062_device::SZ) + if (data & SZ) { - SZ_USED(desc); SZ_MODIFIED(desc); + desc.set_sz_used(); desc.set_sz_modified(); } - if (data & adsp21062_device::SS) + if (data & SS) { - SS_USED(desc); SS_MODIFIED(desc); + desc.set_ss_used(); desc.set_ss_modified(); } - if (data & adsp21062_device::BTF) + if (data & BTF) { - BTF_USED(desc); BTF_MODIFIED(desc); + desc.set_btf_used(); desc.set_btf_modified(); } - if (data & adsp21062_device::AF) + if (data & AF) { - AF_USED(desc); AF_MODIFIED(desc); + desc.set_af_used(); desc.set_af_modified(); } } break; case 4: // TEST case 5: // XOR - BTF_MODIFIED(desc); + desc.set_btf_modified(); break; default: - fatalerror("sharc_frontend::describe: system reg bit manipulation %d", bop); + fatalerror("adsp21062_device::frontend::describe: system reg bit manipulation %d", bop); return false; } break; @@ -600,7 +603,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { if (opcode & 0x008000000000U) // bit reverse { - fatalerror("sharc_frontend::describe: bit reverse unimplemented"); + fatalerror("adsp21062_device::frontend::describe: bit reverse unimplemented"); } else // modify { @@ -608,9 +611,9 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) int const i = (opcode >> 32) & 0x7; if (g) - PM_I_USED(desc, i); + desc.set_pm_i_used(i); else - DM_I_USED(desc, i); + desc.set_dm_i_used(i); } break; } @@ -619,15 +622,15 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) break; case 0x18: // cjump |000|11000| - fatalerror("sharc_frontend::describe: cjump unimplemented"); + fatalerror("adsp21062_device::frontend::describe: cjump unimplemented"); break; case 0x19: // rframe |000|11001| - fatalerror("sharc_frontend::describe: rframe unimplemented"); + fatalerror("adsp21062_device::frontend::describe: rframe unimplemented"); break; default: - fatalerror("sharc_frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (uint16_t)(opcode >> 32), (uint32_t)(opcode)); + fatalerror("adsp21062_device::frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (uint16_t)(opcode >> 32), (uint32_t)(opcode)); return false; } break; @@ -647,34 +650,34 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) int const pmd = (opcode >> 37) & 0x1; int const dmd = (opcode >> 44) & 0x1; - PM_I_USED(desc, pmi); - PM_I_MODIFIED(desc, pmi); - PM_M_USED(desc, pmm); + desc.set_pm_i_used(pmi); + desc.set_pm_i_modified(pmi); + desc.set_pm_m_used(pmm); if (pmd) { - REG_USED(desc, pm_dreg); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_reg_used(pm_dreg); + desc.set_writes_memory(); } else { - REG_MODIFIED(desc, pm_dreg); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reg_modified(pm_dreg); + desc.set_reads_memory(); } - DM_I_USED(desc, dmi); - DM_I_MODIFIED(desc, dmi); - DM_M_USED(desc, dmm); + desc.set_dm_i_used(dmi); + desc.set_dm_i_modified(dmi); + desc.set_dm_m_used(dmm); if (dmd) { - REG_USED(desc, dm_dreg); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_reg_used(dm_dreg); + desc.set_writes_memory(); } else { - REG_MODIFIED(desc, dm_dreg); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reg_modified(dm_dreg); + desc.set_reads_memory(); } break; } @@ -697,26 +700,26 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { if (!describe_ureg_access(desc, ureg, UREG_READ)) return false; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else { if (!describe_ureg_access(desc, ureg, UREG_WRITE)) return false; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_writes_memory(); } if (g) { // PM - PM_I_USED(desc, i); - PM_M_USED(desc, m); + desc.set_pm_i_used(i); + desc.set_pm_m_used(m); } else { // DM - DM_I_USED(desc, i); - DM_M_USED(desc, m); + desc.set_dm_i_used(i); + desc.set_dm_m_used(m); } break; @@ -753,33 +756,33 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (d) { - REG_USED(desc, dreg); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_reg_used(dreg); + desc.set_writes_memory(); } else { - REG_MODIFIED(desc, dreg); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reg_modified(dreg); + desc.set_reads_memory(); } if (g) { // PM - PM_I_USED(desc, i); + desc.set_pm_i_used(i); if (u) // post-modify with update { - PM_I_MODIFIED(desc, i); + desc.set_pm_i_modified(i); } } else { // DM - DM_I_USED(desc, i); + desc.set_dm_i_used(i); if (u) // post-modify with update { - DM_I_MODIFIED(desc, i); + desc.set_dm_i_modified(i); } } } @@ -794,21 +797,21 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) int const m = (opcode >> 38) & 0x7; int const g = (opcode >> 37) & 0x1; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); if (g) { // PM - PM_I_USED(desc, i); - PM_I_MODIFIED(desc, i); - PM_M_USED(desc, m); + desc.set_pm_i_used(i); + desc.set_pm_i_modified(i); + desc.set_pm_m_used(m); } else { // DM - DM_I_USED(desc, i); - DM_I_MODIFIED(desc, i); - DM_M_USED(desc, m); + desc.set_dm_i_used(i); + desc.set_dm_i_modified(i); + desc.set_dm_m_used(m); } } else // immediate shift / dreg <-> DM|PM |100|0| @@ -830,28 +833,28 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (d) { - REG_USED(desc, dreg); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_reg_used(dreg); + desc.set_writes_memory(); } else { - REG_MODIFIED(desc, dreg); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reg_modified(dreg); + desc.set_reads_memory(); } if (g) { // PM - PM_I_USED(desc, i); - PM_I_MODIFIED(desc, i); - PM_M_USED(desc, m); + desc.set_pm_i_used(i); + desc.set_pm_i_modified(i); + desc.set_pm_m_used(m); } else { // DM - DM_I_USED(desc, i); - DM_I_MODIFIED(desc, i); - DM_M_USED(desc, m); + desc.set_dm_i_used(i); + desc.set_dm_i_modified(i); + desc.set_dm_m_used(m); } } break; @@ -868,19 +871,19 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) { if (!describe_ureg_access(desc, ureg, UREG_READ)) return false; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else { if (!describe_ureg_access(desc, ureg, UREG_WRITE)) return false; - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); } if (g) - PM_I_USED(desc, i); + desc.set_pm_i_used(i); else - DM_I_USED(desc, i); + desc.set_dm_i_used(i); break; } @@ -898,27 +901,32 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; - - describe_if_condition(desc, cond); - - PM_I_USED(desc, pmi); - PM_M_USED(desc, pmm); - DM_I_USED(desc, dmi); - DM_I_MODIFIED(desc, dmi); - DM_M_USED(desc, dmm); - - if (d) { - REG_USED(desc, dreg); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } else { - REG_MODIFIED(desc, dreg); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_is_conditional_branch(); + } + + describe_if_condition(desc, cond); + + desc.set_pm_i_used(pmi); + desc.set_pm_m_used(pmm); + desc.set_dm_i_used(dmi); + desc.set_dm_i_modified(dmi); + desc.set_dm_m_used(dmm); + + if (d) + { + desc.set_reg_used(dreg); + desc.set_writes_memory(); + } + else + { + desc.set_reg_modified(dreg); + desc.set_reads_memory(); } desc.targetpc = BRANCH_TARGET_DYNAMIC; @@ -938,25 +946,30 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (m_sharc->if_condition_always_true(cond)) - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - else - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH; - - describe_if_condition(desc, cond); - - DM_I_USED(desc, dmi); - DM_I_MODIFIED(desc, dmi); - DM_M_USED(desc, dmm); - - if (d) { - REG_USED(desc, dreg); - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } else { - REG_MODIFIED(desc, dreg); - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_is_conditional_branch(); + } + + describe_if_condition(desc, cond); + + desc.set_dm_i_used(dmi); + desc.set_dm_i_modified(dmi); + desc.set_dm_m_used(dmm); + + if (d) + { + desc.set_reg_used(dreg); + desc.set_writes_memory(); + } + else + { + desc.set_reg_modified(dreg); + desc.set_reads_memory(); } desc.targetpc = desc.pc + op_get_reladdr(opcode); @@ -968,7 +981,7 @@ bool sharc_frontend::describe(opcode_desc &desc, const opcode_desc *prev) return true; } -bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) +bool adsp21062_device::frontend::describe_compute(opcode_desc &desc, uint64_t opcode) { // skip if no-op if ((opcode & 0x7fffff) == 0) @@ -993,80 +1006,80 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) switch (multiop) { case 0x00: // Rn = MRxx - REG_MODIFIED(desc, rn); + desc.set_reg_modified(rn); break; case 0x01: // MRxx = Rn - REG_USED(desc, rn); + desc.set_reg_used(rn); break; case 0x07: // Ra = Rx + Ry, Rs = Rx - Ry case 0x0f: // Fa = Fx + Fy, Fs = Fx - Fy - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, ra); - REG_MODIFIED(desc, rs); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(ra); + desc.set_reg_modified(rs); + desc.set_alu_flags_modified(); break; case 0x04: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 case 0x05: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 case 0x06: // Rm = R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x08: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12 case 0x09: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12 case 0x0a: // MRF = MRF + R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x0c: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 case 0x0d: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 case 0x0e: // Rm = MRF + R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x10: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 + R15-12 case 0x11: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = R11-8 - R15-12 case 0x12: // MRF = MRF - R3-0 * R7-4 (SSF), Ra = (R11-8 + R15-12) / 2 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x14: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12 case 0x15: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = R11-8 - R15-12 case 0x16: // Rm = MRF - R3-0 * R7-4 (SSFR), Ra = (R11-8 + R15-12) / 2 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x18: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12 @@ -1076,56 +1089,56 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x1c: // Fm = F3-0 * F7-4, Fa = (F11-8 + F15-12) / 2 case 0x1e: // Fm = F3-0 * F7-4, Fa = MAX(F11-8, F15-12) case 0x1f: // Fm = F3-0 * F7-4, Fa = MIN(F11-8, F15-12) - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x1d: // Fm = F3-0 * F7-4, Fa = ABS F11-8 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: // Rm = R3-0 * R7-4 (SSFR), Ra = R11-8 + R15-12, Rs = R11-8 - R15-12 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - REG_MODIFIED(desc, (opcode >> 16) & 0xf); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_reg_modified((opcode >> 16) & 0xf); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: // Fm = F3-0 * F7-4, Fa = F11-8 + F15-12, Fs = F11-8 - F15-12 - REG_USED(desc, fxm); - REG_USED(desc, fym); - REG_USED(desc, fxa); - REG_USED(desc, fya); - REG_MODIFIED(desc, fm); - REG_MODIFIED(desc, fa); - REG_MODIFIED(desc, (opcode >> 16) & 0xf); - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(fxm); + desc.set_reg_used(fym); + desc.set_reg_used(fxa); + desc.set_reg_used(fya); + desc.set_reg_modified(fm); + desc.set_reg_modified(fa); + desc.set_reg_modified((opcode >> 16) & 0xf); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); break; default: - fatalerror("sharc_frontend::describe_compute: unknown multiop %02X in opcode %04X%08X at %08X", multiop, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown multiop %02X in opcode %04X%08X at %08X", multiop, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); return false; } } @@ -1161,28 +1174,28 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xe2: // Fn = MAX(Fx, Fy) case 0xe3: // Fn = CLIP Fx BY Fy case 0xe0: // Fn = Fx COPYSIGN Fy - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_alu_flags_modified(); break; case 0x05: // Rn = Rx + Ry + CI case 0x06: // Rn = Rx - Ry + CI - 1 case 0x25: // Rn = Rx + CI case 0x26: // Rn = Rx + CI - 1 - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - AC_USED(desc); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_ac_used(); + desc.set_alu_flags_modified(); break; case 0x0a: // COMP(Rx, Ry) case 0x8a: // COMP(Fx, Fy) - REG_USED(desc, rx); - REG_USED(desc, ry); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_alu_flags_modified(); break; case 0x29: // Rn = Rx + 1 @@ -1202,20 +1215,20 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xca: // Fn = FLOAT Rx case 0xc4: // Fn = RECIPS Fx case 0xc5: // Fn = RSQRTS Fx - REG_USED(desc, rx); - REG_MODIFIED(desc, rn); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_modified(rn); + desc.set_alu_flags_modified(); break; case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: { /* Fixed-point Dual Add/Subtract */ - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - REG_MODIFIED(desc, ra); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_reg_modified(ra); + desc.set_alu_flags_modified(); break; } @@ -1223,16 +1236,16 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: { /* Floating-point Dual Add/Subtract */ - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - REG_MODIFIED(desc, ra); - ALU_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_reg_modified(ra); + desc.set_alu_flags_modified(); break; } default: - fatalerror("sharc_frontend::describe_compute: unknown ALU op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown ALU op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); return false; } break; @@ -1254,10 +1267,10 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x70: // Rn = Rx * Ry (SSI) case 0x78: // Rn = Rx * Ry (SSF) case 0x79: // Rn = Rx * Ry (SSFR) - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x44: // MRF = Rx * Ry (UUI) @@ -1273,9 +1286,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x7c: // MRF = Rx * Ry (SSF) case 0x7d: // MRF = Rx * Ry (SSFR) // TODO: track MRF? - REG_USED(desc, rx); - REG_USED(desc, ry); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_mult_flags_modified(); break; case 0x46: // MRB = Rx * Ry (UUI) @@ -1291,9 +1304,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x7e: // MRB = Rx * Ry (SSF) case 0x7f: // MRB = Rx * Ry (SSFR) // TODO: track MRB? - REG_USED(desc, rx); - REG_USED(desc, ry); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_mult_flags_modified(); break; case 0x80: // Rn = MRF + Rx * Ry (UUI) @@ -1309,10 +1322,10 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xb8: // Rn = MRF + Rx * Ry (SSF) case 0xb9: // Rn = MRF + Rx * Ry (SSFR) // TODO: track MRF? - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x82: // Rn = MRB + Rx * Ry (UUI) @@ -1328,10 +1341,10 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xba: // Rn = MRB + Rx * Ry (SSF) case 0xbb: // Rn = MRB + Rx * Ry (SSFR) // TODO: track MRB? - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x84: // MRF = MRF + Rx * Ry (UUI) @@ -1347,9 +1360,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xbc: // MRF = MRF + Rx * Ry (SSF) case 0xbd: // MRF = MRF + Rx * Ry (SSFR) // TODO: track MRF? - REG_USED(desc, rx); - REG_USED(desc, ry); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_mult_flags_modified(); break; case 0x86: // MRB = MRB + Rx * Ry (UUI) @@ -1366,9 +1379,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xbf: // MRB = MRB + Rx * Ry (SSFR) break; // TODO: track MRB? - REG_USED(desc, rx); - REG_USED(desc, ry); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_mult_flags_modified(); break; case 0xc0: // Rn = MRF - Rx * Ry (UUI) @@ -1384,10 +1397,10 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xf8: // Rn = MRF - Rx * Ry (SSF) case 0xf9: // Rn = MRF - Rx * Ry (SSFR) // TODO: track MRF? - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0xc2: // Rn = MRB - Rx * Ry (UUI) @@ -1403,10 +1416,10 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xfa: // Rn = MRB - Rx * Ry (SSF) case 0xfb: // Rn = MRB - Rx * Ry (SSFR) // TODO: track MRB? - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0xc4: // MRF = MRF - Rx * Ry (UUI) @@ -1422,9 +1435,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xfc: // MRF = MRF - Rx * Ry (SSF) case 0xfd: // MRF = MRF - Rx * Ry (SSFR) // TODO: track MRF? - REG_USED(desc, rx); - REG_USED(desc, ry); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_mult_flags_modified(); break; case 0xc6: // MRB = MRB - Rx * Ry (UUI) @@ -1440,9 +1453,9 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0xfe: // MRB = MRB - Rx * Ry (SSF) case 0xff: // MRB = MRB - Rx * Ry (SSFR) // TODO: track MRB? - REG_USED(desc, rx); - REG_USED(desc, ry); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_mult_flags_modified(); break; case 0x00: // Rn = SAT MRF (UI) @@ -1450,8 +1463,8 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x08: // Rn = SAT MRF (UF) case 0x09: // Rn = SAT MRF (SF) // TODO: track MRF? - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x02: // Rn = SAT MRB (UI) @@ -1459,8 +1472,8 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x0a: // Rn = SAT MRB (UF) case 0x0b: // Rn = SAT MRB (SF) // TODO: track MRB? - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x04: // MRF = SAT MRF (UI) @@ -1468,7 +1481,7 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x0c: // MRF = SAT MRF (UF) case 0x0d: // MRF = SAT MRF (SF) // TODO: track MRF? - MULT_FLAGS_MODIFIED(desc); + desc.set_mult_flags_modified(); break; case 0x06: // MRB = SAT MRB (UI) @@ -1476,47 +1489,47 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x0e: // MRB = SAT MRB (UF) case 0x0f: // MRB = SAT MRB (SF) // TODO: track MRB? - MULT_FLAGS_MODIFIED(desc); + desc.set_mult_flags_modified(); break; case 0x18: // Rn = RND MRF (U) case 0x19: // Rn = RND MRF (S) - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x1a: // Rn = RND MRB (U) case 0x1b: // Rn = RND MRB (S) - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; case 0x1c: // MRF = RND MRF (U) case 0x1d: // MRF = RND MRF (S) - MULT_FLAGS_MODIFIED(desc); + desc.set_mult_flags_modified(); break; case 0x1e: // MRB = RND MRB (U) case 0x1f: // MRB = RND MRB (S) - MULT_FLAGS_MODIFIED(desc); + desc.set_mult_flags_modified(); break; case 0x14: // MRF = 0 - MULT_FLAGS_MODIFIED(desc); + desc.set_mult_flags_modified(); break; case 0x16: // MRB = 0 - MULT_FLAGS_MODIFIED(desc); + desc.set_mult_flags_modified(); break; case 0x30: // Fn = Fx * Fy - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - MULT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_mult_flags_modified(); break; default: - fatalerror("sharc_frontend::describe_compute: unknown mult op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown mult op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); } break; } @@ -1534,27 +1547,27 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x4c: // Rn = FDEP Rx BY Ry | : (SE) case 0x40: // Rn = FEXT Rx BY Ry | : case 0x48: // Rn = FEXT Rx BY Ry | : (SE) - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_MODIFIED(desc, rn); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_modified(rn); + desc.set_shift_flags_modified(); break; case 0x20: // Rn = Rn OR LSHIFT Rx BY Ry | case 0x24: // Rn = Rn OR ASHIFT Rx BY Ry | case 0x64: // Rn = Rn OR FDEP Rx BY Ry | : case 0x6c: // Rn = Rn OR FDEP Rx BY Ry | : (SE) - REG_USED(desc, rx); - REG_USED(desc, ry); - REG_USED(desc, rn); - REG_MODIFIED(desc, rn); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_reg_used(rn); + desc.set_reg_modified(rn); + desc.set_shift_flags_modified(); break; case 0xcc: // BTST Rx BY Ry | - REG_USED(desc, rx); - REG_USED(desc, ry); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(ry); + desc.set_shift_flags_modified(); break; case 0x80: // Rn = EXP Rx @@ -1563,19 +1576,19 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) case 0x8c: // Rn = LEFTO Rx case 0x90: // Rn = FPACK Fx case 0x94: // Fn = FUNPACK Rx - REG_USED(desc, rx); - REG_MODIFIED(desc, rn); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_modified(rn); + desc.set_shift_flags_modified(); break; default: - fatalerror("sharc_frontend::describe_compute: unknown shift op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown shift op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); } break; } default: - fatalerror("sharc_frontend::describe_compute: unknown operation type in opcode %04X%08X at %08X", (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown operation type in opcode %04X%08X at %08X", (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); return false; } } @@ -1583,68 +1596,68 @@ bool sharc_frontend::describe_compute(opcode_desc &desc, uint64_t opcode) return true; } -bool sharc_frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCESS access) +bool adsp21062_device::frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCESS access) { switch (reg) { case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: if (access == UREG_READ) - REG_USED(desc, reg); + desc.set_reg_used(reg); else - REG_MODIFIED(desc, reg); + desc.set_reg_modified(reg); break; case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: if (access == UREG_READ) - DM_I_USED(desc, reg & 7); + desc.set_dm_i_used(reg & 7); else - DM_I_MODIFIED(desc, reg & 7); + desc.set_dm_i_modified(reg & 7); break; case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: if (access == UREG_READ) - PM_I_USED(desc, reg & 7); + desc.set_pm_i_used(reg & 7); else - PM_I_MODIFIED(desc, reg & 7); + desc.set_pm_i_modified(reg & 7); break; case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: if (access == UREG_READ) - DM_M_USED(desc, reg & 7); + desc.set_dm_m_used(reg & 7); else - DM_M_MODIFIED(desc, reg & 7); + desc.set_dm_m_modified(reg & 7); break; case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: if (access == UREG_READ) - PM_M_USED(desc, reg & 7); + desc.set_pm_m_used(reg & 7); else - PM_M_MODIFIED(desc, reg & 7); + desc.set_pm_m_modified(reg & 7); break; case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: if (access == UREG_READ) - DM_L_USED(desc, reg & 7); + desc.set_dm_l_used(reg & 7); else - DM_L_MODIFIED(desc, reg & 7); + desc.set_dm_l_modified(reg & 7); break; case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: if (access == UREG_READ) - PM_L_USED(desc, reg & 7); + desc.set_pm_l_used(reg & 7); else - PM_L_MODIFIED(desc, reg & 7); + desc.set_pm_l_modified(reg & 7); break; case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: if (access == UREG_READ) - DM_B_USED(desc, reg & 7); + desc.set_dm_b_used(reg & 7); else - DM_B_MODIFIED(desc, reg & 7); + desc.set_dm_b_modified(reg & 7); break; case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: if (access == UREG_READ) - PM_B_USED(desc, reg & 7); + desc.set_pm_b_used(reg & 7); else - PM_B_MODIFIED(desc, reg & 7); + desc.set_pm_b_modified(reg & 7); break; case 0x60: // FADDR @@ -1677,29 +1690,29 @@ bool sharc_frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCES case 0x7c: // ASTAT if (access == UREG_READ) { - AZ_USED(desc); - AN_USED(desc); - AV_USED(desc); - AC_USED(desc); - AS_USED(desc); - AI_USED(desc); - MN_USED(desc); - MV_USED(desc); - MU_USED(desc); - MI_USED(desc); - SV_USED(desc); - SZ_USED(desc); - SS_USED(desc); - BTF_USED(desc); - AF_USED(desc); + desc.set_az_used(); + desc.set_an_used(); + desc.set_av_used(); + desc.set_ac_used(); + desc.set_as_used(); + desc.set_ai_used(); + desc.set_mn_used(); + desc.set_mv_used(); + desc.set_mu_used(); + desc.set_mi_used(); + desc.set_sv_used(); + desc.set_sz_used(); + desc.set_ss_used(); + desc.set_btf_used(); + desc.set_af_used(); } else { - ALU_FLAGS_MODIFIED(desc); - MULT_FLAGS_MODIFIED(desc); - SHIFT_FLAGS_MODIFIED(desc); - BTF_MODIFIED(desc); - AF_MODIFIED(desc); + desc.set_alu_flags_modified(); + desc.set_mult_flags_modified(); + desc.set_shift_flags_modified(); + desc.set_btf_modified(); + desc.set_af_modified(); } break; @@ -1717,14 +1730,14 @@ bool sharc_frontend::describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCES break; default: - fatalerror("sharc_frontend::describe_ureg_access: unknown UREG %02X", reg); + fatalerror("adsp21062_device::frontend::describe_ureg_access: unknown UREG %02X", reg); return false; } return true; } -bool sharc_frontend::describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn, int rx) +bool adsp21062_device::frontend::describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn, int rx) { switch (shiftop) { @@ -1738,56 +1751,56 @@ bool sharc_frontend::describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn case 0x30: // BSET Rx BY case 0x31: // BCLR Rx By case 0x32: // BTGL Rx BY - REG_USED(desc, rx); - REG_MODIFIED(desc, rn); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_modified(rn); + desc.set_shift_flags_modified(); break; case 0x08: // Rn = Rn OR LSHIFT Rx BY case 0x19: // Rn = Rn OR FDEP Rx BY : case 0x1b: // Rn = Rn OR FDEP Rx BY : (SE) - REG_USED(desc, rx); - REG_USED(desc, rn); - REG_MODIFIED(desc, rn); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_reg_used(rn); + desc.set_reg_modified(rn); + desc.set_shift_flags_modified(); break; case 0x33: // BTST Rx BY - REG_USED(desc, rx); - SHIFT_FLAGS_MODIFIED(desc); + desc.set_reg_used(rx); + desc.set_shift_flags_modified(); break; default: - fatalerror("sharc_frontend::describe_shiftop_imm: unknown op %02X at %08X", shiftop, desc.pc); + fatalerror("adsp21062_device::frontend::describe_shiftop_imm: unknown op %02X at %08X", shiftop, desc.pc); return false; } return true; } -void sharc_frontend::describe_if_condition(opcode_desc &desc, int condition) +void adsp21062_device::frontend::describe_if_condition(opcode_desc &desc, int condition) { switch (condition) { - case 0x00: AZ_USED(desc); break; /* EQ */ - case 0x01: AZ_USED(desc); AN_USED(desc); break; /* LT */ - case 0x02: AZ_USED(desc); AN_USED(desc); break; /* LE */ - case 0x03: AC_USED(desc); break; /* AC */ - case 0x04: AV_USED(desc); break; /* AV */ - case 0x05: MV_USED(desc); break; /* MV */ - case 0x06: MN_USED(desc); break; /* MS */ - case 0x07: SV_USED(desc); break; /* SV */ - case 0x08: SZ_USED(desc); break; /* SZ */ - case 0x0d: BTF_USED(desc); break; /* TF */ - case 0x10: AZ_USED(desc); break; /* NOT EQUAL */ - case 0x11: AZ_USED(desc); AN_USED(desc); break; /* GE */ - case 0x12: AZ_USED(desc); AN_USED(desc); break; /* GT */ - case 0x13: AC_USED(desc); break; /* NOT AC */ - case 0x14: AV_USED(desc); break; /* NOT AV */ - case 0x15: MV_USED(desc); break; /* NOT MV */ - case 0x16: MN_USED(desc); break; /* NOT MS */ - case 0x17: SV_USED(desc); break; /* NOT SV */ - case 0x18: SZ_USED(desc); break; /* NOT SZ */ - case 0x1d: BTF_USED(desc); break; /* NOT TF */ + case 0x00: desc.set_az_used(); break; // EQ + case 0x01: desc.set_az_used(); desc.set_an_used(); break; // LT + case 0x02: desc.set_az_used(); desc.set_an_used(); break; // LE + case 0x03: desc.set_ac_used(); break; // AC + case 0x04: desc.set_av_used(); break; // AV + case 0x05: desc.set_mv_used(); break; // MV + case 0x06: desc.set_mn_used(); break; // MS + case 0x07: desc.set_sv_used(); break; // SV + case 0x08: desc.set_sz_used(); break; // SZ + case 0x0d: desc.set_btf_used(); break; // TF + case 0x10: desc.set_az_used(); break; // NOT EQUAL + case 0x11: desc.set_az_used(); desc.set_an_used(); break; // GE + case 0x12: desc.set_az_used(); desc.set_an_used(); break; // GT + case 0x13: desc.set_ac_used(); break; // NOT AC + case 0x14: desc.set_av_used(); break; // NOT AV + case 0x15: desc.set_mv_used(); break; // NOT MV + case 0x16: desc.set_mn_used(); break; // NOT MS + case 0x17: desc.set_sv_used(); break; // NOT SV + case 0x18: desc.set_sz_used(); break; // NOT SZ + case 0x1d: desc.set_btf_used(); break; // NOT TF } } diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h index 1d52b216664..01be597b2a5 100644 --- a/src/devices/cpu/sharc/sharcfe.h +++ b/src/devices/cpu/sharc/sharcfe.h @@ -12,15 +12,225 @@ #pragma once #include "sharc.h" + #include "cpu/drcfe.h" +#include +#include -class sharc_frontend : public drc_frontend + +class adsp21062_device::opcode_desc : public opcode_desc_base { public: - sharc_frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + enum + { + LOOP = 0, + ASTAT_DELAY_COPY_AZ, + ASTAT_DELAY_COPY_AN, + ASTAT_DELAY_COPY_AC, + ASTAT_DELAY_COPY_AV, + ASTAT_DELAY_COPY_MV, + ASTAT_DELAY_COPY_MN, + ASTAT_DELAY_COPY_SV, + ASTAT_DELAY_COPY_SZ, + ASTAT_DELAY_COPY_BTF, + CALL, + + READS_MEMORY, + WRITES_MEMORY, + + EXTRA_FLAG_COUNT + }; + + using extra_flags = std::bitset; + + uint64_t opptr; // copy of opcode + + void set_reg_used(unsigned x) { regin.set(REG_R0 + x); } + void set_reg_modified(unsigned x) { regout.set(REG_R0 + x); } + + void set_az_used() { regin.set(REG_AZ); } + void set_az_modified() { regout.set(REG_AZ); } + void set_av_used() { regin.set(REG_AV); } + void set_av_modified() { regout.set(REG_AV); } + void set_an_used() { regin.set(REG_AN); } + void set_an_modified() { regout.set(REG_AN); } + void set_ac_used() { regin.set(REG_AC); } + void set_ac_modified() { regout.set(REG_AC); } + void set_as_used() { regin.set(REG_AS); } + void set_as_modified() { regout.set(REG_AS); } + void set_ai_used() { regin.set(REG_AI); } + void set_ai_modified() { regout.set(REG_AI); } + void set_mn_used() { regin.set(REG_MN); } + void set_mn_modified() { regout.set(REG_MN); } + void set_mv_used() { regin.set(REG_MV); } + void set_mv_modified() { regout.set(REG_MV); } + void set_mu_used() { regin.set(REG_MU); } + void set_mu_modified() { regout.set(REG_MU); } + void set_mi_used() { regin.set(REG_MI); } + void set_mi_modified() { regout.set(REG_MI); } + void set_sv_used() { regin.set(REG_SV); } + void set_sv_modified() { regout.set(REG_SV); } + void set_sz_used() { regin.set(REG_SZ); } + void set_sz_modified() { regout.set(REG_SZ); } + void set_ss_used() { regin.set(REG_SS); } + void set_ss_modified() { regout.set(REG_SS); } + void set_btf_used() { regin.set(REG_BTF); } + void set_btf_modified() { regout.set(REG_BTF); } + void set_af_used() { regin.set(REG_AF); } + void set_af_modified() { regout.set(REG_AF); } + + void set_pm_i_used(unsigned x) { regin.set(REG_PM_I0 + x); } + void set_pm_i_modified(unsigned x) { regout.set(REG_PM_I0 + x); } + void set_pm_m_used(unsigned x) { regin.set(REG_PM_M0 + x); } + void set_pm_m_modified(unsigned x) { regout.set(REG_PM_M0 + x); } + void set_pm_b_used(unsigned x) { regin.set(REG_PM_B0 + x); } + void set_pm_b_modified(unsigned x) { regout.set(REG_PM_B0 + x); } + void set_pm_l_used(unsigned x) { regin.set(REG_PM_L0 + x); } + void set_pm_l_modified(unsigned x) { regout.set(REG_PM_L0 + x); } + + void set_dm_i_used(unsigned x) { regin.set(REG_DM_I0 + x); } + void set_dm_i_modified(unsigned x) { regout.set(REG_DM_I0 + x); } + void set_dm_m_used(unsigned x) { regin.set(REG_DM_M0 + x); } + void set_dm_m_modified(unsigned x) { regout.set(REG_DM_M0 + x); } + void set_dm_b_used(unsigned x) { regin.set(REG_DM_B0 + x); } + void set_dm_b_modified(unsigned x) { regout.set(REG_DM_B0 + x); } + void set_dm_l_used(unsigned x) { regin.set(REG_DM_L0 + x); } + void set_dm_l_modified(unsigned x) { regout.set(REG_DM_L0 + x); } + + void set_alu_flags_modified() + { + set_az_modified(); + set_an_modified(); + set_av_modified(); + set_ac_modified(); + set_as_modified(); + set_ai_modified(); + } + + void set_mult_flags_modified() + { + set_mn_modified(); + set_mv_modified(); + set_mu_modified(); + set_mi_modified(); + } + + void set_shift_flags_modified() + { + set_sz_modified(); + set_sv_modified(); + set_ss_modified(); + } + + bool az_calc_required() const { return regreq[REG_AZ] || in_delay_slot(); } + bool av_calc_required() const { return regreq[REG_AV] || in_delay_slot(); } + bool an_calc_required() const { return regreq[REG_AN] || in_delay_slot(); } + bool ac_calc_required() const { return regreq[REG_AC] || in_delay_slot(); } + bool as_calc_required() const { return regreq[REG_AS] || in_delay_slot(); } + bool ai_calc_required() const { return regreq[REG_AI] || in_delay_slot(); } + bool mn_calc_required() const { return regreq[REG_MN] || in_delay_slot(); } + bool mv_calc_required() const { return regreq[REG_MV] || in_delay_slot(); } + bool mu_calc_required() const { return regreq[REG_MU] || in_delay_slot(); } + bool mi_calc_required() const { return regreq[REG_MI] || in_delay_slot(); } + bool sv_calc_required() const { return regreq[REG_SV] || in_delay_slot(); } + bool sz_calc_required() const { return regreq[REG_SZ] || in_delay_slot(); } + bool ss_calc_required() const { return regreq[REG_SS] || in_delay_slot(); } + bool btf_calc_required() const { return regreq[REG_BTF] || in_delay_slot(); } + bool af_calc_required() const { return regreq[REG_AF] || in_delay_slot(); } + + void set_loop() { m_extra_flags.set(LOOP); } + void set_astat_delay_copy_az() { m_extra_flags.set(ASTAT_DELAY_COPY_AZ); } + void set_astat_delay_copy_an() { m_extra_flags.set(ASTAT_DELAY_COPY_AN); } + void set_astat_delay_copy_ac() { m_extra_flags.set(ASTAT_DELAY_COPY_AC); } + void set_astat_delay_copy_av() { m_extra_flags.set(ASTAT_DELAY_COPY_AV); } + void set_astat_delay_copy_mv() { m_extra_flags.set(ASTAT_DELAY_COPY_MV); } + void set_astat_delay_copy_mn() { m_extra_flags.set(ASTAT_DELAY_COPY_MN); } + void set_astat_delay_copy_sv() { m_extra_flags.set(ASTAT_DELAY_COPY_SV); } + void set_astat_delay_copy_sz() { m_extra_flags.set(ASTAT_DELAY_COPY_SZ); } + void set_astat_delay_copy_btf() { m_extra_flags.set(ASTAT_DELAY_COPY_BTF); } + void set_call() { m_extra_flags.set(CALL); } + void set_reads_memory() { m_extra_flags.set(READS_MEMORY); } + void set_writes_memory() { m_extra_flags.set(WRITES_MEMORY); } + + void set_extra_flags(extra_flags const &flags) + { + m_extra_flags |= flags; + } + + bool loop() const { return m_extra_flags[LOOP]; } + bool astat_delay_copy_az() const { return m_extra_flags[ASTAT_DELAY_COPY_AZ]; } + bool astat_delay_copy_an() const { return m_extra_flags[ASTAT_DELAY_COPY_AN]; } + bool astat_delay_copy_ac() const { return m_extra_flags[ASTAT_DELAY_COPY_AC]; } + bool astat_delay_copy_av() const { return m_extra_flags[ASTAT_DELAY_COPY_AV]; } + bool astat_delay_copy_mv() const { return m_extra_flags[ASTAT_DELAY_COPY_MV]; } + bool astat_delay_copy_mn() const { return m_extra_flags[ASTAT_DELAY_COPY_MN]; } + bool astat_delay_copy_sv() const { return m_extra_flags[ASTAT_DELAY_COPY_SV]; } + bool astat_delay_copy_sz() const { return m_extra_flags[ASTAT_DELAY_COPY_SZ]; } + bool astat_delay_copy_btf() const { return m_extra_flags[ASTAT_DELAY_COPY_BTF]; } + bool call() const { return m_extra_flags[CALL]; } + bool reads_memory() const { return m_extra_flags[READS_MEMORY]; } + bool writes_memory() const { return m_extra_flags[WRITES_MEMORY]; } + + void reset(offs_t curpc, bool in_delay_slot) + { + static_assert(REG_COUNT <= 96); + + opcode_desc_base::reset(curpc, in_delay_slot); + + opptr = 0; + m_extra_flags.reset(); + } + +private: + enum + { + REG_R0 = 0, + + REG_AZ = REG_R0 + 16, + REG_AV, + REG_AN, + REG_AC, + REG_AS, + REG_AI, + REG_MN, + REG_MV, + REG_MU, + REG_MI, + REG_SV, + REG_SZ, + REG_SS, + REG_BTF, + REG_AF, + + REG_PM_I0, + REG_PM_M0 = REG_PM_I0 + 8, + REG_PM_B0 = REG_PM_M0 + 8, + REG_PM_L0 = REG_PM_B0 + 8, + + REG_DM_I0 = REG_PM_L0 + 8, + REG_DM_M0 = REG_DM_I0 + 8, + REG_DM_B0 = REG_DM_M0 + 8, + REG_DM_L0 = REG_DM_B0 + 8, + + REG_COUNT = REG_DM_L0 + 8 + }; + + extra_flags m_extra_flags; +}; + + +class adsp21062_device::frontend : public drc_frontend_base +{ +public: + frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); + void flush(); +private: enum UREG_ACCESS { UREG_READ, @@ -43,7 +253,7 @@ public: struct LOOP_ENTRY { uint16_t entrytype; - uint32_t userflags; + opcode_desc::extra_flags userflags; }; struct LOOP_DESCRIPTOR @@ -55,18 +265,15 @@ public: int condition; }; -protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + bool describe(opcode_desc &desc, const opcode_desc *prev); -private: bool describe_compute(opcode_desc &desc, uint64_t opcode); bool describe_ureg_access(opcode_desc &desc, int reg, UREG_ACCESS access); bool describe_shiftop_imm(opcode_desc &desc, int shiftop, int rn, int rx); void describe_if_condition(opcode_desc &desc, int condition); void insert_loop(const LOOP_DESCRIPTOR &loopdesc); - void add_loop_entry(uint32_t pc, uint8_t type, uint32_t userflags); + void add_loop_entry(uint32_t pc, uint8_t type, opcode_desc::extra_flags const &userflags); bool is_loop_evaluation(uint32_t pc); bool is_loop_start(uint32_t pc); bool is_astat_delay_check(uint32_t pc); diff --git a/src/devices/cpu/sharc/sharcinternal.ipp b/src/devices/cpu/sharc/sharcinternal.ipp index 8b57f0403a3..e4ad191122a 100644 --- a/src/devices/cpu/sharc/sharcinternal.ipp +++ b/src/devices/cpu/sharc/sharcinternal.ipp @@ -8,21 +8,6 @@ #include -// DRC instruction description flags -constexpr uint32_t OP_USERFLAG_LOOP = 0x00000001; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_AZ = 0x00001000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_AN = 0x00002000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_AC = 0x00004000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_AV = 0x00008000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_MV = 0x00010000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_MN = 0x00020000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_SV = 0x00040000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_SZ = 0x00080000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY_BTF = 0x00100000; -constexpr uint32_t OP_USERFLAG_ASTAT_DELAY_COPY = 0x001ff000; -constexpr uint32_t OP_USERFLAG_CALL = 0x10000000; - - // constants for IEEE754 single-precision float format constexpr uint32_t FLOAT_INFINITY = 0x7f800000; constexpr uint32_t FLOAT_SIGN_MASK = 0x80000000; diff --git a/src/devices/cpu/unsp/unsp.cpp b/src/devices/cpu/unsp/unsp.cpp index 5f580c8ce28..657d5f0671e 100644 --- a/src/devices/cpu/unsp/unsp.cpp +++ b/src/devices/cpu/unsp/unsp.cpp @@ -26,6 +26,12 @@ #include + +#define SINGLE_INSTRUCTION_MODE (0) + +#define ENABLE_UNSP_DRC (0) + + DEFINE_DEVICE_TYPE(UNSP, unsp_device, "unsp", "SunPlus u'nSP (ISA 1.0)") // 1.1 is just 1.0 with better CPI? DEFINE_DEVICE_TYPE(UNSP_11, unsp_11_device, "unsp_11", "SunPlus u'nSP (ISA 1.1)") @@ -248,7 +254,7 @@ void unsp_device::device_start() m_drcuml->symbol_add(&m_core->m_icount, sizeof(m_core->m_icount), "icount"); /* initialize the front-end helper */ - m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); + m_drcfe = std::make_unique(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE); /* mark the cache dirty so it is updated on next execute */ m_cache_dirty = true; diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h index 05d8871cb76..0372a491ffb 100644 --- a/src/devices/cpu/unsp/unsp.h +++ b/src/devices/cpu/unsp/unsp.h @@ -17,23 +17,15 @@ #pragma once -#include "cpu/drcfe.h" -#include "cpu/drcuml.h" -#include "cpu/drcumlsh.h" #include "unspdefs.h" +#include "cpu/drcuml.h" + + /*************************************************************************** CONSTANTS ***************************************************************************/ -/* map variables */ -#define MAPVAR_PC M0 -#define MAPVAR_CYCLES M1 - -#define SINGLE_INSTRUCTION_MODE (0) - -#define ENABLE_UNSP_DRC (0) - #define UNSP_LOG_OPCODES (0) #define UNSP_LOG_REGS (0) @@ -41,8 +33,6 @@ // TYPE DEFINITIONS //************************************************************************** -class unsp_frontend; - // ======================> unsp_device enum @@ -177,6 +167,10 @@ protected: int m_icount; }; + class frontend; + class opcode_desc; + + unsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal); // device_t implementation @@ -300,7 +294,7 @@ private: drc_cache m_drccache; std::unique_ptr m_drcuml; - std::unique_ptr m_drcfe; + std::unique_ptr m_drcfe; uint32_t m_drcoptions; uint8_t m_cache_dirty; diff --git a/src/devices/cpu/unsp/unspdrc.cpp b/src/devices/cpu/unsp/unspdrc.cpp index a8162b82b22..e041d1020d5 100644 --- a/src/devices/cpu/unsp/unspdrc.cpp +++ b/src/devices/cpu/unsp/unspdrc.cpp @@ -4,8 +4,20 @@ #include "emu.h" #include "unsp.h" -#include "unspfe.h" + #include "unspdefs.h" +#include "unspfe.h" + +#include "cpu/drcumlsh.h" + + +/*************************************************************************** + CONSTANTS +***************************************************************************/ + +/* map variables */ +#define MAPVAR_PC M0 + void unsp_device::invalidate_cache() { @@ -179,7 +191,7 @@ void unsp_device::code_compile_block(offs_t pc) /* determine the last instruction in this sequence */ for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) - if (seqlast->flags & OPFLAG_END_SEQUENCE) + if (seqlast->end_sequence()) break; assert(seqlast != nullptr); @@ -204,11 +216,11 @@ void unsp_device::code_compile_block(offs_t pc) } /* validate this code block if we're not pointing into ROM */ - if (m_program.space().get_write_ptr(seqhead->physpc) != nullptr) + if (m_program.space().get_write_ptr(seqhead->pc) != nullptr) generate_checksum_block(block, compiler, seqhead, seqlast); /* label this instruction, if it may be jumped to locally */ - if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) + if (seqhead->is_branch_target()) UML_LABEL(block, seqhead->pc | 0x80000000); /* iterate over instructions in the sequence and compile them */ @@ -525,9 +537,9 @@ void unsp_device::generate_checksum_block(drcuml_block &block, compiler_state &c } /* full verification; sum up everything */ - void *memptr = m_program.space().get_write_ptr(seqhead->physpc); + void *memptr = m_program.space().get_write_ptr(seqhead->pc); UML_LOAD(block, I0, memptr, 0, SIZE_WORD, SCALE_x2); - uint32_t sum = seqhead->opptr.w[0]; + uint32_t sum = seqhead->opptr[0]; for (int i = 1; i < seqhead->length; i++) { UML_LOAD(block, I1, memptr, i, SIZE_WORD, SCALE_x2); @@ -536,12 +548,12 @@ void unsp_device::generate_checksum_block(drcuml_block &block, compiler_state &c } for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) { - if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!curdesc->virtual_noop()) { - memptr = m_program.space().get_write_ptr(curdesc->physpc); + memptr = m_program.space().get_write_ptr(curdesc->pc); UML_LOAD(block, I1, memptr, 0, SIZE_WORD, SCALE_x2); UML_ADD(block, I0, I0, I1); - sum += curdesc->opptr.w[0]; + sum += curdesc->opptr[0]; for (int i = 1; i < curdesc->length; i++) { UML_LOAD(block, I1, memptr, i, SIZE_WORD, SCALE_x2); @@ -603,8 +615,8 @@ void unsp_device::generate_branch(drcuml_block &block, compiler_state &compiler, void unsp_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { /* add an entry for the log */ - if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP)) - log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]); + if (m_drcuml->logging() && !desc->virtual_noop()) + log_add_disasm_comment(block, desc->pc, desc->opptr[0]); /* set the PC map variable */ UML_MAPVAR(block, MAPVAR_PC, desc->pc); @@ -620,14 +632,14 @@ void unsp_device::generate_sequence_instruction(drcuml_block &block, compiler_st UML_CALLC(block, cfunc_log_regs, this); #endif - if (!(desc->flags & OPFLAG_VIRTUAL_NOOP)) + if (!desc->virtual_noop()) { /* compile the instruction */ if (!generate_opcode(block, compiler, desc)) { UML_ROLINS(block, mem(&m_core->m_r[REG_SR]), desc->pc, 16, 0x3f); UML_AND(block, mem(&m_core->m_r[REG_PC]), desc->pc, 0x0000ffff); - UML_MOV(block, mem(&m_core->m_arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_core->m_arg0), desc->opptr[0]); UML_CALLC(block, cfunc_unimplemented, this); } } @@ -700,7 +712,7 @@ void unsp_device::generate_update_nz(drcuml_block &block) bool unsp_device::generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - uint32_t op = (uint32_t)desc->opptr.w[0]; + const uint32_t op = uint32_t(desc->opptr[0]); generate_add_lpc(block, 1); @@ -1032,7 +1044,7 @@ bool unsp_device::generate_opcode(drcuml_block &block, compiler_state &compiler, return false; // MULS - UML_MOV(block, mem(&m_core->m_arg0), desc->opptr.w[0]); + UML_MOV(block, mem(&m_core->m_arg0), desc->opptr[0]); UML_CALLC(block, ccfunc_muls, this); return true; diff --git a/src/devices/cpu/unsp/unspfe.cpp b/src/devices/cpu/unsp/unspfe.cpp index f93423379a1..43bd4952ef4 100644 --- a/src/devices/cpu/unsp/unspfe.cpp +++ b/src/devices/cpu/unsp/unspfe.cpp @@ -10,21 +10,36 @@ #include "emu.h" #include "unspfe.h" + #include "unspdefs.h" +#include "cpu/drcfe.ipp" + + /*************************************************************************** INSTRUCTION PARSERS ***************************************************************************/ -unsp_frontend::unsp_frontend(unsp_device *unsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) - : drc_frontend(*unsp, window_start, window_end, max_sequence) +unsp_device::frontend::frontend(unsp_device *unsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) + : drc_frontend_base(unsp->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_cpu(unsp) { } -inline uint16_t unsp_frontend::read_op_word(opcode_desc &desc, int offset) +unsp_device::frontend::~frontend() { - return m_cpu->m_cache.read_word(desc.physpc + offset); +} + +unsp_device::opcode_desc const *unsp_device::frontend::describe_code(offs_t startpc) +{ + return do_describe_code( + [this] (opcode_desc &desc, opcode_desc const *prev) { return describe(desc, prev); }, + startpc); +} + +inline uint16_t unsp_device::frontend::read_op_word(opcode_desc &desc, int offset) +{ + return m_cpu->m_cache.read_word(desc.pc + offset); } /*------------------------------------------------- @@ -32,9 +47,9 @@ inline uint16_t unsp_frontend::read_op_word(opcode_desc &desc, int offset) instruction -------------------------------------------------*/ -bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) +bool unsp_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint16_t op = desc.opptr.w[0] = read_op_word(desc, 0); + const uint16_t op = desc.opptr[0] = read_op_word(desc, 0); /* most instructions are 1 word */ desc.length = 1; @@ -69,17 +84,19 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 11: // JG case 12: // JVC case 13: // JVS - desc.regin[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; + desc.regin.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_conditional_branch(); + desc.set_end_sequence(); return true; case 14: // JMP - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); desc.targetpc = desc.pc + 1 + ((op1 == 0) ? opimm : (0 - opimm)); - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); return true; default: return false; @@ -90,12 +107,12 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) uint16_t r0 = opn; uint16_t r1 = opa; desc.cycles = 4 + 2 * r0; - desc.regin[0] |= 1 << opb; - desc.regout[0] |= 1 << opb; - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.regin.set(opb); + desc.regout.set(opb); + desc.set_writes_memory(); while (r0--) { - desc.regin[0] |= 1 << r1; + desc.regin.set(r1); r1--; } return true; @@ -105,12 +122,14 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (op == 0x9a98) // reti { desc.cycles = 8; - desc.regin[0] |= 1 << unsp_device::REG_SP; - desc.regout[0] |= 1 << unsp_device::REG_SP; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; + desc.regin.set(unsp_device::REG_SP); + desc.regout.set(unsp_device::REG_SP); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_READS_MEMORY; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_reads_memory(); return true; } else @@ -118,16 +137,18 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) uint16_t r0 = opn; uint16_t r1 = opa; desc.cycles = 4 + 2 * r0; - desc.regin[0] |= 1 << opb; - desc.regout[0] |= 1 << opb; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(opb); + desc.regout.set(opb); + desc.set_reads_memory(); while (r0--) { r1++; - desc.regout[0] |= 1 << r1; - if (r1 == unsp_device::REG_PC) { - desc.flags |= OPFLAG_END_SEQUENCE | OPFLAG_IS_UNCONDITIONAL_BRANCH; + desc.regout.set(r1); + if (r1 == unsp_device::REG_PC) + { + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } } return true; @@ -142,10 +163,10 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) if(opn == 1 && opa != 7) { desc.cycles = 12; - desc.regin[0] |= 1 << opa; - desc.regin[0] |= 1 << opb; - desc.regout[0] |= 1 << unsp_device::REG_R3; - desc.regout[0] |= 1 << unsp_device::REG_R4; + desc.regin.set(opa); + desc.regin.set(opb); + desc.regout.set(unsp_device::REG_R3); + desc.regout.set(unsp_device::REG_R4); return true; } return false; @@ -156,12 +177,15 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.cycles = 9; desc.length = 2; desc.targetpc = read_op_word(desc, 1) | ((op & 0x3f) << 16); - desc.flags = OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - desc.regin[0] |= 1 << unsp_device::REG_PC; - desc.regin[0] |= 1 << unsp_device::REG_SP; - desc.regout[0] |= 1 << unsp_device::REG_SP; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_reads_memory(); + desc.set_writes_memory(); + desc.regin.set(unsp_device::REG_PC); + desc.regin.set(unsp_device::REG_SP); + desc.regout.set(unsp_device::REG_SP); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); return true; } return false; @@ -172,10 +196,12 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) desc.cycles = 5; desc.length = 2; desc.targetpc = read_op_word(desc, 1) | ((op & 0x3f) << 16); - desc.flags = OPFLAG_READS_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; - desc.regin[0] |= 1 << unsp_device::REG_PC; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_reads_memory(); + desc.regin.set(unsp_device::REG_PC); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); return true; } return false; @@ -201,13 +227,14 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x06: case 0x07: // MULS - desc.regin[0] |= 1 << opa; - desc.regin[0] |= 1 << opb; - desc.regout[0] |= 1 << opa; - desc.regout[0] |= 1 << opb; - desc.regout[0] |= 1 << unsp_device::REG_R3; - desc.regout[0] |= 1 << unsp_device::REG_R4; - desc.flags = OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY; + desc.regin.set(opa); + desc.regin.set(opb); + desc.regout.set(opa); + desc.regout.set(opb); + desc.regout.set(unsp_device::REG_R3); + desc.regout.set(unsp_device::REG_R4); + desc.set_reads_memory(); + desc.set_writes_memory(); return true; default: @@ -217,15 +244,15 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) // At this point, we should be dealing solely with ALU ops. - desc.regin[0] |= 1 << opa; + desc.regin.set(opa); switch (op1) { case 0x00: // r, [bp+imm6] desc.cycles = 6; - desc.regin[0] |= 1 << unsp_device::REG_BP; + desc.regin.set(unsp_device::REG_BP); if (op0 != 0x0d) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; case 0x01: // r, imm6 @@ -241,21 +268,21 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) switch (lsbits) { case 0: // r, [r] - desc.regin[0] |= 1 << unsp_device::REG_SR; - desc.regin[0] |= 1 << opb; + desc.regin.set(unsp_device::REG_SR); + desc.regin.set(opb); if (op0 != 0x0d) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; case 1: // r, [r--] case 2: // r, [r++] case 3: // r, [++r] - desc.regin[0] |= 1 << unsp_device::REG_SR; - desc.regin[0] |= 1 << opb; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << opb; + desc.regin.set(unsp_device::REG_SR); + desc.regin.set(opb); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(opb); if (op0 != 0x0d) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; } } @@ -264,17 +291,17 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) switch (lsbits) { case 0: // r, [r] - desc.regin[0] |= 1 << opb; + desc.regin.set(opb); if (op0 != 0x0d) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; case 1: // r, [r--] case 2: // r, [r++] case 3: // r, [++r] - desc.regin[0] |= 1 << opb; - desc.regout[0] |= 1 << opb; + desc.regin.set(opb); + desc.regout.set(opb); if (op0 != 0x0d) - desc.flags |= OPFLAG_READS_MEMORY; + desc.set_reads_memory(); break; } } @@ -285,49 +312,49 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) switch (opn) { case 0x00: // r - desc.cycles = (opa == 7 ? 5 : 3); - desc.regin[0] |= 1 << opb; + desc.cycles = (opa == 7) ? 5 : 3; + desc.regin.set(opb); break; case 0x01: // imm16 - desc.cycles = (opa == 7 ? 5 : 4); + desc.cycles = (opa == 7) ? 5 : 4; desc.length = 2; - desc.regin[0] |= 1 << opb; - desc.regin[0] |= 1 << unsp_device::REG_SR; - desc.regin[0] |= 1 << unsp_device::REG_PC; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(opb); + desc.regin.set(unsp_device::REG_SR); + desc.regin.set(unsp_device::REG_PC); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); + desc.set_reads_memory(); break; case 0x02: // [imm16] case 0x03: // store [imm16], r - desc.cycles = (opa == 7 ? 8 : 7); + desc.cycles = (opa == 7) ? 8 : 7; desc.length = 2; - desc.regin[0] |= 1 << opb; - desc.regin[0] |= 1 << unsp_device::REG_SR; - desc.regin[0] |= 1 << unsp_device::REG_PC; - desc.regout[0] |= 1 << unsp_device::REG_SR; - desc.regout[0] |= 1 << unsp_device::REG_PC; - desc.flags |= OPFLAG_READS_MEMORY; + desc.regin.set(opb); + desc.regin.set(unsp_device::REG_SR); + desc.regin.set(unsp_device::REG_PC); + desc.regout.set(unsp_device::REG_SR); + desc.regout.set(unsp_device::REG_PC); + desc.set_reads_memory(); break; default: // Shifted ops - desc.cycles = (opa == 7 ? 5 : 3); - desc.regin[0] |= 1 << opb; + desc.cycles = (opa == 7) ? 5 : 3; + desc.regin.set(opb); break; } break; case 0x05: // More shifted ops case 0x06: // Rotated ops - desc.cycles = (opa == 7 ? 5 : 3); - desc.regin[0] |= 1 << opb; + desc.cycles = (opa == 7) ? 5 : 3; + desc.regin.set(opb); break; case 0x07: // Direct 8 - desc.cycles = (opa == 7 ? 6 : 5); - desc.flags |= OPFLAG_READS_MEMORY; + desc.cycles = (opa == 7) ? 6 : 5; + desc.set_reads_memory(); break; default: @@ -346,28 +373,29 @@ bool unsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x09: // Load case 0x0a: // OR case 0x0b: // AND - desc.regout[0] |= 1 << unsp_device::REG_SR; + desc.regout.set(unsp_device::REG_SR); break; case 0x04: // Compare case 0x0c: // Test - desc.regout[0] |= 1 << unsp_device::REG_SR; + desc.regout.set(unsp_device::REG_SR); return true; case 0x0d: // Store - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); return true; } if (op1 == 0x04 && opn == 0x03) // store [imm16], r { - desc.flags |= OPFLAG_WRITES_MEMORY; + desc.set_writes_memory(); } else { - desc.regout[0] |= 1 << opa; + desc.regout.set(opa); if (opa == 7) { desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } } diff --git a/src/devices/cpu/unsp/unspfe.h b/src/devices/cpu/unsp/unspfe.h index c30b2721e0a..60f9c4e6ce8 100644 --- a/src/devices/cpu/unsp/unspfe.h +++ b/src/devices/cpu/unsp/unspfe.h @@ -6,22 +6,55 @@ #pragma once #include "unsp.h" + #include "cpu/drcfe.h" -class unsp_frontend : public drc_frontend +#include + + +class unsp_device::opcode_desc : public opcode_desc_base { public: - unsp_frontend(unsp_device *unsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - void flush(); + uint16_t opptr[2]; // copy of opcode -protected: - // required overrides - virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override; + uint32_t cycles; // number of cycles needed to execute + + void set_reads_memory() { m_reads_memory = true; } + void set_writes_memory() { m_writes_memory = true; } + + bool reads_memory() const { return m_reads_memory; } + bool writes_memory() const { return m_writes_memory; } + + void reset(offs_t curpc, bool in_delay_slot) + { + opcode_desc_base::reset(curpc, in_delay_slot); + + std::fill(std::begin(opptr), std::end(opptr), 0); + cycles = 0; + m_reads_memory = false; + m_writes_memory = false; + } private: - inline uint16_t read_op_word(opcode_desc &desc, int offset); + bool m_reads_memory; + bool m_writes_memory; +}; + + +class unsp_device::frontend : public drc_frontend_base +{ +public: + frontend(unsp_device *unsp, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); + +private: + bool describe(opcode_desc &desc, const opcode_desc *prev); + + uint16_t read_op_word(opcode_desc &desc, int offset); unsp_device *m_cpu; }; -#endif /* MAME_CPU_UNSP_UNSPFE_H */ +#endif // MAME_CPU_UNSP_UNSPFE_H diff --git a/src/devices/sound/swp30.h b/src/devices/sound/swp30.h index 671130a9d40..fa03df9e50d 100644 --- a/src/devices/sound/swp30.h +++ b/src/devices/sound/swp30.h @@ -8,9 +8,9 @@ #pragma once -#include "cpu/drcfe.h" #include "cpu/drcuml.h" + class swp30_disassembler : public util::disasm_interface { public: From b3f2f76124c46c62dc633d202ad75315e66de888 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 2 Mar 2026 01:59:54 +0100 Subject: [PATCH 086/351] drcfe.ipp: fix compile --- src/devices/cpu/drcfe.ipp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/drcfe.ipp b/src/devices/cpu/drcfe.ipp index 681cb85c50a..ce6cf04efba 100644 --- a/src/devices/cpu/drcfe.ipp +++ b/src/devices/cpu/drcfe.ipp @@ -356,7 +356,7 @@ void drc_frontend_base::accumulate_required_backwards(Desc &desc, typename // if this is a branch, we have to reset our requests if (desc.is_branch()) - reqmask = reqmask = reqmask = reqmask.set(); + reqmask.set(); // determine the required registers desc.regreq = desc.regout & reqmask; From 9abbbce27ba592f63d8ca3a05a73e13c77217ec9 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 2 Mar 2026 04:50:28 +0100 Subject: [PATCH 087/351] cpu/nec: correction to addc/subb overflow flag calculation --- src/devices/cpu/nec/nec80inst.hxx | 36 ++++++++++++++-------------- src/devices/cpu/nec/necinstr.hxx | 40 +++++++++++++++---------------- src/devices/cpu/nec/necmacro.h | 6 +++++ 3 files changed, 44 insertions(+), 38 deletions(-) diff --git a/src/devices/cpu/nec/nec80inst.hxx b/src/devices/cpu/nec/nec80inst.hxx index 8bcf95f3acd..e5a106817da 100644 --- a/src/devices/cpu/nec/nec80inst.hxx +++ b/src/devices/cpu/nec/nec80inst.hxx @@ -133,14 +133,14 @@ OP80( 0x84, i_addh ) { uint32_t src = Breg(BH), dst = Breg(AL); ADDB; Breg(AL) OP80( 0x85, i_addl ) { uint32_t src = Breg(BL), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } OP80( 0x86, i_addm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } OP80( 0x87, i_adda ) { uint32_t src = Breg(AL), dst = Breg(AL); ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x88, i_adcb ) { uint32_t src = Breg(CH), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x89, i_adcc ) { uint32_t src = Breg(CL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x8a, i_adcd ) { uint32_t src = Breg(DH), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x8b, i_adce ) { uint32_t src = Breg(DL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x8c, i_adch ) { uint32_t src = Breg(BH), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x8d, i_adcl ) { uint32_t src = Breg(BL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x8e, i_adcm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } -OP80( 0x8f, i_adca ) { uint32_t src = Breg(AL), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0x88, i_adcb ) { uint32_t src = Breg(CH), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x89, i_adcc ) { uint32_t src = Breg(CL), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x8a, i_adcd ) { uint32_t src = Breg(DH), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x8b, i_adce ) { uint32_t src = Breg(DL), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x8c, i_adch ) { uint32_t src = Breg(BH), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x8d, i_adcl ) { uint32_t src = Breg(BL), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x8e, i_adcm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } +OP80( 0x8f, i_adca ) { uint32_t src = Breg(AL), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } OP80( 0x90, i_subb ) { uint32_t src = Breg(CH), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } OP80( 0x91, i_subc ) { uint32_t src = Breg(CL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } OP80( 0x92, i_subd ) { uint32_t src = Breg(DH), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } @@ -149,14 +149,14 @@ OP80( 0x94, i_subh ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBB; Breg(AL) OP80( 0x95, i_subl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } OP80( 0x96, i_subm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } OP80( 0x97, i_suba ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x98, i_sbbb ) { uint32_t src = Breg(CH), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x99, i_sbbc ) { uint32_t src = Breg(CL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9a, i_sbbd ) { uint32_t src = Breg(DH), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9b, i_sbbe ) { uint32_t src = Breg(DL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9c, i_sbbh ) { uint32_t src = Breg(BH), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9d, i_sbbl ) { uint32_t src = Breg(BL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9e, i_sbbm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9f, i_sbba ) { uint32_t src = Breg(AL), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0x98, i_sbbb ) { uint32_t src = Breg(CH), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x99, i_sbbc ) { uint32_t src = Breg(CL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9a, i_sbbd ) { uint32_t src = Breg(DH), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9b, i_sbbe ) { uint32_t src = Breg(DL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9c, i_sbbh ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9d, i_sbbl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9e, i_sbbm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x9f, i_sbba ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } OP80( 0xa0, i_anab ) { uint32_t src = Breg(CH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } OP80( 0xa1, i_anac ) { uint32_t src = Breg(CL), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } OP80( 0xa2, i_anad ) { uint32_t src = Breg(DH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } @@ -202,7 +202,7 @@ OP80( 0xc9, i_ret ) { POP80(m_ip); CHANGE_PC; CLK(1); } //0xd9 OP80( 0xca, i_jz ) { uint32_t addr = fetchword(); if (ZF) { m_ip = addr; CHANGE_PC; } CLK(1); } OP80( 0xcc, i_cz ) { uint32_t addr = fetchword(); if (ZF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } OP80( 0xcd, i_call ) { uint32_t addr = fetchword(); PUSH80(m_ip); m_ip = addr; CHANGE_PC; CLK(1); } // 0xdd, 0xfd -OP80( 0xce, i_aci ) { uint32_t src = fetch(), dst = Breg(AL); src+=CF; ADDB; Breg(AL) = dst; CLK(1); } +OP80( 0xce, i_aci ) { uint32_t src = fetch(), dst = Breg(AL); ADDCB; Breg(AL) = dst; CLK(1); } OP80( 0xcf, i_rst1 ) { PUSH80(m_ip); m_ip = 8; CHANGE_PC; CLK(1); } OP80( 0xd0, i_rnc ) { if (!CF) { POP80(m_ip); CHANGE_PC; } CLK(1); } OP80( 0xd1, i_popd ) { POP80(Wreg(DW)); } @@ -216,7 +216,7 @@ OP80( 0xd8, i_rc ) { if (CF) { POP80(m_ip); CHANGE_PC; } CLK(1); } OP80( 0xda, i_jc ) { uint32_t addr = fetchword(); if (CF) { m_ip = addr; CHANGE_PC; } CLK(1); } OP80( 0xdb, i_in ) { uint8_t port = fetch(); Breg(AL) = read_port_byte(port); CLK(1); } OP80( 0xdc, i_cc ) { uint32_t addr = fetchword(); if (CF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } -OP80( 0xde, i_sbi ) { uint32_t src = fetch(), dst = Breg(AL); src+=CF; SUBB; Breg(AL) = dst; CLK(1); } +OP80( 0xde, i_sbi ) { uint32_t src = fetch(), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } OP80( 0xdf, i_rst3 ) { PUSH80(m_ip); m_ip = 0x18; CHANGE_PC; CLK(1); } OP80( 0xe0, i_rpo ) { if (!PF) { POP80(m_ip); CHANGE_PC; } CLK(1); } OP80( 0xe1, i_poph ) { POP80(Wreg(BW)); } diff --git a/src/devices/cpu/nec/necinstr.hxx b/src/devices/cpu/nec/necinstr.hxx index f19e777027a..a8b598c93c3 100644 --- a/src/devices/cpu/nec/necinstr.hxx +++ b/src/devices/cpu/nec/necinstr.hxx @@ -284,21 +284,21 @@ OP( 0x0f, i_pre_nec ) { uint32_t ModRM, tmp, tmp2; } } -OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } -OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,m_EA);} -OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } -OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); } -OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; Breg(AL)=dst; CLKS(4,4,2); } -OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; Wreg(AW)=dst; CLKS(4,4,2); } +OP( 0x10, i_adc_br8 ) { DEF_br8; ADDCB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x11, i_adc_wr16 ) { DEF_wr16; ADDCW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,m_EA);} +OP( 0x12, i_adc_r8b ) { DEF_r8b; ADDCB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x13, i_adc_r16w ) { DEF_r16w; ADDCW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); } +OP( 0x14, i_adc_ald8 ) { DEF_ald8; ADDCB; Breg(AL)=dst; CLKS(4,4,2); } +OP( 0x15, i_adc_axd16) { DEF_axd16; ADDCW; Wreg(AW)=dst; CLKS(4,4,2); } OP( 0x16, i_push_ss ) { PUSH(Sreg(SS)); CLKS(12,8,3); } OP( 0x17, i_pop_ss ) { POP(Sreg(SS)); CLKS(12,8,5); m_no_interrupt=1; } -OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } -OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,m_EA);} -OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } -OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); } -OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; Breg(AL)=dst; CLKS(4,4,2); } -OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; Wreg(AW)=dst; CLKS(4,4,2); } +OP( 0x18, i_sbb_br8 ) { DEF_br8; SUBBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x19, i_sbb_wr16 ) { DEF_wr16; SUBBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,m_EA);} +OP( 0x1a, i_sbb_r8b ) { DEF_r8b; SUBBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x1b, i_sbb_r16w ) { DEF_r16w; SUBBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); } +OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; SUBBB; Breg(AL)=dst; CLKS(4,4,2); } +OP( 0x1d, i_sbb_axd16) { DEF_axd16; SUBBW; Wreg(AW)=dst; CLKS(4,4,2); } OP( 0x1e, i_push_ds ) { PUSH(Sreg(DS0)); CLKS(12,8,3); } OP( 0x1f, i_pop_ds ) { POP(Sreg(DS0)); CLKS(12,8,5); } @@ -443,8 +443,8 @@ OP( 0x80, i_80pre ) { uint32_t dst, src; GetModRM; dst = GetRMByte(ModRM); src switch (ModRM & 0x38) { case 0x00: ADDB; PutbackRMByte(ModRM,dst); break; case 0x08: ORB; PutbackRMByte(ModRM,dst); break; - case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break; - case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break; + case 0x10: ADDCB; PutbackRMByte(ModRM,dst); break; + case 0x18: SUBBB; PutbackRMByte(ModRM,dst); break; case 0x20: ANDB; PutbackRMByte(ModRM,dst); break; case 0x28: SUBB; PutbackRMByte(ModRM,dst); break; case 0x30: XORB; PutbackRMByte(ModRM,dst); break; @@ -457,8 +457,8 @@ OP( 0x81, i_81pre ) { uint32_t dst, src; GetModRM; dst = GetRMWord(ModRM); src switch (ModRM & 0x38) { case 0x00: ADDW; PutbackRMWord(ModRM,dst); break; case 0x08: ORW; PutbackRMWord(ModRM,dst); break; - case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break; - case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break; + case 0x10: ADDCW; PutbackRMWord(ModRM,dst); break; + case 0x18: SUBBW; PutbackRMWord(ModRM,dst); break; case 0x20: ANDW; PutbackRMWord(ModRM,dst); break; case 0x28: SUBW; PutbackRMWord(ModRM,dst); break; case 0x30: XORW; PutbackRMWord(ModRM,dst); break; @@ -471,8 +471,8 @@ OP( 0x82, i_82pre ) { uint32_t dst, src; GetModRM; dst = GetRMByte(ModRM); src switch (ModRM & 0x38) { case 0x00: ADDB; PutbackRMByte(ModRM,dst); break; case 0x08: ORB; PutbackRMByte(ModRM,dst); break; - case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break; - case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break; + case 0x10: ADDCB; PutbackRMByte(ModRM,dst); break; + case 0x18: SUBBB; PutbackRMByte(ModRM,dst); break; case 0x20: ANDB; PutbackRMByte(ModRM,dst); break; case 0x28: SUBB; PutbackRMByte(ModRM,dst); break; case 0x30: XORB; PutbackRMByte(ModRM,dst); break; @@ -485,8 +485,8 @@ OP( 0x83, i_83pre ) { uint32_t dst, src; GetModRM; dst = GetRMWord(ModRM); src switch (ModRM & 0x38) { case 0x00: ADDW; PutbackRMWord(ModRM,dst); break; case 0x08: ORW; PutbackRMWord(ModRM,dst); break; - case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break; - case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break; + case 0x10: ADDCW; PutbackRMWord(ModRM,dst); break; + case 0x18: SUBBW; PutbackRMWord(ModRM,dst); break; case 0x20: ANDW; PutbackRMWord(ModRM,dst); break; case 0x28: SUBW; PutbackRMWord(ModRM,dst); break; case 0x30: XORW; PutbackRMWord(ModRM,dst); break; diff --git a/src/devices/cpu/nec/necmacro.h b/src/devices/cpu/nec/necmacro.h index e6c04d6f44c..c9f1d31bb63 100644 --- a/src/devices/cpu/nec/necmacro.h +++ b/src/devices/cpu/nec/necmacro.h @@ -25,9 +25,15 @@ #define ADDB { uint32_t res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } #define ADDW { uint32_t res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } +#define ADDCB { uint32_t res=dst+src+CF; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } +#define ADDCW { uint32_t res=dst+src+CF; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } + #define SUBB { uint32_t res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } #define SUBW { uint32_t res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } +#define SUBBB { uint32_t res=dst-src-CF; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } +#define SUBBW { uint32_t res=dst-src-CF; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } + #define ORB dst|=src; m_CarryVal=m_OverVal=m_AuxVal=0; SetSZPF_Byte(dst) #define ORW dst|=src; m_CarryVal=m_OverVal=m_AuxVal=0; SetSZPF_Word(dst) From d87f59736550a3d3f557f0fe268eb2e5436ae7b1 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 2 Mar 2026 05:38:00 +0100 Subject: [PATCH 088/351] cpu/nec: correct name after prev commit (subc, not subb) --- src/devices/cpu/nec/nec80inst.hxx | 18 +++++++++--------- src/devices/cpu/nec/necinstr.hxx | 20 ++++++++++---------- src/devices/cpu/nec/necmacro.h | 4 ++-- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/src/devices/cpu/nec/nec80inst.hxx b/src/devices/cpu/nec/nec80inst.hxx index e5a106817da..a1be658a69d 100644 --- a/src/devices/cpu/nec/nec80inst.hxx +++ b/src/devices/cpu/nec/nec80inst.hxx @@ -149,14 +149,14 @@ OP80( 0x94, i_subh ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBB; Breg(AL) OP80( 0x95, i_subl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } OP80( 0x96, i_subm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } OP80( 0x97, i_suba ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBB; Breg(AL) = dst; CLK(1); } -OP80( 0x98, i_sbbb ) { uint32_t src = Breg(CH), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x99, i_sbbc ) { uint32_t src = Breg(CL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9a, i_sbbd ) { uint32_t src = Breg(DH), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9b, i_sbbe ) { uint32_t src = Breg(DL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9c, i_sbbh ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9d, i_sbbl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9e, i_sbbm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } -OP80( 0x9f, i_sbba ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0x98, i_sbbb ) { uint32_t src = Breg(CH), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x99, i_sbbc ) { uint32_t src = Breg(CL), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x9a, i_sbbd ) { uint32_t src = Breg(DH), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x9b, i_sbbe ) { uint32_t src = Breg(DL), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x9c, i_sbbh ) { uint32_t src = Breg(BH), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x9d, i_sbbl ) { uint32_t src = Breg(BL), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x9e, i_sbbm ) { uint32_t src = GetMemB(DS0, Wreg(BW)), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } +OP80( 0x9f, i_sbba ) { uint32_t src = Breg(AL), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } OP80( 0xa0, i_anab ) { uint32_t src = Breg(CH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } OP80( 0xa1, i_anac ) { uint32_t src = Breg(CL), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } OP80( 0xa2, i_anad ) { uint32_t src = Breg(DH), dst = Breg(AL); ANDB; Breg(AL) = dst; CLK(1); } @@ -216,7 +216,7 @@ OP80( 0xd8, i_rc ) { if (CF) { POP80(m_ip); CHANGE_PC; } CLK(1); } OP80( 0xda, i_jc ) { uint32_t addr = fetchword(); if (CF) { m_ip = addr; CHANGE_PC; } CLK(1); } OP80( 0xdb, i_in ) { uint8_t port = fetch(); Breg(AL) = read_port_byte(port); CLK(1); } OP80( 0xdc, i_cc ) { uint32_t addr = fetchword(); if (CF) { PUSH80(m_ip); m_ip = addr; CHANGE_PC; } CLK(1); } -OP80( 0xde, i_sbi ) { uint32_t src = fetch(), dst = Breg(AL); SUBBB; Breg(AL) = dst; CLK(1); } +OP80( 0xde, i_sbi ) { uint32_t src = fetch(), dst = Breg(AL); SUBCB; Breg(AL) = dst; CLK(1); } OP80( 0xdf, i_rst3 ) { PUSH80(m_ip); m_ip = 0x18; CHANGE_PC; CLK(1); } OP80( 0xe0, i_rpo ) { if (!PF) { POP80(m_ip); CHANGE_PC; } CLK(1); } OP80( 0xe1, i_poph ) { POP80(Wreg(BW)); } diff --git a/src/devices/cpu/nec/necinstr.hxx b/src/devices/cpu/nec/necinstr.hxx index a8b598c93c3..b81009b17cf 100644 --- a/src/devices/cpu/nec/necinstr.hxx +++ b/src/devices/cpu/nec/necinstr.hxx @@ -293,12 +293,12 @@ OP( 0x15, i_adc_axd16) { DEF_axd16; ADDCW; Wreg(AW)=dst; CLKS(4,4,2) OP( 0x16, i_push_ss ) { PUSH(Sreg(SS)); CLKS(12,8,3); } OP( 0x17, i_pop_ss ) { POP(Sreg(SS)); CLKS(12,8,5); m_no_interrupt=1; } -OP( 0x18, i_sbb_br8 ) { DEF_br8; SUBBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } -OP( 0x19, i_sbb_wr16 ) { DEF_wr16; SUBBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,m_EA);} -OP( 0x1a, i_sbb_r8b ) { DEF_r8b; SUBBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } -OP( 0x1b, i_sbb_r16w ) { DEF_r16w; SUBBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); } -OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; SUBBB; Breg(AL)=dst; CLKS(4,4,2); } -OP( 0x1d, i_sbb_axd16) { DEF_axd16; SUBBW; Wreg(AW)=dst; CLKS(4,4,2); } +OP( 0x18, i_sbb_br8 ) { DEF_br8; SUBCB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); } +OP( 0x19, i_sbb_wr16 ) { DEF_wr16; SUBCW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,m_EA);} +OP( 0x1a, i_sbb_r8b ) { DEF_r8b; SUBCB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); } +OP( 0x1b, i_sbb_r16w ) { DEF_r16w; SUBCW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); } +OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; SUBCB; Breg(AL)=dst; CLKS(4,4,2); } +OP( 0x1d, i_sbb_axd16) { DEF_axd16; SUBCW; Wreg(AW)=dst; CLKS(4,4,2); } OP( 0x1e, i_push_ds ) { PUSH(Sreg(DS0)); CLKS(12,8,3); } OP( 0x1f, i_pop_ds ) { POP(Sreg(DS0)); CLKS(12,8,5); } @@ -444,7 +444,7 @@ OP( 0x80, i_80pre ) { uint32_t dst, src; GetModRM; dst = GetRMByte(ModRM); src case 0x00: ADDB; PutbackRMByte(ModRM,dst); break; case 0x08: ORB; PutbackRMByte(ModRM,dst); break; case 0x10: ADDCB; PutbackRMByte(ModRM,dst); break; - case 0x18: SUBBB; PutbackRMByte(ModRM,dst); break; + case 0x18: SUBCB; PutbackRMByte(ModRM,dst); break; case 0x20: ANDB; PutbackRMByte(ModRM,dst); break; case 0x28: SUBB; PutbackRMByte(ModRM,dst); break; case 0x30: XORB; PutbackRMByte(ModRM,dst); break; @@ -458,7 +458,7 @@ OP( 0x81, i_81pre ) { uint32_t dst, src; GetModRM; dst = GetRMWord(ModRM); src case 0x00: ADDW; PutbackRMWord(ModRM,dst); break; case 0x08: ORW; PutbackRMWord(ModRM,dst); break; case 0x10: ADDCW; PutbackRMWord(ModRM,dst); break; - case 0x18: SUBBW; PutbackRMWord(ModRM,dst); break; + case 0x18: SUBCW; PutbackRMWord(ModRM,dst); break; case 0x20: ANDW; PutbackRMWord(ModRM,dst); break; case 0x28: SUBW; PutbackRMWord(ModRM,dst); break; case 0x30: XORW; PutbackRMWord(ModRM,dst); break; @@ -472,7 +472,7 @@ OP( 0x82, i_82pre ) { uint32_t dst, src; GetModRM; dst = GetRMByte(ModRM); src case 0x00: ADDB; PutbackRMByte(ModRM,dst); break; case 0x08: ORB; PutbackRMByte(ModRM,dst); break; case 0x10: ADDCB; PutbackRMByte(ModRM,dst); break; - case 0x18: SUBBB; PutbackRMByte(ModRM,dst); break; + case 0x18: SUBCB; PutbackRMByte(ModRM,dst); break; case 0x20: ANDB; PutbackRMByte(ModRM,dst); break; case 0x28: SUBB; PutbackRMByte(ModRM,dst); break; case 0x30: XORB; PutbackRMByte(ModRM,dst); break; @@ -486,7 +486,7 @@ OP( 0x83, i_83pre ) { uint32_t dst, src; GetModRM; dst = GetRMWord(ModRM); src case 0x00: ADDW; PutbackRMWord(ModRM,dst); break; case 0x08: ORW; PutbackRMWord(ModRM,dst); break; case 0x10: ADDCW; PutbackRMWord(ModRM,dst); break; - case 0x18: SUBBW; PutbackRMWord(ModRM,dst); break; + case 0x18: SUBCW; PutbackRMWord(ModRM,dst); break; case 0x20: ANDW; PutbackRMWord(ModRM,dst); break; case 0x28: SUBW; PutbackRMWord(ModRM,dst); break; case 0x30: XORW; PutbackRMWord(ModRM,dst); break; diff --git a/src/devices/cpu/nec/necmacro.h b/src/devices/cpu/nec/necmacro.h index c9f1d31bb63..c286ef99071 100644 --- a/src/devices/cpu/nec/necmacro.h +++ b/src/devices/cpu/nec/necmacro.h @@ -31,8 +31,8 @@ #define SUBB { uint32_t res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } #define SUBW { uint32_t res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } -#define SUBBB { uint32_t res=dst-src-CF; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } -#define SUBBW { uint32_t res=dst-src-CF; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } +#define SUBCB { uint32_t res=dst-src-CF; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } +#define SUBCW { uint32_t res=dst-src-CF; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } #define ORB dst|=src; m_CarryVal=m_OverVal=m_AuxVal=0; SetSZPF_Byte(dst) #define ORW dst|=src; m_CarryVal=m_OverVal=m_AuxVal=0; SetSZPF_Word(dst) From 28ac9e5d1dd88493372667aa80c24dcc8befe3b0 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 2 Mar 2026 17:47:53 +1100 Subject: [PATCH 089/351] -cpu/powerpc: Fixed floating point comparison flags. * Fixes various things that were always broken with the C and ARM backends or worked by chance with the x86-64 and i686 back-end. * Also commented out some constexpr for now. -cpu/drcfe.h: Added some helpers. -cpu/sharc/sharcfe.cpp: Don't use memset to clear loop entries. --- src/devices/cpu/drcfe.h | 15 +++++++++++ src/devices/cpu/powerpc/ppccom.cpp | 40 +++++++++++++++--------------- src/devices/cpu/powerpc/ppcdrc.cpp | 4 +-- src/devices/cpu/powerpc/ppcfe.h | 5 ++-- src/devices/cpu/sharc/sharcfe.cpp | 9 +++---- src/devices/cpu/sharc/sharcfe.h | 2 ++ 6 files changed, 45 insertions(+), 30 deletions(-) diff --git a/src/devices/cpu/drcfe.h b/src/devices/cpu/drcfe.h index 6822028428c..e9d0333a550 100644 --- a/src/devices/cpu/drcfe.h +++ b/src/devices/cpu/drcfe.h @@ -34,6 +34,7 @@ #pragma once #include +#include #include @@ -159,6 +160,20 @@ protected: set_in_delay_slot(); } + // TODO: make these constexpr when GCC/GNU libstdc++ catch up + template + static std::enable_if_t regmask_field(regmask const &r) + { + static_assert((Width > 0) && ((Start + Width) <= N)); + return ((r << (N - Start - Width)) >> (N - Width)).to_ulong(); + } + template + static std::enable_if_t<(Width > (sizeof(unsigned long) * 8)) && (Width <= (sizeof(unsigned long long) * 8)), unsigned long long> regmask_field(regmask const &r) + { + static_assert((Width > 0) && ((Start + Width) <= N)); + return ((r << (N - Start - Width)) >> (N - Width)).to_ullong(); + } + std::bitset m_flags; }; diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp index 1e4c903d89e..79e591e197a 100644 --- a/src/devices/cpu/powerpc/ppccom.cpp +++ b/src/devices/cpu/powerpc/ppccom.cpp @@ -169,33 +169,33 @@ static const uint8_t fcmp_cr_table_source[32] = /* ...V. */ 0x4, /* ...VC */ 0x8, /* ..Z.. */ 0x2, - /* ..Z.C */ 0xa, + /* ..Z.C */ 0x2, /* ..ZV. */ 0x2, - /* ..ZVC */ 0xa, + /* ..ZVC */ 0x2, /* .S... */ 0x4, /* .S..C */ 0x8, /* .S.V. */ 0x4, /* .S.VC */ 0x8, /* .SZ.. */ 0x2, - /* .SZ.C */ 0xa, + /* .SZ.C */ 0x2, /* .SZV. */ 0x2, - /* .SZVC */ 0xa, - /* U.... */ 0x5, - /* U...C */ 0x9, - /* U..V. */ 0x5, - /* U..VC */ 0x9, - /* U.Z.. */ 0x3, - /* U.Z.C */ 0xb, - /* U.ZV. */ 0x3, - /* U.ZVC */ 0xb, - /* US... */ 0x5, - /* US..C */ 0x9, - /* US.V. */ 0x5, - /* US.VC */ 0x9, - /* USZ.. */ 0x3, - /* USZ.C */ 0xb, - /* USZV. */ 0x3, - /* USZVC */ 0xb + /* .SZVC */ 0x2, + /* U.... */ 0x1, + /* U...C */ 0x1, + /* U..V. */ 0x1, + /* U..VC */ 0x1, + /* U.Z.. */ 0x1, + /* U.Z.C */ 0x1, + /* U.ZV. */ 0x1, + /* U.ZVC */ 0x1, + /* US... */ 0x1, + /* US..C */ 0x1, + /* US.V. */ 0x1, + /* US.VC */ 0x1, + /* USZ.. */ 0x1, + /* USZ.C */ 0x1, + /* USZV. */ 0x1, + /* USZVC */ 0x1 }; diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp index ecb4fe09024..1ced08d9dc5 100644 --- a/src/devices/cpu/powerpc/ppcdrc.cpp +++ b/src/devices/cpu/powerpc/ppcdrc.cpp @@ -1761,8 +1761,6 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta void ppc_device::generate_compute_flags(drcuml_block &block, const opcode_desc *desc, int updatecr, uint32_t xermask, int invertcarry) { - uint32_t xerflags; - /* modify inputs based on required flags */ if (!DISABLE_FLAG_OPTIMIZATIONS) { @@ -1771,7 +1769,7 @@ void ppc_device::generate_compute_flags(drcuml_block &block, const opcode_desc * if (!frontend::REGFLAG_CR(desc->regreq, 0)) updatecr = 0; } - xerflags = ((xermask & XER_OV) ? uml::FLAG_V : 0) | ((xermask & XER_CA) ? uml::FLAG_C : 0); + const uint32_t xerflags = ((xermask & XER_OV) ? uml::FLAG_V : 0) | ((xermask & XER_CA) ? uml::FLAG_C : 0); /* easy case: nothing to do */ if (!updatecr && xermask == 0) diff --git a/src/devices/cpu/powerpc/ppcfe.h b/src/devices/cpu/powerpc/ppcfe.h index 840a72c448f..b72f9256fb9 100644 --- a/src/devices/cpu/powerpc/ppcfe.h +++ b/src/devices/cpu/powerpc/ppcfe.h @@ -75,11 +75,12 @@ protected: class ppc_device::frontend : public drc_frontend_base { public: + // TODO: uncomment constexpr when GCC/GNU libstdc++ catch up static constexpr bool REGFLAG_R(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_R0 + n]; } static constexpr bool REGFLAG_RZ(const opcode_desc::regmask &r, unsigned n) { return n && REGFLAG_R(r, n); } static constexpr bool REGFLAG_FR(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_FR0 + n]; } - static constexpr uint32_t REGFLAG_CR(const opcode_desc::regmask &r) { return uint32_t(((r << 32) >> (128 - 32)).to_ulong()); } - static constexpr uint8_t REGFLAG_CR(const opcode_desc::regmask &r, unsigned n) { return uint8_t(((r << ((4 * n) + 32)) >> (128 - 4)).to_ulong()); } + static /*constexpr*/ uint32_t REGFLAG_CR(const opcode_desc::regmask &r) { return uint32_t(((r << 32) >> (128 - 32)).to_ulong()); } + static /*constexpr*/ uint8_t REGFLAG_CR(const opcode_desc::regmask &r, unsigned n) { return uint8_t(((r << ((4 * n) + 32)) >> (128 - 4)).to_ulong()); } static constexpr bool REGFLAG_CR_BIT(const opcode_desc::regmask &r, unsigned n) { return r[64 + 31 - n]; } static constexpr bool REGFLAG_XER_CA(const opcode_desc::regmask &r) { return r[REG_BIT_XER_CA]; } static constexpr bool REGFLAG_XER_OV(const opcode_desc::regmask &r) { return r[REG_BIT_XER_OV]; } diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp index 6fee42cf68d..4e601f398c6 100644 --- a/src/devices/cpu/sharc/sharcfe.cpp +++ b/src/devices/cpu/sharc/sharcfe.cpp @@ -37,15 +37,14 @@ adsp21062_device::opcode_desc const *adsp21062_device::frontend::describe_code(o void adsp21062_device::frontend::flush() { - LOOP_ENTRY *map = m_loopmap.get(); - - memset(map, 0, sizeof(LOOP_ENTRY) * 0x20000); + for (unsigned i = 0; 0x20000 > i; ++i) + m_loopmap[i].clear(); } void adsp21062_device::frontend::add_loop_entry(uint32_t pc, uint8_t type, opcode_desc::extra_flags const &userflags) { - uint32_t l2 = pc >> 17; - uint32_t l1 = pc & 0x1ffff; + uint32_t const l2 = pc >> 17; + uint32_t const l1 = pc & 0x1ffff; if (l2 != 0x1) fatalerror("adsp21062_device::frontend::add_loop_entry: PC = %08X", pc); diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h index 01be597b2a5..a3493d9cd91 100644 --- a/src/devices/cpu/sharc/sharcfe.h +++ b/src/devices/cpu/sharc/sharcfe.h @@ -254,6 +254,8 @@ private: { uint16_t entrytype; opcode_desc::extra_flags userflags; + + void clear() { entrytype = 0; userflags.reset(); } }; struct LOOP_DESCRIPTOR From ea1dad92a343ca0c7df7421a1f0cfd1057b57636 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 2 Mar 2026 13:17:56 +0100 Subject: [PATCH 090/351] i86: correction to adc/sbb overflow flag calculation --- src/devices/cpu/i86/i86.cpp | 110 ++++++++++++++------------------ src/devices/cpu/i86/i86.h | 8 +-- src/devices/cpu/i86/i86inline.h | 16 ++--- 3 files changed, 60 insertions(+), 74 deletions(-) diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index fca50dceb76..31293a4386d 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -806,8 +806,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op) case 0x10: // i_adc_br8 { DEF_br8(); - m_src += CF ? 1 : 0; - uint32_t tmpcf = ADDB(); + uint32_t tmpcf = ADDB(CF ? 1 : 0); PutbackRMByte(m_dst); set_CFB(tmpcf); CLKM(ALU_RR8,ALU_MR8); @@ -816,8 +815,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op) case 0x11: // i_adc_wr16 { DEF_wr16(); - m_src += CF ? 1 : 0; - uint32_t tmpcf = ADDX(); + uint32_t tmpcf = ADDX(CF ? 1 : 0); PutbackRMWord(m_dst); set_CFW(tmpcf); CLKM(ALU_RR16,ALU_MR16); @@ -826,32 +824,28 @@ bool i8086_common_cpu_device::common_op(uint8_t op) case 0x12: // i_adc_r8b DEF_r8b(); - m_src += CF ? 1 : 0; - set_CFB(ADDB()); + set_CFB(ADDB(CF ? 1 : 0)); RegByte(m_dst); CLKM(ALU_RR8,ALU_RM8); break; case 0x13: // i_adc_r16w DEF_r16w(); - m_src += CF ? 1 : 0; - set_CFW(ADDX()); + set_CFW(ADDX(CF ? 1 : 0)); RegWord(m_dst); CLKM(ALU_RR16,ALU_RM16); break; case 0x14: // i_adc_ald8 DEF_ald8(); - m_src += CF ? 1 : 0; - set_CFB(ADDB()); + set_CFB(ADDB(CF ? 1 : 0)); m_regs.b[AL] = m_dst; CLK(ALU_RI8); break; case 0x15: // i_adc_axd16 DEF_axd16(); - m_src += CF ? 1 : 0; - set_CFW(ADDX()); + set_CFW(ADDX(CF ? 1 : 0)); m_regs.w[AX] = m_dst; CLK(ALU_RI16); break; @@ -869,10 +863,8 @@ bool i8086_common_cpu_device::common_op(uint8_t op) case 0x18: // i_sbb_br8 { - uint32_t tmpcf; DEF_br8(); - m_src += CF ? 1 : 0; - tmpcf = SUBB(); + uint32_t tmpcf = SUBB(CF ? 1 : 0); PutbackRMByte(m_dst); set_CFB(tmpcf); CLKM(ALU_RR8,ALU_MR8); @@ -881,10 +873,8 @@ bool i8086_common_cpu_device::common_op(uint8_t op) case 0x19: // i_sbb_wr16 { - uint32_t tmpcf; DEF_wr16(); - m_src += CF ? 1 : 0; - tmpcf = SUBX(); + uint32_t tmpcf = SUBX(CF ? 1 : 0); PutbackRMWord(m_dst); set_CFW(tmpcf); CLKM(ALU_RR16,ALU_MR16); @@ -893,32 +883,28 @@ bool i8086_common_cpu_device::common_op(uint8_t op) case 0x1a: // i_sbb_r8b DEF_r8b(); - m_src += CF ? 1 : 0; - set_CFB(SUBB()); + set_CFB(SUBB(CF ? 1 : 0)); RegByte(m_dst); CLKM(ALU_RR8,ALU_RM8); break; case 0x1b: // i_sbb_r16w DEF_r16w(); - m_src += CF ? 1 : 0; - set_CFW(SUBX()); + set_CFW(SUBX(CF ? 1 : 0)); RegWord(m_dst); CLKM(ALU_RR16,ALU_RM16); break; case 0x1c: // i_sbb_ald8 DEF_ald8(); - m_src += CF ? 1 : 0; - set_CFB(SUBB()); + set_CFB(SUBB(CF ? 1 : 0)); m_regs.b[AL] = m_dst; CLK(ALU_RI8); break; case 0x1d: // i_sbb_axd16 DEF_axd16(); - m_src += CF ? 1 : 0; - set_CFW(SUBX()); + set_CFW(SUBX(CF ? 1 : 0)); m_regs.w[AX] = m_dst; CLK(ALU_RI16); break; @@ -1401,19 +1387,19 @@ bool i8086_common_cpu_device::common_op(uint8_t op) m_modrm = fetch(); m_dst = GetRMByte(); m_src = fetch(); - if (m_modrm >=0xc0 ) { CLK(ALU_RI8); } + if (m_modrm >= 0xc0) { CLK(ALU_RI8); } else if ((m_modrm & 0x38)==0x38) { CLK(ALU_MI8_RO); } else { CLK(ALU_MI8); } switch (m_modrm & 0x38) { - case 0x00: set_CFB(ADDB()); PutbackRMByte(m_dst); break; - case 0x08: ORB(); PutbackRMByte(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; tmpcf = ADDB(); PutbackRMByte(m_dst); set_CFB(tmpcf); break; - case 0x18: m_src += CF ? 1 : 0; tmpcf = SUBB(); PutbackRMByte(m_dst); set_CFB(tmpcf); break; - case 0x20: ANDB(); PutbackRMByte(m_dst); break; - case 0x28: set_CFB(SUBB()); PutbackRMByte(m_dst); break; - case 0x30: XORB(); PutbackRMByte(m_dst); break; - case 0x38: set_CFB(SUBB()); break; /* CMP */ + case 0x00: set_CFB(ADDB()); PutbackRMByte(m_dst); break; + case 0x08: ORB(); PutbackRMByte(m_dst); break; + case 0x10: tmpcf = ADDB(CF ? 1 : 0); PutbackRMByte(m_dst); set_CFB(tmpcf); break; + case 0x18: tmpcf = SUBB(CF ? 1 : 0); PutbackRMByte(m_dst); set_CFB(tmpcf); break; + case 0x20: ANDB(); PutbackRMByte(m_dst); break; + case 0x28: set_CFB(SUBB()); PutbackRMByte(m_dst); break; + case 0x30: XORB(); PutbackRMByte(m_dst); break; + case 0x38: set_CFB(SUBB()); break; /* CMP */ } break; } @@ -1425,19 +1411,19 @@ bool i8086_common_cpu_device::common_op(uint8_t op) m_modrm = fetch(); m_dst = GetRMWord(); m_src = fetch_word(); - if (m_modrm >=0xc0 ) { CLK(ALU_RI16); } + if (m_modrm >= 0xc0) { CLK(ALU_RI16); } else if ((m_modrm & 0x38)==0x38) { CLK(ALU_MI16_RO); } else { CLK(ALU_MI16); } switch (m_modrm & 0x38) { - case 0x00: set_CFW(ADDX()); PutbackRMWord(m_dst); break; - case 0x08: ORW(); PutbackRMWord(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; tmpcf = ADDX(); PutbackRMWord(m_dst); set_CFW(tmpcf); break; - case 0x18: m_src += CF ? 1 : 0; tmpcf = SUBX(); PutbackRMWord(m_dst); set_CFW(tmpcf); break; - case 0x20: ANDX(); PutbackRMWord(m_dst); break; - case 0x28: set_CFW(SUBX()); PutbackRMWord(m_dst); break; - case 0x30: XORW(); PutbackRMWord(m_dst); break; - case 0x38: set_CFW(SUBX()); break; /* CMP */ + case 0x00: set_CFW(ADDX()); PutbackRMWord(m_dst); break; + case 0x08: ORW(); PutbackRMWord(m_dst); break; + case 0x10: tmpcf = ADDX(CF ? 1 : 0); PutbackRMWord(m_dst); set_CFW(tmpcf); break; + case 0x18: tmpcf = SUBX(CF ? 1 : 0); PutbackRMWord(m_dst); set_CFW(tmpcf); break; + case 0x20: ANDX(); PutbackRMWord(m_dst); break; + case 0x28: set_CFW(SUBX()); PutbackRMWord(m_dst); break; + case 0x30: XORW(); PutbackRMWord(m_dst); break; + case 0x38: set_CFW(SUBX()); break; /* CMP */ } break; } @@ -1449,19 +1435,19 @@ bool i8086_common_cpu_device::common_op(uint8_t op) m_modrm = fetch(); m_dst = GetRMByte(); m_src = (int8_t)fetch(); - if (m_modrm >=0xc0 ) { CLK(ALU_RI8); } + if (m_modrm >= 0xc0) { CLK(ALU_RI8); } else if ((m_modrm & 0x38)==0x38) { CLK(ALU_MI8_RO); } else { CLK(ALU_MI8); } switch (m_modrm & 0x38) { - case 0x00: set_CFB(ADDB()); PutbackRMByte(m_dst); break; - case 0x08: ORB(); PutbackRMByte(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; tmpcf = ADDB(); PutbackRMByte(m_dst); set_CFB(tmpcf); break; - case 0x18: m_src += CF ? 1 : 0; tmpcf = SUBB(); PutbackRMByte(m_dst); set_CFB(tmpcf); break; - case 0x20: ANDB(); PutbackRMByte(m_dst); break; - case 0x28: set_CFB(SUBB()); PutbackRMByte(m_dst); break; - case 0x30: XORB(); PutbackRMByte(m_dst); break; - case 0x38: set_CFB(SUBB()); break; /* CMP */ + case 0x00: set_CFB(ADDB()); PutbackRMByte(m_dst); break; + case 0x08: ORB(); PutbackRMByte(m_dst); break; + case 0x10: tmpcf = ADDB(CF ? 1 : 0); PutbackRMByte(m_dst); set_CFB(tmpcf); break; + case 0x18: tmpcf = SUBB(CF ? 1 : 0); PutbackRMByte(m_dst); set_CFB(tmpcf); break; + case 0x20: ANDB(); PutbackRMByte(m_dst); break; + case 0x28: set_CFB(SUBB()); PutbackRMByte(m_dst); break; + case 0x30: XORB(); PutbackRMByte(m_dst); break; + case 0x38: set_CFB(SUBB()); break; /* CMP */ } break; } @@ -1473,19 +1459,19 @@ bool i8086_common_cpu_device::common_op(uint8_t op) m_modrm = fetch(); m_dst = GetRMWord(); m_src = (uint16_t)((int16_t)((int8_t)fetch())); - if (m_modrm >=0xc0 ) { CLK(ALU_R16I8); } + if (m_modrm >= 0xc0) { CLK(ALU_R16I8); } else if ((m_modrm & 0x38)==0x38) { CLK(ALU_M16I8_RO); } else { CLK(ALU_M16I8); } switch (m_modrm & 0x38) { - case 0x00: set_CFW(ADDX()); PutbackRMWord(m_dst); break; - case 0x08: ORW(); PutbackRMWord(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; tmpcf = ADDX(); PutbackRMWord(m_dst); set_CFW(tmpcf); break; - case 0x18: m_src += CF ? 1 : 0; tmpcf = SUBX(); PutbackRMWord(m_dst); set_CFW(tmpcf); break; - case 0x20: ANDX(); PutbackRMWord(m_dst); break; - case 0x28: set_CFW(SUBX()); PutbackRMWord(m_dst); break; - case 0x30: XORW(); PutbackRMWord(m_dst); break; - case 0x38: set_CFW(SUBX()); break; /* CMP */ + case 0x00: set_CFW(ADDX()); PutbackRMWord(m_dst); break; + case 0x08: ORW(); PutbackRMWord(m_dst); break; + case 0x10: tmpcf = ADDX(CF ? 1 : 0); PutbackRMWord(m_dst); set_CFW(tmpcf); break; + case 0x18: tmpcf = SUBX(CF ? 1 : 0); PutbackRMWord(m_dst); set_CFW(tmpcf); break; + case 0x20: ANDX(); PutbackRMWord(m_dst); break; + case 0x28: set_CFW(SUBX()); PutbackRMWord(m_dst); break; + case 0x30: XORW(); PutbackRMWord(m_dst); break; + case 0x38: set_CFW(SUBX()); break; /* CMP */ } break; } diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h index 50c616c6614..3616a0e3ebd 100644 --- a/src/devices/cpu/i86/i86.h +++ b/src/devices/cpu/i86/i86.h @@ -213,10 +213,10 @@ protected: inline void i_popf(); // sub implementations - inline uint32_t ADDB(); - inline uint32_t ADDX(); - inline uint32_t SUBB(); - inline uint32_t SUBX(); + inline uint32_t ADDB(uint8_t c = 0); + inline uint32_t ADDX(uint8_t c = 0); + inline uint32_t SUBB(uint8_t c = 0); + inline uint32_t SUBX(uint8_t c = 0); inline void ORB(); inline void ORW(); inline void ANDB(); diff --git a/src/devices/cpu/i86/i86inline.h b/src/devices/cpu/i86/i86inline.h index 15a3aef2881..9cdf69be686 100644 --- a/src/devices/cpu/i86/i86inline.h +++ b/src/devices/cpu/i86/i86inline.h @@ -621,9 +621,9 @@ inline void i8086_common_cpu_device::i_popf() } -inline uint32_t i8086_common_cpu_device::ADDB() +inline uint32_t i8086_common_cpu_device::ADDB(uint8_t c) { - uint32_t res = m_dst + m_src; + uint32_t res = m_dst + m_src + c; set_OFB_Add(res,m_src,m_dst); set_AF(res,m_src,m_dst); @@ -633,9 +633,9 @@ inline uint32_t i8086_common_cpu_device::ADDB() } -inline uint32_t i8086_common_cpu_device::ADDX() +inline uint32_t i8086_common_cpu_device::ADDX(uint8_t c) { - uint32_t res = m_dst + m_src; + uint32_t res = m_dst + m_src + c; set_OFW_Add(res,m_src,m_dst); set_AF(res,m_src,m_dst); @@ -645,9 +645,9 @@ inline uint32_t i8086_common_cpu_device::ADDX() } -inline uint32_t i8086_common_cpu_device::SUBB() +inline uint32_t i8086_common_cpu_device::SUBB(uint8_t c) { - uint32_t res = m_dst - m_src; + uint32_t res = m_dst - m_src - c; set_OFB_Sub(res,m_src,m_dst); set_AF(res,m_src,m_dst); @@ -657,9 +657,9 @@ inline uint32_t i8086_common_cpu_device::SUBB() } -inline uint32_t i8086_common_cpu_device::SUBX() +inline uint32_t i8086_common_cpu_device::SUBX(uint8_t c) { - uint32_t res = m_dst - m_src; + uint32_t res = m_dst - m_src - c; set_OFW_Sub(res,m_src,m_dst); set_AF(res,m_src,m_dst); From 505ff3e6a8aac63294d4beaaf29a2c3988fb84d3 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 2 Mar 2026 15:36:46 +0100 Subject: [PATCH 091/351] i8086: initialize m_ea_timing table --- src/devices/cpu/i86/i186.h | 50 ++++++++++++++++----------------- src/devices/cpu/i86/i286.cpp | 3 +- src/devices/cpu/i86/i86.cpp | 3 +- src/devices/cpu/i86/i86.h | 4 +-- src/devices/cpu/i86/i86inline.h | 8 +++--- 5 files changed, 34 insertions(+), 34 deletions(-) diff --git a/src/devices/cpu/i86/i186.h b/src/devices/cpu/i86/i186.h index 2826e02fcbc..7bb10239591 100644 --- a/src/devices/cpu/i86/i186.h +++ b/src/devices/cpu/i86/i186.h @@ -105,45 +105,45 @@ private: struct mem_state { - uint16_t lower; - uint16_t upper; - uint16_t middle; - uint16_t middle_size; - uint16_t peripheral; + uint16_t lower; + uint16_t upper; + uint16_t middle; + uint16_t middle_size; + uint16_t peripheral; }; struct timer_state { - uint16_t control; - uint16_t maxA; - uint16_t maxB; - uint16_t count; + uint16_t control; + uint16_t maxA; + uint16_t maxB; + uint16_t count; emu_timer *int_timer; }; struct dma_state { bool drq_state; - uint32_t source; - uint32_t dest; - uint16_t count; - uint16_t control; + uint32_t source; + uint32_t dest; + uint16_t count; + uint16_t control; }; struct intr_state { - uint8_t vector; - uint8_t pending; - uint16_t ack_mask; - uint16_t priority_mask; - uint16_t in_service; - uint16_t request; - uint16_t status; - uint16_t poll_status; - uint16_t timer[3]; - uint16_t dma[2]; - uint16_t ext[4]; - uint8_t ext_state; + uint8_t vector; + uint8_t pending; + uint16_t ack_mask; + uint16_t priority_mask; + uint16_t in_service; + uint16_t request; + uint16_t status; + uint16_t poll_status; + uint16_t timer[3]; + uint16_t dma[2]; + uint16_t ext[4]; + uint8_t ext_state; }; timer_state m_timer[3]; diff --git a/src/devices/cpu/i86/i286.cpp b/src/devices/cpu/i86/i286.cpp index 7ba394b9989..412563ed26d 100644 --- a/src/devices/cpu/i86/i286.cpp +++ b/src/devices/cpu/i86/i286.cpp @@ -164,8 +164,7 @@ const uint8_t i80286_cpu_device::m_i80286_timing[] = 13, /* (80186) BOUND */ }; -// Effective Address calculation takes one extra clock if offset calculation -// requires summing 3 elements. +// Effective Address calculation takes one extra clock if offset calculation requires summing 3 elements. const uint8_t i80286_cpu_device::m_i80286_ea_timing[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index 31293a4386d..7f08e08dbbd 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -118,6 +118,7 @@ i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, const char *ta : i8086_cpu_device(mconfig, I8086, tag, owner, clock, 16) { memcpy(m_timing, m_i8086_timing, sizeof(m_i8086_timing)); + memcpy(m_ea_timing, m_i8086_ea_timing, sizeof(m_i8086_ea_timing)); } i8086_cpu_device::i8086_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_bus_size) @@ -393,7 +394,7 @@ i8086_common_cpu_device::i8086_common_cpu_device(const machine_config &mconfig, static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH }; /* Set up parity lookup table. */ - for (uint16_t i = 0;i < 256; i++) + for (uint16_t i = 0; i < 256; i++) { uint16_t c = 0; for (uint16_t j = i; j > 0; j >>= 1) diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h index 3616a0e3ebd..ab2129ccdf7 100644 --- a/src/devices/cpu/i86/i86.h +++ b/src/devices/cpu/i86/i86.h @@ -215,8 +215,8 @@ protected: // sub implementations inline uint32_t ADDB(uint8_t c = 0); inline uint32_t ADDX(uint8_t c = 0); - inline uint32_t SUBB(uint8_t c = 0); - inline uint32_t SUBX(uint8_t c = 0); + inline uint32_t SUBB(uint8_t b = 0); + inline uint32_t SUBX(uint8_t b = 0); inline void ORB(); inline void ORW(); inline void ANDB(); diff --git a/src/devices/cpu/i86/i86inline.h b/src/devices/cpu/i86/i86inline.h index 9cdf69be686..6a6f0b1d5d2 100644 --- a/src/devices/cpu/i86/i86inline.h +++ b/src/devices/cpu/i86/i86inline.h @@ -645,9 +645,9 @@ inline uint32_t i8086_common_cpu_device::ADDX(uint8_t c) } -inline uint32_t i8086_common_cpu_device::SUBB(uint8_t c) +inline uint32_t i8086_common_cpu_device::SUBB(uint8_t b) { - uint32_t res = m_dst - m_src - c; + uint32_t res = m_dst - m_src - b; set_OFB_Sub(res,m_src,m_dst); set_AF(res,m_src,m_dst); @@ -657,9 +657,9 @@ inline uint32_t i8086_common_cpu_device::SUBB(uint8_t c) } -inline uint32_t i8086_common_cpu_device::SUBX(uint8_t c) +inline uint32_t i8086_common_cpu_device::SUBX(uint8_t b) { - uint32_t res = m_dst - m_src - c; + uint32_t res = m_dst - m_src - b; set_OFW_Sub(res,m_src,m_dst); set_AF(res,m_src,m_dst); From 963f16eeeaee2a0702f08629aa6465d7f4ca60e7 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 2 Mar 2026 15:37:42 +0100 Subject: [PATCH 092/351] debut: use pwm_display_device for the lcd --- src/mame/ussr/debut.cpp | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/src/mame/ussr/debut.cpp b/src/mame/ussr/debut.cpp index 86d29734ff9..4571ae45438 100644 --- a/src/mame/ussr/debut.cpp +++ b/src/mame/ussr/debut.cpp @@ -67,6 +67,7 @@ public: m_maincpu(*this, "maincpu"), m_board(*this, "board"), m_display(*this, "display"), + m_digit_pwm(*this, "lcd_pwm"), m_dac(*this, "dac"), m_out_digit(*this, "digit%u", 0U), m_inputs(*this, "IN.0") @@ -85,13 +86,13 @@ private: required_device m_maincpu; required_device m_board; required_device m_display; + required_device m_digit_pwm; required_device m_dac; output_finder<4> m_out_digit; required_ioport m_inputs; u8 m_latch[5] = { }; u8 m_dac_data = 0; - u8 m_lcd_update = 0; // address maps void main_map(address_map &map) ATTR_COLD; @@ -111,7 +112,6 @@ void debut_state::machine_start() // register for savestates save_item(NAME(m_latch)); save_item(NAME(m_dac_data)); - save_item(NAME(m_lcd_update)); } @@ -167,15 +167,15 @@ void debut_state::latch_w(offs_t offset, u8 data) void debut_state::lcd_update_w(int state) { // 8086 S5 also goes to the lcd panel - if (!state && m_lcd_update) + if (state) { - u8 xorval = (m_latch[4] & 1) ? 0xff : 0; + const u8 xorval = (m_latch[4] & 1) ? 0xff : 0; for (int i = 0; i < 4; i++) - m_out_digit[i] = bitswap<8>(m_latch[i+1] ^ xorval,0,7,4,3,2,1,6,5); + m_digit_pwm->write_row(i, bitswap<8>(m_latch[i+1] ^ xorval,0,7,4,3,2,1,6,5)); } - - m_lcd_update = state; + else + m_digit_pwm->clear(); } @@ -239,6 +239,11 @@ void debut_state::debutm(machine_config &config) // video hardware PWM_DISPLAY(config, m_display).set_size(2, 9); m_display->set_bri_maximum(0.5); + + PWM_DISPLAY(config, m_digit_pwm).set_size(4, 8); + m_digit_pwm->set_segmask(0xf, 0xff); + m_digit_pwm->output_digit().set([this](offs_t offset, u64 data) { m_out_digit[offset] = data; }); + config.set_default_layout(layout_debutm); // sound hardware From daf683305d8fa8832a838f522b38e9b3594d3002 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Tue, 3 Mar 2026 03:20:02 +1100 Subject: [PATCH 093/351] Hopedfully improve building in more configurations. --- makefile | 9 +++++++++ scripts/genie.lua | 6 +++--- scripts/src/3rdparty.lua | 20 ++++++++++---------- scripts/src/lib.lua | 2 +- 4 files changed, 23 insertions(+), 14 deletions(-) diff --git a/makefile b/makefile index a39a8ca5e0f..e86f7c7b772 100644 --- a/makefile +++ b/makefile @@ -1009,6 +1009,10 @@ $(info Clang $(CLANG_VERSION) detected) ifneq ($(TARGETOS),asmjs) ifeq ($(ARCHITECTURE),_x64) ARCHITECTURE := _x64_clang +else ifneq ($(filter aarch64%,$(UNAME_M)),) +ARCHITECTURE := _arm64_clang +else ifneq ($(filter aarch64%,$(UNAME_P)),) +ARCHITECTURE := _arm64_clang else ifneq ($(filter arm64%,$(UNAME_M)),) ARCHITECTURE := _arm64_clang else @@ -1261,6 +1265,11 @@ linux_x64_clang: generate $(PROJECTDIR)/$(MAKETYPE)-linux-clang/Makefile $(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/$(MAKETYPE)-linux-clang config=$(CONFIG)64 precompile $(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/$(MAKETYPE)-linux-clang config=$(CONFIG)64 +.PHONY: linux_arm64_clang +linux_arm64_clang: generate $(PROJECTDIR)/$(MAKETYPE)-linux-clang/Makefile + $(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/$(MAKETYPE)-linux-clang config=$(CONFIG)64 precompile + $(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/$(MAKETYPE)-linux-clang config=$(CONFIG)64 + .PHONY: linux_x86_clang linux_x86_clang: generate $(PROJECTDIR)/$(MAKETYPE)-linux-clang/Makefile $(SILENT) $(MAKE) $(MAKEPARAMS) -C $(PROJECTDIR)/$(MAKETYPE)-linux-clang config=$(CONFIG)32 precompile diff --git a/scripts/genie.lua b/scripts/genie.lua index 291327c75a6..79b19583c3c 100644 --- a/scripts/genie.lua +++ b/scripts/genie.lua @@ -657,19 +657,19 @@ else end end -if _OPTIONS["with-system-jpeg"]~=nil then +if _OPTIONS["with-system-jpeg"] == "1" then defines { "XMD_H", } end -if not _OPTIONS["with-system-flac"]~=nil then +if _OPTIONS["with-system-flac"] ~= "1" then defines { "FLAC__NO_DLL", } end -if not _OPTIONS["with-system-pugixml"] then +if _OPTIONS["with-system-pugixml"] ~= "1" then defines { "PUGIXML_HEADER_ONLY", } diff --git a/scripts/src/3rdparty.lua b/scripts/src/3rdparty.lua index a62513b5639..011af653653 100755 --- a/scripts/src/3rdparty.lua +++ b/scripts/src/3rdparty.lua @@ -14,7 +14,7 @@ -- expat library objects -------------------------------------------------- -if _OPTIONS["with-system-expat"] ~= "0" then +if _OPTIONS["with-system-expat"] ~= "1" then project "expat" uuid "f4cd40b1-c37c-452d-9785-640f26f0bf54" kind "StaticLib" @@ -120,7 +120,7 @@ end -- zlib library objects -------------------------------------------------- -if _OPTIONS["with-system-zlib"] ~= "0" then +if _OPTIONS["with-system-zlib"] ~= "1" then project "zlib" uuid "3d78bd2a-2bd0-4449-8087-42ddfaef7ec9" kind "StaticLib" @@ -181,7 +181,7 @@ end -- zstd library objects -------------------------------------------------- -if _OPTIONS["with-system-zstd"] ~= "0" then +if _OPTIONS["with-system-zstd"] ~= "1" then project "zstd" uuid "5edd8713-bc60-456d-9c95-b928a913c84b" kind "StaticLib" @@ -655,7 +655,7 @@ end -- libJPEG library objects -------------------------------------------------- -if _OPTIONS["with-system-jpeg"] ~= "0" then +if _OPTIONS["with-system-jpeg"] ~= "1" then project "jpeg" uuid "447c6800-dcfd-4c48-b72a-a8223bb409ca" kind "StaticLib" @@ -734,7 +734,7 @@ end -- libflac library objects -------------------------------------------------- -if _OPTIONS["with-system-flac"] ~= "0" then +if _OPTIONS["with-system-flac"] ~= "1" then project "flac" uuid "b6fc19e8-073a-4541-bb7b-d24b548d424a" kind "StaticLib" @@ -977,7 +977,7 @@ end -------------------------------------------------- if (STANDALONE~=true) then -if _OPTIONS["with-system-lua"] ~= "0" then +if _OPTIONS["with-system-lua"] ~= "1" then project "lua" uuid "d9e2eed1-f1ab-4737-a6ac-863700b1a5a9" kind "StaticLib" @@ -1128,7 +1128,7 @@ end -- SQLite3 library objects -------------------------------------------------- -if _OPTIONS["with-system-sqlite3"] ~= "0" then +if _OPTIONS["with-system-sqlite3"] ~= "1" then project "sqlite3" uuid "5cb3d495-57ed-461c-81e5-80dc0857517d" kind "StaticLib" @@ -1180,7 +1180,7 @@ end -------------------------------------------------- if _OPTIONS["NO_USE_MIDI"] ~= "1" then -if _OPTIONS["with-system-portmidi"] ~= "0" then +if _OPTIONS["with-system-portmidi"] ~= "1" then project "portmidi" uuid "587f2da6-3274-4a65-86a2-f13ea315bb98" kind "StaticLib" @@ -1689,7 +1689,7 @@ end -------------------------------------------------- if _OPTIONS["NO_USE_PORTAUDIO"] ~= "1" then -if _OPTIONS["with-system-portaudio"] ~= "0" then +if _OPTIONS["with-system-portaudio"] ~= "1" then project "portaudio" uuid "0755c5f5-eccf-47f3-98a9-df67018a94d4" kind "StaticLib" @@ -1897,7 +1897,7 @@ end -- utf8proc library objects -------------------------------------------------- -if _OPTIONS["with-system-utf8proc"] ~= "0" then +if _OPTIONS["with-system-utf8proc"] ~= "1" then project "utf8proc" uuid "1f881f09-0395-4483-ac37-2935fb092187" kind "StaticLib" diff --git a/scripts/src/lib.lua b/scripts/src/lib.lua index 81c6fc7a3c3..52ce322ffc2 100644 --- a/scripts/src/lib.lua +++ b/scripts/src/lib.lua @@ -26,7 +26,7 @@ project "utils" ext_includedir("utf8proc"), } -if not _OPTIONS["with-system-utf8proc"] then +if _OPTIONS["with-system-utf8proc"] ~= "1" then defines { "UTF8PROC_STATIC", } From 019bbc797f94efcaadca45f250bb34b5e97571f3 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Fri, 20 Feb 2026 09:44:45 +0200 Subject: [PATCH 094/351] nokia/mikromikko2: WIP. [Curt Coder] nscsi/s1410: Return seek error on out-of-bounds seek. [Curt Coder] --- hash/mm2_flop.xml | 2 +- hash/mm2_hdd.xml | 21 +++ scripts/src/bus.lua | 2 + src/devices/bus/mm2/crtc186.cpp | 155 +++++++++--------- src/devices/bus/mm2/crtc186.h | 26 +-- src/devices/bus/mm2/exp.cpp | 90 ++++++++--- src/devices/bus/mm2/exp.h | 76 +++++---- src/devices/bus/mm2/meme186.cpp | 24 +++ src/devices/bus/mm2/meme186.h | 30 ++++ src/devices/bus/mm2/mmc186.cpp | 123 ++++++++------ src/devices/bus/mm2/mmc186.h | 27 +++- src/devices/bus/nscsi/s1410.cpp | 15 +- src/mame/nokia/mikromikko2.cpp | 273 +++++++++++++++++++++++--------- 13 files changed, 598 insertions(+), 266 deletions(-) create mode 100644 hash/mm2_hdd.xml create mode 100644 src/devices/bus/mm2/meme186.cpp create mode 100644 src/devices/bus/mm2/meme186.h diff --git a/hash/mm2_flop.xml b/hash/mm2_flop.xml index 44d088c0e6d..e817ca0e01e 100644 --- a/hash/mm2_flop.xml +++ b/hash/mm2_flop.xml @@ -6,7 +6,7 @@ license:CC0-1.0 - + Nokia MS-DOS 2.00 Versio 2.21 (Fin) 1985 Nokia Data diff --git a/hash/mm2_hdd.xml b/hash/mm2_hdd.xml new file mode 100644 index 00000000000..a2cfd9747cd --- /dev/null +++ b/hash/mm2_hdd.xml @@ -0,0 +1,21 @@ + + + + + + + Nokia MS-DOS 2.00 Versio 2.21 (Fin) + 1985 + Nokia Data + + + + + + + + + + diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 4ddd0a57ca8..d0f18f5880d 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -3322,6 +3322,8 @@ if BUSES["MM2"] then MAME_DIR .. "src/devices/bus/mm2/exp.h", MAME_DIR .. "src/devices/bus/mm2/crtc186.cpp", MAME_DIR .. "src/devices/bus/mm2/crtc186.h", + MAME_DIR .. "src/devices/bus/mm2/meme186.cpp", + MAME_DIR .. "src/devices/bus/mm2/meme186.h", MAME_DIR .. "src/devices/bus/mm2/mm2kb.cpp", MAME_DIR .. "src/devices/bus/mm2/mm2kb.h", MAME_DIR .. "src/devices/bus/mm2/mmc186.cpp", diff --git a/src/devices/bus/mm2/crtc186.cpp b/src/devices/bus/mm2/crtc186.cpp index 424c389a7a9..26454dd9201 100644 --- a/src/devices/bus/mm2/crtc186.cpp +++ b/src/devices/bus/mm2/crtc186.cpp @@ -8,23 +8,22 @@ #include "emu.h" #include "crtc186.h" -#include "machine/input_merger.h" DEFINE_DEVICE_TYPE(NOKIA_CRTC186, crtc186_device, "nokia_crtc186", "Nokia MikroMikko 2 CRTC186") crtc186_device::crtc186_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, NOKIA_CRTC186, tag, owner, clock), device_mikromikko2_expansion_bus_card_interface(mconfig, *this), - m_video_ram(*this, "ram", 0x2000, ENDIANNESS_LITTLE), + m_video_ram(*this, "ram", 0x4000, ENDIANNESS_LITTLE), m_char_rom(*this, "chargen"), m_attr_rom(*this, "attr"), m_vpac(*this, "crt9007"), m_drb0(*this, "crt9212_0"), m_drb1(*this, "crt9212_1"), - m_palette(*this, "palette"), m_timer_vidldsh(*this, "vidldsh"), m_sio(*this, "i8251"), m_kb(*this, "kb"), + m_ctrl(*this, "control"), m_screen(*this, "screen") { } @@ -32,21 +31,15 @@ crtc186_device::crtc186_device(const machine_config &mconfig, const char *tag, d void crtc186_device::map(address_map &map) { map(0x00, 0x3f).rw(FUNC(crtc186_device::vpac_r), FUNC(crtc186_device::vpac_w)); - //map(0x00, 0x01).rw(m_sio, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)).umask16(0xff00); - //map(0x02, 0x03).rw(m_sio, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)).umask16(0xff00); + //map(0x00, 0x01).rw(m_sio, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)).umask16(0xff00); + //map(0x02, 0x03).rw(m_sio, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)).umask16(0xff00); //map(0x00, 0x3f).rw(m_vpac, FUNC(crt9007_device::read), FUNC(crt9007_device::write)).umask16(0x00ff); - map(0x40, 0x41).w(FUNC(crtc186_device::cpl_w)).umask16(0x00ff); - map(0x42, 0x43).w(FUNC(crtc186_device::blc_w)).umask16(0x00ff); - map(0x44, 0x45).w(FUNC(crtc186_device::mode_w)).umask16(0x00ff); - map(0x46, 0x47).w(FUNC(crtc186_device::modeg_w)).umask16(0x00ff); - map(0x4a, 0x4b).w(FUNC(crtc186_device::c70_50_w)).umask16(0x00ff); - map(0x4c, 0x4d).w(FUNC(crtc186_device::crb_w)).umask16(0x00ff); - map(0x4e, 0x4f).w(FUNC(crtc186_device::cru_w)).umask16(0x00ff); + map(0x40, 0x4f).w(m_ctrl, FUNC(ls259_device::write_d0)).umask16(0x00ff); } ROM_START( crtc186 ) - ROM_REGION16_LE( 0x4000, "chargen", 0 ) - ROMX_LOAD( "9067e.ic40", 0x0000, 0x2000, CRC(fa719d92) SHA1(af6cc03a8171b9c95e8548c5e0268816344d7367), ROM_SKIP(1) ) + ROM_REGION( 0x4000, "chargen", 0 ) + ROM_LOAD( "9067e.ic40", 0x0000, 0x2000, CRC(fa719d92) SHA1(af6cc03a8171b9c95e8548c5e0268816344d7367) ) ROM_REGION( 0x2000, "attr", 0 ) ROM_LOAD( "9026a.ic26", 0x0000, 0x2000, CRC(fe1da600) SHA1(3a5512b08d8f7bb5a0ff3f50bcf33de649a0489d) ) @@ -60,44 +53,9 @@ const tiny_rom_entry *crtc186_device::device_rom_region() const return ROM_NAME( crtc186 ); } -static const gfx_layout charlayout = -{ - 8, 15, - RGN_FRAC(1,1), - 1, - { RGN_FRAC(0,1) }, - { 7, 6, 5, 4, 3, 2, 1, 0 }, - { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16, - 8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16 }, - 16*16 -}; - -static const gfx_layout gfxlayout = -{ - 8, 1, - RGN_FRAC(1,1), - 1, - { RGN_FRAC(0,1) }, - { 7, 6, 5, 4, 3, 2, 1, 0 }, - { 15*16 }, - 16*16 -}; - -static GFXDECODE_START( gfx_mm2 ) - GFXDECODE_ENTRY( "chargen", 0, charlayout, 0, 1 ) - GFXDECODE_ENTRY( "chargen", 0, gfxlayout, 0, 1 ) -GFXDECODE_END - -void crtc186_device::palette(palette_device &palette) const -{ - palette.set_pen_color(0, rgb_t(0xff, 0xff, 0xff)); // white - palette.set_pen_color(1, rgb_t(0x00, 0x00, 0x00)); // black (normal color) - palette.set_pen_color(2, rgb_t(0x7f, 0x7f, 0x7f)); // grey ("highlight" mode color) -} - void crtc186_device::vpac_mem(address_map &map) { - map(0x0000, 0x1fff).r(FUNC(crtc186_device::videoram_r)); + map(0x0000, 0x3fff).r(FUNC(crtc186_device::videoram_r)); } void crtc186_device::device_add_mconfig(machine_config &config) @@ -107,11 +65,8 @@ void crtc186_device::device_add_mconfig(machine_config &config) SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(71.77); m_screen->set_screen_update(FUNC(crtc186_device::screen_update)); - m_screen->set_size(640, 420); - m_screen->set_visarea(0, 640-1, 0, 420-1); - - GFXDECODE(config, "gfxdecode", m_palette, gfx_mm2); - PALETTE(config, m_palette, FUNC(crtc186_device::palette), 3); + m_screen->set_size(800, 420); + m_screen->set_visarea(0, 800-1, 0, 420-1); CRT9007(config, m_vpac, XTAL(35'452'500)/8); m_vpac->set_addrmap(0, &crtc186_device::vpac_mem); @@ -135,6 +90,15 @@ void crtc186_device::device_add_mconfig(machine_config &config) TIMER(config, "vidldsh").configure_generic(FUNC(crtc186_device::vidldsh_tick)); + LS259(config, m_ctrl); + m_ctrl->q_out_cb<0>().set(FUNC(crtc186_device::cpl_w)); + m_ctrl->q_out_cb<1>().set(FUNC(crtc186_device::blc_w)); + m_ctrl->q_out_cb<2>().set(FUNC(crtc186_device::mode_w)); + m_ctrl->q_out_cb<3>().set(FUNC(crtc186_device::modeg_w)); + m_ctrl->q_out_cb<5>().set(FUNC(crtc186_device::c70_50_w)); + m_ctrl->q_out_cb<6>().set(FUNC(crtc186_device::crb_w)); + m_ctrl->q_out_cb<7>().set(FUNC(crtc186_device::cru_w)); + clock_device &sio_clock(CLOCK(config, "sio_clock", XTAL(16'000'000)/4/26)); sio_clock.signal_handler().set(m_sio, FUNC(i8251_device::write_txc)); sio_clock.signal_handler().append(m_sio, FUNC(i8251_device::write_rxc)); @@ -150,8 +114,12 @@ void crtc186_device::device_add_mconfig(machine_config &config) void crtc186_device::device_start() { - m_bus->memspace().install_ram(0xd0000, 0xd1fff, m_video_ram); - m_bus->memspace().install_rom(0xd8000, 0xd9fff, m_char_rom); + m_bus->memspace().install_ram(0xd0000, 0xd3fff, m_video_ram); + m_bus->memspace().install_read_tap(0xd8000, 0xdbfff, "charrom", [this](offs_t offset, uint16_t &data, uint16_t mem_mask) { + if (ACCESSING_BITS_0_7) { + data |= m_char_rom->base()[(offset >> 1) & 0x1fff]; + } + }); m_bus->iospace().install_device(0xf980, 0xf9ff, *this, &crtc186_device::map); // state saving @@ -163,24 +131,54 @@ void crtc186_device::device_start() save_item(NAME(m_c70_50)); save_item(NAME(m_cru)); save_item(NAME(m_crb)); -} - -void crtc186_device::device_reset() -{ - m_cpl = 0; - m_blc = 0; - m_mode = 0; - m_modeg = 0; - m_c70_50 = 0; - m_cru = 0; - m_crb = 0; - - set_vidldsh_timer(); + save_item(NAME(m_cursor_x)); + save_item(NAME(m_cursor_y)); } uint32_t crtc186_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - m_bitmap.fill(rgb_t::white(), cliprect); + if (!m_blc) { + bitmap.fill(rgb_t::black(), cliprect); + return 0; + } + + bitmap.fill(m_cpl ? rgb_t::black() : rgb_t::white(), cliprect); + + for (int sy = 0; sy < 28; sy++) + { + for (int y = 0; y < 15; y++) + { + for (int sx = 0; sx < 80; sx++) + { + bool const cursor = (sx == m_cursor_x) && (sy == m_cursor_y); + offs_t const vram_addr = (sy * 80) + sx; + u16 const data = m_video_ram[vram_addr & 0x1fff]; + + offs_t const char_addr = ((data & 0x1ff) << 4) + y; + u8 char_data = m_char_rom->base()[char_addr & 0x1fff]; + + rgb_t const bgcolor = BIT(data, 11) ? halflit() : rgb_t::white(); + + for (int bit = 0; bit < 10; bit++) + { + bool pixel = m_cpl; + if (bit > 0 && bit < 9) { + pixel = BIT(char_data, 0) ^ m_cpl; + char_data >>= 1; + } + + if (cursor) { + if (!m_cru) + pixel ^= 1; + else if (m_cru && y == 14) + pixel = 1; + } + + bitmap.pix((sy * 15) + y, (sx * 10) + bit) = pixel ? rgb_t::black() : bgcolor; + } + } + } + } return 0; } @@ -194,9 +192,9 @@ uint16_t crtc186_device::vpac_r(offs_t offset, uint16_t mem_mask) } if (ACCESSING_BITS_8_15) { - if (BIT(offset, 1)) + if (offset == 0) data |= m_sio->data_r() << 8; - else + else if (offset == 1) data |= m_sio->status_r() << 8; } @@ -207,12 +205,17 @@ void crtc186_device::vpac_w(offs_t offset, uint16_t data, uint16_t mem_mask) { if (ACCESSING_BITS_0_7) { m_vpac->write(offset, data & 0xff); + + if (offset == 0x18) + m_cursor_y = data & 0xff; + else if (offset == 0x19) + m_cursor_x = data & 0xff; } if (ACCESSING_BITS_8_15) { - if (BIT(offset, 1)) + if (offset == 0) m_sio->data_w(data >> 8); - else + else if (offset == 1) m_sio->control_w(data >> 8); } } @@ -277,7 +280,7 @@ void crtc186_device::set_vidldsh_timer() const XTAL busdotclk = XTAL(35'452'500) / (m_mode ? 2 : 1); const XTAL vidcclk = busdotclk / (m_modeg ? 16 : 10); - m_vpac->set_character_width(m_modeg ? 8 : 10); + m_vpac->set_character_width(m_modeg ? 16 : 10); m_vpac->set_unscaled_clock(vidcclk); m_timer_vidldsh->adjust(attotime::from_hz(vidcclk), 0, attotime::from_hz(vidcclk)); diff --git a/src/devices/bus/mm2/crtc186.h b/src/devices/bus/mm2/crtc186.h index 3eb74aad2d1..3bc8bed4b6b 100644 --- a/src/devices/bus/mm2/crtc186.h +++ b/src/devices/bus/mm2/crtc186.h @@ -12,11 +12,12 @@ #pragma once #include "exp.h" -#include "emupal.h" #include "mm2kb.h" #include "screen.h" +#include "machine/74259.h" #include "machine/clock.h" #include "machine/i8251.h" +#include "machine/input_merger.h" #include "machine/timer.h" #include "video/crt9007.h" #include "video/crt9212.h" @@ -35,7 +36,6 @@ protected: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); virtual void device_start() override ATTR_COLD; - virtual void device_reset() override ATTR_COLD; private: void map(address_map &map) ATTR_COLD; @@ -48,27 +48,25 @@ private: required_device m_vpac; required_device m_drb0; required_device m_drb1; - required_device m_palette; required_device m_timer_vidldsh; required_device m_sio; required_device m_kb; + required_device m_ctrl; required_device m_screen; - void palette(palette_device &palette) const; - void vpac_mem(address_map &map) ATTR_COLD; bitmap_rgb32 m_bitmap; uint16_t vpac_r(offs_t offset, uint16_t mem_mask); void vpac_w(offs_t offset, uint16_t data, uint16_t mem_mask); - void cpl_w(offs_t offset, uint8_t data) { m_cpl = BIT(data, 0); } - void blc_w(offs_t offset, uint8_t data) { m_blc = BIT(data, 0); } - void mode_w(offs_t offset, uint8_t data) { m_mode = BIT(data, 0); set_vidldsh_timer(); } - void modeg_w(offs_t offset, uint8_t data) { m_modeg = BIT(data, 0); set_vidldsh_timer(); } - void c70_50_w(offs_t offset, uint8_t data) { m_c70_50 = BIT(data, 0); } - void cru_w(offs_t offset, uint8_t data) { m_cru = BIT(data, 0); } - void crb_w(offs_t offset, uint8_t data) { m_crb = BIT(data, 0); } + void cpl_w(int state) { m_cpl = state; } + void blc_w(int state) { m_blc = state; } + void mode_w(int state) { m_mode = state; set_vidldsh_timer(); } + void modeg_w(int state) { m_modeg = state; set_vidldsh_timer(); } + void c70_50_w(int state) { m_c70_50 = state; } + void cru_w(int state) { m_cru = state; } + void crb_w(int state) { m_crb = state; } uint8_t videoram_r(offs_t offset); void vpac_vlt_w(int state); @@ -91,6 +89,10 @@ private: bool m_c70_50; bool m_cru; bool m_crb; + int m_cursor_x; + int m_cursor_y; + + static constexpr rgb_t halflit() { return rgb_t(0x7f, 0x7f, 0x7f); } }; #endif // MAME_BUS_MM2_CRTC186_H diff --git a/src/devices/bus/mm2/exp.cpp b/src/devices/bus/mm2/exp.cpp index 4d9e137b517..dc5a0d95cb8 100644 --- a/src/devices/bus/mm2/exp.cpp +++ b/src/devices/bus/mm2/exp.cpp @@ -8,32 +8,16 @@ #include "emu.h" #include "exp.h" -#include "mmc186.h" #include "crtc186.h" +#include "meme186.h" +#include "mmc186.h" -DEFINE_DEVICE_TYPE(MIKROMIKKO2_EXPANSION_BUS_SLOT, mikromikko2_expansion_bus_slot_device, "mikromikko2_expansion_bus_slot", "Nokia MikroMikko 2 expansion bus slot") - -mikromikko2_expansion_bus_slot_device::mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - mikromikko2_expansion_bus_slot_device(mconfig, MIKROMIKKO2_EXPANSION_BUS_SLOT, tag, owner, clock) -{ -} - -mikromikko2_expansion_bus_slot_device::mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, type, tag, owner, clock), - device_slot_interface(mconfig, *this), - m_bus(*this, finder_base::DUMMY_TAG) -{ -} - -void mikromikko2_expansion_bus_slot_device::device_start() -{ - auto *const dev = dynamic_cast(get_card_device()); - - if (dev) - dev->set_bus(m_bus); -} DEFINE_DEVICE_TYPE(MIKROMIKKO2_EXPANSION_BUS, mikromikko2_expansion_bus_device, "mikromikko2_expansion_bus", "Nokia MikroMikko 2 expansion bus") +DEFINE_DEVICE_TYPE(MIKROMIKKO2_EXPANSION_BUS_SLOT, mikromikko2_expansion_bus_slot_device, "mikromikko2_expansion_bus_slot", "Nokia MikroMikko 2 expansion bus slot") + + +// ======================> mikromikko2_expansion_bus_device mikromikko2_expansion_bus_device::mikromikko2_expansion_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : mikromikko2_expansion_bus_device(mconfig, MIKROMIKKO2_EXPANSION_BUS, tag, owner, clock) @@ -62,6 +46,64 @@ void mikromikko2_expansion_bus_device::device_start() { } +void mikromikko2_expansion_bus_device::add_slot(const char *tag) +{ + device_t *dev = subdevice(tag); + auto slot = dynamic_cast(dev); + m_slot_list.push_front(slot); +} + +void mikromikko2_expansion_bus_device::inta_w(int state) +{ + for (device_slot_interface *slot : m_slot_list) + { + device_t *dev = slot->get_card_device(); + if (dev) { + auto *card = dynamic_cast(dev); + card->inta_w(state); + } + } +} + +void mikromikko2_expansion_bus_device::bhlda_w(int state, int bcas) +{ + for (device_slot_interface *slot : m_slot_list) + { + device_t *dev = slot->get_card_device(); + if (dev) { + auto *card = dynamic_cast(dev); + card->bhlda_w(state, bcas); + } + } +} + + +// ======================> mikromikko2_expansion_bus_slot_device + +mikromikko2_expansion_bus_slot_device::mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + mikromikko2_expansion_bus_slot_device(mconfig, MIKROMIKKO2_EXPANSION_BUS_SLOT, tag, owner, clock) +{ +} + +mikromikko2_expansion_bus_slot_device::mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + device_slot_interface(mconfig, *this), + m_bus(*this, finder_base::DUMMY_TAG) +{ +} + +void mikromikko2_expansion_bus_slot_device::device_start() +{ + auto *const dev = dynamic_cast(get_card_device()); + + if (dev) dev->set_bus(m_bus); + + m_bus->add_slot(tag()); +} + + +// ======================> device_mikromikko2_expansion_bus_card_interface + device_mikromikko2_expansion_bus_card_interface::device_mikromikko2_expansion_bus_card_interface(const machine_config &mconfig, device_t &device) : device_interface(device, "mikromikko2_expansion_bus"), m_bus(nullptr), @@ -69,8 +111,12 @@ device_mikromikko2_expansion_bus_card_interface::device_mikromikko2_expansion_bu { } + +// ======================> mikromikko2_expansion_bus_cards + void mikromikko2_expansion_bus_cards(device_slot_interface &device) { device.option_add("crtc186", NOKIA_CRTC186); + device.option_add("meme186", NOKIA_MEME186); device.option_add("mmc186", NOKIA_MMC186); } diff --git a/src/devices/bus/mm2/exp.h b/src/devices/bus/mm2/exp.h index ad8dfaffadc..7a4f1284e99 100644 --- a/src/devices/bus/mm2/exp.h +++ b/src/devices/bus/mm2/exp.h @@ -47,37 +47,19 @@ #pragma once -class mikromikko2_expansion_bus_device; +#include -class mikromikko2_expansion_bus_slot_device : public device_t, public device_slot_interface -{ -public: - template - mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&bus_tag, U &&opts, const char *dflt, bool fixed) - : mikromikko2_expansion_bus_slot_device(mconfig, tag, owner, clock) - { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); - m_bus.set_tag(std::forward(bus_tag)); - } - mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - -protected: - mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - virtual void device_start() override ATTR_COLD; - - required_device m_bus; -}; +DECLARE_DEVICE_TYPE(MIKROMIKKO2_EXPANSION_BUS, mikromikko2_expansion_bus_device) DECLARE_DEVICE_TYPE(MIKROMIKKO2_EXPANSION_BUS_SLOT, mikromikko2_expansion_bus_slot_device) -class device_mikromikko2_expansion_bus_card_interface; + +// ======================> mikromikko2_expansion_bus_device class mikromikko2_expansion_bus_device : public device_t { + friend class mikromikko2_expansion_bus_slot_device; + public: mikromikko2_expansion_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -112,6 +94,9 @@ public: address_space &memspace() const { return *m_memspace; } address_space &iospace() const { return *m_iospace; } + void inta_w(int state); + void bhlda_w(int state, int bcas); + protected: mikromikko2_expansion_bus_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -131,24 +116,61 @@ protected: devcb_write_line m_out_hold3_cb; devcb_write_line m_out_hold4_cb; devcb_write_line m_out_hold5_cb; + + void add_slot(const char *tag); + + std::forward_list m_slot_list; }; -DECLARE_DEVICE_TYPE(MIKROMIKKO2_EXPANSION_BUS, mikromikko2_expansion_bus_device) + +// ======================> mikromikko2_expansion_bus_slot_device + +class mikromikko2_expansion_bus_slot_device : public device_t, public device_slot_interface +{ +public: + template + mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&bus_tag, U &&opts, const char *dflt, bool fixed) + : mikromikko2_expansion_bus_slot_device(mconfig, tag, owner, clock) + { + option_reset(); + opts(*this); + set_default_option(dflt); + set_fixed(fixed); + m_bus.set_tag(std::forward(bus_tag)); + } + mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + + required_device m_bus; +}; + + +// ======================> device_mikromikko2_expansion_bus_card_interface class device_mikromikko2_expansion_bus_card_interface : public device_interface { - friend class mikromikko2_expansion_bus_device; - public: device_mikromikko2_expansion_bus_card_interface(const machine_config &mconfig, device_t &device); virtual ~device_mikromikko2_expansion_bus_card_interface() {} void set_bus(mikromikko2_expansion_bus_device *bus) { m_bus = bus; } + virtual void inta_w(int state) {} + virtual void bhlda_w(int state, int bcas) {} + +protected: mikromikko2_expansion_bus_device *m_bus; device_t *m_card; }; + +// ======================> mikromikko2_expansion_bus_cards + void mikromikko2_expansion_bus_cards(device_slot_interface &device); + #endif // MAME_BUS_MM2_EXP_H diff --git a/src/devices/bus/mm2/meme186.cpp b/src/devices/bus/mm2/meme186.cpp new file mode 100644 index 00000000000..2f0e26cc24d --- /dev/null +++ b/src/devices/bus/mm2/meme186.cpp @@ -0,0 +1,24 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Nokia MikroMikko 2 MEME186 emulation + +*********************************************************************/ + +#include "emu.h" +#include "meme186.h" + +DEFINE_DEVICE_TYPE(NOKIA_MEME186, meme186_device, "nokia_meme186", "Nokia MikroMikko 2 MEME186") + +meme186_device::meme186_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NOKIA_MEME186, tag, owner, clock), + device_mikromikko2_expansion_bus_card_interface(mconfig, *this), + m_ram(*this, "ram", 0x80000, ENDIANNESS_LITTLE) +{ +} + +void meme186_device::device_start() +{ + m_bus->memspace().install_ram(0x40000, 0xbffff, m_ram); +} diff --git a/src/devices/bus/mm2/meme186.h b/src/devices/bus/mm2/meme186.h new file mode 100644 index 00000000000..f1f872fdc6b --- /dev/null +++ b/src/devices/bus/mm2/meme186.h @@ -0,0 +1,30 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Nokia MikroMikko 2 MEME186 emulation + +*********************************************************************/ + +#ifndef MAME_BUS_MM2_MEME186_H +#define MAME_BUS_MM2_MEME186_H + +#pragma once + +#include "exp.h" + +DECLARE_DEVICE_TYPE(NOKIA_MEME186, meme186_device) + +class meme186_device : public device_t, public device_mikromikko2_expansion_bus_card_interface +{ +public: + meme186_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + +protected: + virtual void device_start() override ATTR_COLD; + +private: + memory_share_creator m_ram; +}; + +#endif // MAME_BUS_MM2_MEME186_H diff --git a/src/devices/bus/mm2/mmc186.cpp b/src/devices/bus/mm2/mmc186.cpp index 6ed2aff7618..4961b279cb0 100644 --- a/src/devices/bus/mm2/mmc186.cpp +++ b/src/devices/bus/mm2/mmc186.cpp @@ -19,23 +19,21 @@ mmc186_device::mmc186_device(const machine_config &mconfig, const char *tag, dev m_dmac(*this, "am9517a"), m_sasi(*this, "sasi:7:scsicb"), m_fdc(*this, UPD765_TAG), - m_floppy(*this, UPD765_TAG ":%u:525qd", 0U) + m_ctrl(*this, "control"), + m_irqs(*this, "irqs"), + m_floppy(*this, UPD765_TAG ":%u:525qd", 0U), + m_dma_ch(-1) { } void mmc186_device::map(address_map &map) { map(0x00, 0x1f).rw(m_dmac, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).umask16(0x00ff); - map(0x20, 0x21).rw(FUNC(mmc186_device::sasi_status_r), FUNC(mmc186_device::sasi_cmd_w)).umask16(0x00ff); - map(0x22, 0x23).rw(FUNC(mmc186_device::sasi_data_r), FUNC(mmc186_device::sasi_data_w)).umask16(0x00ff); - map(0x40, 0x41).r(m_fdc, FUNC(upd765a_device::msr_r)).umask16(0x00ff); - map(0x42, 0x43).rw(m_fdc, FUNC(upd765a_device::fifo_r), FUNC(upd765a_device::fifo_w)).umask16(0x00ff); - // map(0x60, 0x60) CONTROL SASI Select - // map(0x62, 0x62) CONTROL SASI Interrupts Enable - map(0x66, 0x67).w(FUNC(mmc186_device::fdc_reset_w)).umask16(0x00ff); - // map(0x6a, 0x6a) CONTROL -Mini/Std Select - map(0x6c, 0x6d).w(FUNC(mmc186_device::motor_on_w)).umask16(0x00ff); - // map(0x6e, 0x6e) CONTROL Motor On (Std) + map(0x20, 0x21).mirror(0x10).rw(FUNC(mmc186_device::sasi_status_r), FUNC(mmc186_device::sasi_cmd_w)).umask16(0x00ff); + map(0x22, 0x23).mirror(0x10).rw(FUNC(mmc186_device::sasi_data_r), FUNC(mmc186_device::sasi_data_w)).umask16(0x00ff); + map(0x40, 0x41).mirror(0x10).r(m_fdc, FUNC(upd765a_device::msr_r)).umask16(0x00ff); + map(0x42, 0x43).mirror(0x10).rw(m_fdc, FUNC(upd765a_device::fifo_r), FUNC(upd765a_device::fifo_w)).umask16(0x00ff); + map(0x60, 0x6f).w(m_ctrl, FUNC(ls259_device::write_d0)).umask16(0x00ff); map(0x70, 0x70).mirror(0xe).w(FUNC(mmc186_device::dma_hi_w)).umask16(0x00ff); } @@ -51,20 +49,26 @@ static void mm2_floppies(device_slot_interface &device) void mmc186_device::device_add_mconfig(machine_config &config) { + INPUT_MERGER_ANY_HIGH(config, m_irqs).output_handler().set(FUNC(mmc186_device::int_w)); + AM9517A(config, m_dmac, XTAL(16'000'000)/4); m_dmac->out_hreq_callback().set(FUNC(mmc186_device::hold_w)); + m_dmac->out_eop_callback().set(FUNC(mmc186_device::eop_w)); m_dmac->in_memr_callback().set(FUNC(mmc186_device::dmac_mem_r)); m_dmac->out_memw_callback().set(FUNC(mmc186_device::dmac_mem_w)); m_dmac->in_ior_callback<0>().set(FUNC(mmc186_device::sasi_data_r)); m_dmac->out_iow_callback<0>().set(FUNC(mmc186_device::sasi_data_w)); m_dmac->in_ior_callback<1>().set(m_fdc, FUNC(upd765_family_device::dma_r)); m_dmac->out_iow_callback<1>().set(m_fdc, FUNC(upd765_family_device::dma_w)); + m_dmac->out_dack_callback<0>().set(FUNC(mmc186_device::dack0_w)); + m_dmac->out_dack_callback<1>().set(FUNC(mmc186_device::dack1_w)); UPD765A(config, m_fdc, XTAL(16'000'000)/2, true, true); - m_fdc->intrq_wr_callback().set(FUNC(mmc186_device::int_w)); + m_fdc->intrq_wr_callback().set(m_irqs, FUNC(input_merger_device::in_w<1>)); m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq1_w)); FLOPPY_CONNECTOR(config, UPD765_TAG ":0", mm2_floppies, "525qd", mmc186_device::floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, UPD765_TAG ":1", mm2_floppies, nullptr, mmc186_device::floppy_formats).enable_sound(true); NSCSI_BUS(config, "sasi"); NSCSI_CONNECTOR(config, "sasi:0", default_scsi_devices, "s1410"); @@ -76,8 +80,17 @@ void mmc186_device::device_add_mconfig(machine_config &config) downcast(*device).io_callback().set(*this, FUNC(mmc186_device::sasi_io_w)); }); + LS259(config, m_ctrl); + m_ctrl->q_out_cb<0>().set(FUNC(mmc186_device::sasi_select_w)); + m_ctrl->q_out_cb<1>().set(FUNC(mmc186_device::sasi_ie_w)); + m_ctrl->q_out_cb<3>().set(m_fdc, FUNC(upd765_family_device::reset_w)); + //m_ctrl->q_out_cb<5>().set(); -Mini/Std Select + m_ctrl->q_out_cb<6>().set(FUNC(mmc186_device::motor_on_w)); + //m_ctrl->q_out_cb<7>().set(); Motor On (Std) + // software lists SOFTWARE_LIST(config, "flop_list").set_original("mm2_flop"); + SOFTWARE_LIST(config, "hdd_list").set_original("mm2_hdd"); } void mmc186_device::device_start() @@ -85,39 +98,27 @@ void mmc186_device::device_start() m_bus->iospace().install_device(0xfa00, 0xfaff, *this, &mmc186_device::map); // state saving + save_item(NAME(m_dma_ch)); save_item(NAME(m_dma_hi)); + save_item(NAME(m_sasi_select)); save_item(NAME(m_sasi_data)); + save_item(NAME(m_sasi_ie)); + save_item(NAME(m_sasi_irq)); + save_item(NAME(m_sasi_req)); } -void mmc186_device::device_reset() +void mmc186_device::sasi_select_w(int state) { -} + m_sasi_select = state; -uint8_t mmc186_device::dmac_mem_r(offs_t offset) -{ - u16 data = m_bus->memspace().read_word((m_dma_hi << 15) | offset >> 1); + if (!m_sasi_select) + { + m_sasi->write(0); - if (WORD_ALIGNED(offset)) - { - return data & 0xff; - } - else - { - return data >> 8; - } -} + m_dmac->dreq0_w(CLEAR_LINE); -void mmc186_device::dmac_mem_w(offs_t offset, uint8_t data) -{ - u16 old_data = m_bus->memspace().read_word((m_dma_hi << 15) | offset >> 1); - - if (WORD_ALIGNED(offset)) - { - m_bus->memspace().write_word((m_dma_hi << 15) | offset >> 1, (old_data & 0xff00) | data); - } - else - { - m_bus->memspace().write_word((m_dma_hi << 15) | offset >> 1, data << 8 | (old_data & 0xff)); + m_sasi_irq = CLEAR_LINE; + update_sasi_irq(); } } @@ -138,16 +139,27 @@ uint8_t mmc186_device::sasi_status_r(offs_t offset) void mmc186_device::sasi_cmd_w(offs_t offset, uint8_t data) { - m_sasi->sel_w(BIT(data, 0)); + if (data == 0x00) { + m_sasi_irq = CLEAR_LINE; + update_sasi_irq(); + } + + bool rst = BIT(data, 1); + if (rst) { + m_sasi_irq = ASSERT_LINE; + update_sasi_irq(); + } + + m_sasi->sel_w(rst ? 0 : BIT(data, 0)); m_sasi->rst_w(BIT(data, 1)); - m_sasi->atn_w(BIT(data, 2)); + m_sasi->atn_w(rst ? 0 : BIT(data, 2)); } uint8_t mmc186_device::sasi_data_r(offs_t offset) { uint8_t data = m_sasi->read(); - if (m_sasi->req_r()) + if (m_sasi_req && !m_sasi_irq) { m_sasi->ack_w(1); } @@ -159,12 +171,12 @@ void mmc186_device::sasi_data_w(offs_t offset, uint8_t data) { m_sasi_data = data; - if (!m_sasi->io_r()) + if (m_sasi_select && !m_sasi->io_r()) { m_sasi->write(data); } - if (m_sasi->req_r()) + if (m_sasi_req && !m_sasi_irq) { m_sasi->ack_w(1); } @@ -180,12 +192,25 @@ void mmc186_device::sasi_bsy_w(int state) void mmc186_device::sasi_req_w(int state) { - if (!state) + m_sasi_req = state; + + if (state) + { + if (!m_sasi->cd_r()) + { + m_dmac->dreq0_w(ASSERT_LINE); + } + + if (m_sasi->cd_r() && m_sasi->io_r()) + { + m_sasi_irq = ASSERT_LINE; + update_sasi_irq(); + } + } + else { m_sasi->ack_w(0); } - - m_dmac->dreq3_w(state); } void mmc186_device::sasi_io_w(int state) @@ -199,3 +224,11 @@ void mmc186_device::sasi_io_w(int state) m_sasi->write(m_sasi_data); } } + +void mmc186_device::bhlda_w(int state, int bcas) +{ + if (state == CLEAR_LINE || bcas == 3) + { + m_dmac->hack_w(state); + } +} diff --git a/src/devices/bus/mm2/mmc186.h b/src/devices/bus/mm2/mmc186.h index 3c8fea8e625..8b52dcc380d 100644 --- a/src/devices/bus/mm2/mmc186.h +++ b/src/devices/bus/mm2/mmc186.h @@ -16,7 +16,9 @@ #include "bus/scsi/s1410.h" #include "bus/scsi/scsihd.h" #include "imagedev/floppy.h" +#include "machine/74259.h" #include "machine/am9517a.h" +#include "machine/input_merger.h" #include "machine/nscsi_bus.h" #include "machine/nscsi_cb.h" #include "machine/upd765.h" @@ -32,7 +34,8 @@ protected: virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; virtual void device_start() override ATTR_COLD; - virtual void device_reset() override ATTR_COLD; + + virtual void bhlda_w(int state, int bcas) override; private: void map(address_map &map) ATTR_COLD; @@ -43,12 +46,14 @@ private: required_device m_dmac; required_device m_sasi; required_device m_fdc; + required_device m_ctrl; + required_device m_irqs; optional_device_array m_floppy; static void floppy_formats(format_registration &fr); - uint8_t dmac_mem_r(offs_t offset); - void dmac_mem_w(offs_t offset, uint8_t data); + uint8_t dmac_mem_r(offs_t offset) { return m_bus->memspace().read_byte(m_dma_hi << 16 | offset); } + void dmac_mem_w(offs_t offset, uint8_t data) { m_bus->memspace().write_byte(m_dma_hi << 16 | offset, data); } void dma_hi_w(offs_t offset, uint8_t data) { m_dma_hi = data & 0x0f; } uint8_t sasi_status_r(offs_t offset); void sasi_cmd_w(offs_t offset, uint8_t data); @@ -57,11 +62,23 @@ private: void sasi_bsy_w(int state); void sasi_req_w(int state); void sasi_io_w(int state); - void fdc_reset_w(offs_t offset, uint8_t data) { m_fdc->reset_w(!BIT(data, 0)); } - void motor_on_w(offs_t offset, uint8_t data) { m_floppy[0]->mon_w(!BIT(data, 0)); } + void eop_w(int state) { if (m_dma_ch == 1) m_fdc->tc_w(state); } + void dack0_w(int state) { set_dma_channel(0, state); if (!state) m_dmac->dreq0_w(CLEAR_LINE); }; + void dack1_w(int state) { set_dma_channel(1, state); }; + void set_dma_channel(int channel, int state) { if (state) m_dma_ch = -1; else m_dma_ch = channel; } + void sasi_select_w(int state); + void update_sasi_irq() { m_irqs->in_w<0>(m_sasi_irq && m_sasi_ie); } + void sasi_ie_w(int state) { m_sasi_ie = state; update_sasi_irq(); } + void motor_on_w(int state) { m_floppy[0]->mon_w(!state); if (m_floppy[1]) m_floppy[1]->mon_w(!state); } + int m_dma_ch; u8 m_dma_hi; + + bool m_sasi_select; u8 m_sasi_data; + bool m_sasi_ie; + bool m_sasi_irq; + bool m_sasi_req; }; #endif // MAME_BUS_MM2_MMC186_H diff --git a/src/devices/bus/nscsi/s1410.cpp b/src/devices/bus/nscsi/s1410.cpp index 52358d7e851..3e0eb688dae 100644 --- a/src/devices/bus/nscsi/s1410.cpp +++ b/src/devices/bus/nscsi/s1410.cpp @@ -70,11 +70,16 @@ void nscsi_s1410_device::scsi_command() break; case SC_SEEK: - if (scsi_cmdbuf[1] >> 5) { - scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; - } else { - scsi_status_complete(SS_GOOD); + { + const auto &info = image->get_info(); + int max_lba = (info.cylinders * info.heads * info.sectors) - 1; + lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + if (lba <= max_lba) { + scsi_status_complete(SS_GOOD); + } else { + scsi_status_complete(SS_SEEK_ERROR); + scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + } } break; diff --git a/src/mame/nokia/mikromikko2.cpp b/src/mame/nokia/mikromikko2.cpp index 1a8f2f55966..561595ddefc 100644 --- a/src/mame/nokia/mikromikko2.cpp +++ b/src/mame/nokia/mikromikko2.cpp @@ -32,15 +32,59 @@ */ +/* + + Installing MS-DOS to hard disk + ------------------------------ + + $ ./chdman createhd -chs 306,6,17 -ss 512 -o st412.chd + $ printf '\x0f%.0s' {1..256} > nvram/mm2m35d/x2212 + $ ./mame mm2m35d -rs232b terminal -flop1 msdos221 -hard st412.chd + + Select terminal keyboard in input settings + + Monitor: + + L (oad) + A (abort) + C (continue) + + Select computer keyboard in input settings + + DOS: + + SETPAR + 2 (15MB Winchester) + 2 (640KB floppy 1) + 0 (no floppy 2) + + Mount msdos221:flop2 + + WFORM C: + B + + + Wait for it... + + Mount msdos221:flop1 + + SYS C: + COPY *.* C: + + Mount msdos221:flop2 + + COPY *.* C: + +*/ + /* TODO: - - DMA - - floppy - - SASI - - video - - keyboard + - keyboard ROM is not dumped + - MPSC (DMA and interrupts) + - CRTC186 video using CRT9007 + - IOE186 card */ @@ -48,6 +92,7 @@ #include "bus/mm2/exp.h" #include "bus/rs232/rs232.h" #include "cpu/i86/i186.h" +#include "machine/74259.h" #include "machine/nvram.h" #include "machine/pic8259.h" #include "machine/pit8253.h" @@ -60,7 +105,7 @@ #include "speaker.h" #include "softlist_dev.h" -#define I80186_TAG "maincpu" +#define I80186_TAG "maincpu" namespace { @@ -77,14 +122,16 @@ public: m_speaker(*this, "speaker"), m_rs232a(*this, "rs232a"), m_rs232b(*this, "rs232b"), - m_exp(*this, "exp") + m_exp(*this, "exp"), + m_ctrl1(*this, "control1"), + m_ctrl2(*this, "control2"), + m_hold_latch(0) { } void mm2(machine_config &config); protected: virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; private: required_device m_maincpu; @@ -96,38 +143,48 @@ private: required_device m_rs232a; required_device m_rs232b; required_device m_exp; + required_device m_ctrl1; + required_device m_ctrl2; void mm2_mem(address_map &map) ATTR_COLD; void mm2_io(address_map &map) ATTR_COLD; uint8_t status_r(offs_t offset); - void novram_store(offs_t offset, uint8_t data); - void novram_recall(offs_t offset, uint8_t data); + uint8_t novram_r(offs_t offset) { return m_novram->read(m_maincpu->space(AS_PROGRAM), offset) << 4; }; + void novram_w(offs_t offset, uint8_t data) { m_novram->write(offset, data >> 4); }; + uint16_t mpsc_r(offs_t offset, uint16_t mem_mask); + void mpsc_w(offs_t offset, uint16_t data, uint16_t mem_mask); + void novram_store(offs_t offset, uint8_t data) { m_novram->store(1); m_novram->store(0); } void tcl_w(offs_t offset, uint8_t data) { m_pic->ir0_w(CLEAR_LINE); } - void diag_w(offs_t offset, uint8_t data) { popmessage("%02x", data); } - void cls0_w(offs_t offset, uint8_t data) { m_cls0 = BIT(data, 0); } - void cls1_w(offs_t offset, uint8_t data) { m_cls1 = BIT(data, 0); } - void dtra_w(offs_t offset, uint8_t data) { m_rs232a->write_dtr(!BIT(data, 0)); } - void dtrb_w(offs_t offset, uint8_t data) { m_rs232b->write_dtr(!BIT(data, 0)); } + void diag_w(offs_t offset, uint8_t data) { logerror("DIAG %02x\n", data); } + void cls0_w(int state) { m_cls0 = state; } + void cls1_w(int state) { m_cls1 = state; } + void llba_w(int state) { m_llba = state; } + void llbb_w(int state) { m_llbb = state; } + void mpsc_txda_w(int state) { if (m_llba) m_mpsc->rxa_w(state); else m_rs232a->write_txd(state); } + void mpsc_txdb_w(int state) { if (m_llbb) m_mpsc->rxb_w(state); else m_rs232b->write_txd(state); } + void mpsc_rtsa_w(int state) { if (m_llba) m_mpsc->ctsa_w(state); else m_rs232a->write_rts(state); } + void mpsc_rtsb_w(int state) { if (m_llbb) m_mpsc->ctsb_w(state); else m_rs232b->write_rts(state); } void tmrout0_w(int state) { if (!m_cls1 && !m_cls0) { m_mpsc->rxca_w(state); m_mpsc->txca_w(state); } }; void tmrout1_w(int state) { if (!m_cls1 && m_cls0) { m_mpsc->rxca_w(state); m_mpsc->txca_w(state); } }; - void ir0_w(int state) { if (state) { m_pic->ir0_w(ASSERT_LINE); } } + void latch_hold(int state, int bit); + void update_bhlda(); + void hold1_w(int state) { latch_hold(state, 0); } + void hold2_w(int state) { latch_hold(state, 1); } + void hold3_w(int state) { latch_hold(state, 2); } + void hold4_w(int state) { latch_hold(state, 3); } + void hold5_w(int state) { latch_hold(state, 4); } + + uint8_t slave_ack_r(offs_t offset) { if (offset == 7) return m_maincpu->int_callback(*this, 0); return 0; } bool m_cls0; bool m_cls1; + bool m_llba; + bool m_llbb; + + u8 m_hold_latch; }; -void mm2_state::novram_store(offs_t offset, uint8_t data) -{ - m_novram->store(1); - m_novram->store(0); -} - -void mm2_state::novram_recall(offs_t offset, uint8_t data) -{ - m_novram->recall(!BIT(data, 0)); -} - uint8_t mm2_state::status_r(offs_t offset) { uint8_t data = 0x80; @@ -137,53 +194,99 @@ uint8_t mm2_state::status_r(offs_t offset) return data; } +uint16_t mm2_state::mpsc_r(offs_t offset, uint16_t mem_mask) +{ + if (ACCESSING_BITS_8_15 && offset == 2) + return status_r(0) << 8; + + if (ACCESSING_BITS_0_7) + return m_mpsc->cd_ba_r(offset); + + return 0; +} + +void mm2_state::mpsc_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (ACCESSING_BITS_0_7) + m_mpsc->cd_ba_w(offset, data & 0xff); +} + +void mm2_state::latch_hold(int state, int bit) +{ + if (state) + m_hold_latch |= 1 << bit; + else + m_hold_latch &= ~(1 << bit); + + update_bhlda(); +} + +void mm2_state::update_bhlda() +{ + int bcas = 0; + if (BIT(m_hold_latch, 0)) bcas = 1; + else if (BIT(m_hold_latch, 1)) bcas = 2; + else if (BIT(m_hold_latch, 2)) bcas = 3; + else if (BIT(m_hold_latch, 3)) bcas = 4; + else if (BIT(m_hold_latch, 4)) bcas = 5; + + line_state bhlda = bcas ? ASSERT_LINE : CLEAR_LINE; + m_maincpu->set_input_line(INPUT_LINE_HALT, bhlda); + m_exp->bhlda_w(bhlda, bcas); +} + void mm2_state::mm2_mem(address_map &map) { - map(0x00000, 0x1ffff).ram(); // DRAM 128 KB (on SBC186) - map(0x20000, 0x3ffff).ram(); // DRAM 128 KB (on SBC186) - map(0x40000, 0x7ffff).ram(); // DRAM 256 KB (on SBC186 or MEME186) - map(0x80000, 0xbffff).ram(); // DRAM 256 KB (on MEME186) - map(0xf0000, 0xf01ff).rw(m_novram, FUNC(x2212_device::read), FUNC(x2212_device::write)).umask16(0xff00); + map(0x00000, 0x3ffff).ram(); + map(0xc0000, 0xeffff).noprw(); + map(0xf0000, 0xf01ff).rw(FUNC(mm2_state::novram_r), FUNC(mm2_state::novram_w)).umask16(0x00ff); map(0xf0200, 0xfffff).rom().region(I80186_TAG, 0x200); } void mm2_state::mm2_io(address_map &map) { map(0xf800, 0xf803).rw(m_pic, FUNC(pic8259_device::read), FUNC(pic8259_device::write)).umask16(0x00ff); - map(0xf880, 0xf887).rw(m_mpsc, FUNC(i8274_device::cd_ba_r), FUNC(i8274_device::cd_ba_w)).umask16(0x00ff); - map(0xf884, 0xf885).r(FUNC(mm2_state::status_r)).umask16(0xff00); - map(0xf900, 0xf901).w(FUNC(mm2_state::novram_store)).umask16(0x00ff); + map(0xf880, 0xf887).rw(FUNC(mm2_state::mpsc_r), FUNC(mm2_state::mpsc_w)); + //map(0xf880, 0xf887).rw(m_mpsc, FUNC(i8274_device::cd_ba_r), FUNC(i8274_device::cd_ba_w)).umask16(0x00ff); + //map(0xf884, 0xf885).r(FUNC(mm2_state::status_r)).umask16(0xff00); + map(0xf900, 0xf901).w(FUNC(mm2_state::novram_store)).umask16(0xff00); map(0xf930, 0xf937).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0xff00); map(0xf940, 0xf941).w(FUNC(mm2_state::tcl_w)).umask16(0xff00); map(0xf950, 0xf951).w(FUNC(mm2_state::diag_w)).umask16(0xff00); - map(0xf960, 0xf961).w(FUNC(mm2_state::cls0_w)).umask16(0xff00); - map(0xf962, 0xf963).w(FUNC(mm2_state::cls1_w)).umask16(0xff00); - //map(0xf965, 0xf965) LOOPBACK LLBA - //map(0xf967, 0xf967) LOOPBACK LLBB - //map(0xf969, 0xf969) DATA CODING NRZI - //map(0xf96b, 0xf96b) SIGNAL LEVELS V24 - //map(0xf96d, 0xf96d) SIGNAL LEVELS X27 - map(0xf96e, 0xf96f).w(FUNC(mm2_state::dtra_w)).umask16(0xff00); - //map(0xf971, 0xf971) V24 SIGNAL TSTA - //map(0xf973, 0xf973) V24 SIGNAL SRSA - map(0xf974, 0xf975).w(FUNC(mm2_state::dtrb_w)).umask16(0xff00); - //map(0xf97d, 0xf97d) ??? - map(0xf97e, 0xf97f).w(FUNC(mm2_state::novram_recall)).umask16(0xff00); + map(0xf960, 0xf96f).w(m_ctrl1, FUNC(ls259_device::write_d0)).umask16(0xff00); + map(0xf970, 0xf97f).w(m_ctrl2, FUNC(ls259_device::write_d0)).umask16(0xff00); } static INPUT_PORTS_START( mm2 ) - // defined in mm2kb.cpp + // defined in bus/mm2/mm2kb.cpp INPUT_PORTS_END void mm2_state::machine_start() { + m_mpsc->synca_w(1); + + u8 *rom = memregion(I80186_TAG)->base(); + + // patch out ROM checksum validation + rom[0x051c] = 0x90; + rom[0x051d] = 0x90; + + // patch out MPSC test which fails due to missing DMA and interrupts + rom[0x1cf8] = 0x90; + rom[0x1cf9] = 0x90; + rom[0x1cfa] = 0x90; + + // patch out CRTC186 test which fails due to missing keyboard emulation + rom[0x1d00] = 0x90; + rom[0x1d01] = 0x90; + rom[0x1d02] = 0x90; + // state saving save_item(NAME(m_cls0)); save_item(NAME(m_cls1)); -} - -void mm2_state::machine_reset() -{ + save_item(NAME(m_llba)); + save_item(NAME(m_llbb)); + save_item(NAME(m_hold_latch)); } void mm2_state::mm2(machine_config &config) @@ -193,36 +296,57 @@ void mm2_state::mm2(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &mm2_state::mm2_mem); m_maincpu->set_addrmap(AS_IO, &mm2_state::mm2_io); m_maincpu->irmx_irq_cb().set(m_pic, FUNC(pic8259_device::ir7_w)); - m_maincpu->read_slave_ack_callback().set(m_pic, FUNC(pic8259_device::acknowledge)); + m_maincpu->set_irmx_irq_ack(m_pic, FUNC(pic8259_device::inta_cb)); + m_maincpu->irqa_cb().set(m_exp, FUNC(mikromikko2_expansion_bus_device::inta_w)); m_maincpu->tmrout0_handler().set(FUNC(mm2_state::tmrout0_w)); m_maincpu->tmrout1_handler().set(FUNC(mm2_state::tmrout1_w)); PIC8259(config, m_pic); m_pic->out_int_callback().set(m_maincpu, FUNC(i80186_cpu_device::int0_w)); + m_pic->in_sp_callback().set_constant(1); + m_pic->read_slave_ack_callback().set(FUNC(mm2_state::slave_ack_r)); PIT8253(config, m_pit); m_pit->set_clk<0>(XTAL(16'000'000)/8); m_pit->set_clk<1>(XTAL(16'000'000)/8); m_pit->set_clk<2>(XTAL(16'000'000)/8); - m_pit->out_handler<0>().set(FUNC(mm2_state::ir0_w)); + m_pit->out_handler<0>().set(m_pic, FUNC(pic8259_device::ir0_w)); m_pit->out_handler<1>().set(m_mpsc, FUNC(i8274_device::rxtxcb_w)); m_pit->out_handler<2>().set(m_speaker, FUNC(speaker_sound_device::level_w)); I8274(config, m_mpsc, XTAL(16'000'000)/4); - m_mpsc->out_txda_callback().set(m_rs232a, FUNC(rs232_port_device::write_txd)); - m_mpsc->out_rtsa_callback().set(m_rs232a, FUNC(rs232_port_device::write_rts)); - m_mpsc->out_txdb_callback().set(m_rs232b, FUNC(rs232_port_device::write_txd)); - m_mpsc->out_rtsb_callback().set(m_rs232b, FUNC(rs232_port_device::write_rts)); m_mpsc->out_int_callback().set(m_pic, FUNC(pic8259_device::ir1_w)); + m_mpsc->out_txdrqa_callback().set(m_maincpu, FUNC(i80186_cpu_device::drq0_w)); + m_mpsc->out_rxdrqa_callback().set(m_maincpu, FUNC(i80186_cpu_device::drq1_w)); + m_mpsc->out_txda_callback().set(FUNC(mm2_state::mpsc_txda_w)); + m_mpsc->out_rtsa_callback().set(FUNC(mm2_state::mpsc_rtsa_w)); + m_mpsc->out_txdb_callback().set(FUNC(mm2_state::mpsc_txdb_w)); + m_mpsc->out_rtsb_callback().set(FUNC(mm2_state::mpsc_rtsb_w)); RS232_PORT(config, m_rs232a, default_rs232_devices, nullptr); - m_rs232a->rxd_handler().set(m_mpsc, FUNC(z80dart_device::rxa_w)); - m_rs232a->dcd_handler().set(m_mpsc, FUNC(z80dart_device::dcda_w)); - m_rs232a->cts_handler().set(m_mpsc, FUNC(z80dart_device::ctsa_w)); + m_rs232a->rxd_handler().set(m_mpsc, FUNC(i8274_device::rxa_w)); + m_rs232a->dcd_handler().set(m_mpsc, FUNC(i8274_device::dcda_w)); + m_rs232a->cts_handler().set(m_mpsc, FUNC(i8274_device::ctsa_w)); - RS232_PORT(config, m_rs232b, default_rs232_devices, "terminal"); - m_rs232b->rxd_handler().set(m_mpsc, FUNC(z80dart_device::rxb_w)); - m_rs232b->cts_handler().set(m_mpsc, FUNC(z80dart_device::ctsb_w)); + RS232_PORT(config, m_rs232b, default_rs232_devices, nullptr); + m_rs232b->rxd_handler().set(m_mpsc, FUNC(i8274_device::rxb_w)); + m_rs232b->cts_handler().set(m_mpsc, FUNC(i8274_device::ctsb_w)); + + LS259(config, m_ctrl1); + m_ctrl1->q_out_cb<0>().set(FUNC(mm2_state::cls0_w)); + m_ctrl1->q_out_cb<1>().set(FUNC(mm2_state::cls1_w)); + m_ctrl1->q_out_cb<2>().set(FUNC(mm2_state::llba_w)); + m_ctrl1->q_out_cb<3>().set(FUNC(mm2_state::llbb_w)); + //m_ctrl1->q_out_cb<4>().set(); DATA CODING NRZI (0=NRZ, 1=NRZI) + //m_ctrl1->q_out_cb<5>().set(); SIGNAL LEVELS V28 (1=V.28) + //m_ctrl1->q_out_cb<6>().set(); SIGNAL LEVELS X27 (1=X.27) + m_ctrl1->q_out_cb<7>().set(m_rs232a, FUNC(rs232_port_device::write_dtr)).invert(); + + LS259(config, m_ctrl2); + //m_ctrl2->q_out_cb<0>().set(); V24 SIGNAL TSTA INVERTED + //m_ctrl2->q_out_cb<1>().set(); V24 SIGNAL SRSA INVERTED + m_ctrl2->q_out_cb<2>().set(m_rs232b, FUNC(rs232_port_device::write_dtr)).invert(); + m_ctrl2->q_out_cb<7>().set(m_novram, FUNC(x2212_device::recall)).invert(); X2212(config, m_novram); @@ -230,24 +354,24 @@ void mm2_state::mm2(machine_config &config) SPEAKER_SOUND(config, m_speaker, 0).add_route(ALL_OUTPUTS, "mono", 1.00); MIKROMIKKO2_EXPANSION_BUS(config, m_exp, 0); - m_exp->set_memspace(I80186_TAG, AS_PROGRAM); - m_exp->set_iospace(I80186_TAG, AS_IO); + m_exp->set_memspace(m_maincpu, AS_PROGRAM); + m_exp->set_iospace(m_maincpu, AS_IO); m_exp->nmi_callback().set_inputline(m_maincpu, INPUT_LINE_NMI); m_exp->ir2_callback().set(m_pic, FUNC(pic8259_device::ir2_w)); m_exp->ir3_callback().set(m_pic, FUNC(pic8259_device::ir3_w)); m_exp->ir4_callback().set(m_pic, FUNC(pic8259_device::ir4_w)); m_exp->ir5_callback().set(m_pic, FUNC(pic8259_device::ir5_w)); - m_exp->hold1_callback().set_inputline(m_maincpu, INPUT_LINE_HALT); - m_exp->hold2_callback().set_inputline(m_maincpu, INPUT_LINE_HALT); - m_exp->hold3_callback().set_inputline(m_maincpu, INPUT_LINE_HALT); - m_exp->hold4_callback().set_inputline(m_maincpu, INPUT_LINE_HALT); - m_exp->hold5_callback().set_inputline(m_maincpu, INPUT_LINE_HALT); + m_exp->hold1_callback().set(FUNC(mm2_state::hold1_w)); + m_exp->hold2_callback().set(FUNC(mm2_state::hold2_w)); + m_exp->hold3_callback().set(FUNC(mm2_state::hold3_w)); + m_exp->hold4_callback().set(FUNC(mm2_state::hold4_w)); + m_exp->hold5_callback().set(FUNC(mm2_state::hold5_w)); MIKROMIKKO2_EXPANSION_BUS_SLOT(config, "exp1", 0, m_exp, mikromikko2_expansion_bus_cards, "mmc186", false); MIKROMIKKO2_EXPANSION_BUS_SLOT(config, "exp2", 0, m_exp, mikromikko2_expansion_bus_cards, "crtc186", false); MIKROMIKKO2_EXPANSION_BUS_SLOT(config, "exp3", 0, m_exp, mikromikko2_expansion_bus_cards, nullptr, false); MIKROMIKKO2_EXPANSION_BUS_SLOT(config, "exp4", 0, m_exp, mikromikko2_expansion_bus_cards, nullptr, false); - MIKROMIKKO2_EXPANSION_BUS_SLOT(config, "exp5", 0, m_exp, mikromikko2_expansion_bus_cards, nullptr, false); + MIKROMIKKO2_EXPANSION_BUS_SLOT(config, "exp5", 0, m_exp, mikromikko2_expansion_bus_cards, "meme186", false); } ROM_START( mm2m35d ) @@ -263,6 +387,9 @@ ROM_START( mm2m35d ) ROMX_LOAD( "9490c.ic52", 0x0001, 0x4000, CRC(bfde706e) SHA1(8a154aa00d480684b00aa7c30be6d6a78dd9ddaa), ROM_SKIP(1) | ROM_BIOS(1) ) ROMX_LOAD( "9489c.ic41", 0x8000, 0x4000, CRC(b5086aac) SHA1(f8d7a936baa701dcc30949fe1241be2ab9b80201), ROM_SKIP(1) | ROM_BIOS(1) ) ROMX_LOAD( "9491c.ic58", 0x8001, 0x4000, CRC(32047735) SHA1(408f03bc2d89257488e4b3336500681bb168cdec), ROM_SKIP(1) | ROM_BIOS(1) ) + + ROM_REGION( 0x100, "x2212", 0 ) + ROM_LOAD( "x2212", 0x000, 0x100, CRC(1b9f1518) SHA1(57928b28f654be84a00797ab5b5fa0389ae36016) ) ROM_END } // anonymous namespace From 60d163fe375633cc9f43420c51714eabbb15881b Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Mon, 2 Mar 2026 19:01:58 +0200 Subject: [PATCH 095/351] machine/upd765: Let the controller idle during soft reset. [Curt Coder] MikroMikko 2 expects to read 0 from MSR while the FDC is in reset. --- src/devices/machine/upd765.cpp | 3 ++- src/devices/machine/upd765.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/devices/machine/upd765.cpp b/src/devices/machine/upd765.cpp index 161b0810ac3..b3ebdfff53a 100644 --- a/src/devices/machine/upd765.cpp +++ b/src/devices/machine/upd765.cpp @@ -355,7 +355,7 @@ void upd765_family_device::device_reset() void upd765_family_device::soft_reset() { - main_phase = PHASE_CMD; + main_phase = PHASE_IDLE; for(int i=0; i<4; i++) { flopi[i].main_state = IDLE; flopi[i].sub_state = IDLE; @@ -392,6 +392,7 @@ void upd765_family_device::soft_reset() void upd765_family_device::end_reset() { + main_phase = PHASE_CMD; if(ready_polled) poll_timer->adjust(attotime::from_usec(100), 0, attotime::from_usec(1024)); } diff --git a/src/devices/machine/upd765.h b/src/devices/machine/upd765.h index 9c0cb293a16..78a77e7918d 100644 --- a/src/devices/machine/upd765.h +++ b/src/devices/machine/upd765.h @@ -69,7 +69,7 @@ protected: TIMER_CALLBACK_MEMBER(update_floppy); enum { - PHASE_CMD, PHASE_EXEC, PHASE_RESULT + PHASE_IDLE, PHASE_CMD, PHASE_EXEC, PHASE_RESULT }; enum { From 0211ef9502fc23e6c428511e222111f28b2dcc9d Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Mon, 2 Mar 2026 19:12:03 +0200 Subject: [PATCH 096/351] i80186: The invalid opcode is a trap. [Curt Coder] --- src/devices/cpu/i86/i186.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp index cb3ae45f526..11470a49d5a 100644 --- a/src/devices/cpu/i86/i186.cpp +++ b/src/devices/cpu/i86/i186.cpp @@ -395,7 +395,6 @@ void i80186_cpu_device::execute_run() break; default: logerror("%06x: Mov Sreg - Invalid register\n", m_pc); - m_ip = m_prev_ip; interrupt(6); break; } @@ -646,7 +645,6 @@ void i80186_cpu_device::execute_run() { m_icount -= 10; // UD fault timing? logerror("%06x: Invalid Opcode %02x\n", m_pc, op); - m_ip = m_prev_ip; interrupt(6); // 80186 has #UD break; } From 7f4b3b93c8fd255aadf8e99a1a8578f8bf9378c0 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 2 Mar 2026 18:19:25 +0100 Subject: [PATCH 097/351] New working clones ------------------ Darkstalkers: The Night Warriors (Brazil 940818) [Cassiano Perin, Filipe Nascimento (Rio Arcade Club), CPS Raptor Group, SHVB] - src/mame/seibu/bloodbro.cpp: added PCB infos [Guru] - src/mame/toaplan/toaplan1.cpp: added PCB infos for Out Zone [Guru] --- src/mame/capcom/cps2.cpp | 37 +++++++++++++++- src/mame/mame.lst | 1 + src/mame/seibu/bloodbro.cpp | 66 +++++++++++++++++++++++++++- src/mame/toaplan/toaplan1.cpp | 82 ++++++++++++++++++++++++++++++++++- 4 files changed, 183 insertions(+), 3 deletions(-) diff --git a/src/mame/capcom/cps2.cpp b/src/mame/capcom/cps2.cpp index 8375c63558a..3ce8cb3c730 100644 --- a/src/mame/capcom/cps2.cpp +++ b/src/mame/capcom/cps2.cpp @@ -4295,6 +4295,40 @@ ROM_START( dstlkh ) ROM_LOAD( "dstlkh.key", 0x000000, 0x000014, CRC(d748cb77) SHA1(748be38bbc766be8eebf6a60770801942ad502f2) ) ROM_END +ROM_START( dstlkb ) // just the region byte changed if compared to the Hispanic version + ROM_REGION( CODE_SIZE, "maincpu", 0 ) // 68000 code + ROM_LOAD16_WORD_SWAP( "vamb.03a", 0x000000, 0x80000, CRC(48831596) SHA1(894f2b03e62ec29e8d92bb2723f86929762b222a) ) + ROM_LOAD16_WORD_SWAP( "vamb.04a", 0x080000, 0x80000, CRC(2217e9a0) SHA1(b86ee89457d8a0cf828f1bed247f3b2c0c91b170) ) + ROM_LOAD16_WORD_SWAP( "vamb.05a", 0x100000, 0x80000, CRC(3a05b13c) SHA1(14b58954bdff8dd699f867037a86f0bae8095e9d) ) + ROM_LOAD16_WORD_SWAP( "vamb.06a", 0x180000, 0x80000, CRC(11d70a1c) SHA1(e13c5afeb9cb64ec60d570b81d7fac4869c76d1d) ) + ROM_LOAD16_WORD_SWAP( "vamb.07a", 0x200000, 0x80000, CRC(db5a8767) SHA1(86274080e4423d09e10f2db56a4e685b32acfa18) ) + ROM_LOAD16_WORD_SWAP( "vamb.08a", 0x280000, 0x80000, CRC(2a4fd79b) SHA1(ff0398db43ef849365ad88b9b57661db3a3b65c6) ) + ROM_LOAD16_WORD_SWAP( "vamb.09a", 0x300000, 0x80000, CRC(15187632) SHA1(81b7166334dc3c331673822c31581e0e7809b698) ) + ROM_LOAD16_WORD_SWAP( "vamb.10a", 0x380000, 0x80000, CRC(192d2d81) SHA1(ea99f2ea3e28edfc203e967924500dad10abb43f) ) + + ROM_REGION( 0x1400000, "gfx", 0 ) + ROM_LOAD64_WORD( "vam.13m", 0x0000000, 0x400000, CRC(c51baf99) SHA1(2fb6642908e542e404391eb17392f8270e87bf48) ) + ROM_LOAD64_WORD( "vam.15m", 0x0000002, 0x400000, CRC(3ce83c77) SHA1(93369b23c6d7d834297434691bb047ee3dd9539c) ) + ROM_LOAD64_WORD( "vam.17m", 0x0000004, 0x400000, CRC(4f2408e0) SHA1(cd49c6b3c7e6470c6058f98ccc5210b052bb13e2) ) + ROM_LOAD64_WORD( "vam.19m", 0x0000006, 0x400000, CRC(9ff60250) SHA1(d69ba4dc6bd37d003245f0cf3211d6e2623005b8) ) + ROM_LOAD64_WORD( "vam.14m", 0x1000000, 0x100000, CRC(bd87243c) SHA1(87b33aeb72514e1228ffc27ec6dd534f14882760) ) + ROM_LOAD64_WORD( "vam.16m", 0x1000002, 0x100000, CRC(afec855f) SHA1(cd117833b8d475489b90ff44b57e2c5cb1af3af5) ) + ROM_LOAD64_WORD( "vam.18m", 0x1000004, 0x100000, CRC(3a033625) SHA1(294238f30cba5cf4f8f1de951d54c2077bd95de9) ) + ROM_LOAD64_WORD( "vam.20m", 0x1000006, 0x100000, CRC(2bff6a89) SHA1(8f4e131e5ce0af48fb89f98026d9f0356c7c301f) ) + + ROM_REGION( QSOUND_SIZE, "audiocpu", 0 ) // 64k for the audio CPU (+banks) + ROM_LOAD( "vam.01", 0x00000, 0x08000, CRC(64b685d5) SHA1(6c180e7420db754eca5cad17a40f5a64f5c3bd15) ) + ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_LOAD( "vam.02", 0x28000, 0x20000, CRC(cf7c97c7) SHA1(109a4b56ecd59be9c3f5869de99d40619bdaef21) ) + + ROM_REGION( 0x400000, "qsound", 0 ) // QSound samples + ROM_LOAD16_WORD_SWAP( "vam.11m", 0x000000, 0x200000, CRC(4a39deb2) SHA1(7e63e615869958db66a4e52a0272afee5a10e446) ) + ROM_LOAD16_WORD_SWAP( "vam.12m", 0x200000, 0x200000, CRC(1a3e5c03) SHA1(c5a556e125d6c3d68da745b4d56cd7a851f2a23d) ) + + ROM_REGION( 0x20, "key", 0 ) + ROM_LOAD( "dstlkb.key", 0x000000, 0x000014, CRC(d748cb77) SHA1(748be38bbc766be8eebf6a60770801942ad502f2) ) // Brazilian set, but still uses the Hispanic key +ROM_END + ROM_START( ecofghtr ) ROM_REGION( CODE_SIZE, "maincpu", 0 ) // 68000 code ROM_LOAD16_WORD_SWAP( "uece.03", 0x000000, 0x80000, CRC(ec2c1137) SHA1(19c5b68cccd682d3996faf8c5f07a644b2384b1c) ) @@ -6949,7 +6983,7 @@ ROM_START( ringdestb ) ROM_LOAD16_WORD_SWAP( "smb.12m", 0x200000, 0x200000, CRC(955b0782) SHA1(ee09500e7b44e923126533613bfe26cdabc7ab5f) ) ROM_REGION( 0x20, "key", 0 ) - ROM_LOAD( "ringdesth.key", 0x000000, 0x000014, CRC(ffb8d049) SHA1(c6d111412c3960b24a1be5c49fe4ec4d17324e06) ) /* Brazilian set, but still uses the Hispanic key */ + ROM_LOAD( "ringdesth.key", 0x000000, 0x000014, CRC(ffb8d049) SHA1(c6d111412c3960b24a1be5c49fe4ec4d17324e06) ) // Brazilian set, but still uses the Hispanic key ROM_END ROM_START( mmancp2u ) @@ -12633,6 +12667,7 @@ GAME( 1994, dstlku, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1994, dstlkur1, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (USA 940705)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dstlka, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (Asia 940705)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dstlkh, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (Hispanic 940818)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, dstlkb, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (Brazil 940818)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, vampj, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire: The Night Warriors (Japan 940705)", MACHINE_SUPPORTS_SAVE ) // Partial update set? Only rom 04 is "B" revision GAME( 1994, vampja, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire: The Night Warriors (Japan 940705 alt)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, vampjr1, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire: The Night Warriors (Japan 940630)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 5cc2108edac..9919dd3f298 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -15786,6 +15786,7 @@ dimahoou dimahoud dstlk dstlka +dstlkb dstlkh dstlku dstlku1d diff --git a/src/mame/seibu/bloodbro.cpp b/src/mame/seibu/bloodbro.cpp index 1855ecc0b5b..3aa9a73c623 100644 --- a/src/mame/seibu/bloodbro.cpp +++ b/src/mame/seibu/bloodbro.cpp @@ -922,6 +922,70 @@ void bloodbro_state::skysmash(machine_config &config) } +/***************************************************************** +Blood Bros, TAD, 1990 +Hardware info by Guru +--------------------- + + +BLOOD BROTHERS-A +TAD CORPORATION +|--------------------------------------------------| +|LA4460 YM3812 M6295 8.U095 7.U1016 Z80A 7.15909MHz| +| VOL YM3014 |---------| 6116 CB007.U1014 | +| |SEI0100BU| 82S135.U083 | +| HB-41 |---------| 6.U063 |-----| | +| |-----| BK.U064 |SEI | | +|J UEC-52 |SEI | 5.U061 |0160 | | +|A |0181 | |-----| |-----| | +|M UEC-02 |-----| |SEI | CB008.U0242| +|M UEC-01 |0200 | 58257 58257 | +|A UEC-01 |-----| |-----| 4.U023 3.U024 | +| UEC-01 |SEI | 2.U021 1.U022 | +| UEC-01 |0220 | CB9.U057 | +| OBJ.U078 |-----| CB001.U0110 | +| CB5.U076 | +| |-------| 5864 CB002.U0235 | +| | | 5864 | +| |SEI0210| |--------------| | +| | | | 68000 | | +| |-------| |--------------| | +| SW047 SW046 20MHz | +| 12MHz CB4.U073 PST518| +|--------------------------------------------------| +Notes: + 68000 - Clock 10.000MHz [20/2] + Z80 - Z80A CPU, clock 3.579545MHz [7.15909/2] + 6116 - 2kx8 SRAM (Z80 RAM) + 5864 - Sony CXK5864 8kx8 SRAM (sprite RAM) + 58257 - Sony CXK58257 32kx8 SRAM (68000 RAM) + HB-41 - Seibu HB-41 Custom Audio-Mixer OP-AMP Module (contains NJM4560 and NJM2060) + Full schematic and repair info available at.... + https://gurudumps.otenko.com/re/ + UEC-01 - Seibu UEC-01 Custom I/O Multiplexor Module + UEC-02 - Seibu UEC-02 Custom Coin Counter/Lockout Module + UEC-52 - Seibu UEC-52 Custom 12-bit RGB DAC Module + 82S135 - 256x8 Bipolar PROM, marked 'CB6' + CB* - 20 pin PALs/GALs + VSync - 59.4094Hz \ + HSync - 15.6246kHz / measured values + M6295 - Oki M6295 4-Channel Mixing ADPCM Voice Synthesis LSI, clock input 1.000MHz [12/12], pin 7 HIGH + YM3812 - Yamaha YM3812 OPLII Sound Generator, clock input 3.579545MHz [7.15909/2] + YM3014 - Yamaha YM3014 DAC, clock input 894.88625kHz [7.15909/2/4] + LA4460 - Sanyo LA4460 12W AF (Audio Frequency) Power Amplifier + SEI0210 - Seibu Custom Sprite Generator, clock input 12.000MHz + Other SEI* - Seibu Custom Graphics Chips + BK.U064 - DIP42 mask ROM used to hold background graphics + OBJ.U078 - DIP42 mask ROM used to hold sprite graphics + 1-4 - 68000 Main Program EPROMs + 5-6 - Text Tile ROMs + 7 - Z80 Sound Program EPROM + 8 - Oki M6295 Sample ROM + SW046/7 - 8-position DIP Switches + PST518 - Mitsumi PST518 System Reset IC + +*****************************************************************/ + // ROMs ROM_START( bloodbro ) @@ -1216,7 +1280,7 @@ void weststry_state::init_weststry() } // anonymous namespace -/* Game Drivers */ +// Game Drivers GAME( 1990, bloodbro, 0, bloodbro, bloodbro, bloodbro_state, empty_init, ROT0, "TAD Corporation", "Blood Bros. (World?)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE ) GAME( 1990, bloodbroj, bloodbro, bloodbro, bloodbro, bloodbro_state, empty_init, ROT0, "TAD Corporation", "Blood Bros. (Japan, rev A)", MACHINE_NO_COCKTAIL | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/toaplan/toaplan1.cpp b/src/mame/toaplan/toaplan1.cpp index 558e3183334..68a37fd0f41 100644 --- a/src/mame/toaplan/toaplan1.cpp +++ b/src/mame/toaplan/toaplan1.cpp @@ -2540,6 +2540,86 @@ ROM_START( demonwld5 ) // standard TP-O16 PCB ROM_LOAD( "prom13.bpr", 0x20, 0x20, CRC(a1e17492) SHA1(9ddec4c97f2d541f69f3c32c47aaa21fd9699ae2) ) // ??? ROM_END + +/************************************************************ +Out Zone, Toaplan 1990 +Hardware info by Guru +---------------------- + + +TOAPLAN Co., Ltd. +TP-018 (note: 0=ZERO, not letter O) +|---------------------------------------------------------| +|MB3730 6116 MN53007 ROM4.1~4DE | +| 09.2~3K JP10 ROM3.1~4D | +|VOL LM358 Z80B JP16 JP15 JP7 ROM2.1~4C | +| YM3014 07.7H * JP8 ROM1.1~4B| +| YM3812 PST518 08.7F * JP9 6264 6264 | +| 28MHz |-------------| JP11 JP12 | +| | 68000 | 10MHz JP13 JP14| +| |-------------| 6264 | +| JP5 JP6 JP17 | +| |------| 6264 | +| |D65024| | +|J |GF035 | 62256 |-------| 6264 | +|A |------| | | | +|M 65728 62256 | FCU-2 | 6264 | +|M 65728 6116 | | | +|A 65728 6116 62256 |-------| 6264 | +| 65728 | +| |-------| 62256 6116 6116 | +| SW1 | | 6116 | +| SW2 | BCU-2 | 82S123.18A| +| | | | +| JP3 JP1 |-------| 82S123.20C | +|JP4 JP2 ROM5.19~20HJK | +| ROM6.21~22HJK | +|---------------------------------------------------------| +Notes: + 68000 - Motorola MC68000P10 CPU. Clock input 10.000MHz + Z80B - ST Z80B CPU. Clock input 3.500MHz [28/8] + YM3812 - Yamaha YM3812 FM operator type-L II (OPL II) LSI (DIP24). Clock input 3.500MHz [28/8] + YM3014 - Yamaha YM3014 Serial Input Floating D/A Converter (DIP8). Serial clock 875kHz [28/8/4] + 6116 - 6116 2kx8 SRAM (DIP24) + 6264 - Hitachi HM6264 8kx8 SRAM (DIP28) + 62256 - Hitachi 62256KP-12 32kx8 SRAM (DIP28). Note these are configured as 16kb (see jumper info) + 65728 - HMC HM3-65728K-5 2kx8 SRAM (SDIP28) + FCU-2 - Custom Sprite Generator (QFP136) + BCU-2 - Custom Background Tile Generator (QFP136) + D65024 - NEC D65024GF035 uPD65000-series CMOS Gate Array, marked 'SCU' (QFP100) + MN53007 - Panasonic MN53000-series Gate Array (DIP42). Marked 'GXL-02' on the schematic. + LM358 - National Semiconductor LM358 Dual Operational Amplifier (DIP8) + PST518 - Mitsumi PST518 System Reset (TO92) + 82S123.18A - Philips/Signetics N82S123 Bipolar PROM, marked '4', PCB marked 'ROM10' (DIP16) \ both affects + 82S123.20C - Philips/Signetics N82S123 Bipolar PROM, marked '6', PCB marked 'ROM11' (DIP16) / sprites + MB3730 - Fujitsu MB3730 14W BTL Audio Power Amplifier + SW1,SW2 - 8-position DIP switch + HSYNC - 15.55544kHz - measured on 'SCU' (HS) + VSYNC - 55.1612Hz - measured on 'SCU' (VS) + * - Not populated position for 27C256 EPROMs + ROMs - ROM1..4 - 28 pin 1Mbit mask ROM (non-JEDEC) for sprite data. Jumpers can be set + to use 27C010 EPROM, see jumper info below. + ROM5,6 - 42 pin 8Mbit mask ROM (read as NEC 27C8000 or Toshiba TC578200) + 07,08 - 27C010 EPROM (main program). Note 07.7H CRC32=127A38D7, 08.7F CRC32=9704DB16 + 09 - 27C256 EPROM (Z80 program) + JUMPERS - JP1,2,3,4 - Region Jumpers. Changes the copyright notice country/region. Any combination works. + JP5,6,17 - 62256 SRAM Configuration Jumpers. Default = JP5 shorted, others open (don't change) + JP5/JP6 pulls 62256 SRAM A4 to VCC/GND. + JP17 connects 62256 SRAM A4 to 62256 SRAM A14. + Default is JP5 tied to VCC so these SRAMs are set as 16kb each. + JP7,8,9,10 - Sprite ROM Jumpers + JP7 shorted, others open = 28 pin 1Mbit mask ROMs + JP8 and JP9 shorted, others open = 27C010 EPROMs + JP15,16 - Main Program EPROM Configuration Jumpers + JP16 shorted and JP15 open = 27C010 EPROMs + JP11,12,13,14 - ROM Configuration Jumpers (tied to logic, don't change) + JP11 and JP14 shorted, others open = default + JP11 ties ROMSEL to main program EPROM OE. + JP14 ties main program EPROM A16 to 68000 A17. + +************************************************************/ + + ROM_START( outzone ) ROM_REGION( 0x040000, "maincpu", 0 ) // Main 68K code ROM_LOAD16_BYTE( "tp_018_07.6h", 0x000001, 0x20000, CRC(9704db16) SHA1(12b43a6961a7f63f29563eb77aaacb70d3c368dd) ) @@ -2766,7 +2846,7 @@ ROM_START( vimanaj ) ROM_LOAD( "019rom10.prom10.4h", 0x20, 0x20, CRC(a1e17492) SHA1(9ddec4c97f2d541f69f3c32c47aaa21fd9699ae2) ) // N82S123AN BPROM - ??? ROM_END -} // Anonymous namespace +} // anonymous namespace // YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS GAME( 1988, truxton, 0, truxton, truxton, toaplan1_state, empty_init, ROT270, "Toaplan / Taito Corporation", "Truxton (Europe, US) / Tatsujin (Japan)", 0 ) From afceb884d87409c290ee59edfd0d3b8417d29129 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Mon, 2 Mar 2026 19:22:12 +0200 Subject: [PATCH 098/351] i80186: BOUND is signed. [Curt Coder] --- src/devices/cpu/i86/i186.cpp | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp index 11470a49d5a..7def2beb7d8 100644 --- a/src/devices/cpu/i86/i186.cpp +++ b/src/devices/cpu/i86/i186.cpp @@ -319,13 +319,14 @@ void i80186_cpu_device::execute_run() case 0x62: // i_bound { m_modrm = fetch(); - uint32_t low = GetRMWord(); - uint32_t high = GetnextRMWord(); - uint32_t tmp = RegWord(); - if (tmp < low || tmp > high) + int16_t low = (int16_t)GetRMWord(); + int16_t high = (int16_t)GetnextRMWord(); + int16_t idx = (int16_t)RegWord(); + if (idx < low || idx > high) { interrupt(5); + } CLK(BOUND); - logerror("%06x: bound %04x high %04x low %04x tmp\n", m_pc, high, low, tmp); + logerror("%06x: bound %i < %i < %i\n", m_pc, low, idx, high); } break; From 56f06827e684b7c595f8e9d466142486d6979cd0 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Mon, 2 Mar 2026 19:30:23 +0200 Subject: [PATCH 099/351] i80186: Fix iRMX interrupt mode. [Curt Coder] --- src/devices/cpu/i86/i186.cpp | 106 +++++++++++++++++++++++------------ 1 file changed, 71 insertions(+), 35 deletions(-) diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp index 7def2beb7d8..6e2ef1f1047 100644 --- a/src/devices/cpu/i86/i186.cpp +++ b/src/devices/cpu/i86/i186.cpp @@ -924,7 +924,10 @@ IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback) LOGMASKED(LOG_INTERRUPTS, "(%f) **** Acknowledged interrupt vector %02X\n", machine().time().as_double(), m_intr.poll_status & 0x1f); /* clear the interrupt */ - set_input_line(0, CLEAR_LINE); + if (!BIT(m_reloc, 14)) + set_input_line(0, CLEAR_LINE); + else + m_irmx_irq_cb(CLEAR_LINE); m_intr.pending = 0; uint16_t oldreq = m_intr.request; @@ -1015,17 +1018,19 @@ void i80186_cpu_device::update_interrupt_state() { if ((m_intr.timer[int_num] & 0x0f) == priority) { - int irq = (1 << int_num); + const int irq_map[3] = {0x01, 0x10, 0x20}; + int irq = irq_map[int_num]; + /* if we're already servicing something at this level, don't generate anything new */ - if (m_intr.in_service & 0x01) + if (m_intr.in_service & irq) return; /* if there's something pending, generate an interrupt */ - if (m_intr.status & irq) + if (BIT(m_intr.status, int_num)) { new_vector = m_intr.vector | priority; /* set the clear mask and generate the int */ - m_intr.ack_mask = int_num ? (8 << int_num) : 1; + m_intr.ack_mask = irq; goto generate_int; } } @@ -1035,8 +1040,10 @@ void i80186_cpu_device::update_interrupt_state() { if ((m_intr.timer[0] & 0x0f) == priority) { + int const irq = 0x01; + /* if we're already servicing something at this level, don't generate anything new */ - if (m_intr.in_service & 0x01) + if (m_intr.in_service & irq) return; /* if there's something pending, generate an interrupt */ @@ -1052,7 +1059,7 @@ void i80186_cpu_device::update_interrupt_state() logerror("Invalid timer interrupt!\n"); /* set the clear mask and generate the int */ - m_intr.ack_mask = 0x0001; + m_intr.ack_mask = irq; goto generate_int; } } @@ -1060,14 +1067,22 @@ void i80186_cpu_device::update_interrupt_state() /* check DMA interrupts */ for (int int_num = 0; int_num < 2; int_num++) + { if ((m_intr.dma[int_num] & 0x0F) == priority) { + const int irq_map[2] = {0x04, 0x08}; + int irq = irq_map[int_num]; + if (BIT(m_reloc, 14)) { + const int irq_map[2] = {0x08, 0x04}; + irq = irq_map[int_num]; + } + /* if we're already servicing something at this level, don't generate anything new */ - if (m_intr.in_service & (0x04 << int_num)) + if (m_intr.in_service & irq) return; /* if there's something pending, generate an interrupt */ - if (m_intr.request & (0x04 << int_num)) + if (m_intr.request & irq) { if (BIT(m_reloc, 14)) new_vector = m_intr.vector | priority; @@ -1075,10 +1090,11 @@ void i80186_cpu_device::update_interrupt_state() new_vector = 0x0a + int_num; /* set the clear mask and generate the int */ - m_intr.ack_mask = 0x0004 << int_num; + m_intr.ack_mask = irq; goto generate_int; } } + } if (BIT(m_reloc, 14)) continue; @@ -1141,8 +1157,39 @@ void i80186_cpu_device::handle_eoi(int data) { bool handled = false; + /* iRMX */ + if (BIT(m_reloc, 14)) + { + int level = data & 0x07; + + for (int int_num = 0; int_num < 3 && !handled; int_num++) + { + const int irq_map[3] = {0x01, 0x10, 0x20}; + const int mask = irq_map[int_num]; + + if ((m_intr.timer[int_num] & 0x07) == level && (m_intr.in_service & mask)) + { + m_intr.in_service &= ~mask; + LOGMASKED(LOG_INTERRUPTS, "(%f) **** Got EOI for timer%d\n", machine().time().as_double(), int_num); + handled = true; + } + } + + for (int int_num = 0; int_num < 2 && !handled; int_num++) + { + const int irq_map[2] = {0x08, 0x04}; + const int mask = irq_map[int_num]; + + if ((m_intr.dma[int_num] & 0x07) == level && (m_intr.in_service & mask)) + { + m_intr.in_service &= ~mask; + LOGMASKED(LOG_INTERRUPTS, "(%f) **** Got EOI for DMA%d\n", machine().time().as_double(), int_num); + handled = true; + } + } + } /* specific case */ - if (!(data & 0x8000)) + else if (!(data & 0x8000)) { /* turn off the appropriate in-service bit */ switch (data & 0x1f) @@ -1167,27 +1214,11 @@ void i80186_cpu_device::handle_eoi(int data) for (int priority = 0; priority <= 7 && !handled; priority++) { /* check for in-service timers */ - if (BIT(m_reloc, 14)) + if ((m_intr.timer[0] & 0x07) == priority && (m_intr.in_service & 0x01)) { - for (int int_num = 0; int_num < 2 && !handled; int_num++) - { - int mask = int_num ? (8 << int_num) : 1; - if ((m_intr.timer[int_num] & 0x07) == priority && (m_intr.in_service & mask)) - { - m_intr.in_service &= ~mask; - LOGMASKED(LOG_INTERRUPTS, "(%f) **** Got EOI for timer%d\n", machine().time().as_double(), int_num); - handled = true; - } - } - } - else - { - if ((m_intr.timer[0] & 0x07) == priority && (m_intr.in_service & 0x01)) - { - m_intr.in_service &= ~0x01; - LOGMASKED(LOG_INTERRUPTS, "(%f) **** Got EOI for timer\n", machine().time().as_double()); - handled = true; - } + m_intr.in_service &= ~0x01; + LOGMASKED(LOG_INTERRUPTS, "(%f) **** Got EOI for timer\n", machine().time().as_double()); + handled = true; } /* check for in-service DMA interrupts */ @@ -1199,9 +1230,6 @@ void i80186_cpu_device::handle_eoi(int data) handled = true; } - if (BIT(m_reloc, 14)) - continue; - /* check external interrupts */ for (int int_num = 0; int_num < 4 && !handled; int_num++) if ((m_intr.ext[int_num] & 0x07) == priority && (m_intr.in_service & (0x10 << int_num))) @@ -1588,7 +1616,15 @@ void i80186_cpu_device::drq_callback(int which) if ((dma->control & INTERRUPT_ON_ZERO) && dma->count == 0) { LOGMASKED(LOG_DMA_HIFREQ, "DMA%d - requesting interrupt: count = %04X, source = %04X\n", which, dma->count, dma->source); - m_intr.request |= 0x04 << which; + + const int irq_map[2] = {0x04, 0x08}; + int irq = irq_map[which]; + if (BIT(m_reloc, 14)) { + const int irq_map[2] = {0x08, 0x04}; + irq = irq_map[which]; + } + + m_intr.request |= irq; update_interrupt_state(); } } From f24b8f3a9776bff1cd7970283644f9b4530e9ddc Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Mon, 2 Mar 2026 19:43:24 +0200 Subject: [PATCH 100/351] i80186: Improve BOUND logging. --- src/devices/cpu/i86/i186.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp index 6e2ef1f1047..979f5caace9 100644 --- a/src/devices/cpu/i86/i186.cpp +++ b/src/devices/cpu/i86/i186.cpp @@ -326,7 +326,7 @@ void i80186_cpu_device::execute_run() interrupt(5); } CLK(BOUND); - logerror("%06x: bound %i < %i < %i\n", m_pc, low, idx, high); + logerror("%06x: bound %i <= %i <= %i\n", m_pc, low, idx, high); } break; From 52ec86b8557ee42ce3fb07a4489c04e7bae565b2 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 2 Mar 2026 13:07:47 +0100 Subject: [PATCH 101/351] nscsi: Allow for connecting devices external to the bus --- src/devices/machine/nscsi_bus.cpp | 15 ++++++++++++--- src/devices/machine/nscsi_bus.h | 4 ++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/src/devices/machine/nscsi_bus.cpp b/src/devices/machine/nscsi_bus.cpp index f47cd60ada0..f776d8ed15f 100644 --- a/src/devices/machine/nscsi_bus.cpp +++ b/src/devices/machine/nscsi_bus.cpp @@ -26,7 +26,11 @@ DEFINE_DEVICE_TYPE(NSCSI_CONNECTOR, nscsi_connector, "nscsi_connector", "SCSI C nscsi_bus_device::nscsi_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, NSCSI_BUS, tag, owner, clock), m_bsy_handler(*this), data(0), ctrl(0) + device_t(mconfig, NSCSI_BUS, tag, owner, clock), + m_external_devices(*this, finder_base::DUMMY_TAG, 0), + m_bsy_handler(*this), + data(0), + ctrl(0) { devcnt = 0; std::fill(std::begin(dev), std::end(dev), dev_t{ nullptr, 0, 0, 0 }); @@ -138,8 +142,13 @@ void nscsi_bus_device::ctrl_wait(int refid, uint32_t lines, uint32_t mask) void nscsi_bus_device::device_resolve_objects() { for(int i=0; i<16; i++) { - device_t *subdev = subdevice(string_format("%d", i)); - nscsi_device *sdev = subdev ? downcast(*subdev).get_device() : nullptr; + nscsi_device *sdev = nullptr; + if(m_external_devices[i]) + sdev = m_external_devices[i]; + else { + device_t *subdev = subdevice(string_format("%d", i)); + sdev = subdev ? downcast(*subdev).get_device() : nullptr; + } if(sdev) { int rid = devcnt++; dev[rid].dev = sdev; diff --git a/src/devices/machine/nscsi_bus.h b/src/devices/machine/nscsi_bus.h index 24edbcf0262..8084e5bb5d2 100644 --- a/src/devices/machine/nscsi_bus.h +++ b/src/devices/machine/nscsi_bus.h @@ -16,6 +16,8 @@ public: auto out_bsy_callback() { return m_bsy_handler.bind(); } + template void set_external_device(int id, T &&tag) { m_external_devices[id].set_tag(std::forward(tag)); } + void ctrl_w(int refid, uint32_t lines, uint32_t mask); void data_w(int refid, uint32_t lines); void ctrl_wait(int refid, uint32_t lines, uint32_t mask); @@ -35,6 +37,8 @@ private: uint32_t data; }; + optional_device_array m_external_devices; + devcb_write_line m_bsy_handler; dev_t dev[16]; From c6a6ad20c3ee069d171f51c0196b4aedaa4eab7f Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 2 Mar 2026 15:21:54 +0100 Subject: [PATCH 102/351] nscsi: Turn nscsi_device into an interface for easier composition m_ify the variable names --- src/devices/bus/hp_dio/hp98265a.cpp | 14 +- src/devices/bus/nscsi/cd.cpp | 646 ++++++++++++------------ src/devices/bus/nscsi/cfp1080s.cpp | 3 +- src/devices/bus/nscsi/cfp1080s.h | 2 +- src/devices/bus/nscsi/dtc510.cpp | 62 +-- src/devices/bus/nscsi/hd.cpp | 400 +++++++-------- src/devices/bus/nscsi/pc8801_30.cpp | 106 ++-- src/devices/bus/nscsi/pc98_hd.cpp | 76 +-- src/devices/bus/nscsi/s1410.cpp | 38 +- src/devices/bus/nscsi/tape.cpp | 172 +++---- src/devices/bus/pc98_cbus/pc9801_55.cpp | 4 +- src/devices/bus/s100/ascsasi.cpp | 28 +- src/devices/machine/53c7xx.cpp | 69 +-- src/devices/machine/53c7xx.h | 2 +- src/devices/machine/aic6250.cpp | 85 ++-- src/devices/machine/aic6250.h | 2 +- src/devices/machine/cxd1185.cpp | 101 ++-- src/devices/machine/cxd1185.h | 3 +- src/devices/machine/mb87030.cpp | 49 +- src/devices/machine/mb87030.h | 6 +- src/devices/machine/ncr5380.cpp | 57 ++- src/devices/machine/ncr5380.h | 3 +- src/devices/machine/ncr5385.cpp | 57 ++- src/devices/machine/ncr5385.h | 3 +- src/devices/machine/ncr53c90.cpp | 107 ++-- src/devices/machine/ncr53c90.h | 2 +- src/devices/machine/nscsi_bus.cpp | 464 ++++++++--------- src/devices/machine/nscsi_bus.h | 60 +-- src/devices/machine/nscsi_cb.cpp | 9 +- src/devices/machine/nscsi_cb.h | 24 +- src/devices/machine/spifi3.cpp | 103 ++-- src/devices/machine/spifi3.h | 3 +- src/devices/machine/wd33c9x.cpp | 89 ++-- src/devices/machine/wd33c9x.h | 2 +- src/mame/act/victor9k_hdc.cpp | 35 +- src/mame/act/victor9k_hdc.h | 2 +- src/mame/dec/dc7061.cpp | 73 +-- src/mame/dec/dc7061.h | 3 +- src/mame/tektronix/tek_msu_fdc.cpp | 25 +- src/mame/tektronix/tek_msu_fdc.h | 3 +- 40 files changed, 1502 insertions(+), 1490 deletions(-) diff --git a/src/devices/bus/hp_dio/hp98265a.cpp b/src/devices/bus/hp_dio/hp98265a.cpp index dcfcf6d8a11..87965b440e4 100644 --- a/src/devices/bus/hp_dio/hp98265a.cpp +++ b/src/devices/bus/hp_dio/hp98265a.cpp @@ -276,18 +276,18 @@ void dio16_98265a_device::io_w(offs_t offset, uint16_t data) case 2: uint8_t val = 0; if (data & 0x80) - val |= nscsi_device::S_REQ; + val |= nscsi_device_interface::S_REQ; if (data & 0x40) - val |= nscsi_device::S_ACK; + val |= nscsi_device_interface::S_ACK; if (data & 0x08) - val |= nscsi_device::S_BSY; + val |= nscsi_device_interface::S_BSY; if (data & 0x04) - val |= nscsi_device::S_MSG; + val |= nscsi_device_interface::S_MSG; if (data & 0x02) - val |= nscsi_device::S_CTL; + val |= nscsi_device_interface::S_CTL; if (data & 0x01) - val |= nscsi_device::S_INP; - m_spc->ctrl_write(val, nscsi_device::S_ALL); + val |= nscsi_device_interface::S_INP; + m_spc->ctrl_write(val, nscsi_device_interface::S_ALL); break; } } diff --git a/src/devices/bus/nscsi/cd.cpp b/src/devices/bus/nscsi/cd.cpp index 112f100cf8f..6e55cece473 100644 --- a/src/devices/bus/nscsi/cd.cpp +++ b/src/devices/bus/nscsi/cd.cpp @@ -317,7 +317,7 @@ void nscsi_cdrom_device::scsi_command() int blocks; // check for media change - if( sequence_counter != image->sequence_counter() && (scsi_cmdbuf[0] != SC_INQUIRY)) + if( sequence_counter != image->sequence_counter() && (m_scsi_cmdbuf[0] != SC_INQUIRY)) { // clear media change condition cur_sector = -1; @@ -329,7 +329,7 @@ void nscsi_cdrom_device::scsi_command() return; } - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_TEST_UNIT_READY: LOG("command TEST UNIT READY\n"); if(image->exists()) @@ -344,8 +344,8 @@ void nscsi_cdrom_device::scsi_command() break; } - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; - blocks = scsi_cmdbuf[4]; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; + blocks = m_scsi_cmdbuf[4]; if(!blocks) blocks = 256; @@ -356,9 +356,9 @@ void nscsi_cdrom_device::scsi_command() break; case SC_INQUIRY: { - int lun = get_lun(scsi_cmdbuf[1] >> 5); + int lun = get_lun(m_scsi_cmdbuf[1] >> 5); LOG("command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n", - lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]); + lun, m_scsi_cmdbuf[1] & 1, m_scsi_cmdbuf[2], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); /* * 7.5.3 Selection of an invalid logical unit @@ -375,29 +375,29 @@ void nscsi_cdrom_device::scsi_command() * is returned with sense data ILLEGAL REQUEST and LOGICAL UNIT NOT * SUPPORTED. */ - int page = scsi_cmdbuf[2]; - int size = scsi_cmdbuf[4]; + int page = m_scsi_cmdbuf[2]; + int size = m_scsi_cmdbuf[4]; switch(page) { case 0: - std::fill_n(scsi_cmdbuf, size, 0); + std::fill_n(m_scsi_cmdbuf, size, 0); if (lun != 0) - scsi_cmdbuf[0] = 0x7f; + m_scsi_cmdbuf[0] = 0x7f; else - scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3) - scsi_cmdbuf[1] = 0x80; // media is removable - scsi_cmdbuf[2] = compliance; // device complies with SPC-3 standard - scsi_cmdbuf[3] = 0x02; // response data format = SPC-3 standard - scsi_cmdbuf[4] = 0x20; // additional length - scsi_cmdbuf[7] = inquiry_data; - strncpy((char *)&scsi_cmdbuf[8], manufacturer, 8); - strncpy((char *)&scsi_cmdbuf[16], product, 16); - strncpy((char *)&scsi_cmdbuf[32], revision, 4); + m_scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3) + m_scsi_cmdbuf[1] = 0x80; // media is removable + m_scsi_cmdbuf[2] = compliance; // device complies with SPC-3 standard + m_scsi_cmdbuf[3] = 0x02; // response data format = SPC-3 standard + m_scsi_cmdbuf[4] = 0x20; // additional length + m_scsi_cmdbuf[7] = inquiry_data; + strncpy((char *)&m_scsi_cmdbuf[8], manufacturer, 8); + strncpy((char *)&m_scsi_cmdbuf[16], product, 16); + strncpy((char *)&m_scsi_cmdbuf[32], revision, 4); // vendor and product information must be padded with spaces for(int i = 8; i < 36; i++) - if(scsi_cmdbuf[i] == 0) - scsi_cmdbuf[i] = 0x20; + if(m_scsi_cmdbuf[i] == 0) + m_scsi_cmdbuf[i] = 0x20; scsi_data_in(SBUF_MAIN, size); break; @@ -407,10 +407,10 @@ void nscsi_cdrom_device::scsi_command() } case SC_MODE_SELECT_6: - LOG("command MODE SELECT 6 length %d\n", scsi_cmdbuf[4]); + LOG("command MODE SELECT 6 length %d\n", m_scsi_cmdbuf[4]); // accept mode select parameter data - mode_data_size = scsi_cmdbuf[4]; + mode_data_size = m_scsi_cmdbuf[4]; if(mode_data_size) scsi_data_out(2, mode_data_size); @@ -418,22 +418,22 @@ void nscsi_cdrom_device::scsi_command() break; case SC_START_STOP_UNIT: - LOG("command %s UNIT%s\n", (scsi_cmdbuf[4] & 0x1) ? "START" : "STOP", - (scsi_cmdbuf[4] & 0x2) ? (scsi_cmdbuf[4] & 0x1) ? " (LOAD)" : " (EJECT)" : ""); + LOG("command %s UNIT%s\n", (m_scsi_cmdbuf[4] & 0x1) ? "START" : "STOP", + (m_scsi_cmdbuf[4] & 0x2) ? (m_scsi_cmdbuf[4] & 0x1) ? " (LOAD)" : " (EJECT)" : ""); scsi_status_complete(SS_GOOD); break; case SC_RECEIVE_DIAGNOSTIC_RESULTS: { LOG("command RECEIVE DIAGNOSTIC RESULTS"); - int size = get_u16be(&scsi_cmdbuf[3]); + int size = get_u16be(&m_scsi_cmdbuf[3]); int pos = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 6; - scsi_cmdbuf[pos++] = 0; // ROM is OK - scsi_cmdbuf[pos++] = 0; // RAM is OK - scsi_cmdbuf[pos++] = 0; // Data buffer is OK - scsi_cmdbuf[pos++] = 0; // Interface is OK - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 6; + m_scsi_cmdbuf[pos++] = 0; // ROM is OK + m_scsi_cmdbuf[pos++] = 0; // RAM is OK + m_scsi_cmdbuf[pos++] = 0; // Data buffer is OK + m_scsi_cmdbuf[pos++] = 0; // Interface is OK + m_scsi_cmdbuf[pos++] = 0; if(size > pos) size = pos; scsi_data_in(0, size); @@ -443,21 +443,21 @@ void nscsi_cdrom_device::scsi_command() case SC_SEND_DIAGNOSTIC: { LOG("command SEND DIAGNOSTIC"); - int size = get_u16be(&scsi_cmdbuf[3]); - if(scsi_cmdbuf[1] & 4) { + int size = get_u16be(&m_scsi_cmdbuf[3]); + if(m_scsi_cmdbuf[1] & 4) { // Self-test scsi_status_complete(SS_GOOD); break; } int pos = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 6; - scsi_cmdbuf[pos++] = 0; // ROM is OK - scsi_cmdbuf[pos++] = 0; // RAM is OK - scsi_cmdbuf[pos++] = 0; // Data buffer is OK - scsi_cmdbuf[pos++] = 0; // Interface is OK - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 6; + m_scsi_cmdbuf[pos++] = 0; // ROM is OK + m_scsi_cmdbuf[pos++] = 0; // RAM is OK + m_scsi_cmdbuf[pos++] = 0; // Data buffer is OK + m_scsi_cmdbuf[pos++] = 0; // Interface is OK + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; if(size > pos) size = pos; scsi_data_in(0, size); @@ -476,10 +476,10 @@ void nscsi_cdrom_device::scsi_command() // get the last used block on the disc const u32 temp = image->get_track_start(0xaa) * (bytes_per_sector / bytes_per_block) - 1; - put_u32be(&scsi_cmdbuf[0], temp); - scsi_cmdbuf[4] = 0; - scsi_cmdbuf[5] = 0; - put_u16be(&scsi_cmdbuf[6], bytes_per_block); + put_u32be(&m_scsi_cmdbuf[0], temp); + m_scsi_cmdbuf[4] = 0; + m_scsi_cmdbuf[5] = 0; + put_u16be(&m_scsi_cmdbuf[6], bytes_per_block); scsi_data_in(SBUF_MAIN, 8); scsi_status_complete(SS_GOOD); @@ -487,8 +487,8 @@ void nscsi_cdrom_device::scsi_command() } case SC_READ_10: - lba = get_u32be(&scsi_cmdbuf[2]); - blocks = get_u16be(&scsi_cmdbuf[7]); + lba = get_u32be(&m_scsi_cmdbuf[2]); + blocks = get_u16be(&m_scsi_cmdbuf[7]); LOG("command READ EXTENDED start=%08x blocks=%04x\n", lba, blocks); if(!image->exists()) { @@ -501,33 +501,33 @@ void nscsi_cdrom_device::scsi_command() break; case SC_MODE_SENSE_6: { - int lun = get_lun(scsi_cmdbuf[1] >> 5); + int lun = get_lun(m_scsi_cmdbuf[1] >> 5); LOG("command MODE SENSE 6 lun=%d page=%02x alloc=%02x link=%02x\n", - lun, scsi_cmdbuf[2] & 0x3f, scsi_cmdbuf[4], scsi_cmdbuf[5]); + lun, m_scsi_cmdbuf[2] & 0x3f, m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); if(lun) { bad_lun(); return; } - const int page = scsi_cmdbuf[2] & 0x3f; - const int size = scsi_cmdbuf[4]; - const bool noBlockDesc = BIT(scsi_cmdbuf[1], 3); + const int page = m_scsi_cmdbuf[2] & 0x3f; + const int size = m_scsi_cmdbuf[4]; + const bool noBlockDesc = BIT(m_scsi_cmdbuf[1], 3); int pos = 1; - scsi_cmdbuf[pos++] = 0x00; // medium type - scsi_cmdbuf[pos++] = 0x80; // WP, cache + m_scsi_cmdbuf[pos++] = 0x00; // medium type + m_scsi_cmdbuf[pos++] = 0x80; // WP, cache // get the last used block on the disc const u32 temp = image->exists() ? image->get_track_start(0xaa) * (bytes_per_sector / bytes_per_block) - 1 : 0; - scsi_cmdbuf[pos++] = noBlockDesc ? 0x00 : 0x08; // 0 or 8 bytes of block descriptor + m_scsi_cmdbuf[pos++] = noBlockDesc ? 0x00 : 0x08; // 0 or 8 bytes of block descriptor if (!noBlockDesc) { - scsi_cmdbuf[pos++] = 0x00; // density code - put_u24be(&scsi_cmdbuf[pos], temp); + m_scsi_cmdbuf[pos++] = 0x00; // density code + put_u24be(&m_scsi_cmdbuf[pos], temp); pos += 3; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - put_u16be(&scsi_cmdbuf[pos], bytes_per_block); + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + put_u16be(&m_scsi_cmdbuf[pos], bytes_per_block); pos += 2; } @@ -537,64 +537,64 @@ void nscsi_cdrom_device::scsi_command() for(int p=pmax; p >= pmin; p--) { switch(p) { case 0x00: // Vendor specific (does not require page format) - scsi_cmdbuf[pos++] = 0x80; // PS, page id - scsi_cmdbuf[pos++] = 0x02; // Page length - scsi_cmdbuf[pos++] = 0x00; // Meh - scsi_cmdbuf[pos++] = 0x00; // Double meh + m_scsi_cmdbuf[pos++] = 0x80; // PS, page id + m_scsi_cmdbuf[pos++] = 0x02; // Page length + m_scsi_cmdbuf[pos++] = 0x00; // Meh + m_scsi_cmdbuf[pos++] = 0x00; // Double meh break; case 0x01: // Read-write error recovery - scsi_cmdbuf[pos++] = 0x01; // PS, page id - scsi_cmdbuf[pos++] = 0x0a; // Page length - scsi_cmdbuf[pos++] = 0x01; - scsi_cmdbuf[pos++] = 0x01; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x01; // PS, page id + m_scsi_cmdbuf[pos++] = 0x0a; // Page length + m_scsi_cmdbuf[pos++] = 0x01; + m_scsi_cmdbuf[pos++] = 0x01; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; break; case 0x02: // Disconnect/reconnect control parameters (guessed) - scsi_cmdbuf[pos++] = 0x82; // PS, page id - scsi_cmdbuf[pos++] = 0x0e; // Page length - scsi_cmdbuf[pos++] = 0xe6; // Buffer full ratio, 90% - scsi_cmdbuf[pos++] = 0x1a; // Buffer empty ratio, 10% - scsi_cmdbuf[pos++] = 0x00; // Bus inactivity limit, 0 - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; // Disconnect time limit, 0 - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; // Connect time limit, 0 - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; // Maximum burst size, 0 - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; // EMDP, Dimm, DTDC - scsi_cmdbuf[pos++] = 0x00; // Reserved - scsi_cmdbuf[pos++] = 0x00; // Reserved - scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x82; // PS, page id + m_scsi_cmdbuf[pos++] = 0x0e; // Page length + m_scsi_cmdbuf[pos++] = 0xe6; // Buffer full ratio, 90% + m_scsi_cmdbuf[pos++] = 0x1a; // Buffer empty ratio, 10% + m_scsi_cmdbuf[pos++] = 0x00; // Bus inactivity limit, 0 + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; // Disconnect time limit, 0 + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; // Connect time limit, 0 + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; // Maximum burst size, 0 + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; // EMDP, Dimm, DTDC + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Reserved break; case 0x0e: // CD Audio control page - scsi_cmdbuf[pos++] = 0x8e; // PS, page id - scsi_cmdbuf[pos++] = 0x0e; // Page length - scsi_cmdbuf[pos++] = (1 << 2) | (cdda_sotc << 1); // IMMED = 1 - scsi_cmdbuf[pos++] = 0x00; // Reserved - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x00; - scsi_cmdbuf[pos++] = 0x01; // Ch 1 connected - scsi_cmdbuf[pos++] = 0xff; // Ch 1 max volume - scsi_cmdbuf[pos++] = 0x02; // Ch 2 connected - scsi_cmdbuf[pos++] = 0xff; // Ch 2 max volume - scsi_cmdbuf[pos++] = 0x04; // Ch 3 connected - scsi_cmdbuf[pos++] = 0xff; // Ch 3 max volume - scsi_cmdbuf[pos++] = 0x08; // Ch 4 connected - scsi_cmdbuf[pos++] = 0xff; // Ch 4 max volume + m_scsi_cmdbuf[pos++] = 0x8e; // PS, page id + m_scsi_cmdbuf[pos++] = 0x0e; // Page length + m_scsi_cmdbuf[pos++] = (1 << 2) | (cdda_sotc << 1); // IMMED = 1 + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x00; + m_scsi_cmdbuf[pos++] = 0x01; // Ch 1 connected + m_scsi_cmdbuf[pos++] = 0xff; // Ch 1 max volume + m_scsi_cmdbuf[pos++] = 0x02; // Ch 2 connected + m_scsi_cmdbuf[pos++] = 0xff; // Ch 2 max volume + m_scsi_cmdbuf[pos++] = 0x04; // Ch 3 connected + m_scsi_cmdbuf[pos++] = 0xff; // Ch 3 max volume + m_scsi_cmdbuf[pos++] = 0x08; // Ch 4 connected + m_scsi_cmdbuf[pos++] = 0xff; // Ch 4 max volume break; case 0x30: // magic Apple page @@ -606,8 +606,8 @@ void nscsi_cdrom_device::scsi_command() }; LOG("Apple special MODE SENSE page\n"); - scsi_cmdbuf[pos++] = 0x30; // PS, page id - memcpy(&scsi_cmdbuf[pos], apple_magic, 0x17); + m_scsi_cmdbuf[pos++] = 0x30; // PS, page id + memcpy(&m_scsi_cmdbuf[pos], apple_magic, 0x17); pos += 0x17; } break; @@ -620,9 +620,9 @@ void nscsi_cdrom_device::scsi_command() "BlueSCSI is the BEST STOLEN FROM BLUESCSI\0" }; - scsi_cmdbuf[pos++] = 0x31; // page ID - scsi_cmdbuf[pos++] = 42; // page length - memcpy(&scsi_cmdbuf[pos], bluescsi_magic, 42); + m_scsi_cmdbuf[pos++] = 0x31; // page ID + m_scsi_cmdbuf[pos++] = 42; // page length + memcpy(&m_scsi_cmdbuf[pos], bluescsi_magic, 42); pos += 42; } break; @@ -636,7 +636,7 @@ void nscsi_cdrom_device::scsi_command() break; } } - scsi_cmdbuf[0] = pos - 1; // return -1 for mode sense 6 + m_scsi_cmdbuf[0] = pos - 1; // return -1 for mode sense 6 if (!fail) { if (size < pos) @@ -659,27 +659,27 @@ void nscsi_cdrom_device::scsi_command() break; } - std::fill_n(scsi_cmdbuf, 34, 0); - scsi_cmdbuf[1] = 32; - scsi_cmdbuf[2] = 2; // disc is complete - scsi_cmdbuf[3] = 1; // first track - scsi_cmdbuf[4] = 1; // number of sessions (TODO: session support for CHDv6) - scsi_cmdbuf[5] = 1; // first track in last session - scsi_cmdbuf[6] = image->get_last_track(); // last track in last session - scsi_cmdbuf[8] = 0; // CD-ROM, not XA + std::fill_n(m_scsi_cmdbuf, 34, 0); + m_scsi_cmdbuf[1] = 32; + m_scsi_cmdbuf[2] = 2; // disc is complete + m_scsi_cmdbuf[3] = 1; // first track + m_scsi_cmdbuf[4] = 1; // number of sessions (TODO: session support for CHDv6) + m_scsi_cmdbuf[5] = 1; // first track in last session + m_scsi_cmdbuf[6] = image->get_last_track(); // last track in last session + m_scsi_cmdbuf[8] = 0; // CD-ROM, not XA // lead in start time in MSF { u32 tstart = image->get_track_start(0); tstart = to_msf(tstart + 150); - put_u32be(&scsi_cmdbuf[16], tstart); + put_u32be(&m_scsi_cmdbuf[16], tstart); // lead-out start time in MSF tstart = image->get_track_start(0xaa); tstart = to_msf(tstart + 150); - put_u32be(&scsi_cmdbuf[20], tstart); + put_u32be(&m_scsi_cmdbuf[20], tstart); } scsi_data_in(0, 34); @@ -688,17 +688,17 @@ void nscsi_cdrom_device::scsi_command() case SC_PREVENT_ALLOW_MEDIUM_REMOVAL: // TODO: support eject prevention - LOG("command %s MEDIUM REMOVAL\n", (scsi_cmdbuf[4] & 0x1) ? "PREVENT" : "ALLOW"); - m_removal_prevented = BIT(scsi_cmdbuf[4], 0); + LOG("command %s MEDIUM REMOVAL\n", (m_scsi_cmdbuf[4] & 0x1) ? "PREVENT" : "ALLOW"); + m_removal_prevented = BIT(m_scsi_cmdbuf[4], 0); scsi_status_complete(SS_GOOD); break; case SC_READ_SUB_CHANNEL: { - const bool msf = BIT(scsi_cmdbuf[1], 1) != 0; - const bool subq = BIT(scsi_cmdbuf[2], 6); - const int param = scsi_cmdbuf[3]; - const int track = scsi_cmdbuf[6]; - const int alloc_length = get_u16be(&scsi_cmdbuf[7]); + const bool msf = BIT(m_scsi_cmdbuf[1], 1) != 0; + const bool subq = BIT(m_scsi_cmdbuf[2], 6); + const int param = m_scsi_cmdbuf[3]; + const int track = m_scsi_cmdbuf[6]; + const int alloc_length = get_u16be(&m_scsi_cmdbuf[7]); LOG("command READ SUB CHANNEL Param = %d, Track = %d, MSF = %d, SUBQ = %d\n", param, track, msf, subq); @@ -707,21 +707,21 @@ void nscsi_cdrom_device::scsi_command() break; } - std::fill_n(scsi_cmdbuf, alloc_length, 0); + std::fill_n(m_scsi_cmdbuf, alloc_length, 0); - scsi_cmdbuf[0] = 0x00; // Reserved + m_scsi_cmdbuf[0] = 0x00; // Reserved int audio_active = cdda->audio_active(); if(audio_active) { if(cdda->audio_paused()) - scsi_cmdbuf[1] = 0x12; // Audio play operation paused + m_scsi_cmdbuf[1] = 0x12; // Audio play operation paused else - scsi_cmdbuf[1] = 0x11; // Audio play operation in progress + m_scsi_cmdbuf[1] = 0x11; // Audio play operation in progress } else { if(cdda->audio_ended()) - scsi_cmdbuf[1] = 0x13; // Audio play operation successfully completed + m_scsi_cmdbuf[1] = 0x13; // Audio play operation successfully completed else - scsi_cmdbuf[1] = 0x15; // No current audio status to return + m_scsi_cmdbuf[1] = 0x15; // No current audio status to return } if(subq) { @@ -729,32 +729,32 @@ void nscsi_cdrom_device::scsi_command() case 1: { // CD current position int m_last_lba = audio_active ? cdda->get_audio_lba() : 0; - scsi_cmdbuf[2] = 0; // Sub-channel Data Length - scsi_cmdbuf[3] = 12; + m_scsi_cmdbuf[2] = 0; // Sub-channel Data Length + m_scsi_cmdbuf[3] = 12; - scsi_cmdbuf[4] = 0x01; // Sub-channel Data Format Code - scsi_cmdbuf[5] = (audio_active ? 0 : 4) | 0x10; // Q Sub-channel encodes current position data - scsi_cmdbuf[6] = image->get_track(m_last_lba) + 1; // Track Number - scsi_cmdbuf[7] = 0x00; // Index Number + m_scsi_cmdbuf[4] = 0x01; // Sub-channel Data Format Code + m_scsi_cmdbuf[5] = (audio_active ? 0 : 4) | 0x10; // Q Sub-channel encodes current position data + m_scsi_cmdbuf[6] = image->get_track(m_last_lba) + 1; // Track Number + m_scsi_cmdbuf[7] = 0x00; // Index Number uint32_t frame = m_last_lba; if(msf) frame = to_msf(frame); - put_u32be(&scsi_cmdbuf[8], frame); // Absolute CD Address + put_u32be(&m_scsi_cmdbuf[8], frame); // Absolute CD Address - frame = m_last_lba - image->get_track_start(scsi_cmdbuf[6] - 1); + frame = m_last_lba - image->get_track_start(m_scsi_cmdbuf[6] - 1); if(msf) frame = to_msf(frame); - put_u32be(&scsi_cmdbuf[12], frame); // Track Relative CD Address + put_u32be(&m_scsi_cmdbuf[12], frame); // Track Relative CD Address break; } case 0x02: // Media Catalog number (UPC/bar code) case 0x03: // Track International standard recording code (ISRC) default: - LOG("Unknown subchannel type %d requested\n", scsi_cmdbuf[3]); + LOG("Unknown subchannel type %d requested\n", m_scsi_cmdbuf[3]); break; } } @@ -790,13 +790,13 @@ void nscsi_cdrom_device::scsi_command() "Reserved 15" }; - bool msf = (scsi_cmdbuf[1] & 0x2) != 0; - u16 size = get_u16be(&scsi_cmdbuf[7]); - u8 format = scsi_cmdbuf[2] & 15; + bool msf = (m_scsi_cmdbuf[1] & 0x2) != 0; + u16 size = get_u16be(&m_scsi_cmdbuf[7]); + u8 format = m_scsi_cmdbuf[2] & 15; /// SFF8020 legacy format field (see T10/1836-D Revision 2g page 643) if(!format) - format = (scsi_cmdbuf[9] >> 6) & 3; + format = (m_scsi_cmdbuf[9] >> 6) & 3; LOG("command READ TOC PMA ATIP, format %s msf=%d size=%d\n", format_names[format], msf, size); @@ -808,7 +808,7 @@ void nscsi_cdrom_device::scsi_command() int pos = 0; switch (format) { case 0: { - int start_track = scsi_cmdbuf[6]; + int start_track = m_scsi_cmdbuf[6]; int end_track = image->get_last_track(); int tracks; @@ -825,10 +825,10 @@ void nscsi_cdrom_device::scsi_command() // the returned TOC DATA LENGTH must be the full amount, // regardless of how much we're able to pass back due to size - put_u16be(&scsi_cmdbuf[pos], len); + put_u16be(&m_scsi_cmdbuf[pos], len); pos += 2; - scsi_cmdbuf[pos++] = 1; - scsi_cmdbuf[pos++] = image->get_last_track(); + m_scsi_cmdbuf[pos++] = 1; + m_scsi_cmdbuf[pos++] = image->get_last_track(); if (start_track == 0) start_track = 1; @@ -841,17 +841,17 @@ void nscsi_cdrom_device::scsi_command() cdrom_track = 0xaa; } - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = image->get_adr_control(cdrom_track); - scsi_cmdbuf[pos++] = track; - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = image->get_adr_control(cdrom_track); + m_scsi_cmdbuf[pos++] = track; + m_scsi_cmdbuf[pos++] = 0; u32 tstart = image->get_track_start(cdrom_track); if(msf) tstart = to_msf(tstart+150); - put_u32be(&scsi_cmdbuf[pos], tstart); + put_u32be(&m_scsi_cmdbuf[pos], tstart); pos += 4; } break; @@ -860,22 +860,22 @@ void nscsi_cdrom_device::scsi_command() case 1: { int len = 2 + (8 * 1); - put_u16be(&scsi_cmdbuf[pos], len); + put_u16be(&m_scsi_cmdbuf[pos], len); pos += 2; - scsi_cmdbuf[pos++] = 1; - scsi_cmdbuf[pos++] = 1; + m_scsi_cmdbuf[pos++] = 1; + m_scsi_cmdbuf[pos++] = 1; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = image->get_adr_control(0); - scsi_cmdbuf[pos++] = 1; - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = image->get_adr_control(0); + m_scsi_cmdbuf[pos++] = 1; + m_scsi_cmdbuf[pos++] = 0; u32 tstart = image->get_track_start(0); if (msf) tstart = to_msf(tstart+150); - put_u32be(&scsi_cmdbuf[pos], tstart); + put_u32be(&m_scsi_cmdbuf[pos], tstart); pos += 4; break; } @@ -901,17 +901,17 @@ void nscsi_cdrom_device::scsi_command() } case SC_PLAY_AUDIO_TRACK_INDEX: { - LOG("command PLAY AUDIO TRACK INDEX tr %d/idx %d to tr %d/idx %d\n", scsi_cmdbuf[4], scsi_cmdbuf[5], scsi_cmdbuf[7], scsi_cmdbuf[8]); + LOG("command PLAY AUDIO TRACK INDEX tr %d/idx %d to tr %d/idx %d\n", m_scsi_cmdbuf[4], m_scsi_cmdbuf[5], m_scsi_cmdbuf[7], m_scsi_cmdbuf[8]); - if(scsi_cmdbuf[4] > scsi_cmdbuf[7]) { + if(m_scsi_cmdbuf[4] > m_scsi_cmdbuf[7]) { scsi_status_complete(SS_CHECK_CONDITION); sense(false, SK_ILLEGAL_REQUEST, 0x00, 0x14); break; } // TODO: Index isn't accounted for at all - const uint32_t start_track = scsi_cmdbuf[4]; - const uint32_t end_track = cdda_sotc ? start_track : std::min(image->get_last_track(), (int)scsi_cmdbuf[7]); + const uint32_t start_track = m_scsi_cmdbuf[4]; + const uint32_t end_track = cdda_sotc ? start_track : std::min(image->get_last_track(), (int)m_scsi_cmdbuf[7]); const uint32_t lba = image->get_track_start(start_track - 1); const uint32_t blocks = image->get_track_start(end_track) - lba; const uint32_t track = image->get_track(lba); @@ -933,7 +933,7 @@ void nscsi_cdrom_device::scsi_command() case SC_PAUSE_RESUME: if (image->exists()) - cdda->pause_audio(BIT(scsi_cmdbuf[8], 0) ^ 1); + cdda->pause_audio(BIT(m_scsi_cmdbuf[8], 0) ^ 1); scsi_status_complete(SS_GOOD); break; @@ -943,7 +943,7 @@ void nscsi_cdrom_device::scsi_command() update_directory(); - scsi_cmdbuf[0] = m_directory.size(); + m_scsi_cmdbuf[0] = m_directory.size(); scsi_data_in(0, 1); scsi_status_complete(SS_GOOD); break; @@ -961,14 +961,14 @@ void nscsi_cdrom_device::scsi_command() { while (index < m_directory.size()) { - scsi_cmdbuf[pos] = index; - scsi_cmdbuf[pos + 1] = m_directory[index].type != osd::directory::entry::entry_type::DIR; + m_scsi_cmdbuf[pos] = index; + m_scsi_cmdbuf[pos + 1] = m_directory[index].type != osd::directory::entry::entry_type::DIR; // There's a guaranteed null terminator one byte after the name field - strncpy(reinterpret_cast(&scsi_cmdbuf[pos + 2]), m_directory[index].name, 31); - scsi_cmdbuf[pos + 36] = (m_directory[index].size >> 24) & 0xff; - scsi_cmdbuf[pos + 37] = (m_directory[index].size >> 16) & 0xff; - scsi_cmdbuf[pos + 38] = (m_directory[index].size >> 8) & 0xff; - scsi_cmdbuf[pos + 39] = m_directory[index].size & 0xff; + strncpy(reinterpret_cast(&m_scsi_cmdbuf[pos + 2]), m_directory[index].name, 31); + m_scsi_cmdbuf[pos + 36] = (m_directory[index].size >> 24) & 0xff; + m_scsi_cmdbuf[pos + 37] = (m_directory[index].size >> 16) & 0xff; + m_scsi_cmdbuf[pos + 38] = (m_directory[index].size >> 8) & 0xff; + m_scsi_cmdbuf[pos + 39] = m_directory[index].size & 0xff; LOG("%02d: %s %08x\n", index, m_directory[index].name, (uint32_t)m_directory[index].size); @@ -986,17 +986,17 @@ void nscsi_cdrom_device::scsi_command() { update_directory(); - if (scsi_cmdbuf[1] >= m_directory.size()) + if (m_scsi_cmdbuf[1] >= m_directory.size()) { - LOG("TOOLBOX_GET_FILE: out of range file %d, %d available\n", scsi_cmdbuf[1], (int)m_directory.size()); + LOG("TOOLBOX_GET_FILE: out of range file %d, %d available\n", m_scsi_cmdbuf[1], (int)m_directory.size()); scsi_status_complete(SS_CHECK_CONDITION); sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB); return; } - uint32_t offset = scsi_cmdbuf[2] << 24 | scsi_cmdbuf[3] << 16 | scsi_cmdbuf[4] << 8 | scsi_cmdbuf[5]; - uint32_t blocks = scsi_cmdbuf[6]; - LOG("TOOLBOX_GET_FILE: file # %d (%s), offset %08x, blocks %d\n", scsi_cmdbuf[1], m_directory[scsi_cmdbuf[1]].name, offset, blocks); + uint32_t offset = m_scsi_cmdbuf[2] << 24 | m_scsi_cmdbuf[3] << 16 | m_scsi_cmdbuf[4] << 8 | m_scsi_cmdbuf[5]; + uint32_t blocks = m_scsi_cmdbuf[6]; + LOG("TOOLBOX_GET_FILE: file # %d (%s), offset %08x, blocks %d\n", m_scsi_cmdbuf[1], m_directory[m_scsi_cmdbuf[1]].name, offset, blocks); if (blocks == 0) { blocks = 1; @@ -1010,7 +1010,7 @@ void nscsi_cdrom_device::scsi_command() std::string tmpPath(machine().options().share_directory()); tmpPath.append(PATH_SEPARATOR); - tmpPath.append(m_directory[scsi_cmdbuf[1]].name); + tmpPath.append(m_directory[m_scsi_cmdbuf[1]].name); osd_file::ptr file; u64 size; @@ -1048,23 +1048,23 @@ void nscsi_cdrom_device::scsi_command() case TOOLBOX_SEND_FILE_10: m_xfer_position = 0; m_write_is_setup = false; - if (scsi_cmdbuf[6] > 0) + if (m_scsi_cmdbuf[6] > 0) { // Yes, the block size for GET_FILE is 4K and for SEND_FILE is 512 bytes. // Verified in BlueSCSI's GitHub repo. - if ((scsi_cmdbuf[6] * 512) > m_xfer_buffer.size()) + if ((m_scsi_cmdbuf[6] * 512) > m_xfer_buffer.size()) { scsi_status_complete(SS_CHECK_CONDITION); sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB); return; } - m_write_length = scsi_cmdbuf[6] * 512; + m_write_length = m_scsi_cmdbuf[6] * 512; } else { - m_write_length = scsi_cmdbuf[1] << 8 | scsi_cmdbuf[2]; + m_write_length = m_scsi_cmdbuf[1] << 8 | m_scsi_cmdbuf[2]; } - m_write_offset = scsi_cmdbuf[3] << 16 | scsi_cmdbuf[4] << 8 | scsi_cmdbuf[5]; + m_write_offset = m_scsi_cmdbuf[3] << 16 | m_scsi_cmdbuf[4] << 8 | m_scsi_cmdbuf[5]; LOG("TOOLBOX_SEND_FILE_10 offset %08x len %04x\n", m_write_offset, m_write_length); scsi_data_out(4, m_write_length); scsi_status_complete(SS_GOOD); @@ -1077,15 +1077,15 @@ void nscsi_cdrom_device::scsi_command() case TOOLBOX_METADATA: LOG("TOOLBOX_METADATA\n"); - if (scsi_cmdbuf[1] == 1) + if (m_scsi_cmdbuf[1] == 1) { - memset(scsi_cmdbuf, 0, 8); - scsi_cmdbuf[1] = 0x03; + memset(m_scsi_cmdbuf, 0, 8); + m_scsi_cmdbuf[1] = 0x03; } else { - memset(scsi_cmdbuf, 0, 8); - scsi_cmdbuf[3] = 0x02; + memset(m_scsi_cmdbuf, 0, 8); + m_scsi_cmdbuf[3] = 0x02; } scsi_data_in(0, 8); scsi_status_complete(SS_GOOD); @@ -1093,7 +1093,7 @@ void nscsi_cdrom_device::scsi_command() case TOOLBOX_COUNT_CDS: LOG("TOOLBOX_COUNT_CDS\n"); - scsi_cmdbuf[0] = 0; + m_scsi_cmdbuf[0] = 0; scsi_data_in(0, 1); scsi_status_complete(SS_GOOD); break; @@ -1127,7 +1127,7 @@ enum sgi_scsi_command_e : uint8_t { void nscsi_cdrom_sgi_device::scsi_command() { - switch (scsi_cmdbuf[0]) { + switch (m_scsi_cmdbuf[0]) { case SGI_HD2CDROM: LOG("command SGI_HD2CDROM\n"); // No need to do anything (yet). Just acknowledge the command. @@ -1203,16 +1203,16 @@ void nscsi_cdrom_apple_device::return_no_cd() void nscsi_cdrom_apple_device::scsi_command() { #if 1 - if (scsi_cmdbuf[0] != 8 && scsi_cmdbuf[0] != 0x28 && scsi_cmdbuf[0] != 0 && scsi_cmdbuf[0] != 0x03) + if (m_scsi_cmdbuf[0] != 8 && m_scsi_cmdbuf[0] != 0x28 && m_scsi_cmdbuf[0] != 0 && m_scsi_cmdbuf[0] != 0x03) { LOG("CD command: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", - scsi_cmdbuf[0], scsi_cmdbuf[1], scsi_cmdbuf[2], - scsi_cmdbuf[3], scsi_cmdbuf[4], scsi_cmdbuf[5], - scsi_cmdbuf[6], scsi_cmdbuf[7], scsi_cmdbuf[8], - scsi_cmdbuf[9]); + m_scsi_cmdbuf[0], m_scsi_cmdbuf[1], m_scsi_cmdbuf[2], + m_scsi_cmdbuf[3], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5], + m_scsi_cmdbuf[6], m_scsi_cmdbuf[7], m_scsi_cmdbuf[8], + m_scsi_cmdbuf[9]); } #endif - switch (scsi_cmdbuf[0]) { + switch (m_scsi_cmdbuf[0]) { case SC_TEST_UNIT_READY: //LOG("command TEST UNIT READY (AppleCD)\n"); if(image->exists()) @@ -1227,37 +1227,37 @@ void nscsi_cdrom_apple_device::scsi_command() case SC_INQUIRY: { - int lun = get_lun(scsi_cmdbuf[1] >> 5); + int lun = get_lun(m_scsi_cmdbuf[1] >> 5); LOG("command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n", - lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]); + lun, m_scsi_cmdbuf[1] & 1, m_scsi_cmdbuf[2], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); - int page = scsi_cmdbuf[2]; - int size = scsi_cmdbuf[4]; + int page = m_scsi_cmdbuf[2]; + int size = m_scsi_cmdbuf[4]; switch (page) { case 0: - std::fill_n(scsi_cmdbuf, size, 0); + std::fill_n(m_scsi_cmdbuf, size, 0); // data taken from the ROM of an AppleCD 150 - scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3) - scsi_cmdbuf[1] = 0x80; // media is removable - scsi_cmdbuf[2] = 0x01; - scsi_cmdbuf[3] = 0x01; - scsi_cmdbuf[4] = 0x31; // additional length - memcpy((char *)&scsi_cmdbuf[8], "SONY ", 8); - memcpy((char *)&scsi_cmdbuf[16], "CD-ROM CDU-8002 ", 16); - memcpy((char *)&scsi_cmdbuf[32], "1.8g", 4); - scsi_cmdbuf[39] = 0xd0; - scsi_cmdbuf[40] = 0x90; - scsi_cmdbuf[41] = 0x27; - scsi_cmdbuf[42] = 0x3e; - scsi_cmdbuf[43] = 0x01; - scsi_cmdbuf[44] = 0x04; - scsi_cmdbuf[45] = 0x91; - scsi_cmdbuf[47] = 0x18; - scsi_cmdbuf[48] = 0x06; - scsi_cmdbuf[49] = 0xf0; - scsi_cmdbuf[50] = 0xfe; + m_scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3) + m_scsi_cmdbuf[1] = 0x80; // media is removable + m_scsi_cmdbuf[2] = 0x01; + m_scsi_cmdbuf[3] = 0x01; + m_scsi_cmdbuf[4] = 0x31; // additional length + memcpy((char *)&m_scsi_cmdbuf[8], "SONY ", 8); + memcpy((char *)&m_scsi_cmdbuf[16], "CD-ROM CDU-8002 ", 16); + memcpy((char *)&m_scsi_cmdbuf[32], "1.8g", 4); + m_scsi_cmdbuf[39] = 0xd0; + m_scsi_cmdbuf[40] = 0x90; + m_scsi_cmdbuf[41] = 0x27; + m_scsi_cmdbuf[42] = 0x3e; + m_scsi_cmdbuf[43] = 0x01; + m_scsi_cmdbuf[44] = 0x04; + m_scsi_cmdbuf[45] = 0x91; + m_scsi_cmdbuf[47] = 0x18; + m_scsi_cmdbuf[48] = 0x06; + m_scsi_cmdbuf[49] = 0xf0; + m_scsi_cmdbuf[50] = 0xfe; scsi_data_in(SBUF_MAIN, size); break; @@ -1274,21 +1274,21 @@ void nscsi_cdrom_apple_device::scsi_command() break; } - u16 size = get_u16be(&scsi_cmdbuf[7]); - LOG("command READ TOC (AppleCD), size=%d, track=%d, type1=%02x type2=%02x\n", size, scsi_cmdbuf[2], scsi_cmdbuf[9], scsi_cmdbuf[5]); + u16 size = get_u16be(&m_scsi_cmdbuf[7]); + LOG("command READ TOC (AppleCD), size=%d, track=%d, type1=%02x type2=%02x\n", size, m_scsi_cmdbuf[2], m_scsi_cmdbuf[9], m_scsi_cmdbuf[5]); // cmdbuf 9 bits 6 & 7: // 00 = first and last track # in BCD // 01 = starting address of the lead-out in M/S/F // 10 = starting address of a range of tracks from a starting track // 11 = reserved - const uint8_t operation = scsi_cmdbuf[9] & 0xc0; + const uint8_t operation = m_scsi_cmdbuf[9] & 0xc0; if (operation == 0x80) { // get TOC info for 1 or more tracks from a specified starting track - assert(scsi_cmdbuf[5] > 0); + assert(m_scsi_cmdbuf[5] > 0); - const int start_track = bcd_2_dec(scsi_cmdbuf[5]) - 1; + const int start_track = bcd_2_dec(m_scsi_cmdbuf[5]) - 1; const int num_trks = size / 4; int pos = 0; @@ -1301,20 +1301,20 @@ void nscsi_cdrom_apple_device::scsi_command() const uint32_t start_lba = image->get_track_start(trk + start_track); const uint32_t start_frame = to_msf(start_lba); - scsi_cmdbuf[pos++] = image->get_adr_control(trk + start_track); - scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 16, 8)); // minutes - scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 8, 8)); // seconds - scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 0, 8)); // frames + m_scsi_cmdbuf[pos++] = image->get_adr_control(trk + start_track); + m_scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 16, 8)); // minutes + m_scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 8, 8)); // seconds + m_scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 0, 8)); // frames } else // keep returning the last track if necessary { const uint32_t start_lba = image->get_track_start(image->get_last_track()); const uint32_t start_frame = to_msf(start_lba); - scsi_cmdbuf[pos++] = image->get_adr_control(image->get_last_track()); - scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 16, 8)); // minutes - scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 8, 8)); // seconds - scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 0, 8)); // frames + m_scsi_cmdbuf[pos++] = image->get_adr_control(image->get_last_track()); + m_scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 16, 8)); // minutes + m_scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 8, 8)); // seconds + m_scsi_cmdbuf[pos++] = dec_2_bcd(BIT(start_frame, 0, 8)); // frames } } @@ -1325,20 +1325,20 @@ void nscsi_cdrom_apple_device::scsi_command() { const int track = image->get_last_track(); const uint32_t frame = to_msf(image->get_track_start(track)); - scsi_cmdbuf[0] = dec_2_bcd(BIT(frame, 16, 8)); // minutes - scsi_cmdbuf[1] = dec_2_bcd(BIT(frame, 8, 8)); // seconds - scsi_cmdbuf[2] = dec_2_bcd(BIT(frame, 0, 8)); // frames - scsi_cmdbuf[3] = 0; + m_scsi_cmdbuf[0] = dec_2_bcd(BIT(frame, 16, 8)); // minutes + m_scsi_cmdbuf[1] = dec_2_bcd(BIT(frame, 8, 8)); // seconds + m_scsi_cmdbuf[2] = dec_2_bcd(BIT(frame, 0, 8)); // frames + m_scsi_cmdbuf[3] = 0; scsi_data_in(SBUF_MAIN, 4); scsi_status_complete(SS_GOOD); } else if (operation == 0x00) // get start and end track numbers { - scsi_cmdbuf[0] = 1; - scsi_cmdbuf[1] = dec_2_bcd(image->get_last_track()); - scsi_cmdbuf[2] = 0; - scsi_cmdbuf[3] = 0; + m_scsi_cmdbuf[0] = 1; + m_scsi_cmdbuf[1] = dec_2_bcd(image->get_last_track()); + m_scsi_cmdbuf[2] = 0; + m_scsi_cmdbuf[3] = 0; scsi_data_in(SBUF_MAIN, 4); scsi_status_complete(SS_GOOD); @@ -1347,7 +1347,7 @@ void nscsi_cdrom_apple_device::scsi_command() break; case APPLE_AUDIO_STATUS: - LOG("command APPLE AUDIO STATUS, type %02x, want %d bytes\n", scsi_cmdbuf[3], scsi_cmdbuf[8]); + LOG("command APPLE AUDIO STATUS, type %02x, want %d bytes\n", m_scsi_cmdbuf[3], m_scsi_cmdbuf[8]); if (!image->exists()) { @@ -1367,27 +1367,27 @@ void nscsi_cdrom_apple_device::scsi_command() }; { - const int type = scsi_cmdbuf[3]; + const int type = m_scsi_cmdbuf[3]; - scsi_cmdbuf[2] = image->get_adr_control(image->get_track(cdda->get_audio_lba())); + m_scsi_cmdbuf[2] = image->get_adr_control(image->get_track(cdda->get_audio_lba())); const uint32_t frame = to_msf(cdda->get_audio_lba()); - scsi_cmdbuf[3] = dec_2_bcd(BIT(frame, 16, 8)); // minute - scsi_cmdbuf[4] = dec_2_bcd(BIT(frame, 8, 8)); // second - scsi_cmdbuf[5] = dec_2_bcd(BIT(frame, 0, 8)); // frame + m_scsi_cmdbuf[3] = dec_2_bcd(BIT(frame, 16, 8)); // minute + m_scsi_cmdbuf[4] = dec_2_bcd(BIT(frame, 8, 8)); // second + m_scsi_cmdbuf[5] = dec_2_bcd(BIT(frame, 0, 8)); // frame if (type == 0) { - scsi_cmdbuf[1] = 0; + m_scsi_cmdbuf[1] = 0; if (m_stopped) { - scsi_cmdbuf[0] = VOID; + m_scsi_cmdbuf[0] = VOID; } else { if (cdda->audio_ended()) { - scsi_cmdbuf[0] = REACHED_END; + m_scsi_cmdbuf[0] = REACHED_END; } else { @@ -1395,24 +1395,24 @@ void nscsi_cdrom_apple_device::scsi_command() { if (cdda->audio_paused()) { - scsi_cmdbuf[0] = PAUSED; + m_scsi_cmdbuf[0] = PAUSED; } else { - scsi_cmdbuf[0] = PLAYING; + m_scsi_cmdbuf[0] = PLAYING; } } else { - scsi_cmdbuf[0] = VOID; + m_scsi_cmdbuf[0] = VOID; } } } } else if (type == 1) // "volume status" { - scsi_cmdbuf[0] = (u8)(cdda->output_gain(0) * 255.0f); - scsi_cmdbuf[1] = (u8)(cdda->output_gain(1) * 255.0f); + m_scsi_cmdbuf[0] = (u8)(cdda->output_gain(0) * 255.0f); + m_scsi_cmdbuf[1] = (u8)(cdda->output_gain(1) * 255.0f); // Other 4 bytes unknown in this mode, going with the same as type 0 for now } @@ -1425,19 +1425,19 @@ void nscsi_cdrom_apple_device::scsi_command() { LOG("command READ SUB CHANNEL\n"); - scsi_cmdbuf[0] = 0; // Control nibble - scsi_cmdbuf[1] = 0; // Track - scsi_cmdbuf[2] = 0; // Index - scsi_cmdbuf[3] = 0; // Relative Minute - scsi_cmdbuf[4] = 0; // Relative Second - scsi_cmdbuf[5] = 0; // Relative Frame - scsi_cmdbuf[6] = 0; // AMinute - scsi_cmdbuf[7] = 0; // ASecond - scsi_cmdbuf[8] = 0; // AFrame + m_scsi_cmdbuf[0] = 0; // Control nibble + m_scsi_cmdbuf[1] = 0; // Track + m_scsi_cmdbuf[2] = 0; // Index + m_scsi_cmdbuf[3] = 0; // Relative Minute + m_scsi_cmdbuf[4] = 0; // Relative Second + m_scsi_cmdbuf[5] = 0; // Relative Frame + m_scsi_cmdbuf[6] = 0; // AMinute + m_scsi_cmdbuf[7] = 0; // ASecond + m_scsi_cmdbuf[8] = 0; // AFrame const int track = image->get_track(cdda->get_audio_lba()); - scsi_cmdbuf[1] = dec_2_bcd(track+1); - scsi_cmdbuf[2] = 1; // Index + m_scsi_cmdbuf[1] = dec_2_bcd(track+1); + m_scsi_cmdbuf[2] = 1; // Index const uint32_t track_start = image->get_track_start(track); uint32_t cur_lba = cdda->get_audio_lba(); @@ -1448,14 +1448,14 @@ void nscsi_cdrom_apple_device::scsi_command() } const uint32_t relframe = to_msf(cur_lba - track_start); - scsi_cmdbuf[3] = dec_2_bcd(BIT(relframe, 16, 8)); // minute - scsi_cmdbuf[4] = dec_2_bcd(BIT(relframe, 8, 8)); // second - scsi_cmdbuf[5] = dec_2_bcd(BIT(relframe, 0, 8)); // frame + m_scsi_cmdbuf[3] = dec_2_bcd(BIT(relframe, 16, 8)); // minute + m_scsi_cmdbuf[4] = dec_2_bcd(BIT(relframe, 8, 8)); // second + m_scsi_cmdbuf[5] = dec_2_bcd(BIT(relframe, 0, 8)); // frame const uint32_t frame = to_msf(cur_lba); - scsi_cmdbuf[6] = dec_2_bcd(BIT(frame, 16, 8)); // minute - scsi_cmdbuf[7] = dec_2_bcd(BIT(frame, 8, 8)); // second - scsi_cmdbuf[8] = dec_2_bcd(BIT(frame, 0, 8)); // frame + m_scsi_cmdbuf[6] = dec_2_bcd(BIT(frame, 16, 8)); // minute + m_scsi_cmdbuf[7] = dec_2_bcd(BIT(frame, 8, 8)); // second + m_scsi_cmdbuf[8] = dec_2_bcd(BIT(frame, 0, 8)); // frame scsi_data_in(SBUF_MAIN, 9); scsi_status_complete(SS_GOOD); @@ -1465,7 +1465,7 @@ void nscsi_cdrom_apple_device::scsi_command() // This command does not change the play or pause status. case APPLE_AUDIO_TRK_SEARCH: { - const uint8_t val = scsi_cmdbuf[5]; + const uint8_t val = m_scsi_cmdbuf[5]; const uint8_t start_track = (((val & 0xf0) >> 4) * 10) + (val & 0x0f); cdda->cancel_scan(); @@ -1480,13 +1480,13 @@ void nscsi_cdrom_apple_device::scsi_command() // 00 = search address is LBA // 01 = search address is M/S/F // 10 = search address is track number - if (scsi_cmdbuf[9] == 0x40) + if (m_scsi_cmdbuf[9] == 0x40) { - LOG("command APPLE AUDIO TRACK SEARCH MSF = %02x:%02x:%02x\n", scsi_cmdbuf[5], scsi_cmdbuf[6], scsi_cmdbuf[7]); - const uint32_t msf = (bcd_2_dec(scsi_cmdbuf[5]) << 16) | (bcd_2_dec(scsi_cmdbuf[6]) << 8) | bcd_2_dec(scsi_cmdbuf[7]); + LOG("command APPLE AUDIO TRACK SEARCH MSF = %02x:%02x:%02x\n", m_scsi_cmdbuf[5], m_scsi_cmdbuf[6], m_scsi_cmdbuf[7]); + const uint32_t msf = (bcd_2_dec(m_scsi_cmdbuf[5]) << 16) | (bcd_2_dec(m_scsi_cmdbuf[6]) << 8) | bcd_2_dec(m_scsi_cmdbuf[7]); start_lba = cdrom_file::msf_to_lba(msf); } - else if (scsi_cmdbuf[9] == 0x80) + else if (m_scsi_cmdbuf[9] == 0x80) { LOG("command APPLE AUDIO TRACK SEARCH track = %d\n", start_track); if (start_track == 0) @@ -1501,17 +1501,17 @@ void nscsi_cdrom_apple_device::scsi_command() m_stop_position = image->get_track_start(start_track); // does this actually update the stop position? } } - else if (scsi_cmdbuf[9] == 0x00) // LBA + else if (m_scsi_cmdbuf[9] == 0x00) // LBA { - start_lba = (scsi_cmdbuf[5] << 24) | (scsi_cmdbuf[4] << 16) | (scsi_cmdbuf[3] << 8) || scsi_cmdbuf[2]; + start_lba = (m_scsi_cmdbuf[5] << 24) | (m_scsi_cmdbuf[4] << 16) | (m_scsi_cmdbuf[3] << 8) || m_scsi_cmdbuf[2]; } else { - logerror("nscsi_cdrom_apple_device: Unknown APPLE AUDIO PLAY address mode %02x\n", scsi_cmdbuf[9]); + logerror("nscsi_cdrom_apple_device: Unknown APPLE AUDIO PLAY address mode %02x\n", m_scsi_cmdbuf[9]); } // PLAY / PAUSE bit - if ((scsi_cmdbuf[1] & 0x10) == 0x10) + if ((m_scsi_cmdbuf[1] & 0x10) == 0x10) { cdda->start_audio(start_lba, m_stop_position - start_lba); } @@ -1528,7 +1528,7 @@ void nscsi_cdrom_apple_device::scsi_command() case APPLE_AUDIO_PLAY: { - const uint8_t val = scsi_cmdbuf[5]; + const uint8_t val = m_scsi_cmdbuf[5]; const uint8_t start_track = (((val & 0xf0) >> 4) * 10) + (val & 0x0f); cdda->cancel_scan(); @@ -1542,7 +1542,7 @@ void nscsi_cdrom_apple_device::scsi_command() // 01 = address is M/S/F // 10 = address is track number uint32_t address = 0; - if (scsi_cmdbuf[9] == 0x80) + if (m_scsi_cmdbuf[9] == 0x80) { LOG("command APPLE AUDIO PLAY track = %d\n", start_track); @@ -1559,27 +1559,27 @@ void nscsi_cdrom_apple_device::scsi_command() address = image->get_track_start(start_track - 1); } } - else if (scsi_cmdbuf[9] == 0x40) + else if (m_scsi_cmdbuf[9] == 0x40) { - LOG("command APPLE AUDIO PLAY TRACK MSF = %02x:%02x:%02x\n", scsi_cmdbuf[3], scsi_cmdbuf[4], scsi_cmdbuf[5]); + LOG("command APPLE AUDIO PLAY TRACK MSF = %02x:%02x:%02x\n", m_scsi_cmdbuf[3], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); - const uint32_t msf = (bcd_2_dec(scsi_cmdbuf[3]) << 16) | (bcd_2_dec(scsi_cmdbuf[4]) << 8) | bcd_2_dec(scsi_cmdbuf[5]); + const uint32_t msf = (bcd_2_dec(m_scsi_cmdbuf[3]) << 16) | (bcd_2_dec(m_scsi_cmdbuf[4]) << 8) | bcd_2_dec(m_scsi_cmdbuf[5]); address = cdrom_file::msf_to_lba(msf); } - else if (scsi_cmdbuf[9] == 0x00) + else if (m_scsi_cmdbuf[9] == 0x00) { - address = (scsi_cmdbuf[5] << 24) | (scsi_cmdbuf[4] << 16) | (scsi_cmdbuf[3] << 8) || scsi_cmdbuf[2]; + address = (m_scsi_cmdbuf[5] << 24) | (m_scsi_cmdbuf[4] << 16) | (m_scsi_cmdbuf[3] << 8) || m_scsi_cmdbuf[2]; LOG("command APPLE AUDIO PLAY lba = %d\n", address); } else { - fatalerror("nscsi_cdrom_apple_device: unknown mode for APPLE AUDIO PLAY %02x\n", scsi_cmdbuf[9]); + fatalerror("nscsi_cdrom_apple_device: unknown mode for APPLE AUDIO PLAY %02x\n", m_scsi_cmdbuf[9]); } // cmdbuf[1] & 0x10: // 0 = address is the starting address, stop address was set by a STOP command // 1 = address is the stop address, start address was set by a TRACK SEARCH command - if (scsi_cmdbuf[1] & 0x10) + if (m_scsi_cmdbuf[1] & 0x10) { const auto start = cdda->get_audio_lba(); cdda->start_audio(start, address - start); @@ -1600,32 +1600,32 @@ void nscsi_cdrom_apple_device::scsi_command() Scan ends with a PAUSE OFF command. */ LOG("command APPLE_AUDIO_SCAN: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", - scsi_cmdbuf[0], scsi_cmdbuf[1], scsi_cmdbuf[2], - scsi_cmdbuf[3], scsi_cmdbuf[4], scsi_cmdbuf[5], - scsi_cmdbuf[6], scsi_cmdbuf[7], scsi_cmdbuf[8], - scsi_cmdbuf[9]); + m_scsi_cmdbuf[0], m_scsi_cmdbuf[1], m_scsi_cmdbuf[2], + m_scsi_cmdbuf[3], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5], + m_scsi_cmdbuf[6], m_scsi_cmdbuf[7], m_scsi_cmdbuf[8], + m_scsi_cmdbuf[9]); if (!m_stopped) { uint32_t start_lba = 0; - switch (scsi_cmdbuf[9] & 0xc0) + switch (m_scsi_cmdbuf[9] & 0xc0) { case 0x00: // stop at LBA - start_lba = (scsi_cmdbuf[5] << 24) | (scsi_cmdbuf[4] << 16) | (scsi_cmdbuf[3] << 8) || scsi_cmdbuf[2]; + start_lba = (m_scsi_cmdbuf[5] << 24) | (m_scsi_cmdbuf[4] << 16) | (m_scsi_cmdbuf[3] << 8) || m_scsi_cmdbuf[2]; LOG("command APPLE AUDIO SCAN at LBA %d\n", m_stop_position); break; case 0x40: // stop at MSF { - const uint32_t msf = (bcd_2_dec(scsi_cmdbuf[5]) << 16) | (bcd_2_dec(scsi_cmdbuf[6]) << 8) | bcd_2_dec(scsi_cmdbuf[7]); + const uint32_t msf = (bcd_2_dec(m_scsi_cmdbuf[5]) << 16) | (bcd_2_dec(m_scsi_cmdbuf[6]) << 8) | bcd_2_dec(m_scsi_cmdbuf[7]); start_lba = cdrom_file::msf_to_lba(msf); - LOG("command APPLE AUDIO SCAN at MSF %02x:%02x:%02x\n", scsi_cmdbuf[5], scsi_cmdbuf[6], scsi_cmdbuf[7]); + LOG("command APPLE AUDIO SCAN at MSF %02x:%02x:%02x\n", m_scsi_cmdbuf[5], m_scsi_cmdbuf[6], m_scsi_cmdbuf[7]); } break; case 0x80: // stop at track number { - const uint8_t start_track = bcd_2_dec(scsi_cmdbuf[5]); + const uint8_t start_track = bcd_2_dec(m_scsi_cmdbuf[5]); if (start_track >= image->get_last_track()) { start_lba = image->get_track_start(0xaa); @@ -1640,14 +1640,14 @@ void nscsi_cdrom_apple_device::scsi_command() break; default: - logerror("nscsi_cdrom_apple_device: Unknown APPLE AUDIO SCAN address mode %02x\n", scsi_cmdbuf[9]); + logerror("nscsi_cdrom_apple_device: Unknown APPLE AUDIO SCAN address mode %02x\n", m_scsi_cmdbuf[9]); break; } // begin seeking from the specified address cdda->set_audio_lba(start_lba); - if ((scsi_cmdbuf[1] & 0x10) == 0) + if ((m_scsi_cmdbuf[1] & 0x10) == 0) { cdda->scan_forward(); } @@ -1660,8 +1660,8 @@ void nscsi_cdrom_apple_device::scsi_command() break; case APPLE_AUDIO_PAUSE: - LOG("command APPLE AUDIO PAUSE, on/off=%02x\n", scsi_cmdbuf[1]); - if (scsi_cmdbuf[1] == 0x10) + LOG("command APPLE AUDIO PAUSE, on/off=%02x\n", m_scsi_cmdbuf[1]); + if (m_scsi_cmdbuf[1] == 0x10) { // set pause if (!cdda->audio_paused()) @@ -1682,24 +1682,24 @@ void nscsi_cdrom_apple_device::scsi_command() break; case APPLE_AUDIO_STOP: - switch (scsi_cmdbuf[9] & 0xc0) + switch (m_scsi_cmdbuf[9] & 0xc0) { case 0x00: // stop at LBA - m_stop_position = (scsi_cmdbuf[5] << 24) | (scsi_cmdbuf[4] << 16) | (scsi_cmdbuf[3] << 8) || scsi_cmdbuf[2]; + m_stop_position = (m_scsi_cmdbuf[5] << 24) | (m_scsi_cmdbuf[4] << 16) | (m_scsi_cmdbuf[3] << 8) || m_scsi_cmdbuf[2]; LOG("command APPLE AUDIO STOP at LBA %d\n", m_stop_position); break; case 0x40: // stop at MSF { - const uint32_t msf = (bcd_2_dec(scsi_cmdbuf[5]) << 16) | (bcd_2_dec(scsi_cmdbuf[6]) << 8) | bcd_2_dec(scsi_cmdbuf[7]); + const uint32_t msf = (bcd_2_dec(m_scsi_cmdbuf[5]) << 16) | (bcd_2_dec(m_scsi_cmdbuf[6]) << 8) | bcd_2_dec(m_scsi_cmdbuf[7]); m_stop_position = cdrom_file::msf_to_lba(msf); - LOG("command APPLE AUDIO STOP at MSF %02x:%02x:%02x\n", scsi_cmdbuf[5], scsi_cmdbuf[6], scsi_cmdbuf[7]); + LOG("command APPLE AUDIO STOP at MSF %02x:%02x:%02x\n", m_scsi_cmdbuf[5], m_scsi_cmdbuf[6], m_scsi_cmdbuf[7]); } break; case 0x80: // stop at track number { - const uint8_t start_track = bcd_2_dec(scsi_cmdbuf[5]); + const uint8_t start_track = bcd_2_dec(m_scsi_cmdbuf[5]); if (start_track >= image->get_last_track()) { m_stop_position = image->get_track_start(0xaa); @@ -1714,7 +1714,7 @@ void nscsi_cdrom_apple_device::scsi_command() break; default: - logerror("nscsi_cdrom_apple_device: Unknown APPLE AUDIO STOP address mode %02x\n", scsi_cmdbuf[9]); + logerror("nscsi_cdrom_apple_device: Unknown APPLE AUDIO STOP address mode %02x\n", m_scsi_cmdbuf[9]); break; } @@ -1728,11 +1728,11 @@ void nscsi_cdrom_apple_device::scsi_command() break; case APPLE_AUDIO_CONTROL: - LOG("command APPLE AUDIO CONTROL, size %d\n", scsi_cmdbuf[8]); + LOG("command APPLE AUDIO CONTROL, size %d\n", m_scsi_cmdbuf[8]); if (image->exists()) { - scsi_data_out(3, scsi_cmdbuf[8]); + scsi_data_out(3, m_scsi_cmdbuf[8]); scsi_status_complete(SS_GOOD); } else diff --git a/src/devices/bus/nscsi/cfp1080s.cpp b/src/devices/bus/nscsi/cfp1080s.cpp index 8425348d78c..dd445c52909 100644 --- a/src/devices/bus/nscsi/cfp1080s.cpp +++ b/src/devices/bus/nscsi/cfp1080s.cpp @@ -23,7 +23,8 @@ DEFINE_DEVICE_TYPE(CFP1080S, cfp1080s_device, "cfp1080s", "Conner CFP1080S") cfp1080s_device::cfp1080s_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : nscsi_device(mconfig, CFP1080S, tag, owner, clock) + : device_t(mconfig, CFP1080S, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_hdcpu(*this, "hdcpu") , m_addrptr(0) diff --git a/src/devices/bus/nscsi/cfp1080s.h b/src/devices/bus/nscsi/cfp1080s.h index 8a9e4efb0ed..3720ee846b0 100644 --- a/src/devices/bus/nscsi/cfp1080s.h +++ b/src/devices/bus/nscsi/cfp1080s.h @@ -8,7 +8,7 @@ #include "machine/nscsi_bus.h" -class cfp1080s_device : public nscsi_device, public nscsi_slot_card_interface +class cfp1080s_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: cfp1080s_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); diff --git a/src/devices/bus/nscsi/dtc510.cpp b/src/devices/bus/nscsi/dtc510.cpp index d98244e6254..ad8002d7ac4 100644 --- a/src/devices/bus/nscsi/dtc510.cpp +++ b/src/devices/bus/nscsi/dtc510.cpp @@ -65,33 +65,33 @@ void nscsi_dtc510_device::scsi_command() { // TODO: don't clear sense buffer on every command! // (mutuated from s1410) - memset(scsi_sense_buffer, 0, sizeof(scsi_sense_buffer)); + memset(m_scsi_sense_buffer, 0, sizeof(m_scsi_sense_buffer)); LOGCOMMAND("CMD %02x %02x %02x %02x %02x %02x\n", - scsi_cmdbuf[0], scsi_cmdbuf[1], scsi_cmdbuf[2], - scsi_cmdbuf[3], scsi_cmdbuf[4], scsi_cmdbuf[5] + m_scsi_cmdbuf[0], m_scsi_cmdbuf[1], m_scsi_cmdbuf[2], + m_scsi_cmdbuf[3], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5] ); -// if (scsi_cmdbuf[0] == 0x01 && scsi_cmdbuf[1] == 0x01 && scsi_cmdbuf[5] == 0x01) +// if (m_scsi_cmdbuf[0] == 0x01 && m_scsi_cmdbuf[1] == 0x01 && m_scsi_cmdbuf[5] == 0x01) // machine().debug_break(); - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_TEST_UNIT_READY: case SC_FORMAT_BAD_TRACK: case SC_READ: case SC_WRITE: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; } else { nscsi_harddisk_device::scsi_command(); } break; case SC_RECALIBRATE: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; } else { // lba = 0; scsi_status_complete(SS_GOOD); @@ -99,21 +99,21 @@ void nscsi_dtc510_device::scsi_command() break; case SC_SEEK: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; } else { - //lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + //lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; scsi_status_complete(SS_GOOD); } break; case SC_REQUEST_SENSE: // TODO: hangs if a request sense is issued - //scsi_sense_buffer[0] = SK_NO_ERROR; - //scsi_sense_buffer[1] = (m_seek >> 16) & 0x1f; - //scsi_sense_buffer[2] = (m_seek >> 8) & 0xff; - //scsi_sense_buffer[3] = (m_seek >> 0) & 0xff; + //m_scsi_sense_buffer[0] = SK_NO_ERROR; + //m_scsi_sense_buffer[1] = (m_seek >> 16) & 0x1f; + //m_scsi_sense_buffer[2] = (m_seek >> 8) & 0xff; + //m_scsi_sense_buffer[3] = (m_seek >> 0) & 0xff; scsi_data_in(SBUF_SENSE, 4); scsi_status_complete(SS_GOOD); break; @@ -123,9 +123,9 @@ void nscsi_dtc510_device::scsi_command() { const auto &info = image->get_info(); auto block = std::make_unique(info.sectorbytes); - const u8 fill_byte = scsi_cmdbuf[3] == 0 ? 0xe5 : scsi_cmdbuf[3]; + const u8 fill_byte = m_scsi_cmdbuf[3] == 0 ? 0xe5 : m_scsi_cmdbuf[3]; memset(&block[0], fill_byte, info.sectorbytes); - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; for(; lba < (info.cylinders * info.heads * info.sectors); lba++) { image->write(lba, block.get()); } @@ -134,13 +134,13 @@ void nscsi_dtc510_device::scsi_command() break; case SC_FORMAT_TRACK: { - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; return; } - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; blocks = (bytes_per_sector == 256) ? 32 : 17; int track_length = blocks*bytes_per_sector; @@ -150,7 +150,7 @@ void nscsi_dtc510_device::scsi_command() if(!image->write(lba, &block[0])) { logerror("%s: HD WRITE ERROR !\n", tag()); scsi_status_complete(SS_FORMAT_ERROR); - scsi_sense_buffer[0] = SK_FORMAT_ERROR; + m_scsi_sense_buffer[0] = SK_FORMAT_ERROR; } else { scsi_status_complete(SS_GOOD); } @@ -160,9 +160,9 @@ void nscsi_dtc510_device::scsi_command() case SC_ASSIGN_ALT_TRACK: { // TODO: unimplemented - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; return; } @@ -176,9 +176,9 @@ void nscsi_dtc510_device::scsi_command() break; case SC_CHECK_TRACK_FORMAT: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; return; } scsi_status_complete(SS_GOOD); @@ -196,7 +196,7 @@ void nscsi_dtc510_device::scsi_command() break; default: - logerror("%s: command %02x ***UNKNOWN***\n", tag(), scsi_cmdbuf[0]); + logerror("%s: command %02x ***UNKNOWN***\n", tag(), m_scsi_cmdbuf[0]); scsi_status_complete(SS_CHECK_CONDITION); break; } @@ -204,7 +204,7 @@ void nscsi_dtc510_device::scsi_command() uint8_t nscsi_dtc510_device::scsi_get_data(int id, int pos) { - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { default: return nscsi_harddisk_device::scsi_get_data(id, pos); @@ -213,7 +213,7 @@ uint8_t nscsi_dtc510_device::scsi_get_data(int id, int pos) void nscsi_dtc510_device::scsi_put_data(int id, int pos, uint8_t data) { - if (scsi_cmdbuf[0] == SC_ASSIGN_DISK_PARAMETERS && id == 4) + if (m_scsi_cmdbuf[0] == SC_ASSIGN_DISK_PARAMETERS && id == 4) { m_param[pos] = data; if (pos == 9) @@ -238,7 +238,7 @@ void nscsi_dtc510_device::scsi_put_data(int id, int pos, uint8_t data) return nscsi_harddisk_device::scsi_put_data(id, pos, data); } - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { // ... default: return nscsi_harddisk_device::scsi_put_data(id, pos, data); @@ -256,7 +256,7 @@ attotime nscsi_dtc510_device::scsi_data_byte_period() // Command execution delay attotime nscsi_dtc510_device::scsi_data_command_delay() { - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_READ: case SC_WRITE: case SC_SEEK: diff --git a/src/devices/bus/nscsi/hd.cpp b/src/devices/bus/nscsi/hd.cpp index 7903397954c..ed76730a137 100644 --- a/src/devices/bus/nscsi/hd.cpp +++ b/src/devices/bus/nscsi/hd.cpp @@ -49,7 +49,7 @@ void nscsi_harddisk_device::device_reset() { nscsi_full_device::device_reset(); if(!image->exists()) { - scsi_id = -1; + m_scsi_id = -1; bytes_per_sector = 0; } else { const auto &hdinfo = image->get_info(); @@ -104,21 +104,21 @@ void nscsi_harddisk_device::scsi_put_data(int id, int pos, uint8_t data) void nscsi_harddisk_device::scsi_command() { - if(scsi_cmdbuf[0] != SC_READ_6) { + if(m_scsi_cmdbuf[0] != SC_READ_6) { LOGMASKED(LOG_COMMAND, "%02x %02x %02x %02x %02x %02x\n", - scsi_cmdbuf[0], scsi_cmdbuf[1], scsi_cmdbuf[2], - scsi_cmdbuf[3], scsi_cmdbuf[4], scsi_cmdbuf[5]); + m_scsi_cmdbuf[0], m_scsi_cmdbuf[1], m_scsi_cmdbuf[2], + m_scsi_cmdbuf[3], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); } - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_TEST_UNIT_READY: LOG("command TEST UNIT READY\n"); scsi_status_complete(SS_GOOD); break; case SC_READ_6: - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; - blocks = scsi_cmdbuf[4]; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; + blocks = m_scsi_cmdbuf[4]; if(!blocks) blocks = 256; @@ -134,8 +134,8 @@ void nscsi_harddisk_device::scsi_command() break; case SC_WRITE_6: - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; - blocks = scsi_cmdbuf[4]; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; + blocks = m_scsi_cmdbuf[4]; if(!blocks) blocks = 256; @@ -151,61 +151,61 @@ void nscsi_harddisk_device::scsi_command() break; case SC_INQUIRY: { - int lun = get_lun(scsi_cmdbuf[1] >> 5); + int lun = get_lun(m_scsi_cmdbuf[1] >> 5); LOG("command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n", - lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]); + lun, m_scsi_cmdbuf[1] & 1, m_scsi_cmdbuf[2], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); - int page = scsi_cmdbuf[2]; - int size = scsi_cmdbuf[4]; + int page = m_scsi_cmdbuf[2]; + int size = m_scsi_cmdbuf[4]; switch(page) { case 0: - std::fill_n(scsi_cmdbuf, 148, 0); + std::fill_n(m_scsi_cmdbuf, 148, 0); // vendor and product information must be padded with spaces - std::fill_n(&scsi_cmdbuf[8], 28, 0x20); + std::fill_n(&m_scsi_cmdbuf[8], 28, 0x20); // From Seagate SCSI Commands Reference Manual (http://www.seagate.com/staticfiles/support/disc/manuals/scsi/100293068a.pdf), page 73: // If the SCSI target device is not capable of supporting a peripheral device connected to this logical unit, the // device server shall set these fields to 7Fh (i.e., PERIPHERAL QUALIFIER field set to 011b and PERIPHERAL DEVICE // TYPE set to 1Fh). if (lun != 0) - scsi_cmdbuf[0] = 0x7f; + m_scsi_cmdbuf[0] = 0x7f; else - scsi_cmdbuf[0] = 0x00; // device is direct-access (e.g. hard disk) - scsi_cmdbuf[1] = 0x00; // media is not removable - scsi_cmdbuf[2] = 0x05; // device complies with SPC-3 standard - scsi_cmdbuf[3] = 0x01; // response data format = CCS - scsi_cmdbuf[4] = 52; // additional length + m_scsi_cmdbuf[0] = 0x00; // device is direct-access (e.g. hard disk) + m_scsi_cmdbuf[1] = 0x00; // media is not removable + m_scsi_cmdbuf[2] = 0x05; // device complies with SPC-3 standard + m_scsi_cmdbuf[3] = 0x01; // response data format = CCS + m_scsi_cmdbuf[4] = 52; // additional length if(m_inquiry_data.empty()) { LOG("IDNT tag not found in chd metadata, using default inquiry data\n"); // Apple HD SC setup utility needs to see this - memset(scsi_cmdbuf+8, ' ', 28); + memset(m_scsi_cmdbuf+8, ' ', 28); int len = m_default_model_name.size(); if(len > 28) len = 28; - memcpy(scsi_cmdbuf+8, m_default_model_name.data(), len); - scsi_cmdbuf[36] = 0x00; // # of extents high - scsi_cmdbuf[37] = 0x08; // # of extents low - scsi_cmdbuf[38] = 0x00; // group 0 commands 0-1f - scsi_cmdbuf[39] = 0x99; // commands 0,3,4,7 - scsi_cmdbuf[40] = 0xa0; // commands 8, a - scsi_cmdbuf[41] = 0x27; // commands 12,15,16,17 - scsi_cmdbuf[42] = 0x34; // commands 1a,1b,1d - scsi_cmdbuf[43] = 0x01; // group 1 commands 20-3f - scsi_cmdbuf[44] = 0x04; - scsi_cmdbuf[45] = 0xa0; - scsi_cmdbuf[46] = 0x01; - scsi_cmdbuf[47] = 0x18; - scsi_cmdbuf[48] = 0x07; // group 7 commands e0-ff - scsi_cmdbuf[49] = 0x00; - scsi_cmdbuf[50] = 0xa0; // commands 8, a - scsi_cmdbuf[51] = 0x00; - scsi_cmdbuf[52] = 0x00; - scsi_cmdbuf[53] = 0xff; // end of list + memcpy(m_scsi_cmdbuf+8, m_default_model_name.data(), len); + m_scsi_cmdbuf[36] = 0x00; // # of extents high + m_scsi_cmdbuf[37] = 0x08; // # of extents low + m_scsi_cmdbuf[38] = 0x00; // group 0 commands 0-1f + m_scsi_cmdbuf[39] = 0x99; // commands 0,3,4,7 + m_scsi_cmdbuf[40] = 0xa0; // commands 8, a + m_scsi_cmdbuf[41] = 0x27; // commands 12,15,16,17 + m_scsi_cmdbuf[42] = 0x34; // commands 1a,1b,1d + m_scsi_cmdbuf[43] = 0x01; // group 1 commands 20-3f + m_scsi_cmdbuf[44] = 0x04; + m_scsi_cmdbuf[45] = 0xa0; + m_scsi_cmdbuf[46] = 0x01; + m_scsi_cmdbuf[47] = 0x18; + m_scsi_cmdbuf[48] = 0x07; // group 7 commands e0-ff + m_scsi_cmdbuf[49] = 0x00; + m_scsi_cmdbuf[50] = 0xa0; // commands 8, a + m_scsi_cmdbuf[51] = 0x00; + m_scsi_cmdbuf[52] = 0x00; + m_scsi_cmdbuf[53] = 0xff; // end of list } else - std::copy_n(m_inquiry_data.begin(), std::min(m_inquiry_data.size(), size_t(48)), &scsi_cmdbuf[8]); + std::copy_n(m_inquiry_data.begin(), std::min(m_inquiry_data.size(), size_t(48)), &m_scsi_cmdbuf[8]); if(size > 56) size = 56; @@ -217,28 +217,28 @@ void nscsi_harddisk_device::scsi_command() } case SC_MODE_SENSE_6: { - int lun = get_lun(scsi_cmdbuf[1] >> 5); + int lun = get_lun(m_scsi_cmdbuf[1] >> 5); LOG("command MODE SENSE 6 lun=%d page=%02x alloc=%02x link=%02x\n", - lun, scsi_cmdbuf[2] & 0x3f, scsi_cmdbuf[4], scsi_cmdbuf[5]); + lun, m_scsi_cmdbuf[2] & 0x3f, m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); if(lun) { bad_lun(); return; } - int page = scsi_cmdbuf[2] & 0x3f; - int size = scsi_cmdbuf[4]; + int page = m_scsi_cmdbuf[2] & 0x3f; + int size = m_scsi_cmdbuf[4]; int pos = 1; - scsi_cmdbuf[pos++] = 0x00; // medium type - scsi_cmdbuf[pos++] = 0x00; // WP, cache + m_scsi_cmdbuf[pos++] = 0x00; // medium type + m_scsi_cmdbuf[pos++] = 0x00; // WP, cache const auto &info = image->get_info(); uint32_t dsize = info.cylinders * info.heads * info.sectors - 1; - scsi_cmdbuf[pos++] = 0x08; // Block descriptor length - scsi_cmdbuf[pos++] = 0x00; - put_u24be(&scsi_cmdbuf[pos], dsize); + m_scsi_cmdbuf[pos++] = 0x08; // Block descriptor length + m_scsi_cmdbuf[pos++] = 0x00; + put_u24be(&m_scsi_cmdbuf[pos], dsize); pos += 3; - scsi_cmdbuf[pos++] = 0x00; - put_u24be(&scsi_cmdbuf[pos], info.sectorbytes); + m_scsi_cmdbuf[pos++] = 0x00; + put_u24be(&m_scsi_cmdbuf[pos], info.sectorbytes); pos += 3; int pmax = page == 0x3f ? 0x3e : page; @@ -248,141 +248,141 @@ void nscsi_harddisk_device::scsi_command() for(int p=pmax; p >= pmin; p--) { switch(p) { case 0x00: // Unit attention parameters page (weird) - scsi_cmdbuf[pos++] = 0x80; // PS, page id - scsi_cmdbuf[pos++] = 0x02; // Page length - scsi_cmdbuf[pos++] = 0x00; // Meh - scsi_cmdbuf[pos++] = 0x00; // Double meh + m_scsi_cmdbuf[pos++] = 0x80; // PS, page id + m_scsi_cmdbuf[pos++] = 0x02; // Page length + m_scsi_cmdbuf[pos++] = 0x00; // Meh + m_scsi_cmdbuf[pos++] = 0x00; // Double meh break; case 0x01: // read-write error recovery page - scsi_cmdbuf[pos++] = 0x01; // !PS, page id - scsi_cmdbuf[pos++] = 0x0a; // page length - scsi_cmdbuf[pos++] = 0x26; // various bits - scsi_cmdbuf[pos++] = 0; // read retry count - scsi_cmdbuf[pos++] = 0; // correction span - scsi_cmdbuf[pos++] = 0; // head offset count - scsi_cmdbuf[pos++] = 0; // data strobe offset count - scsi_cmdbuf[pos++] = 0; // reserved - scsi_cmdbuf[pos++] = 0; // write retry count - scsi_cmdbuf[pos++] = 0; // reserved - scsi_cmdbuf[pos++] = 0; // recovery time limit (msb) - scsi_cmdbuf[pos++] = 0; // recovery time limit (lsb) + m_scsi_cmdbuf[pos++] = 0x01; // !PS, page id + m_scsi_cmdbuf[pos++] = 0x0a; // page length + m_scsi_cmdbuf[pos++] = 0x26; // various bits + m_scsi_cmdbuf[pos++] = 0; // read retry count + m_scsi_cmdbuf[pos++] = 0; // correction span + m_scsi_cmdbuf[pos++] = 0; // head offset count + m_scsi_cmdbuf[pos++] = 0; // data strobe offset count + m_scsi_cmdbuf[pos++] = 0; // reserved + m_scsi_cmdbuf[pos++] = 0; // write retry count + m_scsi_cmdbuf[pos++] = 0; // reserved + m_scsi_cmdbuf[pos++] = 0; // recovery time limit (msb) + m_scsi_cmdbuf[pos++] = 0; // recovery time limit (lsb) break; case 0x02: // disconnect-reconnect page - scsi_cmdbuf[pos++] = 0x02; // !PS, page id - scsi_cmdbuf[pos++] = 0x0e; // page length - scsi_cmdbuf[pos++] = 0; // buffer full ratio - scsi_cmdbuf[pos++] = 0; // buffer empty ratio - scsi_cmdbuf[pos++] = 0; // bus inactivity limit (msb) - scsi_cmdbuf[pos++] = 0; // bus inactivity limit (lsb) - scsi_cmdbuf[pos++] = 0; // disconnect time limit (msb) - scsi_cmdbuf[pos++] = 0; // disconnect time limit (lsb) - scsi_cmdbuf[pos++] = 0; // connect time limit (msb) - scsi_cmdbuf[pos++] = 0; // connect time limit (lsb) - scsi_cmdbuf[pos++] = 0; // maximum burst size (msb) - scsi_cmdbuf[pos++] = 0; // maximum burst size (lsb) - scsi_cmdbuf[pos++] = 0; // reserved - scsi_cmdbuf[pos++] = 0; // reserved - scsi_cmdbuf[pos++] = 0; // reserved - scsi_cmdbuf[pos++] = 0; // reserved + m_scsi_cmdbuf[pos++] = 0x02; // !PS, page id + m_scsi_cmdbuf[pos++] = 0x0e; // page length + m_scsi_cmdbuf[pos++] = 0; // buffer full ratio + m_scsi_cmdbuf[pos++] = 0; // buffer empty ratio + m_scsi_cmdbuf[pos++] = 0; // bus inactivity limit (msb) + m_scsi_cmdbuf[pos++] = 0; // bus inactivity limit (lsb) + m_scsi_cmdbuf[pos++] = 0; // disconnect time limit (msb) + m_scsi_cmdbuf[pos++] = 0; // disconnect time limit (lsb) + m_scsi_cmdbuf[pos++] = 0; // connect time limit (msb) + m_scsi_cmdbuf[pos++] = 0; // connect time limit (lsb) + m_scsi_cmdbuf[pos++] = 0; // maximum burst size (msb) + m_scsi_cmdbuf[pos++] = 0; // maximum burst size (lsb) + m_scsi_cmdbuf[pos++] = 0; // reserved + m_scsi_cmdbuf[pos++] = 0; // reserved + m_scsi_cmdbuf[pos++] = 0; // reserved + m_scsi_cmdbuf[pos++] = 0; // reserved break; case 0x03: { // Format parameters page - scsi_cmdbuf[pos++] = 0x83; // PS, page id - scsi_cmdbuf[pos++] = 0x16; // Page length - put_u16be(&scsi_cmdbuf[pos], info.cylinders * info.heads); // Track/zone + m_scsi_cmdbuf[pos++] = 0x83; // PS, page id + m_scsi_cmdbuf[pos++] = 0x16; // Page length + put_u16be(&m_scsi_cmdbuf[pos], info.cylinders * info.heads); // Track/zone pos += 2; - scsi_cmdbuf[pos++] = 0x00; // Alt sect/zone - scsi_cmdbuf[pos++] = 0x00; // Alt sect/zone - scsi_cmdbuf[pos++] = 0x00; // Alt track/zone - scsi_cmdbuf[pos++] = 0x00; // Alt track/zone - scsi_cmdbuf[pos++] = 0x00; // Alt track/volume - scsi_cmdbuf[pos++] = 0x00; // Alt track/volume - put_u16be(&scsi_cmdbuf[pos], info.sectors); // Sectors/track + m_scsi_cmdbuf[pos++] = 0x00; // Alt sect/zone + m_scsi_cmdbuf[pos++] = 0x00; // Alt sect/zone + m_scsi_cmdbuf[pos++] = 0x00; // Alt track/zone + m_scsi_cmdbuf[pos++] = 0x00; // Alt track/zone + m_scsi_cmdbuf[pos++] = 0x00; // Alt track/volume + m_scsi_cmdbuf[pos++] = 0x00; // Alt track/volume + put_u16be(&m_scsi_cmdbuf[pos], info.sectors); // Sectors/track pos += 2; - put_u16be(&scsi_cmdbuf[pos], info.sectorbytes); // Bytes/sector + put_u16be(&m_scsi_cmdbuf[pos], info.sectorbytes); // Bytes/sector pos += 2; - scsi_cmdbuf[pos++] = 0x00; // Interleave - scsi_cmdbuf[pos++] = 0x00; // Interleave - scsi_cmdbuf[pos++] = 0x00; // Track skew - scsi_cmdbuf[pos++] = 0x00; // Track skew - scsi_cmdbuf[pos++] = 0x00; // Cylinder skew - scsi_cmdbuf[pos++] = 0x00; // Cylinder skew - scsi_cmdbuf[pos++] = 0x00; // Sectoring type - scsi_cmdbuf[pos++] = 0x00; // Reserved - scsi_cmdbuf[pos++] = 0x00; // Reserved - scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Interleave + m_scsi_cmdbuf[pos++] = 0x00; // Interleave + m_scsi_cmdbuf[pos++] = 0x00; // Track skew + m_scsi_cmdbuf[pos++] = 0x00; // Track skew + m_scsi_cmdbuf[pos++] = 0x00; // Cylinder skew + m_scsi_cmdbuf[pos++] = 0x00; // Cylinder skew + m_scsi_cmdbuf[pos++] = 0x00; // Sectoring type + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Reserved break; } case 0x04: { // Rigid drive geometry page - scsi_cmdbuf[pos++] = 0x84; // PS, page id - scsi_cmdbuf[pos++] = 0x16; // Page length - put_u24be(&scsi_cmdbuf[pos], info.cylinders); // Cylinders + m_scsi_cmdbuf[pos++] = 0x84; // PS, page id + m_scsi_cmdbuf[pos++] = 0x16; // Page length + put_u24be(&m_scsi_cmdbuf[pos], info.cylinders); // Cylinders pos += 3; - scsi_cmdbuf[pos++] = info.heads; // Heads - scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - write precomp - scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - write precomp - scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - write precomp - scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - reduced write current - scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - reduced write current - scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - reduced write current - scsi_cmdbuf[pos++] = 0x00; // Drive step rate - scsi_cmdbuf[pos++] = 0x00; // Drive step rate - scsi_cmdbuf[pos++] = 0x00; // Landing zone cylinder - scsi_cmdbuf[pos++] = 0x00; // Landing zone cylinder - scsi_cmdbuf[pos++] = 0x00; // Landing zone cylinder - scsi_cmdbuf[pos++] = 0x00; // RPL - scsi_cmdbuf[pos++] = 0x00; // Rotational offset - scsi_cmdbuf[pos++] = 0x00; // Reserved - put_u16be(&scsi_cmdbuf[pos], 10000); // Medium rotation rate + m_scsi_cmdbuf[pos++] = info.heads; // Heads + m_scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - write precomp + m_scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - write precomp + m_scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - write precomp + m_scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - reduced write current + m_scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - reduced write current + m_scsi_cmdbuf[pos++] = 0x00; // Starting cylinder - reduced write current + m_scsi_cmdbuf[pos++] = 0x00; // Drive step rate + m_scsi_cmdbuf[pos++] = 0x00; // Drive step rate + m_scsi_cmdbuf[pos++] = 0x00; // Landing zone cylinder + m_scsi_cmdbuf[pos++] = 0x00; // Landing zone cylinder + m_scsi_cmdbuf[pos++] = 0x00; // Landing zone cylinder + m_scsi_cmdbuf[pos++] = 0x00; // RPL + m_scsi_cmdbuf[pos++] = 0x00; // Rotational offset + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + put_u16be(&m_scsi_cmdbuf[pos], 10000); // Medium rotation rate pos += 2; - scsi_cmdbuf[pos++] = 0x00; // Reserved - scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Reserved + m_scsi_cmdbuf[pos++] = 0x00; // Reserved break; } case 0x08: // caching page - scsi_cmdbuf[pos++] = 0x08; // !PS, page id - scsi_cmdbuf[pos++] = 0x0a; // page length - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0x08; // !PS, page id + m_scsi_cmdbuf[pos++] = 0x0a; // page length + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; break; case 0x30: { // Apple firmware ID page - scsi_cmdbuf[pos++] = 0xb0; // cPS, page id - scsi_cmdbuf[pos++] = 0x16; // Page length - scsi_cmdbuf[pos++] = 'A'; - scsi_cmdbuf[pos++] = 'P'; - scsi_cmdbuf[pos++] = 'P'; - scsi_cmdbuf[pos++] = 'L'; - scsi_cmdbuf[pos++] = 'E'; - scsi_cmdbuf[pos++] = ' '; - scsi_cmdbuf[pos++] = 'C'; - scsi_cmdbuf[pos++] = 'O'; - scsi_cmdbuf[pos++] = 'M'; - scsi_cmdbuf[pos++] = 'P'; - scsi_cmdbuf[pos++] = 'U'; - scsi_cmdbuf[pos++] = 'T'; - scsi_cmdbuf[pos++] = 'E'; - scsi_cmdbuf[pos++] = 'R'; - scsi_cmdbuf[pos++] = ','; - scsi_cmdbuf[pos++] = ' '; - scsi_cmdbuf[pos++] = 'I'; - scsi_cmdbuf[pos++] = 'N'; - scsi_cmdbuf[pos++] = 'C'; - scsi_cmdbuf[pos++] = ' '; - scsi_cmdbuf[pos++] = ' '; - scsi_cmdbuf[pos++] = ' '; + m_scsi_cmdbuf[pos++] = 0xb0; // cPS, page id + m_scsi_cmdbuf[pos++] = 0x16; // Page length + m_scsi_cmdbuf[pos++] = 'A'; + m_scsi_cmdbuf[pos++] = 'P'; + m_scsi_cmdbuf[pos++] = 'P'; + m_scsi_cmdbuf[pos++] = 'L'; + m_scsi_cmdbuf[pos++] = 'E'; + m_scsi_cmdbuf[pos++] = ' '; + m_scsi_cmdbuf[pos++] = 'C'; + m_scsi_cmdbuf[pos++] = 'O'; + m_scsi_cmdbuf[pos++] = 'M'; + m_scsi_cmdbuf[pos++] = 'P'; + m_scsi_cmdbuf[pos++] = 'U'; + m_scsi_cmdbuf[pos++] = 'T'; + m_scsi_cmdbuf[pos++] = 'E'; + m_scsi_cmdbuf[pos++] = 'R'; + m_scsi_cmdbuf[pos++] = ','; + m_scsi_cmdbuf[pos++] = ' '; + m_scsi_cmdbuf[pos++] = 'I'; + m_scsi_cmdbuf[pos++] = 'N'; + m_scsi_cmdbuf[pos++] = 'C'; + m_scsi_cmdbuf[pos++] = ' '; + m_scsi_cmdbuf[pos++] = ' '; + m_scsi_cmdbuf[pos++] = ' '; break; } @@ -396,7 +396,7 @@ void nscsi_harddisk_device::scsi_command() } if (!fail) { - scsi_cmdbuf[0] = pos - 1; + m_scsi_cmdbuf[0] = pos - 1; if (pos > size) pos = size; @@ -410,21 +410,21 @@ void nscsi_harddisk_device::scsi_command() } case SC_START_STOP_UNIT: - LOG("command %s UNIT\n", (scsi_cmdbuf[4] & 0x1) ? "START" : "STOP"); + LOG("command %s UNIT\n", (m_scsi_cmdbuf[4] & 0x1) ? "START" : "STOP"); scsi_status_complete(SS_GOOD); break; case SC_RECEIVE_DIAGNOSTIC_RESULTS: { LOG("command RECEIVE DIAGNOSTIC RESULTS\n"); - int size = get_u16be(&scsi_cmdbuf[3]); + int size = get_u16be(&m_scsi_cmdbuf[3]); int pos = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 6; - scsi_cmdbuf[pos++] = 0; // ROM is OK - scsi_cmdbuf[pos++] = 0; // RAM is OK - scsi_cmdbuf[pos++] = 0; // Data buffer is OK - scsi_cmdbuf[pos++] = 0; // Interface is OK - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 6; + m_scsi_cmdbuf[pos++] = 0; // ROM is OK + m_scsi_cmdbuf[pos++] = 0; // RAM is OK + m_scsi_cmdbuf[pos++] = 0; // Data buffer is OK + m_scsi_cmdbuf[pos++] = 0; // Interface is OK + m_scsi_cmdbuf[pos++] = 0; if(size > pos) size = pos; scsi_data_in(0, size); @@ -434,21 +434,21 @@ void nscsi_harddisk_device::scsi_command() case SC_SEND_DIAGNOSTIC: { LOG("command SEND DIAGNOSTIC\n"); - int size = get_u16be(&scsi_cmdbuf[3]); - if(scsi_cmdbuf[1] & 4) { + int size = get_u16be(&m_scsi_cmdbuf[3]); + if(m_scsi_cmdbuf[1] & 4) { // Self-test scsi_status_complete(SS_GOOD); break; } int pos = 0; - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 6; - scsi_cmdbuf[pos++] = 0; // ROM is OK - scsi_cmdbuf[pos++] = 0; // RAM is OK - scsi_cmdbuf[pos++] = 0; // Data buffer is OK - scsi_cmdbuf[pos++] = 0; // Interface is OK - scsi_cmdbuf[pos++] = 0; - scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 6; + m_scsi_cmdbuf[pos++] = 0; // ROM is OK + m_scsi_cmdbuf[pos++] = 0; // RAM is OK + m_scsi_cmdbuf[pos++] = 0; // Data buffer is OK + m_scsi_cmdbuf[pos++] = 0; // Interface is OK + m_scsi_cmdbuf[pos++] = 0; + m_scsi_cmdbuf[pos++] = 0; if(size > pos) size = pos; scsi_data_in(0, size); @@ -467,8 +467,8 @@ void nscsi_harddisk_device::scsi_command() const auto &info = image->get_info(); uint32_t size = info.cylinders * info.heads * info.sectors - 1; - put_u32be(&scsi_cmdbuf[0], size); - put_u32be(&scsi_cmdbuf[4], info.sectorbytes); + put_u32be(&m_scsi_cmdbuf[0], size); + put_u32be(&m_scsi_cmdbuf[4], info.sectorbytes); scsi_data_in(0, 8); scsi_status_complete(SS_GOOD); @@ -476,8 +476,8 @@ void nscsi_harddisk_device::scsi_command() } case SC_READ_10: - lba = get_u32be(&scsi_cmdbuf[2]); - blocks = get_u16be(&scsi_cmdbuf[7]); + lba = get_u32be(&m_scsi_cmdbuf[2]); + blocks = get_u16be(&m_scsi_cmdbuf[7]); LOG("command READ EXTENDED start=%08x blocks=%04x\n",lba, blocks); @@ -493,8 +493,8 @@ void nscsi_harddisk_device::scsi_command() break; case SC_WRITE_10: - lba = get_u32be(&scsi_cmdbuf[2]); - blocks = get_u16be(&scsi_cmdbuf[7]); + lba = get_u32be(&m_scsi_cmdbuf[2]); + blocks = get_u16be(&m_scsi_cmdbuf[7]); LOG("command WRITE EXTENDED start=%08x blocks=%04x\n", lba, blocks); @@ -511,11 +511,11 @@ void nscsi_harddisk_device::scsi_command() case SC_FORMAT_UNIT: LOG("command FORMAT UNIT:%s%s%s%s%s\n", - (scsi_cmdbuf[1] & 0x80) ? " FMT-PINFO" : "", - (scsi_cmdbuf[1] & 0x40) ? " RTO_REQ" : "", - (scsi_cmdbuf[1] & 0x20) ? " LONG-LIST" : "", - (scsi_cmdbuf[1] & 0x10) ? " FMTDATA" : "", - (scsi_cmdbuf[1] & 0x08) ? " CMPLIST" : ""); + (m_scsi_cmdbuf[1] & 0x80) ? " FMT-PINFO" : "", + (m_scsi_cmdbuf[1] & 0x40) ? " RTO_REQ" : "", + (m_scsi_cmdbuf[1] & 0x20) ? " LONG-LIST" : "", + (m_scsi_cmdbuf[1] & 0x10) ? " FMTDATA" : "", + (m_scsi_cmdbuf[1] & 0x08) ? " CMPLIST" : ""); { const auto &info = image->get_info(); auto block = std::make_unique(info.sectorbytes); @@ -531,25 +531,25 @@ void nscsi_harddisk_device::scsi_command() break; case SC_MODE_SELECT_6: - LOG("command MODE SELECT 6 length %d\n", scsi_cmdbuf[4]); + LOG("command MODE SELECT 6 length %d\n", m_scsi_cmdbuf[4]); // accept mode select parameter data - if(scsi_cmdbuf[4]) - scsi_data_out(2, scsi_cmdbuf[4]); + if(m_scsi_cmdbuf[4]) + scsi_data_out(2, m_scsi_cmdbuf[4]); scsi_status_complete(SS_GOOD); break; case SC_VERIFY_10: - LOG("command VERIFY BytChk %d\n", !!(scsi_cmdbuf[1] & 0x02)); - if (!(scsi_cmdbuf[1] & 0x02)) + LOG("command VERIFY BytChk %d\n", !!(m_scsi_cmdbuf[1] & 0x02)); + if (!(m_scsi_cmdbuf[1] & 0x02)) scsi_status_complete(SS_GOOD); else scsi_unknown_command(); break; default: - LOGMASKED(LOG_UNSUPPORTED, "command %02x ***UNKNOWN***\n", scsi_cmdbuf[0]); + LOGMASKED(LOG_UNSUPPORTED, "command %02x ***UNKNOWN***\n", m_scsi_cmdbuf[0]); // Parent may handle this nscsi_full_device::scsi_command(); break; diff --git a/src/devices/bus/nscsi/pc8801_30.cpp b/src/devices/bus/nscsi/pc8801_30.cpp index cea4c101687..2c9896b7624 100644 --- a/src/devices/bus/nscsi/pc8801_30.cpp +++ b/src/devices/bus/nscsi/pc8801_30.cpp @@ -95,7 +95,7 @@ bool nscsi_cdrom_pc8801_30_device::scsi_command_done(u8 command, u8 length) void nscsi_cdrom_pc8801_30_device::nec_set_audio_start_position() { u32 frame = 0; - const u8 mode = scsi_cmdbuf[9] & 0xc0; + const u8 mode = m_scsi_cmdbuf[9] & 0xc0; LOGCMD("0xd8 SET AUDIO PLAYBACK START POSITION (NEC): mode %02x\n", mode); if (!image->exists()) @@ -110,13 +110,13 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_start_position() { case 0x00: popmessage("CD-DA set start mode 0x00"); - frame = (scsi_cmdbuf[3] << 16) | (scsi_cmdbuf[4] << 8) | scsi_cmdbuf[5]; + frame = (m_scsi_cmdbuf[3] << 16) | (m_scsi_cmdbuf[4] << 8) | m_scsi_cmdbuf[5]; break; case 0x40: { - const u8 m = bcd_2_dec(scsi_cmdbuf[2]); - const u8 s = bcd_2_dec(scsi_cmdbuf[3]); - const u8 f = bcd_2_dec(scsi_cmdbuf[4]); + const u8 m = bcd_2_dec(m_scsi_cmdbuf[2]); + const u8 s = bcd_2_dec(m_scsi_cmdbuf[3]); + const u8 f = bcd_2_dec(m_scsi_cmdbuf[4]); frame = f + 75 * (s + m * 60); const u32 pregap = toc.tracks[image->get_track(frame)].pregap; @@ -131,7 +131,7 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_start_position() } case 0x80: { - const u8 track_number = bcd_2_dec(scsi_cmdbuf[2]); + const u8 track_number = bcd_2_dec(m_scsi_cmdbuf[2]); const u32 pregap = toc.tracks[image->get_track(track_number - 1)].pregap; LOGCMD("TRACK=%d (pregap = %d)\n", track_number, pregap); frame = toc.tracks[ track_number - 1 ].logframeofs; @@ -155,7 +155,7 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_start_position() m_cdda_status = PCE_CD_CDDA_PAUSED; - const u8 play_mode = scsi_cmdbuf[1] & 0x03; + const u8 play_mode = m_scsi_cmdbuf[1] & 0x03; LOGCMD("Play mode = %d\n", play_mode); if (play_mode) { @@ -211,7 +211,7 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_start_position() void nscsi_cdrom_pc8801_30_device::nec_set_audio_stop_position() { u32 frame = 0; - const u8 mode = scsi_cmdbuf[9] & 0xc0; + const u8 mode = m_scsi_cmdbuf[9] & 0xc0; LOGCMD("0xd9 SET AUDIO PLAYBACK END POSITION (NEC): mode %02x\n", mode); if (!image->exists()) @@ -227,13 +227,13 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_stop_position() case 0x00: // tadaima popmessage("CD-DA set end mode 0x00"); - frame = (scsi_cmdbuf[3] << 16) | (scsi_cmdbuf[4] << 8) | scsi_cmdbuf[5]; + frame = (m_scsi_cmdbuf[3] << 16) | (m_scsi_cmdbuf[4] << 8) | m_scsi_cmdbuf[5]; break; case 0x40: { - const u8 m = bcd_2_dec(scsi_cmdbuf[2]); - const u8 s = bcd_2_dec(scsi_cmdbuf[3]); - const u8 f = bcd_2_dec(scsi_cmdbuf[4]); + const u8 m = bcd_2_dec(m_scsi_cmdbuf[2]); + const u8 s = bcd_2_dec(m_scsi_cmdbuf[3]); + const u8 f = bcd_2_dec(m_scsi_cmdbuf[4]); const u32 pregap = toc.tracks[image->get_track(frame)].pregap; frame = f + 75 * (s + m * 60); @@ -243,7 +243,7 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_stop_position() } case 0x80: { - const u8 track_number = bcd_2_dec(scsi_cmdbuf[2]); + const u8 track_number = bcd_2_dec(m_scsi_cmdbuf[2]); const u32 pregap = toc.tracks[image->get_track(track_number - 1)].pregap; // NB: crazyhos uses this command with track = 1 on pre-title screen intro. // It's not supposed to playback anything according to real HW refs. @@ -251,7 +251,7 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_stop_position() LOGCMD("TRACK=%d (raw %02x pregap = %d frame = %d)\n" , track_number - , scsi_cmdbuf[2] + , m_scsi_cmdbuf[2] , pregap , frame ); @@ -265,7 +265,7 @@ void nscsi_cdrom_pc8801_30_device::nec_set_audio_stop_position() } m_end_frame = frame; - m_cdda_play_mode = scsi_cmdbuf[1] & 0x03; + m_cdda_play_mode = m_scsi_cmdbuf[1] & 0x03; LOGCMD("Play mode = %d\n", m_cdda_play_mode); if (m_cdda_play_mode) @@ -342,13 +342,13 @@ void nscsi_cdrom_pc8801_30_device::nec_get_subq() switch (m_cdda_status) { case PCE_CD_CDDA_PAUSED: - scsi_cmdbuf[0] = 2; + m_scsi_cmdbuf[0] = 2; break; case PCE_CD_CDDA_PLAYING: - scsi_cmdbuf[0] = 0; + m_scsi_cmdbuf[0] = 0; break; default: - scsi_cmdbuf[0] = 3; + m_scsi_cmdbuf[0] = 3; break; } @@ -356,27 +356,27 @@ void nscsi_cdrom_pc8801_30_device::nec_get_subq() track = image->get_track(frame); msf_rel = cdrom_file::lba_to_msf_alt(frame - image->get_track_start(track)); - scsi_cmdbuf[1] = 0x01 | ((image->get_track_type(track+1) == cdrom_file::CD_TRACK_AUDIO) ? 0x00 : 0x40); + m_scsi_cmdbuf[1] = 0x01 | ((image->get_track_type(track+1) == cdrom_file::CD_TRACK_AUDIO) ? 0x00 : 0x40); // track - scsi_cmdbuf[2] = dec_2_bcd(track+1); + m_scsi_cmdbuf[2] = dec_2_bcd(track+1); // index - scsi_cmdbuf[3] = std::max(image->get_track_index(frame), 1U); + m_scsi_cmdbuf[3] = std::max(image->get_track_index(frame), 1U); // MSF (relative) - scsi_cmdbuf[4] = dec_2_bcd((msf_rel >> 16) & 0xFF); - scsi_cmdbuf[5] = dec_2_bcd((msf_rel >> 8) & 0xFF); - scsi_cmdbuf[6] = dec_2_bcd(msf_rel & 0xFF); + m_scsi_cmdbuf[4] = dec_2_bcd((msf_rel >> 16) & 0xFF); + m_scsi_cmdbuf[5] = dec_2_bcd((msf_rel >> 8) & 0xFF); + m_scsi_cmdbuf[6] = dec_2_bcd(msf_rel & 0xFF); // MSF (absolute) - scsi_cmdbuf[7] = dec_2_bcd((msf_abs >> 16) & 0xFF); - scsi_cmdbuf[8] = dec_2_bcd((msf_abs >> 8) & 0xFF); - scsi_cmdbuf[9] = dec_2_bcd(msf_abs & 0xFF); + m_scsi_cmdbuf[7] = dec_2_bcd((msf_abs >> 16) & 0xFF); + m_scsi_cmdbuf[8] = dec_2_bcd((msf_abs >> 8) & 0xFF); + m_scsi_cmdbuf[9] = dec_2_bcd(msf_abs & 0xFF); if(LIVE_SUBQ_VIEW) { const std::vector status_types = {"standby", "play", "pause"}; popmessage("SUBQ - status %s type %02x|track %d index %d| MSF rel %06x MSF abs %06x\n" , status_types[m_cdda_status] - , scsi_cmdbuf[1] + , m_scsi_cmdbuf[1] , track + 1 - , scsi_cmdbuf[3] + , m_scsi_cmdbuf[3] , msf_rel , msf_abs ); @@ -401,14 +401,14 @@ void nscsi_cdrom_pc8801_30_device::nec_get_dir_info() const cdrom_file::toc &toc = image->get_toc(); // NOTE: PC8801-30 CD player wants 4 bytes back vs. PC Engine - switch(scsi_cmdbuf[1]) + switch(m_scsi_cmdbuf[1]) { case 0x00: - scsi_cmdbuf[0] = dec_2_bcd(1); - scsi_cmdbuf[1] = dec_2_bcd(toc.numtrks); - scsi_cmdbuf[2] = 0; - scsi_cmdbuf[3] = 0; - LOGCMD("Get first and last track numbers => 1-%02x\n", scsi_cmdbuf[1]); + m_scsi_cmdbuf[0] = dec_2_bcd(1); + m_scsi_cmdbuf[1] = dec_2_bcd(toc.numtrks); + m_scsi_cmdbuf[2] = 0; + m_scsi_cmdbuf[3] = 0; + LOGCMD("Get first and last track numbers => 1-%02x\n", m_scsi_cmdbuf[1]); scsi_data_in(SBUF_MAIN, 4); scsi_status_complete(SS_GOOD); @@ -420,11 +420,11 @@ void nscsi_cdrom_pc8801_30_device::nec_get_dir_info() msf = to_msf(frame); LOGCMD("Get total disk size in MSF format => %06x\n", msf); - //scsi_cmdbuf[0] = image->get_adr_control(image->get_last_track()); - scsi_cmdbuf[0] = dec_2_bcd(BIT(msf, 16, 8)); // minutes - scsi_cmdbuf[1] = dec_2_bcd(BIT(msf, 8, 8)); // seconds - scsi_cmdbuf[2] = dec_2_bcd(BIT(msf, 0, 8)); // frames - scsi_cmdbuf[3] = 0; + //m_scsi_cmdbuf[0] = image->get_adr_control(image->get_last_track()); + m_scsi_cmdbuf[0] = dec_2_bcd(BIT(msf, 16, 8)); // minutes + m_scsi_cmdbuf[1] = dec_2_bcd(BIT(msf, 8, 8)); // seconds + m_scsi_cmdbuf[2] = dec_2_bcd(BIT(msf, 0, 8)); // frames + m_scsi_cmdbuf[3] = 0; scsi_data_in(SBUF_MAIN, 4); scsi_status_complete(SS_GOOD); @@ -434,7 +434,7 @@ void nscsi_cdrom_pc8801_30_device::nec_get_dir_info() { u32 frame; u8 track_type; - if (scsi_cmdbuf[2] == 0xaa) + if (m_scsi_cmdbuf[2] == 0xaa) { frame = toc.tracks[toc.numtrks-1].logframeofs; frame += toc.tracks[toc.numtrks-1].frames; @@ -444,7 +444,7 @@ void nscsi_cdrom_pc8801_30_device::nec_get_dir_info() } else { - track = std::max(bcd_2_dec(scsi_cmdbuf[2]), 1U); + track = std::max(bcd_2_dec(m_scsi_cmdbuf[2]), 1U); frame = toc.tracks[track-1].logframeofs; track_type = toc.tracks[track-1].trktype == cdrom_file::CD_TRACK_AUDIO ? 0x00 : 0x04; @@ -453,10 +453,10 @@ void nscsi_cdrom_pc8801_30_device::nec_get_dir_info() msf = to_msf(frame + 150); - scsi_cmdbuf[0] = dec_2_bcd(BIT(msf, 16, 8)); // minutes - scsi_cmdbuf[1] = dec_2_bcd(BIT(msf, 8, 8)); // seconds - scsi_cmdbuf[2] = dec_2_bcd(BIT(msf, 0, 8)); // frames - scsi_cmdbuf[3] = track_type; + m_scsi_cmdbuf[0] = dec_2_bcd(BIT(msf, 16, 8)); // minutes + m_scsi_cmdbuf[1] = dec_2_bcd(BIT(msf, 8, 8)); // seconds + m_scsi_cmdbuf[2] = dec_2_bcd(BIT(msf, 0, 8)); // frames + m_scsi_cmdbuf[3] = track_type; scsi_data_in(SBUF_MAIN, 4); scsi_status_complete(SS_GOOD); @@ -464,25 +464,25 @@ void nscsi_cdrom_pc8801_30_device::nec_get_dir_info() break; } default: - popmessage("nec_get_dir_info: unknown subcommand %02x", scsi_cmdbuf[1]); + popmessage("nec_get_dir_info: unknown subcommand %02x", m_scsi_cmdbuf[1]); break; } } void nscsi_cdrom_pc8801_30_device::scsi_command() { - switch (scsi_cmdbuf[0]) + switch (m_scsi_cmdbuf[0]) { case SC_READ_6: nscsi_cdrom_device::scsi_command(); - LOGCMD("SC_READ_6: lba: %02x%02x%02x blocks: %02x\n", scsi_cmdbuf[1], scsi_cmdbuf[2], scsi_cmdbuf[3], scsi_cmdbuf[4]); + LOGCMD("SC_READ_6: lba: %02x%02x%02x blocks: %02x\n", m_scsi_cmdbuf[1], m_scsi_cmdbuf[2], m_scsi_cmdbuf[3], m_scsi_cmdbuf[4]); break; case SC_MODE_SELECT_6: - LOG("command MODE SELECT 6 length %d\n", scsi_cmdbuf[4]); + LOG("command MODE SELECT 6 length %d\n", m_scsi_cmdbuf[4]); // accept mode select parameter data // wants 11 bytes compared to regular cd.h - scsi_cmdbuf[4] += 1; + m_scsi_cmdbuf[4] += 1; nscsi_cdrom_device::scsi_command(); break; @@ -494,8 +494,8 @@ void nscsi_cdrom_pc8801_30_device::scsi_command() default: // TODO: purge commands that don't exist on this implementation - if (scsi_cmdbuf[0] != SC_TEST_UNIT_READY && scsi_cmdbuf[0] != SC_REQUEST_SENSE) - popmessage("PC8801-30: potentially unavailable %02x command trigger", scsi_cmdbuf[0]); + if (m_scsi_cmdbuf[0] != SC_TEST_UNIT_READY && m_scsi_cmdbuf[0] != SC_REQUEST_SENSE) + popmessage("PC8801-30: potentially unavailable %02x command trigger", m_scsi_cmdbuf[0]); nscsi_cdrom_device::scsi_command(); break; diff --git a/src/devices/bus/nscsi/pc98_hd.cpp b/src/devices/bus/nscsi/pc98_hd.cpp index 8481972b09a..264c2000af1 100644 --- a/src/devices/bus/nscsi/pc98_hd.cpp +++ b/src/devices/bus/nscsi/pc98_hd.cpp @@ -24,64 +24,64 @@ nscsi_pc98_hd_device::nscsi_pc98_hd_device(const machine_config &mconfig, const void nscsi_pc98_hd_device::scsi_command() { - if(scsi_cmdbuf[0] != SC_READ_6) { + if(m_scsi_cmdbuf[0] != SC_READ_6) { LOGMASKED(LOG_COMMAND, "%02x %02x %02x %02x %02x %02x\n", - scsi_cmdbuf[0], scsi_cmdbuf[1], scsi_cmdbuf[2], - scsi_cmdbuf[3], scsi_cmdbuf[4], scsi_cmdbuf[5]); + m_scsi_cmdbuf[0], m_scsi_cmdbuf[1], m_scsi_cmdbuf[2], + m_scsi_cmdbuf[3], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); } - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_INQUIRY: { - int lun = get_lun(scsi_cmdbuf[1] >> 5); + int lun = get_lun(m_scsi_cmdbuf[1] >> 5); LOG("command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n", - lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]); + lun, m_scsi_cmdbuf[1] & 1, m_scsi_cmdbuf[2], m_scsi_cmdbuf[4], m_scsi_cmdbuf[5]); - int page = scsi_cmdbuf[2]; - int size = scsi_cmdbuf[4]; + int page = m_scsi_cmdbuf[2]; + int size = m_scsi_cmdbuf[4]; switch(page) { case 0: - std::fill_n(scsi_cmdbuf, 148, 0); + std::fill_n(m_scsi_cmdbuf, 148, 0); // vendor and product information must be padded with spaces - std::fill_n(&scsi_cmdbuf[8], 28, 0x20); + std::fill_n(&m_scsi_cmdbuf[8], 28, 0x20); if (lun != 0) - scsi_cmdbuf[0] = 0x7f; + m_scsi_cmdbuf[0] = 0x7f; else - scsi_cmdbuf[0] = 0x00; // device is direct-access (e.g. hard disk) - scsi_cmdbuf[1] = 0x00; // media is not removable - scsi_cmdbuf[2] = 0x05; // device complies with SPC-3 standard - scsi_cmdbuf[3] = 0x01; // response data format = CCS - scsi_cmdbuf[4] = 52; // additional length + m_scsi_cmdbuf[0] = 0x00; // device is direct-access (e.g. hard disk) + m_scsi_cmdbuf[1] = 0x00; // media is not removable + m_scsi_cmdbuf[2] = 0x05; // device complies with SPC-3 standard + m_scsi_cmdbuf[3] = 0x01; // response data format = CCS + m_scsi_cmdbuf[4] = 52; // additional length if(m_inquiry_data.empty()) { LOG("IDNT tag not found in chd metadata, using default inquiry data\n"); // from np2kai, pc9801_55 wants to see "NEC" as part of their protection scheme - strcpy((char *)&scsi_cmdbuf[8], "NECITSU "); + strcpy((char *)&m_scsi_cmdbuf[8], "NECITSU "); // TODO: copied over base HD, to be filled properly - strcpy((char *)&scsi_cmdbuf[16], " ST225N"); - strcpy((char *)&scsi_cmdbuf[32], "1.00"); - scsi_cmdbuf[36] = 0x00; // # of extents high - scsi_cmdbuf[37] = 0x08; // # of extents low - scsi_cmdbuf[38] = 0x00; // group 0 commands 0-1f - scsi_cmdbuf[39] = 0x99; // commands 0,3,4,7 - scsi_cmdbuf[40] = 0xa0; // commands 8, a - scsi_cmdbuf[41] = 0x27; // commands 12,15,16,17 - scsi_cmdbuf[42] = 0x34; // commands 1a,1b,1d - scsi_cmdbuf[43] = 0x01; // group 1 commands 20-3f - scsi_cmdbuf[44] = 0x04; - scsi_cmdbuf[45] = 0xa0; - scsi_cmdbuf[46] = 0x01; - scsi_cmdbuf[47] = 0x18; - scsi_cmdbuf[48] = 0x07; // group 7 commands e0-ff - scsi_cmdbuf[49] = 0x00; - scsi_cmdbuf[50] = 0xa0; // commands 8, a - scsi_cmdbuf[51] = 0x00; - scsi_cmdbuf[52] = 0x00; - scsi_cmdbuf[53] = 0xff; // end of list + strcpy((char *)&m_scsi_cmdbuf[16], " ST225N"); + strcpy((char *)&m_scsi_cmdbuf[32], "1.00"); + m_scsi_cmdbuf[36] = 0x00; // # of extents high + m_scsi_cmdbuf[37] = 0x08; // # of extents low + m_scsi_cmdbuf[38] = 0x00; // group 0 commands 0-1f + m_scsi_cmdbuf[39] = 0x99; // commands 0,3,4,7 + m_scsi_cmdbuf[40] = 0xa0; // commands 8, a + m_scsi_cmdbuf[41] = 0x27; // commands 12,15,16,17 + m_scsi_cmdbuf[42] = 0x34; // commands 1a,1b,1d + m_scsi_cmdbuf[43] = 0x01; // group 1 commands 20-3f + m_scsi_cmdbuf[44] = 0x04; + m_scsi_cmdbuf[45] = 0xa0; + m_scsi_cmdbuf[46] = 0x01; + m_scsi_cmdbuf[47] = 0x18; + m_scsi_cmdbuf[48] = 0x07; // group 7 commands e0-ff + m_scsi_cmdbuf[49] = 0x00; + m_scsi_cmdbuf[50] = 0xa0; // commands 8, a + m_scsi_cmdbuf[51] = 0x00; + m_scsi_cmdbuf[52] = 0x00; + m_scsi_cmdbuf[53] = 0xff; // end of list } else - std::copy_n(m_inquiry_data.begin(), std::min(m_inquiry_data.size(), size_t(48)), &scsi_cmdbuf[8]); + std::copy_n(m_inquiry_data.begin(), std::min(m_inquiry_data.size(), size_t(48)), &m_scsi_cmdbuf[8]); if(size > 56) size = 56; diff --git a/src/devices/bus/nscsi/s1410.cpp b/src/devices/bus/nscsi/s1410.cpp index 3e0eb688dae..e6aceafa84b 100644 --- a/src/devices/bus/nscsi/s1410.cpp +++ b/src/devices/bus/nscsi/s1410.cpp @@ -53,17 +53,17 @@ bool nscsi_s1410_device::scsi_command_done(uint8_t command, uint8_t length) void nscsi_s1410_device::scsi_command() { - memset(scsi_sense_buffer, 0, sizeof(scsi_sense_buffer)); + memset(m_scsi_sense_buffer, 0, sizeof(m_scsi_sense_buffer)); - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_TEST_UNIT_READY: case SC_REZERO_UNIT: case SC_REASSIGN_BLOCKS: case SC_READ: case SC_WRITE: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; } else { nscsi_harddisk_device::scsi_command(); } @@ -73,12 +73,12 @@ void nscsi_s1410_device::scsi_command() { const auto &info = image->get_info(); int max_lba = (info.cylinders * info.heads * info.sectors) - 1; - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; if (lba <= max_lba) { scsi_status_complete(SS_GOOD); } else { scsi_status_complete(SS_SEEK_ERROR); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; } } break; @@ -94,7 +94,7 @@ void nscsi_s1410_device::scsi_command() const auto &info = image->get_info(); auto block = std::make_unique(info.sectorbytes); memset(&block[0], 0x6c, info.sectorbytes); - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; for(; lba < (info.cylinders * info.heads * info.sectors); lba++) { image->write(lba, block.get()); } @@ -103,13 +103,13 @@ void nscsi_s1410_device::scsi_command() break; case SC_FORMAT_TRACK: { - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; return; } - lba = get_u24be(&scsi_cmdbuf[1]) & 0x1fffff; + lba = get_u24be(&m_scsi_cmdbuf[1]) & 0x1fffff; blocks = (bytes_per_sector == 256) ? 32 : 17; int track_length = blocks*bytes_per_sector; @@ -119,7 +119,7 @@ void nscsi_s1410_device::scsi_command() if(!image->write(lba, &block[0])) { logerror("%s: HD WRITE ERROR !\n", tag()); scsi_status_complete(SS_FORMAT_ERROR); - scsi_sense_buffer[0] = SK_FORMAT_ERROR; + m_scsi_sense_buffer[0] = SK_FORMAT_ERROR; } else { scsi_status_complete(SS_GOOD); } @@ -127,9 +127,9 @@ void nscsi_s1410_device::scsi_command() break; case SC_FORMAT_ALT_TRACK: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; return; } @@ -153,9 +153,9 @@ void nscsi_s1410_device::scsi_command() break; case SC_CHECK_TRACK_FORMAT: - if (scsi_cmdbuf[1] >> 5) { + if (m_scsi_cmdbuf[1] >> 5) { scsi_status_complete(SS_NOT_READY); - scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; + m_scsi_sense_buffer[0] = SK_DRIVE_NOT_READY; return; } scsi_status_complete(SS_GOOD); @@ -171,14 +171,14 @@ void nscsi_s1410_device::scsi_command() break; default: - logerror("%s: command %02x ***UNKNOWN***\n", tag(), scsi_cmdbuf[0]); + logerror("%s: command %02x ***UNKNOWN***\n", tag(), m_scsi_cmdbuf[0]); break; } } uint8_t nscsi_s1410_device::scsi_get_data(int id, int pos) { - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_READ_SECTOR_BUFFER: return block[pos]; @@ -193,7 +193,7 @@ void nscsi_s1410_device::scsi_put_data(int id, int pos, uint8_t data) return nscsi_harddisk_device::scsi_put_data(id, pos, data); } - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_FORMAT_ALT_TRACK: LOGMASKED(LOG_DATA, "s1410: scsi_put_data, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); break; @@ -222,7 +222,7 @@ attotime nscsi_s1410_device::scsi_data_byte_period() // Command execution delay attotime nscsi_s1410_device::scsi_data_command_delay() { - switch(scsi_cmdbuf[0]) { + switch(m_scsi_cmdbuf[0]) { case SC_READ: case SC_WRITE: case SC_SEEK: diff --git a/src/devices/bus/nscsi/tape.cpp b/src/devices/bus/nscsi/tape.cpp index 860b73ab8b7..52e28d68990 100644 --- a/src/devices/bus/nscsi/tape.cpp +++ b/src/devices/bus/nscsi/tape.cpp @@ -112,8 +112,8 @@ void nscsi_tape_device::device_reset() void nscsi_tape_device::scsi_command() { - const u8 cmd = scsi_cmdbuf[0]; - const u8 lun = get_lun(scsi_cmdbuf[1] >> 5); // LUN may be overridden by IDENTIFY, per SCSI-2 section 7.2.2 + const u8 cmd = m_scsi_cmdbuf[0]; + const u8 lun = get_lun(m_scsi_cmdbuf[1] >> 5); // LUN may be overridden by IDENTIFY, per SCSI-2 section 7.2.2 switch (cmd) { // these commands must be handled here, before tape changing logic case SC_INQUIRY: return handle_inquiry(lun); case SC_REQUEST_SENSE: return handle_request_sense(lun); @@ -234,28 +234,28 @@ void nscsi_tape_device::scsi_put_data(int id, int pos, u8 data) void nscsi_tape_device::handle_inquiry(const u8 lun) // mandatory; SCSI-2 section 8.2.5 { - const bool vpd_enable = scsi_cmdbuf[1] & 0x01; // should we respond with vital product data - const u8 page_code = scsi_cmdbuf[2]; - const u8 alloc_len = scsi_cmdbuf[4]; // allocation length + const bool vpd_enable = m_scsi_cmdbuf[1] & 0x01; // should we respond with vital product data + const u8 page_code = m_scsi_cmdbuf[2]; + const u8 alloc_len = m_scsi_cmdbuf[4]; // allocation length LOG("command INQUIRY lun=%d vpd_enable=%d page_code=0x%02x alloc_len=%d\n", lun, vpd_enable, page_code, alloc_len); - if ((scsi_cmdbuf[1] & 0x1e) || scsi_cmdbuf[3]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1e) || m_scsi_cmdbuf[3]) // error: reserved bits set return report_bad_cdb_field(); if (vpd_enable || page_code) // error: we don't support vital product data or pages other than 0 return report_bad_cdb_field(); - clear_response(scsi_cmdbuf, 36); - scsi_cmdbuf[0] = (lun == 0) ? 0x01 : 0x7f; // we support tape device on LUN 0 only, per 7.5.3(a) - scsi_cmdbuf[1] = 0x80; // we support removing tape - scsi_cmdbuf[2] = 0x02; // we're compliant with SCSI-2 only - scsi_cmdbuf[3] = 0x02; // we use SCSI-2 response format - scsi_cmdbuf[4] = 32; // additional length - strncpy((char *)&scsi_cmdbuf[8], "MAME", 8); // vendor - strncpy((char *)&scsi_cmdbuf[16], "SCSI tape drive", 16); // product - strncpy((char *)&scsi_cmdbuf[32], "1.0", 4); // revision + clear_response(m_scsi_cmdbuf, 36); + m_scsi_cmdbuf[0] = (lun == 0) ? 0x01 : 0x7f; // we support tape device on LUN 0 only, per 7.5.3(a) + m_scsi_cmdbuf[1] = 0x80; // we support removing tape + m_scsi_cmdbuf[2] = 0x02; // we're compliant with SCSI-2 only + m_scsi_cmdbuf[3] = 0x02; // we use SCSI-2 response format + m_scsi_cmdbuf[4] = 32; // additional length + strncpy((char *)&m_scsi_cmdbuf[8], "MAME", 8); // vendor + strncpy((char *)&m_scsi_cmdbuf[16], "SCSI tape drive", 16); // product + strncpy((char *)&m_scsi_cmdbuf[32], "1.0", 4); // revision for (u32 i = 8; i < 36; i++) { - if (scsi_cmdbuf[i] == 0) - scsi_cmdbuf[i] = ' '; // pad strings with spaces + if (m_scsi_cmdbuf[i] == 0) + m_scsi_cmdbuf[i] = ' '; // pad strings with spaces } scsi_data_in(SBUF_MAIN, std::min(36, (const int)alloc_len)); scsi_status_complete(SS_GOOD); @@ -263,11 +263,11 @@ void nscsi_tape_device::handle_inquiry(const u8 lun) // mandatory; SCSI-2 sectio void nscsi_tape_device::handle_mode_select_6() // mandatory; SCSI-2 sections 8.2.8, 8.3.3, 10.3.3 { - const bool page_format = scsi_cmdbuf[1] & 0x10; // ignored; we always treat pages according to SCSI-2 - const bool save_pages = scsi_cmdbuf[1] & 0x01; - const u8 pl_len = scsi_cmdbuf[4]; // parameter list length + const bool page_format = m_scsi_cmdbuf[1] & 0x10; // ignored; we always treat pages according to SCSI-2 + const bool save_pages = m_scsi_cmdbuf[1] & 0x01; + const u8 pl_len = m_scsi_cmdbuf[4]; // parameter list length LOG("command MODE SELECT(6) page_format=%d save_pages=%d pl_len=%d\n", page_format, save_pages, pl_len); - if ((scsi_cmdbuf[1] & 0x0e) || scsi_cmdbuf[2] || scsi_cmdbuf[3]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x0e) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3]) // error: reserved bits set return report_bad_cdb_field(); if (save_pages) // error: we don't support saving pages @@ -363,11 +363,11 @@ void nscsi_tape_device::continue_handling_mode_select_6() void nscsi_tape_device::handle_mode_sense_6() // mandatory; SCSI-2 sections 8.2.10, 8.3.3, 10.3.3 { - const bool bd_disable = scsi_cmdbuf[1] & 0x80; // should we not respond with block descriptor - const u8 page_control = scsi_cmdbuf[2] >> 6; - const u8 page_code = scsi_cmdbuf[2] & 0x3f; + const bool bd_disable = m_scsi_cmdbuf[1] & 0x80; // should we not respond with block descriptor + const u8 page_control = m_scsi_cmdbuf[2] >> 6; + const u8 page_code = m_scsi_cmdbuf[2] & 0x3f; LOG("command MODE SENSE(6) bd_disable=%d page_control=0x%02x page_code=0x%02x\n", bd_disable, page_control, page_code); - if ((scsi_cmdbuf[1] & 0x17) || scsi_cmdbuf[3]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x17) || m_scsi_cmdbuf[3]) // error: reserved bits set return report_bad_cdb_field(); if (page_code && page_code != SPC_RETURN_ALL_MODE_PAGES) // error: we don't support pages other than 0 @@ -378,13 +378,13 @@ void nscsi_tape_device::handle_mode_sense_6() // mandatory; SCSI-2 sections 8.2. return report_no_saving_params(); const u8 resp_len = bd_disable ? 4 : 12; // response length - clear_response(scsi_cmdbuf, resp_len); - scsi_cmdbuf[0] = resp_len - 1; // mode data length does not include itself, per SCSI-2 section 8.3.3 - scsi_cmdbuf[2] = (m_has_tape && m_image->get_file()->is_read_only()) ? 0x80 : 0; // device-specific parameter - scsi_cmdbuf[3] = bd_disable ? 0 : 8; // block descriptor length + clear_response(m_scsi_cmdbuf, resp_len); + m_scsi_cmdbuf[0] = resp_len - 1; // mode data length does not include itself, per SCSI-2 section 8.3.3 + m_scsi_cmdbuf[2] = (m_has_tape && m_image->get_file()->is_read_only()) ? 0x80 : 0; // device-specific parameter + m_scsi_cmdbuf[3] = bd_disable ? 0 : 8; // block descriptor length if (!bd_disable) { // respond with block descriptor - scsi_cmdbuf[4] = m_has_tape ? m_image->get_file()->get_density_code() : 0; // density code - put_u24be(&scsi_cmdbuf[9], m_fixed_block_len); // block length + m_scsi_cmdbuf[4] = m_has_tape ? m_image->get_file()->get_density_code() : 0; // density code + put_u24be(&m_scsi_cmdbuf[9], m_fixed_block_len); // block length } scsi_data_in(SBUF_MAIN, resp_len); scsi_status_complete(SS_GOOD); @@ -392,13 +392,13 @@ void nscsi_tape_device::handle_mode_sense_6() // mandatory; SCSI-2 sections 8.2. void nscsi_tape_device::handle_send_diagnostic() // mandatory; SCSI-2 section 8.2.15 { - const bool page_format = scsi_cmdbuf[1] & 0x10; - const bool self_test = scsi_cmdbuf[1] & 0x04; - const bool device_offline = scsi_cmdbuf[1] & 0x02; - const bool unit_offline = scsi_cmdbuf[1] & 0x01; - const u16 pl_len = get_u16be(&scsi_cmdbuf[3]); // parameter list length + const bool page_format = m_scsi_cmdbuf[1] & 0x10; + const bool self_test = m_scsi_cmdbuf[1] & 0x04; + const bool device_offline = m_scsi_cmdbuf[1] & 0x02; + const bool unit_offline = m_scsi_cmdbuf[1] & 0x01; + const u16 pl_len = get_u16be(&m_scsi_cmdbuf[3]); // parameter list length LOG("command SEND DIAGNOSTIC page_format=%d self_test=%d device_offline=%d unit_offline=%d pl_len=%d\n", page_format, self_test, device_offline, unit_offline, pl_len); - if ((scsi_cmdbuf[1] & 0x08) || scsi_cmdbuf[2]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x08) || m_scsi_cmdbuf[2]) // error: reserved bits set return report_bad_cdb_field(); if (pl_len) // error: we don't support any parameters @@ -410,7 +410,7 @@ void nscsi_tape_device::handle_send_diagnostic() // mandatory; SCSI-2 section 8. void nscsi_tape_device::handle_test_unit_ready() // mandatory; SCSI-2 section 8.2.16 { LOG("command TEST UNIT READY\n"); - if ((scsi_cmdbuf[1] & 0x1f) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1f) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4]) // error: reserved bits set return report_bad_cdb_field(); if (!m_has_tape) // error: no tape @@ -421,9 +421,9 @@ void nscsi_tape_device::handle_test_unit_ready() // mandatory; SCSI-2 section 8. void nscsi_tape_device::handle_prevent_allow_medium_removal() // optional; SCSI-2 section 9.2.4 { - const bool prevent = scsi_cmdbuf[4] & 0x01; // should we prevent or allow removing tape + const bool prevent = m_scsi_cmdbuf[4] & 0x01; // should we prevent or allow removing tape LOG("command %s MEDIUM REMOVAL\n", prevent ? "PREVENT" : "ALLOW"); - if ((scsi_cmdbuf[1] & 0x1f) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || (scsi_cmdbuf[4] & 0xfe)) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1f) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || (m_scsi_cmdbuf[4] & 0xfe)) // error: reserved bits set return report_bad_cdb_field(); if (prevent) { @@ -441,10 +441,10 @@ void nscsi_tape_device::handle_prevent_allow_medium_removal() // optional; SCSI- void nscsi_tape_device::handle_erase() // mandatory; SCSI-2 section 10.2.1 { - const bool immed = scsi_cmdbuf[1] & 0x02; // ignored; we don't support buffering - const bool eom = scsi_cmdbuf[1] & 0x01; // should we erase to EOM instead of 1 block; "long" + const bool immed = m_scsi_cmdbuf[1] & 0x02; // ignored; we don't support buffering + const bool eom = m_scsi_cmdbuf[1] & 0x01; // should we erase to EOM instead of 1 block; "long" LOG("command ERASE immed=%d eom=%d\n", immed, eom); - if ((scsi_cmdbuf[1] & 0x1c) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1c) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4]) // error: reserved bits set return report_bad_cdb_field(); if (!m_has_tape) // error: no tape @@ -465,12 +465,12 @@ void nscsi_tape_device::handle_erase() // mandatory; SCSI-2 section 10.2.1 void nscsi_tape_device::handle_load_unload() // optional; SCSI-2 section 10.2.2 { - const bool immed = scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering - const bool eom = scsi_cmdbuf[4] & 0x04; // should we rewind to EOM instead of BOM on unload - const bool retension = scsi_cmdbuf[4] & 0x02; // ignored; we're always tense - const bool load = scsi_cmdbuf[4] & 0x01; // should we load or unload tape + const bool immed = m_scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering + const bool eom = m_scsi_cmdbuf[4] & 0x04; // should we rewind to EOM instead of BOM on unload + const bool retension = m_scsi_cmdbuf[4] & 0x02; // ignored; we're always tense + const bool load = m_scsi_cmdbuf[4] & 0x01; // should we load or unload tape LOG("command %s immed=%d eom=%d retension=%d\n", load ? "LOAD" : "UNLOAD", immed, eom, retension); - if ((scsi_cmdbuf[1] & 0x1e) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || (scsi_cmdbuf[4] & 0xf8)) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1e) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || (m_scsi_cmdbuf[4] & 0xf8)) // error: reserved bits set return report_bad_cdb_field(); if (load && eom) // error: invalid combination of command options @@ -492,13 +492,13 @@ void nscsi_tape_device::handle_load_unload() // optional; SCSI-2 section 10.2.2 void nscsi_tape_device::handle_locate() // optional; SCSI-2 section 10.2.3 { - const bool block_addr_type = scsi_cmdbuf[1] & 0x04; // ignored; we always use logical block addresses - const bool change_partition = scsi_cmdbuf[1] & 0x02; - const bool immed = scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering - const u32 req_block_addr = get_u32be(&scsi_cmdbuf[3]); // requested block address to locate - const u8 partition = scsi_cmdbuf[8]; + const bool block_addr_type = m_scsi_cmdbuf[1] & 0x04; // ignored; we always use logical block addresses + const bool change_partition = m_scsi_cmdbuf[1] & 0x02; + const bool immed = m_scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering + const u32 req_block_addr = get_u32be(&m_scsi_cmdbuf[3]); // requested block address to locate + const u8 partition = m_scsi_cmdbuf[8]; LOG("command LOCATE block_addr_type=%d change_partition=%d immed=%d req_block_addr=%d partition=0x%02x\n", block_addr_type, change_partition, immed, req_block_addr, partition); - if ((scsi_cmdbuf[1] & 0x18) || scsi_cmdbuf[2] || scsi_cmdbuf[7]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x18) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[7]) // error: reserved bits set return report_bad_cdb_field(); if (change_partition) // error: we don't support partitions other than 0 @@ -532,11 +532,11 @@ void nscsi_tape_device::handle_locate() // optional; SCSI-2 section 10.2.3 void nscsi_tape_device::handle_read_6() // mandatory; SCSI-2 section 10.2.4 { - const bool suppress = scsi_cmdbuf[1] & 0x02; // should we suppress indicating incorrect length - const bool fixed = scsi_cmdbuf[1] & 0x01; // should we read many fixed-length blocks instead of 1 variable-length block - const u32 req_items_num = get_u24be(&scsi_cmdbuf[2]); // requested number of blocks or bytes to read; "transfer length" + const bool suppress = m_scsi_cmdbuf[1] & 0x02; // should we suppress indicating incorrect length + const bool fixed = m_scsi_cmdbuf[1] & 0x01; // should we read many fixed-length blocks instead of 1 variable-length block + const u32 req_items_num = get_u24be(&m_scsi_cmdbuf[2]); // requested number of blocks or bytes to read; "transfer length" LOG("command READ(6) suppress=%d fixed=%d req_items_num=%d\n", suppress, fixed, req_items_num); - if (scsi_cmdbuf[1] & 0x1c) // error: reserved bits set + if (m_scsi_cmdbuf[1] & 0x1c) // error: reserved bits set return report_bad_cdb_field(); if (fixed && suppress) // error: invalid combination of command options @@ -621,21 +621,21 @@ void nscsi_tape_device::continue_handling_read_6() void nscsi_tape_device::handle_read_block_limits() // mandatory; SCSI-2 section 10.2.5 { LOG("command READ BLOCK LIMITS\n"); - if ((scsi_cmdbuf[1] & 0x1f) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1f) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4]) // error: reserved bits set return report_bad_cdb_field(); - clear_response(scsi_cmdbuf, 6); - put_u24be(&scsi_cmdbuf[1], 0xffffff); // 16MB; "maximum block length limit" - put_u16be(&scsi_cmdbuf[4], m_fixed_block_len); // "minimum block length limit" + clear_response(m_scsi_cmdbuf, 6); + put_u24be(&m_scsi_cmdbuf[1], 0xffffff); // 16MB; "maximum block length limit" + put_u16be(&m_scsi_cmdbuf[4], m_fixed_block_len); // "minimum block length limit" scsi_data_in(SBUF_MAIN, 6); scsi_status_complete(SS_GOOD); } void nscsi_tape_device::handle_read_position() // optional; SCSI-2 section 10.2.6 { - const bool block_addr_type = scsi_cmdbuf[1] & 0x01; // ignored; we always use logical block addresses + const bool block_addr_type = m_scsi_cmdbuf[1] & 0x01; // ignored; we always use logical block addresses LOG("command READ POSITION block_addr_type=%d\n", block_addr_type); - if ((scsi_cmdbuf[1] & 0x1e) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4] || scsi_cmdbuf[5] || scsi_cmdbuf[6] || scsi_cmdbuf[7] || scsi_cmdbuf[8]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1e) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4] || m_scsi_cmdbuf[5] || m_scsi_cmdbuf[6] || m_scsi_cmdbuf[7] || m_scsi_cmdbuf[8]) // error: reserved bits set return report_bad_cdb_field(); if (!m_has_tape) // error: no tape @@ -675,12 +675,12 @@ void nscsi_tape_device::handle_read_position() // optional; SCSI-2 section 10.2. const bool bpu = status == tape_status::UNKNOWN || status == tape_status::UNKNOWN_EW || status == tape_status::EOM; - clear_response(scsi_cmdbuf, 20); - scsi_cmdbuf[0] = (bom ? 0x80 : 0) // is position at BOM + clear_response(m_scsi_cmdbuf, 20); + m_scsi_cmdbuf[0] = (bom ? 0x80 : 0) // is position at BOM | (eom ? 0x40 : 0) // is position between EW and EOM | (bpu ? 0x04 : 0); // is next block address invalid; "block position unknown" - put_u32be(&scsi_cmdbuf[4], block_addr); // address of next block to be read/written; "first block location" - put_u32be(&scsi_cmdbuf[8], block_addr); // address of last buffered block; we don't support buffering, so we set it to next block address; "last block location" + put_u32be(&m_scsi_cmdbuf[4], block_addr); // address of next block to be read/written; "first block location" + put_u32be(&m_scsi_cmdbuf[8], block_addr); // address of last buffered block; we don't support buffering, so we set it to next block address; "last block location" scsi_data_in(SBUF_MAIN, 20); scsi_status_complete(SS_GOOD); } @@ -692,10 +692,10 @@ void nscsi_tape_device::handle_read_position() // optional; SCSI-2 section 10.2. void nscsi_tape_device::handle_release_unit() // mandatory; SCSI-2 section 10.2.9 { - const bool tpr = scsi_cmdbuf[1] & 0x10; // "third-party release" - const u8 tpdi = (scsi_cmdbuf[1] & 0x0e) >> 1; // "third-party device id" + const bool tpr = m_scsi_cmdbuf[1] & 0x10; // "third-party release" + const u8 tpdi = (m_scsi_cmdbuf[1] & 0x0e) >> 1; // "third-party device id" LOG("command RELEASE UNIT tpr=%d tpdi=%d\n", tpr, tpdi); - if ((scsi_cmdbuf[1] & 0x01) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x01) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4]) // error: reserved bits set return report_bad_cdb_field(); // TODO: release unit, once MAME supports multiple initiators @@ -704,10 +704,10 @@ void nscsi_tape_device::handle_release_unit() // mandatory; SCSI-2 section 10.2. void nscsi_tape_device::handle_reserve_unit() // mandatory; SCSI-2 section 10.2.10 { - const bool tpr = scsi_cmdbuf[1] & 0x10; // "third-party release" - const u8 tpdi = (scsi_cmdbuf[1] & 0x0e) >> 1; // "third-party device id" + const bool tpr = m_scsi_cmdbuf[1] & 0x10; // "third-party release" + const u8 tpdi = (m_scsi_cmdbuf[1] & 0x0e) >> 1; // "third-party device id" LOG("command RESERVE UNIT tpr=%d tpdi=%d\n", tpr, tpdi); - if ((scsi_cmdbuf[1] & 0x01) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x01) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4]) // error: reserved bits set return report_bad_cdb_field(); // TODO: reserve unit, once MAME supports multiple initiators @@ -716,9 +716,9 @@ void nscsi_tape_device::handle_reserve_unit() // mandatory; SCSI-2 section 10.2. void nscsi_tape_device::handle_rewind() // mandatory; SCSI-2 section 10.2.11 { - const bool immed = scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering + const bool immed = m_scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering LOG("command REWIND immed=%d\n", immed); - if ((scsi_cmdbuf[1] & 0x1e) || scsi_cmdbuf[2] || scsi_cmdbuf[3] || scsi_cmdbuf[4]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1e) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3] || m_scsi_cmdbuf[4]) // error: reserved bits set return report_bad_cdb_field(); if (!m_has_tape) // error: no tape @@ -730,10 +730,10 @@ void nscsi_tape_device::handle_rewind() // mandatory; SCSI-2 section 10.2.11 void nscsi_tape_device::handle_space() // mandatory; SCSI-2 section 10.2.12 { - const u8 items_type = scsi_cmdbuf[1] & 0x07; // what type of items should we space over - const u32 req_dir_items_num = get_s24be(&scsi_cmdbuf[2]); // requested direction and number of items to space over; "count" + const u8 items_type = m_scsi_cmdbuf[1] & 0x07; // what type of items should we space over + const u32 req_dir_items_num = get_s24be(&m_scsi_cmdbuf[2]); // requested direction and number of items to space over; "count" LOG("command SPACE items_type=0x%02x req_dir_items_num=%d\n", items_type, req_dir_items_num); - if (scsi_cmdbuf[1] & 0x18) // error: reserved bits set + if (m_scsi_cmdbuf[1] & 0x18) // error: reserved bits set return report_bad_cdb_field(); if (items_type != STC_BLOCKS && items_type != STC_FILEMARKS && items_type != STC_END_OF_DATA) // error: we don't support spacing over setmarks or sequential filemarks @@ -799,10 +799,10 @@ void nscsi_tape_device::handle_space() // mandatory; SCSI-2 section 10.2.12 void nscsi_tape_device::handle_write_6() // mandatory; SCSI-2 section 10.2.14 { - const bool fixed = scsi_cmdbuf[1] & 0x01; // should we write many fixed-length blocks instead of 1 variable-length block - const u32 req_items_num = get_u24be(&scsi_cmdbuf[2]); // requested number of blocks or bytes to write; "transfer length" + const bool fixed = m_scsi_cmdbuf[1] & 0x01; // should we write many fixed-length blocks instead of 1 variable-length block + const u32 req_items_num = get_u24be(&m_scsi_cmdbuf[2]); // requested number of blocks or bytes to write; "transfer length" LOG("command WRITE(6) fixed=%d req_items_num=%d\n", fixed, req_items_num); - if (scsi_cmdbuf[1] & 0x1e) // error: reserved bits set + if (m_scsi_cmdbuf[1] & 0x1e) // error: reserved bits set return report_bad_cdb_field(); if (!m_has_tape) // error: no tape @@ -868,11 +868,11 @@ void nscsi_tape_device::continue_handling_write_6() void nscsi_tape_device::handle_write_filemarks() // mandatory; SCSI-2 section 10.2.15 { - const bool setmarks = scsi_cmdbuf[1] & 0x02; // should we write setmarks instead of filemarks - const bool immed = scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering - const u32 req_marks_num = get_u24be(&scsi_cmdbuf[2]); // requested number of marks to write; "transfer length" + const bool setmarks = m_scsi_cmdbuf[1] & 0x02; // should we write setmarks instead of filemarks + const bool immed = m_scsi_cmdbuf[1] & 0x01; // ignored; we don't support buffering + const u32 req_marks_num = get_u24be(&m_scsi_cmdbuf[2]); // requested number of marks to write; "transfer length" LOG("command WRITE FILEMARKS setmarks=%d immed=%d req_marks_num=%d\n", setmarks, immed, req_marks_num); - if (scsi_cmdbuf[1] & 0x1c) // error: reserved bits set + if (m_scsi_cmdbuf[1] & 0x1c) // error: reserved bits set return report_bad_cdb_field(); if (setmarks) // error: we don't support writing setmarks diff --git a/src/devices/bus/pc98_cbus/pc9801_55.cpp b/src/devices/bus/pc98_cbus/pc9801_55.cpp index 10f752eeb13..8f7f67ab940 100644 --- a/src/devices/bus/pc98_cbus/pc9801_55.cpp +++ b/src/devices/bus/pc98_cbus/pc9801_55.cpp @@ -352,9 +352,9 @@ void pc9801_55_device::internal_map(address_map &map) // --xx xxxx DSW1 INT and SCSI ID map(0x33, 0x33).lr8( NAME([this] (offs_t offset) { - u8 scsi_reset = (m_scsi_bus->ctrl_r() & nscsi_device::S_RST) ? 0x80 : 0; + u8 scsi_reset = (m_scsi_bus->ctrl_r() & nscsi_device_interface::S_RST) ? 0x80 : 0; if (!machine().side_effects_disabled()) - m_scsi_bus->ctrl_w(7, 0, nscsi_device::S_RST); + m_scsi_bus->ctrl_w(7, 0, nscsi_device_interface::S_RST); return (m_dsw1->read() & 0x3f) | scsi_reset; }) ); diff --git a/src/devices/bus/s100/ascsasi.cpp b/src/devices/bus/s100/ascsasi.cpp index 9193913e2e1..b79a1ccff1a 100644 --- a/src/devices/bus/s100/ascsasi.cpp +++ b/src/devices/bus/s100/ascsasi.cpp @@ -119,29 +119,29 @@ void asc_sasi_device::req_w(int state) { // Clear ACK when REQ is negated if (!state) - m_sasi->ctrl_w(7, 0, nscsi_device::S_ACK); + m_sasi->ctrl_w(7, 0, nscsi_device_interface::S_ACK); } void asc_sasi_device::sasi_sel_pulse() { - m_sasi->ctrl_w(7, nscsi_device::S_SEL, nscsi_device::S_SEL); + m_sasi->ctrl_w(7, nscsi_device_interface::S_SEL, nscsi_device_interface::S_SEL); m_sel_off_timer->adjust(s_pulse_width); } void asc_sasi_device::sasi_rst_pulse() { - m_sasi->ctrl_w(7, nscsi_device::S_RST, nscsi_device::S_RST); + m_sasi->ctrl_w(7, nscsi_device_interface::S_RST, nscsi_device_interface::S_RST); m_rst_off_timer->adjust(s_pulse_width); } TIMER_CALLBACK_MEMBER(asc_sasi_device::sel_off) { - m_sasi->ctrl_w(7, 0, nscsi_device::S_SEL); + m_sasi->ctrl_w(7, 0, nscsi_device_interface::S_SEL); } TIMER_CALLBACK_MEMBER(asc_sasi_device::rst_off) { - m_sasi->ctrl_w(7, 0, nscsi_device::S_RST); + m_sasi->ctrl_w(7, 0, nscsi_device_interface::S_RST); } u8 asc_sasi_device::s100_smemr_r(offs_t offset) @@ -162,16 +162,16 @@ u8 asc_sasi_device::s100_sinp_r(offs_t offset) { // 74LS240 buffer (IC7) u32 ctrl = m_sasi->ctrl_r(); - return (ctrl & nscsi_device::S_INP ? 0x01 : 0x00) - | (ctrl & nscsi_device::S_BSY ? 0x04 : 0x00) - | (ctrl & nscsi_device::S_REQ ? 0x10 : 0x00) - | (ctrl & nscsi_device::S_CTL ? 0x80 : 0x00); + return (ctrl & nscsi_device_interface::S_INP ? 0x01 : 0x00) + | (ctrl & nscsi_device_interface::S_BSY ? 0x04 : 0x00) + | (ctrl & nscsi_device_interface::S_REQ ? 0x10 : 0x00) + | (ctrl & nscsi_device_interface::S_CTL ? 0x80 : 0x00); } else { // INDAT: 74LS240 buffer (IC13) - if (!machine().side_effects_disabled() && (m_sasi->ctrl_r() & nscsi_device::S_REQ)) - m_sasi->ctrl_w(7, nscsi_device::S_ACK, nscsi_device::S_ACK); + if (!machine().side_effects_disabled() && (m_sasi->ctrl_r() & nscsi_device_interface::S_REQ)) + m_sasi->ctrl_w(7, nscsi_device_interface::S_ACK, nscsi_device_interface::S_ACK); return m_sasi->data_r(); } } @@ -187,10 +187,10 @@ void asc_sasi_device::s100_sout_w(offs_t offset, u8 data) { case 0: // LATENA: 74LS373 latch (IC8) outputs to 74LS240 buffer (IC9) - if (!machine().side_effects_disabled() && (m_sasi->ctrl_r() & nscsi_device::S_REQ)) - m_sasi->ctrl_w(7, nscsi_device::S_ACK, nscsi_device::S_ACK); + if (!machine().side_effects_disabled() && (m_sasi->ctrl_r() & nscsi_device_interface::S_REQ)) + m_sasi->ctrl_w(7, nscsi_device_interface::S_ACK, nscsi_device_interface::S_ACK); m_data_latch = data; - if (!(m_sasi->ctrl_r() & nscsi_device::S_INP)) + if (!(m_sasi->ctrl_r() & nscsi_device_interface::S_INP)) m_sasi->data_w(7, data); break; diff --git a/src/devices/machine/53c7xx.cpp b/src/devices/machine/53c7xx.cpp index 21fa52528be..f5cd79abf42 100644 --- a/src/devices/machine/53c7xx.cpp +++ b/src/devices/machine/53c7xx.cpp @@ -88,7 +88,8 @@ DEFINE_DEVICE_TYPE(NCR53C7XX, ncr53c7xx_device, "ncr537xx", "NCR 53C7xx SCSI") //------------------------------------------------- ncr53c7xx_device::ncr53c7xx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - nscsi_device(mconfig, NCR53C7XX, tag, owner, clock), + device_t(mconfig, NCR53C7XX, tag, owner, clock), + nscsi_device_interface(mconfig, *this), nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), device_execute_interface(mconfig, *this), m_icount(0), @@ -192,7 +193,7 @@ void ncr53c7xx_device::device_reset() m_finished = false; m_connected = false; - scsi_bus->ctrl_wait(scsi_refid, S_SEL | S_BSY | S_RST, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL | S_BSY | S_RST, S_ALL); set_scripts_state(SCRIPTS_IDLE); set_scsi_state(IDLE); @@ -732,9 +733,9 @@ void ncr53c7xx_device::send_byte() ++m_dnad; --m_dbc; - scsi_bus->data_w(scsi_refid, data); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->data_w(m_scsi_refid, data); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); delay(attotime::from_nsec(5)); } @@ -745,7 +746,7 @@ void ncr53c7xx_device::send_byte() void ncr53c7xx_device::recv_byte() { - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); set_scsi_state( (m_scsi_state & STATE_MASK) | (RECV_WAIT_REQ_1 << SUB_SHIFT) ); step(false); } @@ -768,8 +769,8 @@ TIMER_CALLBACK_MEMBER(ncr53c7xx_device::step_timer) void ncr53c7xx_device::step(bool timeout) { - uint32_t ctrl = scsi_bus->ctrl_r(); - uint32_t data = scsi_bus->data_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); + uint32_t data = m_scsi_bus->data_r(); LOGMASKED(LOG_STATE, "Step: CTRL:%x DATA:%x (%d.%d) Timeout:%d\n", ctrl, data, m_scsi_state & STATE_MASK, m_scsi_state >> SUB_SHIFT, timeout); @@ -825,17 +826,17 @@ void ncr53c7xx_device::step(bool timeout) if ((ctrl & (S_BSY | S_SEL)) == 0) { // Bus is free - assert the controller SCSI ID and BUSY - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); if (((m_scntl[0] >> SCNTL0_ARB_SHIFT) & SCNTL0_ARB_MASK) == 3) { // Full arbitration - scsi_bus->data_w(scsi_refid, m_scid); + m_scsi_bus->data_w(m_scsi_refid, m_scid); } else { // Simple arbitration - scsi_bus->data_w(scsi_refid, m_sodl); + m_scsi_bus->data_w(m_scsi_refid, m_sodl); } set_scsi_state(ARBITRATE_EXAMINE_BUS); @@ -852,8 +853,8 @@ void ncr53c7xx_device::step(bool timeout) if (ctrl & S_SEL) { - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 0); if (((m_scntl[0] >> SCNTL0_ARB_SHIFT) & SCNTL0_ARB_MASK) == 3) { @@ -884,8 +885,8 @@ void ncr53c7xx_device::step(bool timeout) if ((1 << win) != m_scid) { - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); delay(attotime::from_nsec(2400)); break; @@ -893,7 +894,7 @@ void ncr53c7xx_device::step(bool timeout) // Begin the select phase; assert SEL m_sstat[1] |= SSTAT1_WOA; - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); set_scsi_state(ARBITRATE_ASSERT_SEL); delay(attotime::from_nsec(1200)); } @@ -916,7 +917,7 @@ void ncr53c7xx_device::step(bool timeout) break; // Activate data line of the thing - scsi_bus->data_w(scsi_refid, m_sdid); + m_scsi_bus->data_w(m_scsi_refid, m_sdid); set_scsi_state(ARBITRATE_SELECT_DEST); delay(attotime::from_nsec(2)); @@ -929,7 +930,7 @@ void ncr53c7xx_device::step(bool timeout) if (!timeout) break; - scsi_bus->ctrl_w(scsi_refid, m_scntl[0] & SCNTL0_WATN ? S_ATN : 0, S_ATN | S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, m_scntl[0] & SCNTL0_WATN ? S_ATN : 0, S_ATN | S_BSY); set_scsi_state(ARBITRATE_RELEASE_BSY); delay(attotime::from_nsec(20)); @@ -954,8 +955,8 @@ void ncr53c7xx_device::step(bool timeout) break; // Clear everything - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); // Done? m_sstat[0] |= SSTAT0_CMP; @@ -980,7 +981,7 @@ void ncr53c7xx_device::step(bool timeout) else { if (m_dbc == 1) - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); set_scsi_state(INIT_XFER_SEND_BYTE); send_byte(); @@ -1007,7 +1008,7 @@ void ncr53c7xx_device::step(bool timeout) case INIT_XFER_RECV_BYTE_ACK: { set_scsi_state(INIT_XFER_WAIT_REQ); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); break; } @@ -1056,8 +1057,8 @@ void ncr53c7xx_device::step(bool timeout) break; set_scsi_state(m_scsi_state & STATE_MASK); - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); @@ -1082,7 +1083,7 @@ void ncr53c7xx_device::step(bool timeout) if ((m_scsi_state & STATE_MASK) != INIT_XFER_RECV_PAD) { - m_last_data = scsi_bus->data_r(); + m_last_data = m_scsi_bus->data_r(); uint32_t shift = (8 * (m_dnad & 3)); uint32_t mem_mask = 0xff << shift; @@ -1092,7 +1093,7 @@ void ncr53c7xx_device::step(bool timeout) --m_dbc; } - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); set_scsi_state( (m_scsi_state & STATE_MASK) | (RECV_WAIT_REQ_0 << SUB_SHIFT) ); step(false); @@ -1422,7 +1423,7 @@ void ncr53c7xx_device::bm_i_wmov() m_dnad = m_host_read(m_dnad, 0xffffffff); // Compare the phase bits - if ((scsi_bus->ctrl_r() & 7) == (m_dcmd & 7)) + if ((m_scsi_bus->ctrl_r() & 7) == (m_dcmd & 7)) { // Transfer bytes set_scsi_state(INIT_XFER); @@ -1537,7 +1538,7 @@ void ncr53c7xx_device::io_i_select() void ncr53c7xx_device::io_i_waitdisconnect() { - if (scsi_bus->ctrl_r() & (S_BSY | S_SEL)) + if (m_scsi_bus->ctrl_r() & (S_BSY | S_SEL)) scripts_yield(); else set_scripts_state(SCRIPTS_FETCH); @@ -1568,7 +1569,7 @@ void ncr53c7xx_device::io_i_set() if (m_dbc & (1 << 6)) mask |= S_ACK; - scsi_bus->ctrl_w(scsi_refid, mask, mask); + m_scsi_bus->ctrl_w(m_scsi_refid, mask, mask); set_scripts_state(SCRIPTS_FETCH); } @@ -1588,7 +1589,7 @@ void ncr53c7xx_device::io_i_clear() if (m_dbc & (1 << 6)) mask |= S_ACK; - scsi_bus->ctrl_w(scsi_refid, 0, mask); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, mask); set_scripts_state(SCRIPTS_FETCH); } @@ -1608,7 +1609,7 @@ void ncr53c7xx_device::tc_jump() if (m_dbc & (1 << 17)) { // Phase - jump &= (m_dcmd & 7) == (scsi_bus->ctrl_r() & 7); + jump &= (m_dcmd & 7) == (m_scsi_bus->ctrl_r() & 7); } if (m_dbc & (1 << 18)) { @@ -1638,7 +1639,7 @@ void ncr53c7xx_device::tc_call() if (m_dbc & (1 << 17)) { // Phase - jump &= (m_dcmd & 7) == (scsi_bus->ctrl_r() & 7); + jump &= (m_dcmd & 7) == (m_scsi_bus->ctrl_r() & 7); } if (m_dbc & (1 << 18)) { @@ -1669,7 +1670,7 @@ void ncr53c7xx_device::tc_return() if (m_dbc & (1 << 17)) { // Phase - jump &= (m_dcmd & 7) == (scsi_bus->ctrl_r() & 7); + jump &= (m_dcmd & 7) == (m_scsi_bus->ctrl_r() & 7); } if (m_dbc & (1 << 18)) { @@ -1699,7 +1700,7 @@ void ncr53c7xx_device::tc_int() if (m_dbc & (1 << 17)) { // Phase - jump &= (m_dcmd & 7) == (scsi_bus->ctrl_r() & 7); + jump &= (m_dcmd & 7) == (m_scsi_bus->ctrl_r() & 7); } if (m_dbc & (1 << 18)) { diff --git a/src/devices/machine/53c7xx.h b/src/devices/machine/53c7xx.h index 5e7b78b318c..2bf54a9b221 100644 --- a/src/devices/machine/53c7xx.h +++ b/src/devices/machine/53c7xx.h @@ -16,7 +16,7 @@ #include "machine/nscsi_bus.h" -class ncr53c7xx_device : public nscsi_device, public nscsi_slot_card_interface, public device_execute_interface +class ncr53c7xx_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface, public device_execute_interface { public: // construction/destruction diff --git a/src/devices/machine/aic6250.cpp b/src/devices/machine/aic6250.cpp index 6f08895ac44..d573ca682ea 100644 --- a/src/devices/machine/aic6250.cpp +++ b/src/devices/machine/aic6250.cpp @@ -47,7 +47,8 @@ static char const *const nscsi_phase[] = { "DATA OUT", "DATA IN", "COMMAND", "ST static char const *const aic6250_phase[] = { "DATA OUT", "*", "DATA IN", "*", "COMMAND", "MESSAGE OUT", "STATUS", "MESSAGE IN" }; aic6250_device::aic6250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) - : nscsi_device(mconfig, type, tag, owner, clock) + : device_t(mconfig, type, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_int_cb(*this) , m_breq_cb(*this) @@ -179,7 +180,7 @@ void aic6250_device::device_start() m_int_asserted = false; // FIXME: for now, let's just look at everything - scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ALL, S_ALL); } /* @@ -457,7 +458,7 @@ void aic6250_device::control_reg_1_w(u8 data) u8 aic6250_device::scsi_signal_reg_r() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); u8 const data = ((ctrl & S_ACK) ? R09R_SCSI_ACK_IN : 0) | @@ -479,7 +480,7 @@ void aic6250_device::scsi_signal_reg_w(u8 data) LOGMASKED(LOG_REG, "scsi_signal_reg_w 0x%02x\n", data); if (m_control_reg_0 & R07W_TARGET_MODE) - scsi_bus->ctrl_w(scsi_refid, + m_scsi_bus->ctrl_w(m_scsi_refid, ((data & R09W_SCSI_REQ_OUT) ? S_REQ : 0) | ((data & R09W_SCSI_BSY_OUT) ? S_BSY : 0) | ((data & R09W_SCSI_SEL_OUT) ? S_SEL : 0) | @@ -487,7 +488,7 @@ void aic6250_device::scsi_signal_reg_w(u8 data) ((data & R09W_SCSI_IO_OUT) ? S_INP : 0) | ((data & R09W_SCSI_CD_OUT) ? S_CTL : 0), S_REQ | S_BSY | S_SEL | S_MSG | S_INP | S_CTL); else - scsi_bus->ctrl_w(scsi_refid, + m_scsi_bus->ctrl_w(m_scsi_refid, ((data & R09W_SCSI_ACK_OUT) ? S_ACK : 0) | ((data & R09W_SCSI_BSY_OUT) ? S_BSY : 0) | ((data & R09W_SCSI_SEL_OUT) ? S_SEL : 0) | @@ -496,7 +497,7 @@ void aic6250_device::scsi_signal_reg_w(u8 data) if ((data ^ m_scsi_signal_reg) & R09R_PHASE_MASK) LOGMASKED(LOG_SCSI, "expecting phase %s\n", aic6250_phase[data >> 5]); - if (!(m_control_reg_0 & R07W_TARGET_MODE) && phase_match(data, scsi_bus->ctrl_r())) + if (!(m_control_reg_0 & R07W_TARGET_MODE) && phase_match(data, m_scsi_bus->ctrl_r())) m_status_reg_0 &= ~R07R_PHASE_MISMATCH_ERR; if (!(m_control_reg_0 & R07W_TARGET_MODE) && (data & R09W_SCSI_ACK_OUT)) @@ -511,7 +512,7 @@ void aic6250_device::scsi_signal_reg_w(u8 data) u8 aic6250_device::scsi_id_data_r() { // TODO: selection/reselection phase - u8 const data = scsi_bus->data_r(); + u8 const data = m_scsi_bus->data_r(); LOGMASKED(LOG_REG, "scsi_id_data_r 0x%02x\n", data); @@ -522,7 +523,7 @@ void aic6250_device::scsi_id_data_w(u8 data) { LOGMASKED(LOG_REG, "scsi_id_data_w 0x%02x\n", data); - scsi_bus->data_w(scsi_refid, data); + m_scsi_bus->data_w(m_scsi_refid, data); m_scsi_id_data = data; } @@ -585,7 +586,7 @@ void aic6250_device::port_b_w(u8 data) void aic6250_device::scsi_ctrl_changed() { - u32 const control = scsi_bus->ctrl_r(); + u32 const control = m_scsi_bus->ctrl_r(); if ((control & S_BSY) && !(control & S_SEL)) LOGMASKED(LOG_SCSI, "scsi_ctrl_changed 0x%08x phase %s%s%s\n", control, nscsi_phase[control & S_PHASE_MASK], @@ -645,8 +646,8 @@ void aic6250_device::scsi_ctrl_changed() m_status_reg_0 |= R07R_SCSI_RST_OCCURRED; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); } // record new state @@ -695,7 +696,7 @@ int aic6250_device::state_step() case ARB_BUS_FREE: LOGMASKED(LOG_STATE, "arbitration: waiting for bus free\n"); - if (!(scsi_bus->ctrl_r() & (S_SEL | S_BSY | S_RST))) + if (!(m_scsi_bus->ctrl_r() & (S_SEL | S_BSY | S_RST))) { m_state = ARB_START; delay = 16; // 800ns @@ -707,19 +708,19 @@ int aic6250_device::state_step() m_state = ARB_EVALUATE; // drive our SCSI ID and assert BSY - scsi_bus->data_w(scsi_refid, scsi_id); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, scsi_id); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); delay = 56; // 2800ns break; case ARB_EVALUATE: // check if SEL asserted, or if there's a higher ID on the bus - if ((scsi_bus->ctrl_r() & S_SEL) || (scsi_bus->data_r() & ~((scsi_id - 1) | scsi_id))) + if ((m_scsi_bus->ctrl_r() & S_SEL) || (m_scsi_bus->data_r() & ~((scsi_id - 1) | scsi_id))) { LOGMASKED(LOG_STATE, "arbitration: lost\n"); m_state = ARB_BUS_FREE; - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); break; } @@ -737,8 +738,8 @@ int aic6250_device::state_step() delay = 2; // 100ns // drive both SCSI IDs and assert SEL - scsi_bus->data_w(scsi_refid, m_scsi_id_data); - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, m_scsi_id_data); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); break; case SEL_DELAY: @@ -749,13 +750,13 @@ int aic6250_device::state_step() // clear BSY, optionally assert ATN if (m_int_msk_reg_0 & R03W_EN_AUTO_ATN) - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_BSY | S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_BSY | S_ATN); else - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); break; case SEL_WAIT_BSY: - if (scsi_bus->ctrl_r() & S_BSY) + if (m_scsi_bus->ctrl_r() & S_BSY) { LOGMASKED(LOG_STATE, "selection: BSY asserted by target\n"); @@ -778,15 +779,15 @@ int aic6250_device::state_step() // clear data and SEL // FIXME: should not clear ATN - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL | S_ATN); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL | S_ATN); break; case DMA_IN: // FIXME: assert ack when: req asserted && phase match && count not zero && fifo not full if (!m_fifo.full()) { - u8 const data = scsi_bus->data_r(); + u8 const data = m_scsi_bus->data_r(); LOGMASKED(LOG_STATE, "dma in 0x%02x\n", data); m_status_reg_0 &= ~R07R_SCSI_REQ_ON; @@ -795,7 +796,7 @@ int aic6250_device::state_step() m_state = DMA_IN_NEXT; - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } else { @@ -805,17 +806,17 @@ int aic6250_device::state_step() break; case DMA_IN_NEXT: - if (!(scsi_bus->ctrl_r() & S_REQ)) + if (!(m_scsi_bus->ctrl_r() & S_REQ)) { LOGMASKED(LOG_STATE, "dma in next count %d\n", m_dma_count); m_state = m_dma_count ? DMA_IN_REQ : DMA_IN_DRAIN; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; case DMA_IN_REQ: - if (scsi_bus->ctrl_r() & S_REQ) + if (m_scsi_bus->ctrl_r() & S_REQ) m_state = DMA_IN; break; @@ -849,8 +850,8 @@ int aic6250_device::state_step() m_state = DMA_OUT_NEXT; // drive data, assert ACK - scsi_bus->data_w(scsi_refid, data); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, data); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } else { @@ -860,18 +861,18 @@ int aic6250_device::state_step() break; case DMA_OUT_NEXT: - if (!(scsi_bus->ctrl_r() & S_REQ)) + if (!(m_scsi_bus->ctrl_r() & S_REQ)) { LOGMASKED(LOG_STATE, "dma out next count %d\n", m_dma_count); m_state = m_dma_count ? DMA_OUT_REQ : DMA_OUT_DONE; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; case DMA_OUT_REQ: - if (scsi_bus->ctrl_r() & S_REQ) + if (m_scsi_bus->ctrl_r() & S_REQ) m_state = DMA_OUT; break; @@ -886,7 +887,7 @@ int aic6250_device::state_step() case AUTO_PIO: // TODO: test expected phase // out: wait for req, check phase match, ack - if (scsi_bus->ctrl_r() & S_REQ) + if (m_scsi_bus->ctrl_r() & S_REQ) { LOGMASKED(LOG_STATE, "auto pio\n"); @@ -898,10 +899,10 @@ int aic6250_device::state_step() m_state = AUTO_PIO_DONE; m_status_reg_0 &= ~R07R_SCSI_REQ_ON; - m_scsi_latch_data = scsi_bus->data_r(); + m_scsi_latch_data = m_scsi_bus->data_r(); LOGMASKED(LOG_STATE, "auto pio in 0x%02x\n", m_scsi_latch_data); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); break; case AUTO_PIO_OUT: @@ -910,12 +911,12 @@ int aic6250_device::state_step() m_state = AUTO_PIO_DONE; - scsi_bus->data_w(scsi_refid, m_scsi_id_data); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, m_scsi_id_data); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); break; case AUTO_PIO_DONE: - if (!(scsi_bus->ctrl_r() & S_REQ)) + if (!(m_scsi_bus->ctrl_r() & S_REQ)) { LOGMASKED(LOG_STATE, "auto pio done\n"); @@ -923,8 +924,8 @@ int aic6250_device::state_step() m_control_reg_1 &= ~R08W_AUTO_SCSI_PIO_REQ; m_state = IDLE; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; } diff --git a/src/devices/machine/aic6250.h b/src/devices/machine/aic6250.h index 2466c17af8e..b051a05602d 100644 --- a/src/devices/machine/aic6250.h +++ b/src/devices/machine/aic6250.h @@ -8,7 +8,7 @@ #include "machine/nscsi_bus.h" -class aic6250_device : public nscsi_device, public nscsi_slot_card_interface +class aic6250_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: aic6250_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/cxd1185.cpp b/src/devices/machine/cxd1185.cpp index 6dfa38915a1..2b1c9cc539c 100644 --- a/src/devices/machine/cxd1185.cpp +++ b/src/devices/machine/cxd1185.cpp @@ -43,7 +43,8 @@ static constexpr unsigned SCSI_RST_HOLD = 25'000; ALLOW_SAVE_TYPE(cxd1185_device::state); cxd1185_device::cxd1185_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) - : nscsi_device(mconfig, CXD1185, tag, owner, clock) + : device_t(mconfig, CXD1185, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_irq_out_cb(*this) , m_drq_out_cb(*this) @@ -102,7 +103,7 @@ void cxd1185_device::device_start() m_drq_asserted = false; // monitor all scsi bus control lines - scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ALL, S_ALL); } void cxd1185_device::device_reset() @@ -138,8 +139,8 @@ void cxd1185_device::reset_chip() int_check(); // clear scsi bus - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); } void cxd1185_device::reset_fifo() @@ -150,7 +151,7 @@ void cxd1185_device::reset_fifo() u8 cxd1185_device::status_r() { - u8 const data = (scsi_bus->ctrl_r() & S_RST) ? MRST : 0; + u8 const data = (m_scsi_bus->ctrl_r() & S_RST) ? MRST : 0; LOGMASKED(LOG_REG, "status_r 0x%02x\n", data | m_status); @@ -174,7 +175,7 @@ u8 cxd1185_device::scsi_data_r() data = m_fifo.peek(); } else - data = scsi_bus->data_r(); + data = m_scsi_bus->data_r(); LOGMASKED(LOG_REG, "scsi_data_r 0x%02x (%s)\n", data, machine().describe_context()); @@ -198,7 +199,7 @@ template u8 cxd1185_device::int_req_r() u8 cxd1185_device::scsi_ctrl_monitor_r() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); u8 const data = ((ctrl & S_BSY) ? MBSY : 0) | @@ -285,7 +286,7 @@ void cxd1185_device::command_w(u8 data) m_pio_ctrl_mode = true; m_scsi_ctrl = 0; if ((m_status & (INIT | TARG)) == TARG) - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL & ~S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL & ~S_BSY); break; case 0x05: LOGMASKED(LOG_CMD, "deassert scsi control\n"); @@ -328,24 +329,24 @@ void cxd1185_device::command_w(u8 data) case 0xc0: LOGMASKED(LOG_CMD, "transfer information\n"); m_state = XFR_INFO; - m_last_dma_direction = !(m_command & DMA) ? DMA_NONE : (scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT; + m_last_dma_direction = !(m_command & DMA) ? DMA_NONE : (m_scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT; break; case 0xc1: LOGMASKED(LOG_CMD, "transfer pad\n"); m_state = XFR_INFO; - m_last_dma_direction = !(m_command & DMA) ? DMA_NONE : (scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT; + m_last_dma_direction = !(m_command & DMA) ? DMA_NONE : (m_scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT; break; case 0xc2: LOGMASKED(LOG_CMD, "deassert ack\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); break; case 0xc3: LOGMASKED(LOG_CMD, "assert atn\n"); - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_ATN); break; case 0xc4: LOGMASKED(LOG_CMD, "deassert atn\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); break; } @@ -380,12 +381,12 @@ void cxd1185_device::scsi_data_w(u8 data) } else { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if (!(m_int_req[1] & PHC) && (((m_status & (INIT | TARG)) == INIT && !(ctrl & S_INP)) || ((m_status & (INIT | TARG)) == TARG && (ctrl & S_INP)))) - scsi_bus->data_w(scsi_refid, data); + m_scsi_bus->data_w(m_scsi_refid, data); } } @@ -459,7 +460,7 @@ void cxd1185_device::scsi_ctrl_w(u8 data) ((data & AACK) ? S_ACK : 0) | ((data & AATN) ? S_ATN : 0); - scsi_bus->ctrl_w(scsi_refid, nscsi_data, nscsi_mask); + m_scsi_bus->ctrl_w(m_scsi_refid, nscsi_data, nscsi_mask); } else m_scsi_ctrl = data; @@ -518,7 +519,7 @@ int cxd1185_device::state_step() case ARB_BUS_FREE: LOGMASKED(LOG_STATE, "arbitration: waiting for bus free\n"); - if (!(scsi_bus->ctrl_r() & (S_SEL | S_BSY | S_RST))) + if (!(m_scsi_bus->ctrl_r() & (S_SEL | S_BSY | S_RST))) { m_state = ARB_START; delay = SCSI_BUS_FREE; @@ -530,12 +531,12 @@ int cxd1185_device::state_step() delay = SCSI_ARB_DELAY; // assert own ID and BSY - scsi_bus->data_w(scsi_refid, oid); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, oid); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); break; case ARB_EVALUATE: // check if SEL asserted, or if there's a higher ID on the bus - if ((scsi_bus->ctrl_r() & S_SEL) || (scsi_bus->data_r() & ~((oid - 1) | oid))) + if ((m_scsi_bus->ctrl_r() & S_SEL) || (m_scsi_bus->data_r() & ~((oid - 1) | oid))) { LOGMASKED(LOG_STATE, "arbitration: lost\n"); m_status &= ~INIT; @@ -544,8 +545,8 @@ int cxd1185_device::state_step() m_state = COMPLETE; // clear data and BSY - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); } else { @@ -561,8 +562,8 @@ int cxd1185_device::state_step() delay = SCSI_BUS_SKEW * 2; // assert own and target ID and SEL - scsi_bus->data_w(scsi_refid, oid | tid); - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, oid | tid); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); break; case SEL_DELAY: LOGMASKED(LOG_STATE, "selection: BSY cleared\n"); @@ -571,12 +572,12 @@ int cxd1185_device::state_step() // clear BSY, optionally assert ATN if (m_command == CMD_SEL_ATN) - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_BSY | S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_BSY | S_ATN); else - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); break; case SEL_WAIT_BSY: - if (scsi_bus->ctrl_r() & S_BSY) + if (m_scsi_bus->ctrl_r() & S_BSY) { LOGMASKED(LOG_STATE, "selection: BSY asserted by target\n"); m_state = SEL_COMPLETE; @@ -589,7 +590,7 @@ int cxd1185_device::state_step() m_int_req[0] |= STO; m_state = COMPLETE; - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN | S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN | S_SEL); } break; case SEL_COMPLETE: @@ -597,20 +598,20 @@ int cxd1185_device::state_step() m_state = COMPLETE; // clear data and SEL - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); break; case XFR_INFO: LOGMASKED(LOG_STATE, "transfer: count %d waiting for REQ\n", (m_command & TRBE) ? m_count : 1); - if (scsi_bus->ctrl_r() & S_REQ) - m_state = scsi_bus->ctrl_r() & S_INP ? XFR_IN : XFR_OUT; + if (m_scsi_bus->ctrl_r() & S_REQ) + m_state = m_scsi_bus->ctrl_r() & S_INP ? XFR_IN : XFR_OUT; break; case XFR_IN: // FIXME: datasheet says ACK should be asserted when TRBE & FIF if (!m_fifo.full()) { - u8 const data = ((m_command & CMD) == (CMD_XFR_PAD & CMD)) ? 0 : scsi_bus->data_r(); + u8 const data = ((m_command & CMD) == (CMD_XFR_PAD & CMD)) ? 0 : m_scsi_bus->data_r(); LOGMASKED(LOG_STATE, "transfer in: data 0x%02x\n", data); m_fifo.enqueue(data); @@ -620,7 +621,7 @@ int cxd1185_device::state_step() m_state = XFR_IN_NEXT; // assert ACK - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); // If this is a DMA command and we have data now, assert DRQ so host can start transferring // (also handles transfers in the case where the counter is not aligned with the expected bytes read) @@ -635,7 +636,7 @@ int cxd1185_device::state_step() } break; case XFR_IN_NEXT: - if (!(scsi_bus->ctrl_r() & S_REQ)) + if (!(m_scsi_bus->ctrl_r() & S_REQ)) { LOGMASKED(LOG_STATE, "transfer in: count %d\n", (m_command & TRBE) ? m_count : 0); if (!(m_command & TRBE) || !m_count) @@ -649,12 +650,12 @@ int cxd1185_device::state_step() m_state = XFR_IN_REQ; // clear ACK except for single-byte message-in - if (!((scsi_bus->ctrl_r() & S_PHASE_MASK) == S_PHASE_MSG_IN && !(m_command & TRBE))) - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + if (!((m_scsi_bus->ctrl_r() & S_PHASE_MASK) == S_PHASE_MSG_IN && !(m_command & TRBE))) + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; case XFR_IN_REQ: - if (scsi_bus->ctrl_r() & S_REQ) + if (m_scsi_bus->ctrl_r() & S_REQ) { // check if target changed phase if (m_int_req[1] & PHC) @@ -683,8 +684,8 @@ int cxd1185_device::state_step() m_state = XFR_OUT_NEXT; // assert data and ACK - scsi_bus->data_w(scsi_refid, data); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, data); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } else { @@ -694,7 +695,7 @@ int cxd1185_device::state_step() } break; case XFR_OUT_NEXT: - if (!(scsi_bus->ctrl_r() & S_REQ)) + if (!(m_scsi_bus->ctrl_r() & S_REQ)) { LOGMASKED(LOG_STATE, "transfer out: data ACK\n"); if (m_command & TRBE) @@ -711,13 +712,13 @@ int cxd1185_device::state_step() m_state = XFR_INFO_DONE; // clear data and ACK - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; case XFR_OUT_REQ: LOGMASKED(LOG_STATE, "transfer out: count %d waiting for REQ\n", m_count); - if (scsi_bus->ctrl_r() & S_REQ) + if (m_scsi_bus->ctrl_r() & S_REQ) { // check if target changed phase if (m_int_req[1] & PHC) @@ -745,8 +746,8 @@ int cxd1185_device::state_step() delay = (m_mode & TMSL) ? m_rst_time : SCSI_RST_HOLD; // clear data and assert RST - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, S_RST, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, S_RST, S_ALL); break; case BUS_RESET_DONE: LOGMASKED(LOG_STATE, "bus reset: complete\n"); @@ -755,7 +756,7 @@ int cxd1185_device::state_step() m_state = COMPLETE; // clear RST - scsi_bus->ctrl_w(scsi_refid, 0, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_RST); break; case COMPLETE: @@ -770,7 +771,7 @@ int cxd1185_device::state_step() void cxd1185_device::scsi_ctrl_changed() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if ((ctrl & S_BSY) && !(ctrl & S_SEL)) LOGMASKED(LOG_SCSI, "scsi_ctrl_changed 0x%x phase %s%s%s\n", ctrl, nscsi_phase[ctrl & S_PHASE_MASK], @@ -788,8 +789,8 @@ void cxd1185_device::scsi_ctrl_changed() m_int_req[1] |= SRST; // clear data and ctrl - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); } else if ((m_status & (TARG | INIT)) == INIT) { diff --git a/src/devices/machine/cxd1185.h b/src/devices/machine/cxd1185.h index 29c097b10f4..cf0520af1c0 100644 --- a/src/devices/machine/cxd1185.h +++ b/src/devices/machine/cxd1185.h @@ -9,7 +9,8 @@ #include "machine/nscsi_bus.h" class cxd1185_device - : public nscsi_device + : public device_t + , public nscsi_device_interface , public nscsi_slot_card_interface { public: diff --git a/src/devices/machine/mb87030.cpp b/src/devices/machine/mb87030.cpp index 86d5ceea428..3564c1c0f54 100644 --- a/src/devices/machine/mb87030.cpp +++ b/src/devices/machine/mb87030.cpp @@ -37,7 +37,8 @@ mb89352_device::mb89352_device(const machine_config &mconfig, const char *tag, d } mb87030_device::mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - nscsi_device(mconfig, type, tag, owner, clock), + device_t(mconfig, type, tag, owner, clock), + nscsi_device_interface(mconfig, *this), nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_irq_handler(*this), m_dreq_handler(*this), @@ -126,11 +127,11 @@ void mb87030_device::device_reset() m_exbf = 0; m_fifo.clear(); m_dreq_handler(false); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); m_delay_state = State::Idle; update_state(State::Idle, 0); scsi_set_ctrl(0, S_ALL); - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); update_ssts(); update_ints(); } @@ -254,7 +255,7 @@ void mb87030_device::scsi_set_ctrl(uint32_t value, uint32_t mask) (m_scsi_ctrl & S_CTL) ? " CTL" : "", (m_scsi_ctrl & S_INP) ? " INP" : ""); } else { - scsi_bus->ctrl_w(scsi_refid, value, mask); + m_scsi_bus->ctrl_w(m_scsi_refid, value, mask); } } @@ -281,17 +282,17 @@ uint32_t mb87030_device::scsi_get_ctrl() return ret; } else { - return scsi_bus->ctrl_r(); + return m_scsi_bus->ctrl_r(); } } void mb87030_device::step(bool timeout) { uint32_t ctrl = scsi_get_ctrl(); - uint32_t data = scsi_bus->data_r(); + uint32_t data = m_scsi_bus->data_r(); LOG("%s: %d %s,%s data %02X ctrl %02X TC %d\n", __FUNCTION__, - scsi_refid, get_state_name(m_state), + m_scsi_refid, get_state_name(m_state), timeout ? " timeout" : "", data, ctrl, m_tc); @@ -325,7 +326,7 @@ void mb87030_device::step(bool timeout) case State::ArbitrationAssertBSY: scsi_set_ctrl(S_BSY, S_BSY); - scsi_bus->data_w(scsi_refid, (1 << m_bdid)); + m_scsi_bus->data_w(m_scsi_refid, (1 << m_bdid)); update_state(State::ArbitrationWait, 32); break; @@ -335,7 +336,7 @@ void mb87030_device::step(bool timeout) if (data & id) { LOG("arbitration lost, winner %d\n", id); scsi_set_ctrl(0, S_BSY); - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); m_ssts &= ~SSTS_SPC_BUSY; update_state(State::Idle); break; @@ -358,14 +359,14 @@ void mb87030_device::step(bool timeout) case State::SelectionAssertID: m_ssts |= SSTS_INIT_CONNECTED; m_ssts &= ~SSTS_TARG_CONNECTED; - scsi_bus->data_w(scsi_refid, m_temp); + m_scsi_bus->data_w(m_scsi_refid, m_temp); update_state(State::SelectionAssertSEL, 10); break; case State::SelectionAssertSEL: // deassert BSY for arbitrating systems, assert SEL for non-arbitrating systems scsi_set_ctrl(S_SEL | (m_send_atn_during_selection ? S_ATN : 0), S_ATN|S_SEL|S_BSY); - scsi_bus->ctrl_wait(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_BSY, S_BSY); update_state(State::SelectionWaitBSY, 0, ((m_tc & ~0xff) + 15) * 2); break; @@ -394,7 +395,7 @@ void mb87030_device::step(bool timeout) case State::TransferWaitReq: if (!(ctrl & S_REQ)) { - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); break; } @@ -402,7 +403,7 @@ void mb87030_device::step(bool timeout) LOG("SCSI phase change during transfer\n"); m_ints |= INTS_SERVICE_REQUIRED; m_ssts &= ~SSTS_SPC_BUSY; - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); update_ints(); update_state(State::Idle); break; @@ -412,7 +413,7 @@ void mb87030_device::step(bool timeout) // This is a size 0 transfer, it only checks the phase in // practice - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); scsi_command_complete(); break; } @@ -455,13 +456,13 @@ void mb87030_device::step(bool timeout) if (m_tc && !m_fifo.empty()) { LOG("pulling write data: %02X (%d left)\n", data, m_fifo.queue_length() - 1); - scsi_bus->data_w(scsi_refid, m_fifo.dequeue()); + m_scsi_bus->data_w(m_scsi_refid, m_fifo.dequeue()); update_state(State::TransferSendAck, 10); break; } if (!m_tc && (m_scmd & SCMD_TERM_MODE)) { - scsi_bus->data_w(scsi_refid, m_temp); + m_scsi_bus->data_w(m_scsi_refid, m_temp); update_state(State::TransferSendAck, 10); break; } @@ -472,7 +473,7 @@ void mb87030_device::step(bool timeout) m_temp = data; scsi_set_ctrl(S_ACK, S_ACK); - scsi_bus->ctrl_wait(scsi_refid, 0, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_REQ); update_state(State::TransferWaitDeassertREQ, 10); break; @@ -487,7 +488,7 @@ void mb87030_device::step(bool timeout) update_state(State::TransferWaitReq, 10); else update_state(State::TransferWaitFifoEmpty, 10); - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); // deassert ATN after last byte of message out phase if (!m_tc && (ctrl & S_PHASE_MASK) == S_PHASE_MSG_OUT && m_send_atn_during_selection) @@ -500,7 +501,7 @@ void mb87030_device::step(bool timeout) case State::TransferWaitFifoEmpty: if (!m_fifo.empty()) break; - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); scsi_command_complete(); break; } @@ -540,7 +541,7 @@ void mb87030_device::device_start() void mb87030_device::scsi_ctrl_changed() { - const auto value = scsi_bus->ctrl_r(); + const auto value = m_scsi_bus->ctrl_r(); LOG("%s: %02x\n", __FUNCTION__, value); step(false); } @@ -684,10 +685,10 @@ void mb87030_device::scmd_w(uint8_t data) case SCMD_CMD_SET_ACK_REQ: LOG("%s: Set ACK/REQ\n", __FUNCTION__); if (m_ssts & SSTS_INIT_CONNECTED) { - if (scsi_bus->ctrl_r() & S_INP) { - m_temp = scsi_bus->data_r(); + if (m_scsi_bus->ctrl_r() & S_INP) { + m_temp = m_scsi_bus->data_r(); } else { - scsi_bus->data_w(scsi_refid, m_temp); + m_scsi_bus->data_w(m_scsi_refid, m_temp); } LOG("set ACK\n"); scsi_set_ctrl(S_ACK, S_ACK); @@ -726,7 +727,7 @@ void mb87030_device::ints_w(uint8_t data) // terminate selection/reselection m_ssts &= ~(SSTS_INIT_CONNECTED|SSTS_TARG_CONNECTED|SSTS_SPC_BUSY); scsi_set_ctrl(0, S_ALL); - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); update_state(State::Idle); } else { // restart selection/reselection diff --git a/src/devices/machine/mb87030.h b/src/devices/machine/mb87030.h index fe201477f05..4eb0e3f4408 100644 --- a/src/devices/machine/mb87030.h +++ b/src/devices/machine/mb87030.h @@ -8,7 +8,7 @@ #include "machine/nscsi_bus.h" #include -class mb87030_device : public nscsi_device, public nscsi_slot_card_interface +class mb87030_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: mb87030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -55,8 +55,8 @@ public: uint8_t dma_r(); void dma_w(uint8_t val); - void ctrl_write(uint32_t value, uint32_t mask) { scsi_bus->ctrl_w(scsi_refid, value, mask); scsi_ctrl_changed(); } - uint32_t data_read() { return scsi_bus->data_r(); } + void ctrl_write(uint32_t value, uint32_t mask) { m_scsi_bus->ctrl_w(m_scsi_refid, value, mask); scsi_ctrl_changed(); } + uint32_t data_read() { return m_scsi_bus->data_r(); } protected: mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/ncr5380.cpp b/src/devices/machine/ncr5380.cpp index f0f5a73aa6c..f4a26ab38c2 100644 --- a/src/devices/machine/ncr5380.cpp +++ b/src/devices/machine/ncr5380.cpp @@ -33,7 +33,8 @@ DEFINE_DEVICE_TYPE(DP8490, dp8490_device, "dp8490", "National Semiconducto ALLOW_SAVE_TYPE(ncr5380_device::state); ncr5380_device::ncr5380_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, bool has_lbs) - : nscsi_device(mconfig, type, tag, owner, clock) + : device_t(mconfig, type, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_irq_handler(*this) , m_drq_handler(*this) @@ -109,12 +110,12 @@ void ncr5380_device::device_reset() m_idata = 0; // clear scsi bus - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); // monitor all control lines m_scsi_ctrl = 0; - scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ALL, S_ALL); // clear output lines set_irq(false); @@ -123,7 +124,7 @@ void ncr5380_device::device_reset() void ncr5380_device::scsi_ctrl_changed() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if (VERBOSE & LOG_SCSI) { @@ -174,8 +175,8 @@ void ncr5380_device::scsi_ctrl_changed() m_state_timer->enable(false); // clear scsi bus - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); } else if (!(m_scsi_ctrl & S_REQ) && (ctrl & S_REQ)) { @@ -206,7 +207,7 @@ void ncr5380_device::scsi_ctrl_changed() u8 ncr5380_device::csdata_r() { - u8 const data = scsi_bus->data_r(); + u8 const data = m_scsi_bus->data_r(); LOGMASKED(LOG_REGR, "csdata_r 0x%02x (%s)\n", data, machine().describe_context()); return data; @@ -256,14 +257,14 @@ void ncr5380_device::icmd_w(u8 data) (data & IC_ATN ? S_ATN : 0); LOGMASKED(LOG_SCSI, "changing control lines 0x%04x\n", ctrl); - scsi_bus->ctrl_w(scsi_refid, ctrl, mask); + m_scsi_bus->ctrl_w(m_scsi_refid, ctrl, mask); } } else { LOG("scsi reset issued\n"); device_reset(); - scsi_bus->ctrl_w(scsi_refid, S_RST, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, S_RST, S_RST); set_irq(true); } @@ -299,7 +300,7 @@ void ncr5380_device::mode_w(u8 data) set_drq(false); // clear ACK - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } // start/stop arbitration @@ -342,7 +343,7 @@ void ncr5380_device::tcmd_w(u8 data) u8 ncr5380_device::csstat_r() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); u8 const data = (ctrl & S_RST ? ST_RST : 0) | (ctrl & S_BSY ? ST_BSY : 0) | @@ -363,7 +364,7 @@ void ncr5380_device::selen_w(u8 data) u8 ncr5380_device::bas_r() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); u8 const data = m_bas | (((ctrl & S_PHASE_MASK) == (m_tcmd & TC_PHASE)) ? BAS_PHASEMATCH : 0) | (ctrl & S_ATN ? BAS_ATN : 0) | @@ -434,7 +435,7 @@ void ncr5380_device::state_timer(s32 param) int ncr5380_device::state_step() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); int delay = 0; switch (m_state) @@ -464,12 +465,12 @@ int ncr5380_device::state_step() delay = 2200; // assert own ID and BSY - scsi_bus->data_w(scsi_refid, m_odata); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, m_odata); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); break; case ARB_EVALUATE: // check if SEL asserted, or if there's a higher ID on the bus - if ((ctrl & S_SEL) || (scsi_bus->data_r() & ~((m_odata - 1) | m_odata))) + if ((ctrl & S_SEL) || (m_scsi_bus->data_r() & ~((m_odata - 1) | m_odata))) { LOGMASKED(LOG_ARB, "arbitration: lost\n"); m_icmd &= ~IC_BSY; @@ -478,8 +479,8 @@ int ncr5380_device::state_step() m_state = IDLE; // clear data and BSY - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); } else { @@ -493,14 +494,14 @@ int ncr5380_device::state_step() { if ((ctrl & S_PHASE_MASK) == (m_tcmd & TC_PHASE)) { - m_idata = scsi_bus->data_r(); + m_idata = m_scsi_bus->data_r(); LOGMASKED(LOG_DMA, "dma in: 0x%02x\n", m_idata); m_state = DMA_IN_ACK; set_drq(true); // assert ACK - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } delay = -1; @@ -512,7 +513,7 @@ int ncr5380_device::state_step() m_state = (m_bas & BAS_ENDOFDMA) ? IDLE : DMA_IN_REQ; // clear ACK - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; @@ -532,8 +533,8 @@ int ncr5380_device::state_step() m_state = DMA_OUT_ACK; // assert data and ACK - scsi_bus->data_w(scsi_refid, m_odata); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, m_odata); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } } break; @@ -551,8 +552,8 @@ int ncr5380_device::state_step() m_state = DMA_OUT_DRQ; // clear data and ACK - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; } @@ -602,12 +603,12 @@ u8 ncr5380_device::dma_r() void ncr5380_device::scsi_data_w(u8 data) { // TODO: release data bus when any of the prerequisite conditions expire - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if ((m_mode & MODE_TARGET) || (!(ctrl & S_INP) && (ctrl & S_PHASE_MASK) == (m_tcmd & S_PHASE_MASK))) { LOGMASKED(LOG_SCSI, "scsi data 0x%02x\n", data); - scsi_bus->data_w(scsi_refid, data); + m_scsi_bus->data_w(m_scsi_refid, data); } } diff --git a/src/devices/machine/ncr5380.h b/src/devices/machine/ncr5380.h index beef3c6b290..ac3b6480729 100644 --- a/src/devices/machine/ncr5380.h +++ b/src/devices/machine/ncr5380.h @@ -9,7 +9,8 @@ #include "machine/nscsi_bus.h" class ncr5380_device - : public nscsi_device + : public device_t + , public nscsi_device_interface , public nscsi_slot_card_interface { public: diff --git a/src/devices/machine/ncr5385.cpp b/src/devices/machine/ncr5385.cpp index 6c0962741d3..fd90803b0af 100644 --- a/src/devices/machine/ncr5385.cpp +++ b/src/devices/machine/ncr5385.cpp @@ -38,7 +38,8 @@ unsigned constexpr SCSI_RST_HOLD = 25'000; unsigned constexpr SCSI_SEL_TIMEOUT = 250'000'000; ncr5385_device::ncr5385_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) - : nscsi_device(mconfig, NCR5385, tag, owner, clock) + : device_t(mconfig, NCR5385, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_int(*this) , m_dreq(*this) @@ -157,14 +158,14 @@ void ncr5385_device::device_reset() m_sbx = false; // monitor all control lines (device has no RST line) - scsi_bus->ctrl_wait(scsi_refid, S_ALL & ~S_RST, S_ALL & ~S_RST); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ALL & ~S_RST, S_ALL & ~S_RST); update_int(); } void ncr5385_device::scsi_ctrl_changed() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); static char const *const nscsi_phase[] = { "DATA OUT", "DATA IN", "COMMAND", "STATUS", "*", "*", "MESSAGE OUT", "MESSAGE IN" }; @@ -245,7 +246,7 @@ u8 ncr5385_device::aux_status_r() if (!m_int_status) { // return current phase - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if (ctrl & S_MSG) data |= AUX_STATUS_MSG; if (ctrl & S_CTL) @@ -335,11 +336,11 @@ void ncr5385_device::cmd_w(u8 data) break; case 0x03: // set atn LOGMASKED(LOG_COMMAND, "set atn\n"); - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_ATN); break; case 0x04: // message accepted LOGMASKED(LOG_COMMAND, "message accepted\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); break; case 0x05: // chip disabled LOGMASKED(LOG_COMMAND, "chip disabled\n"); @@ -492,7 +493,7 @@ void ncr5385_device::state_timer(s32 param) int ncr5385_device::state_step() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); int delay = 0; u8 const oid = 1 << m_own_id; @@ -533,19 +534,19 @@ int ncr5385_device::state_step() delay = SCSI_ARB_DELAY; // assert own ID and BSY - scsi_bus->data_w(scsi_refid, oid); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, oid); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); break; case ARB_EVALUATE: // check if SEL asserted, or if there's a higher ID on the bus - if ((ctrl & S_SEL) || (scsi_bus->data_r() & ~((oid - 1) | oid))) + if ((ctrl & S_SEL) || (m_scsi_bus->data_r() & ~((oid - 1) | oid))) { LOGMASKED(LOG_STATE, "arbitration: lost\n"); m_state = ARB_BUS_FREE; // clear data and BSY - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); } else { @@ -561,8 +562,8 @@ int ncr5385_device::state_step() delay = SCSI_BUS_SKEW * 2; // assert own and target ID and SEL - scsi_bus->data_w(scsi_refid, oid | tid); - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, oid | tid); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); break; case SEL_DELAY: LOGMASKED(LOG_STATE, "selection: BSY cleared\n"); @@ -571,9 +572,9 @@ int ncr5385_device::state_step() // clear BSY, optionally assert ATN if (!BIT(m_cmd, 0)) - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_BSY | S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_BSY | S_ATN); else - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); break; case SEL_WAIT_BSY: if (ctrl & S_BSY) @@ -588,7 +589,7 @@ int ncr5385_device::state_step() m_int_status |= INT_DISCONNECTED; m_state = IDLE; - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN | S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN | S_SEL); update_int(); } @@ -603,8 +604,8 @@ int ncr5385_device::state_step() update_int(); // clear data and SEL - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); break; case SEL_WAIT_REQ: // don't generate bus service interrupt until the function complete is cleared @@ -637,7 +638,7 @@ int ncr5385_device::state_step() if (!BIT(m_cmd, 0)) { m_aux_status |= AUX_STATUS_DATA_FULL; - m_dat = scsi_bus->data_r(); + m_dat = m_scsi_bus->data_r(); if (m_cmd & CMD_DMA) set_dreq(true); @@ -664,7 +665,7 @@ int ncr5385_device::state_step() LOGMASKED(LOG_STATE, "xfi_in: data 0x%02x\n", m_dat); // assert ACK - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); break; case XFI_IN_ACK: if (!(ctrl & S_REQ)) @@ -692,7 +693,7 @@ int ncr5385_device::state_step() update_int(); } else - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } else delay = -1; @@ -732,11 +733,11 @@ int ncr5385_device::state_step() LOGMASKED(LOG_STATE, "xfi_out: data 0x%02x\n", m_dat); // assert data and ACK - scsi_bus->data_w(scsi_refid, m_dat); + m_scsi_bus->data_w(m_scsi_refid, m_dat); if (remaining(1) && (ctrl & S_PHASE_MASK) == S_PHASE_MSG_OUT) - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK | S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK | S_ATN); else - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); break; case XFI_OUT_ACK: if (!(ctrl & S_REQ)) @@ -759,8 +760,8 @@ int ncr5385_device::state_step() m_sbx = false; // clear data and ACK - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } else delay = -1; @@ -829,7 +830,7 @@ void ncr5385_device::update_int() m_cmd = 0; // latch current phase - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if (ctrl & S_MSG) m_aux_status |= AUX_STATUS_MSG; if (ctrl & S_CTL) diff --git a/src/devices/machine/ncr5385.h b/src/devices/machine/ncr5385.h index 32ee4a30d17..61d1adb90ac 100644 --- a/src/devices/machine/ncr5385.h +++ b/src/devices/machine/ncr5385.h @@ -41,7 +41,8 @@ #include "machine/nscsi_bus.h" class ncr5385_device - : public nscsi_device + : public device_t + , public nscsi_device_interface , public nscsi_slot_card_interface { public: diff --git a/src/devices/machine/ncr53c90.cpp b/src/devices/machine/ncr53c90.cpp index ff28397fe7c..ec8d488e70a 100644 --- a/src/devices/machine/ncr53c90.cpp +++ b/src/devices/machine/ncr53c90.cpp @@ -151,7 +151,8 @@ void ncr53cf94_device::write(offs_t offset, uint8_t data) } ncr53c90_device::ncr53c90_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) - : nscsi_device(mconfig, type, tag, owner, clock) + : device_t(mconfig, type, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , tm(nullptr), config(0), status(0), istatus(0), clock_conv(0), sync_offset(0), sync_period(0), bus_id(0) , select_timeout(0), seq(0), tcount(0), tcounter(0), tcounter_mask(0xffff), mode(0), fifo_pos(0), command_pos(0), state(0), xfr_phase(0), dma_dir(0), irq(false), drq(false), test_mode(false), stepping(0) @@ -213,8 +214,6 @@ ncr53cf96_device::ncr53cf96_device(const machine_config &mconfig, const char *ta void ncr53c90_device::device_start() { - nscsi_device::device_start(); - save_item(NAME(command)); save_item(NAME(config)); save_item(NAME(status)); @@ -261,12 +260,12 @@ void ncr53c90_device::device_reset() m_irq_handler(irq); state = IDLE; - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); drq = false; test_mode = false; m_drq_handler(drq); - scsi_bus->ctrl_w(scsi_refid, 0, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_RST); tcount = 0; tcounter = 0; tcounter_mask = 0xffff; @@ -276,7 +275,7 @@ void ncr53c90_device::device_reset() void ncr53c90_device::reset_disconnect() { - scsi_bus->ctrl_w(scsi_refid, 0, ~S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, ~S_RST); command_pos = 0; memset(command, 0, sizeof(command)); @@ -285,7 +284,7 @@ void ncr53c90_device::reset_disconnect() void ncr53c90_device::scsi_ctrl_changed() { - uint32_t ctrl = scsi_bus->ctrl_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); if(ctrl & S_RST) { LOG("scsi bus reset\n"); return; @@ -303,8 +302,8 @@ TIMER_CALLBACK_MEMBER(ncr53c90_device::update_tick) void ncr53c90_device::step(bool timeout) { - uint32_t ctrl = scsi_bus->ctrl_r(); - uint32_t data = scsi_bus->data_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); + uint32_t data = m_scsi_bus->data_r(); uint8_t c = command[0] & 0x7f; LOGMASKED(LOG_STATE, "state=%d.%d %s @ %s\n", @@ -325,7 +324,7 @@ void ncr53c90_device::step(bool timeout) case BUSRESET_WAIT_INT: state = IDLE; - scsi_bus->ctrl_w(scsi_refid, 0, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_RST); reset_disconnect(); if (!(config & 0x40)) { @@ -341,13 +340,13 @@ void ncr53c90_device::step(bool timeout) int win; for(win=7; win>=0 && !(data & (1<data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + if(win != m_scsi_id) { + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); fatalerror("ncr53c90_device::step need to wait for bus free\n"); } state = (state & STATE_MASK) | (ARB_ASSERT_SEL << SUB_SHIFT); - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); delay(6); break; } @@ -356,7 +355,7 @@ void ncr53c90_device::step(bool timeout) if(!timeout) break; - scsi_bus->data_w(scsi_refid, (1<data_w(m_scsi_refid, (1<ctrl_w(scsi_refid, c == CD_SELECT_ATN || c == CD_SELECT_ATN_STOP ? S_ATN : 0, S_ATN|S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, c == CD_SELECT_ATN || c == CD_SELECT_ATN_STOP ? S_ATN : 0, S_ATN|S_BSY); delay(2); break; @@ -377,7 +376,7 @@ void ncr53c90_device::step(bool timeout) if(ctrl & S_BSY) { state = (state & STATE_MASK) | (ARB_DESKEW_WAIT << SUB_SHIFT); if(c == CD_RESELECT) - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); delay_cycles(2); } else { state = (state & STATE_MASK) | (ARB_TIMEOUT_BUSY << SUB_SHIFT); @@ -393,8 +392,8 @@ void ncr53c90_device::step(bool timeout) if(!timeout) break; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); if(c == CD_RESELECT) { LOG("mode switch to Target\n"); @@ -409,14 +408,14 @@ void ncr53c90_device::step(bool timeout) case ARB_TIMEOUT_BUSY << SUB_SHIFT: if(timeout) { - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); LOG("select timeout\n"); state = (state & STATE_MASK) | (ARB_TIMEOUT_ABORT << SUB_SHIFT); delay(1000); } else if(ctrl & S_BSY) { state = (state & STATE_MASK) | (ARB_DESKEW_WAIT << SUB_SHIFT); if(c == CD_RESELECT) - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); delay_cycles(2); } break; @@ -428,10 +427,10 @@ void ncr53c90_device::step(bool timeout) if(ctrl & S_BSY) { state = (state & STATE_MASK) | (ARB_DESKEW_WAIT << SUB_SHIFT); if(c == CD_RESELECT) - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); delay_cycles(2); } else { - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); state = IDLE; istatus |= I_DISCONNECT; reset_disconnect(); @@ -451,8 +450,8 @@ void ncr53c90_device::step(bool timeout) if(ctrl & S_REQ) break; state = state & STATE_MASK; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; @@ -470,7 +469,7 @@ void ncr53c90_device::step(bool timeout) if((state & STATE_MASK) != INIT_XFR_RECV_PAD) { - fifo_push(scsi_bus->data_r()); + fifo_push(m_scsi_bus->data_r()); // in async mode data in phase in initiator mode, tcount is decremented on ACKO, not DACK if ((mode == MODE_I) && (sync_offset == 0) && ((ctrl & S_PHASE_MASK) == S_PHASE_DATA_IN)) { @@ -479,7 +478,7 @@ void ncr53c90_device::step(bool timeout) check_drq(); } } - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); state = (state & STATE_MASK) | (RECV_WAIT_REQ_0 << SUB_SHIFT); step(false); break; @@ -516,7 +515,7 @@ void ncr53c90_device::step(bool timeout) } else state = DISC_SEL_ATN_WAIT_REQ; - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); step(false); break; @@ -528,7 +527,7 @@ void ncr53c90_device::step(bool timeout) break; } if(c == CD_SELECT_ATN) - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); state = DISC_SEL_ATN_SEND_BYTE; send_byte(); break; @@ -551,7 +550,7 @@ void ncr53c90_device::step(bool timeout) seq = 4; else seq = 2; - scsi_bus->ctrl_wait(scsi_refid, 0, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_REQ); function_bus_complete(); break; } @@ -573,7 +572,7 @@ void ncr53c90_device::step(bool timeout) case INIT_CPT_RECV_BYTE_ACK: state = INIT_CPT_RECV_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; @@ -616,7 +615,7 @@ void ncr53c90_device::step(bool timeout) // if it's the last message byte, deassert ATN before sending if (xfr_phase == S_PHASE_MSG_OUT && remaining_bytes == 1) - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); send_byte(); break; @@ -636,7 +635,7 @@ void ncr53c90_device::step(bool timeout) break; default: - LOG("xfer on phase %d\n", scsi_bus->ctrl_r() & S_PHASE_MASK); + LOG("xfer on phase %d\n", m_scsi_bus->ctrl_r() & S_PHASE_MASK); function_complete(); break; } @@ -669,7 +668,7 @@ void ncr53c90_device::step(bool timeout) case INIT_XFR_RECV_BYTE_ACK: state = INIT_XFR_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; @@ -732,7 +731,7 @@ void ncr53c90_device::step(bool timeout) decrement_tcounter(); if(!(status & S_TC0)) { state = INIT_XFR_RECV_PAD_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); } else function_complete(); @@ -754,19 +753,19 @@ void ncr53c90_device::send_byte() if((state & STATE_MASK) != INIT_XFR_SEND_PAD) { if(!fifo_pos) fatalerror("ncr53c90_device::send_byte - !fifo_pos\n"); - scsi_bus->data_w(scsi_refid, fifo_pop()); + m_scsi_bus->data_w(m_scsi_refid, fifo_pop()); } else - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); delay_cycles(sync_period); } void ncr53c90_device::recv_byte() { - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); state = (state & STATE_MASK) | (RECV_WAIT_REQ_1 << SUB_SHIFT); step(false); } @@ -967,7 +966,7 @@ void ncr53c90_device::start_command() case CM_RESET_BUS: LOGMASKED(LOG_COMMAND, "Reset SCSI bus\n"); state = BUSRESET_WAIT_INT; - scsi_bus->ctrl_w(scsi_refid, S_RST, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, S_RST, S_RST); delay(130); break; @@ -1004,7 +1003,7 @@ void ncr53c90_device::start_command() case CI_XFER: LOGMASKED(LOG_COMMAND, "Transfer information\n"); state = INIT_XFR; - xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK; + xfr_phase = m_scsi_bus->ctrl_r() & S_PHASE_MASK; dma_set(dma_command ? ((xfr_phase & S_INP) ? DMA_IN : DMA_OUT) : DMA_NONE); check_drq(); step(false); @@ -1026,30 +1025,30 @@ void ncr53c90_device::start_command() // after ACK is asserted the device disconnects and the INIT_MSG_WAIT_REQ state is never // entered, meaning we end up with I_DISCONNECT instead of I_BUS interrupt status. seq = 2; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; case CI_PAD: LOGMASKED(LOG_COMMAND, "Transfer pad\n"); - xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK; + xfr_phase = m_scsi_bus->ctrl_r() & S_PHASE_MASK; if(xfr_phase & S_INP) state = INIT_XFR_RECV_PAD_WAIT_REQ; else state = INIT_XFR_SEND_PAD_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; case CI_SET_ATN: LOGMASKED(LOG_COMMAND, "Set ATN\n"); - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_ATN); command_pop_and_chain(); break; case CI_RESET_ATN: LOGMASKED(LOG_COMMAND, "Reset ATN\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); command_pop_and_chain(); break; @@ -1073,8 +1072,8 @@ bool ncr53c90_device::check_valid_command(uint8_t cmd) void ncr53c90_device::arbitrate() { state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT); - scsi_bus->data_w(scsi_refid, 1 << scsi_id); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 1 << m_scsi_id); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); delay(11); } @@ -1089,7 +1088,7 @@ void ncr53c90_device::check_irq() uint8_t ncr53c90_device::status_r() { - uint32_t ctrl = scsi_bus->ctrl_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); uint8_t res = status | (ctrl & S_MSG ? 4 : 0) | (ctrl & S_CTL ? 2 : 0) | (ctrl & S_INP ? 1 : 0); //LOG("status_r %02x (%s)\n", res, machine().describe_context()); @@ -1158,7 +1157,7 @@ uint8_t ncr53c90_device::conf_r() void ncr53c90_device::conf_w(uint8_t data) { config = data; - scsi_id = data & 7; + m_scsi_id = data & 7; // test mode can only be cleared by hard/soft reset if (data & 0x8) @@ -1197,7 +1196,7 @@ uint8_t ncr53c90_device::dma_r() uint8_t r = fifo_pop(); - if ((sync_offset != 0) || ((scsi_bus->ctrl_r() & S_PHASE_MASK) != S_PHASE_DATA_IN)) + if ((sync_offset != 0) || ((m_scsi_bus->ctrl_r() & S_PHASE_MASK) != S_PHASE_DATA_IN)) { decrement_tcounter(); } @@ -1289,7 +1288,7 @@ void ncr53c90a_device::device_reset() uint8_t ncr53c90a_device::status_r() { - uint32_t ctrl = scsi_bus->ctrl_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); uint8_t res = (irq ? S_INTERRUPT : 0) | status | (ctrl & S_MSG ? 4 : 0) | (ctrl & S_CTL ? 2 : 0) | (ctrl & S_INP ? 1 : 0); //LOG("status_r %02x (%s)\n", res, machine().describe_context()); if (irq && !machine().side_effects_disabled()) @@ -1339,7 +1338,7 @@ u16 ncr53c94_device::dma16_r() memmove(fifo, fifo + 2, fifo_pos); // update drq - if ((sync_offset != 0) || ((scsi_bus->ctrl_r() & S_PHASE_MASK) != S_PHASE_DATA_IN)) + if ((sync_offset != 0) || ((m_scsi_bus->ctrl_r() & S_PHASE_MASK) != S_PHASE_DATA_IN)) { decrement_tcounter(2); } diff --git a/src/devices/machine/ncr53c90.h b/src/devices/machine/ncr53c90.h index 7c7ad3d0896..df8e1d75b21 100644 --- a/src/devices/machine/ncr53c90.h +++ b/src/devices/machine/ncr53c90.h @@ -7,7 +7,7 @@ #include "machine/nscsi_bus.h" -class ncr53c90_device : public nscsi_device, public nscsi_slot_card_interface +class ncr53c90_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: ncr53c90_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/nscsi_bus.cpp b/src/devices/machine/nscsi_bus.cpp index f776d8ed15f..a02ebd35bc0 100644 --- a/src/devices/machine/nscsi_bus.cpp +++ b/src/devices/machine/nscsi_bus.cpp @@ -29,23 +29,23 @@ nscsi_bus_device::nscsi_bus_device(const machine_config &mconfig, const char *ta device_t(mconfig, NSCSI_BUS, tag, owner, clock), m_external_devices(*this, finder_base::DUMMY_TAG, 0), m_bsy_handler(*this), - data(0), - ctrl(0) + m_data(0), + m_ctrl(0) { - devcnt = 0; - std::fill(std::begin(dev), std::end(dev), dev_t{ nullptr, 0, 0, 0 }); + m_devcnt = 0; + std::fill(std::begin(m_dev), std::end(m_dev), dev_t{ nullptr, 0, 0, 0 }); } void nscsi_bus_device::device_start() { - data = 0; - ctrl = 0; - save_item(NAME(data)); - save_item(NAME(ctrl)); - for(int i=0; iscsi_ctrl_changed(); + for(int i=0; iscsi_ctrl_changed(); - if (octrl & nscsi_device::S_BSY) - m_bsy_handler((ctrl & nscsi_device::S_BSY) ? ASSERT_LINE : CLEAR_LINE); + if (octrl & nscsi_device_interface::S_BSY) + m_bsy_handler((m_ctrl & nscsi_device_interface::S_BSY) ? ASSERT_LINE : CLEAR_LINE); } } uint32_t nscsi_bus_device::data_r() const { - return data; + return m_data; } uint32_t nscsi_bus_device::ctrl_r() const { - return ctrl; + return m_ctrl; } void nscsi_bus_device::ctrl_w(int refid, uint32_t lines, uint32_t mask) { - uint32_t c = dev[refid].ctrl; - dev[refid].ctrl = (c & ~mask) | (lines & mask); + uint32_t c = m_dev[refid].m_ctrl; + m_dev[refid].m_ctrl = (c & ~mask) | (lines & mask); regen_ctrl(refid); } void nscsi_bus_device::data_w(int refid, uint32_t lines) { - dev[refid].data = lines; + m_dev[refid].m_data = lines; regen_data(); } void nscsi_bus_device::ctrl_wait(int refid, uint32_t lines, uint32_t mask) { - uint32_t w = dev[refid].wait_ctrl; - dev[refid].wait_ctrl = (w & ~mask) | (lines & mask); + uint32_t w = m_dev[refid].m_wait_ctrl; + m_dev[refid].m_wait_ctrl = (w & ~mask) | (lines & mask); } void nscsi_bus_device::device_resolve_objects() { for(int i=0; i<16; i++) { - nscsi_device *sdev = nullptr; + nscsi_device_interface *sdev = nullptr; if(m_external_devices[i]) sdev = m_external_devices[i]; else { @@ -150,8 +150,8 @@ void nscsi_bus_device::device_resolve_objects() sdev = subdev ? downcast(*subdev).get_device() : nullptr; } if(sdev) { - int rid = devcnt++; - dev[rid].dev = sdev; + int rid = m_devcnt++; + m_dev[rid].m_dev = sdev; sdev->connect_to_bus(this, rid, i); } } @@ -172,11 +172,11 @@ void nscsi_connector::device_start() { } -nscsi_device *nscsi_connector::get_device() +nscsi_device_interface *nscsi_connector::get_device() { nscsi_slot_card_interface *const connected = get_card_device(); if (connected) - return connected->device().subdevice(connected->m_nscsi.finder_tag()); + return connected->device().subdevice(connected->m_nscsi.finder_tag()); else return nullptr; } @@ -187,32 +187,33 @@ nscsi_slot_card_interface::nscsi_slot_card_interface(const machine_config &mconf { } -nscsi_device::nscsi_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, type, tag, owner, clock) +nscsi_device_interface::nscsi_device_interface(const machine_config &mconfig, device_t &device) : + device_interface(device, "nscsi-dev") { - scsi_id = scsi_refid = -1; - scsi_bus = nullptr; + m_scsi_id = m_scsi_refid = -1; + m_scsi_bus = nullptr; } -void nscsi_device::connect_to_bus(nscsi_bus_device *bus, int refid, int default_scsi_id) +void nscsi_device_interface::connect_to_bus(nscsi_bus_device *bus, int refid, int default_scsi_id) { - scsi_bus = bus; - scsi_refid = refid; - scsi_id = default_scsi_id; + m_scsi_bus = bus; + m_scsi_refid = refid; + m_scsi_id = default_scsi_id; } -void nscsi_device::scsi_ctrl_changed() +void nscsi_device_interface::scsi_ctrl_changed() { } -void nscsi_device::device_start() +void nscsi_device_interface::interface_pre_start() { - save_item(NAME(scsi_id)); + device().save_item(NAME(m_scsi_id)); } nscsi_full_device::nscsi_full_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - nscsi_device(mconfig, type, tag, owner, clock), + device_t(mconfig, type, tag, owner, clock), + nscsi_device_interface(mconfig, *this), nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) { } @@ -251,37 +252,36 @@ const char *const nscsi_full_device::command_names[256] = { void nscsi_full_device::device_start() { - nscsi_device::device_start(); - scsi_timer = timer_alloc(FUNC(nscsi_full_device::update_tick), this); - save_item(NAME(scsi_cmdbuf)); - save_item(NAME(scsi_sense_buffer)); - save_item(NAME(scsi_cmdsize)); - save_item(NAME(scsi_identify)); - save_item(NAME(scsi_state)); - save_item(NAME(scsi_substate)); - save_item(NAME(scsi_initiator_id)); - save_item(NAME(data_buffer_id)); - save_item(NAME(data_buffer_size)); - save_item(NAME(data_buffer_pos)); - save_item(NAME(buf_control_rpos)); - save_item(NAME(buf_control_wpos)); + m_scsi_timer = timer_alloc(FUNC(nscsi_full_device::update_tick), this); + save_item(NAME(m_scsi_cmdbuf)); + save_item(NAME(m_scsi_sense_buffer)); + save_item(NAME(m_scsi_cmdsize)); + save_item(NAME(m_scsi_identify)); + save_item(NAME(m_scsi_state)); + save_item(NAME(m_scsi_substate)); + save_item(NAME(m_scsi_initiator_id)); + save_item(NAME(m_data_buffer_id)); + save_item(NAME(m_data_buffer_size)); + save_item(NAME(m_data_buffer_pos)); + save_item(NAME(m_buf_control_rpos)); + save_item(NAME(m_buf_control_wpos)); for(int i=0; i<32; i++) { - save_item(NAME(buf_control[i].action), i); - save_item(NAME(buf_control[i].param1), i); - save_item(NAME(buf_control[i].param2), i); + save_item(NAME(m_buf_control[i].m_action), i); + save_item(NAME(m_buf_control[i].m_param1), i); + save_item(NAME(m_buf_control[i].m_param2), i); } } void nscsi_full_device::device_reset() { - scsi_state = scsi_substate = IDLE; - buf_control_rpos = buf_control_wpos = 0; - scsi_identify = 0; - data_buffer_size = 0; - data_buffer_pos = 0; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_state = m_scsi_substate = IDLE; + m_buf_control_rpos = m_buf_control_wpos = 0; + m_scsi_identify = 0; + m_data_buffer_size = 0; + m_data_buffer_pos = 0; + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); sense(false, SK_NO_SENSE); } @@ -297,167 +297,167 @@ void nscsi_full_device::scsi_ctrl_changed() void nscsi_full_device::step(bool timeout) { - uint32_t ctrl = scsi_bus->ctrl_r(); - uint32_t data = scsi_bus->data_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); + uint32_t data = m_scsi_bus->data_r(); if(ctrl & S_RST) { - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_state = IDLE; + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_state = IDLE; LOG("scsi bus reset\n"); - scsi_state = scsi_substate = IDLE; - buf_control_rpos = buf_control_wpos = 0; - scsi_identify = 0; - data_buffer_size = 0; - data_buffer_pos = 0; + m_scsi_state = m_scsi_substate = IDLE; + m_buf_control_rpos = m_buf_control_wpos = 0; + m_scsi_identify = 0; + m_data_buffer_size = 0; + m_data_buffer_pos = 0; return; } LOGMASKED(LOG_STATE, "state=%d.%d %s\n", - scsi_state & STATE_MASK, (scsi_state & SUB_MASK) >> SUB_SHIFT, + m_scsi_state & STATE_MASK, (m_scsi_state & SUB_MASK) >> SUB_SHIFT, timeout ? "timeout" : "change"); - switch(scsi_state & SUB_MASK ? scsi_state & SUB_MASK : scsi_state & STATE_MASK) { + switch(m_scsi_state & SUB_MASK ? m_scsi_state & SUB_MASK : m_scsi_state & STATE_MASK) { case IDLE: - if(((ctrl & (S_SEL|S_BSY)) == S_SEL) && (scsi_id != -1) && ((data & (1 << scsi_id)) != 0)) { - for(scsi_initiator_id = 0; scsi_initiator_id != 16 && (scsi_initiator_id == scsi_id || (data & (1 << scsi_initiator_id))); scsi_initiator_id++) {}; - if(scsi_initiator_id == 16) - scsi_initiator_id = -1; - scsi_state = TARGET_SELECT_WAIT_BUS_SETTLE; - scsi_timer->adjust(scsi_bus_settle_delay(), true); + if(((ctrl & (S_SEL|S_BSY)) == S_SEL) && (m_scsi_id != -1) && ((data & (1 << m_scsi_id)) != 0)) { + for(m_scsi_initiator_id = 0; m_scsi_initiator_id != 16 && (m_scsi_initiator_id == m_scsi_id || (data & (1 << m_scsi_initiator_id))); m_scsi_initiator_id++) {}; + if(m_scsi_initiator_id == 16) + m_scsi_initiator_id = -1; + m_scsi_state = TARGET_SELECT_WAIT_BUS_SETTLE; + m_scsi_timer->adjust(scsi_bus_settle_delay(), true); } break; case TARGET_SELECT_WAIT_BUS_SETTLE: if((ctrl & (S_SEL|S_BSY)) == S_SEL) { - scsi_state = TARGET_SELECT_WAIT_SEL_0; - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_state = TARGET_SELECT_WAIT_SEL_0; + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); } else - scsi_state = IDLE; + m_scsi_state = IDLE; break; case TARGET_SELECT_WAIT_SEL_0: if(ctrl & S_SEL) break; - buf_control_push()->action = BC_MSG_OR_COMMAND; - scsi_state = TARGET_NEXT_CONTROL; + buf_control_push()->m_action = BC_MSG_OR_COMMAND; + m_scsi_state = TARGET_NEXT_CONTROL; step(false); break; case RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT: if(ctrl & S_ACK) { - scsi_put_data(data_buffer_id, data_buffer_pos++, scsi_bus->data_r()); - scsi_state = (scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); - scsi_bus->ctrl_w(scsi_refid, 0, S_REQ); + scsi_put_data(m_data_buffer_id, m_data_buffer_pos++, m_scsi_bus->data_r()); + m_scsi_state = (m_scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ); } break; case RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT: if(!(ctrl & S_ACK)) { - scsi_state &= STATE_MASK; - scsi_bus->ctrl_wait(scsi_refid, 0, S_ACK); + m_scsi_state &= STATE_MASK; + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); attotime delay = scsi_data_byte_period(); if (delay == attotime::zero) { step(false); } else { - scsi_timer->adjust(delay, false); + m_scsi_timer->adjust(delay, false); } } break; case SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT: if(ctrl & S_ACK) { - scsi_state = (scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_REQ); + m_scsi_state = (m_scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ); } break; case SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT: if(!(ctrl & S_ACK)) { - scsi_state &= STATE_MASK; - scsi_bus->ctrl_wait(scsi_refid, 0, S_ACK); + m_scsi_state &= STATE_MASK; + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); attotime delay = scsi_data_byte_period(); if (delay == attotime::zero) { step(false); } else { - scsi_timer->adjust(delay, false); + m_scsi_timer->adjust(delay, false); } } break; case TARGET_NEXT_CONTROL: { control *ctl = buf_control_pop(); - switch(ctl->action) { + switch(ctl->m_action) { case BC_MSG_OR_COMMAND: - data_buffer_id = SBUF_MAIN; - data_buffer_pos = 0; + m_data_buffer_id = SBUF_MAIN; + m_data_buffer_pos = 0; if(ctrl & S_ATN) { - scsi_state = TARGET_WAIT_MSG_BYTE; - scsi_bus->ctrl_w(scsi_refid, S_PHASE_MSG_OUT, S_PHASE_MASK); + m_scsi_state = TARGET_WAIT_MSG_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_MSG_OUT, S_PHASE_MASK); } else { - scsi_state = TARGET_WAIT_CMD_BYTE; - scsi_bus->ctrl_w(scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); + m_scsi_state = TARGET_WAIT_CMD_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); } target_recv_byte(); break; case BC_STATUS: - scsi_bus->ctrl_w(scsi_refid, S_PHASE_STATUS, S_PHASE_MASK); - target_send_byte(ctl->param1); + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_STATUS, S_PHASE_MASK); + target_send_byte(ctl->m_param1); break; case BC_DATA_IN: - scsi_bus->ctrl_w(scsi_refid, S_PHASE_DATA_IN, S_PHASE_MASK); - data_buffer_id = ctl->param1; - data_buffer_size = ctl->param2; - data_buffer_pos = 0; - if (data_buffer_size > 0) { - scsi_state = TARGET_WAIT_DATA_IN_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_DATA_IN, S_PHASE_MASK); + m_data_buffer_id = ctl->m_param1; + m_data_buffer_size = ctl->m_param2; + m_data_buffer_pos = 0; + if (m_data_buffer_size > 0) { + m_scsi_state = TARGET_WAIT_DATA_IN_BYTE; } else { - scsi_state = TARGET_NEXT_CONTROL; + m_scsi_state = TARGET_NEXT_CONTROL; } step(false); break; case BC_DATA_OUT: - scsi_bus->ctrl_w(scsi_refid, S_PHASE_DATA_OUT, S_PHASE_MASK); - data_buffer_id = ctl->param1; - data_buffer_size = ctl->param2; - data_buffer_pos = 0; - if (data_buffer_size > 0) { - scsi_state = TARGET_WAIT_DATA_OUT_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_DATA_OUT, S_PHASE_MASK); + m_data_buffer_id = ctl->m_param1; + m_data_buffer_size = ctl->m_param2; + m_data_buffer_pos = 0; + if (m_data_buffer_size > 0) { + m_scsi_state = TARGET_WAIT_DATA_OUT_BYTE; } else { - scsi_state = TARGET_NEXT_CONTROL; + m_scsi_state = TARGET_NEXT_CONTROL; } step(false); break; case BC_MESSAGE_1: - scsi_bus->ctrl_w(scsi_refid, S_PHASE_MSG_IN, S_PHASE_MASK); - target_send_byte(ctl->param1); + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_MSG_IN, S_PHASE_MASK); + target_send_byte(ctl->m_param1); break; case BC_BUS_FREE: - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_wait(scsi_refid, S_BSY|S_SEL|S_RST, S_ALL); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_state = IDLE; + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_BSY|S_SEL|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_state = IDLE; break; }; break; } case TARGET_WAIT_DATA_IN_BYTE: - if(data_buffer_pos == data_buffer_size-1) - scsi_state = TARGET_NEXT_CONTROL; + if(m_data_buffer_pos == m_data_buffer_size-1) + m_scsi_state = TARGET_NEXT_CONTROL; target_send_buffer_byte(); break; case TARGET_WAIT_DATA_OUT_BYTE: - if(data_buffer_pos == data_buffer_size-1) - scsi_state = TARGET_NEXT_CONTROL; + if(m_data_buffer_pos == m_data_buffer_size-1) + m_scsi_state = TARGET_NEXT_CONTROL; target_recv_byte(); break; @@ -465,12 +465,12 @@ void nscsi_full_device::step(bool timeout) if(ctrl & S_SEL) return; if(!(ctrl & S_ATN)) { - scsi_cmdsize = data_buffer_pos; + m_scsi_cmdsize = m_data_buffer_pos; scsi_message(); - data_buffer_id = SBUF_MAIN; - data_buffer_pos = 0; - scsi_state = TARGET_WAIT_CMD_BYTE; - scsi_bus->ctrl_w(scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); + m_data_buffer_id = SBUF_MAIN; + m_data_buffer_pos = 0; + m_scsi_state = TARGET_WAIT_CMD_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); } target_recv_byte(); break; @@ -480,20 +480,20 @@ void nscsi_full_device::step(bool timeout) return; if(ctrl & S_ATN) { LOG("Parity error? Say what?\n"); - scsi_state = IDLE; + m_scsi_state = IDLE; break; } - if(scsi_command_done(scsi_cmdbuf[0], data_buffer_pos)) { - scsi_cmdsize = data_buffer_pos; - scsi_bus->ctrl_wait(scsi_refid, 0, S_ACK); + if(scsi_command_done(m_scsi_cmdbuf[0], m_data_buffer_pos)) { + m_scsi_cmdsize = m_data_buffer_pos; + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); scsi_command(); - scsi_state = TARGET_NEXT_CONTROL; + m_scsi_state = TARGET_NEXT_CONTROL; attotime delay = scsi_data_command_delay(); if (delay == attotime::zero) { step(false); } else { - scsi_timer->adjust(delay, false); + m_scsi_timer->adjust(delay, false); } } else target_recv_byte(); @@ -501,25 +501,25 @@ void nscsi_full_device::step(bool timeout) default: LOG("step() unexpected state %d.%d\n", - scsi_state & STATE_MASK, (scsi_state & SUB_MASK) >> SUB_SHIFT); + m_scsi_state & STATE_MASK, (m_scsi_state & SUB_MASK) >> SUB_SHIFT); exit(0); } } void nscsi_full_device::target_recv_byte() { - scsi_bus->ctrl_wait(scsi_refid, S_ACK, S_ACK); - scsi_state = (scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); - scsi_bus->ctrl_w(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ACK, S_ACK); + m_scsi_state = (m_scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); + m_scsi_bus->ctrl_w(m_scsi_refid, S_REQ, S_REQ); step(false); } void nscsi_full_device::target_send_byte(uint8_t val) { - scsi_bus->ctrl_wait(scsi_refid, S_ACK, S_ACK); - scsi_state = (scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); - scsi_bus->data_w(scsi_refid, val); - scsi_bus->ctrl_w(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ACK, S_ACK); + m_scsi_state = (m_scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); + m_scsi_bus->data_w(m_scsi_refid, val); + m_scsi_bus->ctrl_w(m_scsi_refid, S_REQ, S_REQ); step(false); } @@ -527,10 +527,10 @@ uint8_t nscsi_full_device::scsi_get_data(int id, int pos) { switch(id) { case SBUF_MAIN: - LOGMASKED(LOG_DATA, "scsi_get_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, scsi_cmdbuf[pos], scsi_cmdbuf[pos] >= 0x20 && scsi_cmdbuf[pos] < 0x7f ? (char)scsi_cmdbuf[pos] : ' '); - return scsi_cmdbuf[pos]; + LOGMASKED(LOG_DATA, "scsi_get_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, m_scsi_cmdbuf[pos], m_scsi_cmdbuf[pos] >= 0x20 && m_scsi_cmdbuf[pos] < 0x7f ? (char)m_scsi_cmdbuf[pos] : ' '); + return m_scsi_cmdbuf[pos]; case SBUF_SENSE: - return scsi_sense_buffer[pos]; + return m_scsi_sense_buffer[pos]; default: fatalerror("nscsi_full_device::scsi_get_data - unknown id\n"); } @@ -541,10 +541,10 @@ void nscsi_full_device::scsi_put_data(int id, int pos, uint8_t data) switch(id) { case SBUF_MAIN: LOGMASKED(LOG_DATA, "nscsi_bus: scsi_put_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); - scsi_cmdbuf[pos] = data; + m_scsi_cmdbuf[pos] = data; break; case SBUF_SENSE: - scsi_sense_buffer[pos] = data; + m_scsi_sense_buffer[pos] = data; break; default: fatalerror("nscsi_full_device::scsi_put_data - unknown id %d\n", id); @@ -553,7 +553,7 @@ void nscsi_full_device::scsi_put_data(int id, int pos, uint8_t data) void nscsi_full_device::target_send_buffer_byte() { - target_send_byte(scsi_get_data(data_buffer_id, data_buffer_pos++)); + target_send_byte(scsi_get_data(m_data_buffer_id, m_data_buffer_pos++)); } bool nscsi_full_device::scsi_command_done(uint8_t command, uint8_t length) @@ -577,23 +577,23 @@ bool nscsi_full_device::scsi_command_done(uint8_t command, uint8_t length) nscsi_full_device::control *nscsi_full_device::buf_control_push() { - if(buf_control_wpos == int(std::size(buf_control))) + if(m_buf_control_wpos == int(std::size(m_buf_control))) throw emu_fatalerror("%s: buf_control overflow\n", tag()); - control *c = buf_control + buf_control_wpos; - buf_control_wpos++; + control *c = m_buf_control + m_buf_control_wpos; + m_buf_control_wpos++; return c; } nscsi_full_device::control *nscsi_full_device::buf_control_pop() { - if(buf_control_rpos == buf_control_wpos) + if(m_buf_control_rpos == m_buf_control_wpos) throw emu_fatalerror("%s: buf_control underflow\n", tag()); - control *c = buf_control + buf_control_rpos; - buf_control_rpos++; - if(buf_control_rpos == buf_control_wpos) - buf_control_rpos = buf_control_wpos = 0; + control *c = m_buf_control + m_buf_control_rpos; + m_buf_control_rpos++; + if(m_buf_control_rpos == m_buf_control_wpos) + m_buf_control_rpos = m_buf_control_wpos = 0; return c; } @@ -601,13 +601,13 @@ void nscsi_full_device::scsi_status_complete(uint8_t st) { control *c; c = buf_control_push(); - c->action = BC_STATUS; - c->param1 = st; + c->m_action = BC_STATUS; + c->m_param1 = st; c = buf_control_push(); - c->action = BC_MESSAGE_1; - c->param1 = SM_COMMAND_COMPLETE; + c->m_action = BC_MESSAGE_1; + c->m_param1 = SM_COMMAND_COMPLETE; c = buf_control_push(); - c->action = BC_BUS_FREE; + c->m_action = BC_BUS_FREE; } void nscsi_full_device::scsi_data_in(int buf, int size) @@ -618,47 +618,47 @@ void nscsi_full_device::scsi_data_in(int buf, int size) if(sz > 50) sz = 50; for(int i=0; i sz) dt += " ..."; LOGMASKED(LOG_DATA_SENT, "Sending data (%d)%s\n", size, dt); } control *c; c = buf_control_push(); - c->action = BC_DATA_IN; - c->param1 = buf; - c->param2 = size; + c->m_action = BC_DATA_IN; + c->m_param1 = buf; + c->m_param2 = size; } void nscsi_full_device::scsi_data_out(int buf, int size) { control *c; c = buf_control_push(); - c->action = BC_DATA_OUT; - c->param1 = buf; - c->param2 = size; + c->m_action = BC_DATA_OUT; + c->m_param1 = buf; + c->m_param2 = size; } ////////////////////////////////////////////////////////////////////////////// void nscsi_full_device::set_sense_data(const u8 sense_key, const u16 sense_key_code, const sense_data *data) { - assert(sizeof(scsi_sense_buffer) >= 18); + assert(sizeof(m_scsi_sense_buffer) >= 18); assert(sense_key <= 0x0f); - memset(scsi_sense_buffer, 0, 18); + memset(m_scsi_sense_buffer, 0, 18); if (data) { - scsi_sense_buffer[0] = (data->invalid ? 0 : 0x80) // even though SCSI-2 section 8.2.14 implies valid bit should always be set, other sections such as 10.2.12 disagree! + m_scsi_sense_buffer[0] = (data->invalid ? 0 : 0x80) // even though SCSI-2 section 8.2.14 implies valid bit should always be set, other sections such as 10.2.12 disagree! | (data->deferred ? 0x71 : 0x70); - scsi_sense_buffer[2] = (data->filemark ? 0x80 : 0) + m_scsi_sense_buffer[2] = (data->filemark ? 0x80 : 0) | (data->eom ? 0x40 : 0) | (data->bad_len ? 0x20 : 0); // "incorrect length indicator" - put_s32be(&scsi_sense_buffer[3], data->info); + put_s32be(&m_scsi_sense_buffer[3], data->info); } else - scsi_sense_buffer[0] = 0xf0; - scsi_sense_buffer[2] |= sense_key; - scsi_sense_buffer[7] = 10; // additional sense length - put_u16be(&scsi_sense_buffer[12], sense_key_code); + m_scsi_sense_buffer[0] = 0xf0; + m_scsi_sense_buffer[2] |= sense_key; + m_scsi_sense_buffer[7] = 10; // additional sense length + put_u16be(&m_scsi_sense_buffer[12], sense_key_code); } void nscsi_full_device::sense(bool deferred, uint8_t key, uint8_t asc, uint8_t ascq) @@ -806,9 +806,9 @@ void nscsi_full_device::report_erase_failure() void nscsi_full_device::scsi_unknown_command() { - std::string txt = util::string_format("Unhandled command %s (%d):", command_names[scsi_cmdbuf[0]], scsi_cmdsize); - for(int i=0; i != scsi_cmdsize; i++) - txt += util::string_format(" %02x", scsi_cmdbuf[i]); + std::string txt = util::string_format("Unhandled command %s (%d):", command_names[m_scsi_cmdbuf[0]], m_scsi_cmdsize); + for(int i=0; i != m_scsi_cmdsize; i++) + txt += util::string_format(" %02x", m_scsi_cmdbuf[i]); LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt); scsi_status_complete(SS_CHECK_CONDITION); @@ -817,8 +817,8 @@ void nscsi_full_device::scsi_unknown_command() void nscsi_full_device::scsi_command() { - const u8 cmd = scsi_cmdbuf[0]; - const u8 lun = get_lun(scsi_cmdbuf[1] >> 5); // LUN may be overridden by IDENTIFY, per SCSI-2 section 7.2.2 + const u8 cmd = m_scsi_cmdbuf[0]; + const u8 lun = get_lun(m_scsi_cmdbuf[1] >> 5); // LUN may be overridden by IDENTIFY, per SCSI-2 section 7.2.2 switch(cmd) { case SC_REZERO_UNIT: LOG("command REZERO UNIT\n"); @@ -835,34 +835,34 @@ void nscsi_full_device::scsi_command() void nscsi_full_device::handle_request_sense(const u8 lun) // mandatory; SCSI-2 section 8.2.14 { - const u8 alloc_len = scsi_cmdbuf[4]; // allocation length + const u8 alloc_len = m_scsi_cmdbuf[4]; // allocation length LOG("command REQUEST SENSE lun=%d alloc_len=%d\n", lun, alloc_len); - if ((scsi_cmdbuf[1] & 0x1f) || scsi_cmdbuf[2] || scsi_cmdbuf[3]) // error: reserved bits set + if ((m_scsi_cmdbuf[1] & 0x1f) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3]) // error: reserved bits set return report_bad_cdb_field(); - assert(sizeof(scsi_sense_buffer) >= 18); + assert(sizeof(m_scsi_sense_buffer) >= 18); scsi_data_in(SBUF_SENSE, std::min(18, (const int)alloc_len)); scsi_status_complete(SS_GOOD); } void nscsi_full_device::scsi_message() { - if(scsi_cmdbuf[0] & 0x80) { - scsi_identify = scsi_cmdbuf[0]; + if(m_scsi_cmdbuf[0] & 0x80) { + m_scsi_identify = m_scsi_cmdbuf[0]; return; } std::string txt = "Unknown message"; - for(int i=0; i != scsi_cmdsize; i++) - txt += util::string_format(" %02x", scsi_cmdbuf[i]); + for(int i=0; i != m_scsi_cmdsize; i++) + txt += util::string_format(" %02x", m_scsi_cmdbuf[i]); LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt); } int nscsi_full_device::get_lun(int def) { - if(scsi_identify & 0x80) + if(m_scsi_identify & 0x80) // lower 3 bits contain LUNTRN - return scsi_identify & 0x07; + return m_scsi_identify & 0x07; return def; } diff --git a/src/devices/machine/nscsi_bus.h b/src/devices/machine/nscsi_bus.h index 8084e5bb5d2..67fc815186a 100644 --- a/src/devices/machine/nscsi_bus.h +++ b/src/devices/machine/nscsi_bus.h @@ -6,7 +6,7 @@ #pragma once -class nscsi_device; +class nscsi_device_interface; class nscsi_slot_card_interface; class nscsi_bus_device : public device_t @@ -32,19 +32,19 @@ protected: private: struct dev_t { - nscsi_device *dev; - uint32_t ctrl, wait_ctrl; - uint32_t data; + nscsi_device_interface *m_dev; + uint32_t m_ctrl, m_wait_ctrl; + uint32_t m_data; }; - optional_device_array m_external_devices; + optional_device_array m_external_devices; devcb_write_line m_bsy_handler; - dev_t dev[16]; - int devcnt; + dev_t m_dev[16]; + int m_devcnt; - uint32_t data, ctrl; + uint32_t m_data, m_ctrl; void regen_data(); void regen_ctrl(int refid); @@ -66,7 +66,7 @@ public: nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~nscsi_connector(); - nscsi_device *get_device(); + nscsi_device_interface *get_device(); protected: virtual void device_start() override ATTR_COLD; @@ -80,10 +80,10 @@ public: nscsi_slot_card_interface(const machine_config &mconfig, device_t &device, const char *nscsi_tag); private: - required_device m_nscsi; + required_device m_nscsi; }; -class nscsi_device : public device_t +class nscsi_device_interface : public device_interface { public: // Here because the biggest users are the devices, not the bus @@ -139,16 +139,16 @@ public: virtual void scsi_ctrl_changed(); protected: - nscsi_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + nscsi_device_interface(const machine_config &mconfig, device_t &device); - virtual void device_start() override ATTR_COLD; + virtual void interface_pre_start() override ATTR_COLD; - int scsi_id; - int scsi_refid; - nscsi_bus_device *scsi_bus; + int m_scsi_id; + int m_scsi_refid; + nscsi_bus_device *m_scsi_bus; }; -class nscsi_full_device : public nscsi_device, public nscsi_slot_card_interface +class nscsi_full_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: virtual void scsi_ctrl_changed() override; @@ -794,10 +794,10 @@ protected: // Command delay (immediate) virtual attotime scsi_data_command_delay(); - uint8_t scsi_cmdbuf[4096]; - uint8_t scsi_sense_buffer[18]; - int scsi_cmdsize; - uint8_t scsi_identify; + uint8_t m_scsi_cmdbuf[4096]; + uint8_t m_scsi_sense_buffer[18]; + int m_scsi_cmdsize; + uint8_t m_scsi_identify; private: enum { @@ -839,19 +839,19 @@ private: }; struct control { - int action; - int param1, param2; + int m_action; + int m_param1, m_param2; }; - emu_timer *scsi_timer; + emu_timer *m_scsi_timer; - int scsi_state, scsi_substate; - int scsi_initiator_id; - int data_buffer_id, data_buffer_size, data_buffer_pos; + int m_scsi_state, m_scsi_substate; + int m_scsi_initiator_id; + int m_data_buffer_id, m_data_buffer_size, m_data_buffer_pos; - control buf_control[32]; - int buf_control_rpos; - int buf_control_wpos; + control m_buf_control[32]; + int m_buf_control_rpos; + int m_buf_control_wpos; control *buf_control_push(); control *buf_control_pop(); diff --git a/src/devices/machine/nscsi_cb.cpp b/src/devices/machine/nscsi_cb.cpp index b4d80bed9f6..fdcd4a630a2 100644 --- a/src/devices/machine/nscsi_cb.cpp +++ b/src/devices/machine/nscsi_cb.cpp @@ -6,7 +6,8 @@ DEFINE_DEVICE_TYPE(NSCSI_CB, nscsi_callback_device, "nscsi_cb", "SCSI callback (new)") nscsi_callback_device::nscsi_callback_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - nscsi_device(mconfig, NSCSI_CB, tag, owner, clock), + device_t(mconfig, NSCSI_CB, tag, owner, clock), + nscsi_device_interface(mconfig, *this), nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_write_rst(*this), m_write_atn(*this), @@ -28,13 +29,13 @@ void nscsi_callback_device::device_start() void nscsi_callback_device::device_reset() { - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ALL, S_ALL); } void nscsi_callback_device::scsi_ctrl_changed() { - m_ctrl = scsi_bus->ctrl_r(); + m_ctrl = m_scsi_bus->ctrl_r(); m_write_rst((m_ctrl & S_RST) ? 1 : 0); m_write_atn((m_ctrl & S_ATN) ? 1 : 0); diff --git a/src/devices/machine/nscsi_cb.h b/src/devices/machine/nscsi_cb.h index acaf22a3400..c74c2bfcbff 100644 --- a/src/devices/machine/nscsi_cb.h +++ b/src/devices/machine/nscsi_cb.h @@ -8,7 +8,7 @@ #include "machine/nscsi_bus.h" -class nscsi_callback_device : public nscsi_device, public nscsi_slot_card_interface +class nscsi_callback_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: nscsi_callback_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -25,9 +25,9 @@ public: virtual void scsi_ctrl_changed() override; - uint8_t read() { return scsi_bus->data_r(); } + uint8_t read() { return m_scsi_bus->data_r(); } - void write(uint8_t data) { scsi_bus->data_w(scsi_refid, data); } + void write(uint8_t data) { m_scsi_bus->data_w(m_scsi_refid, data); } int rst_r() { return (m_ctrl & S_RST) ? 1 : 0; } int atn_r() { return (m_ctrl & S_ATN) ? 1 : 0; } @@ -39,15 +39,15 @@ public: int sel_r() { return (m_ctrl & S_SEL) ? 1 : 0; } int bsy_r() { return (m_ctrl & S_BSY) ? 1 : 0; } - void rst_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_RST : 0, S_RST); } - void atn_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_ATN : 0, S_ATN); } - void ack_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_ACK : 0, S_ACK); } - void req_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_REQ : 0, S_REQ); } - void msg_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_MSG : 0, S_MSG); } - void io_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_INP : 0, S_INP); } - void cd_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_CTL : 0, S_CTL); } - void sel_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_SEL : 0, S_SEL); } - void bsy_w(int state) { scsi_bus->ctrl_w(scsi_refid, state ? S_BSY : 0, S_BSY); } + void rst_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_RST : 0, S_RST); } + void atn_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_ATN : 0, S_ATN); } + void ack_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_ACK : 0, S_ACK); } + void req_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_REQ : 0, S_REQ); } + void msg_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_MSG : 0, S_MSG); } + void io_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_INP : 0, S_INP); } + void cd_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_CTL : 0, S_CTL); } + void sel_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_SEL : 0, S_SEL); } + void bsy_w(int state) { m_scsi_bus->ctrl_w(m_scsi_refid, state ? S_BSY : 0, S_BSY); } protected: virtual void device_start() override ATTR_COLD; diff --git a/src/devices/machine/spifi3.cpp b/src/devices/machine/spifi3.cpp index d0ea43147c0..c89e5229ce1 100644 --- a/src/devices/machine/spifi3.cpp +++ b/src/devices/machine/spifi3.cpp @@ -250,7 +250,8 @@ namespace } spifi3_device::spifi3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : - nscsi_device(mconfig, SPIFI3, tag, owner, clock), + device_t(mconfig, SPIFI3, tag, owner, clock), + nscsi_device_interface(mconfig, *this), nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_even_fifo(), m_odd_fifo(), @@ -261,8 +262,6 @@ spifi3_device::spifi3_device(machine_config const &mconfig, char const *tag, dev void spifi3_device::device_start() { - nscsi_device::device_start(); - save_item(NAME(dma_dir)); save_item(NAME(mode)); save_item(NAME(xfr_data_source)); @@ -444,7 +443,7 @@ void spifi3_device::imask_w(uint32_t data) uint32_t spifi3_device::prstat_r() { - auto ctrl = scsi_bus->ctrl_r(); + auto ctrl = m_scsi_bus->ctrl_r(); // TODO: PRS_Z (disconnect state?) uint32_t prstat = 0; @@ -460,7 +459,7 @@ uint32_t spifi3_device::prstat_r() uint32_t spifi3_device::init_status_r() { // NetBSD only lists this bit, but there is probably more in this register. - const auto init_status = (scsi_bus->ctrl_r() & S_ACK) > 0 ? INIT_STATUS_ACK : 0x0; + const auto init_status = (m_scsi_bus->ctrl_r() & S_ACK) > 0 ? INIT_STATUS_ACK : 0x0; LOGMASKED(LOG_REGISTER, "read spifi_reg.init_status = 0x%x\n", init_status); return init_status; } @@ -603,7 +602,7 @@ void spifi3_device::auxctrl_w(uint32_t data) { LOG("SETRST asserted - resetting SCSI bus\n"); state = BUSRESET_WAIT_INT; - scsi_bus->ctrl_w(scsi_refid, S_RST, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, S_RST, S_RST); delay(130); } if (spifi_reg.auxctrl & AUXCTRL_DMAEDGE) @@ -701,7 +700,7 @@ void spifi3_device::prcmd_w(uint32_t data) case PRC_DATAOUT: { state = INIT_XFR; - xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK; + xfr_phase = m_scsi_bus->ctrl_r() & S_PHASE_MASK; const dma_direction luntar_dma_setting = dma_setting(bus_id) == DMA_OUT ? DMA_OUT : DMA_NONE; dma_set(luntar_dma_setting); @@ -712,7 +711,7 @@ void spifi3_device::prcmd_w(uint32_t data) case PRC_DATAIN: { state = INIT_XFR; - xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK; + xfr_phase = m_scsi_bus->ctrl_r() & S_PHASE_MASK; const dma_direction luntar_dma_setting = dma_setting(bus_id) == DMA_IN ? DMA_IN : DMA_NONE; dma_set(luntar_dma_setting); @@ -727,7 +726,7 @@ void spifi3_device::prcmd_w(uint32_t data) { LOGMASKED(LOG_CMD, "start command %s\n", prcmd_command_names[cmd]); state = INIT_XFR; - xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK; + xfr_phase = m_scsi_bus->ctrl_r() & S_PHASE_MASK; command_pos = 0; dma_set(DMA_NONE); @@ -737,7 +736,7 @@ void spifi3_device::prcmd_w(uint32_t data) case PRC_TRPAD: { LOGMASKED(LOG_CMD, "start command TRPAD\n"); - xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK; + xfr_phase = m_scsi_bus->ctrl_r() & S_PHASE_MASK; if (xfr_phase & S_INP) { state = INIT_XFR_RECV_PAD_WAIT_REQ; @@ -746,7 +745,7 @@ void spifi3_device::prcmd_w(uint32_t data) { state = INIT_XFR_SEND_PAD_WAIT_REQ; } - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); break; } default: @@ -885,7 +884,7 @@ bool spifi3_device::transfer_count_zero() void spifi3_device::reset_disconnect() { - scsi_bus->ctrl_w(scsi_refid, 0, ~S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, ~S_RST); command_pos = 0; mode = MODE_D; @@ -902,29 +901,29 @@ void spifi3_device::send_byte(scsi_data_target data_source) { fatalerror("%s: Tried to send command past the end of cdb! Command_pos: %d", tag(), command_pos); } - LOGMASKED(LOG_CMD, "Sending byte from cmbuf[%d].cdb[%d] = 0x%x\n", scsi_id, command_pos, spifi_reg.cmbuf[scsi_id].cdb[command_pos]); - scsi_bus->data_w(scsi_refid, spifi_reg.cmbuf[scsi_id].cdb[command_pos++]); + LOGMASKED(LOG_CMD, "Sending byte from cmbuf[%d].cdb[%d] = 0x%x\n", m_scsi_id, command_pos, spifi_reg.cmbuf[m_scsi_id].cdb[command_pos]); + m_scsi_bus->data_w(m_scsi_refid, spifi_reg.cmbuf[m_scsi_id].cdb[command_pos++]); } else if (data_source == FIFO && (state & STATE_MASK) != INIT_XFR_SEND_PAD) { // Send next data from FIFO - scsi_bus->data_w(scsi_refid, m_even_fifo.pop()); + m_scsi_bus->data_w(m_scsi_refid, m_even_fifo.pop()); check_drq(); } else { - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); } - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); delay_cycles(sync_period); } void spifi3_device::recv_byte() { // Wait for valid input - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); state = (state & STATE_MASK) | (RECV_WAIT_REQ_1 << SUB_SHIFT); step(false); } @@ -1014,8 +1013,8 @@ void spifi3_device::delay_cycles(uint32_t cycles) void spifi3_device::arbitrate() { state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT); - scsi_bus->data_w(scsi_refid, 1 << scsi_id); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 1 << m_scsi_id); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); delay(11); } @@ -1039,7 +1038,7 @@ uint8_t spifi3_device::dma_r() void spifi3_device::scsi_ctrl_changed() { - uint32_t ctrl = scsi_bus->ctrl_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); if (ctrl & S_RST) { LOG("scsi bus reset\n"); @@ -1125,7 +1124,7 @@ void spifi3_device::start_automsg(uint32_t msg_phase) void spifi3_device::start_autocmd() { LOGMASKED(LOG_AUTO, "start AUTOCMD\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); // Deassert ACK since we are automatically moving to the command phase + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); // Deassert ACK since we are automatically moving to the command phase state = INIT_XFR; xfr_phase = S_PHASE_COMMAND; spifi_reg.spstat = SPS_COMMAND; @@ -1179,8 +1178,8 @@ void spifi3_device::auto_phase_transfer(uint32_t new_phase) void spifi3_device::step(bool timeout) { - uint32_t ctrl = scsi_bus->ctrl_r(); - uint32_t data = scsi_bus->data_r(); + uint32_t ctrl = m_scsi_bus->ctrl_r(); + uint32_t data = m_scsi_bus->data_r(); LOGMASKED(LOG_STATE, "state=%d.%d %s\n", state & STATE_MASK, (state & SUB_MASK) >> SUB_SHIFT, timeout ? "timeout" : "change"); @@ -1203,7 +1202,7 @@ void spifi3_device::step(bool timeout) case BUSRESET_WAIT_INT: // Bus was reset by a command, go to idle state and clear reset signal { state = IDLE; - scsi_bus->ctrl_w(scsi_refid, 0, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_RST); reset_disconnect(); break; } @@ -1221,16 +1220,16 @@ void spifi3_device::step(bool timeout) { } - if (arbitrationWinner != scsi_id) + if (arbitrationWinner != m_scsi_id) { - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); fatalerror("%s: need to wait for bus free (lost arbitration)\n", tag()); } // Now that we won arbitration, we need to assert SEL and wait for the bus to settle. state = (state & STATE_MASK) | (ARB_ASSERT_SEL << SUB_SHIFT); - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); delay(6); break; } @@ -1243,7 +1242,7 @@ void spifi3_device::step(bool timeout) } bus_id = get_target_id(); - scsi_bus->data_w(scsi_refid, (1 << scsi_id) | (1 << bus_id)); + m_scsi_bus->data_w(m_scsi_refid, (1 << m_scsi_id) | (1 << bus_id)); state = (state & STATE_MASK) | (ARB_SET_DEST << SUB_SHIFT); delay_cycles(4); break; @@ -1257,7 +1256,7 @@ void spifi3_device::step(bool timeout) } state = (state & STATE_MASK) | (ARB_RELEASE_BUSY << SUB_SHIFT); - scsi_bus->ctrl_w(scsi_refid, spifi_reg.select & SEL_WATN ? S_ATN : 0, S_ATN | S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, spifi_reg.select & SEL_WATN ? S_ATN : 0, S_ATN | S_BSY); delay(2); break; } @@ -1292,8 +1291,8 @@ void spifi3_device::step(bool timeout) break; } - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); // Clear SEL - target may now assert REQ + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); // Clear SEL - target may now assert REQ // TODO: reselection logic for this step // Target mode not supported for now @@ -1317,7 +1316,7 @@ void spifi3_device::step(bool timeout) { if (timeout) // No response from target { - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); LOG("select timeout\n"); state = (state & STATE_MASK) | (ARB_TIMEOUT_ABORT << SUB_SHIFT); // handle timeout delay(1000); @@ -1346,7 +1345,7 @@ void spifi3_device::step(bool timeout) } else // If not, force bus free { - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); state = IDLE; spifi_reg.intr = INTR_TIMEO; reset_disconnect(); @@ -1375,8 +1374,8 @@ void spifi3_device::step(bool timeout) } state = state & STATE_MASK; - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; } @@ -1401,7 +1400,7 @@ void spifi3_device::step(bool timeout) const auto masked_state = state & STATE_MASK; if (masked_state != INIT_XFR_RECV_PAD) { - const auto data = scsi_bus->data_r(); + const auto data = m_scsi_bus->data_r(); const auto xfr_masked = xfr_phase & S_PHASE_MASK; if (xfr_masked == S_PHASE_STATUS && masked_state == INIT_XFR_RECV_BYTE_ACK && autostat_active(bus_id)) { @@ -1420,7 +1419,7 @@ void spifi3_device::step(bool timeout) } check_drq(); } - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); state = masked_state | (RECV_WAIT_REQ_0 << SUB_SHIFT); step(false); break; @@ -1468,7 +1467,7 @@ void spifi3_device::step(bool timeout) state = DISC_SEL_ATN_WAIT_REQ; } - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); // wait for REQ + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); // wait for REQ if (ctrl & S_REQ) { step(false); @@ -1493,16 +1492,16 @@ void spifi3_device::step(bool timeout) // Deassert ATN now if we asserted it before if (spifi_reg.select & SEL_WATN) { - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); } state = DISC_SEL_ATN_SEND_BYTE; if (spifi_reg.identify & 0x80) { // Identify register has an identify packet - send it. - scsi_bus->data_w(scsi_refid, spifi_reg.identify); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->data_w(m_scsi_refid, spifi_reg.identify); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); } else { @@ -1545,7 +1544,7 @@ void spifi3_device::step(bool timeout) } if ((ctrl & S_PHASE_MASK) != S_PHASE_COMMAND) { - scsi_bus->ctrl_wait(scsi_refid, 0, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_REQ); function_bus_complete(); break; } @@ -1564,7 +1563,7 @@ void spifi3_device::step(bool timeout) case INIT_CPT_RECV_BYTE_ACK: { state = INIT_CPT_RECV_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); break; } @@ -1625,7 +1624,7 @@ void spifi3_device::step(bool timeout) // if it's the last message byte, ensure ATN is low before sending if ((xfr_phase == S_PHASE_MSG_OUT) && (command_pos == (spifi_reg.cmlen & CML_LENMASK) - 1)) { - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN); } if (xfr_phase == S_PHASE_DATA_OUT) @@ -1670,7 +1669,7 @@ void spifi3_device::step(bool timeout) default: { - LOG("xfer on phase %d\n", scsi_bus->ctrl_r() & S_PHASE_MASK); + LOG("xfer on phase %d\n", m_scsi_bus->ctrl_r() & S_PHASE_MASK); function_complete(); break; } @@ -1759,7 +1758,7 @@ void spifi3_device::step(bool timeout) case INIT_XFR_RECV_BYTE_ACK: { state = INIT_XFR_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; } @@ -1781,7 +1780,7 @@ void spifi3_device::step(bool timeout) break; } LOGMASKED(LOG_AUTO, "AUTOMSG cleared ACK\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); function_complete(); // Since we auto-accepted the message, we step again here to complete the disconnect @@ -1865,7 +1864,7 @@ void spifi3_device::step(bool timeout) case INIT_XFR_RECV_PAD: { state = INIT_XFR_RECV_PAD_WAIT_REQ; - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; } diff --git a/src/devices/machine/spifi3.h b/src/devices/machine/spifi3.h index f0e39d654cc..9e78dfb7b4b 100644 --- a/src/devices/machine/spifi3.h +++ b/src/devices/machine/spifi3.h @@ -31,7 +31,8 @@ #include "machine/nscsi_bus.h" class spifi3_device - : public nscsi_device, + : public device_t, + public nscsi_device_interface, public nscsi_slot_card_interface { public: diff --git a/src/devices/machine/wd33c9x.cpp b/src/devices/machine/wd33c9x.cpp index 0a2113cfafb..47b24b85ac9 100644 --- a/src/devices/machine/wd33c9x.cpp +++ b/src/devices/machine/wd33c9x.cpp @@ -70,7 +70,7 @@ enum register_addresses_e : uint8_t { // Own ID Register (0x00) fields and values enum own_id_e : uint8_t { // Reset Command - OWN_ID_SCSI_ID = 0x07, // SCSI ID Bits + OWN_ID_M_SCSI_ID = 0x07, // SCSI ID Bits OWN_ID_EAF = 0x08, // Enable Advanced Features (33C93A and 33C93B only) OWN_ID_EHP = 0x10, // Enable Host Parity (33C93A and 33C93B only) OWN_ID_RAF = 0x20, // Really Advanced Features (33C93B only) @@ -358,7 +358,8 @@ DEFINE_DEVICE_TYPE(WD33C93B, wd33c93b_device, "wd33c93b", "Western Digital WD33C //------------------------------------------------- wd33c9x_base_device::wd33c9x_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) - : nscsi_device{ mconfig, type, tag, owner, clock } + : device_t(mconfig, type, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_addr{ 0 } , m_regs{ 0 } @@ -415,8 +416,8 @@ void wd33c9x_base_device::device_reset() { // This is a hardware reset. Software reset is handled // under COMMAND_CC_RESET. - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); m_addr = 0; for (uint8_t reg = 0; reg < NUM_REGS; ++reg) { // FIXME - QUEUE_TAG is a valid register for 93B only @@ -456,7 +457,7 @@ TIMER_CALLBACK_MEMBER(wd33c9x_base_device::update_step) void wd33c9x_base_device::scsi_ctrl_changed() { - const uint32_t ctrl = scsi_bus->ctrl_r(); + const uint32_t ctrl = m_scsi_bus->ctrl_r(); if (ctrl & S_RST) { LOG("scsi bus reset\n"); // FIXME - Do something... @@ -737,8 +738,8 @@ void wd33c9x_base_device::start_command() switch (cc) { case COMMAND_CC_RESET: LOGMASKED(LOG_COMMANDS, "Reset Command\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); m_regs[OWN_ID] = m_command_length; memset(&m_regs[CONTROL], 0, SOURCE_ID - CONTROL); m_regs[COMMAND] = 0; @@ -749,7 +750,7 @@ void wd33c9x_base_device::start_command() update_irq(); set_scsi_state(FINISHED); irq_fifo_push((m_regs[OWN_ID] & OWN_ID_EAF) ? SCSI_STATUS_RESET_EAF : SCSI_STATUS_RESET); - scsi_id = (m_regs[OWN_ID] & OWN_ID_SCSI_ID); + m_scsi_id = (m_regs[OWN_ID] & OWN_ID_M_SCSI_ID); step(false); break; @@ -765,7 +766,7 @@ void wd33c9x_base_device::start_command() if (m_mode != MODE_I) { fatalerror("%s: ASSERT_ATN command only valid in the Initiator state.", shortname()); } - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_ATN); return; case COMMAND_CC_NEGATE_ACK: @@ -778,13 +779,13 @@ void wd33c9x_base_device::start_command() update_irq(); } - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); return; case COMMAND_CC_DISCONNECT: LOGMASKED(LOG_COMMANDS, "Disconnect Command\n"); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); m_mode = MODE_D; set_scsi_state(IDLE); m_regs[AUXILIARY_STATUS] &= ~(AUXILIARY_STATUS_CIP | AUXILIARY_STATUS_BSY); @@ -859,7 +860,7 @@ void wd33c9x_base_device::start_command() set_scsi_state(INIT_XFR); set_command_length(COMMAND_CC_TRANSFER_INFO); load_transfer_count(); - m_xfr_phase = (scsi_bus->ctrl_r() & S_PHASE_MASK); + m_xfr_phase = (m_scsi_bus->ctrl_r() & S_PHASE_MASK); step(false); return; @@ -891,8 +892,8 @@ void wd33c9x_base_device::step(bool timeout) const uint8_t cc = (m_regs[COMMAND] & COMMAND_CC); const bool sat = (cc == COMMAND_CC_SELECT_TRANSFER || cc == COMMAND_CC_SELECT_ATN_TRANSFER); - const uint32_t ctrl = scsi_bus->ctrl_r(); - const uint32_t data = scsi_bus->data_r(); + const uint32_t ctrl = m_scsi_bus->ctrl_r(); + const uint32_t data = m_scsi_bus->data_r(); LOGMASKED(LOG_STEP, "%s: step - PHASE:%s BSY:%x SEL:%x REQ:%x ACK:%x ATN:%x RST:%x DATA:%02x (%s.%s) %s\n", @@ -956,8 +957,8 @@ void wd33c9x_base_device::step(bool timeout) irq_fifo_push(SCSI_STATUS_DISCONNECT); } m_mode = MODE_D; - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); } } @@ -984,8 +985,8 @@ void wd33c9x_base_device::step(bool timeout) break; } if (timeout) { - scsi_bus->data_w(scsi_refid, 1 << scsi_id); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 1 << m_scsi_id); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); set_scsi_state_sub(ARB_EXAMINE_BUS); delay(1); } @@ -994,19 +995,19 @@ void wd33c9x_base_device::step(bool timeout) case ARB_EXAMINE_BUS << SUB_SHIFT: if (timeout) { if (ctrl & S_SEL) { - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 0); set_scsi_state_sub(ARB_WAIT_BUS_FREE); } else { int win; for (win = 7; win >=0 && !(data & (1 << win)); win--); - if (win == scsi_id) { - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + if (win == m_scsi_id) { + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); set_scsi_state_sub(ARB_ASSERT_SEL); delay(1); } else { - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); set_scsi_state_sub(ARB_CHECK_FREE); } } @@ -1015,7 +1016,7 @@ void wd33c9x_base_device::step(bool timeout) case ARB_ASSERT_SEL << SUB_SHIFT: if (timeout) { - scsi_bus->data_w(scsi_refid, (1 << scsi_id) | (1 << (m_regs[DESTINATION_ID] & DESTINATION_ID_DI))); + m_scsi_bus->data_w(m_scsi_refid, (1 << m_scsi_id) | (1 << (m_regs[DESTINATION_ID] & DESTINATION_ID_DI))); set_scsi_state_sub(ARB_SET_DEST); delay(1); } @@ -1023,7 +1024,7 @@ void wd33c9x_base_device::step(bool timeout) case ARB_SET_DEST << SUB_SHIFT: if (timeout) { - scsi_bus->ctrl_w(scsi_refid, (cc == COMMAND_CC_SELECT_ATN || cc == COMMAND_CC_SELECT_ATN_TRANSFER) ? S_ATN : 0, S_ATN | S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, (cc == COMMAND_CC_SELECT_ATN || cc == COMMAND_CC_SELECT_ATN_TRANSFER) ? S_ATN : 0, S_ATN | S_BSY); set_scsi_state_sub(ARB_RELEASE_BUSY); delay(1); } @@ -1034,7 +1035,7 @@ void wd33c9x_base_device::step(bool timeout) if (ctrl & S_BSY) { set_scsi_state_sub(ARB_DESKEW_WAIT); if (cc == COMMAND_CC_RESELECT) { - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); } delay(1); } else { @@ -1046,8 +1047,8 @@ void wd33c9x_base_device::step(bool timeout) case ARB_DESKEW_WAIT << SUB_SHIFT: if (timeout) { - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); m_mode = (cc == COMMAND_CC_RESELECT) ? MODE_T : MODE_I; set_scsi_state_sub(0); step(true); @@ -1056,13 +1057,13 @@ void wd33c9x_base_device::step(bool timeout) case ARB_TIMEOUT_BUSY << SUB_SHIFT: if (timeout) { - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->data_w(m_scsi_refid, 0); set_scsi_state_sub(ARB_TIMEOUT_ABORT); delay(1000); } else if (ctrl & S_BSY) { set_scsi_state_sub(ARB_DESKEW_WAIT); if (cc == COMMAND_CC_RESELECT) { - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); } delay(1); } @@ -1073,12 +1074,12 @@ void wd33c9x_base_device::step(bool timeout) if (ctrl & S_BSY) { set_scsi_state_sub(ARB_DESKEW_WAIT); if (cc == COMMAND_CC_RESELECT) { - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); } delay(1); } else { - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); m_regs[AUXILIARY_STATUS] &= ~(AUXILIARY_STATUS_CIP | AUXILIARY_STATUS_BSY); m_mode = MODE_D; set_scsi_state(IDLE); @@ -1098,8 +1099,8 @@ void wd33c9x_base_device::step(bool timeout) case SEND_WAIT_REQ_0 << SUB_SHIFT: if (!(ctrl & S_REQ)) { set_scsi_state_sub(0); - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); if (sat) { switch (m_xfr_phase) { case S_PHASE_COMMAND: @@ -1155,7 +1156,7 @@ void wd33c9x_base_device::step(bool timeout) } } set_scsi_state_sub(RECV_WAIT_REQ_0); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); step(false); } break; @@ -1168,7 +1169,7 @@ void wd33c9x_base_device::step(bool timeout) break; case DISC_SEL_ARBITRATION: - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); if (cc == COMMAND_CC_SELECT || cc == COMMAND_CC_SELECT_ATN) { set_scsi_state(FINISHED); irq_fifo_push(SCSI_STATUS_SELECT_SUCCESS); @@ -1254,7 +1255,7 @@ void wd33c9x_base_device::step(bool timeout) if (m_drq_state) { delay(1); } else { - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); set_scsi_state((RECV_WAIT_REQ_1 << SUB_SHIFT) | INIT_XFR_RECV_BYTE_ACK); step(false); } @@ -1414,7 +1415,7 @@ void wd33c9x_base_device::step(bool timeout) } else { set_scsi_state(INIT_XFR_WAIT_REQ); } - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); step(false); break; @@ -1540,9 +1541,9 @@ void wd33c9x_base_device::data_fifo_reset() uint32_t wd33c9x_base_device::send_byte(const uint32_t value, const uint32_t mask) { set_scsi_state_sub(SEND_WAIT_SETTLE); - scsi_bus->ctrl_wait(scsi_refid, S_REQ, S_REQ); - scsi_bus->data_w(scsi_refid, data_fifo_pop()); - scsi_bus->ctrl_w(scsi_refid, S_ACK | value, S_ACK | mask); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_REQ, S_REQ); + m_scsi_bus->data_w(m_scsi_refid, data_fifo_pop()); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK | value, S_ACK | mask); return 1; } diff --git a/src/devices/machine/wd33c9x.h b/src/devices/machine/wd33c9x.h index db041b89687..b72e655fa60 100644 --- a/src/devices/machine/wd33c9x.h +++ b/src/devices/machine/wd33c9x.h @@ -11,7 +11,7 @@ #include "machine/nscsi_bus.h" -class wd33c9x_base_device : public nscsi_device, public nscsi_slot_card_interface +class wd33c9x_base_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: auto irq_cb() { return m_irq_cb.bind(); } diff --git a/src/mame/act/victor9k_hdc.cpp b/src/mame/act/victor9k_hdc.cpp index 4dc74891567..2b3e483bb2d 100644 --- a/src/mame/act/victor9k_hdc.cpp +++ b/src/mame/act/victor9k_hdc.cpp @@ -25,7 +25,8 @@ victor_9000_hdc_device::victor_9000_hdc_device(const machine_config &mconfig, co } victor_9000_hdc_device::victor_9000_hdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - nscsi_device(mconfig, type, tag, owner, clock), + device_t(mconfig, type, tag, owner, clock), + nscsi_device_interface(mconfig, *this), nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_dma_r(*this, 0xff), m_dma_w(*this), @@ -65,10 +66,10 @@ uint8_t victor_9000_hdc_device::read(offs_t offset) if (m_non_dma_req && !machine().side_effects_disabled()) { m_non_dma_req = false; - scsi_bus->data_w(scsi_refid, 0); - m_data = scsi_bus->data_r(); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_data = m_scsi_bus->data_r(); m_asserting_ack = true; - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } data = m_data; break; @@ -133,7 +134,7 @@ void victor_9000_hdc_device::write(offs_t offset, uint8_t data) m_dma_write = (data & R_C_WMODE); uint32_t sel = ((data & R_C_SELECT) ? S_SEL : 0); - scsi_bus->ctrl_w(scsi_refid, sel, S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, sel, S_SEL); } break; case R_DATA: @@ -149,16 +150,16 @@ void victor_9000_hdc_device::write(offs_t offset, uint8_t data) // data lines change without a change in the SEL control line. // Workaround is to ensure SEL isn't asserted whenever the data // bus is written. - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); m_ctrl &= ~R_C_SELECT; } - scsi_bus->data_w(scsi_refid, data); + m_scsi_bus->data_w(m_scsi_refid, data); if (m_non_dma_req) { m_non_dma_req = false; m_asserting_ack = true; - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } break; case R_STATUS: @@ -189,9 +190,9 @@ void victor_9000_hdc_device::device_reset() m_data = 0; m_bus_ctrl = 0; - scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_REQ|S_RST, S_ALL); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); - scsi_bus->data_w(scsi_refid, 0); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_REQ|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); update_ints(false); m_irq_handler(false); @@ -224,20 +225,20 @@ TIMER_CALLBACK_MEMBER(victor_9000_hdc_device::ctrl_change_handler) if (m_dma_write) { // Write to system memory - scsi_bus->data_w(scsi_refid, 0); - m_data = scsi_bus->data_r(); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_data = m_scsi_bus->data_r(); m_dma_w(m_dma_addr, m_data); } else { // Read from system memory m_data = m_dma_r(m_dma_addr); - scsi_bus->data_w(scsi_refid, m_data); + m_scsi_bus->data_w(m_scsi_refid, m_data); } m_dma_addr++; m_asserting_ack = true; - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } else { @@ -247,7 +248,7 @@ TIMER_CALLBACK_MEMBER(victor_9000_hdc_device::ctrl_change_handler) } else if (m_asserting_ack) { - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); m_asserting_ack = false; } @@ -260,7 +261,7 @@ TIMER_CALLBACK_MEMBER(victor_9000_hdc_device::ctrl_change_handler) void victor_9000_hdc_device::scsi_ctrl_changed() { - m_bus_ctrl = scsi_bus->ctrl_r(); + m_bus_ctrl = m_scsi_bus->ctrl_r(); attotime delay; if (m_bus_ctrl & S_REQ) diff --git a/src/mame/act/victor9k_hdc.h b/src/mame/act/victor9k_hdc.h index 8a3c4601ac1..daa6e9e1995 100644 --- a/src/mame/act/victor9k_hdc.h +++ b/src/mame/act/victor9k_hdc.h @@ -7,7 +7,7 @@ #include "machine/nscsi_bus.h" -class victor_9000_hdc_device : public nscsi_device, public nscsi_slot_card_interface +class victor_9000_hdc_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface { public: victor_9000_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/mame/dec/dc7061.cpp b/src/mame/dec/dc7061.cpp index dad82b69ae7..5d2763fc5cb 100644 --- a/src/mame/dec/dc7061.cpp +++ b/src/mame/dec/dc7061.cpp @@ -234,7 +234,8 @@ static unsigned const SCSI_RST_HOLD = 25'000; DEFINE_DEVICE_TYPE(DC7061, dc7061_device, "dc7061", "DEC DC7061 SII") dc7061_device::dc7061_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) - : nscsi_device(mconfig, DC7061, tag, owner, clock) + : device_t(mconfig, DC7061, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_sys_int(*this) , m_dma_r(*this, 0) @@ -301,12 +302,12 @@ void dc7061_device::device_reset() m_state = IDLE; // clear scsi bus - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); // monitor all control lines m_scsi_ctrl = 0; - scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ALL, S_ALL); // clear output lines set_irq(false); @@ -314,7 +315,7 @@ void dc7061_device::device_reset() void dc7061_device::scsi_ctrl_changed() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); if (VERBOSE & LOG_SCSI) { @@ -345,8 +346,8 @@ void dc7061_device::scsi_ctrl_changed() m_state_timer->enable(false); // clear scsi bus - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ALL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); } else if (!(m_scsi_ctrl & S_REQ) && (ctrl & S_REQ)) { @@ -443,7 +444,7 @@ u16 dc7061_device::cstat_r() { LOGMASKED(LOG_REGR, "cstat_r 0x%04x (%s)\n", m_cs u16 dc7061_device::dstat_r() { - u16 const data = m_dstat | (scsi_bus->ctrl_r() & S_PHASE_MASK); + u16 const data = m_dstat | (m_scsi_bus->ctrl_r() & S_PHASE_MASK); LOGMASKED(LOG_REGR, "dstat_r 0x%04x (%s)\n", data, machine().describe_context()); @@ -495,7 +496,7 @@ void dc7061_device::comm_w(u16 data) LOGMASKED(LOG_REGW, "comm_w 0x%04x (%s)\n", data, machine().describe_context()); m_comm = data & COMM_MSK; - set_dstat((scsi_bus->ctrl_r() & S_PHASE_MASK) == (m_comm & COMM_PHM) ? 0 : DSTAT_MIS, DSTAT_MIS); + set_dstat((m_scsi_bus->ctrl_r() & S_PHASE_MASK) == (m_comm & COMM_PHM) ? 0 : DSTAT_MIS, DSTAT_MIS); switch (data & COMM_CMD) { @@ -507,8 +508,8 @@ void dc7061_device::comm_w(u16 data) LOG("disconnect\n"); set_cstat(0, CSTAT_CON | CSTAT_SIP | CSTAT_LST); // CHECK: - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ATN | S_SEL | S_BSY); // CHECK: + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN | S_SEL | S_BSY); // CHECK: break; case CMD_REQ: LOG("request data\n"); @@ -556,7 +557,7 @@ int dc7061_device::state_step() case ARB_BUS_FREE: LOGMASKED(LOG_ARB, "arbitration: waiting for bus free\n"); - if (!(scsi_bus->ctrl_r() & (S_SEL | S_BSY | S_RST))) + if (!(m_scsi_bus->ctrl_r() & (S_SEL | S_BSY | S_RST))) { m_state = ARB_START; delay = SCSI_BUS_FREE; @@ -568,12 +569,12 @@ int dc7061_device::state_step() delay = SCSI_ARB_DELAY; // assert own ID and BSY - scsi_bus->data_w(scsi_refid, oid); - scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, oid); + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); break; case ARB_EVALUATE: // check if SEL asserted, or if there's a higher ID on the bus - if ((scsi_bus->ctrl_r() & S_SEL) || (scsi_bus->data_r() & ~((oid - 1) | oid))) + if ((m_scsi_bus->ctrl_r() & S_SEL) || (m_scsi_bus->data_r() & ~((oid - 1) | oid))) { LOGMASKED(LOG_ARB, "arbitration: lost\n"); set_cstat(CSTAT_LST, CSTAT_LST); @@ -582,8 +583,8 @@ int dc7061_device::state_step() delay = SCSI_BUS_FREE; // FIXME: how long? // clear data and BSY - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); } else { @@ -601,8 +602,8 @@ int dc7061_device::state_step() delay = SCSI_BUS_SKEW * 2; // assert own and target ID and SEL - scsi_bus->data_w(scsi_refid, oid | tid); - scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, oid | tid); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); break; case SEL_DELAY: LOGMASKED(LOG_SEL, "selection: BSY cleared\n"); @@ -611,12 +612,12 @@ int dc7061_device::state_step() // clear BSY, optionally assert ATN if (m_comm & COMM_ATN) - scsi_bus->ctrl_w(scsi_refid, S_ATN, S_BSY | S_ATN); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ATN, S_BSY | S_ATN); else - scsi_bus->ctrl_w(scsi_refid, 0, S_BSY); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_BSY); break; case SEL_WAIT_BSY: - if (scsi_bus->ctrl_r() & S_BSY) + if (m_scsi_bus->ctrl_r() & S_BSY) { LOGMASKED(LOG_SEL, "selection: BSY asserted by target\n"); m_state = SEL_COMPLETE; @@ -627,7 +628,7 @@ int dc7061_device::state_step() LOGMASKED(LOG_SEL, "selection: timed out\n"); m_state = IDLE; - //scsi_bus->ctrl_w(scsi_refid, 0, S_ATN | S_SEL); + //m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ATN | S_SEL); } break; case SEL_COMPLETE: @@ -636,26 +637,26 @@ int dc7061_device::state_step() set_cstat(CSTAT_SCH | CSTAT_CON, CSTAT_SCH | CSTAT_CON | CSTAT_SIP); // clear data and SEL - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_SEL); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); break; case XFR_PIO: // TODO: phase match set_dstat(0, DSTAT_TBE); - if (scsi_bus->ctrl_r() & S_REQ) - m_state = (scsi_bus->ctrl_r() & S_INP) ? XFR_PIO_IN : XFR_PIO_OUT; + if (m_scsi_bus->ctrl_r() & S_REQ) + m_state = (m_scsi_bus->ctrl_r() & S_INP) ? XFR_PIO_IN : XFR_PIO_OUT; break; case XFR_PIO_OUT: LOGMASKED(LOG_PIO, "xfr pio out: data 0x%02x\n", m_data); m_state = XFR_PIO_OUT_ACK; // assert data and ACK - scsi_bus->data_w(scsi_refid, m_data); - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, m_data); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); break; case XFR_PIO_OUT_ACK: - if (!(scsi_bus->ctrl_r() & S_REQ)) + if (!(m_scsi_bus->ctrl_r() & S_REQ)) { LOGMASKED(LOG_PIO, "xfr pio out: data ACK\n"); @@ -663,19 +664,19 @@ int dc7061_device::state_step() set_dstat(DSTAT_DNE, DSTAT_DNE); // clear data and ACK - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } break; case XFR_DMA: // TODO: phase match - if (scsi_bus->ctrl_r() & S_REQ) - m_state = (scsi_bus->ctrl_r() & S_INP) ? XFR_DMA_IN_REQ : XFR_DMA_OUT; + if (m_scsi_bus->ctrl_r() & S_REQ) + m_state = (m_scsi_bus->ctrl_r() & S_INP) ? XFR_DMA_IN_REQ : XFR_DMA_OUT; break; case XFR_DMA_IN_REQ: { - u8 const data = scsi_bus->data_r(); + u8 const data = m_scsi_bus->data_r(); LOGMASKED(LOG_DMA, "xfr dma in: data 0x%02x\n", data); if (m_dstat & DSTAT_OBB) @@ -690,7 +691,7 @@ int dc7061_device::state_step() m_dstat ^= DSTAT_OBB; // assert ACK - scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); } break; default: diff --git a/src/mame/dec/dc7061.h b/src/mame/dec/dc7061.h index f5c9be30677..d33647bff42 100644 --- a/src/mame/dec/dc7061.h +++ b/src/mame/dec/dc7061.h @@ -9,7 +9,8 @@ #include "machine/nscsi_bus.h" class dc7061_device - : public nscsi_device + : public device_t + , public nscsi_device_interface , public nscsi_slot_card_interface { public: diff --git a/src/mame/tektronix/tek_msu_fdc.cpp b/src/mame/tektronix/tek_msu_fdc.cpp index fd54e022382..e8c883a0071 100644 --- a/src/mame/tektronix/tek_msu_fdc.cpp +++ b/src/mame/tektronix/tek_msu_fdc.cpp @@ -26,7 +26,8 @@ DEFINE_DEVICE_TYPE(TEK_MSU_FDC, tek_msu_fdc_device, "tek_msu_fdc", "Tektronix 4404 Mass Storage Unit Floppy Drive Controller") tek_msu_fdc_device::tek_msu_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) - : nscsi_device(mconfig, TEK_MSU_FDC, tag, owner, clock) + : device_t(mconfig, TEK_MSU_FDC, tag, owner, clock) + , nscsi_device_interface(mconfig, *this) , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_cpu(*this, "cpu") , m_fdc(*this, "fdc") @@ -36,8 +37,6 @@ tek_msu_fdc_device::tek_msu_fdc_device(const machine_config &mconfig, const char void tek_msu_fdc_device::device_start() { - nscsi_device::device_start(); - save_item(NAME(m_minisel)); m_motor = timer_alloc(FUNC(tek_msu_fdc_device::motor), this); @@ -45,25 +44,23 @@ void tek_msu_fdc_device::device_start() void tek_msu_fdc_device::device_reset() { - nscsi_device::device_reset(); - // monitor SCSI reset - scsi_bus->ctrl_wait(scsi_refid, S_RST, S_RST); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_RST, S_RST); m_minisel = true; } void tek_msu_fdc_device::scsi_ctrl_changed() { - bool const reset = scsi_bus->ctrl_r() & S_RST; + bool const reset = m_scsi_bus->ctrl_r() & S_RST; LOG("scsi reset %d\n", reset); if (reset) { // release the SCSI bus - scsi_bus->data_w(scsi_refid, 0); - scsi_bus->ctrl_w(scsi_refid, 0, S_REQ | S_BSY | S_MSG | S_CTL | S_INP); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ | S_BSY | S_MSG | S_CTL | S_INP); m_minisel = true; } @@ -123,7 +120,7 @@ const tiny_rom_entry *tek_msu_fdc_device::device_rom_region() const u8 tek_msu_fdc_device::status_r() { - u32 const ctrl = scsi_bus->ctrl_r(); + u32 const ctrl = m_scsi_bus->ctrl_r(); // bit function // 7 SCSI ACK @@ -141,14 +138,14 @@ u8 tek_msu_fdc_device::status_r() ((ctrl & S_SEL) ? 0x20 : 0) | ((ctrl & S_BSY) ? 0x10 : 0) | (m_motor->elapsed() > attotime::from_msec(500) ? 0x08 : 0) | - scsi_id; + m_scsi_id; return data; } u8 tek_msu_fdc_device::data_r() { - return scsi_bus->data_r(); + return m_scsi_bus->data_r(); } void tek_msu_fdc_device::control_w(u8 data) @@ -176,7 +173,7 @@ void tek_msu_fdc_device::control_w(u8 data) (BIT(data, 4) ? S_MSG : 0) | (BIT(data, 3) ? S_BSY : 0); - scsi_bus->ctrl_w(scsi_refid, ctrl, S_REQ | S_BSY | S_MSG | S_CTL | S_INP); + m_scsi_bus->ctrl_w(m_scsi_refid, ctrl, S_REQ | S_BSY | S_MSG | S_CTL | S_INP); // bit 0 is motor enable (active low) m_minisel = !BIT(data, 0); @@ -187,7 +184,7 @@ void tek_msu_fdc_device::control_w(u8 data) void tek_msu_fdc_device::data_w(u8 data) { - scsi_bus->data_w(scsi_refid, data); + m_scsi_bus->data_w(m_scsi_refid, data); } u8 tek_msu_fdc_device::fdc_r(offs_t offset) diff --git a/src/mame/tektronix/tek_msu_fdc.h b/src/mame/tektronix/tek_msu_fdc.h index d4f873bbab7..32a06cf38d9 100644 --- a/src/mame/tektronix/tek_msu_fdc.h +++ b/src/mame/tektronix/tek_msu_fdc.h @@ -12,7 +12,8 @@ #include "machine/upd765.h" class tek_msu_fdc_device - : public nscsi_device + : public device_t + , public nscsi_device_interface , public nscsi_slot_card_interface { public: From 05d5c9adb5df48166595375161473d04a3b0a156 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 2 Mar 2026 17:10:07 +0100 Subject: [PATCH 103/351] mb87030/mb89352: de-slotize --- src/devices/bus/hp_dio/hp98265a.cpp | 14 ++++----- src/devices/bus/msx/cart/scsi.cpp | 9 +++--- src/devices/bus/x68k/x68k_scsiext.cpp | 17 ++++------- src/devices/machine/mb87030.cpp | 1 - src/devices/machine/mb87030.h | 2 +- src/mame/akai/mpc2000.cpp | 22 ++++++-------- src/mame/akai/mpc3000.cpp | 18 +++++------- src/mame/akai/s3000.cpp | 22 ++++++-------- src/mame/casio/fz1.cpp | 21 +++++--------- src/mame/omron/luna_68k_ioc.cpp | 36 ++++++++--------------- src/mame/omron/luna_88k.cpp | 42 +++++++++------------------ src/mame/roland/roland_s50.cpp | 18 ++++++------ src/mame/sega/segas32.cpp | 16 ++++------ src/mame/sharp/x68k.cpp | 15 ++++------ src/mame/sharp/x68k.h | 2 +- src/mame/sord/future32.cpp | 20 +++++-------- 16 files changed, 106 insertions(+), 169 deletions(-) diff --git a/src/devices/bus/hp_dio/hp98265a.cpp b/src/devices/bus/hp_dio/hp98265a.cpp index 87965b440e4..da9c39de963 100644 --- a/src/devices/bus/hp_dio/hp98265a.cpp +++ b/src/devices/bus/hp_dio/hp98265a.cpp @@ -82,7 +82,7 @@ void dio16_98265a_device::mb87030_scsi_adapter(device_t *device) void dio16_98265a_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, m_scsibus, 0); + auto &scsi(NSCSI_BUS(config, m_scsibus)); nscsi_connector &scsicon0(NSCSI_CONNECTOR(config, "scsibus:0", 0)); default_scsi_devices(scsicon0); scsicon0.set_default_option("harddisk"); @@ -97,11 +97,11 @@ void dio16_98265a_device::device_add_mconfig(machine_config &config) scsicon5.set_default_option("cdrom"); default_scsi_devices(NSCSI_CONNECTOR(config, "scsibus:6", 0)); - nscsi_connector &scsicon7(NSCSI_CONNECTOR(config, "scsibus:7", 0)); - scsicon7.option_add_internal("mb87030", MB87030); - scsicon7.set_default_option("mb87030"); - scsicon7.set_fixed(true); - scsicon7.set_option_machine_config("mb87030", mb87030_scsi_adapter); + + MB87030(config, m_spc, 8_MHz_XTAL); + scsi.set_external_device(7, m_spc); + m_spc->out_irq_callback().set(DEVICE_SELF, FUNC(dio16_98265a_device::irq_w)); + m_spc->out_dreq_callback().set(DEVICE_SELF, FUNC(dio16_98265a_device::dmar0_w)); } dio16_98265a_device::dio16_98265a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : @@ -113,7 +113,7 @@ dio16_98265a_device::dio16_98265a_device(const machine_config &mconfig, device_t device_t(mconfig, type, tag, owner, clock), device_dio32_card_interface(mconfig, *this), m_scsibus(*this, "scsibus"), - m_spc(*this, "scsibus:7:mb87030"), + m_spc(*this, "mb87030"), m_sw1(*this, "SW1"), m_sw2(*this, "SW2"), m_installed_io(false), diff --git a/src/devices/bus/msx/cart/scsi.cpp b/src/devices/bus/msx/cart/scsi.cpp index 4949fb908fd..76c18787309 100644 --- a/src/devices/bus/msx/cart/scsi.cpp +++ b/src/devices/bus/msx/cart/scsi.cpp @@ -102,7 +102,7 @@ public: msx_cart_mega_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, MSX_CART_MEGA_SCSI, tag, owner, clock) , msx_cart_interface(mconfig, *this) - , m_mb89352a(*this, "scsi:7:mb89352a") + , m_mb89352a(*this, "mb89352a") , m_srambank(*this, "srambank%u", 0U) , m_view{ {*this, "view0"}, {*this, "view1"}, {*this, "view2"}, {*this, "view3"} } , m_bank_mask(0) @@ -130,7 +130,7 @@ private: void msx_cart_mega_scsi_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi", 0)); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -139,8 +139,9 @@ void msx_cart_mega_scsi_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); // Input clock is 8MHz according to the schematic. However, clocks below 11MHz cause writes to fail. Reads are fine at 8MHz. - //NSCSI_CONNECTOR(config, "scsi:7").option_set("mb89352a", MB89352).clock(16_MHz_XTAL/2); - NSCSI_CONNECTOR(config, "scsi:7").option_set("mb89352a", MB89352).clock(11'000'000); + // MB89352(config, m_mb89352a, 16_MHz_XTAL/2); + MB89352(config, m_mb89352a, 11'000'000); + scsi.set_external_device(7, m_mb89352a); } void msx_cart_mega_scsi_device::device_reset() diff --git a/src/devices/bus/x68k/x68k_scsiext.cpp b/src/devices/bus/x68k/x68k_scsiext.cpp index dbf1e9a04cd..95ed9d0b6cb 100644 --- a/src/devices/bus/x68k/x68k_scsiext.cpp +++ b/src/devices/bus/x68k/x68k_scsiext.cpp @@ -43,7 +43,7 @@ static void scsi_devices(device_slot_interface &device) // device machine config void x68k_scsiext_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -51,22 +51,17 @@ void x68k_scsiext_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(10'000'000 / 2); // 10MHz clock from bus - spc.out_irq_callback().set(*this, FUNC(x68k_scsiext_device::irq_w)); - spc.out_dreq_callback().set(*this, FUNC(x68k_scsiext_device::drq_w)); - }); + MB89352(config, m_spc, 10'000'000 / 2); // 10MHz clock from bus + scsi.set_external_device(7, m_spc); + m_spc->out_irq_callback().set(DEVICE_SELF, FUNC(x68k_scsiext_device::irq_w)); + m_spc->out_dreq_callback().set(DEVICE_SELF, FUNC(x68k_scsiext_device::drq_w)); } x68k_scsiext_device::x68k_scsiext_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, X68K_SCSIEXT, tag, owner, clock) , device_x68k_expansion_card_interface(mconfig, *this) , m_slot(nullptr) - , m_spc(*this, "scsi:7:spc") + , m_spc(*this, "spc") , m_rom(*this, "scsiexrom") , m_drq(false) { diff --git a/src/devices/machine/mb87030.cpp b/src/devices/machine/mb87030.cpp index 3564c1c0f54..b23bd63039e 100644 --- a/src/devices/machine/mb87030.cpp +++ b/src/devices/machine/mb87030.cpp @@ -39,7 +39,6 @@ mb89352_device::mb89352_device(const machine_config &mconfig, const char *tag, d mb87030_device::mb87030_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), nscsi_device_interface(mconfig, *this), - nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_irq_handler(*this), m_dreq_handler(*this), m_irq_state(false) diff --git a/src/devices/machine/mb87030.h b/src/devices/machine/mb87030.h index 4eb0e3f4408..3eeb5457dec 100644 --- a/src/devices/machine/mb87030.h +++ b/src/devices/machine/mb87030.h @@ -8,7 +8,7 @@ #include "machine/nscsi_bus.h" #include -class mb87030_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface +class mb87030_device : public device_t, public nscsi_device_interface { public: mb87030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/mame/akai/mpc2000.cpp b/src/mame/akai/mpc2000.cpp index 89da6b203a8..af7619e30b4 100644 --- a/src/mame/akai/mpc2000.cpp +++ b/src/mame/akai/mpc2000.cpp @@ -229,7 +229,7 @@ E0 = IDECS1N */ void mpc2000_state::mpc2000_io_map(address_map &map) { - map(0x0000, 0x001f).m("scsi:7:spc", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0x0000, 0x001f).m("spc", FUNC(mb89352_device::map)).umask16(0x00ff); map(0x0020, 0x0023).m(m_fdc, FUNC(upd72069_device::map)).umask16(0x00ff); map(0x0060, 0x0063).rw(FUNC(mpc2000_state::lcd_csr), FUNC(mpc2000_state::lcd_csw<0>)).umask16(0x00ff); map(0x0080, 0x008f).m(m_dsp, FUNC(l7a1045_sound_device::map)); @@ -592,8 +592,8 @@ void mpc2000_state::mpc2000(machine_config &config) m_maincpu->in_mem16r_cb().set(FUNC(mpc2000_state::dma_mem16r_cb)); m_maincpu->out_mem16w_cb().set(FUNC(mpc2000_state::dma_mem16w_cb)); m_maincpu->out_eop_cb().set("tc", FUNC(input_merger_device::in_w<0>)).invert(); - m_maincpu->in_ior_cb<0>().set("scsi:7:spc", FUNC(mb89352_device::dma_r)); - m_maincpu->out_iow_cb<0>().set("scsi:7:spc", FUNC(mb89352_device::dma_w)); + m_maincpu->in_ior_cb<0>().set("spc", FUNC(mb89352_device::dma_r)); + m_maincpu->out_iow_cb<0>().set("spc", FUNC(mb89352_device::dma_w)); m_maincpu->in_ior_cb<1>().set(m_fdc, FUNC(upd72069_device::dma_r)); m_maincpu->out_iow_cb<1>().set(m_fdc, FUNC(upd72069_device::dma_w)); m_maincpu->in_io16r_cb<1>().set(m_ata, FUNC(ata_interface_device::read_dma)); @@ -684,7 +684,7 @@ void mpc2000_state::mpc2000(machine_config &config) MIDI_PORT(config, "mdout1", midiout_slot, "midiout"); MIDI_PORT(config, "mdout2", midiout_slot, "midiout"); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -692,16 +692,12 @@ void mpc2000_state::mpc2000(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(32_MHz_XTAL / 4); // PCLKOUT - spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); - spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); - }); + auto &spc(MB89352(config, "spc", 32_MHz_XTAL / 4)); + scsi.set_external_device(7, spc); + spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); + spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); + TIMER(config, "dialtimer").configure_periodic(FUNC(mpc2000_state::dial_timer_tick), attotime::from_hz(60.0)); SPEAKER(config, "speaker", 2).front(); diff --git a/src/mame/akai/mpc3000.cpp b/src/mame/akai/mpc3000.cpp index 4f52bf2294e..537181f2bf8 100644 --- a/src/mame/akai/mpc3000.cpp +++ b/src/mame/akai/mpc3000.cpp @@ -437,8 +437,8 @@ void mpc3000_state::mpc3000(machine_config &config) m_maincpu->in_mem16r_cb().set(FUNC(mpc3000_state::dma_mem16r_cb)); m_maincpu->out_mem16w_cb().set(FUNC(mpc3000_state::dma_mem16w_cb)); m_maincpu->out_eop_cb().set("tc", FUNC(input_merger_device::in_w<0>)); - m_maincpu->in_ior_cb<0>().set("scsi:7:spc", FUNC(mb89352_device::dma_r)); - m_maincpu->out_iow_cb<0>().set("scsi:7:spc", FUNC(mb89352_device::dma_w)); + m_maincpu->in_ior_cb<0>().set("spc", FUNC(mb89352_device::dma_r)); + m_maincpu->out_iow_cb<0>().set("spc", FUNC(mb89352_device::dma_w)); m_maincpu->in_ior_cb<1>().set(m_fdc, FUNC(upd72069_device::dma_r)); m_maincpu->out_iow_cb<1>().set(m_fdc, FUNC(upd72069_device::dma_w)); m_maincpu->in_io16r_cb<3>().set(m_dsp, FUNC(l7a1045_sound_device::dma_r16_cb)); @@ -538,7 +538,7 @@ void mpc3000_state::mpc3000(machine_config &config) midiout_slot(MIDI_PORT(config, "mdout")); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -546,15 +546,11 @@ void mpc3000_state::mpc3000(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - spc.set_clock(32_MHz_XTAL / 4); // PCLKOUT - spc.out_irq_callback().set(":intp3", FUNC(input_merger_device::in_w<1>)); - spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); - }); + auto &spc(MB89352(config, "spc", 32_MHz_XTAL / 4)); + scsi.set_external_device(7, spc); + spc.out_irq_callback().set(":intp3", FUNC(input_merger_device::in_w<1>)); + spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); SPEAKER(config, "speaker", 2).front(); SPEAKER(config, "outputs", 8).unknown(); diff --git a/src/mame/akai/s3000.cpp b/src/mame/akai/s3000.cpp index 83f5fd31d1d..b0191927e73 100644 --- a/src/mame/akai/s3000.cpp +++ b/src/mame/akai/s3000.cpp @@ -270,7 +270,7 @@ void s3000_state::s3000xl_map(address_map &map) // e = FILCS (filter control if IB304F installed or 3200) void s3000_state::s2000_io_map(address_map &map) { - map(0x0000, 0x001f).m("scsi:6:spc", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0x0000, 0x001f).m("spc", FUNC(mb89352_device::map)).umask16(0x00ff); map(0x0020, 0x0023).m(m_fdc, FUNC(upd72069_device::map)).umask16(0x00ff); map(0x0040, 0x0047).rw(m_klcs, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); map(0x0050, 0x0057).rw(m_klcs, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); @@ -291,7 +291,7 @@ void s3000_state::s2000_io_map(address_map &map) // e = DIOCS void s3000_state::s3000_io_map(address_map &map) { - map(0x0000, 0x001f).m("scsi:6:spc", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0x0000, 0x001f).m("spc", FUNC(mb89352_device::map)).umask16(0x00ff); map(0x0020, 0x0023).m(m_fdc, FUNC(upd72069_device::map)).umask16(0x00ff); map(0x0020, 0x0023).r(FUNC(s3000_state::fdc_hc365_r)).umask16(0xff00); map(0x0048, 0x0048).rw(m_lcdc, FUNC(hd61830_device::data_r), FUNC(hd61830_device::data_w)).umask16(0x00ff); @@ -554,8 +554,8 @@ void s3000_state::base(machine_config &config) m_maincpu->sint_handler_cb().set_inputline(m_maincpu, INPUT_LINE_IRQ0); m_maincpu->txrdy_handler_cb().set_inputline(m_maincpu, INPUT_LINE_IRQ4); - m_maincpu->in_ior_cb<0>().set("scsi:6:spc", FUNC(mb89352_device::dma_r)); - m_maincpu->out_iow_cb<0>().set("scsi:6:spc", FUNC(mb89352_device::dma_w)); + m_maincpu->in_ior_cb<0>().set("spc", FUNC(mb89352_device::dma_r)); + m_maincpu->out_iow_cb<0>().set("spc", FUNC(mb89352_device::dma_w)); m_maincpu->in_ior_cb<1>().set(m_fdc, FUNC(upd72069_device::dma_r)); m_maincpu->out_iow_cb<1>().set(m_fdc, FUNC(upd72069_device::dma_w)); m_maincpu->in_io16r_cb<3>().set(m_dsp, FUNC(l7a1045_sound_device::dma_r16_cb)); @@ -606,17 +606,13 @@ void s3000_state::base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:3", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, "cdrom"); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:6").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(32_MHz_XTAL / 4); // PCLKOUT - spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); - spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); - }); NSCSI_CONNECTOR(config, "scsi:7", default_scsi_devices, nullptr); + auto &spc(MB89352(config, "spc", 32_MHz_XTAL / 4)); // PCLKOUT + bus.set_external_device(6, spc); + spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); + spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); + SOFTWARE_LIST(config, "cd_list").set_original("s3000_cdrom"); // S3000/CD3000i S2000 S3000XL/CD3000XL diff --git a/src/mame/casio/fz1.cpp b/src/mame/casio/fz1.cpp index ce23f4a8eb5..f45c79ec973 100644 --- a/src/mame/casio/fz1.cpp +++ b/src/mame/casio/fz1.cpp @@ -401,7 +401,7 @@ void fz1_state::fz1_io_map(address_map &map) void fz1_state::fz20m_io_map(address_map &map) { fz10m_io_map(map); - map(0x30, 0x3f).m("scsi:7:spc", FUNC(mb89352_device::map)); + map(0x30, 0x3f).m("spc", FUNC(mb89352_device::map)); } /**************************************************************************/ @@ -521,11 +521,11 @@ void fz1_state::fz20m(machine_config &config) m_maincpu->out_hreq_cb().set(m_maincpu, FUNC(v50_device::hack_w)); m_maincpu->in_memr_cb().set(FUNC(fz1_state::mem_r)); m_maincpu->out_memw_cb().set(FUNC(fz1_state::mem_w)); - m_maincpu->in_ior_cb<1>().set("scsi:7:spc", FUNC(mb89352_device::dma_r)); - m_maincpu->out_iow_cb<1>().set("scsi:7:spc", FUNC(mb89352_device::dma_w)); + m_maincpu->in_ior_cb<1>().set("spc", FUNC(mb89352_device::dma_r)); + m_maincpu->out_iow_cb<1>().set("spc", FUNC(mb89352_device::dma_w)); // note: loading from HD requires running "HDD Operater" [sic] from FL-D1 program disk - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -533,15 +533,10 @@ void fz1_state::fz20m(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(8_MHz_XTAL); - spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ3); - spc.out_dreq_callback().set(m_maincpu, FUNC(v50_device::dreq_w<1>)); - }); + auto &spc(MB89352(config, "spc", 8_MHz_XTAL)); + scsi.set_external_device(7, spc); + spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ3); + spc.out_dreq_callback().set(m_maincpu, FUNC(v50_device::dreq_w<1>)); } /**************************************************************************/ diff --git a/src/mame/omron/luna_68k_ioc.cpp b/src/mame/omron/luna_68k_ioc.cpp index 2b1971087e4..3446d9458d7 100644 --- a/src/mame/omron/luna_68k_ioc.cpp +++ b/src/mame/omron/luna_68k_ioc.cpp @@ -10,7 +10,7 @@ luna_68k_ioc_device::luna_68k_ioc_device(machine_config const &mconfig, char con , device_memory_interface(mconfig, *this) , m_cpu(*this, "cpu") , m_dma(*this, "dma%u", 0U) - , m_spc(*this, "scsi%u:7:spc", 0U) + , m_spc(*this, "spc%u", 0U) , m_fdc(*this, "fdc") , m_floppy(*this, "fdc:0") , m_scc(*this, "scc") @@ -304,7 +304,7 @@ void luna_68k_ioc_device::device_add_mconfig(machine_config &config) m_dma[1]->irq_callback().set([this](int state) { m_interrupt_dma1_cb(state); }); // internal SCSI - NSCSI_BUS(config, "scsi0"); + auto &scsi0(NSCSI_BUS(config, "scsi0")); NSCSI_CONNECTOR(config, "scsi0:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:2", scsi_devices, nullptr); @@ -312,21 +312,15 @@ void luna_68k_ioc_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi0:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:6", scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi0:7").option_set("spc", MB89352) - .machine_config( - [this, dma=m_dma[0].target()](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(10'000'000); - spc.out_irq_callback().set([this](int state) { m_interrupt_scsii_cb(state); }); - spc.out_dreq_callback().set(*this, FUNC(luna_68k_ioc_device::scsi_drq0_w)); - m_scsi0_dma_read.bind().set(spc, FUNC(mb89352_device::dma_r)); - m_scsi0_dma_write.bind().set(spc, FUNC(mb89352_device::dma_w)); - }); + MB89352(config, m_spc[0], 10'000'000); + scsi0.set_external_device(7, m_spc[0]); + m_spc[0]->out_irq_callback().set([this](int state) { m_interrupt_scsii_cb(state); }); + m_spc[0]->out_dreq_callback().set(DEVICE_SELF, FUNC(luna_68k_ioc_device::scsi_drq0_w)); + m_scsi0_dma_read.bind().set(m_spc[0], FUNC(mb89352_device::dma_r)); + m_scsi0_dma_write.bind().set(m_spc[0], FUNC(mb89352_device::dma_w)); // external SCSI - NSCSI_BUS(config, "scsi1"); + auto &scsi1(NSCSI_BUS(config, "scsi1")); NSCSI_CONNECTOR(config, "scsi1:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:2", scsi_devices, nullptr); @@ -334,15 +328,9 @@ void luna_68k_ioc_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi1:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi1:7").option_set("spc", MB89352) - .machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(10'000'000); - spc.out_irq_callback().set([this](int state) { m_interrupt_scsie_cb(state); }); - }); + MB89352(config, m_spc[1], 10'000'000); + scsi1.set_external_device(7, m_spc[1]); + m_spc[1]->out_irq_callback().set([this](int state) { m_interrupt_scsii_cb(state); }); MB8877(config, m_fdc, 32_MHz_XTAL / 4); FLOPPY_CONNECTOR(config, m_floppy, floppies, "525qd", floppy_image_device::default_mfm_floppy_formats); diff --git a/src/mame/omron/luna_88k.cpp b/src/mame/omron/luna_88k.cpp index 042cd370dfe..f2f922570a3 100644 --- a/src/mame/omron/luna_88k.cpp +++ b/src/mame/omron/luna_88k.cpp @@ -155,7 +155,7 @@ public: luna88k_state(machine_config const &mconfig, device_type type, char const *tag) : luna_88k_state_base(mconfig, type, tag) , m_rtc(*this, "rtc") - , m_spc(*this, "scsi:7:spc") + , m_spc(*this, "spc") , m_net(*this, "net") , m_eprom(*this, "eprom") { @@ -179,7 +179,7 @@ public: luna88k2_state(machine_config const &mconfig, device_type type, char const *tag) : luna_88k_state_base(mconfig, type, tag) , m_rtc(*this, "rtc") - , m_spc(*this, "scsi%u:7:spc", 0U) + , m_spc(*this, "spc%u", 0U) , m_net(*this, "net%u", 0U) , m_cbus_root(*this, "cbus") , m_cbus_irq(*this, "cbus_irq") @@ -557,7 +557,7 @@ void luna88k_state::luna88k(machine_config &config) M48T02(config, m_rtc); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -565,14 +565,10 @@ void luna88k_state::luna88k(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - spc.set_clock(8_MHz_XTAL); - spc.out_irq_callback().set(*this, &luna88k_state::irq<0, 3>, "irq0,3"); - }); + MB89352(config, m_spc, 8_MHz_XTAL); + scsi.set_external_device(7, m_spc); + m_spc->out_irq_callback().set(DEVICE_SELF, &luna88k_state::irq<0, 3>, "irq0,3"); AM7990(config, m_net, 40_MHz_XTAL / 4); m_net->intr_out().set(&luna88k_state::irq<0, 4>, "irq0,4").invert(); @@ -590,7 +586,7 @@ void luna88k2_state::luna88k2(machine_config &config) input_merger_any_high_device &spc_irq(INPUT_MERGER_ANY_HIGH(config, "spc_irq")); spc_irq.output_handler().set(&luna88k2_state::irq<0, 3>, "irq0,3"); - NSCSI_BUS(config, "scsi0"); + auto &scsi0(NSCSI_BUS(config, "scsi0")); NSCSI_CONNECTOR(config, "scsi0:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:2", scsi_devices, nullptr); @@ -598,16 +594,11 @@ void luna88k2_state::luna88k2(machine_config &config) NSCSI_CONNECTOR(config, "scsi0:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi0:6", scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi0:7").option_set("spc", MB89352).machine_config( - [&spc_irq](device_t *device) - { - mb89352_device &spc = downcast(*device); + MB89352(config, m_spc[0], 8_MHz_XTAL); + scsi0.set_external_device(7, m_spc[0]); + m_spc[0]->out_irq_callback().set(spc_irq, FUNC(input_merger_any_high_device::in_w<0>)); - spc.set_clock(8_MHz_XTAL); - spc.out_irq_callback().set(spc_irq, FUNC(input_merger_any_high_device::in_w<0>)); - }); - - NSCSI_BUS(config, "scsi1"); + auto &scsi1(NSCSI_BUS(config, "scsi1")); NSCSI_CONNECTOR(config, "scsi1:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:2", scsi_devices, nullptr); @@ -615,14 +606,9 @@ void luna88k2_state::luna88k2(machine_config &config) NSCSI_CONNECTOR(config, "scsi1:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi1:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi1:7").option_set("spc", MB89352).machine_config( - [&spc_irq](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(8_MHz_XTAL); - spc.out_irq_callback().set(spc_irq, FUNC(input_merger_any_high_device::in_w<1>)); - }); + MB89352(config, m_spc[1], 8_MHz_XTAL); + scsi1.set_external_device(7, m_spc[1]); + m_spc[1]->out_irq_callback().set(spc_irq, FUNC(input_merger_any_high_device::in_w<1>)); input_merger_any_low_device &net_irq(INPUT_MERGER_ANY_LOW(config, "net_irq")); net_irq.output_handler().set(&luna88k2_state::irq<0, 4>, "irq0,4"); diff --git a/src/mame/roland/roland_s50.cpp b/src/mame/roland/roland_s50.cpp index b9a29f43986..637a7468764 100644 --- a/src/mame/roland/roland_s50.cpp +++ b/src/mame/roland/roland_s50.cpp @@ -352,7 +352,7 @@ void roland_s550_state::mem_map(address_map &map) //m_io_view[0](0xd800, 0xd81f).rw(m_tvf, FUNC(mb654419u_device::read), FUNC(mb654419u_device::write)).umask16(0x00ff); m_io_view[0](0xe000, 0xe000).w(FUNC(roland_s550_state::sram_bank_w)); m_io_view[0](0xe800, 0xe81f).w("outas", FUNC(bu3905_device::write)).umask16(0x00ff); - m_io_view[0](0xf800, 0xf81f).m("scsi:7:scsic", FUNC(mb89352_device::map)).umask16(0x00ff); + m_io_view[0](0xf800, 0xf81f).m("scsic", FUNC(mb89352_device::map)).umask16(0x00ff); m_io_view[0](0xc000, 0xffff).rw(m_wave, FUNC(rf5c36_device::read), FUNC(rf5c36_device::write)).umask16(0xff00); m_io_view[1](0xc000, 0xffff).unmaprw(); } @@ -371,7 +371,7 @@ void roland_w30_state::w30_mem_map(address_map &map) map(0xc600, 0xc600).rw(FUNC(roland_w30_state::psram_bank_r), FUNC(roland_w30_state::psram_bank_w)); map(0xc800, 0xc807).rw(m_fdc, FUNC(wd1772_device::read), FUNC(wd1772_device::write)).umask16(0x00ff); map(0xd806, 0xd806).r(FUNC(roland_w30_state::unknown_status_r)); - map(0xe000, 0xe01f).m("scsi:7:scsic", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0xe000, 0xe01f).m("scsic", FUNC(mb89352_device::map)).umask16(0x00ff); map(0xe400, 0xe403).rw("lcd", FUNC(lm24014h_device::read), FUNC(lm24014h_device::write)).umask16(0x00ff); //map(0xe800, 0xe83f).w("output", FUNC(upd65006gf_376_3b8_device::write)).umask16(0x00ff); //map(0xf000, 0xf01f).rw(m_tvf, FUNC(mb654419u_device::read), FUNC(mb654419u_device::write)).umask16(0x00ff); @@ -479,7 +479,7 @@ void roland_s550_state::s550(machine_config &config) config.device_remove("keyscan"); // SCSI controller on Option Board - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -487,10 +487,9 @@ void roland_s550_state::s550(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", MB89352).machine_config([this](device_t *device) { - device->set_clock(8_MHz_XTAL); - downcast(*device).out_irq_callback().set_inputline(m_maincpu, i8x9x_device::EXTINT_LINE); - }); + auto &scsic(MB89352(config, "scsic", 8_MHz_XTAL)); + scsi.set_external_device(7, scsic); + scsic.out_irq_callback().set_inputline(m_maincpu, i8x9x_device::EXTINT_LINE); BU3905(config, "outas"); @@ -514,7 +513,7 @@ void roland_w30_state::w30(machine_config &config) FLOPPY_CONNECTOR(config, m_floppy[1], s50_floppies, nullptr, &floppy_formats).enable_sound(true); // SCSI controller on main board, by option (KW-30) - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -522,7 +521,8 @@ void roland_w30_state::w30(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", MB89352).clock(8_MHz_XTAL); // INTR & DREQ not connected + auto &scsic(MB89352(config, "scsic", 8_MHz_XTAL)); // INTR & DREQ not connected + scsi.set_external_device(7, scsic); LM24014H(config, "lcd"); // LCD unit: LM240142 diff --git a/src/mame/sega/segas32.cpp b/src/mame/sega/segas32.cpp index 2b202785eb8..78b69103501 100644 --- a/src/mame/sega/segas32.cpp +++ b/src/mame/sega/segas32.cpp @@ -2490,7 +2490,7 @@ void segas32_state::system32_cd_map(address_map &map) { map.unmap_value_high(); system32_map(map); - map(0xc00040, 0xc0005f).mirror(0x0fff80).m("scsi:7:spc", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0xc00040, 0xc0005f).mirror(0x0fff80).m("spc", FUNC(mb89352_device::map)).umask16(0x00ff); map(0xc00060, 0xc0006f).mirror(0x0fff80).rw("cxdio", FUNC(cxd1095_device::read), FUNC(cxd1095_device::write)).umask16(0x00ff); } @@ -2505,7 +2505,7 @@ void segas32_cd_state::device_add_mconfig(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &segas32_cd_state::system32_cd_map); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0").option_set("cdrom", NSCSI_CDROM).machine_config( [](device_t *device) { @@ -2518,15 +2518,11 @@ void segas32_cd_state::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - spc.set_clock(8_MHz_XTAL); - spc.out_irq_callback().set(*this, FUNC(segas32_cd_state::scsi_irq_w)); - spc.out_dreq_callback().set(*this, FUNC(segas32_cd_state::scsi_drq_w)); - }); + auto &spc(MB89352(config, "spc", 8_MHz_XTAL)); + scsi.set_external_device(7, spc); + spc.out_irq_callback().set(DEVICE_SELF, FUNC(segas32_cd_state::scsi_irq_w)); + spc.out_dreq_callback().set(DEVICE_SELF, FUNC(segas32_cd_state::scsi_drq_w)); cxd1095_device &cxdio(CXD1095(config, "cxdio")); cxdio.out_porta_cb().set(FUNC(segas32_cd_state::lamps1_w)); diff --git a/src/mame/sharp/x68k.cpp b/src/mame/sharp/x68k.cpp index 6f422b99232..93f8f44b6ef 100644 --- a/src/mame/sharp/x68k.cpp +++ b/src/mame/sharp/x68k.cpp @@ -1158,7 +1158,7 @@ void x68ksupr_state::x68ksupr_base(machine_config &config) { x68000_base(config); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -1166,15 +1166,10 @@ void x68ksupr_state::x68ksupr_base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, "cdrom"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("spc", MB89352).machine_config( - [this](device_t *device) - { - mb89352_device &spc = downcast(*device); - - spc.set_clock(40_MHz_XTAL / 8); - spc.out_irq_callback().set(*this, FUNC(x68ksupr_state::ioc_irq)); - // TODO: duplicate DMA glue from CZ-6BS1 - }); + MB89352(config, m_scsictrl, 40_MHz_XTAL / 8); + scsi.set_external_device(7, m_scsictrl); + m_scsictrl->out_irq_callback().set(*this, FUNC(x68ksupr_state::ioc_irq)); + // TODO: duplicate DMA glue from CZ-6BS1 VICON(config, m_crtc, 38.86363_MHz_XTAL); m_crtc->set_clock_69m(69.55199_MHz_XTAL); diff --git a/src/mame/sharp/x68k.h b/src/mame/sharp/x68k.h index 5d0a24eaca9..26d181f27b2 100644 --- a/src/mame/sharp/x68k.h +++ b/src/mame/sharp/x68k.h @@ -276,7 +276,7 @@ class x68ksupr_state : public x68k_state public: x68ksupr_state(const machine_config &mconfig, device_type type, const char *tag) : x68k_state(mconfig, type, tag) - , m_scsictrl(*this, "scsi:7:spc") + , m_scsictrl(*this, "spc") { } diff --git a/src/mame/sord/future32.cpp b/src/mame/sord/future32.cpp index b2728769e23..0950589d412 100644 --- a/src/mame/sord/future32.cpp +++ b/src/mame/sord/future32.cpp @@ -319,7 +319,6 @@ protected: MC6845_UPDATE_ROW(crtc_update_row); static void floppy_drives(device_slot_interface &device); static void scsi_devices(device_slot_interface &device); - void mb89352(device_t *device); void scsi_irq_w(int state); void scc1_irq_w(int state); @@ -341,7 +340,7 @@ future32a_state::future32a_state(const machine_config &mconfig, device_type type , m_ptm(*this, "ptm") , m_fdc(*this, "fdc") , m_floppy(*this, "fdc:0") - , m_scsi(*this, "scsi:7:mb89352") + , m_scsi(*this, "mb89352") , m_screen(*this, "screen") , m_gfxdecode(*this, "gfxdecode") , m_ramdac(*this, "ramdac") @@ -570,15 +569,6 @@ void future32a_state::scsi_devices(device_slot_interface &device) { device.option_add("harddisk", NSCSI_HARDDISK); device.option_add("cdrom", NSCSI_CDROM); - device.option_add_internal("mb89352", MB89352); -} - -void future32a_state::mb89352(device_t *device) -{ - mb89352_device &adapter = downcast(*device); - adapter.set_clock(32000000/4); - adapter.out_dreq_callback().set([this](int state) { m_dma->dmarq(state, 1); }); - adapter.out_irq_callback().set(*this, FUNC(future32a_state::scsi_irq_w)); } void future32a_state::future32a(machine_config &config) @@ -636,7 +626,7 @@ void future32a_state::future32a(machine_config &config) UPD72065(config, m_fdc, 32_MHz_XTAL / 8); FLOPPY_CONNECTOR(config, m_floppy, floppy_drives, "35hd", floppy_image_device::default_mfm_floppy_formats); - NSCSI_BUS(config, "scsi"); + auto &sbus(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); @@ -644,7 +634,11 @@ void future32a_state::future32a(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7", scsi_devices, "mb89352", true).set_option_machine_config("mb89352", [this] (device_t *device) { mb89352(device); }); + + MB89352(config, m_scsi, 32000000/4); + sbus.set_external_device(7, m_scsi); + m_scsi->out_dreq_callback().set([this](int state) { m_dma->dmarq(state, 1); }); + m_scsi->out_irq_callback().set(DEVICE_SELF, FUNC(future32a_state::scsi_irq_w)); } static INPUT_PORTS_START(future32a) From 801605d69232e9bc232b0ed2f87655de6c1793a8 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 28 Feb 2026 18:53:00 +0100 Subject: [PATCH 104/351] bus/pci/pdc20262.cpp: hookup PDC20268 Ultra100TX2 [The Retro Web] --- src/devices/bus/pci/pci_slot.cpp | 1 + src/devices/bus/pci/pdc20262.cpp | 49 ++++++++++++++++++++++++++------ src/devices/bus/pci/pdc20262.h | 13 ++++++++- 3 files changed, 53 insertions(+), 10 deletions(-) diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp index a2c0a37116c..c800ee74846 100644 --- a/src/devices/bus/pci/pci_slot.cpp +++ b/src/devices/bus/pci/pci_slot.cpp @@ -122,6 +122,7 @@ void pci_cards(device_slot_interface &device) device.option_add("aha2940au", AHA2940AU); device.option_add("ncr53c825", NCR53C825_PCI); device.option_add("pdc20262", PDC20262); + device.option_add("pdc20268", PDC20268); // 0x02 - network controllers device.option_add("rtl8029as", RTL8029AS_PCI); diff --git a/src/devices/bus/pci/pdc20262.cpp b/src/devices/bus/pci/pdc20262.cpp index 83e051684c3..c91515b2674 100644 --- a/src/devices/bus/pci/pdc20262.cpp +++ b/src/devices/bus/pci/pdc20262.cpp @@ -16,6 +16,8 @@ TODO: \- Gets classified as SCSI controller in win9x device manager; - ID and hookup Flash ROM type; - PME 1.0 support (no low power states D1/D2, no PME#) +- pdc20268: supposedly El Torito boot capable, but doesn't work (possibly same regression as + shutms11) **************************************************************************************************/ @@ -32,17 +34,22 @@ TODO: DEFINE_DEVICE_TYPE(PDC20262, pdc20262_device, "pdc20262", "Promise PDC20262 FastTrak66 EIDE controller") - +DEFINE_DEVICE_TYPE(PDC20268, pdc20268_device, "pdc20268", "Promise PDC20268 Ultra100TX2 EIDE controller") pdc20262_device::pdc20262_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) + , m_bios(*this, "bios") , m_ide1(*this, "ide1") , m_ide2(*this, "ide2") , m_irqs(*this, "irqs") // HACK: how to get to get_pci_busmaster_space()? , m_bus_master_space(*this, ":maincpu", 0) - , m_bios_rom(*this, "bios_rom") +{ +} + +pdc20262_device::pdc20262_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : pdc20262_device(mconfig, PDC20262, tag, owner, clock) { // Subsystems: // 105a 4d30 Ultra Device on SuperTrak @@ -53,13 +60,8 @@ pdc20262_device::pdc20262_device(const machine_config &mconfig, device_type type set_ids(0x105a4d38, 0x02, 0x018000, 0x105a4d33); } -pdc20262_device::pdc20262_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : pdc20262_device(mconfig, PDC20262, tag, owner, clock) -{ -} - ROM_START( pdc20262 ) - ROM_REGION32_LE( 0x8000, "bios_rom", ROMREGION_ERASEFF ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_DEFAULT_BIOS("v200") ROM_SYSTEM_BIOS( 0, "v200", "Promise Ultra66 BIOS v2.00 (Build 18)" ) @@ -176,7 +178,7 @@ void pdc20262_device::device_start() // TODO: unknown size (a lot larger?), to be verified later thru PnP add_map(64, M_MEM, FUNC(pdc20262_device::extra_map)); - add_rom((u8 *)m_bios_rom->base(), 0x4000); + add_rom((u8 *)m_bios->base(), 0x4000); expansion_rom_base = 0xc8000; // INTA# @@ -261,3 +263,32 @@ void pdc20262_device::ide2_write_cs1_w(uint8_t data) return; m_ide2->write_cs1(1, data << 16, 0xff0000); } + +/* + * + * PDC20268 + * + */ + +pdc20268_device::pdc20268_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : pdc20262_device(mconfig, PDC20268, tag, owner, clock) +{ + // class code 0x018000 or 0x01808f according to PCIR header + // subvendor unknown + set_ids(0x105a4d68, 0x02, 0x018000, 0x105a4d68); +} + +ROM_START( pdc20268 ) + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) + ROM_DEFAULT_BIOS("v220") + + ROM_SYSTEM_BIOS( 0, "v220", "Promise Ultra100 BIOS v2.20.0.15" ) + ROMX_LOAD( "u100b15.bin", 0x0000, 0x4000, CRC(bec48f0e) SHA1(7303819fee09922db5fd0d9632b0e1734cb70fb5), ROM_BIOS(0) ) +ROM_END + +const tiny_rom_entry *pdc20268_device::device_rom_region() const +{ + return ROM_NAME(pdc20268); +} + + diff --git a/src/devices/bus/pci/pdc20262.h b/src/devices/bus/pci/pdc20262.h index 9278c158d9c..a1ae63916c0 100644 --- a/src/devices/bus/pci/pdc20262.h +++ b/src/devices/bus/pci/pdc20262.h @@ -31,6 +31,8 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; + required_memory_region m_bios; + private: void ide1_command_map(address_map &map) ATTR_COLD; void ide1_control_map(address_map &map) ATTR_COLD; @@ -45,7 +47,6 @@ private: required_device m_ide2; required_device m_irqs; required_address_space m_bus_master_space; - required_memory_region m_bios_rom; u8 m_clock = 0; u8 m_irq_state = 0; @@ -60,6 +61,16 @@ private: void ide2_write_cs1_w(uint8_t data); }; +class pdc20268_device : public pdc20262_device +{ +public: + pdc20268_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; +}; + DECLARE_DEVICE_TYPE(PDC20262, pdc20262_device) +DECLARE_DEVICE_TYPE(PDC20268, pdc20268_device) #endif // MAME_BUS_PCI_PDC20262_H From 7e86a5164ec70d2cde2bd2f209d050f3bf3c5708 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sun, 1 Mar 2026 19:27:59 +0100 Subject: [PATCH 105/351] video/pc_vga_sis.cpp: upgrades * add remaining Sequencer registers, improve logging * add CRTC counter latches * fix bug with dxdiag setting the wrong ramdac mode from 16bpp fullscreen to 8bpp desktop --- src/devices/machine/i82443bx_host.cpp | 8 +- src/devices/machine/i82443bx_host.h | 2 +- src/devices/machine/vt82c598mvp.h | 2 +- src/devices/video/pc_vga_sis.cpp | 492 ++++++++++++++++++++++---- src/devices/video/pc_vga_sis.h | 15 + src/mame/pc/agro.cpp | 7 +- src/mame/pc/przone.cpp | 3 + 7 files changed, 458 insertions(+), 71 deletions(-) diff --git a/src/devices/machine/i82443bx_host.cpp b/src/devices/machine/i82443bx_host.cpp index aa06e993496..0ea7b522e1b 100644 --- a/src/devices/machine/i82443bx_host.cpp +++ b/src/devices/machine/i82443bx_host.cpp @@ -169,8 +169,12 @@ void i82443bx_bridge_device::map_extra( { if (BIT(bridge_control, 3)) { - //memory_space->install_device(0, 0xfffff, *m_vga, &sis630_gui_device::legacy_memory_map); - //io_space->install_device(0, 0x0fff, *m_vga, &sis630_gui_device::legacy_io_map); +#if 0 + if (BIT(command, 1)) + memory_space->install_device(0, 0xfffff, *m_vga, &vga_device::legacy_memory_map); + if (BIT(command, 0)) + io_space->install_device(0, 0xffff, *m_vga, &vga_device::legacy_io_map); +#endif } } diff --git a/src/devices/machine/i82443bx_host.h b/src/devices/machine/i82443bx_host.h index 35c213feb23..7583cd411ed 100644 --- a/src/devices/machine/i82443bx_host.h +++ b/src/devices/machine/i82443bx_host.h @@ -83,7 +83,7 @@ protected: uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; private: - //required_device m_vga; + //required_device m_vga; virtual void bridge_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; }; diff --git a/src/devices/machine/vt82c598mvp.h b/src/devices/machine/vt82c598mvp.h index 9f266c997d0..3547a45fd6e 100644 --- a/src/devices/machine/vt82c598mvp.h +++ b/src/devices/machine/vt82c598mvp.h @@ -111,7 +111,7 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; private: - //required_device m_vga; + //required_device m_vga; //virtual void bridge_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index c904de9e735..c583ae2f1da 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -7,6 +7,10 @@ Implementation of SiS family (S)VGA chipset SiS6326: VBE 2.0, Multi Buffering & Virtual Scrolling available SiS630: VBE 3.0, Multi Buffering & Virtual Scrolling available +Notes: +- In logging we omit "Extended", for searching purposes it's suggested to use the %X + nomenclature anyway i.e. CR19 or SR7 + TODO: - Extended 4bpp modes don't work (cfr. SDD item); - Refresh rate for extended modes; @@ -19,7 +23,6 @@ TODO: - DDC; - Bridge with a secondary TV out (SiS301 for '630); - Verify matches with earlier SiS PCI cards, backport; -- win98se: dxdiag eventually craps out at the end of Direct Draw testing, why? TODO (sis630): - Output scaling, cfr. xubuntu 6.10 splash screen at 1024x768x32 (really interlace as above?); @@ -32,9 +35,16 @@ TODO (sis630): #include "screen.h" -#define VERBOSE (LOG_GENERAL) +#define LOG_SEQ (1U << 1) // extended sequencer register descriptions + +#define LOG_LOCKED (1U << 4) // log lock/unlock sequences + +#define VERBOSE (LOG_GENERAL | LOG_SEQ) //#define LOG_OUTPUT_FUNC osd_printf_info +#define LOGSEQ(...) LOGMASKED(LOG_SEQ, __VA_ARGS__) +#define LOGLOCKED(...) LOGMASKED(LOG_LOCKED, __VA_ARGS__) + #include "logmacro.h" #define DEBUG_VRAM_VIEWER 0 @@ -48,6 +58,7 @@ TODO (sis630): //DEFINE_DEVICE_TYPE(SIS6225_VGA, sis6225_vga_device, "sis6225_vga", "SiS 6225 VGA i/f") //DEFINE_DEVICE_TYPE(SIS6215_VGA, sis6215_vga_device, "sis6215_vga", "SiS 6215 VGA i/f") +// NOTE: Everest Home app actually uses 86C326 as Video Adapter name, while GPU is 6326 DEFINE_DEVICE_TYPE(SIS6326_VGA, sis6326_vga_device, "sis6326_vga", "SiS 6326 VGA i/f") DEFINE_DEVICE_TYPE(SIS630_VGA, sis630_vga_device, "sis630_vga", "SiS 630 VGA i/f") @@ -90,20 +101,37 @@ void sis6326_vga_device::device_start() save_item(NAME(m_seq_unlock_reg)); save_item(NAME(m_ramdac_mode)); save_item(NAME(m_ext_sr07)); + save_item(NAME(m_crt_cpu_threshold)); save_item(NAME(m_ext_sr0b)); save_item(NAME(m_ext_sr0c)); save_item(NAME(m_ext_ddc)); + save_item(NAME(m_ext_sr12)); + save_item(NAME(m_ext_sr13)); + save_item(NAME(m_suspend_time)); + save_item(NAME(m_standby_time)); save_item(NAME(m_ext_sr23)); + save_item(NAME(m_mclk_int)); + save_item(NAME(m_vclk_int)); + save_item(NAME(m_turbo_queue_address)); + save_item(NAME(m_page_size_select)); + save_item(NAME(m_dram_fb_size)); + save_item(NAME(m_fast_page_address_latch)); save_item(NAME(m_ext_sr33)); save_item(NAME(m_ext_sr34)); save_item(NAME(m_ext_sr35)); save_item(NAME(m_ext_sr38)); save_item(NAME(m_ext_sr39)); + save_item(NAME(m_mpeg_turbo_queue_address)); save_item(NAME(m_ext_sr3c)); + save_item(NAME(m_mclk_gen)); + save_item(NAME(m_vclk_gen)); save_item(NAME(m_ext_ge26)); save_item(NAME(m_ext_ge27)); save_item(NAME(m_linear_address)); + save_item(NAME(m_crtc_hcounter_latch)); + save_item(NAME(m_crtc_vcounter_latch)); + save_item(STRUCT_MEMBER(m_cursor, address_base)); save_item(STRUCT_MEMBER(m_cursor, color_cache)); save_item(STRUCT_MEMBER(m_cursor, color)); @@ -127,15 +155,26 @@ void sis6326_vga_device::device_reset() m_crtc_unlock_reg = false; m_seq_unlock_reg = false; m_ramdac_mode = 0; + m_crt_cpu_threshold[0] = m_crt_cpu_threshold[1] = 0; + m_suspend_time = m_standby_time = 0; m_ext_sr07 = m_ext_sr0b = m_ext_sr0c = m_ext_sr23 = m_ext_sr33 = 0; m_ext_sr34 = m_ext_sr35 = m_ext_sr38 = m_ext_sr39 = m_ext_sr3c = 0; m_ext_ge26 = m_ext_ge27 = 0; + m_mclk_int[0] = m_mclk_int[1] = 0; + m_vclk_int[0] = m_vclk_int[1] = 0; + m_page_size_select = 0; + m_dram_fb_size = 0; + m_fast_page_address_latch[0] = m_fast_page_address_latch[1] = m_fast_page_address_latch[2] = 0; + // irrelevant really + m_crtc_hcounter_latch = m_crtc_vcounter_latch = 0xffff; // everything else shouldn't matter for cursor // initialize fixed part here: HW cannot set any other bit beyond 21 ~ 18. // On win98se this will map at bottom of VRAM i.e. at $3f'fc00 on 4MiB cards m_cursor.address_base = 0x03'fc00; + m_turbo_queue_address = 0; + m_mpeg_turbo_queue_address = 0; m_linear_address[0] = 0; m_linear_address[1] = 0; m_ext_ddc = 0; @@ -176,9 +215,53 @@ void sis6326_vga_device::io_3cx_map(address_map &map) ); } +// Direct Draw uses this +void sis6326_vga_device::crtc_strobe_latch() +{ + m_crtc_hcounter_latch = screen().hpos(); + m_crtc_vcounter_latch = screen().vpos(); +} + void sis6326_vga_device::crtc_map(address_map &map) { svga_device::crtc_map(map); + // CR19/CR1A Extended Signature Read-Back 0/1 + + // CR1B CRT horizontal counter (r/o) + map(0x1b, 0x1b).lr8(NAME([this] (offs_t offset) { return m_crtc_hcounter_latch & 0xff; })); + // CR1C CRT vertical counter (r/o) + map(0x1c, 0x1c).lr8(NAME([this] (offs_t offset) { return m_crtc_vcounter_latch & 0xff; })); + // CR1D CRT overflow counter (r/o) + map(0x1d, 0x1d).lr8(NAME([this] (offs_t offset) { + return (BIT(m_crtc_hcounter_latch, 8) << 4) | ((m_crtc_vcounter_latch & 0x700) >> 8); + })); + + // CR1E Extended Signature Read-Back 2 + + // CR20: CRT Counter Trigger Port + // NOTE: doc claims "r/o" but Direct Draw end of test actually writes on it + // assume just strobe address + map(0x20, 0x20).lrw8( + NAME([this] (offs_t offset) { + if (!machine().side_effects_disabled()) + { + LOG("CR20: Counter trigger read\n"); + crtc_strobe_latch(); + } + return 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + (void)data; + LOG("CR20: Counter trigger write\n"); + crtc_strobe_latch(); + }) + ); + // CR26 Attribute Controller Index read-back + // TODO: bit 5 is "video enable" at least for '6326 + map(0x26, 0x26).lr8( + NAME([this] (offs_t offset) { return vga.attribute.index; }) + ); + // Password/Identification Register map(0x80, 0x80).lrw8( NAME([this] (offs_t offset) { @@ -187,7 +270,7 @@ void sis6326_vga_device::crtc_map(address_map &map) NAME([this] (offs_t offset, u8 data) { // TODO: reimplement me thru memory_view or direct handler override m_crtc_unlock_reg = (data == 0x86); - LOG("CR80: Unlock register write %02x (%s)\n", data, m_crtc_unlock_reg ? "unlocked" : "locked"); + LOGLOCKED("CR80: Unlock register write %02x (%s)\n", data, m_crtc_unlock_reg ? "unlocked" : "locked"); }) ); // ... @@ -196,7 +279,7 @@ void sis6326_vga_device::crtc_map(address_map &map) NAME([this] (offs_t offset) -> u8 { if (!m_crtc_unlock_reg) { - LOG("CRE0: attempt to read TV OUT index while locked\n"); + LOGLOCKED("CRE0: attempt to read TV OUT index while locked\n"); return 0xff; } return m_tvout_index; @@ -204,7 +287,7 @@ void sis6326_vga_device::crtc_map(address_map &map) NAME([this] (offs_t offset, u8 data) { if (!m_crtc_unlock_reg) { - LOG("CRE0: attempt to write TV OUT index while locked %02x\n", data); + LOGLOCKED("CRE0: attempt to write TV OUT index while locked %02x\n", data); return; } m_tvout_index = data; @@ -214,7 +297,7 @@ void sis6326_vga_device::crtc_map(address_map &map) NAME([this] (offs_t offset) -> u8 { if (!m_crtc_unlock_reg) { - LOG("CRE0: attempt to read TV OUT data while locked [%02x]\n", m_tvout_index); + LOGLOCKED("CRE0: attempt to read TV OUT data while locked [%02x]\n", m_tvout_index); return 0; } return space(EXT_REG).read_byte(m_tvout_index); @@ -222,7 +305,7 @@ void sis6326_vga_device::crtc_map(address_map &map) NAME([this] (offs_t offset, u8 data) { if (!m_crtc_unlock_reg) { - LOG("CRE0: attempt to write TV OUT data while locked [%02x] %02x\n", m_tvout_index, data); + LOGLOCKED("CRE0: attempt to write TV OUT data while locked [%02x] %02x\n", m_tvout_index, data); return; } space(EXT_REG).write_byte(m_tvout_index, data); @@ -242,7 +325,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) NAME([this] (offs_t offset, u8 data) { // TODO: reimplement me thru memory_view or direct handler override m_seq_unlock_reg = (data == 0x86); - LOG("SR5: Unlock register write %02x (%s)\n", data, m_seq_unlock_reg ? "unlocked" : "locked"); + LOGLOCKED("SR5: Unlock register write %02x (%s)\n", data, m_seq_unlock_reg ? "unlocked" : "locked"); }) ); /* @@ -263,11 +346,9 @@ void sis6326_vga_device::sequencer_map(address_map &map) m_ramdac_mode = data; LOG("SR06: RAMDAC mode %02x\n", data); - if (!BIT(data, 1)) - { - svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb24_en = svga.rgb32_en = 0; - } - else + svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb24_en = svga.rgb32_en = 0; + + if (BIT(data, 1)) { // TODO: who wins on multiple bits enable? if (BIT(data, 1)) @@ -295,18 +376,46 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr07; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR07: Extended Misc. Control 0 %02x\n", data); + LOG("SR07: Misc. Control 0 %02x\n", data); + LOGSEQ("\tMerge video line buffer %d feature conn. %d RAMDAC power saving %d video clock freq / 2 %d\n" + , BIT(data, 7) + , BIT(data, 6) + , BIT(data, 5) + , BIT(data, 4) + ); + LOGSEQ("\tMulti-line prefetch %d 24-bit color palette %d High Speed DAC %d External DAC reference voltage %d\n" + , BIT(data, 3) + , BIT(data, 2) + , BIT(data, 1) + , BIT(data, 0) + ); m_ext_sr07 = data; std::tie(svga.rgb24_en, svga.rgb32_en) = flush_true_color_mode(); }) ); - //map(0x08, 0x09) CRT threshold Control + + // CRT/CPU Threshold Control + // [0] + // xxxx ---- CRT/CPU Arbitration Threshold Low + // ---- xxxx CRT/Engine Threshold High + // [1] + // xxxx ---- ASCII/Attribute Threshold + // ---- xxxx CRT/CPU Threshold High + map(0x08, 0x09).lrw8( + NAME([this] (offs_t offset) { + return m_crt_cpu_threshold[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR%02X: CRT/CPU Threshold Control %d %02x\n", offset + 8, offset, data); + m_crt_cpu_threshold[offset] = data; + }) + ); map(0x0a, 0x0a).lrw8( NAME([this] (offs_t offset) { return m_ext_vert_overflow; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR0A: Extended CRT Overflow %02x\n", data); + LOG("SR0A: CRT Overflow %02x\n", data); m_ext_vert_overflow = data; vga.crtc.offset = (vga.crtc.offset & 0x00ff) | ((data & 0xf0) << 4); vga.crtc.vert_retrace_start = (vga.crtc.vert_retrace_start & 0x03ff) | (BIT(data, 3) << 10); @@ -316,6 +425,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) recompute_params(); }) ); + // x--- ---- True Color RGB select (0) RGB (1) BGR // -xx- ---- MMIO select // -00- ---- Disable @@ -332,10 +442,22 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr0b; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR0B: Extended Misc. Control 1 %02x\n", data); + LOG("SR0B: Misc. Control 1 %02x\n", data); + LOGSEQ("\tTrue Color format %s MMIO space sel %d True Color frame rate modulation %d\n" + , BIT(data, 7) ? "BGR" : "RGB" + , (data >> 5) & 3 + , BIT(data, 4) + ); + LOGSEQ("\tDual segment enable %d I/O gating enable %d 16-color packed pixel %d CPU-driven BITBLT enable %d\n" + , BIT(data, 3) + , BIT(data, 2) + , BIT(data, 1) + , BIT(data, 0) + ); m_ext_sr0b = data; }) ); + // x--- ---- Graphic mode 32-bit memory access enable // -x-- ---- Text mode 16-bit memory access enable // --x- ---- Read-ahead cache operation enable @@ -351,10 +473,21 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr0c; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR0C: Extended Misc. Control 2 %02x\n", data); + LOG("SR0C: Misc. Control 2 %02x\n", data); + LOGSEQ("\tGraphics mode 32bit %d Text mode 16bit %d Read-ahead cache %d\n" + , BIT(data, 7) + , BIT(data, 6) + , BIT(data, 5) + ); + LOGSEQ("\tTest mode %d Memory config %d Sync reset timing gen %d\n" + , BIT(data, 3) + , (data >> 1) & 3 + , BIT(data, 0) + ); m_ext_sr0c = data; }) ); + //map(0x0d, 0x0e) Ext. Config Status (r/o) map(0x0d, 0x0d).lr8( // x--- ---- MD23 Enable 64K ROM @@ -382,11 +515,12 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_scratch[offset]; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR%02X: Extended Scratch %d %02x\n", offset + 0xf, offset, data); + LOG("SR%02X: Scratch %d %02x\n", offset + 0xf, offset, data); m_ext_scratch[offset] = data; }) ); - /// DDC register + + // DDC register map(0x11, 0x11).lrw8( NAME([this] (offs_t offset) { //LOG("SR11: DDC and Power Control read (%02x)\n", m_ext_ddc); @@ -394,12 +528,48 @@ void sis6326_vga_device::sequencer_map(address_map &map) }), NAME([this] (offs_t offset, u8 data) { LOG("SR11: DDC and Power Control %02x\n", data); + if ((m_ext_ddc & 0xfc) != (data & 0xfc)) + { + LOGSEQ("\tForce suspend mode %d Force standby mode %d memory activation source %d keyboard/HW cursor activation source %d\n" + , BIT(data, 7) + , BIT(data, 6) + , BIT(data, 5) + , BIT(data, 4) + ); + } m_ext_ddc = data; }) ); - //map(0x12, 0x12) Ext. Horizontal Overflow - //map(0x13, 0x13) Ext. Clock Generator / 25MHz/28MHz Video Clock + // Ext. Horizontal Overflow + map(0x12, 0x12).lrw8( + NAME([this] (offs_t offset) { return m_ext_sr12; }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR12: Horizontal Overflow %02x\n", data); + m_ext_sr12 = data; + // TODO: bits 7-5 for horizontal retrace skew (overrides base VGA?) + // unused by base core anyway + vga.crtc.horz_blank_end = (vga.crtc.horz_blank_end & ~0x40) | (BIT(data, 4) << 6); + vga.crtc.horz_retrace_start = (vga.crtc.horz_retrace_start & ~0x100) | (BIT(data, 3) << 8); + vga.crtc.horz_blank_start = (vga.crtc.horz_blank_start & ~0x100) | (BIT(data, 2) << 8); + vga.crtc.horz_disp_end = (vga.crtc.horz_disp_end & ~0x100) | (BIT(data, 1) << 8); + vga.crtc.horz_total = (vga.crtc.horz_total & ~0x100) | (BIT(data, 0) << 8); + recompute_params(); + }) + ); + + // Ext. Clock Generator / 25MHz/28MHz Video Clock + map(0x13, 0x13).lrw8( + NAME([this] (offs_t offset) { + return m_ext_sr13; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR13: Clock Generator %02x\n", data); + m_ext_sr13 = data; + recompute_params(); + }) + ); + // HW Cursor Color 0/1 map(0x14, 0x19).lrw8( NAME([this] (offs_t offset) { @@ -433,7 +603,13 @@ void sis6326_vga_device::sequencer_map(address_map &map) } }) ); - //map(0x1c, 0x1c) HW Cursor Horizontal Preset + // HW Cursor Horizontal Preset + map(0x1c, 0x1c).lrw8( + NAME([this] (offs_t offset) { return m_cursor.x_preset; }), + NAME([this] (offs_t offset, u8 data) { + m_cursor.x_preset = data & 0x3f; + }) + ); // HW Cursor Vertical Start 0/1 map(0x1d, 0x1e).lrw8( NAME([this] (offs_t offset) { @@ -456,16 +632,22 @@ void sis6326_vga_device::sequencer_map(address_map &map) } }) ); + // HW Cursor Vertical Preset + map(0x1f, 0x1f).lrw8( + NAME([this] (offs_t offset) { return m_cursor.y_preset; }), + NAME([this] (offs_t offset, u8 data) { + m_cursor.y_preset = data & 0x3f; + }) + ); - //map(0x1f, 0x1f) HW Cursor Vertical Preset - //map(0x20, 0x21) Linear Addressing Base Address 0/1 + // Linear Addressing Base Address 0/1 map(0x20, 0x21).lrw8( NAME([this] (offs_t offset) { return m_linear_address[offset]; }), NAME([this] (offs_t offset, u8 data) { m_linear_address[offset] = data; - LOG("SR%02X: Extended Linear Addressing Base %02x\n", offset + 0x20, data); + LOG("SR%02X: Linear Addressing Base %02x\n", offset + 0x20, data); LOG("\tBase %08x Size %d\n" , (m_linear_address[0] << 19) | ((m_linear_address[1] & 0xf) << 27) // 00 512 KiB @@ -476,13 +658,36 @@ void sis6326_vga_device::sequencer_map(address_map &map) ); }) ); - //map(0x22, 0x22) Standby/Suspend Timer + + // Standby/Suspend Timer + map(0x22, 0x22).lrw8( + NAME([this] (offs_t offset) { return (m_suspend_time << 4) | (m_standby_time); }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR22: Standby/Suspend Timer %02x\n", data); + m_suspend_time = (data >> 4) & 0xf; + m_standby_time = data & 0xf; + // TODO: doc doesn't mention it, but is it actually supposed to be +1 for both? + LOGSEQ("\tSuspend time %d minutes Standby Timer %d minutes\n" + , m_suspend_time * 2 + , m_standby_time * 2 + ); + }) + ); map(0x23, 0x23).lrw8( NAME([this] (offs_t offset) { return m_ext_sr23; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR23: Extended Misc. Control 3 %02x\n", data); + LOG("SR23: Misc. Control 3 %02x\n", data); + LOGSEQ("\tCRC Generator %d ED DRAM %d Bypass SRAM %d\n" + , BIT(data, 6) + , BIT(data, 5) + , BIT(data, 4) + ); + LOGSEQ("\tCompatible HW cursor visibility %d DRAM Control Delay Compensation %d nsec\n" + , BIT(data, 3) + , (data & 7) + 4 + ); m_ext_sr23 = data; }) ); @@ -492,10 +697,11 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_scratch[2]; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR25: Extended Scratch 2 %02x\n", data); + LOG("SR25: Scratch 2 %02x\n", data); m_ext_scratch[2] = data; }) ); + // -x-- ---- Power Down Internal RAMDAC // --x- ---- PCI Burst Write Mode Enable // ---x ---- Continous Memory Data Access Enable @@ -506,7 +712,16 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_ge26; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR26: Extended Graphics Engine Register 0 %02x\n", data); + LOG("SR26: Graphics Engine Register 0 %02x\n", data); + LOGSEQ("\tPower-down Internal RAMDAC %d PCI Burst-Write Mode %d Continous Memory Data Access %d\n" + , BIT(data, 6) + , BIT(data, 5) + , BIT(data, 4) + ); + LOGSEQ("\tSlow DRAM RAS pre-charge %d MCLK/DRAM Slow FP/ED DRAM RAS-CAS %d MCLK/DRAM\n" + , BIT(data, 2) + 3 + , BIT(data, 1) + 7 + ); m_ext_ge26 = data; }) ); @@ -522,20 +737,95 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_ge27; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR27: Extended Graphics Engine Register 1 %02x\n", data); + LOG("SR27: Graphics Engine Register 1 %02x\n", data); + if ((m_ext_ge27 & 0xf0) != (data & 0xf0)) + { + LOGSEQ("\tTurbo Queue %d Graphic Engine Prog %d Logical Screen Width %d\n" + , BIT(data, 7) + , BIT(data, 6) + , ((data >> 4) & 3) * 1024 + ); + } m_ext_ge27 = data; vga.crtc.start_addr_latch &= ~0x0f0000; vga.crtc.start_addr_latch |= ((data & 0x0f) << 16); }) ); - //map(0x28, 0x29) Internal Memory Clock - //map(0x2a, 0x2b) Internal Video Clock / 25MHz/28MHz Video Clock 0/1 - //map(0x2c, 0x2c) Turbo Queue Base Address - //map(0x2d, 0x2d) Memory Start Controller + // Internal Memory Clock + map(0x28, 0x29).lrw8( + NAME([this] (offs_t offset) { + return m_mclk_int[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR%02x: Internal Memory Clock %d %02x\n", offset + 0x28, offset, data); + m_mclk_int[offset] = data; + }) + ); + // Internal Video Clock / 25MHz/28MHz Video Clock 0/1 + map(0x2a, 0x2b).lrw8( + NAME([this] (offs_t offset) { + return m_vclk_int[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR%02x: Internal Video Clock %d %02x\n", offset + 0x2a, offset, data); + m_vclk_int[offset] = data; + recompute_params(); + }) + ); + + // Turbo Queue Base Address + map(0x2c, 0x2c).lrw8( + NAME([this] (offs_t offset) { + return m_turbo_queue_address; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR2C: Turbo Queue Base Address %02x\n", data); + // TODO: "in the last 32K segment" + m_turbo_queue_address = data & 0x7f; + }) + ); + // Memory Start Controller + map(0x2d, 0x2d).lrw8( + NAME([this] (offs_t offset) { return m_page_size_select; }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR2D: Memory Start Control %02x\n", data); + m_page_size_select = data & 0xf; + }) + ); + //map(0x2e, 0x2e) - //map(0x2f, 0x2f) DRAM Frame Buffer Size - //map(0x30, 0x32) Fast Page Flip Starting Address + + // DRAM Frame Buffer Size + map(0x2f, 0x2f).lrw8( + NAME([this] (offs_t offset) { + return m_dram_fb_size; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR2F: DRAM Frame Buffer Size %02x\n", data); + LOGSEQ("\tFast Change Mode Timing %d Fast Page Flip %d\n" + , BIT(data, 5) + , BIT(data, 4) + ); + m_dram_fb_size = data & 0x30; + }) + ); + + // Fast Page Flip Starting Address + map(0x30, 0x32).lrw8( + NAME([this] (offs_t offset) { return m_fast_page_address_latch[offset]; }), + NAME([this] (offs_t offset, u8 data) { + const bool latch_address = offset == 2; + const u8 mask = latch_address ? 0x0f : 0xff; + m_fast_page_address_latch[offset] = data & mask; + LOG("SR30: Fast Page Flip Starting Address [%d] %02x\n", offset, data); + // TODO: Direct Draw obviously uses this + //if (BIT(m_dram_fb_size, 4) && latch_address) + //{ + //} + }) + ); + // -x-- ---- Select external TVCLK as MCLK // --x- ---- Relocated VGA I/O port // ---x ---- Standard VGA I/O port address enable @@ -548,7 +838,16 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr33; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR33: Extended Misc. Control 4 %02x\n", data); + LOG("SR33: Misc. Control 4 %02x\n", data); + LOGSEQ("\tExternal TVCLK as MCLK %d\n" + , BIT(data, 6) + ); + LOGSEQ("\tOne cycle EDO DRAM %d SGRAM latency %d SGRAM Mode Write %d SGRAM timing %d\n" + , BIT(data, 3) + , 3 - BIT(data, 2) + , BIT(data, 1) + , BIT(data, 0) + ); m_ext_sr33 = data; // TODO: needs exposing for PCI card(s) // bit 5 relocates $3b0-$3df thru PCI bar @@ -557,6 +856,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) popmessage("pc_vga_sis.cpp: Relocated VGA PCI %d Standard VGA I/O disable %d", BIT(data, 5), BIT(data, 4)); }) ); + // x--- ---- DRAM controller one cycle write enable // -x-- ---- DRAM controller one cycle read enable // ---- -x-- Enable DRAM output PAD low power @@ -566,10 +866,19 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr34; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR34: Extended Misc. Control 5 %02x\n", data); + LOG("SR34: Misc. Control 5 %02x\n", data); + LOGSEQ("\tDRAM controller one cycle write %d read %d\n" + , BIT(data, 7) + , BIT(data, 6) + ); + LOGSEQ("\tDRAM output PAD low power %d HW Command Queue threshold low %d\n" + , BIT(data, 2) + , BIT(data, 0) + ); m_ext_sr34 = data; }) ); + // x--- ---- Enable HW MPEG // -x-- ---- MA delay compensation (0) 0 nsec (1) 2 nsec // --x- ---- SGRAM burst timing enable (0) disable @@ -582,7 +891,18 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr35; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR35: Extended Misc. Control 6 %02x\n", data); + LOG("SR35: Misc. Control 6 %02x\n", data); + LOGSEQ("\tHW MPEG %d MA delay compensation %d nsec SGRAM burst timing %d PCI burst write zero-wait %d\n" + , BIT(data, 7) + , BIT(data, 6) * 2 + , !BIT(data, 5) + , BIT(data, 4) + ); + LOGSEQ("\tDRAM CAS LOW period width compensation %d nsec PCI bus write cycle retry %d read cycle %d\n" + , ((data >> 2) & 3) * 2 + , BIT(data, 1) + , BIT(data, 0) + ); m_ext_sr35 = data; }) ); @@ -591,10 +911,11 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_scratch[offset + 3]; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR%02X: Extended Scratch %d %02x\n", offset + 0x36, offset + 3, data); + LOG("SR%02X: Scratch %d %02x\n", offset + 0x36, offset + 3, data); m_ext_scratch[offset + 3] = data; }) ); + // xxxx ---- HW Cursor Starting Address bits 21-18 // ---- -x-- Line Compare (0) disable // ---- --xx Video Clock Select @@ -607,7 +928,11 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr38; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR38: Extended Misc. Control 7 %02x\n", data); + LOG("SR38: Misc. Control 7 %02x\n", data); + //if ((m_ext_sr38 & 3) != (data & 3)) + //{ + // recompute_params(); + //} m_ext_sr38 = data; m_cursor.address_base &= ~0x3c'0000; m_cursor.address_base |= (data >> 4) << 18; @@ -617,6 +942,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) //vga.crtc.line_compare = (vga.crtc.line_compare & 0x3ff) | (BIT(data, 2) << 10); }) ); + // ---x ---- Select external TVCLK as internal TVCLK enable // ---- x--- Select external REFCLK as internal TVCLK enable // ---- -x-- Enable 3D accelerator @@ -627,13 +953,45 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr39; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR39: Extended Misc. Control 8 %02x\n", data); + LOG("SR39: Misc. Control 8 %02x\n", data); + LOGSEQ("\tExternal TVCLK as internal TVCLK %d REFCLK as internal TVCLK %d\n" + , BIT(data, 4) + , BIT(data, 3) + ); + LOGSEQ("\t3D Accelerator %d MPEG IDCT %d MPEG2 decode %d\n" + , BIT(data, 2) + , BIT(data, 1) + , BIT(data, 0) + ); m_ext_sr39 = data; }) ); - //map(0x3a, 0x3a) MPEG Turbo Queue Base Address - //map(0x3b, 0x3b) Clock Generator Control + // MPEG Turbo Queue Base Address + map(0x3a, 0x3a).lrw8( + NAME([this] (offs_t offset) { + return m_mpeg_turbo_queue_address; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("SR3A: MPEG Turbo Queue Base Address %02x\n", data); + // TODO: "in the last 32K segment" + m_mpeg_turbo_queue_address = data & 0x7f; + }) + ); + + // Clock Generator Control + // TODO: undocumented + map(0x3b, 0x3b).lrw8( + NAME([this] (offs_t offset) { + return (m_vclk_gen << 4) | (m_mclk_gen); + }), + NAME([this] (offs_t offset, u8 data) { + m_vclk_gen = (data >> 4) & 0xf; + m_mclk_gen = data & 0xf; + LOG("SR3B: Clock Generator Control VCLK %01x MCLK %01x\n", m_vclk_gen, m_mclk_gen); + }) + ); + // -x-- ---- SCLK output enable // --x- ---- AGP request high priority // ---x ---- Enable Oscillator I/O PAD power down @@ -649,7 +1007,17 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr3c; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR3C: Extended Misc. Control 9 %02x\n", data); + LOG("SR3C: Misc. Control 9 %02x\n", data); + LOGSEQ("\tSCLK output %d AGP request high priority %d Oscillator I/O Power Down %d\n" + , BIT(data, 6) + , BIT(data, 5) + , BIT(data, 4) + ); + LOGSEQ("\tAGP Dynamic Power Saving %d PCI-66 MHz %d Turbo Queue 2D/3D length config %d\n" + , BIT(data, 3) + , BIT(data, 2) + , data & 3 + ); m_ext_sr3c = data; }) ); @@ -659,7 +1027,8 @@ void sis6326_vga_device::tvout_map(address_map &map) { map(0x00, 0x00).lrw8( NAME([this] (offs_t offset) { - LOG("VR00: Basic TV Function Control read (%02x)\n", m_tv.control); + // win98se reads this while moving mouse + //LOG("VR00: Basic TV Function Control read (%02x)\n", m_tv.control); return m_tv.control; }), NAME([this] (offs_t offset, u8 data) { @@ -908,16 +1277,7 @@ uint32_t sis6326_vga_device::screen_update(screen_device &screen, bitmap_rgb32 & void sis630_vga_device::crtc_map(address_map &map) { sis6326_vga_device::crtc_map(map); - // CR19/CR1A Extended Signature Read-Back 0/1 - // CR1B CRT horizontal counter (r/o) - // CR1C CRT vertical counter (r/o) - // CR1D CRT overflow counter (r/o) - // CR1E Extended Signature Read-Back 2 - // CR26 Attribute Controller Index read-back - // TODO: is this an undocumented VGA or a SiS extension? - map(0x26, 0x26).lr8( - NAME([this] (offs_t offset) { return vga.attribute.index; }) - ); + // TODO: very preliminary, this section is undocumented in '630 doc map(0x30, 0xff).lrw8( NAME([this] (offs_t offset) { @@ -950,7 +1310,7 @@ void sis630_vga_device::sequencer_map(address_map &map) return m_ext_vert_overflow; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR0A: Extended Vertical Overflow %02x\n", data); + LOG("SR0A: Vertical Overflow %02x\n", data); m_ext_vert_overflow = data; vga.crtc.vert_retrace_end = (vga.crtc.vert_retrace_end & 0xf) | ((data & 0x20) >> 1); vga.crtc.vert_blank_end = (vga.crtc.vert_blank_end & 0x00ff) | ((data & 0x10) << 4); @@ -968,7 +1328,7 @@ void sis630_vga_device::sequencer_map(address_map &map) ); map(0x0b, 0x0b).lw8( NAME([this] (offs_t offset, u8 data) { - LOG("SR0B: Extended Horizontal Overflow 1 %02x\n", data); + LOG("SR0B: Horizontal Overflow 1 %02x\n", data); m_ext_horz_overflow[0] = data; vga.crtc.horz_retrace_start = (vga.crtc.horz_retrace_start & 0x00ff) | ((data & 0xc0) << 2); @@ -981,7 +1341,7 @@ void sis630_vga_device::sequencer_map(address_map &map) ); map(0x0c, 0x0c).lw8( NAME([this] (offs_t offset, u8 data) { - LOG("SR0C: Extended Horizontal Overflow 2 %02x\n", data); + LOG("SR0C: Horizontal Overflow 2 %02x\n", data); m_ext_horz_overflow[1] = data; vga.crtc.horz_retrace_end = (vga.crtc.horz_retrace_end & 0x001f) | ((data & 0x04) << 3); @@ -994,7 +1354,7 @@ void sis630_vga_device::sequencer_map(address_map &map) return vga.crtc.start_addr_latch >> 16; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR0D: Extended Starting Address %02x\n", data); + LOG("SR0D: Starting Address %02x\n", data); vga.crtc.start_addr_latch &= ~0xff0000; vga.crtc.start_addr_latch |= data << 16; }) @@ -1002,7 +1362,7 @@ void sis630_vga_device::sequencer_map(address_map &map) map(0x0e, 0x0e).unmapr(); map(0x0e, 0x0e).lw8( NAME([this] (offs_t offset, u8 data) { - LOG("SR0E: Extended pitch register %02x\n", data); + LOG("SR0E: pitch register %02x\n", data); // sis_main.c implicitly sets this with bits 0-3 granularity, assume being right vga.crtc.offset = (vga.crtc.offset & 0x00ff) | ((data & 0x0f) << 8); }) @@ -1055,7 +1415,7 @@ void sis630_vga_device::sequencer_map(address_map &map) return m_ext_dclk[offset]; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR%02X: Extended DCLK %02x\n", offset + 0x2b, data); + LOG("SR%02X: DCLK %02x\n", offset + 0x2b, data); m_ext_dclk[offset] = data; recompute_params(); }) @@ -1065,7 +1425,7 @@ void sis630_vga_device::sequencer_map(address_map &map) return m_ext_eclk[offset]; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR%02X: Extended ECLK %02x\n", offset + 0x2e, data); + LOG("SR%02X: ECLK %02x\n", offset + 0x2e, data); m_ext_eclk[offset] = data; recompute_params(); }) @@ -1075,7 +1435,7 @@ void sis630_vga_device::sequencer_map(address_map &map) return m_ext_clock_gen; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR31: Extended clock generator misc. %02x\n", data); + LOG("SR31: clock generator misc. %02x\n", data); m_ext_clock_gen = data; recompute_params(); }) @@ -1085,7 +1445,7 @@ void sis630_vga_device::sequencer_map(address_map &map) return m_ext_clock_source_select; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR32: Extended clock source selection %02x\n", data); + LOG("SR32: clock source selection %02x\n", data); m_ext_clock_source_select = data; recompute_params(); }) diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index 5bdeb2dc2b7..200c54f843a 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -66,19 +66,34 @@ protected: u8 m_ramdac_mode = 0; u8 m_ext_sr07; + u8 m_crt_cpu_threshold[2]; u8 m_ext_sr0b; u8 m_ext_sr0c; u8 m_ext_ddc; + u8 m_ext_sr12; + u8 m_ext_sr13; + u8 m_suspend_time, m_standby_time; u8 m_ext_sr23; + u8 m_mclk_int[2]; + u8 m_vclk_int[2]; + u8 m_turbo_queue_address; + u8 m_page_size_select; + u8 m_dram_fb_size; + u8 m_fast_page_address_latch[3]; u8 m_ext_sr33; u8 m_ext_sr34; u8 m_ext_sr35; u8 m_ext_sr38; u8 m_ext_sr39; + u8 m_mpeg_turbo_queue_address; + u8 m_mclk_gen, m_vclk_gen; u8 m_ext_sr3c; u8 m_ext_ge26; u8 m_ext_ge27; + u16 m_crtc_hcounter_latch, m_crtc_vcounter_latch; + void crtc_strobe_latch(); + struct { u32 address_base; u8 color_cache[6]; diff --git a/src/mame/pc/agro.cpp b/src/mame/pc/agro.cpp index 804ae68ea1b..f1e2163fc3f 100644 --- a/src/mame/pc/agro.cpp +++ b/src/mame/pc/agro.cpp @@ -7,6 +7,8 @@ Agro's ~~Good~~ Fantastic Video Game Redemption machine, single button. +DOS 6.21 on El Torito CD + - PCChips/Hsin Tech M590 motherboard; - SiS5591 + SiS5595; - SiS 3D Pro on-board (SiS6326 equivalent); @@ -16,11 +18,14 @@ Redemption machine, single button. - 3x PCI + 2x ISA card slots; - Winbond W83194R-17 PLL; +Has no config.sys, autoexec.bat just has a BOOT.EXE inside, which should eventually call GAME.EXE +over the same boot partition. + TODO: - stub; - On shutms11 pre-breakage it will start MS-DOS then quickly access $1000'0000, is the protection device mapping on PCI space? -- analyze autoexec.bat / config.sys; +- Most likely uses SiS6326 TV Out for the actual game, as boot.exe tries to initialize that part; **************************************************************************************************/ diff --git a/src/mame/pc/przone.cpp b/src/mame/pc/przone.cpp index 20a8652c5da..e1fbf0e092c 100644 --- a/src/mame/pc/przone.cpp +++ b/src/mame/pc/przone.cpp @@ -13,6 +13,7 @@ TODO: - CD-ROM reading test is too fast (739% of what is reported as 8X); - Tri-Scraper / Super Solitaire / Super 11's: timer doesn't count down (goes only up), it does with mouse click, likely bug for wrong input device? +- Scud Attack: bonus objects disappear midway thru (virge bug?) - Outputs, writes to $301-$305 aren't (comms with a CPU?) =================================================================================================== @@ -136,8 +137,10 @@ void isa16_przone_jamma_if::io_map(address_map &map) static INPUT_PORTS_START( przone_jamma ) PORT_START("IOCARD") + // "Mechanical" chutes PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) + // "Electrical" chutes PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_COIN5 ) From 83ea4675dd0c165d43e3834fe09f0e73c6efae3f Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 2 Mar 2026 15:44:05 +0100 Subject: [PATCH 106/351] bus/isa: initial stub for a SPEA Graphiti FGA 4/HE TIGA card [VGA Legacy MKIII] --- scripts/src/bus.lua | 2 + scripts/src/video.lua | 13 ++++ src/devices/bus/isa/isa_cards.cpp | 2 + src/devices/bus/isa/tiga_spea.cpp | 80 ++++++++++++++++++++ src/devices/bus/isa/tiga_spea.h | 44 +++++++++++ src/devices/bus/pci/sis6326.cpp | 2 +- src/devices/video/pc_vga_tseng.cpp | 6 +- src/devices/video/pc_vga_tseng.h | 4 +- src/devices/video/pc_vga_video7.cpp | 109 ++++++++++++++++++++++++++++ src/devices/video/pc_vga_video7.h | 40 ++++++++++ 10 files changed, 295 insertions(+), 7 deletions(-) create mode 100644 src/devices/bus/isa/tiga_spea.cpp create mode 100644 src/devices/bus/isa/tiga_spea.h create mode 100644 src/devices/video/pc_vga_video7.cpp create mode 100644 src/devices/video/pc_vga_video7.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index d0f18f5880d..8e4ffbae4ea 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -2949,6 +2949,8 @@ if BUSES["ISA"] then MAME_DIR .. "src/devices/bus/isa/svga_tseng.h", MAME_DIR .. "src/devices/bus/isa/tekram_dc820.cpp", MAME_DIR .. "src/devices/bus/isa/tekram_dc820.h", + MAME_DIR .. "src/devices/bus/isa/tiga_spea.cpp", + MAME_DIR .. "src/devices/bus/isa/tiga_spea.h", MAME_DIR .. "src/devices/bus/isa/ubpnic.cpp", MAME_DIR .. "src/devices/bus/isa/ubpnic.h", MAME_DIR .. "src/devices/bus/isa/ultra12f.cpp", diff --git a/scripts/src/video.lua b/scripts/src/video.lua index c5e8931c6ed..535113692f7 100644 --- a/scripts/src/video.lua +++ b/scripts/src/video.lua @@ -1171,6 +1171,19 @@ if VIDEOS["PC_VGA_PARADISE"] then } end +-------------------------------------------------- +-- +--@src/devices/video/pc_vga_video7.h,VIDEOS["PC_VGA_VIDEO7"] = true +-------------------------------------------------- + +if VIDEOS["PC_VGA_VIDEO7"] then + files { + MAME_DIR .. "src/devices/video/pc_vga_video7.cpp", + MAME_DIR .. "src/devices/video/pc_vga_video7.h", + } +end + + -------------------------------------------------- -- --@src/devices/video/wd90c26.h,VIDEOS["WD90C26"] = true diff --git a/src/devices/bus/isa/isa_cards.cpp b/src/devices/bus/isa/isa_cards.cpp index 8a845e64eca..f16f94fda11 100644 --- a/src/devices/bus/isa/isa_cards.cpp +++ b/src/devices/bus/isa/isa_cards.cpp @@ -24,6 +24,7 @@ #include "svga_s3.h" #include "svga_trident.h" #include "svga_tseng.h" +#include "tiga_spea.h" #include "vga.h" #include "vga_ati.h" @@ -213,6 +214,7 @@ void pc_isa16_cards(device_slot_interface &device) device.option_add("wd90c33_zz", ISA16_WD90C33_ZZ); device.option_add("3c505", ISA16_3C505); device.option_add("mach64", ISA16_SVGA_MACH64); + device.option_add("fga_4he", ISA16_FGA4HE); device.option_add("sb16_lle", ISA16_SB16); device.option_add("mcd", ISA16_MCD); device.option_add("sad8852", ISA16_SAD8852); diff --git a/src/devices/bus/isa/tiga_spea.cpp b/src/devices/bus/isa/tiga_spea.cpp new file mode 100644 index 00000000000..516d0223d42 --- /dev/null +++ b/src/devices/bus/isa/tiga_spea.cpp @@ -0,0 +1,80 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese +/************************************************************************************************** + +Spea TIGA based video cards + +**************************************************************************************************/ + +#include "emu.h" +#include "tiga_spea.h" + +DEFINE_DEVICE_TYPE(ISA16_FGA4HE, isa16_fga4he_device, "fga4he", "SPEA Graphiti FGA 4/HE TIGA card") + +isa16_fga4he_device::isa16_fga4he_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + isa16_fga4he_device(mconfig, ISA16_FGA4HE, tag, owner, clock) +{ +} + +isa16_fga4he_device::isa16_fga4he_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_isa16_card_interface(mconfig, *this) + , m_vga(*this, "vga") + , m_bios(*this, "bios") +{ +} + +ROM_START( fga4he ) + ROM_REGION(0x8000, "bios", 0) + ROM_SYSTEM_BIOS(0, "v219", "Video Seven v2.19 01/18/90") + ROMX_LOAD("spea_fga4he.vbi", 0x00000, 0x8000, CRC(ce472e63) SHA1(fe4bc168ad7ccb186a6f8158964e2116435c994b), ROM_BIOS(0) ) +ROM_END + +const tiny_rom_entry *isa16_fga4he_device::device_rom_region() const +{ + return ROM_NAME( fga4he ); +} + +void isa16_fga4he_device::device_add_mconfig(machine_config &config) +{ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(25.175_MHz_XTAL, 800, 0, 640, 524, 0, 480); + screen.set_screen_update(m_vga, FUNC(vga_device::screen_update)); + + HT208_VIDEO7_VGA(config, m_vga, 0); + m_vga->set_screen("screen"); + m_vga->set_vram_size(256*1024); +// m_vga->setup_rom_bank_cb().set([this] (u8 data) { printf("%02x\n", data); }); +// m_vga->vsync_cb().set([this](int state) { m_isa->irq2_w(state); }); + + // TODO: TMS34020-32 + Bt459 + Spea "VEMU" + // 2MB VRAM + 4MB of DRAM, dual monitor with separate DB9 connector +} + +void isa16_fga4he_device::device_start() +{ + set_isa_device(); +} + +void isa16_fga4he_device::device_reset() +{ + remap(AS_PROGRAM, 0, 0xfffff); + remap(AS_IO, 0, 0xffff); +} + +void isa16_fga4he_device::remap(int space_id, offs_t start, offs_t end) +{ + if (space_id == AS_PROGRAM) + { + m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(vga_device::mem_r)), write8sm_delegate(*m_vga, FUNC(vga_device::mem_w))); + m_isa->install_rom(this, 0xc0000, 0xc7fff, "bios"); + } + else if (space_id == AS_IO) + m_isa->install_device(0x0000, 0xffff, *this, &isa16_fga4he_device::io_isa_map); +} + +void isa16_fga4he_device::io_isa_map(address_map &map) +{ + map(0x03b0, 0x03df).m(m_vga, FUNC(ht208_video7_vga_device::io_map)); + map(0x46e8, 0x46e8).w(m_vga, FUNC(ht208_video7_vga_device::mode_setup_w)); +} diff --git a/src/devices/bus/isa/tiga_spea.h b/src/devices/bus/isa/tiga_spea.h new file mode 100644 index 00000000000..9cbc9a82709 --- /dev/null +++ b/src/devices/bus/isa/tiga_spea.h @@ -0,0 +1,44 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#ifndef MAME_BUS_ISA_TIGA_SPEA_H +#define MAME_BUS_ISA_TIGA_SPEA_H + +#pragma once + +#include "isa.h" +#include "video/pc_vga_video7.h" + +class isa16_fga4he_device : + public device_t, + public device_isa16_card_interface +{ +public: + isa16_fga4he_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // beyond Video7 issues: lacks actual TIGA section + static constexpr feature_type unemulated_features() { return feature::GRAPHICS; } + +protected: + isa16_fga4he_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + + void io_isa_map(address_map &map) ATTR_COLD; + + virtual void remap(int space_id, offs_t start, offs_t end) override; + +private: + required_device m_vga; + required_memory_region m_bios; +}; + + +DECLARE_DEVICE_TYPE(ISA16_FGA4HE, isa16_fga4he_device) + + +#endif // MAME_BUS_ISA_TIGA_SPEA_H diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 332e93dc93c..484b60f0898 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -82,7 +82,7 @@ void sis6326_pci_device::device_start() // INTA# // TODO: VGA D3/MD27 can strap this to no irq pin - // ls5amvp3 goes N/A, assume it's disabled by default + // ls5amvp3 goes N/A in Award Config list, assume it's disabled by default intr_pin = 0; } diff --git a/src/devices/video/pc_vga_tseng.cpp b/src/devices/video/pc_vga_tseng.cpp index 3ffeecf5161..41d843b8d3c 100644 --- a/src/devices/video/pc_vga_tseng.cpp +++ b/src/devices/video/pc_vga_tseng.cpp @@ -27,7 +27,7 @@ DEFINE_DEVICE_TYPE(TSENG_VGA, tseng_vga_device, "tseng_vga", "Tseng Labs ET4000AX VGA i/f") DEFINE_DEVICE_TYPE(ET4KW32I_VGA, et4kw32i_vga_device, "et4kw32i_vga", "Tseng Labs ET4000/W32i TC6167HF VGA i/f") -tseng_vga_device::tseng_vga_device(const machine_config &mconfig, const char *tag, device_type type, device_t *owner, uint32_t clock) +tseng_vga_device::tseng_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : svga_device(mconfig, type, tag, owner, clock) { m_main_if_space_config = address_space_config("io_regs", ENDIANNESS_LITTLE, 8, 4, 0, address_map_constructor(FUNC(tseng_vga_device::io_3bx_3dx_map), this)); @@ -37,7 +37,7 @@ tseng_vga_device::tseng_vga_device(const machine_config &mconfig, const char *ta } tseng_vga_device::tseng_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tseng_vga_device(mconfig, tag, TSENG_VGA, owner, clock) + : tseng_vga_device(mconfig, TSENG_VGA, tag, owner, clock) { } @@ -375,7 +375,7 @@ uint32_t tseng_vga_device::latch_start_addr() *************************************/ et4kw32i_vga_device::et4kw32i_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : tseng_vga_device(mconfig, tag, ET4KW32I_VGA, owner, clock) + : tseng_vga_device(mconfig, ET4KW32I_VGA, tag, owner, clock) { m_acl_space_config = address_space_config("acl_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(et4kw32i_vga_device::acl_map), this)); m_mmu_space_config = address_space_config("mmu_regs", ENDIANNESS_LITTLE, 8, 15, 0, address_map_constructor(FUNC(et4kw32i_vga_device::mmu_map), this)); diff --git a/src/devices/video/pc_vga_tseng.h b/src/devices/video/pc_vga_tseng.h index f64ed95ce3f..0d24aeb23bb 100644 --- a/src/devices/video/pc_vga_tseng.h +++ b/src/devices/video/pc_vga_tseng.h @@ -8,8 +8,6 @@ #include "video/pc_vga.h" -#include "screen.h" - class tseng_vga_device : public svga_device { @@ -23,7 +21,7 @@ public: virtual void mem_w(offs_t offset, uint8_t data) override; protected: - tseng_vga_device(const machine_config &mconfig, const char *tag, device_type type, device_t *owner, uint32_t clock); + tseng_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); virtual void device_start() override ATTR_COLD; diff --git a/src/devices/video/pc_vga_video7.cpp b/src/devices/video/pc_vga_video7.cpp new file mode 100644 index 00000000000..273d5cf9ce7 --- /dev/null +++ b/src/devices/video/pc_vga_video7.cpp @@ -0,0 +1,109 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +/************************************************************************************************** + +Video7 / Headland / SPEA (S)VGA chipsets + +TODO: +- drops in MDA mode with IOAS = 1 (EGA switch or extended switch at $f7?) + +**************************************************************************************************/ + +#include "emu.h" +#include "pc_vga_video7.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + + +DEFINE_DEVICE_TYPE(HT208_VIDEO7_VGA, ht208_video7_vga_device, "ht208_video7_vga", "Headland HT208 VGA i/f") + +ht208_video7_vga_device::ht208_video7_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : svga_device(mconfig, type, tag, owner, clock) +{ + m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(ht208_video7_vga_device::sequencer_map), this)); +} + +ht208_video7_vga_device::ht208_video7_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ht208_video7_vga_device(mconfig, HT208_VIDEO7_VGA, tag, owner, clock) +{ +} + +void ht208_video7_vga_device::device_start() +{ + svga_device::device_start(); + zero(); + + vga.crtc.maximum_scan_line = 1; + + save_item(NAME(m_seq_unlock_reg)); + save_item(NAME(m_ext_b0_scratch)); + save_item(NAME(m_ext_fbctrl)); + save_item(NAME(m_ext_16bit)); +} + +void ht208_video7_vga_device::device_reset() +{ + svga_device::device_reset(); + + std::fill(std::begin(m_ext_b0_scratch), std::end(m_ext_b0_scratch), 0); + m_seq_unlock_reg = false; + m_ext_fbctrl = 0; + m_ext_16bit = 0; +} + +void ht208_video7_vga_device::sequencer_map(address_map &map) +{ + svga_device::sequencer_map(map); + map(0x08, 0xff).unmaprw(); + + map(0x06, 0x06).lrw8( + NAME([this] (offs_t offset) { + // xxxx xxx- + // ---- ---x unlocked if '1' + return m_seq_unlock_reg; + }), + NAME([this] (offs_t offset, u8 data) { + // TODO: log & actual space unlock + if (data == 0xea) + m_seq_unlock_reg = true; + if (data == 0xae) + m_seq_unlock_reg = false; + }) + ); + + map(0xa4, 0xa4).lrw8( + NAME([this] (offs_t offset) { return m_ext_clock_select; }), + NAME([this] (offs_t offset, u8 data) { + LOG("ERA4: Clock Select %02x\n", data); + m_ext_clock_select = data; + }) + ); + map(0xb0, 0xbf).lrw8( + NAME([this] (offs_t offset) { return m_ext_b0_scratch[offset]; }), + NAME([this] (offs_t offset, u8 data) { + m_ext_b0_scratch[offset] = data; + }) + ); + + map(0xf7, 0xf7).lr8( + NAME([] (offs_t offset) { return 0; }) + ); + + map(0xfe, 0xfe).lrw8( + NAME([this] (offs_t offset) { return m_ext_fbctrl; }), + NAME([this] (offs_t offset, u8 data) { + LOG("ERFE: Foreground/Background Control %02x\n", data); + m_ext_fbctrl = data; + }) + ); + map(0xff, 0xff).lrw8( + NAME([this] (offs_t offset) { return m_ext_16bit; }), + NAME([this] (offs_t offset, u8 data) { + LOG("ERFF: 16-bit i/f Control %02x\n", data); + m_ext_16bit = data; + }) + ); +} diff --git a/src/devices/video/pc_vga_video7.h b/src/devices/video/pc_vga_video7.h new file mode 100644 index 00000000000..8c9c2325be7 --- /dev/null +++ b/src/devices/video/pc_vga_video7.h @@ -0,0 +1,40 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_VIDEO_PC_VGA_VIDEO7_H +#define MAME_VIDEO_PC_VGA_VIDEO7_H + +#pragma once + +#include "video/pc_vga.h" + +class ht208_video7_vga_device : public svga_device +{ +public: + ht208_video7_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // black screen, several missing features + static constexpr feature_type unemulated_features() { return feature::GRAPHICS; } + +protected: + ht208_video7_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void sequencer_map(address_map &map) override ATTR_COLD; + +private: + bool m_seq_unlock_reg; + + u8 m_ext_b0_scratch[16]; + + u8 m_ext_clock_select; + u8 m_ext_fbctrl; + u8 m_ext_16bit; +}; + +DECLARE_DEVICE_TYPE(HT208_VIDEO7_VGA, ht208_video7_vga_device) + + +#endif // MAME_VIDEO_PC_VGA_VIDEO7_H From 3647a56ede74bd9ca545862001f51d6e0cc82d56 Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 2 Mar 2026 19:19:19 +0100 Subject: [PATCH 107/351] bus/pci: initial Trident 4DWave-DX hookup --- scripts/src/bus.lua | 2 + src/devices/bus/pci/pci_slot.cpp | 2 + src/devices/bus/pci/trident_4dwavedx.cpp | 189 +++++++++++++++++++++++ src/devices/bus/pci/trident_4dwavedx.h | 52 +++++++ src/devices/machine/s3c2440.h | 2 +- src/devices/machine/s3c24xx.hxx | 2 +- src/devices/machine/sis7018_audio.cpp | 2 +- src/devices/sound/es1373.cpp | 4 +- src/mame/funworld/photoply.cpp | 2 +- src/mame/ice/vp101.cpp | 2 +- src/mame/midway/midqslvr.cpp | 2 +- src/mame/misc/39in1.cpp | 2 +- src/mame/misc/globalvr.cpp | 2 +- src/mame/shared/xbox_pci.cpp | 2 +- src/mame/shared/xbox_pci.h | 2 +- src/mame/skeleton/pegasos2.cpp | 2 +- 16 files changed, 258 insertions(+), 13 deletions(-) create mode 100644 src/devices/bus/pci/trident_4dwavedx.cpp create mode 100644 src/devices/bus/pci/trident_4dwavedx.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 8e4ffbae4ea..5deef16914c 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -4472,6 +4472,8 @@ if BUSES["PCI"] then MAME_DIR .. "src/devices/bus/pci/sonicvibes.h", MAME_DIR .. "src/devices/bus/pci/sw1000xg.cpp", MAME_DIR .. "src/devices/bus/pci/sw1000xg.h", + MAME_DIR .. "src/devices/bus/pci/trident_4dwavedx.cpp", + MAME_DIR .. "src/devices/bus/pci/trident_4dwavedx.h", MAME_DIR .. "src/devices/bus/pci/trio_pci.cpp", MAME_DIR .. "src/devices/bus/pci/trio_pci.h", MAME_DIR .. "src/devices/bus/pci/virge_pci.cpp", diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp index c800ee74846..1efbbed055f 100644 --- a/src/devices/bus/pci/pci_slot.cpp +++ b/src/devices/bus/pci/pci_slot.cpp @@ -28,6 +28,7 @@ #include "sis6326.h" #include "sonicvibes.h" #include "sw1000xg.h" +#include "trident_4dwavedx.h" #include "trio_pci.h" #include "virge_pci.h" #include "vision.h" @@ -146,6 +147,7 @@ void pci_cards(device_slot_interface &device) device.option_add("ds2416", DS2416); device.option_add("sonicvibes", SONICVIBES); device.option_add("ess_solo1", ES1946_SOLO1E); + device.option_add("4dwavedx", TRIDENT_4DWAVEDX); device.option_add("zr36057", ZR36057_PCI); device.option_add("audiowerk2", AUDIOWERK2); diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp new file mode 100644 index 00000000000..4dc92d1968a --- /dev/null +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -0,0 +1,189 @@ +// license:BSD-3-Clause +// copyright-holders: +/************************************************************************************************** + +Trident 4DWAVE-DX + +AC'97 v1.x (fixed 48 kHz) + +TODO: +- win98se throws a BSoD 0e (page fault) on "Trident Legacy Audio" installation; +- non-working in DOS beyond basic PCI identification + i.e. wants SB emulation in MS-DOS 7, in turn can't set proper interrupt line (goes BLASTER=I255) + +**************************************************************************************************/ + +#include "emu.h" +#include "trident_4dwavedx.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + + +DEFINE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device, "trident_4dwavedx", "Trident 4D Wave-DX sound card") + + +trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : pci_card_device(mconfig, type, tag, owner, clock) +{ +} + +trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : trident_4dwavedx_device(mconfig, TRIDENT_4DWAVEDX, tag, owner, clock) +{ + set_ids(0x10232000, 0x00, 0x040100, 0x10232000); +} + +void trident_4dwavedx_device::device_add_mconfig(machine_config &config) +{ + // TODO: SigmaTel STAC9704T or STAC9700T +} + +void trident_4dwavedx_device::device_start() +{ + pci_card_device::device_start(); + + add_map( 256, M_IO, FUNC(trident_4dwavedx_device::io_map)); + add_map( 4*1024, M_MEM, FUNC(trident_4dwavedx_device::mmio_map)); + + // INTA# + intr_pin = 1; + intr_line = 0x00; + + // TODO: max_lat = 0x05, min_gnt = 0x02 + + save_item(NAME(m_ddma_config)); + save_item(NAME(m_legacy_control)); + save_item(NAME(m_power_state)); + save_item(STRUCT_MEMBER(m_interrupt_snoop, enable)); + save_item(STRUCT_MEMBER(m_interrupt_snoop, vector)); + + save_item(NAME(m_asr4)); + save_item(NAME(m_asr5)); + save_item(NAME(m_asr6)); +} + +void trident_4dwavedx_device::device_reset() +{ + pci_card_device::device_reset(); + + command = 0x0000; + command_mask = 7; + // Medium DEVSEL#, support cap list + status = 0x0210; + + m_ddma_config = m_legacy_control = 0; + m_power_state = 0; + m_interrupt_snoop.enable = false; + m_interrupt_snoop.vector = 0; + + m_asr4 = 0; + m_asr5 = 0x04; + m_asr6 = 0x02; + + remap_cb(); +} + +u8 trident_4dwavedx_device::capptr_r() +{ + return 0x48; +} + +void trident_4dwavedx_device::config_map(address_map &map) +{ + pci_card_device::config_map(map); + // DDMA config + map(0x40, 0x43).lrw32( + NAME([this] (offs_t offset, u32 mem_mask) { + LOG("PCI 40h: DDMA config read (mask %08x)\n", mem_mask); + return m_ddma_config; + }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + COMBINE_DATA(&m_ddma_config); + // knock off Legacy DMA Transfer Size Control + m_ddma_config &= ~(3 << 1); + LOG("PCI 40h: %08x & %08x\n", data, mem_mask); + LOG("\tDDMA config write: address %08x Extended Address %d Slave Channel Access %d\n" + , m_ddma_config >> 4, BIT(m_ddma_config, 3), BIT(m_ddma_config, 0)); + }) + ); +// map(0x44, 0x44) Legacy I/O Base +// map(0x45, 0x45) Legacy DMA +// map(0x46, 0x46) Legacy Control + map(0x44, 0x47).lrw32( + NAME([this] (offs_t offset, u32 mem_mask) { + LOG("PCI 44h: legacy control read (mask %08x)\n", mem_mask); + return m_legacy_control; + }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + COMBINE_DATA(&m_legacy_control); + m_legacy_control &= 0x0006'03ff; + LOG("PCI 44h: %08x & %08x\n", data, mem_mask); + LOG("\tLegacy I/O base: %02x Legacy DMA: %02x Audio Engine Reset: %d Writable subsystem %d\n" + , m_legacy_control & 0xff + , (m_legacy_control >> 8) & 3 + , BIT(m_legacy_control, 18) + , BIT(m_legacy_control, 17) + ); + }) + ); + + // Power Management v1.0, D2 and D1 support, no PME# + map(0x48, 0x4b).lr32(NAME([] () { return 0x0601'0001; })); + map(0x4c, 0x4f).lrw32( + NAME([this] (offs_t offset) { return m_power_state; }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + if (ACCESSING_BITS_0_7) + { + LOG("PM Power State D%d\n", data & 3); + m_power_state = data & 3; + } + }) + ); + + map(0x50, 0x53).lrw32( + NAME([this] (offs_t offset, u32 mem_mask) { return m_interrupt_snoop.enable | (m_interrupt_snoop.vector << 8); }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + LOG("PCI 50h: %08x & %08x\n", data, mem_mask); + if (ACCESSING_BITS_0_7) + { + m_interrupt_snoop.enable = !!BIT(data, 0); + LOG("\tInterrupt snoop enable %d\n", m_interrupt_snoop.enable); + } + if (ACCESSING_BITS_8_15) + { + m_interrupt_snoop.vector = (data >> 8) & 0xff; + LOG("\tInterrupt snoop vector %02x\n", m_interrupt_snoop.vector); + } + }) + ); +} + +void trident_4dwavedx_device::io_map(address_map &map) +{ + map(0x5c, 0x5f).lrw32( + NAME([this] (offs_t offset) { + return m_asr4 | (m_asr5 << 16) | (m_asr6 << 24); + }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + if (ACCESSING_BITS_0_7) + m_asr4 = data & 0xff; + if (ACCESSING_BITS_16_23) + { + m_asr5 = (data >> 16) & 0xff; + LOG("ASR5: SB ESP Version High %02x\n", m_asr5); + } + if (ACCESSING_BITS_24_31) + { + m_asr6 = (data >> 24) & 0xff; + LOG("ASR6: SB ESP Version High %02x\n", m_asr6); + } + }) + ); +} + +void trident_4dwavedx_device::mmio_map(address_map &map) +{ +} diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h new file mode 100644 index 00000000000..a12ce79faa8 --- /dev/null +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -0,0 +1,52 @@ +// license:BSD-3-Clause +// copyright-holders: + +#ifndef MAME_BUS_PCI_TRIDENT_4DWAVEDX_H +#define MAME_BUS_PCI_TRIDENT_4DWAVEDX_H + +#pragma once + +#include "pci_slot.h" + +class trident_4dwavedx_device : public pci_card_device +{ +public: + trident_4dwavedx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + static constexpr feature_type unemulated_features() { return feature::SOUND; } + +protected: + trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_add_mconfig(machine_config &config) override; + +// virtual const tiny_rom_entry *device_rom_region() const override; + +// virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, +// uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + + virtual void config_map(address_map &map) override; + + virtual u8 capptr_r() override; + +private: + void io_map(address_map &map); + void mmio_map(address_map &map); + + u32 m_ddma_config; + u32 m_legacy_control; + struct { + bool enable; + u8 vector; + } m_interrupt_snoop; + + u8 m_power_state; + + u8 m_asr4, m_asr5, m_asr6; +}; + +DECLARE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device) + +#endif // MAME_BUS_PCI_TRIDENT_4DWAVEDX_H diff --git a/src/devices/machine/s3c2440.h b/src/devices/machine/s3c2440.h index 64f614bc208..edd05a931d3 100644 --- a/src/devices/machine/s3c2440.h +++ b/src/devices/machine/s3c2440.h @@ -146,7 +146,7 @@ enum #define S3C24XX_BASE_SDI 0x5A000000 -/* AC97 Interface */ +/* AC'97 Interface */ #define S3C24XX_BASE_AC97 0x5B000000 diff --git a/src/devices/machine/s3c24xx.hxx b/src/devices/machine/s3c24xx.hxx index fd467104fbd..88b9d78aa07 100644 --- a/src/devices/machine/s3c24xx.hxx +++ b/src/devices/machine/s3c24xx.hxx @@ -3074,7 +3074,7 @@ void S3C24_CLASS_NAME::s3c24xx_cam_w(offs_t offset, uint32_t data, uint32_t mem_ #endif -/* AC97 Interface */ +/* AC'97 Interface */ #if defined(DEVICE_S3C2440) diff --git a/src/devices/machine/sis7018_audio.cpp b/src/devices/machine/sis7018_audio.cpp index 67ac73597c5..4afe02763ca 100644 --- a/src/devices/machine/sis7018_audio.cpp +++ b/src/devices/machine/sis7018_audio.cpp @@ -2,7 +2,7 @@ // copyright-holders: Angelo Salese /************************************************************************************************** -SiS 7018 Audio device (AC97 compliant) +SiS 7018 Audio device (AC'97 compliant) TODO: - Stub interface, to be improved; diff --git a/src/devices/sound/es1373.cpp b/src/devices/sound/es1373.cpp index c3b88ecac49..d372a94cce6 100644 --- a/src/devices/sound/es1373.cpp +++ b/src/devices/sound/es1373.cpp @@ -473,10 +473,10 @@ void es1373_device::reg_w(offs_t offset, uint32_t data, uint32_t mem_mask) break; case ES_CODEC: if (data&(1<<23)) { - // Read from AC97 codec registers + // Read from AC'97 codec registers m_es_regs[offset] = (data&0xFFFF0000) | m_ac97_regs[(data>>16)&0x7f] | 0x80000000; } else { - // Write to AC97 codec registers + // Write to AC'97 codec registers m_ac97_regs[(data>>16)&0x7f] = data&0xFFFF; } break; diff --git a/src/mame/funworld/photoply.cpp b/src/mame/funworld/photoply.cpp index 98a277f2c61..799faa1d45a 100644 --- a/src/mame/funworld/photoply.cpp +++ b/src/mame/funworld/photoply.cpp @@ -522,7 +522,7 @@ GAME( 1998, photoply98sp, 0, photoply, photoply, photoply GAME( 1999, photoply99sp, 0, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 1999 (Spain)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // "CON device not opened. System halted" before PTS-DOS GAME( 1999, photoply99nl, photoply99sp, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 1999 (Netherlands)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Boots to funworld logo, goes to touchscreen calibration menu GAME( 2000, photoply2k, 0, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (v2.01)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Fails PTS-DOS bootstrap around PC=7dc5, likely bad dump -GAME( 2000, photoply2ksp, photoply2k, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (Spain)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Attract mode +GAME( 2000, photoply2ksp, photoply2k, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld (Comatel license)", "Photo Play 2000 (Spain)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Attract mode GAME( 2000, photoply2knl, photoply2k, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (Netherlands)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Punts in PTS-DOS after failing ES1868/microtouch detection, has diag inside for latter GAME( 2001, photoply2k1it, 0, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2001 (Italy)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Attract mode GAME( 2001, photoply2k1nl, photoply2k1it, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2001 (Netherlands)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // "Non system disk or I/O error" diff --git a/src/mame/ice/vp101.cpp b/src/mame/ice/vp101.cpp index 6c86b4aee2a..b784714a94e 100644 --- a/src/mame/ice/vp101.cpp +++ b/src/mame/ice/vp101.cpp @@ -65,7 +65,7 @@ Gun interface I/O tightly coupled to the CRT controller Sound System - AC97 codec for low cost of implementation and development + AC'97 codec for low cost of implementation and development TDA7375 40 Watt Integrated Amplifier Codec fed from the DDR bank via a 16 channel (8 channels of stereo) DMA engine. diff --git a/src/mame/midway/midqslvr.cpp b/src/mame/midway/midqslvr.cpp index 2e8a6200c86..c2579e408ea 100644 --- a/src/mame/midway/midqslvr.cpp +++ b/src/mame/midway/midqslvr.cpp @@ -61,7 +61,7 @@ Graphite hardware: - Main CPU: Intel Pentium III 733MHz - Motherboard: BCM GT694VP - RAM: 128MB PC100/133 -- Sound: Integrated AC97 Controller on VT82C686A Southbridge +- Sound: Integrated AC'97 Controller on VT82C686A Southbridge -or ES1373/CT5880 Audio Chip - Networking: SMC EZ Card 10 / SMC1208T (probably 10ec:8029 1113:1208) - Video Card: 3DFX Voodoo 3 diff --git a/src/mame/misc/39in1.cpp b/src/mame/misc/39in1.cpp index fd64fa8be21..cfaeb3c8c26 100644 --- a/src/mame/misc/39in1.cpp +++ b/src/mame/misc/39in1.cpp @@ -13,7 +13,7 @@ * ARM standard MMU * ARM DSP extensions * VGA-ish frame buffer with some 2D acceleration features - * AC97 stereo audio CODEC + * AC'97 stereo audio CODEC * * PCB also contains a custom ASIC, probably used for the decryption * diff --git a/src/mame/misc/globalvr.cpp b/src/mame/misc/globalvr.cpp index 78dd0734814..6113946e508 100644 --- a/src/mame/misc/globalvr.cpp +++ b/src/mame/misc/globalvr.cpp @@ -13,7 +13,7 @@ Those aren't El Torito compliant so they expect at very least a bootable MSDOS 5.0 (according to Pq_debug.txt file found in gvrxpsys). The nfsgt is a Windows XP HDD image, containing: - C:\Program Files: -\- C-Media 3D Audio driver (C-Media AC97 Audio Device / CMI8738/C3DX PCI Audio Device) +\- C-Media 3D Audio driver (C-Media AC'97 Audio Device / CMI8738/C3DX PCI Audio Device) \- Intel 82865G/PE/P, 82875P (GMCH) \- Ligos Indeo XP codec package (Indeo Video 5.2) \- ALi USB2.0 Driver diff --git a/src/mame/shared/xbox_pci.cpp b/src/mame/shared/xbox_pci.cpp index 530eca40dc3..dceef0d7f6e 100644 --- a/src/mame/shared/xbox_pci.cpp +++ b/src/mame/shared/xbox_pci.cpp @@ -1231,7 +1231,7 @@ void mcpx_apu_device::apu_w(offs_t offset, uint32_t data, uint32_t mem_mask) } /* - * AC97 Audio Controller + * AC'97 Audio Controller */ DEFINE_DEVICE_TYPE(MCPX_AC97_AUDIO, mcpx_ac97_audio_device, "mcpx_ac97_audio", "MCPX AC'97 Audio Codec Interface") diff --git a/src/mame/shared/xbox_pci.h b/src/mame/shared/xbox_pci.h index 8a046138ecc..39877833e0e 100644 --- a/src/mame/shared/xbox_pci.h +++ b/src/mame/shared/xbox_pci.h @@ -409,7 +409,7 @@ private: DECLARE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device) /* - * AC97 Audio Controller + * AC'97 Audio Controller */ class mcpx_ac97_audio_device : public pci_device { diff --git a/src/mame/skeleton/pegasos2.cpp b/src/mame/skeleton/pegasos2.cpp index d33cff75d82..b850ba44259 100644 --- a/src/mame/skeleton/pegasos2.cpp +++ b/src/mame/skeleton/pegasos2.cpp @@ -13,7 +13,7 @@ - 1x AGP, 3x PCI slots - 2xLAN (Gigabit from northbridge, 100 MBit from southbridge) - VIA VT6306 (firewire) - - AC97 sound (Sigmatel STAC 9766 Codec) + - AC'97 sound (Sigmatel STAC9766 Codec, v2.3) - Floppy - PS/2 keyboard/mouse - Joystick From c83ace068ea4dddd0e0318a18df083687ac3d360 Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 2 Mar 2026 19:32:49 +0100 Subject: [PATCH 108/351] sound/es1373.cpp: use put_int_clamp on samples output --- src/devices/sound/es1373.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/devices/sound/es1373.cpp b/src/devices/sound/es1373.cpp index d372a94cce6..0025ff6a78d 100644 --- a/src/devices/sound/es1373.cpp +++ b/src/devices/sound/es1373.cpp @@ -268,6 +268,8 @@ void es1373_device::sound_stream_update(sound_stream &stream) //------------------------------------------------- void es1373_device::send_audio_out(chan_info& chan, uint32_t intr_mask, sound_stream &stream) { + // TODO: use the actual pci_device bus master interface + // Only transfer PCI data if bus mastering is enabled // Fill initial half buffer if (1 && (command & 0x4) && (!chan.initialized)) { @@ -336,8 +338,8 @@ void es1373_device::send_audio_out(chan_info& chan, uint32_t intr_mask, sound_st chan.buf_rptr -= 0x10; } } - stream.put_int(0, i, lsamp, 32768); - stream.put_int(1, i, rsamp, 32768); + stream.put_int_clamp(0, i, lsamp, 32768); + stream.put_int_clamp(1, i, rsamp, 32768); } } From 7f1e10617d26dcb9358589752659fc4f30fbbb94 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 2 Mar 2026 19:45:02 +0100 Subject: [PATCH 109/351] nscsi: split HLE to a different file --- scripts/src/machine.lua | 3 + src/devices/bus/nscsi/cd.h | 2 +- src/devices/bus/nscsi/hd.h | 2 +- src/devices/bus/nscsi/tape.h | 2 +- src/devices/machine/nscsi_bus.cpp | 804 +---------------------------- src/devices/machine/nscsi_bus.h | 715 -------------------------- src/devices/machine/nscsi_hle.cpp | 810 ++++++++++++++++++++++++++++++ src/devices/machine/nscsi_hle.h | 724 ++++++++++++++++++++++++++ 8 files changed, 1542 insertions(+), 1520 deletions(-) create mode 100644 src/devices/machine/nscsi_hle.cpp create mode 100644 src/devices/machine/nscsi_hle.h diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index caece4fe09a..b3a9eeefc3b 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2799,6 +2799,7 @@ end -- --@src/devices/machine/nscsi_bus.h,MACHINES["NSCSI"] = true --@src/devices/machine/nscsi_cb.h,MACHINES["NSCSI"] = true +--@src/devices/machine/nscsi_hle.h,MACHINES["NSCSI"] = true --------------------------------------------------- if MACHINES["NSCSI"] then @@ -2807,6 +2808,8 @@ if MACHINES["NSCSI"] then MAME_DIR .. "src/devices/machine/nscsi_bus.h", MAME_DIR .. "src/devices/machine/nscsi_cb.cpp", MAME_DIR .. "src/devices/machine/nscsi_cb.h", + MAME_DIR .. "src/devices/machine/nscsi_hle.cpp", + MAME_DIR .. "src/devices/machine/nscsi_hle.h", } end diff --git a/src/devices/bus/nscsi/cd.h b/src/devices/bus/nscsi/cd.h index a177bcd4a2e..eef3c2ec403 100644 --- a/src/devices/bus/nscsi/cd.h +++ b/src/devices/bus/nscsi/cd.h @@ -6,7 +6,7 @@ #pragma once #include "imagedev/cdromimg.h" -#include "machine/nscsi_bus.h" +#include "machine/nscsi_hle.h" #include "sound/cdda.h" #include "cdrom.h" diff --git a/src/devices/bus/nscsi/hd.h b/src/devices/bus/nscsi/hd.h index eabdc22a300..332783e09b3 100644 --- a/src/devices/bus/nscsi/hd.h +++ b/src/devices/bus/nscsi/hd.h @@ -5,7 +5,7 @@ #pragma once -#include "machine/nscsi_bus.h" +#include "machine/nscsi_hle.h" #include "imagedev/harddriv.h" class nscsi_harddisk_device : public nscsi_full_device diff --git a/src/devices/bus/nscsi/tape.h b/src/devices/bus/nscsi/tape.h index 6f3dc1d67e6..a70c43c7cd0 100644 --- a/src/devices/bus/nscsi/tape.h +++ b/src/devices/bus/nscsi/tape.h @@ -7,7 +7,7 @@ #pragma once #include "imagedev/simh_tape_image.h" -#include "machine/nscsi_bus.h" +#include "machine/nscsi_hle.h" DECLARE_DEVICE_TYPE(NSCSI_TAPE, nscsi_tape_device); diff --git a/src/devices/machine/nscsi_bus.cpp b/src/devices/machine/nscsi_bus.cpp index a02ebd35bc0..af9eb4c77ef 100644 --- a/src/devices/machine/nscsi_bus.cpp +++ b/src/devices/machine/nscsi_bus.cpp @@ -3,18 +3,12 @@ #include "emu.h" #include "nscsi_bus.h" -#include "util/multibyte.h" - #include #include -#define LOG_UNSUPPORTED (1U << 1) -#define LOG_STATE (1U << 2) -#define LOG_CONTROL (1U << 3) -#define LOG_DATA (1U << 4) -#define LOG_DATA_SENT (1U << 5) +#define LOG_CONTROL (1U << 1) -#define VERBOSE (LOG_UNSUPPORTED) +//#define VERBOSE (LOG_CONTROL) //#define LOG_OUTPUT_FUNC osd_printf_info @@ -209,797 +203,3 @@ void nscsi_device_interface::interface_pre_start() { device().save_item(NAME(m_scsi_id)); } - - -nscsi_full_device::nscsi_full_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, type, tag, owner, clock), - nscsi_device_interface(mconfig, *this), - nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) -{ -} - -const char *const nscsi_full_device::command_names[256] = { - /* 00 */ "TEST_UNIT_READY", "REWIND/REZERO_UNIT", "REQUEST_BLOCK_ADDRESS", "REQUEST_SENSE", "FORMAT/FORMAT_UNIT", "READ_BLOCK_LIMITS", "?", "INITIALIZE_ELEMENT_STATUS/REASSIGN_BLOCKS", - /* 08 */ "GET_MESSAGE_6/READ_6/RECEIVE", "?", "PRINT/SEND_MESSAGE_6/SEND_6/WRITE_6", "SEEK_6/SLEW_AND_PRINT", "SEEK_BLOCK", "?", "?", "READ_REVERSE", - /* 10 */ "SYNCHRONIZE_BUFFER/WRITE_FILEMARKS", "SPACE", "INQUIRY", "VERIFY_6", "RECOVER_BUFFERED_DATA", "MODE_SELECT_6", "RESERVE_6/RESERVE_UNIT", "RELEASE_6/RELEASE_UNIT", - /* 18 */ "COPY", "ERASE", "MODE_SENSE_6", "LOAD_UNLOAD/SCAN/STOP_PRINT/START_STOP_UNIT", "RECEIVE_DIAGNOSTIC_RESULTS", "SEND_DIAGNOSTIC", "PREVENT_ALLOW_MEDIUM_REMOVAL", "?", - /* 20 */ "?", "?", "?", "READ_FORMAT_CAPACITIES", "SET_WINDOW", "GET_WINDOW/READ_CAPACITY/READ_CD_RECORDED_CAPACITY", "?", "?", - - /* 28 */ "GET_MESSAGE_10/READ_10", "READ_GENERATION", "SEND_MESSAGE_10/SEND_10/WRITE_10", "LOCATE/POSITION_TO_ELEMENT/SEEK_10", "ERASE_10", "READ_UPDATED_BLOCK", "WRITE_AND_VERIFY_10", "VERIFY_10", - /* 30 */ "SEARCH_DATA_HIGH_10", "OBJECT_POSITION/SEARCH_DATA_EQUAL_10", "SEARCH_DATA_LOW_10", "SET_LIMITS_10", "PREFETCH/READ_POSITION", "SYNCHRONIZE_CACHE", "LOCK_UNLOCK_CACHE", "READ_DEFECT_DATA_10", - /* 38 */ "MEDIUM_SCAN", "COMPARE", "COPY_AND_VERIFY", "WRITE_BUFFER", "READ_BUFFER", "UPDATE_BLOCK", "READ_LONG", "WRITE_LONG", - /* 40 */ "CHANGE_DEFINITION", "WRITE_SAME", "READ_SUB_CHANNEL", "READ_TOC_PMA_ATIP", "READ_HEADER", "PLAY_AUDIO_10", "GET_CONFIGURATION", "PLAY_AUDIO_MSF", - /* 48 */ "PLAY_AUDIO_TRACK_INDEX", "PLAY_TRACK_RELATIVE_10", "GET_EVENT_STATUS_NOTIFICATION", "PAUSE_RESUME", "LOG_SELECT", "LOG_SENSE", "STOP_PLAY_SCAN", "?", - /* 50 */ "XDWRITE", "READ_DISC_INFORMATION/XPWRITE", "READ_TRACK_INFORMATION/XDREAD", "RESERVE_TRACK", "SEND_OPC_INFORMATION", "MODE_SELECT_10", "RESERVE_10", "RELEASE_10", - /* 58 */ "REPAIR_TRACK", "READ_MASTER_CUE", "MODE_SENSE_10", "CLOSE_TRACK_SESSION", "READ_BUFFER_CAPACITY", "SEND_CUE_SHEET", "PERSISTENT_RESERVE_IN", "PERSISTENT_RESERVE_OUT", - /* 80 */ "XDWRITE_EXTENDED", "REBUILD", "REGENERATE", "EXTENDED_COPY", "RECEIVE_COPY_RESULTS", "?", "?", "?", - /* 88 */ "?", "?", "WRITE_16", "?", "?", "?", "?", "?", - /* 90 */ "?", "SYNCHRONIZE_CACHE_16", "?", "WRITE_SAME_16", "?", "?", "?", "?", - /* 98 */ "?", "?", "?", "?", "?", "?", "READ_CAPACITY_166/READ_LONG_16", "WRITE_LONG_16", - /* a0 */ "REPORT_LUNS", "BLANK", "SEND_EVENT", "REPORT_DEVICE_IDENTIFIER/SEND_KEY", "SET_DEVICE_IDENTIFIER/REPORT_KEY", "PLAY_AUDIO_12", "LOAD_UNLOAD_MEDIUM", "MOVE_MEDIUM_ATTACHED/SET_READ_AHEAD", - /* a8 */ "READ_12", "PLAY_RELATIVE_12", "WRITE_12", "?", "ERASE_12/GET_PERFORMANCE", "READ_DVD_STRUCTURE", "WRITE_AND_VERIFY_12", "VERIFY_12", - /* b0 */ "SEARCH_DATA_HIGH_12", "SEARCH_DATA_EQUAL_12", "SEARCH_DATA_LOW_12", "SET_LIMITS_12", "READ_ELEMENT_STATUS_ATTACHED", "?", "SET_STREAMING", "READ_DEFECT_DATA_12", - /* b8 */ "?", "READ_CD_MSF", "SCAN_MMC", "SET_CD_SPEED", "PLAY_CD/SPARE_IN", "MECHANISM_STATUS/SPARE_OUT", "READ_CD", "SEND_DVD_STRUCTURE", - /* c0 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* c8 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* d0 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* d8 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* e0 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* e8 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* f0 */ "?", "?", "?", "?", "?", "?", "?", "?", - /* f8 */ "?", "?", "?", "?", "?", "?", "?", "?", -}; - -void nscsi_full_device::device_start() -{ - m_scsi_timer = timer_alloc(FUNC(nscsi_full_device::update_tick), this); - save_item(NAME(m_scsi_cmdbuf)); - save_item(NAME(m_scsi_sense_buffer)); - save_item(NAME(m_scsi_cmdsize)); - save_item(NAME(m_scsi_identify)); - save_item(NAME(m_scsi_state)); - save_item(NAME(m_scsi_substate)); - save_item(NAME(m_scsi_initiator_id)); - save_item(NAME(m_data_buffer_id)); - save_item(NAME(m_data_buffer_size)); - save_item(NAME(m_data_buffer_pos)); - save_item(NAME(m_buf_control_rpos)); - save_item(NAME(m_buf_control_wpos)); - for(int i=0; i<32; i++) { - save_item(NAME(m_buf_control[i].m_action), i); - save_item(NAME(m_buf_control[i].m_param1), i); - save_item(NAME(m_buf_control[i].m_param2), i); - } -} - -void nscsi_full_device::device_reset() -{ - m_scsi_state = m_scsi_substate = IDLE; - m_buf_control_rpos = m_buf_control_wpos = 0; - m_scsi_identify = 0; - m_data_buffer_size = 0; - m_data_buffer_pos = 0; - m_scsi_bus->data_w(m_scsi_refid, 0); - m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); - m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); - sense(false, SK_NO_SENSE); -} - -TIMER_CALLBACK_MEMBER(nscsi_full_device::update_tick) -{ - step(param); -} - -void nscsi_full_device::scsi_ctrl_changed() -{ - step(false); -} - -void nscsi_full_device::step(bool timeout) -{ - uint32_t ctrl = m_scsi_bus->ctrl_r(); - uint32_t data = m_scsi_bus->data_r(); - if(ctrl & S_RST) { - m_scsi_bus->data_w(m_scsi_refid, 0); - m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); - m_scsi_state = IDLE; - LOG("scsi bus reset\n"); - m_scsi_state = m_scsi_substate = IDLE; - m_buf_control_rpos = m_buf_control_wpos = 0; - m_scsi_identify = 0; - m_data_buffer_size = 0; - m_data_buffer_pos = 0; - return; - } - - LOGMASKED(LOG_STATE, "state=%d.%d %s\n", - m_scsi_state & STATE_MASK, (m_scsi_state & SUB_MASK) >> SUB_SHIFT, - timeout ? "timeout" : "change"); - - switch(m_scsi_state & SUB_MASK ? m_scsi_state & SUB_MASK : m_scsi_state & STATE_MASK) { - case IDLE: - if(((ctrl & (S_SEL|S_BSY)) == S_SEL) && (m_scsi_id != -1) && ((data & (1 << m_scsi_id)) != 0)) { - for(m_scsi_initiator_id = 0; m_scsi_initiator_id != 16 && (m_scsi_initiator_id == m_scsi_id || (data & (1 << m_scsi_initiator_id))); m_scsi_initiator_id++) {}; - if(m_scsi_initiator_id == 16) - m_scsi_initiator_id = -1; - m_scsi_state = TARGET_SELECT_WAIT_BUS_SETTLE; - m_scsi_timer->adjust(scsi_bus_settle_delay(), true); - } - break; - - case TARGET_SELECT_WAIT_BUS_SETTLE: - if((ctrl & (S_SEL|S_BSY)) == S_SEL) { - m_scsi_state = TARGET_SELECT_WAIT_SEL_0; - m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); - } else - m_scsi_state = IDLE; - break; - - case TARGET_SELECT_WAIT_SEL_0: - if(ctrl & S_SEL) - break; - buf_control_push()->m_action = BC_MSG_OR_COMMAND; - m_scsi_state = TARGET_NEXT_CONTROL; - step(false); - break; - - case RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT: - if(ctrl & S_ACK) { - scsi_put_data(m_data_buffer_id, m_data_buffer_pos++, m_scsi_bus->data_r()); - m_scsi_state = (m_scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); - m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ); - } - break; - - case RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT: - if(!(ctrl & S_ACK)) { - m_scsi_state &= STATE_MASK; - m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); - attotime delay = scsi_data_byte_period(); - if (delay == attotime::zero) { - step(false); - } else { - m_scsi_timer->adjust(delay, false); - } - } - break; - - case SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT: - if(ctrl & S_ACK) { - m_scsi_state = (m_scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); - m_scsi_bus->data_w(m_scsi_refid, 0); - m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ); - } - break; - - case SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT: - if(!(ctrl & S_ACK)) { - m_scsi_state &= STATE_MASK; - m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); - attotime delay = scsi_data_byte_period(); - if (delay == attotime::zero) { - step(false); - } else { - m_scsi_timer->adjust(delay, false); - } - } - break; - - case TARGET_NEXT_CONTROL: { - control *ctl = buf_control_pop(); - switch(ctl->m_action) { - case BC_MSG_OR_COMMAND: - m_data_buffer_id = SBUF_MAIN; - m_data_buffer_pos = 0; - if(ctrl & S_ATN) { - m_scsi_state = TARGET_WAIT_MSG_BYTE; - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_MSG_OUT, S_PHASE_MASK); - } else { - m_scsi_state = TARGET_WAIT_CMD_BYTE; - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); - } - target_recv_byte(); - break; - - case BC_STATUS: - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_STATUS, S_PHASE_MASK); - target_send_byte(ctl->m_param1); - break; - - case BC_DATA_IN: - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_DATA_IN, S_PHASE_MASK); - m_data_buffer_id = ctl->m_param1; - m_data_buffer_size = ctl->m_param2; - m_data_buffer_pos = 0; - if (m_data_buffer_size > 0) { - m_scsi_state = TARGET_WAIT_DATA_IN_BYTE; - } - else { - m_scsi_state = TARGET_NEXT_CONTROL; - } - step(false); - break; - - case BC_DATA_OUT: - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_DATA_OUT, S_PHASE_MASK); - m_data_buffer_id = ctl->m_param1; - m_data_buffer_size = ctl->m_param2; - m_data_buffer_pos = 0; - if (m_data_buffer_size > 0) { - m_scsi_state = TARGET_WAIT_DATA_OUT_BYTE; - } - else { - m_scsi_state = TARGET_NEXT_CONTROL; - } - step(false); - break; - - case BC_MESSAGE_1: - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_MSG_IN, S_PHASE_MASK); - target_send_byte(ctl->m_param1); - break; - - case BC_BUS_FREE: - m_scsi_bus->data_w(m_scsi_refid, 0); - m_scsi_bus->ctrl_wait(m_scsi_refid, S_BSY|S_SEL|S_RST, S_ALL); - m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); - m_scsi_state = IDLE; - break; - }; - break; - } - - case TARGET_WAIT_DATA_IN_BYTE: - if(m_data_buffer_pos == m_data_buffer_size-1) - m_scsi_state = TARGET_NEXT_CONTROL; - target_send_buffer_byte(); - break; - - case TARGET_WAIT_DATA_OUT_BYTE: - if(m_data_buffer_pos == m_data_buffer_size-1) - m_scsi_state = TARGET_NEXT_CONTROL; - target_recv_byte(); - break; - - case TARGET_WAIT_MSG_BYTE: - if(ctrl & S_SEL) - return; - if(!(ctrl & S_ATN)) { - m_scsi_cmdsize = m_data_buffer_pos; - scsi_message(); - m_data_buffer_id = SBUF_MAIN; - m_data_buffer_pos = 0; - m_scsi_state = TARGET_WAIT_CMD_BYTE; - m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); - } - target_recv_byte(); - break; - - case TARGET_WAIT_CMD_BYTE: - if(ctrl & S_SEL) - return; - if(ctrl & S_ATN) { - LOG("Parity error? Say what?\n"); - m_scsi_state = IDLE; - break; - } - - if(scsi_command_done(m_scsi_cmdbuf[0], m_data_buffer_pos)) { - m_scsi_cmdsize = m_data_buffer_pos; - m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); - scsi_command(); - m_scsi_state = TARGET_NEXT_CONTROL; - attotime delay = scsi_data_command_delay(); - if (delay == attotime::zero) { - step(false); - } else { - m_scsi_timer->adjust(delay, false); - } - } else - target_recv_byte(); - break; - - default: - LOG("step() unexpected state %d.%d\n", - m_scsi_state & STATE_MASK, (m_scsi_state & SUB_MASK) >> SUB_SHIFT); - exit(0); - } -} - -void nscsi_full_device::target_recv_byte() -{ - m_scsi_bus->ctrl_wait(m_scsi_refid, S_ACK, S_ACK); - m_scsi_state = (m_scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); - m_scsi_bus->ctrl_w(m_scsi_refid, S_REQ, S_REQ); - step(false); -} - -void nscsi_full_device::target_send_byte(uint8_t val) -{ - m_scsi_bus->ctrl_wait(m_scsi_refid, S_ACK, S_ACK); - m_scsi_state = (m_scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); - m_scsi_bus->data_w(m_scsi_refid, val); - m_scsi_bus->ctrl_w(m_scsi_refid, S_REQ, S_REQ); - step(false); -} - -uint8_t nscsi_full_device::scsi_get_data(int id, int pos) -{ - switch(id) { - case SBUF_MAIN: - LOGMASKED(LOG_DATA, "scsi_get_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, m_scsi_cmdbuf[pos], m_scsi_cmdbuf[pos] >= 0x20 && m_scsi_cmdbuf[pos] < 0x7f ? (char)m_scsi_cmdbuf[pos] : ' '); - return m_scsi_cmdbuf[pos]; - case SBUF_SENSE: - return m_scsi_sense_buffer[pos]; - default: - fatalerror("nscsi_full_device::scsi_get_data - unknown id\n"); - } -} - -void nscsi_full_device::scsi_put_data(int id, int pos, uint8_t data) -{ - switch(id) { - case SBUF_MAIN: - LOGMASKED(LOG_DATA, "nscsi_bus: scsi_put_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); - m_scsi_cmdbuf[pos] = data; - break; - case SBUF_SENSE: - m_scsi_sense_buffer[pos] = data; - break; - default: - fatalerror("nscsi_full_device::scsi_put_data - unknown id %d\n", id); - } -} - -void nscsi_full_device::target_send_buffer_byte() -{ - target_send_byte(scsi_get_data(m_data_buffer_id, m_data_buffer_pos++)); -} - -bool nscsi_full_device::scsi_command_done(uint8_t command, uint8_t length) -{ - if(!length) - return false; - switch(command >> 5) { - case 0: return length == 6; - case 1: return length == 10; - case 2: return length == 10; - case 3: return true; - case 4: return true; - case 5: return length == 12; - case 6: return true; - case 7: return length == 32; - case 8: return length == 16; - case 9: return length == 16; - } - return true; -} - -nscsi_full_device::control *nscsi_full_device::buf_control_push() -{ - if(m_buf_control_wpos == int(std::size(m_buf_control))) - throw emu_fatalerror("%s: buf_control overflow\n", tag()); - - control *c = m_buf_control + m_buf_control_wpos; - m_buf_control_wpos++; - return c; -} - -nscsi_full_device::control *nscsi_full_device::buf_control_pop() -{ - if(m_buf_control_rpos == m_buf_control_wpos) - throw emu_fatalerror("%s: buf_control underflow\n", tag()); - - control *c = m_buf_control + m_buf_control_rpos; - m_buf_control_rpos++; - if(m_buf_control_rpos == m_buf_control_wpos) - m_buf_control_rpos = m_buf_control_wpos = 0; - return c; -} - -void nscsi_full_device::scsi_status_complete(uint8_t st) -{ - control *c; - c = buf_control_push(); - c->m_action = BC_STATUS; - c->m_param1 = st; - c = buf_control_push(); - c->m_action = BC_MESSAGE_1; - c->m_param1 = SM_COMMAND_COMPLETE; - c = buf_control_push(); - c->m_action = BC_BUS_FREE; -} - -void nscsi_full_device::scsi_data_in(int buf, int size) -{ - if((VERBOSE & LOG_DATA_SENT) && buf == 0) { - std::string dt = ""; - int sz = size; - if(sz > 50) - sz = 50; - for(int i=0; i sz) - dt += " ..."; - LOGMASKED(LOG_DATA_SENT, "Sending data (%d)%s\n", size, dt); - } - control *c; - c = buf_control_push(); - c->m_action = BC_DATA_IN; - c->m_param1 = buf; - c->m_param2 = size; -} - -void nscsi_full_device::scsi_data_out(int buf, int size) -{ - control *c; - c = buf_control_push(); - c->m_action = BC_DATA_OUT; - c->m_param1 = buf; - c->m_param2 = size; -} - -////////////////////////////////////////////////////////////////////////////// - -void nscsi_full_device::set_sense_data(const u8 sense_key, const u16 sense_key_code, const sense_data *data) -{ - assert(sizeof(m_scsi_sense_buffer) >= 18); - assert(sense_key <= 0x0f); - memset(m_scsi_sense_buffer, 0, 18); - if (data) { - m_scsi_sense_buffer[0] = (data->invalid ? 0 : 0x80) // even though SCSI-2 section 8.2.14 implies valid bit should always be set, other sections such as 10.2.12 disagree! - | (data->deferred ? 0x71 : 0x70); - m_scsi_sense_buffer[2] = (data->filemark ? 0x80 : 0) - | (data->eom ? 0x40 : 0) - | (data->bad_len ? 0x20 : 0); // "incorrect length indicator" - put_s32be(&m_scsi_sense_buffer[3], data->info); - } - else - m_scsi_sense_buffer[0] = 0xf0; - m_scsi_sense_buffer[2] |= sense_key; - m_scsi_sense_buffer[7] = 10; // additional sense length - put_u16be(&m_scsi_sense_buffer[12], sense_key_code); -} - -void nscsi_full_device::sense(bool deferred, uint8_t key, uint8_t asc, uint8_t ascq) -{ - sense_data s; - s.deferred = deferred; - set_sense_data(key, (asc << 8) | ascq, &s); -} - -void nscsi_full_device::report_condition(const u8 sense_key, const u16 sense_key_code, const sense_data *data) -{ - set_sense_data(sense_key, sense_key_code, data); - scsi_status_complete(SS_CHECK_CONDITION); -} - -void nscsi_full_device::report_bad_lun(const u8 cmd, const u8 lun) -{ - LOG("%s (0x%02x) lun=%d\n *** BAD LUN\n", command_names[cmd], cmd, lun); - report_condition(SK_ILLEGAL_REQUEST, SKC_LOGICAL_UNIT_NOT_SUPPORTED); -} - -void nscsi_full_device::report_bad_cmd(const u8 cmd) -{ - LOG("%s (0x%02x)\n *** BAD COMMAND\n", command_names[cmd], cmd); - report_condition(SK_ILLEGAL_REQUEST, SKC_INVALID_COMMAND_OPERATION_CODE); -} - -void nscsi_full_device::report_filemark(const s32 info, const bool eom) -{ - LOG(" *** FILEMARK info=%d\n", info); - sense_data s; - s.filemark = true; - s.eom = eom; - s.info = info; - report_condition(SK_NO_SENSE, SKC_FILEMARK_DETECTED, &s); -} - -void nscsi_full_device::report_bom(const s32 info) -{ - LOG(" *** BOM info=%d\n", info); - sense_data s; - s.eom = true; - s.info = info; - report_condition(SK_NO_SENSE, SKC_BEGINNING_OF_PARTITION_MEDIUM_DETECTED, &s); -} - -void nscsi_full_device::report_ew(const s32 info) -{ - LOG(" EW info=%d\n", info); - sense_data s; - s.eom = true; - s.info = info; - report_condition(SK_NO_SENSE, SKC_END_OF_PARTITION_MEDIUM_DETECTED, &s); -} - -void nscsi_full_device::report_eod(const s32 info, const bool eom) -{ - LOG(" *** EOD info=%d\n", info); - sense_data s; - s.eom = eom; - s.info = info; - report_condition(SK_BLANK_CHECK, SKC_END_OF_DATA_DETECTED, &s); -} - -void nscsi_full_device::report_eom(const bool write, const s32 info, const bool invalid) -{ - LOG(" *** EOM info=%d invalid=%d\n", info, invalid); - sense_data s; - s.invalid = invalid; - s.eom = true; - s.info = info; - report_condition(write ? SK_VOLUME_OVERFLOW : SK_MEDIUM_ERROR, SKC_END_OF_PARTITION_MEDIUM_DETECTED, &s); -} - -void nscsi_full_device::report_bad_len(const bool over, const s32 info) -{ - LOG(" *** %sLENGTH BLOCK info=%d\n", over ? "OVER" : "UNDER", info); - sense_data s; - s.bad_len = true; - s.info = info; - report_condition(SK_ILLEGAL_REQUEST, SKC_NO_ADDITIONAL_SENSE_INFORMATION, &s); -} - -void nscsi_full_device::report_bad_cdb_field() -{ - LOG(" *** BAD CDB FIELD\n"); - report_condition(SK_ILLEGAL_REQUEST, SKC_INVALID_FIELD_IN_CDB); -} - -void nscsi_full_device::report_bad_pl_field() -{ - LOG(" *** BAD PARAMETER LIST FIELD\n"); - report_condition(SK_ILLEGAL_REQUEST, SKC_INVALID_FIELD_IN_PARAMETER_LIST); -} - -void nscsi_full_device::report_bad_pl_len() -{ - LOG(" *** BAD PARAMETER LIST LENGTH\n"); - report_condition(SK_ILLEGAL_REQUEST, SKC_PARAMETER_LIST_LENGTH_ERROR); -} - -void nscsi_full_device::report_no_saving_params() -{ - LOG(" *** NO SAVING PARAMETERS\n"); - report_condition(SK_ILLEGAL_REQUEST, SKC_SAVING_PARAMETERS_NOT_SUPPORTED); -} - -void nscsi_full_device::report_no_medium() -{ - LOG(" *** NO MEDIUM\n"); - report_condition(SK_NOT_READY, SKC_MEDIUM_NOT_PRESENT); -} - -void nscsi_full_device::report_medium_changed() -{ - LOG(" MEDIUM CHANGED\n"); - report_condition(SK_UNIT_ATTENTION, SKC_NOT_READY_TO_READY_TRANSITION_MEDIUM_MAY_HAVE_CHANGED); -} - -void nscsi_full_device::report_read_only() -{ - LOG(" *** READ ONLY\n"); - report_condition(SK_DATA_PROTECT, SKC_WRITE_PROTECTED); -} - -void nscsi_full_device::report_read_failure() -{ - LOG(" *** READ FAILURE\n"); - report_condition(SK_MEDIUM_ERROR, SKC_UNRECOVERED_READ_ERROR); -} - -void nscsi_full_device::report_write_failure() -{ - LOG(" *** WRITE FAILURE\n"); - report_condition(SK_MEDIUM_ERROR, SKC_WRITE_ERROR); -} - -void nscsi_full_device::report_erase_failure() -{ - LOG(" *** ERASE FAILURE\n"); - report_condition(SK_MEDIUM_ERROR, SKC_ERASE_FAILURE); -} - -////////////////////////////////////////////////////////////////////////////// - -void nscsi_full_device::scsi_unknown_command() -{ - std::string txt = util::string_format("Unhandled command %s (%d):", command_names[m_scsi_cmdbuf[0]], m_scsi_cmdsize); - for(int i=0; i != m_scsi_cmdsize; i++) - txt += util::string_format(" %02x", m_scsi_cmdbuf[i]); - LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt); - - scsi_status_complete(SS_CHECK_CONDITION); - sense(false, SK_ILLEGAL_REQUEST); -} - -void nscsi_full_device::scsi_command() -{ - const u8 cmd = m_scsi_cmdbuf[0]; - const u8 lun = get_lun(m_scsi_cmdbuf[1] >> 5); // LUN may be overridden by IDENTIFY, per SCSI-2 section 7.2.2 - switch(cmd) { - case SC_REZERO_UNIT: - LOG("command REZERO UNIT\n"); - scsi_status_complete(SS_GOOD); - break; - case SC_REQUEST_SENSE: - handle_request_sense(lun); - break; - default: - scsi_unknown_command(); - break; - } -} - -void nscsi_full_device::handle_request_sense(const u8 lun) // mandatory; SCSI-2 section 8.2.14 -{ - const u8 alloc_len = m_scsi_cmdbuf[4]; // allocation length - LOG("command REQUEST SENSE lun=%d alloc_len=%d\n", lun, alloc_len); - if ((m_scsi_cmdbuf[1] & 0x1f) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3]) // error: reserved bits set - return report_bad_cdb_field(); - - assert(sizeof(m_scsi_sense_buffer) >= 18); - scsi_data_in(SBUF_SENSE, std::min(18, (const int)alloc_len)); - scsi_status_complete(SS_GOOD); -} - -void nscsi_full_device::scsi_message() -{ - if(m_scsi_cmdbuf[0] & 0x80) { - m_scsi_identify = m_scsi_cmdbuf[0]; - return; - } - - std::string txt = "Unknown message"; - for(int i=0; i != m_scsi_cmdsize; i++) - txt += util::string_format(" %02x", m_scsi_cmdbuf[i]); - LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt); -} - -int nscsi_full_device::get_lun(int def) -{ - if(m_scsi_identify & 0x80) - // lower 3 bits contain LUNTRN - return m_scsi_identify & 0x07; - return def; -} - -void nscsi_full_device::bad_lun() -{ - scsi_status_complete(SS_CHECK_CONDITION); - sense(false, SK_ILLEGAL_REQUEST, SK_ASC_LOGICAL_UNIT_NOT_SUPPORTED); -} - -// Arbitration delay (2.4us) -attotime nscsi_full_device::scsi_arbitation_delay() -{ - return attotime::from_nsec(2400); -} - -// Assertion period (90ns) -attotime nscsi_full_device::scsi_assertion_period() -{ - return attotime::from_nsec(90); -} - -// Bus clear delay (800ns) -attotime nscsi_full_device::scsi_bus_clear_delay() -{ - return attotime::from_nsec(800); -} - -// Bus free delay (800ns) -attotime nscsi_full_device::scsi_bus_free_delay() -{ - return attotime::from_nsec(800); -} - -// Bus set delay (1.8us) -attotime nscsi_full_device::scsi_bus_set_delay() -{ - return attotime::from_nsec(1800); -} - -// Bus settle delay (400ns) -attotime nscsi_full_device::scsi_bus_settle_delay() -{ - return attotime::from_nsec(400); -} - -// Cable skew delay (10ns) -attotime nscsi_full_device::scsi_cable_skew_delay() -{ - return attotime::from_nsec(10); -} - -// Data release delay (400ns) -attotime nscsi_full_device::scsi_data_release_delay() -{ - return attotime::from_nsec(400); -} - -// Deskew delay (45ns) -attotime nscsi_full_device::scsi_deskew_delay() -{ - return attotime::from_nsec(45); -} - -// Disconnection delay (200us) -attotime nscsi_full_device::scsi_disconnection_delay() -{ - return attotime::from_usec(200); -} - -// Hold time (45ns) -attotime nscsi_full_device::scsi_hold_time() -{ - return attotime::from_nsec(45); -} - -// Negation period (90ns) -attotime nscsi_full_device::scsi_negation_period() -{ - return attotime::from_nsec(90); -} - -// Reset hold time (25us) -attotime nscsi_full_device::scsi_reset_hold_time() -{ - return attotime::from_usec(25); -} - -// Selection abort time (200us) -attotime nscsi_full_device::scsi_selection_abort_time() -{ - return attotime::from_usec(200); -} - -// Selection timeout delay (250ms) -attotime nscsi_full_device::scsi_selection_timeout_delay() -{ - return attotime::from_msec(250); -} - -// Fast assertion period (30ns) -attotime nscsi_full_device::scsi_fast_assertion_period() -{ - return attotime::from_nsec(30); -} - -// Fast cable skew delay (5ns) -attotime nscsi_full_device::scsi_fast_cable_skew_delay() -{ - return attotime::from_nsec(5); -} - -// Fast deskew delay (20ns) -attotime nscsi_full_device::scsi_fast_deskew_delay() -{ - return attotime::from_nsec(20); -} - -// Fast hold time (10ns) -attotime nscsi_full_device::scsi_fast_hold_time() -{ - return attotime::from_nsec(10); -} - -// Fast negation period (30ns) -attotime nscsi_full_device::scsi_fast_negation_period() -{ - return attotime::from_nsec(30); -} - -// Byte transfer rate (immediate) -attotime nscsi_full_device::scsi_data_byte_period() -{ - return attotime::zero; -} - -// Command execution delay (immediate) -attotime nscsi_full_device::scsi_data_command_delay() -{ - return attotime::zero; -} diff --git a/src/devices/machine/nscsi_bus.h b/src/devices/machine/nscsi_bus.h index 67fc815186a..539b25b569b 100644 --- a/src/devices/machine/nscsi_bus.h +++ b/src/devices/machine/nscsi_bus.h @@ -148,721 +148,6 @@ protected: nscsi_bus_device *m_scsi_bus; }; -class nscsi_full_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface -{ -public: - virtual void scsi_ctrl_changed() override; - -protected: - // SCSI status returns - enum { - SS_GOOD = 0x00, - SS_CHECK_CONDITION = 0x02, - SS_CONDITION_MET = 0x04, - SS_BUSY = 0x08, - SS_INT_GOOD = 0x10, - SS_INT_CONDITION_MET = 0x14, - SS_RESV_CONFLICT = 0x18, - SS_TERMINATED = 0x22, - SS_QUEUE_FULL = 0x28 - }; - - // SCSI sense keys - enum { - SK_NO_SENSE = 0x00, - SK_RECOVERED_ERROR = 0x01, - SK_NOT_READY = 0x02, - SK_MEDIUM_ERROR = 0x03, - SK_HARDWARE_ERROR = 0x04, - SK_ILLEGAL_REQUEST = 0x05, - SK_UNIT_ATTENTION = 0x06, - SK_DATA_PROTECT = 0x07, - SK_BLANK_CHECK = 0x08, - SK_VENDOR_SPECIFIC = 0x09, - SK_COPY_ABORTED = 0x0a, - SK_ABORTED_COMMAND = 0x0b, - SK_EQUAL = 0x0c, - SK_VOLUME_OVERFLOW = 0x0d, - SK_MISCOMPARE = 0x0e, - SK_COMPLETED = 0x0f - }; - - // SCSI SPACE type codes; SCSI-2 table 189 - enum { - STC_BLOCKS = 0x00, - STC_FILEMARKS = 0x01, - STC_SEQUENTIAL_FILEMARKS = 0x02, - STC_END_OF_DATA = 0x03, - STC_SETMARKS = 0x04, - STC_SEQUENTIAL_SETMARKS = 0x05 - }; - - // SCSI MODE SENSE page controls; SCSI-2 table 55 - enum { - SPC_CURRENT_VALUES = 0x00, - SPC_CHANGEABLE_VALUES = 0x01, - SPC_DEFAULT_VALUES = 0x02, - SPC_SAVED_VALUES = 0x03 - }; - - // SCSI MODE SELECT/SENSE page codes; SCSI-2 tables 95, 155, 199, 216, 267, 296, 324, 350, 363; extra SCSI-3 codes from "The SCSI Bench Reference" - enum { - SPC_VENDOR_SPECIFIC = 0x00, - SPC_READ_WRITE_ERROR_RECOVERY_PAGE = 0x01, - SPC_READ_ERROR_RECOVERY_PAGE = 0x01, - SPC_DISCONNECT_RECONNECT_PAGE = 0x02, - SPC_FORMAT_DEVICE_PAGE = 0x03, - SPC_PARALLEL_PRINTER_INTERFACE_PAGE = 0x03, - SPC_MEASUREMENT_UNITS_PAGE = 0x03, - SPC_RIGID_DISK_GEOMETRY_PAGE = 0x04, - SPC_SERIAL_PRINTER_INTERFACE_PAGE = 0x04, - SPC_FLEXIBLE_DISK_PAGE = 0x05, - SPC_PRINTER_OPTIONS_PAGE = 0x05, - SPC_OPTICAL_MEMORY_PAGE = 0x06, - SPC_VERIFY_ERROR_RECOVERY_PAGE = 0x07, - SPC_CACHING_PAGE = 0x08, - SPC_PERIPHERAL_DEVICE_PAGE = 0x09, - SPC_CONTROL_MODE_PAGE = 0x0a, - SPC_MEDIUM_TYPES_SUPPORTED_PAGE = 0x0b, - SPC_NOTCH_AND_PARTITION_PAGE = 0x0c, - SPC_DIRECT_ACCESS_POWER_CONDITION_PAGE = 0x0d, // direct access device only - SPC_CD_ROM_PAGE = 0x0d, - SPC_CD_ROM_AUDIO_CONTROL_PAGE = 0x0e, - SPC_DATA_COMPRESSION_PAGE = 0x0f, - SPC_XOR_CONTROL_MODE_PAGE = 0x10, - SPC_DEVICE_CONFIGURATION_PAGE = 0x10, - SPC_MEDIUM_PARTITION_PAGE_1 = 0x11, - SPC_MEDIUM_PARTITION_PAGE_2 = 0x12, - SPC_MEDIUM_PARTITION_PAGE_3 = 0x13, - SPC_MEDIUM_PARTITION_PAGE_4 = 0x14, - SPC_POWER_CONDITION_PAGE = 0x1a, // all other device types - SPC_INFORMATIONAL_EXCEPTIONS_CONTROL_PAGE = 0x1c, - SPC_ELEMENT_ADDRESS_ASSIGNMENT_PAGE = 0x1d, - SPC_TRANSPORT_GEOMETRY_PARAMETERS_PAGE = 0x1e, - SPC_DEVICE_CAPABILITIES_PAGE = 0x1f, - SPC_RETURN_ALL_MODE_PAGES = 0x3f - }; - - // SCSI additional sense codes and additional sense code qualifiers, packaged together as additional qualified sense key codes; SCSI-2 table 71; extra SCSI-3 codes from "The SCSI Bench Reference" - enum { - SKC_NO_ADDITIONAL_SENSE_INFORMATION = 0x0000, - SKC_FILEMARK_DETECTED = 0x0001, - SKC_END_OF_PARTITION_MEDIUM_DETECTED = 0x0002, - SKC_SETMARK_DETECTED = 0x0003, - SKC_BEGINNING_OF_PARTITION_MEDIUM_DETECTED = 0x0004, - SKC_END_OF_DATA_DETECTED = 0x0005, - SKC_IO_PROCESS_TERMINATED = 0x0006, - SKC_AUDIO_PLAY_OPERATION_IN_PROGRESS = 0x0011, - SKC_AUDIO_PLAY_OPERATION_PAUSED = 0x0012, - SKC_AUDIO_PLAY_OPERATION_SUCCESSFULLY_COMPLETED = 0x0013, - SKC_AUDIO_PLAY_OPERATION_STOPPED_DUE_TO_ERROR = 0x0014, - SKC_NO_CURRENT_AUDIO_STATUS_TO_RETURN = 0x0015, - SKC_OPERATION_IN_PROGRESS = 0x0016, - SKC_CLEANING_REQUESTED = 0x0017, - SKC_NO_INDEX_SECTOR_SIGNAL = 0x0100, - SKC_NO_SEEK_COMPLETE = 0x0200, - SKC_PERIPHERAL_DEVICE_WRITE_FAULT = 0x0300, - SKC_NO_WRITE_CURRENT = 0x0301, - SKC_EXCESSIVE_WRITE_ERRORS = 0x0302, - SKC_LOGICAL_UNIT_NOT_READY_CAUSE_NOT_REPORTABLE = 0x0400, - SKC_LOGICAL_UNIT_IS_IN_PROCESS_OF_BECOMING_READY = 0x0401, - SKC_LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED = 0x0402, - SKC_LOGICAL_UNIT_NOT_READY_MANUAL_INTERVENTION_REQUIRED = 0x0403, - SKC_LOGICAL_UNIT_NOT_READY_FORMAT_IN_PROGRESS = 0x0404, - SKC_LOGICAL_UNIT_NOT_READY_OPERATION_IN_PROGRESS = 0x0407, - SKC_LOGICAL_UNIT_DOES_NOT_RESPOND_TO_SELECTION = 0x0500, - SKC_NO_REFERENCE_POSITION_FOUND = 0x0600, - SKC_MULTIPLE_PERIPHERAL_DEVICES_SELECTED = 0x0700, - SKC_LOGICAL_UNIT_COMMUNICATION_FAILURE = 0x0800, - SKC_LOGICAL_UNIT_COMMUNICATION_TIME_OUT = 0x0801, - SKC_LOGICAL_UNIT_COMMUNICATION_PARITY_ERROR = 0x0802, - SKC_TRACK_FOLLOWING_ERROR = 0x0900, - SKC_TRACKING_SERVO_FAILURE = 0x0901, - SKC_FOCUS_SERVO_FAILURE = 0x0902, - SKC_SPINDLE_SERVO_FAILURE = 0x0903, - SKC_HEAD_SELECT_FAULT = 0x0904, - SKC_ERROR_LOG_OVERFLOW = 0x0a00, - SKC_WARNING = 0x0b00, - SKC_WARNING_SPECIFIC_TEMPERATURE_EXCEEDED = 0x0b01, - SKC_WRITE_ERROR = 0x0c00, - SKC_WRITE_ERROR_RECOVERED_WITH_AUTO_REALLOCATION = 0x0c01, - SKC_WRITE_ERROR_AUTO_REALLOCATION_FAILED = 0x0c02, - SKC_WRITE_ERROR_RECOMMEND_REASSIGNMENT = 0x0c03, - SKC_COMPRESSION_CHECK_MISCOMPARE_ERROR = 0x0c04, - SKC_DATA_EXPANSION_OCCURRED_DURING_COMPRESSION = 0x0c05, - SKC_BLOCK_NOT_COMPRESSABLE = 0x0c06, - SKC_ID_CRC_OR_ECC_ERROR = 0x1000, - SKC_UNRECOVERED_READ_ERROR = 0x1100, - SKC_READ_RETRIES_EXHAUSTED = 0x1101, - SKC_ERROR_TOO_LONG_TO_CORRECT = 0x1102, - SKC_MULTIPLE_READ_ERRORS = 0x1103, - SKC_UNRECOVERED_READ_ERROR_AUTO_REALLOCATE_FAILED = 0x1104, - SKC_L_EC_UNCORRECTABLE_ERROR = 0x1105, - SKC_CIRC_UNRECOVERED_ERROR = 0x1106, - SKC_DATA_RESYNCHRONIZATION_ERROR = 0x1107, - SKC_INCOMPLETE_BLOCK_READ = 0x1108, - SKC_NO_GAP_FOUND = 0x1109, - SKC_MISCORRECTED_ERROR = 0x110a, - SKC_UNRECOVERED_READ_ERROR_RECOMMEND_REASSIGNMENT = 0x110b, - SKC_UNRECOVERED_READ_ERROR_RECOMMEND_REWRITE = 0x110c, - SKC_DECOMPRESSION_CRC_ERROR = 0x110d, - SKC_CANNOT_DECOMPRESS_USING_DECLARED_ALGORITHM = 0x100e, - SKC_ADDRESS_MARK_NOT_FOUND_FOR_ID_FIELD = 0x1200, - SKC_ADDRESS_MARK_NOT_FOUND_FOR_DATA_FIELD = 0x1300, - SKC_RECORDED_ENTITY_NOT_FOUND = 0x1400, - SKC_RECORD_NOT_FOUND = 0x1401, - SKC_FILEMARK_OR_SETMARK_NOT_FOUND = 0x1402, - SKC_END_OF_DATA_NOT_FOUND = 0x1403, - SKC_BLOCK_SEQUENCE_ERROR = 0x1404, - SKC_RECORD_NOT_FOUND_RECOMMEND_REASSIGNMENT = 0x1405, - SKC_RECORD_NOT_FOUND_DATA_AUTO_REALLOCATED = 0x1406, - SKC_RANDOM_POSITIONING_ERROR = 0x1500, - SKC_MECHANICAL_POSITIONING_ERROR = 0x1501, - SKC_POSITIONING_ERROR_DETECTED_BY_READ_OF_MEDIUM = 0x1502, - SKC_DATA_SYNCHRONIZATION_MARK_ERROR = 0x1600, - SKC_DATA_SYNCHRONIZATION_ERROR_DATA_REWRITTEN = 0x1601, - SKC_DATA_SYNCHRONIZATION_ERROR_RECOMMEND_REWRITE = 0x1602, - SKC_DATA_SYNCHRONIZATION_ERROR_DATA_AUTO_REALLOCATED = 0x1603, - SKC_DATA_SYNCHRONIZATION_ERROR_RECOMMEND_REASSIGNMENT = 0x1604, - SKC_RECOVERED_DATA_WITH_NO_ERROR_CORRECTION_APPLIED = 0x1700, - SKC_RECOVERED_DATA_WITH_RETRIES = 0x1701, - SKC_RECOVERED_DATA_WITH_POSITIVE_HEAD_OFFSET = 0x1702, - SKC_RECOVERED_DATA_WITH_NEGATIVE_HEAD_OFFSET = 0x1703, - SKC_RECOVERED_DATA_WITH_RETRIES_AND_OR_CIRC_APPLIED = 0x1704, - SKC_RECOVERED_DATA_USING_PREVIOUS_SECTOR_ID = 0x1705, - SKC_RECOVERED_DATA_WITHOUT_ECC_DATA_AUTO_REALLOCATED = 0x1706, - SKC_RECOVERED_DATA_WITHOUT_ECC_RECOMMEND_REASSIGNMENT = 0x1707, - SKC_RECOVERED_DATA_WITHOUT_ECC_RECOMMEND_REWRITE = 0x1708, - SKC_RECOVERED_DATA_WITHOUT_ECC_DATA_REWRITTEN = 0x1809, - SKC_RECOVERED_DATA_WITH_ERROR_CORRECTION_APPLIED = 0x1800, - SKC_RECOVERED_DATA_WITH_ERROR_CORRECTION_RETRIES_APPLIED = 0x1801, - SKC_RECOVERED_DATA_DATA_AUTO_REALLOCATED = 0x1802, - SKC_RECOVERED_DATA_WITH_CIRC = 0x1803, - SKC_RECOVERED_DATA_WITH_L_EC = 0x1804, - SKC_RECOVERED_DATA_RECOMMEND_REASSIGNMENT = 0x1805, - SKC_RECOVERED_DATA_RECOMMEND_REWRITE = 0x1806, - SKC_RECOVERED_DATA_WITH_ECC_DATA_REWRITTEN = 0x1807, - SKC_DEFECT_LIST_ERROR = 0x1900, - SKC_DEFECT_LIST_NOT_AVAILABLE = 0x1901, - SKC_DEFECT_LIST_ERROR_IN_PRIMARY_LIST = 0x1902, - SKC_DEFECT_LIST_ERROR_IN_GROWN_LIST = 0x1903, - SKC_PARAMETER_LIST_LENGTH_ERROR = 0x1a00, - SKC_SYNCHRONOUS_DATA_TRANSFER_ERROR = 0x1b00, - SKC_DEFECT_LIST_NOT_FOUND = 0x1c00, - SKC_PRIMARY_DEFECT_LIST_NOT_FOUND = 0x1c01, - SKC_GROWN_DEFECT_LIST_NOT_FOUND = 0x1c02, - SKC_MISCOMPARE_DURING_VERIFY_OPERATION = 0x1d00, - SKC_RECOVERED_ID_WITH_ECC_CORRECTION = 0x1e00, - SKC_PARTIAL_DEFECT_LIST_TRANSFER = 0x1f00, - SKC_INVALID_COMMAND_OPERATION_CODE = 0x2000, - SKC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE = 0x2100, - SKC_INVALID_ELEMENT_ADDRESS = 0x2101, - SKC_ILLEGAL_FUNCTION = 0x2200, // "should use 0x2000, 0x2400, or 0x2600" - SKC_INVALID_FIELD_IN_CDB = 0x2400, - SKC_LOGICAL_UNIT_NOT_SUPPORTED = 0x2500, - SKC_INVALID_FIELD_IN_PARAMETER_LIST = 0x2600, - SKC_PARAMETER_NOT_SUPPORTED = 0x2601, - SKC_PARAMETER_VALUE_INVALID = 0x2602, - SKC_THRESHOLD_PARAMETERS_NOT_SUPPORTED = 0x2603, - SKC_INVALID_RELEASE_OF_ACTIVE_PERSISTENT_RESERVATION = 0x2604, - SKC_WRITE_PROTECTED = 0x2700, - SKC_NOT_READY_TO_READY_TRANSITION_MEDIUM_MAY_HAVE_CHANGED = 0x2800, - SKC_IMPORT_OR_EXPORT_ELEMENT_ACCESSED = 0x2801, - SKC_POWER_ON_RESET_OR_BUS_DEVICE_RESET_OCCURRED = 0x2900, - SKC_POWER_ON_OCCURRED = 0x2901, - SKC_SCSI_BUS_RESET_OCCURRED = 0x2902, - SKC_SCSI_BUS_DEVICE_RESET_FUNCTION_OCCURRED = 0x2903, - SKC_PARAMETERS_CHANGED = 0x2a00, - SKC_MODE_PARAMETERS_CHANGED = 0x2a01, - SKC_LOG_PARAMETERS_CHANGED = 0x2a02, - SKC_RESERVATIONS_PREEMPTED = 0x2a03, - SKC_COPY_CANNOT_EXECUTE_SINCE_HOST_CANNOT_DISCONNECT = 0x2b00, - SKC_COMMAND_SEQUENCE_ERROR = 0x2c00, - SKC_TOO_MANY_WINDOWS_SPECIFIED = 0x2c01, - SKC_INVALID_COMBINATION_OF_WINDOWS_SPECIFIED = 0x2c02, - SKC_OVERWRITE_ERROR_ON_UPDATE_IN_PLACE = 0x2d00, - SKC_COMMANDS_CLEARED_BY_ANOTHER_INITIATOR = 0x2f00, - SKC_INCOMPATIBLE_MEDIUM_INSTALLED = 0x3000, - SKC_CANNOT_READ_MEDIUM_UNKNOWN_FORMAT = 0x3001, - SKC_CANNOT_READ_MEDIUM_INCOMPATIBLE_FORMAT = 0x3002, - SKC_CLEANING_CARTRIDGE_INSTALLED = 0x3003, - SKC_CANNOT_WRITE_MEDIUM_UNKNOWN_FORMAT = 0x3004, - SKC_CANNOT_WRITE_MEDIUM_INCOMPATIBLE_FORMAT = 0x3005, - SKC_CANNOT_FORMAT_MEDIUM_INCOMPATIBLE_MEDIUM = 0x3006, - SKC_CLEANING_FAILURE = 0x3007, - SKC_MEDIUM_FORMAT_CORRUPTED = 0x3100, - SKC_FORMAT_COMMAND_FAILED = 0x3101, - SKC_NO_DEFECT_SPARE_LOCATION_AVAILABLE = 0x3200, - SKC_DEFECT_LIST_UPDATE_FAILURE = 0x3201, - SKC_TAPE_LENGTH_ERROR = 0x3300, - SKC_RIBBON_INK_OR_TONER_FAILURE = 0x3600, - SKC_ROUNDED_PARAMETER = 0x3700, - SKC_SAVING_PARAMETERS_NOT_SUPPORTED = 0x3900, - SKC_MEDIUM_NOT_PRESENT = 0x3a00, - SKC_SEQUENTIAL_POSITIONING_ERROR = 0x3b00, - SKC_TAPE_POSITION_ERROR_AT_BEGINNING_OF_MEDIUM = 0x3b01, - SKC_TAPE_POSITION_ERROR_AT_END_OF_MEDIUM = 0x3b02, - SKC_TAPE_OR_ELECTRONIC_VERTICAL_FORMS_UNIT_NOT_READY = 0x3b03, - SKC_SLEW_FAILURE = 0x3b04, - SKC_PAPER_JAM = 0x3b05, - SKC_FAILED_TO_SENSE_TOP_OF_FORM = 0x3b06, - SKC_FAILED_TO_SENSE_BOTTOM_OF_FORM = 0x3b07, - SKC_REPOSITION_ERROR = 0x3b08, - SKC_READ_PAST_END_OF_MEDIUM = 0x3b09, - SKC_READ_PAST_BEGINNING_OF_MEDIUM = 0x3b0a, - SKC_POSITION_PAST_END_OF_MEDIUM = 0x3b0b, - SKC_POSITION_PAST_BEGINNING_OF_MEDIUM = 0x3b0c, - SKC_MEDIUM_DESTINATION_ELEMENT_FULL = 0x3b0d, - SKC_MEDIUM_SOURCE_ELEMENT_EMPTY = 0x3b0e, - SKC_MEDIUM_MAGAZINE_NOT_ACCESSIBLE = 0x3b11, - SKC_MEDIUM_MAGAZINE_REMOVED = 0x3b12, - SKC_MEDIUM_MAGAZINE_INSERTED = 0x3b13, - SKC_MEDIUM_MAGAZINE_LOCKED = 0x3b14, - SKC_MEDIUM_MAGAZINE_UNLOCKED = 0x3b15, - SKC_INVALID_BITS_IN_IDENTIFY_MESSAGE = 0x3d00, - SKC_LOGICAL_UNIT_HAS_NOT_SELF_CONFIGURED_YET = 0x3e00, - SKC_TARGET_OPERATING_CONDITIONS_HAVE_CHANGED = 0x3f00, - SKC_MICROCODE_HAS_BEEN_CHANGED = 0x3f01, - SKC_CHANGED_OPERATING_DEFINITION = 0x3f02, - SKC_INQUIRY_DATA_HAS_CHANGED = 0x3f03, - SKC_RAM_FAILURE = 0x4000, // "should use 0x40nn" - SKC_DIAGNOSTIC_FAILURE_ON_COMPONENT_NN = 0x4000, // LSB is nn (0x80-0xff) - SKC_DATA_PATH_FAILURE = 0x4100, // "should use 0x40nn" - SKC_POWER_ON_OR_SELF_TEST_FAILURE = 0x4200, // "should use 0x40nn" - SKC_MESSAGE_ERROR = 0x4300, - SKC_INTERNAL_TARGET_FAILURE = 0x4400, - SKC_SELECT_OR_RESELECT_FAILURE = 0x4500, - SKC_UNSUCCESSFUL_SOFT_RESET = 0x4600, - SKC_SCSI_PARITY_ERROR = 0x4700, - SKC_INITIATOR_DETECTED_ERROR_MESSAGE_RECEIVED = 0x4800, - SKC_INVALID_MESSAGE_ERROR = 0x4900, - SKC_COMMAND_PHASE_ERROR = 0x4a00, - SKC_DATA_PHASE_ERROR = 0x4b00, - SKC_LOGICAL_UNIT_FAILED_SELF_CONFIGURATION = 0x4c00, - SKC_TAGGED_OVERLAPPED_COMMANDS_NN = 0x4d00, // "queue tag"; LSB is nn - SKC_OVERLAPPED_COMMANDS_ATTEMPTED = 0x4e00, - SKC_WRITE_APPEND_ERROR = 0x5000, - SKC_WRITE_APPEND_POSITION_ERROR = 0x5001, - SKC_POSITION_ERROR_RELATED_TO_TIMING = 0x5002, - SKC_ERASE_FAILURE = 0x5100, - SKC_CARTRIDGE_FAULT = 0x5200, - SKC_MEDIA_LOAD_OR_EJECT_FAILED = 0x5300, - SKC_UNLOAD_TAPE_FAILURE = 0x5301, - SKC_MEDIUM_REMOVAL_PREVENTED = 0x5302, - SKC_SCSI_TO_HOST_SYSTEM_INTERFACE_FAILURE = 0x5400, - SKC_SYSTEM_RESOURCE_FAILURE = 0x5500, - SKC_SYSTEM_BUFFER_FULL = 0x5501, - SKC_UNABLE_TO_RECOVER_TABLE_OF_CONTENTS = 0x5700, - SKC_GENERATION_DOES_NOT_EXIST = 0x5800, - SKC_UPDATED_BLOCK_READ = 0x5900, - SKC_OPERATOR_REQUEST_OR_STATE_CHANGE_INPUT = 0x5a00, // "unspecified" - SKC_OPERATOR_MEDIUM_REMOVAL_REQUEST = 0x5a01, - SKC_OPERATOR_SELECTED_WRITE_PROTECT = 0x5a02, - SKC_OPERATOR_SELECTED_WRITE_PERMIT = 0x5a03, - SKC_LOG_EXCEPTION = 0x5b00, - SKC_THRESHOLD_CONDITION_MET = 0x5b01, - SKC_LOG_COUNTER_AT_MAXIMUM = 0x5b02, - SKC_LOG_LIST_CODES_EXHAUSTED = 0x5b03, - SKC_RPL_STATUS_CHANGE = 0x5c00, - SKC_SPINDLES_SYNCHRONIZED = 0x5c01, - SKC_SPINDLES_NOT_SYNCHRONIZED = 0x5c02, - SKC_FAILURE_PREDICTION_THRESHOLD_EXCEEDED = 0x5d00, - SKC_FAILURE_PREDICTION_THRESHOLD_EXCEEDED_FALSE = 0x5dff, // what?! - SKC_LOW_POWER_CONDITION_ON = 0x5e00, - SKC_IDLE_CONDITION_ACTIVATED_BY_TIMER = 0x5e01, - SKC_STANDBY_CONDITION_ACTIVATED_BY_TIMER = 0x5e02, - SKC_IDLE_CONDITION_ACTIVATED_BY_COMMAND = 0x5e03, - SKC_STANDBY_CONDITION_ACTIVATED_BY_COMMAND = 0x5e04, - SKC_LAMP_FAILURE = 0x6000, - SKC_VIDEO_ACQUISITION_ERROR = 0x6100, - SKC_UNABLE_TO_ACQUIRE_VIDEO = 0x6101, - SKC_OUT_OF_FOCUS = 0x6102, - SKC_SCAN_HEAD_POSITIONING_ERROR = 0x6200, - SKC_END_OF_USER_AREA_ENCOUNTERED_ON_THIS_TRACK = 0x6300, - SKC_ILLEGAL_MODE_FOR_THIS_TRACK = 0x6400, - SKC_VOLTAGE_FAULT = 0x6500, - SKC_DECOMPRESSION_EXCEPTION_SHORT_ALGORITHM_ID_OF_NN = 0x7000, // LSB is nn - SKC_DECOMPRESSION_EXCEPTION_LONG_ALGORITHM_ID = 0x7100 - }; - - // SCSI addtional sense code qualifiers - enum { - SK_ASC_INVALID_FIELD_IN_CDB = 0x24, - SK_ASC_LOGICAL_UNIT_NOT_SUPPORTED = 0x25, - SK_ASC_MEDIUM_NOT_PRESENT = 0x3a - }; - - // SCSI commands - static const char *const command_names[256]; - enum { - SC_TEST_UNIT_READY = 0x00, - SC_REWIND = 0x01, - SC_REZERO_UNIT = 0x01, - SC_REQUEST_BLOCK_ADDRESS = 0x02, - SC_REQUEST_SENSE = 0x03, - SC_FORMAT = 0x04, - SC_FORMAT_UNIT = 0x04, - SC_READ_BLOCK_LIMITS = 0x05, - SC_INITIALIZE_ELEMENT_STATUS = 0x07, - SC_REASSIGN_BLOCKS = 0x07, - SC_GET_MESSAGE_6 = 0x08, - SC_READ_6 = 0x08, - SC_RECEIVE = 0x08, - SC_PRINT = 0x0a, - SC_SEND_MESSAGE_6 = 0x0a, - SC_SEND_6 = 0x0a, - SC_WRITE_6 = 0x0a, - SC_SEEK_6 = 0x0b, - SC_SLEW_AND_PRINT = 0x0b, - SC_SEEK_BLOCK = 0x0c, - SC_READ_REVERSE = 0x0f, - SC_SYNCHRONIZE_BUFFER = 0x10, - SC_WRITE_FILEMARKS = 0x10, - SC_SPACE = 0x11, - SC_INQUIRY = 0x12, - SC_VERIFY_6 = 0x13, - SC_RECOVER_BUFFERED_DATA = 0x14, - SC_MODE_SELECT_6 = 0x15, - SC_RESERVE_6 = 0x16, - SC_RESERVE_UNIT = 0x16, - SC_RELEASE_6 = 0x17, - SC_RELEASE_UNIT = 0x17, - SC_COPY = 0x18, - SC_ERASE = 0x19, - SC_MODE_SENSE_6 = 0x1a, - SC_LOAD_UNLOAD = 0x1b, - SC_SCAN = 0x1b, - SC_STOP_PRINT = 0x1b, - SC_START_STOP_UNIT = 0x1b, - SC_RECEIVE_DIAGNOSTIC_RESULTS = 0x1c, - SC_SEND_DIAGNOSTIC = 0x1d, - SC_PREVENT_ALLOW_MEDIUM_REMOVAL = 0x1e, - SC_READ_FORMAT_CAPACITIES = 0x23, - SC_SET_WINDOW = 0x24, - SC_GET_WINDOW = 0x25, - SC_READ_CAPACITY = 0x25, - SC_READ_CD_RECORDED_CAPACITY = 0x25, - SC_GET_MESSAGE_10 = 0x28, - SC_READ_10 = 0x28, - SC_READ_GENERATION = 0x29, - SC_SEND_MESSAGE_10 = 0x2a, - SC_SEND_10 = 0x2a, - SC_WRITE_10 = 0x2a, - SC_LOCATE = 0x2b, - SC_POSITION_TO_ELEMENT = 0x2b, - SC_SEEK_10 = 0x2b, - SC_ERASE_10 = 0x2c, - SC_READ_UPDATED_BLOCK = 0x2d, - SC_WRITE_AND_VERIFY_10 = 0x2e, - SC_VERIFY_10 = 0x2f, - SC_SEARCH_DATA_HIGH_10 = 0x30, - SC_OBJECT_POSITION = 0x31, - SC_SEARCH_DATA_EQUAL_10 = 0x31, - SC_SEARCH_DATA_LOW_10 = 0x32, - SC_SET_LIMITS_10 = 0x33, - SC_PREFETCH = 0x34, - SC_READ_POSITION = 0x34, - SC_SYNCHRONIZE_CACHE = 0x35, - SC_LOCK_UNLOCK_CACHE = 0x36, - SC_READ_DEFECT_DATA_10 = 0x37, - SC_MEDIUM_SCAN = 0x38, - SC_COMPARE = 0x39, - SC_COPY_AND_VERIFY = 0x3a, - SC_WRITE_BUFFER = 0x3b, - SC_READ_BUFFER = 0x3c, - SC_UPDATE_BLOCK = 0x3d, - SC_READ_LONG = 0x3e, - SC_WRITE_LONG = 0x3f, - SC_CHANGE_DEFINITION = 0x40, - SC_WRITE_SAME = 0x41, - SC_READ_SUB_CHANNEL = 0x42, - SC_READ_TOC_PMA_ATIP = 0x43, - SC_READ_HEADER = 0x44, - SC_PLAY_AUDIO_10 = 0x45, - SC_GET_CONFIGURATION = 0x46, - SC_PLAY_AUDIO_MSF = 0x47, - SC_PLAY_AUDIO_TRACK_INDEX = 0x48, - SC_PLAY_TRACK_RELATIVE_10 = 0x49, - SC_GET_EVENT_STATUS_NOTIFICATION = 0x4a, - SC_PAUSE_RESUME = 0x4b, - SC_LOG_SELECT = 0x4c, - SC_LOG_SENSE = 0x4d, - SC_STOP_PLAY_SCAN = 0x4e, - SC_XDWRITE = 0x50, - SC_XPWRITE = 0x51, - SC_READ_DISC_INFORMATION = 0x51, - SC_READ_TRACK_INFORMATION = 0x52, - SC_XDREAD = 0x52, - SC_RESERVE_TRACK = 0x53, - SC_SEND_OPC_INFORMATION = 0x54, - SC_MODE_SELECT_10 = 0x55, - SC_RESERVE_10 = 0x56, - SC_RELEASE_10 = 0x57, - SC_REPAIR_TRACK = 0x58, - SC_READ_MASTER_CUE = 0x59, - SC_MODE_SENSE_10 = 0x5a, - SC_CLOSE_TRACK_SESSION = 0x5b, - SC_READ_BUFFER_CAPACITY = 0x5c, - SC_SEND_CUE_SHEET = 0x5d, - SC_PERSISTENT_RESERVE_IN = 0x5e, - SC_PERSISTENT_RESERVE_OUT = 0x5f, - SC_XDWRITE_EXTENDED = 0x80, - SC_REBUILD = 0x81, - SC_REGENERATE = 0x82, - SC_EXTENDED_COPY = 0x83, - SC_RECEIVE_COPY_RESULTS = 0x84, - SC_WRITE_16 = 0x8a, - SC_SYNCHRONIZE_CACHE_16 = 0x91, - SC_WRITE_SAME_16 = 0x93, - SC_READ_CAPACITY_16 = 0x9e, - SC_READ_LONG_16 = 0x9e, - SC_WRITE_LONG_16 = 0x9f, - SC_REPORT_LUNS = 0xa0, - SC_BLANK = 0xa1, - SC_SEND_EVENT = 0xa2, - SC_REPORT_DEVICE_IDENTIFIER = 0xa3, - SC_SEND_KEY = 0xa3, - SC_REPORT_KEY = 0xa4, - SC_SET_DEVICE_IDENTIFIER = 0xa4, - SC_PLAY_AUDIO_12 = 0xa5, - SC_LOAD_UNLOAD_MEDIUM = 0xa6, - SC_MOVE_MEDIUM_ATTACHED = 0xa7, - SC_SET_READ_AHEAD = 0xa7, - SC_READ_12 = 0xa8, - SC_PLAY_RELATIVE_12 = 0xa9, - SC_WRITE_12 = 0xaa, - SC_ERASE_12 = 0xac, - SC_GET_PERFORMANCE = 0xac, - SC_READ_DVD_STRUCTURE = 0xad, - SC_WRITE_AND_VERIFY_12 = 0xae, - SC_VERIFY_12 = 0xaf, - SC_SEARCH_DATA_HIGH_12 = 0xb0, - SC_SEARCH_DATA_EQUAL_12 = 0xb1, - SC_SEARCH_DATA_LOW_12 = 0xb2, - SC_SET_LIMITS_12 = 0xb3, - SC_READ_ELEMENT_STATUS_ATTACHED = 0xb4, - SC_SET_STREAMING = 0xb6, - SC_READ_DEFECT_DATA_12 = 0xb7, - SC_READ_CD_MSF = 0xb9, - SC_SCAN_MMC = 0xba, - SC_SET_CD_SPEED = 0xbb, - SC_PLAY_CD = 0xbc, - SC_SPARE_IN = 0xbc, - SC_MECHANISM_STATUS = 0xbd, - SC_SPARE_OUT = 0xbd, - SC_READ_CD = 0xbe, - SC_SEND_DVD_STRUCTURE = 0xbf - }; - - enum { - SBUF_MAIN, - SBUF_SENSE - }; - - nscsi_full_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - - virtual void device_start() override ATTR_COLD; - virtual void device_reset() override ATTR_COLD; - - virtual void scsi_message(); - virtual void scsi_command(); - virtual bool scsi_command_done(uint8_t command, uint8_t length); - - TIMER_CALLBACK_MEMBER(update_tick); - - void handle_request_sense(const u8 lun); - void scsi_unknown_command(); - void scsi_status_complete(uint8_t st); - void scsi_data_in(int buf, int size); - void scsi_data_out(int buf, int size); - - struct sense_data { - sense_data() - { - invalid = false; - deferred = false; - filemark = false; - eom = false; - bad_len = false; - sense_key = 0; - info = 0; - sense_key_code = 0; - } - - bool invalid; - bool deferred; - bool filemark; - bool eom; - bool bad_len; - u8 sense_key; - s32 info; - u16 sense_key_code; - }; - void set_sense_data(const u8 sense_key, const u16 sense_key_code, const sense_data *data = nullptr); - void sense(bool deferred, uint8_t key, uint8_t asc = 0, uint8_t ascq = 0); - void report_condition(const u8 sense_key, const u16 sense_key_code, const sense_data *data = nullptr); - void report_bad_lun(const u8 cmd, const u8 lun); - void report_bad_cmd(const u8 cmd); - void report_filemark(const s32 info = 0, const bool eom = false); - void report_bom(const s32 info = 0); - void report_ew(const s32 info = 0); - void report_eod(const s32 info = 0, const bool eom = false); - void report_eom(const bool write, const s32 info = 0, const bool invalid = false); - void report_bad_len(const bool over, const s32 info = 0); - void report_bad_cdb_field(); - void report_bad_pl_field(); - void report_bad_pl_len(); - void report_no_saving_params(); - void report_no_medium(); - void report_medium_changed(); - void report_read_only(); - void report_read_failure(); - void report_write_failure(); - void report_erase_failure(); - - int get_lun(int def = 0); - void bad_lun(); - - virtual uint8_t scsi_get_data(int buf, int offset); - virtual void scsi_put_data(int buf, int offset, uint8_t data); - - // Default delays: - - // Arbitration delay (2.4us) - virtual attotime scsi_arbitation_delay(); - - // Assertion period (90ns) - virtual attotime scsi_assertion_period(); - - // Bus clear delay (800ns) - virtual attotime scsi_bus_clear_delay(); - - // Bus free delay (800ns) - virtual attotime scsi_bus_free_delay(); - - // Bus set delay (1.8us) - virtual attotime scsi_bus_set_delay(); - - // Bus settle delay (400ns) - virtual attotime scsi_bus_settle_delay(); - - // Cable skew delay (10ns) - virtual attotime scsi_cable_skew_delay(); - - // Data release delay (400ns) - virtual attotime scsi_data_release_delay(); - - // Deskew delay (45ns) - virtual attotime scsi_deskew_delay(); - - // Disconnection delay (200us) - virtual attotime scsi_disconnection_delay(); - - // Hold time (45ns) - virtual attotime scsi_hold_time(); - - // Negation period (90ns) - virtual attotime scsi_negation_period(); - - // Reset hold time (25us) - virtual attotime scsi_reset_hold_time(); - - // Selection abort time (200us) - virtual attotime scsi_selection_abort_time(); - - // Selection timeout delay (250ms) - virtual attotime scsi_selection_timeout_delay(); - - // Fast assertion period (30ns) - virtual attotime scsi_fast_assertion_period(); - - // Fast cable skew delay (5ns) - virtual attotime scsi_fast_cable_skew_delay(); - - // Fast deskew delay (20ns) - virtual attotime scsi_fast_deskew_delay(); - - // Fast hold time (10ns) - virtual attotime scsi_fast_hold_time(); - - // Fast negation period (30ns) - virtual attotime scsi_fast_negation_period(); - - // Byte transfer rate (immediate) - virtual attotime scsi_data_byte_period(); - - // Command delay (immediate) - virtual attotime scsi_data_command_delay(); - - uint8_t m_scsi_cmdbuf[4096]; - uint8_t m_scsi_sense_buffer[18]; - int m_scsi_cmdsize; - uint8_t m_scsi_identify; - -private: - enum { - IDLE - }; - - enum { - TARGET_SELECT_WAIT_BUS_SETTLE = 1, - TARGET_SELECT_WAIT_SEL_0, - - TARGET_NEXT_CONTROL, - TARGET_WAIT_MSG_BYTE, - TARGET_WAIT_CMD_BYTE, - TARGET_WAIT_DATA_IN_BYTE, - TARGET_WAIT_DATA_OUT_BYTE - }; - - enum { - RECV_BYTE_T_WAIT_ACK_0 = 1, - RECV_BYTE_T_WAIT_ACK_1, - SEND_BYTE_T_WAIT_ACK_0, - SEND_BYTE_T_WAIT_ACK_1 - }; - - enum { - STATE_MASK = 0x00ff, - SUB_SHIFT = 8, - SUB_MASK = 0xff00 - }; - - enum { - BC_MSG_OR_COMMAND, - BC_STATUS, - BC_MESSAGE_1, - BC_MESSAGE_2, - BC_DATA_IN, - BC_DATA_OUT, - BC_BUS_FREE - }; - - struct control { - int m_action; - int m_param1, m_param2; - }; - - emu_timer *m_scsi_timer; - - int m_scsi_state, m_scsi_substate; - int m_scsi_initiator_id; - int m_data_buffer_id, m_data_buffer_size, m_data_buffer_pos; - - control m_buf_control[32]; - int m_buf_control_rpos; - int m_buf_control_wpos; - - control *buf_control_push(); - control *buf_control_pop(); - - void step(bool timeout); - void target_recv_byte(); - void target_send_byte(uint8_t val); - void target_send_buffer_byte(); -}; - - DECLARE_DEVICE_TYPE(NSCSI_BUS, nscsi_bus_device) DECLARE_DEVICE_TYPE(NSCSI_CONNECTOR, nscsi_connector) diff --git a/src/devices/machine/nscsi_hle.cpp b/src/devices/machine/nscsi_hle.cpp new file mode 100644 index 00000000000..91e270bc245 --- /dev/null +++ b/src/devices/machine/nscsi_hle.cpp @@ -0,0 +1,810 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +#include "emu.h" +#include "nscsi_hle.h" + +#include "util/multibyte.h" + + +#define LOG_UNSUPPORTED (1U << 1) +#define LOG_STATE (1U << 2) +#define LOG_DATA (1U << 3) +#define LOG_DATA_SENT (1U << 4) + +#define VERBOSE (LOG_UNSUPPORTED) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + +nscsi_full_device::nscsi_full_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, type, tag, owner, clock), + nscsi_device_interface(mconfig, *this), + nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) +{ +} + +const char *const nscsi_full_device::command_names[256] = { + /* 00 */ "TEST_UNIT_READY", "REWIND/REZERO_UNIT", "REQUEST_BLOCK_ADDRESS", "REQUEST_SENSE", "FORMAT/FORMAT_UNIT", "READ_BLOCK_LIMITS", "?", "INITIALIZE_ELEMENT_STATUS/REASSIGN_BLOCKS", + /* 08 */ "GET_MESSAGE_6/READ_6/RECEIVE", "?", "PRINT/SEND_MESSAGE_6/SEND_6/WRITE_6", "SEEK_6/SLEW_AND_PRINT", "SEEK_BLOCK", "?", "?", "READ_REVERSE", + /* 10 */ "SYNCHRONIZE_BUFFER/WRITE_FILEMARKS", "SPACE", "INQUIRY", "VERIFY_6", "RECOVER_BUFFERED_DATA", "MODE_SELECT_6", "RESERVE_6/RESERVE_UNIT", "RELEASE_6/RELEASE_UNIT", + /* 18 */ "COPY", "ERASE", "MODE_SENSE_6", "LOAD_UNLOAD/SCAN/STOP_PRINT/START_STOP_UNIT", "RECEIVE_DIAGNOSTIC_RESULTS", "SEND_DIAGNOSTIC", "PREVENT_ALLOW_MEDIUM_REMOVAL", "?", + /* 20 */ "?", "?", "?", "READ_FORMAT_CAPACITIES", "SET_WINDOW", "GET_WINDOW/READ_CAPACITY/READ_CD_RECORDED_CAPACITY", "?", "?", + + /* 28 */ "GET_MESSAGE_10/READ_10", "READ_GENERATION", "SEND_MESSAGE_10/SEND_10/WRITE_10", "LOCATE/POSITION_TO_ELEMENT/SEEK_10", "ERASE_10", "READ_UPDATED_BLOCK", "WRITE_AND_VERIFY_10", "VERIFY_10", + /* 30 */ "SEARCH_DATA_HIGH_10", "OBJECT_POSITION/SEARCH_DATA_EQUAL_10", "SEARCH_DATA_LOW_10", "SET_LIMITS_10", "PREFETCH/READ_POSITION", "SYNCHRONIZE_CACHE", "LOCK_UNLOCK_CACHE", "READ_DEFECT_DATA_10", + /* 38 */ "MEDIUM_SCAN", "COMPARE", "COPY_AND_VERIFY", "WRITE_BUFFER", "READ_BUFFER", "UPDATE_BLOCK", "READ_LONG", "WRITE_LONG", + /* 40 */ "CHANGE_DEFINITION", "WRITE_SAME", "READ_SUB_CHANNEL", "READ_TOC_PMA_ATIP", "READ_HEADER", "PLAY_AUDIO_10", "GET_CONFIGURATION", "PLAY_AUDIO_MSF", + /* 48 */ "PLAY_AUDIO_TRACK_INDEX", "PLAY_TRACK_RELATIVE_10", "GET_EVENT_STATUS_NOTIFICATION", "PAUSE_RESUME", "LOG_SELECT", "LOG_SENSE", "STOP_PLAY_SCAN", "?", + /* 50 */ "XDWRITE", "READ_DISC_INFORMATION/XPWRITE", "READ_TRACK_INFORMATION/XDREAD", "RESERVE_TRACK", "SEND_OPC_INFORMATION", "MODE_SELECT_10", "RESERVE_10", "RELEASE_10", + /* 58 */ "REPAIR_TRACK", "READ_MASTER_CUE", "MODE_SENSE_10", "CLOSE_TRACK_SESSION", "READ_BUFFER_CAPACITY", "SEND_CUE_SHEET", "PERSISTENT_RESERVE_IN", "PERSISTENT_RESERVE_OUT", + /* 80 */ "XDWRITE_EXTENDED", "REBUILD", "REGENERATE", "EXTENDED_COPY", "RECEIVE_COPY_RESULTS", "?", "?", "?", + /* 88 */ "?", "?", "WRITE_16", "?", "?", "?", "?", "?", + /* 90 */ "?", "SYNCHRONIZE_CACHE_16", "?", "WRITE_SAME_16", "?", "?", "?", "?", + /* 98 */ "?", "?", "?", "?", "?", "?", "READ_CAPACITY_166/READ_LONG_16", "WRITE_LONG_16", + /* a0 */ "REPORT_LUNS", "BLANK", "SEND_EVENT", "REPORT_DEVICE_IDENTIFIER/SEND_KEY", "SET_DEVICE_IDENTIFIER/REPORT_KEY", "PLAY_AUDIO_12", "LOAD_UNLOAD_MEDIUM", "MOVE_MEDIUM_ATTACHED/SET_READ_AHEAD", + /* a8 */ "READ_12", "PLAY_RELATIVE_12", "WRITE_12", "?", "ERASE_12/GET_PERFORMANCE", "READ_DVD_STRUCTURE", "WRITE_AND_VERIFY_12", "VERIFY_12", + /* b0 */ "SEARCH_DATA_HIGH_12", "SEARCH_DATA_EQUAL_12", "SEARCH_DATA_LOW_12", "SET_LIMITS_12", "READ_ELEMENT_STATUS_ATTACHED", "?", "SET_STREAMING", "READ_DEFECT_DATA_12", + /* b8 */ "?", "READ_CD_MSF", "SCAN_MMC", "SET_CD_SPEED", "PLAY_CD/SPARE_IN", "MECHANISM_STATUS/SPARE_OUT", "READ_CD", "SEND_DVD_STRUCTURE", + /* c0 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* c8 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* d0 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* d8 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* e0 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* e8 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* f0 */ "?", "?", "?", "?", "?", "?", "?", "?", + /* f8 */ "?", "?", "?", "?", "?", "?", "?", "?", +}; + +void nscsi_full_device::device_start() +{ + m_scsi_timer = timer_alloc(FUNC(nscsi_full_device::update_tick), this); + save_item(NAME(m_scsi_cmdbuf)); + save_item(NAME(m_scsi_sense_buffer)); + save_item(NAME(m_scsi_cmdsize)); + save_item(NAME(m_scsi_identify)); + save_item(NAME(m_scsi_state)); + save_item(NAME(m_scsi_substate)); + save_item(NAME(m_scsi_initiator_id)); + save_item(NAME(m_data_buffer_id)); + save_item(NAME(m_data_buffer_size)); + save_item(NAME(m_data_buffer_pos)); + save_item(NAME(m_buf_control_rpos)); + save_item(NAME(m_buf_control_wpos)); + for(int i=0; i<32; i++) { + save_item(NAME(m_buf_control[i].m_action), i); + save_item(NAME(m_buf_control[i].m_param1), i); + save_item(NAME(m_buf_control[i].m_param2), i); + } +} + +void nscsi_full_device::device_reset() +{ + m_scsi_state = m_scsi_substate = IDLE; + m_buf_control_rpos = m_buf_control_wpos = 0; + m_scsi_identify = 0; + m_data_buffer_size = 0; + m_data_buffer_pos = 0; + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_SEL|S_BSY|S_RST, S_ALL); + sense(false, SK_NO_SENSE); +} + +TIMER_CALLBACK_MEMBER(nscsi_full_device::update_tick) +{ + step(param); +} + +void nscsi_full_device::scsi_ctrl_changed() +{ + step(false); +} + +void nscsi_full_device::step(bool timeout) +{ + uint32_t ctrl = m_scsi_bus->ctrl_r(); + uint32_t data = m_scsi_bus->data_r(); + if(ctrl & S_RST) { + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_state = IDLE; + LOG("scsi bus reset\n"); + m_scsi_state = m_scsi_substate = IDLE; + m_buf_control_rpos = m_buf_control_wpos = 0; + m_scsi_identify = 0; + m_data_buffer_size = 0; + m_data_buffer_pos = 0; + return; + } + + LOGMASKED(LOG_STATE, "state=%d.%d %s\n", + m_scsi_state & STATE_MASK, (m_scsi_state & SUB_MASK) >> SUB_SHIFT, + timeout ? "timeout" : "change"); + + switch(m_scsi_state & SUB_MASK ? m_scsi_state & SUB_MASK : m_scsi_state & STATE_MASK) { + case IDLE: + if(((ctrl & (S_SEL|S_BSY)) == S_SEL) && (m_scsi_id != -1) && ((data & (1 << m_scsi_id)) != 0)) { + for(m_scsi_initiator_id = 0; m_scsi_initiator_id != 16 && (m_scsi_initiator_id == m_scsi_id || (data & (1 << m_scsi_initiator_id))); m_scsi_initiator_id++) {}; + if(m_scsi_initiator_id == 16) + m_scsi_initiator_id = -1; + m_scsi_state = TARGET_SELECT_WAIT_BUS_SETTLE; + m_scsi_timer->adjust(scsi_bus_settle_delay(), true); + } + break; + + case TARGET_SELECT_WAIT_BUS_SETTLE: + if((ctrl & (S_SEL|S_BSY)) == S_SEL) { + m_scsi_state = TARGET_SELECT_WAIT_SEL_0; + m_scsi_bus->ctrl_w(m_scsi_refid, S_BSY, S_BSY); + } else + m_scsi_state = IDLE; + break; + + case TARGET_SELECT_WAIT_SEL_0: + if(ctrl & S_SEL) + break; + buf_control_push()->m_action = BC_MSG_OR_COMMAND; + m_scsi_state = TARGET_NEXT_CONTROL; + step(false); + break; + + case RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT: + if(ctrl & S_ACK) { + scsi_put_data(m_data_buffer_id, m_data_buffer_pos++, m_scsi_bus->data_r()); + m_scsi_state = (m_scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ); + } + break; + + case RECV_BYTE_T_WAIT_ACK_0 << SUB_SHIFT: + if(!(ctrl & S_ACK)) { + m_scsi_state &= STATE_MASK; + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); + attotime delay = scsi_data_byte_period(); + if (delay == attotime::zero) { + step(false); + } else { + m_scsi_timer->adjust(delay, false); + } + } + break; + + case SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT: + if(ctrl & S_ACK) { + m_scsi_state = (m_scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT); + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_REQ); + } + break; + + case SEND_BYTE_T_WAIT_ACK_0 << SUB_SHIFT: + if(!(ctrl & S_ACK)) { + m_scsi_state &= STATE_MASK; + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); + attotime delay = scsi_data_byte_period(); + if (delay == attotime::zero) { + step(false); + } else { + m_scsi_timer->adjust(delay, false); + } + } + break; + + case TARGET_NEXT_CONTROL: { + control *ctl = buf_control_pop(); + switch(ctl->m_action) { + case BC_MSG_OR_COMMAND: + m_data_buffer_id = SBUF_MAIN; + m_data_buffer_pos = 0; + if(ctrl & S_ATN) { + m_scsi_state = TARGET_WAIT_MSG_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_MSG_OUT, S_PHASE_MASK); + } else { + m_scsi_state = TARGET_WAIT_CMD_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); + } + target_recv_byte(); + break; + + case BC_STATUS: + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_STATUS, S_PHASE_MASK); + target_send_byte(ctl->m_param1); + break; + + case BC_DATA_IN: + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_DATA_IN, S_PHASE_MASK); + m_data_buffer_id = ctl->m_param1; + m_data_buffer_size = ctl->m_param2; + m_data_buffer_pos = 0; + if (m_data_buffer_size > 0) { + m_scsi_state = TARGET_WAIT_DATA_IN_BYTE; + } + else { + m_scsi_state = TARGET_NEXT_CONTROL; + } + step(false); + break; + + case BC_DATA_OUT: + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_DATA_OUT, S_PHASE_MASK); + m_data_buffer_id = ctl->m_param1; + m_data_buffer_size = ctl->m_param2; + m_data_buffer_pos = 0; + if (m_data_buffer_size > 0) { + m_scsi_state = TARGET_WAIT_DATA_OUT_BYTE; + } + else { + m_scsi_state = TARGET_NEXT_CONTROL; + } + step(false); + break; + + case BC_MESSAGE_1: + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_MSG_IN, S_PHASE_MASK); + target_send_byte(ctl->m_param1); + break; + + case BC_BUS_FREE: + m_scsi_bus->data_w(m_scsi_refid, 0); + m_scsi_bus->ctrl_wait(m_scsi_refid, S_BSY|S_SEL|S_RST, S_ALL); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ALL); + m_scsi_state = IDLE; + break; + }; + break; + } + + case TARGET_WAIT_DATA_IN_BYTE: + if(m_data_buffer_pos == m_data_buffer_size-1) + m_scsi_state = TARGET_NEXT_CONTROL; + target_send_buffer_byte(); + break; + + case TARGET_WAIT_DATA_OUT_BYTE: + if(m_data_buffer_pos == m_data_buffer_size-1) + m_scsi_state = TARGET_NEXT_CONTROL; + target_recv_byte(); + break; + + case TARGET_WAIT_MSG_BYTE: + if(ctrl & S_SEL) + return; + if(!(ctrl & S_ATN)) { + m_scsi_cmdsize = m_data_buffer_pos; + scsi_message(); + m_data_buffer_id = SBUF_MAIN; + m_data_buffer_pos = 0; + m_scsi_state = TARGET_WAIT_CMD_BYTE; + m_scsi_bus->ctrl_w(m_scsi_refid, S_PHASE_COMMAND, S_PHASE_MASK); + } + target_recv_byte(); + break; + + case TARGET_WAIT_CMD_BYTE: + if(ctrl & S_SEL) + return; + if(ctrl & S_ATN) { + LOG("Parity error? Say what?\n"); + m_scsi_state = IDLE; + break; + } + + if(scsi_command_done(m_scsi_cmdbuf[0], m_data_buffer_pos)) { + m_scsi_cmdsize = m_data_buffer_pos; + m_scsi_bus->ctrl_wait(m_scsi_refid, 0, S_ACK); + scsi_command(); + m_scsi_state = TARGET_NEXT_CONTROL; + attotime delay = scsi_data_command_delay(); + if (delay == attotime::zero) { + step(false); + } else { + m_scsi_timer->adjust(delay, false); + } + } else + target_recv_byte(); + break; + + default: + LOG("step() unexpected state %d.%d\n", + m_scsi_state & STATE_MASK, (m_scsi_state & SUB_MASK) >> SUB_SHIFT); + exit(0); + } +} + +void nscsi_full_device::target_recv_byte() +{ + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ACK, S_ACK); + m_scsi_state = (m_scsi_state & STATE_MASK) | (RECV_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); + m_scsi_bus->ctrl_w(m_scsi_refid, S_REQ, S_REQ); + step(false); +} + +void nscsi_full_device::target_send_byte(uint8_t val) +{ + m_scsi_bus->ctrl_wait(m_scsi_refid, S_ACK, S_ACK); + m_scsi_state = (m_scsi_state & STATE_MASK) | (SEND_BYTE_T_WAIT_ACK_1 << SUB_SHIFT); + m_scsi_bus->data_w(m_scsi_refid, val); + m_scsi_bus->ctrl_w(m_scsi_refid, S_REQ, S_REQ); + step(false); +} + +uint8_t nscsi_full_device::scsi_get_data(int id, int pos) +{ + switch(id) { + case SBUF_MAIN: + LOGMASKED(LOG_DATA, "scsi_get_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, m_scsi_cmdbuf[pos], m_scsi_cmdbuf[pos] >= 0x20 && m_scsi_cmdbuf[pos] < 0x7f ? (char)m_scsi_cmdbuf[pos] : ' '); + return m_scsi_cmdbuf[pos]; + case SBUF_SENSE: + return m_scsi_sense_buffer[pos]; + default: + fatalerror("nscsi_full_device::scsi_get_data - unknown id\n"); + } +} + +void nscsi_full_device::scsi_put_data(int id, int pos, uint8_t data) +{ + switch(id) { + case SBUF_MAIN: + LOGMASKED(LOG_DATA, "nscsi_bus: scsi_put_data MAIN, id:%d pos:%d data:%02x %c\n", id, pos, data, data >= 0x20 && data < 0x7f ? (char)data : ' '); + m_scsi_cmdbuf[pos] = data; + break; + case SBUF_SENSE: + m_scsi_sense_buffer[pos] = data; + break; + default: + fatalerror("nscsi_full_device::scsi_put_data - unknown id %d\n", id); + } +} + +void nscsi_full_device::target_send_buffer_byte() +{ + target_send_byte(scsi_get_data(m_data_buffer_id, m_data_buffer_pos++)); +} + +bool nscsi_full_device::scsi_command_done(uint8_t command, uint8_t length) +{ + if(!length) + return false; + switch(command >> 5) { + case 0: return length == 6; + case 1: return length == 10; + case 2: return length == 10; + case 3: return true; + case 4: return true; + case 5: return length == 12; + case 6: return true; + case 7: return length == 32; + case 8: return length == 16; + case 9: return length == 16; + } + return true; +} + +nscsi_full_device::control *nscsi_full_device::buf_control_push() +{ + if(m_buf_control_wpos == int(std::size(m_buf_control))) + throw emu_fatalerror("%s: buf_control overflow\n", tag()); + + control *c = m_buf_control + m_buf_control_wpos; + m_buf_control_wpos++; + return c; +} + +nscsi_full_device::control *nscsi_full_device::buf_control_pop() +{ + if(m_buf_control_rpos == m_buf_control_wpos) + throw emu_fatalerror("%s: buf_control underflow\n", tag()); + + control *c = m_buf_control + m_buf_control_rpos; + m_buf_control_rpos++; + if(m_buf_control_rpos == m_buf_control_wpos) + m_buf_control_rpos = m_buf_control_wpos = 0; + return c; +} + +void nscsi_full_device::scsi_status_complete(uint8_t st) +{ + control *c; + c = buf_control_push(); + c->m_action = BC_STATUS; + c->m_param1 = st; + c = buf_control_push(); + c->m_action = BC_MESSAGE_1; + c->m_param1 = SM_COMMAND_COMPLETE; + c = buf_control_push(); + c->m_action = BC_BUS_FREE; +} + +void nscsi_full_device::scsi_data_in(int buf, int size) +{ + if((VERBOSE & LOG_DATA_SENT) && buf == 0) { + std::string dt = ""; + int sz = size; + if(sz > 50) + sz = 50; + for(int i=0; i sz) + dt += " ..."; + LOGMASKED(LOG_DATA_SENT, "Sending data (%d)%s\n", size, dt); + } + control *c; + c = buf_control_push(); + c->m_action = BC_DATA_IN; + c->m_param1 = buf; + c->m_param2 = size; +} + +void nscsi_full_device::scsi_data_out(int buf, int size) +{ + control *c; + c = buf_control_push(); + c->m_action = BC_DATA_OUT; + c->m_param1 = buf; + c->m_param2 = size; +} + +////////////////////////////////////////////////////////////////////////////// + +void nscsi_full_device::set_sense_data(const u8 sense_key, const u16 sense_key_code, const sense_data *data) +{ + assert(sizeof(m_scsi_sense_buffer) >= 18); + assert(sense_key <= 0x0f); + memset(m_scsi_sense_buffer, 0, 18); + if (data) { + m_scsi_sense_buffer[0] = (data->invalid ? 0 : 0x80) // even though SCSI-2 section 8.2.14 implies valid bit should always be set, other sections such as 10.2.12 disagree! + | (data->deferred ? 0x71 : 0x70); + m_scsi_sense_buffer[2] = (data->filemark ? 0x80 : 0) + | (data->eom ? 0x40 : 0) + | (data->bad_len ? 0x20 : 0); // "incorrect length indicator" + put_s32be(&m_scsi_sense_buffer[3], data->info); + } + else + m_scsi_sense_buffer[0] = 0xf0; + m_scsi_sense_buffer[2] |= sense_key; + m_scsi_sense_buffer[7] = 10; // additional sense length + put_u16be(&m_scsi_sense_buffer[12], sense_key_code); +} + +void nscsi_full_device::sense(bool deferred, uint8_t key, uint8_t asc, uint8_t ascq) +{ + sense_data s; + s.deferred = deferred; + set_sense_data(key, (asc << 8) | ascq, &s); +} + +void nscsi_full_device::report_condition(const u8 sense_key, const u16 sense_key_code, const sense_data *data) +{ + set_sense_data(sense_key, sense_key_code, data); + scsi_status_complete(SS_CHECK_CONDITION); +} + +void nscsi_full_device::report_bad_lun(const u8 cmd, const u8 lun) +{ + LOG("%s (0x%02x) lun=%d\n *** BAD LUN\n", command_names[cmd], cmd, lun); + report_condition(SK_ILLEGAL_REQUEST, SKC_LOGICAL_UNIT_NOT_SUPPORTED); +} + +void nscsi_full_device::report_bad_cmd(const u8 cmd) +{ + LOG("%s (0x%02x)\n *** BAD COMMAND\n", command_names[cmd], cmd); + report_condition(SK_ILLEGAL_REQUEST, SKC_INVALID_COMMAND_OPERATION_CODE); +} + +void nscsi_full_device::report_filemark(const s32 info, const bool eom) +{ + LOG(" *** FILEMARK info=%d\n", info); + sense_data s; + s.filemark = true; + s.eom = eom; + s.info = info; + report_condition(SK_NO_SENSE, SKC_FILEMARK_DETECTED, &s); +} + +void nscsi_full_device::report_bom(const s32 info) +{ + LOG(" *** BOM info=%d\n", info); + sense_data s; + s.eom = true; + s.info = info; + report_condition(SK_NO_SENSE, SKC_BEGINNING_OF_PARTITION_MEDIUM_DETECTED, &s); +} + +void nscsi_full_device::report_ew(const s32 info) +{ + LOG(" EW info=%d\n", info); + sense_data s; + s.eom = true; + s.info = info; + report_condition(SK_NO_SENSE, SKC_END_OF_PARTITION_MEDIUM_DETECTED, &s); +} + +void nscsi_full_device::report_eod(const s32 info, const bool eom) +{ + LOG(" *** EOD info=%d\n", info); + sense_data s; + s.eom = eom; + s.info = info; + report_condition(SK_BLANK_CHECK, SKC_END_OF_DATA_DETECTED, &s); +} + +void nscsi_full_device::report_eom(const bool write, const s32 info, const bool invalid) +{ + LOG(" *** EOM info=%d invalid=%d\n", info, invalid); + sense_data s; + s.invalid = invalid; + s.eom = true; + s.info = info; + report_condition(write ? SK_VOLUME_OVERFLOW : SK_MEDIUM_ERROR, SKC_END_OF_PARTITION_MEDIUM_DETECTED, &s); +} + +void nscsi_full_device::report_bad_len(const bool over, const s32 info) +{ + LOG(" *** %sLENGTH BLOCK info=%d\n", over ? "OVER" : "UNDER", info); + sense_data s; + s.bad_len = true; + s.info = info; + report_condition(SK_ILLEGAL_REQUEST, SKC_NO_ADDITIONAL_SENSE_INFORMATION, &s); +} + +void nscsi_full_device::report_bad_cdb_field() +{ + LOG(" *** BAD CDB FIELD\n"); + report_condition(SK_ILLEGAL_REQUEST, SKC_INVALID_FIELD_IN_CDB); +} + +void nscsi_full_device::report_bad_pl_field() +{ + LOG(" *** BAD PARAMETER LIST FIELD\n"); + report_condition(SK_ILLEGAL_REQUEST, SKC_INVALID_FIELD_IN_PARAMETER_LIST); +} + +void nscsi_full_device::report_bad_pl_len() +{ + LOG(" *** BAD PARAMETER LIST LENGTH\n"); + report_condition(SK_ILLEGAL_REQUEST, SKC_PARAMETER_LIST_LENGTH_ERROR); +} + +void nscsi_full_device::report_no_saving_params() +{ + LOG(" *** NO SAVING PARAMETERS\n"); + report_condition(SK_ILLEGAL_REQUEST, SKC_SAVING_PARAMETERS_NOT_SUPPORTED); +} + +void nscsi_full_device::report_no_medium() +{ + LOG(" *** NO MEDIUM\n"); + report_condition(SK_NOT_READY, SKC_MEDIUM_NOT_PRESENT); +} + +void nscsi_full_device::report_medium_changed() +{ + LOG(" MEDIUM CHANGED\n"); + report_condition(SK_UNIT_ATTENTION, SKC_NOT_READY_TO_READY_TRANSITION_MEDIUM_MAY_HAVE_CHANGED); +} + +void nscsi_full_device::report_read_only() +{ + LOG(" *** READ ONLY\n"); + report_condition(SK_DATA_PROTECT, SKC_WRITE_PROTECTED); +} + +void nscsi_full_device::report_read_failure() +{ + LOG(" *** READ FAILURE\n"); + report_condition(SK_MEDIUM_ERROR, SKC_UNRECOVERED_READ_ERROR); +} + +void nscsi_full_device::report_write_failure() +{ + LOG(" *** WRITE FAILURE\n"); + report_condition(SK_MEDIUM_ERROR, SKC_WRITE_ERROR); +} + +void nscsi_full_device::report_erase_failure() +{ + LOG(" *** ERASE FAILURE\n"); + report_condition(SK_MEDIUM_ERROR, SKC_ERASE_FAILURE); +} + +////////////////////////////////////////////////////////////////////////////// + +void nscsi_full_device::scsi_unknown_command() +{ + std::string txt = util::string_format("Unhandled command %s (%d):", command_names[m_scsi_cmdbuf[0]], m_scsi_cmdsize); + for(int i=0; i != m_scsi_cmdsize; i++) + txt += util::string_format(" %02x", m_scsi_cmdbuf[i]); + LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt); + + scsi_status_complete(SS_CHECK_CONDITION); + sense(false, SK_ILLEGAL_REQUEST); +} + +void nscsi_full_device::scsi_command() +{ + const u8 cmd = m_scsi_cmdbuf[0]; + const u8 lun = get_lun(m_scsi_cmdbuf[1] >> 5); // LUN may be overridden by IDENTIFY, per SCSI-2 section 7.2.2 + switch(cmd) { + case SC_REZERO_UNIT: + LOG("command REZERO UNIT\n"); + scsi_status_complete(SS_GOOD); + break; + case SC_REQUEST_SENSE: + handle_request_sense(lun); + break; + default: + scsi_unknown_command(); + break; + } +} + +void nscsi_full_device::handle_request_sense(const u8 lun) // mandatory; SCSI-2 section 8.2.14 +{ + const u8 alloc_len = m_scsi_cmdbuf[4]; // allocation length + LOG("command REQUEST SENSE lun=%d alloc_len=%d\n", lun, alloc_len); + if ((m_scsi_cmdbuf[1] & 0x1f) || m_scsi_cmdbuf[2] || m_scsi_cmdbuf[3]) // error: reserved bits set + return report_bad_cdb_field(); + + assert(sizeof(m_scsi_sense_buffer) >= 18); + scsi_data_in(SBUF_SENSE, std::min(18, (const int)alloc_len)); + scsi_status_complete(SS_GOOD); +} + +void nscsi_full_device::scsi_message() +{ + if(m_scsi_cmdbuf[0] & 0x80) { + m_scsi_identify = m_scsi_cmdbuf[0]; + return; + } + + std::string txt = "Unknown message"; + for(int i=0; i != m_scsi_cmdsize; i++) + txt += util::string_format(" %02x", m_scsi_cmdbuf[i]); + LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt); +} + +int nscsi_full_device::get_lun(int def) +{ + if(m_scsi_identify & 0x80) + // lower 3 bits contain LUNTRN + return m_scsi_identify & 0x07; + return def; +} + +void nscsi_full_device::bad_lun() +{ + scsi_status_complete(SS_CHECK_CONDITION); + sense(false, SK_ILLEGAL_REQUEST, SK_ASC_LOGICAL_UNIT_NOT_SUPPORTED); +} + +// Arbitration delay (2.4us) +attotime nscsi_full_device::scsi_arbitation_delay() +{ + return attotime::from_nsec(2400); +} + +// Assertion period (90ns) +attotime nscsi_full_device::scsi_assertion_period() +{ + return attotime::from_nsec(90); +} + +// Bus clear delay (800ns) +attotime nscsi_full_device::scsi_bus_clear_delay() +{ + return attotime::from_nsec(800); +} + +// Bus free delay (800ns) +attotime nscsi_full_device::scsi_bus_free_delay() +{ + return attotime::from_nsec(800); +} + +// Bus set delay (1.8us) +attotime nscsi_full_device::scsi_bus_set_delay() +{ + return attotime::from_nsec(1800); +} + +// Bus settle delay (400ns) +attotime nscsi_full_device::scsi_bus_settle_delay() +{ + return attotime::from_nsec(400); +} + +// Cable skew delay (10ns) +attotime nscsi_full_device::scsi_cable_skew_delay() +{ + return attotime::from_nsec(10); +} + +// Data release delay (400ns) +attotime nscsi_full_device::scsi_data_release_delay() +{ + return attotime::from_nsec(400); +} + +// Deskew delay (45ns) +attotime nscsi_full_device::scsi_deskew_delay() +{ + return attotime::from_nsec(45); +} + +// Disconnection delay (200us) +attotime nscsi_full_device::scsi_disconnection_delay() +{ + return attotime::from_usec(200); +} + +// Hold time (45ns) +attotime nscsi_full_device::scsi_hold_time() +{ + return attotime::from_nsec(45); +} + +// Negation period (90ns) +attotime nscsi_full_device::scsi_negation_period() +{ + return attotime::from_nsec(90); +} + +// Reset hold time (25us) +attotime nscsi_full_device::scsi_reset_hold_time() +{ + return attotime::from_usec(25); +} + +// Selection abort time (200us) +attotime nscsi_full_device::scsi_selection_abort_time() +{ + return attotime::from_usec(200); +} + +// Selection timeout delay (250ms) +attotime nscsi_full_device::scsi_selection_timeout_delay() +{ + return attotime::from_msec(250); +} + +// Fast assertion period (30ns) +attotime nscsi_full_device::scsi_fast_assertion_period() +{ + return attotime::from_nsec(30); +} + +// Fast cable skew delay (5ns) +attotime nscsi_full_device::scsi_fast_cable_skew_delay() +{ + return attotime::from_nsec(5); +} + +// Fast deskew delay (20ns) +attotime nscsi_full_device::scsi_fast_deskew_delay() +{ + return attotime::from_nsec(20); +} + +// Fast hold time (10ns) +attotime nscsi_full_device::scsi_fast_hold_time() +{ + return attotime::from_nsec(10); +} + +// Fast negation period (30ns) +attotime nscsi_full_device::scsi_fast_negation_period() +{ + return attotime::from_nsec(30); +} + +// Byte transfer rate (immediate) +attotime nscsi_full_device::scsi_data_byte_period() +{ + return attotime::zero; +} + +// Command execution delay (immediate) +attotime nscsi_full_device::scsi_data_command_delay() +{ + return attotime::zero; +} diff --git a/src/devices/machine/nscsi_hle.h b/src/devices/machine/nscsi_hle.h new file mode 100644 index 00000000000..8c91a39ae1b --- /dev/null +++ b/src/devices/machine/nscsi_hle.h @@ -0,0 +1,724 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +#ifndef MAME_MACHINE_NSCSI_HLE_H +#define MAME_MACHINE_NSCSI_HLE_H + +#pragma once + +#include "nscsi_bus.h" + +class nscsi_full_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface +{ +public: + virtual void scsi_ctrl_changed() override; + +protected: + // SCSI status returns + enum { + SS_GOOD = 0x00, + SS_CHECK_CONDITION = 0x02, + SS_CONDITION_MET = 0x04, + SS_BUSY = 0x08, + SS_INT_GOOD = 0x10, + SS_INT_CONDITION_MET = 0x14, + SS_RESV_CONFLICT = 0x18, + SS_TERMINATED = 0x22, + SS_QUEUE_FULL = 0x28 + }; + + // SCSI sense keys + enum { + SK_NO_SENSE = 0x00, + SK_RECOVERED_ERROR = 0x01, + SK_NOT_READY = 0x02, + SK_MEDIUM_ERROR = 0x03, + SK_HARDWARE_ERROR = 0x04, + SK_ILLEGAL_REQUEST = 0x05, + SK_UNIT_ATTENTION = 0x06, + SK_DATA_PROTECT = 0x07, + SK_BLANK_CHECK = 0x08, + SK_VENDOR_SPECIFIC = 0x09, + SK_COPY_ABORTED = 0x0a, + SK_ABORTED_COMMAND = 0x0b, + SK_EQUAL = 0x0c, + SK_VOLUME_OVERFLOW = 0x0d, + SK_MISCOMPARE = 0x0e, + SK_COMPLETED = 0x0f + }; + + // SCSI SPACE type codes; SCSI-2 table 189 + enum { + STC_BLOCKS = 0x00, + STC_FILEMARKS = 0x01, + STC_SEQUENTIAL_FILEMARKS = 0x02, + STC_END_OF_DATA = 0x03, + STC_SETMARKS = 0x04, + STC_SEQUENTIAL_SETMARKS = 0x05 + }; + + // SCSI MODE SENSE page controls; SCSI-2 table 55 + enum { + SPC_CURRENT_VALUES = 0x00, + SPC_CHANGEABLE_VALUES = 0x01, + SPC_DEFAULT_VALUES = 0x02, + SPC_SAVED_VALUES = 0x03 + }; + + // SCSI MODE SELECT/SENSE page codes; SCSI-2 tables 95, 155, 199, 216, 267, 296, 324, 350, 363; extra SCSI-3 codes from "The SCSI Bench Reference" + enum { + SPC_VENDOR_SPECIFIC = 0x00, + SPC_READ_WRITE_ERROR_RECOVERY_PAGE = 0x01, + SPC_READ_ERROR_RECOVERY_PAGE = 0x01, + SPC_DISCONNECT_RECONNECT_PAGE = 0x02, + SPC_FORMAT_DEVICE_PAGE = 0x03, + SPC_PARALLEL_PRINTER_INTERFACE_PAGE = 0x03, + SPC_MEASUREMENT_UNITS_PAGE = 0x03, + SPC_RIGID_DISK_GEOMETRY_PAGE = 0x04, + SPC_SERIAL_PRINTER_INTERFACE_PAGE = 0x04, + SPC_FLEXIBLE_DISK_PAGE = 0x05, + SPC_PRINTER_OPTIONS_PAGE = 0x05, + SPC_OPTICAL_MEMORY_PAGE = 0x06, + SPC_VERIFY_ERROR_RECOVERY_PAGE = 0x07, + SPC_CACHING_PAGE = 0x08, + SPC_PERIPHERAL_DEVICE_PAGE = 0x09, + SPC_CONTROL_MODE_PAGE = 0x0a, + SPC_MEDIUM_TYPES_SUPPORTED_PAGE = 0x0b, + SPC_NOTCH_AND_PARTITION_PAGE = 0x0c, + SPC_DIRECT_ACCESS_POWER_CONDITION_PAGE = 0x0d, // direct access device only + SPC_CD_ROM_PAGE = 0x0d, + SPC_CD_ROM_AUDIO_CONTROL_PAGE = 0x0e, + SPC_DATA_COMPRESSION_PAGE = 0x0f, + SPC_XOR_CONTROL_MODE_PAGE = 0x10, + SPC_DEVICE_CONFIGURATION_PAGE = 0x10, + SPC_MEDIUM_PARTITION_PAGE_1 = 0x11, + SPC_MEDIUM_PARTITION_PAGE_2 = 0x12, + SPC_MEDIUM_PARTITION_PAGE_3 = 0x13, + SPC_MEDIUM_PARTITION_PAGE_4 = 0x14, + SPC_POWER_CONDITION_PAGE = 0x1a, // all other device types + SPC_INFORMATIONAL_EXCEPTIONS_CONTROL_PAGE = 0x1c, + SPC_ELEMENT_ADDRESS_ASSIGNMENT_PAGE = 0x1d, + SPC_TRANSPORT_GEOMETRY_PARAMETERS_PAGE = 0x1e, + SPC_DEVICE_CAPABILITIES_PAGE = 0x1f, + SPC_RETURN_ALL_MODE_PAGES = 0x3f + }; + + // SCSI additional sense codes and additional sense code qualifiers, packaged together as additional qualified sense key codes; SCSI-2 table 71; extra SCSI-3 codes from "The SCSI Bench Reference" + enum { + SKC_NO_ADDITIONAL_SENSE_INFORMATION = 0x0000, + SKC_FILEMARK_DETECTED = 0x0001, + SKC_END_OF_PARTITION_MEDIUM_DETECTED = 0x0002, + SKC_SETMARK_DETECTED = 0x0003, + SKC_BEGINNING_OF_PARTITION_MEDIUM_DETECTED = 0x0004, + SKC_END_OF_DATA_DETECTED = 0x0005, + SKC_IO_PROCESS_TERMINATED = 0x0006, + SKC_AUDIO_PLAY_OPERATION_IN_PROGRESS = 0x0011, + SKC_AUDIO_PLAY_OPERATION_PAUSED = 0x0012, + SKC_AUDIO_PLAY_OPERATION_SUCCESSFULLY_COMPLETED = 0x0013, + SKC_AUDIO_PLAY_OPERATION_STOPPED_DUE_TO_ERROR = 0x0014, + SKC_NO_CURRENT_AUDIO_STATUS_TO_RETURN = 0x0015, + SKC_OPERATION_IN_PROGRESS = 0x0016, + SKC_CLEANING_REQUESTED = 0x0017, + SKC_NO_INDEX_SECTOR_SIGNAL = 0x0100, + SKC_NO_SEEK_COMPLETE = 0x0200, + SKC_PERIPHERAL_DEVICE_WRITE_FAULT = 0x0300, + SKC_NO_WRITE_CURRENT = 0x0301, + SKC_EXCESSIVE_WRITE_ERRORS = 0x0302, + SKC_LOGICAL_UNIT_NOT_READY_CAUSE_NOT_REPORTABLE = 0x0400, + SKC_LOGICAL_UNIT_IS_IN_PROCESS_OF_BECOMING_READY = 0x0401, + SKC_LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED = 0x0402, + SKC_LOGICAL_UNIT_NOT_READY_MANUAL_INTERVENTION_REQUIRED = 0x0403, + SKC_LOGICAL_UNIT_NOT_READY_FORMAT_IN_PROGRESS = 0x0404, + SKC_LOGICAL_UNIT_NOT_READY_OPERATION_IN_PROGRESS = 0x0407, + SKC_LOGICAL_UNIT_DOES_NOT_RESPOND_TO_SELECTION = 0x0500, + SKC_NO_REFERENCE_POSITION_FOUND = 0x0600, + SKC_MULTIPLE_PERIPHERAL_DEVICES_SELECTED = 0x0700, + SKC_LOGICAL_UNIT_COMMUNICATION_FAILURE = 0x0800, + SKC_LOGICAL_UNIT_COMMUNICATION_TIME_OUT = 0x0801, + SKC_LOGICAL_UNIT_COMMUNICATION_PARITY_ERROR = 0x0802, + SKC_TRACK_FOLLOWING_ERROR = 0x0900, + SKC_TRACKING_SERVO_FAILURE = 0x0901, + SKC_FOCUS_SERVO_FAILURE = 0x0902, + SKC_SPINDLE_SERVO_FAILURE = 0x0903, + SKC_HEAD_SELECT_FAULT = 0x0904, + SKC_ERROR_LOG_OVERFLOW = 0x0a00, + SKC_WARNING = 0x0b00, + SKC_WARNING_SPECIFIC_TEMPERATURE_EXCEEDED = 0x0b01, + SKC_WRITE_ERROR = 0x0c00, + SKC_WRITE_ERROR_RECOVERED_WITH_AUTO_REALLOCATION = 0x0c01, + SKC_WRITE_ERROR_AUTO_REALLOCATION_FAILED = 0x0c02, + SKC_WRITE_ERROR_RECOMMEND_REASSIGNMENT = 0x0c03, + SKC_COMPRESSION_CHECK_MISCOMPARE_ERROR = 0x0c04, + SKC_DATA_EXPANSION_OCCURRED_DURING_COMPRESSION = 0x0c05, + SKC_BLOCK_NOT_COMPRESSABLE = 0x0c06, + SKC_ID_CRC_OR_ECC_ERROR = 0x1000, + SKC_UNRECOVERED_READ_ERROR = 0x1100, + SKC_READ_RETRIES_EXHAUSTED = 0x1101, + SKC_ERROR_TOO_LONG_TO_CORRECT = 0x1102, + SKC_MULTIPLE_READ_ERRORS = 0x1103, + SKC_UNRECOVERED_READ_ERROR_AUTO_REALLOCATE_FAILED = 0x1104, + SKC_L_EC_UNCORRECTABLE_ERROR = 0x1105, + SKC_CIRC_UNRECOVERED_ERROR = 0x1106, + SKC_DATA_RESYNCHRONIZATION_ERROR = 0x1107, + SKC_INCOMPLETE_BLOCK_READ = 0x1108, + SKC_NO_GAP_FOUND = 0x1109, + SKC_MISCORRECTED_ERROR = 0x110a, + SKC_UNRECOVERED_READ_ERROR_RECOMMEND_REASSIGNMENT = 0x110b, + SKC_UNRECOVERED_READ_ERROR_RECOMMEND_REWRITE = 0x110c, + SKC_DECOMPRESSION_CRC_ERROR = 0x110d, + SKC_CANNOT_DECOMPRESS_USING_DECLARED_ALGORITHM = 0x100e, + SKC_ADDRESS_MARK_NOT_FOUND_FOR_ID_FIELD = 0x1200, + SKC_ADDRESS_MARK_NOT_FOUND_FOR_DATA_FIELD = 0x1300, + SKC_RECORDED_ENTITY_NOT_FOUND = 0x1400, + SKC_RECORD_NOT_FOUND = 0x1401, + SKC_FILEMARK_OR_SETMARK_NOT_FOUND = 0x1402, + SKC_END_OF_DATA_NOT_FOUND = 0x1403, + SKC_BLOCK_SEQUENCE_ERROR = 0x1404, + SKC_RECORD_NOT_FOUND_RECOMMEND_REASSIGNMENT = 0x1405, + SKC_RECORD_NOT_FOUND_DATA_AUTO_REALLOCATED = 0x1406, + SKC_RANDOM_POSITIONING_ERROR = 0x1500, + SKC_MECHANICAL_POSITIONING_ERROR = 0x1501, + SKC_POSITIONING_ERROR_DETECTED_BY_READ_OF_MEDIUM = 0x1502, + SKC_DATA_SYNCHRONIZATION_MARK_ERROR = 0x1600, + SKC_DATA_SYNCHRONIZATION_ERROR_DATA_REWRITTEN = 0x1601, + SKC_DATA_SYNCHRONIZATION_ERROR_RECOMMEND_REWRITE = 0x1602, + SKC_DATA_SYNCHRONIZATION_ERROR_DATA_AUTO_REALLOCATED = 0x1603, + SKC_DATA_SYNCHRONIZATION_ERROR_RECOMMEND_REASSIGNMENT = 0x1604, + SKC_RECOVERED_DATA_WITH_NO_ERROR_CORRECTION_APPLIED = 0x1700, + SKC_RECOVERED_DATA_WITH_RETRIES = 0x1701, + SKC_RECOVERED_DATA_WITH_POSITIVE_HEAD_OFFSET = 0x1702, + SKC_RECOVERED_DATA_WITH_NEGATIVE_HEAD_OFFSET = 0x1703, + SKC_RECOVERED_DATA_WITH_RETRIES_AND_OR_CIRC_APPLIED = 0x1704, + SKC_RECOVERED_DATA_USING_PREVIOUS_SECTOR_ID = 0x1705, + SKC_RECOVERED_DATA_WITHOUT_ECC_DATA_AUTO_REALLOCATED = 0x1706, + SKC_RECOVERED_DATA_WITHOUT_ECC_RECOMMEND_REASSIGNMENT = 0x1707, + SKC_RECOVERED_DATA_WITHOUT_ECC_RECOMMEND_REWRITE = 0x1708, + SKC_RECOVERED_DATA_WITHOUT_ECC_DATA_REWRITTEN = 0x1809, + SKC_RECOVERED_DATA_WITH_ERROR_CORRECTION_APPLIED = 0x1800, + SKC_RECOVERED_DATA_WITH_ERROR_CORRECTION_RETRIES_APPLIED = 0x1801, + SKC_RECOVERED_DATA_DATA_AUTO_REALLOCATED = 0x1802, + SKC_RECOVERED_DATA_WITH_CIRC = 0x1803, + SKC_RECOVERED_DATA_WITH_L_EC = 0x1804, + SKC_RECOVERED_DATA_RECOMMEND_REASSIGNMENT = 0x1805, + SKC_RECOVERED_DATA_RECOMMEND_REWRITE = 0x1806, + SKC_RECOVERED_DATA_WITH_ECC_DATA_REWRITTEN = 0x1807, + SKC_DEFECT_LIST_ERROR = 0x1900, + SKC_DEFECT_LIST_NOT_AVAILABLE = 0x1901, + SKC_DEFECT_LIST_ERROR_IN_PRIMARY_LIST = 0x1902, + SKC_DEFECT_LIST_ERROR_IN_GROWN_LIST = 0x1903, + SKC_PARAMETER_LIST_LENGTH_ERROR = 0x1a00, + SKC_SYNCHRONOUS_DATA_TRANSFER_ERROR = 0x1b00, + SKC_DEFECT_LIST_NOT_FOUND = 0x1c00, + SKC_PRIMARY_DEFECT_LIST_NOT_FOUND = 0x1c01, + SKC_GROWN_DEFECT_LIST_NOT_FOUND = 0x1c02, + SKC_MISCOMPARE_DURING_VERIFY_OPERATION = 0x1d00, + SKC_RECOVERED_ID_WITH_ECC_CORRECTION = 0x1e00, + SKC_PARTIAL_DEFECT_LIST_TRANSFER = 0x1f00, + SKC_INVALID_COMMAND_OPERATION_CODE = 0x2000, + SKC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE = 0x2100, + SKC_INVALID_ELEMENT_ADDRESS = 0x2101, + SKC_ILLEGAL_FUNCTION = 0x2200, // "should use 0x2000, 0x2400, or 0x2600" + SKC_INVALID_FIELD_IN_CDB = 0x2400, + SKC_LOGICAL_UNIT_NOT_SUPPORTED = 0x2500, + SKC_INVALID_FIELD_IN_PARAMETER_LIST = 0x2600, + SKC_PARAMETER_NOT_SUPPORTED = 0x2601, + SKC_PARAMETER_VALUE_INVALID = 0x2602, + SKC_THRESHOLD_PARAMETERS_NOT_SUPPORTED = 0x2603, + SKC_INVALID_RELEASE_OF_ACTIVE_PERSISTENT_RESERVATION = 0x2604, + SKC_WRITE_PROTECTED = 0x2700, + SKC_NOT_READY_TO_READY_TRANSITION_MEDIUM_MAY_HAVE_CHANGED = 0x2800, + SKC_IMPORT_OR_EXPORT_ELEMENT_ACCESSED = 0x2801, + SKC_POWER_ON_RESET_OR_BUS_DEVICE_RESET_OCCURRED = 0x2900, + SKC_POWER_ON_OCCURRED = 0x2901, + SKC_SCSI_BUS_RESET_OCCURRED = 0x2902, + SKC_SCSI_BUS_DEVICE_RESET_FUNCTION_OCCURRED = 0x2903, + SKC_PARAMETERS_CHANGED = 0x2a00, + SKC_MODE_PARAMETERS_CHANGED = 0x2a01, + SKC_LOG_PARAMETERS_CHANGED = 0x2a02, + SKC_RESERVATIONS_PREEMPTED = 0x2a03, + SKC_COPY_CANNOT_EXECUTE_SINCE_HOST_CANNOT_DISCONNECT = 0x2b00, + SKC_COMMAND_SEQUENCE_ERROR = 0x2c00, + SKC_TOO_MANY_WINDOWS_SPECIFIED = 0x2c01, + SKC_INVALID_COMBINATION_OF_WINDOWS_SPECIFIED = 0x2c02, + SKC_OVERWRITE_ERROR_ON_UPDATE_IN_PLACE = 0x2d00, + SKC_COMMANDS_CLEARED_BY_ANOTHER_INITIATOR = 0x2f00, + SKC_INCOMPATIBLE_MEDIUM_INSTALLED = 0x3000, + SKC_CANNOT_READ_MEDIUM_UNKNOWN_FORMAT = 0x3001, + SKC_CANNOT_READ_MEDIUM_INCOMPATIBLE_FORMAT = 0x3002, + SKC_CLEANING_CARTRIDGE_INSTALLED = 0x3003, + SKC_CANNOT_WRITE_MEDIUM_UNKNOWN_FORMAT = 0x3004, + SKC_CANNOT_WRITE_MEDIUM_INCOMPATIBLE_FORMAT = 0x3005, + SKC_CANNOT_FORMAT_MEDIUM_INCOMPATIBLE_MEDIUM = 0x3006, + SKC_CLEANING_FAILURE = 0x3007, + SKC_MEDIUM_FORMAT_CORRUPTED = 0x3100, + SKC_FORMAT_COMMAND_FAILED = 0x3101, + SKC_NO_DEFECT_SPARE_LOCATION_AVAILABLE = 0x3200, + SKC_DEFECT_LIST_UPDATE_FAILURE = 0x3201, + SKC_TAPE_LENGTH_ERROR = 0x3300, + SKC_RIBBON_INK_OR_TONER_FAILURE = 0x3600, + SKC_ROUNDED_PARAMETER = 0x3700, + SKC_SAVING_PARAMETERS_NOT_SUPPORTED = 0x3900, + SKC_MEDIUM_NOT_PRESENT = 0x3a00, + SKC_SEQUENTIAL_POSITIONING_ERROR = 0x3b00, + SKC_TAPE_POSITION_ERROR_AT_BEGINNING_OF_MEDIUM = 0x3b01, + SKC_TAPE_POSITION_ERROR_AT_END_OF_MEDIUM = 0x3b02, + SKC_TAPE_OR_ELECTRONIC_VERTICAL_FORMS_UNIT_NOT_READY = 0x3b03, + SKC_SLEW_FAILURE = 0x3b04, + SKC_PAPER_JAM = 0x3b05, + SKC_FAILED_TO_SENSE_TOP_OF_FORM = 0x3b06, + SKC_FAILED_TO_SENSE_BOTTOM_OF_FORM = 0x3b07, + SKC_REPOSITION_ERROR = 0x3b08, + SKC_READ_PAST_END_OF_MEDIUM = 0x3b09, + SKC_READ_PAST_BEGINNING_OF_MEDIUM = 0x3b0a, + SKC_POSITION_PAST_END_OF_MEDIUM = 0x3b0b, + SKC_POSITION_PAST_BEGINNING_OF_MEDIUM = 0x3b0c, + SKC_MEDIUM_DESTINATION_ELEMENT_FULL = 0x3b0d, + SKC_MEDIUM_SOURCE_ELEMENT_EMPTY = 0x3b0e, + SKC_MEDIUM_MAGAZINE_NOT_ACCESSIBLE = 0x3b11, + SKC_MEDIUM_MAGAZINE_REMOVED = 0x3b12, + SKC_MEDIUM_MAGAZINE_INSERTED = 0x3b13, + SKC_MEDIUM_MAGAZINE_LOCKED = 0x3b14, + SKC_MEDIUM_MAGAZINE_UNLOCKED = 0x3b15, + SKC_INVALID_BITS_IN_IDENTIFY_MESSAGE = 0x3d00, + SKC_LOGICAL_UNIT_HAS_NOT_SELF_CONFIGURED_YET = 0x3e00, + SKC_TARGET_OPERATING_CONDITIONS_HAVE_CHANGED = 0x3f00, + SKC_MICROCODE_HAS_BEEN_CHANGED = 0x3f01, + SKC_CHANGED_OPERATING_DEFINITION = 0x3f02, + SKC_INQUIRY_DATA_HAS_CHANGED = 0x3f03, + SKC_RAM_FAILURE = 0x4000, // "should use 0x40nn" + SKC_DIAGNOSTIC_FAILURE_ON_COMPONENT_NN = 0x4000, // LSB is nn (0x80-0xff) + SKC_DATA_PATH_FAILURE = 0x4100, // "should use 0x40nn" + SKC_POWER_ON_OR_SELF_TEST_FAILURE = 0x4200, // "should use 0x40nn" + SKC_MESSAGE_ERROR = 0x4300, + SKC_INTERNAL_TARGET_FAILURE = 0x4400, + SKC_SELECT_OR_RESELECT_FAILURE = 0x4500, + SKC_UNSUCCESSFUL_SOFT_RESET = 0x4600, + SKC_SCSI_PARITY_ERROR = 0x4700, + SKC_INITIATOR_DETECTED_ERROR_MESSAGE_RECEIVED = 0x4800, + SKC_INVALID_MESSAGE_ERROR = 0x4900, + SKC_COMMAND_PHASE_ERROR = 0x4a00, + SKC_DATA_PHASE_ERROR = 0x4b00, + SKC_LOGICAL_UNIT_FAILED_SELF_CONFIGURATION = 0x4c00, + SKC_TAGGED_OVERLAPPED_COMMANDS_NN = 0x4d00, // "queue tag"; LSB is nn + SKC_OVERLAPPED_COMMANDS_ATTEMPTED = 0x4e00, + SKC_WRITE_APPEND_ERROR = 0x5000, + SKC_WRITE_APPEND_POSITION_ERROR = 0x5001, + SKC_POSITION_ERROR_RELATED_TO_TIMING = 0x5002, + SKC_ERASE_FAILURE = 0x5100, + SKC_CARTRIDGE_FAULT = 0x5200, + SKC_MEDIA_LOAD_OR_EJECT_FAILED = 0x5300, + SKC_UNLOAD_TAPE_FAILURE = 0x5301, + SKC_MEDIUM_REMOVAL_PREVENTED = 0x5302, + SKC_SCSI_TO_HOST_SYSTEM_INTERFACE_FAILURE = 0x5400, + SKC_SYSTEM_RESOURCE_FAILURE = 0x5500, + SKC_SYSTEM_BUFFER_FULL = 0x5501, + SKC_UNABLE_TO_RECOVER_TABLE_OF_CONTENTS = 0x5700, + SKC_GENERATION_DOES_NOT_EXIST = 0x5800, + SKC_UPDATED_BLOCK_READ = 0x5900, + SKC_OPERATOR_REQUEST_OR_STATE_CHANGE_INPUT = 0x5a00, // "unspecified" + SKC_OPERATOR_MEDIUM_REMOVAL_REQUEST = 0x5a01, + SKC_OPERATOR_SELECTED_WRITE_PROTECT = 0x5a02, + SKC_OPERATOR_SELECTED_WRITE_PERMIT = 0x5a03, + SKC_LOG_EXCEPTION = 0x5b00, + SKC_THRESHOLD_CONDITION_MET = 0x5b01, + SKC_LOG_COUNTER_AT_MAXIMUM = 0x5b02, + SKC_LOG_LIST_CODES_EXHAUSTED = 0x5b03, + SKC_RPL_STATUS_CHANGE = 0x5c00, + SKC_SPINDLES_SYNCHRONIZED = 0x5c01, + SKC_SPINDLES_NOT_SYNCHRONIZED = 0x5c02, + SKC_FAILURE_PREDICTION_THRESHOLD_EXCEEDED = 0x5d00, + SKC_FAILURE_PREDICTION_THRESHOLD_EXCEEDED_FALSE = 0x5dff, // what?! + SKC_LOW_POWER_CONDITION_ON = 0x5e00, + SKC_IDLE_CONDITION_ACTIVATED_BY_TIMER = 0x5e01, + SKC_STANDBY_CONDITION_ACTIVATED_BY_TIMER = 0x5e02, + SKC_IDLE_CONDITION_ACTIVATED_BY_COMMAND = 0x5e03, + SKC_STANDBY_CONDITION_ACTIVATED_BY_COMMAND = 0x5e04, + SKC_LAMP_FAILURE = 0x6000, + SKC_VIDEO_ACQUISITION_ERROR = 0x6100, + SKC_UNABLE_TO_ACQUIRE_VIDEO = 0x6101, + SKC_OUT_OF_FOCUS = 0x6102, + SKC_SCAN_HEAD_POSITIONING_ERROR = 0x6200, + SKC_END_OF_USER_AREA_ENCOUNTERED_ON_THIS_TRACK = 0x6300, + SKC_ILLEGAL_MODE_FOR_THIS_TRACK = 0x6400, + SKC_VOLTAGE_FAULT = 0x6500, + SKC_DECOMPRESSION_EXCEPTION_SHORT_ALGORITHM_ID_OF_NN = 0x7000, // LSB is nn + SKC_DECOMPRESSION_EXCEPTION_LONG_ALGORITHM_ID = 0x7100 + }; + + // SCSI addtional sense code qualifiers + enum { + SK_ASC_INVALID_FIELD_IN_CDB = 0x24, + SK_ASC_LOGICAL_UNIT_NOT_SUPPORTED = 0x25, + SK_ASC_MEDIUM_NOT_PRESENT = 0x3a + }; + + // SCSI commands + static const char *const command_names[256]; + enum { + SC_TEST_UNIT_READY = 0x00, + SC_REWIND = 0x01, + SC_REZERO_UNIT = 0x01, + SC_REQUEST_BLOCK_ADDRESS = 0x02, + SC_REQUEST_SENSE = 0x03, + SC_FORMAT = 0x04, + SC_FORMAT_UNIT = 0x04, + SC_READ_BLOCK_LIMITS = 0x05, + SC_INITIALIZE_ELEMENT_STATUS = 0x07, + SC_REASSIGN_BLOCKS = 0x07, + SC_GET_MESSAGE_6 = 0x08, + SC_READ_6 = 0x08, + SC_RECEIVE = 0x08, + SC_PRINT = 0x0a, + SC_SEND_MESSAGE_6 = 0x0a, + SC_SEND_6 = 0x0a, + SC_WRITE_6 = 0x0a, + SC_SEEK_6 = 0x0b, + SC_SLEW_AND_PRINT = 0x0b, + SC_SEEK_BLOCK = 0x0c, + SC_READ_REVERSE = 0x0f, + SC_SYNCHRONIZE_BUFFER = 0x10, + SC_WRITE_FILEMARKS = 0x10, + SC_SPACE = 0x11, + SC_INQUIRY = 0x12, + SC_VERIFY_6 = 0x13, + SC_RECOVER_BUFFERED_DATA = 0x14, + SC_MODE_SELECT_6 = 0x15, + SC_RESERVE_6 = 0x16, + SC_RESERVE_UNIT = 0x16, + SC_RELEASE_6 = 0x17, + SC_RELEASE_UNIT = 0x17, + SC_COPY = 0x18, + SC_ERASE = 0x19, + SC_MODE_SENSE_6 = 0x1a, + SC_LOAD_UNLOAD = 0x1b, + SC_SCAN = 0x1b, + SC_STOP_PRINT = 0x1b, + SC_START_STOP_UNIT = 0x1b, + SC_RECEIVE_DIAGNOSTIC_RESULTS = 0x1c, + SC_SEND_DIAGNOSTIC = 0x1d, + SC_PREVENT_ALLOW_MEDIUM_REMOVAL = 0x1e, + SC_READ_FORMAT_CAPACITIES = 0x23, + SC_SET_WINDOW = 0x24, + SC_GET_WINDOW = 0x25, + SC_READ_CAPACITY = 0x25, + SC_READ_CD_RECORDED_CAPACITY = 0x25, + SC_GET_MESSAGE_10 = 0x28, + SC_READ_10 = 0x28, + SC_READ_GENERATION = 0x29, + SC_SEND_MESSAGE_10 = 0x2a, + SC_SEND_10 = 0x2a, + SC_WRITE_10 = 0x2a, + SC_LOCATE = 0x2b, + SC_POSITION_TO_ELEMENT = 0x2b, + SC_SEEK_10 = 0x2b, + SC_ERASE_10 = 0x2c, + SC_READ_UPDATED_BLOCK = 0x2d, + SC_WRITE_AND_VERIFY_10 = 0x2e, + SC_VERIFY_10 = 0x2f, + SC_SEARCH_DATA_HIGH_10 = 0x30, + SC_OBJECT_POSITION = 0x31, + SC_SEARCH_DATA_EQUAL_10 = 0x31, + SC_SEARCH_DATA_LOW_10 = 0x32, + SC_SET_LIMITS_10 = 0x33, + SC_PREFETCH = 0x34, + SC_READ_POSITION = 0x34, + SC_SYNCHRONIZE_CACHE = 0x35, + SC_LOCK_UNLOCK_CACHE = 0x36, + SC_READ_DEFECT_DATA_10 = 0x37, + SC_MEDIUM_SCAN = 0x38, + SC_COMPARE = 0x39, + SC_COPY_AND_VERIFY = 0x3a, + SC_WRITE_BUFFER = 0x3b, + SC_READ_BUFFER = 0x3c, + SC_UPDATE_BLOCK = 0x3d, + SC_READ_LONG = 0x3e, + SC_WRITE_LONG = 0x3f, + SC_CHANGE_DEFINITION = 0x40, + SC_WRITE_SAME = 0x41, + SC_READ_SUB_CHANNEL = 0x42, + SC_READ_TOC_PMA_ATIP = 0x43, + SC_READ_HEADER = 0x44, + SC_PLAY_AUDIO_10 = 0x45, + SC_GET_CONFIGURATION = 0x46, + SC_PLAY_AUDIO_MSF = 0x47, + SC_PLAY_AUDIO_TRACK_INDEX = 0x48, + SC_PLAY_TRACK_RELATIVE_10 = 0x49, + SC_GET_EVENT_STATUS_NOTIFICATION = 0x4a, + SC_PAUSE_RESUME = 0x4b, + SC_LOG_SELECT = 0x4c, + SC_LOG_SENSE = 0x4d, + SC_STOP_PLAY_SCAN = 0x4e, + SC_XDWRITE = 0x50, + SC_XPWRITE = 0x51, + SC_READ_DISC_INFORMATION = 0x51, + SC_READ_TRACK_INFORMATION = 0x52, + SC_XDREAD = 0x52, + SC_RESERVE_TRACK = 0x53, + SC_SEND_OPC_INFORMATION = 0x54, + SC_MODE_SELECT_10 = 0x55, + SC_RESERVE_10 = 0x56, + SC_RELEASE_10 = 0x57, + SC_REPAIR_TRACK = 0x58, + SC_READ_MASTER_CUE = 0x59, + SC_MODE_SENSE_10 = 0x5a, + SC_CLOSE_TRACK_SESSION = 0x5b, + SC_READ_BUFFER_CAPACITY = 0x5c, + SC_SEND_CUE_SHEET = 0x5d, + SC_PERSISTENT_RESERVE_IN = 0x5e, + SC_PERSISTENT_RESERVE_OUT = 0x5f, + SC_XDWRITE_EXTENDED = 0x80, + SC_REBUILD = 0x81, + SC_REGENERATE = 0x82, + SC_EXTENDED_COPY = 0x83, + SC_RECEIVE_COPY_RESULTS = 0x84, + SC_WRITE_16 = 0x8a, + SC_SYNCHRONIZE_CACHE_16 = 0x91, + SC_WRITE_SAME_16 = 0x93, + SC_READ_CAPACITY_16 = 0x9e, + SC_READ_LONG_16 = 0x9e, + SC_WRITE_LONG_16 = 0x9f, + SC_REPORT_LUNS = 0xa0, + SC_BLANK = 0xa1, + SC_SEND_EVENT = 0xa2, + SC_REPORT_DEVICE_IDENTIFIER = 0xa3, + SC_SEND_KEY = 0xa3, + SC_REPORT_KEY = 0xa4, + SC_SET_DEVICE_IDENTIFIER = 0xa4, + SC_PLAY_AUDIO_12 = 0xa5, + SC_LOAD_UNLOAD_MEDIUM = 0xa6, + SC_MOVE_MEDIUM_ATTACHED = 0xa7, + SC_SET_READ_AHEAD = 0xa7, + SC_READ_12 = 0xa8, + SC_PLAY_RELATIVE_12 = 0xa9, + SC_WRITE_12 = 0xaa, + SC_ERASE_12 = 0xac, + SC_GET_PERFORMANCE = 0xac, + SC_READ_DVD_STRUCTURE = 0xad, + SC_WRITE_AND_VERIFY_12 = 0xae, + SC_VERIFY_12 = 0xaf, + SC_SEARCH_DATA_HIGH_12 = 0xb0, + SC_SEARCH_DATA_EQUAL_12 = 0xb1, + SC_SEARCH_DATA_LOW_12 = 0xb2, + SC_SET_LIMITS_12 = 0xb3, + SC_READ_ELEMENT_STATUS_ATTACHED = 0xb4, + SC_SET_STREAMING = 0xb6, + SC_READ_DEFECT_DATA_12 = 0xb7, + SC_READ_CD_MSF = 0xb9, + SC_SCAN_MMC = 0xba, + SC_SET_CD_SPEED = 0xbb, + SC_PLAY_CD = 0xbc, + SC_SPARE_IN = 0xbc, + SC_MECHANISM_STATUS = 0xbd, + SC_SPARE_OUT = 0xbd, + SC_READ_CD = 0xbe, + SC_SEND_DVD_STRUCTURE = 0xbf + }; + + enum { + SBUF_MAIN, + SBUF_SENSE + }; + + nscsi_full_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void scsi_message(); + virtual void scsi_command(); + virtual bool scsi_command_done(uint8_t command, uint8_t length); + + TIMER_CALLBACK_MEMBER(update_tick); + + void handle_request_sense(const u8 lun); + void scsi_unknown_command(); + void scsi_status_complete(uint8_t st); + void scsi_data_in(int buf, int size); + void scsi_data_out(int buf, int size); + + struct sense_data { + sense_data() + { + invalid = false; + deferred = false; + filemark = false; + eom = false; + bad_len = false; + sense_key = 0; + info = 0; + sense_key_code = 0; + } + + bool invalid; + bool deferred; + bool filemark; + bool eom; + bool bad_len; + u8 sense_key; + s32 info; + u16 sense_key_code; + }; + void set_sense_data(const u8 sense_key, const u16 sense_key_code, const sense_data *data = nullptr); + void sense(bool deferred, uint8_t key, uint8_t asc = 0, uint8_t ascq = 0); + void report_condition(const u8 sense_key, const u16 sense_key_code, const sense_data *data = nullptr); + void report_bad_lun(const u8 cmd, const u8 lun); + void report_bad_cmd(const u8 cmd); + void report_filemark(const s32 info = 0, const bool eom = false); + void report_bom(const s32 info = 0); + void report_ew(const s32 info = 0); + void report_eod(const s32 info = 0, const bool eom = false); + void report_eom(const bool write, const s32 info = 0, const bool invalid = false); + void report_bad_len(const bool over, const s32 info = 0); + void report_bad_cdb_field(); + void report_bad_pl_field(); + void report_bad_pl_len(); + void report_no_saving_params(); + void report_no_medium(); + void report_medium_changed(); + void report_read_only(); + void report_read_failure(); + void report_write_failure(); + void report_erase_failure(); + + int get_lun(int def = 0); + void bad_lun(); + + virtual uint8_t scsi_get_data(int buf, int offset); + virtual void scsi_put_data(int buf, int offset, uint8_t data); + + // Default delays: + + // Arbitration delay (2.4us) + virtual attotime scsi_arbitation_delay(); + + // Assertion period (90ns) + virtual attotime scsi_assertion_period(); + + // Bus clear delay (800ns) + virtual attotime scsi_bus_clear_delay(); + + // Bus free delay (800ns) + virtual attotime scsi_bus_free_delay(); + + // Bus set delay (1.8us) + virtual attotime scsi_bus_set_delay(); + + // Bus settle delay (400ns) + virtual attotime scsi_bus_settle_delay(); + + // Cable skew delay (10ns) + virtual attotime scsi_cable_skew_delay(); + + // Data release delay (400ns) + virtual attotime scsi_data_release_delay(); + + // Deskew delay (45ns) + virtual attotime scsi_deskew_delay(); + + // Disconnection delay (200us) + virtual attotime scsi_disconnection_delay(); + + // Hold time (45ns) + virtual attotime scsi_hold_time(); + + // Negation period (90ns) + virtual attotime scsi_negation_period(); + + // Reset hold time (25us) + virtual attotime scsi_reset_hold_time(); + + // Selection abort time (200us) + virtual attotime scsi_selection_abort_time(); + + // Selection timeout delay (250ms) + virtual attotime scsi_selection_timeout_delay(); + + // Fast assertion period (30ns) + virtual attotime scsi_fast_assertion_period(); + + // Fast cable skew delay (5ns) + virtual attotime scsi_fast_cable_skew_delay(); + + // Fast deskew delay (20ns) + virtual attotime scsi_fast_deskew_delay(); + + // Fast hold time (10ns) + virtual attotime scsi_fast_hold_time(); + + // Fast negation period (30ns) + virtual attotime scsi_fast_negation_period(); + + // Byte transfer rate (immediate) + virtual attotime scsi_data_byte_period(); + + // Command delay (immediate) + virtual attotime scsi_data_command_delay(); + + uint8_t m_scsi_cmdbuf[4096]; + uint8_t m_scsi_sense_buffer[18]; + int m_scsi_cmdsize; + uint8_t m_scsi_identify; + +private: + enum { + IDLE + }; + + enum { + TARGET_SELECT_WAIT_BUS_SETTLE = 1, + TARGET_SELECT_WAIT_SEL_0, + + TARGET_NEXT_CONTROL, + TARGET_WAIT_MSG_BYTE, + TARGET_WAIT_CMD_BYTE, + TARGET_WAIT_DATA_IN_BYTE, + TARGET_WAIT_DATA_OUT_BYTE + }; + + enum { + RECV_BYTE_T_WAIT_ACK_0 = 1, + RECV_BYTE_T_WAIT_ACK_1, + SEND_BYTE_T_WAIT_ACK_0, + SEND_BYTE_T_WAIT_ACK_1 + }; + + enum { + STATE_MASK = 0x00ff, + SUB_SHIFT = 8, + SUB_MASK = 0xff00 + }; + + enum { + BC_MSG_OR_COMMAND, + BC_STATUS, + BC_MESSAGE_1, + BC_MESSAGE_2, + BC_DATA_IN, + BC_DATA_OUT, + BC_BUS_FREE + }; + + struct control { + int m_action; + int m_param1, m_param2; + }; + + emu_timer *m_scsi_timer; + + int m_scsi_state, m_scsi_substate; + int m_scsi_initiator_id; + int m_data_buffer_id, m_data_buffer_size, m_data_buffer_pos; + + control m_buf_control[32]; + int m_buf_control_rpos; + int m_buf_control_wpos; + + control *buf_control_push(); + control *buf_control_pop(); + + void step(bool timeout); + void target_recv_byte(); + void target_send_byte(uint8_t val); + void target_send_buffer_byte(); +}; + +#endif From 92334ecd06f766a9bb26b4bd34c5a184c881eb96 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 2 Mar 2026 21:44:47 +0100 Subject: [PATCH 110/351] Remove leftover function --- src/devices/bus/hp_dio/hp98265a.cpp | 9 --------- 1 file changed, 9 deletions(-) diff --git a/src/devices/bus/hp_dio/hp98265a.cpp b/src/devices/bus/hp_dio/hp98265a.cpp index da9c39de963..bb49935d739 100644 --- a/src/devices/bus/hp_dio/hp98265a.cpp +++ b/src/devices/bus/hp_dio/hp98265a.cpp @@ -71,15 +71,6 @@ private: bool m_dmar0; }; -void dio16_98265a_device::mb87030_scsi_adapter(device_t *device) -{ - mb87030_device &spc = downcast(*device); - spc.set_clock(8_MHz_XTAL); - - spc.out_irq_callback().set("^^", FUNC(dio16_98265a_device::irq_w)); - spc.out_dreq_callback().set("^^", FUNC(dio16_98265a_device::dmar0_w)); -} - void dio16_98265a_device::device_add_mconfig(machine_config &config) { auto &scsi(NSCSI_BUS(config, m_scsibus)); From 7ec9aa81e1c7756702d48920b3912a391df66ef8 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Mon, 2 Mar 2026 22:32:01 +0100 Subject: [PATCH 111/351] a2sider: Remove the nscsi_cb --- src/devices/bus/a2bus/sider.cpp | 45 ++++++++++++++------------------- src/devices/bus/a2bus/sider.h | 3 +-- 2 files changed, 20 insertions(+), 28 deletions(-) diff --git a/src/devices/bus/a2bus/sider.cpp b/src/devices/bus/a2bus/sider.cpp index d2722c8bb77..9dd6f26c1cf 100644 --- a/src/devices/bus/a2bus/sider.cpp +++ b/src/devices/bus/a2bus/sider.cpp @@ -119,7 +119,7 @@ void a2bus_sider_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "sasibus:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "sasibus:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "sasibus:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "sasibus:7", default_scsi_devices, "scsicb", true).option_add_internal("scsicb", NSCSI_CB); + m_sasibus->set_external_device(7, *this); } //------------------------------------------------- @@ -142,9 +142,9 @@ const tiny_rom_entry *a2bus_sider1card_device::device_rom_region() const a2bus_sider_device::a2bus_sider_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), + nscsi_device_interface(mconfig, *this), device_a2bus_card_interface(mconfig, *this), m_sasibus(*this, "sasibus"), - m_sasi(*this, "sasibus:7:scsicb"), m_rom(*this, SASI_ROM_REGION), m_latch(0xff), m_control(0) @@ -193,19 +193,19 @@ uint8_t a2bus_sider_device::read_c0nx(uint8_t offset) // b5: I/O // b6: C/D // b7: REQ - rv |= m_sasi->req_r() ? 0x80 : 0; - rv |= m_sasi->cd_r() ? 0x40 : 0; - rv |= m_sasi->io_r() ? 0x20 : 0; - rv |= m_sasi->msg_r() ? 0x10 : 0; - rv |= m_sasi->bsy_r() ? 0x08 : 0; + rv |= m_scsi_bus->ctrl_r() & S_REQ ? 0x80 : 0; + rv |= m_scsi_bus->ctrl_r() & S_CTL ? 0x40 : 0; + rv |= m_scsi_bus->ctrl_r() & S_INP ? 0x20 : 0; + rv |= m_scsi_bus->ctrl_r() & S_MSG ? 0x10 : 0; + rv |= m_scsi_bus->ctrl_r() & S_BSY ? 0x08 : 0; return rv; case 1: - rv = m_sasi->read(); - if ((m_sasi->req_r()) && (m_sasi->io_r())) + rv = m_scsi_bus->data_r(); + if ((m_scsi_bus->ctrl_r() & S_REQ) && (m_scsi_bus->ctrl_r() & S_INP)) { - m_sasi->ack_w(1); - m_sasi->ack_w(0); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } return rv; @@ -230,13 +230,13 @@ void a2bus_sider_device::write_c0nx(uint8_t offset, uint8_t data) m_latch = data; if (!(m_control & 0x10)) { - m_sasi->write(m_latch); + m_scsi_bus->data_w(m_scsi_refid, m_latch); - if (m_sasi->req_r()) + if (m_scsi_bus->ctrl_r() & S_REQ) { - m_sasi->ack_w(1); - m_sasi->write(0); // stop driving the data lines - m_sasi->ack_w(0); + m_scsi_bus->ctrl_w(m_scsi_refid, S_ACK, S_ACK); + m_scsi_bus->data_w(m_scsi_refid, 0); // stop driving the data lines + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_ACK); } } break; @@ -247,16 +247,9 @@ void a2bus_sider_device::write_c0nx(uint8_t offset, uint8_t data) // b6: /BSY // b7: /SEL (error in note on A2DP's schematic; BSY and SEL are the same polarity from the 6502's POV) m_control = data; - m_sasi->sel_w((data & 0x80) ? 1 : 0); - m_sasi->bsy_w((data & 0x40) ? 1 : 0); - if (data & 0x20) - { - m_sasibus->reset(); - } - else if (!(data & 0x10)) - { - m_sasi->write(m_latch); - } + m_scsi_bus->ctrl_w(m_scsi_refid, ((data & 0x80) ? S_SEL : 0) | ((data & 0x40) ? S_BSY : 0) | ((data & 0x20) ? S_RST : 0), S_SEL|S_BSY|S_RST); + if (!(data & 0x10)) + m_scsi_bus->data_w(m_scsi_refid, m_latch); break; default: diff --git a/src/devices/bus/a2bus/sider.h b/src/devices/bus/a2bus/sider.h index 779dbdbcbb9..e5f7bfff3f0 100644 --- a/src/devices/bus/a2bus/sider.h +++ b/src/devices/bus/a2bus/sider.h @@ -16,7 +16,6 @@ #include "a2bus.h" #include "bus/nscsi/devices.h" #include "machine/nscsi_bus.h" -#include "machine/nscsi_cb.h" //************************************************************************** // TYPE DEFINITIONS @@ -24,6 +23,7 @@ class a2bus_sider_device: public device_t, + public nscsi_device_interface, public device_a2bus_card_interface { protected: @@ -43,7 +43,6 @@ protected: virtual bool take_c800() const override { return true; } required_device m_sasibus; - required_device m_sasi; required_region_ptr m_rom; private: From 601b4615b78d0cf59a70398606441421f41885f5 Mon Sep 17 00:00:00 2001 From: stonedDiscord Date: Tue, 3 Mar 2026 06:43:48 +0100 Subject: [PATCH 112/351] adp/adp.cpp: New systems marked not working (#15046) New systems marked not working ------------------------------ Trumpf As [stonedDiscord] New systems marked not working ------------------------------ Fun Station Spielekoffer 7 Spiele [stonedDiscord] Fun Station Spielekoffer 8 Spiele [stonedDiscord] --- src/mame/adp/adp.cpp | 33 +++++++++++++++++++++++++++++++++ src/mame/mame.lst | 3 +++ 2 files changed, 36 insertions(+) diff --git a/src/mame/adp/adp.cpp b/src/mame/adp/adp.cpp index 10695b93bc0..004899e9473 100644 --- a/src/mame/adp/adp.cpp +++ b/src/mame/adp/adp.cpp @@ -734,6 +734,26 @@ ROM_START( funlddlx4 ) ROM_LOAD16_BYTE( "v62c5181024ll.u8", 0x0001, 0x20000, CRC(89705c86) SHA1(e5b57ab26a5034349ee61b8821d1ae64e2dd45f4) ) ROM_END +ROM_START( fstation7 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_i.u2", 0x00000, 0x80000, CRC(bbf4bbd9) SHA1(80e785cb04213f8cc2f580b523e20b4825ba45e5)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_ii.u6", 0x00001, 0x80000, CRC(cd8ab9e3) SHA1(cb9206d0367f00bec278cee0a4115594ba715fcd)) + + ROM_REGION16_BE( 0x100000, "gfx1", 0) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_i.u2", 0x00000, 0x80000, CRC(dcddb25a) SHA1(7c54bd7a368fd57e3eb995a26462b3d2d589b0db)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_ii.u5", 0x00001, 0x80000, CRC(400f9b8f) SHA1(4c4a9f46016eee805653b5fae65680225ac71436)) +ROM_END + +ROM_START( fstation8 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_8_sp_f1_i.u2", 0x00000, 0x80000, CRC(f9c792ab) SHA1(30ab7352cce22340be87ddae80e4b3c2f69ea778)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_8_sp_f1_ii.u5", 0x00001, 0x80000, CRC(0cb7b719) SHA1(e87bc67da903d9514dd97a6abf2d4e2171e15dbd)) + + ROM_REGION16_BE( 0x100000, "gfx1", 0 ) + ROM_LOAD16_BYTE( "spielekoffer_8_sp_video_1.u2", 0x00000, 0x80000, NO_DUMP ) + ROM_LOAD16_BYTE( "spielekoffer_8_sp_video_2.u6", 0x00001, 0x80000, NO_DUMP ) +ROM_END + ROM_START( fstation ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_BYTE( "spielekoffer_9_sp_fun_station_f1.i", 0x00000, 0x80000, CRC(4572efbd) SHA1(e0a91d32ab4096767cafb743523d038f5e0d3238) ) @@ -744,15 +764,28 @@ ROM_START( fstation ) ROM_LOAD16_BYTE( "spielekoffer_video_9_sp_f1.ii", 0x00001, 0x80000, CRC(64138dcb) SHA1(1b629915cba32f8f6164ae5075c175b522b4a323) ) ROM_END +ROM_START(trumpfas) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "trumpf_as_dm_f2_pr1.u2", 0x00000, 0x20000, CRC(542b1517) SHA1(fcddb31b4b429c8d67161037d356861413567bb8)) + ROM_LOAD16_BYTE( "trumpf_as_dm_f2_pr2.u6", 0x00001, 0x20000, CRC(d39bbd88) SHA1(64f47fd0076845ed3f9f3e84aca3504c110ad8ad)) + + ROM_REGION16_BE( 0x40000, "gfx1", 0 ) + ROM_LOAD16_BYTE( "trumpf_as_video_1.u2", 0x00000, 0x20000, NO_DUMP ) + ROM_LOAD16_BYTE( "trumpf_as_video_2.u6", 0x00001, 0x20000, NO_DUMP ) +ROM_END + } // Anonymous namespace GAME( 1993, quickjac, 0, quickjac, quickjac, adp_state, empty_init, ROT0, "ADP", "Quick Jack", 0 ) GAME( 1994, skattv, 0, skattv, skattv, adp_state, empty_init, ROT0, "ADP", "Skat TV", 0 ) +GAME( 1994, trumpfas, skattv, skattv, skattv, adp_state, empty_init, ROT0, "ADP", "Trumpf As", MACHINE_NOT_WORKING ) // throws FOUL error on startup GAME( 1995, skattva, skattv, skattva, skattva, adp_state, empty_init, ROT0, "ADP", "Skat TV (version TS3)", 0 ) GAME( 1997, fashiong, 0, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Fashion Gambler (set 1)", 0 ) GAME( 1997, fashiong2, fashiong, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Fashion Gambler (set 2)", 0 ) GAME( 1999, funlddlx, funlddlx4,funland, skattv, adp_state, empty_init, ROT0, "Stella", "Funny Land de Luxe", MACHINE_NOT_WORKING ) +GAME( 2000, fstation7, fstation, fstation, fstation, adp_state, empty_init, ROT0, "ADP", "Fun Station Spielekoffer 7 Spiele", MACHINE_NOT_WORKING ) // suntris crashes when executing HD63484 paint commands +GAME( 2000, fstation8, fstation, fstation, fstation, adp_state, empty_init, ROT0, "ADP", "Fun Station Spielekoffer 8 Spiele", MACHINE_NOT_WORKING ) // suntris crashes when executing HD63484 paint commands GAME( 2000, fstation, 0, fstation, fstation, adp_state, empty_init, ROT0, "ADP", "Fun Station Spielekoffer 9 Spiele", MACHINE_NOT_WORKING ) // suntris crashes when executing HD63484 paint commands GAME( 2001, funlddlx2, funlddlx4,funland, skattv, adp_state, empty_init, ROT0, "Stella", "Funny Land de Luxe (W2 set)", MACHINE_NOT_WORKING ) GAME( 2001, funlddlx4, 0, funland, skattv, adp_state, empty_init, ROT0, "Stella", "Funny Land de Luxe (W4 set)", MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 9919dd3f298..f7f8f70dd44 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -457,12 +457,15 @@ vp60 fashiong fashiong2 fstation +fstation7 +fstation8 funlddlx funlddlx2 funlddlx4 quickjac skattv skattva +trumpfas @source:adp/manohman.cpp backgamn From d6a13d71a44a06b52e9bb7e83940d59a6914cbf0 Mon Sep 17 00:00:00 2001 From: stonedDiscord Date: Tue, 3 Mar 2026 06:48:13 +0100 Subject: [PATCH 113/351] adp/stella8085.cpp: New systems marked not working (#15047) New systems marked not working ------------------------------ 21 Point [stonedDiscord] 4 Asse [stonedDiscord] As [stonedDiscord] Astro [stonedDiscord] Bistro [stonedDiscord] Club [stonedDiscord] Disc II Plus [stonedDiscord] Disc Olympia [stonedDiscord] Disc Royal (DOB) [stonedDiscord] Full House [stonedDiscord] Max [stonedDiscord] Multi [stonedDiscord] Sesam [stonedDiscord] Super Herz As [stonedDiscord] Super Jackpot [stonedDiscord] Super Pro [stonedDiscord] Trio [stonedDiscord] New clones marked not working ----------------------------- 4 Asse F1 [stonedDiscord] Disc Royal [stonedDiscord] Herz As (F8) [stonedDiscord] Herz As (F1) [stonedDiscord] Herz As [stonedDiscord] Super Multi [stonedDiscord] --- src/mame/adp/stella8085.cpp | 210 ++++++++++++++++++++++++++++++++---- src/mame/mame.lst | 23 ++++ 2 files changed, 215 insertions(+), 18 deletions(-) diff --git a/src/mame/adp/stella8085.cpp b/src/mame/adp/stella8085.cpp index 9a5f62ac7b1..441b650b726 100644 --- a/src/mame/adp/stella8085.cpp +++ b/src/mame/adp/stella8085.cpp @@ -681,6 +681,34 @@ ROM_START( disc3000 ) ROM_LOAD( "disc3000.icd6", 0x4000, 0x4000, CRC(ad88715a) SHA1(660f4044e8f24ad59767ce025966475f9fd56885) ) ROM_END +ROM_START( disciip ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "disc_ii_plus_1-f7m27256f1.ice6", 0x0000, 0x8000, CRC(b2d999f2) SHA1(cb961dfa7d6eec84e742261d6cf66a3e95715101) ) + ROM_LOAD( "disc_ii_plus_2-f7m27256f1.icd6", 0x8000, 0x8000, CRC(c87dd5ce) SHA1(721293fd9ba19bb58b657d6eabd3cd1c7dd74aac) ) +ROM_END + +ROM_START( discoly ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "olympia_pr1", 0x0000, 0x1000, CRC(531deb63) SHA1(6fddfc5791465c3bcdb554f207de391905085df9) ) + ROM_LOAD( "olympia_pr2", 0x1000, 0x1000, CRC(81e119b2) SHA1(a28eca9394e88b862b15e7bc117b0c4d01d4cf38) ) + ROM_LOAD( "olympia_pr3", 0x2000, 0x1000, CRC(2e156cef) SHA1(e5f145f3e4b7515b949fa7b570ca312c5dd12311) ) + ROM_LOAD( "olympia_pr4", 0x3000, 0x1000, CRC(8f51c072) SHA1(f23fd7d683a5d0765469de8910bb24d0db1b42e2) ) + ROM_LOAD( "olympia_pr5", 0x4000, 0x1000, CRC(f486c0da) SHA1(ebec6f66bffa1057f5fa9b4ab53cedd533036f0a) ) + ROM_LOAD( "olympia_pr6", 0x7000, 0x1000, CRC(e6830d26) SHA1(dbe7a39f24a1dcee298dae3ec1b2d6249a914262) ) +ROM_END + +ROM_START( discryl ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "disc_royal_1_m27256.ice6", 0x0000, 0x8000, CRC(b286c166) SHA1(08fecc3bf21013f8dbcc08fef3755757c7ff8053) ) + ROM_LOAD( "disc_royal_2_m27256.icd6", 0x8000, 0x8000, CRC(be2a96c2) SHA1(07efc914832fe549b69a2ec0de5fd5725502ee86) ) +ROM_END + +ROM_START( discrylb ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "disc_royal_dob._i.ice6", 0x0000, 0x8000, CRC(eafe92ca) SHA1(5dc172d7cd4efca7a49ac5884ff30fea7be02a30) ) + ROM_LOAD( "disc_royal_dob.ii.icd6", 0x8000, 0x8000, CRC(ad58476d) SHA1(4565156cac372f45058bce20006692e9afa53ebe) ) +ROM_END + ROM_START( elitdisc ) ROM_REGION( 0x9000, "maincpu", 0 ) ROM_LOAD( "elitedisc.ice6", 0x0000, 0x4000, CRC(7f7a2f30) SHA1(01e3ce5fce2c9d51d3f4b8aab7dd67ed4b26d8f4) ) @@ -702,12 +730,40 @@ ROM_START( extrbltt ) ROM_LOAD( "extrablatt.icd6", 0x8000, 0x8000, CRC(5c0cb9bd) SHA1(673d5f8dec7ccce1c4f39dce6be1e9d1ed699047) ) ROM_END +ROM_START( fullhous ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "merkur_full_house_ic1.ice6", 0x0000, 0x4000, CRC(4f984add) SHA1(5a31c96475fe12c4f19658133d97e6bf0536b776) ) + ROM_LOAD( "merkur_full_house_ic2.icd6", 0x4000, 0x4000, CRC(c0f393a0) SHA1(fa16db49d44e813e68701eb77284d04903cf3ec7) ) +ROM_END + ROM_START( glksstrn ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "glucksstern.ice6", 0x00000, 0x20000, CRC(8e969bae) SHA1(bf66d491932b77dab4c6b15ec7fbf470223636ac) ) ROM_LOAD( "glucksstern.icd6", 0x20000, 0x20000, CRC(f31b860a) SHA1(7b016bb7d0699cfe7165c0abb2c1bbcb944cdc86) ) ROM_END + +ROM_START( herzas ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "herz_as_nr1.ice6", 0x0000, 0x4000, CRC(dd4dbaac) SHA1(7fb3c8ea495d5bf989c4aa807ecbe5601c451a73) ) + ROM_LOAD( "herz_as_nr2.icd6", 0x4000, 0x4000, CRC(f2c6a0c4) SHA1(2dad5f79cb5b21905cbefd56b00db1cce1d0b920) ) + ROM_LOAD( "herz_as_nr3.icc5", 0x8000, 0x1000, CRC(1c8657e8) SHA1(836319901c77037c7f414cf0fddf5ab1bdf90ee5) ) +ROM_END + +ROM_START( herzasf8 ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "herz_as_f8_1.ice6", 0x0000, 0x4000, CRC(830bada0) SHA1(8c1fc7e8433c986687b68f6de7610a624e9ac707) ) + ROM_LOAD( "herz_as_f8_2.icd6", 0x4000, 0x4000, CRC(77f88503) SHA1(671a7e819a0361101a30327179132f2661388b72) ) + ROM_LOAD( "herz_as_f8_3.icc5", 0x8000, 0x1000, CRC(b343bfac) SHA1(3772045fcaeb9a87459e481149f27873fc713ca7) ) +ROM_END + +ROM_START( herzasf1 ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "herz_as_f10_1.ice6", 0x0000, 0x4000, CRC(e8342e8b) SHA1(e32ad013cdd1480d350ba2e6db18a4489f152301) ) + ROM_LOAD( "herz_as_f10_2.icd6", 0x4000, 0x4000, CRC(03ba2d03) SHA1(12434a3c862b30e40b7c3187066b25b2b7c4eaa6) ) + ROM_LOAD( "herz_as_f10_3.icc5", 0x8000, 0x1000, CRC(f67d2492) SHA1(a2daad380376d19cd9ca37f530a23c01b8d3ce5c) ) +ROM_END + ROM_START( juwel ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "juwel.ice6", 0x0000, 0x8000, CRC(6fd9fd6a) SHA1(2ff982750d87be1bc7757bde706d9e329ac29785) ) @@ -726,42 +782,160 @@ ROM_START( kniffi ) ROM_LOAD( "kniffi.icd6", 0x8000, 0x8000, CRC(1c129cec) SHA1(bad22f18b94c16dba36995ff8daf4d48f4d082a2) ) ROM_END +ROM_START( m21point ) + ROM_REGION(0x10000, "maincpu", 0) + ROM_LOAD( "21_point_27c256_f3_i.ice6", 0x0000, 0x8000, CRC(c2b7b030) SHA1(affb317da2f892213556937fa8857186dccac58a) ) + ROM_LOAD( "21_point_27c256_f3_ii.icd6", 0x8000, 0x8000, CRC(a466591c) SHA1(c481fc91055b41c9976ff86785f7ee0ce631bd69) ) +ROM_END + ROM_START( macao ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "mega_macao_f1_1.ice6", 0x0000, 0x8000, CRC(b16c9349) SHA1(f07c3dd215bccab088741f95972489284d6a4db9) ) ROM_LOAD( "mega_macao_f1_2.icd6", 0x8000, 0x8000, CRC(4df216e6) SHA1(28b3ad213f3af9a472c5e7de1c139399677dd825) ) ROM_END +ROM_START(mas) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "mega_as_f5_eprom1_27256.ice6", 0x0000, 0x8000, CRC(17e22e95) SHA1(6fbc11c41c99ee4aac3dcad6647cede25b73f3da) ) + ROM_LOAD( "mega_as_f5_eprom2_27256.icd6", 0x8000, 0x8000, CRC(12453d57) SHA1(c6c9fa39bdfc7801471bed57e365e37bb02f50b0) ) +ROM_END + +ROM_START( mastro ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "merkur_astro_pr1.ice6", 0x0000, 0x8000, CRC(b2d61886) SHA1(12d2aed9315fc311929edeacd23a38bceadb69f8) ) + ROM_LOAD( "merkur_astro_pr2.icd6", 0x8000, 0x8000, CRC(1e0e42d0) SHA1(46b1eec99331f6656f7cb1542207a79091bce9d9) ) +ROM_END + +ROM_START( mbistro ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "merkur_bistro_f1.ice6", 0x0000, 0x8000, CRC(e497eeef) SHA1(a5f621627ee80c11697ee5aa9fcd99023e7b6479) ) + ROM_LOAD( "merkur_bistro_f1.icd6", 0x8000, 0x8000, NO_DUMP ) +ROM_END + +ROM_START( mclub ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "merkur_club_f1_i_st_m27256f1_original.bin", 0x0000, 0x8000, CRC(c78b19b2) SHA1(79aeeee6e82bf987e2aa936575e1e1b251b1a425) ) + ROM_LOAD( "merkur_club_f1_ii_st_m27256f1_original.bin", 0x8000, 0x8000, CRC(ad3b7d5f) SHA1(317909be8a7853bf83f4f3a2497b1f38a0d954c9) ) +ROM_END + +ROM_START( mmax ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "mega_max_f4_i_st_m27256f1_ice6", 0x0000, 0x8000, CRC(91aa91ba) SHA1(f6c3a6e2e2edeaa79cf0bcdb6af01ddd50eb5488) ) + ROM_LOAD( "mega_max_f4_ii_st_m27256f1_icd6", 0x8000, 0x8000, CRC(6120080b) SHA1(16209bfe8e75a165ec1e8a5bf2ec7fa078725380) ) +ROM_END + +ROM_START( mtrio ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "mega_trio_f1_ic1.ice6", 0x0000, 0x8000, CRC(b8c2fc4c) SHA1(ddecd608286eb1f3efc6fccce8806a74ad7ce4b8)) + ROM_LOAD( "mega_trio_f1_ic2.icd6", 0x8000, 0x8000, CRC(9d97fd8c) SHA1(c398610e14c33985a186ae816b759cfdd2b0c6fa)) +ROM_END + ROM_START( rasant ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "rasant_pr_1.ice6", 0x0000, 0x8000, CRC(6abef716) SHA1(8ef2999f6c72f7fb134bfa4ad72ab7be7d12af27) ) ROM_LOAD( "rasant_pr_2.icd6", 0x8000, 0x8000, CRC(c3a95f74) SHA1(87805ca63a93cc9012e7f2ab4d808c48ba93c919) ) ROM_END +ROM_START( sesam ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "sesam_1_27128.ice6", 0x0000, 0x4000, CRC(29a07575) SHA1(d7e3355e32fcb7a064d8d0fd9b4904be860f7eed) ) + ROM_LOAD( "sesam_2_27128.icd6", 0x4000, 0x4000, CRC(dac087d0) SHA1(0776e3db14c9b88140887237b5b3d71396b2e6e9) ) + ROM_LOAD( "sesam_3_2732.icc5", 0x8000, 0x1000, CRC(ec6a2eac) SHA1(6608dd6f477db0df7de3e4262c5b7bcdf1af7ef4) ) +ROM_END + +ROM_START( sherzas ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "super_herz_as_1.ice6", 0x0000, 0x8000, CRC(4212cfaa) SHA1(c428a2a59ae73a92abd08e2b9b2f4feb8ae4dc31) ) + ROM_LOAD( "super_herz_as_2.icd6", 0x8000, 0x8000, CRC(c5cab1a1) SHA1(d3425c94d898369ad22e969a00697e2f0a1305f9) ) +ROM_END + +ROM_START( sjackpot ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "super_jackpot_i.ice6", 0x0000, 0x4000, CRC(3f14364a) SHA1(4711e2d1aa76a08478177ad7b1f5509b11649f9d) ) + ROM_LOAD( "super_jackpot_ii.icd6", 0x4000, 0x4000, CRC(984d4ca1) SHA1(1da5533f06fb7a1ab8f221c5a58c1afafdd5f862) ) +ROM_END + +ROM_START( sprmlti ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "super_multi_1.ice6", 0x0000, 0x8000, CRC(fcf126ba) SHA1(89dfd10b6529a92b55d2585c0aa3d0c6b1751550) ) + ROM_LOAD( "super_multi_2.icd6", 0x8000, 0x8000, CRC(0b7a8352) SHA1(ac03b226296085f43634ba96e3e390d3e44c1760) ) +ROM_END + ROM_START( sprmltib ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "super_multi_dob_pr1.ice6", 0x0000, 0x8000, CRC(2eb21e6b) SHA1(214f0f26f03551ecda88a64d4e1d75a49f376aae) ) ROM_LOAD( "super_multi_dob_pr2.icd6", 0x8000, 0x8000, CRC(e3f14918) SHA1(8ba7fc80044b5d27005a53ddbf9e928c74c25d48) ) ROM_END +ROM_START( superpro ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "super_pro_f2_1.ice6", 0x0000, 0x8000, CRC(3294f651) SHA1(3c2dcecda4cbebf29246bbc7705430e96dcafbae) ) + ROM_LOAD( "super_pro_f2_2.icd6", 0x8000, 0x8000, CRC(82802b74) SHA1(8e6ebc429d4e1ccfc5ed6a3bb6fb1747a6a7187a) ) +ROM_END + +ROM_START( v4assef1 ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "venus_4_asse_f1_i.ice6", 0x0000, 0x8000, CRC(29fd7f6a) SHA1(84a8f744e189f0645410c4b7ac36b65f30aa1cc9) ) + ROM_LOAD( "venus_4_asse_f1_ii.icd6", 0x8000, 0x8000, CRC(314dc36c) SHA1(d076651910c713326fe5f0c617ae6e74b6c15334) ) +ROM_END + +ROM_START( v4assef2 ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "4asse_f2_1_27256.ice6", 0x0000, 0x8000, CRC(577a1a55) SHA1(b13ac1b761fba6b7e25c18ad3c1edeef8c892089) ) + ROM_LOAD( "4asse_f2_2_27256.icd6", 0x8000, 0x8000, CRC(4f921c1a) SHA1(a6cbca333e29e490306820e2df6c9579a67941c8) ) +ROM_END + +ROM_START( vmulti ) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "venus_multi_1_2732.bin", 0x0000, 0x1000, CRC(3b269798) SHA1(511fb8a86008c124de37d5359681d8379d25891d) ) + ROM_LOAD( "venus_multi_2_2732.bin", 0x1000, 0x1000, CRC(67e22cec) SHA1(8639cb4496012d9f20f2ece89f15290d017ece2e) ) + ROM_LOAD( "venus_multi_3_2732.bin", 0x2000, 0x1000, CRC(64bd9bd8) SHA1(c878bdd147e011f4191b5613455648852d395bf1) ) + ROM_LOAD( "venus_multi_4_2732.bin", 0x3000, 0x1000, CRC(b47e70c1) SHA1(a52cd6568dee16f917c92a41693abd91c4dc2d8c) ) + ROM_LOAD( "venus_multi_5_2732.bin", 0x4000, 0x1000, CRC(c2905422) SHA1(5c8e3f0440671dc16df32b599239b0435f120778) ) + ROM_LOAD( "venus_multi_6_2732.bin", 0x7000, 0x1000, CRC(09dd81e7) SHA1(35e9a96d913678a75851a9bf7e7349f93e337805) ) +ROM_END + } // anonymous namespace -GAMEL( 1982, excellnt, 0, excellent, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Excellent", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1983, bahia, 0, excellent, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Bahia", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1984, disc, 0, excellent, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1985, dpplstrt, 0, excellent, dicemstr, stella8085_state, empty_init, ROT0, "Nova", "Doppelstart", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1986, dpplpot, 0, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "Nova", "Doppelpot", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1986, elitdisc, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Elite Disc", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) -GAMEL( 1986, rasant, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "Venus", "Rasant", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1987, disc2000, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 2000", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) -GAMEL( 1987, disc2001, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 2001", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) -GAMEL( 1987, kniffi, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Nova", "Kniffi", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) -GAMEL( 1987, sprmltib, 0, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "Venus", "Super Multi (DOB)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1988, extrbltt, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Extrablatt", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1988, juwel, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Juwel", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1989, disc3000, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 3000", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) -GAMEL( 1991, macao, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "MEGA", "Macao", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1992, karoas, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Karo As", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1982, excellnt, 0, excellent, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Excellent", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1983, bahia, 0, excellent, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Bahia", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1984, disc, 0, excellent, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1985, dpplstrt, 0, excellent, dicemstr, stella8085_state, empty_init, ROT0, "Nova", "Doppelstart", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1986, discoly, 0, excellent, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc Olympia", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1986, dpplpot, 0, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "Nova", "Doppelpot", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1986, elitdisc, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Elite Disc", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1986, sjackpot, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "Nova", "Super Jackpot", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1986, vmulti, 0, excellent, disc, stella8085_state, empty_init, ROT0, "Venus", "Multi", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, disc2000, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 2000", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1987, disc2001, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 2001", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1987, fullhous, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "Merkur", "Full House", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, herzas, herzasf1, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Herz As", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, herzasf8, herzasf1, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Herz As (F8)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, herzasf1, 0, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Herz As (F10)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, kniffi, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Nova", "Kniffi", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1987, rasant, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "Venus", "Rasant", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, sesam, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "Merkur", "Sesam", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1987, sprmlti, sprmltib, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Venus", "Super Multi", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1987, sprmltib, 0, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "Venus", "Super Multi (DOB)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1988, extrbltt, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Extrablatt", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1988, juwel, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Juwel", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1988, mastro, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Merkur Astro", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1988, sherzas, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Merkur", "Super Herz AS", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1989, disc3000, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 3000", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1989, disciip, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc II Plus", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1989, discryl, discrylb, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc Royal", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1989, discrylb, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc Royal (DOB)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) +GAMEL( 1989, mas, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "MEGA", "As", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1990, v4assef1, v4assef2, dicemstr, disc, stella8085_state, empty_init, ROT0, "Venus", "4 Asse (F1)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1990, v4assef2, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "Venus", "4 Asse (F2)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1991, macao, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "MEGA", "Macao", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1991, mbistro, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "MEGA", "Bistro", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1991, mclub, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "Merkur", "Club", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1991, superpro, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Merkur", "Super Pro", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1992, m21point, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "MEGA", "21 Point", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1992, karoas, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Karo As", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1992, mmax, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "MEGA", "Max", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1992, mtrio, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "MEGA", "Trio", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) // 'STELLA DICE MASTER F2' and 'COPYRIGHT BY ADP LUEBBECKE GERMANY 1993' in ROM -GAMEL( 1993, dicemstr, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Stella", "Dice Master", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1998, glksstrn, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", u8"Glücks-Stern", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1993, dicemstr, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Stella", "Dice Master", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1998, glksstrn, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", u8"Glücks-Stern", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index f7f8f70dd44..54093391bba 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -482,18 +482,41 @@ disc disc2000 disc2001 disc3000 +disciip +discoly +discryl +discrylb dpplpot dpplstrt elitdisc excellnt extrbltt +fullhous glksstrn +herzas +herzasf1 +herzasf8 juwel karoas kniffi +m21point macao +mas +mastro +mbistro +mclub +mmax +mtrio rasant +sesam +sherzas +sjackpot +sprmlti sprmltib +superpro +v4assef1 +v4assef2 +vmulti @source:adp/stellafr.cpp action From dfcd3c48ad9d9321b9e5db0877d40d96685ff411 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Tue, 3 Mar 2026 10:01:31 +0100 Subject: [PATCH 114/351] lux4105: remove the nscsi_cb, untested because no clue how to test it... --- src/devices/bus/abcbus/lux4105.cpp | 112 +++++++++-------------------- src/devices/bus/abcbus/lux4105.h | 10 +-- 2 files changed, 36 insertions(+), 86 deletions(-) diff --git a/src/devices/bus/abcbus/lux4105.cpp b/src/devices/bus/abcbus/lux4105.cpp index 1db5d0d3869..0e0aba0a3e0 100644 --- a/src/devices/bus/abcbus/lux4105.cpp +++ b/src/devices/bus/abcbus/lux4105.cpp @@ -39,8 +39,6 @@ Notes: #include "emu.h" #include "lux4105.h" -#include "bus/scsi/scsihd.h" -#include "bus/scsi/s1410.h" @@ -69,17 +67,9 @@ DEFINE_DEVICE_TYPE(LUXOR_4105, luxor_4105_device, "lux4105", "Luxor 4105") void luxor_4105_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "sasi"); + auto &sasi(NSCSI_BUS(config, "sasi")); NSCSI_CONNECTOR(config, "sasi:0", default_scsi_devices, "s1410"); - NSCSI_CONNECTOR(config, "sasi:7", default_scsi_devices, "scsicb", true) - .option_add_internal("scsicb", NSCSI_CB) - .machine_config([this](device_t* device) { - downcast(*device).cd_callback().set(*this, FUNC(luxor_4105_device::write_sasi_cd)); - downcast(*device).bsy_callback().set(*this, FUNC(luxor_4105_device::write_sasi_bsy)); - downcast(*device).req_callback().set(*this, FUNC(luxor_4105_device::write_sasi_req)); - downcast(*device).msg_callback().set(*this, FUNC(luxor_4105_device::write_sasi_msg)); - downcast(*device).io_callback().set(*this, FUNC(luxor_4105_device::write_sasi_io)); - }); + sasi.set_external_device(7, *this); } @@ -138,8 +128,8 @@ ioport_constructor luxor_4105_device::device_input_ports() const luxor_4105_device::luxor_4105_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, LUXOR_4105, tag, owner, clock), + nscsi_device_interface(mconfig, *this), device_abcbus_card_interface(mconfig, *this), - m_sasi(*this, "sasi:7:scsicb"), m_1e(*this, "1E"), m_5e(*this, "5E"), m_cs(false), @@ -186,18 +176,18 @@ void luxor_4105_device::internal_reset() m_data_out = 0; - m_sasi->sel_w(0); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); - m_sasi->rst_w(1); - m_sasi->rst_w(0); + m_scsi_bus->ctrl_w(m_scsi_refid, S_RST, S_RST); + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_RST); } void luxor_4105_device::update_dma() { // TRRQ - bool req = m_sasi->req_r() && !m_req; - bool cd = m_sasi->cd_r(); + bool req = (m_scsi_bus->ctrl_r() & S_REQ) && !m_req; + bool cd = m_scsi_bus->ctrl_r() & S_CTL; m_trrq = !(req && !cd); if (DMA_O2) { @@ -208,14 +198,14 @@ void luxor_4105_device::update_dma() update_ack(); - req = m_sasi->req_r() && !m_req; + req = (m_scsi_bus->ctrl_r() & S_REQ) && !m_req; m_trrq = !(req && !cd); } } m_slot->trrq_w(DMA_O2 ? m_trrq : 1); // DRQ - bool io = m_sasi->io_r(); + bool io = m_scsi_bus->ctrl_r() & S_INP; m_drq = (!((!cd || !io) && !(!cd && !DMA_O2))) && req; // IRQ @@ -237,7 +227,7 @@ void luxor_4105_device::update_dma() void luxor_4105_device::update_ack() { - m_sasi->ack_w(m_sasi->req_r() && (m_sasi->msg_r() || m_req)); + m_scsi_bus->ctrl_w(m_scsi_refid, (m_scsi_bus->ctrl_r() & S_REQ && (m_scsi_bus->ctrl_r() & S_MSG || m_req)) ? S_ACK : 0, S_ACK); } @@ -273,66 +263,32 @@ void luxor_4105_device::write_sasi_data(uint8_t data) { m_data_out = data; - if (!m_sasi->io_r()) + if (!(m_scsi_bus->ctrl_r() & S_INP)) { - m_sasi->write(data); + m_scsi_bus->data_w(m_scsi_refid, data); } // clock REQ FF - m_req = m_sasi->req_r(); + m_req = m_scsi_bus->ctrl_r() & S_REQ; update_ack(); update_dma(); } - -void luxor_4105_device::write_sasi_bsy(int state) +void luxor_4105_device::scsi_ctrl_changed() { - if (state) - { - m_sasi->sel_w(0); - } -} - - -void luxor_4105_device::write_sasi_cd(int state) -{ - update_dma(); -} - - -void luxor_4105_device::write_sasi_req(int state) -{ - if (LOG) logerror("%s REQ %u\n", machine().describe_context(), state); - - if (!state) - { + if(m_scsi_bus->ctrl_r() & S_BSY) + m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); + if(!(m_scsi_bus->ctrl_r() & S_REQ)) // reset REQ FF m_req = 0; - } - update_ack(); - update_dma(); -} - - -void luxor_4105_device::write_sasi_msg(int state) -{ - update_ack(); -} - - -void luxor_4105_device::write_sasi_io(int state) -{ - if (state) - { - m_sasi->write(0); - } + if (m_scsi_bus->ctrl_r() & S_INP) + m_scsi_bus->data_w(m_scsi_refid, 0); else - { - m_sasi->write(m_data_out); - } - + m_scsi_bus->data_w(m_scsi_refid, m_data_out); + + update_ack(); update_dma(); } @@ -382,10 +338,10 @@ uint8_t luxor_4105_device::abcbus_stat() */ - data = m_sasi->req_r() && !m_req; - data |= !m_sasi->cd_r() << 1; - data |= m_sasi->bsy_r() << 2; - data |= !m_sasi->io_r() << 3; + data = m_scsi_bus->ctrl_r() & S_REQ && !m_req; + data |= m_scsi_bus->ctrl_r() & S_CTL ? 0 : 2; + data |= m_scsi_bus->ctrl_r() & S_BSY ? 4 : 0; + data |= m_scsi_bus->ctrl_r() & S_INP ? 0 : 8; data |= !DMA_O3 << 5; data |= !m_pren << 6; @@ -406,9 +362,9 @@ uint8_t luxor_4105_device::abcbus_inp() if (m_cs) { - if (m_sasi->bsy_r()) + if (m_scsi_bus->ctrl_r() & S_BSY) { - data = m_sasi->read(); + data = m_scsi_bus->data_r(); } else { @@ -416,7 +372,7 @@ uint8_t luxor_4105_device::abcbus_inp() } // clock REQ FF - m_req = m_sasi->req_r(); + m_req = m_scsi_bus->ctrl_r() & S_REQ; update_ack(); update_dma(); @@ -453,7 +409,7 @@ void luxor_4105_device::abcbus_c1(uint8_t data) { if (LOG) logerror("%s SELECT\n", machine().describe_context()); - m_sasi->sel_w(1); + m_scsi_bus->ctrl_w(m_scsi_refid, S_SEL, S_SEL); } } @@ -498,13 +454,13 @@ uint8_t luxor_4105_device::abcbus_tren() if (DMA_O2) { - if (m_sasi->bsy_r()) + if (m_scsi_bus->ctrl_r() & S_BSY) { - data = m_sasi->read(); + data = m_scsi_bus->data_r(); } // clock REQ FF - m_req = m_sasi->req_r(); + m_req = m_scsi_bus->ctrl_r() & S_REQ; update_ack(); update_dma(); diff --git a/src/devices/bus/abcbus/lux4105.h b/src/devices/bus/abcbus/lux4105.h index a8e991403f5..e5c718ba470 100644 --- a/src/devices/bus/abcbus/lux4105.h +++ b/src/devices/bus/abcbus/lux4105.h @@ -15,7 +15,6 @@ #include "abcbus.h" #include "bus/nscsi/devices.h" #include "machine/nscsi_bus.h" -#include "machine/nscsi_cb.h" @@ -26,6 +25,7 @@ // ======================> luxor_4105_device class luxor_4105_device : public device_t, + public nscsi_device_interface, public device_abcbus_card_interface { public: @@ -60,14 +60,8 @@ private: void update_dma(); void write_dma_register(uint8_t data); void write_sasi_data(uint8_t data); + virtual void scsi_ctrl_changed() override; - void write_sasi_bsy(int state); - void write_sasi_cd(int state); - void write_sasi_req(int state); - void write_sasi_msg(int state); - void write_sasi_io(int state); - - required_device m_sasi; required_ioport m_1e; required_ioport m_5e; From e65be1e9dea8cede2b1a88807274e000e2730dc6 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Tue, 3 Mar 2026 15:27:58 +0100 Subject: [PATCH 115/351] aic6250,ncr5380,ncr53c90: Deslotify --- src/devices/bus/nscsi/hd.h | 2 +- src/devices/bus/nubus/pwrbkduo/duodock.cpp | 13 +++--- src/devices/machine/aic6250.cpp | 1 - src/devices/machine/aic6250.h | 2 +- src/devices/machine/ncr5380.cpp | 1 - src/devices/machine/ncr5380.h | 1 - src/devices/machine/ncr53c90.cpp | 1 - src/devices/machine/ncr53c90.h | 2 +- src/mame/ampro/ampro.cpp | 12 ++--- src/mame/ampro/lb186.cpp | 20 +++----- src/mame/ampro/lbpc.cpp | 13 +++--- src/mame/apple/f108.cpp | 14 ++---- src/mame/apple/f108.h | 6 ++- src/mame/apple/mac128.cpp | 35 ++++++-------- src/mame/apple/macii.cpp | 13 +++--- src/mame/apple/maciici.cpp | 11 ++--- src/mame/apple/maciivx.cpp | 13 +++--- src/mame/apple/maclc.cpp | 13 +++--- src/mame/apple/maclc3.cpp | 12 ++--- src/mame/apple/macpdm.cpp | 17 +++---- src/mame/apple/macprtb.cpp | 16 +++---- src/mame/apple/macpwrbk030.cpp | 14 +++--- src/mame/apple/macpwrbkmsc.cpp | 14 +++--- src/mame/apple/macquadra605.cpp | 17 +++---- src/mame/apple/macquadra630.cpp | 2 +- src/mame/apple/macquadra700.cpp | 26 +++++------ src/mame/apple/macquadra800.cpp | 22 ++++----- src/mame/apple/scsidma.cpp | 13 +++--- src/mame/bfm/bfm_cobra3.cpp | 23 +++------ src/mame/dec/kn02.cpp | 14 ++---- src/mame/emusys/emax.cpp | 8 ++-- src/mame/emusys/emu3.cpp | 14 ++---- src/mame/homebrew/pc532.cpp | 34 ++++++-------- src/mame/intergraph/interpro.cpp | 52 +++++++++------------ src/mame/konami/konamigq.cpp | 19 ++++---- src/mame/konami/konamigv.cpp | 54 ++++++++++------------ src/mame/konami/twinkle.cpp | 25 ++++------ src/mame/korg/korgdss1.cpp | 13 +++--- src/mame/microsoft/jazz.cpp | 19 +++----- src/mame/mips/mips_i2000.cpp | 14 ++---- src/mame/mips/mips_r3030.cpp | 20 ++++---- src/mame/nec/ews4800.cpp | 14 ++---- src/mame/next/next.cpp | 18 +++----- src/mame/next/next.h | 3 +- src/mame/philips/philipsbo.cpp | 14 ++---- src/mame/sony/news_38xx.cpp | 38 ++++++--------- src/mame/sony/news_68k.cpp | 23 ++++----- src/mame/sony/news_68k_iop.cpp | 14 +++--- src/mame/sun/sun3.cpp | 23 ++++----- src/mame/sun/sun3x.cpp | 8 ++-- src/mame/sun/sun4.cpp | 22 +++------ src/mame/torch/triplex.cpp | 13 +++--- src/mame/trainer/ms68k.cpp | 12 ++--- 53 files changed, 352 insertions(+), 485 deletions(-) diff --git a/src/devices/bus/nscsi/hd.h b/src/devices/bus/nscsi/hd.h index 332783e09b3..1252719bd7a 100644 --- a/src/devices/bus/nscsi/hd.h +++ b/src/devices/bus/nscsi/hd.h @@ -11,7 +11,7 @@ class nscsi_harddisk_device : public nscsi_full_device { public: - nscsi_harddisk_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + nscsi_harddisk_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); void set_default_model_name(const std::string_view &model); protected: diff --git a/src/devices/bus/nubus/pwrbkduo/duodock.cpp b/src/devices/bus/nubus/pwrbkduo/duodock.cpp index bb174ced8fd..73376d69642 100644 --- a/src/devices/bus/nubus/pwrbkduo/duodock.cpp +++ b/src/devices/bus/nubus/pwrbkduo/duodock.cpp @@ -246,12 +246,11 @@ void duodock_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "dscsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "dscsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "dscsi:6", mac_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "dscsi:7").option_set("ncr53c80", NCR53C80).machine_config([this](device_t *device) - { - ncr5380_device &adapter = downcast(*device); - adapter.irq_handler().set(*this, FUNC(duodock_device::scsi_irq_w)); - adapter.drq_handler().set(*this, FUNC(duodock_device::scsi_drq_w)); - }); + + NCR53C80(config, m_ncr); + m_scsibus->set_external_device(7, m_ncr); + m_ncr->irq_handler().set(DEVICE_SELF, FUNC(duodock_device::scsi_irq_w)); + m_ncr->drq_handler().set(DEVICE_SELF, FUNC(duodock_device::scsi_drq_w)); SWIM2(config, m_fdc, 15.6672_MHz_XTAL); m_fdc->devsel_cb().set(FUNC(duodock_device::devsel_w)); @@ -289,7 +288,7 @@ duodock_device::duodock_device(const machine_config &mconfig, device_type type, m_scc(*this, "scc"), m_rom(*this, "dock"), m_scsibus(*this, "dscsi"), - m_ncr(*this, "dscsi:7:ncr53c80"), + m_ncr(*this, "ncr53c80"), m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_monitor_config(*this, "monitor"), diff --git a/src/devices/machine/aic6250.cpp b/src/devices/machine/aic6250.cpp index d573ca682ea..482a49ce547 100644 --- a/src/devices/machine/aic6250.cpp +++ b/src/devices/machine/aic6250.cpp @@ -49,7 +49,6 @@ static char const *const aic6250_phase[] = { "DATA OUT", "*", "DATA IN", "*", "C aic6250_device::aic6250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_int_cb(*this) , m_breq_cb(*this) , m_port_a_r_cb(*this, 0xff) diff --git a/src/devices/machine/aic6250.h b/src/devices/machine/aic6250.h index b051a05602d..de32664abeb 100644 --- a/src/devices/machine/aic6250.h +++ b/src/devices/machine/aic6250.h @@ -8,7 +8,7 @@ #include "machine/nscsi_bus.h" -class aic6250_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface +class aic6250_device : public device_t, public nscsi_device_interface { public: aic6250_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/ncr5380.cpp b/src/devices/machine/ncr5380.cpp index f4a26ab38c2..3649f31c5d1 100644 --- a/src/devices/machine/ncr5380.cpp +++ b/src/devices/machine/ncr5380.cpp @@ -35,7 +35,6 @@ ALLOW_SAVE_TYPE(ncr5380_device::state); ncr5380_device::ncr5380_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, bool has_lbs) : device_t(mconfig, type, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_irq_handler(*this) , m_drq_handler(*this) , m_has_lbs(has_lbs) diff --git a/src/devices/machine/ncr5380.h b/src/devices/machine/ncr5380.h index ac3b6480729..9c441cb3bad 100644 --- a/src/devices/machine/ncr5380.h +++ b/src/devices/machine/ncr5380.h @@ -11,7 +11,6 @@ class ncr5380_device : public device_t , public nscsi_device_interface - , public nscsi_slot_card_interface { public: ncr5380_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0); diff --git a/src/devices/machine/ncr53c90.cpp b/src/devices/machine/ncr53c90.cpp index ec8d488e70a..f7abd724bf3 100644 --- a/src/devices/machine/ncr53c90.cpp +++ b/src/devices/machine/ncr53c90.cpp @@ -153,7 +153,6 @@ void ncr53cf94_device::write(offs_t offset, uint8_t data) ncr53c90_device::ncr53c90_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , tm(nullptr), config(0), status(0), istatus(0), clock_conv(0), sync_offset(0), sync_period(0), bus_id(0) , select_timeout(0), seq(0), tcount(0), tcounter(0), tcounter_mask(0xffff), mode(0), fifo_pos(0), command_pos(0), state(0), xfr_phase(0), dma_dir(0), irq(false), drq(false), test_mode(false), stepping(0) , m_irq_handler(*this) diff --git a/src/devices/machine/ncr53c90.h b/src/devices/machine/ncr53c90.h index df8e1d75b21..5547759c53e 100644 --- a/src/devices/machine/ncr53c90.h +++ b/src/devices/machine/ncr53c90.h @@ -7,7 +7,7 @@ #include "machine/nscsi_bus.h" -class ncr53c90_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface +class ncr53c90_device : public device_t, public nscsi_device_interface { public: ncr53c90_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/mame/ampro/ampro.cpp b/src/mame/ampro/ampro.cpp index 59f0f362b95..bd75aff284a 100644 --- a/src/mame/ampro/ampro.cpp +++ b/src/mame/ampro/ampro.cpp @@ -48,7 +48,7 @@ public: , m_ctc(*this, "ctc") , m_fdc(*this, "fdc") , m_floppy(*this, "fdc:%u", 0U) - , m_ncr(*this, "scsi:7:ncr") + , m_ncr(*this, "ncr") , m_printer(*this, "printer") { } @@ -245,7 +245,7 @@ void ampro_state::ampro(machine_config &config) FLOPPY_CONNECTOR(config, floppy, ampro_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats).enable_sound(true); SOFTWARE_LIST(config, "flop_list").set_original("ampro"); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -253,10 +253,10 @@ void ampro_state::ampro(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr", NCR5380).machine_config([] (device_t *device) { - //downcast(*device).irq_handler().set(m_ctc, FUNC(z80ctc_device::trg2)); // only if JMP3 shorted - //downcast(*device).drq_handler().set(m_dart, FUNC(z80dart_device::dcda_w)); // only if JMP8 shorted - }); + NCR5380(config, m_ncr); + scsi.set_external_device(7, m_ncr); + //m_ncr->irq_handler().set(m_ctc, FUNC(z80ctc_device::trg2)); // only if JMP3 shorted + //m_ncr->drq_handler().set(m_dart, FUNC(z80dart_device::dcda_w)); // only if JMP8 shorted } /* ROM definition */ diff --git a/src/mame/ampro/lb186.cpp b/src/mame/ampro/lb186.cpp index 1ed8c42b644..a129bc49d4f 100644 --- a/src/mame/ampro/lb186.cpp +++ b/src/mame/ampro/lb186.cpp @@ -22,7 +22,7 @@ public: , m_maincpu(*this, "maincpu") , m_fdc(*this, "fdc") , m_floppies(*this, "fdc:%u", 0U) - , m_scsi(*this, "scsibus:7:ncr5380") + , m_scsi(*this, "ncr5380") { } @@ -32,7 +32,6 @@ private: void sio_out_w(uint8_t data); void drive_sel_w(uint8_t data); static void floppy_formats(format_registration &fr); - static void ncr5380(device_t *device); void lb186_io(address_map &map) ATTR_COLD; void lb186_map(address_map &map) ATTR_COLD; @@ -100,18 +99,9 @@ static void lb186_floppies(device_slot_interface &device) device.option_add("525dd", FLOPPY_525_DD); } -void lb186_state::ncr5380(device_t *device) -{ - devcb_base *devcb; - (void)devcb; - downcast(*device).irq_handler().set(":maincpu", FUNC(i80186_cpu_device::int1_w)); - downcast(*device).drq_handler().set(":maincpu", FUNC(i80186_cpu_device::drq0_w)); -} - static void scsi_devices(device_slot_interface &device) { device.option_add("harddisk", NSCSI_HARDDISK); - device.option_add_internal("ncr5380", NCR5380); } void lb186_state::floppy_formats(format_registration &fr) @@ -145,7 +135,7 @@ void lb186_state::lb186(machine_config &config) FLOPPY_CONNECTOR(config, m_floppies[2], lb186_floppies, nullptr, lb186_state::floppy_formats); FLOPPY_CONNECTOR(config, m_floppies[3], lb186_floppies, nullptr, lb186_state::floppy_formats); - NSCSI_BUS(config, "scsibus"); + auto &scsi(NSCSI_BUS(config, "scsibus")); NSCSI_CONNECTOR(config, "scsibus:0", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr); @@ -153,7 +143,11 @@ void lb186_state::lb186(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", lb186_state::ncr5380); + + NCR5380(config, m_scsi); + scsi.set_external_device(7, m_scsi); + m_scsi->irq_handler().set(m_maincpu, FUNC(i80186_cpu_device::int1_w)); + m_scsi->drq_handler().set(m_maincpu, FUNC(i80186_cpu_device::drq0_w)); } ROM_START( lb186 ) diff --git a/src/mame/ampro/lbpc.cpp b/src/mame/ampro/lbpc.cpp index b8b9a72f95a..c723d325477 100644 --- a/src/mame/ampro/lbpc.cpp +++ b/src/mame/ampro/lbpc.cpp @@ -43,7 +43,7 @@ public: , m_maincpu(*this, "maincpu") , m_expbus(*this, "expbus") , m_fdc(*this, "fdc") - , m_scsic(*this, "scsi:7:ncr") + , m_scsic(*this, "ncr") , m_kbd(*this, "kbd") , m_speaker(*this, "speaker") , m_dma_channel(0xff) @@ -375,7 +375,7 @@ void lbpc_state::lbpc(machine_config &config) FLOPPY_CONNECTOR(config, "fdc:1", lbpc_floppies, nullptr, floppy_image_device::default_pc_floppy_formats); SOFTWARE_LIST(config, "disk_list").set_original("ibm5150"); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -383,10 +383,11 @@ void lbpc_state::lbpc(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr", NCR53C80).machine_config([this] (device_t *device) { - downcast(*device).irq_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ5); - downcast(*device).drq_handler().set(m_maincpu, FUNC(v40_device::dreq_w<2>)); - }); + + NCR53C80(config, m_scsic); + scsi.set_external_device(7, m_scsic); + m_scsic->irq_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ5); + m_scsic->drq_handler().set(m_maincpu, FUNC(v40_device::dreq_w<2>)); rs232_port_device &serial(RS232_PORT(config, "serial", default_rs232_devices, nullptr)); serial.dcd_handler().set("com", FUNC(ins8250_device::dcd_w)); // J3 pin 1 diff --git a/src/mame/apple/f108.cpp b/src/mame/apple/f108.cpp index 01b8e914d6d..d89316d7ce2 100644 --- a/src/mame/apple/f108.cpp +++ b/src/mame/apple/f108.cpp @@ -65,15 +65,9 @@ void f108_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c96", NCR53C96).clock(40_MHz_XTAL).machine_config( - [this] (device_t *device) - { - ncr53c96_device &adapter = downcast(*device); - - adapter.set_busmd(ncr53c96_device::BUSMD_1); - adapter.irq_handler_cb().set(m_primetimeii, FUNC(primetime_device::scsi_irq_w)); - adapter.drq_handler_cb().set(m_primetimeii, FUNC(primetime_device::scsi_drq_w)); - }); + NCR53C96(config, m_ncr1, 40_MHz_XTAL); + m_scsibus->set_external_device(7, m_ncr1); + m_ncr1->set_busmd(ncr53c96_device::BUSMD_1); SOFTWARE_LIST(config, "hdd_list").set_original("mac_hdd"); SOFTWARE_LIST(config, "cd_list").set_original("mac_cdrom").set_filter("MC68040"); @@ -105,7 +99,7 @@ f108_device::f108_device(const machine_config &mconfig, const char *tag, device_ m_primetimeii(*this, finder_base::DUMMY_TAG), m_ata(*this, "ata"), m_scsibus(*this, "scsi"), - m_ncr1(*this, "scsi:7:ncr53c96"), + m_ncr1(*this, "ncr53c96"), m_scc(*this, "scc"), m_rom(*this, finder_base::DUMMY_TAG), m_ata_irq(*this), diff --git a/src/mame/apple/f108.h b/src/mame/apple/f108.h index 557519325cf..860603d132e 100644 --- a/src/mame/apple/f108.h +++ b/src/mame/apple/f108.h @@ -29,7 +29,11 @@ public: virtual void map(address_map &map) ATTR_COLD; template void set_maincpu_tag(T &&... args) { m_maincpu.set_tag(std::forward(args)...); } - template void set_primetimeii_tag(T &&... args) { m_primetimeii.set_tag(std::forward(args)...); } + template void set_primetimeii_tag(T &&... args) { + m_primetimeii.set_tag(std::forward(args)...); + m_ncr1.lookup()->irq_handler_cb().set(m_primetimeii, FUNC(primetime_device::scsi_irq_w)); + m_ncr1.lookup()->drq_handler_cb().set(m_primetimeii, FUNC(primetime_device::scsi_drq_w)); + } template void set_rom_tag(T &&... args) { m_rom.set_tag(std::forward(args)...); } void set_ram_info(u32 *ram, u32 size); diff --git a/src/mame/apple/mac128.cpp b/src/mame/apple/mac128.cpp index 8f33d701963..cda2867745c 100644 --- a/src/mame/apple/mac128.cpp +++ b/src/mame/apple/mac128.cpp @@ -147,7 +147,7 @@ public: m_ram(*this, RAM_TAG), m_scsibus(*this, "scsi"), m_scsihelp(*this, "scsihelp"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_iwm(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_mackbd(*this, "kbd"), @@ -1268,11 +1268,11 @@ void mac128_state::macplus(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR5380).machine_config([this](device_t *device) { - ncr5380_device &adapter = downcast(*device); - // The IRQ pin (23) on the NCR5380 is unconnected on the Mac Plus, and will cause it to crash if it is - adapter.drq_handler().set(*this, FUNC(mac128_state::scsi_drq_w)); - }); + + NCR5380(config, m_ncr5380); + m_scsibus->set_external_device(7, m_ncr5380); + // The IRQ pin (23) on the NCR5380 is unconnected on the Mac Plus, and will cause it to crash if it is + m_ncr5380->drq_handler().set(*this, FUNC(mac128_state::scsi_drq_w)); subdevice("flop_mac35_orig")->set_filter("MC68000,macplus"); subdevice("flop_mac35_clean")->set_filter("MC68000,macplus"); @@ -1316,15 +1316,12 @@ void mac128_state::macse(machine_config &config) m_scsihelp->cpu_halt_callback().set_inputline(m_maincpu, INPUT_LINE_HALT); m_scsihelp->timeout_error_callback().set(FUNC(mac128_state::scsi_berr_w)); - subdevice("scsi:7")->set_option_machine_config("ncr5380", [this](device_t *device) { - ncr5380_device &adapter = downcast(*device); - // The INT pin (23) on the NCR5380 is connected to the the GLU PAL16L8 pin 3. - // The VIA PB6 pin is connected to the GLU PAL16L8 pin 2, and the open-collector and /OE - // gated PAL16L8 output pin 14 is wired-OR with the VIA /IRQ pin to the 68K /IPL0 pin. - // This effectively performs a NAND of !(PB6) and INT to produce /SCSIIRQ. - adapter.irq_handler().set(*this, FUNC(mac128_state::scsi_irq_w)); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + // The INT pin (23) on the NCR5380 is connected to the the GLU PAL16L8 pin 3. + // The VIA PB6 pin is connected to the GLU PAL16L8 pin 2, and the open-collector and /OE + // gated PAL16L8 output pin 14 is wired-OR with the VIA /IRQ pin to the 68K /IPL0 pin. + // This effectively performs a NAND of !(PB6) and INT to produce /SCSIIRQ. + m_ncr5380->irq_handler().set(DEVICE_SELF, FUNC(mac128_state::scsi_irq_w)); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); ADBMODEM(config, m_adbmodem, C7M); m_adbmodem->via_clock_callback().set(m_via, FUNC(via6522_device::write_cb1)); @@ -1378,11 +1375,9 @@ void mac128_state::macclasc(machine_config &config) // config.device_remove("pds"); // config.device_remove("sepds"); - NSCSI_CONNECTOR(config.replace(), "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) { - ncr5380_device &adapter = downcast(*device); - adapter.irq_handler().set(*this, FUNC(mac128_state::scsi_irq_w)); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + NCR53C80(config.replace(), m_ncr5380); + m_ncr5380->irq_handler().set(DEVICE_SELF, FUNC(mac128_state::scsi_irq_w)); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); subdevice("flop_mac35_orig")->set_filter("MC68000,macclasc"); subdevice("flop_mac35_clean")->set_filter("MC68000,macclasc"); diff --git a/src/mame/apple/macii.cpp b/src/mame/apple/macii.cpp index 392c6c2773c..aa82b09352a 100644 --- a/src/mame/apple/macii.cpp +++ b/src/mame/apple/macii.cpp @@ -75,7 +75,7 @@ public: m_macadb(*this, "macadb"), m_ram(*this, RAM_TAG), m_scc(*this, "scc"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), @@ -956,7 +956,7 @@ void macii_state::macii(machine_config &config) rs232b.dcd_handler().set(m_scc, FUNC(z80scc_device::dcdb_w)); rs232b.cts_handler().set(m_scc, FUNC(z80scc_device::ctsb_w)); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -967,11 +967,10 @@ void macii_state::macii(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) - { - ncr53c80_device &adapter = downcast(*device); - adapter.irq_handler().set(*this, FUNC(macii_state::scsi_irq)); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); }); + NCR53C80(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set(DEVICE_SELF, FUNC(macii_state::scsi_irq)); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/maciici.cpp b/src/mame/apple/maciici.cpp index 54a85a0ca7f..3f750c24965 100644 --- a/src/mame/apple/maciici.cpp +++ b/src/mame/apple/maciici.cpp @@ -62,7 +62,7 @@ public: m_adbmodem(*this, "adbmodem"), m_asc(*this, "asc"), m_scsibus1(*this, "scsi"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), @@ -562,7 +562,7 @@ void maciici_state::maciixi_base(machine_config &config) m_via1->cb2_handler().set(FUNC(maciici_state::via_out_cb2)); m_via1->irq_handler().set(FUNC(maciici_state::via_irq)); - NSCSI_BUS(config, "scsi"); + NSCSI_BUS(config, m_scsibus1); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -575,10 +575,9 @@ void maciici_state::maciixi_base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) - { - ncr53c80_device &adapter = downcast(*device); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); }); + NCR53C80(config, m_ncr5380); + m_scsibus1->set_external_device(7, m_ncr5380); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/maciivx.cpp b/src/mame/apple/maciivx.cpp index f7f2366d970..34faac2bd5e 100644 --- a/src/mame/apple/maciivx.cpp +++ b/src/mame/apple/maciivx.cpp @@ -64,7 +64,7 @@ public: m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_scsibus1(*this, "scsi"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_scc(*this, "scc"), m_egret(*this, "egret"), @@ -316,7 +316,7 @@ void maciivx_state::maciiv_base(machine_config &config) m_ram->set_default_size("4M"); m_ram->set_extra_options("8M,16M,32M,36M,48M,64M,68M"); - NSCSI_BUS(config, "scsi"); + NSCSI_BUS(config, m_scsibus1); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -329,11 +329,10 @@ void maciivx_state::maciiv_base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) - { - ncr53c80_device &adapter = downcast(*device); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + + NCR53C80(config, m_ncr5380); + m_scsibus1->set_external_device(7, m_ncr5380); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/maclc.cpp b/src/mame/apple/maclc.cpp index 2b6e3dcb7b4..b056616dc84 100644 --- a/src/mame/apple/maclc.cpp +++ b/src/mame/apple/maclc.cpp @@ -71,7 +71,7 @@ public: m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_scsibus1(*this, "scsi"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_scc(*this, "scc"), m_egret(*this, "egret"), @@ -345,7 +345,7 @@ void maclc_state::maclc_base(machine_config &config) RAM(config, m_ram); - NSCSI_BUS(config, "scsi"); + NSCSI_BUS(config, m_scsibus1); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -358,11 +358,10 @@ void maclc_state::maclc_base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) - { - ncr53c80_device &adapter = downcast(*device); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + + NCR53C80(config, m_ncr5380); + m_scsibus1->set_external_device(7, m_ncr5380); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/maclc3.cpp b/src/mame/apple/maclc3.cpp index e1480cc7b70..bb798e5588a 100644 --- a/src/mame/apple/maclc3.cpp +++ b/src/mame/apple/maclc3.cpp @@ -62,7 +62,7 @@ public: m_dfac2(*this, "dfac2"), m_omega(*this, "omega"), m_scsibus1(*this, "scsi"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_scc(*this, "scc"), m_egret(*this, "egret"), @@ -265,7 +265,7 @@ void macvail_state::maclc3_base(machine_config &config) m_ram->set_default_size("4M"); m_ram->set_extra_options("8M,16M,32M,48M,64M,80M"); - NSCSI_BUS(config, "scsi"); + NSCSI_BUS(config, m_scsibus1); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -278,11 +278,9 @@ void macvail_state::maclc3_base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) - { - ncr53c80_device &adapter = downcast(*device); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + NCR53C80(config, m_ncr5380); + m_scsibus1->set_external_device(7, m_ncr5380); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/macpdm.cpp b/src/mame/apple/macpdm.cpp index d2aa88af14e..02e310c183f 100644 --- a/src/mame/apple/macpdm.cpp +++ b/src/mame/apple/macpdm.cpp @@ -234,7 +234,7 @@ macpdm_state::macpdm_state(const machine_config &mconfig, device_type type, cons m_ram(*this, RAM_TAG), m_scc(*this, "scc"), m_scsibus(*this, "scsi"), - m_ncr53c94(*this, "scsi:7:ncr53c94"), + m_ncr53c94(*this, "ncr53c94"), m_fdc(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_video(*this, "video"), @@ -1193,15 +1193,12 @@ void macpdm_state::macpdm(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c94", NCR53C94).machine_config( - [this] (device_t *device) - { - auto &ctrl = downcast(*device); - ctrl.set_clock(ENET_CLOCK/2); - ctrl.set_busmd(ncr53c94_device::BUSMD_3); - ctrl.drq_handler_cb().set(*this, FUNC(macpdm_state::scsi_drq)); - ctrl.irq_handler_cb().set(*this, FUNC(macpdm_state::scsi_irq)); - }); + + NCR53C94(config, m_ncr53c94, ENET_CLOCK/2); + m_scsibus->set_external_device(7, m_ncr53c94); + m_ncr53c94->set_busmd(ncr53c94_device::BUSMD_3); + m_ncr53c94->drq_handler_cb().set(DEVICE_SELF, FUNC(macpdm_state::scsi_drq)); + m_ncr53c94->irq_handler_cb().set(DEVICE_SELF, FUNC(macpdm_state::scsi_irq)); SOFTWARE_LIST(config, "flop_mac35_orig").set_original("mac_flop_orig"); SOFTWARE_LIST(config, "flop_mac35_clean").set_original("mac_flop_clcracked"); diff --git a/src/mame/apple/macprtb.cpp b/src/mame/apple/macprtb.cpp index f19d1c96dcb..2b51520ab4f 100644 --- a/src/mame/apple/macprtb.cpp +++ b/src/mame/apple/macprtb.cpp @@ -128,7 +128,7 @@ public: m_pmu(*this, "pmu"), m_via1(*this, "via1"), m_macadb(*this, "macadb"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_ram(*this, RAM_TAG), m_swim(*this, "fdc"), @@ -746,7 +746,7 @@ void macportable_state::macprtb(machine_config &config) applefdintf_device::add_35_hd(config, m_floppy[0]); applefdintf_device::add_35_nc(config, m_floppy[1]); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -759,12 +759,12 @@ void macportable_state::macprtb(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) { - ncr53c80_device &adapter = downcast(*device); - adapter.irq_handler().set(m_via1, FUNC(r65c22_device::write_cb2)); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - adapter.drq_handler().append(m_via1, FUNC(r65c22_device::write_ca1)); - }); + + NCR53C80(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set(m_via1, FUNC(r65c22_device::write_cb2)); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); + m_ncr5380->drq_handler().append(m_via1, FUNC(r65c22_device::write_ca1)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/macpwrbk030.cpp b/src/mame/apple/macpwrbk030.cpp index 79b7d104fee..b5272e72e27 100644 --- a/src/mame/apple/macpwrbk030.cpp +++ b/src/mame/apple/macpwrbk030.cpp @@ -167,7 +167,7 @@ public: m_via1(*this, "via1"), m_pseudovia(*this, "via2"), m_macadb(*this, "macadb"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_ram(*this, RAM_TAG), m_swim(*this, "fdc"), @@ -1294,7 +1294,7 @@ void macpb030_state::macpb140(machine_config &config) applefdintf_device::add_35_hd(config, m_floppy[0]); applefdintf_device::add_35_nc(config, m_floppy[1]); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -1307,11 +1307,11 @@ void macpb030_state::macpb140(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) { - ncr53c80_device &adapter = downcast(*device); - adapter.irq_handler().set(m_pseudovia, FUNC(pseudovia_device::scsi_irq_w)); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + + NCR53C80(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set(m_pseudovia, FUNC(pseudovia_device::scsi_irq_w)); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/macpwrbkmsc.cpp b/src/mame/apple/macpwrbkmsc.cpp index 29452e9f064..e37fc3b0fc5 100644 --- a/src/mame/apple/macpwrbkmsc.cpp +++ b/src/mame/apple/macpwrbkmsc.cpp @@ -106,7 +106,7 @@ public: m_pmu(*this, "pge"), m_msc(*this, "msc"), m_dfac(*this, "dfac"), - m_ncr5380(*this, "scsi:7:ncr5380"), + m_ncr5380(*this, "ncr5380"), m_scsihelp(*this, "scsihelp"), m_ram(*this, RAM_TAG), m_gsc(*this, "gsc"), @@ -815,7 +815,7 @@ void macpbmsc_state::macpd210(machine_config &config) GSC(config, m_gsc, 31.3344_MHz_XTAL); m_gsc->set_panel_id(6); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", mac_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", mac_scsi_devices, nullptr); @@ -828,11 +828,11 @@ void macpbmsc_state::macpd210(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) { - ncr53c80_device &adapter = downcast(*device); - adapter.irq_handler().set(m_msc, FUNC(msc_device::scsi_irq_w)); - adapter.drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); - }); + + NCR53C80(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set(m_msc, FUNC(msc_device::scsi_irq_w)); + m_ncr5380->drq_handler().set(m_scsihelp, FUNC(mac_scsi_helper_device::drq_w)); MAC_SCSI_HELPER(config, m_scsihelp); m_scsihelp->scsi_read_callback().set(m_ncr5380, FUNC(ncr53c80_device::read)); diff --git a/src/mame/apple/macquadra605.cpp b/src/mame/apple/macquadra605.cpp index 235e709d89d..185dc1d91e4 100644 --- a/src/mame/apple/macquadra605.cpp +++ b/src/mame/apple/macquadra605.cpp @@ -58,7 +58,7 @@ public: m_scc(*this, "scc"), m_ram(*this, RAM_TAG), m_scsibus(*this, "scsi"), - m_ncr1(*this, "scsi:7:ncr53c96") + m_ncr1(*this, "ncr53c96") { } @@ -166,7 +166,7 @@ void quadra605_state::macqd605(machine_config &config) PRIMETIME(config, m_primetime, 25_MHz_XTAL); m_primetime->set_maincpu_tag("maincpu"); - m_primetime->set_scsi_tag("scsi:7:ncr53c96"); + m_primetime->set_scsi_tag(m_ncr1); SCC85C30(config, m_scc, C7M); m_scc->configure_channels(3'686'400, 3'686'400, 3'686'400, 3'686'400); @@ -198,15 +198,12 @@ void quadra605_state::macqd605(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c96", NCR53C96).clock(40_MHz_XTAL).machine_config( - [this] (device_t *device) - { - ncr53c96_device &adapter = downcast(*device); - adapter.set_busmd(ncr53c96_device::BUSMD_1); - adapter.irq_handler_cb().set(m_primetime, FUNC(primetime_device::scsi_irq_w)); - adapter.drq_handler_cb().set(m_primetime, FUNC(primetime_device::scsi_drq_w)); - }); + NCR53C96(config, m_ncr1, 40_MHz_XTAL); + m_scsibus->set_external_device(7, m_ncr1); + m_ncr1->set_busmd(ncr53c96_device::BUSMD_1); + m_ncr1->irq_handler_cb().set(m_primetime, FUNC(primetime_device::scsi_irq_w)); + m_ncr1->drq_handler_cb().set(m_primetime, FUNC(primetime_device::scsi_drq_w)); MACADB(config, m_macadb, C15M); diff --git a/src/mame/apple/macquadra630.cpp b/src/mame/apple/macquadra630.cpp index 6799ed79c23..19d3e71cd51 100644 --- a/src/mame/apple/macquadra630.cpp +++ b/src/mame/apple/macquadra630.cpp @@ -166,7 +166,7 @@ void quadra630_state::macqd630(machine_config &config) PRIMETIMEII(config, m_primetimeii, 33_MHz_XTAL); m_primetimeii->set_maincpu_tag("maincpu"); - m_primetimeii->set_scsi_tag("f108:scsi:7:ncr53c96"); + m_primetimeii->set_scsi_tag("f108:ncr53c96"); VALKYRIE(config, m_video, C32M); m_video->write_irq().set(m_primetimeii, FUNC(primetime_device::via2_irq_w<0x40>)); diff --git a/src/mame/apple/macquadra700.cpp b/src/mame/apple/macquadra700.cpp index 2a9e0106357..20e460ba0fe 100644 --- a/src/mame/apple/macquadra700.cpp +++ b/src/mame/apple/macquadra700.cpp @@ -70,7 +70,7 @@ public: m_swim(*this, "fdc"), m_floppy(*this, "fdc:%d", 0U), m_scsibus1(*this, "scsi"), - m_ncr1(*this, "scsi:7:ncr53c96"), + m_ncr1(*this, "ncr53c96"), m_sonic(*this, "sonic"), m_dafb(*this, "dafb"), m_easc(*this, "easc"), @@ -187,7 +187,7 @@ public: m_swimpic(*this, "swimpic"), m_egret(*this, "egret"), m_scsibus2(*this, "scsi2"), - m_ncr2(*this, "scsi2:7:ncr53c96"), + m_ncr2(*this, "ncr53c96_2"), m_adb_in(0) { } @@ -767,13 +767,12 @@ void eclipse_state::via2_out_b_q900(u8 data) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c96", NCR53C96).clock(50_MHz_XTAL / 2).machine_config([this](device_t *device) - { - ncr53c96_device &adapter = downcast(*device); - adapter.set_busmd(ncr53c96_device::BUSMD_1); - adapter.irq_handler_cb().set(m_via2, FUNC(via6522_device::write_cb2)).invert(); - adapter.drq_handler_cb().set(m_dafb, FUNC(dafb_device::turboscsi_drq_w<0>)); }); + NCR53C96(config, m_ncr1, 50_MHz_XTAL / 2); + m_scsibus1->set_external_device(7, m_ncr1); + m_ncr1->set_busmd(ncr53c96_device::BUSMD_1); + m_ncr1->irq_handler_cb().set(m_via2, FUNC(via6522_device::write_cb2)).invert(); + m_ncr1->drq_handler_cb().set(m_dafb, FUNC(dafb_device::turboscsi_drq_w<0>)); DP83932C(config, m_sonic, 40_MHz_XTAL / 2); // clock is C20M on the schematics m_sonic->set_bus(m_maincpu, 0); @@ -904,13 +903,12 @@ void eclipse_state::via2_out_b_q900(u8 data) NSCSI_CONNECTOR(config, "scsi2:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi2:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi2:6", mac_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi2:7").option_set("ncr53c96", NCR53C96).clock(50_MHz_XTAL / 2).machine_config([this](device_t *device) - { - ncr53c96_device &adapter = downcast(*device); - adapter.set_busmd(ncr53c96_device::BUSMD_1); - adapter.irq_handler_cb().append(m_via2, FUNC(via6522_device::write_cb2)).invert(); - adapter.drq_handler_cb().set(m_dafb, FUNC(dafb_device::turboscsi_drq_w<1>)); }); + NCR53C96(config, m_ncr2, 50_MHz_XTAL / 2); + m_scsibus2->set_external_device(7, m_ncr2); + m_ncr2->set_busmd(ncr53c96_device::BUSMD_1); + m_ncr2->irq_handler_cb().append(m_via2, FUNC(via6522_device::write_cb2)).invert(); + m_ncr2->drq_handler_cb().set(m_dafb, FUNC(dafb_device::turboscsi_drq_w<1>)); // 900 and 950 are 5-slot machines, so add the other 3 NUBUS_SLOT(config, "nba", "nubus", mac_nubus_cards, nullptr); diff --git a/src/mame/apple/macquadra800.cpp b/src/mame/apple/macquadra800.cpp index 2acbe69b1b5..4a2580712ed 100644 --- a/src/mame/apple/macquadra800.cpp +++ b/src/mame/apple/macquadra800.cpp @@ -61,7 +61,7 @@ public: m_scc(*this, "scc"), m_ram(*this, RAM_TAG), m_scsibus(*this, "scsi"), - m_ncr1(*this, "scsi:7:ncr53c96"), + m_ncr1(*this, "ncr53c96"), m_sonic(*this, "sonic") { } @@ -181,13 +181,13 @@ void quadra800_state::macqd800(machine_config &config) m_maincpu->set_dasm_override(std::function(&mac68k_dasm_override), "mac68k_dasm_override"); DJMEMC(config, m_djmemc, 33_MHz_XTAL); - m_djmemc->set_maincpu_tag("maincpu"); + m_djmemc->set_maincpu_tag(m_maincpu); m_djmemc->set_rom_tag("bootrom"); m_djmemc->write_irq().set(m_iosb, FUNC(iosb_device::via2_irq_w<0x40>)); IOSB(config, m_iosb, 33_MHz_XTAL); - m_iosb->set_maincpu_tag("maincpu"); - m_iosb->set_scsi_tag("scsi:7:ncr53c96"); + m_iosb->set_maincpu_tag(m_maincpu); + m_iosb->set_scsi_tag(m_ncr1); m_iosb->write_adb_st().set(m_adbmodem, FUNC(adbmodem_device::set_via_state)); // Quadra 800 ID is 0x12 @@ -231,15 +231,11 @@ void quadra800_state::macqd800(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c96", NCR53C96).clock(40_MHz_XTAL).machine_config( - [this] (device_t *device) - { - ncr53c96_device &adapter = downcast(*device); - - adapter.set_busmd(ncr53c96_device::BUSMD_1); - adapter.irq_handler_cb().set(m_iosb, FUNC(iosb_device::scsi_irq_w)); - adapter.drq_handler_cb().set(m_iosb, FUNC(iosb_device::scsi_drq_w)); - }); + NCR53C96(config, m_ncr1, 40_MHz_XTAL); + m_scsibus->set_external_device(7, m_ncr1); + m_ncr1->set_busmd(ncr53c96_device::BUSMD_1); + m_ncr1->irq_handler_cb().set(m_iosb, FUNC(iosb_device::scsi_irq_w)); + m_ncr1->drq_handler_cb().set(m_iosb, FUNC(iosb_device::scsi_drq_w)); DP83932C(config, m_sonic, 40_MHz_XTAL / 2); // clock is C20M on the schematics m_sonic->set_bus(m_maincpu, 0); diff --git a/src/mame/apple/scsidma.cpp b/src/mame/apple/scsidma.cpp index a73d1fbf1fa..5bb11d30f32 100644 --- a/src/mame/apple/scsidma.cpp +++ b/src/mame/apple/scsidma.cpp @@ -61,19 +61,18 @@ void scsidma_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", mac_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", mac_scsi_devices, "harddisk"); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c80", NCR53C80).machine_config([this](device_t *device) - { - ncr5380_device &adapter = downcast(*device); - adapter.irq_handler().set(*this, FUNC(scsidma_device::scsi_irq_w)); - adapter.drq_handler().set(*this, FUNC(scsidma_device::scsi_drq_w)); - }); + + NCR53C80(config, m_ncr); + m_scsibus->set_external_device(7, m_ncr); + m_ncr->irq_handler().set(DEVICE_SELF, FUNC(scsidma_device::scsi_irq_w)); + m_ncr->drq_handler().set(DEVICE_SELF, FUNC(scsidma_device::scsi_drq_w)); } scsidma_device::scsidma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, SCSIDMA, tag, owner, clock), m_maincpu(*this, finder_base::DUMMY_TAG), m_scsibus(*this, "scsi"), - m_ncr(*this, "scsi:7:ncr53c80"), + m_ncr(*this, "ncr53c80"), m_irq(*this), m_scsi_irq(0), m_control(0), diff --git a/src/mame/bfm/bfm_cobra3.cpp b/src/mame/bfm/bfm_cobra3.cpp index 7092809f570..ed5eac48bfb 100644 --- a/src/mame/bfm/bfm_cobra3.cpp +++ b/src/mame/bfm/bfm_cobra3.cpp @@ -43,7 +43,7 @@ public: m_meters(*this, "meters"), m_lamps(*this, "lamp%u", 0U), m_scsibus(*this, "scsi"), - m_scsic(*this, "scsi:6:ncr5380"), + m_scsic(*this, "ncr5380"), m_watchdog(*this, "watchdog") { } @@ -81,7 +81,6 @@ protected: uint8_t m_volume; virtual void machine_start() override ATTR_COLD; - static void scsi_devices(device_slot_interface &device); void dma1_drq(int state); void scc66470_map(address_map &map); void scc66470_irq(int state); @@ -379,12 +378,6 @@ void bfm_cobra3_state::machine_start() } -static void cobra_scsi_devices(device_slot_interface &device) -{ - device.option_add("cdrom", NSCSI_CDROM); - device.option_add_internal("ncr53c80", NCR53C80); -} - void bfm_cobra3_state::dma1_drq(int state) { // m_maincpu->dma_dreq1_w(state); @@ -487,15 +480,13 @@ void bfm_cobra3_state::bfm_cobra3(machine_config &config) m_scc66470->set_screen("screen"); m_scc66470->irq().set(FUNC(bfm_cobra3_state::scc66470_irq)); - NSCSI_BUS(config, m_scsibus); + auto &scsi(NSCSI_BUS(config, m_scsibus)); + auto &cdrom(NSCSI_CDROM(config, "cdrom")); + scsi.set_external_device(2, cdrom); - NSCSI_CONNECTOR(config, "scsi:2", cobra_scsi_devices, "cdrom"); - NSCSI_CONNECTOR(config, "scsi:6").option_set("ncr5380", NCR5380).machine_config( - [this] (device_t *device) - { - ncr53c80_device &adapter = downcast(*device); - adapter.drq_handler().set(*this, FUNC(bfm_cobra3_state::dma1_drq)); - }); + NCR5380(config, m_scsic); + scsi.set_external_device(6, m_scsic); + m_scsic->drq_handler().set(DEVICE_SELF, FUNC(bfm_cobra3_state::dma1_drq)); WATCHDOG_TIMER(config, "watchdog").set_time(PERIOD_OF_555_MONOSTABLE(120000,100e-9)); //TODO: Check timings METERS(config, m_meters, 0).set_number(4); diff --git a/src/mame/dec/kn02.cpp b/src/mame/dec/kn02.cpp index 0d5ae71ccf6..43eeaf50e82 100644 --- a/src/mame/dec/kn02.cpp +++ b/src/mame/dec/kn02.cpp @@ -82,7 +82,7 @@ public: , m_ioga(*this, "ioga") , m_rtc(*this, "rtc") , m_scc(*this, "scc%u", 0U) - , m_asc(*this, "scsi:7:asc") + , m_asc(*this, "asc") , m_vrom(*this, "gfx") , m_bt459(*this, "bt459") , m_lance(*this, "am79c90") @@ -276,7 +276,7 @@ void kn02ba_state::kn02ba(machine_config &config, u32 clock) rs232b.dcd_handler().set(m_scc[0], FUNC(z80scc_device::dcdb_w)); rs232b.cts_handler().set(m_scc[0], FUNC(z80scc_device::ctsb_w)); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", dec_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", dec_scsi_devices, "cdrom"); NSCSI_CONNECTOR(config, "scsi:2", dec_scsi_devices, nullptr); @@ -284,13 +284,9 @@ void kn02ba_state::kn02ba(machine_config &config, u32 clock) NSCSI_CONNECTOR(config, "scsi:4", dec_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", dec_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", dec_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("asc", NCR53C94).clock(10_MHz_XTAL).machine_config( - [this](device_t *device) - { - ncr53c94_device &asc = downcast(*device); - - asc.irq_handler_cb().set_inputline(m_cpu, INPUT_LINE_IRQ0); - }); + NCR53C94(config, m_asc, 10_MHz_XTAL); + scsi.set_external_device(7, m_asc); + m_asc->irq_handler_cb().set_inputline(m_cpu, INPUT_LINE_IRQ0); } static INPUT_PORTS_START(kn02ba) diff --git a/src/mame/emusys/emax.cpp b/src/mame/emusys/emax.cpp index 5642e0a75e3..05d4aeb4fdf 100644 --- a/src/mame/emusys/emax.cpp +++ b/src/mame/emusys/emax.cpp @@ -29,7 +29,7 @@ public: , m_maincpu(*this, "maincpu") , m_ctc(*this, "ctc") , m_fdc(*this, "fdc") - , m_hdc(*this, "scsi:7:hdc") + , m_hdc(*this, "hdc") , m_lcdc(*this, "lcdc") { } @@ -188,7 +188,7 @@ void emax_state::palette_init(palette_device &palette) void emax_state::scsihd(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -196,7 +196,9 @@ void emax_state::scsihd(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, "harddisk", false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("hdc", NCR5380); + + NCR5380(config, m_hdc); + scsi.set_external_device(7, m_hdc); } void emax_state::emax(machine_config &config) diff --git a/src/mame/emusys/emu3.cpp b/src/mame/emusys/emu3.cpp index ad42a92b967..309d84b0353 100644 --- a/src/mame/emusys/emu3.cpp +++ b/src/mame/emusys/emu3.cpp @@ -51,7 +51,7 @@ public: , m_lcdc(*this, "lcdc") , m_fdc(*this, "fdc") , m_fdd(*this, "fdc:0:35dd") - , m_hdc(*this, "scsi:0:ncr5380") + , m_hdc(*this, "ncr5380") , m_pit(*this, "pit") , m_scc(*this, "scc") , m_ddt(*this, "ddt") @@ -229,16 +229,12 @@ void emu3_state::emu3(machine_config &config) //pit.out_handler<2>().set(); // -SMPTIME // scsi bus and devices - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); // scsi host adapter - NSCSI_CONNECTOR(config, "scsi:0").option_set("ncr5380", NCR5380).machine_config( - [this](device_t *device) - { - ncr5380_device &adapter = downcast(*device); - - adapter.irq_handler().set(*this, FUNC(emu3_state::irq_w)); - }); + NCR5380(config, m_hdc); + scsi.set_external_device(0, m_hdc); + m_hdc->irq_handler().set(DEVICE_SELF, FUNC(emu3_state::irq_w)); NSCSI_CONNECTOR(config, "scsi:1", emu_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:2", emu_scsi_devices, nullptr); diff --git a/src/mame/homebrew/pc532.cpp b/src/mame/homebrew/pc532.cpp index dbeba6f82aa..213a9f7894c 100644 --- a/src/mame/homebrew/pc532.cpp +++ b/src/mame/homebrew/pc532.cpp @@ -49,8 +49,8 @@ public: , m_fpu(*this, "fpu") , m_icu(*this, "icu") , m_rtc(*this, "rtc") - , m_dp8490(*this, "slot:7:dp8490") - , m_aic6250(*this, "scsi:0:aic6250") + , m_dp8490(*this, "dp8490") + , m_aic6250(*this, "aic6250") , m_duart(*this, "duart%u", 0U) , m_serial(*this, "serial%u", 0U) , m_duar(*this, "duar%u", 0U) @@ -311,31 +311,25 @@ void pc532_state::pc532(machine_config &config) DS1216E(config, m_rtc); - NSCSI_BUS(config, "slot"); + auto &slot(NSCSI_BUS(config, "slot")); NSCSI_CONNECTOR(config, "slot:0", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "slot:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "slot:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "slot:3", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "slot:7").option_set("dp8490", DP8490).machine_config( // DP8490V - [this](device_t *device) - { - dp8490_device &dp8490(downcast(*device)); - dp8490.drq_handler().set(*this, FUNC(pc532_state::drq_w)); - dp8490.irq_handler().append(m_icu, FUNC(ns32202_device::ir_w<4>)); - dp8490.irq_handler().append(*this, FUNC(pc532_state::irq_w)); - }); + DP8490(config, m_dp8490); + slot.set_external_device(7, m_dp8490); + m_dp8490->drq_handler().set(DEVICE_SELF, FUNC(pc532_state::drq_w)); + m_dp8490->irq_handler().append(m_icu, FUNC(ns32202_device::ir_w<4>)); + m_dp8490->irq_handler().append(DEVICE_SELF, FUNC(pc532_state::irq_w)); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:0").option_set("aic6250", AIC6250).machine_config( - [this](device_t *device) - { - aic6250_device &aic6250(downcast(*device)); + auto &scsi(NSCSI_BUS(config, "scsi")); + + AIC6250(config, m_aic6250, 20_MHz_XTAL); + scsi.set_external_device(0, m_aic6250); + m_aic6250->int_cb().set(m_icu, FUNC(ns32202_device::ir_w<5>)); + // TODO: drq - aic6250.set_clock(20_MHz_XTAL); - aic6250.int_cb().set(m_icu, FUNC(ns32202_device::ir_w<5>)); - // TODO: drq - }); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false); diff --git a/src/mame/intergraph/interpro.cpp b/src/mame/intergraph/interpro.cpp index d6caf1b25b0..45d7af73674 100644 --- a/src/mame/intergraph/interpro.cpp +++ b/src/mame/intergraph/interpro.cpp @@ -347,7 +347,6 @@ public: void ioga(machine_config &config); void interpro_serial(machine_config &config); void interpro(machine_config &config); - static void interpro_scsi_adapter(device_t *device); static void interpro_cdrom(device_t *device); void interpro_boot_map(address_map &map) ATTR_COLD; void interpro_common_map(address_map &map) ATTR_COLD; @@ -371,7 +370,7 @@ public: : interpro_state(mconfig, type, tag) , m_d_cammu(*this, "cammu_d") , m_i_cammu(*this, "cammu_i") - , m_scsi(*this, "scsi:7:host") + , m_scsi(*this, "host") , m_bus(*this, "slot") { } @@ -439,7 +438,7 @@ public: , m_i_cammu(*this, "cammu_i") , m_kbd_port(*this, "kbd") , m_mse_port(*this, "mse") - , m_scsi(*this, "scsi:7:host") + , m_scsi(*this, "host") , m_bus(*this, "slot") { } @@ -506,7 +505,7 @@ public: sapphire_state(const machine_config &mconfig, device_type type, const char *tag) : interpro_state(mconfig, type, tag) , m_mmu(*this, "cammu") - , m_scsi(*this, "scsi:7:host") + , m_scsi(*this, "host") , m_arbga(*this, "arbga") , m_flash_lsb(*this, "flash_lsb") , m_flash_msb(*this, "flash_msb") @@ -1121,16 +1120,6 @@ static void interpro_scsi_devices(device_slot_interface &device) device.option_add("cdrom", NSCSI_CDROM); } -void interpro_state::interpro_scsi_adapter(device_t *device) -{ - ncr53c90_device &adapter = downcast(*device); - - adapter.set_clock(24_MHz_XTAL); - - adapter.irq_handler_cb().set(":ioga", FUNC(interpro_ioga_device::ir0_w)); - adapter.drq_handler_cb().set(":ioga", FUNC(interpro_ioga_device::drq_scsi)); -} - void interpro_state::interpro_cdrom(device_t *device) { downcast(*device).set_block_size(512); @@ -1144,8 +1133,6 @@ void interpro_state::ioga(machine_config &config) // ioga dma and serial dma channels //m_ioga->dma_r_callback<0>().set(unknown); // plotter - m_ioga->dma_r_callback<1>().set("scsi:7:host", FUNC(ncr53c90a_device::dma_r)); - m_ioga->dma_w_callback<1>().set("scsi:7:host", FUNC(ncr53c90a_device::dma_w)); m_ioga->dma_r_callback<2>().set(m_fdc, FUNC(upd765_family_device::dma_r)); m_ioga->dma_w_callback<2>().set(m_fdc, FUNC(upd765_family_device::dma_w)); m_ioga->serial_dma_r_callback<0>().set(m_scc2, FUNC(z80scc_device::db_r)); @@ -1249,11 +1236,10 @@ void emerald_state::emerald(machine_config &config) interpro_serial(config); // scsi host adapter - nscsi_connector &adapter(NSCSI_CONNECTOR(config, "scsi:7", 0)); - adapter.option_add_internal("host", NCR53C90A); - adapter.set_default_option("host"); - adapter.set_fixed(true); - adapter.set_option_machine_config("host", interpro_scsi_adapter); + NCR53C90A(config, m_scsi, 24_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq_handler_cb().set(m_ioga, FUNC(interpro_ioga_device::ir0_w)); + m_scsi->drq_handler_cb().set(m_ioga, FUNC(interpro_ioga_device::drq_scsi)); // ethernet controller I82586(config, m_eth, 10_MHz_XTAL); @@ -1264,6 +1250,8 @@ void emerald_state::emerald(machine_config &config) EMERALD_IOGA(config, m_ioga, 0); m_ioga->set_memory(m_maincpu, 0); ioga(config); + m_ioga->dma_r_callback<1>().set(m_scsi, FUNC(ncr53c90a_device::dma_r)); + m_ioga->dma_w_callback<1>().set(m_scsi, FUNC(ncr53c90a_device::dma_w)); // srx bus SRX_BUS(config, m_bus, 0); @@ -1323,11 +1311,10 @@ void turquoise_state::turquoise(machine_config &config) m_mse_port->state_func().set(m_ioga, FUNC(interpro_ioga_device::mouse_status_w)); // scsi host adapter - nscsi_connector &adapter(NSCSI_CONNECTOR(config, "scsi:7", 0)); - adapter.option_add_internal("host", NCR53C90A); - adapter.set_default_option("host"); - adapter.set_fixed(true); - adapter.set_option_machine_config("host", interpro_scsi_adapter); + NCR53C90A(config, m_scsi, 24_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq_handler_cb().set(m_ioga, FUNC(interpro_ioga_device::ir0_w)); + m_scsi->drq_handler_cb().set(m_ioga, FUNC(interpro_ioga_device::drq_scsi)); // ethernet controller I82586(config, m_eth, 10_MHz_XTAL); @@ -1338,6 +1325,8 @@ void turquoise_state::turquoise(machine_config &config) TURQUOISE_IOGA(config, m_ioga, 0); m_ioga->set_memory(m_maincpu, 0); ioga(config); + m_ioga->dma_r_callback<1>().set(m_scsi, FUNC(ncr53c90a_device::dma_r)); + m_ioga->dma_w_callback<1>().set(m_scsi, FUNC(ncr53c90a_device::dma_w)); // cbus bus CBUS_BUS(config, m_bus, 0); @@ -1384,11 +1373,10 @@ void sapphire_state::sapphire(machine_config &config) interpro_serial(config); // scsi host adapter - nscsi_connector &adapter(NSCSI_CONNECTOR(config, "scsi:7", 0)); - adapter.option_add_internal("host", NCR53C94); - adapter.set_default_option("host"); - adapter.set_fixed(true); - adapter.set_option_machine_config("host", interpro_scsi_adapter); + NCR53C94(config, m_scsi, 24_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq_handler_cb().set(m_ioga, FUNC(interpro_ioga_device::ir0_w)); + m_scsi->drq_handler_cb().set(m_ioga, FUNC(interpro_ioga_device::drq_scsi)); // ethernet controller I82596_LE16(config, m_eth, 20_MHz_XTAL); @@ -1399,6 +1387,8 @@ void sapphire_state::sapphire(machine_config &config) SAPPHIRE_IOGA(config, m_ioga, 0); m_ioga->set_memory(m_maincpu, 0); ioga(config); + m_ioga->dma_r_callback<1>().set(m_scsi, FUNC(ncr53c94_device::dma_r)); + m_ioga->dma_w_callback<1>().set(m_scsi, FUNC(ncr53c94_device::dma_w)); // flash memory INTEL_28F010(config, m_flash_lsb); diff --git a/src/mame/konami/konamigq.cpp b/src/mame/konami/konamigq.cpp index 9b49d9c1716..a2ca16aaea1 100644 --- a/src/mame/konami/konamigq.cpp +++ b/src/mame/konami/konamigq.cpp @@ -99,7 +99,7 @@ public: m_maincpu(*this, "maincpu"), m_soundcpu(*this, "soundcpu"), m_dasp(*this, "dasp"), - m_ncr53cf96(*this, "scsi:7:ncr53cf96"), + m_ncr53cf96(*this, "ncr53cf96"), m_k056800(*this, "k056800"), m_pcmram(*this, "pcmram"), m_duart(*this, "duart") @@ -366,15 +366,14 @@ void konamigq_state::konamigq(machine_config &config) EEPROM_93C46_16BIT(config, "eeprom").default_data(konamigq_def_eeprom, 128); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:0").option_set("harddisk", NSCSI_HARDDISK); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53cf96", NCR53CF96).clock(32_MHz_XTAL/2).machine_config( - [this] (device_t *device) - { - ncr53cf96_device &adapter = downcast(*device); - adapter.irq_handler_cb().set(":maincpu:irq", FUNC(psxirq_device::intin10)); - adapter.drq_handler_cb().set(*this, FUNC(konamigq_state::scsi_drq)); - }); + auto &scsi(NSCSI_BUS(config, "scsi")); + auto &hd(NSCSI_HARDDISK(config, "harddisk")); + scsi.set_external_device(0, hd); + + NCR53CF96(config, m_ncr53cf96, 32_MHz_XTAL/2); + scsi.set_external_device(7, m_ncr53cf96); + m_ncr53cf96->irq_handler_cb().set(":maincpu:irq", FUNC(psxirq_device::intin10)); + m_ncr53cf96->drq_handler_cb().set(DEVICE_SELF, FUNC(konamigq_state::scsi_drq)); /* video hardware */ CXD8538Q(config, "gpu", XTAL(53'693'175), 0x200000, subdevice("maincpu")).set_screen("screen"); diff --git a/src/mame/konami/konamigv.cpp b/src/mame/konami/konamigv.cpp index 7d99c56fdea..66ce3694764 100644 --- a/src/mame/konami/konamigv.cpp +++ b/src/mame/konami/konamigv.cpp @@ -253,7 +253,7 @@ public: konamigv_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_screen(*this, "screen") - , m_ncr53cf96(*this, "scsi:7:ncr53cf96") + , m_ncr53cf96(*this, "ncr53cf96") , m_btc_trackball(*this, "upd%u", 1) , m_maincpu(*this, "maincpu") , m_duart(*this, "duart") @@ -581,20 +581,16 @@ void konamigv_state::konamigv(machine_config &config) MB89371(config, m_duart, 4_MHz_XTAL); EEPROM_93C46_16BIT(config, "eeprom"); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:4").option_set("cdrom", NSCSI_XM5401).machine_config( - [](device_t *device) - { - device->subdevice("cdda")->add_route(0, "^^speaker", 1.0, 0); - device->subdevice("cdda")->add_route(1, "^^speaker", 1.0, 1); - }); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53cf96", NCR53CF96).clock(32_MHz_XTAL/2).machine_config( - [this](device_t *device) - { - ncr53cf96_device &adapter = downcast(*device); - adapter.irq_handler_cb().set(":maincpu:irq", FUNC(psxirq_device::intin10)); - adapter.drq_handler_cb().set(*this, FUNC(konamigv_state::scsi_drq)); - }); + auto &scsi(NSCSI_BUS(config, "scsi")); + auto &cdrom(NSCSI_XM5401(config, "cdrom")); + scsi.set_external_device(4, cdrom); + cdrom.subdevice("cdda")->add_route(0, ":speaker", 1.0, 0); + cdrom.subdevice("cdda")->add_route(1, ":speaker", 1.0, 1); + + NCR53CF96(config, m_ncr53cf96, 32_MHz_XTAL/2); + scsi.set_external_device(7, m_ncr53cf96); + m_ncr53cf96->irq_handler_cb().set(":maincpu:irq", FUNC(psxirq_device::intin10)); + m_ncr53cf96->drq_handler_cb().set(DEVICE_SELF, FUNC(konamigv_state::scsi_drq)); // video hardware CXD8514Q(config, "gpu", XTAL(53'693'175), 0x100000, subdevice("maincpu")).set_screen("screen"); @@ -1306,7 +1302,7 @@ ROM_START( lacrazyc ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "lacrazyc.25c", 0x000000, 0x000080, CRC(e20e5730) SHA1(066b49236c658a4ef2930f7bacc4b2354dd7f240) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gv027-a1", 0, BAD_DUMP SHA1(840d0d4876cf1b814c9d8db975aa6c92e1fe4039) ) ROM_END @@ -1316,7 +1312,7 @@ ROM_START( susume ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "susume.25c", 0x000000, 0x000080, CRC(52f17df7) SHA1(b8ad7787b0692713439d7d9bebfa0c801c806006) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gv027j1", 0, BAD_DUMP SHA1(e7e6749ac65de7771eb8fed7d5eefaec3f902255) ) ROM_END @@ -1326,7 +1322,7 @@ ROM_START( hyperath ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "hyperath.25c", 0x000000, 0x000080, CRC(20a8c435) SHA1(a0f203a999757fba68b391c525ac4b9684a57ba9) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gv021-j1", 0, SHA1(579442444025b18da658cd6455c51459fbc3de0e) ) ROM_END @@ -1336,7 +1332,7 @@ ROM_START( powyak96 ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "powyak96.25c", 0x000000, 0x000080, CRC(405a7fc9) SHA1(e2d978f49748ba3c4a425188abcd3d272ec23907) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "powyak96", 0, BAD_DUMP SHA1(ebd0ea18ff9ce300ea1e30d66a739a96acfb0621) ) ROM_END @@ -1346,7 +1342,7 @@ ROM_START( weddingr ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "weddingr.25c", 0x000000, 0x000080, CRC(b90509a0) SHA1(41510a0ceded81dcb26a70eba97636d38d3742c3) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "weddingr", 0, BAD_DUMP SHA1(4e7122b191747ab7220fe4ce1b4483d62ab579af) ) ROM_END @@ -1356,7 +1352,7 @@ ROM_START( simpbowl ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "simpbowl.25c", 0x000000, 0x000080, CRC(2c61050c) SHA1(16ae7f81cbe841c429c5c7326cf83e87db1782bf) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "829uaa02", 0, SHA1(2ec4cc608d5582e478ee047b60ccee67b52f060c) ) ROM_END @@ -1366,7 +1362,7 @@ ROM_START( btchamp ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "btchmp.25c", 0x000000, 0x000080, CRC(6d02ea54) SHA1(d3babf481fd89db3aec17f589d0d3d999a2aa6e1) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "btchamp", 0, BAD_DUMP SHA1(c9c858e9034826e1a12c3c003dd068a49a3577e1) ) ROM_END @@ -1377,7 +1373,7 @@ ROM_START( kdeadeye ) ROM_LOAD( "kdeadeye.25c", 0x000000, 0x000080, CRC(3935d2df) SHA1(cbb855c475269077803c380dbc3621e522efe51e) ) // constructed from six reads of the same disc using two drives, 80 sectors have Q subcode CRC errors - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "054uaa01", 0, SHA1(a05079e4e5024ca66b7f6b81de74695d86c62dd8) ) ROM_END @@ -1387,7 +1383,7 @@ ROM_START( nagano98 ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "nagano98.25c", 0x000000, 0x000080, CRC(b64b7451) SHA1(a77a37e0cc580934d1e7e05d523bae0acd2c1480) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "nagano98", 0, BAD_DUMP SHA1(1be7bd4531f249ff2233dd40a206c8d60054a8c6) ) ROM_END @@ -1397,7 +1393,7 @@ ROM_START( naganoj ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "720ja.25c", 0x000000, 0x000080, CRC(34c473ba) SHA1(768225b04a293bdbc114a092d14dee28d52044e9) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "720jaa01", 0, SHA1(437160996551ef4dfca43899d1d14beca62eb4c9) ) ROM_END @@ -1407,7 +1403,7 @@ ROM_START( tmosh ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "tmosh.25c", 0x000000, 0x000080, BAD_DUMP CRC(2f6a27fc) SHA1(4ead9313f07e9bf7aa0272dba59db6b21510e00b) ) // hand crafted - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "673jaa01", 0, SHA1(eaa76073749f9db48c1bee3dff9bea955683c8a8) ) ROM_END @@ -1417,7 +1413,7 @@ ROM_START( tmoshs ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "tmoshs.25c", 0x000000, 0x000080, CRC(e57b833f) SHA1(f18a0974a6be69dc179706643aab837ff61c2738) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "755jaa01", 0, SHA1(fc742a0b763ba38350ba7eb5d775948632aafd9d) ) ROM_END @@ -1427,7 +1423,7 @@ ROM_START( tmoshsp ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "tmoshsp.25c", 0x000000, 0x000080, CRC(af4cdd87) SHA1(97041e287e4c80066043967450779b81b62b2b8e) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "756jab01", 0, SHA1(b2c59b9801debccbbd986728152f314535c67e53) ) ROM_END @@ -1437,7 +1433,7 @@ ROM_START( tmoshspa ) ROM_REGION16_BE( 0x0000080, "eeprom", 0 ) // default EEPROM ROM_LOAD( "tmoshsp.25c", 0x000000, 0x000080, CRC(af4cdd87) SHA1(97041e287e4c80066043967450779b81b62b2b8e) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "756jaa01", 0, BAD_DUMP SHA1(5e6d349ad1a22c0dbb1ec26aa05febc830254339) ) // The CD was damaged ROM_END diff --git a/src/mame/konami/twinkle.cpp b/src/mame/konami/twinkle.cpp index 8b10b04aa7b..d31915d7eb5 100644 --- a/src/mame/konami/twinkle.cpp +++ b/src/mame/konami/twinkle.cpp @@ -303,7 +303,7 @@ public: driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), - m_ncr53cf96(*this, "scsi:7:ncr53cf96"), + m_ncr53cf96(*this, "ncr53cf96"), m_ata(*this, "ata"), m_dpram(*this, "dpram"), m_waveram(*this, "rfsnd"), @@ -1150,20 +1150,15 @@ void twinkle_state::twinkle(machine_config &config) CY7C131(config, m_dpram); // or IDT7130 at some PCBs m_dpram->intl_callback().set_inputline(m_audiocpu, M68K_IRQ_4); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:4").option_set("cdrom", NSCSI_XM5401).machine_config( - [](device_t *device) - { - device->subdevice("cdda")->add_route(0, "^^speaker", 1.0, 0); - device->subdevice("cdda")->add_route(1, "^^speaker", 1.0, 1); - }); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53cf96", NCR53CF96).clock(32_MHz_XTAL/2).machine_config( - [this](device_t *device) - { - ncr53cf96_device &adapter = downcast(*device); - adapter.irq_handler_cb().set(":maincpu:irq", FUNC(psxirq_device::intin10)); - adapter.drq_handler_cb().set(*this, FUNC(twinkle_state::scsi_drq)); - }); + auto &scsi(NSCSI_BUS(config, "scsi")); + auto &cdrom(NSCSI_XM5401(config, "cdrom")); + scsi.set_external_device(4, cdrom); + cdrom.subdevice("cdda")->add_route(0, ":speaker", 1.0, 0); + cdrom.subdevice("cdda")->add_route(1, ":speaker", 1.0, 1); + NCR53CF96(config, m_ncr53cf96, 32_MHz_XTAL/2); + scsi.set_external_device(7, m_ncr53cf96); + m_ncr53cf96->irq_handler_cb().set(":maincpu:irq", FUNC(psxirq_device::intin10)); + m_ncr53cf96->drq_handler_cb().set(DEVICE_SELF, FUNC(twinkle_state::scsi_drq)); ATA_INTERFACE(config, m_ata).options(ata_devices, "hdd", nullptr, true); m_ata->irq_handler().set(FUNC(twinkle_state::spu_ata_irq)); diff --git a/src/mame/korg/korgdss1.cpp b/src/mame/korg/korgdss1.cpp index ba50cdb2827..23145f18397 100644 --- a/src/mame/korg/korgdss1.cpp +++ b/src/mame/korg/korgdss1.cpp @@ -111,7 +111,7 @@ public: korg_dssmsrk_state(const machine_config &mconfig, device_type type, const char *tag) : korg_dss1_state(mconfig, type, tag) , m_msrkcpu(*this, "msrkcpu") - , m_scsic(*this, "scsi:7:scsic") + , m_scsic(*this, "scsic") { } @@ -528,7 +528,7 @@ void korg_dssmsrk_state::dssmsrk(machine_config &config) klm781(config); klm782(config); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -536,11 +536,10 @@ void korg_dssmsrk_state::dssmsrk(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", NCR53C80).machine_config([this] (device_t *device) { - auto &scsic = downcast(*device); // 48-pin DIP - scsic.irq_handler().set_inputline(m_msrkcpu, INPUT_LINE_IRQ4); - scsic.drq_handler().set(m_msrkcpu, FUNC(v40_device::dreq_w<1>)); - }); + NCR53C80(config, m_scsic); + scsi.set_external_device(7, m_scsic); + m_scsic->irq_handler().set_inputline(m_msrkcpu, INPUT_LINE_IRQ4); + m_scsic->drq_handler().set(m_msrkcpu, FUNC(v40_device::dreq_w<1>)); } diff --git a/src/mame/microsoft/jazz.cpp b/src/mame/microsoft/jazz.cpp index c73dde885fc..a6ff17069f7 100644 --- a/src/mame/microsoft/jazz.cpp +++ b/src/mame/microsoft/jazz.cpp @@ -111,7 +111,7 @@ public: , m_vram(*this, "vram") , m_mct_adr(*this, "mct_adr") , m_scsibus(*this, "scsi") - , m_scsi(*this, "scsi:7:ncr53cf94") + , m_scsi(*this, "ncr53cf94") , m_fdc(*this, "fdc") , m_rtc(*this, "rtc") , m_nvram(*this, "nvram") @@ -311,17 +311,12 @@ void jazz_state::jazz(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", jazz_scsi_devices, "cdrom"); // scsi host adapter - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53cf94", NCR53CF94).clock(40000000).machine_config( - [this] (device_t *device) - { - ncr53cf94_device &adapter = downcast(*device); - - adapter.irq_handler_cb().set(m_mct_adr, FUNC(mct_adr_device::irq<5>)); - adapter.drq_handler_cb().set(m_mct_adr, FUNC(mct_adr_device::drq<0>)); - - subdevice(":mct_adr")->dma_r_cb<0>().set(adapter, FUNC(ncr53cf94_device::dma_r)); - subdevice(":mct_adr")->dma_w_cb<0>().set(adapter, FUNC(ncr53cf94_device::dma_w)); - }); + NCR53CF94(config, m_scsi, 40000000); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq_handler_cb().set(m_mct_adr, FUNC(mct_adr_device::irq<5>)); + m_scsi->drq_handler_cb().set(m_mct_adr, FUNC(mct_adr_device::drq<0>)); + m_mct_adr->dma_r_cb<0>().set(m_scsi, FUNC(ncr53cf94_device::dma_r)); + m_mct_adr->dma_w_cb<0>().set(m_scsi, FUNC(ncr53cf94_device::dma_w)); // floppy controller and drive N82077AA(config, m_fdc, 24_MHz_XTAL); diff --git a/src/mame/mips/mips_i2000.cpp b/src/mame/mips/mips_i2000.cpp index 4315165ab4f..49791b146e4 100644 --- a/src/mame/mips/mips_i2000.cpp +++ b/src/mame/mips/mips_i2000.cpp @@ -146,7 +146,7 @@ public: , m_tty(*this, "tty%u", 0U) , m_fdc(*this, "fdc") , m_scsibus(*this, "scsi") - , m_scsi(*this, "scsi:7:aic6250") + , m_scsi(*this, "aic6250") , m_net(*this, "net") , m_buzzer(*this, "buzzer") , m_screen(*this, "screen") @@ -590,14 +590,10 @@ void mips_i2000_state::i2000(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", mips_scsi_devices, nullptr); // scsi host adapter (clock assumed) - NSCSI_CONNECTOR(config, "scsi:7").option_set("aic6250", AIC6250).clock(10_MHz_XTAL).machine_config( - [this](device_t *device) - { - aic6250_device &adapter = downcast(*device); - - adapter.int_cb().set_inputline(m_iop, INPUT_LINE_IRQ7).invert(); - adapter.breq_cb().set(m_iop, FUNC(v50_device::dreq_w<1>)); - }); + AIC6250(config, m_scsi, 10_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->int_cb().set_inputline(m_iop, INPUT_LINE_IRQ7).invert(); + m_scsi->breq_cb().set(m_iop, FUNC(v50_device::dreq_w<1>)); // ethernet AM7990(config, m_net); diff --git a/src/mame/mips/mips_r3030.cpp b/src/mame/mips/mips_r3030.cpp index 5dcae253215..bd86d6a8457 100644 --- a/src/mame/mips/mips_r3030.cpp +++ b/src/mame/mips/mips_r3030.cpp @@ -138,7 +138,7 @@ public: , m_rom(*this, "r3030") , m_rambo(*this, "rambo") , m_scsibus(*this, "scsi") - , m_scsi(*this, "scsi:7:ncr53c94") + , m_scsi(*this, "ncr53c94") , m_net(*this, "net") , m_scc(*this, "scc") , m_tty(*this, "tty%u", 0U) @@ -351,8 +351,8 @@ void mips_r3030_state::r3030(machine_config &config) m_rambo->parity_out().set_inputline(m_cpu, INPUT_LINE_IRQ5); //m_rambo->buzzer_out().set(m_buzzer, FUNC(speaker_sound_device::level_w)); m_rambo->set_ram(m_ram); - m_rambo->dma_r<0>().set("scsi:7:ncr53c94", FUNC(ncr53c94_device::dma16_swap_r)); - m_rambo->dma_w<0>().set("scsi:7:ncr53c94", FUNC(ncr53c94_device::dma16_swap_w)); + m_rambo->dma_r<0>().set(m_scsi, FUNC(ncr53c94_device::dma16_swap_r)); + m_rambo->dma_w<0>().set(m_scsi, FUNC(ncr53c94_device::dma16_swap_w)); // scsi bus and devices NSCSI_BUS(config, m_scsibus); @@ -365,15 +365,11 @@ void mips_r3030_state::r3030(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", mips_scsi_devices, nullptr); // scsi host adapter - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c94", NCR53C94).clock(24_MHz_XTAL).machine_config( - [this](device_t *device) - { - ncr53c94_device &adapter = downcast(*device); - - adapter.set_busmd(ncr53c94_device::busmd_t::BUSMD_1); - adapter.irq_handler_cb().set(*this, FUNC(mips_r3030_state::irq_w)).invert(); - adapter.drq_handler_cb().set(m_rambo, FUNC(mips_rambo_device::drq_w<0>)); - }); + NCR53C94(config, m_scsi, 24_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->set_busmd(ncr53c94_device::busmd_t::BUSMD_1); + m_scsi->irq_handler_cb().set(DEVICE_SELF, FUNC(mips_r3030_state::irq_w)).invert(); + m_scsi->drq_handler_cb().set(m_rambo, FUNC(mips_rambo_device::drq_w<0>)); // ethernet AM7990(config, m_net); diff --git a/src/mame/nec/ews4800.cpp b/src/mame/nec/ews4800.cpp index b6969a17dfd..3279fd40fdd 100644 --- a/src/mame/nec/ews4800.cpp +++ b/src/mame/nec/ews4800.cpp @@ -47,7 +47,7 @@ public: , m_rtc(*this, "rtc") , m_scc(*this, "scc%u", 0U) , m_scsibus(*this, "scsi") - , m_scsi(*this, "scsi:7:ncr53c96") + , m_scsi(*this, "ncr53c96") , m_net(*this, "net") { } @@ -146,15 +146,9 @@ void ews4800_state::ews4800_310(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", ews4800_scsi_devices, nullptr); // scsi host adapter (NCR53C96) - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c96", NCR53C94).clock(24_MHz_XTAL).machine_config( - [](device_t *device) - { - ncr53c94_device &adapter = downcast(*device); - - adapter.set_busmd(ncr53c94_device::busmd_t::BUSMD_1); - //adapter.irq_handler_cb() - //adapter.drq_handler_cb() - }); + NCR53C94(config, m_scsi, 24_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->set_busmd(ncr53c94_device::busmd_t::BUSMD_1); // ethernet AM7990(config, m_net); diff --git a/src/mame/next/next.cpp b/src/mame/next/next.cpp index dbba0b38063..0030a588aec 100644 --- a/src/mame/next/next.cpp +++ b/src/mame/next/next.cpp @@ -1007,16 +1007,6 @@ static void next_scsi_devices(device_slot_interface &device) { device.option_add("cdrom", NSCSI_CDROM); device.option_add("harddisk", NSCSI_HARDDISK); - device.option_add_internal("ncr53c90", NCR53C90); -} - -void next_state::ncr53c90(device_t *device) -{ - ncr53c90_device &adapter = downcast(*device); - - adapter.set_clock(10000000); - adapter.irq_handler_cb().set(*this, FUNC(next_state::scsi_irq)); - adapter.drq_handler_cb().set(*this, FUNC(next_state::scsi_drq)); } void next_state::next_base(machine_config &config) @@ -1031,7 +1021,7 @@ void next_state::next_base(machine_config &config) screen.screen_vblank().set(FUNC(next_state::vblank_w)); // devices - NSCSI_BUS(config, "scsibus"); + NSCSI_BUS(config, scsibus); MCCS1850(config, rtc, XTAL(32'768)); @@ -1050,7 +1040,11 @@ void next_state::next_base(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", next_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:5", next_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:6", next_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:7", next_scsi_devices, "ncr53c90", true).set_option_machine_config("ncr53c90", [this] (device_t *device) { ncr53c90(device); }); + + NCR53C90(config, scsi, 10000000); + scsibus->set_external_device(7, scsi); + scsi->irq_handler_cb().set(DEVICE_SELF, FUNC(next_state::scsi_irq)); + scsi->drq_handler_cb().set(DEVICE_SELF, FUNC(next_state::scsi_drq)); MB8795(config, net, 0); net->tx_irq().set(FUNC(next_state::net_tx_irq)); diff --git a/src/mame/next/next.h b/src/mame/next/next.h index 78c8fd87b2b..c5731948229 100644 --- a/src/mame/next/next.h +++ b/src/mame/next/next.h @@ -29,7 +29,7 @@ public: scc(*this, "scc"), keyboard(*this, "keyboard"), scsibus(*this, "scsibus"), - scsi(*this, "scsibus:7:ncr53c90"), + scsi(*this, "ncr53c90"), net(*this, "net"), mo(*this, "mo"), fdc(*this, "fdc"), @@ -146,7 +146,6 @@ private: void vblank_w(int state); - void ncr53c90(device_t *device); void next_0b_m_mem(address_map &map) ATTR_COLD; void next_0b_m_mo_mem(address_map &map) ATTR_COLD; void next_0b_m_nofdc_mem(address_map &map) ATTR_COLD; diff --git a/src/mame/philips/philipsbo.cpp b/src/mame/philips/philipsbo.cpp index c7f77b9b4b4..0120b8fa70e 100644 --- a/src/mame/philips/philipsbo.cpp +++ b/src/mame/philips/philipsbo.cpp @@ -36,7 +36,7 @@ public: , m_scc(*this, "scc") , m_rs232(*this, "rs232%u", 0U) , m_fdc(*this, "fdc") - , m_hdc(*this, "scsi:7:ncr5380") + , m_hdc(*this, "ncr5380") , m_dmac(*this, "dmac") , m_lance(*this, "lance") , m_main_ram_share(*this, "main_ram") @@ -229,7 +229,7 @@ void pbo_state::pbo(machine_config &config) //m_fdc->drq_wr_callback().set(FUNC(pbo_state::fdc_drq_w)); FLOPPY_CONNECTOR(config, "fdc:0", pbo_floppies, "35dd", floppy_image_device::default_mfm_floppy_formats).enable_sound(false); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", pbo_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", pbo_scsi_devices, nullptr); @@ -239,13 +239,9 @@ void pbo_state::pbo(machine_config &config) NSCSI_CONNECTOR(config, "scsi:5", pbo_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", pbo_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR5380).machine_config( - [this](device_t *device) - { - ncr5380_device &adapter = downcast(*device); - - adapter.irq_handler().set(*this, FUNC(pbo_state::scsi_irq_w)); - }); + NCR5380(config, m_hdc); + scsi.set_external_device(7, m_hdc); + m_hdc->irq_handler().set(DEVICE_SELF, FUNC(pbo_state::scsi_irq_w)); M68010(config, m_netcpu, 20_MHz_XTAL / 2); // Confirmed m_netcpu->set_addrmap(AS_PROGRAM, &pbo_state::net_map); diff --git a/src/mame/sony/news_38xx.cpp b/src/mame/sony/news_38xx.cpp index 14b742b5e5f..528bec5c9e6 100644 --- a/src/mame/sony/news_38xx.cpp +++ b/src/mame/sony/news_38xx.cpp @@ -101,7 +101,7 @@ public: m_net(*this, "net"), m_fdc(*this, "fdc"), m_hid(*this, "hid"), - m_scsi(*this, "scsi%u:7:cxd1180", 0U), + m_scsi(*this, "cxd1180_%u", 0U), m_serial(*this, "serial%u", 0U), m_scsibus(*this, "scsi%u", 0U), m_parallel(*this, "parallel"), @@ -928,18 +928,14 @@ void news_38xx_state::common(machine_config &config) NSCSI_CONNECTOR(config, "scsi0:6", news_scsi_devices, nullptr); // scsi bus 0 host adapter - NSCSI_CONNECTOR(config, "scsi0:7").option_set("cxd1180", CXD1180).machine_config( - [this](device_t *device) { - auto &adapter = downcast(*device); - adapter.set_clock(20_MHz_XTAL / 2); + CXD1180(config, m_scsi[0], 20_MHz_XTAL / 2); + m_scsibus[0]->set_external_device(7, m_scsi[0]); + m_scsi[0]->irq_handler().set(DEVICE_SELF, FUNC(news_38xx_state::irq_w)); + m_scsi[0]->irq_handler().append(m_dma[0], FUNC(dmac_0266_device::eop_w)); + m_scsi[0]->drq_handler().set(m_dma[0], FUNC(dmac_0266_device::req_w)); - adapter.irq_handler().set(*this, FUNC(news_38xx_state::irq_w)); - adapter.irq_handler().append(m_dma[0], FUNC(dmac_0266_device::eop_w)); - adapter.drq_handler().set(m_dma[0], FUNC(dmac_0266_device::req_w)); - - subdevice(":dma0")->dma_r_cb().set(adapter, FUNC(cxd1180_device::dma_r)); - subdevice(":dma0")->dma_w_cb().set(adapter, FUNC(cxd1180_device::dma_w)); - }); + m_dma[0]->dma_r_cb().set(m_scsi[0], FUNC(cxd1180_device::dma_r)); + m_dma[0]->dma_w_cb().set(m_scsi[0], FUNC(cxd1180_device::dma_w)); // scsi bus 1 and devices NSCSI_BUS(config, m_scsibus[1]); @@ -952,18 +948,14 @@ void news_38xx_state::common(machine_config &config) NSCSI_CONNECTOR(config, "scsi1:6", news_scsi_devices, nullptr); // scsi bus 1 host adapter - NSCSI_CONNECTOR(config, "scsi1:7").option_set("cxd1180", CXD1180).machine_config( - [this](device_t *device) { - auto &adapter = downcast(*device); - adapter.set_clock(20_MHz_XTAL / 2); + CXD1180(config, m_scsi[1], 20_MHz_XTAL / 2); + m_scsibus[1]->set_external_device(7, m_scsi[0]); + m_scsi[1]->irq_handler().set(DEVICE_SELF, FUNC(news_38xx_state::irq_w)); + m_scsi[1]->irq_handler().append(m_dma[1], FUNC(dmac_0266_device::eop_w)); + m_scsi[1]->drq_handler().set(m_dma[1], FUNC(dmac_0266_device::req_w)); - adapter.irq_handler().set(*this, FUNC(news_38xx_state::irq_w)); - adapter.irq_handler().append(m_dma[1], FUNC(dmac_0266_device::eop_w)); - adapter.drq_handler().set(m_dma[1], FUNC(dmac_0266_device::req_w)); - - subdevice(":dma1")->dma_r_cb().set(adapter, FUNC(cxd1180_device::dma_r)); - subdevice(":dma1")->dma_w_cb().set(adapter, FUNC(cxd1180_device::dma_w)); - }); + m_dma[1]->dma_r_cb().set(m_scsi[1], FUNC(cxd1180_device::dma_r)); + m_dma[1]->dma_w_cb().set(m_scsi[1], FUNC(cxd1180_device::dma_w)); CENTRONICS(config, m_parallel, centronics_devices, nullptr); // Note: printing works, but I'm not sure how accurate triggering the IRQ on each edge is. diff --git a/src/mame/sony/news_68k.cpp b/src/mame/sony/news_68k.cpp index 9fa32efbb38..552f30ac52f 100644 --- a/src/mame/sony/news_68k.cpp +++ b/src/mame/sony/news_68k.cpp @@ -120,7 +120,7 @@ public: , m_scc(*this, "scc") , m_net(*this, "net") , m_fdc(*this, "fdc") - , m_scsi(*this, "scsi:7:cxd1180") + , m_scsi(*this, "cxd1180") , m_hid(*this, "hid") , m_serial(*this, "serial%u", 0U) , m_irq5(*this, "irq5") @@ -435,7 +435,7 @@ void news_68k_state::common(machine_config &config) FLOPPY_CONNECTOR(config, "fdc:0", "35hd", FLOPPY_35_HD, true, floppy_image_device::default_pc_floppy_formats).enable_sound(false); // scsi bus and devices - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); /* * CDC WREN V HH 94221-5 (5.25" half-height SCSI-1 single-ended) @@ -453,18 +453,13 @@ void news_68k_state::common(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", news_scsi_devices, nullptr); // scsi host adapter - NSCSI_CONNECTOR(config, "scsi:7").option_set("cxd1180", CXD1180).machine_config( - [this](device_t *device) - { - cxd1180_device &adapter = downcast(*device); - - adapter.irq_handler().set(*this, FUNC(news_68k_state::irq_w)); - adapter.irq_handler().append(m_dma, FUNC(dmac_0266_device::eop_w)); - adapter.drq_handler().set(m_dma, FUNC(dmac_0266_device::req_w)); - - subdevice(":dma")->dma_r_cb().set(adapter, FUNC(cxd1180_device::dma_r)); - subdevice(":dma")->dma_w_cb().set(adapter, FUNC(cxd1180_device::dma_w)); - }); + CXD1180(config, m_scsi); + scsi.set_external_device(7, m_scsi); + m_scsi->irq_handler().set(DEVICE_SELF, FUNC(news_68k_state::irq_w)); + m_scsi->irq_handler().append(m_dma, FUNC(dmac_0266_device::eop_w)); + m_scsi->drq_handler().set(m_dma, FUNC(dmac_0266_device::req_w)); + m_dma->dma_r_cb().set(m_scsi, FUNC(cxd1180_device::dma_r)); + m_dma->dma_w_cb().set(m_scsi, FUNC(cxd1180_device::dma_w)); NEWS_HID_HLE(config, m_hid); diff --git a/src/mame/sony/news_68k_iop.cpp b/src/mame/sony/news_68k_iop.cpp index d16e9033925..4905eb5ea6b 100644 --- a/src/mame/sony/news_68k_iop.cpp +++ b/src/mame/sony/news_68k_iop.cpp @@ -125,7 +125,7 @@ namespace m_scc_peripheral(*this, "scc_peripheral"), m_net(*this, "net"), m_fdc(*this, "fdc"), - m_scsi(*this, "scsi:7:am5380"), + m_scsi(*this, "am5380"), m_scsi_dma(*this, "scsi_dma"), m_dip_switch(*this, "FRONT_PANEL"), m_serial(*this, "serial%u", 0U), @@ -1019,7 +1019,7 @@ namespace // Early (pre-OS-3) bootloaders are extremely picky about IDNT data and reported capacity; ensure you are using IDNT data and the matching size reported // from an actual CDC drive if dealing with early versions. // Note: Only the NWS-891 came with a CD-ROM as a default option, others required an external CD-ROM drive - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", news_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", news_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", news_scsi_devices, nullptr); @@ -1029,12 +1029,10 @@ namespace NSCSI_CONNECTOR(config, "scsi:6", news_scsi_devices, nullptr); // AMD Am5380PC SCSI interface - NSCSI_CONNECTOR(config, "scsi:7").option_set("am5380", NCR5380).machine_config([this] (device_t *device) - { - ncr5380_device &adapter = downcast(*device); - adapter.irq_handler().set([this] (int state){ m_scsi_dma->irq_w(state); }); - adapter.drq_handler().set(*this, FUNC(news_iop_state::scsi_drq_handler)); - }); + NCR5380(config, m_scsi); + scsi.set_external_device(7, m_scsi); + m_scsi->irq_handler().set([this] (int state){ m_scsi_dma->irq_w(state); }); + m_scsi->drq_handler().set(DEVICE_SELF, FUNC(news_iop_state::scsi_drq_handler)); // Virtual device for handling SCSI DMA // (workaround for 68k bus access limitiations; normally iopboot's BERR handler would deal with SCSI DMA stuff) diff --git a/src/mame/sun/sun3.cpp b/src/mame/sun/sun3.cpp index af782b9cca8..128a8ec3332 100644 --- a/src/mame/sun/sun3.cpp +++ b/src/mame/sun/sun3.cpp @@ -235,7 +235,7 @@ public: m_maincpu(*this, "maincpu"), m_scc1(*this, SCC1_TAG), m_scc2(*this, SCC2_TAG), - m_sbc(*this, "scsibus:7:sbc"), + m_sbc(*this, "sbc"), m_udc(*this, "udc"), m_p_ram(*this, "p_ram"), m_bw2_vram(*this, "bw2_vram"), @@ -256,8 +256,6 @@ public: void sun3200(machine_config &config); void sun3_50(machine_config &config); - void ncr5380(device_t *device); - protected: virtual void machine_start() override ATTR_COLD; virtual void machine_reset() override ATTR_COLD; @@ -327,13 +325,6 @@ static void sun_cdrom(device_t *device) downcast(*device).set_block_size(512); } -void sun3_state::ncr5380(device_t *device) -{ - devcb_base *devcb; - (void)devcb; -// downcast(*device).drq_handler().set(FUNC(sun3_state::drq_w)); -} - static void scsi_devices(device_slot_interface &device) { device.option_add("cdrom", NSCSI_CDROM); @@ -1073,7 +1064,7 @@ void sun3_state::sun3(machine_config &config) AM79C90(config, m_lance, 10'000'000); // clock is a guess - NSCSI_BUS(config, "scsibus"); + auto &scsi(NSCSI_BUS(config, "scsibus")); NSCSI_CONNECTOR(config, "scsibus:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr); @@ -1081,7 +1072,9 @@ void sun3_state::sun3(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, "tape"); NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom"); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("sbc", NCR5380).machine_config([this] (device_t *device) { ncr5380(device); }); + + NCR5380(config, m_sbc); + scsi.set_external_device(7, m_sbc); AM9516(config, m_udc, 16_MHz_XTAL / 2); } @@ -1179,7 +1172,7 @@ void sun3_state::sun3_50(machine_config &config) rs232b.dcd_handler().set(m_scc2, FUNC(z80scc_device::dcdb_w)); rs232b.cts_handler().set(m_scc2, FUNC(z80scc_device::ctsb_w)); - NSCSI_BUS(config, "scsibus"); + auto &scsi(NSCSI_BUS(config, "scsibus")); NSCSI_CONNECTOR(config, "scsibus:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr); @@ -1187,7 +1180,9 @@ void sun3_state::sun3_50(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, "tape"); NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom"); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("sbc", NCR5380).machine_config([this] (device_t *device) { ncr5380(device); }); + + NCR5380(config, m_sbc); + scsi.set_external_device(7, m_sbc); AM9516(config, m_udc, 16_MHz_XTAL / 2); } diff --git a/src/mame/sun/sun3x.cpp b/src/mame/sun/sun3x.cpp index c438b0cf029..643ae3ee0a1 100644 --- a/src/mame/sun/sun3x.cpp +++ b/src/mame/sun/sun3x.cpp @@ -169,7 +169,7 @@ public: m_maincpu(*this, "maincpu"), m_scc1(*this, SCC1_TAG), m_scc2(*this, SCC2_TAG), - m_esp(*this, "scsibus:7:esp"), + m_esp(*this, "esp"), m_fdc(*this, FDC_TAG), m_floppy_connector(*this, FLOPPY_CONN_TAG), m_p_ram(*this, "p_ram"), @@ -626,7 +626,7 @@ void sun3x_state::sun3_80(machine_config &config) rs232b.dcd_handler().set(m_scc2, FUNC(z80scc_device::dcdb_w)); rs232b.cts_handler().set(m_scc2, FUNC(z80scc_device::ctsb_w)); - NSCSI_BUS(config, "scsibus"); + auto &scsi(NSCSI_BUS(config, "scsibus")); NSCSI_CONNECTOR(config, "scsibus:0", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr); @@ -634,7 +634,9 @@ void sun3x_state::sun3_80(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, "tape"); NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom"); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("esp", NCR53C90).clock(20000000/2); // Emulex 2400138 (68-pin PLCC) + + NCR53C90(config, m_esp, 20000000/2); + scsi.set_external_device(7, m_esp); N82077AA(config, m_fdc, 24000000, n82077aa_device::mode_t::PS2); FLOPPY_CONNECTOR(config, "fdc:0", sun_floppies, "35hd", floppy_image_device::default_pc_floppy_formats); diff --git a/src/mame/sun/sun4.cpp b/src/mame/sun/sun4.cpp index 60182dfbb90..f38705560da 100644 --- a/src/mame/sun/sun4.cpp +++ b/src/mame/sun/sun4.cpp @@ -556,7 +556,7 @@ public: , m_floppy(*this, "fdc:0") , m_lance(*this, "lance") , m_scsibus(*this, "scsibus") - , m_scsi(*this, "scsibus:7:ncr53c90") + , m_scsi(*this, "ncr53c90") , m_type1space(*this, "type1") , m_ram(*this, RAM_TAG) , m_rom(*this, "user1") @@ -599,8 +599,6 @@ protected: void fdc_irq(int state); - void ncr53c90(device_t *device); - void debugger_map(address_map &map) ATTR_COLD; void system_asi_map(address_map &map) ATTR_COLD; void segment_asi_map(address_map &map) ATTR_COLD; @@ -1369,19 +1367,9 @@ static void sun_scsi_devices(device_slot_interface &device) device.option_add("cdrom", NSCSI_CDROM); device.option_add("harddisk", NSCSI_HARDDISK); device.option_add("tape", NSCSI_TAPE); - device.option_add_internal("ncr53c90", NCR53C90); device.set_option_machine_config("cdrom", sun4_cdrom); } -void sun4_base_state::ncr53c90(device_t *device) -{ - ncr53c90_device &adapter = downcast(*device); - - adapter.set_clock(10000000); - adapter.irq_handler_cb().set(*this, FUNC(sun4_base_state::scsi_irq)); - adapter.drq_handler_cb().set(*this, FUNC(sun4_base_state::scsi_drq)); -} - void sun4_base_state::sun4_base(machine_config &config) { RAM(config, m_ram).set_default_size("16M").set_default_value(0x00); @@ -1435,7 +1423,7 @@ void sun4_base_state::sun4_base(machine_config &config) m_rs232[1]->dcd_handler().set(m_scc[1], FUNC(z80scc_device::dcdb_w)); m_rs232[1]->cts_handler().set(m_scc[1], FUNC(z80scc_device::ctsb_w)); - NSCSI_BUS(config, "scsibus"); + NSCSI_BUS(config, m_scsibus); NSCSI_CONNECTOR(config, "scsibus:0", sun_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsibus:1", sun_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:2", sun_scsi_devices, nullptr); @@ -1443,7 +1431,11 @@ void sun4_base_state::sun4_base(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", sun_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:5", sun_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsibus:6", sun_scsi_devices, "cdrom"); - NSCSI_CONNECTOR(config, "scsibus:7", sun_scsi_devices, "ncr53c90", true).set_option_machine_config("ncr53c90", [this] (device_t *device) { ncr53c90(device); }); + + NCR53C90(config, m_scsi, 10000000); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq_handler_cb().set(DEVICE_SELF, FUNC(sun4_base_state::scsi_irq)); + m_scsi->drq_handler_cb().set(DEVICE_SELF, FUNC(sun4_base_state::scsi_drq)); } void sun4_state::sun4(machine_config &config) diff --git a/src/mame/torch/triplex.cpp b/src/mame/torch/triplex.cpp index 988fc855833..8e021fb64b3 100644 --- a/src/mame/torch/triplex.cpp +++ b/src/mame/torch/triplex.cpp @@ -67,7 +67,7 @@ public: , m_vram(*this, "vram", 0x10000, ENDIANNESS_LITTLE) , m_vram_bank(*this, "vram_bank") , m_palette(*this, "palette") - , m_ncr5380(*this, "scsi:7:ncr5380") + , m_ncr5380(*this, "ncr5380") , m_serial_c(*this, "serial_c") { } @@ -316,7 +316,7 @@ void triplex_state::triplex(machine_config &config) lance.dma_in().set([this](offs_t offset) { return m_maincpu->space(AS_PROGRAM).read_word(offset); }); lance.dma_out().set([this](offs_t offset, u16 data, u16 mem_mask) { m_maincpu->space(AS_PROGRAM).write_word(offset, data, mem_mask); }); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk"); // OMTI 5200 (with floppy controller) NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -324,10 +324,11 @@ void triplex_state::triplex(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR5380).machine_config([this](device_t *device) { - downcast(*device).irq_handler().set_inputline(m_maincpu, M68K_IRQ_4); - downcast(*device).drq_handler().set(":dmac", FUNC(hd63450_device::drq0_w)); - }); + + NCR5380(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set_inputline(m_maincpu, M68K_IRQ_4); + m_ncr5380->drq_handler().set(":dmac", FUNC(hd63450_device::drq0_w)); scc8530_device &scc(SCC8530(config, "scc", 4.9152_MHz_XTAL)); scc.out_int_callback().set_inputline(m_maincpu, M68K_IRQ_5); diff --git a/src/mame/trainer/ms68k.cpp b/src/mame/trainer/ms68k.cpp index 85dbb26666b..ff87e90ea5a 100644 --- a/src/mame/trainer/ms68k.cpp +++ b/src/mame/trainer/ms68k.cpp @@ -58,7 +58,7 @@ public: , m_fdc(*this, "fdc") , m_floppy(*this, "fdc:%u", 0) , m_floppy_selected_drive(0) - , m_scsi(*this, "scsibus:7:ncr5380") + , m_scsi(*this, "ncr5380") , m_scsibus(*this, "scsibus") , m_printer_conn(*this, "prn") , m_printer_out(*this, "prn_out") @@ -169,11 +169,11 @@ void ms68k_state::ms68k(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("ncr5380", NCR53C80) - .machine_config([this](device_t *device) { - // SCSI Interrupt = 5 - downcast(*device).irq_handler().set_inputline(m_maincpu, M68K_IRQ_5); - }); + + NCR53C80(config, m_scsi); + m_scsibus->set_external_device(7, m_scsi); + // SCSI Interrupt = 5 + m_scsi->irq_handler().set_inputline(m_maincpu, M68K_IRQ_5); // Set up FDC. From f0339fc366421fff2751c41447eb07308394a245 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 3 Mar 2026 12:27:52 +0100 Subject: [PATCH 116/351] pc/pcipc_via.cpp: fix PCI config space for slots --- src/devices/bus/pci/sis6326.cpp | 10 ++++-- src/devices/bus/pci/trident_4dwavedx.cpp | 42 +++++++++++++++++++++--- src/devices/bus/pci/trident_4dwavedx.h | 6 ++-- src/devices/video/pc_vga_sis.cpp | 3 +- src/devices/video/pc_vga_sis.h | 4 +++ src/mame/misc/startouch.cpp | 8 ++--- src/mame/pc/README.md | 2 +- src/mame/pc/pcipc_via.cpp | 12 ++++--- 8 files changed, 65 insertions(+), 22 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 484b60f0898..5b4b89ebf70 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -65,6 +65,7 @@ void sis6326_pci_device::device_add_mconfig(machine_config &config) m_vga->md20_cb().set_constant(0); m_vga->md21_cb().set_constant(0); m_vga->md23_cb().set_constant(1); + m_vga->md27_cb().set_constant(1); } void sis6326_pci_device::device_start() @@ -82,8 +83,7 @@ void sis6326_pci_device::device_start() // INTA# // TODO: VGA D3/MD27 can strap this to no irq pin - // ls5amvp3 goes N/A in Award Config list, assume it's disabled by default - intr_pin = 0; + intr_pin = 1; } void sis6326_pci_device::device_reset() @@ -356,6 +356,9 @@ uint32_t sis6326_pci_device::GetROP(uint8_t rop, uint32_t src, uint32_t dst, uin case 0x88: // DSa ret = dst & src; break; + case 0xa0: // DPa (win98se help tooltip borders) + ret = dst & pat; + break; case 0xaa: // D ret = dst; break; @@ -515,7 +518,7 @@ void sis6326_pci_device::trigger_2d_command() const u8 dst = m_vga->read_memory(xi + dst_base); const u8 dot = (m_pattern_data[pattern_base] >> (7 - x) & 1); // ROP and pattern depends on pattern - // win98se start menu hovering depends on this + // - win98se start menu hovering const u8 res = GetROP(dot ? m_fg_rop : m_bg_rop, src, dst, dot ? m_fg_color : m_bg_color) & 0xff; m_vga->write_memory(xi + dst_base, res & 0xff); } @@ -574,6 +577,7 @@ void sis6326_agp_device::device_add_mconfig(machine_config &config) m_vga->md20_cb().set_constant(1); m_vga->md21_cb().set_constant(1); m_vga->md23_cb().set_constant(1); + m_vga->md27_cb().set_constant(1); } void sis6326_agp_device::device_reset() diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 4dc92d1968a..03f2cc22eb5 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -7,9 +7,8 @@ Trident 4DWAVE-DX AC'97 v1.x (fixed 48 kHz) TODO: -- win98se throws a BSoD 0e (page fault) on "Trident Legacy Audio" installation; -- non-working in DOS beyond basic PCI identification - i.e. wants SB emulation in MS-DOS 7, in turn can't set proper interrupt line (goes BLASTER=I255) +- Stub-ish, enough to install fine in win98se and nothing else; +- wavetsr.com can't find a free IRQ for SB emulation under DOS; **************************************************************************************************/ @@ -50,7 +49,7 @@ void trident_4dwavedx_device::device_start() // INTA# intr_pin = 1; - intr_line = 0x00; + intr_line = 0x05; // TODO: max_lat = 0x05, min_gnt = 0x02 @@ -94,6 +93,7 @@ u8 trident_4dwavedx_device::capptr_r() void trident_4dwavedx_device::config_map(address_map &map) { pci_card_device::config_map(map); + // DDMA config map(0x40, 0x43).lrw32( NAME([this] (offs_t offset, u32 mem_mask) { @@ -127,6 +127,8 @@ void trident_4dwavedx_device::config_map(address_map &map) , BIT(m_legacy_control, 18) , BIT(m_legacy_control, 17) ); + if (ACCESSING_BITS_0_7) + remap_cb(); }) ); @@ -187,3 +189,35 @@ void trident_4dwavedx_device::io_map(address_map &map) void trident_4dwavedx_device::mmio_map(address_map &map) { } + +void trident_4dwavedx_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) +{ + // TODO: legacy mapping +#if 0 + if (BIT(m_legacy_control, 7)) + { + const u16 mpu401_port = BIT(m_legacy_control, 6) ? 0x0300 : 0x0330; + io_space->install_device(mpu401_port, mpu401_port + 3, *this, &trident_4dwavedx_device::midi_map); + } + + if (BIT(m_legacy_control, 5)) + { + const u16 game_port = BIT(m_legacy_control, 4) ? 0x0208 : 0x0200; + io_space->install_device(game_port, game_port + 7, *this, &trident_4dwavedx_device::game_map); + } + + if (BIT(m_legacy_control, 3)) + { + const u16 fm_port = BIT(m_legacy_control, 2) ? 0x038c : 0x0388; + io_space->install_device(fm_port, fm_port + 3, *this, &trident_4dwavedx_device::fm_map); + } + + if (BIT(m_legacy_control, 1)) + { + const u16 sb_port = BIT(m_legacy_control, 0) ? 0x0240 : 0x0220; + io_space->install_device(sb_port, sb_port + 0xf, *this, &trident_4dwavedx_device::sb_map); + } + +#endif +} diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index a12ce79faa8..f2ca303c68c 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -22,10 +22,8 @@ protected: virtual void device_reset() override; virtual void device_add_mconfig(machine_config &config) override; -// virtual const tiny_rom_entry *device_rom_region() const override; - -// virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, -// uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; virtual void config_map(address_map &map) override; diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index c583ae2f1da..639e42052d7 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -75,6 +75,7 @@ sis6326_vga_device::sis6326_vga_device(const machine_config &mconfig, device_typ , m_md20_cb(*this, 0) , m_md21_cb(*this, 0) , m_md23_cb(*this, 0) + , m_md27_cb(*this, 0) { } @@ -508,7 +509,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) // ---- x--- MD27 INTA# enable // ---- -x-- MD26 BIOS ROM disable // ---- --xx MD25~MD24 - NAME([] () { return (0 << 3); }) + NAME([this] () { return (m_md27_cb() << 3); }) ); map(0x0f, 0x10).lrw8( NAME([this] (offs_t offset) { diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index 200c54f843a..701ca7dcf72 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -26,6 +26,8 @@ public: auto md21_cb() { return m_md21_cb.bind(); } // Enable 64K ROM auto md23_cb() { return m_md23_cb.bind(); } + // Enable INTA# + auto md27_cb() { return m_md27_cb.bind(); } virtual uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) override; @@ -64,6 +66,8 @@ protected: devcb_read_line m_md23_cb; + devcb_read_line m_md27_cb; + u8 m_ramdac_mode = 0; u8 m_ext_sr07; u8 m_crt_cpu_threshold[2]; diff --git a/src/mame/misc/startouch.cpp b/src/mame/misc/startouch.cpp index 54acc453f23..0d3b8bd4792 100644 --- a/src/mame/misc/startouch.cpp +++ b/src/mame/misc/startouch.cpp @@ -157,10 +157,10 @@ void startouch_state::europl01(machine_config &config) PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, nullptr); - PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, nullptr); - PCI_SLOT(config, "pci:2", pci_cards, 14, 1, 2, 3, 0, nullptr); - PCI_SLOT(config, "pci:3", pci_cards, 15, 2, 3, 0, 1, nullptr); - PCI_SLOT(config, "pci:4", pci_cards, 16, 3, 0, 1, 2, "trio64dx"); + PCI_SLOT(config, "pci:1", pci_cards, 8, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:2", pci_cards, 9, 1, 2, 3, 0, nullptr); + PCI_SLOT(config, "pci:3", pci_cards, 10, 2, 3, 0, 1, nullptr); + PCI_SLOT(config, "pci:4", pci_cards, 11, 3, 0, 1, 2, "trio64dx"); // TODO: add Med3931 ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "superio", true).set_option_machine_config("superio", superio_config); diff --git a/src/mame/pc/README.md b/src/mame/pc/README.md index bab0f8ada00..c3aa8f596f7 100644 --- a/src/mame/pc/README.md +++ b/src/mame/pc/README.md @@ -48,4 +48,4 @@ ISA debug port $80, `wpiset 0x80,1,w,1,{printf "%02x",wpdata;g}`. - PCI targets with OHCI (and probably EHCI) may crash at startup: implement USB chipset, requires relocatable BAR that will default to RAM $0 if not implemented; - "Unknown" CPU: r/w the info thru CMOS (Phoenix BIOSes do something similar); - DOS (up to Win98) startup stuck while looping around on clearly incorrect conventional memory opcodes: fix A20, chipset possibly has fast A20 mechanism at I/O $92; - +- Award System Config shows N/A for PCI card IRQs: check PCI config space numbering, use cards with confirmed good line/pin setup. diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index 32b32898635..05d7c195a26 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -14,7 +14,8 @@ * TODO: * - win98se/win98me: resource conflict between ACPI BIOS and AGP card(s), PCI cards works fine. * Bridge memory/io bases not passed properly? - * - win98se: PS/2 keyboard becomes unresponsive after a while; + * - win98se: PS/2 keyboard becomes unresponsive after a while, caused by keyboard irq stuck + * (workaround: open debugger window at I/O $60); * - win98se: ACPI has issues on power off and reboot (workaround: use restart in MSDOS mode); * - freedos13: APMDOS hangs system with JEMMEX preloaded, works when issued standalone; * @@ -143,10 +144,11 @@ void mvp3_state::mvp3(machine_config &config) PCI_SLOT(config, "pci:01.0:0", agp_cards, 0, 0, 1, 2, 3, nullptr); - PCI_SLOT(config, "pci:1", pci_cards, 13, 0, 1, 2, 3, "sis6326_pci"); - PCI_SLOT(config, "pci:2", pci_cards, 14, 1, 2, 3, 0, nullptr); - PCI_SLOT(config, "pci:3", pci_cards, 15, 2, 3, 0, 1, nullptr); - PCI_SLOT(config, "pci:4", pci_cards, 16, 3, 0, 1, 2, nullptr); + // 8~11 is trusted, otherwise BIOS won't map intr_line(s) properly + PCI_SLOT(config, "pci:1", pci_cards, 8, 0, 1, 2, 3, "sis6326_pci"); + PCI_SLOT(config, "pci:2", pci_cards, 9, 1, 2, 3, 0, "4dwavedx"); + PCI_SLOT(config, "pci:3", pci_cards, 10, 2, 3, 0, 1, nullptr); + PCI_SLOT(config, "pci:4", pci_cards, 11, 3, 0, 1, 2, nullptr); ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "it8661f", true).set_option_machine_config("it8661f", ite_superio_config); ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); From 955c2b6c7b806ed3912ed8c348edd6245f9cfbcb Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 3 Mar 2026 12:52:18 +0100 Subject: [PATCH 117/351] bus/pci/sis6326.cpp: shuffle roms a bit --- src/devices/bus/pci/sis6326.cpp | 58 ++++++++++++++++----------------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 5b4b89ebf70..4c86b88a3b4 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -9,15 +9,15 @@ SiS 6326 #include "emu.h" #include "sis6326.h" -#define LOG_WARN (1U << 1) +#define LOG_BLIT (1U << 1) #define LOG_AGP (1U << 2) -#define VERBOSE (LOG_GENERAL | LOG_WARN | LOG_AGP) +#define VERBOSE (LOG_GENERAL | LOG_AGP) //#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" -#define LOGWARN(...) LOGMASKED(LOG_WARN, __VA_ARGS__) +#define LOGBLIT(...) LOGMASKED(LOG_BLIT, __VA_ARGS__) #define LOGAGP(...) LOGMASKED(LOG_AGP, __VA_ARGS__) @@ -45,6 +45,10 @@ ROM_START( sis6326pci ) ROM_SYSTEM_BIOS( 0, "sis", "SiS6326 4MB 1.25" ) ROMX_LOAD( "sis6326_75mhz.vbi", 0x000000, 0x008000, CRC(1c74109d) SHA1(c9180a32e78481c9082ad5bc75082ef4b289ad76), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS( 1, "3dpro", "3DPro 4MB EDO 1.06 (12-18-97)" ) + ROMX_LOAD( "3dpro4mbedo.bin", 0x000000, 0x010000, CRC(f04b374c) SHA1(6eb96f7517df6eb566c615c2ab9ec5567035b6a5), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS( 2, "siso", "SiS6326 4MB 1.21d (08-18-98)" ) + ROMX_LOAD( "4mb_pci.vbi", 0x000000, 0x00c000, CRC(8fca47be) SHA1(7ce995ec0d8b9ac4f0f40ccd0a61d7fc209d313f), ROM_BIOS(2) ) ROM_END const tiny_rom_entry *sis6326_pci_device::device_rom_region() const @@ -406,17 +410,17 @@ void sis6326_pci_device::trigger_2d_command() const std::string src_types[] = { "bgcol", "fgcol", "memory", "CPU" }; // NOTE: pat type 3 may really select Direct Draw mode const std::string pat_types[] = { "bgcol", "fgcol", "pattern", "" }; - LOG("Command: %04x: SRC %s, PAT %s, XY: %d|%d, clip: %d%d\n" + LOGBLIT("Command: %04x: SRC %s, PAT %s, XY: %d|%d, clip: %d%d\n" , m_draw_command, src_types[src_select], pat_types[pat_select] , x_dir, y_dir, clip_enable, clip_external ); if (clip_enable) { - LOG("cliprange X %d %d ~ Y %d %d\n", m_clip_left, m_clip_right, m_clip_top, m_clip_bottom); + LOGBLIT("cliprange X %d %d ~ Y %d %d\n", m_clip_left, m_clip_right, m_clip_top, m_clip_bottom); // (a very unlikely) sanity check if (m_dst_pitch == 0) { - LOG("\tWarning: dst pitch == 0, ignored!\n"); + LOGBLIT("\tWarning: dst pitch == 0, ignored!\n"); return; } } @@ -428,10 +432,10 @@ void sis6326_pci_device::trigger_2d_command() { case 0: { - LOG("\tBitBlt\n"); - LOG("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); - LOG("\tSRC Pitch %d DST Pitch %d Rect %dx%d\n", m_src_pitch, m_dst_pitch, m_rect_width, m_rect_height); - LOG("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); + LOGBLIT("\tBitBlt\n"); + LOGBLIT("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); + LOGBLIT("\tSRC Pitch %d DST Pitch %d Rect %dx%d\n", m_src_pitch, m_dst_pitch, m_rect_width, m_rect_height); + LOGBLIT("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); for (s32 y = 0; y < m_rect_height; y++) { @@ -469,7 +473,7 @@ void sis6326_pci_device::trigger_2d_command() } case 1: { - LOG("\tBitBlt with mask\n"); + LOGBLIT("\tBitBlt with mask\n"); // ... break; } @@ -477,14 +481,14 @@ void sis6326_pci_device::trigger_2d_command() { const bool color_exp = !!BIT(m_draw_command, 12); const bool font_exp = !!BIT(m_draw_command, 13); - LOG("\tColor/Font expansion: Color enhanced %d Font enhanced %d\n", color_exp, font_exp); - LOG("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); - LOG("\tSRC Pitch %d DST Pitch %d Rect %dx%d\n", m_src_pitch, m_dst_pitch, m_rect_width, m_rect_height); - LOG("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); + LOGBLIT("\tColor/Font expansion: Color enhanced %d Font enhanced %d\n", color_exp, font_exp); + LOGBLIT("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); + LOGBLIT("\tSRC Pitch %d DST Pitch %d Rect %dx%d\n", m_src_pitch, m_dst_pitch, m_rect_width, m_rect_height); + LOGBLIT("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); if (m_rect_width > 8) { - LOG("\tWarning: rect width > 8, ignored!\n"); + LOGBLIT("\tWarning: rect width > 8, ignored!\n"); return; } @@ -530,7 +534,7 @@ void sis6326_pci_device::trigger_2d_command() { const bool major_axis = !!BIT(m_draw_command, 10); const bool last_pixel = !!BIT(m_draw_command, 11); - LOG("\tLine: major axis %s %d\n", major_axis ? "Y" : "X", !last_pixel); + LOGBLIT("\tLine: major axis %s %d\n", major_axis ? "Y" : "X", !last_pixel); // ... break; } @@ -549,21 +553,17 @@ sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, const char ROM_START( sis6326agp ) ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) - // Default is AOpen for supporting OpenGL + // Default is AOpen for supporting OpenGL in its driver ROM_DEFAULT_BIOS("aopen") - ROM_SYSTEM_BIOS( 0, "aopen", "AOpen PA50V 2.25" ) + ROM_SYSTEM_BIOS( 0, "aopen", "AOpen PA50V 4MB 2.25" ) ROMX_LOAD( "aopenpa50v.vbi", 0x000000, 0x008000, CRC(6c4c7518) SHA1(36bb29a23d565e34d548701acc248d50c99d7da4), ROM_BIOS(0) ) - ROM_SYSTEM_BIOS( 1, "3dpro", "3DPro 4MB EDO 1.06" ) - ROMX_LOAD( "3dpro4mbedo.bin", 0x000000, 0x010000, CRC(f04b374c) SHA1(6eb96f7517df6eb566c615c2ab9ec5567035b6a5), ROM_BIOS(1) ) - ROM_SYSTEM_BIOS( 2, "siso", "SiS6326 4MB 1.21d" ) - ROMX_LOAD( "4mbsdr.vbi", 0x000000, 0x00c000, CRC(a5f8c7f7) SHA1(9e5cfcf8d34e0c5829343179c87fb2b97f7a7f9c), ROM_BIOS(2) ) - ROM_SYSTEM_BIOS( 3, "sis", "SiS6326 4MB 1.25" ) - ROMX_LOAD( "sis6326agp.bin", 0x000000, 0x010000, CRC(a671255c) SHA1(332ab9499142e8f7a235afe046e8e8d21a28580d), ROM_BIOS(3) ) - - // basically identical to siso -// ROM_SYSTEM_BIOS( 3, "sisvbi", "SiS6326 4MB PCI 1.21d" ) -// ROMX_LOAD( "4mb_pci.vbi", 0x000000, 0x00c000, CRC(8fca47be) SHA1(7ce995ec0d8b9ac4f0f40ccd0a61d7fc209d313f), ROM_BIOS(3) ) + // AGP/PCI + ROM_SYSTEM_BIOS( 1, "siso", "SiS6326 4MB 1.21d (08-18-98)" ) + ROMX_LOAD( "4mbsdr.vbi", 0x000000, 0x00c000, CRC(a5f8c7f7) SHA1(9e5cfcf8d34e0c5829343179c87fb2b97f7a7f9c), ROM_BIOS(1) ) + // AGP variant of the sis6326pci one + ROM_SYSTEM_BIOS( 2, "sis", "SiS6326 4MB 1.25" ) + ROMX_LOAD( "sis6326agp.bin", 0x000000, 0x010000, CRC(a671255c) SHA1(332ab9499142e8f7a235afe046e8e8d21a28580d), ROM_BIOS(2) ) ROM_END const tiny_rom_entry *sis6326_agp_device::device_rom_region() const From 82671d10b4694366fdb4f2465ce038ec7557a899 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 3 Mar 2026 13:37:38 +0100 Subject: [PATCH 118/351] machine/sis950_lpc.cpp: add pin mapper, add PCI slots to base sis630.cpp driver --- src/devices/bus/pci/pdc20262.cpp | 5 +- src/devices/machine/sis7018_audio.cpp | 1 + src/devices/machine/sis950_lpc.cpp | 75 +++++++++++++++++++++++++++ src/devices/machine/sis950_lpc.h | 6 +++ src/mame/misc/gfamily.cpp | 2 + src/mame/pc/sis630.cpp | 13 +++-- 6 files changed, 96 insertions(+), 6 deletions(-) diff --git a/src/devices/bus/pci/pdc20262.cpp b/src/devices/bus/pci/pdc20262.cpp index c91515b2674..0516e363b2e 100644 --- a/src/devices/bus/pci/pdc20262.cpp +++ b/src/devices/bus/pci/pdc20262.cpp @@ -6,6 +6,9 @@ Promise PDC20262 FastTrak66/UDMA66 IDE controller No documentation, ATA4 compliant +Notes: +- pdc20268 is El Torito capable + TODO: - how it sets compatible/native modes? Subvendor ID list suggests it can switch at will; - Install win9x driver causes huge loading hiccups, eventually freezes by accessing drive with @@ -16,8 +19,6 @@ TODO: \- Gets classified as SCSI controller in win9x device manager; - ID and hookup Flash ROM type; - PME 1.0 support (no low power states D1/D2, no PME#) -- pdc20268: supposedly El Torito boot capable, but doesn't work (possibly same regression as - shutms11) **************************************************************************************************/ diff --git a/src/devices/machine/sis7018_audio.cpp b/src/devices/machine/sis7018_audio.cpp index 4afe02763ca..44090d1ff4a 100644 --- a/src/devices/machine/sis7018_audio.cpp +++ b/src/devices/machine/sis7018_audio.cpp @@ -6,6 +6,7 @@ SiS 7018 Audio device (AC'97 compliant) TODO: - Stub interface, to be improved; +- shutms11 uses an AD1881 as AC'97 engine; - Reportedly based off Trident 4DWave technology, some registers effectively matches up; **************************************************************************************************/ diff --git a/src/devices/machine/sis950_lpc.cpp b/src/devices/machine/sis950_lpc.cpp index 94aede3def1..2065f7f6501 100644 --- a/src/devices/machine/sis950_lpc.cpp +++ b/src/devices/machine/sis950_lpc.cpp @@ -76,6 +76,14 @@ sis950_lpc_device::sis950_lpc_device(const machine_config &mconfig, const char * { } +void sis950_lpc_device::device_start() +{ + pci_device::device_start(); + + m_pci_root->set_pin_mapper(pci_pin_mapper(*this, FUNC(sis950_lpc_device::pin_mapper))); + m_pci_root->set_irq_handler(pci_irq_handler(*this, FUNC(sis950_lpc_device::irq_handler))); +} + void sis950_lpc_device::device_reset() { pci_device::device_reset(); @@ -863,4 +871,71 @@ void sis950_lpc_device::pc_dack5_w(int state) { pc_select_dma_channel(5, state); void sis950_lpc_device::pc_dack6_w(int state) { pc_select_dma_channel(6, state); } void sis950_lpc_device::pc_dack7_w(int state) { pc_select_dma_channel(7, state); } +/* + * Pin Mapper + */ +void sis950_lpc_device::redirect_irq(int irq, int state) +{ + switch (irq) + { + case 0: + case 1: + case 2: + case 8: + case 13: + break; + case 3: + m_pic_master->ir3_w(state); + break; + case 4: + m_pic_master->ir4_w(state); + break; + case 5: + m_pic_master->ir5_w(state); + break; + case 6: + m_pic_master->ir6_w(state); + break; + case 7: + m_pic_master->ir7_w(state); + break; + case 9: + m_pic_slave->ir1_w(state); + break; + case 10: + m_pic_slave->ir2_w(state); + break; + case 11: + m_pic_slave->ir3_w(state); + break; + case 12: + m_pic_slave->ir4_w(state); + break; + case 14: + m_pic_slave->ir6_w(state); + break; + case 15: + m_pic_slave->ir7_w(state); + break; + } +} + + +int sis950_lpc_device::pin_mapper(int pin) +{ + if(pin < 0 || pin >= 4 || BIT(m_irq_remap[pin], 7)) + return -1; + return m_irq_remap[pin]; +} + +void sis950_lpc_device::irq_handler(int line, int state) +{ + if(line < 0 || line >= 16) + return; + + logerror("irq_handler %d %d\n", line, state); + redirect_irq(line, state); +} + +// TODO: public setter for connections (cfr. table in irq_remap_w) diff --git a/src/devices/machine/sis950_lpc.h b/src/devices/machine/sis950_lpc.h index df4b99bfd74..5dee5ee9d9b 100644 --- a/src/devices/machine/sis950_lpc.h +++ b/src/devices/machine/sis950_lpc.h @@ -65,6 +65,7 @@ public: void pc_irq15_w(int state); protected: + virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; virtual void device_config_complete() override; @@ -143,6 +144,11 @@ private: }; u8 m_irq_remap[9]{}; + void redirect_irq(int irq, int state); + + int pin_mapper(int pin); + void irq_handler(int line, int state); + // LPC vendor specific, verify if it's common for all u8 lpc_fast_init_r(); void lpc_fast_init_w(offs_t offset, u8 data); diff --git a/src/mame/misc/gfamily.cpp b/src/mame/misc/gfamily.cpp index 5cf821c7596..1941dca7193 100644 --- a/src/mame/misc/gfamily.cpp +++ b/src/mame/misc/gfamily.cpp @@ -165,6 +165,8 @@ void gfamily_state::gfamily(machine_config &config) // This will be correctly identified as bus #1-dev #0-func #0 by the Award BIOS SIS630_GUI(config, "pci:02.0:00.0", 0); + // TODO: PCI/AGP slots + // TODO: looks different ISA16_SLOT(config, "superio", 0, "pci:01.0:isabus", isa_internal_devices, "it8705f", true).set_option_machine_config("it8705f", ite_superio_config); diff --git a/src/mame/pc/sis630.cpp b/src/mame/pc/sis630.cpp index a3e8f867539..d2f19b1980e 100644 --- a/src/mame/pc/sis630.cpp +++ b/src/mame/pc/sis630.cpp @@ -15,6 +15,7 @@ TODO (main): - EISA slots; - SMBus; - PS/2 mouse is unstable, worked around by disabling and using a serial mouse instead. +- BIOS won't recognize PCI_SLOT expansion ROMs; TODO (usability, to be moved in a SW list): - windows xp sp3: tests HW then does an ACPI devtrap write ($48), will eventually BSoD with @@ -28,7 +29,7 @@ TODO (usability, to be moved in a SW list): with a STOP #a0 INTERNAL_POWER_ERROR with param1 0x5 ("reserved"!?) - gamecstl Kontron BIOS: -\- hangs at PC=0xf3cf2, again wanting a SMI# from devtrap_en_w; +\- hangs at PC=0xf3cf2 with a jp $-2, after software SMI#; \- No PS/2 inputs; - gamecstl dump (tested from shutms11, also see notes below): @@ -174,6 +175,7 @@ Notes on possible shutms11 BIOS bugs: #include "emu.h" #include "cpu/i386/i386.h" #include "bus/isa/isa_cards.h" +#include "bus/pci/pci_slot.h" #include "bus/pc_kbd/keyboards.h" #include "bus/rs232/hlemouse.h" #include "bus/rs232/null_modem.h" @@ -310,13 +312,16 @@ void sis630_state::sis630(machine_config &config) // "pci:08.0" SCSI controller (vendor=1000 NCR / LSI Logic / Symbios Logic device=0012 53C895A) // "pci:09.0" IEEE1394 controller (vendor=1033 NEC device=00ce uPD72872 / μPD72872) - // TODO: 3 expansion PCI slots (PC104+) + // 3 expansion PCI slots (PC104+) // "pci:09.x" to "pci:12.x"? + PCI_SLOT(config, "pci:1", pci_cards, 9, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:2", pci_cards, 10, 1, 2, 3, 0, nullptr); + PCI_SLOT(config, "pci:3", pci_cards, 11, 2, 3, 0, 1, nullptr); + // (PIC-MG) // "pci:20.x" to "pci:17.x"? - // TODO: 1 parallel + 2 serial ports - // TODO: 1 game port ('7018?) + // TODO: 1 game port (as connection in '7018?) // TODO: move in MB implementations // (some unsupported variants uses W83697HF, namely Gigabyte GA-6SMZ7) From 4614ec48a67cfca2f764a468a20623491765162b Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 3 Mar 2026 15:11:27 +0100 Subject: [PATCH 119/351] machine/sis630_gui.cpp: fix subsystem write once in GUI, fix device ID for bridge --- src/devices/machine/sis630_gui.cpp | 10 ++++++++++ src/devices/machine/sis630_gui.h | 9 +++++---- 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/src/devices/machine/sis630_gui.cpp b/src/devices/machine/sis630_gui.cpp index e7696b54dd4..c6e07eabf2d 100644 --- a/src/devices/machine/sis630_gui.cpp +++ b/src/devices/machine/sis630_gui.cpp @@ -187,11 +187,16 @@ void sis630_gui_device::subvendor_w(offs_t offset, u32 data, u32 mem_mask) , data , mem_mask ); + return; } m_subsystem_logger_mask |= mem_mask; COMBINE_DATA(&subsystem_id); LOGIO("subsystem ID write [$2c] %08x & %08x (%08x)\n", data, mem_mask, subsystem_id); + // if we have a complete subvendor rewrite the subsystem_id + // NOTE: it actually expects swapped words (vendor at 15:0, device at 31:16), cfr. pci.exe + if (m_subsystem_logger_mask == 0xffff'ffff) + subsystem_id = (subsystem_id >> 16) | ((subsystem_id & 0xffff) << 16); } void sis630_gui_device::memory_map(address_map &map) @@ -319,6 +324,11 @@ void sis630_bridge_device::bridge_control_w(offs_t offset, uint16_t data, uint16 void sis630_bridge_device::device_start() { pci_bridge_device::device_start(); + + command = 0; + command_mask = 0x27; + // , status in actual bridge device + status = 0; } void sis630_bridge_device::device_reset() diff --git a/src/devices/machine/sis630_gui.h b/src/devices/machine/sis630_gui.h index 150ed584f93..4d343e90121 100644 --- a/src/devices/machine/sis630_gui.h +++ b/src/devices/machine/sis630_gui.h @@ -61,8 +61,6 @@ private: void unmap_log_w(offs_t offset, u8 data); }; -DECLARE_DEVICE_TYPE(SIS630_GUI, sis630_gui_device) - class sis630_bridge_device : public pci_bridge_device { public: @@ -71,8 +69,10 @@ public: T &&gui_tag ) : sis630_bridge_device(mconfig, tag, owner, clock) { - // either 0001 or 6001 as device ID - set_ids_bridge(0x10396001, 0x00); + // doc reports 0001 or 6001 as device ID + // assume latter as a mistake: will print "unknown" in pci.exe, + // likewise it's not known in PCI ID database + set_ids_bridge(0x10390001, 0x00); //set_multifunction_device(true); m_vga.set_tag(std::forward(gui_tag)); } @@ -92,6 +92,7 @@ private: virtual void bridge_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0) override; }; +DECLARE_DEVICE_TYPE(SIS630_GUI, sis630_gui_device) DECLARE_DEVICE_TYPE(SIS630_BRIDGE, sis630_bridge_device) #endif // MAME_MACHINE_SIS630_GUI_H From b4e296b70814bc40cc11baa82e7dc6295bb5465a Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 3 Mar 2026 15:12:41 +0100 Subject: [PATCH 120/351] machine/sis950_lpc.cpp: hookup relocable IDE IIRQA/IIRQB pins --- src/devices/machine/sis950_lpc.cpp | 29 ++++++++++++++++++++++++++++- src/devices/machine/sis950_lpc.h | 4 ++++ src/mame/misc/gfamily.cpp | 17 +++++------------ src/mame/pc/pulltrig.cpp | 17 +++++------------ src/mame/pc/sis630.cpp | 17 +++++------------ 5 files changed, 47 insertions(+), 37 deletions(-) diff --git a/src/devices/machine/sis950_lpc.cpp b/src/devices/machine/sis950_lpc.cpp index 2065f7f6501..00e5656355a 100644 --- a/src/devices/machine/sis950_lpc.cpp +++ b/src/devices/machine/sis950_lpc.cpp @@ -938,4 +938,31 @@ void sis950_lpc_device::irq_handler(int line, int state) redirect_irq(line, state); } -// TODO: public setter for connections (cfr. table in irq_remap_w) +// IDE can only redirect one IRQ, bit 4 select between Primary (0) or Secondary (1) +void sis950_lpc_device::pc_iirqa_w(int state) +{ + u8 setting = m_irq_remap[IRQ_IDE]; + + if (BIT(setting, 7) || BIT(setting, 4)) + { + redirect_irq(14, state); + return; + } + + redirect_irq(setting & 0xf, state); +} + +void sis950_lpc_device::pc_iirqb_w(int state) +{ + u8 setting = m_irq_remap[IRQ_IDE]; + + if (BIT(setting, 7) || !BIT(setting, 4)) + { + redirect_irq(15, state); + return; + } + + redirect_irq(setting & 0xf, state); +} + +// TODO: public setter for remaining connections (cfr. table in irq_remap_w) diff --git a/src/devices/machine/sis950_lpc.h b/src/devices/machine/sis950_lpc.h index 5dee5ee9d9b..d4ac43fc780 100644 --- a/src/devices/machine/sis950_lpc.h +++ b/src/devices/machine/sis950_lpc.h @@ -64,6 +64,10 @@ public: void pc_irq14_w(int state); void pc_irq15_w(int state); + // IDE Primary/Secondary Channel interrupts + void pc_iirqa_w(int state); + void pc_iirqb_w(int state); + protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; diff --git a/src/mame/misc/gfamily.cpp b/src/mame/misc/gfamily.cpp index 1941dca7193..aecef20dc26 100644 --- a/src/mame/misc/gfamily.cpp +++ b/src/mame/misc/gfamily.cpp @@ -70,8 +70,6 @@ public: gfamily_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_ide_00_1(*this, "pci:00.1") - , m_lpc_01_0(*this, "pci:01.0") { } void gfamily(machine_config &config); @@ -79,8 +77,6 @@ public: private: required_device m_maincpu; - required_device m_ide_00_1; - required_device m_lpc_01_0; // void main_io(address_map &map) ATTR_COLD; // void main_map(address_map &map) ATTR_COLD; @@ -136,15 +132,12 @@ void gfamily_state::gfamily(machine_config &config) PCI_ROOT(config, "pci", 0); // up to 512MB, 2 x DIMM sockets SIS630_HOST(config, "pci:00.0", 0, "maincpu", 256*1024*1024); - SIS5513_IDE(config, m_ide_00_1, 0, "maincpu"); - // TODO: both on same line as default, should also trigger towards LPC - m_ide_00_1->irq_pri().set("pci:01.0:pic_slave", FUNC(pic8259_device::ir6_w)); - //FUNC(sis950_lpc_device::pc_irq14_w)); - m_ide_00_1->irq_sec().set("pci:01.0:pic_slave", FUNC(pic8259_device::ir7_w)); - //FUNC(sis950_lpc_device::pc_mirq0_w)); + sis5513_ide_device &ide(SIS5513_IDE(config, "pci:00.1", 0, "maincpu")); + ide.irq_pri().set("pci:01.0", FUNC(sis950_lpc_device::pc_iirqa_w)); + ide.irq_sec().set("pci:01.0", FUNC(sis950_lpc_device::pc_iirqb_w)); - SIS950_LPC(config, m_lpc_01_0, XTAL(33'000'000), "maincpu", "flash"); - m_lpc_01_0->fast_reset_cb().set([this] (int state) { + sis950_lpc_device &lpc(SIS950_LPC(config, "pci:01.0", XTAL(33'000'000), "maincpu", "flash")); + lpc.fast_reset_cb().set([this] (int state) { if (state) machine().schedule_soft_reset(); }); diff --git a/src/mame/pc/pulltrig.cpp b/src/mame/pc/pulltrig.cpp index 7ed16e11874..281e747dcc6 100644 --- a/src/mame/pc/pulltrig.cpp +++ b/src/mame/pc/pulltrig.cpp @@ -66,8 +66,6 @@ public: pulltrig_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_ide_00_1(*this, "pci:00.1") - , m_lpc_01_0(*this, "pci:01.0") { } @@ -75,8 +73,6 @@ public: private: required_device m_maincpu; - required_device m_ide_00_1; - required_device m_lpc_01_0; static void ite_superio_config(device_t *device); }; @@ -127,15 +123,12 @@ void pulltrig_state::pulltrig(machine_config &config) PCI_ROOT(config, "pci", 0); SIS630_HOST(config, "pci:00.0", 0, "maincpu", 256*1024*1024); - SIS5513_IDE(config, m_ide_00_1, 0, "maincpu"); - // TODO: both on same line as default, should also trigger towards LPC - m_ide_00_1->irq_pri().set("pci:01.0:pic_slave", FUNC(pic8259_device::ir6_w)); - //FUNC(sis950_lpc_device::pc_irq14_w)); - m_ide_00_1->irq_sec().set("pci:01.0:pic_slave", FUNC(pic8259_device::ir7_w)); - //FUNC(sis950_lpc_device::pc_mirq0_w)); + sis5513_ide_device &ide(SIS5513_IDE(config, "pci:00.1", 0, "maincpu")); + ide.irq_pri().set("pci:01.0", FUNC(sis950_lpc_device::pc_iirqa_w)); + ide.irq_sec().set("pci:01.0", FUNC(sis950_lpc_device::pc_iirqb_w)); - SIS950_LPC(config, m_lpc_01_0, XTAL(33'000'000), "maincpu", "flash"); - m_lpc_01_0->fast_reset_cb().set([this] (int state) { + sis950_lpc_device &lpc(SIS950_LPC(config, "pci:01.0", XTAL(33'000'000), "maincpu", "flash")); + lpc.fast_reset_cb().set([this] (int state) { if (state) machine().schedule_soft_reset(); }); diff --git a/src/mame/pc/sis630.cpp b/src/mame/pc/sis630.cpp index d2f19b1980e..0b6e95fbd7a 100644 --- a/src/mame/pc/sis630.cpp +++ b/src/mame/pc/sis630.cpp @@ -204,8 +204,6 @@ public: sis630_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_ide_00_1(*this, "pci:00.1") - , m_lpc_01_0(*this, "pci:01.0") { } void sis630(machine_config &config); @@ -218,8 +216,6 @@ public: private: required_device m_maincpu; - required_device m_ide_00_1; - required_device m_lpc_01_0; // void main_io(address_map &map) ATTR_COLD; // void main_map(address_map &map) ATTR_COLD; @@ -278,15 +274,12 @@ void sis630_state::sis630(machine_config &config) PCI_ROOT(config, "pci", 0); // up to 512MB, 2 x DIMM sockets SIS630_HOST(config, "pci:00.0", 0, "maincpu", 256*1024*1024); - SIS5513_IDE(config, m_ide_00_1, 0, "maincpu"); - // TODO: both on same line as default, should also trigger towards LPC - m_ide_00_1->irq_pri().set("pci:01.0:pic_slave", FUNC(pic8259_device::ir6_w)); - //FUNC(sis950_lpc_device::pc_irq14_w)); - m_ide_00_1->irq_sec().set("pci:01.0:pic_slave", FUNC(pic8259_device::ir7_w)); - //FUNC(sis950_lpc_device::pc_mirq0_w)); + sis5513_ide_device &ide(SIS5513_IDE(config, "pci:00.1", 0, "maincpu")); + ide.irq_pri().set("pci:01.0", FUNC(sis950_lpc_device::pc_iirqa_w)); + ide.irq_sec().set("pci:01.0", FUNC(sis950_lpc_device::pc_iirqb_w)); - SIS950_LPC(config, m_lpc_01_0, XTAL(33'000'000), "maincpu", "flash"); - m_lpc_01_0->fast_reset_cb().set([this] (int state) { + sis950_lpc_device &lpc(SIS950_LPC(config, "pci:01.0", XTAL(33'000'000), "maincpu", "flash")); + lpc.fast_reset_cb().set([this] (int state) { if (state) machine().schedule_soft_reset(); }); From a9904ccad97d124fc6d2cc13728a8de5e206ee0a Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 3 Mar 2026 17:12:27 +0100 Subject: [PATCH 121/351] bus/pci/trident_4dwavedx.cpp: hookup PC_JOY --- src/devices/bus/pci/sis6326.cpp | 2 ++ src/devices/bus/pci/trident_4dwavedx.cpp | 16 ++++++++++++++-- src/devices/bus/pci/trident_4dwavedx.h | 6 ++++++ src/devices/video/pc_vga_sis.cpp | 8 +++++--- 4 files changed, 27 insertions(+), 5 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 4c86b88a3b4..0eca2a8c06a 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -221,6 +221,8 @@ void sis6326_pci_device::mmio_map(address_map &map) map(0x8378, 0x837f).w(m_vga, FUNC(sis6326_vga_device::cursor_mmio_w)); // HACK: Same deal for 3D Engine Status map(0x89fc, 0x89ff).lr32(NAME([] () { return (0x3ff << 16) | 3; })); + + map(0x8afc, 0x8aff).nopw(); // winamp, verbose (TEND dummy register) } void sis6326_pci_device::vmi_map(address_map &map) diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 03f2cc22eb5..8ab5f04ac9c 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -9,6 +9,7 @@ AC'97 v1.x (fixed 48 kHz) TODO: - Stub-ish, enough to install fine in win98se and nothing else; - wavetsr.com can't find a free IRQ for SB emulation under DOS; +- Soundblaster, FM and MPU-401 are emulated by the 4dwave sound engine; **************************************************************************************************/ @@ -26,6 +27,7 @@ DEFINE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device, "trident_4dwaved trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) + , m_joy(*this, "pc_joy") { } @@ -38,13 +40,16 @@ trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, void trident_4dwavedx_device::device_add_mconfig(machine_config &config) { // TODO: SigmaTel STAC9704T or STAC9700T + // Trident suggests to use an AD1819A + + PC_JOY(config, m_joy); } void trident_4dwavedx_device::device_start() { pci_card_device::device_start(); - add_map( 256, M_IO, FUNC(trident_4dwavedx_device::io_map)); + add_map( 256, M_IO, FUNC(trident_4dwavedx_device::io_map)); add_map( 4*1024, M_MEM, FUNC(trident_4dwavedx_device::mmio_map)); // INTA# @@ -190,6 +195,11 @@ void trident_4dwavedx_device::mmio_map(address_map &map) { } +void trident_4dwavedx_device::gameport_map(address_map &map) +{ + map(0x00, 0x07).rw(m_joy, FUNC(pc_joy_device::joy_port_r), FUNC(pc_joy_device::joy_port_w)); +} + void trident_4dwavedx_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) { @@ -200,13 +210,15 @@ void trident_4dwavedx_device::map_extra(uint64_t memory_window_start, uint64_t m const u16 mpu401_port = BIT(m_legacy_control, 6) ? 0x0300 : 0x0330; io_space->install_device(mpu401_port, mpu401_port + 3, *this, &trident_4dwavedx_device::midi_map); } +#endif if (BIT(m_legacy_control, 5)) { const u16 game_port = BIT(m_legacy_control, 4) ? 0x0208 : 0x0200; - io_space->install_device(game_port, game_port + 7, *this, &trident_4dwavedx_device::game_map); + io_space->install_device(game_port, game_port + 7, *this, &trident_4dwavedx_device::gameport_map); } +#if 0 if (BIT(m_legacy_control, 3)) { const u16 fm_port = BIT(m_legacy_control, 2) ? 0x038c : 0x0388; diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index f2ca303c68c..caa17d9d795 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -8,6 +8,8 @@ #include "pci_slot.h" +#include "bus/pc_joy/pc_joy.h" + class trident_4dwavedx_device : public pci_card_device { public: @@ -33,6 +35,10 @@ private: void io_map(address_map &map); void mmio_map(address_map &map); + void gameport_map(address_map &map); + + required_device m_joy; + u32 m_ddma_config; u32 m_legacy_control; struct { diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 639e42052d7..ec6b7f89e15 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -39,7 +39,7 @@ TODO (sis630): #define LOG_LOCKED (1U << 4) // log lock/unlock sequences -#define VERBOSE (LOG_GENERAL | LOG_SEQ) +#define VERBOSE (LOG_GENERAL) //#define LOG_OUTPUT_FUNC osd_printf_info #define LOGSEQ(...) LOGMASKED(LOG_SEQ, __VA_ARGS__) @@ -345,7 +345,8 @@ void sis6326_vga_device::sequencer_map(address_map &map) }), NAME([this] (offs_t offset, u8 data) { m_ramdac_mode = data; - LOG("SR06: RAMDAC mode %02x\n", data); + // verbose in win98se + LOGSEQ("SR06: RAMDAC mode %02x\n", data); svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb24_en = svga.rgb32_en = 0; @@ -443,7 +444,8 @@ void sis6326_vga_device::sequencer_map(address_map &map) return m_ext_sr0b; }), NAME([this] (offs_t offset, u8 data) { - LOG("SR0B: Misc. Control 1 %02x\n", data); + // verbose in win98se + LOGSEQ("SR0B: Misc. Control 1 %02x\n", data); LOGSEQ("\tTrue Color format %s MMIO space sel %d True Color frame rate modulation %d\n" , BIT(data, 7) ? "BGR" : "RGB" , (data >> 5) & 3 From 277f1471d95081d1c93184dfb6cd2a708464f52e Mon Sep 17 00:00:00 2001 From: ClawGrip Date: Tue, 3 Mar 2026 18:34:56 +0100 Subject: [PATCH 122/351] tecmo/pbaction.cpp: Add a new Tecfri-licensed Pinball Action set (#15027) New working clones ------------------ Pinball Action (Tecfri license, set 2, without external display) [Victor Fernandez (City Game)] --- src/mame/mame.lst | 1 + src/mame/tecmo/pbaction.cpp | 38 ++++++++++++++++++++++++++++++++----- 2 files changed, 34 insertions(+), 5 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 54093391bba..aaafcad9a44 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -46642,6 +46642,7 @@ pbaction2 pbaction3 pbaction4 pbactiont +pbactiont2 @source:tecmo/senjyo.cpp baluba diff --git a/src/mame/tecmo/pbaction.cpp b/src/mame/tecmo/pbaction.cpp index 6be28b5f5ae..00a83b4e207 100644 --- a/src/mame/tecmo/pbaction.cpp +++ b/src/mame/tecmo/pbaction.cpp @@ -917,6 +917,33 @@ ROM_START( pbactiont ) ROM_LOAD( "b-f7.bin", 0x04000, 0x2000, CRC(af6e9817) SHA1(56f47d25761b3850c49a3a81b5ea35f12bd77b14) ) ROM_END +// PCB has Tehkan logo (6001-1A/1B) and also "Fabricado por Tecfri S.A. Made in Spain" +ROM_START( pbactiont2 ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "16.p7", 0x00000, 0x4000, CRC(01d8b452) SHA1(98edc4ce5d441b0326c9f0a3c23f7c23b12afbf6) ) + ROM_LOAD( "15.n7", 0x04000, 0x4000, CRC(8a7ad290) SHA1(54892125d46a28d2f9f7be64f9595ab9b35b1574) ) + ROM_LOAD( "14.l7", 0x08000, 0x2000, CRC(d7d77c67) SHA1(c6797f5597d5f485b963059e1ab8ad1255f6f255) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "1.e3", 0x00000, 0x2000, CRC(8b69b933) SHA1(eb0762579d52ed9f5b1a002ffe7e517c59650e22) ) + + ROM_REGION( 0x06000, "fgchars", 0 ) + ROM_LOAD( "7.s6", 0x00000, 0x2000, CRC(9a74a8e1) SHA1(bd27439b91f41db3fd7eedb44e828d61b793bda0) ) + ROM_LOAD( "8.s7", 0x02000, 0x2000, CRC(5ca6ad3c) SHA1(7c8eff087f18cc2ff0572ea45e681a3a1ec94fad) ) + ROM_LOAD( "9.s8", 0x04000, 0x2000, CRC(9f00b757) SHA1(74b6d926b8f456c8d0101f0232c5d3662423b396) ) + + ROM_REGION( 0x10000, "bgchars", 0 ) + ROM_LOAD( "2.j5", 0x00000, 0x4000, CRC(21efe866) SHA1(0c0a05a26d793ba98b0f421d464ff4b1d301ff9e) ) + ROM_LOAD( "3.j6", 0x04000, 0x4000, CRC(7f984c80) SHA1(18795ecbcd2da94f1cfcce5559d652388d1b8bc0) ) + ROM_LOAD( "4.j7", 0x08000, 0x4000, CRC(df69e51b) SHA1(52ab15c63332f0fa98884fa9adc8d35b93c939c4) ) + ROM_LOAD( "5.j8", 0x0c000, 0x4000, CRC(0094cb8b) SHA1(58f48d24903b797e8451bf231f9e8df621685d9f) ) + + ROM_REGION( 0x06000, "sprites", 0 ) + ROM_LOAD( "11.c7", 0x00000, 0x2000, CRC(d1795ef5) SHA1(69ad8e419e340d2f548468ed7838102789b978da) ) + ROM_LOAD( "12.d7", 0x02000, 0x2000, CRC(f28df203) SHA1(060f70ed6386c808303a488c97691257681bd8f3) ) + ROM_LOAD( "13.f7", 0x04000, 0x2000, CRC(af6e9817) SHA1(56f47d25761b3850c49a3a81b5ea35f12bd77b14) ) +ROM_END + uint8_t pbaction_state::pbaction2_prot_kludge_r() { // on startup, the game expect this location to NOT act as RAM @@ -942,8 +969,9 @@ void pbaction_state::init_pbaction2() // some of these are probably bootlegs -GAME( 1985, pbaction, 0, pbaction, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 1)", MACHINE_SUPPORTS_SAVE ) // possible bootleg due to not being encrypted + different sound map -GAME( 1985, pbaction2, pbaction, pbactionx, pbaction, pbaction_state, init_pbaction2, ROT90, "Tehkan", "Pinball Action (set 2, encrypted)", MACHINE_SUPPORTS_SAVE ) // likely bootleg due to extra protection on top of usual -GAME( 1985, pbaction3, pbaction, pbactionx, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 3, encrypted)", MACHINE_SUPPORTS_SAVE ) // possible bootleg due to oversized ROMs -GAME( 1985, pbaction4, pbaction, pbactionx, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 4, encrypted)", MACHINE_SUPPORTS_SAVE ) // original? -GAMEL(1985, pbactiont, pbaction, pbactiont, pbaction, pbaction_tecfri_state, empty_init, ROT90, "Tehkan (Tecfri license)", "Pinball Action (Tecfri license)", MACHINE_SUPPORTS_SAVE, layout_pbactiont ) +GAME( 1985, pbaction, 0, pbaction, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 1)", MACHINE_SUPPORTS_SAVE ) // possible bootleg due to not being encrypted + different sound map +GAME( 1985, pbaction2, pbaction, pbactionx, pbaction, pbaction_state, init_pbaction2, ROT90, "Tehkan", "Pinball Action (set 2, encrypted)", MACHINE_SUPPORTS_SAVE ) // likely bootleg due to extra protection on top of usual +GAME( 1985, pbaction3, pbaction, pbactionx, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 3, encrypted)", MACHINE_SUPPORTS_SAVE ) // possible bootleg due to oversized ROMs +GAME( 1985, pbaction4, pbaction, pbactionx, pbaction, pbaction_state, empty_init, ROT90, "Tehkan", "Pinball Action (set 4, encrypted)", MACHINE_SUPPORTS_SAVE ) // original? +GAMEL(1985, pbactiont, pbaction, pbactiont, pbaction, pbaction_tecfri_state, empty_init, ROT90, "Tehkan (Tecfri license)", "Pinball Action (Tecfri, with external display)", MACHINE_SUPPORTS_SAVE, layout_pbactiont ) +GAME( 1985, pbactiont2, pbaction, pbaction, pbaction, pbaction_state, empty_init, ROT90, "Tehkan (Tecfri license)", "Pinball Action (Tecfri, without external display)", MACHINE_SUPPORTS_SAVE ) From 77a3902b97585509190c84d162091d47774f39eb Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Tue, 3 Mar 2026 19:44:08 +0100 Subject: [PATCH 123/351] scsi: finish deslotting and correct a number of things --- src/devices/bus/a2bus/a2hsscsi.cpp | 9 +- src/devices/bus/a2bus/a2scsi.cpp | 9 +- src/devices/bus/a2bus/cmsscsi.cpp | 5 +- src/devices/bus/amiga/cpuslot/a590.cpp | 17 ++-- src/devices/bus/amiga/cpuslot/a590.h | 2 - src/devices/bus/amiga/zorro/a2091.cpp | 17 ++-- src/devices/bus/amiga/zorro/a2091.h | 2 - src/devices/bus/amiga/zorro/oktagon2008.cpp | 14 +-- .../bus/archimedes/podule/scsi_a500.cpp | 14 ++- .../bus/archimedes/podule/scsi_acorn.cpp | 16 ++-- .../bus/archimedes/podule/scsi_cumana.cpp | 13 ++- .../bus/archimedes/podule/scsi_ling.cpp | 12 +-- .../bus/archimedes/podule/scsi_morley.cpp | 18 ++-- .../bus/archimedes/podule/scsi_oak.cpp | 15 ++- .../bus/archimedes/podule/scsi_vti.cpp | 18 ++-- src/devices/bus/isa/aha1542b.cpp | 30 +++--- src/devices/bus/isa/aha1542b.h | 1 - src/devices/bus/isa/aha174x.cpp | 21 ++-- src/devices/bus/isa/aha174x.h | 1 - src/devices/bus/isa/asc88.cpp | 18 ++-- src/devices/bus/isa/asc88.h | 2 - src/devices/bus/isa/bt54x.cpp | 45 +++------ src/devices/bus/isa/bt54x.h | 2 - src/devices/bus/isa/ncr53c400.cpp | 10 +- src/devices/bus/isa/tekram_dc820.cpp | 20 ++-- src/devices/bus/isa/ultra14f.cpp | 10 +- src/devices/bus/isa/ultra24f.cpp | 10 +- src/devices/bus/msx/cart/scsi.cpp | 8 +- src/devices/bus/pc98_cbus/lha201.cpp | 16 +--- src/devices/bus/pc98_cbus/pc9801_55.cpp | 21 ++-- src/devices/bus/qbus/qtx.cpp | 39 +++----- src/devices/bus/qbus/qtx.h | 2 - src/devices/bus/qbus/tdl12.cpp | 10 +- src/devices/bus/ti99/peb/scsicard.cpp | 12 +-- src/devices/bus/vme/hcpu30.cpp | 20 ++-- src/devices/bus/vme/mvme327a.cpp | 15 +-- src/devices/bus/vme/mvme328.cpp | 62 ++++++------ src/devices/bus/vme/tp880v.cpp | 16 ++-- src/devices/bus/vme/tp881v.cpp | 29 ++---- src/devices/machine/53c7xx.cpp | 1 - src/devices/machine/53c7xx.h | 2 +- src/devices/machine/cxd1185.cpp | 1 - src/devices/machine/cxd1185.h | 1 - src/devices/machine/ncr5385.cpp | 1 - src/devices/machine/ncr5385.h | 1 - src/devices/machine/spifi3.cpp | 1 - src/devices/machine/spifi3.h | 3 +- src/devices/machine/wd33c9x.cpp | 1 - src/devices/machine/wd33c9x.h | 2 +- src/mame/acorn/aa310.cpp | 16 ++-- src/mame/act/victor9k.cpp | 16 ++-- src/mame/act/victor9k_hdc.cpp | 1 - src/mame/act/victor9k_hdc.h | 2 +- src/mame/akai/mpc3000.cpp | 2 +- src/mame/akai/s3000.cpp | 2 +- src/mame/bfm/bfm_cobra3.cpp | 10 +- src/mame/bfm/rastersp.cpp | 50 ++++------ src/mame/capcom/cps3.cpp | 95 ++++++++++--------- src/mame/dec/dc7061.cpp | 1 - src/mame/dec/dc7061.h | 1 - src/mame/dec/kn01.cpp | 14 ++- src/mame/dg/aviion88k.cpp | 5 +- src/mame/konami/konamigq.cpp | 2 +- src/mame/konami/twinkle.cpp | 36 +++---- src/mame/natsemi/icm3216.cpp | 17 ++-- src/mame/quantel/harriet.cpp | 7 +- src/mame/rolm/r9751.cpp | 18 ++-- src/mame/sega/segas32.cpp | 28 ++---- src/mame/sgi/indy_indigo2.cpp | 42 ++++---- src/mame/sgi/ip12.cpp | 17 ++-- src/mame/sgi/ip20.cpp | 17 ++-- src/mame/sgi/ip4.cpp | 17 ++-- src/mame/sgi/ip6.cpp | 17 ++-- src/mame/sony/news_r3k.cpp | 28 +++--- src/mame/sony/news_r4k.cpp | 31 +++--- src/mame/tektronix/tek440x.cpp | 13 +-- src/mame/tektronix/tekigw.cpp | 19 ++-- 77 files changed, 467 insertions(+), 672 deletions(-) diff --git a/src/devices/bus/a2bus/a2hsscsi.cpp b/src/devices/bus/a2bus/a2hsscsi.cpp index 58f226c986d..2741a56ab6c 100644 --- a/src/devices/bus/a2bus/a2hsscsi.cpp +++ b/src/devices/bus/a2bus/a2hsscsi.cpp @@ -54,7 +54,7 @@ DEFINE_DEVICE_TYPE(A2BUS_HSSCSI, a2bus_hsscsi_device, "a2hsscsi", "Apple II High #define SCSI_ROM_REGION "scsi_rom" #define SCSI_BUS_TAG "scsibus" -#define SCSI_5380_TAG "scsibus:7:ncr5380" +#define SCSI_5380_TAG "ncr5380" ROM_START( hsscsi ) ROM_REGION(0x8000, SCSI_ROM_REGION, 0) @@ -79,9 +79,10 @@ void a2bus_hsscsi_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, "harddisk", false); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("ncr5380", NCR53C80).machine_config([this](device_t *device) { - downcast(*device).drq_handler().set(*this, FUNC(a2bus_hsscsi_device::drq_w)); - }); + + NCR53C80(config, m_ncr5380); + m_scsibus->set_external_device(7, m_ncr5380); + m_ncr5380->drq_handler().set(DEVICE_SELF, FUNC(a2bus_hsscsi_device::drq_w)); } //------------------------------------------------- diff --git a/src/devices/bus/a2bus/a2scsi.cpp b/src/devices/bus/a2bus/a2scsi.cpp index 3bc957b5d26..838059361eb 100644 --- a/src/devices/bus/a2bus/a2scsi.cpp +++ b/src/devices/bus/a2bus/a2scsi.cpp @@ -52,7 +52,7 @@ DEFINE_DEVICE_TYPE(A2BUS_SCSI, a2bus_scsi_device, "a2scsi", "Apple II SCSI Card" #define SCSI_ROM_REGION "scsi_rom" #define SCSI_BUS_TAG "scsibus" -#define SCSI_5380_TAG "scsibus:7:ncr5380" +#define SCSI_5380_TAG "ncr5380" ROM_START( scsi ) ROM_REGION(0x4000, SCSI_ROM_REGION, 0) // this is the Rev. C ROM @@ -77,9 +77,10 @@ void a2bus_scsi_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, "harddisk", false); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("ncr5380", NCR5380).machine_config([this](device_t *device) { - downcast(*device).drq_handler().set(*this, FUNC(a2bus_scsi_device::drq_w)); - }); + + NCR5380(config, m_ncr5380); + m_scsibus->set_external_device(7, m_ncr5380); + m_ncr5380->drq_handler().set(DEVICE_SELF, FUNC(a2bus_scsi_device::drq_w)); // SOFTWARE_LIST(config, "cd_apple_dev").set_original("apple_devcd"); } diff --git a/src/devices/bus/a2bus/cmsscsi.cpp b/src/devices/bus/a2bus/cmsscsi.cpp index a7b710ebc27..be1bfd10a4c 100644 --- a/src/devices/bus/a2bus/cmsscsi.cpp +++ b/src/devices/bus/a2bus/cmsscsi.cpp @@ -42,7 +42,7 @@ DEFINE_DEVICE_TYPE(A2BUS_CMSSCSI, a2bus_cmsscsi_device, "cmsscsi", "CMS SCSI II #define SCSI_ROM_REGION "scsi_rom" #define SCSI_BUS_TAG "scsibus" -#define SCSI_5380_TAG "scsibus:7:ncr5380" +#define SCSI_5380_TAG "ncr5380" ROM_START( scsi ) ROM_REGION(0x4000, SCSI_ROM_REGION, 0) @@ -72,7 +72,8 @@ void a2bus_cmsscsi_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, "harddisk", false); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("ncr5380", NCR5380); + NCR5380(config, m_ncr5380); + m_scsibus->set_external_device(7, m_ncr5380); } //------------------------------------------------- diff --git a/src/devices/bus/amiga/cpuslot/a590.cpp b/src/devices/bus/amiga/cpuslot/a590.cpp index 5cc2bd91b7e..40f0cde6cff 100644 --- a/src/devices/bus/amiga/cpuslot/a590.cpp +++ b/src/devices/bus/amiga/cpuslot/a590.cpp @@ -46,7 +46,7 @@ a590_device::a590_device(const machine_config &mconfig, const char *tag, device_ device_amiga_cpuslot_interface(mconfig, *this), m_irq(*this, "irq"), m_dmac(*this, "dmac"), - m_wdc(*this, "scsi:7:wdc"), + m_wdc(*this, "wdc"), m_xt(*this, "xt"), m_jp1(*this, "jp1"), m_dip(*this, "dip"), @@ -167,13 +167,6 @@ const tiny_rom_entry *a590_device::device_rom_region() const // MACHINE DEFINITIONS //************************************************************************** -void a590_device::wd33c93_config(device_t *device) -{ - device->set_clock(28.37516_MHz_XTAL / 4); // 7M - downcast(device)->irq_cb().set(m_irq, FUNC(input_merger_any_high_device::in_w<0>)); - downcast(device)->drq_cb().set(m_dmac, FUNC(amiga_dmac_device::sdreq_w)); -} - void a590_device::device_add_mconfig(machine_config &config) { AMIGA_DMAC_REV2(config, m_dmac, 28.37516_MHz_XTAL / 4); // 7M @@ -191,14 +184,18 @@ void a590_device::device_add_mconfig(machine_config &config) INPUT_MERGER_ANY_HIGH(config, m_irq); m_irq->output_handler().set(m_dmac, FUNC(amiga_dmac_device::intx_w)); - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wdc", WD33C93A).machine_config([this] (device_t *device) { wd33c93_config(device); }); + + WD33C93A(config, m_wdc, 28.37516_MHz_XTAL / 4); // 7M + scsi.set_external_device(7, m_wdc); + m_wdc->irq_cb().set(m_irq, FUNC(input_merger_any_high_device::in_w<0>)); + m_wdc->drq_cb().set(m_dmac, FUNC(amiga_dmac_device::sdreq_w)); XT_HDC(config, m_xt, 0); m_xt->irq_handler().set(m_irq, FUNC(input_merger_any_high_device::in_w<1>)); diff --git a/src/devices/bus/amiga/cpuslot/a590.h b/src/devices/bus/amiga/cpuslot/a590.h index 2a046c179ee..a36e244a031 100644 --- a/src/devices/bus/amiga/cpuslot/a590.h +++ b/src/devices/bus/amiga/cpuslot/a590.h @@ -40,8 +40,6 @@ protected: virtual void rst_w(int state) override; private: - void wd33c93_config(device_t *device); - uint8_t xt_r(offs_t offset); void xt_w(offs_t offset, uint8_t data); uint8_t dip_r(offs_t offset); diff --git a/src/devices/bus/amiga/zorro/a2091.cpp b/src/devices/bus/amiga/zorro/a2091.cpp index 31e758cdfd5..fe3d1cc4ec7 100644 --- a/src/devices/bus/amiga/zorro/a2091.cpp +++ b/src/devices/bus/amiga/zorro/a2091.cpp @@ -47,7 +47,7 @@ a2091_device::a2091_device(const machine_config &mconfig, const char *tag, devic device_zorro2_card_interface(mconfig, *this), m_irq(*this, "irq"), m_dmac(*this, "dmac"), - m_wdc(*this, "scsi:7:wdc"), + m_wdc(*this, "wdc"), m_xt(*this, "xt"), m_jp1(*this, "jp1"), m_ram_size(0) @@ -151,13 +151,6 @@ const tiny_rom_entry *a2091_device::device_rom_region() const // MACHINE DEFINITIONS //************************************************************************** -void a2091_device::wd33c93_config(device_t *device) -{ - device->set_clock(28.37516_MHz_XTAL / 4); // 7M - downcast(device)->irq_cb().set(m_irq, FUNC(input_merger_any_high_device::in_w<0>)); - downcast(device)->drq_cb().set(m_dmac, FUNC(amiga_dmac_device::sdreq_w)); -} - void a2091_device::device_add_mconfig(machine_config &config) { AMIGA_DMAC_REV2(config, m_dmac, 28.37516_MHz_XTAL / 4); // 7M @@ -175,14 +168,18 @@ void a2091_device::device_add_mconfig(machine_config &config) INPUT_MERGER_ANY_HIGH(config, m_irq); m_irq->output_handler().set(m_dmac, FUNC(amiga_dmac_device::intx_w)); - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wdc", WD33C93A).machine_config([this] (device_t *device) { wd33c93_config(device); }); + + WD33C93A(config, m_wdc, 28.37516_MHz_XTAL / 4); // 7M + scsi.set_external_device(7, m_wdc); + m_wdc->irq_cb().set(m_irq, FUNC(input_merger_any_high_device::in_w<0>)); + m_wdc->drq_cb().set(m_dmac, FUNC(amiga_dmac_device::sdreq_w)); XT_HDC(config, m_xt, 0); m_xt->irq_handler().set(m_irq, FUNC(input_merger_any_high_device::in_w<1>)); diff --git a/src/devices/bus/amiga/zorro/a2091.h b/src/devices/bus/amiga/zorro/a2091.h index 89a3559a05d..e609a37f4ee 100644 --- a/src/devices/bus/amiga/zorro/a2091.h +++ b/src/devices/bus/amiga/zorro/a2091.h @@ -40,8 +40,6 @@ protected: virtual void busrst_w(int state) override; private: - void wd33c93_config(device_t *device); - uint8_t xt_r(offs_t offset); void xt_w(offs_t offset, uint8_t data); diff --git a/src/devices/bus/amiga/zorro/oktagon2008.cpp b/src/devices/bus/amiga/zorro/oktagon2008.cpp index dc0056194e6..b1453f97b5e 100644 --- a/src/devices/bus/amiga/zorro/oktagon2008.cpp +++ b/src/devices/bus/amiga/zorro/oktagon2008.cpp @@ -63,7 +63,7 @@ private: oktagon2008_device::oktagon2008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, AMIGA_OKTAGON2008, tag, owner, clock) , device_zorro2_card_interface(mconfig, *this) - , m_scsic(*this, "scsi:7:scsic") + , m_scsic(*this, "scsic") , m_eeprom(*this, "eeprom") , m_rom(*this, "rom") , m_jumpers(*this, "JUMPERS") @@ -236,7 +236,7 @@ ioport_constructor oktagon2008_device::device_input_ports() const void oktagon2008_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -244,11 +244,11 @@ void oktagon2008_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", NCR53C94).machine_config([this](device_t *device) { - device->set_clock(25_MHz_XTAL); - downcast(*device).set_busmd(ncr53c94_device::BUSMD_1); - downcast(*device).irq_handler_cb().set(*this, FUNC(oktagon2008_device::irq_w)); - }); + + NCR53C94(config, m_scsic, 25_MHz_XTAL); + scsi.set_external_device(7, m_scsic); + m_scsic->set_busmd(ncr53c94_device::BUSMD_1); + m_scsic->irq_handler_cb().set(*this, FUNC(oktagon2008_device::irq_w)); I2C_24C04(config, m_eeprom); // 24C02 on some PCBs; only addresses 0x100-0x10e appear to be used by the firmware } diff --git a/src/devices/bus/archimedes/podule/scsi_a500.cpp b/src/devices/bus/archimedes/podule/scsi_a500.cpp index d26e2784021..c6cc81ee667 100644 --- a/src/devices/bus/archimedes/podule/scsi_a500.cpp +++ b/src/devices/bus/archimedes/podule/scsi_a500.cpp @@ -78,7 +78,7 @@ const tiny_rom_entry *arc_scsi_a500_device::device_rom_region() const void arc_scsi_a500_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr, false); // Philips VP415 NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -86,12 +86,10 @@ void arc_scsi_a500_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93", WD33C93).clock(DERIVED_CLOCK(1, 1)) - .machine_config([this](device_t *device) - { - wd33c93_device &wd33c93(downcast(*device)); - wd33c93.irq_cb().set([this](int state) { set_pirq(state); }); - }); + + WD33C93(config, m_wd33c93, DERIVED_CLOCK(1, 1)); + scsi.set_external_device(7, m_wd33c93); + m_wd33c93->irq_cb().set([this](int state) { set_pirq(state); }); } @@ -106,7 +104,7 @@ void arc_scsi_a500_device::device_add_mconfig(machine_config &config) arc_scsi_a500_device::arc_scsi_a500_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ARC_SCSI_A500, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_wd33c93(*this, "scsi:7:wd33c93") + , m_wd33c93(*this, "wd33c93") , m_podule_rom(*this, "podule_rom") { } diff --git a/src/devices/bus/archimedes/podule/scsi_acorn.cpp b/src/devices/bus/archimedes/podule/scsi_acorn.cpp index 200ea497466..b9ad0607f09 100644 --- a/src/devices/bus/archimedes/podule/scsi_acorn.cpp +++ b/src/devices/bus/archimedes/podule/scsi_acorn.cpp @@ -42,7 +42,7 @@ protected: arc_scsi_aka30_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_wd33c93(*this, "scsi:7:wd33c93a") + , m_wd33c93(*this, "wd33c93a") , m_dmac(*this, "dma") , m_podule_rom(*this, "podule_rom") , m_memory_page(0) @@ -177,7 +177,7 @@ const tiny_rom_entry *arc_scsi_aka32_device::device_rom_region() const void arc_scsi_aka30_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -185,13 +185,11 @@ void arc_scsi_aka30_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93a", WD33C93A).clock(DERIVED_CLOCK(1, 1)) - .machine_config([this](device_t *device) - { - wd33c93a_device &wd33c93(downcast(*device)); - wd33c93.irq_cb().set([this](int state) { m_sbic_int = state; update_interrupts(); }); - wd33c93.drq_cb().set([this](int state) { m_dmac->dmarq(state, 0); }); - }); + + WD33C93A(config, m_wd33c93, DERIVED_CLOCK(1, 1)); + scsi.set_external_device(7, m_wd33c93); + m_wd33c93->irq_cb().set([this](int state) { m_sbic_int = state; update_interrupts(); }); + m_wd33c93->drq_cb().set([this](int state) { m_dmac->dmarq(state, 0); }); UPD71071(config, m_dmac, 0); m_dmac->set_cpu_tag(":maincpu"); diff --git a/src/devices/bus/archimedes/podule/scsi_cumana.cpp b/src/devices/bus/archimedes/podule/scsi_cumana.cpp index 226ffe2bdfd..f09a4b5f78d 100644 --- a/src/devices/bus/archimedes/podule/scsi_cumana.cpp +++ b/src/devices/bus/archimedes/podule/scsi_cumana.cpp @@ -88,7 +88,7 @@ const tiny_rom_entry *arc_scsi_cumana_device::device_rom_region() const void arc_scsi_cumana_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -96,11 +96,10 @@ void arc_scsi_cumana_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("dp8490", DP8490) // DP8490N - .machine_config([this](device_t *device) - { - downcast(*device).irq_handler().set([this](int state) { set_pirq(state); }); - }); + + DP8490(config, m_dp8490); + scsi.set_external_device(7, m_dp8490); + m_dp8490->irq_handler().set([this](int state) { set_pirq(state); }); EEPROM_93C06_16BIT(config, m_eeprom); } @@ -117,7 +116,7 @@ void arc_scsi_cumana_device::device_add_mconfig(machine_config &config) arc_scsi_cumana_device::arc_scsi_cumana_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ARC_SCSI_CUMANA, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_dp8490(*this, "scsi:7:dp8490") + , m_dp8490(*this, "dp8490") , m_eeprom(*this, "eeprom") , m_podule_rom(*this, "podule_rom") , m_rom_page(0) diff --git a/src/devices/bus/archimedes/podule/scsi_ling.cpp b/src/devices/bus/archimedes/podule/scsi_ling.cpp index 0f9425f61e4..b208836174c 100644 --- a/src/devices/bus/archimedes/podule/scsi_ling.cpp +++ b/src/devices/bus/archimedes/podule/scsi_ling.cpp @@ -87,7 +87,7 @@ const tiny_rom_entry *arc_scsi_ling_device::device_rom_region() const void arc_scsi_ling_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -95,11 +95,9 @@ void arc_scsi_ling_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR5380) - .machine_config([this](device_t *device) - { - downcast(*device).irq_handler().set([this](int state) { set_pirq(state); }); - }); + NCR5380(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set([this](int state) { set_pirq(state); }); } @@ -114,7 +112,7 @@ void arc_scsi_ling_device::device_add_mconfig(machine_config &config) arc_scsi_ling_device::arc_scsi_ling_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ARC_SCSI_LING, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_ncr5380(*this, "scsi:7:ncr5380") + , m_ncr5380(*this, "ncr5380") , m_podule_rom(*this, "podule_rom") , m_rom_page(0) { diff --git a/src/devices/bus/archimedes/podule/scsi_morley.cpp b/src/devices/bus/archimedes/podule/scsi_morley.cpp index fa749fbae40..c64d41fca92 100644 --- a/src/devices/bus/archimedes/podule/scsi_morley.cpp +++ b/src/devices/bus/archimedes/podule/scsi_morley.cpp @@ -97,7 +97,7 @@ const tiny_rom_entry *arc_scsi_morley_device::device_rom_region() const void arc_scsi_morley_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -105,14 +105,12 @@ void arc_scsi_morley_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("esp216", NCR53CF94).clock(24_MHz_XTAL) // ESP216 - .machine_config([this](device_t *device) - { - ncr53c94_device &esp216(downcast(*device)); - esp216.set_busmd(ncr53c94_device::busmd_t::BUSMD_1); - esp216.irq_handler_cb().set([this](int state) { set_pirq(state); }); - //esp216.drq_handler_cb().set([this](int state) { m_drq_status = state; }); - }); + + NCR53CF94(config, m_esp216, 24_MHz_XTAL); // ESP216 + scsi.set_external_device(7, m_esp216); + m_esp216->set_busmd(ncr53c94_device::busmd_t::BUSMD_1); + m_esp216->irq_handler_cb().set([this](int state) { set_pirq(state); }); + //m_esp216->drq_handler_cb().set([this](int state) { m_drq_status = state; }); IDT7201(config, m_fifo_out); //m_fifo_out->hf_handler().set([this](int state) { set_irq(IRQ_FIFO_OUT, state); }); @@ -132,7 +130,7 @@ void arc_scsi_morley_device::device_add_mconfig(machine_config &config) arc_scsi_morley_device::arc_scsi_morley_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ARC_SCSI_MORLEY, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_esp216(*this, "scsi:7:esp216") + , m_esp216(*this, "esp216") , m_fifo_in(*this, "fifo_in") , m_fifo_out(*this, "fifo_out") , m_podule_rom(*this, "podule_rom") diff --git a/src/devices/bus/archimedes/podule/scsi_oak.cpp b/src/devices/bus/archimedes/podule/scsi_oak.cpp index 4e414d8e995..0aca6b11cfa 100644 --- a/src/devices/bus/archimedes/podule/scsi_oak.cpp +++ b/src/devices/bus/archimedes/podule/scsi_oak.cpp @@ -195,7 +195,7 @@ const tiny_rom_entry *arc_scsi_oak_device::device_rom_region() const void arc_scsi_oak_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -203,12 +203,11 @@ void arc_scsi_oak_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR5380) - .machine_config([this](device_t *device) - { - downcast(*device).irq_handler().set([this](int state) { m_irq_state = state; }); - downcast(*device).drq_handler().set([this](int state) { m_drq_state = state; }); - }); + + NCR5380(config, m_ncr5380); + scsi.set_external_device(7, m_ncr5380); + m_ncr5380->irq_handler().set([this](int state) { m_irq_state = state; }); + m_ncr5380->drq_handler().set([this](int state) { m_drq_state = state; }); EEPROM_93C06_16BIT(config, m_eeprom); } @@ -225,7 +224,7 @@ void arc_scsi_oak_device::device_add_mconfig(machine_config &config) arc_scsi_oak_device::arc_scsi_oak_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ARC_SCSI_OAK, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_ncr5380(*this, "scsi:7:ncr5380") + , m_ncr5380(*this, "ncr5380") , m_eeprom(*this, "eeprom") , m_podule_rom(*this, "podule_rom") , m_rom_page(0) diff --git a/src/devices/bus/archimedes/podule/scsi_vti.cpp b/src/devices/bus/archimedes/podule/scsi_vti.cpp index 0ca3aa526bd..fb04f6fb8b6 100644 --- a/src/devices/bus/archimedes/podule/scsi_vti.cpp +++ b/src/devices/bus/archimedes/podule/scsi_vti.cpp @@ -92,7 +92,7 @@ const tiny_rom_entry *arc_scsi_vti_device::device_rom_region() const void arc_scsi_vti_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); @@ -100,14 +100,12 @@ void arc_scsi_vti_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("fas216", NCR53CF94).clock(24.576_MHz_XTAL) // FAS216 - .machine_config([this](device_t *device) - { - ncr53c94_device &fas216(downcast(*device)); - fas216.set_busmd(ncr53c94_device::busmd_t::BUSMD_1); - fas216.irq_handler_cb().set([this](int state) { set_pirq(state); }); - fas216.drq_handler_cb().set([this](int state) { m_drq_status = state; }); - }); + + NCR53CF94(config, m_fas216, 24.576_MHz_XTAL); // FAS216 + scsi.set_external_device(7, m_fas216); + m_fas216->set_busmd(ncr53c94_device::busmd_t::BUSMD_1); + m_fas216->irq_handler_cb().set([this](int state) { set_pirq(state); }); + m_fas216->drq_handler_cb().set([this](int state) { m_drq_status = state; }); EEPROM_93C06_16BIT(config, m_eeprom); // 2600 b0 @@ -136,7 +134,7 @@ void arc_scsi_vti_device::device_add_mconfig(machine_config &config) arc_scsi_vti_device::arc_scsi_vti_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ARC_SCSI_VTI, tag, owner, clock) , device_archimedes_podule_interface(mconfig, *this) - , m_fas216(*this, "scsi:7:fas216") + , m_fas216(*this, "fas216") , m_eeprom(*this, "eeprom") , m_podule_rom(*this, "podule_rom") , m_rom_page(0) diff --git a/src/devices/bus/isa/aha1542b.cpp b/src/devices/bus/isa/aha1542b.cpp index ec0591163c6..9ac4a034e00 100644 --- a/src/devices/bus/isa/aha1542b.cpp +++ b/src/devices/bus/isa/aha1542b.cpp @@ -27,7 +27,7 @@ aha154x_device::aha154x_device(const machine_config &mconfig, device_type type, : device_t(mconfig, type, tag, owner, clock) , device_isa16_card_interface(mconfig, *this) , m_localcpu(*this, "localcpu") - , m_scsic(*this, "scsi:7:scsic") + , m_scsic(*this, "scsic") , m_fdc(*this, "fdc") , m_bios(*this, "bios") { @@ -379,18 +379,9 @@ ioport_constructor aha1542b_device::device_input_ports() const return INPUT_PORTS_NAME(aha1542b); } -void aha154x_device::scsic_config(device_t *device) -{ - device->set_clock(20_MHz_XTAL); - downcast(*device).int_cb().set_inputline("^^localcpu", I8085_RST65_LINE); - downcast(*device).breq_cb().set("^^dmaaic", FUNC(aic580_device::breq_w)); - downcast(*device).port_a_r_cb().set_ioport("^^SETUP"); - downcast(*device).port_b_r_cb().set_ioport("^^CONFIG"); -} - void aha154x_device::scsi_add(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -398,10 +389,15 @@ void aha154x_device::scsi_add(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", AIC6250) - .machine_config([this] (device_t *device) { scsic_config(device); }); + + AIC6250(config, m_scsic, 20_MHz_XTAL); + scsi.set_external_device(7, m_scsic); + m_scsic->int_cb().set_inputline(m_localcpu, I8085_RST65_LINE); + m_scsic->port_a_r_cb().set_ioport("SETUP"); + m_scsic->port_b_r_cb().set_ioport("CONFIG"); aic580_device &dmaaic(AIC580(config, "dmaaic", 20_MHz_XTAL)); + m_scsic->breq_cb().set(dmaaic, FUNC(aic580_device::breq_w)); dmaaic.bdin_callback().set(m_scsic, FUNC(aic6250_device::dma_r)); dmaaic.bdout_callback().set(m_scsic, FUNC(aic6250_device::dma_w)); dmaaic.back_callback().set(m_scsic, FUNC(aic6250_device::back_w)); @@ -409,8 +405,8 @@ void aha154x_device::scsi_add(machine_config &config) void aha1542a_device::device_add_mconfig(machine_config &config) { - i8085a_cpu_device &localcpu(I8085A(config, m_localcpu, 20_MHz_XTAL / 2)); - localcpu.set_addrmap(AS_PROGRAM, &aha1542a_device::i8085_map); + I8085A(config, m_localcpu, 20_MHz_XTAL / 2); + m_localcpu->set_addrmap(AS_PROGRAM, &aha1542a_device::i8085_map); generic_latch_8_device &fromhost(GENERIC_LATCH_8(config, "fromhost")); fromhost.data_pending_callback().set_inputline(m_localcpu, I8085_RST55_LINE); @@ -424,8 +420,8 @@ void aha1542a_device::device_add_mconfig(machine_config &config) void aha1542b_device::device_add_mconfig(machine_config &config) { - i8085a_cpu_device &localcpu(I8085A(config, m_localcpu, 20_MHz_XTAL / 2)); - localcpu.set_addrmap(AS_PROGRAM, &aha1542b_device::i8085_map); + I8085A(config, m_localcpu, 20_MHz_XTAL / 2); + m_localcpu->set_addrmap(AS_PROGRAM, &aha1542b_device::i8085_map); AIC565(config, m_busaic); m_busaic->hrst_callback().set_inputline(m_localcpu, INPUT_LINE_RESET); diff --git a/src/devices/bus/isa/aha1542b.h b/src/devices/bus/isa/aha1542b.h index a0ff55a93fd..aac4f891a9b 100644 --- a/src/devices/bus/isa/aha1542b.h +++ b/src/devices/bus/isa/aha1542b.h @@ -26,7 +26,6 @@ protected: void i8085_base_map(address_map &map) ATTR_COLD; void scsi_add(machine_config &config); - void scsic_config(device_t *device); required_device m_localcpu; required_device m_scsic; diff --git a/src/devices/bus/isa/aha174x.cpp b/src/devices/bus/isa/aha174x.cpp index 1b212fe6ae2..9fc66dcc121 100644 --- a/src/devices/bus/isa/aha174x.cpp +++ b/src/devices/bus/isa/aha174x.cpp @@ -72,7 +72,7 @@ void aha174x_device::hpc_map(address_map &map) { map(0x2000, 0x2003).rw(m_busaic, FUNC(aic565_device::local_r), FUNC(aic565_device::local_w)); map(0x4000, 0x4002).rw("bmic", FUNC(i82355_device::local_r), FUNC(i82355_device::local_w)); - map(0x5000, 0x500f).m("scsi:7:scsic", FUNC(aic6251a_device::map)); + map(0x5000, 0x500f).m("scsic", FUNC(aic6251a_device::map)); map(0x7000, 0x7000).w(m_fifo[0], FUNC(fifo7200_device::data_byte_w)); map(0x7001, 0x7001).w(m_fifo[1], FUNC(fifo7200_device::data_byte_w)); map(0x7002, 0x7002).r(m_fifo[0], FUNC(fifo7200_device::data_byte_r)); @@ -80,11 +80,6 @@ void aha174x_device::hpc_map(address_map &map) map(0x8000, 0xffff).rom().region("mcode", 0); } -void aha174x_device::scsic_config(device_t *device) -{ - device->set_clock(40_MHz_XTAL / 2); // divider not verified -} - void aha1740_device::device_add_mconfig(machine_config &config) { HPC46003(config, m_hpc, 40_MHz_XTAL / 2); @@ -100,7 +95,7 @@ void aha1740_device::device_add_mconfig(machine_config &config) IDT7201(config, m_fifo[0]); IDT7201(config, m_fifo[1]); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -108,8 +103,9 @@ void aha1740_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", AIC6251A) - .machine_config([this] (device_t *device) { scsic_config(device); }); + + auto &scsic(AIC6251A(config, "scsic", 40_MHz_XTAL / 2)); // divider not verified + scsi.set_external_device(7, scsic); } void aha1742a_device::device_add_mconfig(machine_config &config) @@ -127,7 +123,7 @@ void aha1742a_device::device_add_mconfig(machine_config &config) IDT7201(config, m_fifo[0]); IDT7201(config, m_fifo[1]); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -135,8 +131,9 @@ void aha1742a_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", AIC6251A) - .machine_config([this] (device_t *device) { scsic_config(device); }); + + auto &scsic(AIC6251A(config, "scsic", 40_MHz_XTAL / 2)); // divider not verified + scsi.set_external_device(7, scsic); N82077AA(config, m_fdc, 24_MHz_XTAL); } diff --git a/src/devices/bus/isa/aha174x.h b/src/devices/bus/isa/aha174x.h index 1320dd02e9c..33b8d1cd716 100644 --- a/src/devices/bus/isa/aha174x.h +++ b/src/devices/bus/isa/aha174x.h @@ -25,7 +25,6 @@ protected: virtual void device_start() override ATTR_COLD; void hpc_map(address_map &map) ATTR_COLD; - void scsic_config(device_t *device); required_device m_hpc; required_device m_busaic; diff --git a/src/devices/bus/isa/asc88.cpp b/src/devices/bus/isa/asc88.cpp index d809b4e4c8e..e2c2abf8531 100644 --- a/src/devices/bus/isa/asc88.cpp +++ b/src/devices/bus/isa/asc88.cpp @@ -26,7 +26,7 @@ DEFINE_DEVICE_TYPE(ASC88, asc88_device, "asc88", "ASC-88 SCSI Adapter") asc88_device::asc88_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, ASC88, tag, owner, clock) , device_isa8_card_interface(mconfig, *this) - , m_scsic(*this, "scsi:7:scsic") + , m_scsic(*this, "scsic") , m_eeprom(*this, "eeprom") , m_baseaddr(*this, "BASEADDR") , m_control(0) @@ -150,15 +150,9 @@ ioport_constructor asc88_device::device_input_ports() const return INPUT_PORTS_NAME(asc88); } -void asc88_device::scsic_config(device_t *device) -{ - downcast(*device).irq_handler().set("^^", FUNC(asc88_device::irq_w)); - downcast(*device).drq_handler().set("^^", FUNC(asc88_device::drq_w)); -} - void asc88_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -166,9 +160,11 @@ void asc88_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7", default_scsi_devices, "scsic", true) - .option_add_internal("scsic", NCR5380) - .machine_config([this] (device_t *device) { scsic_config(device); }); + + NCR5380(config, m_scsic); + scsi.set_external_device(7, m_scsic); + m_scsic->irq_handler().set(DEVICE_SELF, FUNC(asc88_device::irq_w)); + m_scsic->drq_handler().set(DEVICE_SELF, FUNC(asc88_device::drq_w)); EEPROM_93C06_16BIT(config, m_eeprom); // NMC9306N } diff --git a/src/devices/bus/isa/asc88.h b/src/devices/bus/isa/asc88.h index 7b1afe42033..f5f160380e3 100644 --- a/src/devices/bus/isa/asc88.h +++ b/src/devices/bus/isa/asc88.h @@ -38,8 +38,6 @@ private: void control_w(u8 data); u8 eeprom_r(); - void scsic_config(device_t *device); - required_device m_scsic; required_device m_eeprom; required_ioport m_baseaddr; diff --git a/src/devices/bus/isa/bt54x.cpp b/src/devices/bus/isa/bt54x.cpp index 167dd415647..c1b466c94c8 100644 --- a/src/devices/bus/isa/bt54x.cpp +++ b/src/devices/bus/isa/bt54x.cpp @@ -62,38 +62,18 @@ void bt54x_device::local_map(address_map &map) { map(0x00000, 0x01fff).ram(); //map(0x02000, 0x0201f).rw("busintf", FUNC(ncr86c05_device::local_read), FUNC(ncr86c05_device::local_write)); - map(0x02080, 0x0208f).m("scsi:7:scsic", FUNC(ncr53cf94_device::map)); + map(0x02080, 0x0208f).m("scsic", FUNC(ncr53cf94_device::map)); map(0x02180, 0x02180).r(FUNC(bt54x_device::local_status_r)); map(0xf8000, 0xfffff).rom().region("mpu", 0); } -void bt54x_device::asc_config(device_t *device) -{ - ncr53c94_device &asc = downcast(*device); - - asc.set_clock(25_MHz_XTAL); // not verified; perhaps selectable? (40 MHz XTAL also on board) - - asc.irq_handler_cb().set(m_mpu, FUNC(i80188_cpu_device::int0_w)); - //asc.drq_handler_cb().set("busintf", FUNC(ncr86c05_device::dma_req_w)); -} - -void bt54x_device::fsc_config(device_t *device) -{ - ncr53cf94_device &fsc = downcast(*device); - - fsc.set_clock(40_MHz_XTAL); - - fsc.irq_handler_cb().set(m_mpu, FUNC(i80188_cpu_device::int0_w)); // mostly polled on BT-545S - //fsc.drq_handler_cb().set("busintf", FUNC(ncr86c05_device::dma_req_w)); -} - void bt54x_device::fsc_base(machine_config &config) { //ncr86c05_device &busintf(NCR86C05(config, "busintf", 0)); //busintf.mint_callback().set(m_mpu, FUNC(i80188_cpu_device::int1_w)); - //busintf.dma_ack_callback().set("scsi:7:scsic", FUNC(ncr53cf94_device::dma_w)); + //busintf.dma_ack_callback().set("scsic", FUNC(ncr53cf94_device::dma_w)); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -101,9 +81,10 @@ void bt54x_device::fsc_base(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7", default_scsi_devices, "scsic", true) - .option_add_internal("scsic", NCR53CF94) // FAS216 - .machine_config([this] (device_t *device) { fsc_config(device); }); + auto &scsic(NCR53CF94(config, "scsic", 40_MHz_XTAL)); + scsi.set_external_device(7, scsic); + scsic.irq_handler_cb().set(m_mpu, FUNC(i80188_cpu_device::int0_w)); // mostly polled on BT-545S + //scsic.drq_handler_cb().set("busintf", FUNC(ncr86c05_device::dma_req_w)); } void bt542b_device::device_add_mconfig(machine_config &config) @@ -113,9 +94,9 @@ void bt542b_device::device_add_mconfig(machine_config &config) //ncr86c05_device &busintf(NCR86C05(config, "busintf", 0)); //busintf.mint_callback().set(m_mpu, FUNC(i80188_cpu_device::int1_w)); - //busintf.dma_ack_callback().set("scsi:7:scsic", FUNC(ncr53c94_device::dma_w)); + //busintf.dma_ack_callback().set("scsic", FUNC(ncr53c94_device::dma_w)); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -123,9 +104,11 @@ void bt542b_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7", default_scsi_devices, "scsic", true) - .option_add_internal("scsic", NCR53C94) - .machine_config([this] (device_t *device) { asc_config(device); }); + + auto &scsic(NCR53C94(config, "scsic", 25_MHz_XTAL)); + scsi.set_external_device(7, scsic); + scsic.irq_handler_cb().set(m_mpu, FUNC(i80188_cpu_device::int0_w)); + //scsic.drq_handler_cb().set("busintf", FUNC(ncr86c05_device::dma_req_w)); DP8473(config, m_fdc, 24_MHz_XTAL); } diff --git a/src/devices/bus/isa/bt54x.h b/src/devices/bus/isa/bt54x.h index 191bbd17193..33db3f0fd6b 100644 --- a/src/devices/bus/isa/bt54x.h +++ b/src/devices/bus/isa/bt54x.h @@ -28,8 +28,6 @@ protected: u8 local_status_r(); void local_map(address_map &map) ATTR_COLD; - void asc_config(device_t *device); - void fsc_config(device_t *device); void fsc_base(machine_config &config); required_device m_mpu; diff --git a/src/devices/bus/isa/ncr53c400.cpp b/src/devices/bus/isa/ncr53c400.cpp index 4146e5a8751..22395ec3f72 100644 --- a/src/devices/bus/isa/ncr53c400.cpp +++ b/src/devices/bus/isa/ncr53c400.cpp @@ -24,7 +24,7 @@ DEFINE_DEVICE_TYPE(ISA8_RT1000B, isa8_rt1000b_device, "rt1000b", " Rancho Techno isa8_rt1000b_device::isa8_rt1000b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, ISA8_RT1000B, tag, owner, clock) , device_isa8_card_interface(mconfig, *this) - , m_scsic(*this, "scsi:7:scsic") + , m_scsic(*this, "scsic") , m_config(*this, "CONFIG") { } @@ -37,7 +37,7 @@ void isa8_rt1000b_device::scsic_config(device_t *device) void isa8_rt1000b_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -45,9 +45,9 @@ void isa8_rt1000b_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7", default_scsi_devices, "scsic", true) - .option_add_internal("scsic", NCR53C80) - .machine_config([this] (device_t *device) { scsic_config(device); }); + + NCR53C80(config, m_scsic); + scsi.set_external_device(7, m_scsic); // EEPROM_93C06_16BIT(config, m_eeprom); } diff --git a/src/devices/bus/isa/tekram_dc820.cpp b/src/devices/bus/isa/tekram_dc820.cpp index 665e1642560..cdc01fb6b5c 100644 --- a/src/devices/bus/isa/tekram_dc820.cpp +++ b/src/devices/bus/isa/tekram_dc820.cpp @@ -108,7 +108,7 @@ void tekram_eisa_scsi_device::eeprom_w(u8 data) void tekram_eisa_scsi_device::common_map(address_map &map) { - map(0x10040, 0x1005f).m("scsi:7:scsic", FUNC(ncr53cf94_device::map)).umask16(0xff00); + map(0x10040, 0x1005f).m("scsic", FUNC(ncr53cf94_device::map)).umask16(0xff00); map(0x10068, 0x10068).rw(FUNC(tekram_eisa_scsi_device::latch_status_r), FUNC(tekram_eisa_scsi_device::int0_ack_w)); map(0x10069, 0x10069).r(FUNC(tekram_eisa_scsi_device::status_r)); map(0x1006a, 0x1006a).w(FUNC(tekram_eisa_scsi_device::misc_w)); @@ -154,7 +154,7 @@ u8 tekram_dc320b_device::status_r() void tekram_dc320b_device::mpu_map(address_map &map) { map(0x00000, 0x03fff).ram(); - map(0x08000, 0x0801f).m("scsi:7:scsic", FUNC(ncr53cf94_device::map)).umask16(0x00ff); + map(0x08000, 0x0801f).m("scsic", FUNC(ncr53cf94_device::map)).umask16(0x00ff); map(0x08001, 0x08001).r(m_cmdlatch, FUNC(generic_latch_8_device::read)); map(0x08080, 0x08085).rw("bmic", FUNC(i82355_device::local_r), FUNC(i82355_device::local_w)).umask16(0x00ff); map(0x08100, 0x08100).w(FUNC(tekram_dc320b_device::int0_ack_w)); @@ -178,7 +178,7 @@ void tekram_dc820_device::eeprom_w(u8 data) void tekram_dc820_device::mpu_map(address_map &map) { map(0x00000, 0x0ffff).ram(); - map(0x10000, 0x1001f).m("scsi:7:scsic", FUNC(ncr53cf94_device::map)).umask16(0x00ff); + map(0x10000, 0x1001f).m("scsic", FUNC(ncr53cf94_device::map)).umask16(0x00ff); map(0x10080, 0x10085).rw("bmic", FUNC(i82355_device::local_r), FUNC(i82355_device::local_w)).umask16(0x00ff); map(0x10104, 0x10104).w(m_hostlatch, FUNC(generic_latch_8_device::write)); map(0x10106, 0x10106).w(FUNC(tekram_dc820_device::int0_ack_w)); @@ -192,15 +192,9 @@ void tekram_dc820_device::mpu_map(address_map &map) map(0xf0000, 0xfffff).rom().region("firmware", 0); } -void tekram_eisa_scsi_device::scsic_config(device_t *device) -{ - device->set_clock(40_MHz_XTAL); - downcast(*device).irq_handler_cb().set(m_mpu, FUNC(i80186_cpu_device::int3_w)); -} - void tekram_eisa_scsi_device::scsi_add(machine_config &config) { - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -208,8 +202,10 @@ void tekram_eisa_scsi_device::scsi_add(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", NCR53CF94) // or Emulex FAS216 - .machine_config([this] (device_t *device) { scsic_config(device); }); + + auto &scsic(NCR53CF94(config, "scsic", 40_MHz_XTAL)); // or Emulex FAS216 + scsi.set_external_device(7, scsic); + scsic.irq_handler_cb().set(m_mpu, FUNC(i80186_cpu_device::int3_w)); } void tekram_dc320b_device::device_add_mconfig(machine_config &config) diff --git a/src/devices/bus/isa/ultra14f.cpp b/src/devices/bus/isa/ultra14f.cpp index 2dcb3652ec2..100d5e55694 100644 --- a/src/devices/bus/isa/ultra14f.cpp +++ b/src/devices/bus/isa/ultra14f.cpp @@ -32,7 +32,7 @@ void ultra14f_device::device_start() void ultra14f_device::uscpu_map(address_map &map) { map(0x000000, 0x007fff).rom().region("firmware", 0); - map(0x00e000, 0x00e00f).m("scsi:7:scsic", FUNC(ncr53cf94_device::map)); + map(0x00e000, 0x00e00f).m("scsic", FUNC(ncr53cf94_device::map)); map(0x3f8000, 0x3fffff).ram(); } @@ -47,7 +47,7 @@ void ultra14f_device::device_add_mconfig(machine_config &config) M68008FN(config, m_uscpu, 40_MHz_XTAL / 4); // custom-marked as USC080-5-10A m_uscpu->set_addrmap(AS_PROGRAM, &ultra14f_device::uscpu_map); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -55,8 +55,10 @@ void ultra14f_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", NCR53CF94) // Emulex FAS216 or similar custom-marked as USC060-6-40B - .machine_config([this] (device_t *device) { scsic_config(device); }); + + auto &scsic(NCR53CF94(config, "scsic", 40_MHz_XTAL)); // Emulex FAS216 or similar custom-marked as USC060-6-40B + scsi.set_external_device(7, scsic); + scsic.irq_handler_cb().set_inputline(m_uscpu, M68K_IRQ_1); DP8473(config, m_fdc, 24_MHz_XTAL); // custom-marked as USC020-1-24 } diff --git a/src/devices/bus/isa/ultra24f.cpp b/src/devices/bus/isa/ultra24f.cpp index 77d10fc0b67..abe6f093e8c 100644 --- a/src/devices/bus/isa/ultra24f.cpp +++ b/src/devices/bus/isa/ultra24f.cpp @@ -54,7 +54,7 @@ void ultra24f_device::uscpu_map(address_map &map) map(0x000000, 0x00ffff).rom().region("firmware", 0); map(0xa00000, 0xa00001).nopr(); map(0xff8001, 0xff8001).select(0x18).rw(FUNC(ultra24f_device::bmic_r), FUNC(ultra24f_device::bmic_w)); - map(0xff9000, 0xff901f).m("scsi:7:scsic", FUNC(ncr53cf94_device::map)).umask16(0x00ff); + map(0xff9000, 0xff901f).m("scsic", FUNC(ncr53cf94_device::map)).umask16(0x00ff); map(0xffc000, 0xffffff).ram(); } @@ -71,7 +71,7 @@ void ultra24f_device::device_add_mconfig(machine_config &config) I82355(config, m_bmic, 0); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -79,8 +79,10 @@ void ultra24f_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("scsic", NCR53CF94) // Emulex FAS216 - .machine_config([this] (device_t *device) { scsic_config(device); }); + + auto &scsic(NCR53CF94(config, "scsic", 40_MHz_XTAL)); + scsi.set_external_device(7, scsic); + //scsic.irq_handler_cb().set_inputline(m_uscpu, M68K_IRQ_1); DP8473(config, m_fdc, 24_MHz_XTAL); // custom-marked as USC020-1-24 } diff --git a/src/devices/bus/msx/cart/scsi.cpp b/src/devices/bus/msx/cart/scsi.cpp index 76c18787309..964252913d1 100644 --- a/src/devices/bus/msx/cart/scsi.cpp +++ b/src/devices/bus/msx/cart/scsi.cpp @@ -39,7 +39,7 @@ public: msx_cart_gouda_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, MSX_CART_GOUDA_SCSI, tag, owner, clock) , msx_cart_interface(mconfig, *this) - , m_wd33c93a(*this, "scsi:6:wd33c93a") + , m_wd33c93a(*this, "wd33c93a") { } virtual std::error_condition initialize_cartridge(std::string &message) override; @@ -56,14 +56,16 @@ private: void msx_cart_gouda_scsi_device::device_add_mconfig(machine_config &config) { - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi", 0)); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:6").option_set("wd33c93a", WD33C93A).clock(10_MHz_XTAL); + + WD33C93A(config, m_wd33c93a, 10_MHz_XTAL); + scsi.set_external_device(6, m_wd33c93a); } std::error_condition msx_cart_gouda_scsi_device::initialize_cartridge(std::string &message) diff --git a/src/devices/bus/pc98_cbus/lha201.cpp b/src/devices/bus/pc98_cbus/lha201.cpp index 88d2d45c04e..bfab22c733c 100644 --- a/src/devices/bus/pc98_cbus/lha201.cpp +++ b/src/devices/bus/pc98_cbus/lha201.cpp @@ -48,17 +48,11 @@ void lha201_device::device_add_mconfig(machine_config &config) pc9801_55_device::device_add_mconfig(config); // two xtals, 28 MHz (MX2) and 20 MHz (MX1) - NSCSI_CONNECTOR(config.replace(), "scsi:7").option_set("wdc", WD33C93B).machine_config( - [this](device_t *device) - { - wd33c9x_base_device &adapter = downcast(*device); - - // FIXME: check frequency select in wd core - adapter.set_clock(20'000'000 / 4); - adapter.irq_cb().set(*this, FUNC(lha201_device::scsi_irq_w)); - adapter.drq_cb().set(*this, FUNC(lha201_device::scsi_drq_w)); - } - ); + // FIXME: check frequency select in wd core + WD33C93B(config, m_wdc, 20'000'000 / 4); + m_scsi_bus->set_external_device(7, m_wdc); + m_wdc->irq_cb().set(DEVICE_SELF, FUNC(lha201_device::scsi_irq_w)); + m_wdc->drq_cb().set(DEVICE_SELF, FUNC(lha201_device::scsi_drq_w)); // 2x DS21S07A active terminators // uPD65641 gate array at IC1, chip labeled BMX-2 "REV 930701 9510WD005" diff --git a/src/devices/bus/pc98_cbus/pc9801_55.cpp b/src/devices/bus/pc98_cbus/pc9801_55.cpp index 8f7f67ab940..de309a6c8b7 100644 --- a/src/devices/bus/pc98_cbus/pc9801_55.cpp +++ b/src/devices/bus/pc98_cbus/pc9801_55.cpp @@ -34,7 +34,7 @@ pc9801_55_device::pc9801_55_device(const machine_config &mconfig, device_type ty , device_memory_interface(mconfig, *this) , device_pc98_cbus_slot_interface(mconfig, *this) , m_scsi_bus(*this, "scsi") - , m_wdc(*this, "scsi:7:wdc") + , m_wdc(*this, "wdc") // , m_space_io_config("io_regs", ENDIANNESS_LITTLE, 8, 8, 0, amap) , m_bios(*this, "bios") , m_dsw1(*this, "DSW1") @@ -127,19 +127,14 @@ void pc9801_55_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", pc98_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", pc98_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", pc98_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wdc", WD33C93A).machine_config( - [this](device_t *device) - { - wd33c9x_base_device &adapter = downcast(*device); - // 33C93 @ 8 MHz - // 33C93A @ 10 MHz - // 33C93B @ 20 MHz - adapter.set_clock(10'000'000); - adapter.irq_cb().set(*this, FUNC(pc9801_55_device::scsi_irq_w)); - adapter.drq_cb().set(*this, FUNC(pc9801_55_device::scsi_drq_w)); - } - ); + // 33C93 @ 8 MHz + // 33C93A @ 10 MHz + // 33C93B @ 20 MHz + WD33C93A(config, m_wdc, 10'000'000); + m_scsi_bus->set_external_device(7, m_wdc); + m_wdc->irq_cb().set(DEVICE_SELF, FUNC(pc9801_55_device::scsi_irq_w)); + m_wdc->drq_cb().set(DEVICE_SELF, FUNC(pc9801_55_device::scsi_drq_w)); } static INPUT_PORTS_START( pc9801_55 ) diff --git a/src/devices/bus/qbus/qtx.cpp b/src/devices/bus/qbus/qtx.cpp index b4e684577d1..4534b7e2b7c 100644 --- a/src/devices/bus/qbus/qtx.cpp +++ b/src/devices/bus/qbus/qtx.cpp @@ -34,7 +34,7 @@ qts1_device::qts1_device(const machine_config &mconfig, const char *tag, device_ , device_qbus_card_interface(mconfig, *this) , m_localcpu(*this, "localcpu") , m_mfp(*this, "mfp") - , m_asc(*this, "scsibus:7:asc") + , m_asc(*this, "asc") , m_dma_address(0) { } @@ -102,22 +102,6 @@ void qts1_device::fc7_map(address_map &map) map(0xffff5, 0xffff5).r(m_mfp, FUNC(mc68901_device::get_vector)); } -static void qtx_scsi_devices(device_slot_interface &device) -{ - default_scsi_devices(device); - device.option_add_internal("asc", NCR53C90A); -} - -void qts1_device::asc_config(device_t *device) -{ - ncr53c90a_device &adapter = downcast(*device); - - adapter.set_clock(20_MHz_XTAL); - - adapter.irq_handler_cb().set(m_mfp, FUNC(mc68901_device::i7_w)).invert(); - //adapter.drq_handler_cb().set(?); -} - void qts1_device::device_add_mconfig(machine_config &config) { M68008(config, m_localcpu, 20_MHz_XTAL / 2); // guess @@ -131,15 +115,18 @@ void qts1_device::device_add_mconfig(machine_config &config) m_mfp->out_so_cb().set("rs232", FUNC(rs232_port_device::write_txd)); m_mfp->out_irq_cb().set_inputline("localcpu", M68K_IRQ_2); // probably - NSCSI_BUS(config, "scsibus"); - NSCSI_CONNECTOR(config, "scsibus:0", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:1", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:2", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:3", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:4", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:5", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:6", qtx_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsibus:7", qtx_scsi_devices, "asc", true).set_option_machine_config("asc", [this] (device_t *device) { asc_config(device); }); + auto &scsi(NSCSI_BUS(config, "scsibus")); + NSCSI_CONNECTOR(config, "scsibus:0", default_scsi_devices, nullptr); + NSCSI_CONNECTOR(config, "scsibus:1", default_scsi_devices, nullptr); + NSCSI_CONNECTOR(config, "scsibus:2", default_scsi_devices, nullptr); + NSCSI_CONNECTOR(config, "scsibus:3", default_scsi_devices, nullptr); + NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr); + NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr); + NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, nullptr); + + NCR53C90A(config, m_asc, 20_MHz_XTAL); + scsi.set_external_device(7, m_asc); + m_asc->irq_handler_cb().set(m_mfp, FUNC(mc68901_device::i7_w)).invert(); rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal")); rs232.rxd_handler().set(m_mfp, FUNC(mc68901_device::si_w)); diff --git a/src/devices/bus/qbus/qtx.h b/src/devices/bus/qbus/qtx.h index ae48ecd7150..b5503730514 100644 --- a/src/devices/bus/qbus/qtx.h +++ b/src/devices/bus/qbus/qtx.h @@ -36,8 +36,6 @@ private: u8 io_status_r(); void channel_w(u8 data); - void asc_config(device_t *device); - void prg_map(address_map &map) ATTR_COLD; void fc7_map(address_map &map) ATTR_COLD; diff --git a/src/devices/bus/qbus/tdl12.cpp b/src/devices/bus/qbus/tdl12.cpp index 7556669fe01..f5c67a30a64 100644 --- a/src/devices/bus/qbus/tdl12.cpp +++ b/src/devices/bus/qbus/tdl12.cpp @@ -81,7 +81,7 @@ void tdl12_device::io_map(address_map &map) map(0x40, 0x40).rw(FUNC(tdl12_device::in40_r), FUNC(tdl12_device::out40_w)); map(0x70, 0x70).w(FUNC(tdl12_device::out70_w)); map(0x74, 0x74).w(FUNC(tdl12_device::out74_w)); - map(0x80, 0x87).m("scsi:7:ncr5380", FUNC(ncr5380_device::map)); + map(0x80, 0x87).m("ncr5380", FUNC(ncr5380_device::map)); } void tdl12_device::device_add_mconfig(machine_config &config) @@ -97,7 +97,7 @@ void tdl12_device::device_add_mconfig(machine_config &config) cio.pc_rd_cb().set("eeprom", FUNC(eeprom_serial_93cxx_device::do_read)).lshift(3); cio.pc_wr_cb().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)).bit(2); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr); @@ -105,9 +105,9 @@ void tdl12_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5380", NCR5380).machine_config([this](device_t *device) { - (void)this; - }); + + auto &ncr(NCR5380(config, "ncr5380")); + scsi.set_external_device(7, ncr); EEPROM_93C46_16BIT(config, "eeprom"); // NMC9346N } diff --git a/src/devices/bus/ti99/peb/scsicard.cpp b/src/devices/bus/ti99/peb/scsicard.cpp index 4ffe141aeb7..12879f03768 100644 --- a/src/devices/bus/ti99/peb/scsicard.cpp +++ b/src/devices/bus/ti99/peb/scsicard.cpp @@ -135,7 +135,7 @@ #define BUFFER "ram" #define PLD_TAG "pld" -#define CONTR_TAG "scsibus:7:controller" +#define CONTR_TAG "controller" #define SCSIBUS_TAG "scsibus" DEFINE_DEVICE_TYPE(TI99_WHTSCSI, bus::ti99::peb::whtech_scsi_card_device, "ti99_whtscsi", "Western Horizon Technologies SCSI host adapter") @@ -387,11 +387,11 @@ void whtech_scsi_card_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsibus:7").option_set("controller", NCR53C80).machine_config([this](device_t *device) { - ncr53c80_device &adapter = downcast(*device); - adapter.drq_handler().set(*this, FUNC(whtech_scsi_card_device::drq_w)); - adapter.irq_handler().set(*this, FUNC(whtech_scsi_card_device::irq_w)); - }); + + NCR53C80(config, m_controller); + m_scsibus->set_external_device(7, m_controller); + m_controller->drq_handler().set(DEVICE_SELF, FUNC(whtech_scsi_card_device::drq_w)); + m_controller->irq_handler().set(DEVICE_SELF, FUNC(whtech_scsi_card_device::irq_w)); } void whtech_scsi_card_device::device_start() diff --git a/src/devices/bus/vme/hcpu30.cpp b/src/devices/bus/vme/hcpu30.cpp index 2165a8c2c6d..8cde117126c 100644 --- a/src/devices/bus/vme/hcpu30.cpp +++ b/src/devices/bus/vme/hcpu30.cpp @@ -65,9 +65,9 @@ void vme_hcpu30_card_device::hcpu30_mem(address_map &map) map(0xfffff000, 0xfffff0ff).rw(FUNC(vme_hcpu30_card_device::dma_r), FUNC(vme_hcpu30_card_device::dma_w)); map(0xfffff100, 0xfffff11f).rw(FUNC(vme_hcpu30_card_device::irq_state_r), FUNC(vme_hcpu30_card_device::irq_mask_w)); map(0xfffff120, 0xfffff13f).rw(FUNC(vme_hcpu30_card_device::rtc_r), FUNC(vme_hcpu30_card_device::rtc_w)); - map(0xfffff200, 0xfffff2ff).rw("scsi:7:wd33c93", FUNC(wd33c93_device::indir_r), FUNC(wd33c93_device::indir_w)).umask32(0xffff0000); + map(0xfffff200, 0xfffff2ff).rw(m_scsi, FUNC(wd33c93_device::indir_r), FUNC(wd33c93_device::indir_w)).umask32(0xffff0000); map(0xfffff300, 0xfffff3ff).rw("duscc", FUNC(duscc68562_device::read), FUNC(duscc68562_device::write)); - map(0xfffff580, 0xfffff583).rw("scsi:7:wd33c93", FUNC(wd33c93_device::dma_r), FUNC(wd33c93_device::dma_w)).umask32(0xff000000); + map(0xfffff580, 0xfffff583).rw(m_scsi, FUNC(wd33c93_device::dma_r), FUNC(wd33c93_device::dma_w)).umask32(0xff000000); map(0xfffff600, 0xfffff6ff).unmaprw(); // LAN map(0xfffff700, 0xfffff7ff).m("floppy", FUNC(dp8473_device::map)); } @@ -197,19 +197,15 @@ void vme_hcpu30_card_device::device_add_mconfig(machine_config &config) rs232p2.rxd_handler().set(m_dusccterm, FUNC(duscc68562_device::rxb_w)); rs232p2.cts_handler().set(m_dusccterm, FUNC(duscc68562_device::ctsb_w)); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0").option_set("hd", NSCSI_HARDDISK); NSCSI_CONNECTOR(config, "scsi:1").option_set("hd", NSCSI_HARDDISK); NSCSI_CONNECTOR(config, "scsi:2").option_set("hd", NSCSI_HARDDISK); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93", WD33C93A).machine_config( - [this](device_t *device) - { - wd33c9x_base_device &wd33c93(downcast(*device)); - wd33c93.set_clock(16670000/4); // default internal divisor is 2 - wd33c93.irq_cb().set(*this, FUNC(vme_hcpu30_card_device::scsiirq_callback)).invert(); - wd33c93.drq_cb().set(*this, FUNC(vme_hcpu30_card_device::scsidrq_callback)); - }); + WD33C93A(config, m_scsi, 16670000/4); // default internal divisor is 2 + scsi.set_external_device(7, m_scsi); + m_scsi->irq_cb().set(DEVICE_SELF, FUNC(vme_hcpu30_card_device::scsiirq_callback)).invert(); + m_scsi->drq_cb().set(DEVICE_SELF, FUNC(vme_hcpu30_card_device::scsidrq_callback)); // schematics connect INT to IPL1, not DRQ; could be outdated DP8473(config, m_fdc, 24_MHz_XTAL); @@ -527,7 +523,7 @@ vme_hcpu30_card_device::vme_hcpu30_card_device(const machine_config &mconfig, de , device_vme_card_interface(mconfig, *this) , m_maincpu(*this, "maincpu") , m_dusccterm(*this, "duscc") - , m_scsi(*this, "scsi:7:wd33c93") + , m_scsi(*this, "wd33c93") , m_fdc(*this, "floppy") , m_floppy0(*this, "floppy:0") , m_floppy1(*this, "floppy:1") diff --git a/src/devices/bus/vme/mvme327a.cpp b/src/devices/bus/vme/mvme327a.cpp index dc64a89f85f..5bdae429b3a 100644 --- a/src/devices/bus/vme/mvme327a.cpp +++ b/src/devices/bus/vme/mvme327a.cpp @@ -29,7 +29,7 @@ vme_mvme327a_device::vme_mvme327a_device(machine_config const &mconfig, char con , m_pit(*this, "pit") , m_bim(*this, "bim") , m_fdc(*this, "fdc") - , m_scsi(*this, "scsi:7:wd33c93a") + , m_scsi(*this, "wd33c93a") , m_boot(*this, "boot") { } @@ -67,7 +67,6 @@ static void scsi_devices(device_slot_interface &device) { device.option_add("cdrom", NSCSI_CDROM); device.option_add("harddisk", NSCSI_HARDDISK); - device.option_add("wd33c93a", WD33C93A); } void vme_mvme327a_device::device_add_mconfig(machine_config &config) @@ -81,7 +80,7 @@ void vme_mvme327a_device::device_add_mconfig(machine_config &config) WD37C65C(config, m_fdc, 0); - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); @@ -89,15 +88,9 @@ void vme_mvme327a_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93a", WD33C93A).machine_config( - [] (device_t *device) - { - wd33c9x_base_device &wd33c93(downcast(*device)); - wd33c93.set_clock(10000000); - //wd33c93.irq_cb().set(*this, ...); - //wd33c93.drq_cb().set(*this, ...); - }); + WD33C93A(config, m_scsi, 10000000); + scsi.set_external_device(7, m_scsi); } void vme_mvme327a_device::cpu_mem(address_map &map) diff --git a/src/devices/bus/vme/mvme328.cpp b/src/devices/bus/vme/mvme328.cpp index 837031804d4..d4569548f92 100644 --- a/src/devices/bus/vme/mvme328.cpp +++ b/src/devices/bus/vme/mvme328.cpp @@ -45,7 +45,7 @@ vme_mvme328_device::vme_mvme328_device(machine_config const &mconfig, char const : device_t(mconfig, VME_MVME328, tag, owner, clock) , device_vme_card_interface(mconfig, *this) , m_cpu(*this, "cpu") - , m_scsi(*this, "scsi%u:7:mb87030", 0U) + , m_scsi(*this, "mb87030_%u", 0U) , m_bram(*this, "buffer_ram") , m_sw1(*this, "SW1") , m_led1(*this, "led1") @@ -165,7 +165,7 @@ void vme_mvme328_device::device_add_mconfig(machine_config &config) M68000(config, m_cpu, 24_MHz_XTAL / 2); // HD68HC000P12 m_cpu->set_addrmap(AS_PROGRAM, &vme_mvme328_device::cpu_mem); - NSCSI_BUS(config, "scsi0"); + auto &scsi0(NSCSI_BUS(config, "scsi0")); NSCSI_CONNECTOR(config, "scsi0:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:2", scsi_devices, nullptr, false); @@ -173,25 +173,21 @@ void vme_mvme328_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi0:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi0:7").option_set("mb87030", MB87030).machine_config( - [this](device_t *device) - { - mb87030_device &mb87030(downcast(*device)); - mb87030.set_clock(8'000'000); - mb87030.out_irq_callback().set( - [this](int state) - { - if (state) - m_sts |= 1U << 6; - else - m_sts &= ~(1U << 6); + MB87030(config, m_scsi[0], 8'000'000); + scsi0.set_external_device(7, m_scsi[0]); + m_scsi[0]->out_irq_callback().set( + [this](int state) + { + if (state) + m_sts |= 1U << 6; + else + m_sts &= ~(1U << 6); + + m_cpu->set_input_line(INPUT_LINE_IRQ6, state); + }); - m_cpu->set_input_line(INPUT_LINE_IRQ6, state); - }); - }); - - NSCSI_BUS(config, "scsi1"); + auto &scsi1(NSCSI_BUS(config, "scsi1")); NSCSI_CONNECTOR(config, "scsi1:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:2", scsi_devices, nullptr, false); @@ -199,23 +195,19 @@ void vme_mvme328_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi1:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi1:7").option_set("mb87030", MB87030).machine_config( - [this](device_t *device) - { - mb87030_device &mb87030(downcast(*device)); - mb87030.set_clock(8'000'000); - mb87030.out_irq_callback().set( - [this](int state) - { - if (state) - m_sts |= 1U << 5; - else - m_sts &= ~(1U << 5); - - m_cpu->set_input_line(INPUT_LINE_IRQ5, state); - }); - }); + MB87030(config, m_scsi[1], 8'000'000); + scsi1.set_external_device(7, m_scsi[1]); + m_scsi[1]->out_irq_callback().set( + [this](int state) + { + if (state) + m_sts |= 1U << 5; + else + m_sts &= ~(1U << 5); + + m_cpu->set_input_line(INPUT_LINE_IRQ5, state); + }); // TODO: VLSI VGC7224-0420 II-DMA-50M } diff --git a/src/devices/bus/vme/tp880v.cpp b/src/devices/bus/vme/tp880v.cpp index a32bdc352a5..81b8f6499e2 100644 --- a/src/devices/bus/vme/tp880v.cpp +++ b/src/devices/bus/vme/tp880v.cpp @@ -34,7 +34,7 @@ vme_tp880v_card_device::vme_tp880v_card_device(machine_config const &mconfig, ch , m_cio(*this, "cio%u", 0U) , m_dma(*this, "dma") , m_rtc(*this, "rtc") - , m_scsi(*this, "scsi:7:ncr53c90") + , m_scsi(*this, "ncr53c90") , m_duart(*this, "duart") , m_serial(*this, "serial%u", 0U) , m_ram(*this, "ram") @@ -104,7 +104,7 @@ void vme_tp880v_card_device::device_add_mconfig(machine_config &config) M48T02(config, m_rtc, 0); // MK40T02B-25 - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, "tape", false); @@ -112,15 +112,11 @@ void vme_tp880v_card_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c90", NCR53C90).machine_config( - [this](device_t *device) - { - ncr53c90_device &ncr53c90(downcast(*device)); - ncr53c90.set_clock(10'000'000); - ncr53c90.irq_handler_cb().set_inputline(m_ios, INPUT_LINE_IRQ2); - ncr53c90.drq_handler_cb().set(m_dma, FUNC(hd63450_device::drq0_w)); - }); + NCR53C90(config, m_scsi, 10'000'000); + scsi.set_external_device(7, m_scsi); + m_scsi->irq_handler_cb().set_inputline(m_ios, INPUT_LINE_IRQ2); + m_scsi->drq_handler_cb().set(m_dma, FUNC(hd63450_device::drq0_w)); SCN2681(config, m_duart, 3.6864_MHz_XTAL); m_duart->irq_cb().set_inputline(m_ios, INPUT_LINE_IRQ6); diff --git a/src/devices/bus/vme/tp881v.cpp b/src/devices/bus/vme/tp881v.cpp index ad2bcce3242..6f3fdec2fc4 100644 --- a/src/devices/bus/vme/tp881v.cpp +++ b/src/devices/bus/vme/tp881v.cpp @@ -36,7 +36,7 @@ vme_tp881v_card_device::vme_tp881v_card_device(machine_config const &mconfig, ch , m_mmu(*this, "mmu%u", 0U) , m_cio(*this, "cio%u", 0U) , m_rtc(*this, "rtc") - , m_scsi(*this, "scsi%u:7:ncr53c90a", 0U) + , m_scsi(*this, "ncr53c90a_%u", 0U) , m_net(*this, "net") , m_scc(*this, "scc%u", 0U) , m_scc_dma(*this, "scc_dma") @@ -79,7 +79,6 @@ static void scsi_devices(device_slot_interface &device) { device.option_add("cdrom", NSCSI_CDROM); device.option_add("harddisk", NSCSI_HARDDISK); - device.option_add("ncr53c90a", NCR53C90A); } void vme_tp881v_card_device::device_add_mconfig(machine_config &config) @@ -137,7 +136,7 @@ void vme_tp881v_card_device::device_add_mconfig(machine_config &config) M48T02(config, m_rtc, 0); - NSCSI_BUS(config, "scsi0", 0); + auto &scsi0(NSCSI_BUS(config, "scsi0")); NSCSI_CONNECTOR(config, "scsi0:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:2", scsi_devices, nullptr, false); @@ -145,17 +144,12 @@ void vme_tp881v_card_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi0:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi0:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi0:7").option_set("ncr53c90a", NCR53C90A).machine_config( - [this](device_t *device) - { - ncr53c90a_device &ncr53c90a(downcast(*device)); - ncr53c90a.set_clock(20'000'000); - ncr53c90a.irq_handler_cb().set(m_cio[0], FUNC(z8036_device::pa3_w)); - //ncr53c90a.drq_cb().set(*this, ...); - }); + NCR53C90A(config, m_scsi[0], 20'000'000); + scsi0.set_external_device(7, m_scsi[0]); + m_scsi[0]->irq_handler_cb().set(m_cio[0], FUNC(z8036_device::pa3_w)); - NSCSI_BUS(config, "scsi1", 0); + auto &scsi1(NSCSI_BUS(config, "scsi1")); NSCSI_CONNECTOR(config, "scsi1:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:2", scsi_devices, nullptr, false); @@ -163,15 +157,10 @@ void vme_tp881v_card_device::device_add_mconfig(machine_config &config) NSCSI_CONNECTOR(config, "scsi1:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi1:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi1:7").option_set("ncr53c90a", NCR53C90A).machine_config( - [this](device_t *device) - { - ncr53c90a_device &ncr53c90a(downcast(*device)); - ncr53c90a.set_clock(20'000'000); - ncr53c90a.irq_handler_cb().set(m_cio[0], FUNC(z8036_device::pa4_w)); - //ncr53c90a.drq_cb().set(*this, ...); - }); + NCR53C90A(config, m_scsi[1], 20'000'000); + scsi1.set_external_device(7, m_scsi[1]); + m_scsi[1]->irq_handler_cb().set(m_cio[0], FUNC(z8036_device::pa4_w)); I82596_BE32(config, m_net, 20'000'000); // A82596DX-25 m_net->out_irq_cb().set(m_cio[0], FUNC(z8036_device::pa1_w)); diff --git a/src/devices/machine/53c7xx.cpp b/src/devices/machine/53c7xx.cpp index f5cd79abf42..4bb18a21533 100644 --- a/src/devices/machine/53c7xx.cpp +++ b/src/devices/machine/53c7xx.cpp @@ -90,7 +90,6 @@ DEFINE_DEVICE_TYPE(NCR53C7XX, ncr53c7xx_device, "ncr537xx", "NCR 53C7xx SCSI") ncr53c7xx_device::ncr53c7xx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, NCR53C7XX, tag, owner, clock), nscsi_device_interface(mconfig, *this), - nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), device_execute_interface(mconfig, *this), m_icount(0), m_irq_handler(*this), diff --git a/src/devices/machine/53c7xx.h b/src/devices/machine/53c7xx.h index 2bf54a9b221..cccc4c68883 100644 --- a/src/devices/machine/53c7xx.h +++ b/src/devices/machine/53c7xx.h @@ -16,7 +16,7 @@ #include "machine/nscsi_bus.h" -class ncr53c7xx_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface, public device_execute_interface +class ncr53c7xx_device : public device_t, public nscsi_device_interface, public device_execute_interface { public: // construction/destruction diff --git a/src/devices/machine/cxd1185.cpp b/src/devices/machine/cxd1185.cpp index 2b1c9cc539c..c550cfb800d 100644 --- a/src/devices/machine/cxd1185.cpp +++ b/src/devices/machine/cxd1185.cpp @@ -45,7 +45,6 @@ ALLOW_SAVE_TYPE(cxd1185_device::state); cxd1185_device::cxd1185_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : device_t(mconfig, CXD1185, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_irq_out_cb(*this) , m_drq_out_cb(*this) , m_port_out_cb(*this) diff --git a/src/devices/machine/cxd1185.h b/src/devices/machine/cxd1185.h index cf0520af1c0..e08ec8f4047 100644 --- a/src/devices/machine/cxd1185.h +++ b/src/devices/machine/cxd1185.h @@ -11,7 +11,6 @@ class cxd1185_device : public device_t , public nscsi_device_interface - , public nscsi_slot_card_interface { public: cxd1185_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); diff --git a/src/devices/machine/ncr5385.cpp b/src/devices/machine/ncr5385.cpp index fd90803b0af..48a37088532 100644 --- a/src/devices/machine/ncr5385.cpp +++ b/src/devices/machine/ncr5385.cpp @@ -40,7 +40,6 @@ unsigned constexpr SCSI_SEL_TIMEOUT = 250'000'000; ncr5385_device::ncr5385_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : device_t(mconfig, NCR5385, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_int(*this) , m_dreq(*this) , m_int_state(false) diff --git a/src/devices/machine/ncr5385.h b/src/devices/machine/ncr5385.h index 61d1adb90ac..e8b69690d78 100644 --- a/src/devices/machine/ncr5385.h +++ b/src/devices/machine/ncr5385.h @@ -43,7 +43,6 @@ class ncr5385_device : public device_t , public nscsi_device_interface - , public nscsi_slot_card_interface { public: auto irq() { return m_int.bind(); } diff --git a/src/devices/machine/spifi3.cpp b/src/devices/machine/spifi3.cpp index c89e5229ce1..ed6b72a10e2 100644 --- a/src/devices/machine/spifi3.cpp +++ b/src/devices/machine/spifi3.cpp @@ -252,7 +252,6 @@ namespace spifi3_device::spifi3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : device_t(mconfig, SPIFI3, tag, owner, clock), nscsi_device_interface(mconfig, *this), - nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_even_fifo(), m_odd_fifo(), m_irq_handler(*this), diff --git a/src/devices/machine/spifi3.h b/src/devices/machine/spifi3.h index 9e78dfb7b4b..bd3b1d9722a 100644 --- a/src/devices/machine/spifi3.h +++ b/src/devices/machine/spifi3.h @@ -32,8 +32,7 @@ class spifi3_device : public device_t, - public nscsi_device_interface, - public nscsi_slot_card_interface + public nscsi_device_interface { public: spifi3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); diff --git a/src/devices/machine/wd33c9x.cpp b/src/devices/machine/wd33c9x.cpp index 47b24b85ac9..8ff02f2e37c 100644 --- a/src/devices/machine/wd33c9x.cpp +++ b/src/devices/machine/wd33c9x.cpp @@ -360,7 +360,6 @@ DEFINE_DEVICE_TYPE(WD33C93B, wd33c93b_device, "wd33c93b", "Western Digital WD33C wd33c9x_base_device::wd33c9x_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_addr{ 0 } , m_regs{ 0 } , m_command_length{ 0 } diff --git a/src/devices/machine/wd33c9x.h b/src/devices/machine/wd33c9x.h index b72e655fa60..6fea8be24cb 100644 --- a/src/devices/machine/wd33c9x.h +++ b/src/devices/machine/wd33c9x.h @@ -11,7 +11,7 @@ #include "machine/nscsi_bus.h" -class wd33c9x_base_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface +class wd33c9x_base_device : public device_t, public nscsi_device_interface { public: auto irq_cb() { return m_irq_cb.bind(); } diff --git a/src/mame/acorn/aa310.cpp b/src/mame/acorn/aa310.cpp index 787dfe41d7d..e318cb44d99 100644 --- a/src/mame/acorn/aa310.cpp +++ b/src/mame/acorn/aa310.cpp @@ -293,7 +293,7 @@ public: : aabase_state(mconfig, type, tag) , m_fdc(*this, "fdc") , m_floppy(*this, "fdc:%u", 0U) - , m_scsi(*this, "scsi:7:wd33c93a") + , m_scsi(*this, "wd33c93a") , m_centronics(*this, "centronics") , m_cent_data_out(*this, "cent_data_out") , m_cent_ctrl_out(*this, "cent_ctrl_out") @@ -1363,7 +1363,7 @@ void aa680_state::aa680(machine_config &config) rs232b.dsr_handler().set("scc", FUNC(scc8530_device::syncb_w)); // scsi 70MB HDD - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", default_scsi_devices, "harddisk", true); // Internal Hard Disc Drive NSCSI_CONNECTOR(config, "scsi:1", default_scsi_devices, nullptr, false); // External Hard Disc Drive #1 NSCSI_CONNECTOR(config, "scsi:2", default_scsi_devices, nullptr, false); // External Hard Disc Drive #2 @@ -1371,13 +1371,11 @@ void aa680_state::aa680(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", default_scsi_devices, nullptr, false); // External Hard Disc Drive #4 / Streamer #2 NSCSI_CONNECTOR(config, "scsi:5", default_scsi_devices, nullptr, false); // Streamer #1 NSCSI_CONNECTOR(config, "scsi:6", default_scsi_devices, nullptr, false); // Processor / Printer Device - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93a", WD33C93A).clock(96_MHz_XTAL / 12) - .machine_config([this](device_t *device) - { - wd33c93a_device &wd33c93(downcast(*device)); - wd33c93.irq_cb().set(m_ioc, FUNC(acorn_ioc_device::il3_w)); - //wd33c93.drq_cb().set(*this, FUNC(aa680_state::scsi_drq)); - }); + + WD33C93A(config, m_scsi, 96_MHz_XTAL / 12); + scsi.set_external_device(7, m_scsi); + m_scsi->irq_cb().set(m_ioc, FUNC(acorn_ioc_device::il3_w)); + //m_scsi->drq_cb().set(*this, FUNC(aa680_state::scsi_drq)); // expansion slots - 4-card backplane - pre-installed podules would make it a Technical Publishing System ARCHIMEDES_PODULE_SLOT(config, m_podule[0], m_exp, archimedes_exp_devices, nullptr); diff --git a/src/mame/act/victor9k.cpp b/src/mame/act/victor9k.cpp index 39d46b070f3..000b19bdf8f 100644 --- a/src/mame/act/victor9k.cpp +++ b/src/mame/act/victor9k.cpp @@ -109,7 +109,7 @@ public: m_kb(*this, KB_TAG), m_fdc(*this, "fdc"), m_scsibus(*this, "scsi"), - m_hdc(*this, "scsi:7:v9kdmaib"), + m_hdc(*this, "v9kdmaib"), m_centronics(*this, "centronics"), m_rs232a(*this, RS232_A_TAG), m_rs232b(*this, RS232_B_TAG), @@ -859,16 +859,12 @@ void victor9k_state::victor9k(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("v9kdmaib", VICTOR_9000_HDC).machine_config( - [this](device_t *device) - { - victor_9000_hdc_device &victor9k_hdc(downcast(*device)); - device->set_clock(15_MHz_XTAL / 3); - victor9k_hdc.irq_handler().append(m_pic, FUNC(pic8259_device::ir4_w)); - victor9k_hdc.dma_read().set(*this, FUNC(victor9k_state::hd_dma_r)); - victor9k_hdc.dma_write().set(*this, FUNC(victor9k_state::hd_dma_w)); - }); + VICTOR_9000_HDC(config, m_hdc, 15_MHz_XTAL / 3); + m_scsibus->set_external_device(7, m_hdc); + m_hdc->irq_handler().append(m_pic, FUNC(pic8259_device::ir4_w)); + m_hdc->dma_read().set(DEVICE_SELF, FUNC(victor9k_state::hd_dma_r)); + m_hdc->dma_write().set(DEVICE_SELF, FUNC(victor9k_state::hd_dma_w)); RAM(config, m_ram).set_default_size("128K").set_extra_options("128K,256K,512K,640K,768K,896K"); diff --git a/src/mame/act/victor9k_hdc.cpp b/src/mame/act/victor9k_hdc.cpp index 2b3e483bb2d..6ae126efdbd 100644 --- a/src/mame/act/victor9k_hdc.cpp +++ b/src/mame/act/victor9k_hdc.cpp @@ -27,7 +27,6 @@ victor_9000_hdc_device::victor_9000_hdc_device(const machine_config &mconfig, co victor_9000_hdc_device::victor_9000_hdc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock), nscsi_device_interface(mconfig, *this), - nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF), m_dma_r(*this, 0xff), m_dma_w(*this), m_irq_handler(*this), diff --git a/src/mame/act/victor9k_hdc.h b/src/mame/act/victor9k_hdc.h index daa6e9e1995..46c5b961b3a 100644 --- a/src/mame/act/victor9k_hdc.h +++ b/src/mame/act/victor9k_hdc.h @@ -7,7 +7,7 @@ #include "machine/nscsi_bus.h" -class victor_9000_hdc_device : public device_t, public nscsi_device_interface, public nscsi_slot_card_interface +class victor_9000_hdc_device : public device_t, public nscsi_device_interface { public: victor_9000_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/mame/akai/mpc3000.cpp b/src/mame/akai/mpc3000.cpp index 537181f2bf8..2e3d3f08031 100644 --- a/src/mame/akai/mpc3000.cpp +++ b/src/mame/akai/mpc3000.cpp @@ -218,7 +218,7 @@ void mpc3000_state::mpc3000_io_map(address_map &map) map(0x0020, 0x0020).w("hiledlatch", FUNC(hc259_device::write_nibble_d3)); map(0x0060, 0x006f).m(m_dsp, FUNC(l7a1045_sound_device::map)); map(0x0080, 0x0087).rw("dioexp", FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); - map(0x00a0, 0x00bf).m("scsi:7:spc", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0x00a0, 0x00bf).m("spc", FUNC(mb89352_device::map)).umask16(0x00ff); map(0x00c0, 0x00c7).rw("sio", FUNC(te7774_device::read_cs<0>), FUNC(te7774_device::write_cs<0>)).umask16(0x00ff); map(0x00c8, 0x00cf).rw("sio", FUNC(te7774_device::read_cs<1>), FUNC(te7774_device::write_cs<1>)).umask16(0x00ff); map(0x00d0, 0x00d7).rw("sio", FUNC(te7774_device::read_cs<2>), FUNC(te7774_device::write_cs<2>)).umask16(0x00ff); diff --git a/src/mame/akai/s3000.cpp b/src/mame/akai/s3000.cpp index b0191927e73..891dabdf541 100644 --- a/src/mame/akai/s3000.cpp +++ b/src/mame/akai/s3000.cpp @@ -310,7 +310,7 @@ void s3000_state::cd3000_io_map(address_map &map) void s3000_state::s3000xl_io_map(address_map &map) { - map(0x0000, 0x001f).m("scsi:6:spc", FUNC(mb89352_device::map)).umask16(0x00ff); + map(0x0000, 0x001f).m("spc", FUNC(mb89352_device::map)).umask16(0x00ff); map(0x0020, 0x0023).m(m_fdc, FUNC(upd72069_device::map)).umask16(0x00ff); map(0x0040, 0x0047).rw(m_klcs, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); map(0x0050, 0x0057).rw(m_klcs, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0x00ff); diff --git a/src/mame/bfm/bfm_cobra3.cpp b/src/mame/bfm/bfm_cobra3.cpp index ed5eac48bfb..188b10d0607 100644 --- a/src/mame/bfm/bfm_cobra3.cpp +++ b/src/mame/bfm/bfm_cobra3.cpp @@ -513,7 +513,7 @@ ROM_START( c3_rtime ) ROM_LOAD( "95004056.bin", 0x000000, 0x080000, CRC(24e8f9fb) SHA1(0d484a8f368b0f2140f148a1dc84db85a100af38) ) ROM_LOAD( "95004057.bin", 0x080000, 0x080000, CRC(f73c92d6) SHA1(08c7db2baccb703f99efb81f618719a7789ca564) ) - DISK_REGION("scsi:2:cdrom") + DISK_REGION("cdrom") DISK_IMAGE_READONLY( "95100302", 0, SHA1(20accfe236a0c85108cd2a205399ed8959f1a638) ) ROM_END @@ -535,7 +535,7 @@ ROM_START( c3_telly ) ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) ROM_LOAD( "telsndl", 0x0000, 0x080000, CRC(74996fbd) SHA1(90e46130dccf47be1fcfaf549e548cdd4883e59d) ) - DISK_REGION("scsi:2:cdrom") + DISK_REGION("cdrom") DISK_IMAGE_READONLY( "95100300", 0, SHA1(98905cbff24c576c58210d1d003f710fa7064762) ) ROM_END @@ -552,7 +552,7 @@ ROM_START( c3_tellyns ) ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) ROM_LOAD( "telsndl", 0x0000, 0x080000, CRC(74996fbd) SHA1(90e46130dccf47be1fcfaf549e548cdd4883e59d) ) - DISK_REGION("scsi:2:cdrom") + DISK_REGION("cdrom") DISK_IMAGE_READONLY( "95100301", 0, SHA1(dbce040a6fb7916a240d24e2207cf6e1b3f572e7) ) ROM_END @@ -569,7 +569,7 @@ ROM_START( c3_totp ) ROM_LOAD( "totpsnd.lhs", 0x000000, 0x080000, CRC(56a73136) SHA1(10656ede18de9432a8a728cc59d000b5b1bf0150) ) ROM_LOAD( "totpsnd.rhs", 0x080000, 0x080000, CRC(28d156ab) SHA1(ebf5c4e008015b9b56b3aa5228c05b8e298daa80) ) - DISK_REGION("scsi:2:cdrom") + DISK_REGION("cdrom") DISK_IMAGE_READONLY( "95100307", 0, SHA1(27ad1565f9a153fe71b72d9c597a6e3c3f13ded0) ) ROM_END @@ -581,7 +581,7 @@ ROM_START( c3_ppays ) ROM_REGION( 0x1000000, "ymz280b", ROMREGION_ERASE00 ) ROM_LOAD( "phrasesn.l", 0x0000, 0x080000, CRC(a436ccf8) SHA1(18c39aa2e68c32242e0de1347b25d4af44b84548) ) - DISK_REGION("scsi:2:cdrom") + DISK_REGION("cdrom") DISK_IMAGE_READONLY( "95100315", 0, SHA1(fc76d3ab5ff38c2dc4f06399f5399a1ae3c136e9) ) ROM_END diff --git a/src/mame/bfm/rastersp.cpp b/src/mame/bfm/rastersp.cpp index 7eab8ffa7e2..7684422fa06 100644 --- a/src/mame/bfm/rastersp.cpp +++ b/src/mame/bfm/rastersp.cpp @@ -65,6 +65,7 @@ public: , m_maincpu(*this, "maincpu") , m_dsp(*this, "dsp") , m_duart(*this, "duart") + , m_scsibus(*this, "scsibus") , m_dram(*this, "dram") , m_ldac(*this, "ldac") , m_rdac(*this, "rdac") @@ -96,6 +97,7 @@ protected: required_device m_maincpu; required_device m_dsp; required_device m_duart; + required_device m_scsibus; void update_irq(uint32_t which, uint32_t state); @@ -171,7 +173,6 @@ private: void upload_palette(uint32_t word1, uint32_t word2); IRQ_CALLBACK_MEMBER(irq_callback); nscsi_connector &add_rastersp_scsi_slot(machine_config &config, const char *tag, const char *default_slot); - static void ncr53c700_config(device_t *device); void cpu_map(address_map &map) ATTR_COLD; void dsp_map(address_map &map) ATTR_COLD; uint8_t interrupt_status_r(offs_t offset); @@ -1101,7 +1102,7 @@ void rastersp_state::cpu_map_base(address_map &map) { map(0x02200000, 0x022fffff).rw(FUNC(rastersp_state::nvram_r), FUNC(rastersp_state::nvram_w)).umask32(0x000000ff); map(0x02200800, 0x02200803).rw(FUNC(rastersp_state::interrupt_ctrl_r),FUNC(rastersp_state::interrupt_ctrl_w)); - map(0x02208000, 0x02208fff).rw("scsibus:7:ncr53c700", FUNC(ncr53c7xx_device::read), FUNC(ncr53c7xx_device::write)); + map(0x02208000, 0x02208fff).rw("ncr53c700", FUNC(ncr53c7xx_device::read), FUNC(ncr53c7xx_device::write)); map(0x0220e000, 0x0220e003).w(FUNC(rastersp_state::dpylist_w)); map(0xfff00000, 0xffffffff).bankrw("bank1");//was 3 } @@ -1425,16 +1426,6 @@ void rastersp_state::ncr53c700_write(offs_t offset, uint32_t data, uint32_t mem_ m_maincpu->space(AS_PROGRAM).write_dword(offset, data, mem_mask); } -void rastersp_state::ncr53c700_config(device_t *device) -{ - auto *state = device->subdevice(":"); - ncr53c7xx_device &scsictrl = downcast(*device); - scsictrl.set_clock(66'000'000); - scsictrl.irq_handler().set(*state, FUNC(rastersp_state::scsi_irq)); - scsictrl.host_read().set(*state, FUNC(rastersp_state::ncr53c700_read)); - scsictrl.host_write().set(*state, FUNC(rastersp_state::ncr53c700_write)); -} - void rastersp_state::rs_config_base(machine_config &config) { I486(config, m_maincpu, 33'330'000); @@ -1448,17 +1439,16 @@ void rastersp_state::rs_config_base(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - NSCSI_BUS(config, "scsibus", 0); + (NSCSI_BUS(config, m_scsibus)); + + auto &scsictrl(NCR53C7XX(config, "ncr53c700",66'000'000)); + m_scsibus->set_external_device(7, scsictrl); + scsictrl.irq_handler().set(DEVICE_SELF, FUNC(rastersp_state::scsi_irq)); + scsictrl.host_read().set(DEVICE_SELF, FUNC(rastersp_state::ncr53c700_read)); + scsictrl.host_write().set(DEVICE_SELF, FUNC(rastersp_state::ncr53c700_write)); WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_seconds(1)); - nscsi_connector &connector7(NSCSI_CONNECTOR(config, "scsibus:7", 0)); - connector7.option_add("harddisk", NSCSI_HARDDISK); - connector7.option_add_internal("ncr53c700", NCR53C7XX); - connector7.set_default_option("ncr53c700"); - connector7.set_fixed(true); - connector7.set_option_machine_config("ncr53c700", ncr53c700_config); - /* Video */ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_size(320, 240); @@ -1497,11 +1487,8 @@ void rastersp_state::rastersp(machine_config &config) m_dsp->set_addrmap(AS_PROGRAM, &rastersp_state::dsp_map); - nscsi_connector &connector0(NSCSI_CONNECTOR(config, "scsibus:0", 0)); - connector0.option_add("harddisk", NSCSI_HARDDISK); - connector0.option_add_internal("ncr53c700", NCR53C7XX); - connector0.set_default_option("harddisk"); - connector0.set_fixed(true); + auto &hd(NSCSI_HARDDISK(config, "harddisk")); + m_scsibus->set_external_device(0, hd); } @@ -1512,11 +1499,8 @@ void fbcrazy_state::fbcrazy(machine_config &config) m_dsp->set_addrmap(AS_PROGRAM, &fbcrazy_state::dsp_map); - nscsi_connector &connector3(NSCSI_CONNECTOR(config, "scsibus:3", 0)); - connector3.option_add("cdrom", NSCSI_CDROM); - connector3.option_add_internal("ncr53c700", NCR53C7XX); - connector3.set_default_option("cdrom"); - connector3.set_fixed(true); + auto &cdrom(NSCSI_CDROM(config, "cdrom")); + m_scsibus->set_external_device(3, cdrom); bacta_datalogger_device &bacta(BACTA_DATALOGGER(config, "bacta", 0)); @@ -1543,7 +1527,7 @@ ROM_START( rotr ) ROM_REGION(0x8000, "nvram", 0) /* Default NVRAM */ ROM_LOAD( "rotr.nv", 0x0000, 0x8000, CRC(62543517) SHA1(a4bf3431cdab956839bb155c4a8c140d30e5c7ec) ) - DISK_REGION( "scsibus:0:harddisk" ) + DISK_REGION( "harddisk" ) DISK_IMAGE( "rotr", 0, SHA1(d67d7feb52d8c7ba1d2a190a40d97e84871f2d80) ) ROM_END @@ -1559,7 +1543,7 @@ ROM_START( rotra ) ROM_REGION(0x8000, "nvram", 0) /* Default NVRAM */ ROM_LOAD( "rotr.nv", 0x0000, 0x8000, CRC(62543517) SHA1(a4bf3431cdab956839bb155c4a8c140d30e5c7ec) ) - DISK_REGION( "scsibus:0:harddisk" ) + DISK_REGION( "harddisk" ) DISK_IMAGE( "rotra", 0, SHA1(570d402e5e9bba123edf7dfa9db7a0e6bdb23823) ) ROM_END @@ -1593,7 +1577,7 @@ ROM_START( fbcrazy ) ROM_REGION(0x8000, "nvram", ROMREGION_ERASEFF ) - DISK_REGION( "scsibus:3:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "95100303", 0, SHA1(9ba47c96de27ec2bea9c6624d78d309b67705406) ) ROM_END diff --git a/src/mame/capcom/cps3.cpp b/src/mame/capcom/cps3.cpp index bdb99405b92..3ecc33e406d 100644 --- a/src/mame/capcom/cps3.cpp +++ b/src/mame/capcom/cps3.cpp @@ -2158,7 +2158,7 @@ void cps3_state::cps3_map(address_map &map) map(0x05110000, 0x05110003).lw32(NAME([this] (offs_t, u32) { m_maincpu->set_input_line(10, CLEAR_LINE); })); map(0x05120000, 0x05120003).lw32(NAME([this] (offs_t, u32) { m_maincpu->set_input_line(14, CLEAR_LINE); })); // ?? unused map(0x05130000, 0x05130003).lw32(NAME([this] (offs_t, u32) { m_maincpu->set_input_line(6, CLEAR_LINE); })); // ?? unused - map(0x05140000, 0x05140003).rw("scsi:7:wd33c93", FUNC(wd33c93_device::indir_r), FUNC(wd33c93_device::indir_w)).umask32(0x00ff00ff); + map(0x05140000, 0x05140003).rw("wd33c93", FUNC(wd33c93_device::indir_r), FUNC(wd33c93_device::indir_w)).umask32(0x00ff00ff); map(0x06000000, 0x067fffff).rw(FUNC(cps3_state::flash1_r), FUNC(cps3_state::flash1_w)); /* Flash ROMs simm 1 */ map(0x06800000, 0x06ffffff).rw(FUNC(cps3_state::flash2_r), FUNC(cps3_state::flash2_w)); /* Flash ROMs simm 2 */ @@ -2475,9 +2475,12 @@ void cps3_state::cps3(machine_config &config) m_maincpu->set_addrmap(AS_OPCODES, &cps3_state::decrypted_opcodes_map); m_maincpu->set_dma_kludge_callback(FUNC(cps3_state::dma_callback)); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:1").option_set("cdrom", NSCSI_CDROM); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93", WD33C93A).clock(10'000'000); + auto &scsi(NSCSI_BUS(config, "scsi")); + auto &cdrom(NSCSI_CDROM(config, "cdrom")); + scsi.set_external_device(1, cdrom); + + auto &wd33c93(WD33C93A(config, "wd33c93", 10'000'000)); + scsi.set_external_device(7, wd33c93); /* video hardware */ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); @@ -2577,7 +2580,7 @@ ROM_START( redearth ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "redearth_euro.29f400.u2", 0x000000, 0x080000, CRC(02e0f336) SHA1(acc37e830dfeb9674f5a0fb24f4cc23217ae4ff5) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-wzd-5", 0, SHA1(034c375c3f2f68723eef530b40da909a7be7b556) ) ROM_END @@ -2585,7 +2588,7 @@ ROM_START( redearthr1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "redearth_euro.29f400.u2", 0x000000, 0x080000, CRC(02e0f336) SHA1(acc37e830dfeb9674f5a0fb24f4cc23217ae4ff5) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-wzd-3", 0, SHA1(a6ff67093db6bc80ee5fc46e4300e0177b213a52) ) ROM_END @@ -2593,7 +2596,7 @@ ROM_START( warzard ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "warzard_japan.29f400.u2", 0x000000, 0x080000, CRC(f8e2f0c6) SHA1(93d6a986f44c211fff014e55681eca4d2a2774d6) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-wzd-5", 0, SHA1(034c375c3f2f68723eef530b40da909a7be7b556) ) ROM_END @@ -2601,7 +2604,7 @@ ROM_START( warzardr1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "warzard_japan.29f400.u2", 0x000000, 0x080000, CRC(f8e2f0c6) SHA1(93d6a986f44c211fff014e55681eca4d2a2774d6) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-wzd-3", 0, SHA1(a6ff67093db6bc80ee5fc46e4300e0177b213a52) ) ROM_END @@ -2610,7 +2613,7 @@ ROM_START( sfiii ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii_euro.29f400.u2", 0x000000, 0x080000, CRC(27699ddc) SHA1(d8b525cd27e584560b129598df31fd2c5b2a682a) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-sf3-3", 0, SHA1(20aa46f8ffeb235205dc95cfd8fba42c7d102355) ) ROM_END @@ -2618,7 +2621,7 @@ ROM_START( sfiiiu ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii_usa_region_b1.29f400.u2", 0x000000, 0x080000, CRC(fb172a8e) SHA1(48ebf59910f246835f7dc0c588da30f7a908072f) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-sf3-3", 0, SHA1(20aa46f8ffeb235205dc95cfd8fba42c7d102355) ) ROM_END @@ -2626,7 +2629,7 @@ ROM_START( sfiiia ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii_asia_region_bd.29f400.u2", 0x000000, 0x080000, CRC(cbd28de7) SHA1(9c15ecb73b9587d20850e62e8683930a45caa01b) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-sf3-3", 0, SHA1(20aa46f8ffeb235205dc95cfd8fba42c7d102355) ) ROM_END @@ -2634,7 +2637,7 @@ ROM_START( sfiiij ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii_japan.29f400.u2", 0x000000, 0x080000, CRC(74205250) SHA1(c3e83ace7121d32da729162662ec6b5285a31211) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-sf3-3", 0, SHA1(20aa46f8ffeb235205dc95cfd8fba42c7d102355) ) ROM_END @@ -2642,7 +2645,7 @@ ROM_START( sfiiih ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii_hispanic.29f400.u2", 0x000000, 0x080000, CRC(d2b3cd48) SHA1(00ebb270c24a66515c97e35331de54ff5358000e) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-sf3-3", 0, SHA1(20aa46f8ffeb235205dc95cfd8fba42c7d102355) ) ROM_END @@ -2651,7 +2654,7 @@ ROM_START( sfiii2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii2_usa.29f400.u2", 0x000000, 0x080000, CRC(75dd72e0) SHA1(5a12d6ea6734df5de00ecee6f9ef470749d2f242) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-3ga000", 0, SHA1(a0c11a5c3057dc1ad3962aa38adf95acb3430bec) ) ROM_END @@ -2659,7 +2662,7 @@ ROM_START( sfiii2j ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii2_japan.29f400.u2", 0x000000, 0x080000, CRC(faea0a3e) SHA1(a03cd63bcf52e4d57f7a598c8bc8e243694624ec) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-3ga000", 0, SHA1(a0c11a5c3057dc1ad3962aa38adf95acb3430bec) ) ROM_END @@ -2667,7 +2670,7 @@ ROM_START( sfiii2h ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii2_hispanic.29f400.u2", 0x000000, 0x080000, CRC(5c799526) SHA1(5a56345b500cd7e20d5fb6cabc791655c6ff4ed2) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-3ga000", 0, SHA1(a0c11a5c3057dc1ad3962aa38adf95acb3430bec) ) ROM_END @@ -2675,7 +2678,7 @@ ROM_START( jojo ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_euro.29f400.u2", 0x000000, 0x080000, CRC(513e40ec) SHA1(03b91f0fbd5be56d24feed4698c7543d4df07837) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-3", 0, SHA1(dc6e74b5e02e13f62cb8c4e234dd6061501e49c1) ) ROM_END @@ -2683,7 +2686,7 @@ ROM_START( jojor1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_euro.29f400.u2", 0x000000, 0x080000, CRC(513e40ec) SHA1(03b91f0fbd5be56d24feed4698c7543d4df07837) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-2", 0, SHA1(ce22d10f2b35a0e00f8d83642b97842c9b2327fa) ) ROM_END @@ -2691,7 +2694,7 @@ ROM_START( jojor2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_euro.29f400.u2", 0x000000, 0x080000, CRC(513e40ec) SHA1(03b91f0fbd5be56d24feed4698c7543d4df07837) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk000", 0, SHA1(a24e174aaaf47f98312a38129645026a613cd344) ) ROM_END @@ -2699,7 +2702,7 @@ ROM_START( jojou ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_usa.29f400.u2", 0x000000, 0x080000, CRC(8d40f7be) SHA1(2a4bd83db2f959c33b071e517941aa55a0f919c0) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-3", 0, SHA1(dc6e74b5e02e13f62cb8c4e234dd6061501e49c1) ) ROM_END @@ -2707,7 +2710,7 @@ ROM_START( jojour1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_usa.29f400.u2", 0x000000, 0x080000, CRC(8d40f7be) SHA1(2a4bd83db2f959c33b071e517941aa55a0f919c0) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-2", 0, SHA1(ce22d10f2b35a0e00f8d83642b97842c9b2327fa) ) ROM_END @@ -2715,7 +2718,7 @@ ROM_START( jojour2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_usa.29f400.u2", 0x000000, 0x080000, CRC(8d40f7be) SHA1(2a4bd83db2f959c33b071e517941aa55a0f919c0) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk000", 0, SHA1(a24e174aaaf47f98312a38129645026a613cd344) ) ROM_END @@ -2723,7 +2726,7 @@ ROM_START( jojoj ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_japan.29f400.u2", 0x000000, 0x080000, CRC(02778f60) SHA1(a167f9ebe030592a0cdb0c6a3c75835c6a43be4c) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-3", 0, SHA1(dc6e74b5e02e13f62cb8c4e234dd6061501e49c1) ) ROM_END @@ -2731,7 +2734,7 @@ ROM_START( jojojr1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_japan.29f400.u2", 0x000000, 0x080000, CRC(02778f60) SHA1(a167f9ebe030592a0cdb0c6a3c75835c6a43be4c) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-2", 0, SHA1(ce22d10f2b35a0e00f8d83642b97842c9b2327fa) ) ROM_END @@ -2739,7 +2742,7 @@ ROM_START( jojojr2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_japan.29f400.u2", 0x000000, 0x080000, CRC(02778f60) SHA1(a167f9ebe030592a0cdb0c6a3c75835c6a43be4c) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk000", 0, SHA1(a24e174aaaf47f98312a38129645026a613cd344) ) ROM_END @@ -2747,7 +2750,7 @@ ROM_START( jojoa ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_asia.29f400.u2", 0x000000, 0x080000, CRC(789aa72a) SHA1(afcefb963d7c103514585f4a6738b2deb5b7d27a) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-3", 0, SHA1(dc6e74b5e02e13f62cb8c4e234dd6061501e49c1) ) ROM_END @@ -2755,7 +2758,7 @@ ROM_START( jojoar1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_asia.29f400.u2", 0x000000, 0x080000, CRC(789aa72a) SHA1(afcefb963d7c103514585f4a6738b2deb5b7d27a) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk-2", 0, SHA1(ce22d10f2b35a0e00f8d83642b97842c9b2327fa) ) ROM_END @@ -2763,7 +2766,7 @@ ROM_START( jojoar2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojo_asia.29f400.u2", 0x000000, 0x080000, CRC(789aa72a) SHA1(afcefb963d7c103514585f4a6738b2deb5b7d27a) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjk000", 0, SHA1(a24e174aaaf47f98312a38129645026a613cd344) ) ROM_END @@ -2772,7 +2775,7 @@ ROM_START( sfiii3 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii3_euro.29f400.u2", 0x000000, 0x080000, CRC(30bbf293) SHA1(f094c2eeaf4f6709060197aca371a4532346bf78) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-33s-2", 0, SHA1(5a090956fc6d68e496ac42854199059898f2fe16) ) ROM_END @@ -2780,7 +2783,7 @@ ROM_START( sfiii3r1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii3_euro.29f400.u2", 0x000000, 0x080000, CRC(30bbf293) SHA1(f094c2eeaf4f6709060197aca371a4532346bf78) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-33s-1", 0, SHA1(92e146fea751404077919da91f4c5112742627ed) ) ROM_END @@ -2788,7 +2791,7 @@ ROM_START( sfiii3u ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii3_usa.29f400.u2", 0x000000, 0x080000, CRC(ecc545c1) SHA1(e39083820aae914fd8b80c9765129bedb745ceba) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-33s-2", 0, SHA1(5a090956fc6d68e496ac42854199059898f2fe16) ) ROM_END @@ -2796,7 +2799,7 @@ ROM_START( sfiii3ur1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii3_usa.29f400.u2", 0x000000, 0x080000, CRC(ecc545c1) SHA1(e39083820aae914fd8b80c9765129bedb745ceba) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-33s-1", 0, SHA1(92e146fea751404077919da91f4c5112742627ed) ) ROM_END @@ -2804,7 +2807,7 @@ ROM_START( sfiii3j ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii3_japan.29f400.u2", 0x000000, 0x080000, CRC(63f23d1f) SHA1(58559403c325454f8c8d3eb0f569a531aa22db26) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-33s-2", 0, SHA1(5a090956fc6d68e496ac42854199059898f2fe16) ) ROM_END @@ -2812,7 +2815,7 @@ ROM_START( sfiii3jr1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "sfiii3_japan.29f400.u2", 0x000000, 0x080000, CRC(63f23d1f) SHA1(58559403c325454f8c8d3eb0f569a531aa22db26) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-33s-1", 0, SHA1(92e146fea751404077919da91f4c5112742627ed) ) ROM_END @@ -2821,7 +2824,7 @@ ROM_START( jojobar1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojoba_euro.29f400.u2", 0x000000, 0x080000, CRC(63cc8800) SHA1(f0c7e6abb205a16dab7a114e017b193521071a4b) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjm-1", 0, SHA1(8628d3fa555fbd5f4121082e925c1834b76c5e65) ) ROM_END @@ -2829,7 +2832,7 @@ ROM_START( jojobajr1 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojoba_japan.29f400.u2", 0x000000, 0x080000, CRC(3085478c) SHA1(055eab1fc42816f370a44b17fd7e87ffcb10e8b7) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjm-1", 0, SHA1(8628d3fa555fbd5f4121082e925c1834b76c5e65) ) ROM_END @@ -2837,7 +2840,7 @@ ROM_START( jojobar2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojoba_euro.29f400.u2", 0x000000, 0x080000, CRC(63cc8800) SHA1(f0c7e6abb205a16dab7a114e017b193521071a4b) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjm-0", 0, SHA1(1651896d127dbf32af99175ae91227cd90675aaa) ) ROM_END @@ -2845,7 +2848,7 @@ ROM_START( jojobajr2 ) ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "jojoba_japan.29f400.u2", 0x000000, 0x080000, CRC(3085478c) SHA1(055eab1fc42816f370a44b17fd7e87ffcb10e8b7) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "cap-jjm-0", 0, SHA1(1651896d127dbf32af99175ae91227cd90675aaa) ) ROM_END @@ -4143,7 +4146,7 @@ ROM_START( cps3boot ) // for cart with standard SH2 ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "unicd-cps3_for_standard_sh2_v4", 0, SHA1(099c52bd38753f0f4876243e7aa87ca482a2dcb7) ) ROM_END @@ -4151,7 +4154,7 @@ ROM_START( cps3booto ) // for cart with standard SH2 ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "no-battery_multi-game_bootleg_cd_for_hd6417095_sh2", 0, SHA1(6057cc3ec7991c0c00a7ab9da6ac2f92c9fb1aed) ) ROM_END @@ -4159,7 +4162,7 @@ ROM_START( cps3booto2 ) // for cart with standard SH2 ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "no-battery_multi-game_bootleg_cd_for_hd6417095_sh2_older", 0, SHA1(123f2fcb0f3dd3d6b859e82a51d0127e46763776) ) ROM_END @@ -4167,7 +4170,7 @@ ROM_START( cps3bs32 ) // for cart with standard SH2 ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "sfiii_2nd_impact_converted_for_standard_sh2_v3", 0, SHA1(8f180d159e88042a1e819cefd39eef67f5e86e3d) ) ROM_END @@ -4175,7 +4178,7 @@ ROM_START( cps3bs32a ) // for cart with standard SH2 ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_hd6417095_sh2.u2", 0x000000, 0x080000, CRC(cb9bd5b0) SHA1(ea7ecb3deb69f5307a62d8f0d7d8e68d49013d07)) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "sfiii_2nd_impact_converted_for_standard_sh2_older", 0, SHA1(8a8e4138c3bf12435933ab9d9ace510513200843) ) // v1 or v2? ROM_END @@ -4183,7 +4186,7 @@ ROM_START( cps3boota ) // for cart with dead custom SH2 (or 2nd Impact CPU which ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_dead_security_cart.u2", 0x000000, 0x080000, CRC(0fd56fb3) SHA1(5a8bffc07eb7da73cf4bca6718df72e471296bfd) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "unicd-cps3_for_custom_sh2_v5", 0, SHA1(50a5b2845d3dd3de3bce15c4f1b58500db80cabe) ) ROM_END @@ -4191,7 +4194,7 @@ ROM_START( cps3bootao ) // for cart with dead custom SH2 (or 2nd Impact CPU whic ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_dead_security_cart.u2", 0x000000, 0x080000, CRC(0fd56fb3) SHA1(5a8bffc07eb7da73cf4bca6718df72e471296bfd) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "no-battery_multi-game_bootleg_cd_for_dead_security_cart", 0, SHA1(1ede2f1ba197ee787208358a13eae7185a5ae3b2) ) ROM_END @@ -4200,7 +4203,7 @@ ROM_START( cps3bootao2 ) // for cart with dead custom SH2 (or 2nd Impact CPU whi ROM_REGION32_BE( 0x080000, "bios", 0 ) ROM_LOAD( "no-battery_bios_29f400_for_dead_security_cart.u2", 0x000000, 0x080000, CRC(0fd56fb3) SHA1(5a8bffc07eb7da73cf4bca6718df72e471296bfd) ) - DISK_REGION( "scsi:1:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "no-battery_multi-game_bootleg_cd_for_dead_security_cart_older", 0, SHA1(4b0b673b45dac94da018576c0a7f8644653fc564) ) ROM_END diff --git a/src/mame/dec/dc7061.cpp b/src/mame/dec/dc7061.cpp index 5d2763fc5cb..ccee414af76 100644 --- a/src/mame/dec/dc7061.cpp +++ b/src/mame/dec/dc7061.cpp @@ -236,7 +236,6 @@ DEFINE_DEVICE_TYPE(DC7061, dc7061_device, "dc7061", "DEC DC7061 SII") dc7061_device::dc7061_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : device_t(mconfig, DC7061, tag, owner, clock) , nscsi_device_interface(mconfig, *this) - , nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF) , m_sys_int(*this) , m_dma_r(*this, 0) , m_dma_w(*this) diff --git a/src/mame/dec/dc7061.h b/src/mame/dec/dc7061.h index d33647bff42..53040c6da8b 100644 --- a/src/mame/dec/dc7061.h +++ b/src/mame/dec/dc7061.h @@ -11,7 +11,6 @@ class dc7061_device : public device_t , public nscsi_device_interface - , public nscsi_slot_card_interface { public: dc7061_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); diff --git a/src/mame/dec/kn01.cpp b/src/mame/dec/kn01.cpp index d371f6bedad..a26a14cb25f 100644 --- a/src/mame/dec/kn01.cpp +++ b/src/mame/dec/kn01.cpp @@ -77,7 +77,7 @@ public: , m_esar(*this, "esar") , m_rtc(*this, "rtc") , m_dz(*this, "dc7085") - , m_sii(*this, "scsi:6:sii") + , m_sii(*this, "sii") , m_lance(*this, "am79c90") , m_lk201(*this, "lk201") , m_screen(*this, "screen") @@ -482,20 +482,18 @@ void kn01_state::kn01(machine_config &config, XTAL clock) m_msr &= ~MSR_DSR3; }); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", dec_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", dec_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", dec_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:3", dec_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:4", dec_scsi_devices, "cdrom"); NSCSI_CONNECTOR(config, "scsi:5", dec_scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:6").option_set("sii", DC7061).clock(20_MHz_XTAL).machine_config( - [this](device_t *device) - { - dc7061_device &sii = downcast(*device); - sii.sys_int().set_inputline(m_cpu, INPUT_LINE_IRQ0); - }); + DC7061(config, m_sii, 20_MHz_XTAL); + scsi.set_external_device(6, m_sii); + m_sii->sys_int().set_inputline(m_cpu, INPUT_LINE_IRQ0); + NSCSI_CONNECTOR(config, "scsi:7", dec_scsi_devices, nullptr); config.set_default_layout(layout_kn01); diff --git a/src/mame/dg/aviion88k.cpp b/src/mame/dg/aviion88k.cpp index c374a27c1f3..da4eb1763c4 100644 --- a/src/mame/dg/aviion88k.cpp +++ b/src/mame/dg/aviion88k.cpp @@ -58,7 +58,7 @@ public: , m_async(*this, { "console_port", "seriala", "mouse_port", "serialb" }) , m_duscc(*this, "duscc") , m_scsibus(*this, "scsi") - , m_scsi(*this, "scsi:7:ncr53c700") + , m_scsi(*this, "ncr53c700") , m_speaker(*this, "speaker") , m_leds(*this, "CR%u", 1U) , m_mbus(*this, "mbus") @@ -276,7 +276,8 @@ void aviion88k_state::aviion_4600(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", aviion88k_scsi_devices, nullptr); // scsi host adapter (NCR53C700) - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c700", NCR53C7XX).clock(66'000'000); + NCR53C7XX(config, m_scsi, 66'000'000); + m_scsibus->set_external_device(7, m_scsi); // TODO: ethernet (AM79C900) diff --git a/src/mame/konami/konamigq.cpp b/src/mame/konami/konamigq.cpp index a2ca16aaea1..e190f551285 100644 --- a/src/mame/konami/konamigq.cpp +++ b/src/mame/konami/konamigq.cpp @@ -492,7 +492,7 @@ ROM_START( cryptklr ) ROM_REGION32_LE( 0x080000, "maincpu:rom", 0 ) /* bios */ ROM_LOAD( "420b03.27p", 0x0000000, 0x080000, CRC(aab391b1) SHA1(bf9dc7c0c8168c22a4be266fe6a66d3738df916b) ) - DISK_REGION( "scsi:0:harddisk" ) + DISK_REGION( "harddisk" ) DISK_IMAGE( "420uaa04", 0, SHA1(67cb1418fc0de2a89fc61847dc9efb9f1bebb347) ) ROM_END diff --git a/src/mame/konami/twinkle.cpp b/src/mame/konami/twinkle.cpp index d31915d7eb5..c4e3f1c7130 100644 --- a/src/mame/konami/twinkle.cpp +++ b/src/mame/konami/twinkle.cpp @@ -1367,7 +1367,7 @@ ROM_START( bmiidx ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "863a02", 0x000000, 0x000224, BAD_DUMP CRC(078be99f) SHA1(7def88d18a9250a8e4b54a51bf663161676cd9be) ) - DISK_REGION( "scsi:4:cdrom" ) // program + DISK_REGION( "cdrom" ) // program DISK_IMAGE_READONLY( "gq863-jab01", 0, SHA1(331f80b40ed560c7e017621b7daeeb8275d92b9a) ) DISK_REGION( "cdrom1" ) // video CD @@ -1383,7 +1383,7 @@ ROM_START( bmiidxa ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "863a02", 0x000000, 0x000224, BAD_DUMP CRC(078be99f) SHA1(7def88d18a9250a8e4b54a51bf663161676cd9be) ) - DISK_REGION( "scsi:4:cdrom" ) // program + DISK_REGION( "cdrom" ) // program DISK_IMAGE_READONLY( "gq863a01", 0, SHA1(07fc467f6500504729becbaf77dabc093a134e65) ) DISK_REGION( "cdrom1" ) // video CD @@ -1399,7 +1399,7 @@ ROM_START( bmiidx2 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "985a02", 0x000000, 0x000100, CRC(059c1f99) SHA1(f094a12c9a56d351667746a765804c94cb3f96bb) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gc985a01", 0, SHA1(0b783f11317f64552ebf3323459139529e7f315f) ) DISK_REGION( "cdrom1" ) // video CD @@ -1415,7 +1415,7 @@ ROM_START( bmiidx3 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "992a02", 0x000000, 0x000100, CRC(92520992) SHA1(c4a47dd0e805807df0f086fd9602c000fe2baa61) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gc992-jac01", 0, SHA1(c02d6e58439be678ec0d7171eae2dfd53a21acc7) ) DISK_REGION( "cdrom1" ) // video CD @@ -1431,7 +1431,7 @@ ROM_START( bmiidx3b ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "992a02", 0x000000, 0x000100, CRC(92520992) SHA1(c4a47dd0e805807df0f086fd9602c000fe2baa61) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gc992-jab01", 0, SHA1(7a5bc08e5723c2705fb7954a8bb727f96514ec2e) ) DISK_REGION( "cdrom1" ) // video CD @@ -1447,7 +1447,7 @@ ROM_START( bmiidx3a ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "992a02", 0x000000, 0x000100, CRC(92520992) SHA1(c4a47dd0e805807df0f086fd9602c000fe2baa61) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gc992-jaa01", 0, SHA1(d86dab5c8130859e73a3e2936b7fd6231e1c025d) ) DISK_REGION( "cdrom1" ) // video CD @@ -1463,7 +1463,7 @@ ROM_START( bmiidx4 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "a03", 0x000000, 0x000100, CRC(9ccf71f9) SHA1(01c4060ac6e2cdc156c034797ea2e305cbbc31ef) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "a03jaa01", 0, SHA1(f54fc778c2187ccd950402a159babef956b71492) ) DISK_REGION( "cdrom1" ) // video CD @@ -1479,7 +1479,7 @@ ROM_START( bmiidx5 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "a17", 0x000000, 0x000100, CRC(70ae9983) SHA1(de0b9ce8ca09e794a35722737958fa7ee6eef6ce) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "a17jaa01", 0, SHA1(5ac46973b42b2c66ae63297d1a7fd69b33ef4d1d) ) DISK_REGION( "cdrom1" ) // video CD @@ -1495,7 +1495,7 @@ ROM_START( bmiidx6 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "b4u", 0x000000, 0x000100, CRC(5c134715) SHA1(2bc40388c5e2d54e99e9fdfd63216820b5c939c0) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "b4ujab01", 0, SHA1(aaae77f473c4a44ce6838da3ef6dab27e4afa0e4) ) DISK_REGION( "cdrom1" ) // DVD @@ -1511,7 +1511,7 @@ ROM_START( bmiidx6a ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "b4u", 0x000000, 0x000100, CRC(5c134715) SHA1(2bc40388c5e2d54e99e9fdfd63216820b5c939c0) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "b4ujaa01", 0, SHA1(22589f2a2b421e910d8dc3d98b375d7939a94921) ) DISK_REGION( "cdrom1" ) // DVD @@ -1527,7 +1527,7 @@ ROM_START( bmiidx7 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "b44", 0x000000, 0x000100, CRC(fb6aaa40) SHA1(7a93a8b69d71c2e448d176a6a9d175a01bd8a5f1) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "b44jab01", 0, SHA1(f04411b2c7a671dc9544635b187db7a5f3eae6aa) ) DISK_REGION( "cdrom1" ) // DVD @@ -1543,7 +1543,7 @@ ROM_START( bmiidx7a ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "b44", 0x000000, 0x000100, CRC(fb6aaa40) SHA1(7a93a8b69d71c2e448d176a6a9d175a01bd8a5f1) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "b44jaa01", 0, SHA1(57fb0312d8102e959658e48a97e46aa16e592b60) ) DISK_REGION( "cdrom1" ) // DVD @@ -1559,7 +1559,7 @@ ROM_START( bmiidx8 ) ROM_REGION( 0x100, "security", 0 ) ROM_LOAD( "c44", 0x000000, 0x000100, CRC(3afc8048) SHA1(36cf01288a5ca4f03060de44a89472650e9f8dcc) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "c44jaa01", 0, SHA1(dd2aeb925182ed75ade510ca3a0f913d667a2be2) ) DISK_REGION( "cdrom1" ) // DVD @@ -1575,7 +1575,7 @@ ROM_START( bmiidxc ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "863a02", 0x000000, 0x000224, BAD_DUMP CRC(078be99f) SHA1(7def88d18a9250a8e4b54a51bf663161676cd9be) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "896jabbm", 0, SHA1(09fb638bc5b3e64af13ae3df66ba25e490440946) ) DISK_REGION( "cdrom1" ) // video CD, same as bmiidx @@ -1591,7 +1591,7 @@ ROM_START( bmiidxca ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "863a02", 0x000000, 0x000224, BAD_DUMP CRC(078be99f) SHA1(7def88d18a9250a8e4b54a51bf663161676cd9be) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "896jaabm", 0, SHA1(ea7205f86543d9273efcc226666ab530c32b23c1) ) DISK_REGION( "cdrom1" ) // video CD, same as bmiidx @@ -1607,7 +1607,7 @@ ROM_START( bmiidxs ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "983a02", 0x000000, 0x000224, BAD_DUMP CRC(6a6ace82) SHA1(1e1373f40c469c117316c03db414d9984567dd42) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gc983a01", 0, SHA1(7a80380f9c18c7da9643e0b9954ad8367eda5948) ) DISK_REGION( "cdrom1" ) // video CD @@ -1623,7 +1623,7 @@ ROM_START( bmiidxsa ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "983aa02", 0x000000, 0x000224, BAD_DUMP CRC(bcc8965c) SHA1(e152d19a92544212e321a332c6e6678d623dab21) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "gc983aa,a01", 0, SHA1(9ef5725fc79a7f4f524ef93849af42b2758102cd) ) DISK_REGION( "cdrom1" ) // video CD @@ -1639,7 +1639,7 @@ ROM_START( bmiidxc2 ) ROM_REGION( 0x224, "security", 0 ) ROM_LOAD( "984a02", 0x000000, 0x000224, BAD_DUMP CRC(786db814) SHA1(722c709d95d54cd519856ddea64b9176ef191b0d) ) - DISK_REGION( "scsi:4:cdrom" ) + DISK_REGION( "cdrom" ) DISK_IMAGE_READONLY( "ge984a01,bm", 0, SHA1(03b083ba09652dfab6f328000c3c9de2a7a4e618) ) DISK_REGION( "cdrom1" ) // video CD, same as bmiidxs diff --git a/src/mame/natsemi/icm3216.cpp b/src/mame/natsemi/icm3216.cpp index d810bc96ae3..4df74ed8c1b 100644 --- a/src/mame/natsemi/icm3216.cpp +++ b/src/mame/natsemi/icm3216.cpp @@ -60,7 +60,7 @@ public: , m_duart(*this, "duart%u", 0U) , m_serial(*this, "serial%u", 0U) , m_iop(*this, "iop") - , m_scsi(*this, "scsi:7:ncr5385") + , m_scsi(*this, "ncr5385") , m_led(*this, "led%u", 1U) , m_boot(*this, "boot") { @@ -322,7 +322,7 @@ void icm3216_state::icm3216(machine_config &config) m_iop->set_addrmap(AS_IO, &icm3216_state::iop_pio_map); m_iop->set_irq_acknowledge_callback(FUNC(icm3216_state::iop_ack)); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); @@ -330,16 +330,11 @@ void icm3216_state::icm3216(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5385", NCR5385).machine_config( - [this](device_t *device) - { - ncr5385_device &ncr5385(downcast(*device)); - ncr5385.set_clock(10'000'000); - - ncr5385.irq().set(*this, FUNC(icm3216_state::iop_int<2>)); - ncr5385.dreq().set_inputline(m_iop, INPUT_LINE_NMI); - }); + NCR5385(config, m_scsi, 10'000'000); + scsi.set_external_device(7, m_scsi); + m_scsi->irq().set(DEVICE_SELF, FUNC(icm3216_state::iop_int<2>)); + m_scsi->dreq().set_inputline(m_iop, INPUT_LINE_NMI); } void icm3216_state::parity_select_w(u8 data) diff --git a/src/mame/quantel/harriet.cpp b/src/mame/quantel/harriet.cpp index ae571f15baf..67f0cfc7e23 100644 --- a/src/mame/quantel/harriet.cpp +++ b/src/mame/quantel/harriet.cpp @@ -64,7 +64,7 @@ void harriet_state::harriet_map(address_map &map) map(0xf10000, 0xf1001f).rw("duart", FUNC(mc68681_device::read), FUNC(mc68681_device::write)).umask16(0x00ff); map(0xf20000, 0xf2002f).rw("mfp", FUNC(mc68901_device::read), FUNC(mc68901_device::write)).umask16(0x00ff); map(0xf30000, 0xf301ff).rw("dmac", FUNC(hd63450_device::read), FUNC(hd63450_device::write)); - map(0xf40000, 0xf4003f).rw("scsia:7:wdc", FUNC(wd33c93_device::dir_r), FUNC(wd33c93_device::dir_w)).umask16(0x00ff); + map(0xf40000, 0xf4003f).rw("wdc", FUNC(wd33c93_device::dir_r), FUNC(wd33c93_device::dir_w)).umask16(0x00ff); //map(0xf60000, 0xf60007).rw("c012", FUNC(imsc012_device::read), FUNC(imsc012_device::write)).umask16(0x00ff); map(0xf60006, 0xf60007).nopr(); map(0xfa0000, 0xfa0001).nopr(); @@ -119,8 +119,9 @@ void harriet_state::harriet(machine_config &config) rs232.rxd_handler().append("mfp", FUNC(mc68901_device::tbi_w)); rs232.set_option_device_input_defaults("terminal", terminal_defaults); - NSCSI_BUS(config, "scsia"); - NSCSI_CONNECTOR(config, "scsia:7").option_set("wdc", WD33C93A).clock(40_MHz_XTAL / 4); + auto &scsi(NSCSI_BUS(config, "scsia")); + auto &wdc(WD33C93A(config, "wdc", 40_MHz_XTAL / 4)); + scsi.set_external_device(7, wdc); //WD33C93(config, "wdcb", 40_MHz_XTAL / 4); //IMSC012(config, "c012", 40_MHz_XTAL / 8); // INMOS IMSC012-P20S link adaptor diff --git a/src/mame/rolm/r9751.cpp b/src/mame/rolm/r9751.cpp index d361262617c..6b4bf5ff447 100644 --- a/src/mame/rolm/r9751.cpp +++ b/src/mame/rolm/r9751.cpp @@ -90,7 +90,7 @@ public: m_maincpu(*this, "maincpu"), m_pdc(*this, "pdc"), m_smioc(*this, "smioc"), - m_wd33c93(*this, "scsi:7:wd33c93"), + m_wd33c93(*this, "wd33c93"), m_main_ram(*this, "main_ram") { device_trace_init(); @@ -968,13 +968,6 @@ void r9751_state::scsi_devices(device_slot_interface &device) device.option_add("harddisk", NSCSI_HARDDISK); } -void r9751_state::wd33c93(device_t *device) -{ - device->set_clock(10000000); - // downcast(device)->irq_cb().set(*this, FUNC(r9751_state::scsi_irq_w)); - // downcast(device)->drq_cb().set(*this, FUNC(r9751_state::scsi_drq_w)); -} - void r9751_state::r9751(machine_config &config) { /* basic machine hardware */ @@ -992,15 +985,18 @@ void r9751_state::r9751(machine_config &config) m_pdc->m68k_r_callback().set(FUNC(r9751_state::pdc_dma_r)); m_pdc->m68k_w_callback().set(FUNC(r9751_state::pdc_dma_w)); - NSCSI_BUS(config, "scsi", 0); + auto &scsi(NSCSI_BUS(config, "scsi")); NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, "cdrom", false); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false); - NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93", WD33C93) - .machine_config([this](device_t *device) { wd33c93(device); }); + + WD33C93(config, m_wd33c93, 10000000); + scsi.set_external_device(7, m_wd33c93); + //m_wd33c93->irq_cb().set(DEVICE_SELF, FUNC(r9751_state::scsi_irq_w)); + //m_wd33c93->drq_cb().set(DEVICE_SELF, FUNC(r9751_state::scsi_drq_w)); /* software list */ SOFTWARE_LIST(config, "flop_list").set_original("r9751"); diff --git a/src/mame/sega/segas32.cpp b/src/mame/sega/segas32.cpp index 78b69103501..722a55022b4 100644 --- a/src/mame/sega/segas32.cpp +++ b/src/mame/sega/segas32.cpp @@ -2494,11 +2494,6 @@ void segas32_state::system32_cd_map(address_map &map) map(0xc00060, 0xc0006f).mirror(0x0fff80).rw("cxdio", FUNC(cxd1095_device::read), FUNC(cxd1095_device::write)).umask16(0x00ff); } -static void scsi_devices(device_slot_interface &device) -{ - device.option_add("cdrom", NSCSI_CDROM); -} - void segas32_cd_state::device_add_mconfig(machine_config &config) { segas32_state::device_add_mconfig(config); @@ -2506,18 +2501,11 @@ void segas32_cd_state::device_add_mconfig(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &segas32_cd_state::system32_cd_map); auto &scsi(NSCSI_BUS(config, "scsi")); - NSCSI_CONNECTOR(config, "scsi:0").option_set("cdrom", NSCSI_CDROM).machine_config( - [](device_t *device) - { - device->subdevice("cdda")->add_route(0, "^^speaker", 1.0, 0); - device->subdevice("cdda")->add_route(1, "^^speaker", 1.0, 1); - }); - NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); + + auto &cdrom(NSCSI_CDROM(config, "cdrom")); + scsi.set_external_device(0, cdrom); + cdrom.subdevice("cdda")->add_route(0, "speaker", 1.0, 0); + cdrom.subdevice("cdda")->add_route(1, "speaker", 1.0, 1); auto &spc(MB89352(config, "spc", 8_MHz_XTAL)); scsi.set_external_device(7, spc); @@ -4296,7 +4284,7 @@ ROM_START( kokoroj ) ROM_LOAD64_WORD( "mpr-15534.ic25", 0x800006, 0x200000, CRC(4fa5c56d) SHA1(52926bef0f21ef17dc9d49e3137712bf6d8c29af) ) // Audio CD - DISK_REGION( "mainpcb:scsi:0:cdrom" ) + DISK_REGION( "mainpcb:cdrom" ) DISK_IMAGE_READONLY( "kokoroj", 0, NO_DUMP ) ROM_END @@ -4326,7 +4314,7 @@ ROM_START( kokoroja ) ROM_LOAD64_WORD( "mpr-15534.ic25", 0x800006, 0x200000, CRC(4fa5c56d) SHA1(52926bef0f21ef17dc9d49e3137712bf6d8c29af) ) // Audio CD - DISK_REGION( "mainpcb:scsi:0:cdrom" ) + DISK_REGION( "mainpcb:cdrom" ) DISK_IMAGE_READONLY( "kokoroj", 0, NO_DUMP ) ROM_END @@ -4367,7 +4355,7 @@ ROM_START( kokoroj2 ) ROM_LOAD64_WORD( "mpr-16196.ic25", 0x800006, 0x200000, CRC(b8e22e05) SHA1(dd667e2c5d421cba356421825e6aca9b5ca0af45) ) /* AUDIO CD */ - DISK_REGION( "mainpcb:scsi:0:cdrom" ) + DISK_REGION( "mainpcb:cdrom" ) DISK_IMAGE_READONLY( "cdp-00146", 0, SHA1(0b37e0ea2380ecd9abef2ccd6a8096d76d2ba344) ) ROM_END diff --git a/src/mame/sgi/indy_indigo2.cpp b/src/mame/sgi/indy_indigo2.cpp index 93d9e52707b..97bdce5a089 100644 --- a/src/mame/sgi/indy_indigo2.cpp +++ b/src/mame/sgi/indy_indigo2.cpp @@ -88,7 +88,7 @@ public: : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_mem_ctrl(*this, "memctrl") - , m_scsi_ctrl(*this, "scsibus:0:wd33c93") + , m_scsi_ctrl(*this, "wd33c93") , m_edlc(*this, "edlc") , m_eeprom(*this, "eeprom") , m_hal2(*this, "hal2") @@ -129,8 +129,6 @@ protected: void pio5_map(address_map &map) ATTR_COLD; void pio6_map(address_map &map) ATTR_COLD; - void wd33c93(device_t *device); - static void scsi_devices(device_slot_interface &device); required_device m_maincpu; @@ -158,7 +156,7 @@ class ip22_state : public ip24_state public: ip22_state(const machine_config &mconfig, device_type type, const char *tag) : ip24_state(mconfig, type, tag) - , m_scsi_ctrl2(*this, "scsibus2:0:wd33c93") + , m_scsi_ctrl2(*this, "wd33c93_2") { } @@ -167,8 +165,6 @@ public: private: uint32_t eisa_io_r(); - void wd33c93_2(device_t *device); - void ip22_map(address_map &map) ATTR_COLD; void pio4_map(address_map &map) ATTR_COLD; void pio6_map(address_map &map) ATTR_COLD; @@ -285,13 +281,6 @@ void ip24_state::machine_reset() static INPUT_PORTS_START( ip24 ) INPUT_PORTS_END -void ip24_state::wd33c93(device_t *device) -{ - device->set_clock(10000000); - downcast(device)->irq_cb().set(m_ioc2, FUNC(ioc2_device::scsi0_int_w)); - downcast(device)->drq_cb().set(m_hpc3, FUNC(hpc3_device::scsi0_drq)); -} - void ip24_state::scsi_devices(device_slot_interface &device) { device.option_add("cdrom", NSCSI_CDROM_SGI); @@ -313,9 +302,13 @@ void ip24_state::ip24_base(machine_config &config, uint32_t system_clock) m_mem_ctrl->int_dma_done_cb().set(m_ioc2, FUNC(ioc2_device::mc_dma_done_w)); m_mem_ctrl->eisa_present().set_constant(1); - NSCSI_BUS(config, "scsibus", 0); - NSCSI_CONNECTOR(config, "scsibus:0").option_set("wd33c93", WD33C93B) - .machine_config([this](device_t *device) { wd33c93(device); }); + auto &scsibus(NSCSI_BUS(config, "scsibus")); + + WD33C93B(config, m_scsi_ctrl, 10000000); + scsibus.set_external_device(0, m_scsi_ctrl); + m_scsi_ctrl->irq_cb().set(m_ioc2, FUNC(ioc2_device::scsi0_int_w)); + m_scsi_ctrl->drq_cb().set(m_hpc3, FUNC(hpc3_device::scsi0_drq)); + NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:3", scsi_devices, nullptr, false); @@ -418,13 +411,6 @@ void ip24_state::indy_4610(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &ip24_state::ip24_map); } -void ip22_state::wd33c93_2(device_t *device) -{ - device->set_clock(10000000); - downcast(device)->irq_cb().set(m_ioc2, FUNC(ioc2_device::scsi1_int_w)); - downcast(device)->drq_cb().set(m_hpc3, FUNC(hpc3_device::scsi1_drq)); -} - void ip22_state::indigo2_4415(machine_config &config) { constexpr uint32_t system_clock = 50'000'000; @@ -437,9 +423,13 @@ void ip22_state::indigo2_4415(machine_config &config) ip24_base(config, system_clock); m_mem_ctrl->set_input_default(DEVICE_INPUT_DEFAULTS_NAME(ip22_mc)); - NSCSI_BUS(config, "scsibus2", 0); - NSCSI_CONNECTOR(config, "scsibus2:0").option_set("wd33c93", WD33C93B) - .machine_config([this](device_t *device) { wd33c93_2(device); }); + auto &scsibus2(NSCSI_BUS(config, "scsibus2")); + + WD33C93B(config, m_scsi_ctrl2, 10000000); + scsibus2.set_external_device(0, m_scsi_ctrl2); + m_scsi_ctrl2->irq_cb().set(m_ioc2, FUNC(ioc2_device::scsi1_int_w)); + m_scsi_ctrl2->drq_cb().set(m_hpc3, FUNC(hpc3_device::scsi1_drq)); + NSCSI_CONNECTOR(config, "scsibus2:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:3", scsi_devices, nullptr, false); diff --git a/src/mame/sgi/ip12.cpp b/src/mame/sgi/ip12.cpp index b1f6f2600b4..cb37b5911bd 100644 --- a/src/mame/sgi/ip12.cpp +++ b/src/mame/sgi/ip12.cpp @@ -75,7 +75,7 @@ public: , m_int(*this, "int") , m_nvram(*this, "nvram") , m_rtc(*this, "rtc") - , m_scsi(*this, "scsi:0:wd33c93a") + , m_scsi(*this, "wd33c93a") , m_eth(*this, "eth") , m_scc(*this, "scc%u", 0U) , m_scc_irq(*this, "scc_irq") @@ -255,16 +255,13 @@ void ip12_state::ip12(machine_config &config) DP8572A(config, m_rtc, 32.768_kHz_XTAL).set_use_utc(true); - NSCSI_BUS(config, "scsi", 0); - NSCSI_CONNECTOR(config, "scsi:0").option_set("wd33c93a", WD33C93A).machine_config( - [this](device_t *device) - { - wd33c93a_device &scsi = downcast(*device); + auto &scsi(NSCSI_BUS(config, "scsi")); + + WD33C93A(config, m_scsi, 10_MHz_XTAL); + scsi.set_external_device(0, m_scsi); + m_scsi->irq_cb().set(m_int, FUNC(sgi_int2_device::lio0_w)); + m_scsi->drq_cb().set(m_hpc, FUNC(hpc1_device::write_drq<0>)); - scsi.set_clock(10_MHz_XTAL); - scsi.irq_cb().set(m_int, FUNC(sgi_int2_device::lio0_w)); - scsi.drq_cb().set(m_hpc, FUNC(hpc1_device::write_drq<0>)); - }); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false); diff --git a/src/mame/sgi/ip20.cpp b/src/mame/sgi/ip20.cpp index 66423fe71c8..0e76072cae1 100644 --- a/src/mame/sgi/ip20.cpp +++ b/src/mame/sgi/ip20.cpp @@ -57,7 +57,7 @@ public: , m_int(*this, "int") , m_nvram(*this, "nvram") , m_rtc(*this, "rtc") - , m_scsi(*this, "scsi:0:wd33c93a") + , m_scsi(*this, "wd33c93a") , m_eth(*this, "eth") , m_scc(*this, "scc%u", 0U) , m_dsp(*this, "dsp") @@ -209,16 +209,13 @@ void ip20_state::ip20(machine_config &config) DP8572A(config, m_rtc, 32.768_kHz_XTAL).set_use_utc(true); - NSCSI_BUS(config, "scsi", 0); - NSCSI_CONNECTOR(config, "scsi:0").option_set("wd33c93a", WD33C93A).machine_config( - [this](device_t *device) - { - wd33c93a_device &scsi = downcast(*device); + auto &scsi(NSCSI_BUS(config, "scsi")); + + WD33C93A(config, m_scsi, 10_MHz_XTAL); + scsi.set_external_device(0, m_scsi); + m_scsi->irq_cb().set(m_int, FUNC(sgi_int2_device::lio0_w)); + m_scsi->drq_cb().set(m_hpc, FUNC(hpc1_device::write_drq<0>)); - scsi.set_clock(10_MHz_XTAL); - scsi.irq_cb().set(m_int, FUNC(sgi_int2_device::lio0_w)); - scsi.drq_cb().set(m_hpc, FUNC(hpc1_device::write_drq<0>)); - }); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false); diff --git a/src/mame/sgi/ip4.cpp b/src/mame/sgi/ip4.cpp index b546316df3f..d53839eb047 100644 --- a/src/mame/sgi/ip4.cpp +++ b/src/mame/sgi/ip4.cpp @@ -79,7 +79,7 @@ sgi_ip4_device::sgi_ip4_device(machine_config const &mconfig, char const *tag, d , m_cpu(*this, "cpu") , m_rtc(*this, "rtc") , m_pit(*this, "pit") - , m_scsi(*this, "scsi:0:wd33c93") + , m_scsi(*this, "wd33c93") , m_duart(*this, "duart%u", 0U) , m_serial(*this, "serial%u", 0U) , m_saa(*this, "saa") @@ -226,16 +226,13 @@ void sgi_ip4_device::device_add_mconfig(machine_config &config) m_pit->out_handler<2>().set(m_pit, FUNC(pit8254_device::write_clk0)); m_pit->out_handler<2>().append(m_pit, FUNC(pit8254_device::write_clk1)); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:0").option_set("wd33c93", WD33C93).machine_config( - [this](device_t *device) - { - wd33c9x_base_device &wd33c93(downcast(*device)); + auto &scsi(NSCSI_BUS(config, "scsi")); + + WD33C93(config, m_scsi, 10'000'000); + scsi.set_external_device(0, m_scsi); + m_scsi->irq_cb().set(DEVICE_SELF, FUNC(sgi_ip4_device::lio_irq)).invert(); + m_scsi->drq_cb().set(DEVICE_SELF, FUNC(sgi_ip4_device::scsi_drq)); - wd33c93.set_clock(10'000'000); - wd33c93.irq_cb().set(*this, FUNC(sgi_ip4_device::lio_irq)).invert(); - wd33c93.drq_cb().set(*this, FUNC(sgi_ip4_device::scsi_drq)); - }); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false); diff --git a/src/mame/sgi/ip6.cpp b/src/mame/sgi/ip6.cpp index 3542594bb0c..970d900e434 100644 --- a/src/mame/sgi/ip6.cpp +++ b/src/mame/sgi/ip6.cpp @@ -94,7 +94,7 @@ public: , m_eeprom(*this, "eeprom") , m_rtc(*this, "rtc") , m_pit(*this, "pit") - , m_scsi(*this, "scsi:0:wd33c93") + , m_scsi(*this, "wd33c93") , m_enet(*this, "enet") , m_duart(*this, "duart%u", 0U) , m_serial(*this, "serial%u", 0U) @@ -441,16 +441,13 @@ void ip6_state::common(machine_config &config) m_pit->out_handler<2>().set(m_pit, FUNC(pit8254_device::write_clk0)); m_pit->out_handler<2>().append(m_pit, FUNC(pit8254_device::write_clk1)); - NSCSI_BUS(config, "scsi"); - NSCSI_CONNECTOR(config, "scsi:0").option_set("wd33c93", WD33C93).machine_config( - [this](device_t *device) - { - wd33c9x_base_device &wd33c93(downcast(*device)); + auto &scsi(NSCSI_BUS(config, "scsi")); + + WD33C93(config, m_scsi, 10000000); + scsi.set_external_device(0, m_scsi); + m_scsi->irq_cb().set(DEVICE_SELF, FUNC(ip6_state::lio_interrupt)).invert(); + m_scsi->drq_cb().set(DEVICE_SELF, FUNC(ip6_state::scsi_drq)); - wd33c93.set_clock(10000000); - wd33c93.irq_cb().set(*this, FUNC(ip6_state::lio_interrupt)).invert(); - wd33c93.drq_cb().set(*this, FUNC(ip6_state::scsi_drq)); - }); NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false); diff --git a/src/mame/sony/news_r3k.cpp b/src/mame/sony/news_r3k.cpp index 0204d4a8795..b00e4a26650 100644 --- a/src/mame/sony/news_r3k.cpp +++ b/src/mame/sony/news_r3k.cpp @@ -60,7 +60,7 @@ public: , m_net(*this, "net") , m_fdc(*this, "fdc") , m_hid(*this, "hid") - , m_scsi(*this, "scsi:7:cxd1185") + , m_scsi(*this, "cxd1185") , m_serial(*this, "serial%u", 0U) , m_scsibus(*this, "scsi") , m_led(*this, "led%u", 0U) @@ -525,22 +525,18 @@ void news_r3k_base_state::common(machine_config &config) NSCSI_CONNECTOR(config, "scsi:6", news_scsi_devices, nullptr); // scsi host adapter - NSCSI_CONNECTOR(config, "scsi:7").option_set("cxd1185", CXD1185).clock(16_MHz_XTAL).machine_config( - [this] (device_t *device) - { - cxd1185_device &adapter = downcast(*device); + CXD1185(config, m_scsi, 16_MHz_XTAL); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq_out_cb().set(m_dma, FUNC(dmac_0448_device::irq<0>)); + m_scsi->drq_out_cb().set(m_dma, FUNC(dmac_0448_device::drq<0>)); + m_scsi->port_out_cb().set( + [this] (u8 data) + { + LOG("floppy %s\n", BIT(data, 0) ? "mount" : "eject"); + }); - adapter.irq_out_cb().set(m_dma, FUNC(dmac_0448_device::irq<0>)); - adapter.drq_out_cb().set(m_dma, FUNC(dmac_0448_device::drq<0>)); - adapter.port_out_cb().set( - [this] (u8 data) - { - LOG("floppy %s\n", BIT(data, 0) ? "mount" : "eject"); - }); - - subdevice(":dma")->dma_r_cb<0>().set(adapter, FUNC(cxd1185_device::dma_r)); - subdevice(":dma")->dma_w_cb<0>().set(adapter, FUNC(cxd1185_device::dma_w)); - }); + m_dma->dma_r_cb<0>().set(m_scsi, FUNC(cxd1185_device::dma_r)); + m_dma->dma_w_cb<0>().set(m_scsi, FUNC(cxd1185_device::dma_w)); NEWS_HID_HLE(config, m_hid); m_hid->irq_out().set(FUNC(news_r3k_base_state::irq_w)); diff --git a/src/mame/sony/news_r4k.cpp b/src/mame/sony/news_r4k.cpp index 4cb49448c94..61549b9a563 100644 --- a/src/mame/sony/news_r4k.cpp +++ b/src/mame/sony/news_r4k.cpp @@ -147,8 +147,8 @@ public: m_fdc(*this, "fdc"), m_hid(*this, "hid"), m_dmac(*this, "dmac"), - m_scsi0(*this, "scsi0:7:spifi3"), - m_scsi1(*this, "scsi1:7:spifi3"), + m_scsi0(*this, "spifi3_0"), + m_scsi1(*this, "spifi3_1"), m_scsibus0(*this, "scsi0"), m_scsibus1(*this, "scsi1"), m_dip_switch(*this, "FRONT_PANEL"), @@ -497,24 +497,15 @@ void news_r4k_state::machine_common(machine_config &config) NSCSI_CONNECTOR(config, "scsi1:6", news_scsi_devices, nullptr); // TODO: Actual SPIFI3 clock frequency - NSCSI_CONNECTOR(config, "scsi0:7").option_set("spifi3", SPIFI3) - .clock(16'000'000) - .machine_config( - [this](device_t *device) - { - spifi3_device &adapter = dynamic_cast(*device); - adapter.irq_handler_cb().set(m_dmac, FUNC(dmac3_device::irq_w)); - adapter.drq_handler_cb().set(m_dmac, FUNC(dmac3_device::drq_w)); - }); - NSCSI_CONNECTOR(config, "scsi1:7").option_set("spifi3", SPIFI3) - .clock(16'000'000) - .machine_config( - [this](device_t *device) - { - spifi3_device &adapter = dynamic_cast(*device); - adapter.irq_handler_cb().set(m_dmac, FUNC(dmac3_device::irq_w)); - adapter.drq_handler_cb().set(m_dmac, FUNC(dmac3_device::drq_w)); - }); + SPIFI3(config, m_scsi0, 16'000'000); + m_scsibus0->set_external_device(7, m_scsi0); + m_scsi0->irq_handler_cb().set(m_dmac, FUNC(dmac3_device::irq_w)); + m_scsi0->drq_handler_cb().set(m_dmac, FUNC(dmac3_device::drq_w)); + + SPIFI3(config, m_scsi1, 16'000'000); + m_scsibus1->set_external_device(7, m_scsi1); + m_scsi1->irq_handler_cb().set(m_dmac, FUNC(dmac3_device::irq_w)); + m_scsi1->drq_handler_cb().set(m_dmac, FUNC(dmac3_device::drq_w)); m_dmac->dma_r_cb().set(m_scsi0, FUNC(spifi3_device::dma_r)); m_dmac->dma_w_cb().set(m_scsi0, FUNC(spifi3_device::dma_w)); diff --git a/src/mame/tektronix/tek440x.cpp b/src/mame/tektronix/tek440x.cpp index e92d385c4f8..54cb312c4ea 100644 --- a/src/mame/tektronix/tek440x.cpp +++ b/src/mame/tektronix/tek440x.cpp @@ -79,7 +79,7 @@ public: m_keyboard(*this, "keyboard"), m_snsnd(*this, "snsnd"), m_rtc(*this, "rtc"), - m_scsi(*this, "scsi:7:ncr5385"), + m_scsi(*this, "ncr5385"), m_vint(*this, "vint"), m_prom(*this, "maincpu"), m_mainram(*this, "mainram"), @@ -440,7 +440,7 @@ void tek440x_state::tek4404(machine_config &config) MC146818(config, m_rtc, 32.768_MHz_XTAL); - NSCSI_BUS(config, "scsi"); + auto &scsi(NSCSI_BUS(config, "scsi")); // hard disk is a Micropolis 1304 (https://www.micropolis.com/support/hard-drives/1304) // with a Xebec 1401 SASI adapter inside the Mass Storage Unit NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, "harddisk"); @@ -450,13 +450,10 @@ void tek440x_state::tek4404(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5385", NCR5385).clock(40_MHz_XTAL / 4).machine_config( - [this](device_t *device) - { - ncr5385_device &adapter = downcast(*device); - adapter.irq().set_inputline(m_maincpu, M68K_IRQ_3); - }); + NCR5385(config, m_scsi, 40_MHz_XTAL / 4); + scsi.set_external_device(7, m_scsi); + m_scsi->irq().set_inputline(m_maincpu, M68K_IRQ_3); rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); rs232.rxd_handler().set("aica", FUNC(mos6551_device::write_rxd)); diff --git a/src/mame/tektronix/tekigw.cpp b/src/mame/tektronix/tekigw.cpp index 0235bbb28d5..efc2eb4220b 100644 --- a/src/mame/tektronix/tekigw.cpp +++ b/src/mame/tektronix/tekigw.cpp @@ -228,7 +228,7 @@ public: tek4132_state(machine_config const &mconfig, device_type type, char const *tag) : tekigw_state_base(mconfig, type, tag) , m_scsibus(*this, "scsi") - , m_scsi(*this, "scsi:7:ncr5385") + , m_scsi(*this, "ncr5385") , m_sdma(*this, "sdma") , m_sirq(*this, "sirq") { @@ -958,19 +958,14 @@ void tek4132_state::tek4132(machine_config &config) NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr); - NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5385", NCR5385).clock(10'000'000).machine_config( - [this](device_t *device) - { - ncr5385_device &adapter = downcast(*device); - //adapter.irq().set(m_sirq, FUNC(input_merger_all_high_device::in_w<1>)); - adapter.irq().set(m_icu, FUNC(ns32202_device::ir_w<4>)); - adapter.dreq().set(m_dma, FUNC(am9516_device::dreq_w<0>)).invert(); + NCR5385(config, m_scsi, 10'000'000); + m_scsibus->set_external_device(7, m_scsi); + m_scsi->irq().set(m_icu, FUNC(ns32202_device::ir_w<4>)); + m_scsi->dreq().set(m_dma, FUNC(am9516_device::dreq_w<0>)).invert(); - }); - - m_dma->flyby_byte_r<0>().set(":scsi:7:ncr5385", FUNC(ncr5385_device::dma_r)); - m_dma->flyby_byte_w<0>().set(":scsi:7:ncr5385", FUNC(ncr5385_device::dma_w)); + m_dma->flyby_byte_r<0>().set("ncr5385", FUNC(ncr5385_device::dma_r)); + m_dma->flyby_byte_w<0>().set("ncr5385", FUNC(ncr5385_device::dma_w)); } static INPUT_PORTS_START(tekigw) From 23dcf435630e538eef2ded47d723b275ba77c5f6 Mon Sep 17 00:00:00 2001 From: stonedDiscord Date: Tue, 3 Mar 2026 21:00:01 +0100 Subject: [PATCH 124/351] adp/adp.cpp: add video to fstation7 rom name (#15053) --- src/mame/adp/adp.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/adp/adp.cpp b/src/mame/adp/adp.cpp index 004899e9473..73c74729467 100644 --- a/src/mame/adp/adp.cpp +++ b/src/mame/adp/adp.cpp @@ -740,8 +740,8 @@ ROM_START( fstation7 ) ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_ii.u6", 0x00001, 0x80000, CRC(cd8ab9e3) SHA1(cb9206d0367f00bec278cee0a4115594ba715fcd)) ROM_REGION16_BE( 0x100000, "gfx1", 0) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_i.u2", 0x00000, 0x80000, CRC(dcddb25a) SHA1(7c54bd7a368fd57e3eb995a26462b3d2d589b0db)) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_ii.u5", 0x00001, 0x80000, CRC(400f9b8f) SHA1(4c4a9f46016eee805653b5fae65680225ac71436)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_video_f1_i.u2", 0x00000, 0x80000, CRC(dcddb25a) SHA1(7c54bd7a368fd57e3eb995a26462b3d2d589b0db)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_video_f1_ii.u5", 0x00001, 0x80000, CRC(400f9b8f) SHA1(4c4a9f46016eee805653b5fae65680225ac71436)) ROM_END ROM_START( fstation8 ) From 5a6e31f4ce20bce48efdb91eab62475b1db5c380 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 4 Mar 2026 08:54:10 +1100 Subject: [PATCH 125/351] -cpu/e132xs/e132xsfe.cpp Re-wrote E1 instruction analyser. Reduced redundant code, track condition flag dependencies independently, fixed a number of bugs. -cpu/e132xsdrc_ops.hxx: Don't recalculate immediate values when generating code. -cpu/powerpc/ppcfe.cpp: End instruction sequences on encountering SC. --- src/devices/cpu/e132xs/e132xs.h | 3 - src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 185 +- src/devices/cpu/e132xs/e132xsfe.cpp | 2111 ++++++++++------------ src/devices/cpu/e132xs/e132xsfe.h | 151 +- src/devices/cpu/powerpc/ppcfe.cpp | 1 + 5 files changed, 1083 insertions(+), 1368 deletions(-) diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index a04c9762812..55bf264f8ac 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -493,9 +493,6 @@ private: bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); void generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uml::parameter trapno); - uint32_t generate_get_const(const opcode_desc *desc); - uint32_t generate_get_immediate_s(const opcode_desc *desc); - uint32_t generate_get_pcrel(const opcode_desc *desc); std::pair generate_get_d_code_dis(const opcode_desc *opcode); void generate_get_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t code, uml::parameter dst); diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index ee3cce9b584..7131bdba505 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -9,98 +9,10 @@ constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER); -uint32_t hyperstone_device::generate_get_const(const opcode_desc *desc) -{ - const uint16_t imm_1 = m_pr16(desc->pc + 2); - - if (imm_1 & 0x8000) - { - const uint16_t imm_2 = m_pr16(desc->pc + 4); - - uint32_t imm = imm_2 | (uint32_t(imm_1 & 0x3fff) << 16); - - if (imm_1 & 0x4000) - imm |= 0xc0000000; - - return imm; - } - else - { - uint32_t imm = imm_1 & 0x3fff; - - if (imm_1 & 0x4000) - imm |= 0xffffc000; - - return imm; - } -} - -uint32_t hyperstone_device::generate_get_immediate_s(const opcode_desc *desc) -{ - const uint16_t op = desc->opptr[0]; - - switch (op & 0xf) - { - case 0: - return 16; - case 1: - return (uint32_t(m_pr16(desc->pc + 2)) << 16) | m_pr16(desc->pc + 4); - case 2: - return m_pr16(desc->pc + 2); - case 3: - return 0xffff0000 | m_pr16(desc->pc + 2); - default: - return s_immediate_values[op & 0xf]; - } -} - -uint32_t hyperstone_device::generate_get_pcrel(const opcode_desc *desc) -{ - const uint16_t op = desc->opptr[0]; - - if (op & 0x80) - { - const uint16_t next = m_pr16(desc->pc + 2); - uint32_t offset = (uint32_t(op & 0x7f) << 16) | (next & 0xfffe); - if (next & 1) - offset |= 0xff800000; - - return offset; - } - else - { - uint32_t offset = op & 0x7e; - if (op & 1) - offset |= 0xffffff80; - - return offset; - } -} - std::pair hyperstone_device::generate_get_d_code_dis(const opcode_desc *desc) { - const uint16_t next_1 = m_pr16(desc->pc + 2); - const uint16_t d_code = (next_1 & 0x3000) >> 12; - - uint32_t dis; - if (next_1 & 0x8000) - { - const uint16_t next_2 = m_pr16(desc->pc + 4); - - dis = next_2 | (uint32_t(next_1 & 0x0fff) << 16); - - if (next_1 & 0x4000) - dis |= 0xf0000000; - } - else - { - dis = next_1 & 0xfff; - - if (next_1 & 0x4000) - dis |= 0xfffff000; - } - - return std::make_pair(d_code, dis); + const uint16_t d_code = (desc->opptr[1] & 0x3000) >> 12; + return std::make_pair(d_code, desc->imm); } inline void hyperstone_device::generate_add_dis(drcuml_block &block, compiler_state &compiler, uml::parameter dst, uml::parameter base, uint32_t dis, unsigned alignment) @@ -1182,8 +1094,7 @@ void hyperstone_device::generate_mask(drcuml_block &block, compiler_state &compi const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; - - const uint32_t src = generate_get_const(desc); + const uint32_t src = desc->imm; UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) @@ -1208,8 +1119,7 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; - - const uint32_t src = generate_get_const(desc); + const uint32_t src = desc->imm; UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) @@ -1251,8 +1161,7 @@ void hyperstone_device::generate_sums(drcuml_block &block, compiler_state &compi const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; - - const uint32_t src = generate_get_const(desc); + const uint32_t src = desc->imm; UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) @@ -1847,12 +1756,7 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; - - uint32_t src; - if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0x0f; + const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); UML_MOV(block, I2, DRC_SR); if (!DstGlobal) @@ -1874,12 +1778,7 @@ void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compi const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; - - uint32_t src; - if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0x0f; + const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); UML_MOV(block, I2, DRC_SR); @@ -1959,12 +1858,7 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const bool roundeven = !(op & 0x10f); - - uint32_t src; - if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0x0f; + const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); UML_MOV(block, I2, DRC_SR); if (!DstGlobal) @@ -2047,13 +1941,7 @@ void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &comp if (n) { - uint32_t src; - if (n == 31) - src = 0x7fffffff; - else if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0xf; + const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); if (DstGlobal) UML_TEST(block, mem(&m_core->global_regs[dst_code]), src); @@ -2093,15 +1981,7 @@ void hyperstone_device::generate_andni(drcuml_block &block, compiler_state &comp UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); const uint16_t op = desc->opptr[0]; - - uint32_t src; - if (DRC_N_OP_MASK == 0x10f) - src = 0x7fffffff; - else if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0x0f; - src = ~src; + const uint32_t src = ~(ImmLong ? desc->imm : (op & 0x0f)); generate_logic_op_imm( block, @@ -2118,12 +1998,7 @@ void hyperstone_device::generate_ori(drcuml_block &block, compiler_state &compil UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); const uint16_t op = desc->opptr[0]; - - uint32_t src; - if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0x0f; + const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); generate_logic_op_imm( block, @@ -2140,12 +2015,7 @@ void hyperstone_device::generate_xori(drcuml_block &block, compiler_state &compi UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); const uint16_t op = desc->opptr[0]; - - uint32_t src; - if (ImmLong) - src = generate_get_immediate_s(desc); - else - src = op & 0x0f; + const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); generate_logic_op_imm( block, @@ -3850,7 +3720,7 @@ void hyperstone_device::generate_br(drcuml_block &block, compiler_state &compile { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint32_t target = generate_get_pcrel(desc); + const uint32_t target = desc->imm; UML_ADD(block, DRC_PC, DRC_PC, target); UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); @@ -3887,7 +3757,7 @@ void hyperstone_device::generate_dbr(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_2)); - const uint32_t target = generate_get_pcrel(desc); + const uint32_t target = desc->imm; UML_ADD(block, I0, DRC_PC, target); UML_MOV(block, mem(&m_core->delay_slot), 1); @@ -3996,30 +3866,6 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK); const uint16_t op = desc->opptr[0]; - uint16_t imm_1 = m_pr16(desc->pc + 2); - - int32_t extra_s = 0; - - if (imm_1 & 0x8000) - { - uint16_t imm_2 = m_pr16(desc->pc + 4); - - extra_s = imm_2; - extra_s |= ((imm_1 & 0x3fff) << 16); - - if (imm_1 & 0x4000) - extra_s |= 0xc0000000; - } - else - { - extra_s = imm_1 & 0x3fff; - - if (imm_1 & 0x4000) - extra_s |= 0xffffc000; - } - - UML_MOV(block, I1, extra_s); - const uint32_t src_code = op & 0xf; uint32_t dst_code = (op & 0xf0) >> 4; @@ -4027,6 +3873,7 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi dst_code = 16; UML_BFXU(block, I3, DRC_SR, FP_SHIFT, 7); + UML_MOV(block, I1, desc->imm); if (SrcGlobal) { @@ -4057,7 +3904,7 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi UML_ROLINS(block, DRC_SR, 6, FL_SHIFT, FL_MASK); UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); - UML_ADD(block, I2, I2, extra_s & ~uint32_t(1)); + UML_ADD(block, I2, I2, desc->imm & ~uint32_t(1)); UML_MOV(block, DRC_PC, I2); UML_MOV(block, mem(&m_core->intblock), 2); diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp index 87d9f0f36d1..1eb0de91382 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e132xsfe.cpp @@ -1,10 +1,10 @@ // license:BSD-3-Clause -// copyright-holders:Ryan Holtz +// copyright-holders:Vas Crabb /*************************************************************************** e132xsfe.cpp - Front end for Hyperstone recompiler + Hyperstone E1 instruction decoder ***************************************************************************/ @@ -16,15 +16,6 @@ #include "cpu/drcfe.ipp" -#define FE_DST_CODE ((op & 0xf0) >> 4) -#define FE_SRC_CODE (op & 0x0f) -#define SR_CODE (1) -#define G_CODE_BASE (0) - - -/*************************************************************************** - INSTRUCTION PARSERS -***************************************************************************/ hyperstone_device::frontend::frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) : drc_frontend_base(cpu.space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) @@ -43,112 +34,190 @@ hyperstone_device::opcode_desc const *hyperstone_device::frontend::describe_code startpc); } -inline uint16_t hyperstone_device::frontend::read_word(opcode_desc &desc) + +inline void hyperstone_device::frontend::read_op(opcode_desc &desc) { - return m_cpu.m_pr16(desc.pc); + desc.opptr[0] = m_cpu.m_pr16(desc.pc); } -inline uint16_t hyperstone_device::frontend::read_imm1(opcode_desc &desc) +inline void hyperstone_device::frontend::read_imm1(opcode_desc &desc) { - return m_cpu.m_pr16(desc.pc + 2); + desc.opptr[1] = m_cpu.m_pr16(desc.pc + 2); } -inline uint16_t hyperstone_device::frontend::read_imm2(opcode_desc &desc) +inline void hyperstone_device::frontend::read_imm2(opcode_desc &desc) { - return m_cpu.m_pr16(desc.pc + 4); + desc.opptr[2] = m_cpu.m_pr16(desc.pc + 4); } -inline uint32_t hyperstone_device::frontend::read_ldstxx_imm(opcode_desc &desc) +inline void hyperstone_device::frontend::decode_const(opcode_desc &desc) { - const uint16_t imm1 = read_imm1(desc); - uint32_t extra_s; - if (imm1 & 0x8000) - { - extra_s = read_imm2(desc); - extra_s |= ((imm1 & 0xfff) << 16); - - if (imm1 & 0x4000) - extra_s |= 0xf0000000; - } - else - { - extra_s = imm1 & 0xfff; - - if (imm1 & 0x4000) - extra_s |= 0xfffff000; - } - return extra_s; -} - -inline uint32_t hyperstone_device::frontend::read_limm(opcode_desc &desc, uint16_t op) -{ - static const int32_t immediate_values[16] = - { - 16, 0, 0, 0, 32, 64, 128, int32_t(uint32_t(0x80000000)), - -8, -7, -6, -5, -4, -3, -2, -1 - }; - - const uint8_t nybble = op & 0xf; - switch (nybble) - { - case 1: - desc.length = 6; - return (read_imm1(desc) << 16) | read_imm2(desc); - case 2: - desc.length = 4; - return read_imm1(desc); - case 3: - desc.length = 4; - return 0xffff0000 | read_imm1(desc); - default: - return uint32_t(immediate_values[nybble]); - } -} - -inline int32_t hyperstone_device::frontend::decode_pcrel(opcode_desc &desc, uint16_t op) -{ - if (op & 0x80) + read_imm1(desc); + int32_t const const1 = util::sext(desc.opptr[1], 15); + if (!E_BIT(desc.opptr[1])) { desc.length = 4; - - const uint16_t next = read_imm1(desc); - int32_t offset = ((op & 0x7f) << 16) | (next & 0xfffe); - if (next & 1) - offset |= 0xff800000; - - return offset; + desc.imm = uint32_t(const1); } else { - int32_t offset = op & 0x7e; - if (op & 1) - offset |= 0xffffff80; - - return offset; - } -} - -inline int32_t hyperstone_device::frontend::decode_call(opcode_desc &desc) -{ - const uint16_t imm_1 = read_imm1(desc); - int32_t extra_s = 0; - if (imm_1 & 0x8000) - { + read_imm2(desc); desc.length = 6; - extra_s = read_imm2(desc); - extra_s |= ((imm_1 & 0x3fff) << 16); + desc.imm = uint32_t(const1 << 16) | desc.opptr[2]; + } +} - if (imm_1 & 0x4000) - extra_s |= 0xc0000000; + +inline void hyperstone_device::frontend::decode_ll(opcode_desc &desc) +{ + uint16_t const op = desc.opptr[0]; + desc.dst_code = BIT(op, 4, 4); + desc.src_code = BIT(op, 0, 4); + desc.dst_local = true; + desc.src_local = true; +} + +inline void hyperstone_device::frontend::decode_llext(opcode_desc &desc) +{ + decode_ll(desc); + read_imm1(desc); + desc.length = 4; +} + +inline void hyperstone_device::frontend::decode_lr(opcode_desc &desc) +{ + uint16_t const op = desc.opptr[0]; + desc.dst_code = BIT(op, 4, 4); + desc.src_code = BIT(op, 0, 4); + desc.dst_local = true; + desc.src_local = BIT(op, 8); +} + +inline void hyperstone_device::frontend::decode_rr(opcode_desc &desc) +{ + uint16_t const op = desc.opptr[0]; + desc.dst_code = BIT(op, 4, 4); + desc.src_code = BIT(op, 0, 4); + desc.dst_local = BIT(op, 9); + desc.src_local = BIT(op, 8); +} + +inline void hyperstone_device::frontend::decode_ln(opcode_desc &desc) +{ + uint16_t const op = desc.opptr[0]; + desc.dst_code = BIT(op, 4, 4); + desc.dst_local = true; + desc.imm = (BIT(op, 8) << 4) | BIT(op, 0, 4); +} + +inline void hyperstone_device::frontend::decode_rn(opcode_desc &desc) +{ + uint16_t const op = desc.opptr[0]; + desc.dst_code = BIT(op, 4, 4); + desc.dst_local = BIT(op, 9); + desc.imm = (BIT(op, 8) << 4) | BIT(op, 0, 4); +} + +inline void hyperstone_device::frontend::decode_pcrel(opcode_desc &desc) +{ + if (!BIT(desc.opptr[0], 7)) + { + uint32_t const low_rel = BIT(desc.opptr[0], 1, 6); + int32_t const s = util::sext(desc.opptr[0], 1); + desc.imm = uint32_t(s << 7) | (low_rel << 1); } else { + read_imm1(desc); desc.length = 4; - extra_s = imm_1 & 0x3fff; - if (imm_1 & 0x4000) - extra_s |= 0xffffc000; + uint32_t const high_rel = BIT(desc.opptr[0], 0, 7); + uint32_t const low_rel = BIT(desc.opptr[1], 1, 15); + int32_t const s = util::sext(desc.opptr[1], 1); + desc.imm = uint32_t(s << 23) | (high_rel << 16) | (low_rel << 1); + } +} + +inline void hyperstone_device::frontend::decode_lrconst(opcode_desc &desc) +{ + decode_lr(desc); + decode_const(desc); +} + +inline void hyperstone_device::frontend::decode_rrconst(opcode_desc &desc) +{ + decode_rr(desc); + decode_const(desc); +} + +inline void hyperstone_device::frontend::decode_rrdis(opcode_desc &desc) +{ + decode_rr(desc); + read_imm1(desc); + int32_t const dis1 = util::sext((BIT(desc.opptr[1], 14) << 12) | BIT(desc.opptr[1], 0, 12), 13); + if (!E_BIT(desc.opptr[1])) + { + desc.length = 4; + desc.imm = uint32_t(dis1); + } + else + { + read_imm2(desc); + desc.length = 6; + desc.imm = uint32_t(dis1 << 16) | desc.opptr[2]; + } +} + +inline void hyperstone_device::frontend::decode_rimm(opcode_desc &desc, bool cmpbi_andni) +{ + constexpr int32_t table[32] = { + 0, 1, 2, 3, 4, 5, 6, 7, + 8, 9, 10, 11, 12, 13, 14, 15, + 16, -1, -1, -1, 32, 64, 128, int32_t(uint32_t(0x80000000)), + -8, -7, -6, -5, -4, -3, -2, -1 }; + + uint16_t const op = desc.opptr[0]; + desc.dst_code = BIT(op, 4, 4); + desc.dst_local = BIT(op, 9); + + uint16_t const n = (BIT(op, 8) << 4) | BIT(op, 0, 4); + switch (n) + { + case 17: + read_imm1(desc); + read_imm2(desc); + desc.length = 6; + desc.imm = (uint32_t(desc.opptr[1]) << 16) | desc.opptr[2]; + break; + case 18: + case 19: + read_imm1(desc); + desc.length = 4; + desc.imm = (BIT(n, 0) ? 0xffff0000U : 0U) | desc.opptr[1]; + break; + case 31: + desc.imm = cmpbi_andni ? 0x7fffffff : uint32_t(table[n]); + break; + default: + desc.imm = uint32_t(table[n]); + } +} + +inline void hyperstone_device::frontend::decode_rrlim(opcode_desc &desc) +{ + decode_rr(desc); + read_imm1(desc); + uint32_t const lim1 = BIT(desc.opptr[1], 0, 12); + if (!E_BIT(desc.opptr[1])) + { + desc.length = 4; + desc.imm = lim1; + } + else + { + read_imm2(desc); + desc.length = 6; + desc.imm = (lim1 << 16) | desc.opptr[2]; } - return extra_s; } @@ -159,1130 +228,800 @@ inline int32_t hyperstone_device::frontend::decode_call(opcode_desc &desc) bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) { - uint16_t op = desc.opptr[0] = read_word(desc); + read_op(desc); + uint16_t const op = desc.opptr[0]; - /* most instructions are 2 bytes and a single cycle */ + // most instructions are 2 bytes and a single cycle desc.length = 2; desc.delayslots = 0; - const uint32_t gdst_code = FE_DST_CODE; - const uint32_t gdstf_code = gdst_code + 1; - const uint32_t gsrc_code = FE_SRC_CODE; - const uint32_t gsrcf_code = gsrc_code + 1; - switch (op >> 8) { - case 0x00: // chk global,global - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.set_can_cause_exception(); - break; - case 0x01: // chk global,local - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.set_can_cause_exception(); - break; - case 0x02: // chk local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.set_can_cause_exception(); - break; - case 0x03: // chk local,local - desc.regin.set(SR_CODE); - desc.set_can_cause_exception(); - break; - case 0x04: // movd global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gsrcf_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdstf_code); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_can_cause_exception(); - desc.set_end_sequence(); - desc.set_can_change_modes(); - desc.set_reads_memory(); - } - desc.regout.set(SR_CODE); - break; - case 0x05: // movd global,local - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdstf_code); - if (gdst_code == 0) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_can_cause_exception(); - desc.set_end_sequence(); - desc.set_reads_memory(); - } - desc.regout.set(SR_CODE); - break; - case 0x06: // movd local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gsrcf_code); - desc.regout.set(SR_CODE); - break; - case 0x07: // movd local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x08: // divu global,global - case 0x0c: // divs global,global - desc.set_can_cause_exception(); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regin.set(G_CODE_BASE + gdstf_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdstf_code); - desc.regout.set(SR_CODE); - break; - case 0x09: // divu global,local - case 0x0d: // divs global,local - desc.set_can_cause_exception(); - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regin.set(G_CODE_BASE + gdstf_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdstf_code); - desc.regout.set(SR_CODE); - break; - case 0x0a: // divu local,global - case 0x0e: // divs local,global - desc.set_can_cause_exception(); - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0x0b: // divu local,local - case 0x0f: // divs local,local - desc.set_can_cause_exception(); - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x10: // xm global,global - desc.set_can_cause_exception(); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x11: // xm global,local - desc.set_can_cause_exception(); - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x12: // xm local,global - desc.set_can_cause_exception(); - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x13: // xm local,local - desc.set_can_cause_exception(); - desc.regin.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x14: // mask global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x15: // mask global,local - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x16: // mask local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x17: // mask local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0x18: // sum global,global - case 0x1c: // sums global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4 && gsrc_code != SR_REGISTER) desc.set_can_cause_exception(); - break; - case 0x19: // sum global,local - case 0x1d: // sums global,local - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4) desc.set_can_cause_exception(); - break; - case 0x1a: // sum local,global - case 0x1e: // sums local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4 && gsrc_code != SR_REGISTER) desc.set_can_cause_exception(); - break; - case 0x1b: // sum local,local - case 0x1f: // sums local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (op & 0x4) desc.set_can_cause_exception(); - break; - case 0x20: // cmp global,global - case 0x30: // cmpb global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - break; - case 0x21: // cmp global,local - case 0x31: // cmpb global,local - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - break; - case 0x22: // cmp local,global - case 0x32: // cmpb local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0x23: // cmp local,local - case 0x33: // cmpb local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x24: // mov global,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gsrc_code + 16); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - if (gdst_code == PC_REGISTER) - { - if (gsrc_code != PC_REGISTER) - desc.targetpc = BRANCH_TARGET_DYNAMIC; - else - desc.targetpc = desc.pc + desc.length; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - else if (gdst_code == 5) // TPR_REGISTER & 0xf - { - desc.set_end_sequence(); - } - break; - case 0x25: // mov global,local - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - else if (gdst_code == 5) // TPR_REGISTER & 0xf - { - desc.set_end_sequence(); - } - break; - case 0x26: // mov local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gsrc_code + 16); - desc.regout.set(SR_CODE); - break; - case 0x27: // mov local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x28: // add global,global - case 0x2c: // adds global,global - case 0x48: // sub global,global - case 0x4c: // subs global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (op & 0x04) desc.set_can_cause_exception(); // adds, subs - if (gdst_code == PC_REGISTER) - { - if (gsrc_code != PC_REGISTER) - desc.targetpc = BRANCH_TARGET_DYNAMIC; - else if (((op >> 8) == 0x28) || ((op >> 8) == 0x2c)) - desc.targetpc = (desc.pc + desc.length) << 1; - else - desc.targetpc = 0; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x29: // add global,local - case 0x2d: // adds global,local - case 0x49: // sub global,local - case 0x4d: // subs global,local - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (op & 0x04) desc.set_can_cause_exception(); // adds, subs - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x2a: // add local,global - case 0x2e: // adds local,global - case 0x4a: // sub local,global - case 0x4e: // subs local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - if (op & 0x04) desc.set_can_cause_exception(); // adds, subs - break; - case 0x2b: // add local,local - case 0x2f: // adds local,local - case 0x4b: // sub local,local - case 0x4f: // subs local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - if (op & 0x04) desc.set_can_cause_exception(); // adds, subs - break; - case 0x34: // andn global,global - case 0x38: // or global,global - case 0x3c: // xor global,global - case 0x54: // and global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - if (gsrc_code != PC_REGISTER) - desc.targetpc = BRANCH_TARGET_DYNAMIC; - else if (((op >> 8) == 0x34) || ((op >> 8) == 0x3c)) - desc.targetpc = 0; - else - desc.targetpc = desc.pc + desc.length; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x35: // andn global,local - case 0x39: // or global,local - case 0x3d: // xor global,local - case 0x55: // and global,local - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x36: // andn local,global - case 0x3a: // or local,global - case 0x3e: // xor local,global - case 0x56: // and local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0x37: // andn local,local - case 0x3b: // or local,local - case 0x3f: // xor local,local - case 0x57: // and local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x40: // subc global,global - case 0x50: // addc global,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x41: // subc global,local - case 0x51: // addc global,local - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x42: // subc local,global - case 0x52: // addc local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0x43: // subc local,local - case 0x53: // addc local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x44: // not global,global - case 0x58: // neg global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - if (gsrc_code != PC_REGISTER) - desc.targetpc = BRANCH_TARGET_DYNAMIC; - else if ((op >> 8) == 0x44) - desc.targetpc = ~uint32_t(desc.pc + desc.length) & ~uint32_t(1); - else - desc.targetpc = uint32_t(-int32_t(desc.pc + desc.length)) & ~uint32_t(1); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x45: // not global,local - case 0x59: // neg global,local - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x46: // not local,global - case 0x5a: // neg local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0x47: // not local,local - case 0x5b: // neg local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x5c: // negs global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - if (gdst_code == PC_REGISTER) - { - if (gsrc_code != PC_REGISTER) - desc.targetpc = BRANCH_TARGET_DYNAMIC; - else - desc.targetpc = uint32_t(-int32_t(desc.pc + desc.length)) & ~uint32_t(1); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x5d: // negs global,local - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x5e: // negs local,global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - break; - case 0x5f: // negs local,local - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - break; - case 0x60: // cmpi global,simm - case 0x70: // cmpbi global,simm - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - break; - case 0x61: // cmpi global,limm - case 0x71: // cmpbi global,limm - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - break; - case 0x62: // cmpi local,simm - case 0x72: // cmpbi local,simm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x63: // cmpi local,limm - case 0x73: // cmpbi local,limm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - break; - case 0x64: // movi global,simm - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code + 16); - desc.regout.set(SR_CODE); - desc.set_can_cause_exception(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = op & 0xe; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - else if (gdst_code == 5) // TPR_REGISTER & 0xf - { - desc.set_end_sequence(); - } - break; - case 0x65: // movi global,limm - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code + 16); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - desc.set_can_cause_exception(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = read_limm(desc, op) & ~uint32_t(1); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - else if (gdst_code == 5) // TPR_REGISTER & 0xf - { - desc.set_end_sequence(); - } - break; - case 0x66: // movi local,simm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x67: // movi local,limm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - break; - case 0x68: // addi global,simm - case 0x6c: // addsi global,simm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (op & 0x04) desc.set_can_cause_exception(); // addsi - if (gdst_code == PC_REGISTER) - { - desc.targetpc = desc.pc + desc.length + (op & 0xe); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x69: // addi global,limm - case 0x6d: // addsi global,limm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - if (op & 0x04) desc.set_can_cause_exception(); // addsi - if (gdst_code == PC_REGISTER) - { - desc.targetpc = desc.pc + desc.length + (read_limm(desc, op) & ~uint32_t(1)); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x6a: // addi local,simm - case 0x6e: // addsi local,simm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - if (op & 0x04) desc.set_can_cause_exception(); // addsi - break; - case 0x6b: // addi local,limm - case 0x6f: // addsi local,limm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - if (op & 0x04) desc.set_can_cause_exception(); // addsi - break; - case 0x74: // andni global,simm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = (desc.pc + desc.length) & ~uint32_t(op & 0xf); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x78: // ori global,simm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = (desc.pc + desc.length) | (op & 0xe); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x7c: // xori global,simm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = (desc.pc + desc.length) ^ (op & 0xe); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x75: // andni global,limm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = (desc.pc + desc.length) & ~read_limm(desc, op); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x79: // ori global,limm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = (desc.pc + desc.length) | (read_limm(desc, op) & ~uint32_t(1)); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x7d: // xori global,limm - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - if (gdst_code == PC_REGISTER) - { - desc.targetpc = (desc.pc + desc.length) ^ (read_limm(desc, op) & ~uint32_t(1)); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - case 0x76: // andni local,simm - case 0x7a: // ori local,simm - case 0x7e: // xori local,simm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x77: // andni local,limm - case 0x7b: // ori local,limm - case 0x7f: // xori local,limm - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.length = hyperstone_device::imm_length(op) << 1; - break; - case 0x80: case 0x81: // shrdi - case 0x84: case 0x85: // sardi - case 0x88: case 0x89: // shldi - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x82: // shrd - case 0x86: // sard - case 0x8a: // shld - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x83: // shr - case 0x87: // sar - case 0x8b: // shl - case 0x8f: // rol - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0x8c: case 0x8d: // reserved - return false; - case 0x8e: // testlz - desc.regin.set(SR_CODE); - break; - case 0x90: // ldxx1 global,global + case 0x00: // chk global,global + case 0x01: // chk global,local + case 0x02: // chk local,global + case 0x03: // chk local,local + decode_rr(desc); + if (!desc.dst_is_src() || desc.src_is_sr()) { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; + desc.set_can_cause_exception(); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.dst_local) + desc.set_g_used(desc.dst_code); + if (!desc.src_local && (desc.src_code != SR_REGISTER)) + desc.set_g_used(desc.src_code); } - case 0x91: // ldxx1 global,local + else if (desc.dst_is_pc()) { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; + desc.set_will_cause_exception(); + desc.set_end_sequence(); } - case 0x92: // ldxx1 local,global + break; + case 0x04: // movd global,global + case 0x05: // movd global,local + case 0x06: // movd local,global + case 0x07: // movd local,local + decode_rr(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.src_local && (desc.dst_is_pc() || !desc.src_is_sr())) { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - break; + desc.set_g_used(desc.src_code); + desc.set_g_used(desc.src_code + 1); } - case 0x93: // ldxx1 local,local + if (!desc.dst_local) { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - break; + desc.set_g_modified(desc.dst_code); + desc.set_g_modified(desc.dst_code + 1); } - case 0x94: // ldxx2 global,global + desc.set_znv_modified(); + if (desc.dst_is_pc()) { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - } - case 0x95: // ldxx2 global,local - { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - if (gdst_code == PC_REGISTER) - { - desc.targetpc = BRANCH_TARGET_DYNAMIC; - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - } - break; - } - case 0x96: // ldxx2 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - break; - } - case 0x97: // ldxx2 local,local - { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_reads_memory(); - break; - } - case 0x98: // stxx1 global,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regin.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x99: // stxx1 global,local - { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x9a: // stxx1 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x9b: // stxx1 local,local - { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x9c: // stxx2 global,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regin.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); - desc.regout.set(G_CODE_BASE + gdst_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x9d: // stxx2 global,local - { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x9e: // stxx2 local,global - { - const uint16_t imm1 = read_imm1(desc); - const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin.set(G_CODE_BASE + gsrcf_code); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0x9f: // stxx2 local,local - { - const uint16_t imm1 = read_imm1(desc); - [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc); - - desc.regin.set(SR_CODE); - - desc.length = (imm1 & 0x8000) ? 6 : 4; - desc.set_writes_memory(); - break; - } - case 0xa0: // shri global (lo n) - case 0xa1: // shri global (hi n) - case 0xa4: // sari global (lo n) - case 0xa5: // sari global (hi n) - case 0xa8: // shli global (lo n) - case 0xa9: // shli global (hi n) - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - break; - case 0xa2: // shri local (lo n) - case 0xa3: // shri local (hi n) - case 0xa6: // sari local (lo n) - case 0xa7: // sari local (hi n) - case 0xaa: // shli local (lo n) - case 0xab: // shli local (hi n) - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - break; - case 0xac: case 0xad: case 0xae: case 0xaf: // reserved - return false; - case 0xb0: // mulu global,global - case 0xb4: // muls global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdstf_code); - desc.regout.set(SR_CODE); - break; - case 0xb1: // mulu global,local - case 0xb5: // muls global,local - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdstf_code); - desc.regout.set(SR_CODE); - break; - case 0xb2: // mulu local,global - case 0xb6: // muls local,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0xb3: // mulu local,local - case 0xb7: // muls local,local - desc.regout.set(SR_CODE); - break; - case 0xb8: // set global (lo n) - case 0xb9: // set global (hi n) - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gdst_code); - break; - case 0xba: // set local (lo n) - case 0xbb: // set local (hi n) - break; - case 0xbc: // mul global,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - break; - case 0xbd: // muls global,local - desc.regin.set(G_CODE_BASE + gdst_code); - desc.regout.set(G_CODE_BASE + gdst_code); - desc.regout.set(SR_CODE); - break; - case 0xbe: // muls local,global - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regout.set(SR_CODE); - break; - case 0xbf: // mulu local,local - desc.regout.set(SR_CODE); - break; - case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software - case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software - case 0xc8: case 0xc9: case 0xca: case 0xcb: // software - case 0xcc: case 0xcd: // software - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.set_g_used(SP_REGISTER); + desc.set_g_modified(SP_REGISTER); + desc.set_fp_modified(); desc.set_is_unconditional_branch(); + desc.set_can_cause_exception(); desc.set_end_sequence(); desc.set_can_change_modes(); - break; - case 0xce: // extend - 4 bytes - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + 14); // global regs 14, 15 - desc.regin.set(G_CODE_BASE + 15); - desc.regout.set(G_CODE_BASE + 14); // global regs 14, 15 - desc.regout.set(G_CODE_BASE + 15); - desc.length = 4; - break; - case 0xcf: // do - return false; - case 0xd0: // ldwr global - case 0xd4: // ldwp global - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gsrc_code); desc.set_reads_memory(); - break; - case 0xd1: // ldwr local - case 0xd5: // ldwp local - desc.regin.set(SR_CODE); - desc.set_reads_memory(); - break; - case 0xd2: // lddr global - case 0xd6: // lddp global - desc.regin.set(SR_CODE); - desc.regout.set(G_CODE_BASE + gsrc_code); - desc.regout.set(G_CODE_BASE + gsrcf_code); - desc.set_reads_memory(); - break; - case 0xd3: // lddr local - case 0xd7: // lddp local - desc.regin.set(SR_CODE); - desc.set_reads_memory(); - break; - case 0xd8: // stwr global - case 0xdc: // stwp global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.set_writes_memory(); - break; - case 0xd9: // stwr local - case 0xdd: // stwp local - desc.regin.set(SR_CODE); - desc.set_writes_memory(); - break; - case 0xda: // stdr global - case 0xde: // stdp global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.regin.set(G_CODE_BASE + gsrcf_code); - desc.set_writes_memory(); - break; - case 0xdb: // stdr local - case 0xdf: // stdp local - desc.regin.set(SR_CODE); - desc.set_writes_memory(); - break; - case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne - could be 4 bytes (pcrel) - case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel) - case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel) - desc.regin.set(SR_CODE); - desc.set_is_conditional_branch(); - desc.delayslots = 1; - desc.length = (op & 0x80) ? 4 : 2; - desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); - break; - case 0xec: // dbr - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - desc.delayslots = 1; - desc.length = (op & 0x80) ? 4 : 2; - desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); - break; - case 0xed: // frame - desc.regin.set(SR_CODE); - desc.regout.set(SR_CODE); - desc.set_writes_memory(); - break; - case 0xee: // call global - desc.regin.set(SR_CODE); - desc.regin.set(G_CODE_BASE + gsrc_code); - desc.set_is_unconditional_branch(); - desc.set_end_sequence(); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - if (gsrc_code == PC_REGISTER) - desc.targetpc = desc.pc + desc.length + (decode_call(desc) & ~uint32_t(1)); - else if (gsrc_code == SR_REGISTER) - desc.targetpc = decode_call(desc) & ~uint32_t(1); - else + } + break; + case 0x08: // divu global,global + case 0x09: // divu global,local + case 0x0a: // divu local,global + case 0x0b: // divu local,local + case 0x0c: // divs global,global + case 0x0d: // divs global,local + case 0x0e: // divs local,global + case 0x0f: // divs local,local + decode_rr(desc); + desc.set_can_cause_exception(); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_used(desc.dst_code + 1); + desc.set_g_modified(desc.dst_code); + desc.set_g_modified(desc.dst_code + 1); + } + desc.set_znv_modified(); + break; + case 0x10: // xm global,global + case 0x11: // xm global,local + case 0x12: // xm local,global + case 0x13: // xm local,local + decode_rrlim(desc); + if (desc.imm != 0U) + desc.set_can_cause_exception(); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + desc.set_g_modified(desc.dst_code); + break; + case 0x14: // mask global,global + case 0x15: // mask global,local + case 0x16: // mask local,global + case 0x17: // mask local,local + decode_rrconst(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + desc.set_g_modified(desc.dst_code); + desc.set_z_modified(); + if (desc.dst_is_pc()) + { + if (!desc.src_is_pc()) desc.targetpc = BRANCH_TARGET_DYNAMIC; - break; - case 0xef: // call local - desc.regin.set(SR_CODE); - desc.targetpc = BRANCH_TARGET_DYNAMIC; + else + desc.targetpc = (desc.pc + desc.length) & desc.imm; desc.set_is_unconditional_branch(); desc.set_end_sequence(); - desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4; - break; - case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne - case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht - case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt - desc.regin.set(SR_CODE); - desc.set_is_conditional_branch(); - desc.length = (op & 0x80) ? 4 : 2; - desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); - break; - case 0xfc: // br + } + break; + case 0x18: // sum global,global + case 0x19: // sum global,local + case 0x1a: // sum local,global + case 0x1b: // sum local,local + case 0x1c: // sums global,global + case 0x1d: // sums global,local + case 0x1e: // sums local,global + case 0x1f: // sums local,local + decode_rrconst(desc); + if ((op & 0x0400) && !desc.src_is_sr()) + desc.set_can_cause_exception(); // sums + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (desc.src_is_sr()) + desc.set_c_used(); + else if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + desc.set_g_modified(desc.dst_code); + if (op & 0x0400) + desc.set_znv_modified(); // sums + else + desc.set_cznv_modified(); // sum + if (desc.dst_is_pc()) + { + if (!desc.src_is_pc()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else + desc.targetpc = ((desc.pc + desc.length) + desc.imm) & ~uint32_t(1); desc.set_is_unconditional_branch(); desc.set_end_sequence(); - desc.length = (op & 0x80) ? 4 : 2; - desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op); - break; - case 0xfd: case 0xfe: case 0xff: // trap - desc.regin.set(SR_CODE); - desc.targetpc = BRANCH_TARGET_DYNAMIC; - if ((((op & 0x300) >> 6) | (op & 0x03)) == 15) + } + break; + case 0x20: // cmp global,global + case 0x21: // cmp global,local + case 0x22: // cmp local,global + case 0x30: // cmpb global,global + case 0x31: // cmpb global,local + case 0x32: // cmpb local,global + decode_rr(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!(op & 0x1000) && desc.src_is_sr()) + desc.set_c_used(); + else if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + desc.set_g_used(desc.dst_code); + if (op & 0x1000) + desc.set_z_modified(); // cmpb + else + desc.set_cznv_modified(); // cmp + break; + case 0x24: // mov global,global + case 0x25: // mov global,local + case 0x26: // mov local,global + case 0x27: // mov local,local + decode_rr(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.dst_local || !desc.src_local) + desc.regin.set(SR_REGISTER); // only the H bit is used + if (!desc.src_local) + { + desc.set_g_used(desc.src_code); + desc.set_g_used(desc.src_code + 16); + } + if (!desc.dst_local) + { + desc.set_can_cause_exception(); + desc.set_g_modified(desc.dst_code); + desc.set_g_modified(desc.dst_code + 16); + if (desc.dst_code == PC_REGISTER) { + if (!desc.src_is_pc()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else + desc.targetpc = desc.pc + desc.length; + desc.set_is_conditional_branch(); // technically it won't branch if H is clear + desc.set_end_sequence(); + } + else if (desc.dst_code == 5) // TPR_REGISTER & 0xf + { + desc.set_end_sequence(); + } + } + desc.set_znv_modified(); + break; + case 0x28: // add global,global + case 0x29: // add global,local + case 0x2a: // add local,global + case 0x2b: // add local,local + case 0x2c: // adds global,global + case 0x2d: // adds global,local + case 0x2e: // adds local,global + case 0x2f: // adds local,local + case 0x48: // sub global,global + case 0x49: // sub global,local + case 0x4a: // sub local,global + case 0x4b: // sub local,local + case 0x4c: // subs global,global + case 0x4d: // subs global,local + case 0x4e: // subs local,global + case 0x4f: // subs local,local + decode_rr(desc); + if (op & 0x0400) + desc.set_can_cause_exception(); // adds, subs + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (desc.src_is_sr()) + desc.set_c_used(); + else if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + if (desc.dst_code == PC_REGISTER) + { + if (!desc.src_is_pc()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else if ((op & 0xf800) == 0x2800) + desc.targetpc = (desc.pc + desc.length) << 1; // add, adds + else + desc.targetpc = 0; // sub, subs desc.set_is_unconditional_branch(); desc.set_end_sequence(); } - else + } + if (op & 0x0400) + desc.set_znv_modified(); // adds, subs + else + desc.set_cznv_modified(); // add, sub + break; + case 0x34: // andn global,global + case 0x35: // andn global,local + case 0x36: // andn local,global + case 0x37: // andn local,local + case 0x38: // or global,global + case 0x39: // or global,local + case 0x3a: // or local,global + case 0x3b: // or local,local + case 0x3c: // xor global,global + case 0x3d: // xor global,local + case 0x3e: // xor local,global + case 0x3f: // xor local,local + case 0x54: // and global,global + case 0x55: // and global,local + case 0x56: // and local,global + case 0x57: // and local,local + decode_rr(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + if (desc.dst_code == PC_REGISTER) { - desc.set_is_conditional_branch(); + if (!desc.src_is_pc()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else if ((op & 0xf400) == 0x3400) + desc.targetpc = 0; // andn, xor + else + desc.targetpc = desc.pc + desc.length; // or, and + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); } + } + desc.set_z_modified(); + break; + case 0x40: // subc global,global + case 0x41: // subc global,local + case 0x42: // subc local,global + case 0x43: // subc local,local + case 0x50: // addc global,global + case 0x51: // addc global,local + case 0x52: // addc local,global + case 0x53: // addc local,local + decode_rr(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + desc.set_cz_used(); + if (!desc.src_local && !desc.src_is_sr()) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + if (desc.dst_code == PC_REGISTER) + { + if (!desc.src_is_sr() || ((op & 0xfc00) == 0x4000)) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else + desc.targetpc = desc.pc + desc.length; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } + } + desc.set_cznv_modified(); + break; + case 0x44: // not global,global + case 0x45: // not global,local + case 0x46: // not local,global + case 0x47: // not local,local + case 0x58: // neg global,global + case 0x59: // neg global,local + case 0x5a: // neg local,global + case 0x5b: // neg local,local + case 0x5c: // negs global,global + case 0x5d: // negs global,local + case 0x5e: // negs local,global + case 0x5f: // negs local,local + decode_rr(desc); + if (((op & 0xfc00) == 0x5c00) && !desc.src_is_sr()) + desc.set_can_cause_exception(); // negs + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (((op & 0xf800) == 0x5800) & desc.src_is_sr()) + desc.set_c_used(); + else if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + { + desc.set_g_modified(desc.dst_code); + if (desc.dst_code == PC_REGISTER) + { + if (!desc.src_is_pc()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else if ((op & 0xfc00) == 0x4400) + desc.targetpc = ~(desc.pc + desc.length) & ~uint32_t(1); // not + else + desc.targetpc = uint32_t(-int32_t(desc.pc + desc.length)) & ~uint32_t(1); // neg, negs + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } + } + if (!(op & 0x1000)) + desc.set_z_modified(); // not + else if (!(op & 0x0400)) + desc.set_cznv_modified(); // neg + else + desc.set_znv_modified(); // negs + break; + case 0x60: // cmpi global,imm + case 0x61: // cmpi global,imm + case 0x62: // cmpi local,imm + case 0x63: // cmpi local,imm + case 0x70: // cmpbi global,imm + case 0x71: // cmpbi global,imm + case 0x72: // cmpbi local,imm + case 0x73: // cmpbi local,imm + decode_rimm(desc, op & 0x1000); + if (desc.dst_local) + desc.set_fp_used(); + else + desc.set_g_used(desc.dst_code); + if (op & 0x1000) + desc.set_z_modified(); // cmpbi + else + desc.set_cznv_modified(); // cmpi + break; + case 0x64: // movi global,imm + case 0x65: // movi global,imm + decode_rimm(desc, false); + desc.set_can_cause_exception(); + desc.regin.set(SR_REGISTER); // only the H bit is used + desc.set_g_modified(desc.dst_code); + desc.set_g_modified(desc.dst_code + 16); + if (desc.dst_code == PC_REGISTER) + { + desc.targetpc = desc.imm & ~uint32_t(1); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } + else if (desc.dst_code == 5) // TPR_REGISTER & 0xf + { + desc.set_end_sequence(); + } + break; + case 0x66: // movi local,imm + case 0x67: // movi local,imm + decode_rimm(desc, false); + desc.set_fp_used(); + desc.set_znv_modified(); + break; + case 0x68: // addi global,imm + case 0x69: // addi global,imm + case 0x6a: // addi local,imm + case 0x6b: // addi local,imm + case 0x6c: // addsi global,imm + case 0x6d: // addsi global,imm + case 0x6e: // addsi local,imm + case 0x6f: // addsi local,imm + decode_rimm(desc, false); + if (op & 0x0400) + desc.set_can_cause_exception(); // addsi + if (desc.dst_local) + desc.set_fp_used(); + if (!(op & 0x010f)) + desc.set_cz_used(); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + if (desc.dst_code == PC_REGISTER) + { + desc.targetpc = (desc.pc + desc.length + desc.imm) & ~uint32_t(1); + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } + } + if (op & 0x0400) + desc.set_znv_modified(); // addsi + else + desc.set_cznv_modified(); // addi + break; + case 0x74: // andni global,imm + case 0x75: // andni global,imm + case 0x78: // ori global,imm + case 0x79: // ori global,imm + case 0x7c: // xori global,imm + case 0x7d: // xori global,imm + decode_rimm(desc, !(op & 0x0800)); + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + if (desc.dst_code == PC_REGISTER) + { + if (!(op & 0x0800)) + desc.targetpc = (desc.pc + desc.length) & ~desc.imm; // andni + else if (!(op & 0x0400)) + desc.targetpc = ((desc.pc + desc.length) | desc.imm) & ~uint32_t(1); // ori + else + desc.targetpc = ((desc.pc + desc.length) ^ desc.imm) & ~uint32_t(1); // xori + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + } + desc.set_z_modified(); + break; + case 0x76: // andni local,imm + case 0x77: // andni local,imm + case 0x7a: // ori local,imm + case 0x7b: // ori local,imm + case 0x7e: // xori local,imm + case 0x7f: // xori local,imm + decode_rimm(desc, !(op & 0x0800)); + desc.set_fp_used(); + desc.set_z_modified(); + break; + case 0x80: case 0x81: // shrdi + case 0x84: case 0x85: // sardi + case 0x88: case 0x89: // shldi + decode_ln(desc); + desc.set_fp_used(); + if (op & 0x0800) + desc.set_cznv_modified(); // shldi + else + desc.set_czn_modified(); // shrdi, sardi + break; + case 0x82: // shrd + case 0x83: // shr + case 0x86: // sard + case 0x87: // sar + case 0x8a: // shld + case 0x8b: // shl + case 0x8f: // rol + decode_ll(desc); + desc.set_fp_used(); + if (op & 0x0800) + desc.set_cznv_modified(); // shld, shl, rol + else + desc.set_czn_modified(); // shrd, shr, sard, sar + break; + case 0x8c: case 0x8d: // reserved + return false; + case 0x8e: // testlz + decode_ll(desc); + desc.set_fp_used(); + break; + case 0x90: // ldxx.d/a global,global + case 0x91: // ldxx.d/a global,local + case 0x92: // ldxx.d/a local,global + case 0x93: // ldxx.d/a local,local + case 0x94: // ldxx.n/s global,global + case 0x95: // ldxx.n/s global,local + case 0x96: // ldxx.n/s local,global + case 0x97: // ldxx.n/s local,local + decode_rrdis(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.dst_local && !desc.dst_is_sr()) + desc.set_g_used(desc.dst_code); + if ((op & 0x0400) && !desc.dst_local) + desc.set_g_modified(desc.dst_code); + if (!desc.src_local) + { + desc.set_g_modified(desc.src_code); + if ((desc.opptr[1] & 0x3000) == 0x3000) + { + if ((desc.imm & ((op & 0x0400) ? 0x3 : 0x1)) == 0x1) + desc.set_g_modified(desc.src_code + 1); + } + } + desc.set_reads_memory(); + break; + case 0x98: // stxx.d/a global,global + case 0x99: // stxx.d/a global,local + case 0x9a: // stxx.d/a local,global + case 0x9b: // stxx.d/a local,local + case 0x9c: // stxx.n/s global,global + case 0x9d: // stxx.n/s global,local + case 0x9e: // stxx.n/s local,global + case 0x9f: // stxx.n/s local,local + decode_rrdis(desc); + if (((desc.opptr[1] & 0x3000) == 0x0000) || (((desc.opptr[1] & 0x3000) == 0x0000) && (desc.imm & 0x1))) desc.set_can_cause_exception(); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.dst_local && !desc.dst_is_sr()) + desc.set_g_used(desc.dst_code); + if (!desc.src_local) + { + desc.set_g_used(desc.src_code); + if ((desc.opptr[1] & 0x3000) == 0x3000) + { + if ((desc.imm & ((op & 0x0400) ? 0x3 : 0x1)) == 0x1) + desc.set_g_used(desc.src_code + 1); + } + } + if ((op & 0x0400) && !desc.dst_local) + desc.set_g_modified(desc.dst_code); + desc.set_writes_memory(); + break; + case 0xa0: // shri global + case 0xa1: // shri global + case 0xa2: // shri local + case 0xa3: // shri local + case 0xa4: // sari global + case 0xa5: // sari global + case 0xa6: // sari local + case 0xa7: // sari local + case 0xa8: // shli global + case 0xa9: // shli global + case 0xaa: // shli local + case 0xab: // shli local + decode_rn(desc); + if (desc.dst_local) + desc.set_fp_used(); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + } + if (op & 0x0800) + desc.set_cznv_modified(); // shli + else + desc.set_czn_modified(); // shri, sari + break; + case 0xac: case 0xad: case 0xae: case 0xaf: // reserved + return false; + case 0xb0: // mulu global,global + case 0xb1: // mulu global,local + case 0xb2: // mulu local,global + case 0xb3: // mulu local,local + case 0xb4: // muls global,global + case 0xb5: // muls global,local + case 0xb6: // muls local,global + case 0xb7: // muls local,local + case 0xbc: // mul global,global + case 0xbd: // mul global,local + case 0xbe: // mul local,global + case 0xbf: // mul local,local + decode_rr(desc); + if (desc.dst_local || desc.src_local) + desc.set_fp_used(); + if (!desc.src_local) + desc.set_g_used(desc.src_code); + if (!desc.dst_local) + { + desc.set_g_used(desc.dst_code); + desc.set_g_modified(desc.dst_code); + if (!(op & 0x0800)) + desc.set_g_modified(desc.dst_code + 1); // mulu, muls + } + desc.set_cznv_modified(); + break; + case 0xb8: // set global + case 0xb9: // set global + case 0xba: // set local + case 0xbb: // set local + decode_rn(desc); + if (desc.dst_local) + desc.set_fp_used(); + switch (desc.imm) + { + case 4: case 5: case 20: case 21: // le, gt, lem, gtm + desc.set_z_used(); + desc.set_n_used(); break; + case 6: case 7: case 22: case 23: // lt/n, ge/nn, ltm/nm, gem/nnm + desc.set_n_used(); + break; + case 8: case 9: case 24: case 25: // se, ht, sem, htm + desc.set_cz_used(); + break; + case 10: case 11: case 26: case 27: // st/c, he/nc, stm/cm, hem/ncm + desc.set_c_used(); + break; + case 12: case 13: case 28: case 29: // e/z, ne/nz, em/zm, nem/nzm + desc.set_z_used(); + break; + case 14: case 15: case 30: case 31: // v, nv, vm, nvm + desc.set_v_used(); + break; + } + if (!desc.dst_local) + desc.set_g_modified(desc.dst_code); + break; + case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software + case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software + case 0xc8: case 0xc9: case 0xca: case 0xcb: // software + case 0xcc: case 0xcd: // software + case 0xcf: // do + decode_ll(desc); + desc.set_fp_used(); + desc.set_g_used(PC_REGISTER); + desc.set_g_used(SR_REGISTER); + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + desc.set_can_change_modes(); + break; + case 0xce: // extend + decode_llext(desc); + desc.set_fp_used(); + desc.set_g_used(14); + desc.set_g_used(15); + desc.set_g_modified(14); + desc.set_g_modified(15); + break; + case 0xd0: // ldwr global + case 0xd1: // ldwr local + case 0xd2: // lddr global + case 0xd3: // lddr local + case 0xd4: // ldwp global + case 0xd5: // ldwp local + case 0xd6: // lddp global + case 0xd7: // lddp local + decode_lr(desc); + desc.set_fp_used(); + if (!desc.src_local) + { + desc.set_g_modified(desc.src_code); + if (op & 0x0200) + desc.set_g_modified(desc.src_code + 1); + } + desc.set_reads_memory(); + break; + case 0xd8: // stwr global + case 0xd9: // stwr local + case 0xda: // stdr global + case 0xdb: // stdr local + case 0xdc: // stwp global + case 0xdd: // stwp local + case 0xde: // stdp global + case 0xdf: // stdp local + decode_lr(desc); + desc.set_fp_used(); + if (!desc.src_local) + { + desc.set_g_used(desc.src_code); + if (op & 0x0200) + desc.set_g_used(desc.src_code + 1); + } + desc.set_writes_memory(); + break; + case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne + case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht + case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dble, dbgt + case 0xec: // dbr + case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne + case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht + case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, ble, bgt + case 0xfc: // br + decode_pcrel(desc); + switch (op & 0x0f00) + { + case 0x0000: case 0x0100: // bv, bnv + desc.set_v_used(); + break; + case 0x0200: case 0x0300: // be/bz, bne/bnz + desc.set_z_used(); + break; + case 0x0400: case 0x0500: // bst/bc, bhe/bnc + desc.set_c_used(); + break; + case 0x0600: case 0x0700: // bse, bht + desc.set_cz_used(); + break; + case 0x0800: case 0x0900: // blt/bn, bge/bnn + desc.set_n_used(); + break; + case 0x0a00: case 0x0b00: // ble, bgt + desc.set_z_used(); + desc.set_n_used(); + break; + case 0x0c00: // br + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + break; + } + if ((op & 0x0f00) != 0x0c00) + desc.set_is_conditional_branch(); + desc.delayslots = (op & 0x1000) ? 0 : 1; + desc.targetpc = desc.pc + desc.length + desc.imm; + break; + case 0xed: // frame + desc.set_can_cause_exception(); + desc.set_fp_used(); + desc.regin.set(SR_REGISTER); // uses FL + desc.set_g_used(SP_REGISTER); + desc.set_g_used(UB_REGISTER); + desc.set_g_modified(SP_REGISTER); + desc.set_fp_modified(); + desc.set_writes_memory(); + break; + case 0xee: // call global + case 0xef: // call local + decode_lrconst(desc); + if (!desc.src_local && !desc.src_is_sr()) + desc.set_g_used(desc.src_code); + desc.set_g_used(PC_REGISTER); + desc.set_g_used(SR_REGISTER); + if (desc.src_is_pc()) + desc.targetpc = (desc.pc + desc.length + desc.imm) & ~uint32_t(1); + else if (desc.src_is_sr()) + desc.targetpc = desc.imm & ~uint32_t(1); + else + desc.targetpc = BRANCH_TARGET_DYNAMIC; + desc.set_is_unconditional_branch(); + desc.set_end_sequence(); + break; + case 0xfd: case 0xfe: case 0xff: // trap + switch (bitswap<4>(op, 9, 8, 1, 0)) + { + case 4: case 5: // traple, trapgt + desc.set_z_used(); + desc.set_n_used(); + break; + case 6: case 7: // traplt, trapge + desc.set_n_used(); + break; + case 8: case 9: // trapse, trapht + desc.set_cz_used(); + break; + case 10: case 11: // trapst, traphe + desc.set_c_used(); + break; + case 12: case 13: // trape, trapne + desc.set_z_used(); + break; + case 14: // trapv + desc.set_z_used(); + break; + case 15: // trap + desc.set_will_cause_exception(); + desc.set_end_sequence(); + break; + } + if (bitswap<4>(op, 9, 8, 1, 0) != 15) + desc.set_can_cause_exception(); + break; } return true; } diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h index 22dbf96c89c..f3075a415c8 100644 --- a/src/devices/cpu/e132xs/e132xsfe.h +++ b/src/devices/cpu/e132xs/e132xsfe.h @@ -1,5 +1,12 @@ // license:BSD-3-Clause -// copyright-holders:Ryan Holtz +// copyright-holders:Vas Crabb +/*************************************************************************** + + e132xsfe.h + + Hyperstone E1 instruction decoder + +***************************************************************************/ #ifndef MAME_CPU_E132XS_E132XSFE_H #define MAME_CPU_E132XS_E132XSFE_H @@ -10,13 +17,99 @@ #include "cpu/drcfe.h" #include +#include #include -class hyperstone_device::opcode_desc : public opcode_desc_base +class hyperstone_device::opcode_desc : public opcode_desc_base { public: - uint16_t opptr[3]; // copy of up to 3 halfwords of opcode + uint16_t opptr[3]; + uint8_t dst_code; + uint8_t src_code; + bool dst_local; + bool src_local; + uint32_t imm; + + void set_g_used(unsigned n) + { + regin.set(REG_G0 + n); + if (n == 1) // SR + { + regin.set(REG_C); + regin.set(REG_Z); + regin.set(REG_N); + regin.set(REG_V); + regin.set(REG_FP); + } + } + + void set_c_used() { regin.set(REG_C); } + void set_z_used() { regin.set(REG_Z); } + void set_n_used() { regin.set(REG_N); } + void set_v_used() { regin.set(REG_V); } + void set_fp_used() { regin.set(REG_FP); } + + void set_cz_used() + { + set_c_used(); + set_z_used(); + } + + void set_g_modified(unsigned n) + { + regout.set(REG_G0 + n); + if (n == 1) // SR + { + regout.set(REG_C); + regout.set(REG_Z); + regout.set(REG_N); + regout.set(REG_V); + } + } + + void set_z_modified() + { + regout.set(REG_SR); + regout.set(REG_Z); + } + + void set_znv_modified() + { + regout.set(REG_SR); + regout.set(REG_Z); + regout.set(REG_N); + regout.set(REG_V); + } + + void set_czn_modified() + { + regout.set(REG_SR); + regout.set(REG_C); + regout.set(REG_Z); + regout.set(REG_N); + } + + void set_cznv_modified() + { + regout.set(REG_SR); + regout.set(REG_C); + regout.set(REG_Z); + regout.set(REG_N); + regout.set(REG_V); + } + + void set_fp_modified() + { + regout.set(REG_SR); + regout.set(REG_FP); + } + + bool c_calc_required() const { return regreq[REG_C] || in_delay_slot(); } + bool z_calc_required() const { return regreq[REG_Z] || in_delay_slot(); } + bool n_calc_required() const { return regreq[REG_N] || in_delay_slot(); } + bool v_calc_required() const { return regreq[REG_V] || in_delay_slot(); } + bool condition_calc_required() const { return regreq[REG_C] || regreq[REG_Z] || regreq[REG_N] || regreq[REG_V] || in_delay_slot(); } void set_can_change_modes() { m_extra_flags.set(CAN_CHANGE_MODES); } void set_reads_memory() { m_extra_flags.set(READS_MEMORY); } @@ -26,6 +119,12 @@ public: bool reads_memory() const { return m_extra_flags[READS_MEMORY]; } bool writes_memory() const { return m_extra_flags[WRITES_MEMORY]; } + bool dst_is_src() const { return (dst_local == src_local) && (dst_code == src_code); } + bool dst_is_pc() const { return !dst_local && (dst_code == 0); } + bool dst_is_sr() const { return !dst_local && (dst_code == 1); } + bool src_is_pc() const { return !src_local && (src_code == 0); } + bool src_is_sr() const { return !src_local && (src_code == 1); } + // epc - compute the exception PC uint32_t epc() const { @@ -34,13 +133,35 @@ public: void reset(offs_t curpc, bool in_delay_slot) { + static_assert(REG_COUNT <= 40); + opcode_desc_base::reset(curpc, in_delay_slot); std::fill(std::begin(opptr), std::end(opptr), 0); + dst_code = ~uint8_t(0); + src_code = ~uint8_t(0); + dst_local = false; + src_local = false; + imm = 0x80000000; m_extra_flags.reset(); } protected: + enum + { + REG_G0 = 0, + REG_PC = REG_G0, + REG_SR = REG_G0 + 1, + + REG_C = REG_G0 + 32, + REG_Z, + REG_N, + REG_V, + REG_FP, + + REG_COUNT + }; + enum { CAN_CHANGE_MODES = 0, @@ -65,13 +186,23 @@ public: private: bool describe(opcode_desc &desc, opcode_desc const *prev); - uint16_t read_word(opcode_desc &desc); - uint16_t read_imm1(opcode_desc &desc); - uint16_t read_imm2(opcode_desc &desc); - uint32_t read_ldstxx_imm(opcode_desc &desc); - uint32_t read_limm(opcode_desc &desc, uint16_t op); - int32_t decode_pcrel(opcode_desc &desc, uint16_t op); - int32_t decode_call(opcode_desc &desc); + void read_op(opcode_desc &desc); + void read_imm1(opcode_desc &desc); + void read_imm2(opcode_desc &desc); + void decode_const(opcode_desc &desc); + + void decode_ll(opcode_desc &desc); + void decode_llext(opcode_desc &desc); + void decode_lr(opcode_desc &desc); + void decode_rr(opcode_desc &desc); + void decode_ln(opcode_desc &desc); + void decode_rn(opcode_desc &desc); + void decode_pcrel(opcode_desc &desc); + void decode_lrconst(opcode_desc &desc); + void decode_rrconst(opcode_desc &desc); + void decode_rrdis(opcode_desc &desc); + void decode_rimm(opcode_desc &desc, bool cmpbi_andni); + void decode_rrlim(opcode_desc &desc); hyperstone_device &m_cpu; }; diff --git a/src/devices/cpu/powerpc/ppcfe.cpp b/src/devices/cpu/powerpc/ppcfe.cpp index 1819d906ba7..6b8be8061fe 100644 --- a/src/devices/cpu/powerpc/ppcfe.cpp +++ b/src/devices/cpu/powerpc/ppcfe.cpp @@ -207,6 +207,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX))) return false; desc.set_will_cause_exception(); + desc.set_end_sequence(); if (is_601_class()) desc.cycles = 16; // 601 else if (is_603_class()) From 16c5ff55a4a63c45665d4ec6ef0ec68e2c09e1e2 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Wed, 4 Mar 2026 00:23:48 +0100 Subject: [PATCH 126/351] Fuck gcc --- src/devices/bus/hp_dio/hp98265a.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/devices/bus/hp_dio/hp98265a.cpp b/src/devices/bus/hp_dio/hp98265a.cpp index bb49935d739..4224d96953c 100644 --- a/src/devices/bus/hp_dio/hp98265a.cpp +++ b/src/devices/bus/hp_dio/hp98265a.cpp @@ -28,8 +28,6 @@ public: // construction/destruction dio16_98265a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - void mb87030(device_t *device); - protected: dio16_98265a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -58,7 +56,6 @@ private: static constexpr int REG_CONTROL_DE0 = (1 << 0); static constexpr int REG_CONTROL_DE1 = (1 << 1); - static void mb87030_scsi_adapter(device_t *device); required_ioport m_sw1; required_ioport m_sw2; int get_int_level(); From 6e04a8591ee71f6508e082423f0fc5e8a0e69e67 Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Wed, 4 Mar 2026 10:51:38 +0100 Subject: [PATCH 127/351] 6502: m_ify --- src/devices/cpu/m6502/deco16.cpp | 18 +- src/devices/cpu/m6502/deco16.h | 4 +- src/devices/cpu/m6502/gew12.cpp | 2 +- src/devices/cpu/m6502/gew7.cpp | 2 +- src/devices/cpu/m6502/m3745x.cpp | 2 +- src/devices/cpu/m6502/m37640.cpp | 2 +- src/devices/cpu/m6502/m4510.cpp | 98 +- src/devices/cpu/m6502/m4510.h | 28 +- src/devices/cpu/m6502/m50734.cpp | 4 +- src/devices/cpu/m6502/m6500_1.cpp | 4 +- src/devices/cpu/m6502/m6502.cpp | 450 ++-- src/devices/cpu/m6502/m6502.h | 78 +- src/devices/cpu/m6502/m6502d.cpp | 12 +- src/devices/cpu/m6502/m6502d.h | 8 +- src/devices/cpu/m6502/m6502make.py | 40 +- src/devices/cpu/m6502/m6502mcu.ipp | 48 +- src/devices/cpu/m6502/m6503.cpp | 8 +- src/devices/cpu/m6502/m6504.cpp | 8 +- src/devices/cpu/m6502/m6507.cpp | 8 +- src/devices/cpu/m6502/m6509.cpp | 62 +- src/devices/cpu/m6502/m6509.h | 16 +- src/devices/cpu/m6502/m6510.cpp | 112 +- src/devices/cpu/m6502/m6510.h | 16 +- src/devices/cpu/m6502/m65ce02.cpp | 44 +- src/devices/cpu/m6502/m65ce02.h | 10 +- src/devices/cpu/m6502/m740.cpp | 110 +- src/devices/cpu/m6502/m740.h | 6 +- src/devices/cpu/m6502/m740d.cpp | 4 +- src/devices/cpu/m6502/m740d.h | 2 +- src/devices/cpu/m6502/odeco16.lst | 108 +- src/devices/cpu/m6502/om4510.lst | 26 +- src/devices/cpu/m6502/om6502.lst | 2960 ++++++++++----------- src/devices/cpu/m6502/om6509.lst | 28 +- src/devices/cpu/m6502/om6510.lst | 64 +- src/devices/cpu/m6502/om65ce02.lst | 2212 +++++++-------- src/devices/cpu/m6502/om740.lst | 2578 +++++++++--------- src/devices/cpu/m6502/or65c19.lst | 490 ++-- src/devices/cpu/m6502/orp2a03.lst | 490 ++-- src/devices/cpu/m6502/ovt3xx_spu.lst | 72 +- src/devices/cpu/m6502/ow65c02.lst | 1126 ++++---- src/devices/cpu/m6502/ow65c02s.lst | 1122 ++++---- src/devices/cpu/m6502/oxavix.lst | 1424 +++++----- src/devices/cpu/m6502/oxavix2000.lst | 352 +-- src/devices/cpu/m6502/r65c19.cpp | 90 +- src/devices/cpu/m6502/r65c19.h | 10 +- src/devices/cpu/m6502/rp2a03.cpp | 4 +- src/devices/cpu/m6502/st2204.cpp | 78 +- src/devices/cpu/m6502/st2204.h | 2 +- src/devices/cpu/m6502/st2205u.cpp | 182 +- src/devices/cpu/m6502/st2205u.h | 4 +- src/devices/cpu/m6502/st2xxx.cpp | 74 +- src/devices/cpu/m6502/st2xxx.h | 18 +- src/devices/cpu/m6502/vt3xx_spu.cpp | 6 +- src/devices/cpu/m6502/w65c02s.h | 2 +- src/devices/cpu/m6502/xavix.cpp | 32 +- src/devices/cpu/m6502/xavix.h | 4 +- src/devices/machine/elan_ep3a19a_soc.cpp | 8 +- src/devices/machine/elan_eu3a05_soc.cpp | 8 +- src/devices/machine/elan_eu3a14_soc.cpp | 8 +- src/mame/dataeast/deco222.cpp | 12 +- src/mame/dataeast/deco222.h | 2 +- src/mame/dataeast/decocpu6.cpp | 6 +- src/mame/dataeast/decocpu7.cpp | 20 +- src/mame/dataeast/decocpu7.h | 4 +- src/mame/nintendo/m6502_swap_op_d2_d7.cpp | 10 +- src/mame/nintendo/m6502_swap_op_d2_d7.h | 2 +- src/mame/nintendo/m6502_swap_op_d5_d6.cpp | 32 +- src/mame/nintendo/m6502_swap_op_d5_d6.h | 4 +- src/mame/nintendo/rp2a03_vtscr.cpp | 16 +- src/mame/nintendo/rp2a03_vtscr.h | 2 +- 70 files changed, 7449 insertions(+), 7449 deletions(-) diff --git a/src/devices/cpu/m6502/deco16.cpp b/src/devices/cpu/m6502/deco16.cpp index 0e160c9a0b9..b78f4f8888c 100644 --- a/src/devices/cpu/m6502/deco16.cpp +++ b/src/devices/cpu/m6502/deco16.cpp @@ -21,8 +21,8 @@ DEFINE_DEVICE_TYPE(DECO16, deco16_device, "deco16", "Data East DECO16") deco16_device::deco16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, DECO16, tag, owner, clock), - io(nullptr), - io_config("io", ENDIANNESS_LITTLE, 8, 16) + m_io(nullptr), + m_io_config("io", ENDIANNESS_LITTLE, 8, 16) { } @@ -33,25 +33,25 @@ std::unique_ptr deco16_device::create_disassembler() void deco16_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); - io = &space(AS_IO); + m_io = &space(AS_IO); } device_memory_interface::space_config_vector deco16_device::memory_space_config() const { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config), - std::make_pair(AS_IO, &io_config) + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config), + std::make_pair(AS_IO, &m_io_config) }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_IO, &io_config) + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_IO, &m_io_config) }; } diff --git a/src/devices/cpu/m6502/deco16.h b/src/devices/cpu/m6502/deco16.h index 60c0e2a4eaf..4418b0a3235 100644 --- a/src/devices/cpu/m6502/deco16.h +++ b/src/devices/cpu/m6502/deco16.h @@ -24,8 +24,8 @@ public: virtual void do_exec_partial() override; protected: - address_space *io; - address_space_config io_config; + address_space *m_io; + address_space_config m_io_config; virtual space_config_vector memory_space_config() const override; virtual void device_start() override ATTR_COLD; diff --git a/src/devices/cpu/m6502/gew12.cpp b/src/devices/cpu/m6502/gew12.cpp index 4d77abc7771..bef22ff7855 100644 --- a/src/devices/cpu/m6502/gew12.cpp +++ b/src/devices/cpu/m6502/gew12.cpp @@ -25,7 +25,7 @@ gew12_device::gew12_device(const machine_config &mconfig, const char *tag, devic , m_rom(*this, DEVICE_SELF) , m_bank(*this, "bank%u", 0U) { - program_config.m_internal_map = address_map_constructor(FUNC(gew12_device::internal_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(gew12_device::internal_map), this); } diff --git a/src/devices/cpu/m6502/gew7.cpp b/src/devices/cpu/m6502/gew7.cpp index 76e1378d9e8..b501d4684cf 100644 --- a/src/devices/cpu/m6502/gew7.cpp +++ b/src/devices/cpu/m6502/gew7.cpp @@ -26,7 +26,7 @@ gew7_device::gew7_device(const machine_config &mconfig, const char *tag, device_ , m_bank(*this, "bank%u", 0U) , m_pcm(*this, "pcm") { - program_config.m_internal_map = address_map_constructor(FUNC(gew7_device::internal_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(gew7_device::internal_map), this); std::fill(std::begin(m_port_force_bits), std::end(m_port_force_bits), 0); std::fill(std::begin(m_port_force_mask), std::end(m_port_force_mask), 0); diff --git a/src/devices/cpu/m6502/m3745x.cpp b/src/devices/cpu/m6502/m3745x.cpp index a8552e51d4b..7871f22d90d 100644 --- a/src/devices/cpu/m6502/m3745x.cpp +++ b/src/devices/cpu/m6502/m3745x.cpp @@ -98,7 +98,7 @@ void m3745x_device::device_reset() { m740_device::device_reset(); - SP = 0x01ff; // we have the "traditional" stack in page 1, not 0 like some M740 derivatives + m_SP = 0x01ff; // we have the "traditional" stack in page 1, not 0 like some M740 derivatives for (auto & elem : m_timers) { diff --git a/src/devices/cpu/m6502/m37640.cpp b/src/devices/cpu/m6502/m37640.cpp index 7341e283178..c614aef135a 100644 --- a/src/devices/cpu/m6502/m37640.cpp +++ b/src/devices/cpu/m6502/m37640.cpp @@ -12,7 +12,7 @@ m37640_device::m37640_device(const machine_config &mconfig, const char *tag, dev m740_device(mconfig, M37640, tag, owner, clock), m_mode(mode) { - program_config.m_internal_map = address_map_constructor(FUNC(m37640_device::map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(m37640_device::map), this); } void m37640_device::device_start() diff --git a/src/devices/cpu/m6502/m4510.cpp b/src/devices/cpu/m6502/m4510.cpp index 4e6f97b56e4..7f881067a50 100644 --- a/src/devices/cpu/m6502/m4510.cpp +++ b/src/devices/cpu/m6502/m4510.cpp @@ -19,26 +19,26 @@ DEFINE_DEVICE_TYPE(M4510, m4510_device, "m4510", "CSG 4510") m4510_device::m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m65ce02_device(mconfig, M4510, tag, owner, clock), - map_enable(0), - nomap(false), - read_port(*this, 0), - write_port(*this), - dir(0), port(0), drive(0) + m_map_enable(0), + m_nomap(false), + m_read_port(*this, 0), + m_write_port(*this), + m_dir(0), m_port(0), m_drive(0) { - program_config.m_addr_width = 20; - program_config.m_logaddr_width = 16; - program_config.m_page_shift = 13; - sprogram_config.m_addr_width = 20; - sprogram_config.m_logaddr_width = 16; - sprogram_config.m_page_shift = 13; - pullup = 0x00; - floating = 0x00; + m_program_config.m_addr_width = 20; + m_program_config.m_logaddr_width = 16; + m_program_config.m_page_shift = 13; + m_sprogram_config.m_addr_width = 20; + m_sprogram_config.m_logaddr_width = 16; + m_sprogram_config.m_page_shift = 13; + m_pullup = 0x00; + m_floating = 0x00; } void m4510_device::set_pulls(uint8_t _pullup, uint8_t _floating) { - pullup = _pullup; - floating = _floating; + m_pullup = _pullup; + m_floating = _floating; } std::unique_ptr m4510_device::create_disassembler() @@ -48,67 +48,67 @@ std::unique_ptr m4510_device::create_disassembler() void m4510_device::init_port() { - save_item(NAME(pullup)); - save_item(NAME(floating)); - save_item(NAME(dir)); - save_item(NAME(port)); - save_item(NAME(drive)); + save_item(NAME(m_pullup)); + save_item(NAME(m_floating)); + save_item(NAME(m_dir)); + save_item(NAME(m_port)); + save_item(NAME(m_drive)); } void m4510_device::device_start() { - mintf = std::make_unique(this); + m_mintf = std::make_unique(this); m65ce02_device::init(); init_port(); - save_item(NAME(map_offset)); - save_item(NAME(map_enable)); + save_item(NAME(m_map_offset)); + save_item(NAME(m_map_enable)); } void m4510_device::device_reset() { - map_offset[0] = map_offset[1] = 0; - map_enable = 0; - nomap = true; + m_map_offset[0] = m_map_offset[1] = 0; + m_map_enable = 0; + m_nomap = true; m65ce02_device::device_reset(); - dir = 0xff; - port = 0xff; - drive = 0xff; + m_dir = 0xff; + m_port = 0xff; + m_drive = 0xff; update_port(); } void m4510_device::update_port() { - drive = (port & dir) | (drive & ~dir); - write_port((port & dir) | (pullup & ~dir)); + m_drive = (m_port & m_dir) | (m_drive & ~m_dir); + m_write_port((m_port & m_dir) | (m_pullup & ~m_dir)); } uint8_t m4510_device::get_port() { - return (port & dir) | (pullup & ~dir); + return (m_port & m_dir) | (m_pullup & ~m_dir); } uint8_t m4510_device::dir_r() { - return dir; + return m_dir; } uint8_t m4510_device::port_r() { - return ((read_port() | (floating & drive)) & ~dir) | (port & dir); + return ((m_read_port() | (m_floating & m_drive)) & ~m_dir) | (m_port & m_dir); } void m4510_device::dir_w(uint8_t data) { - dir = data; + m_dir = data; update_port(); } void m4510_device::port_w(uint8_t data) { - port = data; + m_port = data; update_port(); } @@ -125,46 +125,46 @@ bool m4510_device::memory_translate(int spacenum, int intention, offs_t &address m4510_device::mi_4510::mi_4510(m4510_device *_base) { - base = _base; + m_base = _base; } uint8_t m4510_device::mi_4510::read(uint16_t adr) { - uint8_t res = program.read_byte(base->map(adr)); + uint8_t res = m_program.read_byte(m_base->map(adr)); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); return res; } uint8_t m4510_device::mi_4510::read_sync(uint16_t adr) { - uint8_t res = csprogram.read_byte(base->map(adr)); + uint8_t res = m_csprogram.read_byte(m_base->map(adr)); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); return res; } uint8_t m4510_device::mi_4510::read_arg(uint16_t adr) { - uint8_t res = cprogram.read_byte(base->map(adr)); + uint8_t res = m_cprogram.read_byte(m_base->map(adr)); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); return res; } void m4510_device::mi_4510::write(uint16_t adr, uint8_t val) { - program.write_byte(base->map(adr), val); + m_program.write_byte(m_base->map(adr), val); if(adr == 0x0000) - base->dir_w(val); + m_base->dir_w(val); else if(adr == 0x0001) - base->port_w(val); + m_base->port_w(val); } #include "cpu/m6502/m4510.hxx" diff --git a/src/devices/cpu/m6502/m4510.h b/src/devices/cpu/m6502/m4510.h index c0e21977c2b..9bd856a9130 100644 --- a/src/devices/cpu/m6502/m4510.h +++ b/src/devices/cpu/m6502/m4510.h @@ -24,22 +24,22 @@ public: virtual void do_exec_full() override; virtual void do_exec_partial() override; - bool get_nomap() const { return nomap; } + bool get_nomap() const { return m_nomap; } uint8_t get_port(); void set_pulls(uint8_t pullup, uint8_t pulldown); - auto read_callback() { return read_port.bind(); } - auto write_callback() { return write_port.bind(); } + auto read_callback() { return m_read_port.bind(); } + auto write_callback() { return m_write_port.bind(); } protected: - uint32_t map_offset[2]; - uint8_t map_enable; - bool nomap; + uint32_t m_map_offset[2]; + uint8_t m_map_enable; + bool m_nomap; class mi_4510 : public memory_interface { public: - m4510_device *base; + m4510_device *m_base; mi_4510(m4510_device *base); virtual ~mi_4510() {} @@ -49,21 +49,21 @@ protected: virtual void write(uint16_t adr, uint8_t val) override; }; - devcb_read8 read_port; - devcb_write8 write_port; + devcb_read8 m_read_port; + devcb_write8 m_write_port; - uint8_t pullup, floating, dir, port, drive; + uint8_t m_pullup, m_floating, m_dir, m_port, m_drive; virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override; inline uint32_t map(uint16_t adr) { - if(map_enable & (1 << (adr >> 13))) { - nomap = false; - return adr + map_offset[adr >> 15]; + if(m_map_enable & (1 << (adr >> 13))) { + m_nomap = false; + return adr + m_map_offset[adr >> 15]; } - nomap = true; + m_nomap = true; return adr; } diff --git a/src/devices/cpu/m6502/m50734.cpp b/src/devices/cpu/m6502/m50734.cpp index af58690aa29..98e6e99e541 100644 --- a/src/devices/cpu/m6502/m50734.cpp +++ b/src/devices/cpu/m6502/m50734.cpp @@ -42,7 +42,7 @@ m50734_device::m50734_device(const machine_config &mconfig, const char *tag, dev , m_tx_count(0) , m_tx_reload(0xffff) { - program_config.m_internal_map = address_map_constructor(FUNC(m50734_device::internal_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(m50734_device::internal_map), this); } device_memory_interface::space_config_vector m50734_device::memory_space_config() const @@ -136,7 +136,7 @@ void m50734_device::device_start() void m50734_device::device_reset() { m740_device::device_reset(); - SP = 0x01ff; + m_SP = 0x01ff; // Reset port registers std::fill(std::begin(m_port_direction), std::end(m_port_direction), 0x00); diff --git a/src/devices/cpu/m6502/m6500_1.cpp b/src/devices/cpu/m6502/m6500_1.cpp index 8aa30f08c89..ce4a44e90d2 100644 --- a/src/devices/cpu/m6502/m6500_1.cpp +++ b/src/devices/cpu/m6502/m6500_1.cpp @@ -111,7 +111,7 @@ m6500_1_device::m6500_1_device(machine_config const &mconfig, char const *tag, d , m_uc{ 0U } , m_lc{ 0U } { - program_config.m_internal_map = address_map_constructor(FUNC(m6500_1_device::memory_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(m6500_1_device::memory_map), this); } @@ -168,7 +168,7 @@ void m6500_1_device::device_reset() { m6502_mcu_device_base::device_reset(); - SP = 0x003fU; + m_SP = 0x003fU; internal_update(); diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index e72fd74459a..1fce493dc43 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -27,106 +27,106 @@ m6512_device::m6512_device(const machine_config &mconfig, const char *tag, devic m6502_device::m6502_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : cpu_device(mconfig, type, tag, owner, clock), - sync_w(*this), - program_config("program", ENDIANNESS_LITTLE, 8, 16), - sprogram_config("decrypted_opcodes", ENDIANNESS_LITTLE, 8, 16), - mintf(nullptr), - uses_custom_memory_interface(false) + m_sync_w(*this), + m_program_config("program", ENDIANNESS_LITTLE, 8, 16), + m_sprogram_config("decrypted_opcodes", ENDIANNESS_LITTLE, 8, 16), + m_mintf(nullptr), + m_uses_custom_memory_interface(false) { } void m6502_device::device_start() { - if(!uses_custom_memory_interface) - mintf = space(AS_PROGRAM).addr_width() > 14 ? std::make_unique() : std::make_unique(); + if(!m_uses_custom_memory_interface) + m_mintf = space(AS_PROGRAM).addr_width() > 14 ? std::make_unique() : std::make_unique(); init(); } void m6502_device::init() { - if(mintf) { - space(AS_PROGRAM).cache(mintf->cprogram); - space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(mintf->csprogram); + if(m_mintf) { + space(AS_PROGRAM).cache(m_mintf->m_cprogram); + space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(m_mintf->m_csprogram); // specific group 1-14 or 15-31 if(space(AS_PROGRAM).addr_width() > 14) - space(AS_PROGRAM).specific(mintf->program); + space(AS_PROGRAM).specific(m_mintf->m_program); else - space(AS_PROGRAM).specific(mintf->program14); + space(AS_PROGRAM).specific(m_mintf->m_program14); } - state_add(STATE_GENPC, "GENPC", XPC).callexport().noshow(); - state_add(STATE_GENPCBASE, "CURPC", XPC).callexport().noshow(); - state_add(STATE_GENFLAGS, "GENFLAGS", P).callimport().formatstr("%6s").noshow(); - state_add(M6502_PC, "PC", NPC).callimport(); - state_add(M6502_A, "A", A); - state_add(M6502_X, "X", X); - state_add(M6502_Y, "Y", Y); - state_add(M6502_P, "P", P).callimport(); - state_add(M6502_S, "SP", SP); - state_add(M6502_IR, "IR", IR); + state_add(STATE_GENPC, "GENPC", m_XPC).callexport().noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_XPC).callexport().noshow(); + state_add(STATE_GENFLAGS, "GENFLAGS", m_P).callimport().formatstr("%6s").noshow(); + state_add(M6502_PC, "PC", m_NPC).callimport(); + state_add(M6502_A, "A", m_A); + state_add(M6502_X, "X", m_X); + state_add(M6502_Y, "Y", m_Y); + state_add(M6502_P, "P", m_P).callimport(); + state_add(M6502_S, "SP", m_SP); + state_add(M6502_IR, "IR", m_IR); - save_item(NAME(PC)); - save_item(NAME(NPC)); - save_item(NAME(PPC)); - save_item(NAME(A)); - save_item(NAME(X)); - save_item(NAME(Y)); - save_item(NAME(P)); - save_item(NAME(SP)); - save_item(NAME(TMP)); - save_item(NAME(TMP2)); - save_item(NAME(IR)); - save_item(NAME(nmi_state)); - save_item(NAME(irq_state)); - save_item(NAME(apu_irq_state)); - save_item(NAME(v_state)); - save_item(NAME(nmi_pending)); - save_item(NAME(irq_taken)); - save_item(NAME(inst_state)); - save_item(NAME(inst_substate)); - save_item(NAME(inst_state_base)); - save_item(NAME(inhibit_interrupts)); + save_item(NAME(m_PC)); + save_item(NAME(m_NPC)); + save_item(NAME(m_PPC)); + save_item(NAME(m_A)); + save_item(NAME(m_X)); + save_item(NAME(m_Y)); + save_item(NAME(m_P)); + save_item(NAME(m_SP)); + save_item(NAME(m_TMP)); + save_item(NAME(m_TMP2)); + save_item(NAME(m_IR)); + save_item(NAME(m_nmi_state)); + save_item(NAME(m_irq_state)); + save_item(NAME(m_apu_irq_state)); + save_item(NAME(m_v_state)); + save_item(NAME(m_nmi_pending)); + save_item(NAME(m_irq_taken)); + save_item(NAME(m_inst_state)); + save_item(NAME(m_inst_substate)); + save_item(NAME(m_inst_state_base)); + save_item(NAME(m_inhibit_interrupts)); - set_icountptr(icount); + set_icountptr(m_icount); - XPC = 0x0000; - PPC = 0x0000; - PC = 0x0000; - NPC = 0x0000; - A = 0x00; - X = 0x80; - Y = 0x00; - P = 0x36; - SP = 0x0100; - TMP = 0x0000; - TMP2 = 0x00; - IR = 0x00; - nmi_state = false; - irq_state = false; - apu_irq_state = false; - v_state = false; - nmi_pending = false; - irq_taken = false; - inst_state = STATE_RESET; - inst_substate = 0; - inst_state_base = 0; - sync = false; - inhibit_interrupts = false; - count_before_instruction_step = 0; + m_XPC = 0x0000; + m_PPC = 0x0000; + m_PC = 0x0000; + m_NPC = 0x0000; + m_A = 0x00; + m_X = 0x80; + m_Y = 0x00; + m_P = 0x36; + m_SP = 0x0100; + m_TMP = 0x0000; + m_TMP2 = 0x00; + m_IR = 0x00; + m_nmi_state = false; + m_irq_state = false; + m_apu_irq_state = false; + m_v_state = false; + m_nmi_pending = false; + m_irq_taken = false; + m_inst_state = STATE_RESET; + m_inst_substate = 0; + m_inst_state_base = 0; + m_sync = false; + m_inhibit_interrupts = false; + m_count_before_instruction_step = 0; } void m6502_device::device_reset() { - inst_state = STATE_RESET; - inst_substate = 0; - inst_state_base = 0; - nmi_pending = false; - irq_taken = false; - sync = false; - sync_w(CLEAR_LINE); - inhibit_interrupts = false; + m_inst_state = STATE_RESET; + m_inst_substate = 0; + m_inst_state_base = 0; + m_nmi_pending = false; + m_irq_taken = false; + m_sync = false; + m_sync_w(CLEAR_LINE); + m_inhibit_interrupts = false; } @@ -147,44 +147,44 @@ bool m6502_device::execute_input_edge_triggered(int inputnum) const noexcept void m6502_device::do_adc_d(uint8_t val) { - uint8_t c = P & F_C ? 1 : 0; - P &= ~(F_N|F_V|F_Z|F_C); - uint8_t al = (A & 15) + (val & 15) + c; + uint8_t c = m_P & F_C ? 1 : 0; + m_P &= ~(F_N|F_V|F_Z|F_C); + uint8_t al = (m_A & 15) + (val & 15) + c; if(al > 9) al += 6; - uint8_t ah = (A >> 4) + (val >> 4) + (al > 15); - if(!uint8_t(A + val + c)) - P |= F_Z; + uint8_t ah = (m_A >> 4) + (val >> 4) + (al > 15); + if(!uint8_t(m_A + val + c)) + m_P |= F_Z; else if(ah & 8) - P |= F_N; - if(~(A^val) & (A^(ah << 4)) & 0x80) - P |= F_V; + m_P |= F_N; + if(~(m_A^val) & (m_A^(ah << 4)) & 0x80) + m_P |= F_V; if(ah > 9) ah += 6; if(ah > 15) - P |= F_C; - A = (ah << 4) | (al & 15); + m_P |= F_C; + m_A = (ah << 4) | (al & 15); } void m6502_device::do_adc_nd(uint8_t val) { uint16_t sum; - sum = A + val + (P & F_C ? 1 : 0); - P &= ~(F_N|F_V|F_Z|F_C); + sum = m_A + val + (m_P & F_C ? 1 : 0); + m_P &= ~(F_N|F_V|F_Z|F_C); if(!uint8_t(sum)) - P |= F_Z; + m_P |= F_Z; else if(int8_t(sum) < 0) - P |= F_N; - if(~(A^val) & (A^sum) & 0x80) - P |= F_V; + m_P |= F_N; + if(~(m_A^val) & (m_A^sum) & 0x80) + m_P |= F_V; if(sum & 0xff00) - P |= F_C; - A = sum; + m_P |= F_C; + m_A = sum; } void m6502_device::do_adc(uint8_t val) { - if(P & F_D) + if(m_P & F_D) do_adc_d(val); else do_adc_nd(val); @@ -192,49 +192,49 @@ void m6502_device::do_adc(uint8_t val) void m6502_device::do_arr_nd() { - bool c = P & F_C; - P &= ~(F_N|F_Z|F_C|F_V); - A >>= 1; + bool c = m_P & F_C; + m_P &= ~(F_N|F_Z|F_C|F_V); + m_A >>= 1; if(c) - A |= 0x80; - if(!A) - P |= F_Z; - else if(int8_t(A)<0) - P |= F_N; - if(A & 0x40) - P |= F_V|F_C; - if(A & 0x20) - P ^= F_V; + m_A |= 0x80; + if(!m_A) + m_P |= F_Z; + else if(int8_t(m_A)<0) + m_P |= F_N; + if(m_A & 0x40) + m_P |= F_V|F_C; + if(m_A & 0x20) + m_P ^= F_V; } void m6502_device::do_arr_d() { // The adc/ror interaction gives an extremely weird result - bool c = P & F_C; - P &= ~(F_N|F_Z|F_C|F_V); - uint8_t a = A >> 1; + bool c = m_P & F_C; + m_P &= ~(F_N|F_Z|F_C|F_V); + uint8_t a = m_A >> 1; if(c) a |= 0x80; if(!a) - P |= F_Z; + m_P |= F_Z; else if(int8_t(a) < 0) - P |= F_N; - if((a ^ A) & 0x40) - P |= F_V; + m_P |= F_N; + if((a ^ m_A) & 0x40) + m_P |= F_V; - if((A & 0x0f) >= 0x05) + if((m_A & 0x0f) >= 0x05) a = ((a + 6) & 0x0f) | (a & 0xf0); - if((A & 0xf0) >= 0x50) { + if((m_A & 0xf0) >= 0x50) { a += 0x60; - P |= F_C; + m_P |= F_C; } - A = a; + m_A = a; } void m6502_device::do_arr() { - if(P & F_D) + if(m_P & F_D) do_arr_d(); else do_arr_nd(); @@ -242,56 +242,56 @@ void m6502_device::do_arr() void m6502_device::do_cmp(uint8_t val1, uint8_t val2) { - P &= ~(F_N|F_Z|F_C); + m_P &= ~(F_N|F_Z|F_C); uint16_t r = val1-val2; if(!r) - P |= F_Z; + m_P |= F_Z; else if(int8_t(r) < 0) - P |= F_N; + m_P |= F_N; if(!(r & 0xff00)) - P |= F_C; + m_P |= F_C; } void m6502_device::do_sbc_d(uint8_t val) { - uint8_t c = P & F_C ? 0 : 1; - P &= ~(F_N|F_V|F_Z|F_C); - uint16_t diff = A - val - c; - uint8_t al = (A & 15) - (val & 15) - c; + uint8_t c = m_P & F_C ? 0 : 1; + m_P &= ~(F_N|F_V|F_Z|F_C); + uint16_t diff = m_A - val - c; + uint8_t al = (m_A & 15) - (val & 15) - c; if(int8_t(al) < 0) al -= 6; - uint8_t ah = (A >> 4) - (val >> 4) - (int8_t(al) < 0); + uint8_t ah = (m_A >> 4) - (val >> 4) - (int8_t(al) < 0); if(!uint8_t(diff)) - P |= F_Z; + m_P |= F_Z; else if(diff & 0x80) - P |= F_N; - if((A^val) & (A^diff) & 0x80) - P |= F_V; + m_P |= F_N; + if((m_A^val) & (m_A^diff) & 0x80) + m_P |= F_V; if(!(diff & 0xff00)) - P |= F_C; + m_P |= F_C; if(int8_t(ah) < 0) ah -= 6; - A = (ah << 4) | (al & 15); + m_A = (ah << 4) | (al & 15); } void m6502_device::do_sbc_nd(uint8_t val) { - uint16_t diff = A - val - (P & F_C ? 0 : 1); - P &= ~(F_N|F_V|F_Z|F_C); + uint16_t diff = m_A - val - (m_P & F_C ? 0 : 1); + m_P &= ~(F_N|F_V|F_Z|F_C); if(!uint8_t(diff)) - P |= F_Z; + m_P |= F_Z; else if(int8_t(diff) < 0) - P |= F_N; - if((A^val) & (A^diff) & 0x80) - P |= F_V; + m_P |= F_N; + if((m_A^val) & (m_A^diff) & 0x80) + m_P |= F_V; if(!(diff & 0xff00)) - P |= F_C; - A = diff; + m_P |= F_C; + m_A = diff; } void m6502_device::do_sbc(uint8_t val) { - if(P & F_D) + if(m_P & F_D) do_sbc_d(val); else do_sbc_nd(val); @@ -299,82 +299,82 @@ void m6502_device::do_sbc(uint8_t val) void m6502_device::do_bit(uint8_t val) { - P &= ~(F_N|F_Z|F_V); - uint8_t r = A & val; + m_P &= ~(F_N|F_Z|F_V); + uint8_t r = m_A & val; if(!r) - P |= F_Z; + m_P |= F_Z; if(val & 0x80) - P |= F_N; + m_P |= F_N; if(val & 0x40) - P |= F_V; + m_P |= F_V; } uint8_t m6502_device::do_asl(uint8_t v) { - P &= ~(F_N|F_Z|F_C); + m_P &= ~(F_N|F_Z|F_C); uint8_t r = v<<1; if(!r) - P |= F_Z; + m_P |= F_Z; else if(int8_t(r) < 0) - P |= F_N; + m_P |= F_N; if(v & 0x80) - P |= F_C; + m_P |= F_C; return r; } uint8_t m6502_device::do_lsr(uint8_t v) { - P &= ~(F_N|F_Z|F_C); + m_P &= ~(F_N|F_Z|F_C); if(v & 1) - P |= F_C; + m_P |= F_C; v >>= 1; if(!v) - P |= F_Z; + m_P |= F_Z; return v; } uint8_t m6502_device::do_ror(uint8_t v) { - bool c = P & F_C; - P &= ~(F_N|F_Z|F_C); + bool c = m_P & F_C; + m_P &= ~(F_N|F_Z|F_C); if(v & 1) - P |= F_C; + m_P |= F_C; v >>= 1; if(c) v |= 0x80; if(!v) - P |= F_Z; + m_P |= F_Z; else if(int8_t(v)<0) - P |= F_N; + m_P |= F_N; return v; } uint8_t m6502_device::do_rol(uint8_t v) { - bool c = P & F_C; - P &= ~(F_N|F_Z|F_C); + bool c = m_P & F_C; + m_P &= ~(F_N|F_Z|F_C); if(v & 0x80) - P |= F_C; + m_P |= F_C; v <<= 1; if(c) v |= 0x01; if(!v) - P |= F_Z; + m_P |= F_Z; else if(int8_t(v)<0) - P |= F_N; + m_P |= F_N; return v; } uint8_t m6502_device::do_asr(uint8_t v) { - P &= ~(F_N|F_Z|F_C); + m_P &= ~(F_N|F_Z|F_C); if(v & 1) - P |= F_C; + m_P |= F_C; v >>= 1; if(!v) - P |= F_Z; + m_P |= F_Z; else if(v & 0x40) { - P |= F_N; + m_P |= F_N; v |= 0x80; } return v; @@ -387,15 +387,15 @@ offs_t m6502_device::pc_to_external(u16 pc) void m6502_device::execute_run() { - if(inst_substate) + if(m_inst_substate) do_exec_partial(); - while(icount > 0) { - if(inst_state < 0xff00) { - PPC = NPC; - inst_state = IR | inst_state_base; + while(m_icount > 0) { + if(m_inst_state < 0xff00) { + m_PPC = m_NPC; + m_inst_state = m_IR | m_inst_state_base; if(debugger_enabled()) - debugger_instruction_hook(pc_to_external(NPC)); + debugger_instruction_hook(pc_to_external(m_NPC)); } do_exec_full(); } @@ -404,17 +404,17 @@ void m6502_device::execute_run() void m6502_device::execute_set_input(int inputnum, int state) { switch(inputnum) { - case IRQ_LINE: irq_state = state == ASSERT_LINE; break; - case APU_IRQ_LINE: apu_irq_state = state == ASSERT_LINE; break; + case IRQ_LINE: m_irq_state = state == ASSERT_LINE; break; + case APU_IRQ_LINE: m_apu_irq_state = state == ASSERT_LINE; break; case NMI_LINE: - if(machine().time() > attotime::zero && !nmi_state && state == ASSERT_LINE) - nmi_pending = true; - nmi_state = state == ASSERT_LINE; + if(machine().time() > attotime::zero && !m_nmi_state && state == ASSERT_LINE) + m_nmi_pending = true; + m_nmi_state = state == ASSERT_LINE; break; case V_LINE: - if(machine().time() > attotime::zero && !v_state && state == ASSERT_LINE) - P |= F_V; - v_state = state == ASSERT_LINE; + if(machine().time() > attotime::zero && !m_v_state && state == ASSERT_LINE) + m_P |= F_V; + m_v_state = state == ASSERT_LINE; break; } } @@ -424,12 +424,12 @@ device_memory_interface::space_config_vector m6502_device::memory_space_config() { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config) + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config) }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config) + std::make_pair(AS_PROGRAM, &m_program_config) }; } @@ -439,16 +439,16 @@ void m6502_device::state_import(const device_state_entry &entry) switch(entry.index()) { case STATE_GENFLAGS: case M6502_P: - P = P | (F_B|F_E); + m_P = m_P | (F_B|F_E); break; case M6502_PC: - PC = NPC; - irq_taken = false; + m_PC = m_NPC; + m_irq_taken = false; prefetch_start(); - IR = mintf->read_sync(PC); + m_IR = m_mintf->read_sync(m_PC); prefetch_end(); - PPC = NPC; - inst_state = IR | inst_state_base; + m_PPC = m_NPC; + m_inst_state = m_IR | m_inst_state_base; break; } } @@ -456,8 +456,8 @@ void m6502_device::state_import(const device_state_entry &entry) void m6502_device::state_export(const device_state_entry &entry) { switch(entry.index()) { - case STATE_GENPC: XPC = pc_to_external(PPC); break; - case STATE_GENPCBASE: XPC = pc_to_external(NPC); break; + case STATE_GENPC: m_XPC = pc_to_external(m_PPC); break; + case STATE_GENPCBASE: m_XPC = pc_to_external(m_NPC); break; } } @@ -467,52 +467,52 @@ void m6502_device::state_string_export(const device_state_entry &entry, std::str case STATE_GENFLAGS: case M6502_P: str = string_format("%c%c%c%c%c%c", - P & F_N ? 'N' : '.', - P & F_V ? 'V' : '.', - P & F_D ? 'D' : '.', - P & F_I ? 'I' : '.', - P & F_Z ? 'Z' : '.', - P & F_C ? 'C' : '.'); + m_P & F_N ? 'N' : '.', + m_P & F_V ? 'V' : '.', + m_P & F_D ? 'D' : '.', + m_P & F_I ? 'I' : '.', + m_P & F_Z ? 'Z' : '.', + m_P & F_C ? 'C' : '.'); break; } } void m6502_device::prefetch_start() { - sync = true; - if(!sync_w.isunset()) - sync_w(ASSERT_LINE); - NPC = PC; + m_sync = true; + if(!m_sync_w.isunset()) + m_sync_w(ASSERT_LINE); + m_NPC = m_PC; } void m6502_device::prefetch_end() { - sync = false; - if(!sync_w.isunset()) - sync_w(CLEAR_LINE); + m_sync = false; + if(!m_sync_w.isunset()) + m_sync_w(CLEAR_LINE); - if((nmi_pending || ((irq_state || apu_irq_state) && !(P & F_I))) && !inhibit_interrupts) { - irq_taken = true; - IR = 0x00; + if((m_nmi_pending || ((m_irq_state || m_apu_irq_state) && !(m_P & F_I))) && !m_inhibit_interrupts) { + m_irq_taken = true; + m_IR = 0x00; } else - PC++; + m_PC++; } void m6502_device::prefetch_end_noirq() { - sync = false; - if(!sync_w.isunset()) - sync_w(CLEAR_LINE); - PC++; + m_sync = false; + if(!m_sync_w.isunset()) + m_sync_w(CLEAR_LINE); + m_PC++; } void m6502_device::set_nz(uint8_t v) { - P &= ~(F_Z|F_N); + m_P &= ~(F_Z|F_N); if(v & 0x80) - P |= F_N; + m_P |= F_N; if(!v) - P |= F_Z; + m_P |= F_Z; } std::unique_ptr m6502_device::create_disassembler() @@ -533,32 +533,32 @@ void m6502_device::memory_interface::write_9(uint16_t adr, uint8_t val) uint8_t m6502_device::mi_default::read(uint16_t adr) { - return program.read_byte(adr); + return m_program.read_byte(adr); } uint8_t m6502_device::mi_default::read_sync(uint16_t adr) { - return csprogram.read_byte(adr); + return m_csprogram.read_byte(adr); } uint8_t m6502_device::mi_default::read_arg(uint16_t adr) { - return cprogram.read_byte(adr); + return m_cprogram.read_byte(adr); } void m6502_device::mi_default::write(uint16_t adr, uint8_t val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); } uint8_t m6502_device::mi_default14::read(uint16_t adr) { - return program14.read_byte(adr); + return m_program14.read_byte(adr); } void m6502_device::mi_default14::write(uint16_t adr, uint8_t val) { - program14.write_byte(adr, val); + m_program14.write_byte(adr, val); } diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h index 112630dfd50..5ac1d0dc47b 100644 --- a/src/devices/cpu/m6502/m6502.h +++ b/src/devices/cpu/m6502/m6502.h @@ -25,9 +25,9 @@ public: class memory_interface { public: - memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache cprogram, csprogram; - memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific program; - memory_access<14, 0, 0, ENDIANNESS_LITTLE>::specific program14; + memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_cprogram, m_csprogram; + memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_program; + memory_access<14, 0, 0, ENDIANNESS_LITTLE>::specific m_program14; virtual ~memory_interface() = default; virtual uint8_t read(uint16_t adr) = 0; @@ -41,22 +41,22 @@ public: m6502_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); void set_address_width(int width, bool custom_interface) { - program_config.m_addr_width = width; - sprogram_config.m_addr_width = width; - uses_custom_memory_interface = custom_interface; + m_program_config.m_addr_width = width; + m_sprogram_config.m_addr_width = width; + m_uses_custom_memory_interface = custom_interface; } void set_custom_memory_interface(std::unique_ptr interface) { - mintf = std::move(interface); + m_mintf = std::move(interface); } - bool get_sync() const { return sync; } + bool get_sync() const { return m_sync; } - auto sync_cb() { return sync_w.bind(); } - - devcb_write_line sync_w; + auto sync_cb() { return m_sync_w.bind(); } protected: + devcb_write_line m_sync_w; + m6502_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); class mi_default : public memory_interface { @@ -116,40 +116,40 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr create_disassembler() override; - address_space_config program_config, sprogram_config; + address_space_config m_program_config, m_sprogram_config; - uint16_t PPC; /* previous program counter */ - uint16_t NPC; /* next start-of-instruction program counter */ - uint16_t PC; /* program counter */ - uint16_t SP; /* stack pointer (always 100 - 1FF) */ - uint16_t TMP; /* temporary internal values */ - uint8_t TMP2; /* another temporary internal value, 8 bits this time */ - uint8_t A; /* Accumulator */ - uint8_t X; /* X index register */ - uint8_t Y; /* Y index register */ - uint8_t P; /* Processor status */ - uint8_t IR; /* Prefetched instruction register */ - int inst_state_base; /* Current instruction bank */ + uint16_t m_PPC; /* previous program counter */ + uint16_t m_NPC; /* next start-of-instruction program counter */ + uint16_t m_PC; /* program counter */ + uint16_t m_SP; /* stack pointer (always 100 - 1FF) */ + uint16_t m_TMP; /* temporary internal values */ + uint8_t m_TMP2; /* another temporary internal value, 8 bits this time */ + uint8_t m_A; /* Accumulator */ + uint8_t m_X; /* X index register */ + uint8_t m_Y; /* Y index register */ + uint8_t m_P; /* Processor status */ + uint8_t m_IR; /* Prefetched instruction register */ + int m_inst_state_base; /* Current instruction bank */ - std::unique_ptr mintf; - int inst_state, inst_substate; - int icount, bcount, count_before_instruction_step; - bool nmi_state, irq_state, apu_irq_state, v_state; - bool nmi_pending, irq_taken, sync, inhibit_interrupts; - bool uses_custom_memory_interface; + std::unique_ptr m_mintf; + int m_inst_state, m_inst_substate; + int m_icount, m_bcount, m_count_before_instruction_step; + bool m_nmi_state, m_irq_state, m_apu_irq_state, m_v_state; + bool m_nmi_pending, m_irq_taken, m_sync, m_inhibit_interrupts; + bool m_uses_custom_memory_interface; - uint8_t read(uint16_t adr) { return mintf->read(adr); } - uint8_t read_9(uint16_t adr) { return mintf->read_9(adr); } - void write(uint16_t adr, uint8_t val) { mintf->write(adr, val); } - void write_9(uint16_t adr, uint8_t val) { mintf->write_9(adr, val); } - uint8_t read_arg(uint16_t adr) { return mintf->read_arg(adr); } - uint8_t read_pc() { return mintf->read_arg(PC); } + uint8_t read(uint16_t adr) { return m_mintf->read(adr); } + uint8_t read_9(uint16_t adr) { return m_mintf->read_9(adr); } + void write(uint16_t adr, uint8_t val) { m_mintf->write(adr, val); } + void write_9(uint16_t adr, uint8_t val) { m_mintf->write_9(adr, val); } + uint8_t read_arg(uint16_t adr) { return m_mintf->read_arg(adr); } + uint8_t read_pc() { return m_mintf->read_arg(m_PC); } void prefetch_start(); void prefetch_end(); void prefetch_end_noirq(); void set_nz(uint8_t v); - u32 XPC; + u32 m_XPC; virtual offs_t pc_to_external(u16 pc); // For paged PCs virtual void do_exec_full(); virtual void do_exec_partial(); @@ -159,8 +159,8 @@ protected: static inline uint16_t set_l(uint16_t base, uint8_t val) { return (base & 0xff00) | val; } static inline uint16_t set_h(uint16_t base, uint8_t val) { return (base & 0x00ff) | (val << 8); } - inline void dec_SP() { SP = set_l(SP, SP-1); } - inline void inc_SP() { SP = set_l(SP, SP+1); } + inline void dec_SP() { m_SP = set_l(m_SP, m_SP-1); } + inline void inc_SP() { m_SP = set_l(m_SP, m_SP+1); } void do_adc_d(uint8_t val); void do_adc_nd(uint8_t val); diff --git a/src/devices/cpu/m6502/m6502d.cpp b/src/devices/cpu/m6502/m6502d.cpp index f299f77cfc6..afae76eeff5 100644 --- a/src/devices/cpu/m6502/m6502d.cpp +++ b/src/devices/cpu/m6502/m6502d.cpp @@ -12,7 +12,7 @@ #include "m6502d.h" #include "cpu/m6502/m6502d.hxx" -m6502_base_disassembler::m6502_base_disassembler(const disasm_entry *_table) : table(_table) +m6502_base_disassembler::m6502_base_disassembler(const disasm_entry *_table) : m_table(_table) { } @@ -28,11 +28,11 @@ u32 m6502_base_disassembler::opcode_alignment() const offs_t m6502_base_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { - const disasm_entry &e = table[opcodes.r8(pc) | get_instruction_bank()]; - uint32_t flags = e.flags | SUPPORTED; - util::stream_format(stream, "%s", e.opcode); + const disasm_entry &e = m_table[opcodes.r8(pc) | get_instruction_bank()]; + uint32_t flags = e.m_flags | SUPPORTED; + util::stream_format(stream, "%s", e.m_opcode); - switch(e.mode) { + switch(e.m_mode) { case DASM_non: flags |= 1; break; @@ -207,7 +207,7 @@ offs_t m6502_base_disassembler::disassemble(std::ostream &stream, offs_t pc, con break; default: - fprintf(stderr, "Unhandled dasm mode %d\n", e.mode); + fprintf(stderr, "Unhandled dasm mode %d\n", e.m_mode); abort(); } return flags; diff --git a/src/devices/cpu/m6502/m6502d.h b/src/devices/cpu/m6502/m6502d.h index d975afab7c7..81093820d7f 100644 --- a/src/devices/cpu/m6502/m6502d.h +++ b/src/devices/cpu/m6502/m6502d.h @@ -17,9 +17,9 @@ class m6502_base_disassembler : public util::disasm_interface { public: struct disasm_entry { - const char *opcode; - int mode; - offs_t flags; + const char *m_opcode; + int m_mode; + offs_t m_flags; }; m6502_base_disassembler(const disasm_entry *table); @@ -70,7 +70,7 @@ protected: virtual u32 get_instruction_bank() const; private: - const disasm_entry *table; + const disasm_entry *m_table; }; class m6502_disassembler : public m6502_base_disassembler diff --git a/src/devices/cpu/m6502/m6502make.py b/src/devices/cpu/m6502/m6502make.py index 99b4320cc11..bbe540b3566 100755 --- a/src/devices/cpu/m6502/m6502make.py +++ b/src/devices/cpu/m6502/m6502make.py @@ -33,11 +33,11 @@ def load_opcodes(fname): # append instruction to last opcode if line == '\tprefetch();': opcodes[-1][1].append("\tprefetch_start();") - opcodes[-1][1].append("\tIR = mintf->read_sync(PC);") + opcodes[-1][1].append("\tm_IR = m_mintf->read_sync(m_PC);") opcodes[-1][1].append("\tprefetch_end();") elif line == '\tprefetch_noirq();': opcodes[-1][1].append("\tprefetch_start();") - opcodes[-1][1].append("\tIR = mintf->read_sync(PC);") + opcodes[-1][1].append("\tm_IR = m_mintf->read_sync(m_PC);") opcodes[-1][1].append("\tprefetch_end_noirq();") else: opcodes[-1][1].append(line) @@ -86,19 +86,19 @@ def save_opcodes(f, device, opcodes): line_type = identify_line_type(ins) if line_type == "EAT": emit(f, "\tdebugger_wait_hook();") - emit(f, "\ticount = 0;") - emit(f, "\tinst_substate = %d;" % substate) + emit(f, "\tm_icount = 0;") + emit(f, "\tm_inst_substate = %d;" % substate) emit(f, "\treturn;") substate += 1 elif line_type == "MEMORY": emit(f, ins) - emit(f, "\ticount--;") - emit(f, "\tif(icount <= 0) {") + emit(f, "\tm_icount--;") + emit(f, "\tif(m_icount <= 0) {") emit(f, "\t\tif(access_to_be_redone()) {") - emit(f, "\t\t\ticount++;") - emit(f, "\t\t\tinst_substate = %d;" % substate) + emit(f, "\t\t\tm_icount++;") + emit(f, "\t\t\tm_inst_substate = %d;" % substate) emit(f, "\t\t} else") - emit(f, "\t\t\tinst_substate = %d;" % (substate+1)) + emit(f, "\t\t\tm_inst_substate = %d;" % (substate+1)) emit(f, "\t\treturn;") emit(f, "\t}") substate += 2 @@ -109,15 +109,15 @@ def save_opcodes(f, device, opcodes): emit(f, "void %s_device::%s_partial()" % (device, name)) emit(f, "{") - emit(f, "\tswitch(inst_substate) {") + emit(f, "\tswitch(m_inst_substate) {") emit(f, "case 0:") substate = 1 for ins in instructions: line_type = identify_line_type(ins) if line_type == "EAT": emit(f, "\tdebugger_wait_hook();") - emit(f, "\ticount = 0;") - emit(f, "\tinst_substate = %d;" % substate) + emit(f, "\tm_icount = 0;") + emit(f, "\tm_inst_substate = %d;" % substate) emit(f, "\treturn;") emit(f, "\tcase %d:;" % substate) substate += 1 @@ -125,13 +125,13 @@ def save_opcodes(f, device, opcodes): emit(f, "\t[[fallthrough]];") emit(f, "case %d:" % substate) emit(f, ins) - emit(f, "\ticount--;") - emit(f, "\tif(icount <= 0) {") + emit(f, "\tm_icount--;") + emit(f, "\tif(m_icount <= 0) {") emit(f, "\t\tif(access_to_be_redone()) {") - emit(f, "\t\t\ticount++;") - emit(f, "\t\t\tinst_substate = %d;" % substate) + emit(f, "\t\t\tm_icount++;") + emit(f, "\t\t\tm_inst_substate = %d;" % substate) emit(f, "\t\t} else") - emit(f, "\t\t\tinst_substate = %d;" % (substate+1)) + emit(f, "\t\t\tm_inst_substate = %d;" % (substate+1)) emit(f, "\t\treturn;") emit(f, "\t}") emit(f, "\t[[fallthrough]];") @@ -141,7 +141,7 @@ def save_opcodes(f, device, opcodes): emit(f, ins) emit(f, "\tbreak;") emit(f, "}") - emit(f, "\tinst_substate = 0;") + emit(f, "\tm_inst_substate = 0;") emit(f, "}") emit(f, "") @@ -149,7 +149,7 @@ def save_opcodes(f, device, opcodes): DO_EXEC_FULL_PROLOG="""\ void %(device)s_device::do_exec_full() { -\tswitch(inst_state) { +\tswitch(m_inst_state) { """ DO_EXEC_FULL_EPILOG="""\ @@ -160,7 +160,7 @@ DO_EXEC_FULL_EPILOG="""\ DO_EXEC_PARTIAL_PROLOG="""\ void %(device)s_device::do_exec_partial() { -\tswitch(inst_state) { +\tswitch(m_inst_state) { """ DO_EXEC_PARTIAL_EPILOG="""\ diff --git a/src/devices/cpu/m6502/m6502mcu.ipp b/src/devices/cpu/m6502/m6502mcu.ipp index d4fd6833f54..2ebd60ff961 100644 --- a/src/devices/cpu/m6502/m6502mcu.ipp +++ b/src/devices/cpu/m6502/m6502mcu.ipp @@ -26,10 +26,10 @@ m6502_mcu_device_base::m6502_mcu_device_base(const machine_config &mconfig template void m6502_mcu_device_base::recompute_bcount(uint64_t event_time) { - if(!event_time || event_time >= this->total_cycles() + this->icount) - this->bcount = 0; + if(!event_time || event_time >= this->total_cycles() + this->m_icount) + this->m_bcount = 0; else - this->bcount = this->total_cycles() + this->icount - event_time; + this->m_bcount = this->total_cycles() + this->m_icount - event_time; } template @@ -37,38 +37,38 @@ void m6502_mcu_device_base::execute_run() { internal_update(this->total_cycles()); - this->icount -= this->count_before_instruction_step; - if(this->icount < 0) { - this->count_before_instruction_step = -this->icount; - this->icount = 0; + this->m_icount -= this->m_count_before_instruction_step; + if(this->m_icount < 0) { + this->m_count_before_instruction_step = -this->m_icount; + this->m_icount = 0; } else - this->count_before_instruction_step = 0; + this->m_count_before_instruction_step = 0; - while(this->bcount && this->icount <= this->bcount) - internal_update(this->total_cycles() + this->icount - this->bcount); + while(this->m_bcount && this->m_icount <= this->m_bcount) + internal_update(this->total_cycles() + this->m_icount - this->m_bcount); - if(this->icount > 0 && this->inst_substate) + if(this->m_icount > 0 && this->m_inst_substate) this->do_exec_partial(); - while(this->icount > 0) { - while(this->icount > this->bcount) { - if(this->inst_state < 0xff00) { - this->PPC = this->NPC; - this->inst_state = this->IR | this->inst_state_base; + while(this->m_icount > 0) { + while(this->m_icount > this->m_bcount) { + if(this->m_inst_state < 0xff00) { + this->m_PPC = this->m_NPC; + this->m_inst_state = this->m_IR | this->m_inst_state_base; if(this->debugger_enabled()) - this->debugger_instruction_hook(this->NPC); + this->debugger_instruction_hook(this->m_NPC); } this->do_exec_full(); } - if(this->icount > 0) - while(this->bcount && this->icount <= this->bcount) - internal_update(this->total_cycles() + this->icount - this->bcount); - if(this->icount > 0 && this->inst_substate) + if(this->m_icount > 0) + while(this->m_bcount && this->m_icount <= this->m_bcount) + internal_update(this->total_cycles() + this->m_icount - this->m_bcount); + if(this->m_icount > 0 && this->m_inst_substate) this->do_exec_partial(); } - if(this->icount < 0) { - this->count_before_instruction_step = -this->icount; - this->icount = 0; + if(this->m_icount < 0) { + this->m_count_before_instruction_step = -this->m_icount; + this->m_icount = 0; } } diff --git a/src/devices/cpu/m6502/m6503.cpp b/src/devices/cpu/m6502/m6503.cpp index efaeca3b5a2..613326766e1 100644 --- a/src/devices/cpu/m6502/m6503.cpp +++ b/src/devices/cpu/m6502/m6503.cpp @@ -18,8 +18,8 @@ DEFINE_DEVICE_TYPE(M6503, m6503_device, "m6503", "MOS Technology 6503") m6503_device::m6503_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, M6503, tag, owner, clock) { - program_config.m_addr_width = 12; - program_config.m_logaddr_width = 12; - sprogram_config.m_addr_width = 12; - sprogram_config.m_logaddr_width = 12; + m_program_config.m_addr_width = 12; + m_program_config.m_logaddr_width = 12; + m_sprogram_config.m_addr_width = 12; + m_sprogram_config.m_logaddr_width = 12; } diff --git a/src/devices/cpu/m6502/m6504.cpp b/src/devices/cpu/m6502/m6504.cpp index 3a859621917..5d4b389db1b 100644 --- a/src/devices/cpu/m6502/m6504.cpp +++ b/src/devices/cpu/m6502/m6504.cpp @@ -18,8 +18,8 @@ DEFINE_DEVICE_TYPE(M6504, m6504_device, "m6504", "MOS Technology 6504") m6504_device::m6504_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, M6504, tag, owner, clock) { - program_config.m_addr_width = 13; - program_config.m_logaddr_width = 13; - sprogram_config.m_addr_width = 13; - sprogram_config.m_logaddr_width = 13; + m_program_config.m_addr_width = 13; + m_program_config.m_logaddr_width = 13; + m_sprogram_config.m_addr_width = 13; + m_sprogram_config.m_logaddr_width = 13; } diff --git a/src/devices/cpu/m6502/m6507.cpp b/src/devices/cpu/m6502/m6507.cpp index ae1c984f1d1..0a30487c9bd 100644 --- a/src/devices/cpu/m6502/m6507.cpp +++ b/src/devices/cpu/m6502/m6507.cpp @@ -18,8 +18,8 @@ DEFINE_DEVICE_TYPE(M6507, m6507_device, "m6507", "MOS Technology 6507") m6507_device::m6507_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, M6507, tag, owner, clock) { - program_config.m_addr_width = 13; - program_config.m_logaddr_width = 13; - sprogram_config.m_addr_width = 13; - sprogram_config.m_logaddr_width = 13; + m_program_config.m_addr_width = 13; + m_program_config.m_logaddr_width = 13; + m_sprogram_config.m_addr_width = 13; + m_sprogram_config.m_logaddr_width = 13; } diff --git a/src/devices/cpu/m6502/m6509.cpp b/src/devices/cpu/m6502/m6509.cpp index dd4eca50c83..bb6fa45b5d0 100644 --- a/src/devices/cpu/m6502/m6509.cpp +++ b/src/devices/cpu/m6502/m6509.cpp @@ -15,31 +15,31 @@ DEFINE_DEVICE_TYPE(M6509, m6509_device, "m6509", "MOS Technology 6509") m6509_device::m6509_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - m6502_device(mconfig, M6509, tag, owner, clock), bank_i(0), bank_y(0) + m6502_device(mconfig, M6509, tag, owner, clock), m_bank_i(0), m_bank_y(0) { - program_config.m_addr_width = 20; - program_config.m_logaddr_width = 20; - sprogram_config.m_addr_width = 20; - sprogram_config.m_logaddr_width = 20; + m_program_config.m_addr_width = 20; + m_program_config.m_logaddr_width = 20; + m_sprogram_config.m_addr_width = 20; + m_sprogram_config.m_logaddr_width = 20; } void m6509_device::device_start() { - mintf = std::make_unique(this); + m_mintf = std::make_unique(this); init(); - state_add(STATE_GENPC, "GENPC", XPC).callexport().noshow(); - state_add(STATE_GENPCBASE, "CURPC", XPC).callexport().noshow(); - state_add(M6509_BI, "BI", bank_i); - state_add(M6509_BY, "BY", bank_y); + state_add(STATE_GENPC, "GENPC", m_XPC).callexport().noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_XPC).callexport().noshow(); + state_add(M6509_BI, "BI", m_bank_i); + state_add(M6509_BY, "BY", m_bank_y); } void m6509_device::device_reset() { m6502_device::device_reset(); - bank_i = 0x0f; - bank_y = 0x0f; + m_bank_i = 0x0f; + m_bank_y = 0x0f; } offs_t m6509_device::pc_to_external(u16 pc) @@ -54,65 +54,65 @@ std::unique_ptr m6509_device::create_disassembler() m6509_device::mi_6509::mi_6509(m6509_device *_base) { - base = _base; + m_base = _base; } uint8_t m6509_device::mi_6509::read(uint16_t adr) { - uint8_t res = program.read_byte(base->adr_in_bank_i(adr)); + uint8_t res = m_program.read_byte(m_base->adr_in_bank_i(adr)); if(adr == 0x0000) - res = base->bank_i_r(); + res = m_base->bank_i_r(); else if(adr == 0x0001) - res = base->bank_y_r(); + res = m_base->bank_y_r(); return res; } uint8_t m6509_device::mi_6509::read_sync(uint16_t adr) { - uint8_t res = csprogram.read_byte(base->adr_in_bank_i(adr)); + uint8_t res = m_csprogram.read_byte(m_base->adr_in_bank_i(adr)); if(adr == 0x0000) - res = base->bank_i_r(); + res = m_base->bank_i_r(); else if(adr == 0x0001) - res = base->bank_y_r(); + res = m_base->bank_y_r(); return res; } uint8_t m6509_device::mi_6509::read_arg(uint16_t adr) { - uint8_t res = cprogram.read_byte(base->adr_in_bank_i(adr)); + uint8_t res = m_cprogram.read_byte(m_base->adr_in_bank_i(adr)); if(adr == 0x0000) - res = base->bank_i_r(); + res = m_base->bank_i_r(); else if(adr == 0x0001) - res = base->bank_y_r(); + res = m_base->bank_y_r(); return res; } uint8_t m6509_device::mi_6509::read_9(uint16_t adr) { - uint8_t res = program.read_byte(base->adr_in_bank_y(adr)); + uint8_t res = m_program.read_byte(m_base->adr_in_bank_y(adr)); if(adr == 0x0000) - res = base->bank_i_r(); + res = m_base->bank_i_r(); else if(adr == 0x0001) - res = base->bank_y_r(); + res = m_base->bank_y_r(); return res; } void m6509_device::mi_6509::write(uint16_t adr, uint8_t val) { - program.write_byte(base->adr_in_bank_i(adr), val); + m_program.write_byte(m_base->adr_in_bank_i(adr), val); if(adr == 0x0000) - base->bank_i_w(val); + m_base->bank_i_w(val); else if(adr == 0x0001) - base->bank_y_w(val); + m_base->bank_y_w(val); } void m6509_device::mi_6509::write_9(uint16_t adr, uint8_t val) { - program.write_byte(base->adr_in_bank_y(adr), val); + m_program.write_byte(m_base->adr_in_bank_y(adr), val); if(adr == 0x0000) - base->bank_i_w(val); + m_base->bank_i_w(val); else if(adr == 0x0001) - base->bank_y_w(val); + m_base->bank_y_w(val); } #include "cpu/m6502/m6509.hxx" diff --git a/src/devices/cpu/m6502/m6509.h b/src/devices/cpu/m6502/m6509.h index 383bfcc178a..d805df802cf 100644 --- a/src/devices/cpu/m6502/m6509.h +++ b/src/devices/cpu/m6502/m6509.h @@ -24,7 +24,7 @@ public: protected: class mi_6509 : public memory_interface { public: - m6509_device *base; + m6509_device *m_base; mi_6509(m6509_device *base); virtual ~mi_6509() {} @@ -40,15 +40,15 @@ protected: virtual void device_reset() override ATTR_COLD; virtual offs_t pc_to_external(u16 pc) override; - uint8_t bank_i, bank_y; + uint8_t m_bank_i, m_bank_y; - uint8_t bank_i_r() { return bank_i; } - uint8_t bank_y_r() { return bank_y; } - void bank_i_w(uint8_t data) { bank_i = data; } - void bank_y_w(uint8_t data) { bank_y = data; } + uint8_t bank_i_r() { return m_bank_i; } + uint8_t bank_y_r() { return m_bank_y; } + void bank_i_w(uint8_t data) { m_bank_i = data; } + void bank_y_w(uint8_t data) { m_bank_y = data; } - uint32_t adr_in_bank_i(uint16_t adr) { return adr | ((bank_i & 0xf) << 16); } - uint32_t adr_in_bank_y(uint16_t adr) { return adr | ((bank_y & 0xf) << 16); } + uint32_t adr_in_bank_i(uint16_t adr) { return adr | ((m_bank_i & 0xf) << 16); } + uint32_t adr_in_bank_y(uint16_t adr) { return adr | ((m_bank_y & 0xf) << 16); } #define O(o) void o ## _full(); void o ## _partial() diff --git a/src/devices/cpu/m6502/m6510.cpp b/src/devices/cpu/m6502/m6510.cpp index c54965a2f04..a5ba07f3743 100644 --- a/src/devices/cpu/m6502/m6510.cpp +++ b/src/devices/cpu/m6502/m6510.cpp @@ -25,18 +25,18 @@ m6510_device::m6510_device(const machine_config &mconfig, const char *tag, devic m6510_device::m6510_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, type, tag, owner, clock), - read_port(*this, 0), - write_port(*this), - dir(0), port(0), drive(0) + m_read_port(*this, 0), + m_write_port(*this), + m_dir(0), m_port(0), m_drive(0) { - pullup = 0x00; - floating = 0x00; + m_pullup = 0x00; + m_floating = 0x00; } void m6510_device::set_pulls(uint8_t _pullup, uint8_t _floating) { - pullup = _pullup; - floating = _floating; + m_pullup = _pullup; + m_floating = _floating; } std::unique_ptr m6510_device::create_disassembler() @@ -46,16 +46,16 @@ std::unique_ptr m6510_device::create_disassembler() void m6510_device::init_port() { - save_item(NAME(pullup)); - save_item(NAME(floating)); - save_item(NAME(dir)); - save_item(NAME(port)); - save_item(NAME(drive)); + save_item(NAME(m_pullup)); + save_item(NAME(m_floating)); + save_item(NAME(m_dir)); + save_item(NAME(m_port)); + save_item(NAME(m_drive)); } void m6510_device::device_start() { - mintf = std::make_unique(this); + m_mintf = std::make_unique(this); init(); init_port(); @@ -64,88 +64,88 @@ void m6510_device::device_start() void m6510_device::device_reset() { m6502_device::device_reset(); - dir = 0xff; - port = 0xff; - drive = 0xff; + m_dir = 0xff; + m_port = 0xff; + m_drive = 0xff; update_port(); } void m6510_device::update_port() { - drive = (port & dir) | (drive & ~dir); - write_port((port & dir) | (pullup & ~dir)); + m_drive = (m_port & m_dir) | (m_drive & ~m_dir); + m_write_port((m_port & m_dir) | (m_pullup & ~m_dir)); } uint8_t m6510_device::get_port() { - return (port & dir) | (pullup & ~dir); + return (m_port & m_dir) | (m_pullup & ~m_dir); } uint8_t m6510_device::dir_r() { - return dir; + return m_dir; } uint8_t m6510_device::port_r() { - return ((read_port() | (floating & drive)) & ~dir) | (port & dir); + return ((m_read_port() | (m_floating & m_drive)) & ~m_dir) | (m_port & m_dir); } void m6510_device::dir_w(uint8_t data) { - dir = data; + m_dir = data; update_port(); } void m6510_device::port_w(uint8_t data) { - port = data; + m_port = data; update_port(); } m6510_device::mi_6510::mi_6510(m6510_device *_base) { - base = _base; + m_base = _base; } uint8_t m6510_device::mi_6510::read(uint16_t adr) { - uint8_t res = program.read_byte(adr); + uint8_t res = m_program.read_byte(adr); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); return res; } uint8_t m6510_device::mi_6510::read_sync(uint16_t adr) { - uint8_t res = csprogram.read_byte(adr); + uint8_t res = m_csprogram.read_byte(adr); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); return res; } uint8_t m6510_device::mi_6510::read_arg(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_byte(adr); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); return res; } void m6510_device::mi_6510::write(uint16_t adr, uint8_t val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); if(adr == 0x0000) - base->dir_w(val); + m_base->dir_w(val); else if(adr == 0x0001) - base->port_w(val); + m_base->port_w(val); } @@ -156,66 +156,66 @@ m6508_device::m6508_device(const machine_config &mconfig, const char *tag, devic void m6508_device::device_start() { - mintf = std::make_unique(this); + m_mintf = std::make_unique(this); init(); init_port(); - ram_page = make_unique_clear(256); - save_pointer(NAME(ram_page), 256); + m_ram_page = make_unique_clear(256); + save_pointer(NAME(m_ram_page), 256); } m6508_device::mi_6508::mi_6508(m6508_device *_base) { - base = _base; + m_base = _base; } uint8_t m6508_device::mi_6508::read(uint16_t adr) { - uint8_t res = program.read_byte(adr); + uint8_t res = m_program.read_byte(adr); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); else if(adr < 0x0200) - res = base->ram_page[adr & 0x00ff]; + res = m_base->m_ram_page[adr & 0x00ff]; return res; } uint8_t m6508_device::mi_6508::read_sync(uint16_t adr) { - uint8_t res = csprogram.read_byte(adr); + uint8_t res = m_csprogram.read_byte(adr); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); else if(adr < 0x0200) - res = base->ram_page[adr & 0x00ff]; + res = m_base->m_ram_page[adr & 0x00ff]; return res; } uint8_t m6508_device::mi_6508::read_arg(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_byte(adr); if(adr == 0x0000) - res = base->dir_r(); + res = m_base->dir_r(); else if(adr == 0x0001) - res = base->port_r(); + res = m_base->port_r(); else if(adr < 0x0200) - res = base->ram_page[adr & 0x00ff]; + res = m_base->m_ram_page[adr & 0x00ff]; return res; } void m6508_device::mi_6508::write(uint16_t adr, uint8_t val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); if(adr == 0x0000) - base->dir_w(val); + m_base->dir_w(val); else if(adr == 0x0001) - base->port_w(val); + m_base->port_w(val); else if(adr < 0x0200) - base->ram_page[adr & 0x00ff] = val; + m_base->m_ram_page[adr & 0x00ff] = val; } diff --git a/src/devices/cpu/m6502/m6510.h b/src/devices/cpu/m6502/m6510.h index b7d4e585b86..04f8680b3ad 100644 --- a/src/devices/cpu/m6502/m6510.h +++ b/src/devices/cpu/m6502/m6510.h @@ -22,8 +22,8 @@ public: uint8_t get_port(); void set_pulls(uint8_t pullup, uint8_t pulldown); - auto read_callback() { return read_port.bind(); } - auto write_callback() { return write_port.bind(); } + auto read_callback() { return m_read_port.bind(); } + auto write_callback() { return m_write_port.bind(); } virtual std::unique_ptr create_disassembler() override; virtual void do_exec_full() override; @@ -34,7 +34,7 @@ protected: class mi_6510 : public memory_interface { public: - m6510_device *base; + m6510_device *m_base; mi_6510(m6510_device *base); virtual ~mi_6510() {} @@ -44,10 +44,10 @@ protected: virtual void write(uint16_t adr, uint8_t val) override; }; - devcb_read8 read_port; - devcb_write8 write_port; + devcb_read8 m_read_port; + devcb_write8 m_write_port; - uint8_t pullup, floating, dir, port, drive; + uint8_t m_pullup, m_floating, m_dir, m_port, m_drive; virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; @@ -83,7 +83,7 @@ protected: class mi_6508 : public memory_interface { public: - m6508_device *base; + m6508_device *m_base; mi_6508(m6508_device *base); virtual ~mi_6508() {} @@ -93,7 +93,7 @@ protected: virtual void write(uint16_t adr, uint8_t val) override; }; - std::unique_ptr ram_page; + std::unique_ptr m_ram_page; }; enum { diff --git a/src/devices/cpu/m6502/m65ce02.cpp b/src/devices/cpu/m6502/m65ce02.cpp index 22e6bd5f3c5..a87cd0706fc 100644 --- a/src/devices/cpu/m6502/m65ce02.cpp +++ b/src/devices/cpu/m6502/m65ce02.cpp @@ -20,7 +20,7 @@ m65ce02_device::m65ce02_device(const machine_config &mconfig, const char *tag, d } m65ce02_device::m65ce02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : - w65c02_device(mconfig, type, tag, owner, clock), TMP3(0), Z(0), B(0) + w65c02_device(mconfig, type, tag, owner, clock), m_TMP3(0), m_Z(0), m_B(0) { } @@ -32,19 +32,19 @@ std::unique_ptr m65ce02_device::create_disassembler() void m65ce02_device::init() { w65c02_device::init(); - state_add(M65CE02_Z, "Z", Z); - state_add(M65CE02_B, "B", B).callimport().formatstr("%2s"); - save_item(NAME(B)); - save_item(NAME(Z)); - save_item(NAME(TMP3)); - Z = 0x00; - B = 0x0000; - TMP3 = 0x0000; + state_add(M65CE02_Z, "Z", m_Z); + state_add(M65CE02_B, "B", m_B).callimport().formatstr("%2s"); + save_item(NAME(m_B)); + save_item(NAME(m_Z)); + save_item(NAME(m_TMP3)); + m_Z = 0x00; + m_B = 0x0000; + m_TMP3 = 0x0000; } void m65ce02_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } @@ -52,8 +52,8 @@ void m65ce02_device::device_start() void m65ce02_device::device_reset() { w65c02_device::device_reset(); - Z = 0x00; - B = 0x0000; + m_Z = 0x00; + m_B = 0x0000; } void m65ce02_device::state_import(const device_state_entry &entry) @@ -61,10 +61,10 @@ void m65ce02_device::state_import(const device_state_entry &entry) switch(entry.index()) { case STATE_GENFLAGS: case M6502_P: - P = P | F_B; + m_P = m_P | F_B; break; case M65CE02_B: - B <<= 8; + m_B <<= 8; break; } } @@ -75,16 +75,16 @@ void m65ce02_device::state_string_export(const device_state_entry &entry, std::s case STATE_GENFLAGS: case M6502_P: str = string_format("%c%c%c%c%c%c%c", - P & F_N ? 'N' : '.', - P & F_V ? 'V' : '.', - P & F_E ? 'E' : '.', - P & F_D ? 'D' : '.', - P & F_I ? 'I' : '.', - P & F_Z ? 'Z' : '.', - P & F_C ? 'C' : '.'); + m_P & F_N ? 'N' : '.', + m_P & F_V ? 'V' : '.', + m_P & F_E ? 'E' : '.', + m_P & F_D ? 'D' : '.', + m_P & F_I ? 'I' : '.', + m_P & F_Z ? 'Z' : '.', + m_P & F_C ? 'C' : '.'); break; case M65CE02_B: - str = string_format("%02x", B >> 8); + str = string_format("%02x", m_B >> 8); break; } } diff --git a/src/devices/cpu/m6502/m65ce02.h b/src/devices/cpu/m6502/m65ce02.h index cf0a48e9a5b..ca9b34be6f9 100644 --- a/src/devices/cpu/m6502/m65ce02.h +++ b/src/devices/cpu/m6502/m65ce02.h @@ -25,9 +25,9 @@ public: protected: m65ce02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - uint16_t TMP3; /* temporary internal values */ - uint8_t Z; /* Z index register */ - uint16_t B; /* Zero page base address (always xx00) */ + uint16_t m_TMP3; /* temporary internal values */ + uint8_t m_Z; /* Z index register */ + uint16_t m_B; /* Zero page base address (always xx00) */ virtual void init() override; virtual void device_start() override ATTR_COLD; @@ -35,8 +35,8 @@ protected: virtual void state_import(const device_state_entry &entry) override; virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; - inline void dec_SP_ce() { if(P & F_E) SP = set_l(SP, SP-1); else SP--; } - inline void inc_SP_ce() { if(P & F_E) SP = set_l(SP, SP+1); else SP++; } + inline void dec_SP_ce() { if(m_P & F_E) m_SP = set_l(m_SP, m_SP-1); else m_SP--; } + inline void inc_SP_ce() { if(m_P & F_E) m_SP = set_l(m_SP, m_SP+1); else m_SP++; } #define O(o) void o ## _full(); void o ## _partial() diff --git a/src/devices/cpu/m6502/m740.cpp b/src/devices/cpu/m6502/m740.cpp index 4e42db0cb67..0be79307895 100644 --- a/src/devices/cpu/m6502/m740.cpp +++ b/src/devices/cpu/m6502/m740.cpp @@ -18,7 +18,7 @@ m740_device::m740_device(const machine_config &mconfig, device_type type, const u32 m740_device::get_state_base() const { - return inst_state_base; + return m_inst_state_base; } std::unique_ptr m740_device::create_disassembler() @@ -38,10 +38,10 @@ void m740_device::device_reset() { m6502_device::device_reset(); - irq_state = false; + m_irq_state = false; m_irq_multiplex = 0; m_irq_vector = 0xfffc; - SP = 0x00ff; + m_SP = 0x00ff; } void m740_device::state_string_export(const device_state_entry &entry, std::string &str) const @@ -50,13 +50,13 @@ void m740_device::state_string_export(const device_state_entry &entry, std::stri case STATE_GENFLAGS: case M6502_P: str = string_format("%c%c%c%c%c%c%c", - P & F_N ? 'N' : '.', - P & F_V ? 'V' : '.', - P & F_T ? 'T' : '.', - P & F_D ? 'D' : '.', - P & F_I ? 'I' : '.', - P & F_Z ? 'Z' : '.', - P & F_C ? 'C' : '.'); + m_P & F_N ? 'N' : '.', + m_P & F_V ? 'V' : '.', + m_P & F_T ? 'T' : '.', + m_P & F_D ? 'D' : '.', + m_P & F_I ? 'I' : '.', + m_P & F_Z ? 'Z' : '.', + m_P & F_C ? 'C' : '.'); break; } } @@ -80,44 +80,44 @@ uint8_t m740_device::do_rrf(uint8_t in) void m740_device::do_sbc_dt(uint8_t val) { - uint8_t c = P & F_C ? 0 : 1; - P &= ~(F_N|F_V|F_Z|F_C); - uint16_t diff = TMP - val - c; - uint8_t al = (TMP & 15) - (val & 15) - c; + uint8_t c = m_P & F_C ? 0 : 1; + m_P &= ~(F_N|F_V|F_Z|F_C); + uint16_t diff = m_TMP - val - c; + uint8_t al = (m_TMP & 15) - (val & 15) - c; if(int8_t(al) < 0) al -= 6; - uint8_t ah = (TMP >> 4) - (val >> 4) - (int8_t(al) < 0); + uint8_t ah = (m_TMP >> 4) - (val >> 4) - (int8_t(al) < 0); if(!uint8_t(diff)) - P |= F_Z; + m_P |= F_Z; else if(diff & 0x80) - P |= F_N; - if((TMP^val) & (TMP^diff) & 0x80) - P |= F_V; + m_P |= F_N; + if((m_TMP^val) & (m_TMP^diff) & 0x80) + m_P |= F_V; if(!(diff & 0xff00)) - P |= F_C; + m_P |= F_C; if(int8_t(ah) < 0) ah -= 6; - TMP = (ah << 4) | (al & 15); + m_TMP = (ah << 4) | (al & 15); } void m740_device::do_sbc_ndt(uint8_t val) { - uint16_t diff = TMP - val - (P & F_C ? 0 : 1); - P &= ~(F_N|F_V|F_Z|F_C); + uint16_t diff = m_TMP - val - (m_P & F_C ? 0 : 1); + m_P &= ~(F_N|F_V|F_Z|F_C); if(!uint8_t(diff)) - P |= F_Z; + m_P |= F_Z; else if(int8_t(diff) < 0) - P |= F_N; - if((TMP^val) & (TMP^diff) & 0x80) - P |= F_V; + m_P |= F_N; + if((m_TMP^val) & (m_TMP^diff) & 0x80) + m_P |= F_V; if(!(diff & 0xff00)) - P |= F_C; - TMP = diff; + m_P |= F_C; + m_TMP = diff; } void m740_device::do_sbct(uint8_t val) { - if(P & F_D) + if(m_P & F_D) do_sbc_dt(val); else do_sbc_ndt(val); @@ -125,44 +125,44 @@ void m740_device::do_sbct(uint8_t val) void m740_device::do_adc_dt(uint8_t val) { - uint8_t c = P & F_C ? 1 : 0; - P &= ~(F_N|F_V|F_Z|F_C); - uint8_t al = (TMP & 15) + (val & 15) + c; + uint8_t c = m_P & F_C ? 1 : 0; + m_P &= ~(F_N|F_V|F_Z|F_C); + uint8_t al = (m_TMP & 15) + (val & 15) + c; if(al > 9) al += 6; - uint8_t ah = (TMP >> 4) + (val >> 4) + (al > 15); - if(!uint8_t(TMP + val + c)) - P |= F_Z; + uint8_t ah = (m_TMP >> 4) + (val >> 4) + (al > 15); + if(!uint8_t(m_TMP + val + c)) + m_P |= F_Z; else if(ah & 8) - P |= F_N; - if(~(TMP^val) & (TMP^(ah << 4)) & 0x80) - P |= F_V; + m_P |= F_N; + if(~(m_TMP^val) & (m_TMP^(ah << 4)) & 0x80) + m_P |= F_V; if(ah > 9) ah += 6; if(ah > 15) - P |= F_C; - TMP = (ah << 4) | (al & 15); + m_P |= F_C; + m_TMP = (ah << 4) | (al & 15); } void m740_device::do_adc_ndt(uint8_t val) { uint16_t sum; - sum = TMP + val + (P & F_C ? 1 : 0); - P &= ~(F_N|F_V|F_Z|F_C); + sum = m_TMP + val + (m_P & F_C ? 1 : 0); + m_P &= ~(F_N|F_V|F_Z|F_C); if(!uint8_t(sum)) - P |= F_Z; + m_P |= F_Z; else if(int8_t(sum) < 0) - P |= F_N; - if(~(TMP^val) & (TMP^sum) & 0x80) - P |= F_V; + m_P |= F_N; + if(~(m_TMP^val) & (m_TMP^sum) & 0x80) + m_P |= F_V; if(sum & 0xff00) - P |= F_C; - TMP = sum; + m_P |= F_C; + m_TMP = sum; } void m740_device::do_adct(uint8_t val) { - if(P & F_D) + if(m_P & F_D) do_adc_dt(val); else do_adc_ndt(val); @@ -191,11 +191,11 @@ void m740_device::execute_set_input(int inputnum, int state) break; case V_LINE: - if(!v_state && state == ASSERT_LINE) + if(!m_v_state && state == ASSERT_LINE) { - P |= F_V; + m_P |= F_V; } - v_state = state == ASSERT_LINE; + m_v_state = state == ASSERT_LINE; break; } } @@ -214,9 +214,9 @@ void m740_device::set_irq_line(int line, int state) m_irq_multiplex &= ~(1<read(adr); } - virtual uint8_t read_data(uint16_t adr) { return mintf->read(adr); } - virtual void write_data(uint16_t adr, uint8_t val) { mintf->write(adr, val); } + virtual void read_dummy(uint16_t adr) { (void)m_mintf->read(adr); } + virtual uint8_t read_data(uint16_t adr) { return m_mintf->read(adr); } + virtual void write_data(uint16_t adr, uint8_t val) { m_mintf->write(adr, val); } virtual std::unique_ptr create_disassembler() override; virtual void do_exec_full() override; diff --git a/src/devices/cpu/m6502/m740d.cpp b/src/devices/cpu/m6502/m740d.cpp index 5da5ef53020..02d6a91daea 100644 --- a/src/devices/cpu/m6502/m740d.cpp +++ b/src/devices/cpu/m6502/m740d.cpp @@ -12,11 +12,11 @@ #include "m740d.h" #include "cpu/m6502/m740d.hxx" -m740_disassembler::m740_disassembler(config *_conf) : m6502_base_disassembler(disasm_entries), conf(_conf) +m740_disassembler::m740_disassembler(config *_conf) : m6502_base_disassembler(disasm_entries), m_conf(_conf) { } u32 m740_disassembler::get_instruction_bank() const { - return conf->get_state_base(); + return m_conf->get_state_base(); } diff --git a/src/devices/cpu/m6502/m740d.h b/src/devices/cpu/m6502/m740d.h index 80029cc56a8..d701fca7d18 100644 --- a/src/devices/cpu/m6502/m740d.h +++ b/src/devices/cpu/m6502/m740d.h @@ -31,7 +31,7 @@ protected: private: static const disasm_entry disasm_entries[0x200]; - config *conf; + config *m_conf; }; #endif diff --git a/src/devices/cpu/m6502/odeco16.lst b/src/devices/cpu/m6502/odeco16.lst index 1f25b6b3be6..54f5e4a3bff 100644 --- a/src/devices/cpu/m6502/odeco16.lst +++ b/src/devices/cpu/m6502/odeco16.lst @@ -3,113 +3,113 @@ # deco 16 opcodes brk_16_imp // The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_pending) - if(irq_taken) { + if(m_irq_taken) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - write(SP, irq_taken ? P & ~F_B : P); + write(m_SP, m_irq_taken ? m_P & ~F_B : m_P); dec_SP(); - if(nmi_pending) { - standard_irq_callback(NMI_LINE, PC); - PC = read_arg(0xfff7); - PC = set_h(PC, read_arg(0xfff6)); - nmi_pending = false; + if(m_nmi_pending) { + standard_irq_callback(NMI_LINE, m_PC); + m_PC = read_arg(0xfff7); + m_PC = set_h(m_PC, read_arg(0xfff6)); + m_nmi_pending = false; } else { - if(irq_taken) - standard_irq_callback(IRQ_LINE, PC); - PC = read_arg(0xfff3); - PC = set_h(PC, read_arg(0xfff2)); + if(m_irq_taken) + standard_irq_callback(IRQ_LINE, m_PC); + m_PC = read_arg(0xfff3); + m_PC = set_h(m_PC, read_arg(0xfff2)); } - irq_taken = false; - P |= F_I; // Do *not* move after the prefetch + m_irq_taken = false; + m_P |= F_I; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; ill_non - logerror("%s: Unimplemented instruction %02x\n", tag(), inst_state); + logerror("%s: Unimplemented instruction %02x\n", tag(), m_inst_state); prefetch(); u0B_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OP0B %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OP0B %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); u13_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OP13 %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OP13 %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); u23_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OP23 %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OP23 %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); u3F_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OPBB %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OPBB %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); u4B_zpg - TMP2 = read_pc(); - PC++; - A = io->read_byte(1); + m_TMP2 = read_pc(); + m_PC++; + m_A = m_io->read_byte(1); prefetch(); u87_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OP87 %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OP87 %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); u8F_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OP8F (BANK) %02x (%04x)\n", tag(), NPC, TMP2); - io->write_byte(0, TMP2); + logerror("%s: OP8F (BANK) %02x (%04x)\n", tag(), m_NPC, m_TMP2); + m_io->write_byte(0, m_TMP2); prefetch(); uA3_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OPA3 %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OPA3 %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); uBB_zpg - TMP2 = read_pc(); - PC++; + m_TMP2 = read_pc(); + m_PC++; if(DECO16_VERBOSE) - logerror("%s: OPBB %02x (%04x)\n", tag(), NPC, TMP2); + logerror("%s: OPBB %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); vbl_zpg - TMP2 = read_pc(); - PC++; - A = io->read_byte(0); + m_TMP2 = read_pc(); + m_PC++; + m_A = m_io->read_byte(0); //if(DECO16_VERBOSE) - // logerror("%s: VBL %02x (%04x)\n", tag(), NPC, TMP2); + // logerror("%s: VBL %02x (%04x)\n", tag(), m_NPC, m_TMP2); prefetch(); # exceptions reset_16 - P |= F_I; - PC = read_arg(0xfff1); - PC = set_h(PC, read_arg(0xfff0)); + m_P |= F_I; + m_PC = read_arg(0xfff1); + m_PC = set_h(m_PC, read_arg(0xfff0)); prefetch(); - inst_state = -1; + m_inst_state = -1; diff --git a/src/devices/cpu/m6502/om4510.lst b/src/devices/cpu/m6502/om4510.lst index ade37a82db6..96f24d96a71 100644 --- a/src/devices/cpu/m6502/om4510.lst +++ b/src/devices/cpu/m6502/om4510.lst @@ -3,21 +3,21 @@ # 4510 opcodes eom_imp - inhibit_interrupts = false; // before or after prefetch? + m_inhibit_interrupts = false; // before or after prefetch? prefetch(); map_imp - inhibit_interrupts = true; - map_offset[0] = (A<<8) | ((X & 0xf) << 16); - map_offset[1] = (Y<<8) | ((Z & 0xf) << 16); - map_enable = ((X & 0xf0) >> 4) | (Z & 0xf0); + m_inhibit_interrupts = true; + m_map_offset[0] = (m_A<<8) | ((m_X & 0xf) << 16); + m_map_offset[1] = (m_Y<<8) | ((m_Z & 0xf) << 16); + m_map_enable = ((m_X & 0xf0) >> 4) | (m_Z & 0xf0); logerror("MAP execute\n"); - logerror("0x0000 - 0x1fff = %08x\n",map_enable & 1 ? map_offset[0]+0x0000 : 0x0000); - logerror("0x2000 - 0x3fff = %08x\n",map_enable & 2 ? map_offset[0]+0x2000 : 0x2000); - logerror("0x4000 - 0x5fff = %08x\n",map_enable & 4 ? map_offset[0]+0x4000 : 0x4000); - logerror("0x6000 - 0x7fff = %08x\n",map_enable & 8 ? map_offset[0]+0x6000 : 0x6000); - logerror("0x8000 - 0x9fff = %08x\n",map_enable & 16 ? map_offset[1]+0x8000 : 0x8000); - logerror("0xa000 - 0xbfff = %08x\n",map_enable & 32 ? map_offset[1]+0xa000 : 0xa000); - logerror("0xc000 - 0xdfff = %08x\n",map_enable & 64 ? map_offset[1]+0xc000 : 0xc000); - logerror("0xe000 - 0xffff = %08x\n",map_enable & 128 ? map_offset[1]+0xe000 : 0xe000); + logerror("0x0000 - 0x1fff = %08x\n",m_map_enable & 1 ? m_map_offset[0]+0x0000 : 0x0000); + logerror("0x2000 - 0x3fff = %08x\n",m_map_enable & 2 ? m_map_offset[0]+0x2000 : 0x2000); + logerror("0x4000 - 0x5fff = %08x\n",m_map_enable & 4 ? m_map_offset[0]+0x4000 : 0x4000); + logerror("0x6000 - 0x7fff = %08x\n",m_map_enable & 8 ? m_map_offset[0]+0x6000 : 0x6000); + logerror("0x8000 - 0x9fff = %08x\n",m_map_enable & 16 ? m_map_offset[1]+0x8000 : 0x8000); + logerror("0xa000 - 0xbfff = %08x\n",m_map_enable & 32 ? m_map_offset[1]+0xa000 : 0xa000); + logerror("0xc000 - 0xdfff = %08x\n",m_map_enable & 64 ? m_map_offset[1]+0xc000 : 0xc000); + logerror("0xe000 - 0xffff = %08x\n",m_map_enable & 128 ? m_map_offset[1]+0xe000 : 0xe000); prefetch(); diff --git a/src/devices/cpu/m6502/om6502.lst b/src/devices/cpu/m6502/om6502.lst index 1dca3d918a8..94aeea27c6b 100644 --- a/src/devices/cpu/m6502/om6502.lst +++ b/src/devices/cpu/m6502/om6502.lst @@ -5,949 +5,949 @@ # documented opcodes adc_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_adc(TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_adc(m_TMP2); prefetch(); adc_imm - TMP = read_pc(); - PC++; - do_adc(TMP); + m_TMP = read_pc(); + m_PC++; + do_adc(m_TMP); prefetch(); adc_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_adc(m_TMP2); prefetch(); and_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_imm - TMP = read_pc(); - PC++; - A &= TMP; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A &= m_TMP; + set_nz(m_A); prefetch(); and_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - A &= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); asl_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_acc read_pc(); - A = do_asl(A); + m_A = do_asl(m_A); prefetch(); asl_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); bcc_rel - TMP = read_pc(); - PC++; - if(!(P & F_C)) { + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_C)) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bcs_rel - TMP = read_pc(); - PC++; - if(P & F_C) { + m_TMP = read_pc(); + m_PC++; + if(m_P & F_C) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); beq_rel - TMP = read_pc(); - PC++; - if(P & F_Z) { + m_TMP = read_pc(); + m_PC++; + if(m_P & F_Z) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bit_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_bit(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); prefetch(); bit_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_bit(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); prefetch(); bmi_rel - TMP = read_pc(); - PC++; - if(P & F_N) { + m_TMP = read_pc(); + m_PC++; + if(m_P & F_N) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bne_rel - TMP = read_pc(); - PC++; - if(!(P & F_Z)) { + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_Z)) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bpl_rel - TMP = read_pc(); - PC++; - if(!(P & F_N)) { + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_N)) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); brk_imp // The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_pending) - if(irq_taken) { + if(m_irq_taken) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - write(SP, irq_taken ? P & ~F_B : P); + write(m_SP, m_irq_taken ? m_P & ~F_B : m_P); dec_SP(); - if(nmi_pending) { - standard_irq_callback(NMI_LINE, PC); - PC = read_arg(0xfffa); - PC = set_h(PC, read_arg(0xfffb)); - nmi_pending = false; + if(m_nmi_pending) { + standard_irq_callback(NMI_LINE, m_PC); + m_PC = read_arg(0xfffa); + m_PC = set_h(m_PC, read_arg(0xfffb)); + m_nmi_pending = false; } else { - if(irq_taken) - standard_irq_callback(IRQ_LINE, PC); - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + if(m_irq_taken) + standard_irq_callback(IRQ_LINE, m_PC); + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); } - irq_taken = false; - P |= F_I; // Do *not* move after the prefetch + m_irq_taken = false; + m_P |= F_I; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; bvc_rel - TMP = read_pc(); - PC++; - if(!(P & F_V)) { + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_V)) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bvs_rel - TMP = read_pc(); - PC++; - if(P & F_V) { + m_TMP = read_pc(); + m_PC++; + if(m_P & F_V) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); clc_imp read_pc(); - P &= ~F_C; + m_P &= ~F_C; prefetch(); cld_imp read_pc(); - P &= ~F_D; + m_P &= ~F_D; prefetch(); cli_imp read_pc(); prefetch(); - P &= ~F_I; // Do *not* move it before the prefetch + m_P &= ~F_I; // Do *not* move it before the prefetch clv_imp read_pc(); - P &= ~F_V; + m_P &= ~F_V; prefetch(); cmp_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_cmp(A, TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_cmp(m_A, m_TMP2); prefetch(); cmp_imm - TMP = read_pc(); - PC++; - do_cmp(A, TMP); + m_TMP = read_pc(); + m_PC++; + do_cmp(m_A, m_TMP); prefetch(); cmp_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_cmp(m_A, m_TMP2); prefetch(); cpx_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_cmp(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_X, m_TMP2); prefetch(); cpx_imm - TMP = read_pc(); - PC++; - do_cmp(X, TMP); + m_TMP = read_pc(); + m_PC++; + do_cmp(m_X, m_TMP); prefetch(); cpx_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_cmp(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_X, m_TMP2); prefetch(); cpy_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_cmp(Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_Y, m_TMP2); prefetch(); cpy_imm - TMP = read_pc(); - PC++; - do_cmp(Y, TMP); + m_TMP = read_pc(); + m_PC++; + do_cmp(m_Y, m_TMP); prefetch(); cpy_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_cmp(Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_Y, m_TMP2); prefetch(); dec_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dex_imp read_pc(); - X--; - set_nz(X); + m_X--; + set_nz(m_X); prefetch(); dey_imp read_pc(); - Y--; - set_nz(Y); + m_Y--; + set_nz(m_Y); prefetch(); eor_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - A ^= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_imm - TMP = read_pc(); - PC++; - A ^= TMP; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A ^= m_TMP; + set_nz(m_A); prefetch(); eor_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); inc_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inx_imp read_pc(); - X++; - set_nz(X); + m_X++; + set_nz(m_X); prefetch(); iny_imp read_pc(); - Y++; - set_nz(Y); + m_Y++; + set_nz(m_Y); prefetch(); jmp_adr - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC = TMP; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC = m_TMP; prefetch(); jmp_ind - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - PC = set_h(PC, read(set_l(TMP, TMP+1))); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(set_l(m_TMP, m_TMP+1))); prefetch(); jsr_adr - TMP = read_pc(); - PC++; - read(SP); - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + read(m_SP); + write(m_SP, m_PC>>8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - TMP = set_h(TMP, read_pc()); - PC = TMP; + m_TMP = set_h(m_TMP, read_pc()); + m_PC = m_TMP; prefetch(); lda_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - A = read(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_A = read(m_TMP); + set_nz(m_A); prefetch(); lda_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - A = read(TMP + X); - set_nz(A); + m_A = read(m_TMP + m_X); + set_nz(m_A); prefetch(); lda_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - A = read(TMP + Y); - set_nz(A); + m_A = read(m_TMP + m_Y); + set_nz(m_A); prefetch(); lda_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - A = read(TMP); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_A = read(m_TMP); + set_nz(m_A); prefetch(); lda_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - A = read(TMP+Y); - set_nz(A); + m_A = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); lda_imm - A = read_pc(); - PC++; - set_nz(A); + m_A = read_pc(); + m_PC++; + set_nz(m_A); prefetch(); lda_zpg - TMP = read_pc(); - PC++; - A = read(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A = read(m_TMP); + set_nz(m_A); prefetch(); lda_zpx - TMP = read_pc(); - PC++; - read(TMP); - A = read(uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_A = read(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); ldx_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - X = read(TMP); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_X = read(m_TMP); + set_nz(m_X); prefetch(); ldx_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - X = read(TMP + Y); - set_nz(X); + m_X = read(m_TMP + m_Y); + set_nz(m_X); prefetch(); ldx_imm - X = read_pc(); - PC++; - set_nz(X); + m_X = read_pc(); + m_PC++; + set_nz(m_X); prefetch(); ldx_zpg - TMP = read_pc(); - PC++; - X = read(TMP); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_X = read(m_TMP); + set_nz(m_X); prefetch(); ldx_zpy - TMP = read_pc(); - PC++; - read(TMP); - X = read(uint8_t(TMP+Y)); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_X = read(uint8_t(m_TMP+m_Y)); + set_nz(m_X); prefetch(); ldy_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - Y = read(TMP); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_Y = read(m_TMP); + set_nz(m_Y); prefetch(); ldy_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - Y = read(TMP); - set_nz(Y); + m_TMP += m_X; + m_Y = read(m_TMP); + set_nz(m_Y); prefetch(); ldy_imm - Y = read_pc(); - PC++; - set_nz(Y); + m_Y = read_pc(); + m_PC++; + set_nz(m_Y); prefetch(); ldy_zpg - TMP = read_pc(); - PC++; - Y = read(TMP); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_Y = read(m_TMP); + set_nz(m_Y); prefetch(); ldy_zpx - TMP = read_pc(); - PC++; - read(TMP); - Y = read(uint8_t(TMP+X)); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_Y = read(uint8_t(m_TMP+m_X)); + set_nz(m_Y); prefetch(); lsr_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_acc read_pc(); - A = do_lsr(A); + m_A = do_lsr(m_A); prefetch(); lsr_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); nop_imp @@ -955,1321 +955,1321 @@ nop_imp prefetch(); ora_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_imm - TMP = read_pc(); - PC++; - A |= TMP; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A |= m_TMP; + set_nz(m_A); prefetch(); ora_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - A |= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); pha_imp read_pc(); - write(SP, A); + write(m_SP, m_A); dec_SP(); prefetch(); php_imp read_pc(); - write(SP, P); + write(m_SP, m_P); dec_SP(); prefetch(); pla_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - A = read(SP); - set_nz(A); + m_A = read(m_SP); + set_nz(m_A); prefetch(); plp_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - TMP = read(SP) | (F_B|F_E); + m_TMP = read(m_SP) | (F_B|F_E); prefetch(); - P = TMP; // Do *not* move it before the prefetch + m_P = m_TMP; // Do *not* move it before the prefetch rol_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_acc read_pc(); - A = do_rol(A); + m_A = do_rol(m_A); prefetch(); rol_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_acc read_pc(); - A = do_ror(A); + m_A = do_ror(m_A); prefetch(); ror_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rti_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - P = read(SP) | (F_B|F_E); + m_P = read(m_SP) | (F_B|F_E); inc_SP(); - PC = read(SP); + m_PC = read(m_SP); inc_SP(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); prefetch(); rts_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - PC = read(SP); + m_PC = read(m_SP); inc_SP(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); read_pc(); - PC++; + m_PC++; prefetch(); sbc_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_sbc(TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_sbc(m_TMP2); prefetch(); sbc_imm - TMP = read_pc(); - PC++; - do_sbc(TMP); + m_TMP = read_pc(); + m_PC++; + do_sbc(m_TMP); prefetch(); sbc_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_sbc(m_TMP2); prefetch(); sec_imp read_pc(); - P |= F_C; + m_P |= F_C; prefetch(); sed_imp read_pc(); - P |= F_D; + m_P |= F_D; prefetch(); sei_imp read_pc(); prefetch(); - P |= F_I; // Do *not* move it before the prefetch + m_P |= F_I; // Do *not* move it before the prefetch sta_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP, m_A); prefetch(); sta_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - write(TMP+X, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + write(m_TMP+m_X, m_A); prefetch(); sta_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - write(TMP+Y, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + write(m_TMP+m_Y, m_A); prefetch(); sta_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - write(TMP, A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + write(m_TMP, m_A); prefetch(); sta_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - write(TMP+Y, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + write(m_TMP+m_Y, m_A); prefetch(); sta_zpg - TMP = read_pc(); - PC++; - write(TMP, A); + m_TMP = read_pc(); + m_PC++; + write(m_TMP, m_A); prefetch(); sta_zpx - TMP = read_pc(); - PC++; - read(TMP); - write(uint8_t(TMP+X), A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + write(uint8_t(m_TMP+m_X), m_A); prefetch(); stx_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP, X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP, m_X); prefetch(); stx_zpg - TMP = read_pc(); - PC++; - write(TMP, X); + m_TMP = read_pc(); + m_PC++; + write(m_TMP, m_X); prefetch(); stx_zpy - TMP = read_pc(); - PC++; - read(TMP); - write(uint8_t(TMP+Y), X); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + write(uint8_t(m_TMP+m_Y), m_X); prefetch(); sty_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP, Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP, m_Y); prefetch(); sty_zpg - TMP = read_pc(); - PC++; - write(TMP, Y); + m_TMP = read_pc(); + m_PC++; + write(m_TMP, m_Y); prefetch(); sty_zpx - TMP = read_pc(); - PC++; - read(TMP); - write(uint8_t(TMP+X), Y); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + write(uint8_t(m_TMP+m_X), m_Y); prefetch(); tax_imp read_pc(); - X = A; - set_nz(X); + m_X = m_A; + set_nz(m_X); prefetch(); tay_imp read_pc(); - Y = A; - set_nz(Y); + m_Y = m_A; + set_nz(m_Y); prefetch(); tsx_imp read_pc(); - X = SP; - set_nz(X); + m_X = m_SP; + set_nz(m_X); prefetch(); txa_imp read_pc(); - A = X; - set_nz(A); + m_A = m_X; + set_nz(m_A); prefetch(); txs_imp read_pc(); - SP = set_l(SP, X); + m_SP = set_l(m_SP, m_X); prefetch(); tya_imp read_pc(); - A = Y; - set_nz(A); + m_A = m_Y; + set_nz(m_A); prefetch(); # exceptions reset read_pc(); read_pc(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - P |= F_I; - PC = read_arg(0xfffc); - PC = set_h(PC, read_arg(0xfffd)); + m_P |= F_I; + m_PC = read_arg(0xfffc); + m_PC = set_h(m_PC, read_arg(0xfffd)); prefetch(); - inst_state = -1; + m_inst_state = -1; # undocumented reliable instructions dcp_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); dcp_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); dcp_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); dcp_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); dcp_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); dcp_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); dcp_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); isb_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); isb_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); isb_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); isb_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); isb_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); isb_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); isb_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); lax_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - A = X = read(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_A = m_X = read(m_TMP); + set_nz(m_A); prefetch(); lax_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - A = X = read(TMP+Y); - set_nz(A); + m_A = m_X = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); lax_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - A = X = read(TMP); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_A = m_X = read(m_TMP); + set_nz(m_A); prefetch(); lax_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - A = X = read(TMP+Y); - set_nz(A); + m_A = m_X = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); lax_zpg - TMP = read_pc(); - PC++; - A = X = read(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A = m_X = read(m_TMP); + set_nz(m_A); prefetch(); lax_zpy - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+Y); - A = X = read(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_Y); + m_A = m_X = read(m_TMP); + set_nz(m_A); prefetch(); rla_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rla_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rla_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rla_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rla_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rla_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rla_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rra_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); rra_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); rra_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); rra_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); rra_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); rra_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); rra_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); sax_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = A & X; - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = m_A & m_X; + write(m_TMP, m_TMP2); prefetch(); sax_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = A & X; - write(TMP, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = m_A & m_X; + write(m_TMP, m_TMP2); prefetch(); sax_zpg - TMP = read_pc(); - PC++; - TMP2 = A & X; - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = m_A & m_X; + write(m_TMP, m_TMP2); prefetch(); sax_zpy - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+Y); - TMP2 = A & X; - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_Y); + m_TMP2 = m_A & m_X; + write(m_TMP, m_TMP2); prefetch(); sbx_imm - TMP2 = read_pc(); - PC++; - X &= A; - if(X < TMP2) - P &= ~F_C; + m_TMP2 = read_pc(); + m_PC++; + m_X &= m_A; + if(m_X < m_TMP2) + m_P &= ~F_C; else - P |= F_C; - X -= TMP2; - set_nz(X); + m_P |= F_C; + m_X -= m_TMP2; + set_nz(m_X); prefetch(); sha_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP2 = A & X & ((TMP >> 8)+1); - if(page_changing(TMP, Y)) - TMP = set_h(TMP+Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = m_A & m_X & ((m_TMP >> 8)+1); + if(page_changing(m_TMP, m_Y)) + m_TMP = set_h(m_TMP+m_Y, m_TMP2); else - TMP += Y; - write(TMP, TMP2); + m_TMP += m_Y; + write(m_TMP, m_TMP2); prefetch(); sha_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP2 = A & X & ((TMP >> 8)+1); - if(page_changing(TMP, Y)) - TMP = set_h(TMP+Y, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = m_A & m_X & ((m_TMP >> 8)+1); + if(page_changing(m_TMP, m_Y)) + m_TMP = set_h(m_TMP+m_Y, m_TMP2); else - TMP += Y; - write(TMP, TMP2); + m_TMP += m_Y; + write(m_TMP, m_TMP2); prefetch(); shs_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - SP = set_l(SP, A & X); - TMP2 = A & X & ((TMP >> 8)+1); - if(page_changing(TMP, Y)) - TMP = set_h(TMP+Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_SP = set_l(m_SP, m_A & m_X); + m_TMP2 = m_A & m_X & ((m_TMP >> 8)+1); + if(page_changing(m_TMP, m_Y)) + m_TMP = set_h(m_TMP+m_Y, m_TMP2); else - TMP += Y; - write(TMP, TMP2); + m_TMP += m_Y; + write(m_TMP, m_TMP2); prefetch(); shx_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP2 = X & ((TMP >> 8)+1); - if(page_changing(TMP, Y)) - TMP = set_h(TMP+Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = m_X & ((m_TMP >> 8)+1); + if(page_changing(m_TMP, m_Y)) + m_TMP = set_h(m_TMP+m_Y, m_TMP2); else - TMP += Y; - write(TMP, TMP2); + m_TMP += m_Y; + write(m_TMP, m_TMP2); prefetch(); shy_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP2 = Y & ((TMP >> 8)+1); - if(page_changing(TMP, X)) - TMP = set_h(TMP+X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP2 = m_Y & ((m_TMP >> 8)+1); + if(page_changing(m_TMP, m_X)) + m_TMP = set_h(m_TMP+m_X, m_TMP2); else - TMP += X; - write(TMP, TMP2); + m_TMP += m_X; + write(m_TMP, m_TMP2); prefetch(); slo_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); slo_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); slo_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); slo_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); slo_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); slo_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); slo_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); sre_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); sre_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); sre_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); sre_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); sre_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); sre_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); sre_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); # undocumented unreliable instructions anc_imm - TMP = read_pc(); - PC++; - A &= TMP; - set_nz(A); - if(A & 0x80) - P |= F_C; + m_TMP = read_pc(); + m_PC++; + m_A &= m_TMP; + set_nz(m_A); + if(m_A & 0x80) + m_P |= F_C; else - P &= ~F_C; + m_P &= ~F_C; prefetch(); ane_imm - TMP = read_pc(); - PC++; - A &= TMP & X; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A &= m_TMP & m_X; + set_nz(m_A); prefetch(); asr_imm - TMP = read_pc(); - PC++; - A = do_lsr(A & TMP); + m_TMP = read_pc(); + m_PC++; + m_A = do_lsr(m_A & m_TMP); prefetch(); arr_imm - TMP = read_pc(); - PC++; - A &= TMP; + m_TMP = read_pc(); + m_PC++; + m_A &= m_TMP; do_arr(); prefetch(); las_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - A = TMP2 | 0x51; - X = 0xff; - set_nz(TMP2); + m_TMP2 = read(m_TMP+m_Y); + m_A = m_TMP2 | 0x51; + m_X = 0xff; + set_nz(m_TMP2); prefetch(); lxa_imm - A = X = read_pc(); - PC++; - set_nz(A); + m_A = m_X = read_pc(); + m_PC++; + set_nz(m_A); prefetch(); # nop variants nop_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(m_TMP); prefetch(); nop_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - read(TMP + X); + read(m_TMP + m_X); prefetch(); nop_imm read_pc(); - PC++; + m_PC++; prefetch(); nop_zpg - TMP = read_pc(); - PC++; - read(TMP); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); prefetch(); nop_zpx - TMP = read_pc(); - PC++; - read(TMP); - read(uint8_t(TMP+X)); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + read(uint8_t(m_TMP+m_X)); prefetch(); # system killers kil_non read_pc(); - PC++; + m_PC++; read(0xffff); read(0xfffe); read(0xfffe); diff --git a/src/devices/cpu/m6502/om6509.lst b/src/devices/cpu/m6502/om6509.lst index b2f116716e8..ad2c2a0fc3c 100644 --- a/src/devices/cpu/m6502/om6509.lst +++ b/src/devices/cpu/m6502/om6509.lst @@ -3,22 +3,22 @@ # 6509 opcodes lda_9_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read_9(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read_9(set_l(m_TMP, m_TMP+m_Y)); } - A = read_9(TMP+Y); - set_nz(A); + m_A = read_9(m_TMP+m_Y); + set_nz(m_A); prefetch(); sta_9_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_9(set_l(TMP, TMP+Y)); - write_9(TMP+Y, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_9(set_l(m_TMP, m_TMP+m_Y)); + write_9(m_TMP+m_Y, m_A); prefetch(); diff --git a/src/devices/cpu/m6502/om6510.lst b/src/devices/cpu/m6502/om6510.lst index 1554e83de95..6a13d3ffe01 100644 --- a/src/devices/cpu/m6502/om6510.lst +++ b/src/devices/cpu/m6502/om6510.lst @@ -2,54 +2,54 @@ # copyright-holders:Olivier Galibert # 6510 undocumented instructions in a C64 context anc_10_imm - TMP2 = read_pc(); - PC++; - A &= TMP2; - set_nz(A); - if(A & 0x80) - P |= F_C; + m_TMP2 = read_pc(); + m_PC++; + m_A &= m_TMP2; + set_nz(m_A); + if(m_A & 0x80) + m_P |= F_C; else - P &= ~F_C; + m_P &= ~F_C; prefetch(); ane_10_imm - TMP2 = read_pc(); - PC++; - A = (A | 0xee) & TMP2 & X; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_A = (m_A | 0xee) & m_TMP2 & m_X; + set_nz(m_A); prefetch(); asr_10_imm - TMP2 = read_pc(); - PC++; - A = do_lsr(A & TMP2); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_A = do_lsr(m_A & m_TMP2); + set_nz(m_A); prefetch(); arr_10_imm - TMP2 = read_pc(); - PC++; - A &= TMP2; + m_TMP2 = read_pc(); + m_PC++; + m_A &= m_TMP2; do_arr(); prefetch(); las_10_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - A = X = TMP2 & SP; - SP = set_l(SP, A); - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A = m_X = m_TMP2 & m_SP; + m_SP = set_l(m_SP, m_A); + set_nz(m_A); prefetch(); lxa_10_imm - TMP2 = read_pc(); - PC++; - A = X = (A | 0xee) & TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_A = m_X = (m_A | 0xee) & m_TMP2; + set_nz(m_A); prefetch(); diff --git a/src/devices/cpu/m6502/om65ce02.lst b/src/devices/cpu/m6502/om65ce02.lst index 800ce84488d..8d10c6bd991 100644 --- a/src/devices/cpu/m6502/om65ce02.lst +++ b/src/devices/cpu/m6502/om65ce02.lst @@ -1,1790 +1,1790 @@ -# license:BSD-3-Clause +# license:m_BSD-3-Clause # copyright-holders:Olivier Galibert -# 65ce02 opcodes, a lot only remove dummy read/write cycles, some are new, some use the B register +# 65ce02 opcodes, a lot only remove dummy read/write cycles, some are new, some use the m_B register adc_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += Y; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Y); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Y); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Z); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Z); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_imm - TMP = read_pc(); - PC++; - do_adc(TMP); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + do_adc(m_TMP); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); adc_ce_zpx - TMP = read_pc(); - PC++; - TMP2 = read(B|uint8_t(TMP+X)); - do_adc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + do_adc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); and_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += Y; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Y); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Y); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Z); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Z); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_ce_zpx - TMP = read_pc(); - PC++; - TMP2 = read(B|uint8_t(TMP+X)); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); asl_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_ce_acc - A = do_asl(A); + m_A = do_asl(m_A); prefetch(); asl_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_ce_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asr_acc - A = do_asr(A); + m_A = do_asr(m_A); prefetch(); asr_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 = do_asr(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_asr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asr_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2 = do_asr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2 = do_asr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asw_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP3 = read(TMP); - TMP3 = set_h(TMP3, read(TMP+1)); - P &= ~(F_C|F_N|F_Z); - if(TMP3 & 0x8000) - P |= F_C; - TMP3 <<= 1; - if(!TMP3) - P |= F_Z; - else if(TMP3 & 0x8000) - P |= F_N; - write(TMP, TMP3); - write(TMP, TMP3 >> 8); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP3 = read(m_TMP); + m_TMP3 = set_h(m_TMP3, read(m_TMP+1)); + m_P &= ~(F_C|F_N|F_Z); + if(m_TMP3 & 0x8000) + m_P |= F_C; + m_TMP3 <<= 1; + if(!m_TMP3) + m_P |= F_Z; + else if(m_TMP3 & 0x8000) + m_P |= F_N; + write(m_TMP, m_TMP3); + write(m_TMP, m_TMP3 >> 8); prefetch(); aug_iw3 read_pc(); - PC++; + m_PC++; read_pc(); - PC++; + m_PC++; read_pc(); - PC++; + m_PC++; prefetch(); bbr_ce_zpb // Access pattern uncertain - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read_pc(); - PC++; - if(!(TMP2 & (1 << ((inst_state >> 4) & 7)))) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read_pc(); + m_PC++; + if(!(m_TMP2 & (1 << ((m_inst_state >> 4) & 7)))) + m_PC += int8_t(m_TMP); prefetch(); bbs_ce_zpb // Access pattern uncertain - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read_pc(); - PC++; - if(TMP2 & (1 << ((inst_state >> 4) & 7))) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read_pc(); + m_PC++; + if(m_TMP2 & (1 << ((m_inst_state >> 4) & 7))) + m_PC += int8_t(m_TMP); prefetch(); bcc_ce_rel - TMP = read_pc(); - PC++; - if(!(P & F_C)) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_C)) + m_PC += int8_t(m_TMP); prefetch(); bcc_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(!(P & F_C)) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(!(m_P & F_C)) + m_PC += m_TMP-1; prefetch(); bcs_ce_rel - TMP = read_pc(); - PC++; - if(P & F_C) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_C) + m_PC += int8_t(m_TMP); prefetch(); bcs_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(P & F_C) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(m_P & F_C) + m_PC += m_TMP-1; prefetch(); beq_ce_rel - TMP = read_pc(); - PC++; - if(P & F_Z) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_Z) + m_PC += int8_t(m_TMP); prefetch(); beq_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(P & F_Z) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(m_P & F_Z) + m_PC += m_TMP-1; prefetch(); bit_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - do_bit(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); prefetch(); bit_ce_imm - TMP = read_pc(); - PC++; - do_bit(TMP); + m_TMP = read_pc(); + m_PC++; + do_bit(m_TMP); prefetch(); bit_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - do_bit(TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); prefetch(); bit_ce_zpx - TMP = read_pc(); - PC++; - TMP2 = read(B|uint8_t(TMP+X)); - do_bit(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + do_bit(m_TMP2); prefetch(); bmi_ce_rel - TMP = read_pc(); - PC++; - if(P & F_N) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_N) + m_PC += int8_t(m_TMP); prefetch(); bmi_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(P & F_N) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(m_P & F_N) + m_PC += m_TMP-1; prefetch(); bne_ce_rel - TMP = read_pc(); - PC++; - if(!(P & F_Z)) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_Z)) + m_PC += int8_t(m_TMP); prefetch(); bne_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(!(P & F_Z)) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(!(m_P & F_Z)) + m_PC += m_TMP-1; prefetch(); bpl_ce_rel - TMP = read_pc(); - PC++; - if(!(P & F_N)) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_N)) + m_PC += int8_t(m_TMP); prefetch(); bpl_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(!(P & F_N)) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(!(m_P & F_N)) + m_PC += m_TMP-1; prefetch(); bra_ce_rel - TMP = read_pc(); - PC++; - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + m_PC += int8_t(m_TMP); prefetch(); bra_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC += TMP; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC += m_TMP; prefetch(); brk_ce_imp - if(irq_taken) { + if(m_irq_taken) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP_ce(); - write(SP, PC); + write(m_SP, m_PC); dec_SP_ce(); - write(SP, irq_taken || nmi_pending ? P & ~F_B : P); + write(m_SP, m_irq_taken || m_nmi_pending ? m_P & ~F_B : m_P); dec_SP_ce(); - if(nmi_pending) { - PC = read_arg(0xfffa); - PC = set_h(PC, read_arg(0xfffb)); - nmi_pending = false; + if(m_nmi_pending) { + m_PC = read_arg(0xfffa); + m_PC = set_h(m_PC, read_arg(0xfffb)); + m_nmi_pending = false; } else { - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); } - irq_taken = false; - P = (P | F_I) & ~F_D; // Do *not* move after the prefetch + m_irq_taken = false; + m_P = (m_P | F_I) & ~F_D; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; bsr_rw2 - TMP = read_pc(); - PC++; - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + write(m_SP, m_PC>>8); dec_SP_ce(); - write(SP, PC); + write(m_SP, m_PC); dec_SP_ce(); - TMP = set_h(TMP, read_pc()); - PC++; - PC += TMP-1; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC += m_TMP-1; prefetch(); bvc_ce_rel - TMP = read_pc(); - PC++; - if(!(P & F_V)) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(!(m_P & F_V)) + m_PC += int8_t(m_TMP); prefetch(); bvc_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(!(P & F_V)) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(!(m_P & F_V)) + m_PC += m_TMP-1; prefetch(); bvs_ce_rel - TMP = read_pc(); - PC++; - if(P & F_V) - PC += int8_t(TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_V) + m_PC += int8_t(m_TMP); prefetch(); bvs_rw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(P & F_V) - PC += TMP-1; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(m_P & F_V) + m_PC += m_TMP-1; prefetch(); clc_ce_imp - P &= ~F_C; + m_P &= ~F_C; prefetch(); cld_ce_imp - P &= ~F_D; + m_P &= ~F_D; prefetch(); cle_imp read_pc(); - P &= ~F_E; + m_P &= ~F_E; logerror("CLE\n"); prefetch(); cli_ce_imp prefetch(); - P &= ~F_I; // Do *not* move it before the prefetch + m_P &= ~F_I; // Do *not* move it before the prefetch clv_ce_imp - P &= ~F_V; + m_P &= ~F_V; prefetch(); cmp_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += Y; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Y); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Y); + do_cmp(m_A, m_TMP2); prefetch(); cmp_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Z); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Z); + do_cmp(m_A, m_TMP2); prefetch(); cmp_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_ce_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(B|uint8_t(TMP+X)); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + do_cmp(m_A, m_TMP2); prefetch(); cpx_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - do_cmp(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + do_cmp(m_X, m_TMP2); prefetch(); cpy_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - do_cmp(Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + do_cmp(m_Y, m_TMP2); prefetch(); cpz_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_cmp(Z, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_cmp(m_Z, m_TMP2); prefetch(); cpz_imm - TMP = read_pc(); - PC++; - do_cmp(Z, TMP); + m_TMP = read_pc(); + m_PC++; + do_cmp(m_Z, m_TMP); prefetch(); cpz_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - do_cmp(Z, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + do_cmp(m_Z, m_TMP2); prefetch(); dec_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_ce_acc - A--; - set_nz(A); + m_A--; + set_nz(m_A); prefetch(); dec_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_ce_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dew_zpg - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - P &= ~(F_N|F_Z); - TMP--; - if(!TMP) - P |= F_Z; - else if(TMP & 0x8000) - P |= F_N; - TMP2--; - write(B|TMP2, TMP); - TMP2++; - write(B|TMP2, TMP >> 8); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_P &= ~(F_N|F_Z); + m_TMP--; + if(!m_TMP) + m_P |= F_Z; + else if(m_TMP & 0x8000) + m_P |= F_N; + m_TMP2--; + write(m_B|m_TMP2, m_TMP); + m_TMP2++; + write(m_B|m_TMP2, m_TMP >> 8); prefetch(); dex_ce_imp - X--; - set_nz(X); + m_X--; + set_nz(m_X); prefetch(); dey_ce_imp - Y--; - set_nz(Y); + m_Y--; + set_nz(m_Y); prefetch(); dez_imp - Z--; - set_nz(Z); + m_Z--; + set_nz(m_Z); prefetch(); eor_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += Y; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Y); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Y); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Z); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Z); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_ce_zpx - TMP = read_pc(); - PC++; - TMP2 = read(B|uint8_t(TMP+X)); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); inc_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_ce_acc - A++; - set_nz(A); + m_A++; + set_nz(m_A); prefetch(); inc_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_ce_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inw_zpg - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - P &= ~(F_N|F_Z); - TMP++; - if(!TMP) - P |= F_Z; - else if(TMP & 0x8000) - P |= F_N; - TMP2--; - write(B|TMP2, TMP); - TMP2++; - write(B|TMP2, TMP >> 8); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_P &= ~(F_N|F_Z); + m_TMP++; + if(!m_TMP) + m_P |= F_Z; + else if(m_TMP & 0x8000) + m_P |= F_N; + m_TMP2--; + write(m_B|m_TMP2, m_TMP); + m_TMP2++; + write(m_B|m_TMP2, m_TMP >> 8); prefetch(); inx_ce_imp - X++; - set_nz(X); + m_X++; + set_nz(m_X); prefetch(); iny_ce_imp - Y++; - set_nz(Y); + m_Y++; + set_nz(m_Y); prefetch(); inz_imp - Z++; - set_nz(Z); + m_Z++; + set_nz(m_Z); prefetch(); jmp_ce_iax - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); jmp_ce_ind - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); jsr_ce_adr - TMP = read_pc(); - PC++; - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + write(m_SP, m_PC>>8); dec_SP_ce(); - write(SP, PC); + write(m_SP, m_PC); dec_SP_ce(); - TMP = set_h(TMP, read_pc()); - PC++; - PC = TMP; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = m_TMP; prefetch(); jsr_iax - TMP = read_pc(); - PC++; - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + write(m_SP, m_PC>>8); dec_SP_ce(); - write(SP, PC); + write(m_SP, m_PC); dec_SP_ce(); - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); - PC += X; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); + m_PC += m_X; prefetch(); jsr_ind - TMP = read_pc(); - PC++; - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + write(m_SP, m_PC>>8); dec_SP_ce(); - write(SP, PC); + write(m_SP, m_PC); dec_SP_ce(); - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); lda_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - A = read(TMP + X); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_A = read(m_TMP + m_X); + set_nz(m_A); prefetch(); lda_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - A = read(TMP + Y); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_A = read(m_TMP + m_Y); + set_nz(m_A); prefetch(); lda_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - A = read(TMP); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_A = read(m_TMP); + set_nz(m_A); prefetch(); lda_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - A = read(TMP+Y); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_A = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); lda_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - A = read(TMP+Z); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_A = read(m_TMP+m_Z); + set_nz(m_A); prefetch(); lda_isy read_pc(); - TMP = read_pc(); - PC++; - if(P & F_E) - TMP = set_l(SP, SP+TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_E) + m_TMP = set_l(m_SP, m_SP+m_TMP); else - TMP = SP + TMP; - TMP2 = read(TMP); - TMP++; - TMP = TMP2 | (read(TMP) << 8); - A = read(TMP+Y); - set_nz(A); + m_TMP = m_SP + m_TMP; + m_TMP2 = read(m_TMP); + m_TMP++; + m_TMP = m_TMP2 | (read(m_TMP) << 8); + m_A = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); lda_ce_zpg - TMP = read_pc(); - PC++; - A = read(B|TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A = read(m_B|m_TMP); + set_nz(m_A); prefetch(); lda_ce_zpx - TMP = read_pc(); - PC++; - A = read(B|uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A = read(m_B|uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); ldx_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - X = read(TMP + Y); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_X = read(m_TMP + m_Y); + set_nz(m_X); prefetch(); ldx_ce_zpg - TMP = read_pc(); - PC++; - X = read(B|TMP); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_X = read(m_B|m_TMP); + set_nz(m_X); prefetch(); ldx_ce_zpy - TMP = read_pc(); - PC++; - X = read(B|uint8_t(TMP+Y)); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_X = read(m_B|uint8_t(m_TMP+m_Y)); + set_nz(m_X); prefetch(); ldy_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - Y = read(TMP); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_Y = read(m_TMP); + set_nz(m_Y); prefetch(); ldy_ce_zpg - TMP = read_pc(); - PC++; - Y = read(B|TMP); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_Y = read(m_B|m_TMP); + set_nz(m_Y); prefetch(); ldy_ce_zpx - TMP = read_pc(); - PC++; - Y = read(B|uint8_t(TMP+X)); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_Y = read(m_B|uint8_t(m_TMP+m_X)); + set_nz(m_Y); prefetch(); ldz_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - Z = read(TMP); - set_nz(Z); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_Z = read(m_TMP); + set_nz(m_Z); prefetch(); ldz_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - Z = read(TMP + X); - set_nz(Z); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_Z = read(m_TMP + m_X); + set_nz(m_Z); prefetch(); ldz_imm - Z = read_pc(); - PC++; - set_nz(Z); + m_Z = read_pc(); + m_PC++; + set_nz(m_Z); prefetch(); lsr_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_ce_acc - A = do_lsr(A); + m_A = do_lsr(m_A); prefetch(); lsr_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_ce_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); neg_acc read_pc(); - A = -A; - set_nz(A); + m_A = -m_A; + set_nz(m_A); prefetch(); ora_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += Y; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Y); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Y); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Z); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Z); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_ce_zpx - TMP = read_pc(); - PC++; - TMP2 = read(B|uint8_t(TMP+X)); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); # push/pop instructions and rti/rtn/rts are not fully streamlined pha_ce_imp read_pc(); - write(SP, A); + write(m_SP, m_A); dec_SP_ce(); prefetch(); php_ce_imp read_pc(); - write(SP, P); + write(m_SP, m_P); dec_SP_ce(); prefetch(); phw_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP3 = read(TMP); - TMP3 = set_h(TMP3, read(TMP+1)); - write(SP, TMP3); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP3 = read(m_TMP); + m_TMP3 = set_h(m_TMP3, read(m_TMP+1)); + write(m_SP, m_TMP3); dec_SP_ce(); - write(SP, TMP3 >> 8); + write(m_SP, m_TMP3 >> 8); dec_SP_ce(); prefetch(); phw_iw2 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(SP, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_SP, m_TMP); dec_SP_ce(); - write(SP, TMP >> 8); + write(m_SP, m_TMP >> 8); dec_SP_ce(); prefetch(); phx_ce_imp read_pc(); - write(SP, X); + write(m_SP, m_X); dec_SP_ce(); prefetch(); phy_ce_imp read_pc(); - write(SP, Y); + write(m_SP, m_Y); dec_SP_ce(); prefetch(); phz_imp read_pc(); - write(SP, Z); + write(m_SP, m_Z); dec_SP_ce(); prefetch(); pla_ce_imp read_pc(); inc_SP_ce(); - A = read(SP); - set_nz(A); + m_A = read(m_SP); + set_nz(m_A); prefetch(); plp_ce_imp read_pc(); inc_SP_ce(); - TMP = read(SP) | F_B; + m_TMP = read(m_SP) | F_B; prefetch(); - P = TMP; // Do *not* move it before the prefetch + m_P = m_TMP; // Do *not* move it before the prefetch plx_ce_imp read_pc(); inc_SP_ce(); - X = read(SP); - set_nz(X); + m_X = read(m_SP); + set_nz(m_X); prefetch(); ply_ce_imp read_pc(); inc_SP_ce(); - Y = read(SP); - set_nz(Y); + m_Y = read(m_SP); + set_nz(m_Y); prefetch(); plz_imp read_pc(); inc_SP_ce(); - Z = read(SP); - set_nz(Z); + m_Z = read(m_SP); + set_nz(m_Z); prefetch(); rmb_ce_bzp - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 &= ~(1 << ((inst_state >> 4) & 7)); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 &= ~(1 << ((m_inst_state >> 4) & 7)); + write(m_TMP, m_TMP2); prefetch(); rol_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_ce_acc - A = do_rol(A); + m_A = do_rol(m_A); prefetch(); rol_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_ce_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_ce_acc - A = do_ror(A); + m_A = do_ror(m_A); prefetch(); ror_ce_zpg - TMP = B|read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = m_B|read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_ce_zpx - TMP = read_pc(); - PC++; - TMP = B|uint8_t(TMP+X); - TMP2 = read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = m_B|uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); row_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP3 = read(TMP); - TMP3 = set_h(TMP3, read(TMP+1)); - TMP2 = P; - P &= ~(F_C|F_N|F_Z); - if(TMP3 & 0x8000) - P |= F_C; - TMP3 <<= 1; - if(TMP2 & F_C) - TMP3 |= 0x0001; - if(!TMP3) - P |= F_Z; - else if(TMP3 & 0x8000) - P |= F_N; - write(TMP, TMP3); - write(TMP, TMP3 >> 8); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP3 = read(m_TMP); + m_TMP3 = set_h(m_TMP3, read(m_TMP+1)); + m_TMP2 = m_P; + m_P &= ~(F_C|F_N|F_Z); + if(m_TMP3 & 0x8000) + m_P |= F_C; + m_TMP3 <<= 1; + if(m_TMP2 & F_C) + m_TMP3 |= 0x0001; + if(!m_TMP3) + m_P |= F_Z; + else if(m_TMP3 & 0x8000) + m_P |= F_N; + write(m_TMP, m_TMP3); + write(m_TMP, m_TMP3 >> 8); prefetch(); rti_ce_imp read_pc(); inc_SP_ce(); - P = read(SP) | F_B; + m_P = read(m_SP) | F_B; inc_SP_ce(); - PC = read(SP); + m_PC = read(m_SP); inc_SP_ce(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); prefetch(); rtn_imm - TMP = read_pc(); - PC++; - if(P & F_E) - SP = set_l(SP, SP+TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_E) + m_SP = set_l(m_SP, m_SP+m_TMP); else - SP += TMP; + m_SP += m_TMP; read_pc(); - read(SP); + read(m_SP); inc_SP(); - PC = read(SP); + m_PC = read(m_SP); inc_SP(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); read_pc(); - PC++; + m_PC++; prefetch(); rts_ce_imp inc_SP_ce(); - PC = read(SP); + m_PC = read(m_SP); inc_SP_ce(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); read_pc(); - PC++; + m_PC++; prefetch(); sbc_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += Y; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Y); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Y); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - TMP2 = read(TMP+Z); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + m_TMP2 = read(m_TMP+m_Z); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_imm - TMP = read_pc(); - PC++; - do_sbc(TMP); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + do_sbc(m_TMP); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(B|TMP); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_B|m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sbc_ce_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(B|uint8_t(TMP+X)); - do_sbc(TMP2); - if(P & F_D) - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); + do_sbc(m_TMP2); + if(m_P & F_D) + set_nz(m_A); prefetch(); sec_ce_imp - P |= F_C; + m_P |= F_C; prefetch(); sed_ce_imp - P |= F_D; + m_P |= F_D; prefetch(); see_imp read_pc(); - P |= F_E; + m_P |= F_E; prefetch(); sei_ce_imp prefetch(); - P |= F_I; // Do *not* move it before the prefetch + m_P |= F_I; // Do *not* move it before the prefetch smb_ce_bzp - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP2 |= 1 << ((inst_state >> 4) & 7); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP2 |= 1 << ((m_inst_state >> 4) & 7); + write(m_TMP, m_TMP2); prefetch(); sta_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+X, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_X, m_A); prefetch(); sta_ce_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+Y, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_Y, m_A); prefetch(); sta_ce_idx - TMP2 = read_pc(); - PC++; - TMP2 += X; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - write(TMP, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + write(m_TMP, m_A); prefetch(); sta_ce_idy - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - write(TMP+Y, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + write(m_TMP+m_Y, m_A); prefetch(); sta_idz - TMP2 = read_pc(); - PC++; - TMP = read(B|TMP2); - TMP2++; - TMP = set_h(TMP, read(B|TMP2)); - write(TMP+Z, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_B|m_TMP2); + m_TMP2++; + m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); + write(m_TMP+m_Z, m_A); prefetch(); sta_isy read_pc(); - TMP = read_pc(); - PC++; - if(P & F_E) - TMP = set_l(SP, SP+TMP); + m_TMP = read_pc(); + m_PC++; + if(m_P & F_E) + m_TMP = set_l(m_SP, m_SP+m_TMP); else - TMP = SP + TMP; - TMP2 = read(TMP); - TMP++; - TMP = TMP2 | (read(TMP) << 8); - write(TMP+Y, A); + m_TMP = m_SP + m_TMP; + m_TMP2 = read(m_TMP); + m_TMP++; + m_TMP = m_TMP2 | (read(m_TMP) << 8); + write(m_TMP+m_Y, m_A); prefetch(); sta_ce_zpg - TMP = read_pc(); - PC++; - write(B|TMP, A); + m_TMP = read_pc(); + m_PC++; + write(m_B|m_TMP, m_A); prefetch(); sta_ce_zpx - TMP = read_pc(); - PC++; - write(B|uint8_t(TMP+X), A); + m_TMP = read_pc(); + m_PC++; + write(m_B|uint8_t(m_TMP+m_X), m_A); prefetch(); stx_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+Y, X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_Y, m_X); prefetch(); stx_ce_zpg - TMP = read_pc(); - PC++; - write(B|TMP, X); + m_TMP = read_pc(); + m_PC++; + write(m_B|m_TMP, m_X); prefetch(); stx_ce_zpy - TMP = read_pc(); - PC++; - write(B|uint8_t(TMP+Y), X); + m_TMP = read_pc(); + m_PC++; + write(m_B|uint8_t(m_TMP+m_Y), m_X); prefetch(); sty_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+X, Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_X, m_Y); prefetch(); sty_ce_zpg - TMP = read_pc(); - PC++; - write(B|TMP, Y); + m_TMP = read_pc(); + m_PC++; + write(m_B|m_TMP, m_Y); prefetch(); sty_ce_zpx - TMP = read_pc(); - PC++; - write(B|uint8_t(TMP+X), Y); + m_TMP = read_pc(); + m_PC++; + write(m_B|uint8_t(m_TMP+m_X), m_Y); prefetch(); stz_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP, Z); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP, m_Z); prefetch(); stz_ce_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+X, Z); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_X, m_Z); prefetch(); stz_ce_zpg - TMP = read_pc(); - PC++; - write(B|TMP, Z); + m_TMP = read_pc(); + m_PC++; + write(m_B|m_TMP, m_Z); prefetch(); stz_ce_zpx - TMP = read_pc(); - PC++; - write(B|uint8_t(TMP+X), Z); + m_TMP = read_pc(); + m_PC++; + write(m_B|uint8_t(m_TMP+m_X), m_Z); prefetch(); tab_imp - B = A << 8; + m_B = m_A << 8; prefetch(); tax_ce_imp - X = A; - set_nz(X); + m_X = m_A; + set_nz(m_X); prefetch(); tay_ce_imp - Y = A; - set_nz(Y); + m_Y = m_A; + set_nz(m_Y); prefetch(); taz_imp - Z = A; - set_nz(Z); + m_Z = m_A; + set_nz(m_Z); prefetch(); tba_imp - A = B >> 8; - set_nz(A); + m_A = m_B >> 8; + set_nz(m_A); prefetch(); trb_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 &= ~A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 &= ~m_A; + write(m_TMP, m_TMP2); prefetch(); trb_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 &= ~A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 &= ~m_A; + write(m_TMP, m_TMP2); prefetch(); tsb_ce_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 |= A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 |= m_A; + write(m_TMP, m_TMP2); prefetch(); tsb_ce_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 |= A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 |= m_A; + write(m_TMP, m_TMP2); prefetch(); tsx_ce_imp - X = SP; - set_nz(X); + m_X = m_SP; + set_nz(m_X); prefetch(); tsy_imp - Y = SP >> 8; - set_nz(Y); + m_Y = m_SP >> 8; + set_nz(m_Y); prefetch(); txa_ce_imp - A = X; - set_nz(A); + m_A = m_X; + set_nz(m_A); prefetch(); txs_ce_imp - SP = set_l(SP, X); + m_SP = set_l(m_SP, m_X); prefetch_noirq(); tys_imp - SP = set_h(SP, Y); + m_SP = set_h(m_SP, m_Y); prefetch(); tya_ce_imp - A = Y; - set_nz(A); + m_A = m_Y; + set_nz(m_A); prefetch(); tza_imp - A = Z; - set_nz(A); + m_A = m_Z; + set_nz(m_A); prefetch(); diff --git a/src/devices/cpu/m6502/om740.lst b/src/devices/cpu/m6502/om740.lst index e37506ae164..4d706731718 100644 --- a/src/devices/cpu/m6502/om740.lst +++ b/src/devices/cpu/m6502/om740.lst @@ -3,1885 +3,1885 @@ # m740 opcodes set_imp read_pc(); - P |= F_T; - inst_state_base = 0x100; + m_P |= F_T; + m_inst_state_base = 0x100; prefetch(); clt_imp read_pc(); - P &= ~F_T; - inst_state_base = 0; + m_P &= ~F_T; + m_inst_state_base = 0; prefetch(); ldm_imz - TMP = read_pc(); - PC++; - TMP2 = read_pc(); - PC++; - write(TMP2, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_pc(); + m_PC++; + write(m_TMP2, m_TMP); prefetch(); dec_acc read_pc(); - A--; - set_nz(A); + m_A--; + set_nz(m_A); prefetch(); inc_acc read_pc(); - A++; - set_nz(A); + m_A++; + set_nz(m_A); prefetch(); jsr_spg - TMP = read_pc(); - read_dummy(SP); - write(SP, PC>>8); + m_TMP = read_pc(); + read_dummy(m_SP); + write(m_SP, m_PC>>8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - TMP = set_h(TMP, 0xff); - PC = TMP; + m_TMP = set_h(m_TMP, 0xff); + m_PC = m_TMP; prefetch(); clb_bac read_pc(); - A = do_clb(A, (IR>>5) & 7); + m_A = do_clb(m_A, (m_IR>>5) & 7); prefetch(); seb_bac read_pc(); - A = do_seb(A, (IR>>5) & 7); + m_A = do_seb(m_A, (m_IR>>5) & 7); prefetch(); clb_biz - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_clb(TMP2, (IR>>5) & 7); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_clb(m_TMP2, (m_IR>>5) & 7); + write(m_TMP, m_TMP2); prefetch(); seb_biz - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_seb(TMP2, (IR>>5) & 7); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_seb(m_TMP2, (m_IR>>5) & 7); + write(m_TMP, m_TMP2); prefetch(); bbc_bzr - TMP = read_pc(); - PC++; - TMP2 = read(TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); read_pc(); - if(!(TMP2 & (1 << ((IR>>5) & 7)))) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(!(m_TMP2 & (1 << ((m_IR>>5) & 7)))) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bbs_bzr - TMP = read_pc(); - PC++; - TMP2 = read(TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); read_pc(); - if(TMP2 & (1 << ((IR>>5) & 7))) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(m_TMP2 & (1 << ((m_IR>>5) & 7))) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bbc_bar read_pc(); read_pc(); - if(!(A & (1 << ((IR>>5) & 7)))) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(!(m_A & (1 << ((m_IR>>5) & 7)))) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bbs_bar read_pc(); read_pc(); - if(A & (1 << ((IR>>5) & 7))) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(m_A & (1 << ((m_IR>>5) & 7))) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); com_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 ^= 0xff; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 ^= 0xff; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rrf_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - read_dummy(TMP); - read_dummy(TMP); - read_dummy(TMP); - TMP2 = do_rrf(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + read_dummy(m_TMP); + read_dummy(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_rrf(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); tst_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - set_nz(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + set_nz(m_TMP2); prefetch(); bra_rel - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); prefetch(); jmp_zpi - TMP2 = read_pc(); - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - PC = TMP; + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_PC = m_TMP; prefetch(); jsr_zpi - TMP2 = read_pc(); - read_dummy(SP); - write(SP, PC>>8); + m_TMP2 = read_pc(); + read_dummy(m_SP); + write(m_SP, m_PC>>8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - PC = TMP; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_PC = m_TMP; prefetch(); stp_imp read_pc(); - logerror("STP at $%04x\n", PC); - while(!irq_state) { + logerror("STP at $%04x\n", m_PC); + while(!m_irq_state) { eat-all-cycles; } prefetch(); wit_imp read_pc(); - logerror("WIT at $%04x\n", PC); - while(!irq_state) { + logerror("WIT at $%04x\n", m_PC); + while(!m_irq_state) { eat-all-cycles; } prefetch(); reset_m - P |= F_I; - read_dummy(SP); + m_P |= F_I; + read_dummy(m_SP); dec_SP(); - read_dummy(SP); + read_dummy(m_SP); dec_SP(); - read_dummy(SP); + read_dummy(m_SP); dec_SP(); - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); prefetch(); - inst_state = -1; + m_inst_state = -1; brk_m_imp - if(irq_taken) { + if(m_irq_taken) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - write(SP, irq_taken ? P & ~F_B : P); + write(m_SP, m_irq_taken ? m_P & ~F_B : m_P); dec_SP(); // BRK uses the vector of the interrupt with the highest priority if any are enabled and pending - if(irq_taken) - standard_irq_callback(IRQ_LINE, PC); - PC = read_arg(m_irq_vector); - PC = set_h(PC, read_arg(m_irq_vector+1)); - irq_taken = false; - P |= F_I; // Do *not* move after the prefetch + if(m_irq_taken) + standard_irq_callback(IRQ_LINE, m_PC); + m_PC = read_arg(m_irq_vector); + m_PC = set_h(m_PC, read_arg(m_irq_vector+1)); + m_irq_taken = false; + m_P |= F_I; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; # 6502 opcodes with modified access patterns adc_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); adc_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - do_adc(TMP2); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + do_adc(m_TMP2); prefetch(); adc_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + do_adc(m_TMP2); prefetch(); adc_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - do_adc(TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_adc(m_TMP2); prefetch(); and_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); asl_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_m_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); bcc_m_rel - if(!(P & F_C)) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(!(m_P & F_C)) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bcs_m_rel - if(P & F_C) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(m_P & F_C) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); beq_m_rel - if(P & F_Z) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(m_P & F_Z) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bmi_m_rel - if(P & F_N) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(m_P & F_N) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bne_m_rel - if(!(P & F_Z)) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(!(m_P & F_Z)) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bpl_m_rel - if(!(P & F_N)) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(!(m_P & F_N)) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bvc_m_rel - if(!(P & F_V)) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(!(m_P & F_V)) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); bvs_m_rel - if(P & F_V) { - TMP = read_pc(); - read_dummy(set_l(PC, PC+1)); - PC++; - read_dummy(set_l(PC, PC+int8_t(TMP))); - PC += int8_t(TMP); + if(m_P & F_V) { + m_TMP = read_pc(); + read_dummy(set_l(m_PC, m_PC+1)); + m_PC++; + read_dummy(set_l(m_PC, m_PC+int8_t(m_TMP))); + m_PC += int8_t(m_TMP); } else { read_pc(); - PC++; + m_PC++; } prefetch(); cmp_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + do_cmp(m_A, m_TMP2); prefetch(); cmp_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - do_cmp(A, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_cmp(m_A, m_TMP2); prefetch(); dec_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_m_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read_dummy(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); eor_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); inc_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_m_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read_dummy(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); jmp_m_ind - // JMP ($XXFF) has the same bug as on the NMOS 6502 - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = read_data(TMP); - PC = set_h(PC, read_data(set_l(TMP, TMP+1))); + // JMP ($m_Xm_XFF) has the same bug as on the NMOS 6502 + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read_data(m_TMP); + m_PC = set_h(m_PC, read_data(set_l(m_TMP, m_TMP+1))); prefetch(); jsr_m_adr - TMP = read_pc(); - PC++; - read_dummy(SP); - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + read_dummy(m_SP); + write(m_SP, m_PC>>8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - TMP = set_h(TMP, read_pc()); - PC++; - PC = TMP; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = m_TMP; prefetch(); lda_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - A = read(TMP + X); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_A = read(m_TMP + m_X); + set_nz(m_A); prefetch(); lda_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - A = read(TMP + Y); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_A = read(m_TMP + m_Y); + set_nz(m_A); prefetch(); lda_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - A = read_data(TMP); - set_nz(A); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_A = read_data(m_TMP); + set_nz(m_A); prefetch(); lda_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - A = read_data(TMP+Y); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_A = read_data(m_TMP+m_Y); + set_nz(m_A); prefetch(); lda_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - A = read(uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_A = read(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); ldx_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - X = read(TMP + Y); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_X = read(m_TMP + m_Y); + set_nz(m_X); prefetch(); ldx_m_zpy - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - X = read(uint8_t(TMP+Y)); - set_nz(X); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_X = read(uint8_t(m_TMP+m_Y)); + set_nz(m_X); prefetch(); ldy_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - Y = read(TMP); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_Y = read(m_TMP); + set_nz(m_Y); prefetch(); ldy_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - Y = read(uint8_t(TMP+X)); - set_nz(Y); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_Y = read(uint8_t(m_TMP+m_X)); + set_nz(m_Y); prefetch(); lsr_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_m_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ora_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); pla_m_imp read_pc(); - read_dummy(SP); + read_dummy(m_SP); inc_SP(); - A = read(SP); - set_nz(A); + m_A = read(m_SP); + set_nz(m_A); prefetch(); plp_m_imp read_pc(); - read_dummy(SP); + read_dummy(m_SP); inc_SP(); - TMP = read(SP) | (F_B); - inst_state_base = (TMP & F_T) ? 0x100 : 0; + m_TMP = read(m_SP) | (F_B); + m_inst_state_base = (m_TMP & F_T) ? 0x100 : 0; prefetch(); - P = TMP; // Do *not* move it before the prefetch + m_P = m_TMP; // Do *not* move it before the prefetch rol_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_m_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_m_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read_dummy(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read_dummy(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rti_m_imp read_pc(); - read_dummy(SP); + read_dummy(m_SP); inc_SP(); - P = read(SP) | (F_B); - inst_state_base = (P & F_T) ? 0x100 : 0; + m_P = read(m_SP) | (F_B); + m_inst_state_base = (m_P & F_T) ? 0x100 : 0; inc_SP(); - PC = read(SP); + m_PC = read(m_SP); inc_SP(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); prefetch(); rts_m_imp read_pc(); - read_dummy(SP); + read_dummy(m_SP); inc_SP(); - PC = read(SP); + m_PC = read(m_SP); inc_SP(); - PC = set_h(PC, read(SP)); - read_dummy(PC); - PC++; + m_PC = set_h(m_PC, read(m_SP)); + read_dummy(m_PC); + m_PC++; prefetch(); sbc_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - do_sbc(TMP2); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + do_sbc(m_TMP2); prefetch(); sbc_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + do_sbc(m_TMP2); prefetch(); sbc_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - do_sbc(TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_sbc(m_TMP2); prefetch(); sta_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(TMP); - write(TMP, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(m_TMP); + write(m_TMP, m_A); prefetch(); sta_m_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - read_dummy(TMP+X); - write(TMP+X, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + read_dummy(m_TMP+m_X); + write(m_TMP+m_X, m_A); prefetch(); sta_m_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - read_dummy(TMP+Y); - write(TMP+Y, A); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + read_dummy(m_TMP+m_Y); + write(m_TMP+m_Y, m_A); prefetch(); sta_m_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(TMP); - write_data(TMP, A); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(m_TMP); + write_data(m_TMP, m_A); prefetch(); sta_m_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - read_dummy(TMP+Y); - write_data(TMP+Y, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + read_dummy(m_TMP+m_Y); + write_data(m_TMP+m_Y, m_A); prefetch(); sta_m_zpg - TMP = read_pc(); - PC++; - read_dummy(TMP); - write(TMP, A); + m_TMP = read_pc(); + m_PC++; + read_dummy(m_TMP); + write(m_TMP, m_A); prefetch(); sta_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - read_dummy(uint8_t(TMP+X)); - write(uint8_t(TMP+X), A); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + read_dummy(uint8_t(m_TMP+m_X)); + write(uint8_t(m_TMP+m_X), m_A); prefetch(); stx_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(TMP); - write(TMP, X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(m_TMP); + write(m_TMP, m_X); prefetch(); stx_m_zpg - TMP = read_pc(); - PC++; - read_dummy(TMP); - write(TMP, X); + m_TMP = read_pc(); + m_PC++; + read_dummy(m_TMP); + write(m_TMP, m_X); prefetch(); stx_m_zpy - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - read_dummy(uint8_t(TMP+Y)); - write(uint8_t(TMP+Y), X); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + read_dummy(uint8_t(m_TMP+m_Y)); + write(uint8_t(m_TMP+m_Y), m_X); prefetch(); sty_m_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(TMP); - write(TMP, Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(m_TMP); + write(m_TMP, m_Y); prefetch(); sty_m_zpg - TMP = read_pc(); - PC++; - read_dummy(TMP); - write(TMP, Y); + m_TMP = read_pc(); + m_PC++; + read_dummy(m_TMP); + write(m_TMP, m_Y); prefetch(); sty_m_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - read_dummy(uint8_t(TMP+X)); - write(uint8_t(TMP+X), Y); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + read_dummy(uint8_t(m_TMP+m_X)); + write(uint8_t(m_TMP+m_X), m_Y); prefetch(); # T=1 opcodes adct_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_imm - TMP2 = read_pc(); - PC++; - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); adct_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - TMP = read(X); - read_dummy(X); - do_adct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_TMP = read(m_X); + read_dummy(m_X); + do_adct(m_TMP2); + write(m_X, m_TMP); prefetch(); andt_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); andt_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); andt_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); andt_imm - TMP = read_pc(); - PC++; - TMP2 = read(X); - read_dummy(X); - TMP2 &= TMP; - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_X); + read_dummy(m_X); + m_TMP2 &= m_TMP; + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); andt_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); andt_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); andt_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); andt_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - TMP = read(X); - read_dummy(X); - TMP &= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP &= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); cmpt_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); cmpt_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); cmpt_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); cmpt_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); cmpt_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); cmpt_imm - TMP = read_pc(); - PC++; - TMP2 = read(X); - do_cmp(TMP2, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_X); + do_cmp(m_TMP2, m_TMP); prefetch(); cmpt_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); cmpt_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - TMP = read(X); - do_cmp(TMP, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_TMP = read(m_X); + do_cmp(m_TMP, m_TMP2); prefetch(); eort_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); eort_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); eort_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); eort_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); eort_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); eort_imm - TMP = read_pc(); - PC++; - TMP2 = read(X); - read_dummy(X); - TMP2 ^= TMP; - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_X); + read_dummy(m_X); + m_TMP2 ^= m_TMP; + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); eort_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); eort_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - TMP = read(X); - read_dummy(X); - TMP ^= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP ^= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ldt_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_imm - TMP2 = read_pc(); - PC++; - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ldt_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - read_dummy(X); - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + read_dummy(m_X); + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ort_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ort_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ort_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ort_imm - TMP = read_pc(); - PC++; - TMP2 = read(X); - read_dummy(X); - TMP2 |= TMP; - set_nz(TMP2); - write(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_X); + read_dummy(m_X); + m_TMP2 |= m_TMP; + set_nz(m_TMP2); + write(m_X, m_TMP2); prefetch(); ort_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ort_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ort_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); ort_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - TMP = read(X); - read_dummy(X); - TMP |= TMP2; - set_nz(TMP); - write(X, TMP); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_TMP = read(m_X); + read_dummy(m_X); + m_TMP |= m_TMP2; + set_nz(m_TMP); + write(m_X, m_TMP); prefetch(); sbct_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read_dummy(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_idx - TMP2 = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read_data(TMP); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP2 = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read_data(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read_dummy(set_l(TMP, TMP+Y)); - TMP2 = read_data(TMP+Y); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read_dummy(set_l(m_TMP, m_TMP+m_Y)); + m_TMP2 = read_data(m_TMP+m_Y); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_imm - TMP2 = read_pc(); - PC++; - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); sbct_zpx - TMP = read_pc(); - read_dummy(PC & 0xff); - PC++; - TMP2 = read(uint8_t(TMP+X)); - TMP = read(X); - read_dummy(X); - do_sbct(TMP2); - write(X, TMP); + m_TMP = read_pc(); + read_dummy(m_PC & 0xff); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_TMP = read(m_X); + read_dummy(m_X); + do_sbct(m_TMP2); + write(m_X, m_TMP); prefetch(); diff --git a/src/devices/cpu/m6502/or65c19.lst b/src/devices/cpu/m6502/or65c19.lst index 36568280df8..f4763d6307d 100644 --- a/src/devices/cpu/m6502/or65c19.lst +++ b/src/devices/cpu/m6502/or65c19.lst @@ -1,183 +1,183 @@ # license:BSD-3-Clause -# copyright-holders:Olivier Galibert, AJR +# copyright-holders:Olivier Galibert, m_AJR adc_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP2 = read(TMP+X); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 = read(m_TMP+m_X); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); add_imm - TMP = read_pc(); - PC++; - do_add(TMP); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + do_add(m_TMP); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); add_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_add(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_add(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); add_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_add(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_add(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); and_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP2 = read(TMP+X); - A &= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_X); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); asr_acc read_pc(); - A = do_asr(A); + m_A = do_asr(m_A); prefetch(); bar_amr - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read_pc(); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read_pc(); read_pc(); - PC++; - TMP2 = ~TMP2 & TMP; - TMP = read_pc(); - PC++; - if(TMP2 != 0) { + m_PC++; + m_TMP2 = ~m_TMP2 & m_TMP; + m_TMP = read_pc(); + m_PC++; + if(m_TMP2 != 0) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bas_amr - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = read_pc(); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = read_pc(); read_pc(); - PC++; - TMP2 &= TMP; - TMP = read_pc(); - PC++; - if(TMP2 != 0) { + m_PC++; + m_TMP2 &= m_TMP; + m_TMP = read_pc(); + m_PC++; + if(m_TMP2 != 0) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); brk_r_imp - if(irq_taken || nmi_pending) { + if(m_irq_taken || m_nmi_pending) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - write(SP, irq_taken || nmi_pending ? P & ~F_B : P); + write(m_SP, m_irq_taken || m_nmi_pending ? m_P & ~F_B : m_P); dec_SP(); - if(irq_taken && nmi_pending) { - standard_irq_callback(NMI_LINE, PC); - PC = read_arg(0xfffc); - PC = set_h(PC, read_arg(0xfffd)); - nmi_pending = false; + if(m_irq_taken && m_nmi_pending) { + standard_irq_callback(NMI_LINE, m_PC); + m_PC = read_arg(0xfffc); + m_PC = set_h(m_PC, read_arg(0xfffd)); + m_nmi_pending = false; } else { - if(irq_taken) - standard_irq_callback(((~TMP & 0x000e) >> 1) - 1, PC); - TMP = get_irq_vector(); - PC = read_arg(TMP); - PC = set_h(PC, read_arg(TMP+1)); + if(m_irq_taken) + standard_irq_callback(((~m_TMP & 0x000e) >> 1) - 1, m_PC); + m_TMP = get_irq_vector(); + m_PC = read_arg(m_TMP); + m_PC = set_h(m_PC, read_arg(m_TMP+1)); } - irq_taken = false; - P = (P | F_I) & ~F_D; // Do *not* move after the prefetch + m_irq_taken = false; + m_P = (m_P | F_I) & ~F_D; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; clw_imp read_pc(); - P &= ~F_V; + m_P &= ~F_V; m_w = 0; prefetch(); cmp_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP2 = read(TMP+X); - do_cmp(A, TMP2); + m_TMP2 = read(m_TMP+m_X); + do_cmp(m_A, m_TMP2); prefetch(); eor_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP2 = read(TMP+X); - A ^= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_X); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); exc_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, A); - A = TMP2; + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_A); + m_A = m_TMP2; prefetch(); ini_imp @@ -187,83 +187,83 @@ ini_imp prefetch(); jpi_ind - m_i = PC; - TMP = read_arg(m_i); - TMP = set_h(TMP, read_arg(m_i+1)); + m_i = m_PC; + m_TMP = read_arg(m_i); + m_TMP = set_h(m_TMP, read_arg(m_i+1)); m_i += 2; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); jsb_vec read_pc(); - write(SP, PC>>8); + write(m_SP, m_PC>>8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - TMP = 0xffe0 | ((inst_state >> 3) & 0x0e); - PC = read_arg(TMP); - PC = set_h(PC, read_arg(TMP+1)); + m_TMP = 0xffe0 | ((m_inst_state >> 3) & 0x0e); + m_PC = read_arg(m_TMP); + m_PC = set_h(m_PC, read_arg(m_TMP+1)); prefetch(); jmp_r_ind - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); jsr_r_adr - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_SP, m_PC>>8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - PC = TMP; + m_PC = m_TMP; prefetch(); lab_acc read_pc(); read_pc(); - if(int8_t(A) < 0) - A = -A; - set_nz(A); + if(int8_t(m_A) < 0) + m_A = -m_A; + set_nz(m_A); prefetch(); lai_imp read_pc(); - A = read(m_i); + m_A = read(m_i); prefetch(); lan_imp read_pc(); - A = read(m_i); + m_A = read(m_i); m_i++; prefetch(); lda_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - A = read(TMP+X); - set_nz(A); + m_A = read(m_TMP+m_X); + set_nz(m_A); prefetch(); lii_imp read_pc(); - TMP = read(m_i); - TMP = set_h(TMP, read(m_i+1)); - read(TMP); - m_i = TMP; + m_TMP = read(m_i); + m_TMP = set_h(m_TMP, read(m_i+1)); + read(m_TMP); + m_i = m_TMP; prefetch(); mpa_imp @@ -272,8 +272,8 @@ mpa_imp read_pc(); read_pc(); read_pc(); - TMP = int8_t(A) * int8_t(Y); - m_w = do_accumulate(TMP, m_w); + m_TMP = int8_t(m_A) * int8_t(m_Y); + m_w = do_accumulate(m_TMP, m_w); prefetch(); mpy_imp @@ -282,207 +282,207 @@ mpy_imp read_pc(); read_pc(); read_pc(); - TMP = int8_t(A) * int8_t(Y); - A = do_accumulate(TMP, 0)>>8; + m_TMP = int8_t(m_A) * int8_t(m_Y); + m_A = do_accumulate(m_TMP, 0)>>8; prefetch(); neg_acc read_pc(); - A = -A; - set_nz(A); + m_A = -m_A; + set_nz(m_A); prefetch(); nxt_imp read_pc(); - PC = read(m_i); - PC = set_h(PC, read(m_i+1)); + m_PC = read(m_i); + m_PC = set_h(m_PC, read(m_i+1)); m_i += 2; prefetch(); ora_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP2 = read(TMP+X); - A |= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_X); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); phi_imp read_pc(); - write(SP, m_i>>8); + write(m_SP, m_i>>8); dec_SP(); - write(SP, m_i); + write(m_SP, m_i); dec_SP(); prefetch(); phw_imp read_pc(); - write(SP, m_w>>8); + write(m_SP, m_w>>8); dec_SP(); - write(SP, m_w); + write(m_SP, m_w); dec_SP(); prefetch(); pia_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - m_i = read(SP); + m_i = read(m_SP); inc_SP(); - m_i = set_h(m_i, read(SP)); - A = read(m_i); + m_i = set_h(m_i, read(m_SP)); + m_A = read(m_i); m_i++; prefetch(); pli_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - m_i = read(SP); + m_i = read(m_SP); inc_SP(); - m_i = set_h(m_i, read(SP)); + m_i = set_h(m_i, read(m_SP)); read(m_i); prefetch(); plw_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - m_w = read(SP); + m_w = read(m_SP); inc_SP(); - m_w = set_h(m_w, read(SP)); + m_w = set_h(m_w, read(m_SP)); prefetch(); psh_imp read_pc(); - write(SP, A); + write(m_SP, m_A); dec_SP(); - write(SP, X); + write(m_SP, m_X); dec_SP(); - write(SP, Y); + write(m_SP, m_Y); dec_SP(); prefetch(); pul_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - Y = read(SP); + m_Y = read(m_SP); inc_SP(); - X = read(SP); + m_X = read(m_SP); inc_SP(); - A = read(SP); + m_A = read(m_SP); prefetch(); rba_ima - A = read_pc(); // "Note that Accumulator contents are altered by RBA and SBA" (C29/C39 Technical Reference Manual, p. C-29) - PC++; - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 &= ~A; - write(TMP, TMP2); + m_A = read_pc(); // "Note that Accumulator contents are altered by RBA and SBA" (C29/C39 Technical Reference Manual, p. C-29) + m_PC++; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 &= ~m_A; + write(m_TMP, m_TMP2); prefetch(); rnd_imp read_pc(); - TMP = set_l(m_w, Y); - A = do_accumulate(TMP, (m_w<<1) & 0x100)>>8; + m_TMP = set_l(m_w, m_Y); + m_A = do_accumulate(m_TMP, (m_w<<1) & 0x100)>>8; prefetch(); rts_r_imp read_pc(); read_pc(); inc_SP(); - PC = read(SP); + m_PC = read(m_SP); inc_SP(); - PC = set_h(PC, read(SP)); + m_PC = set_h(m_PC, read(m_SP)); prefetch(); sba_ima - A = read_pc(); - PC++; - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 |= A; - write(TMP, TMP2); + m_A = read_pc(); + m_PC++; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 |= m_A; + write(m_TMP, m_TMP2); prefetch(); sbc_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP2 = read(TMP+X); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 = read(m_TMP+m_X); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sta_ipx - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+X)); - write(TMP+X, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_X)); + write(m_TMP+m_X, m_A); prefetch(); sti_imz - TMP = read_pc(); - PC++; - TMP2 = read_pc(); - PC++; - write(TMP2, TMP); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_pc(); + m_PC++; + write(m_TMP2, m_TMP); prefetch(); taw_imp read_pc(); - m_w = A<<8; + m_w = m_A<<8; set_nz(m_w>>8); prefetch(); tip_imp read_pc(); - PC = m_i; + m_PC = m_i; prefetch(); twa_imp read_pc(); - A = m_w>>8; - set_nz(A); + m_A = m_w>>8; + set_nz(m_A); prefetch(); # exceptions reset_r read_pc(); - PC++; + m_PC++; read_pc(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - P = (P | F_I) & ~F_D; - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + m_P = (m_P | F_I) & ~F_D; + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); prefetch(); - inst_state = -1; + m_inst_state = -1; diff --git a/src/devices/cpu/m6502/orp2a03.lst b/src/devices/cpu/m6502/orp2a03.lst index 44f453a1c4e..5cc236d4ca0 100644 --- a/src/devices/cpu/m6502/orp2a03.lst +++ b/src/devices/cpu/m6502/orp2a03.lst @@ -2,346 +2,346 @@ # copyright-holders:Olivier Galibert # rp2a03 opcodes - same as 6502 but with d disabled adc_nd_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc_nd(m_TMP2); prefetch(); adc_nd_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_adc_nd(TMP2); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_adc_nd(m_TMP2); prefetch(); adc_nd_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_adc_nd(TMP2); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_adc_nd(m_TMP2); prefetch(); adc_nd_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_adc_nd(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_adc_nd(m_TMP2); prefetch(); adc_nd_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_adc_nd(TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_adc_nd(m_TMP2); prefetch(); adc_nd_imm - TMP = read_pc(); - PC++; - do_adc_nd(TMP); + m_TMP = read_pc(); + m_PC++; + do_adc_nd(m_TMP); prefetch(); adc_nd_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc_nd(m_TMP2); prefetch(); adc_nd_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_adc_nd(m_TMP2); prefetch(); arr_nd_imm - TMP = read_pc(); - A &= TMP; - PC++; + m_TMP = read_pc(); + m_A &= m_TMP; + m_PC++; do_arr_nd(); prefetch(); rra_nd_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); rra_nd_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); rra_nd_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); rra_nd_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); rra_nd_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); rra_nd_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); rra_nd_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc_nd(m_TMP2); prefetch(); sbc_nd_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc_nd(m_TMP2); prefetch(); sbc_nd_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_sbc_nd(TMP2); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_sbc_nd(m_TMP2); prefetch(); sbc_nd_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_sbc_nd(TMP2); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_sbc_nd(m_TMP2); prefetch(); sbc_nd_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_sbc_nd(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_sbc_nd(m_TMP2); prefetch(); sbc_nd_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_sbc_nd(TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_sbc_nd(m_TMP2); prefetch(); sbc_nd_imm - TMP = read_pc(); - PC++; - do_sbc_nd(TMP); + m_TMP = read_pc(); + m_PC++; + do_sbc_nd(m_TMP); prefetch(); sbc_nd_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc_nd(m_TMP2); prefetch(); sbc_nd_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); isb_nd_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc_nd(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc_nd(m_TMP2); prefetch(); diff --git a/src/devices/cpu/m6502/ovt3xx_spu.lst b/src/devices/cpu/m6502/ovt3xx_spu.lst index eb9afa295c4..7eb37a0cc0d 100644 --- a/src/devices/cpu/m6502/ovt3xx_spu.lst +++ b/src/devices/cpu/m6502/ovt3xx_spu.lst @@ -4,74 +4,74 @@ phy_vt_imp read_pc(); - write(SP, Y); + write(m_SP, m_Y); dec_SP(); prefetch(); phx_vt_imp read_pc(); - write(SP, X); + write(m_SP, m_X); dec_SP(); prefetch(); plx_vt_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - X = read(SP); - set_nz(X); + m_X = read(m_SP); + set_nz(m_X); prefetch(); ply_vt_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - Y = read(SP); - set_nz(Y); + m_Y = read(m_SP); + set_nz(m_Y); prefetch(); vtgetdbk_imp read_pc(); - A = m_databank; + m_A = m_databank; prefetch(); vtsetdbk_imp read_pc(); - m_databank = A; + m_databank = m_A; prefetch(); vtldabank_abx - TMP = read_pc(); - PC++; - TMP2 = read_pc(); - PC++; - A = m_extdata_space->read_byte(((m_databank << 16) | (TMP2 << 8) | TMP) + X); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_pc(); + m_PC++; + m_A = m_extdata_space->read_byte(((m_databank << 16) | (m_TMP2 << 8) | m_TMP) + m_X); + set_nz(m_A); prefetch(); vtldabank_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - A = m_extdata_space->read_byte((m_databank << 16) | (TMP+Y) ); - set_nz(A); + m_A = m_extdata_space->read_byte((m_databank << 16) | (m_TMP+m_Y) ); + set_nz(m_A); prefetch(); vtadcx_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - TMP = TMP2 + X + (P & F_C ? 1 : 0); // do ADC, but with source + result in X - P &= ~(F_N|F_V|F_Z|F_C); - if(!uint8_t(TMP)) P |= F_Z; - else if(int8_t(TMP) < 0) P |= F_N; - if(~(TMP2^X) & (TMP2^TMP) & 0x80) P |= F_V; - if(TMP & 0xff00) P |= F_C; - X = TMP & 0xff; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + m_TMP = m_TMP2 + m_X + (m_P & F_C ? 1 : 0); // do m_ADC, but with source + result in m_X + m_P &= ~(F_N|F_V|F_Z|F_C); + if(!uint8_t(m_TMP)) m_P |= F_Z; + else if(int8_t(m_TMP) < 0) m_P |= F_N; + if(~(m_TMP2^m_X) & (m_TMP2^m_TMP) & 0x80) m_P |= F_V; + if(m_TMP & 0xff00) m_P |= F_C; + m_X = m_TMP & 0xff; prefetch(); diff --git a/src/devices/cpu/m6502/ow65c02.lst b/src/devices/cpu/m6502/ow65c02.lst index d4debf9f1fc..37a05fef464 100644 --- a/src/devices/cpu/m6502/ow65c02.lst +++ b/src/devices/cpu/m6502/ow65c02.lst @@ -3,483 +3,483 @@ # w65c02 opcodes adc_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 = read(m_TMP+m_Y); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_imm - TMP = read_pc(); - PC++; - do_adc(TMP); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + do_adc(m_TMP); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); adc_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_adc(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); and_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); asl_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read(TMP); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); bbr_zpb - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP = read_pc(); - PC++; - if(!(TMP2 & (1 << ((inst_state >> 4) & 7)))) { + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP = read_pc(); + m_PC++; + if(!(m_TMP2 & (1 << ((m_inst_state >> 4) & 7)))) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bbs_zpb - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP = read_pc(); - PC++; - if(TMP2 & (1 << ((inst_state >> 4) & 7))) { + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP = read_pc(); + m_PC++; + if(m_TMP2 & (1 << ((m_inst_state >> 4) & 7))) { read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); } prefetch(); bit_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_bit(TMP2); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); prefetch(); bit_imm - TMP = read_pc(); - PC++; - if(A & TMP) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + if(m_A & m_TMP) + m_P &= ~F_Z; else - P |= F_Z; + m_P |= F_Z; prefetch(); bit_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_bit(TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_bit(m_TMP2); prefetch(); bra_rel - TMP = read_pc(); - PC++; + m_TMP = read_pc(); + m_PC++; read_pc(); - if(page_changing(PC, int8_t(TMP))) { - read_arg(set_l(PC, PC+int8_t(TMP))); + if(page_changing(m_PC, int8_t(m_TMP))) { + read_arg(set_l(m_PC, m_PC+int8_t(m_TMP))); } - PC += int8_t(TMP); + m_PC += int8_t(m_TMP); prefetch(); brk_c_imp - if(irq_taken || nmi_pending) { + if(m_irq_taken || m_nmi_pending) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - write(SP, irq_taken || nmi_pending ? P & ~F_B : P); + write(m_SP, m_irq_taken || m_nmi_pending ? m_P & ~F_B : m_P); dec_SP(); - if(irq_taken && nmi_pending) { - standard_irq_callback(NMI_LINE, PC); - PC = read_arg(0xfffa); - PC = set_h(PC, read_arg(0xfffb)); - nmi_pending = false; + if(m_irq_taken && m_nmi_pending) { + standard_irq_callback(NMI_LINE, m_PC); + m_PC = read_arg(0xfffa); + m_PC = set_h(m_PC, read_arg(0xfffb)); + m_nmi_pending = false; } else { - if(irq_taken) - standard_irq_callback(IRQ_LINE, PC); - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + if(m_irq_taken) + standard_irq_callback(IRQ_LINE, m_PC); + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); } - irq_taken = false; - P = (P | F_I) & ~F_D; // Do *not* move after the prefetch + m_irq_taken = false; + m_P = (m_P | F_I) & ~F_D; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; cmp_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); dec_acc read_pc(); - A--; - set_nz(A); + m_A--; + set_nz(m_A); prefetch(); dec_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read(TMP); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); eor_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); inc_acc read_pc(); - A++; - set_nz(A); + m_A++; + set_nz(m_A); prefetch(); inc_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read(TMP); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); jmp_iax - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); jmp_c_ind - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - read(set_l(TMP, TMP+1)); - PC = set_h(PC, read(TMP+1)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + read(set_l(m_TMP, m_TMP+1)); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); lda_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - A = read(TMP); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_A = read(m_TMP); + set_nz(m_A); prefetch(); lsr_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read(TMP); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); nop_c_imp @@ -487,9 +487,9 @@ nop_c_imp nop_c_aba read_pc(); - PC++; + m_PC++; read_pc(); - PC++; + m_PC++; read_pc(); read_pc(); read_pc(); @@ -498,287 +498,287 @@ nop_c_aba prefetch(); nop_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); prefetch(); ora_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); phx_imp read_pc(); - write(SP, X); + write(m_SP, m_X); dec_SP(); prefetch(); phy_imp read_pc(); - write(SP, Y); + write(m_SP, m_Y); dec_SP(); prefetch(); plx_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - X = read(SP); - set_nz(X); + m_X = read(m_SP); + set_nz(m_X); prefetch(); ply_imp read_pc(); - read(SP); + read(m_SP); inc_SP(); - Y = read(SP); - set_nz(Y); + m_Y = read(m_SP); + set_nz(m_Y); prefetch(); rmb_bzp - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 &= ~(1 << ((inst_state >> 4) & 7)); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 &= ~(1 << ((m_inst_state >> 4) & 7)); + write(m_TMP, m_TMP2); prefetch(); rol_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read(TMP); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read(TMP); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); sbc_c_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, X)) { - read(set_l(TMP, TMP+X)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_X)) { + read(set_l(m_TMP, m_TMP+m_X)); } - TMP += X; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP += Y; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_idx - TMP2 = read_pc(); - PC++; - read(TMP2); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 = read_pc(); + m_PC++; + read(m_TMP2); + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_idy - TMP2 = read_pc(); - PC++; - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); } - TMP2 = read(TMP+Y); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 = read(m_TMP+m_Y); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_imm - TMP = read_pc(); - PC++; - do_sbc(TMP); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + do_sbc(m_TMP); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); sbc_c_zpx - TMP = read_pc(); - PC++; - read(TMP); - TMP2 = read(uint8_t(TMP+X)); - do_sbc(TMP2); - if(P & F_D) { + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } prefetch(); smb_bzp - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - TMP2 |= 1 << ((inst_state >> 4) & 7); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 |= 1 << ((m_inst_state >> 4) & 7); + write(m_TMP, m_TMP2); prefetch(); sta_zpi - TMP2 = read_pc(); - PC++; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - write(TMP, A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + write(m_TMP, m_A); prefetch(); stp_imp @@ -787,95 +787,95 @@ stp_imp } stz_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP, 0x00); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP, 0x00); prefetch(); stz_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - write(TMP+X, 0x00); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + write(m_TMP+m_X, 0x00); prefetch(); stz_zpg - TMP = read_pc(); - PC++; - write(TMP, 0x00); + m_TMP = read_pc(); + m_PC++; + write(m_TMP, 0x00); prefetch(); stz_zpx - TMP = read_pc(); - PC++; - read(TMP); - write(uint8_t(TMP+X), 0x00); + m_TMP = read_pc(); + m_PC++; + read(m_TMP); + write(uint8_t(m_TMP+m_X), 0x00); prefetch(); trb_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 &= ~A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 &= ~m_A; + write(m_TMP, m_TMP2); prefetch(); trb_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 &= ~A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 &= ~m_A; + write(m_TMP, m_TMP2); prefetch(); tsb_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 |= A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 |= m_A; + write(m_TMP, m_TMP2); prefetch(); tsb_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read(TMP); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read(m_TMP); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 |= A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 |= m_A; + write(m_TMP, m_TMP2); prefetch(); wai_imp read_pc(); read_pc(); - while(!nmi_pending && !irq_state) { + while(!m_nmi_pending && !m_irq_state) { eat-all-cycles; } prefetch(); @@ -884,14 +884,14 @@ wai_imp reset_c read_arg(0xffff); read_pc(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - P = (P | F_I) & ~F_D; - PC = read_arg(0xfffc); - PC = set_h(PC, read_arg(0xfffd)); + m_P = (m_P | F_I) & ~F_D; + m_PC = read_arg(0xfffc); + m_PC = set_h(m_PC, read_arg(0xfffd)); prefetch(); - inst_state = -1; + m_inst_state = -1; diff --git a/src/devices/cpu/m6502/ow65c02s.lst b/src/devices/cpu/m6502/ow65c02s.lst index 5e6f5a346cb..9ca97b3f8a5 100644 --- a/src/devices/cpu/m6502/ow65c02s.lst +++ b/src/devices/cpu/m6502/ow65c02s.lst @@ -3,966 +3,966 @@ # w65c02s opcodes adc_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); adc_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP += Y; - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); adc_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); adc_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP2 = read(TMP+Y); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 = read(m_TMP+m_Y); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); adc_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - TMP2 = read(uint8_t(TMP+X)); - do_adc(TMP2); - if(P & F_D) { + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_adc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); and_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); and_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP += Y; - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); - PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); and_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); and_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP2 = read(TMP+Y); - A &= TMP2; - set_nz(A); - PC++; + m_TMP2 = read(m_TMP+m_Y); + m_A &= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); and_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP2 = read(uint8_t(TMP+X)); - A &= TMP2; - set_nz(A); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); asl_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - read(TMP+1); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP+1); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_PC++; prefetch(); asl_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); asl_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); bit_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - do_bit(TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); + m_PC++; prefetch(); bit_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP2 = read(uint8_t(TMP+X)); - do_bit(TMP2); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_bit(m_TMP2); prefetch(); brk_s_imp - if(irq_taken || nmi_pending) { + if(m_irq_taken || m_nmi_pending) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write(SP, PC >> 8); + write(m_SP, m_PC >> 8); dec_SP(); - write(SP, PC); + write(m_SP, m_PC); dec_SP(); - write(SP, irq_taken || nmi_pending ? P & ~F_B : P); + write(m_SP, m_irq_taken || m_nmi_pending ? m_P & ~F_B : m_P); dec_SP(); - if(irq_taken && nmi_pending) { - standard_irq_callback(NMI_LINE, PC); - PC = read_vector(0xfffa); - PC = set_h(PC, read_vector(0xfffb)); - nmi_pending = false; + if(m_irq_taken && m_nmi_pending) { + standard_irq_callback(NMI_LINE, m_PC); + m_PC = read_vector(0xfffa); + m_PC = set_h(m_PC, read_vector(0xfffb)); + m_nmi_pending = false; } else { - if(irq_taken) - standard_irq_callback(IRQ_LINE, PC); - PC = read_vector(0xfffe); - PC = set_h(PC, read_vector(0xffff)); + if(m_irq_taken) + standard_irq_callback(IRQ_LINE, m_PC); + m_PC = read_vector(0xfffe); + m_PC = set_h(m_PC, read_vector(0xffff)); } - irq_taken = false; - P = (P | F_I) & ~F_D; // Do *not* move after the prefetch + m_irq_taken = false; + m_P = (m_P | F_I) & ~F_D; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; cmp_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - do_cmp(A, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); + m_PC++; prefetch(); cmp_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP += Y; - TMP2 = read(TMP); - do_cmp(A, TMP2); - PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); + m_PC++; prefetch(); cmp_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cmp_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP2 = read(TMP+Y); - do_cmp(A, TMP2); - PC++; + m_TMP2 = read(m_TMP+m_Y); + do_cmp(m_A, m_TMP2); + m_PC++; prefetch(); cmp_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = read(uint8_t(TMP+X)); - do_cmp(A, TMP); + m_PC++; + m_TMP = read(uint8_t(m_TMP+m_X)); + do_cmp(m_A, m_TMP); prefetch(); dec_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - read(TMP+1); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP+1); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); + m_PC++; prefetch(); dec_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); dec_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2--; - set_nz(TMP2); - write(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2--; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); eor_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); eor_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP += Y; - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); - PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); eor_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); eor_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP2 = read(TMP+Y); - A ^= TMP2; - set_nz(A); - PC++; + m_TMP2 = read(m_TMP+m_Y); + m_A ^= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); eor_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP2 = read(uint8_t(TMP+X)); - A ^= TMP2; - set_nz(A); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); inc_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - read(TMP+1); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP+1); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); + m_PC++; prefetch(); inc_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); inc_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2++; - set_nz(TMP2); - write(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2++; + set_nz(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); jmp_s_iax - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); read_pc(); - TMP += X; - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_TMP += m_X; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); jmp_s_ind - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); read_pc(); - PC = read(TMP); - PC = set_h(PC, read(TMP+1)); + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(m_TMP+1)); prefetch(); lda_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - A = read(TMP + X); - set_nz(A); - PC++; + m_A = read(m_TMP + m_X); + set_nz(m_A); + m_PC++; prefetch(); lda_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - A = read(TMP + Y); - set_nz(A); - PC++; + m_A = read(m_TMP + m_Y); + set_nz(m_A); + m_PC++; prefetch(); lda_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - A = read(TMP); - set_nz(A); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_A = read(m_TMP); + set_nz(m_A); prefetch(); lda_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - A = read(TMP+Y); - set_nz(A); - PC++; + m_A = read(m_TMP+m_Y); + set_nz(m_A); + m_PC++; prefetch(); lda_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - A = read(uint8_t(TMP+X)); - set_nz(A); + m_PC++; + m_A = read(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); ldx_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - X = read(TMP + Y); - set_nz(X); - PC++; + m_X = read(m_TMP + m_Y); + set_nz(m_X); + m_PC++; prefetch(); ldx_s_zpy - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - X = read(uint8_t(TMP+Y)); - set_nz(X); + m_PC++; + m_X = read(uint8_t(m_TMP+m_Y)); + set_nz(m_X); prefetch(); ldy_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - Y = read(TMP); - set_nz(Y); - PC++; + m_TMP += m_X; + m_Y = read(m_TMP); + set_nz(m_Y); + m_PC++; prefetch(); ldy_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - Y = read(uint8_t(TMP+X)); - set_nz(Y); + m_PC++; + m_Y = read(uint8_t(m_TMP+m_X)); + set_nz(m_Y); prefetch(); lsr_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_PC++; prefetch(); lsr_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); lsr_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); nop_s_abx read_pc(); - PC++; + m_PC++; read_pc(); read_pc(); - PC++; + m_PC++; prefetch(); nop_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - read(uint8_t(TMP+X)); + m_PC++; + read(uint8_t(m_TMP+m_X)); prefetch(); ora_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); ora_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP += Y; - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); - PC++; + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); ora_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP2 = read(TMP+Y); - A |= TMP2; - set_nz(A); - PC++; + m_TMP2 = read(m_TMP+m_Y); + m_A |= m_TMP2; + set_nz(m_A); + m_PC++; prefetch(); ora_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP2 = read(uint8_t(TMP+X)); - A |= TMP2; - set_nz(A); + m_PC++; + m_TMP2 = read(uint8_t(m_TMP+m_X)); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); pla_s_imp read_pc(); read_pc(); inc_SP(); - A = read(SP); - set_nz(A); + m_A = read(m_SP); + set_nz(m_A); prefetch(); plp_s_imp read_pc(); read_pc(); inc_SP(); - TMP = read(SP) | (F_B|F_E); + m_TMP = read(m_SP) | (F_B|F_E); prefetch(); - P = TMP; // Do *not* move it before the prefetch + m_P = m_TMP; // Do *not* move it before the prefetch plx_s_imp read_pc(); read_pc(); inc_SP(); - X = read(SP); - set_nz(X); + m_X = read(m_SP); + set_nz(m_X); prefetch(); ply_s_imp read_pc(); read_pc(); inc_SP(); - Y = read(SP); - set_nz(Y); + m_Y = read(m_SP); + set_nz(m_Y); prefetch(); rol_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - read(TMP+1); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP+1); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_PC++; prefetch(); rol_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rol_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - read(TMP+1); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP+1); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + m_PC++; prefetch(); ror_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); ror_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read(TMP); - read((TMP+1) & 0xff); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); rti_s_imp read_pc(); inc_SP(); - P = read(SP) | (F_B|F_E); + m_P = read(m_SP) | (F_B|F_E); inc_SP(); - TMP = read(SP); + m_TMP = read(m_SP); inc_SP(); - TMP = set_h(TMP, read(SP)); + m_TMP = set_h(m_TMP, read(m_SP)); read_pc(); end_interrupt(); - PC = TMP; + m_PC = m_TMP; prefetch(); rts_s_imp read_pc(); read_pc(); inc_SP(); - TMP = read(SP); + m_TMP = read(m_SP); inc_SP(); - TMP = set_h(TMP, read(SP)); + m_TMP = set_h(m_TMP, read(m_SP)); read_pc(); - PC = TMP + 1; + m_PC = m_TMP + 1; prefetch(); sbc_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, X)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_X)) { read_pc(); } - TMP += X; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); sbc_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - if(page_changing(TMP, Y)) { + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP += Y; - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); sbc_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); sbc_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { read_pc(); } - TMP2 = read(TMP+Y); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 = read(m_TMP+m_Y); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); sbc_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - TMP2 = read(uint8_t(TMP+X)); - do_sbc(TMP2); - if(P & F_D) { + m_TMP2 = read(uint8_t(m_TMP+m_X)); + do_sbc(m_TMP2); + if(m_P & F_D) { read_pc(); - set_nz(A); + set_nz(m_A); } - PC++; + m_PC++; prefetch(); sta_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); read_pc(); - PC++; - write(TMP+X, A); + m_PC++; + write(m_TMP+m_X, m_A); prefetch(); sta_s_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); read_pc(); - PC++; - write(TMP+Y, A); + m_PC++; + write(m_TMP+m_Y, m_A); prefetch(); sta_s_idx - TMP2 = read_pc(); + m_TMP2 = read_pc(); read_pc(); - PC++; - TMP2 += X; - TMP = read(TMP2 & 0xff); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); - write(TMP, A); + m_PC++; + m_TMP2 += m_X; + m_TMP = read(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); + write(m_TMP, m_A); prefetch(); sta_s_idy - TMP2 = read_pc(); - TMP = read(TMP2); - TMP = set_h(TMP, read((TMP2+1) & 0xff)); + m_TMP2 = read_pc(); + m_TMP = read(m_TMP2); + m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); read_pc(); - PC++; - write(TMP+Y, A); + m_PC++; + write(m_TMP+m_Y, m_A); prefetch(); sta_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - write(uint8_t(TMP+X), A); + m_PC++; + write(uint8_t(m_TMP+m_X), m_A); prefetch(); stx_s_zpy - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - write(uint8_t(TMP+Y), X); + m_PC++; + write(uint8_t(m_TMP+m_Y), m_X); prefetch(); sty_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - write(uint8_t(TMP+X), Y); + m_PC++; + write(uint8_t(m_TMP+m_X), m_Y); prefetch(); stz_s_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); read_pc(); - PC++; - write(TMP+X, 0x00); + m_PC++; + write(m_TMP+m_X, 0x00); prefetch(); stz_s_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - write(uint8_t(TMP+X), 0x00); + m_PC++; + write(uint8_t(m_TMP+m_X), 0x00); prefetch(); trb_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 &= ~A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 &= ~m_A; + write(m_TMP, m_TMP2); prefetch(); tsb_s_zpg - TMP = read_pc(); - PC++; - TMP2 = read(TMP); - read((TMP+1) & 0xff); - if(A & TMP2) - P &= ~F_Z; + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read(m_TMP); + read((m_TMP+1) & 0xff); + if(m_A & m_TMP2) + m_P &= ~F_Z; else - P |= F_Z; - TMP2 |= A; - write(TMP, TMP2); + m_P |= F_Z; + m_TMP2 |= m_A; + write(m_TMP, m_TMP2); prefetch(); # exceptions reset_s read_arg(0xffff); read_pc(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - read(SP); + read(m_SP); dec_SP(); - P = (P | F_I) & ~F_D; - PC = read_vector(0xfffc); - PC = set_h(PC, read_vector(0xfffd)); + m_P = (m_P | F_I) & ~F_D; + m_PC = read_vector(0xfffc); + m_PC = set_h(m_PC, read_vector(0xfffd)); prefetch(); - inst_state = -1; + m_inst_state = -1; diff --git a/src/devices/cpu/m6502/oxavix.lst b/src/devices/cpu/m6502/oxavix.lst index 84caf0a2277..66bebe760d4 100644 --- a/src/devices/cpu/m6502/oxavix.lst +++ b/src/devices/cpu/m6502/oxavix.lst @@ -3,128 +3,128 @@ # xavix opcodes callf_xa3 - read_stack(SP); - write_special_stack(SP, get_codebank()); + read_stack(m_SP); + write_special_stack(m_SP, get_codebank()); dec_special_stack(); - TMP2 = read_pc(); - PC++; - TMP = read_pc(); - PC++; - //read_stack(SP); - write_stack(SP, PC>>8); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_pc(); + m_PC++; + //read_stack(m_SP); + write_stack(m_SP, m_PC>>8); dec_SP(); - write_stack(SP, PC); + write_stack(m_SP, m_PC); dec_SP(); - TMP = set_h(TMP, read_pc()); - PC++; - PC = TMP; - set_codebank(TMP2); + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = m_TMP; + set_codebank(m_TMP2); prefetch(); jmp_xa3 - TMP2 = read_pc(); - PC++; - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = TMP; - set_codebank(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = m_TMP; + set_codebank(m_TMP2); prefetch(); retf_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - PC = read_stack(SP); + m_PC = read_stack(m_SP); inc_SP(); - PC = set_h(PC, read_stack(SP)); + m_PC = set_h(m_PC, read_stack(m_SP)); inc_special_stack(); - TMP2 = read_special_stack(SP); - set_codebank(TMP2); + m_TMP2 = read_special_stack(m_SP); + set_codebank(m_TMP2); read_pc(); - PC++; + m_PC++; prefetch(); brk_xav_imp // there is code in some games to indicate this doesn't always push the far bank to the stack.. // The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_pending) - if(irq_taken) { + if(m_irq_taken) { read_pc(); } else { read_pc(); - PC++; + m_PC++; } - write_special_stack(SP, get_codebank()); + write_special_stack(m_SP, get_codebank()); set_codebank(0x00); // epo_efdx, rad_ping and rad_mtrk strongly suggest that interrupts must force bank 0 as code jumps to a ROM pointer stored earlier / a fixed pointer to a rom address in bank 0 dec_special_stack(); - write_stack(SP, PC >> 8); + write_stack(m_SP, m_PC >> 8); dec_SP(); - write_stack(SP, PC); + write_stack(m_SP, m_PC); dec_SP(); - write_stack(SP, irq_taken ? P & ~F_B : P); + write_stack(m_SP, m_irq_taken ? m_P & ~F_B : m_P); dec_SP(); - if(nmi_pending) { - standard_irq_callback(NMI_LINE, PC); + if(m_nmi_pending) { + standard_irq_callback(NMI_LINE, m_PC); if (m_vector_callback.isnull()) { - PC = read_arg(0xfffa); - PC = set_h(PC, read_arg(0xfffb)); + m_PC = read_arg(0xfffa); + m_PC = set_h(m_PC, read_arg(0xfffb)); } else { if (m_vector_callback(0,1) != -1) { - PC = m_vector_callback(0,1); - PC = set_h(PC, m_vector_callback(0,0)); + m_PC = m_vector_callback(0,1); + m_PC = set_h(m_PC, m_vector_callback(0,0)); } else { - PC = read_arg(0xfffa); - PC = set_h(PC, read_arg(0xfffb)); + m_PC = read_arg(0xfffa); + m_PC = set_h(m_PC, read_arg(0xfffb)); } } - nmi_pending = false; + m_nmi_pending = false; } else { - if(irq_taken) - standard_irq_callback(IRQ_LINE, PC); + if(m_irq_taken) + standard_irq_callback(IRQ_LINE, m_PC); if (m_vector_callback.isnull()) { - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); } else { if (m_vector_callback(1,1) != -1) { - PC = m_vector_callback(1,1); - PC = set_h(PC, m_vector_callback(1,0)); + m_PC = m_vector_callback(1,1); + m_PC = set_h(m_PC, m_vector_callback(1,0)); } else { - PC = read_arg(0xfffe); - PC = set_h(PC, read_arg(0xffff)); + m_PC = read_arg(0xfffe); + m_PC = set_h(m_PC, read_arg(0xffff)); } } } - irq_taken = false; - P |= F_I; // Do *not* move after the prefetch + m_irq_taken = false; + m_P |= F_I; // Do *not* move after the prefetch prefetch(); - inst_state = -1; + m_inst_state = -1; rti_xav_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - P = read_stack(SP) | (F_B|F_E); + m_P = read_stack(m_SP) | (F_B|F_E); inc_SP(); - PC = read_stack(SP); + m_PC = read_stack(m_SP); inc_SP(); - PC = set_h(PC, read_stack(SP)); + m_PC = set_h(m_PC, read_stack(m_SP)); inc_special_stack(); - TMP2 = read_special_stack(SP); - set_codebank(TMP2); + m_TMP2 = read_special_stack(m_SP); + set_codebank(m_TMP2); prefetch(); @@ -132,975 +132,975 @@ rti_xav_imp pha_xav_imp read_pc(); - write_stack(SP, A); + write_stack(m_SP, m_A); dec_SP(); prefetch(); php_xav_imp read_pc(); - write_stack(SP, P); + write_stack(m_SP, m_P); dec_SP(); prefetch(); jsr_xav_adr - TMP = read_pc(); - PC++; - read_stack(SP); - write_stack(SP, PC>>8); + m_TMP = read_pc(); + m_PC++; + read_stack(m_SP); + write_stack(m_SP, m_PC>>8); dec_SP(); - write_stack(SP, PC); + write_stack(m_SP, m_PC); dec_SP(); - TMP = set_h(TMP, read_pc()); - PC++; - PC = TMP; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = m_TMP; prefetch(); pla_xav_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - A = read_stack(SP); - set_nz(A); + m_A = read_stack(m_SP); + set_nz(m_A); prefetch(); plp_xav_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - TMP = read_stack(SP) | (F_B|F_E); + m_TMP = read_stack(m_SP) | (F_B|F_E); prefetch(); - P = TMP; // Do *not* move it before the prefetch + m_P = m_TMP; // Do *not* move it before the prefetch rts_xav_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - PC = read_stack(SP); + m_PC = read_stack(m_SP); inc_SP(); - PC = set_h(PC, read_stack(SP)); + m_PC = set_h(m_PC, read_stack(m_SP)); read_pc(); - PC++; + m_PC++; prefetch(); # opcodes below are modified to access zero page through different handlers lda_xav_idy - TMP2 = read_pc(); // we need to fetch the zero page part from zero page, but the rest as if zero page wasn't there, similar to the 6509 - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); // we need to fetch the zero page part from zero page, but the rest as if zero page wasn't there, similar to the 6509 + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - A = read(TMP+Y); - set_nz(A); + m_A = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); adc_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - TMP2 = read(TMP+Y); - do_adc(TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_adc(m_TMP2); prefetch(); cmp_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - TMP2 = read(TMP+Y); - do_cmp(A, TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_cmp(m_A, m_TMP2); prefetch(); sbc_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - TMP2 = read(TMP+Y); - do_sbc(TMP2); + m_TMP2 = read(m_TMP+m_Y); + do_sbc(m_TMP2); prefetch(); eor_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - TMP2 = read(TMP+Y); - A ^= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); and_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - TMP2 = read(TMP+Y); - A &= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); ora_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - TMP2 = read(TMP+Y); - A |= TMP2; - set_nz(A); + m_TMP2 = read(m_TMP+m_Y); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); ora_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); and_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); eor_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); adc_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_adc(m_TMP2); prefetch(); lda_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - A = read(TMP); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_A = read(m_TMP); + set_nz(m_A); prefetch(); cmp_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); sbc_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + do_sbc(m_TMP2); prefetch(); sta_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read_zeropage(set_l(TMP, TMP+Y)); // dummy read - write(TMP+Y, A); // TODO + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read_zeropage(set_l(m_TMP, m_TMP+m_Y)); // dummy read + write(m_TMP+m_Y, m_A); // TODO prefetch(); sta_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - write(TMP, A); // TODO + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + write(m_TMP, m_A); // TODO prefetch(); adc_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + do_adc(m_TMP2); prefetch(); and_xav_zpg - TMP = read_pc(); - PC++; - A &= read_zeropage(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A &= read_zeropage(m_TMP); + set_nz(m_A); prefetch(); asl_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_asl(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_asl(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); bit_xav_zpg - TMP = read_pc(); - PC++; - do_bit(read_zeropage(TMP)); + m_TMP = read_pc(); + m_PC++; + do_bit(read_zeropage(m_TMP)); prefetch(); cmp_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + do_cmp(m_A, m_TMP2); prefetch(); cpx_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - do_cmp(X, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + do_cmp(m_X, m_TMP2); prefetch(); cpy_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - do_cmp(Y, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + do_cmp(m_Y, m_TMP2); prefetch(); dec_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2--; - set_nz(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2--; + set_nz(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); eor_xav_zpg - TMP = read_pc(); - PC++; - A ^= read_zeropage(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A ^= read_zeropage(m_TMP); + set_nz(m_A); prefetch(); inc_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2++; - set_nz(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2++; + set_nz(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); lda_xav_zpg - TMP = read_pc(); - PC++; - A = read_zeropage(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A = read_zeropage(m_TMP); + set_nz(m_A); prefetch(); ldx_xav_zpg - TMP = read_pc(); - PC++; - X = read_zeropage(TMP); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + m_X = read_zeropage(m_TMP); + set_nz(m_X); prefetch(); ldy_xav_zpg - TMP = read_pc(); - PC++; - Y = read_zeropage(TMP); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + m_Y = read_zeropage(m_TMP); + set_nz(m_Y); prefetch(); lsr_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_lsr(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_lsr(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); ora_xav_zpg - TMP = read_pc(); - PC++; - A |= read_zeropage(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A |= read_zeropage(m_TMP); + set_nz(m_A); prefetch(); rol_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_rol(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_rol(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); ror_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_ror(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_ror(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); sbc_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + do_sbc(m_TMP2); prefetch(); sta_xav_zpg - TMP = read_pc(); - PC++; - write_zeropage(TMP, A); + m_TMP = read_pc(); + m_PC++; + write_zeropage(m_TMP, m_A); prefetch(); stx_xav_zpg - TMP = read_pc(); - PC++; - write_zeropage(TMP, X); + m_TMP = read_pc(); + m_PC++; + write_zeropage(m_TMP, m_X); prefetch(); sty_xav_zpg - TMP = read_pc(); - PC++; - write_zeropage(TMP, Y); + m_TMP = read_pc(); + m_PC++; + write_zeropage(m_TMP, m_Y); prefetch(); dcp_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2--; - write_zeropage(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2--; + write_zeropage(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); isb_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2++; - write_zeropage(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2++; + write_zeropage(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); lax_xav_zpg - TMP = read_pc(); - PC++; - A = X = read_zeropage(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_A = m_X = read_zeropage(m_TMP); + set_nz(m_A); prefetch(); rla_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_rol(TMP2); - write_zeropage(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_rol(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rra_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_ror(TMP2); - write_zeropage(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_ror(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); sax_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = A & X; - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = m_A & m_X; + write_zeropage(m_TMP, m_TMP2); prefetch(); slo_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_asl(TMP2); - write_zeropage(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_asl(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); sre_xav_zpg - TMP = read_pc(); - PC++; - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_lsr(TMP2); - write_zeropage(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_lsr(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); nop_xav_zpg - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read prefetch(); # more zero page changes ldx_xav_zpy - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - X = read_zeropage(uint8_t(TMP+Y)); - set_nz(X); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_X = read_zeropage(uint8_t(m_TMP+m_Y)); + set_nz(m_X); prefetch(); stx_xav_zpy - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - write_zeropage(uint8_t(TMP+Y), X); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + write_zeropage(uint8_t(m_TMP+m_Y), m_X); prefetch(); lax_xav_zpy - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+Y); - A = X = read_zeropage(TMP); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_Y); + m_A = m_X = read_zeropage(m_TMP); + set_nz(m_A); prefetch(); sax_xav_zpy - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+Y); - TMP2 = A & X; - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_Y); + m_TMP2 = m_A & m_X; + write_zeropage(m_TMP, m_TMP2); prefetch(); # more zero page changes adc_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP2 = read_zeropage(uint8_t(TMP+X)); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP2 = read_zeropage(uint8_t(m_TMP+m_X)); + do_adc(m_TMP2); prefetch(); and_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - A &= read_zeropage(uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_A &= read_zeropage(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); asl_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_asl(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_asl(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); cmp_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP2 = read_zeropage(uint8_t(TMP+X)); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP2 = read_zeropage(uint8_t(m_TMP+m_X)); + do_cmp(m_A, m_TMP2); prefetch(); dec_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2--; - set_nz(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2--; + set_nz(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); eor_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - A ^= read_zeropage(uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_A ^= read_zeropage(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); inc_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2++; - set_nz(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2++; + set_nz(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); lda_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - A = read_zeropage(uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_A = read_zeropage(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); ldy_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - Y = read_zeropage(uint8_t(TMP+X)); - set_nz(Y); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_Y = read_zeropage(uint8_t(m_TMP+m_X)); + set_nz(m_Y); prefetch(); lsr_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_lsr(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_lsr(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); ora_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - A |= read_zeropage(uint8_t(TMP+X)); - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_A |= read_zeropage(uint8_t(m_TMP+m_X)); + set_nz(m_A); prefetch(); rol_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_rol(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_rol(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); ror_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_ror(TMP2); - write_zeropage(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_ror(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); sbc_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP2 = read_zeropage(uint8_t(TMP+X)); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP2 = read_zeropage(uint8_t(m_TMP+m_X)); + do_sbc(m_TMP2); prefetch(); sta_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - write_zeropage(uint8_t(TMP+X), A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + write_zeropage(uint8_t(m_TMP+m_X), m_A); prefetch(); sty_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - write_zeropage(uint8_t(TMP+X), Y); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + write_zeropage(uint8_t(m_TMP+m_X), m_Y); prefetch(); dcp_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2--; - write_zeropage(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2--; + write_zeropage(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); isb_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2++; - write_zeropage(TMP, TMP2); - do_sbc(TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2++; + write_zeropage(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); rla_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_rol(TMP2); - write_zeropage(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_rol(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); rra_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_ror(TMP2); - write_zeropage(TMP, TMP2); - do_adc(TMP2); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_ror(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); slo_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_asl(TMP2); - write_zeropage(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_asl(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); sre_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); // dummy read - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - write_zeropage(TMP, TMP2); // dummy write - TMP2 = do_lsr(TMP2); - write_zeropage(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); // dummy read + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + write_zeropage(m_TMP, m_TMP2); // dummy write + m_TMP2 = do_lsr(m_TMP2); + write_zeropage(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); nop_xav_zpx - TMP = read_pc(); - PC++; - read_zeropage(TMP); - read_zeropage(uint8_t(TMP+X)); + m_TMP = read_pc(); + m_PC++; + read_zeropage(m_TMP); + read_zeropage(uint8_t(m_TMP+m_X)); prefetch(); #### slo_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); # idx with zero page changes rla_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); sre_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); rra_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); sax_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = A & X; - write(TMP, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = m_A & m_X; + write(m_TMP, m_TMP2); prefetch(); lax_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dumm read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - A = X = read(TMP); - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dumm read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_A = m_X = read(m_TMP); + set_nz(m_A); prefetch(); dcp_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); isb_xav_idx - TMP2 = read_pc(); - PC++; - read_zeropage(TMP2); // dummy read - TMP2 += X; - TMP = read_zeropage(TMP2 & 0xff); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + read_zeropage(m_TMP2); // dummy read + m_TMP2 += m_X; + m_TMP = read_zeropage(m_TMP2 & 0xff); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); # idy with zero page changes slo_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asl(TMP2); - write(TMP, TMP2); - A |= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asl(m_TMP2); + write(m_TMP, m_TMP2); + m_A |= m_TMP2; + set_nz(m_A); prefetch(); rla_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_rol(TMP2); - write(TMP, TMP2); - A &= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_rol(m_TMP2); + write(m_TMP, m_TMP2); + m_A &= m_TMP2; + set_nz(m_A); prefetch(); sre_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_lsr(TMP2); - write(TMP, TMP2); - A ^= TMP2; - set_nz(A); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_lsr(m_TMP2); + write(m_TMP, m_TMP2); + m_A ^= m_TMP2; + set_nz(m_A); prefetch(); rra_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_ror(TMP2); - write(TMP, TMP2); - do_adc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_ror(m_TMP2); + write(m_TMP, m_TMP2); + do_adc(m_TMP2); prefetch(); sha_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP2 = A & X & ((TMP >> 8)+1); - if(page_changing(TMP, Y)) - TMP = set_h(TMP+Y, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP2 = m_A & m_X & ((m_TMP >> 8)+1); + if(page_changing(m_TMP, m_Y)) + m_TMP = set_h(m_TMP+m_Y, m_TMP2); else - TMP += Y; - write(TMP, TMP2); + m_TMP += m_Y; + write(m_TMP, m_TMP2); prefetch(); lax_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - if(page_changing(TMP, Y)) { - read(set_l(TMP, TMP+Y)); // dummy read + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + if(page_changing(m_TMP, m_Y)) { + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read } - A = X = read(TMP+Y); - set_nz(A); + m_A = m_X = read(m_TMP+m_Y); + set_nz(m_A); prefetch(); dcp_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2--; - write(TMP, TMP2); - do_cmp(A, TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2--; + write(m_TMP, m_TMP2); + do_cmp(m_A, m_TMP2); prefetch(); isb_xav_idy - TMP2 = read_pc(); - PC++; - TMP = read_zeropage(TMP2); - TMP = set_h(TMP, read_zeropage((TMP2+1) & 0xff)); - read(set_l(TMP, TMP+Y)); // dummy read - TMP += Y; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2++; - write(TMP, TMP2); - do_sbc(TMP2); + m_TMP2 = read_pc(); + m_PC++; + m_TMP = read_zeropage(m_TMP2); + m_TMP = set_h(m_TMP, read_zeropage((m_TMP2+1) & 0xff)); + read(set_l(m_TMP, m_TMP+m_Y)); // dummy read + m_TMP += m_Y; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2++; + write(m_TMP, m_TMP2); + do_sbc(m_TMP2); prefetch(); diff --git a/src/devices/cpu/m6502/oxavix2000.lst b/src/devices/cpu/m6502/oxavix2000.lst index f2e2b7a32f9..fa3b48a048f 100644 --- a/src/devices/cpu/m6502/oxavix2000.lst +++ b/src/devices/cpu/m6502/oxavix2000.lst @@ -4,132 +4,132 @@ phy_imp read_pc(); - write_stack(SP, Y); + write_stack(m_SP, m_Y); dec_SP(); prefetch(); phx_imp read_pc(); - write_stack(SP, X); + write_stack(m_SP, m_X); dec_SP(); prefetch(); plx_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - X = read_stack(SP); - set_nz(X); + m_X = read_stack(m_SP); + set_nz(m_X); prefetch(); ply_imp read_pc(); - read_stack(SP); + read_stack(m_SP); inc_SP(); - Y = read_stack(SP); - set_nz(Y); + m_Y = read_stack(m_SP); + set_nz(m_Y); prefetch(); clr_acc read_pc(); - A = 0; - set_nz(A); + m_A = 0; + set_nz(m_A); prefetch(); dec_acc read_pc(); - A--; - set_nz(A); + m_A--; + set_nz(m_A); prefetch(); not_acc read_pc(); - A = A ^ 0xff; - set_nz(A); + m_A = m_A ^ 0xff; + set_nz(m_A); prefetch(); inc_acc read_pc(); - A++; - set_nz(A); + m_A++; + set_nz(m_A); prefetch(); neg_acc read_pc(); - A = (0x00 - A) & 0xff; - set_nz(A); + m_A = (0x00 - m_A) & 0xff; + set_nz(m_A); prefetch(); oraj_imp read_pc(); - A |= m_j; - set_nz(A); + m_A |= m_j; + set_nz(m_A); prefetch(); orak_imp read_pc(); - A |= m_k; - set_nz(A); + m_A |= m_k; + set_nz(m_A); prefetch(); oral_imp read_pc(); - A |= m_l; - set_nz(A); + m_A |= m_l; + set_nz(m_A); prefetch(); oram_imp read_pc(); - A |= m_m; - set_nz(A); + m_A |= m_m; + set_nz(m_A); prefetch(); andj_imp read_pc(); - A &= m_j; - set_nz(A); + m_A &= m_j; + set_nz(m_A); prefetch(); andk_imp read_pc(); - A &= m_k; - set_nz(A); + m_A &= m_k; + set_nz(m_A); prefetch(); andl_imp read_pc(); - A &= m_l; - set_nz(A); + m_A &= m_l; + set_nz(m_A); prefetch(); andm_imp read_pc(); - A &= m_m; - set_nz(A); + m_A &= m_m; + set_nz(m_A); prefetch(); eorj_imp read_pc(); - A ^= m_j; - set_nz(A); + m_A ^= m_j; + set_nz(m_A); prefetch(); eork_imp read_pc(); - A ^= m_k; - set_nz(A); + m_A ^= m_k; + set_nz(m_A); prefetch(); eorl_imp read_pc(); - A ^= m_l; - set_nz(A); + m_A ^= m_l; + set_nz(m_A); prefetch(); eorm_imp read_pc(); - A ^= m_m; - set_nz(A); + m_A ^= m_m; + set_nz(m_A); prefetch(); adcj_imp @@ -154,66 +154,66 @@ adcm_imp staj_imp read_pc(); - m_j = A; + m_j = m_A; prefetch(); stak_imp read_pc(); - m_k = A; + m_k = m_A; prefetch(); stal_imp read_pc(); - m_l = A; + m_l = m_A; prefetch(); stam_imp read_pc(); - m_m = A; + m_m = m_A; prefetch(); ldaj_imp read_pc(); - A = m_j; - set_nz(A); + m_A = m_j; + set_nz(m_A); prefetch(); ldak_imp read_pc(); - A = m_k; - set_nz(A); + m_A = m_k; + set_nz(m_A); prefetch(); ldal_imp read_pc(); - A = m_l; - set_nz(A); + m_A = m_l; + set_nz(m_A); prefetch(); ldam_imp read_pc(); - A = m_m; - set_nz(A); + m_A = m_m; + set_nz(m_A); prefetch(); cmpj_imp read_pc(); - do_cmp(A, m_j); + do_cmp(m_A, m_j); prefetch(); cmpk_imp read_pc(); - do_cmp(A, m_k); + do_cmp(m_A, m_k); prefetch(); cmpl_imp read_pc(); - do_cmp(A, m_l); + do_cmp(m_A, m_l); prefetch(); cmpm_imp read_pc(); - do_cmp(A, m_m); + do_cmp(m_A, m_m); prefetch(); sbcj_imp @@ -238,68 +238,68 @@ sbcm_imp spa0_imp read_pc(); - m_pa = (m_pa & 0xffff00) | A; + m_pa = (m_pa & 0xffff00) | m_A; prefetch(); lpa0_imp read_pc(); - A = (m_pa & 0x0000ff) >> 0; - set_nz(A); + m_A = (m_pa & 0x0000ff) >> 0; + set_nz(m_A); prefetch(); spa1_imp read_pc(); - m_pa = (m_pa & 0xff00ff) | (A << 8); + m_pa = (m_pa & 0xff00ff) | (m_A << 8); prefetch(); lpa1_imp read_pc(); - A = (m_pa & 0x00ff00) >> 8; - set_nz(A); + m_A = (m_pa & 0x00ff00) >> 8; + set_nz(m_A); prefetch(); spa2_imp read_pc(); - m_pa = (m_pa & 0x00ffff) | (A << 16); + m_pa = (m_pa & 0x00ffff) | (m_A << 16); prefetch(); lpa2_imp read_pc(); - A = (m_pa & 0xff0000) >> 16; - set_nz(A); + m_A = (m_pa & 0xff0000) >> 16; + set_nz(m_A); prefetch(); spb0_imp read_pc(); - m_pb = (m_pb & 0xffff00) | A; + m_pb = (m_pb & 0xffff00) | m_A; prefetch(); lpb0_imp read_pc(); - A = (m_pb & 0x0000ff) >> 0; - set_nz(A); + m_A = (m_pb & 0x0000ff) >> 0; + set_nz(m_A); prefetch(); spb1_imp read_pc(); - m_pb = (m_pb & 0xff00ff) | (A << 8); + m_pb = (m_pb & 0xff00ff) | (m_A << 8); prefetch(); lpb1_imp read_pc(); - A = (m_pb & 0x00ff00) >> 8; - set_nz(A); + m_A = (m_pb & 0x00ff00) >> 8; + set_nz(m_A); prefetch(); spb2_imp read_pc(); - m_pb = (m_pb & 0x00ffff) | (A << 16); + m_pb = (m_pb & 0x00ffff) | (m_A << 16); prefetch(); lpb2_imp read_pc(); - A = (m_pb & 0xff0000) >> 16; - set_nz(A); + m_A = (m_pb & 0xff0000) >> 16; + set_nz(m_A); prefetch(); incpa_imp @@ -328,23 +328,23 @@ decpb_imp orapa_imp read_pc(); - TMP = read_full_data(m_pa); - A |= TMP; - set_nz(A); + m_TMP = read_full_data(m_pa); + m_A |= m_TMP; + set_nz(m_A); prefetch(); andpa_imp read_pc(); - TMP = read_full_data(m_pa); - A &= TMP; - set_nz(A); + m_TMP = read_full_data(m_pa); + m_A &= m_TMP; + set_nz(m_A); prefetch(); eorpa_imp read_pc(); - TMP = read_full_data(m_pa); - A ^= TMP; - set_nz(A); + m_TMP = read_full_data(m_pa); + m_A ^= m_TMP; + set_nz(m_A); prefetch(); adcpa_imp @@ -352,17 +352,17 @@ adcpa_imp prefetch(); stapa_imp - write_full_data(m_pa, A); + write_full_data(m_pa, m_A); prefetch(); ldapa_imp - A = read_full_data(m_pa); - set_nz(A); + m_A = read_full_data(m_pa); + set_nz(m_A); prefetch(); cmppa_imp - TMP = read_full_data(m_pa); - do_cmp(A, TMP); + m_TMP = read_full_data(m_pa); + do_cmp(m_A, m_TMP); prefetch(); sbcpa_imp @@ -371,23 +371,23 @@ sbcpa_imp orapb_imp read_pc(); - TMP = read_full_data(m_pb); - A |= TMP; - set_nz(A); + m_TMP = read_full_data(m_pb); + m_A |= m_TMP; + set_nz(m_A); prefetch(); andpb_imp read_pc(); - TMP = read_full_data(m_pb); - A &= TMP; - set_nz(A); + m_TMP = read_full_data(m_pb); + m_A &= m_TMP; + set_nz(m_A); prefetch(); eorpb_imp read_pc(); - TMP = read_full_data(m_pb); - A ^= TMP; - set_nz(A); + m_TMP = read_full_data(m_pb); + m_A ^= m_TMP; + set_nz(m_A); prefetch(); adcpb_imp @@ -395,16 +395,16 @@ adcpb_imp prefetch(); stapb_imp - write_full_data(m_pb, A); + write_full_data(m_pb, m_A); prefetch(); ldapb_imp - A = read_full_data(m_pb); - set_nz(A); + m_A = read_full_data(m_pb); + set_nz(m_A); prefetch(); cmppb_imp - fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, m_PPC, m_inst_state); read_pc(); prefetch(); @@ -413,123 +413,123 @@ sbcpb_imp prefetch(); stx_aby - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+Y, X); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_Y, m_X); prefetch(); sty_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP+X, Y); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP+m_X, m_Y); prefetch(); stz_xav_zpg - TMP = read_pc(); - PC++; - write_zeropage(TMP, 0x00); + m_TMP = read_pc(); + m_PC++; + write_zeropage(m_TMP, 0x00); prefetch(); stz_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - write(TMP, 0x00); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + write(m_TMP, 0x00); prefetch(); bit_xav_zpx - fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state); + fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, m_PPC, m_inst_state); read_pc(); prefetch(); bit_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP += X; - TMP2 = read(TMP); - do_bit(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP += m_X; + m_TMP2 = read(m_TMP); + do_bit(m_TMP2); prefetch(); bit_imm - TMP = read_pc(); - PC++; - do_bit(TMP); + m_TMP = read_pc(); + m_PC++; + do_bit(m_TMP); prefetch(); asr_xav_zpg - TMP = read_pc(); // TODO: verify this, should it write back or set A? - PC++; - TMP2 = read_zeropage(TMP); - do_asr(TMP2); - write_zeropage(TMP,TMP2); + m_TMP = read_pc(); // TODO: verify this, should it write back or set m_A? + m_PC++; + m_TMP2 = read_zeropage(m_TMP); + do_asr(m_TMP2); + write_zeropage(m_TMP,m_TMP2); prefetch(); asr_aba - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - TMP2 = read(TMP); - write(TMP, TMP2); - TMP2 = do_asr(TMP2); // used by xavbox, see 14e8 - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_TMP2 = read(m_TMP); + write(m_TMP, m_TMP2); + m_TMP2 = do_asr(m_TMP2); // used by xavbox, see 14e8 + write(m_TMP, m_TMP2); prefetch(); asr_xav_zpx - TMP = read_pc(); + m_TMP = read_pc(); read_pc(); - PC++; - TMP = uint8_t(TMP+X); - TMP2 = read_zeropage(TMP); - read_zeropage((TMP+1) & 0xff); - TMP2 = do_asr(TMP2); - write_zeropage(TMP, TMP2); + m_PC++; + m_TMP = uint8_t(m_TMP+m_X); + m_TMP2 = read_zeropage(m_TMP); + read_zeropage((m_TMP+1) & 0xff); + m_TMP2 = do_asr(m_TMP2); + write_zeropage(m_TMP, m_TMP2); prefetch(); asr_acc - A = do_asr(A); + m_A = do_asr(m_A); prefetch(); asr_abx - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - read(set_l(TMP, TMP+X)); - TMP += X; - TMP2 = read(TMP); - read(TMP); - TMP2 = do_asr(TMP2); - write(TMP, TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + read(set_l(m_TMP, m_TMP+m_X)); + m_TMP += m_X; + m_TMP2 = read(m_TMP); + read(m_TMP); + m_TMP2 = do_asr(m_TMP2); + write(m_TMP, m_TMP2); prefetch(); cmc_imp read_pc(); - TMP = P & F_C; - P &= ~F_C; - TMP = ~TMP; - P |= TMP & F_C; + m_TMP = m_P & F_C; + m_P &= ~F_C; + m_TMP = ~m_TMP; + m_P |= m_TMP & F_C; prefetch(); sev_imp read_pc(); - P |= F_V; + m_P |= F_V; prefetch(); jmpf_ind - TMP = read_pc(); - PC++; - TMP = set_h(TMP, read_pc()); - PC++; - PC = read(TMP); - PC = set_h(PC, read(set_l(TMP, TMP+1))); - TMP2 = read(TMP+2); - set_codebank(TMP2); + m_TMP = read_pc(); + m_PC++; + m_TMP = set_h(m_TMP, read_pc()); + m_PC++; + m_PC = read(m_TMP); + m_PC = set_h(m_PC, read(set_l(m_TMP, m_TMP+1))); + m_TMP2 = read(m_TMP+2); + set_codebank(m_TMP2); prefetch(); diff --git a/src/devices/cpu/m6502/r65c19.cpp b/src/devices/cpu/m6502/r65c19.cpp index ffd6c3ee2db..ff379c79e3f 100644 --- a/src/devices/cpu/m6502/r65c19.cpp +++ b/src/devices/cpu/m6502/r65c19.cpp @@ -23,7 +23,7 @@ r65c19_device::r65c19_device(const machine_config &mconfig, device_type type, co , m_page1_ram(*this, "page1") , m_cir(0) { - program_config.m_internal_map = std::move(internal_map); + m_program_config.m_internal_map = std::move(internal_map); } r65c19_device::r65c19_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) @@ -50,7 +50,7 @@ std::unique_ptr r65c19_device::create_disassembler() void r65c19_device::do_add(u8 v) { - P &= ~F_C; + m_P &= ~F_C; do_adc(v); } @@ -60,24 +60,24 @@ u16 r65c19_device::do_accumulate(u16 v, u16 w) s32 result = s16(v) + s16(w); // Determine flags and saturate result upon overflow - P &= ~(F_N | F_V); + m_P &= ~(F_N | F_V); if (result > 32767) { - P |= F_V; + m_P |= F_V; result = 32767; } else if (result < 0) { - P |= F_N; + m_P |= F_N; if (result < -32768) { - P |= F_V; + m_P |= F_V; result = -32768; } } // MPA and MPY always destroy the old value of Y, as does RND when it overflows - Y = result & 0xff; + m_Y = result & 0xff; // 16-bit result to W, or high byte to A return result & 0xffff; @@ -91,7 +91,7 @@ u16 r65c19_device::get_irq_vector() void r65c19_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); c19_init(); } @@ -99,7 +99,7 @@ void r65c19_device::device_start() device_memory_interface::space_config_vector c39_device::memory_space_config() const { return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_DATA, &m_exp_config), std::make_pair(AS_IO, &m_es4_config) }; @@ -108,18 +108,18 @@ device_memory_interface::space_config_vector c39_device::memory_space_config() c void c39_device::device_start() { std::unique_ptr intf = std::make_unique(); - space(AS_DATA).cache(intf->escache); - space(AS_DATA).specific(intf->exp); - space(AS_IO).specific(intf->es4); + space(AS_DATA).cache(intf->m_escache); + space(AS_DATA).specific(intf->m_exp); + space(AS_IO).specific(intf->m_es4); - save_item(NAME(intf->bsr)); - save_item(NAME(intf->pbs)); - mintf = std::move(intf); + save_item(NAME(intf->m_bsr)); + save_item(NAME(intf->m_pbs)); + m_mintf = std::move(intf); c19_init(); for (int i = 0; i < 8; i++) - state_add(C39_BSR0 + i, string_format("BSR%d", i).c_str(), downcast(*mintf).bsr[i]); + state_add(C39_BSR0 + i, string_format("BSR%d", i).c_str(), downcast(*m_mintf).m_bsr[i]); } void r65c19_device::c19_init() @@ -151,16 +151,16 @@ void c39_device::device_reset() { r65c02_device::device_reset(); - mi_banked &intf = downcast(*mintf); - intf.bsr[0] = 0xe0; - intf.bsr[1] = 0xd1; - intf.bsr[2] = 0xb2; - intf.bsr[3] = 0xb3; - intf.bsr[4] = 0x74; - intf.bsr[5] = 0x75; - intf.bsr[6] = 0x76; - intf.bsr[7] = 0x77; - intf.pbs = 0xff; + mi_banked &intf = downcast(*m_mintf); + intf.m_bsr[0] = 0xe0; + intf.m_bsr[1] = 0xd1; + intf.m_bsr[2] = 0xb2; + intf.m_bsr[3] = 0xb3; + intf.m_bsr[4] = 0x74; + intf.m_bsr[5] = 0x75; + intf.m_bsr[6] = 0x76; + intf.m_bsr[7] = 0x77; + intf.m_pbs = 0xff; } u8 r65c19_device::page1_seg_r(offs_t offset) @@ -186,39 +186,39 @@ void r65c19_device::cir_w(u8 data) u8 c39_device::mi_banked::exp_read(u16 adr) { - return exp.read_byte(u32(bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); + return m_exp.read_byte(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); } u8 c39_device::mi_banked::exp_read_cached(u16 adr) { - return escache.read_byte(u32(bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); + return m_escache.read_byte(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); } void c39_device::mi_banked::exp_write(u16 adr, u8 val) { - exp.write_byte(u32(bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff), val); + m_exp.write_byte(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff), val); } u8 c39_device::mi_banked::es4_read(u16 adr) { - return es4.read_byte(adr & 0x1ff); + return m_es4.read_byte(adr & 0x1ff); } void c39_device::mi_banked::es4_write(u16 adr, u8 val) { - es4.write_byte(adr & 0x1ff, val); + m_es4.write_byte(adr & 0x1ff, val); } u8 c39_device::mi_banked::read(u16 adr) { - return program.read_byte(adr); + return m_program.read_byte(adr); } u8 c39_device::mi_banked::read_sync(u16 adr) { if (adr < 0x0600) - return cprogram.read_byte(adr); - else if (adr >= 0x0800 || BIT(pbs, 1)) + return m_cprogram.read_byte(adr); + else if (adr >= 0x0800 || BIT(m_pbs, 1)) return exp_read_cached(adr); else return es4_read(adr); @@ -227,8 +227,8 @@ u8 c39_device::mi_banked::read_sync(u16 adr) u8 c39_device::mi_banked::read_arg(u16 adr) { if (adr < 0x0600) - return cprogram.read_byte(adr); - else if (adr >= 0x0800 || BIT(pbs, 1)) + return m_cprogram.read_byte(adr); + else if (adr >= 0x0800 || BIT(m_pbs, 1)) return exp_read_cached(adr); else return es4_read(adr); @@ -236,33 +236,33 @@ u8 c39_device::mi_banked::read_arg(u16 adr) void c39_device::mi_banked::write(u16 adr, u8 val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); } u8 c39_device::pbs_r() { - return downcast(*mintf).pbs; + return downcast(*m_mintf).m_pbs; } void c39_device::pbs_w(u8 data) { - downcast(*mintf).pbs = data; + downcast(*m_mintf).m_pbs = data; } u8 c39_device::bsr_r(offs_t offset) { - return downcast(*mintf).bsr[offset]; + return downcast(*m_mintf).m_bsr[offset]; } void c39_device::bsr_w(offs_t offset, u8 data) { - downcast(*mintf).bsr[offset] = data; + downcast(*m_mintf).m_bsr[offset] = data; } u8 c39_device::expansion_r(offs_t offset) { - mi_banked &intf = downcast(*mintf); - if (offset >= 0x0200 || BIT(intf.pbs, 1)) + mi_banked &intf = downcast(*m_mintf); + if (offset >= 0x0200 || BIT(intf.m_pbs, 1)) return intf.exp_read(offset + 0x0600); else return intf.es4_read(offset + 0x0600); @@ -270,8 +270,8 @@ u8 c39_device::expansion_r(offs_t offset) void c39_device::expansion_w(offs_t offset, u8 data) { - mi_banked &intf = downcast(*mintf); - if (offset >= 0x0200 || BIT(intf.pbs, 1)) + mi_banked &intf = downcast(*m_mintf); + if (offset >= 0x0200 || BIT(intf.m_pbs, 1)) intf.exp_write(offset + 0x0600, data); else intf.es4_write(offset + 0x0600, data); diff --git a/src/devices/cpu/m6502/r65c19.h b/src/devices/cpu/m6502/r65c19.h index 7c53a74ecc4..1c63e58b3d9 100644 --- a/src/devices/cpu/m6502/r65c19.h +++ b/src/devices/cpu/m6502/r65c19.h @@ -138,12 +138,12 @@ private: u8 es4_read(u16 adr); void es4_write(u16 adr, u8 val); - memory_access<21, 0, 0, ENDIANNESS_LITTLE>::cache escache; - memory_access<21, 0, 0, ENDIANNESS_LITTLE>::specific exp; - memory_access< 9, 0, 0, ENDIANNESS_LITTLE>::specific es4; + memory_access<21, 0, 0, ENDIANNESS_LITTLE>::cache m_escache; + memory_access<21, 0, 0, ENDIANNESS_LITTLE>::specific m_exp; + memory_access< 9, 0, 0, ENDIANNESS_LITTLE>::specific m_es4; - u8 bsr[8]; - u8 pbs; + u8 m_bsr[8]; + u8 m_pbs; }; address_space_config m_exp_config; diff --git a/src/devices/cpu/m6502/rp2a03.cpp b/src/devices/cpu/m6502/rp2a03.cpp index 4132e780d5a..2e1267d8c11 100644 --- a/src/devices/cpu/m6502/rp2a03.cpp +++ b/src/devices/cpu/m6502/rp2a03.cpp @@ -48,7 +48,7 @@ rp2a03_device::rp2a03_device(const machine_config &mconfig, device_type type, co , device_mixer_interface(mconfig, *this) , m_apu(*this, "nesapu") { - program_config.m_internal_map = address_map_constructor(FUNC(rp2a03_device::rp2a03_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(rp2a03_device::rp2a03_map), this); } rp2a03_device::rp2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -76,7 +76,7 @@ void rp2a03_device::apu_irq(int state) uint8_t rp2a03_device::apu_read_mem(offs_t offset) { - return mintf->program.read_byte(offset); + return m_mintf->m_program.read_byte(offset); } void rp2a03_device::device_add_mconfig(machine_config &config) diff --git a/src/devices/cpu/m6502/st2204.cpp b/src/devices/cpu/m6502/st2204.cpp index cc18732226e..7f1ade8f627 100644 --- a/src/devices/cpu/m6502/st2204.cpp +++ b/src/devices/cpu/m6502/st2204.cpp @@ -72,14 +72,14 @@ void st2204_device::device_start() { std::unique_ptr intf = std::make_unique(); - space(AS_DATA).cache(intf->dcache); - space(AS_DATA).specific(intf->data); - intf->irr_enable = false; - intf->irr = 0; - intf->prr = 0; - intf->drr = 0; - intf->dmr = 0; - intf->irq_service = false; + space(AS_DATA).cache(intf->m_dcache); + space(AS_DATA).specific(intf->m_data); + intf->m_irr_enable = false; + intf->m_irr = 0; + intf->m_prr = 0; + intf->m_drr = 0; + intf->m_dmr = 0; + intf->m_irq_service = false; init_base_timer(0x0020); init_lcd_timer(0x0040); @@ -98,15 +98,15 @@ void st2204_device::device_start() save_item(NAME(m_dms)); save_item(NAME(m_dmd)); save_item(NAME(m_dcnth)); - save_item(NAME(intf->dmr)); + save_item(NAME(intf->m_dmr)); - mintf = std::move(intf); + m_mintf = std::move(intf); save_common_registers(); init(); - state_add(ST_IRR, "IRR", downcast(*mintf).irr).mask(0xff); - state_add(ST_PRR, "PRR", downcast(*mintf).prr).mask(0xfff); - state_add(ST_DRR, "DRR", downcast(*mintf).drr).mask(0x7ff); + state_add(ST_IRR, "IRR", downcast(*m_mintf).m_irr).mask(0xff); + state_add(ST_PRR, "PRR", downcast(*m_mintf).m_prr).mask(0xfff); + state_add(ST_DRR, "DRR", downcast(*m_mintf).m_drr).mask(0x7ff); state_add(ST_IREQ, "IREQ", m_ireq, [this](u16 data) { m_ireq = data; update_irq_state(); }).mask(st2xxx_ireq_mask()); state_add(ST_IENA, "IENA", m_iena, [this](u16 data) { m_iena = data; update_irq_state(); }).mask(st2xxx_ireq_mask()); for (int i = 0; i < 5; i++) @@ -155,7 +155,7 @@ void st2204_device::device_start() state_add(ST_BRS, "BRS", m_brs); state_add(ST_BDIV, "BDIV", m_bdiv); state_add(ST_DMS, "DMS", m_dms); - state_add(ST_DMR, "DMR", downcast(*mintf).dmr).mask(0x7ff); + state_add(ST_DMR, "DMR", downcast(*m_mintf).m_dmr).mask(0x7ff); state_add(ST_DMD, "DMD", m_dmd); } @@ -176,7 +176,7 @@ void st2204_device::device_reset() m_psg_timer->enable(false); m_dac_callback(0); - downcast(*mintf).dmr = 0; + downcast(*m_mintf).m_dmr = 0; // other DMA registers are undefined } @@ -201,56 +201,56 @@ const char *st2204_device::st2xxx_irq_name(int i) const u8 st2204_device::mi_st2204::pread(u16 adr) { - u16 bank = irq_service && irr_enable ? irr : prr; - return data.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff)); + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; + return m_data.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff)); } u8 st2204_device::mi_st2204::preadc(u16 adr) { - u16 bank = irq_service && irr_enable ? irr : prr; - return dcache.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff)); + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; + return m_dcache.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff)); } void st2204_device::mi_st2204::pwrite(u16 adr, u8 val) { - u16 bank = irq_service && irr_enable ? irr : prr; - data.write_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff), val); + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; + m_data.write_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff), val); } u8 st2204_device::mi_st2204::dread(u16 adr) { - return data.read_byte(u32(drr) << 15 | (adr & 0x7fff)); + return m_data.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); } u8 st2204_device::mi_st2204::dreadc(u16 adr) { - return dcache.read_byte(u32(drr) << 15 | (adr & 0x7fff)); + return m_dcache.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); } void st2204_device::mi_st2204::dwrite(u16 adr, u8 val) { - data.write_byte(u32(drr) << 15 | (adr & 0x7fff), val); + m_data.write_byte(u32(m_drr) << 15 | (adr & 0x7fff), val); } u8 st2204_device::mi_st2204::read(u16 adr) { - return program.read_byte(adr); + return m_program.read_byte(adr); } u8 st2204_device::mi_st2204::read_sync(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); } u8 st2204_device::mi_st2204::read_arg(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); } u8 st2204_device::mi_st2204::read_dma(u16 adr) { if (BIT(adr, 15)) - return dcache.read_byte(u32(dmr) << 15 | (adr & 0x7fff)); + return m_dcache.read_byte(u32(m_dmr) << 15 | (adr & 0x7fff)); else return read(adr); } @@ -262,7 +262,7 @@ u8 st2204_device::mi_st2204::read_vector(u16 adr) void st2204_device::mi_st2204::write(u16 adr, u8 val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); } unsigned st2204_device::st2xxx_bt_divider(int n) const @@ -573,7 +573,7 @@ void st2204_device::dcntl_w(u8 data) u16 count = data | u16(m_dcnth & 0x0f) << 8; // FIXME: not instantaneous (obviously), but takes 2 cycles per transfer while CPU is halted - mi_st2204 &intf = downcast(*mintf); + mi_st2204 &intf = downcast(*m_mintf); while (count != 0xffff) { intf.write(m_dmd, intf.read_dma(m_dms)); @@ -582,7 +582,7 @@ void st2204_device::dcntl_w(u8 data) { // DMR bank increments automatically when source is in data memory m_dms = 0x8000; - intf.dmr = (intf.dmr + 1) & 0x7ff; + intf.m_dmr = (intf.m_dmr + 1) & 0x7ff; } // DMAM inhibits destination increment @@ -600,44 +600,44 @@ void st2204_device::dcnth_w(u8 data) u8 st2204_device::dmrl_r() { - return downcast(*mintf).dmr & 0xff; + return downcast(*m_mintf).m_dmr & 0xff; } void st2204_device::dmrl_w(u8 data) { - u16 &dmr = downcast(*mintf).dmr; + u16 &dmr = downcast(*m_mintf).m_dmr; dmr = (data & m_drr_mask) | (dmr & 0xff00); } u8 st2204_device::dmrh_r() { - return downcast(*mintf).dmr >> 8; + return downcast(*m_mintf).m_dmr >> 8; } void st2204_device::dmrh_w(u8 data) { - u16 &dmr = downcast(*mintf).dmr; + u16 &dmr = downcast(*m_mintf).m_dmr; dmr = ((u16(data) << 8) & m_drr_mask) | (dmr & 0x00ff); } u8 st2204_device::pmem_r(offs_t offset) { - return downcast(*mintf).pread(offset); + return downcast(*m_mintf).pread(offset); } void st2204_device::pmem_w(offs_t offset, u8 data) { - downcast(*mintf).pwrite(offset, data); + downcast(*m_mintf).pwrite(offset, data); } u8 st2204_device::dmem_r(offs_t offset) { - return downcast(*mintf).dread(offset); + return downcast(*m_mintf).dread(offset); } void st2204_device::dmem_w(offs_t offset, u8 data) { - downcast(*mintf).dwrite(offset, data); + downcast(*m_mintf).dwrite(offset, data); } void st2204_device::common_map(address_map &map) diff --git a/src/devices/cpu/m6502/st2204.h b/src/devices/cpu/m6502/st2204.h index ba4ed6e9ee4..c56f8bd5a51 100644 --- a/src/devices/cpu/m6502/st2204.h +++ b/src/devices/cpu/m6502/st2204.h @@ -78,7 +78,7 @@ private: u8 dreadc(u16 adr); void dwrite(u16 adr, u8 val); - u16 dmr; + u16 m_dmr; }; u32 tclk_pres_div(u8 mode) const; diff --git a/src/devices/cpu/m6502/st2205u.cpp b/src/devices/cpu/m6502/st2205u.cpp index eeec370de92..249faf06554 100644 --- a/src/devices/cpu/m6502/st2205u.cpp +++ b/src/devices/cpu/m6502/st2205u.cpp @@ -160,7 +160,7 @@ void st2205u_base_device::base_init(std::unique_ptr &&intf) save_item(NAME(m_psg_amplitude)); save_item(NAME(m_psg_freqcntr)); - mintf = std::move(intf); + m_mintf = std::move(intf); save_common_registers(); init(); } @@ -168,28 +168,28 @@ void st2205u_base_device::base_init(std::unique_ptr &&intf) void st2205u_device::device_start() { std::unique_ptr intf = std::make_unique(); - space(AS_DATA).specific(intf->data); - space(AS_DATA).cache(intf->dcache); - intf->irr_enable = false; - intf->irr = 0; - intf->prr = 0; - intf->drr = 0; - intf->brr = 0; - intf->irq_service = false; - intf->ram = make_unique_clear(0x8000); + space(AS_DATA).specific(intf->m_data); + space(AS_DATA).cache(intf->m_dcache); + intf->m_irr_enable = false; + intf->m_irr = 0; + intf->m_prr = 0; + intf->m_drr = 0; + intf->m_brr = 0; + intf->m_irq_service = false; + intf->m_ram = make_unique_clear(0x8000); save_item(NAME(m_lbuf)); save_item(NAME(m_lpal_index)); save_item(NAME(m_gray_levels)); - save_item(NAME(intf->brr)); - save_pointer(NAME(intf->ram), 0x8000); + save_item(NAME(intf->m_brr)); + save_pointer(NAME(intf->m_ram), 0x8000); base_init(std::move(intf)); - state_add(ST_IRR, "IRR", downcast(*mintf).irr).mask(0x8fff); - state_add(ST_PRR, "PRR", downcast(*mintf).prr).mask(0x8fff); - state_add(ST_DRR, "DRR", downcast(*mintf).drr).mask(0x87ff); - state_add(ST_BRR, "BRR", downcast(*mintf).brr).mask(0x9fff); + state_add(ST_IRR, "IRR", downcast(*m_mintf).m_irr).mask(0x8fff); + state_add(ST_PRR, "PRR", downcast(*m_mintf).m_prr).mask(0x8fff); + state_add(ST_DRR, "DRR", downcast(*m_mintf).m_drr).mask(0x87ff); + state_add(ST_BRR, "BRR", downcast(*m_mintf).m_brr).mask(0x9fff); state_add(ST_IREQ, "IREQ", m_ireq, [this](u16 data) { m_ireq = data; update_irq_state(); }).mask(st2xxx_ireq_mask()); state_add(ST_IENA, "IENA", m_iena, [this](u16 data) { m_iena = data; update_irq_state(); }).mask(st2xxx_ireq_mask()); for (int i = 0; i < 6; i++) @@ -263,19 +263,19 @@ void st2205u_device::device_start() void st2302u_device::device_start() { std::unique_ptr intf = std::make_unique(); - space(AS_DATA).specific(intf->data); - space(AS_DATA).cache(intf->dcache); - intf->irr_enable = false; - intf->irr = 0; - intf->prr = 0; - intf->drr = 0; - intf->irq_service = false; + space(AS_DATA).specific(intf->m_data); + space(AS_DATA).cache(intf->m_dcache); + intf->m_irr_enable = false; + intf->m_irr = 0; + intf->m_prr = 0; + intf->m_drr = 0; + intf->m_irq_service = false; base_init(std::move(intf)); - state_add(ST_IRR, "IRR", downcast(*mintf).irr).mask(0x0fff); - state_add(ST_PRR, "PRR", downcast(*mintf).prr).mask(0x0fff); - state_add(ST_DRR, "DRR", downcast(*mintf).drr).mask(0x07ff); + state_add(ST_IRR, "IRR", downcast(*m_mintf).m_irr).mask(0x0fff); + state_add(ST_PRR, "PRR", downcast(*m_mintf).m_prr).mask(0x0fff); + state_add(ST_DRR, "DRR", downcast(*m_mintf).m_drr).mask(0x07ff); state_add(ST_IREQ, "IREQ", m_ireq, [this](u16 data) { m_ireq = data; update_irq_state(); }).mask(st2xxx_ireq_mask()); state_add(ST_IENA, "IENA", m_iena, [this](u16 data) { m_iena = data; update_irq_state(); }).mask(st2xxx_ireq_mask()); for (int i = 0; i < 6; i++) @@ -369,7 +369,7 @@ void st2205u_device::device_reset() { st2205u_base_device::device_reset(); - downcast(*mintf).brr = 0; + downcast(*m_mintf).m_brr = 0; m_lbuf = 0; m_lpal_index = 0; @@ -421,125 +421,125 @@ const char *st2302u_device::st2xxx_irq_name(int i) const u8 st2205u_device::mi_st2205u::pread(u16 adr) { - u16 bank = irq_service && irr_enable ? irr : prr; + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; if (BIT(bank, 15)) - return ram[0x4000 | (adr & 0x3fff)]; + return m_ram[0x4000 | (adr & 0x3fff)]; else - return data.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + return m_data.read_byte(u32(bank) << 14 | (adr & 0x3fff)); } u8 st2205u_device::mi_st2205u::preadc(u16 adr) { - u16 bank = irq_service && irr_enable ? irr : prr; + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; if (BIT(bank, 15)) - return ram[0x4000 | (adr & 0x3fff)]; + return m_ram[0x4000 | (adr & 0x3fff)]; else - return dcache.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + return m_dcache.read_byte(u32(bank) << 14 | (adr & 0x3fff)); } void st2205u_device::mi_st2205u::pwrite(u16 adr, u8 val) { - u16 bank = irq_service && irr_enable ? irr : prr; + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; if (BIT(bank, 15)) - ram[0x4000 | (adr & 0x3fff)] = val; + m_ram[0x4000 | (adr & 0x3fff)] = val; else - data.write_byte(u32(bank) << 14 | (adr & 0x3fff), val); + m_data.write_byte(u32(bank) << 14 | (adr & 0x3fff), val); } u8 st2205u_device::mi_st2205u::dread(u16 adr) { - if (BIT(drr, 15)) - return ram[adr & 0x7fff]; + if (BIT(m_drr, 15)) + return m_ram[adr & 0x7fff]; else - return data.read_byte(u32(drr) << 15 | (adr & 0x7fff)); + return m_data.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); } u8 st2205u_device::mi_st2205u::dreadc(u16 adr) { - if (BIT(drr, 15)) - return ram[adr & 0x7fff]; + if (BIT(m_drr, 15)) + return m_ram[adr & 0x7fff]; else - return dcache.read_byte(u32(drr) << 15 | (adr & 0x7fff)); + return m_dcache.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); } void st2205u_device::mi_st2205u::dwrite(u16 adr, u8 val) { - if (BIT(drr, 15)) - ram[adr & 0x7fff] = val; + if (BIT(m_drr, 15)) + m_ram[adr & 0x7fff] = val; else - data.write_byte(u32(drr) << 15 | (adr & 0x7fff), val); + m_data.write_byte(u32(m_drr) << 15 | (adr & 0x7fff), val); } u8 st2205u_device::mi_st2205u::bread(u16 adr) { - if (BIT(brr, 15)) - return ram[0x2000 | (adr & 0x1fff)]; + if (BIT(m_brr, 15)) + return m_ram[0x2000 | (adr & 0x1fff)]; else - return data.read_byte(u32(brr) << 13 | (adr & 0x1fff)); + return m_data.read_byte(u32(m_brr) << 13 | (adr & 0x1fff)); } u8 st2205u_device::mi_st2205u::breadc(u16 adr) { - if (BIT(brr, 15)) - return ram[0x2000 | (adr & 0x1fff)]; + if (BIT(m_brr, 15)) + return m_ram[0x2000 | (adr & 0x1fff)]; else - return dcache.read_byte(u32(brr) << 13 | (adr & 0x1fff)); + return m_dcache.read_byte(u32(m_brr) << 13 | (adr & 0x1fff)); } void st2205u_device::mi_st2205u::bwrite(u16 adr, u8 val) { - if (BIT(brr, 15)) - ram[0x2000 | (adr & 0x1fff)] = val; + if (BIT(m_brr, 15)) + m_ram[0x2000 | (adr & 0x1fff)] = val; else - data.write_byte(u32(brr) << 13 | (adr & 0x1fff), val); + m_data.write_byte(u32(m_brr) << 13 | (adr & 0x1fff), val); } u8 st2302u_device::mi_st2302u::pread(u16 adr) { - u16 bank = irq_service && irr_enable ? irr : prr; - return data.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; + return m_data.read_byte(u32(bank) << 14 | (adr & 0x3fff)); } u8 st2302u_device::mi_st2302u::preadc(u16 adr) { - u16 bank = irq_service && irr_enable ? irr : prr; - return dcache.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; + return m_dcache.read_byte(u32(bank) << 14 | (adr & 0x3fff)); } void st2302u_device::mi_st2302u::pwrite(u16 adr, u8 val) { - u16 bank = irq_service && irr_enable ? irr : prr; - data.write_byte(u32(bank) << 14 | (adr & 0x3fff), val); + u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; + m_data.write_byte(u32(bank) << 14 | (adr & 0x3fff), val); } u8 st2302u_device::mi_st2302u::dread(u16 adr) { - return data.read_byte(u32(drr) << 15 | (adr & 0x7fff)); + return m_data.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); } u8 st2302u_device::mi_st2302u::dreadc(u16 adr) { - return dcache.read_byte(u32(drr) << 15 | (adr & 0x7fff)); + return m_dcache.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); } void st2302u_device::mi_st2302u::dwrite(u16 adr, u8 val) { - data.write_byte(u32(drr) << 15 | (adr & 0x7fff), val); + m_data.write_byte(u32(m_drr) << 15 | (adr & 0x7fff), val); } u8 st2205u_device::mi_st2205u::read(u16 adr) { - return program.read_byte(adr); + return m_program.read_byte(adr); } u8 st2205u_device::mi_st2205u::read_sync(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : m_cprogram.read_byte(adr); } u8 st2205u_device::mi_st2205u::read_arg(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : m_cprogram.read_byte(adr); } u8 st2205u_device::mi_st2205u::read_vector(u16 adr) @@ -549,22 +549,22 @@ u8 st2205u_device::mi_st2205u::read_vector(u16 adr) void st2205u_device::mi_st2205u::write(u16 adr, u8 val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); } u8 st2302u_device::mi_st2302u::read(u16 adr) { - return program.read_byte(adr); + return m_program.read_byte(adr); } u8 st2302u_device::mi_st2302u::read_sync(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); } u8 st2302u_device::mi_st2302u::read_arg(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); } u8 st2302u_device::mi_st2302u::read_vector(u16 adr) @@ -574,28 +574,28 @@ u8 st2302u_device::mi_st2302u::read_vector(u16 adr) void st2302u_device::mi_st2302u::write(u16 adr, u8 val) { - program.write_byte(adr, val); + m_program.write_byte(adr, val); } u8 st2205u_device::brrl_r() { - return downcast(*mintf).brr & 0xff; + return downcast(*m_mintf).m_brr & 0xff; } void st2205u_device::brrl_w(u8 data) { - u16 &brr = downcast(*mintf).brr; + u16 &brr = downcast(*m_mintf).m_brr; brr = data | (brr & 0x9f00); } u8 st2205u_device::brrh_r() { - return downcast(*mintf).brr >> 8; + return downcast(*m_mintf).m_brr >> 8; } void st2205u_device::brrh_w(u8 data) { - u16 &brr = downcast(*mintf).brr; + u16 &brr = downcast(*m_mintf).m_brr; brr = (data & 0x9f) << 8 | (brr & 0x00ff); } @@ -1022,9 +1022,9 @@ void st2205u_base_device::dcnth_w(u8 data) { uint8_t data; if (BIT(srcb, 15)) - data = mintf->cprogram.read_byte(srcp); // FIXME: 0080-7FFF should be all RAM on ST2205U + data = m_mintf->m_cprogram.read_byte(srcp); // FIXME: 0080-7FFF should be all RAM on ST2205U else - data = downcast(*mintf).dcache.read_byte(srcp | u32(srcb << 15)); + data = downcast(*m_mintf).m_dcache.read_byte(srcp | u32(srcb << 15)); if (!BIT(mode, 1)) { if (srcp++ == 0x7fff) @@ -1036,9 +1036,9 @@ void st2205u_base_device::dcnth_w(u8 data) // TODO: XOR/OR/AND logic for DMA0 three-cycle modes (different on ST23XX?) if (BIT(dstb, 15)) - mintf->cprogram.write_byte(dstp, data); // FIXME: 0080-7FFF should be all RAM on ST2205U + m_mintf->m_cprogram.write_byte(dstp, data); // FIXME: 0080-7FFF should be all RAM on ST2205U else - downcast(*mintf).dcache.write_byte(dstp | u32(dstb << 15), data); + downcast(*m_mintf).m_dcache.write_byte(dstp | u32(dstb << 15), data); if (!BIT(mode, 3)) { if (dstp++ == 0x7fff) @@ -1189,62 +1189,62 @@ void st2302u_device::unk7f_w(u8 data) u8 st2205u_device::ram_r(offs_t offset) { - return downcast(*mintf).ram[0x0080 + offset]; + return downcast(*m_mintf).m_ram[0x0080 + offset]; } void st2205u_device::ram_w(offs_t offset, u8 data) { - downcast(*mintf).ram[0x0080 + offset] = data; + downcast(*m_mintf).m_ram[0x0080 + offset] = data; } u8 st2205u_device::pmem_r(offs_t offset) { - return downcast(*mintf).pread(offset); + return downcast(*m_mintf).pread(offset); } void st2205u_device::pmem_w(offs_t offset, u8 data) { - downcast(*mintf).pwrite(offset, data); + downcast(*m_mintf).pwrite(offset, data); } u8 st2205u_device::dmem_r(offs_t offset) { - return downcast(*mintf).dread(offset); + return downcast(*m_mintf).dread(offset); } void st2205u_device::dmem_w(offs_t offset, u8 data) { - downcast(*mintf).dwrite(offset, data); + downcast(*m_mintf).dwrite(offset, data); } u8 st2205u_device::bmem_r(offs_t offset) { - return downcast(*mintf).bread(offset); + return downcast(*m_mintf).bread(offset); } void st2205u_device::bmem_w(offs_t offset, u8 data) { - downcast(*mintf).bwrite(offset, data); + downcast(*m_mintf).bwrite(offset, data); } u8 st2302u_device::pmem_r(offs_t offset) { - return downcast(*mintf).pread(offset); + return downcast(*m_mintf).pread(offset); } void st2302u_device::pmem_w(offs_t offset, u8 data) { - downcast(*mintf).pwrite(offset, data); + downcast(*m_mintf).pwrite(offset, data); } u8 st2302u_device::dmem_r(offs_t offset) { - return downcast(*mintf).dread(offset); + return downcast(*m_mintf).dread(offset); } void st2302u_device::dmem_w(offs_t offset, u8 data) { - downcast(*mintf).dwrite(offset, data); + downcast(*m_mintf).dwrite(offset, data); } void st2205u_base_device::base_map(address_map &map) diff --git a/src/devices/cpu/m6502/st2205u.h b/src/devices/cpu/m6502/st2205u.h index 57f9e4eaf14..9414af02648 100644 --- a/src/devices/cpu/m6502/st2205u.h +++ b/src/devices/cpu/m6502/st2205u.h @@ -221,9 +221,9 @@ private: u8 breadc(u16 adr); void bwrite(u16 adr, u8 val); - u16 brr; + u16 m_brr; - std::unique_ptr ram; + std::unique_ptr m_ram; }; u8 brrl_r(); diff --git a/src/devices/cpu/m6502/st2xxx.cpp b/src/devices/cpu/m6502/st2xxx.cpp index c5c42fd9551..3dc8c88c0be 100644 --- a/src/devices/cpu/m6502/st2xxx.cpp +++ b/src/devices/cpu/m6502/st2xxx.cpp @@ -87,13 +87,13 @@ st2xxx_device::st2xxx_device(const machine_config &mconfig, device_type type, co , m_irctr(0) , m_bctr(0) { - program_config.m_internal_map = std::move(internal_map); + m_program_config.m_internal_map = std::move(internal_map); } device_memory_interface::space_config_vector st2xxx_device::memory_space_config() const { return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_DATA, &m_data_config) }; } @@ -150,7 +150,7 @@ void st2xxx_device::init_lcd_timer(u16 ireq) void st2xxx_device::save_common_registers() { - mi_st2xxx *intf = downcast(mintf.get()); + mi_st2xxx *intf = downcast(m_mintf.get()); save_item(NAME(m_pdata)); save_item(NAME(m_pctrl)); @@ -161,14 +161,14 @@ void st2xxx_device::save_common_registers() { if (BIT(st2xxx_sys_mask(), 1)) { - save_item(NAME(intf->irq_service)); - save_item(NAME(intf->irr_enable)); - save_item(NAME(intf->irr)); + save_item(NAME(intf->m_irq_service)); + save_item(NAME(intf->m_irr_enable)); + save_item(NAME(intf->m_irr)); } - save_item(NAME(intf->prr)); + save_item(NAME(intf->m_prr)); } if (m_drr_mask != 0) - save_item(NAME(intf->drr)); + save_item(NAME(intf->m_drr)); if (m_bt_mask != 0) { save_item(NAME(m_bten)); @@ -230,11 +230,11 @@ void st2xxx_device::device_reset() m_pmcr = 0x80; // reset bank registers - mi_st2xxx &m = downcast(*mintf); - m.irr_enable = false; - m.irr = 0; - m.prr = 0; - m.drr = 0; + mi_st2xxx &m = downcast(*m_mintf); + m.m_irr_enable = false; + m.m_irr = 0; + m.m_prr = 0; + m.m_drr = 0; // reset interrupt registers m_ireq = 0; @@ -297,7 +297,7 @@ u8 st2xxx_device::read_vector(u16 adr) set_irq_service(true); // Make sure this doesn't change in between vector pull cycles - m_irq_level = irq_taken ? active_irq_level() : 0xff; + m_irq_level = m_irq_taken ? active_irq_level() : 0xff; } if (m_irq_level != 0xff) @@ -306,7 +306,7 @@ u8 st2xxx_device::read_vector(u16 adr) LOGMASKED(LOG_IRQ, "Acknowledging %s interrupt (PC = $%04X, IREQ = $%04X, IENA = $%04X, vector pull from $%04X)\n", st2xxx_irq_name(m_irq_level), - PPC, + m_PPC, m_ireq, m_iena, adr & 0x7fff); @@ -318,7 +318,7 @@ u8 st2xxx_device::read_vector(u16 adr) } } } - return downcast(*mintf).read_vector(adr); + return downcast(*m_mintf).read_vector(adr); } u8 st2xxx_device::pdata_r(offs_t offset) @@ -441,12 +441,12 @@ void st2xxx_device::bten_w(u8 data) assert(div != 0); assert(m_base_timer[n] != nullptr); m_base_timer[n]->adjust(attotime::from_ticks(div, 32768), n); - LOGMASKED(LOG_BT, "Base timer %d enabled at %.1f Hz (PC = $%04X)\n", n, 32768.0 / div, PPC); + LOGMASKED(LOG_BT, "Base timer %d enabled at %.1f Hz (PC = $%04X)\n", n, 32768.0 / div, m_PPC); } else if (!BIT(data, n) && BIT(m_bten, n)) { m_base_timer[n]->adjust(attotime::never); - LOGMASKED(LOG_BT, "Base timer %d disabled (PC = $%04X)\n", n, PPC); + LOGMASKED(LOG_BT, "Base timer %d disabled (PC = $%04X)\n", n, m_PPC); } } @@ -523,7 +523,7 @@ void st2xxx_device::sys_w(u8 data) u8 mask = st2xxx_sys_mask(); m_sys = data & mask; if (BIT(mask, 1)) - downcast(*mintf).irr_enable = BIT(data, 1); + downcast(*m_mintf).m_irr_enable = BIT(data, 1); } u8 st2xxx_device::misc_r() @@ -538,67 +538,67 @@ void st2xxx_device::misc_w(u8 data) u8 st2xxx_device::irrl_r() { - return downcast(*mintf).irr & 0xff; + return downcast(*m_mintf).m_irr & 0xff; } void st2xxx_device::irrl_w(u8 data) { - u16 &irr = downcast(*mintf).irr; + u16 &irr = downcast(*m_mintf).m_irr; irr = (data & m_prr_mask) | (irr & 0xff00); } u8 st2xxx_device::irrh_r() { - return downcast(*mintf).irr >> 8; + return downcast(*m_mintf).m_irr >> 8; } void st2xxx_device::irrh_w(u8 data) { - u16 &irr = downcast(*mintf).irr; + u16 &irr = downcast(*m_mintf).m_irr; irr = ((u16(data) << 8) & m_prr_mask) | (irr & 0x00ff); } u8 st2xxx_device::prrl_r() { - return downcast(*mintf).prr & 0xff; + return downcast(*m_mintf).m_prr & 0xff; } void st2xxx_device::prrl_w(u8 data) { - u16 &prr = downcast(*mintf).prr; + u16 &prr = downcast(*m_mintf).m_prr; prr = (data & m_prr_mask) | (prr & 0xff00); } u8 st2xxx_device::prrh_r() { - return downcast(*mintf).prr >> 8; + return downcast(*m_mintf).m_prr >> 8; } void st2xxx_device::prrh_w(u8 data) { - u16 &prr = downcast(*mintf).prr; + u16 &prr = downcast(*m_mintf).m_prr; prr = ((u16(data) << 8) & m_prr_mask) | (prr & 0x00ff); } u8 st2xxx_device::drrl_r() { - return downcast(*mintf).drr & 0xff; + return downcast(*m_mintf).m_drr & 0xff; } void st2xxx_device::drrl_w(u8 data) { - u16 &drr = downcast(*mintf).drr; + u16 &drr = downcast(*m_mintf).m_drr; drr = (data & m_drr_mask) | (drr & 0xff00); } u8 st2xxx_device::drrh_r() { - return downcast(*mintf).drr >> 8; + return downcast(*m_mintf).m_drr >> 8; } void st2xxx_device::drrh_w(u8 data) { - u16 &drr = downcast(*mintf).drr; + u16 &drr = downcast(*m_mintf).m_drr; drr = ((u16(data) << 8) & m_drr_mask) | (drr & 0x00ff); } @@ -614,7 +614,7 @@ void st2xxx_device::ireql_w(u8 data) for (int i = 0; i < 8; i++) { if (!BIT(data, i) && BIT(m_ireq, i)) - LOGMASKED(LOG_IRQ, "%s interrupt cleared (PC = $%04X)\n", st2xxx_irq_name(i), PPC); + LOGMASKED(LOG_IRQ, "%s interrupt cleared (PC = $%04X)\n", st2xxx_irq_name(i), m_PPC); } m_ireq &= data | 0xff00; update_irq_state(); @@ -633,7 +633,7 @@ void st2xxx_device::ireqh_w(u8 data) for (int i = 0; i < 8; i++) { if (!BIT(data, i) && BIT(m_ireq, i + 8)) - LOGMASKED(LOG_IRQ, "%s interrupt cleared (PC = $%04X)\n", st2xxx_irq_name(i + 8), PPC); + LOGMASKED(LOG_IRQ, "%s interrupt cleared (PC = $%04X)\n", st2xxx_irq_name(i + 8), m_PPC); } m_ireq &= u16(data) << 8 | 0x00ff; update_irq_state(); @@ -656,7 +656,7 @@ void st2xxx_device::ienal_w(u8 data) LOGMASKED(LOG_IRQ, "%s interrupt %sabled (PC = $%04X)\n", st2xxx_irq_name(i), BIT(data, i) ? "en" : "dis", - PPC); + m_PPC); } m_iena = (m_iena & 0xff00) | data; update_irq_state(); @@ -679,7 +679,7 @@ void st2xxx_device::ienah_w(u8 data) LOGMASKED(LOG_IRQ, "%s interrupt %sabled (PC = $%04X)\n", st2xxx_irq_name(i + 8), BIT(data, i) ? "en" : "dis", - PPC); + m_PPC); } m_iena = (m_iena & 0x00ff) | (u16(data) << 8); update_irq_state(); @@ -766,7 +766,7 @@ void st2xxx_device::lfr_recalculate_period() unsigned clocks = st2xxx_lfr_clocks(); assert(clocks != 0); attotime period = cycles_to_attotime(clocks); - LOGMASKED(LOG_LCDC, "LCD frame rate = %f Hz (PC = $%04X)\n", period.as_hz(), PPC); + LOGMASKED(LOG_LCDC, "LCD frame rate = %f Hz (PC = $%04X)\n", period.as_hz(), m_PPC); m_lcd_timer->adjust(period, 0, period); } else @@ -880,7 +880,7 @@ u8 st2xxx_device::udata_r() void st2xxx_device::udata_w(u8 data) { - logerror("Writing %02X to UART transmitter (PC = %04X)\n", data, PPC); + logerror("Writing %02X to UART transmitter (PC = %04X)\n", data, m_PPC); } u8 st2xxx_device::bctr_r() diff --git a/src/devices/cpu/m6502/st2xxx.h b/src/devices/cpu/m6502/st2xxx.h index 5189cb24a5d..7d0a57d16ae 100644 --- a/src/devices/cpu/m6502/st2xxx.h +++ b/src/devices/cpu/m6502/st2xxx.h @@ -115,14 +115,14 @@ protected: public: virtual u8 read_vector(u16 adr) = 0; - memory_access<26, 0, 0, ENDIANNESS_LITTLE>::cache dcache; - memory_access<26, 0, 0, ENDIANNESS_LITTLE>::specific data; + memory_access<26, 0, 0, ENDIANNESS_LITTLE>::cache m_dcache; + memory_access<26, 0, 0, ENDIANNESS_LITTLE>::specific m_data; - bool irq_service; - bool irr_enable; - u16 irr; - u16 prr; - u16 drr; + bool m_irq_service; + bool m_irr_enable; + u16 m_irr; + u16 m_prr; + u16 m_drr; }; void init_base_timer(u16 ireq); @@ -132,8 +132,8 @@ protected: virtual u8 read_vector(u16 adr) override; virtual void end_interrupt() override { set_irq_service(false); } - void set_irq_service(bool state) { downcast(*mintf).irq_service = state; } - void update_irq_state() { irq_state = (m_ireq & m_iena) != 0; } + void set_irq_service(bool state) { downcast(*m_mintf).m_irq_service = state; } + void update_irq_state() { m_irq_state = (m_ireq & m_iena) != 0; } u8 active_irq_level() const; TIMER_CALLBACK_MEMBER(bt_interrupt); diff --git a/src/devices/cpu/m6502/vt3xx_spu.cpp b/src/devices/cpu/m6502/vt3xx_spu.cpp index 88c41d8dcd0..c8e029f5b08 100644 --- a/src/devices/cpu/m6502/vt3xx_spu.cpp +++ b/src/devices/cpu/m6502/vt3xx_spu.cpp @@ -70,13 +70,13 @@ device_memory_interface::space_config_vector vt3xx_spu_device::memory_space_conf { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config), std::make_pair(5, &m_extdata_config), }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(5, &m_extdata_config), }; } diff --git a/src/devices/cpu/m6502/w65c02s.h b/src/devices/cpu/m6502/w65c02s.h index 7a3da04bcd5..a26a2de761a 100644 --- a/src/devices/cpu/m6502/w65c02s.h +++ b/src/devices/cpu/m6502/w65c02s.h @@ -25,7 +25,7 @@ public: protected: w65c02s_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - virtual uint8_t read_vector(uint16_t adr) { return mintf->read_arg(adr); } + virtual uint8_t read_vector(uint16_t adr) { return m_mintf->read_arg(adr); } virtual void end_interrupt() { } #define O(o) void o ## _full(); void o ## _partial() diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp index bf5eb25b925..406f45cc5c5 100644 --- a/src/devices/cpu/m6502/xavix.cpp +++ b/src/devices/cpu/m6502/xavix.cpp @@ -40,15 +40,15 @@ xavix_device::xavix_device(const machine_config &mconfig, const char *tag, devic xavix_device::xavix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : m6502_device(mconfig, type, tag, owner, clock), - XPC(0), + m_XPC(0), m_lowbus_config("lowbus", ENDIANNESS_LITTLE, 8, 15), m_extbus_config("extbus", ENDIANNESS_LITTLE, 8, 24), m_vector_callback(*this) { - program_config.m_addr_width = 24; - program_config.m_logaddr_width = 24; - sprogram_config.m_addr_width = 24; - sprogram_config.m_logaddr_width = 24; + m_program_config.m_addr_width = 24; + m_program_config.m_logaddr_width = 24; + m_sprogram_config.m_addr_width = 24; + m_sprogram_config.m_logaddr_width = 24; // XaviX specific spaces m_lowbus_config.m_addr_width = 15; m_lowbus_config.m_logaddr_width = 15; @@ -71,7 +71,7 @@ offs_t xavix_device::pc_to_external(u16 pc) void xavix_device::device_start() { - mintf = std::make_unique(this); + m_mintf = std::make_unique(this); // bind delegates m_vector_callback.resolve(); @@ -103,7 +103,7 @@ void xavix_device::device_reset() xavix_device::mi_xavix::mi_xavix(xavix_device *_base) { - base = _base; + m_base = _base; } void xavix_device::write_special_stack(uint32_t addr, uint8_t data) @@ -192,20 +192,20 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr) // data reads inline uint8_t xavix_device::mi_xavix::read(uint16_t adr) { - uint8_t databank = base->get_databank(); - return base->read_full_data(databank, adr); + uint8_t databank = m_base->get_databank(); + return m_base->read_full_data(databank, adr); } // opcode reads uint8_t xavix_device::mi_xavix::read_sync(uint16_t adr) { - return csprogram.read_byte(base->adr_with_codebank(adr)); + return m_csprogram.read_byte(m_base->adr_with_codebank(adr)); } // oprand reads uint8_t xavix_device::mi_xavix::read_arg(uint16_t adr) { - return cprogram.read_byte(base->adr_with_codebank(adr)); + return m_cprogram.read_byte(m_base->adr_with_codebank(adr)); } // data writes @@ -296,8 +296,8 @@ inline void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_ void xavix_device::mi_xavix::write(uint16_t adr, uint8_t val) { - uint8_t databank = base->get_databank(); - base->write_full_data(databank, adr, val); + uint8_t databank = m_base->get_databank(); + m_base->write_full_data(databank, adr, val); } void xavix_device::set_codebank(uint8_t bank) @@ -328,14 +328,14 @@ device_memory_interface::space_config_vector xavix_device::memory_space_config() { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config), std::make_pair(5, &m_lowbus_config), std::make_pair(6, &m_extbus_config) }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(5, &m_lowbus_config), std::make_pair(6, &m_extbus_config) }; diff --git a/src/devices/cpu/m6502/xavix.h b/src/devices/cpu/m6502/xavix.h index 5363bb77d36..2416902c6b7 100644 --- a/src/devices/cpu/m6502/xavix.h +++ b/src/devices/cpu/m6502/xavix.h @@ -149,7 +149,7 @@ public: protected: class mi_xavix : public memory_interface { public: - xavix_device *base; + xavix_device *m_base; mi_xavix(xavix_device *base); virtual ~mi_xavix() {} @@ -162,7 +162,7 @@ protected: uint8_t m_databank; uint8_t m_codebank; - uint32_t XPC; + uint32_t m_XPC; xavix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/elan_ep3a19a_soc.cpp b/src/devices/machine/elan_ep3a19a_soc.cpp index 0cd01efdb8a..9fde0663c95 100644 --- a/src/devices/machine/elan_ep3a19a_soc.cpp +++ b/src/devices/machine/elan_ep3a19a_soc.cpp @@ -21,7 +21,7 @@ elan_ep3a19a_soc_device::elan_ep3a19a_soc_device(const machine_config &mconfig, { m_extbus_config.m_addr_width = 24; m_extbus_config.m_logaddr_width = 24; - program_config.m_internal_map = address_map_constructor(FUNC(elan_ep3a19a_soc_device::int_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(elan_ep3a19a_soc_device::int_map), this); } elan_ep3a19a_soc_device::elan_ep3a19a_soc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : @@ -135,13 +135,13 @@ device_memory_interface::space_config_vector elan_ep3a19a_soc_device::memory_spa { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config), std::make_pair(AS_EXTERNAL, &m_extbus_config), }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_EXTERNAL, &m_extbus_config), }; } diff --git a/src/devices/machine/elan_eu3a05_soc.cpp b/src/devices/machine/elan_eu3a05_soc.cpp index c4593765eb5..b8d672a5e19 100644 --- a/src/devices/machine/elan_eu3a05_soc.cpp +++ b/src/devices/machine/elan_eu3a05_soc.cpp @@ -23,7 +23,7 @@ elan_eu3a05_soc_device::elan_eu3a05_soc_device(const machine_config &mconfig, de { m_extbus_config.m_addr_width = 24; m_extbus_config.m_logaddr_width = 24; - program_config.m_internal_map = address_map_constructor(FUNC(elan_eu3a05_soc_device::int_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(elan_eu3a05_soc_device::int_map), this); m_fixed_bank_address = 0x3f8000; } @@ -160,13 +160,13 @@ device_memory_interface::space_config_vector elan_eu3a05_soc_device::memory_spac { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config), std::make_pair(AS_EXTERNAL, &m_extbus_config), }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_EXTERNAL, &m_extbus_config), }; } diff --git a/src/devices/machine/elan_eu3a14_soc.cpp b/src/devices/machine/elan_eu3a14_soc.cpp index c9d521ac73d..e5a140f323c 100644 --- a/src/devices/machine/elan_eu3a14_soc.cpp +++ b/src/devices/machine/elan_eu3a14_soc.cpp @@ -26,7 +26,7 @@ elan_eu3a14_soc_device::elan_eu3a14_soc_device(const machine_config &mconfig, de { m_extbus_config.m_addr_width = 24; m_extbus_config.m_logaddr_width = 24; - program_config.m_internal_map = address_map_constructor(FUNC(elan_eu3a14_soc_device::int_map), this); + m_program_config.m_internal_map = address_map_constructor(FUNC(elan_eu3a14_soc_device::int_map), this); } elan_eu3a14_soc_device::elan_eu3a14_soc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : @@ -113,13 +113,13 @@ device_memory_interface::space_config_vector elan_eu3a14_soc_device::memory_spac { if(has_configured_map(AS_OPCODES)) return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), - std::make_pair(AS_OPCODES, &sprogram_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_OPCODES, &m_sprogram_config), std::make_pair(AS_EXTERNAL, &m_extbus_config), }; else return space_config_vector { - std::make_pair(AS_PROGRAM, &program_config), + std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_EXTERNAL, &m_extbus_config), }; } diff --git a/src/mame/dataeast/deco222.cpp b/src/mame/dataeast/deco222.cpp index 2e78dcbfdfd..1e356c06a9b 100644 --- a/src/mame/dataeast/deco222.cpp +++ b/src/mame/dataeast/deco222.cpp @@ -19,19 +19,19 @@ deco_222_device::deco_222_device(const machine_config &mconfig, const char *tag, void deco_222_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } void deco_222_device::device_reset() { m6502_device::device_reset(); - downcast(*mintf).had_written = false; + downcast(*m_mintf).m_had_written = false; } uint8_t deco_222_device::mi_decrypt::read_sync(uint16_t adr) { - return bitswap<8>(cprogram.read_byte(adr) ,7,5,6,4,3,2,1,0); + return bitswap<8>(m_cprogram.read_byte(adr) ,7,5,6,4,3,2,1,0); } std::unique_ptr deco_222_device::create_disassembler() @@ -56,19 +56,19 @@ deco_c10707_device::deco_c10707_device(const machine_config &mconfig, const char void deco_c10707_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } void deco_c10707_device::device_reset() { m6502_device::device_reset(); - downcast(*mintf).had_written = false; + downcast(*m_mintf).had_written = false; } uint8_t deco_c10707_device::mi_decrypt::read_sync(uint16_t adr) { - return bitswap<8>(cprogram.read_byte(adr) ,7,5,6,4,3,2,1,0); + return bitswap<8>(m_cprogram.read_byte(adr) ,7,5,6,4,3,2,1,0); } std::unique_ptr deco_c10707_device::create_disassembler() diff --git a/src/mame/dataeast/deco222.h b/src/mame/dataeast/deco222.h index be5b675063e..9ce916b9569 100644 --- a/src/mame/dataeast/deco222.h +++ b/src/mame/dataeast/deco222.h @@ -15,7 +15,7 @@ public: protected: class mi_decrypt : public mi_default { public: - bool had_written; + bool m_had_written; virtual ~mi_decrypt() {} virtual uint8_t read_sync(uint16_t adr) override; diff --git a/src/mame/dataeast/decocpu6.cpp b/src/mame/dataeast/decocpu6.cpp index bc167c5e35f..16a07eb51dc 100644 --- a/src/mame/dataeast/decocpu6.cpp +++ b/src/mame/dataeast/decocpu6.cpp @@ -19,7 +19,7 @@ deco_cpu6_device::deco_cpu6_device(const machine_config &mconfig, const char *ta void deco_cpu6_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } @@ -31,9 +31,9 @@ void deco_cpu6_device::device_reset() uint8_t deco_cpu6_device::mi_decrypt::read_sync(uint16_t adr) { if (adr&1) - return bitswap<8>(cprogram.read_byte(adr),6,4,7,5,3,2,1,0); + return bitswap<8>(m_cprogram.read_byte(adr),6,4,7,5,3,2,1,0); else - return cprogram.read_byte(adr); + return m_cprogram.read_byte(adr); } std::unique_ptr deco_cpu6_device::create_disassembler() diff --git a/src/mame/dataeast/decocpu7.cpp b/src/mame/dataeast/decocpu7.cpp index 7f90c30ff01..a864aebd989 100644 --- a/src/mame/dataeast/decocpu7.cpp +++ b/src/mame/dataeast/decocpu7.cpp @@ -14,21 +14,21 @@ deco_cpu7_device::deco_cpu7_device(const machine_config &mconfig, const char *ta void deco_cpu7_device::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } void deco_cpu7_device::device_reset() { m6502_device::device_reset(); - downcast(*mintf).had_written = false; + downcast(*m_mintf).m_had_written = false; } uint8_t deco_cpu7_device::mi_decrypt::read_sync(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); - if(had_written) { - had_written = false; + uint8_t res = m_cprogram.read_byte(adr); + if(m_had_written) { + m_had_written = false; if((adr & 0x0104) == 0x0104) res = bitswap<8>(res, 6,5,3,4,2,7,1,0); } @@ -37,16 +37,16 @@ uint8_t deco_cpu7_device::mi_decrypt::read_sync(uint16_t adr) void deco_cpu7_device::mi_decrypt::write(uint16_t adr, uint8_t val) { - program.write_byte(adr, val); - had_written = true; + m_program.write_byte(adr, val); + m_had_written = true; } std::unique_ptr deco_cpu7_device::create_disassembler() { - return std::make_unique(downcast(mintf.get())); + return std::make_unique(downcast(m_mintf.get())); } -deco_cpu7_device::disassembler::disassembler(mi_decrypt *mi) : mintf(mi) +deco_cpu7_device::disassembler::disassembler(mi_decrypt *mi) : m_mintf(mi) { } @@ -57,5 +57,5 @@ u32 deco_cpu7_device::disassembler::interface_flags() const u8 deco_cpu7_device::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode && mintf->had_written && ((pc & 0x104) == 0x104) ? bitswap<8>(value,6,5,3,4,2,7,1,0) : value; + return opcode && m_mintf->m_had_written && ((pc & 0x104) == 0x104) ? bitswap<8>(value,6,5,3,4,2,7,1,0) : value; } diff --git a/src/mame/dataeast/decocpu7.h b/src/mame/dataeast/decocpu7.h index 283679824fa..d4ce133b756 100644 --- a/src/mame/dataeast/decocpu7.h +++ b/src/mame/dataeast/decocpu7.h @@ -15,7 +15,7 @@ public: protected: class mi_decrypt : public mi_default { public: - bool had_written; + bool m_had_written; virtual ~mi_decrypt() {} virtual uint8_t read_sync(uint16_t adr) override; @@ -24,7 +24,7 @@ protected: class disassembler : public m6502_disassembler { public: - mi_decrypt *mintf; + mi_decrypt *m_mintf; disassembler(mi_decrypt *m); virtual ~disassembler() = default; diff --git a/src/mame/nintendo/m6502_swap_op_d2_d7.cpp b/src/mame/nintendo/m6502_swap_op_d2_d7.cpp index fa58c4e834d..910a34bdcb6 100644 --- a/src/mame/nintendo/m6502_swap_op_d2_d7.cpp +++ b/src/mame/nintendo/m6502_swap_op_d2_d7.cpp @@ -26,7 +26,7 @@ m6502_swap_op_d2_d7::m6502_swap_op_d2_d7(const machine_config &mconfig, const ch void m6502_swap_op_d2_d7::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } @@ -42,7 +42,7 @@ uint8_t m6502_swap_op_d2_d7::mi_decrypt::descramble(uint8_t op) uint8_t m6502_swap_op_d2_d7::mi_decrypt::read_sync(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_byte(adr); res = descramble(res); @@ -51,10 +51,10 @@ uint8_t m6502_swap_op_d2_d7::mi_decrypt::read_sync(uint16_t adr) std::unique_ptr m6502_swap_op_d2_d7::create_disassembler() { - return std::make_unique(downcast(mintf.get())); + return std::make_unique(downcast(m_mintf.get())); } -m6502_swap_op_d2_d7::disassembler::disassembler(mi_decrypt *mi) : mintf(mi) +m6502_swap_op_d2_d7::disassembler::disassembler(mi_decrypt *mi) : m_mintf(mi) { } @@ -65,5 +65,5 @@ u32 m6502_swap_op_d2_d7::disassembler::interface_flags() const u8 m6502_swap_op_d2_d7::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode ? mintf->descramble(value) : value; + return opcode ? m_mintf->descramble(value) : value; } diff --git a/src/mame/nintendo/m6502_swap_op_d2_d7.h b/src/mame/nintendo/m6502_swap_op_d2_d7.h index 4e83781f50b..9c99db6d8d4 100644 --- a/src/mame/nintendo/m6502_swap_op_d2_d7.h +++ b/src/mame/nintendo/m6502_swap_op_d2_d7.h @@ -35,7 +35,7 @@ protected: class disassembler : public m6502_disassembler { public: - mi_decrypt *mintf; + mi_decrypt *m_mintf; disassembler(mi_decrypt *m); virtual ~disassembler() = default; diff --git a/src/mame/nintendo/m6502_swap_op_d5_d6.cpp b/src/mame/nintendo/m6502_swap_op_d5_d6.cpp index cf5ddfdcec7..56a9e7abdf5 100644 --- a/src/mame/nintendo/m6502_swap_op_d5_d6.cpp +++ b/src/mame/nintendo/m6502_swap_op_d5_d6.cpp @@ -27,19 +27,19 @@ m6502_swap_op_d5_d6::m6502_swap_op_d5_d6(const machine_config &mconfig, const ch void m6502_swap_op_d5_d6::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); } void m6502_swap_op_d5_d6::device_reset() { - downcast(*mintf).m_encryption_enabled = true; + downcast(*m_mintf).m_encryption_enabled = true; m6502_device::device_reset(); } void m6502_swap_op_d5_d6::set_encryption_state(bool state) { - downcast(*mintf).m_encryption_enabled = state; + downcast(*m_mintf).m_encryption_enabled = state; } uint8_t m6502_swap_op_d5_d6::mi_decrypt::descramble(uint8_t op) @@ -52,7 +52,7 @@ uint8_t m6502_swap_op_d5_d6::mi_decrypt::descramble(uint8_t op) uint8_t m6502_swap_op_d5_d6::mi_decrypt::read_sync(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_byte(adr); res = descramble(res); @@ -61,10 +61,10 @@ uint8_t m6502_swap_op_d5_d6::mi_decrypt::read_sync(uint16_t adr) std::unique_ptr m6502_swap_op_d5_d6::create_disassembler() { - return std::make_unique(downcast(mintf.get())); + return std::make_unique(downcast(m_mintf.get())); } -m6502_swap_op_d5_d6::disassembler::disassembler(mi_decrypt *mi) : mintf(mi) +m6502_swap_op_d5_d6::disassembler::disassembler(mi_decrypt *mi) : m_mintf(mi) { } @@ -75,7 +75,7 @@ u32 m6502_swap_op_d5_d6::disassembler::interface_flags() const u8 m6502_swap_op_d5_d6::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode ? mintf->descramble(value) : value; + return opcode ? m_mintf->descramble(value) : value; } @@ -91,21 +91,21 @@ rp2a03_core_swap_op_d5_d6::rp2a03_core_swap_op_d5_d6(const machine_config &mconf void rp2a03_core_swap_op_d5_d6::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); init(); - save_item(downcast(*mintf).m_encryption_enabled, "m_encryption_enabled"); + save_item(downcast(*m_mintf).m_encryption_enabled, "m_encryption_enabled"); } void rp2a03_core_swap_op_d5_d6::device_reset() { - downcast(*mintf).m_encryption_enabled = m_encryption_enabled_on_reset; - downcast(*mintf).m_whichcrypt = m_cryptconfig; + downcast(*m_mintf).m_encryption_enabled = m_encryption_enabled_on_reset; + downcast(*m_mintf).m_whichcrypt = m_cryptconfig; rp2a03_core_device::device_reset(); } void rp2a03_core_swap_op_d5_d6::set_encryption_state(bool state) { - downcast(*mintf).m_encryption_enabled = state; + downcast(*m_mintf).m_encryption_enabled = state; } uint8_t rp2a03_core_swap_op_d5_d6::mi_decrypt::descramble(uint8_t op) @@ -127,7 +127,7 @@ uint8_t rp2a03_core_swap_op_d5_d6::mi_decrypt::descramble(uint8_t op) uint8_t rp2a03_core_swap_op_d5_d6::mi_decrypt::read_sync(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_byte(adr); res = descramble(res); @@ -136,10 +136,10 @@ uint8_t rp2a03_core_swap_op_d5_d6::mi_decrypt::read_sync(uint16_t adr) std::unique_ptr rp2a03_core_swap_op_d5_d6::create_disassembler() { - return std::make_unique(downcast(mintf.get())); + return std::make_unique(downcast(m_mintf.get())); } -rp2a03_core_swap_op_d5_d6::disassembler::disassembler(mi_decrypt *mi) : mintf(mi) +rp2a03_core_swap_op_d5_d6::disassembler::disassembler(mi_decrypt *mi) : m_mintf(mi) { } @@ -150,6 +150,6 @@ u32 rp2a03_core_swap_op_d5_d6::disassembler::interface_flags() const u8 rp2a03_core_swap_op_d5_d6::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode ? mintf->descramble(value) : value; + return opcode ? m_mintf->descramble(value) : value; } diff --git a/src/mame/nintendo/m6502_swap_op_d5_d6.h b/src/mame/nintendo/m6502_swap_op_d5_d6.h index e220ea11a53..b70c7ebf8fa 100644 --- a/src/mame/nintendo/m6502_swap_op_d5_d6.h +++ b/src/mame/nintendo/m6502_swap_op_d5_d6.h @@ -35,7 +35,7 @@ protected: class disassembler : public m6502_disassembler { public: - mi_decrypt *mintf; + mi_decrypt *m_mintf; disassembler(mi_decrypt *m); virtual ~disassembler() = default; @@ -72,7 +72,7 @@ protected: class disassembler : public rp2a03_disassembler { public: - mi_decrypt *mintf; + mi_decrypt *m_mintf; disassembler(mi_decrypt *m); virtual ~disassembler() = default; diff --git a/src/mame/nintendo/rp2a03_vtscr.cpp b/src/mame/nintendo/rp2a03_vtscr.cpp index 037b6c408c3..92e90c5f8db 100644 --- a/src/mame/nintendo/rp2a03_vtscr.cpp +++ b/src/mame/nintendo/rp2a03_vtscr.cpp @@ -24,20 +24,20 @@ rp2a03_vtscr::rp2a03_vtscr(const machine_config &mconfig, const char *tag, devic void rp2a03_vtscr::device_start() { - mintf = std::make_unique(); + m_mintf = std::make_unique(); set_scramble(0x00); init(); } void rp2a03_vtscr::set_next_scramble(uint8_t scr) { - downcast(*mintf).m_next_scramble = scr; + downcast(*m_mintf).m_next_scramble = scr; } void rp2a03_vtscr::set_scramble(uint8_t scr) { - downcast(*mintf).m_next_scramble = scr; - downcast(*mintf).m_scramble_en = scr; + downcast(*m_mintf).m_next_scramble = scr; + downcast(*m_mintf).m_scramble_en = scr; } @@ -54,7 +54,7 @@ bool rp2a03_vtscr::mi_decrypt::toggle_scramble(uint8_t op) { uint8_t rp2a03_vtscr::mi_decrypt::read_sync(uint16_t adr) { - uint8_t res = cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_byte(adr); if(m_scramble_en) { res = descramble(res); @@ -74,10 +74,10 @@ uint8_t rp2a03_vtscr::mi_decrypt::descramble(uint8_t op) std::unique_ptr rp2a03_vtscr::create_disassembler() { - return std::make_unique(downcast(mintf.get())); + return std::make_unique(downcast(m_mintf.get())); } -rp2a03_vtscr::disassembler::disassembler(mi_decrypt *mi) : mintf(mi) +rp2a03_vtscr::disassembler::disassembler(mi_decrypt *mi) : m_mintf(mi) { } @@ -88,5 +88,5 @@ u32 rp2a03_vtscr::disassembler::interface_flags() const u8 rp2a03_vtscr::disassembler::decrypt8(u8 value, offs_t pc, bool opcode) const { - return opcode && mintf->m_scramble_en ? mintf->descramble(value) : value; + return opcode && m_mintf->m_scramble_en ? m_mintf->descramble(value) : value; } diff --git a/src/mame/nintendo/rp2a03_vtscr.h b/src/mame/nintendo/rp2a03_vtscr.h index 1297f75aeb2..07df49a2b10 100644 --- a/src/mame/nintendo/rp2a03_vtscr.h +++ b/src/mame/nintendo/rp2a03_vtscr.h @@ -40,7 +40,7 @@ protected: class disassembler : public rp2a03_disassembler { public: - mi_decrypt *mintf; + mi_decrypt *m_mintf; disassembler(mi_decrypt *m); virtual ~disassembler() = default; From 32c3e44eb15cc767e5ba45f401160591d44c4a02 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Wed, 4 Mar 2026 13:32:08 +0200 Subject: [PATCH 128/351] z8536: Fixed interrupt priorities, Timer/Counter interrupt error, and port pattern polarity in OR-PEV mode. [Curt Coder] --- src/devices/bus/abcbus/lux4105.cpp | 2 +- src/devices/machine/z8536.cpp | 372 ++++++++++++++++++----------- src/devices/machine/z8536.h | 19 +- src/mame/luxor/abc1600.cpp | 3 + 4 files changed, 250 insertions(+), 146 deletions(-) diff --git a/src/devices/bus/abcbus/lux4105.cpp b/src/devices/bus/abcbus/lux4105.cpp index 0e0aba0a3e0..cf4f8dc04fe 100644 --- a/src/devices/bus/abcbus/lux4105.cpp +++ b/src/devices/bus/abcbus/lux4105.cpp @@ -221,7 +221,7 @@ void luxor_4105_device::update_dma() { irq = 0; } - m_slot->irq_w(!irq); + m_slot->irq_w(irq); } diff --git a/src/devices/machine/z8536.cpp b/src/devices/machine/z8536.cpp index 7bb396b0d5f..1f3f3a8aa88 100644 --- a/src/devices/machine/z8536.cpp +++ b/src/devices/machine/z8536.cpp @@ -45,96 +45,172 @@ static char const *const CTMS_DCS[] = { "Pulse", "One-shot", "Square Wave", "Do // INLINE HELPERS //************************************************************************** -//------------------------------------------------- -// get_interrupt_vector - -//------------------------------------------------- - -void cio_base_device::get_interrupt_vector() +u8 cio_base_device::get_port_a_vector(bool status) { - u8 vector = 0xff; + u8 vector = m_register[PORT_A_INTERRUPT_VECTOR]; - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE) + if (status) { - if ((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + vector &= 0xf1; + + if (((m_register[PORT_A_MODE_SPECIFICATION] & PMS_PMS_MASK) >> 1) == PMS_OR_PEV) { - vector = m_register[COUNTER_TIMER_INTERRUPT_VECTOR]; - - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_CT_VIS) + for (int i = 7; i >= 0; i--) { - vector = (vector & 0xf9) | 0; - } - } - else if ((m_register[PORT_A_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) - { - vector = m_register[PORT_A_INTERRUPT_VECTOR]; - - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_PA_VIS) - { - vector &= 0xf1; - - if (((m_register[PORT_A_MODE_SPECIFICATION] & PMS_PMS_MASK) >> 1) == PMS_OR_PEV) + if (BIT(m_match[PORT_A], i)) { - if (m_match[PORT_A] & 0x80) vector |= 7 << 1; - else if (m_match[PORT_A] & 0x40) vector |= 6 << 1; - else if (m_match[PORT_A] & 0x20) vector |= 5 << 1; - else if (m_match[PORT_A] & 0x10) vector |= 4 << 1; - else if (m_match[PORT_A] & 0x08) vector |= 3 << 1; - else if (m_match[PORT_A] & 0x04) vector |= 2 << 1; - else if (m_match[PORT_A] & 0x02) vector |= 1 << 1; - else if (m_match[PORT_A] & 0x01) vector |= 0 << 1; - } - else - { - vector |= (m_register[PORT_A_COMMAND_AND_STATUS] & 0x0e); + vector |= i << 1; + break; } } } - else if ((m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + else { - vector = m_register[COUNTER_TIMER_INTERRUPT_VECTOR]; - - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_CT_VIS) - { - vector = (vector & 0xf9) | 2; - } - } - else if ((m_register[PORT_B_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) - { - vector = m_register[PORT_B_INTERRUPT_VECTOR]; - - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_PB_VIS) - { - vector &= 0xf1; - - if (((m_register[PORT_B_MODE_SPECIFICATION] & PMS_PMS_MASK) >> 1) == PMS_OR_PEV) - { - if (m_match[PORT_B] & 0x80) vector |= 7 << 1; - else if (m_match[PORT_B] & 0x40) vector |= 6 << 1; - else if (m_match[PORT_B] & 0x20) vector |= 5 << 1; - else if (m_match[PORT_B] & 0x10) vector |= 4 << 1; - else if (m_match[PORT_B] & 0x08) vector |= 3 << 1; - else if (m_match[PORT_B] & 0x04) vector |= 2 << 1; - else if (m_match[PORT_B] & 0x02) vector |= 1 << 1; - else if (m_match[PORT_B] & 0x01) vector |= 0 << 1; - } - else - { - vector |= (m_register[PORT_B_COMMAND_AND_STATUS] & 0x0e); - } - } - } - else if ((m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) - { - vector = m_register[COUNTER_TIMER_INTERRUPT_VECTOR]; - - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_CT_VIS) - { - vector = (vector & 0xf9) | 4; - } + vector |= (m_register[PORT_A_COMMAND_AND_STATUS] & 0x0e); } } - m_register[CURRENT_VECTOR] = vector; + return vector; +} + +u8 cio_base_device::get_port_b_vector(bool status) +{ + u8 vector = m_register[PORT_B_INTERRUPT_VECTOR]; + + if (status) + { + vector &= 0xf1; + + if (((m_register[PORT_B_MODE_SPECIFICATION] & PMS_PMS_MASK) >> 1) == PMS_OR_PEV) + { + for (int i = 7; i >= 0; i--) + { + if (BIT(m_match[PORT_B], i)) + { + vector |= i << 1; + break; + } + } + } + else + { + vector |= (m_register[PORT_B_COMMAND_AND_STATUS] & 0x0e); + } + } + + return vector; +} + +u8 cio_base_device::get_timer_vector(bool status) +{ + u8 vector = m_register[COUNTER_TIMER_INTERRUPT_VECTOR]; + + if (status) + { + vector &= 0xf9; + + if ((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE)) == (CTCS_IP | CTCS_IE)) vector |= 0; + else if ((m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE)) == (CTCS_IP | CTCS_IE)) vector |= 2; + else if ((m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE)) == (CTCS_IP | CTCS_IE)) vector |= 4; + } + + return vector; +} + +u8 cio_base_device::get_current_vector() +{ + u8 data = 0xff; + + bool mie = m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE; + bool nv = m_register[MASTER_INTERRUPT_CONTROL] & MICR_NV; + bool ct_vis = m_register[MASTER_INTERRUPT_CONTROL] & MICR_CT_VIS; + bool pa_vis = m_register[MASTER_INTERRUPT_CONTROL] & MICR_PA_VIS; + bool pb_vis = m_register[MASTER_INTERRUPT_CONTROL] & MICR_PB_VIS; + + if (!mie || nv) + { + // no vector + } + else if ((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + { + data = get_timer_vector(ct_vis); + } + else if ((m_register[PORT_A_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) + { + data = get_port_a_vector(pa_vis); + } + else if ((m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + { + data = get_timer_vector(ct_vis); + } + else if ((m_register[PORT_B_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) + { + data = get_port_b_vector(pb_vis); + } + else if ((m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + { + data = get_timer_vector(ct_vis); + } + + return data; +} + +u8 cio_base_device::acknowledge_interrupt() +{ + u8 data = 0xff; + + bool mie = m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE; + bool nv = m_register[MASTER_INTERRUPT_CONTROL] & MICR_NV; + bool ct_vis = m_register[MASTER_INTERRUPT_CONTROL] & MICR_CT_VIS; + bool pa_vis = m_register[MASTER_INTERRUPT_CONTROL] & MICR_PA_VIS; + bool pb_vis = m_register[MASTER_INTERRUPT_CONTROL] & MICR_PB_VIS; + + if (!mie || nv) + { + LOG("%s: Z8536 Interrupt Acknowledge with No Vector\n", machine().describe_context()); + } + else if ((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + { + data = get_timer_vector(ct_vis); + + m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] |= CTCS_IUS; + + LOG("%s: Z8536 Counter/Timer 3 Interrupt Acknowledge with Vector %02x\n", machine().describe_context(), data); + } + else if ((m_register[PORT_A_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) + { + data = get_port_a_vector(pa_vis); + + m_register[PORT_A_COMMAND_AND_STATUS] |= PCS_IUS; + + LOG("%s: Z8536 Port A Interrupt Acknowledge with Vector %02x\n", machine().describe_context(), data); + } + else if ((m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + { + data = get_timer_vector(ct_vis); + + m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] |= CTCS_IUS; + + LOG("%s: Z8536 Counter/Timer 2 Interrupt Acknowledge with Vector %02x\n", machine().describe_context(), data); + } + else if ((m_register[PORT_B_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) + { + data = get_port_b_vector(pb_vis); + + m_register[PORT_B_COMMAND_AND_STATUS] |= PCS_IUS; + + LOG("%s: Z8536 Port B Interrupt Acknowledge with Vector %02x\n", machine().describe_context(), data); + } + else if ((m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) + { + data = get_timer_vector(ct_vis); + + m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] |= CTCS_IUS; + + LOG("%s: Z8536 Counter/Timer 1 Interrupt Acknowledge with Vector %02x\n", machine().describe_context(), data); + } + + return data; } @@ -144,26 +220,32 @@ void cio_base_device::get_interrupt_vector() void cio_base_device::check_interrupt() { - int state; + bool mie = m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE; + line_state state = CLEAR_LINE; + int ius_level = -1; + int ip_level = -1; - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE) + if (mie) { - if (((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) || - ((m_register[PORT_A_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) || - ((m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) || - ((m_register[PORT_B_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE | PCS_IUS)) == (PCS_IP | PCS_IE)) || - ((m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE))) + for (int i = 0; i < 5; i++) { - state = ASSERT_LINE; - } - else - { - state = CLEAR_LINE; + int level = 5 - i; + u8 reg = m_register[PRIORITY[i]]; + + if (reg & PCS_IUS) + { + ius_level = level; + } + else if ((reg & PCS_IE) && (reg & PCS_IP)) + { + ip_level = level; + } } } - else + + if (ip_level > ius_level) { - state = CLEAR_LINE; + state = ASSERT_LINE; } if (m_irq != state) @@ -183,8 +265,22 @@ u8 cio_base_device::read_register(offs_t offset) { u8 data; + bool mie = m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE; + switch (offset) { + case PORT_A_INTERRUPT_VECTOR: + data = get_port_a_vector(mie); + break; + + case PORT_B_INTERRUPT_VECTOR: + data = get_port_b_vector(mie); + break; + + case COUNTER_TIMER_INTERRUPT_VECTOR: + data = get_timer_vector(mie); + break; + case PORT_C_DATA_PATH_POLARITY: case PORT_C_DATA_DIRECTION: case PORT_C_SPECIAL_IO_CONTROL: @@ -252,8 +348,7 @@ u8 cio_base_device::read_register(offs_t offset) break; case CURRENT_VECTOR: - get_interrupt_vector(); - data = m_register[offset]; + data = get_current_vector(); break; default: @@ -304,6 +399,8 @@ void cio_base_device::write_register(offs_t offset, u8 data) LOG("%s CIO Right Justified Address: %u\n", machine().describe_context(), (data & MICR_RJA) ? 1 : 0); m_register[offset] = data; + + check_interrupt(); } break; @@ -324,17 +421,20 @@ void cio_base_device::write_register(offs_t offset, u8 data) if (!counter_enabled(counter)) m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS + counter] &= ~CTCS_RCC; } - if (!(m_register[MASTER_CONFIGURATION_CONTROL] & MCCR_CT1E)) { + if (!(m_register[MASTER_CONFIGURATION_CONTROL] & MCCR_CT1E)) + { // clear count in progress bit m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] &= ~CTCS_CIP; } - if (!(m_register[MASTER_CONFIGURATION_CONTROL] & MCCR_CT2E)) { + if (!(m_register[MASTER_CONFIGURATION_CONTROL] & MCCR_CT2E)) + { // clear count in progress bit m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] &= ~CTCS_CIP; } - if (!(m_register[MASTER_CONFIGURATION_CONTROL] & MCCR_PCE_CT3E)) { + if (!(m_register[MASTER_CONFIGURATION_CONTROL] & MCCR_PCE_CT3E)) + { // clear count in progress bit m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] &= ~CTCS_CIP; } @@ -406,7 +506,8 @@ void cio_base_device::write_register(offs_t offset, u8 data) LOG("%s CIO Counter/Timer %u Gate Command Bit: %u\n", machine().describe_context(), counter + 1, (data & CTCS_GCB) ? 1 : 0); LOG("%s CIO Counter/Timer %u Read Counter Control: %u\n", machine().describe_context(), counter + 1, (data & CTCS_RCC) ? 1 : 0); - switch (data >> 5) + int command = data >> 5; + switch (command) { case IC_CLEAR_IP_IUS: m_register[offset] &= ~(CTCS_IP | CTCS_ERR | CTCS_IUS); LOG("%s CIO Counter/Timer %u Clear IP/IUS\n", machine().describe_context(), counter + 1); break; case IC_SET_IUS: m_register[offset] |= CTCS_IUS; LOG("%s CIO Counter/Timer %u Set IUS\n", machine().describe_context(), counter + 1); break; @@ -417,6 +518,14 @@ void cio_base_device::write_register(offs_t offset, u8 data) case IC_CLEAR_IE: m_register[offset] &= ~CTCS_IE; LOG("%s CIO Counter/Timer %u Clear IE\n", machine().describe_context(), counter + 1); break; } + if (m_counter_error[counter] && (command == IC_CLEAR_IP_IUS || command == IC_CLEAR_IP)) + { + LOG("%s CIO Counter/Timer %u Interrupt Error\n", machine().describe_context(), counter + 1); + + m_register[offset] |= CTCS_IP | CTCS_ERR; + m_counter_error[counter] = false; + } + // gate command bit m_register[offset] = (m_register[offset] & ~CTCS_GCB) | (data & CTCS_GCB); @@ -678,10 +787,13 @@ void cio_base_device::count(int id) { if (m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS + id] & CTCS_IP) { - LOG("%s CIO Counter/Timer %u Error\n", machine().time().as_string(), id + 1); + if (!m_counter_error[id]) + { + LOG("%s CIO Counter/Timer %u Error\n", machine().time().as_string(), id + 1); + } // set interrupt error bit - m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS + id] |= CTCS_ERR; + m_counter_error[id] = true; } else { @@ -750,11 +862,12 @@ void cio_base_device::match_pattern(int port) u8 pms = m_register[PORT_A_MODE_SPECIFICATION + (port << 3)]; u8 pm = m_register[PORT_A_PATTERN_MASK + (port << 3)]; u8 ddr = m_register[PORT_A_DATA_DIRECTION + (port << 3)]; + u8 pol = m_register[PORT_A_PATTERN_POLARITY + (port << 3)]; switch ((pms & PMS_PMS_MASK) >> 1) { case PMS_OR_PEV: - m_match[port] = m_input[port] & ddr & pm; + m_match[port] = (m_input[port] ^ pol) & ddr & pm; if (m_match[port]) { @@ -853,6 +966,7 @@ void cio_base_device::device_start() m_output[i] = 0; m_buffer[i] = 0; m_match[i] = 0; + m_counter_error[i] = false; } // allocate timer @@ -866,6 +980,7 @@ void cio_base_device::device_start() save_item(NAME(m_buffer)); save_item(NAME(m_match)); save_item(NAME(m_counter)); + save_item(NAME(m_counter_error)); } void z8536_device::device_start() @@ -888,6 +1003,15 @@ void cio_base_device::device_reset() elem = 0; } + m_input[0] = m_read_pa(); + m_input[1] = m_read_pb(); + m_input[2] = m_read_pc(); + + for (int i = 0; i < 3; i++) + { + m_counter_error[i] = false; + } + m_register[MASTER_INTERRUPT_CONTROL] = MICR_RESET; m_register[PORT_A_COMMAND_AND_STATUS] = PCS_ORE; m_register[PORT_B_COMMAND_AND_STATUS] = PCS_ORE; @@ -943,25 +1067,16 @@ TIMER_CALLBACK_MEMBER(cio_base_device::advance_counters) int z8536_device::z80daisy_irq_state() { - static const int prio[] = - { - COUNTER_TIMER_3_COMMAND_AND_STATUS, - PORT_A_COMMAND_AND_STATUS, - COUNTER_TIMER_2_COMMAND_AND_STATUS, - PORT_B_COMMAND_AND_STATUS, - COUNTER_TIMER_1_COMMAND_AND_STATUS - }; - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_MIE) { for (int i = 0; i < 5; i++) { - if (m_register[prio[i]] & PCS_IUS) + if (m_register[PRIORITY[i]] & PCS_IUS) { // we are currently servicing an interrupt request return Z80_DAISY_IEO; } - else if ((m_register[prio[i]] & PCS_IE) && (m_register[prio[i]] & PCS_IP)) + else if ((m_register[PRIORITY[i]] & PCS_IE) && (m_register[PRIORITY[i]] & PCS_IP)) { // indicate that we have an interrupt request waiting return Z80_DAISY_INT; @@ -1000,42 +1115,11 @@ void z8536_device::z80daisy_irq_reti() int cio_base_device::intack_r() { - get_interrupt_vector(); - int data = m_register[CURRENT_VECTOR]; - - LOG("%s CIO Interrupt Acknowledge: %02x\n", machine().describe_context(), data); - - // set interrupt under service bit - if ((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE)) == (CTCS_IP | CTCS_IE)) - { - m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] |= CTCS_IUS; - } - else if ((m_register[PORT_A_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE)) == (PCS_IP | PCS_IE)) - { - m_register[PORT_A_COMMAND_AND_STATUS] |= PCS_IUS; - } - else if ((m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE)) == (CTCS_IP | CTCS_IE)) - { - m_register[COUNTER_TIMER_2_COMMAND_AND_STATUS] |= CTCS_IUS; - } - else if ((m_register[PORT_B_COMMAND_AND_STATUS] & (PCS_IP | PCS_IE)) == (PCS_IP | PCS_IE)) - { - m_register[PORT_B_COMMAND_AND_STATUS] |= PCS_IUS; - } - else if ((m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE)) == (CTCS_IP | CTCS_IE)) - { - m_register[COUNTER_TIMER_1_COMMAND_AND_STATUS] |= CTCS_IUS; - } + int data = acknowledge_interrupt(); check_interrupt(); - if (m_register[MASTER_INTERRUPT_CONTROL] & MICR_NV) - { - // no vector - data = -1; - } - - return data; + return data == 0xff ? -1 : data; } diff --git a/src/devices/machine/z8536.h b/src/devices/machine/z8536.h index fc984fed527..b96bdd58a72 100644 --- a/src/devices/machine/z8536.h +++ b/src/devices/machine/z8536.h @@ -362,7 +362,23 @@ protected: DCS_DO_NOT_USE }; - void get_interrupt_vector(); + + // interrupt priority + static constexpr int PRIORITY[] = + { + COUNTER_TIMER_3_COMMAND_AND_STATUS, + PORT_A_COMMAND_AND_STATUS, + COUNTER_TIMER_2_COMMAND_AND_STATUS, + PORT_B_COMMAND_AND_STATUS, + COUNTER_TIMER_1_COMMAND_AND_STATUS + }; + + + u8 get_port_a_vector(bool status); + u8 get_port_b_vector(bool status); + u8 get_timer_vector(bool status); + u8 get_current_vector(); + u8 acknowledge_interrupt(); void check_interrupt(); u8 read_register(offs_t offset); @@ -408,6 +424,7 @@ protected: // timers emu_timer *m_timer; u16 m_counter[3]; + bool m_counter_error[3]; }; // ======================> z8036_device diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 6358214f299..129eb6c1244 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -36,6 +36,7 @@ TODO: + - write to floppy fails with status 0x04 (lost byte) after commit 339bb2758640202e5378a1c2b1c19b2ef46fa1d9 - abcenix panics while booting after commit 78661e9aa92c7e43c9a96039e7dfb3dabc79a287 - systest1600 failures - CIO timer (works if CIO clock is 4219000) @@ -448,6 +449,8 @@ void abc1600_state::dmadis_w(int state) LOG("%s _DMADIS %d\n", machine().describe_context(), state); m_dmadis = state; + + update_br(); } From f0244b9f63d80afcc7dfda4ff71867205056aecc Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 4 Mar 2026 15:15:37 +0100 Subject: [PATCH 129/351] v60,v30mz: correction to addc/subc overflow flag calculation --- src/devices/cpu/v30mz/v30mz.cpp | 128 +++++++++++++++----------------- src/devices/cpu/v30mz/v30mz.h | 8 +- src/devices/cpu/v60/op12.hxx | 58 ++++++--------- src/devices/cpu/v60/op3.hxx | 20 ++--- src/devices/cpu/v60/v60.cpp | 12 +-- src/devices/cpu/v810/v810.cpp | 12 +-- 6 files changed, 103 insertions(+), 135 deletions(-) diff --git a/src/devices/cpu/v30mz/v30mz.cpp b/src/devices/cpu/v30mz/v30mz.cpp index cbdcf4aff47..e3c2fafcbb9 100644 --- a/src/devices/cpu/v30mz/v30mz.cpp +++ b/src/devices/cpu/v30mz/v30mz.cpp @@ -10,12 +10,12 @@ fetches limited on tight loops and is more than enough for the longest instruction. - Todo! - - Double check cycle timing is 100%. - - Add penalties when BW, BP, SP, IX, IY etc are changed in the immediately - preceding instruction. - - wswan mjkiwame (at 0x40141) has rep in al,$b5 (f3 e4 b5). Should this - repeat the in instruction or is this a bug made by the programmer? + TODO: + - Double check cycle timing is 100%. + * Add penalties when BW, BP, SP, IX, IY etc are changed in the immediately + preceding instruction. + * wswan mjkiwame (at 0x40141) has rep in al,$b5 (f3 e4 b5). Should this + repeat the in instruction or is this a bug made by the programmer? ****************************************************************************/ @@ -1015,9 +1015,9 @@ inline void v30mz_cpu_device::i_popf() } -inline void v30mz_cpu_device::add_byte() +inline void v30mz_cpu_device::add_byte(uint8_t c) { - uint32_t res = (m_dst & 0xff) + (m_src & 0xff); + uint32_t res = (m_dst & 0xff) + (m_src & 0xff) + c; set_CF_byte(res); set_OF_byte_add(res, m_src, m_dst); @@ -1027,9 +1027,9 @@ inline void v30mz_cpu_device::add_byte() } -inline void v30mz_cpu_device::add_word() +inline void v30mz_cpu_device::add_word(uint8_t c) { - uint32_t res = (m_dst & 0xffff) + (m_src & 0xffff); + uint32_t res = (m_dst & 0xffff) + (m_src & 0xffff) + c; set_CF_word(res); set_OF_word_add(res, m_src, m_dst); @@ -1039,9 +1039,9 @@ inline void v30mz_cpu_device::add_word() } -inline void v30mz_cpu_device::sub_byte() +inline void v30mz_cpu_device::sub_byte(uint8_t c) { - uint32_t res = (m_dst & 0xff) - (m_src & 0xff); + uint32_t res = (m_dst & 0xff) - (m_src & 0xff) - c; set_CF_byte(res); set_OF_byte_sub(res, m_src, m_dst); @@ -1051,9 +1051,9 @@ inline void v30mz_cpu_device::sub_byte() } -inline void v30mz_cpu_device::sub_word() +inline void v30mz_cpu_device::sub_word(uint8_t c) { - uint32_t res = (m_dst & 0xffff) - (m_src & 0xffff); + uint32_t res = (m_dst & 0xffff) - (m_src & 0xffff) - c; set_CF_word(res); set_OF_word_sub(res, m_src, m_dst); @@ -1563,48 +1563,42 @@ void v30mz_cpu_device::execute_run() case 0x10: // i_adc_br8 def_br8(); - m_src += CF ? 1 : 0; - add_byte(); + add_byte(CF ? 1 : 0); store_ea_rm_byte(m_dst); clkm(1,3); break; case 0x11: // i_adc_wr16 def_wr16(); - m_src += CF ? 1 : 0; - add_word(); + add_word(CF ? 1 : 0); store_ea_rm_word(m_dst); clkm(1,3); break; case 0x12: // i_adc_r8b def_r8b(); - m_src += CF ? 1 : 0; - add_byte(); + add_byte(CF ? 1 : 0); reg_byte(m_dst); clkm(1,2); break; case 0x13: // i_adc_r16w def_r16w(); - m_src += CF ? 1 : 0; - add_word(); + add_word(CF ? 1 : 0); reg_word(m_dst); clkm(1,2); break; case 0x14: // i_adc_ald8 def_ald8(); - m_src += CF ? 1 : 0; - add_byte(); + add_byte(CF ? 1 : 0); m_regs.b[AL] = m_dst; clk(1); break; case 0x15: // i_adc_axd16 def_awd16(); - m_src += CF ? 1 : 0; - add_word(); + add_word(CF ? 1 : 0); m_regs.w[AW] = m_dst; clk(1); break; @@ -1623,48 +1617,42 @@ void v30mz_cpu_device::execute_run() case 0x18: // i_sbb_br8 def_br8(); - m_src += CF ? 1 : 0; - sub_byte(); + sub_byte(CF ? 1 : 0); store_ea_rm_byte(m_dst); clkm(1,3); break; case 0x19: // i_sbb_wr16 def_wr16(); - m_src += CF ? 1 : 0; - sub_word(); + sub_word(CF ? 1 : 0); store_ea_rm_word(m_dst); clkm(1,3); break; case 0x1a: // i_sbb_r8b def_r8b(); - m_src += CF ? 1 : 0; - sub_byte(); + sub_byte(CF ? 1 : 0); reg_byte(m_dst); clkm(1,2); break; case 0x1b: // i_sbb_r16w def_r16w(); - m_src += CF ? 1 : 0; - sub_word(); + sub_word(CF ? 1 : 0); reg_word(m_dst); clkm(1,2); break; case 0x1c: // i_sbb_ald8 def_ald8(); - m_src += CF ? 1 : 0; - sub_byte(); + sub_byte(CF ? 1 : 0); m_regs.b[AL] = m_dst; clk(1); break; case 0x1d: // i_sbb_axd16 def_awd16(); - m_src += CF ? 1 : 0; - sub_word(); + sub_word(CF ? 1 : 0); m_regs.w[AW] = m_dst; clk(1); break; @@ -2309,14 +2297,14 @@ void v30mz_cpu_device::execute_run() else { clk(3); } switch (m_modrm & 0x38) { - case 0x00: add_byte(); store_ea_rm_byte(m_dst); break; - case 0x08: or_byte(); store_ea_rm_byte(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; add_byte(); store_ea_rm_byte(m_dst); break; - case 0x18: m_src += CF ? 1 : 0; sub_byte(); store_ea_rm_byte(m_dst); break; - case 0x20: and_byte(); store_ea_rm_byte(m_dst); break; - case 0x28: sub_byte(); store_ea_rm_byte(m_dst); break; - case 0x30: xor_byte(); store_ea_rm_byte(m_dst); break; - case 0x38: sub_byte(); break; // CMP + case 0x00: add_byte(); store_ea_rm_byte(m_dst); break; + case 0x08: or_byte(); store_ea_rm_byte(m_dst); break; + case 0x10: add_byte(CF ? 1 : 0); store_ea_rm_byte(m_dst); break; + case 0x18: sub_byte(CF ? 1 : 0); store_ea_rm_byte(m_dst); break; + case 0x20: and_byte(); store_ea_rm_byte(m_dst); break; + case 0x28: sub_byte(); store_ea_rm_byte(m_dst); break; + case 0x30: xor_byte(); store_ea_rm_byte(m_dst); break; + case 0x38: sub_byte(); break; // CMP } break; @@ -2330,14 +2318,14 @@ void v30mz_cpu_device::execute_run() else { clk(3); } switch (m_modrm & 0x38) { - case 0x00: add_word(); store_ea_rm_word(m_dst); break; - case 0x08: or_word(); store_ea_rm_word(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; add_word(); store_ea_rm_word(m_dst); break; - case 0x18: m_src += CF ? 1 : 0; sub_word(); store_ea_rm_word(m_dst); break; - case 0x20: and_word(); store_ea_rm_word(m_dst); break; - case 0x28: sub_word(); store_ea_rm_word(m_dst); break; - case 0x30: xor_word(); store_ea_rm_word(m_dst); break; - case 0x38: sub_word(); break; // CMP + case 0x00: add_word(); store_ea_rm_word(m_dst); break; + case 0x08: or_word(); store_ea_rm_word(m_dst); break; + case 0x10: add_word(CF ? 1 : 0); store_ea_rm_word(m_dst); break; + case 0x18: sub_word(CF ? 1 : 0); store_ea_rm_word(m_dst); break; + case 0x20: and_word(); store_ea_rm_word(m_dst); break; + case 0x28: sub_word(); store_ea_rm_word(m_dst); break; + case 0x30: xor_word(); store_ea_rm_word(m_dst); break; + case 0x38: sub_word(); break; // CMP } break; @@ -2351,14 +2339,14 @@ void v30mz_cpu_device::execute_run() else { clk(3); } switch (m_modrm & 0x38) { - case 0x00: add_byte(); store_ea_rm_byte(m_dst); break; - case 0x08: or_byte(); store_ea_rm_byte(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; add_byte(); store_ea_rm_byte(m_dst); break; - case 0x18: m_src += CF ? 1 : 0; sub_byte(); store_ea_rm_byte(m_dst); break; - case 0x20: and_byte(); store_ea_rm_byte(m_dst); break; - case 0x28: sub_byte(); store_ea_rm_byte(m_dst); break; - case 0x30: xor_byte(); store_ea_rm_byte(m_dst); break; - case 0x38: sub_byte(); break; // CMP + case 0x00: add_byte(); store_ea_rm_byte(m_dst); break; + case 0x08: or_byte(); store_ea_rm_byte(m_dst); break; + case 0x10: add_byte(CF ? 1 : 0); store_ea_rm_byte(m_dst); break; + case 0x18: sub_byte(CF ? 1 : 0); store_ea_rm_byte(m_dst); break; + case 0x20: and_byte(); store_ea_rm_byte(m_dst); break; + case 0x28: sub_byte(); store_ea_rm_byte(m_dst); break; + case 0x30: xor_byte(); store_ea_rm_byte(m_dst); break; + case 0x38: sub_byte(); break; // CMP } break; @@ -2372,14 +2360,14 @@ void v30mz_cpu_device::execute_run() else { clk(3); } switch (m_modrm & 0x38) { - case 0x00: add_word(); store_ea_rm_word(m_dst); break; - case 0x08: or_word(); store_ea_rm_word(m_dst); break; - case 0x10: m_src += CF ? 1 : 0; add_word(); store_ea_rm_word(m_dst); break; - case 0x18: m_src += CF ? 1 : 0; sub_word(); store_ea_rm_word(m_dst); break; - case 0x20: and_word(); store_ea_rm_word(m_dst); break; - case 0x28: sub_word(); store_ea_rm_word(m_dst); break; - case 0x30: xor_word(); store_ea_rm_word(m_dst); break; - case 0x38: sub_word(); break; // CMP + case 0x00: add_word(); store_ea_rm_word(m_dst); break; + case 0x08: or_word(); store_ea_rm_word(m_dst); break; + case 0x10: add_word(CF ? 1 : 0); store_ea_rm_word(m_dst); break; + case 0x18: sub_word(CF ? 1 : 0); store_ea_rm_word(m_dst); break; + case 0x20: and_word(); store_ea_rm_word(m_dst); break; + case 0x28: sub_word(); store_ea_rm_word(m_dst); break; + case 0x30: xor_word(); store_ea_rm_word(m_dst); break; + case 0x38: sub_word(); break; // CMP } break; diff --git a/src/devices/cpu/v30mz/v30mz.h b/src/devices/cpu/v30mz/v30mz.h index da1612977ff..6ea996675f5 100644 --- a/src/devices/cpu/v30mz/v30mz.h +++ b/src/devices/cpu/v30mz/v30mz.h @@ -132,10 +132,10 @@ protected: inline void i_popf(); // sub implementations - inline void add_byte(); - inline void add_word(); - inline void sub_byte(); - inline void sub_word(); + inline void add_byte(uint8_t c = 0); + inline void add_word(uint8_t c = 0); + inline void sub_byte(uint8_t c = 0); + inline void sub_word(uint8_t c = 0); inline void or_byte(); inline void or_word(); inline void and_byte(); diff --git a/src/devices/cpu/v60/op12.hxx b/src/devices/cpu/v60/op12.hxx index 742a486e564..b4074eae34b 100644 --- a/src/devices/cpu/v60/op12.hxx +++ b/src/devices/cpu/v60/op12.hxx @@ -273,7 +273,7 @@ uint32_t v60_device::opADDB() /* TRUSTED (C too!)*/ F12LOADOP2BYTE(); - ADDB(appb, (uint8_t)m_op1); + ADDB(appb, (uint8_t)m_op1, 0); F12STOREOP2BYTE(); F12END(); @@ -286,7 +286,7 @@ uint32_t v60_device::opADDH() /* TRUSTED (C too!)*/ F12LOADOP2HALF(); - ADDW(apph, (uint16_t)m_op1); + ADDW(apph, (uint16_t)m_op1, 0); F12STOREOP2HALF(); F12END(); @@ -299,7 +299,7 @@ uint32_t v60_device::opADDW() /* TRUSTED (C too!) */ F12LOADOP2WORD(); - ADDL(appw, (uint32_t)m_op1); + ADDL(appw, (uint32_t)m_op1, 0); F12STOREOP2WORD(); F12END(); @@ -307,14 +307,12 @@ uint32_t v60_device::opADDW() /* TRUSTED (C too!) */ uint32_t v60_device::opADDCB() { - uint8_t appb, temp; - + uint8_t appb; F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0); F12LOADOP2BYTE(); - temp = ((uint8_t)m_op1 + (_CY?1:0)); - ADDB(appb, temp); + ADDB(appb, (uint8_t)m_op1, _CY?1:0); F12STOREOP2BYTE(); F12END(); @@ -322,14 +320,12 @@ uint32_t v60_device::opADDCB() uint32_t v60_device::opADDCH() { - uint16_t apph, temp; - + uint16_t apph; F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1); F12LOADOP2HALF(); - temp = ((uint16_t)m_op1 + (_CY?1:0)); - ADDW(apph, temp); + ADDW(apph, (uint16_t)m_op1, _CY?1:0); F12STOREOP2HALF(); F12END(); @@ -337,14 +333,12 @@ uint32_t v60_device::opADDCH() uint32_t v60_device::opADDCW() { - uint32_t appw, temp; - + uint32_t appw; F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2); F12LOADOP2WORD(); - temp = m_op1 + (_CY?1:0); - ADDL(appw, temp); + ADDL(appw, (uint32_t)m_op1, _CY?1:0); F12STOREOP2WORD(); F12END(); @@ -501,7 +495,7 @@ uint32_t v60_device::opCMPB() /* TRUSTED (C too!) */ F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAM, 0); appb = (uint8_t)m_op2; - SUBB(appb, (uint8_t)m_op1); + SUBB(appb, (uint8_t)m_op1, 0); F12END(); } @@ -512,7 +506,7 @@ uint32_t v60_device::opCMPH() /* TRUSTED (C too!) */ F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAM, 1); apph = (uint16_t)m_op2; - SUBW(apph, (uint16_t)m_op1); + SUBW(apph, (uint16_t)m_op1, 0); F12END(); } @@ -522,7 +516,7 @@ uint32_t v60_device::opCMPW() /* TRUSTED (C too!)*/ { F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAM, 2); - SUBL(m_op2, (uint32_t)m_op1); + SUBL(m_op2, (uint32_t)m_op1, 0); F12END(); } @@ -1076,7 +1070,7 @@ uint32_t v60_device::opNEGB() /* TRUSTED (C too!)*/ F12DecodeFirstOperand(&v60_device::ReadAM, 0); m_modwritevalb = 0; - SUBB(m_modwritevalb, (int8_t)m_op1); + SUBB(m_modwritevalb, (int8_t)m_op1, 0); _CY = m_modwritevalb ? 1 : 0; F12WriteSecondOperand(0); @@ -1088,7 +1082,7 @@ uint32_t v60_device::opNEGH() /* TRUSTED (C too!)*/ F12DecodeFirstOperand(&v60_device::ReadAM, 1); m_modwritevalh = 0; - SUBW(m_modwritevalh, (int16_t)m_op1); + SUBW(m_modwritevalh, (int16_t)m_op1, 0); _CY = m_modwritevalh ? 1 : 0; F12WriteSecondOperand(1); @@ -1100,7 +1094,7 @@ uint32_t v60_device::opNEGW() /* TRUSTED (C too!)*/ F12DecodeFirstOperand(&v60_device::ReadAM, 2); m_modwritevalw = 0; - SUBL(m_modwritevalw, (int32_t)m_op1); + SUBL(m_modwritevalw, (int32_t)m_op1, 0); _CY = m_modwritevalw ? 1 : 0; F12WriteSecondOperand(2); @@ -2048,7 +2042,7 @@ uint32_t v60_device::opSHLW() /* TRUSTED */ } } -// osd_printf_debug("SHLW: %x _CY: %d _Z: %d _OV: %d _S: %d\n", appw, _CY, _Z, _OV, _S); + //osd_printf_debug("SHLW: %x _CY: %d _Z: %d _OV: %d _S: %d\n", appw, _CY, _Z, _OV, _S); F12STOREOP2WORD(); F12END(); @@ -2075,7 +2069,7 @@ uint32_t v60_device::opSUBB() /* TRUSTED (C too!) */ F12LOADOP2BYTE(); - SUBB(appb, (uint8_t)m_op1); + SUBB(appb, (uint8_t)m_op1, 0); F12STOREOP2BYTE(); F12END(); @@ -2088,7 +2082,7 @@ uint32_t v60_device::opSUBH() /* TRUSTED (C too!) */ F12LOADOP2HALF(); - SUBW(apph, (uint16_t)m_op1); + SUBW(apph, (uint16_t)m_op1, 0); F12STOREOP2HALF(); F12END(); @@ -2101,7 +2095,7 @@ uint32_t v60_device::opSUBW() /* TRUSTED (C too!) */ F12LOADOP2WORD(); - SUBL(appw, (uint32_t)m_op1); + SUBL(appw, (uint32_t)m_op1, 0); F12STOREOP2WORD(); F12END(); @@ -2111,13 +2105,11 @@ uint32_t v60_device::opSUBW() /* TRUSTED (C too!) */ uint32_t v60_device::opSUBCB() { uint8_t appb; - uint8_t src; F12DecodeOperands(&v60_device::ReadAM, 0,&v60_device::ReadAMAddress, 0); F12LOADOP2BYTE(); - src = (uint8_t)m_op1 + (_CY?1:0); - SUBB(appb, src); + SUBB(appb, (uint8_t)m_op1, _CY?1:0); F12STOREOP2BYTE(); F12END(); @@ -2126,14 +2118,11 @@ uint32_t v60_device::opSUBCB() uint32_t v60_device::opSUBCH() { uint16_t apph; - uint16_t src; - F12DecodeOperands(&v60_device::ReadAM, 1,&v60_device::ReadAMAddress, 1); F12LOADOP2HALF(); - src = (uint16_t)m_op1 + (_CY?1:0); - SUBW(apph, src); + SUBW(apph, (uint16_t)m_op1, _CY?1:0); F12STOREOP2HALF(); F12END(); @@ -2142,14 +2131,11 @@ uint32_t v60_device::opSUBCH() uint32_t v60_device::opSUBCW() { uint32_t appw; - uint32_t src; - F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 2); F12LOADOP2WORD(); - src = (uint32_t)m_op1 + (_CY?1:0); - SUBL(appw, src); + SUBL(appw, (uint32_t)m_op1, _CY?1:0); F12STOREOP2WORD(); F12END(); diff --git a/src/devices/cpu/v60/op3.hxx b/src/devices/cpu/v60/op3.hxx index 0dac42beaaf..b139cef7dc2 100644 --- a/src/devices/cpu/v60/op3.hxx +++ b/src/devices/cpu/v60/op3.hxx @@ -13,7 +13,7 @@ uint32_t v60_device::opINCB() /* TRUSTED */ else appb = m_program->read_byte(m_amout); - ADDB(appb, 1); + ADDB(appb, 1, 0); if (m_amflag) SETREG8(m_reg[m_amout], appb); @@ -36,7 +36,7 @@ uint32_t v60_device::opINCH() /* TRUSTED */ else apph = m_program->read_word_unaligned(m_amout); - ADDW(apph, 1); + ADDW(apph, 1, 0); if (m_amflag) SETREG16(m_reg[m_amout], apph); @@ -59,7 +59,7 @@ uint32_t v60_device::opINCW() /* TRUSTED */ else appw = m_program->read_dword_unaligned(m_amout); - ADDL(appw, 1); + ADDL(appw, 1, 0); if (m_amflag) m_reg[m_amout] = appw; @@ -82,7 +82,7 @@ uint32_t v60_device::opDECB() /* TRUSTED */ else appb = m_program->read_byte(m_amout); - SUBB(appb, 1); + SUBB(appb, 1, 0); if (m_amflag) SETREG8(m_reg[m_amout], appb); @@ -105,7 +105,7 @@ uint32_t v60_device::opDECH() /* TRUSTED */ else apph = m_program->read_word_unaligned(m_amout); - SUBW(apph, 1); + SUBW(apph, 1, 0); if (m_amflag) SETREG16(m_reg[m_amout], apph); @@ -128,7 +128,7 @@ uint32_t v60_device::opDECW() /* TRUSTED */ else appw = m_program->read_dword_unaligned(m_amout); - SUBL(appw, 1); + SUBL(appw, 1, 0); if (m_amflag) m_reg[m_amout] = appw; @@ -417,18 +417,18 @@ uint32_t v60_device::opTASI() // Load uint8_t from the address if (m_amflag) - appb = (uint8_t)m_reg[m_amout & 0x1F]; + appb = (uint8_t)m_reg[m_amout & 0x1f]; else appb = m_program->read_byte(m_amout); // Set the flags for SUB appb, FF - SUBB(appb, 0xff); + SUBB(appb, 0xff, 0); // Write FF in the operand if (m_amflag) - SETREG8(m_reg[m_amout & 0x1F], 0xFF); + SETREG8(m_reg[m_amout & 0x1f], 0xff); else - m_program->write_byte(m_amout, 0xFF); + m_program->write_byte(m_amout, 0xff); return m_amlength1 + 1; } diff --git a/src/devices/cpu/v60/v60.cpp b/src/devices/cpu/v60/v60.cpp index 32cf642e34b..36671c7cee7 100644 --- a/src/devices/cpu/v60/v60.cpp +++ b/src/devices/cpu/v60/v60.cpp @@ -163,13 +163,13 @@ std::unique_ptr v60_device::create_disassembler() #define XORW(dst, src) { (dst) ^= (src); _OV = 0; SetSZPF_Word(dst); } #define XORL(dst, src) { (dst) ^= (src); _OV = 0; SetSZPF_Long(dst); } -#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; } -#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; } -#define SUBL(dst, src) { uint64_t res = (uint64_t)(dst) - (int64_t)(src); SetCFL(res); SetOFL_Sub(res, src, dst); SetSZPF_Long(res); dst = (uint32_t)res; } +#define SUBB(dst, src, c) { unsigned res = (dst) - (src) - (c); SetCFB(res); SetOFB_Sub(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; } +#define SUBW(dst, src, c) { unsigned res = (dst) - (src) - (c); SetCFW(res); SetOFW_Sub(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; } +#define SUBL(dst, src, c) { uint64_t res = (uint64_t)(dst) - (int64_t)(src) - (c); SetCFL(res); SetOFL_Sub(res, src, dst); SetSZPF_Long(res); dst = (uint32_t)res; } -#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; } -#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; } -#define ADDL(dst, src) { uint64_t res = (uint64_t)(dst) + (uint64_t)(src); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (uint32_t)res; } +#define ADDB(dst, src, c) { unsigned res = (dst) + (src) + (c); SetCFB(res); SetOFB_Add(res, src, dst); SetSZPF_Byte(res); dst = (uint8_t)res; } +#define ADDW(dst, src, c) { unsigned res = (dst) + (src) + (c); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (uint16_t)res; } +#define ADDL(dst, src, c) { uint64_t res = (uint64_t)(dst) + (uint64_t)(src) + (c); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (uint32_t)res; } #define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff) #define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff) diff --git a/src/devices/cpu/v810/v810.cpp b/src/devices/cpu/v810/v810.cpp index 058a9f976cb..0c90b737c8f 100644 --- a/src/devices/cpu/v810/v810.cpp +++ b/src/devices/cpu/v810/v810.cpp @@ -179,15 +179,9 @@ std::unique_ptr v810_device::create_disassembler() #define SO(opcode) (((opcode)&0xfc00)>>10) #define CHECK_CY(x) PSW=(PSW & ~8)|(((x) & (((uint64_t)1) << 32)) ? 8 : 0) -#define CHECK_OVADD(x,y,z) PSW=(PSW & ~0x00000004) |(( ((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 4: 0) -#define CHECK_OVSUB(x,y,z) PSW=(PSW & ~0x00000004) |(( ((y) ^ (z)) & ((x) ^ (y)) & 0x80000000) ? 4: 0) -#define CHECK_ZS(x) PSW=(PSW & ~3)|((uint32_t)(x)==0)|(((x)&0x80000000) ? 2: 0) - - -#define ADD(dst, src) { uint64_t res=(uint64_t)(dst)+(uint64_t)(src); SetCF(res); SetOF_Add(res,src,dst); SetSZPF(res); dst=(uint32_t)res; } -#define SUB(dst, src) { uint64_t res=(uint64_t)(dst)-(int64_t)(src); SetCF(res); SetOF_Sub(res,src,dst); SetSZPF(res); dst=(uint32_t)res; } - - +#define CHECK_OVADD(x,y,z) PSW=(PSW & ~0x00000004) |(( ((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 4 : 0) +#define CHECK_OVSUB(x,y,z) PSW=(PSW & ~0x00000004) |(( ((y) ^ (z)) & ((x) ^ (y)) & 0x80000000) ? 4 : 0) +#define CHECK_ZS(x) PSW=(PSW & ~3)|((uint32_t)(x)==0)|(((x)&0x80000000) ? 2 : 0) // r0 is literally a "register zero", reading returns 0, writing is ignored. From 0ee08158e3aee4d66ba401e58b30f46f18fdeade Mon Sep 17 00:00:00 2001 From: wilbertpol Date: Wed, 4 Mar 2026 16:42:41 +0100 Subject: [PATCH 130/351] nakajima/nakajies.cpp: Use an array of views. (#15045) --- src/mame/nakajima/nakajies.cpp | 79 ++++++++-------------------------- 1 file changed, 19 insertions(+), 60 deletions(-) diff --git a/src/mame/nakajima/nakajies.cpp b/src/mame/nakajima/nakajies.cpp index a5a4639c969..4506c368d4b 100644 --- a/src/mame/nakajima/nakajies.cpp +++ b/src/mame/nakajima/nakajies.cpp @@ -300,14 +300,10 @@ public: : driver_device(mconfig, type, tag) , m_maincpu(*this, "v20hl") , m_rtc(*this, "rtc") - , m_view0(*this, "view0") - , m_view1(*this, "view1") - , m_view2(*this, "view2") - , m_view3(*this, "view3") - , m_view4(*this, "view4") - , m_view5(*this, "view5") - , m_view6(*this, "view6") - , m_view7(*this, "view7") + , m_view{ + {*this, "view_0"}, {*this, "view_1"}, {*this, "view_2"}, {*this, "view_3"}, + {*this, "view_4"}, {*this, "view_5"}, {*this, "view_6"}, {*this, "view_7"} + } , m_port_row(*this, "ROW%u", 0U) , m_port_debug(*this, "debug") , m_rombank(*this, "rombank%u", 0U) @@ -348,14 +344,7 @@ private: required_device m_maincpu; required_device m_rtc; - memory_view m_view0; - memory_view m_view1; - memory_view m_view2; - memory_view m_view3; - memory_view m_view4; - memory_view m_view5; - memory_view m_view6; - memory_view m_view7; + memory_view m_view[8]; required_ioport_array<10> m_port_row; required_ioport m_port_debug; memory_bank_array_creator<8> m_rombank; @@ -373,30 +362,14 @@ private: void nakajies_state::nakajies_map(address_map &map) { - map(0x00000, 0x1ffff).view(m_view0); - m_view0[0](0x00000, 0x1ffff).bankr(m_rombank[0]); - m_view0[1](0x00000, 0x1ffff).bankrw(m_rambank[0]); - map(0x20000, 0x3ffff).view(m_view1); - m_view1[0](0x20000, 0x3ffff).bankr(m_rombank[1]); - m_view1[1](0x20000, 0x3ffff).bankrw(m_rambank[1]); - map(0x40000, 0x5ffff).view(m_view2); - m_view2[0](0x40000, 0x5ffff).bankr(m_rombank[2]); - m_view2[1](0x40000, 0x5ffff).bankrw(m_rambank[2]); - map(0x60000, 0x7ffff).view(m_view3); - m_view3[0](0x60000, 0x7ffff).bankr(m_rombank[3]); - m_view3[1](0x60000, 0x7ffff).bankrw(m_rambank[3]); - map(0x80000, 0x9ffff).view(m_view4); - m_view4[0](0x80000, 0x9ffff).bankr(m_rombank[4]); - m_view4[1](0x80000, 0x9ffff).bankrw(m_rambank[4]); - map(0xa0000, 0xbffff).view(m_view5); - m_view5[0](0xa0000, 0xbffff).bankr(m_rombank[5]); - m_view5[1](0xa0000, 0xbffff).bankrw(m_rambank[5]); - map(0xc0000, 0xdffff).view(m_view6); - m_view6[0](0xc0000, 0xdffff).bankr(m_rombank[6]); - m_view6[1](0xc0000, 0xdffff).bankrw(m_rambank[6]); - map(0xe0000, 0xfffff).view(m_view7); - m_view7[0](0xe0000, 0xfffff).bankr(m_rombank[7]); - m_view7[1](0xe0000, 0xfffff).bankrw(m_rambank[7]); + for (int i = 0; i < 8; i++) + { + const offs_t start = i * 0x20000; + const offs_t end = start + 0x1ffff; + map(start, end).view(m_view[i]); + m_view[i][0](start, end).bankr(m_rombank[i]); + m_view[i][1](start, end).bankrw(m_rambank[i]); + } } @@ -475,18 +448,7 @@ void nakajies_state::banking_w(offs_t offset, u8 data) { m_rombank[offset]->set_entry((data & 0x0f) ^ 0xf); m_rambank[offset]->set_entry((data & 0x0f) ^ 0xf); - - switch (offset) - { - case 0: m_view0.select(BIT(data, 4)); break; - case 1: m_view1.select(BIT(data, 4)); break; - case 2: m_view2.select(BIT(data, 4)); break; - case 3: m_view3.select(BIT(data, 4)); break; - case 4: m_view4.select(BIT(data, 4)); break; - case 5: m_view5.select(BIT(data, 4)); break; - case 6: m_view6.select(BIT(data, 4)); break; - case 7: m_view7.select(BIT(data, 4)); break; - } + m_view[offset].select(BIT(data, 4)); } @@ -659,14 +621,11 @@ void nakajies_state::machine_reset() m_lcd_memory_start = 0; m_matrix = 0; - m_view0.select(0); - m_view1.select(0); - m_view2.select(0); - m_view3.select(0); - m_view4.select(0); - m_view5.select(0); - m_view6.select(0); - m_view7.select(0); + for (int i = 0; i < 8; i++) + { + m_view[i].select(0); + } + for (int i = 0; i < 8; i++) { m_rombank[i]->set_entry(0x0f); From d18fa74d69d49353f4e6dd3fd0afd9dd6591a30d Mon Sep 17 00:00:00 2001 From: holub Date: Wed, 4 Mar 2026 10:50:39 -0500 Subject: [PATCH 131/351] sinclair/specnext.cpp: KS1..3 variants as clones; Added v30204 BIOS options. (#14997) New working clones ---------------------- SpecNext Ltd., Victor Trucco, Fabio Belavenuto ZX Spectrum Next: KS1 SpecNext Ltd., Victor Trucco, Fabio Belavenuto ZX Spectrum Next: KS2 SpecNext Ltd., Victor Trucco, Fabio Belavenuto ZX Spectrum Next: KS3 --- src/mame/mame.lst | 3 + src/mame/sinclair/chloe.cpp | 2 +- src/mame/sinclair/specnext.cpp | 147 +++++++++++++++++--------- src/mame/sinclair/specnext_layer2.cpp | 2 +- 4 files changed, 103 insertions(+), 51 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index aaafcad9a44..9b920710598 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -43621,6 +43621,9 @@ zx97 @source:sinclair/specnext.cpp tbblue +specnext_ks1 +specnext_ks2 +specnext_ks3 @source:sinclair/z88.cpp z88 diff --git a/src/mame/sinclair/chloe.cpp b/src/mame/sinclair/chloe.cpp index b6cab842d3e..4d35162e9fa 100644 --- a/src/mame/sinclair/chloe.cpp +++ b/src/mame/sinclair/chloe.cpp @@ -840,7 +840,7 @@ void chloe_state::machine_start() save_item(NAME(m_reg_selected)); save_item(NAME(m_divmmc_paged)); save_item(NAME(m_divmmc_ctrl)); - save_pointer(NAME(m_uno_regs_data), 256); + save_item(NAME(m_uno_regs_data)); save_item(NAME(m_palpen_selected)); save_item(NAME(m_dma_hilo)); save_item(NAME(m_dma_src_latch)); diff --git a/src/mame/sinclair/specnext.cpp b/src/mame/sinclair/specnext.cpp index 8609e8356df..a7dacdac561 100644 --- a/src/mame/sinclair/specnext.cpp +++ b/src/mame/sinclair/specnext.cpp @@ -6,14 +6,11 @@ Versions: TBBlue 1.2, Issue 0, Issue 1, Issue 2, Issue 2B (Kickstarter 1), Issue 2D, Issue 2E, Issue 2H, - Issue 4 (Kickstarter 2) + Issue 4 (Kickstarter 2), Issue 5 (Kickstarter 3) Current implementation is based on Issue 4. Only limited difference tracked through PORT_CONFIG TODO: - * identify ctc channel for INT purpose - * interrupt DMA on INT - * improve zxnDMA * contention * internal_port_enable() support * (1) invalidate tiles/sprites caches on region w, not every frame @@ -135,7 +132,6 @@ public: , m_layer2(*this, "layer2") , m_lores(*this, "lores") , m_sprites(*this, "sprites") - , m_io_issue(*this, "ISSUE") , m_io_video(*this, "VIDEO") , m_io_layers(*this, "LYRS") , m_io_mouse(*this, "mouse_input%u", 1U) @@ -144,6 +140,9 @@ public: {} void tbblue(machine_config &config); + void ks1(machine_config &config); + void ks2(machine_config &config); + void ks3(machine_config &config); INPUT_CHANGED_MEMBER(on_mf_nmi); INPUT_CHANGED_MEMBER(on_divmmc_nmi); @@ -197,9 +196,6 @@ protected: required_device m_maincpu; private: - static const u8 MACHINE_TBBLUE = 0x08; - static const u8 MACHINE_NEXT = 0x0a; - static const u8 MACHINE_NEXT_AB = 0xfa; // Anti Brick (reset disabled, bootrom) static const u8 G_VERSION = 0x32; // 3.02 static const u8 G_SUB_VERSION = 0x04; static const u8 G_VIDEO_INC = 0b11; @@ -214,8 +210,8 @@ private: void line_irq_adjust(); void irq_w(int state); - u8 g_machine_id() { return m_io_issue->read() ? MACHINE_NEXT : MACHINE_TBBLUE; } - u8 g_board_issue() { return m_io_issue->read(); } + u8 g_machine_id() { return m_machine_id; } + u8 g_board_issue() { return m_board_issue; } bool machine_type_48() const { return m_nr_03_machine_type == 0 || m_nr_03_machine_type == 1; } bool machine_type_128() const { return m_nr_03_machine_type == 2 || m_nr_03_machine_type == 4; } bool machine_type_p3() const { return !machine_type_48() && !machine_type_128(); } @@ -367,19 +363,22 @@ private: required_device m_layer2; required_device m_lores; required_device m_sprites; - required_ioport m_io_issue; optional_ioport m_io_video; optional_ioport m_io_layers; required_ioport_array<4> m_io_mouse; required_ioport m_io_joy_left; required_ioport m_io_joy_right; + u8 m_machine_id; + u8 m_board_issue; + u16 m_ram_pages; + bitmap_rgb32 m_blendprio_bitmap; video_timings_info m_video_timings; rectangle m_clip256x192; rectangle m_clip320x256; int m_video_output_hdmi = -1; - int m_page_shadow[8]; + int m_page_shadow[8] = {-1, -1, -1, -1, -1, -1, -1, -1}; bool m_bootrom_en; u8 m_port_ff_data; bool m_port_1ffd_special_old; @@ -626,7 +625,7 @@ void specnext_state::bank_update(u8 bank) const bool is_rom = (bank >> 1) == 0; if (m_bootrom_en && is_rom) - return views[bank].get().select(1); + return views[bank].get().select(2); if (machine_type_48()) { @@ -818,22 +817,24 @@ void specnext_state::bank_update(u8 bank) if (cpu_rd_n) { - m_page_shadow[bank] = sram_rdonly ? ~0 : sram_A21_A13; + m_page_shadow[bank] = sram_rdonly ? -1 : sram_A21_A13; } else { - m_bank_ram[bank]->set_entry(sram_A21_A13); - if (sram_rdonly || (m_page_shadow[bank] != sram_A21_A13)) + const bool ro = sram_rdonly || (m_page_shadow[bank] != sram_A21_A13); + if (sram_A21_A13 < m_ram_pages) { - views[bank].get().select(0); - LOGMEM("ROM%d = %x\n", bank, sram_A21_A13); + m_bank_ram[bank]->set_entry(sram_A21_A13); + views[bank].get().select(ro); + LOGMEM("%s%d = %x\n", ro ? "ROM" : "RAM", bank, sram_A21_A13); } else + views[bank].get().disable(); + + if (!ro) { if (m_page_shadow[bank] == sram_A21_A13) - m_page_shadow[bank] = ~0; - views[bank].get().disable(); - LOGMEM("RAM%d = %x\n", bank, sram_A21_A13); + m_page_shadow[bank] = -1; } } } @@ -1940,7 +1941,7 @@ void specnext_state::reg_w(offs_t nr_wr_reg, u8 nr_wr_dat) break; case 0x04: - m_nr_04_romram_bank = nr_wr_dat & (m_io_issue->read() < 3 ? 0x7f : 0xff); + m_nr_04_romram_bank = nr_wr_dat & (m_ram_pages > 0x100 ? 0xff : 0x7f); // >2Mb (KS3+)? bank_update(0, 2); break; case 0x05: @@ -2908,12 +2909,13 @@ void specnext_state::map_mem(address_map &map) for (auto i = 0; i < 8; i++) { - map(0x0000 + i * 0x2000, 0x1fff + i * 0x2000).bankrw(m_bank_ram[i]); + map(0x0000 + i * 0x2000, 0x1fff + i * 0x2000).noprw(); map(0x0000 + i * 0x2000, 0x1fff + i * 0x2000).view(views[i].get()); - views[i].get()[0](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).nopw(); + views[i].get()[0](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).bankrw(m_bank_ram[i]); + views[i].get()[1](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).bankr(m_bank_ram[i]); } - views[0].get()[1](0x0000, 0x1fff).bankr(m_bank_boot_rom); - views[1].get()[1](0x2000, 0x3fff).bankr(m_bank_boot_rom); + views[0].get()[2](0x0000, 0x1fff).bankr(m_bank_boot_rom); + views[1].get()[2](0x2000, 0x3fff).bankr(m_bank_boot_rom); } void specnext_state::map_io(address_map &map) @@ -3131,6 +3133,9 @@ void specnext_state::map_regs(address_map &map) INPUT_PORTS_START(specnext) PORT_INCLUDE(spec_plus) + PORT_MODIFY("CONFIG") + PORT_BIT(0xff, IP_ACTIVE_HIGH, IPT_UNUSED) + // PS/2 Keyboard Mapping PORT_MODIFY("PLUS0") PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("EDIT") PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') @@ -3149,18 +3154,7 @@ INPUT_PORTS_START(specnext) PORT_MODIFY("LINE7") PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("SYMBOL SHIFT") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) - - PORT_MODIFY("CONFIG") - PORT_BIT(0xff, IP_ACTIVE_HIGH, IPT_UNUSED) - - - PORT_START("ISSUE") - PORT_CONFNAME(0x03, 0x02, "Hardware Version" ) - PORT_CONFSETTING(0x00, "Issue 1 (TBBLUE)" ) - PORT_CONFSETTING(0x01, "Issue 2 (KS 1)" ) - PORT_CONFSETTING(0x02, "Issue 4 (KS 2)" ) - PORT_CONFSETTING(0x03, "Issue 5 (KS 3)" ) - PORT_BIT(0xfc, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_START("VIDEO") PORT_CONFNAME(0x01, 0x00, "Captured Video Resolution" ) @@ -3242,6 +3236,7 @@ void specnext_state::machine_start() m_regs_map->space(AS_PROGRAM).specific(m_next_regs); + m_ram_pages = m_ram->size() / 0x2000; for (auto i = 0; i < 8; i++) m_bank_ram[i]->configure_entries(0, m_ram->size() / 0x2000, m_ram->pointer(), 0x2000); m_bank_boot_rom->configure_entry(0, memregion("maincpu")->base()); @@ -3255,7 +3250,7 @@ void specnext_state::machine_start() m_nr_02_hard_reset = 1; // Save - save_pointer(NAME(m_page_shadow), 8); + save_item(NAME(m_page_shadow)); save_item(NAME(m_bootrom_en)); save_item(NAME(m_port_ff_data)); save_item(NAME(m_port_1ffd_special_old)); @@ -3273,7 +3268,7 @@ void specnext_state::machine_start() save_item(NAME(m_sram_rom)); save_item(NAME(m_sram_rom3)); save_item(NAME(m_sram_alt_128_n)); - save_pointer(NAME(m_mmu), 8); + save_item(NAME(m_mmu)); save_item(NAME(m_nr_02_bus_reset)); save_item(NAME(m_nr_02_generate_mf_nmi)); save_item(NAME(m_nr_02_generate_divmmc_nmi)); @@ -3893,7 +3888,7 @@ void specnext_state::video_start() prg.install_write_tap(0x0000, 0xbfff, "shadow_w", [this](offs_t offset, u8 &data, u8 mem_mask) { u8 bank8 = offset >> 13; - if (~m_page_shadow[bank8]) + if (m_page_shadow[bank8] >= 0 && m_ram_pages > m_page_shadow[bank8]) { u8 *to = m_ram->pointer() + (m_page_shadow[bank8] << 13); to[offset & 0x1fff] = data; @@ -3914,7 +3909,6 @@ void specnext_state::tbblue(machine_config &config) spectrum_128(config); config.device_remove("exp"); config.device_remove("dma"); - m_ram->set_default_size("4M").set_default_value(0); Z80N(config.replace(), m_maincpu, 28_MHz_XTAL / 8); m_maincpu->set_daisy_config(z80_daisy_chain); @@ -4005,20 +3999,75 @@ void specnext_state::tbblue(machine_config &config) SOFTWARE_LIST(config, "sd_list").set_original("specnext_sd"); config.device_remove("snapshot"); + + m_machine_id = 0x08; + m_board_issue = 0; + m_ram->set_default_size("2M").set_extra_options("1M,4M").set_default_value(0); } + +void specnext_state::ks1(machine_config &config) +{ + tbblue(config); + + m_machine_id = 0x0a; + m_board_issue = 1; + m_ram->set_default_size("1M").set_extra_options("2M"); +} + + +void specnext_state::ks2(machine_config &config) +{ + tbblue(config); + + m_machine_id = 0x0a; + m_board_issue = 2; + m_ram->set_default_size("2M").set_extra_options(nullptr); +} + +void specnext_state::ks3(machine_config &config) +{ + tbblue(config); + + m_machine_id = 0x0a; + m_board_issue = 3; + m_ram->set_default_size("4M").set_extra_options(nullptr); +} + + ROM_START(tbblue) ROM_REGION(0x4000, "maincpu", ROMREGION_ERASEFF) - ROM_DEFAULT_BIOS("boot") + ROM_DEFAULT_BIOS("v30204") - ROM_SYSTEM_BIOS(0, "boot", "BootROM") - ROMX_LOAD( "bootrom.fa55357d.bin", 0x0000, 0x2000, CRC(ccbd55ba) SHA1(8b3c2a301f486904d1c74929b94845a7731bf230), ROM_BIOS(0)) - ROM_SYSTEM_BIOS(1, "bootab", "BootROM - AntiBrick") - ROMX_LOAD( "bootrom-ab.cfffa702.bin", 0x0000, 0x2000, CRC(1d16e9d4) SHA1(6f9c8771e5a9ef5a6b52a31b2e65f0698f0f5cfa), ROM_BIOS(1)) + ROM_SYSTEM_BIOS(0, "v30100", "v3.01.00") + ROMX_LOAD( "boot-30100.bin", 0x0000, 0x2000, CRC(ccbd55ba) SHA1(8b3c2a301f486904d1c74929b94845a7731bf230), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "v30200ab", "v3.02.00 (AntiBrick)") + ROMX_LOAD( "boot-30200-ab.bin", 0x0000, 0x2000, CRC(1d16e9d4) SHA1(6f9c8771e5a9ef5a6b52a31b2e65f0698f0f5cfa), ROM_BIOS(1)) + ROM_SYSTEM_BIOS(2, "v30204", "v3.02.04") + ROMX_LOAD( "boot-30204.bin", 0x0000, 0x2000, CRC(95118eb6) SHA1(acf5112e831be8c73952b8513fab33a427e88cf8), ROM_BIOS(2)) + ROM_SYSTEM_BIOS(3, "v30204ab", "v3.02.04 (AntiBrick)") + ROMX_LOAD( "boot-30204-ab.bin", 0x0000, 0x2000, CRC(96c32007) SHA1(6c9fcbd282f7a18fb5a726386ac6fb9df209c36b), ROM_BIOS(3)) + +ROM_END + +#define rom_specnext_ks1 rom_tbblue +#define rom_specnext_ks2 rom_tbblue + +ROM_START(specnext_ks3) + ROM_REGION(0x4000, "maincpu", ROMREGION_ERASEFF) + ROM_DEFAULT_BIOS("v30204") + + ROM_SYSTEM_BIOS(0, "v30204", "v3.02.04") + ROMX_LOAD( "boot-30204.bin", 0x0000, 0x2000, CRC(95118eb6) SHA1(acf5112e831be8c73952b8513fab33a427e88cf8), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "v30204ab", "v3.02.04 (AntiBrick)") + ROMX_LOAD( "boot-30204-ab.bin", 0x0000, 0x2000, CRC(96c32007) SHA1(6c9fcbd282f7a18fb5a726386ac6fb9df209c36b), ROM_BIOS(1)) ROM_END } // Anonymous namespace -/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ -COMP( 2017, tbblue, spec128, 0, tbblue, specnext, specnext_state, empty_init, "SpecNext Ltd., Victor Trucco, Fabio Belavenuto", "ZX Spectrum Next: TBBlue", MACHINE_SUPPORTS_SAVE ) +/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ +COMP( 2017, tbblue, 0 , 0, tbblue, specnext, specnext_state, empty_init, "SpecNext Ltd., Victor Trucco, Fabio Belavenuto", "ZX Spectrum Next: Emulators ID", MACHINE_SUPPORTS_SAVE ) +COMP( 2020, specnext_ks1, tbblue, 0, ks1, specnext, specnext_state, empty_init, "SpecNext Ltd., Victor Trucco, Fabio Belavenuto", "ZX Spectrum Next: KS1", MACHINE_SUPPORTS_SAVE ) +COMP( 2023, specnext_ks2, tbblue, 0, ks2, specnext, specnext_state, empty_init, "SpecNext Ltd., Victor Trucco, Fabio Belavenuto", "ZX Spectrum Next: KS2", MACHINE_SUPPORTS_SAVE ) +COMP( 2025, specnext_ks3, tbblue, 0, ks3, specnext, specnext_state, empty_init, "SpecNext Ltd., Victor Trucco, Fabio Belavenuto", "ZX Spectrum Next: KS3", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/sinclair/specnext_layer2.cpp b/src/mame/sinclair/specnext_layer2.cpp index eade515924e..cf43cef3d26 100644 --- a/src/mame/sinclair/specnext_layer2.cpp +++ b/src/mame/sinclair/specnext_layer2.cpp @@ -212,7 +212,7 @@ void specnext_layer2_device::device_start() save_item(NAME(m_offset_v)); save_item(NAME(m_global_transparent)); save_item(NAME(m_layer2_palette_select)); - save_pointer(NAME(m_pen_priority), 512 * 4); + save_item(NAME(m_pen_priority)); save_item(NAME(m_layer2_en)); save_item(NAME(m_resolution)); From 3c6ffd84b0ae8c7138ea7199ebc8d74e77be0f3e Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Thu, 5 Mar 2026 03:43:49 +1100 Subject: [PATCH 132/351] -cpu/e132xs: Log analysed instructions in UML log when using recompiler. -cpu/powerpc: Modernised recompiler front-end code, improved instruction analysis logging. -cpu/sh: Cleaned up instruction analysis logging a little -util/client_ws.hpp, util/server_ws_impl.hpp, capcom/cps2comm.cpp: Updated some use of deprecation ASIO APIs. -nakajima/nakajies.cpp: Use range-based loops. --- scripts/src/cpu.lua | 11 +- src/devices/cpu/e132xs/32xsdasm.h | 46 - src/devices/cpu/e132xs/e132xs.cpp | 7 +- src/devices/cpu/e132xs/e132xs.h | 4 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 68 +- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 1 - .../cpu/e132xs/{32xsdasm.cpp => e1dasm.cpp} | 108 +- src/devices/cpu/e132xs/e1dasm.h | 51 + .../cpu/e132xs/{32xsdefs.h => e1defs.h} | 6 +- .../cpu/e132xs/{e132xsfe.cpp => e1fe.cpp} | 179 +++- src/devices/cpu/e132xs/{e132xsfe.h => e1fe.h} | 25 +- src/devices/cpu/powerpc/ppc.h | 4 - src/devices/cpu/powerpc/ppcdrc.cpp | 231 +--- src/devices/cpu/powerpc/ppcfe.cpp | 994 ++++++++++-------- src/devices/cpu/powerpc/ppcfe.h | 128 ++- src/devices/cpu/sh/sh.cpp | 86 +- src/devices/cpu/sh/sh.h | 1 - src/devices/cpu/sh/sh_fe.cpp | 50 + src/devices/cpu/sh/sh_fe.h | 5 + src/lib/util/client_ws.hpp | 16 +- src/lib/util/server_ws_impl.hpp | 12 +- src/mame/capcom/cps2comm.cpp | 12 +- src/mame/nakajima/nakajies.cpp | 43 +- src/tools/unidasm.cpp | 14 +- 24 files changed, 1163 insertions(+), 939 deletions(-) delete mode 100644 src/devices/cpu/e132xs/32xsdasm.h rename src/devices/cpu/e132xs/{32xsdasm.cpp => e1dasm.cpp} (92%) create mode 100644 src/devices/cpu/e132xs/e1dasm.h rename src/devices/cpu/e132xs/{32xsdefs.h => e1defs.h} (98%) rename src/devices/cpu/e132xs/{e132xsfe.cpp => e1fe.cpp} (89%) rename src/devices/cpu/e132xs/{e132xsfe.h => e1fe.h} (89%) diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 9bf32fcaf66..3490ca9d4f9 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -1046,17 +1046,18 @@ if CPUS["E1"] then files { MAME_DIR .. "src/devices/cpu/e132xs/e132xs.cpp", MAME_DIR .. "src/devices/cpu/e132xs/e132xs.h", - MAME_DIR .. "src/devices/cpu/e132xs/32xsdefs.h", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsop.hxx", - MAME_DIR .. "src/devices/cpu/e132xs/e132xsfe.cpp", MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc.cpp", MAME_DIR .. "src/devices/cpu/e132xs/e132xsdrc_ops.hxx", + MAME_DIR .. "src/devices/cpu/e132xs/e132xsop.hxx", + MAME_DIR .. "src/devices/cpu/e132xs/e1defs.h", + MAME_DIR .. "src/devices/cpu/e132xs/e1fe.cpp", + MAME_DIR .. "src/devices/cpu/e132xs/e1fe.h", } end if opt_tool(CPUS, "E1") then - table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/e132xs/32xsdasm.cpp") - table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/e132xs/32xsdasm.h") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/e132xs/e1dasm.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/e132xs/e1dasm.h") end -------------------------------------------------- diff --git a/src/devices/cpu/e132xs/32xsdasm.h b/src/devices/cpu/e132xs/32xsdasm.h deleted file mode 100644 index 32f9c6df587..00000000000 --- a/src/devices/cpu/e132xs/32xsdasm.h +++ /dev/null @@ -1,46 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Pierpaolo Prazzoli -/* - - Hyperstone disassembler - written by Pierpaolo Prazzoli - -*/ - -#ifndef MAME_CPU_E132XS_32XSDASM_H -#define MAME_CPU_E132XS_32XSDASM_H - -#pragma once - -#include - - -class hyperstone_disassembler : public util::disasm_interface -{ -public: - struct config - { - virtual ~config() = default; - - virtual bool get_h() const = 0; - }; - - hyperstone_disassembler(config *conf); - virtual ~hyperstone_disassembler() = default; - - virtual u32 opcode_alignment() const override; - virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; - -private: - config *m_config; - - int size; - - uint32_t LRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes); - uint32_t RRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes); - int32_t Rimm_format(std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes, unsigned h_flag); - int32_t PCrel_format(uint16_t op, offs_t pc, const data_buffer &opcodes); - uint32_t RRdis_format(std::string_view &source, std::string_view &dest, uint16_t op, uint16_t next_op, offs_t pc, const data_buffer &opcodes); -}; - -#endif diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp index 6d4b1792552..34117a70486 100644 --- a/src/devices/cpu/e132xs/e132xs.cpp +++ b/src/devices/cpu/e132xs/e132xs.cpp @@ -1,7 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Pierpaolo Prazzoli /******************************************************************** - Hyperstone cpu emulator + Hyperstone E1 CPU emulator written by Pierpaolo Prazzoli Hyperstone models: @@ -91,9 +91,9 @@ #include "emu.h" #include "e132xs.h" -#include "e132xsfe.h" -#include "32xsdefs.h" +#include "e1defs.h" +#include "e1fe.h" #include "emuopts.h" @@ -160,6 +160,7 @@ hyperstone_device::hyperstone_device( : cpu_device(mconfig, type, tag, owner, clock) , m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map) , m_io_config("io", ENDIANNESS_BIG, io_data_width, io_addr_bits, (io_data_width == 16) ? -1 : -2) + , m_disassembler(nullptr) // for logging - pass nullptr so output doesn't depend on state , m_cache(CACHE_SIZE + sizeof(internal_hyperstone_state)) , m_drcuml(nullptr) , m_drcfe(nullptr) diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index 55bf264f8ac..ba78ff17272 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -5,7 +5,7 @@ #pragma once -#include "32xsdasm.h" +#include "e1dasm.h" #include "cpu/drcuml.h" @@ -439,6 +439,7 @@ private: FILE *m_trace_log; #endif + hyperstone_disassembler m_disassembler; drc_cache m_cache; std::unique_ptr m_drcuml; std::unique_ptr m_drcfe; @@ -477,6 +478,7 @@ private: void flush_drc_cache(); void generate_invariant(); void code_compile_block(uint8_t mode, offs_t pc); + void log_descriptions(const opcode_desc *desc_list, unsigned indent); //void load_fast_iregs(drcuml_block &block); //void save_fast_iregs(drcuml_block &block); void static_generate_helpers(drcuml_block &block, uml::code_label &label); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index 88b7bdc11fa..c3bb9fb22d2 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -4,13 +4,17 @@ #include "emu.h" #include "e132xs.h" -#include "32xsdefs.h" -#include "e132xsfe.h" +#include "e1defs.h" +#include "e1fe.h" #include "cpu/drcumlsh.h" +#include "util/vecstream.h" -/* map variables */ +#include + + +// map variables #define MAPVAR_PC M0 #define MAPVAR_CYCLES M1 @@ -266,8 +270,10 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) auto profile = g_profiler.start(PROFILER_DRC_COMPILE); - /* get a description of this sequence */ + // describe a sequence of instructions const opcode_desc *desclist = m_drcfe->describe_code(pc); + if (m_drcuml->logging()) + log_descriptions(desclist, 0); bool succeeded = false; while (!succeeded) @@ -352,6 +358,60 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) } } +void hyperstone_device::log_descriptions(const opcode_desc *desc_list, unsigned indent) +{ + util::ovectorstream buffer; + buffer.imbue(std::locale::classic()); + + // assume no indent is the start of a sequence and needs a heading + if (!indent) + m_drcuml->log_printf("\nDescriptor list @ %08X\n", desc_list->pc); + + for ( ; desc_list; desc_list = desc_list->next()) + { + buffer.clear(); + buffer.seekp(0); + desc_list->log_flags(buffer); + buffer.put('\0'); + + m_drcuml->log_printf("%08X t:%08X f:%s: ", desc_list->pc, desc_list->targetpc, &buffer.vec()[0]); + + // disassemble the current instruction and output it to the log + buffer.clear(); + buffer.seekp(0); + util::stream_format(buffer, "%*s", 4 * indent, ""); + if (desc_list->virtual_noop()) + buffer << ""; + else + m_disassembler.disassemble_one(buffer, desc_list->pc, desc_list->opptr); + buffer.put('\0'); + m_drcuml->log_printf("%-36s", &buffer.vec()[0]); + + // output register dependencies + buffer.clear(); + buffer.seekp(0); + if (!desc_list->regin.none()) + { + desc_list->log_registers_used(buffer); + if (!desc_list->regout.none()) + buffer << ' '; + } + if (!desc_list->regout.none()) + desc_list->log_registers_modified(buffer); + buffer.put('\0'); + m_drcuml->log_printf("%s\n", &buffer.vec()[0]); + + // if we have a delay slot, output it recursively + if (desc_list->delay.first()) + log_descriptions(desc_list->delay.first(), indent + 1); + + // at the end of a sequence add a dividing line + if (desc_list->end_sequence()) + m_drcuml->log_printf("-----\n"); + } +} + + /*************************************************************************** STATIC CODEGEN ***************************************************************************/ diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 7131bdba505..af0795bea2b 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -3873,7 +3873,6 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi dst_code = 16; UML_BFXU(block, I3, DRC_SR, FP_SHIFT, 7); - UML_MOV(block, I1, desc->imm); if (SrcGlobal) { diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/e1dasm.cpp similarity index 92% rename from src/devices/cpu/e132xs/32xsdasm.cpp rename to src/devices/cpu/e132xs/e1dasm.cpp index 286ef747dde..fe8e64b4d9e 100644 --- a/src/devices/cpu/e132xs/32xsdasm.cpp +++ b/src/devices/cpu/e132xs/e1dasm.cpp @@ -2,14 +2,17 @@ // copyright-holders:Pierpaolo Prazzoli /* - Hyperstone disassembler + Hyperstone E1 disassembler written by Pierpaolo Prazzoli */ #include "emu.h" -#include "32xsdasm.h" -#include "32xsdefs.h" +#include "e1dasm.h" + +#include "e1defs.h" + +#include namespace { @@ -128,7 +131,8 @@ void format_addsub( -uint32_t hyperstone_disassembler::LRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes) +template +uint32_t hyperstone_disassembler::LRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, T &&read_hw) { uint16_t next_op; uint32_t const_val; @@ -143,7 +147,7 @@ uint32_t hyperstone_disassembler::LRconst_format(std::string_view &source, std:: size = 4; pc += 2; - next_op = opcodes.r16(pc); + next_op = read_hw(pc); if (E_BIT(next_op)) { @@ -152,7 +156,7 @@ uint32_t hyperstone_disassembler::LRconst_format(std::string_view &source, std:: size = 6; pc += 2; - next_op2 = opcodes.r16(pc); + next_op2 = read_hw(pc); const_val = next_op2; const_val |= ((next_op & 0x3fff) << 16 ); @@ -170,7 +174,8 @@ uint32_t hyperstone_disassembler::LRconst_format(std::string_view &source, std:: return const_val; } -uint32_t hyperstone_disassembler::RRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes) +template +uint32_t hyperstone_disassembler::RRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, T &&read_hw) { uint16_t next_op; uint32_t const_val; @@ -188,7 +193,7 @@ uint32_t hyperstone_disassembler::RRconst_format(std::string_view &source, std:: size = 4; pc += 2; - next_op = opcodes.r16(pc); + next_op = read_hw(pc); if (E_BIT(next_op)) { @@ -197,7 +202,7 @@ uint32_t hyperstone_disassembler::RRconst_format(std::string_view &source, std:: size = 6; pc += 2; - next_op2 = opcodes.r16(pc); + next_op2 = read_hw(pc); const_val = next_op2; const_val |= ((next_op & 0x3fff) << 16 ); @@ -217,7 +222,8 @@ uint32_t hyperstone_disassembler::RRconst_format(std::string_view &source, std:: return const_val; } -int32_t hyperstone_disassembler::Rimm_format(std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes, unsigned h_flag) +template +int32_t hyperstone_disassembler::Rimm_format(std::string_view &dest, uint16_t op, offs_t pc, T &&read_hw, unsigned h_flag) { uint16_t imm1, imm2; int32_t ret; @@ -237,9 +243,9 @@ int32_t hyperstone_disassembler::Rimm_format(std::string_view &dest, uint16_t op case 17: pc += 2; - imm1 = opcodes.r16(pc); + imm1 = read_hw(pc); pc += 2; - imm2 = opcodes.r16(pc); + imm2 = read_hw(pc); ret = (imm1 << 16) | imm2; size = 6; @@ -248,14 +254,14 @@ int32_t hyperstone_disassembler::Rimm_format(std::string_view &dest, uint16_t op case 18: pc += 2; - ret = opcodes.r16(pc); + ret = read_hw(pc); size = 4; return ret; case 19: pc += 2; - ret = (int32_t) (0xffff0000 | opcodes.r16(pc)); + ret = (int32_t) (0xffff0000 | read_hw(pc)); size = 4; return ret; @@ -301,7 +307,8 @@ int32_t hyperstone_disassembler::Rimm_format(std::string_view &dest, uint16_t op } } -int32_t hyperstone_disassembler::PCrel_format(uint16_t op, offs_t pc, const data_buffer &opcodes) +template +int32_t hyperstone_disassembler::PCrel_format(uint16_t op, offs_t pc, T &&read_hw) { int32_t ret; @@ -313,7 +320,7 @@ int32_t hyperstone_disassembler::PCrel_format(uint16_t op, offs_t pc, const data pc += 2; - next = opcodes.r16(pc); + next = read_hw(pc); ret = (op & 0x7f) << 16; @@ -333,7 +340,8 @@ int32_t hyperstone_disassembler::PCrel_format(uint16_t op, offs_t pc, const data return (pc + ret); } -uint32_t hyperstone_disassembler::RRdis_format(std::string_view &source, std::string_view &dest, uint16_t op, uint16_t next_op, offs_t pc, const data_buffer &opcodes) +template +uint32_t hyperstone_disassembler::RRdis_format(std::string_view &source, std::string_view &dest, uint16_t op, uint16_t next_op, offs_t pc, T &&read_hw) { uint32_t ret; @@ -353,7 +361,7 @@ uint32_t hyperstone_disassembler::RRdis_format(std::string_view &source, std::st size = 6; - next = opcodes.r16(pc + 4); + next = read_hw(pc + 4); ret = next; ret |= ( ( next_op & 0xfff ) << 16 ); @@ -384,15 +392,35 @@ hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf) { } +offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +{ + return do_disassemble(stream, pc, [&opcodes] (offs_t addr) { return opcodes.r16(addr); }); +} + +offs_t hyperstone_disassembler::disassemble_one(std::ostream &stream, offs_t pc, const uint16_t *opptr) +{ + return do_disassemble( + stream, + pc, + [pc, opptr] (offs_t addr) + { + assert(addr >= pc); + assert(addr < (pc + 6)); + return opptr[(addr - pc) >> 1]; + }); +} + + /*****************************/ /* Main disassembly function */ /*****************************/ -offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +template +offs_t hyperstone_disassembler::do_disassemble(std::ostream &stream, offs_t pc, T &&read_hw) { std::string_view source, dest; uint32_t flags = 0; - const uint16_t op = opcodes.r16(pc); + const uint16_t op = read_hw(pc); size = 2; @@ -401,7 +429,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con const uint8_t source_bit = SOURCEBIT(op); const uint8_t dest_bit = DESTBIT(op); - const int h_flag = m_config->get_h(); + const int h_flag = m_config ? m_config->get_h() : 0; const uint8_t op_num = (op & 0xff00) >> 8; @@ -465,7 +493,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con size = 4; pc += 2; - const uint16_t ilm1 = opcodes.r16(pc); + const uint16_t ilm1 = read_hw(pc); const int xcode = X_CODE(ilm1); @@ -478,7 +506,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con size = 6; pc += 2; - const uint16_t ilm2 = opcodes.r16(pc); + const uint16_t ilm2 = read_hw(pc); lim = ((ilm1 & 0xfff) << 16) | ilm2; } @@ -499,7 +527,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // MASK case 0x14: case 0x15: case 0x16: case 0x17: { - const uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes); + const uint32_t const_val = RRconst_format(source, dest, op, pc, read_hw); util::stream_format(stream, "MASK %s, %s, $%x", dest, source, const_val); if (!source_bit && (source_code == PC_REGISTER)) util::stream_format(stream, " ; $%x", uint32_t((pc + size) & const_val)); @@ -509,7 +537,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con case 0x18: case 0x19: case 0x1a: case 0x1b: // SUM case 0x1c: case 0x1d: case 0x1e: case 0x1f: // SUMS { - const uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes); + const uint32_t const_val = RRconst_format(source, dest, op, pc, read_hw); util::stream_format(stream, "SUM%c %s, %s, $%x", (op_num & 0x4) ? 'S' : ' ', dest, @@ -601,7 +629,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // CMPI case 0x60: case 0x61: case 0x62: case 0x63: { - const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0); + const uint32_t imm = Rimm_format(dest, op, pc, read_hw, 0); util::stream_format(stream, "CMPI %s, $%x", dest, imm); } break; @@ -609,7 +637,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // MOVI case 0x64: case 0x65: case 0x66: case 0x67: { - const uint32_t imm = Rimm_format(dest, op, pc, opcodes, h_flag); + const uint32_t imm = Rimm_format(dest, op, pc, read_hw, h_flag); util::stream_format(stream, "MOVI %s, $%x", dest, imm); } break; @@ -622,7 +650,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con } else { - const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0); + const uint32_t imm = Rimm_format(dest, op, pc, read_hw, 0); util::stream_format(stream, "%-7s %s, $%x", (op_num & 0x4) ? "ADDSI" : "ADDI", dest, imm); if (!dest_bit && (dest_code == PC_REGISTER)) util::stream_format(stream, " ; $%x", uint32_t(pc + size + imm)); @@ -637,7 +665,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con } else { - uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0); + uint32_t imm = Rimm_format(dest, op, pc, read_hw, 0); if (DASM_N_VALUE(op) == 31) imm = 0x7fffffff; //bit 31 = 0, others = 1 @@ -648,7 +676,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // ANDNI case 0x74: case 0x75: case 0x76: case 0x77: { - uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0); + uint32_t imm = Rimm_format(dest, op, pc, read_hw, 0); if (DASM_N_VALUE(op) == 31) imm = 0x7fffffff; //bit 31 = 0, others = 1 @@ -661,7 +689,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // ORI case 0x78: case 0x79: case 0x7a: case 0x7b: { - const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0); + const uint32_t imm = Rimm_format(dest, op, pc, read_hw, 0); util::stream_format(stream, "ORI %s, $%x", dest, imm); if (!dest_bit && (dest_code == PC_REGISTER)) @@ -672,7 +700,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // XORI case 0x7c: case 0x7d: case 0x7e: case 0x7f: { - const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0); + const uint32_t imm = Rimm_format(dest, op, pc, read_hw, 0); util::stream_format(stream, "XORI %s, $%x", dest, imm); if (!dest_bit && (dest_code == PC_REGISTER)) @@ -735,8 +763,8 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con case 0x90: case 0x91: case 0x92: case 0x93: // LDxx.D/A/IOD/IOA case 0x98: case 0x99: case 0x9a: case 0x9b: // STxx.D/A/IOD/IOA { - const uint16_t next_op = opcodes.r16(pc + 2); - const uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes); + const uint16_t next_op = read_hw(pc + 2); + const uint32_t dis = RRdis_format(source, dest, op, next_op, pc, read_hw); if (size == 2) size = 4; @@ -797,8 +825,8 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con case 0x94: case 0x95: case 0x96: case 0x97: // LDxx.N/S case 0x9c: case 0x9d: case 0x9e: case 0x9f: // STxx.N/S { - const uint16_t next_op = opcodes.r16(pc + 2); - const uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes); + const uint16_t next_op = read_hw(pc + 2); + const uint32_t dis = RRdis_format(source, dest, op, next_op, pc, read_hw); if (size == 2) size = 4; @@ -931,7 +959,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con LL_format(source, dest, op); pc += 2; - const uint16_t extended_op = opcodes.r16(pc); + const uint16_t extended_op = read_hw(pc); size = 4; @@ -1039,7 +1067,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con case 0xeb: // DBGT case 0xec: // DBR { - const int32_t rel = PCrel_format(op, pc, opcodes) + 2; + const int32_t rel = PCrel_format(op, pc, read_hw) + 2; util::stream_format(stream, "D%-6s $%x", Bxx[op_num & 0xf], rel); if (op_num != 0xec) flags = STEP_COND | step_over_extra(1); @@ -1055,7 +1083,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con // CALL case 0xee: case 0xef: { - const uint32_t const_val = LRconst_format(source, dest, op, pc, opcodes); + const uint32_t const_val = LRconst_format(source, dest, op, pc, read_hw); util::stream_format(stream, "CALL %s, %s, $%x", dest, (!source_bit && (source_code == SR_REGISTER)) ? "0" : source, const_val); if (!source_bit && (source_code == PC_REGISTER)) @@ -1078,7 +1106,7 @@ offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, con case 0xfb: // BGT case 0xfc: // BR { - const int32_t rel = PCrel_format(op, pc, opcodes) + 2; + const int32_t rel = PCrel_format(op, pc, read_hw) + 2; util::stream_format(stream, "%-7s $%x", Bxx[op_num & 0xf], rel); if (op_num != 0xfc) flags = STEP_COND; diff --git a/src/devices/cpu/e132xs/e1dasm.h b/src/devices/cpu/e132xs/e1dasm.h new file mode 100644 index 00000000000..4a3803cc513 --- /dev/null +++ b/src/devices/cpu/e132xs/e1dasm.h @@ -0,0 +1,51 @@ +// license:BSD-3-Clause +// copyright-holders:Pierpaolo Prazzoli +/* + + Hyperstone E1 disassembler + written by Pierpaolo Prazzoli + +*/ + +#ifndef MAME_CPU_E132XS_E1DASM_H +#define MAME_CPU_E132XS_E1DASM_H + +#pragma once + +#include +#include + + +class hyperstone_disassembler : public util::disasm_interface +{ +public: + struct config + { + virtual ~config() = default; + + virtual bool get_h() const = 0; + }; + + hyperstone_disassembler(config *conf); + virtual ~hyperstone_disassembler() = default; + + virtual u32 opcode_alignment() const override; + virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; + + offs_t disassemble_one(std::ostream &stream, offs_t pc, const uint16_t *opptr); + +private: + config *m_config; + + int size; // FIXME: not concurrency-safe + + template offs_t do_disassemble(std::ostream &stream, offs_t pc, T &&read_hw); + + template uint32_t LRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, T &&read_hw); + template uint32_t RRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, T &&read_hw); + template int32_t Rimm_format(std::string_view &dest, uint16_t op, offs_t pc, T &&read_hw, unsigned h_flag); + template int32_t PCrel_format(uint16_t op, offs_t pc, T &&read_hw); + template uint32_t RRdis_format(std::string_view &source, std::string_view &dest, uint16_t op, uint16_t next_op, offs_t pc, T &&read_hw); +}; + +#endif // MAME_CPU_E132XS_E1DASM_H diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/e1defs.h similarity index 98% rename from src/devices/cpu/e132xs/32xsdefs.h rename to src/devices/cpu/e132xs/e1defs.h index 9dad4d780c5..860d04bbb2e 100644 --- a/src/devices/cpu/e132xs/32xsdefs.h +++ b/src/devices/cpu/e132xs/e1defs.h @@ -1,7 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Pierpaolo Prazzoli -#ifndef MAME_CPU_E132XS_32XSDEFS_H -#define MAME_CPU_E132XS_32XSDEFS_H +#ifndef MAME_CPU_E132XS_E1DEFS_H +#define MAME_CPU_E132XS_E1DEFS_H #pragma once @@ -244,4 +244,4 @@ constexpr int FP_SHIFT = 25; //other bits are reversed, in particular 7 - 5 for the operating system. //the user program can only change the above 2 flags -#endif // MAME_CPU_E132XS_32XSDEFS_H +#endif // MAME_CPU_E132XS_E1DEFS_H diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e1fe.cpp similarity index 89% rename from src/devices/cpu/e132xs/e132xsfe.cpp rename to src/devices/cpu/e132xs/e1fe.cpp index 1eb0de91382..6b8852a0f6c 100644 --- a/src/devices/cpu/e132xs/e132xsfe.cpp +++ b/src/devices/cpu/e132xs/e1fe.cpp @@ -2,21 +2,120 @@ // copyright-holders:Vas Crabb /*************************************************************************** - e132xsfe.cpp + e1fe.cpp Hyperstone E1 instruction decoder ***************************************************************************/ #include "emu.h" -#include "e132xsfe.h" +#include "e1fe.h" -#include "32xsdefs.h" +#include "e1defs.h" #include "cpu/drcfe.ipp" +void hyperstone_device::opcode_desc::log_flags(std::ostream &stream) const +{ + // branches + if (is_unconditional_branch()) + stream << 'U'; + else if (is_conditional_branch()) + stream << 'C'; + else + stream << '.'; + + // intrablock branches + stream << (intrablock_branch() ? 'i' : '.'); + + // branch targets + stream << (is_branch_target() ? 'B' : '.'); + + // delay slots + stream << (in_delay_slot() ? 'D' : '.'); + + // check H flag + stream << (check_h() ? 'H' : '.'); + + // modes + stream << (can_change_modes() ? 'M' : '.'); + + // exceptions + if (will_cause_exception()) + stream << 'E'; + else if (can_cause_exception()) + stream << 'e'; + else + stream << '.'; + + // read/write + if (reads_memory()) + stream << 'R'; + else if (writes_memory()) + stream << 'W'; + else + stream << '.'; + + // TLB validation + stream << (validate_tlb() ? 'V' : '.'); + + // redispatch + stream << (redispatch() ? 'R' : '.'); +} + +void hyperstone_device::opcode_desc::log_registers_used(std::ostream &stream) const +{ + stream << "[use:"; + log_register_list(stream, regin, nullptr); + stream << ']'; +} + +void hyperstone_device::opcode_desc::log_registers_modified(std::ostream &stream) const +{ + stream << "[mod:"; + log_register_list(stream, regout, ®req); + stream << ']'; +} + +void hyperstone_device::opcode_desc::log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist) +{ + int count = 0; + + for (int regnum = 0; regnum < 32; regnum++) + { + if (reglist[REG_G0 + regnum]) + { + if (count++) + stream << ','; + stream << 'G' << regnum; + if (regnostarlist && !(*regnostarlist)[REG_G0 + regnum]) + stream << '*'; + } + } + + const auto log_bit = + [&stream, &count, ®list, ®nostarlist] (size_t bit, const char *name) + { + if (reglist[bit]) + { + if (count++) + stream << ','; + stream << name; + if (regnostarlist && !(*regnostarlist)[bit]) + stream << '*'; + } + }; + + log_bit(REG_C, "C"); + log_bit(REG_Z, "Z"); + log_bit(REG_N, "N"); + log_bit(REG_V, "V"); + log_bit(REG_FP, "FP"); +} + + hyperstone_device::frontend::frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) : drc_frontend_base(cpu.space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) , m_cpu(cpu) @@ -409,7 +508,11 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc if (desc.dst_local || desc.src_local) desc.set_fp_used(); if (!desc.dst_local || !desc.src_local) + { + if (!prev || prev->regout[SR_REGISTER]) + desc.set_check_h(); desc.regin.set(SR_REGISTER); // only the H bit is used + } if (!desc.src_local) { desc.set_g_used(desc.src_code); @@ -418,6 +521,8 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc if (!desc.dst_local) { desc.set_can_cause_exception(); + desc.set_g_used(desc.dst_code); + desc.set_g_used(desc.dst_code + 16); desc.set_g_modified(desc.dst_code); desc.set_g_modified(desc.dst_code + 16); if (desc.dst_code == PC_REGISTER) @@ -594,14 +699,14 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc else desc.set_znv_modified(); // negs break; - case 0x60: // cmpi global,imm - case 0x61: // cmpi global,imm - case 0x62: // cmpi local,imm - case 0x63: // cmpi local,imm - case 0x70: // cmpbi global,imm - case 0x71: // cmpbi global,imm - case 0x72: // cmpbi local,imm - case 0x73: // cmpbi local,imm + case 0x60: // cmpi global + case 0x61: // cmpi global + case 0x62: // cmpi local + case 0x63: // cmpi local + case 0x70: // cmpbi global + case 0x71: // cmpbi global + case 0x72: // cmpbi local + case 0x73: // cmpbi local decode_rimm(desc, op & 0x1000); if (desc.dst_local) desc.set_fp_used(); @@ -612,10 +717,14 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc else desc.set_cznv_modified(); // cmpi break; - case 0x64: // movi global,imm - case 0x65: // movi global,imm + case 0x64: // movi global + case 0x65: // movi global decode_rimm(desc, false); desc.set_can_cause_exception(); + if (!prev || prev->regout[SR_REGISTER]) + desc.set_check_h(); + desc.set_g_used(desc.dst_code); + desc.set_g_used(desc.dst_code + 16); desc.regin.set(SR_REGISTER); // only the H bit is used desc.set_g_modified(desc.dst_code); desc.set_g_modified(desc.dst_code + 16); @@ -630,20 +739,20 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_end_sequence(); } break; - case 0x66: // movi local,imm - case 0x67: // movi local,imm + case 0x66: // movi local + case 0x67: // movi local decode_rimm(desc, false); desc.set_fp_used(); desc.set_znv_modified(); break; - case 0x68: // addi global,imm - case 0x69: // addi global,imm - case 0x6a: // addi local,imm - case 0x6b: // addi local,imm - case 0x6c: // addsi global,imm - case 0x6d: // addsi global,imm - case 0x6e: // addsi local,imm - case 0x6f: // addsi local,imm + case 0x68: // addi global + case 0x69: // addi global + case 0x6a: // addi local + case 0x6b: // addi local + case 0x6c: // addsi global + case 0x6d: // addsi global + case 0x6e: // addsi local + case 0x6f: // addsi local decode_rimm(desc, false); if (op & 0x0400) desc.set_can_cause_exception(); // addsi @@ -667,12 +776,12 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc else desc.set_cznv_modified(); // addi break; - case 0x74: // andni global,imm - case 0x75: // andni global,imm - case 0x78: // ori global,imm - case 0x79: // ori global,imm - case 0x7c: // xori global,imm - case 0x7d: // xori global,imm + case 0x74: // andni global + case 0x75: // andni global + case 0x78: // ori global + case 0x79: // ori global + case 0x7c: // xori global + case 0x7d: // xori global decode_rimm(desc, !(op & 0x0800)); desc.set_g_used(desc.dst_code); desc.set_g_modified(desc.dst_code); @@ -689,12 +798,12 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc } desc.set_z_modified(); break; - case 0x76: // andni local,imm - case 0x77: // andni local,imm - case 0x7a: // ori local,imm - case 0x7b: // ori local,imm - case 0x7e: // xori local,imm - case 0x7f: // xori local,imm + case 0x76: // andni local + case 0x77: // andni local + case 0x7a: // ori local + case 0x7b: // ori local + case 0x7e: // xori local + case 0x7f: // xori local decode_rimm(desc, !(op & 0x0800)); desc.set_fp_used(); desc.set_z_modified(); diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e1fe.h similarity index 89% rename from src/devices/cpu/e132xs/e132xsfe.h rename to src/devices/cpu/e132xs/e1fe.h index f3075a415c8..97354a950f2 100644 --- a/src/devices/cpu/e132xs/e132xsfe.h +++ b/src/devices/cpu/e132xs/e1fe.h @@ -2,13 +2,13 @@ // copyright-holders:Vas Crabb /*************************************************************************** - e132xsfe.h + e1fe.h Hyperstone E1 instruction decoder ***************************************************************************/ -#ifndef MAME_CPU_E132XS_E132XSFE_H -#define MAME_CPU_E132XS_E132XSFE_H +#ifndef MAME_CPU_E132XS_E1FE_H +#define MAME_CPU_E132XS_E1FE_H #pragma once @@ -19,6 +19,7 @@ #include #include #include +#include class hyperstone_device::opcode_desc : public opcode_desc_base @@ -70,13 +71,11 @@ public: void set_z_modified() { - regout.set(REG_SR); regout.set(REG_Z); } void set_znv_modified() { - regout.set(REG_SR); regout.set(REG_Z); regout.set(REG_N); regout.set(REG_V); @@ -84,7 +83,6 @@ public: void set_czn_modified() { - regout.set(REG_SR); regout.set(REG_C); regout.set(REG_Z); regout.set(REG_N); @@ -92,7 +90,6 @@ public: void set_cznv_modified() { - regout.set(REG_SR); regout.set(REG_C); regout.set(REG_Z); regout.set(REG_N); @@ -101,7 +98,6 @@ public: void set_fp_modified() { - regout.set(REG_SR); regout.set(REG_FP); } @@ -111,10 +107,12 @@ public: bool v_calc_required() const { return regreq[REG_V] || in_delay_slot(); } bool condition_calc_required() const { return regreq[REG_C] || regreq[REG_Z] || regreq[REG_N] || regreq[REG_V] || in_delay_slot(); } + void set_check_h() { m_extra_flags.set(CHECK_H); } void set_can_change_modes() { m_extra_flags.set(CAN_CHANGE_MODES); } void set_reads_memory() { m_extra_flags.set(READS_MEMORY); } void set_writes_memory() { m_extra_flags.set(WRITES_MEMORY); } + bool check_h() const { return m_extra_flags[CHECK_H]; } bool can_change_modes() const { return m_extra_flags[CAN_CHANGE_MODES]; } bool reads_memory() const { return m_extra_flags[READS_MEMORY]; } bool writes_memory() const { return m_extra_flags[WRITES_MEMORY]; } @@ -146,6 +144,10 @@ public: m_extra_flags.reset(); } + void log_flags(std::ostream &stream) const; + void log_registers_used(std::ostream &stream) const; + void log_registers_modified(std::ostream &stream) const; + protected: enum { @@ -164,13 +166,16 @@ protected: enum { - CAN_CHANGE_MODES = 0, + CHECK_H = 0, + CAN_CHANGE_MODES, READS_MEMORY, WRITES_MEMORY, EXTRA_FLAG_COUNT }; + static void log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist); + std::bitset m_extra_flags; }; @@ -207,4 +212,4 @@ private: hyperstone_device &m_cpu; }; -#endif // MAME_CPU_E132XS_E132XSFE_H +#endif // MAME_CPU_E132XS_E1FE_H diff --git a/src/devices/cpu/powerpc/ppc.h b/src/devices/cpu/powerpc/ppc.h index d00bcac10a1..86292a1dba5 100644 --- a/src/devices/cpu/powerpc/ppc.h +++ b/src/devices/cpu/powerpc/ppc.h @@ -16,12 +16,10 @@ #include "ppc_dasm.h" #include "cpu/drcuml.h" -#include "cpu/drcumlsh.h" #include "divtlb.h" #include -#include /*************************************************************************** @@ -700,8 +698,6 @@ protected: bool generate_instruction_3b(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc); bool generate_instruction_3f(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc); void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); - const char *log_desc_flags_to_string(const opcode_desc &desc); - void log_register_list(const char *string, const std::bitset<128> ®list, const std::bitset<128> *regnostarlist); void log_opcode_desc(const opcode_desc *desclist, int indent); private: diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp index 1ced08d9dc5..ee0c9b664bc 100644 --- a/src/devices/cpu/powerpc/ppcdrc.cpp +++ b/src/devices/cpu/powerpc/ppcdrc.cpp @@ -23,6 +23,10 @@ #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" +#include "util/vecstream.h" + +#include + /*************************************************************************** @@ -1764,9 +1768,9 @@ void ppc_device::generate_compute_flags(drcuml_block &block, const opcode_desc * /* modify inputs based on required flags */ if (!DISABLE_FLAG_OPTIMIZATIONS) { - if (!frontend::REGFLAG_XER_CA(desc->regreq)) + if (!desc->xer_ca_required()) xermask &= ~XER_CA; - if (!frontend::REGFLAG_CR(desc->regreq, 0)) + if (!desc->cr_required(0)) updatecr = 0; } const uint32_t xerflags = ((xermask & XER_OV) ? uml::FLAG_V : 0) | ((xermask & XER_CA) ? uml::FLAG_C : 0); @@ -2969,7 +2973,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co UML_CMP(block, I2, 0x00000020); // cmp rb,0x20 UML_JMPc(block, COND_S, compiler->labelnum); // bs 1: - if (DISABLE_FLAG_OPTIMIZATIONS || frontend::REGFLAG_XER_CA(desc->regreq)) + if (DISABLE_FLAG_OPTIMIZATIONS || desc->xer_ca_required()) { // for shift amt > 32, carry flag is the sign bit of Rs and the sign bit fills all bit positions UML_TEST(block, R32(G_RS(op)), 0x80000000); @@ -2980,7 +2984,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co UML_JMP(block, compiler->labelnum+1); // bra 2: UML_LABEL(block, compiler->labelnum++); // 1: - if (DISABLE_FLAG_OPTIMIZATIONS || frontend::REGFLAG_XER_CA(desc->regreq)) + if (DISABLE_FLAG_OPTIMIZATIONS || desc->xer_ca_required()) { UML_SHL(block, I1, 0xffffffff, I2); // shl i1,0xffffffff,i2 UML_XOR(block, I1, I1, ~0); // xor i1,i1,~0 @@ -3001,7 +3005,7 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co return true; case 0x338: /* SRAWIx */ - if (DISABLE_FLAG_OPTIMIZATIONS || frontend::REGFLAG_XER_CA(desc->regreq)) + if (DISABLE_FLAG_OPTIMIZATIONS || desc->xer_ca_required()) { UML_AND(block, I0, R32(G_RS(op)), ~(0xffffffff << (G_SH(op) & 31)));// and i0,rs,~(0xffffffff << (sh & 31)) UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31 @@ -3916,172 +3920,6 @@ void ppc_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32 } -/*------------------------------------------------- - log_desc_flags_to_string - generate a string - representing the instruction description - flags --------------------------------------------------*/ - -const char *ppc_device::log_desc_flags_to_string(const opcode_desc &desc) -{ - static char tempbuf[30]; - char *dest = tempbuf; - - /* branches */ - if (desc.is_unconditional_branch()) - *dest++ = 'U'; - else if (desc.is_conditional_branch()) - *dest++ = 'C'; - else - *dest++ = '.'; - - /* intrablock branches */ - *dest++ = desc.intrablock_branch() ? 'i' : '.'; - - /* branch targets */ - *dest++ = desc.is_branch_target() ? 'B' : '.'; - - /* delay slots */ - *dest++ = desc.in_delay_slot() ? 'D' : '.'; - - /* exceptions */ - if (desc.will_cause_exception()) - *dest++ = 'E'; - else if (desc.can_cause_exception()) - *dest++ = 'e'; - else - *dest++ = '.'; - - /* read/write */ - if (desc.reads_memory()) - *dest++ = 'R'; - else if (desc.writes_memory()) - *dest++ = 'W'; - else - *dest++ = '.'; - - /* TLB validation */ - *dest++ = desc.validate_tlb() ? 'V' : '.'; - - /* redispatch */ - *dest++ = desc.redispatch() ? 'R' : '.'; - return tempbuf; -} - - -/*------------------------------------------------- - log_register_list - log a list of GPR registers --------------------------------------------------*/ - -void ppc_device::log_register_list(const char *string, const std::bitset<128> ®list, const std::bitset<128> *regnostarlist) -{ - static const char *const crtext[4] = { "lt", "gt", "eq", "so" }; - int count = 0; - int regnum; - int crnum; - - /* skip if nothing */ - if (reglist.none()) - return; - - m_drcuml->log_printf("[%s:", string); - - for (regnum = 0; regnum < 32; regnum++) - { - if (frontend::REGFLAG_R(reglist, regnum)) - { - m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist && !frontend::REGFLAG_R(*regnostarlist, regnum)) - m_drcuml->log_printf("*"); - } - } - - for (regnum = 0; regnum < 32; regnum++) - { - if (frontend::REGFLAG_FR(reglist, regnum)) - { - m_drcuml->log_printf("%sfr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist && !frontend::REGFLAG_FR(*regnostarlist, regnum)) - m_drcuml->log_printf("*"); - } - } - - for (regnum = 0; regnum < 8; regnum++) - { - if (frontend::REGFLAG_CR(reglist, regnum)) - { - if ((frontend::REGFLAG_CR(reglist, regnum) == 0x0f) && (!regnostarlist || (frontend::REGFLAG_CR(*regnostarlist, regnum) == 0x0f))) - { - m_drcuml->log_printf("%scr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist && !frontend::REGFLAG_CR(*regnostarlist, regnum)) - m_drcuml->log_printf("*"); - } - else - { - for (crnum = 0; crnum < 4; crnum++) - { - if (frontend::REGFLAG_CR_BIT(reglist, regnum * 4 + crnum)) - { - m_drcuml->log_printf("%scr%d[%s]", (count++ == 0) ? "" : ",", regnum, crtext[crnum]); - if (regnostarlist && !frontend::REGFLAG_CR_BIT(*regnostarlist, regnum * 4 + crnum)) - m_drcuml->log_printf("*"); - } - } - } - } - } - - if (frontend::REGFLAG_XER_CA(reglist)) - { - m_drcuml->log_printf("%sxer_ca", (count++ == 0) ? "" : ","); - if (regnostarlist && !frontend::REGFLAG_XER_CA(*regnostarlist)) - m_drcuml->log_printf("*"); - } - if (frontend::REGFLAG_XER_OV(reglist)) - { - m_drcuml->log_printf("%sxer_ov", (count++ == 0) ? "" : ","); - if (regnostarlist && !frontend::REGFLAG_XER_OV(*regnostarlist)) - m_drcuml->log_printf("*"); - } - if (frontend::REGFLAG_XER_SO(reglist)) - { - m_drcuml->log_printf("%sxer_so", (count++ == 0) ? "" : ","); - if (regnostarlist && !frontend::REGFLAG_XER_SO(*regnostarlist)) - m_drcuml->log_printf("*"); - } - if (frontend::REGFLAG_XER_COUNT(reglist)) - { - m_drcuml->log_printf("%sxer_count", (count++ == 0) ? "" : ","); - if (regnostarlist && !frontend::REGFLAG_XER_COUNT(*regnostarlist)) - m_drcuml->log_printf("*"); - } - if (frontend::REGFLAG_CTR(reglist)) - { - m_drcuml->log_printf("%sctr", (count++ == 0) ? "" : ","); - if (regnostarlist && !frontend::REGFLAG_CTR(*regnostarlist)) - m_drcuml->log_printf("*"); - } - if (frontend::REGFLAG_LR(reglist)) - { - m_drcuml->log_printf("%slr", (count++ == 0) ? "" : ","); - if (regnostarlist && !frontend::REGFLAG_LR(*regnostarlist)) - m_drcuml->log_printf("*"); - } - - for (regnum = 0; regnum < 8; regnum++) - { - if (frontend::REGFLAG_FPSCR(reglist, regnum)) - { - m_drcuml->log_printf("%sfpscr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist && !frontend::REGFLAG_FPSCR(*regnostarlist, regnum)) - m_drcuml->log_printf("*"); - } - } - - m_drcuml->log_printf("] "); -} - - /*------------------------------------------------- log_opcode_desc - log a list of descriptions -------------------------------------------------*/ @@ -4089,41 +3927,50 @@ void ppc_device::log_register_list(const char *string, const std::bitset<128> &r void ppc_device::log_opcode_desc(const opcode_desc *desclist, int indent) { util::ovectorstream buffer; + buffer.imbue(std::locale::classic()); - /* open the file, creating it if necessary */ + // assume no indent is the start of a sequence and needs a heading if (indent == 0) m_drcuml->log_printf("\nDescriptor list @ %08X\n", desclist->pc); - /* output each descriptor */ + // output each description for ( ; desclist != nullptr; desclist = desclist->next()) { buffer.clear(); buffer.seekp(0); - - /* disassemble the current instruction and output it to the log */ - if (m_drcuml->logging() || m_drcuml->logging_native()) - { - if (desclist->virtual_noop()) - buffer << ""; - else - m_dasm.dasm_one(buffer, desclist->pc, desclist->opptr); - } - else - buffer << "???"; - + desclist->log_flags(buffer); buffer.put('\0'); - m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(*desclist), &buffer.vec()[0]); + m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: ", desclist->pc, desclist->physpc, desclist->targetpc, &buffer.vec()[0]); - /* output register states */ - log_register_list("use", desclist->regin, nullptr); - log_register_list("mod", desclist->regout, &desclist->regreq); - m_drcuml->log_printf("\n"); + // disassemble the current instruction and output it to the log + buffer.clear(); + buffer.seekp(0); + if (desclist->virtual_noop()) + buffer << ""; + else + m_dasm.dasm_one(buffer, desclist->pc, desclist->opptr); + buffer.put('\0'); + m_drcuml->log_printf("%-30s", &buffer.vec()[0]); - /* if we have a delay slot, output it recursively */ + // output register dependencies + buffer.clear(); + buffer.seekp(0); + if (!desclist->regin.none()) + { + desclist->log_registers_used(buffer); + if (!desclist->regout.none()) + buffer << ' '; + } + if (!desclist->regout.none()) + desclist->log_registers_modified(buffer); + buffer.put('\0'); + m_drcuml->log_printf("%s\n", &buffer.vec()[0]); + + // if we have a delay slot, output it recursively if (desclist->delay.first() != nullptr) log_opcode_desc(desclist->delay.first(), indent + 1); - /* at the end of a sequence add a dividing line */ + // at the end of a sequence add a dividing line if (desclist->end_sequence()) m_drcuml->log_printf("-----\n"); } diff --git a/src/devices/cpu/powerpc/ppcfe.cpp b/src/devices/cpu/powerpc/ppcfe.cpp index 6b8be8061fe..e970e6706f8 100644 --- a/src/devices/cpu/powerpc/ppcfe.cpp +++ b/src/devices/cpu/powerpc/ppcfe.cpp @@ -16,38 +16,166 @@ #include "cpu/drcfe.ipp" -//************************************************************************** -// MACROS -//************************************************************************** -#define GPR_USED(desc, x) do { (desc).regin.set(REG_BIT_R0 + x); } while (0) -#define GPR_USED_OR_ZERO(desc, x) do { if (x) GPR_USED((desc), x); } while (0) -#define GPR_MODIFIED(desc, x) do { (desc).regout.set(REG_BIT_R0 + x); } while (0) +/*------------------------------------------------- + log_flags - write a string representing the + instruction description flags to a stream +-------------------------------------------------*/ -#define FPR_USED(desc, x) do { (desc).regin.set(REG_BIT_FR0 + x); } while (0) -#define FPR_MODIFIED(desc, x) do { (desc).regout.set(REG_BIT_FR0 + x); } while (0) +void ppc_device::opcode_desc::log_flags(std::ostream &stream) const +{ + // branches + if (is_unconditional_branch()) + stream << 'U'; + else if (is_conditional_branch()) + stream << 'C'; + else + stream << '.'; -#define CR_USED(desc, x) do { CR_BIT_USED((desc), (x * 4) + 0); CR_BIT_USED((desc), (x * 4) + 1); CR_BIT_USED((desc), (x * 4) + 2); CR_BIT_USED((desc), (x * 4) + 3); } while (0) -#define CR_BIT_USED(desc, x) do { (desc).regin.set(64 + 31 - x); } while (0) -#define CR_MODIFIED(desc, x) do { CR_BIT_MODIFIED((desc), (x * 4) + 0); CR_BIT_MODIFIED((desc), (x * 4) + 1); CR_BIT_MODIFIED((desc), (x * 4) + 2); CR_BIT_MODIFIED((desc), (x * 4) + 3); } while (0) -#define CR_BIT_MODIFIED(desc, x) do { (desc).regout.set(64 + 31 - x); } while (0) + // intrablock branches + stream << (intrablock_branch() ? 'i' : '.'); -#define XER_CA_USED(desc) do { (desc).regin.set(REG_BIT_XER_CA); } while (0) -#define XER_OV_USED(desc) do { (desc).regin.set(REG_BIT_XER_OV); } while (0) -#define XER_SO_USED(desc) do { (desc).regin.set(REG_BIT_XER_SO); } while (0) -#define XER_COUNT_USED(desc) do { (desc).regin.set(REG_BIT_XER_COUNT); } while (0) -#define XER_CA_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_CA); } while (0) -#define XER_OV_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_OV); } while (0) -#define XER_SO_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_SO); } while (0) -#define XER_COUNT_MODIFIED(desc) do { (desc).regout.set(REG_BIT_XER_COUNT); } while (0) + // branch targets + stream << (is_branch_target() ? 'B' : '.'); -#define CTR_USED(desc) do { (desc).regin.set(REG_BIT_CTR); } while (0) -#define CTR_MODIFIED(desc) do { (desc).regout.set(REG_BIT_CTR); } while (0) -#define LR_USED(desc) do { (desc).regin.set(REG_BIT_LR); } while (0) -#define LR_MODIFIED(desc) do { (desc).regout.set(REG_BIT_LR); } while (0) + // delay slots + stream << (in_delay_slot() ? 'D' : '.'); -#define FPSCR_USED(desc, x) do { (desc).regin.set(REG_BIT_FPSCR0 + x); } while (0) -#define FPSCR_MODIFIED(desc, x) do { (desc).regout.set(REG_BIT_FPSCR0 + x); } while (0) + // exceptions + if (will_cause_exception()) + stream << 'E'; + else if (can_cause_exception()) + stream << 'e'; + else + stream << '.'; + + // read/write + if (reads_memory()) + stream << 'R'; + else if (writes_memory()) + stream << 'W'; + else + stream << '.'; + + // TLB validation + stream << (validate_tlb() ? 'V' : '.'); + + // redispatch + stream << (redispatch() ? 'R' : '.'); +} + + +/*------------------------------------------------- + log_register_list - log a list of registers +-------------------------------------------------*/ + +void ppc_device::opcode_desc::log_registers_used(std::ostream &stream) const +{ + stream << "[use:"; + log_register_list(stream, regin, nullptr); + stream << ']'; +} + +void ppc_device::opcode_desc::log_registers_modified(std::ostream &stream) const +{ + stream << "[mod:"; + log_register_list(stream, regout, ®req); + stream << ']'; +} + +void ppc_device::opcode_desc::log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist) +{ + static const char *const crtext[4] = { "lt", "gt", "eq", "so" }; + int count = 0; + + for (int regnum = 0; regnum < 32; regnum++) + { + if (reglist[REG_BIT_R0 + regnum]) + { + if (count++) + stream << ','; + stream << 'r' << regnum; + if (regnostarlist && !(*regnostarlist)[REG_BIT_R0 + regnum]) + stream << '*'; + } + } + + for (int regnum = 0; regnum < 32; regnum++) + { + if (reglist[REG_BIT_FR0 + regnum]) + { + if (count++) + stream << ','; + stream << "fr" << regnum; + if (regnostarlist && !(*regnostarlist)[REG_BIT_FR0 + regnum]) + stream << '*'; + } + } + + for (int regnum = 0; regnum < 8; regnum++) + { + if (!reg_cr(reglist, regnum)) + continue; + + if (count++) + stream << ','; + stream << "cr" << regnum; + if ((reg_cr(reglist, regnum) == 0x0f) && (!regnostarlist || (reg_cr(*regnostarlist, regnum) == 0x0f) || !reg_cr(*regnostarlist, regnum))) + { + if (regnostarlist && !reg_cr(*regnostarlist, regnum)) + stream << '*'; + } + else + { + int crcount = 0; + stream << '['; + for (int crnum = 0; crnum < 4; crnum++) + { + if (reg_cr_bit(reglist, (regnum * 4) + crnum)) + { + if (crcount++) + stream << ','; + stream << crtext[crnum]; + if (regnostarlist && !reg_cr_bit(*regnostarlist, (regnum * 4) + crnum)) + stream << '*'; + } + } + stream << ']'; + } + } + + const auto log_bit = + [&stream, &count, ®list, ®nostarlist] (size_t bit, const char *name) + { + if (reglist[bit]) + { + if (count++) + stream << ','; + stream << name; + if (regnostarlist && !(*regnostarlist)[bit]) + stream << '*'; + } + }; + + log_bit(REG_BIT_XER_CA, "xer_ca"); + log_bit(REG_BIT_XER_OV, "xer_ov"); + log_bit(REG_BIT_XER_SO, "xer_so"); + log_bit(REG_BIT_XER_COUNT, "xer_count"); + log_bit(REG_BIT_CTR, "ctr"); + log_bit(REG_BIT_LR, "lr"); + + for (int regnum = 0; regnum < 8; regnum++) + { + if (reglist[REG_BIT_FPSCR0 + regnum]) + { + if (count++) + stream << ','; + stream << "fpscr" << regnum; + if (regnostarlist && !(*regnostarlist)[REG_BIT_FPSCR0 + regnum]) + stream << '*'; + } + } +} @@ -117,15 +245,15 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; case 0x03: // TWI - GPR_USED(desc, G_RA(op)); + desc.set_gpr_used(G_RA(op)); desc.set_can_cause_exception(); if (is_603_class()) desc.cycles = 2; // 603 return true; case 0x07: // MULLI - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); if (is_403_class()) desc.cycles = 4; // 4XX else if (is_601_class()) @@ -142,53 +270,53 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; } - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); return true; case 0x0e: // ADDI case 0x0f: // ADDIS - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); return true; case 0x0a: // CMPLI case 0x0b: // CMPI - GPR_USED(desc, G_RA(op)); - XER_SO_USED(desc); - CR_MODIFIED(desc, G_CRFD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_xer_so_used(); + desc.set_cr_modified(G_CRFD(op)); return true; case 0x08: // SUBFIC case 0x0c: // ADDIC - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ca_modified(); return true; case 0x0d: // ADDIC. - GPR_USED(desc, G_RA(op)); - XER_SO_USED(desc); - GPR_MODIFIED(desc, G_RT(op)); - XER_CA_MODIFIED(desc); - CR_MODIFIED(desc, 0); + desc.set_gpr_used(G_RA(op)); + desc.set_xer_so_used(); + desc.set_gpr_modified(G_RT(op)); + desc.set_xer_ca_modified(); + desc.set_cr_modified(0); return true; case 0x10: // BCx if (!(G_BO(op) & 0x10)) { - CR_BIT_USED(desc, G_BI(op)); + desc.set_cr_bit_used(G_BI(op)); // branch folding - if (prev == nullptr || REGFLAG_CR(prev->regout) == 0) + if (!prev || (prev->cr_modified() == 0)) desc.cycles = 0; } if (!(G_BO(op) & 0x04)) { - CTR_USED(desc); - CTR_MODIFIED(desc); + desc.set_ctr_used(); + desc.set_ctr_modified(); } if (op & M_LK) - LR_MODIFIED(desc); + desc.set_lr_modified(); if ((G_BO(op) & 0x14) == 0x14) { desc.set_is_unconditional_branch(); @@ -218,7 +346,7 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x12: // Bx if (op & M_LK) - LR_MODIFIED(desc); + desc.set_lr_modified(); desc.set_is_unconditional_branch(); desc.set_end_sequence(); desc.targetpc = ((int32_t)(G_LI(op) << 8) >> 6) + ((op & M_AA) ? 0 : desc.pc); @@ -231,34 +359,34 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return describe_13(op, desc, prev); case 0x14: // RLWIMIx - GPR_USED(desc, G_RS(op)); - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RA(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x15: // RLWINMx - GPR_USED(desc, G_RS(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_modified(G_RA(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x17: // RLWNMx - GPR_USED(desc, G_RS(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RA(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; @@ -266,16 +394,16 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x19: // ORIS case 0x1a: // XORI case 0x1b: // XORIS - GPR_USED(desc, G_RS(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_modified(G_RA(op)); return true; case 0x1c: // ANDI. case 0x1d: // ANDIS. - GPR_USED(desc, G_RS(op)); - XER_SO_USED(desc); - GPR_MODIFIED(desc, G_RA(op)); - CR_MODIFIED(desc, 0); + desc.set_gpr_used(G_RS(op)); + desc.set_xer_so_used(); + desc.set_gpr_modified(G_RA(op)); + desc.set_cr_modified(0); return true; case 0x1f: // 0x1f group @@ -285,8 +413,8 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x22: // LBZ case 0x28: // LHZ case 0x2a: // LHA - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); desc.set_reads_memory(); return true; @@ -296,17 +424,17 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x2b: // LHAU if (G_RA(op) == 0 || G_RA(op) == G_RD(op)) return false; - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_gpr_modified(G_RA(op)); desc.set_reads_memory(); return true; case 0x24: // STW case 0x26: // STB case 0x2c: // STH - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RS(op)); desc.set_writes_memory(); return true; @@ -315,28 +443,28 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x2d: // STHU if (G_RA(op) == 0) return false; - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RS(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_modified(G_RA(op)); desc.set_writes_memory(); return true; case 0x2e: // LMW - GPR_USED_OR_ZERO(desc, G_RA(op)); + desc.set_gpr_used_or_zero(G_RA(op)); for (regnum = G_RD(op); regnum < 32; regnum++) { if (regnum != G_RA(op) || ((m_ppc.m_cap & PPCCAP_4XX) && regnum == 31)) - GPR_MODIFIED(desc, regnum); + desc.set_gpr_modified(regnum); } desc.set_reads_memory(); desc.cycles = 32 - G_RD(op); return true; case 0x2f: // STMW - GPR_USED_OR_ZERO(desc, G_RA(op)); + desc.set_gpr_used_or_zero(G_RA(op)); for (regnum = G_RS(op); regnum < 32; regnum++) - GPR_USED(desc, regnum); + desc.set_gpr_used(regnum); desc.set_writes_memory(); desc.cycles = 32 - G_RS(op); return true; @@ -345,8 +473,8 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x32: // LFD if (!(m_ppc.m_cap & PPCCAP_FPU)) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_fpr_modified(G_RD(op)); desc.set_reads_memory(); return true; @@ -356,9 +484,9 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (G_RA(op) == 0) return false; - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RA(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RA(op)); + desc.set_fpr_modified(G_RD(op)); desc.set_reads_memory(); return true; @@ -366,8 +494,8 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) case 0x36: // STFD if (!(m_ppc.m_cap & PPCCAP_FPU)) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - FPR_USED(desc, G_RS(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_fpr_used(G_RS(op)); desc.set_writes_memory(); return true; @@ -377,9 +505,9 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev) return false; if (G_RA(op) == 0) return false; - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RA(op)); - FPR_USED(desc, G_RS(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RA(op)); + desc.set_fpr_used(G_RS(op)); desc.set_writes_memory(); return true; @@ -407,24 +535,24 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc switch (opswitch) { case 0x000: // MTCRF - CR_USED(desc, G_CRFS(op)); - CR_MODIFIED(desc, G_CRFD(op)); + desc.set_cr_used(G_CRFS(op)); + desc.set_cr_modified(G_CRFD(op)); // CR logical folding - if (prev == nullptr || REGFLAG_CR(prev->regout) == 0) + if (!prev || (prev->cr_modified() == 0)) desc.cycles = 0; return true; case 0x010: // BCLRx - LR_USED(desc); + desc.set_lr_used(); if (!(G_BO(op) & 0x10)) - CR_BIT_USED(desc, G_BI(op)); + desc.set_cr_bit_used(G_BI(op)); if (!(G_BO(op) & 0x04)) { - CTR_USED(desc); - CTR_MODIFIED(desc); + desc.set_ctr_used(); + desc.set_ctr_modified(); } if (op & M_LK) - LR_MODIFIED(desc); + desc.set_lr_modified(); if ((G_BO(op) & 0x14) == 0x14) { desc.set_is_unconditional_branch(); @@ -445,11 +573,11 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc case 0x121: // CREQV case 0x1a1: // CRORC case 0x1c1: // CROR - CR_BIT_USED(desc, G_CRBA(op)); - CR_BIT_USED(desc, G_CRBB(op)); - CR_BIT_MODIFIED(desc, G_CRBD(op)); + desc.set_cr_bit_used(G_CRBA(op)); + desc.set_cr_bit_used(G_CRBB(op)); + desc.set_cr_bit_modified(G_CRBD(op)); // CR logical folding - if (prev == nullptr || REGFLAG_CR(prev->regout) == 0) + if (!prev || (prev->cr_modified() == 0)) desc.cycles = 0; return true; @@ -489,13 +617,13 @@ bool ppc_device::frontend::describe_13(uint32_t op, opcode_desc &desc, const opc return true; case 0x210: // BCCTRx - CTR_USED(desc); + desc.set_ctr_used(); if (!(G_BO(op) & 0x10)) - CR_BIT_USED(desc, G_BI(op)); + desc.set_cr_bit_used(G_BI(op)); if (!(G_BO(op) & 0x04)) return false; if (op & M_LK) - LR_MODIFIED(desc); + desc.set_lr_modified(); if ((G_BO(op) & 0x14) == 0x14) { desc.set_is_unconditional_branch(); @@ -556,15 +684,15 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x000: // CMP case 0x020: // CMPL - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - XER_SO_USED(desc); - CR_MODIFIED(desc, G_CRFD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_xer_so_used(); + desc.set_cr_modified(G_CRFD(op)); return true; case 0x004: // TW - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); desc.set_can_cause_exception(); if (is_603_class()) desc.cycles = 2; // 603 @@ -572,28 +700,28 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x008: // SUBFCx case 0x00a: // ADDCx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ca_modified(); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x088: // SUBFEx case 0x08a: // ADDEx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - XER_CA_USED(desc); - GPR_MODIFIED(desc, G_RD(op)); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_xer_ca_used(); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ca_modified(); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; @@ -601,27 +729,27 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x0ca: // ADDZEx case 0x0e8: // SUBFMEx case 0x0ea: // ADDMEx - GPR_USED(desc, G_RA(op)); - XER_CA_USED(desc); - GPR_MODIFIED(desc, G_RD(op)); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_xer_ca_used(); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ca_modified(); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x00b: // MULHWUx case 0x04b: // MULHWx case 0x0eb: // MULLWx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } if (is_403_class()) desc.cycles = 4; // 4XX @@ -635,13 +763,13 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x1cb: // DIVWUx case 0x1eb: // DIVWx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } if (is_403_class()) desc.cycles = 33; // 4XX @@ -655,63 +783,63 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x028: // SUBFx case 0x10a: // ADDx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x208: // SUBFCOx case 0x20a: // ADDCOx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); + desc.set_xer_ca_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x288: // SUBFEOx case 0x28a: // ADDEOx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - XER_CA_USED(desc); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_xer_ca_used(); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); + desc.set_xer_ca_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x2c8: // SUBFZEOx case 0x2ca: // ADDZEOx case 0x2e8: // SUBFMEOx case 0x2ea: // ADDMEOx - GPR_USED(desc, G_RA(op)); - XER_CA_USED(desc); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_xer_ca_used(); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); + desc.set_xer_ca_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x2eb: // MULLWOx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); if (is_403_class()) desc.cycles = 4; // 4XX else if (is_601_class()) @@ -724,13 +852,13 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x3cb: // DIVWUOx case 0x3eb: // DIVWOx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); if (is_403_class()) desc.cycles = 33; // 4XX else if (is_601_class()) @@ -743,25 +871,25 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x228: // SUBFOx case 0x30a: // ADDOx - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x013: // MFCR - CR_USED(desc, 0); - CR_USED(desc, 1); - CR_USED(desc, 2); - CR_USED(desc, 3); - CR_USED(desc, 4); - CR_USED(desc, 5); - CR_USED(desc, 6); - CR_USED(desc, 7); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_cr_used(0); + desc.set_cr_used(1); + desc.set_cr_used(2); + desc.set_cr_used(3); + desc.set_cr_used(4); + desc.set_cr_used(5); + desc.set_cr_used(6); + desc.set_cr_used(7); + desc.set_gpr_modified(G_RD(op)); return true; case 0x136: // ECIWX @@ -775,9 +903,9 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x157: // LHAX case 0x216: // LWBRX case 0x316: // LHBRX - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); desc.set_reads_memory(); return true; @@ -790,38 +918,38 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x19c: // ORCx case 0x1bc: // ORx case 0x1dc: // NANDx - GPR_USED(desc, G_RS(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RA(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x218: // SRWx case 0x318: // SRAWx - GPR_USED(desc, G_RS(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RA(op)); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RA(op)); + desc.set_xer_ca_modified(); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x01a: // CNTLZWx case 0x39a: // EXTSHx case 0x3ba: // EXTSBx - GPR_USED(desc, G_RS(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_modified(G_RA(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; @@ -833,15 +961,15 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x3d6: // ICBI if (!(m_ppc.m_cap & (PPCCAP_VEA | PPCCAP_4XX))) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); return true; case 0x1d6: // DCBI if (!(m_ppc.m_cap & (PPCCAP_OEA | PPCCAP_4XX))) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -852,26 +980,26 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x177: // LHAUX if (G_RA(op) == 0 || G_RA(op) == G_RD(op)) return false; - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_gpr_modified(G_RA(op)); desc.set_reads_memory(); return true; case 0x153: // MFSPR - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_modified(G_RD(op)); spr = compute_spr(G_SPR(op)); if (spr == SPR_LR) - LR_USED(desc); + desc.set_lr_used(); if (spr == SPR_CTR) - CTR_USED(desc); + desc.set_ctr_used(); if (spr == SPR_XER) { - XER_COUNT_USED(desc); - XER_CA_USED(desc); - XER_OV_USED(desc); - XER_SO_USED(desc); + desc.set_xer_count_used(); + desc.set_xer_ca_used(); + desc.set_xer_ov_used(); + desc.set_xer_so_used(); } if (spr & 0x010) { @@ -887,7 +1015,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return true; case 0x053: // MFMSR - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_modified(G_RD(op)); desc.set_can_cause_exception(); desc.set_can_expose_external_int(); desc.set_privileged(); @@ -896,14 +1024,14 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return true; case 0x253: // MFSR - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_modified(G_RD(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; case 0x293: // MFSRIN - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -911,45 +1039,45 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x173: // MFTB if (!(m_ppc.m_cap & PPCCAP_VEA)) return false; - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_modified(G_RD(op)); spr = compute_spr(G_SPR(op)); if (spr == SPRVEA_TBL_R) desc.cycles = POWERPC_COUNT_READ_TBL; return true; case 0x068: // NEGx - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x268: // NEGOx - GPR_USED(desc, G_RA(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x090: // MTCRF - GPR_USED(desc, G_RS(op)); - if (G_CRM(op) & 0x80) CR_MODIFIED(desc, 0); - if (G_CRM(op) & 0x40) CR_MODIFIED(desc, 1); - if (G_CRM(op) & 0x20) CR_MODIFIED(desc, 2); - if (G_CRM(op) & 0x10) CR_MODIFIED(desc, 3); - if (G_CRM(op) & 0x08) CR_MODIFIED(desc, 4); - if (G_CRM(op) & 0x04) CR_MODIFIED(desc, 5); - if (G_CRM(op) & 0x02) CR_MODIFIED(desc, 6); - if (G_CRM(op) & 0x01) CR_MODIFIED(desc, 7); + desc.set_gpr_used(G_RS(op)); + if (G_CRM(op) & 0x80) desc.set_cr_modified(0); + if (G_CRM(op) & 0x40) desc.set_cr_modified(1); + if (G_CRM(op) & 0x20) desc.set_cr_modified(2); + if (G_CRM(op) & 0x10) desc.set_cr_modified(3); + if (G_CRM(op) & 0x08) desc.set_cr_modified(4); + if (G_CRM(op) & 0x04) desc.set_cr_modified(5); + if (G_CRM(op) & 0x02) desc.set_cr_modified(6); + if (G_CRM(op) & 0x01) desc.set_cr_modified(7); return true; case 0x092: // MTMSR - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used(G_RS(op)); desc.set_can_cause_exception(); desc.set_end_sequence(); desc.set_privileged(); @@ -963,24 +1091,24 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x0d2: // MTSR if (!(m_ppc.m_cap & PPCCAP_OEA)) return false; - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used(G_RS(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; case 0x1d3: // MTSPR - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used(G_RS(op)); spr = compute_spr(G_SPR(op)); if (spr == SPR_LR) - LR_MODIFIED(desc); + desc.set_lr_modified(); if (spr == SPR_CTR) - CTR_MODIFIED(desc); + desc.set_ctr_modified(); if (spr == SPR_XER) { - XER_COUNT_MODIFIED(desc); - XER_CA_MODIFIED(desc); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_xer_count_modified(); + desc.set_xer_ca_modified(); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); } if (spr & 0x010) { @@ -999,9 +1127,9 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x197: // STHX case 0x296: // STWBRX case 0x396: // STHBRX - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_used(G_RS(op)); desc.set_writes_memory(); return true; @@ -1010,18 +1138,18 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x1b7: // STHUX if (G_RA(op) == 0) return false; - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_USED(desc, G_RS(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_modified(G_RA(op)); desc.set_writes_memory(); return true; case 0x0f2: // MTSRIN if (!(m_ppc.m_cap & PPCCAP_OEA)) return false; - GPR_USED(desc, G_RS(op)); - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_used(G_RB(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -1029,7 +1157,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x132: // TLBIE if (!(m_ppc.m_cap & PPCCAP_OEA)) return false; - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used(G_RB(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -1050,21 +1178,21 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return true; case 0x200: // MCRXR - XER_CA_USED(desc); - XER_OV_USED(desc); - XER_SO_USED(desc); - CR_MODIFIED(desc, G_CRFD(op)); - XER_CA_MODIFIED(desc); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_xer_ca_used(); + desc.set_xer_ov_used(); + desc.set_xer_so_used(); + desc.set_cr_modified(G_CRFD(op)); + desc.set_xer_ca_modified(); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); return true; case 0x215: // LSWX - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - XER_COUNT_USED(desc); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_xer_count_used(); for (regnum = 0; regnum < 32; regnum++) - GPR_MODIFIED(desc, regnum); + desc.set_gpr_modified(regnum); desc.set_reads_memory(); return true; @@ -1072,9 +1200,9 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x257: // LFDX if (!(m_ppc.m_cap & PPCCAP_FPU)) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); desc.set_reads_memory(); return true; @@ -1099,34 +1227,34 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; if (G_RA(op) == 0) return false; - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RA(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RA(op)); + desc.set_fpr_modified(G_RD(op)); desc.set_reads_memory(); return true; case 0x255: // LSWI - GPR_USED_OR_ZERO(desc, G_RA(op)); + desc.set_gpr_used_or_zero(G_RA(op)); for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4) - GPR_MODIFIED(desc, (G_RD(op) + regnum / 4) % 32); + desc.set_gpr_modified((G_RD(op) + regnum / 4) % 32); desc.set_reads_memory(); desc.cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4; return true; case 0x295: // STSWX - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - XER_COUNT_USED(desc); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_xer_count_used(); for (regnum = 0; regnum < 32; regnum++) - GPR_USED(desc, regnum); + desc.set_gpr_used(regnum); desc.set_writes_memory(); return true; case 0x2d5: // STSWI - GPR_USED_OR_ZERO(desc, G_RA(op)); + desc.set_gpr_used_or_zero(G_RA(op)); for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4) - GPR_USED(desc, (G_RD(op) + regnum / 4) % 32); + desc.set_gpr_used((G_RD(op) + regnum / 4) % 32); desc.set_writes_memory(); desc.cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4; return true; @@ -1136,9 +1264,9 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x3d7: // STFIWX if (!(m_ppc.m_cap & PPCCAP_FPU)) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - FPR_USED(desc, G_RS(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_fpr_used(G_RS(op)); desc.set_writes_memory(); return true; @@ -1148,29 +1276,29 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; if (G_RA(op) == 0) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RA(op)); - FPR_USED(desc, G_RS(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RA(op)); + desc.set_fpr_used(G_RS(op)); desc.set_writes_memory(); return true; case 0x338: // SRAWIx - GPR_USED(desc, G_RS(op)); - GPR_MODIFIED(desc, G_RA(op)); - XER_CA_MODIFIED(desc); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_modified(G_RA(op)); + desc.set_xer_ca_modified(); if (op & M_RC) { - XER_SO_USED(desc); - CR_MODIFIED(desc, 0); + desc.set_xer_so_used(); + desc.set_cr_modified(0); } return true; case 0x3f6: // DCBZ if (!(m_ppc.m_cap & (PPCCAP_VEA | PPCCAP_4XX))) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); desc.set_writes_memory(); return true; @@ -1179,8 +1307,8 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x3c6: // ICCCI if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -1189,9 +1317,9 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x3e6: // ICREAD if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; - GPR_USED_OR_ZERO(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RT(op)); + desc.set_gpr_used_or_zero(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RT(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -1199,7 +1327,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x143: // MFDCR if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; - GPR_MODIFIED(desc, G_RD(op)); + desc.set_gpr_modified(G_RD(op)); desc.set_can_cause_exception(); desc.set_privileged(); return true; @@ -1207,7 +1335,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x1c3: // MTDCR if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used(G_RS(op)); desc.set_can_cause_exception(); desc.set_can_expose_external_int(); desc.set_privileged(); @@ -1216,7 +1344,7 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc case 0x083: // WRTEE if (!(m_ppc.m_cap & PPCCAP_4XX)) return false; - GPR_USED(desc, G_RS(op)); + desc.set_gpr_used(G_RS(op)); desc.set_can_expose_external_int(); return true; @@ -1243,13 +1371,13 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; } - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x6b: // MUL (POWER) @@ -1258,13 +1386,13 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; } - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x108: // DOZ (POWER) @@ -1273,13 +1401,13 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; } - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x168: // ABS (POWER) @@ -1289,13 +1417,13 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; } - GPR_USED(desc, G_RA(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RD(op)); - XER_OV_MODIFIED(desc); - XER_SO_MODIFIED(desc); + desc.set_gpr_used(G_RA(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RD(op)); + desc.set_xer_ov_modified(); + desc.set_xer_so_modified(); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; case 0x21d: // MASKIR (POWER) @@ -1304,11 +1432,11 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc return false; } - GPR_USED(desc, G_RS(op)); - GPR_USED(desc, G_RB(op)); - GPR_MODIFIED(desc, G_RA(op)); + desc.set_gpr_used(G_RS(op)); + desc.set_gpr_used(G_RB(op)); + desc.set_gpr_modified(G_RA(op)); if (op & M_RC) - CR_MODIFIED(desc, 0); + desc.set_cr_modified(0); return true; } @@ -1332,59 +1460,59 @@ bool ppc_device::frontend::describe_3b(uint32_t op, opcode_desc &desc, const opc switch (opswitch) { case 0x12: // FDIVSx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); + desc.set_cr_modified(1); if (is_601_class()) desc.cycles = 17; // 601 else if (is_603_class()) desc.cycles = 18; // 603 else desc.cycles = 17; // ??? - FPSCR_MODIFIED(desc, 4); + desc.set_fpscr_modified(4); return true; case 0x14: // FSUBSx case 0x15: // FADDSx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); - FPSCR_MODIFIED(desc, 4); + desc.set_cr_modified(1); + desc.set_fpscr_modified(4); return true; case 0x19: // FMULSx - not the same form as FSUB/FADD! - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_REGC(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_REGC(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); - FPSCR_MODIFIED(desc, 4); + desc.set_cr_modified(1); + desc.set_fpscr_modified(4); return true; case 0x16: // FSQRTSx case 0x18: // FRESx - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); - FPSCR_MODIFIED(desc, 4); + desc.set_cr_modified(1); + desc.set_fpscr_modified(4); return true; case 0x1c: // FMSUBSx case 0x1d: // FMADDSx case 0x1e: // FNMSUBSx case 0x1f: // FNMADDSx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_USED(desc, G_REGC(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_used(G_REGC(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); - FPSCR_MODIFIED(desc, 4); + desc.set_cr_modified(1); + desc.set_fpscr_modified(4); return true; } @@ -1411,56 +1539,56 @@ bool ppc_device::frontend::describe_3f(uint32_t op, opcode_desc &desc, const opc switch (opswitch) { case 0x12: // FDIVx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); + desc.set_cr_modified(1); if (is_601_class()) desc.cycles = 31; // 601 else if (is_603_class()) desc.cycles = 33; // 603 else desc.cycles = 31; // ??? - FPSCR_MODIFIED(desc, 4); + desc.set_fpscr_modified(4); return true; case 0x19: // FMULx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_REGC(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_REGC(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); + desc.set_cr_modified(1); desc.cycles = 2; // 601/603 - FPSCR_MODIFIED(desc, 4); + desc.set_fpscr_modified(4); return true; case 0x14: // FSUBx case 0x15: // FADDx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); - FPSCR_MODIFIED(desc, 4); + desc.set_cr_modified(1); + desc.set_fpscr_modified(4); return true; case 0x16: // FSQRTx case 0x1a: // FSQRTEx - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); - FPSCR_MODIFIED(desc, 4); + desc.set_cr_modified(1); + desc.set_fpscr_modified(4); return true; case 0x17: // FSELx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_USED(desc, G_REGC(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_used(G_REGC(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); + desc.set_cr_modified(1); desc.cycles = 2; // 601/603 return true; @@ -1468,14 +1596,14 @@ bool ppc_device::frontend::describe_3f(uint32_t op, opcode_desc &desc, const opc case 0x1d: // FMADDx case 0x1e: // FNMSUBx case 0x1f: // FNMADDx - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - FPR_USED(desc, G_REGC(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_used(G_REGC(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); + desc.set_cr_modified(1); desc.cycles = 2; // 601/603 - FPSCR_MODIFIED(desc, 4); + desc.set_fpscr_modified(4); return true; } } @@ -1490,62 +1618,62 @@ bool ppc_device::frontend::describe_3f(uint32_t op, opcode_desc &desc, const opc case 0x000: // FCMPU case 0x020: // FCMPO - FPR_USED(desc, G_RA(op)); - FPR_USED(desc, G_RB(op)); - CR_MODIFIED(desc, G_CRFD(op)); + desc.set_fpr_used(G_RA(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_cr_modified(G_CRFD(op)); return true; case 0x00c: // FRSPx case 0x00e: // FCTIWx case 0x00f: // FCTIWZx - FPSCR_MODIFIED(desc, 4); + desc.set_fpscr_modified(4); [[fallthrough]]; case 0x028: // FNEGx case 0x048: // FMRx case 0x088: // FNABSx case 0x108: // FABSx - FPR_USED(desc, G_RB(op)); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpr_used(G_RB(op)); + desc.set_fpr_modified(G_RD(op)); if (op & M_RC) - CR_MODIFIED(desc, 1); + desc.set_cr_modified(1); return true; case 0x026: // MTFSB1x case 0x046: // MTFSB0x - FPSCR_MODIFIED(desc, G_CRBD(op) / 4); + desc.set_fpscr_modified(G_CRBD(op) / 4); return true; case 0x040: // MCRFS - FPSCR_USED(desc, G_CRFS(op)); - CR_MODIFIED(desc, G_CRFD(op)); + desc.set_fpscr_used(G_CRFS(op)); + desc.set_cr_modified(G_CRFD(op)); return true; case 0x086: // MTFSFIx - FPSCR_MODIFIED(desc, G_CRFD(op)); + desc.set_fpscr_modified(G_CRFD(op)); return true; case 0x247: // MFFSx - FPSCR_USED(desc, 0); - FPSCR_USED(desc, 1); - FPSCR_USED(desc, 2); - FPSCR_USED(desc, 3); - FPSCR_USED(desc, 4); - FPSCR_USED(desc, 5); - FPSCR_USED(desc, 6); - FPSCR_USED(desc, 7); - FPR_MODIFIED(desc, G_RD(op)); + desc.set_fpscr_used(0); + desc.set_fpscr_used(1); + desc.set_fpscr_used(2); + desc.set_fpscr_used(3); + desc.set_fpscr_used(4); + desc.set_fpscr_used(5); + desc.set_fpscr_used(6); + desc.set_fpscr_used(7); + desc.set_fpr_modified(G_RD(op)); return true; case 0x2c7: // MTFSFx - FPR_USED(desc, G_RB(op)); - if (G_CRM(op) & 0x80) FPSCR_MODIFIED(desc, 0); - if (G_CRM(op) & 0x40) FPSCR_MODIFIED(desc, 1); - if (G_CRM(op) & 0x20) FPSCR_MODIFIED(desc, 2); - if (G_CRM(op) & 0x10) FPSCR_MODIFIED(desc, 3); - if (G_CRM(op) & 0x08) FPSCR_MODIFIED(desc, 4); - if (G_CRM(op) & 0x04) FPSCR_MODIFIED(desc, 5); - if (G_CRM(op) & 0x02) FPSCR_MODIFIED(desc, 6); - if (G_CRM(op) & 0x01) FPSCR_MODIFIED(desc, 7); + desc.set_fpr_used(G_RB(op)); + if (G_CRM(op) & 0x80) desc.set_fpscr_modified(0); + if (G_CRM(op) & 0x40) desc.set_fpscr_modified(1); + if (G_CRM(op) & 0x20) desc.set_fpscr_modified(2); + if (G_CRM(op) & 0x10) desc.set_fpscr_modified(3); + if (G_CRM(op) & 0x08) desc.set_fpscr_modified(4); + if (G_CRM(op) & 0x04) desc.set_fpscr_modified(5); + if (G_CRM(op) & 0x02) desc.set_fpscr_modified(6); + if (G_CRM(op) & 0x01) desc.set_fpscr_modified(7); return true; } } diff --git a/src/devices/cpu/powerpc/ppcfe.h b/src/devices/cpu/powerpc/ppcfe.h index b72f9256fb9..c3483db3dd7 100644 --- a/src/devices/cpu/powerpc/ppcfe.h +++ b/src/devices/cpu/powerpc/ppcfe.h @@ -17,6 +17,8 @@ #include "cpu/drcfe.h" #include +#include +#include //************************************************************************** @@ -32,6 +34,45 @@ public: u32 cycles; // number of cycles needed to execute + void set_gpr_used(unsigned n) { regin.set(REG_BIT_R0 + n); } + void set_gpr_used_or_zero(unsigned n) { if (n) set_gpr_used(n); } + void set_gpr_modified(unsigned n) { regout.set(REG_BIT_R0 + n); } + + void set_fpr_used(unsigned n) { regin.set(REG_BIT_FR0 + n); } + void set_fpr_modified(unsigned n) { regout.set(REG_BIT_FR0 + n); } + + void set_cr_used(unsigned n) { set_cr_bit_used((n * 4) + 0); set_cr_bit_used((n * 4) + 1); set_cr_bit_used((n * 4) + 2); set_cr_bit_used((n * 4) + 3); } + void set_cr_bit_used(unsigned n) { regin.set(64 + 31 - n); } + void set_cr_modified(unsigned n) { set_cr_bit_modified((n * 4) + 0); set_cr_bit_modified((n * 4) + 1); set_cr_bit_modified((n * 4) + 2); set_cr_bit_modified((n * 4) + 3); } + void set_cr_bit_modified(unsigned n) { regout.set(64 + 31 - n); } + + void set_xer_ca_used() { regin.set(REG_BIT_XER_CA); } + void set_xer_ov_used() { regin.set(REG_BIT_XER_OV); } + void set_xer_so_used() { regin.set(REG_BIT_XER_SO); } + void set_xer_count_used() { regin.set(REG_BIT_XER_COUNT); } + void set_xer_ca_modified() { regout.set(REG_BIT_XER_CA); } + void set_xer_ov_modified() { regout.set(REG_BIT_XER_OV); } + void set_xer_so_modified() { regout.set(REG_BIT_XER_SO); } + void set_xer_count_modified() { regout.set(REG_BIT_XER_COUNT); } + + void set_ctr_used() { regin.set(REG_BIT_CTR); } + void set_lr_used() { regin.set(REG_BIT_LR); } + void set_ctr_modified() { regout.set(REG_BIT_CTR); } + void set_lr_modified() { regout.set(REG_BIT_LR); } + + void set_fpscr_used(unsigned n) { regin.set(REG_BIT_FPSCR0 + n); } + void set_fpscr_modified(unsigned n) { regout.set(REG_BIT_FPSCR0 + n); } + + uint32_t cr_modified() const { return regmask_field<64, 32>(regout); } + uint8_t cr_modified(unsigned n) const { return reg_cr(regout, n); } + uint32_t cr_required() const { return regmask_field<64, 32>(regreq); } + uint8_t cr_required(unsigned n) const { return reg_cr(regreq, n); } + + bool xer_ca_required() const { return regreq[REG_BIT_XER_CA]; } + bool xer_ov_required() const { return regreq[REG_BIT_XER_OV]; } + bool xer_so_required() const { return regreq[REG_BIT_XER_SO]; } + bool xer_count_required() const { return regreq[REG_BIT_XER_COUNT]; } + void set_can_expose_external_int() { m_extra_flags.set(CAN_EXPOSE_EXTERNAL_INT); } void set_privileged() { m_extra_flags.set(PRIVILEGED); } void set_compiler_unmapped() { m_extra_flags.set(COMPILER_UNMAPPED); } @@ -48,6 +89,8 @@ public: void reset(offs_t curpc, bool in_delay_slot) { + static_assert(REG_BIT_COUNT <= 128); + opcode_desc_base::reset(curpc, in_delay_slot); physpc = curpc; @@ -56,45 +99,9 @@ public: m_extra_flags.reset(); } -protected: - enum - { - CAN_EXPOSE_EXTERNAL_INT = 0, - PRIVILEGED, - COMPILER_UNMAPPED, - CAN_CHANGE_MODES, - READS_MEMORY, - WRITES_MEMORY, - - EXTRA_FLAG_COUNT - }; - - std::bitset m_extra_flags; -}; - -class ppc_device::frontend : public drc_frontend_base -{ -public: - // TODO: uncomment constexpr when GCC/GNU libstdc++ catch up - static constexpr bool REGFLAG_R(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_R0 + n]; } - static constexpr bool REGFLAG_RZ(const opcode_desc::regmask &r, unsigned n) { return n && REGFLAG_R(r, n); } - static constexpr bool REGFLAG_FR(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_FR0 + n]; } - static /*constexpr*/ uint32_t REGFLAG_CR(const opcode_desc::regmask &r) { return uint32_t(((r << 32) >> (128 - 32)).to_ulong()); } - static /*constexpr*/ uint8_t REGFLAG_CR(const opcode_desc::regmask &r, unsigned n) { return uint8_t(((r << ((4 * n) + 32)) >> (128 - 4)).to_ulong()); } - static constexpr bool REGFLAG_CR_BIT(const opcode_desc::regmask &r, unsigned n) { return r[64 + 31 - n]; } - static constexpr bool REGFLAG_XER_CA(const opcode_desc::regmask &r) { return r[REG_BIT_XER_CA]; } - static constexpr bool REGFLAG_XER_OV(const opcode_desc::regmask &r) { return r[REG_BIT_XER_OV]; } - static constexpr bool REGFLAG_XER_SO(const opcode_desc::regmask &r) { return r[REG_BIT_XER_SO]; } - static constexpr bool REGFLAG_XER_COUNT(const opcode_desc::regmask &r) { return r[REG_BIT_XER_COUNT]; } - static constexpr bool REGFLAG_CTR(const opcode_desc::regmask &r) { return r[REG_BIT_CTR]; } - static constexpr bool REGFLAG_LR(const opcode_desc::regmask &r) { return r[REG_BIT_LR]; } - static constexpr bool REGFLAG_FPSCR(const opcode_desc::regmask &r, unsigned n) { return r[REG_BIT_FPSCR0 + n]; } - - // construction/destruction - frontend(ppc_device &ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); - ~frontend(); - - opcode_desc const *describe_code(offs_t startpc); + void log_flags(std::ostream &stream) const; + void log_registers_used(std::ostream &stream) const; + void log_registers_modified(std::ostream &stream) const; protected: enum @@ -107,13 +114,52 @@ protected: REG_BIT_XER_COUNT, REG_BIT_CTR, REG_BIT_LR, - REG_BIT_FPSCR0 + REG_BIT_FPSCR0, + + REG_BIT_COUNT = REG_BIT_FPSCR0 + 8 }; + enum + { + CAN_EXPOSE_EXTERNAL_INT = 0, + PRIVILEGED, + COMPILER_UNMAPPED, + CAN_CHANGE_MODES, + READS_MEMORY, + WRITES_MEMORY, + + EXTRA_FLAG_COUNT + }; + + // TODO: uncomment constexpr when GCC/GNU libstdc++ catch up + static /*constexpr*/ bool reg_cr_bit(const regmask &r, unsigned n) + { + return r[64 + 31 - n]; + } + static /*constexpr*/ uint8_t reg_cr(const regmask &r, unsigned n) + { + return uint8_t(((r << ((4 * n) + 32)) >> (128 - 4)).to_ulong()); + } + + static void log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist); + + std::bitset m_extra_flags; +}; + +class ppc_device::frontend : public drc_frontend_base +{ +public: + // construction/destruction + frontend(ppc_device &ppc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence); + ~frontend(); + + opcode_desc const *describe_code(offs_t startpc); + +protected: bool describe(opcode_desc &desc, const opcode_desc *prev); // inlines - uint32_t compute_spr(uint32_t spr) const { return ((spr >> 5) | (spr << 5)) & 0x3ff; } + static constexpr uint32_t compute_spr(uint32_t spr) { return ((spr >> 5) | (spr << 5)) & 0x3ff; } bool is_403_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_403GA || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GB || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GC || m_ppc.m_flavor == ppc_device::PPC_MODEL_403GCX || m_ppc.m_flavor == ppc_device::PPC_MODEL_405GP); } bool is_601_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_601); } bool is_602_class() const { return (m_ppc.m_flavor == ppc_device::PPC_MODEL_602); } diff --git a/src/devices/cpu/sh/sh.cpp b/src/devices/cpu/sh/sh.cpp index c507410d759..72945b2e364 100644 --- a/src/devices/cpu/sh/sh.cpp +++ b/src/devices/cpu/sh/sh.cpp @@ -11,6 +11,10 @@ #include "emuopts.h" +#include "util/vecstream.h" + +#include + sh_common_execution::sh_common_execution(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness, address_map_constructor internal) : cpu_device(mconfig, type, tag, owner, clock) @@ -2028,59 +2032,6 @@ void sh_common_execution::save_fast_iregs(drcuml_block &block) } -/*------------------------------------------------- - log_desc_flags_to_string - generate a string - representing the instruction description - flags --------------------------------------------------*/ - -const char *sh_common_execution::log_desc_flags_to_string(const opcode_desc &desc) -{ - static char tempbuf[30]; - char *dest = tempbuf; - - /* branches */ - if (desc.is_unconditional_branch()) - *dest++ = 'U'; - else if (desc.is_conditional_branch()) - *dest++ = 'C'; - else - *dest++ = '.'; - - /* intrablock branches */ - *dest++ = desc.intrablock_branch() ? 'i' : '.'; - - /* branch targets */ - *dest++ = desc.is_branch_target() ? 'B' : '.'; - - /* delay slots */ - *dest++ = desc.in_delay_slot() ? 'D' : '.'; - - /* exceptions */ - if (desc.will_cause_exception()) - *dest++ = 'E'; - else if (desc.can_cause_exception()) - *dest++ = 'e'; - else - *dest++ = '.'; - - /* read/write */ - if (desc.reads_memory()) - *dest++ = 'R'; - else if (desc.writes_memory()) - *dest++ = 'W'; - else - *dest++ = '.'; - - /* TLB validation */ - *dest++ = desc.validate_tlb() ? 'V' : '.'; - - /* redispatch */ - *dest++ = desc.redispatch() ? 'R' : '.'; - return tempbuf; -} - - /*------------------------------------------------- log_register_list - log a list of GPR registers -------------------------------------------------*/ @@ -2156,6 +2107,10 @@ void sh_common_execution::log_register_list(const char *string, const std::bitse void sh_common_execution::log_opcode_desc(const opcode_desc *desclist, int indent) { + sh_disassembler sh2d(false); + util::ovectorstream buffer; + buffer.imbue(std::locale::classic()); + /* open the file, creating it if necessary */ if (indent == 0) m_drcuml->log_printf("\nDescriptor list @ %08X\n", desclist->pc); @@ -2163,22 +2118,21 @@ void sh_common_execution::log_opcode_desc(const opcode_desc *desclist, int inden /* output each descriptor */ for ( ; desclist != nullptr; desclist = desclist->next()) { - std::ostringstream stream; + buffer.clear(); + buffer.seekp(0); + desclist->log_flags(buffer); + buffer.put('\0'); + m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: ", desclist->pc, desclist->physpc, desclist->targetpc, &buffer.vec()[0]); /* disassemle the current instruction and output it to the log */ - if (m_drcuml->logging() || m_drcuml->logging_native()) - { - if (desclist->virtual_noop()) - stream << ""; - else - { - sh_disassembler sh2d(false); - sh2d.dasm_one(stream, desclist->pc, desclist->opptr); - } - } + buffer.clear(); + buffer.seekp(0); + if (desclist->virtual_noop()) + buffer << ""; else - stream << "???"; - m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(*desclist), stream.str()); + sh2d.dasm_one(buffer, desclist->pc, desclist->opptr); + buffer.put('\0'); + m_drcuml->log_printf("%-36s", &buffer.vec()[0]); /* output register states */ log_register_list("use", desclist->regin, nullptr); diff --git a/src/devices/cpu/sh/sh.h b/src/devices/cpu/sh/sh.h index 3d726db11bd..c06fbeddf10 100644 --- a/src/devices/cpu/sh/sh.h +++ b/src/devices/cpu/sh/sh.h @@ -443,7 +443,6 @@ public: void alloc_handle(uml::code_handle *&handleptr, const char *name); void load_fast_iregs(drcuml_block &block); void save_fast_iregs(drcuml_block &block); - const char *log_desc_flags_to_string(const opcode_desc &flags); void log_register_list(const char *string, const std::bitset<32> ®list, const std::bitset<32> *regnostarlist); void log_opcode_desc(const opcode_desc *desclist, int indent); void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); diff --git a/src/devices/cpu/sh/sh_fe.cpp b/src/devices/cpu/sh/sh_fe.cpp index f62ecf110fb..0716231aef7 100644 --- a/src/devices/cpu/sh/sh_fe.cpp +++ b/src/devices/cpu/sh/sh_fe.cpp @@ -14,6 +14,56 @@ #include "cpu/drcfe.ipp" + +/*------------------------------------------------- + log_flags - log the instruction description to + a stream +-------------------------------------------------*/ + +void sh_common_execution::opcode_desc::log_flags(std::ostream &stream) const +{ + // branches + if (is_unconditional_branch()) + stream << 'U'; + else if (is_conditional_branch()) + stream << 'C'; + else + stream << '.'; + + // intrablock branches + stream << (intrablock_branch() ? 'i' : '.'); + + // branch targets + stream << (is_branch_target() ? 'B' : '.'); + + // delay slots + stream << (in_delay_slot() ? 'D' : '.'); + + // exceptions + if (will_cause_exception()) + stream << 'E'; + else if (can_cause_exception()) + stream << 'e'; + else + stream << '.'; + + // read/write + if (reads_memory()) + stream << (writes_memory() ? '+' : 'R'); + else if (writes_memory()) + stream << 'W'; + else + stream << '.'; + + // TLB validation + stream << (validate_tlb() ? 'V' : '.'); + + // redispatch + stream << (redispatch() ? 'R' : '.'); +} + + + /*************************************************************************** INSTRUCTION PARSERS ***************************************************************************/ diff --git a/src/devices/cpu/sh/sh_fe.h b/src/devices/cpu/sh/sh_fe.h index 26439f8af8d..ba63138e3eb 100644 --- a/src/devices/cpu/sh/sh_fe.h +++ b/src/devices/cpu/sh/sh_fe.h @@ -16,6 +16,9 @@ #include "cpu/drcfe.h" +#include +#include + class sh_common_execution::opcode_desc : public opcode_desc_base { @@ -83,6 +86,8 @@ public: m_can_expose_external_int = false; } + void log_flags(std::ostream &stream) const; + private: bool m_reads_memory; bool m_writes_memory; diff --git a/src/lib/util/client_ws.hpp b/src/lib/util/client_ws.hpp index 04af5026014..01540907843 100644 --- a/src/lib/util/client_ws.hpp +++ b/src/lib/util/client_ws.hpp @@ -99,7 +99,7 @@ namespace webpp { std::list send_queue; void send_from_queue() { - strand.post([this]() { + asio::post(strand, [this]() { asio::async_write(*socket, send_queue.begin()->send_stream->streambuf, strand.wrap([this](const std::error_code& ec, size_t /*bytes_transferred*/) { auto send_queued=send_queue.begin(); @@ -175,7 +175,7 @@ namespace webpp { } if(io_context->stopped()) - io_context->reset(); + io_context->restart(); if(!resolver) resolver= std::make_unique(*io_context); @@ -237,7 +237,7 @@ namespace webpp { send_stream->put(message_stream->get()^mask[c%4]); } - connection->strand.post([this, send_stream, callback]() { + asio::post(connection->strand, [this, send_stream, callback]() { connection->send_queue.emplace_back(send_stream, callback); if(connection->send_queue.size()==1) connection->send_from_queue(); @@ -516,15 +516,13 @@ namespace webpp { protected: void connect() override { - asio::ip::tcp::resolver::query query(host, std::to_string(port)); - - resolver->async_resolve(query, [this] - (const std::error_code &ec, asio::ip::tcp::resolver::iterator it){ + resolver->async_resolve(host, std::to_string(port), [this] + (const std::error_code &ec, asio::ip::tcp::resolver::results_type results){ if(!ec) { connection=std::shared_ptr(new Connection(*io_context, new WS(*io_context))); - asio::async_connect(*connection->socket, it, [this] - (const std::error_code &ec, asio::ip::tcp::resolver::iterator /*it*/){ + asio::async_connect(*connection->socket, results, [this] + (const std::error_code &ec, const asio::ip::tcp::endpoint &/*endpoint*/){ if(!ec) { asio::ip::tcp::no_delay option(true); connection->socket->set_option(option); diff --git a/src/lib/util/server_ws_impl.hpp b/src/lib/util/server_ws_impl.hpp index c1ba9f1a392..4f7468232c3 100644 --- a/src/lib/util/server_ws_impl.hpp +++ b/src/lib/util/server_ws_impl.hpp @@ -96,7 +96,7 @@ namespace webpp { std::list send_queue; void send_from_queue(const std::shared_ptr &connection) { - strand.post([this, connection]() { + asio::post(strand, [this, connection]() { asio::async_write(*socket, send_queue.begin()->header_stream->streambuf, strand.wrap([this, connection](const std::error_code& ec, size_t /*bytes_transferred*/) { if(!ec) { @@ -219,11 +219,11 @@ namespace webpp { io_context=std::make_shared(); if(io_context->stopped()) - io_context->reset(); + io_context->restart(); asio::ip::tcp::endpoint endpoint; if(config.address.size()>0) - endpoint=asio::ip::tcp::endpoint(asio::ip::address::from_string(config.address), config.port); + endpoint=asio::ip::tcp::endpoint(asio::ip::make_address(config.address), config.port); else endpoint=asio::ip::tcp::endpoint(asio::ip::tcp::v4(), config.port); @@ -283,7 +283,7 @@ namespace webpp { else header_stream->put(static_cast(length)); - connection->strand.post([connection, header_stream, message_stream, callback]() { + asio::post(connection->strand, [connection, header_stream, message_stream, callback]() { connection->send_queue.emplace_back(header_stream, message_stream, callback); if(connection->send_queue.size()==1) connection->send_from_queue(connection); @@ -653,12 +653,12 @@ namespace webpp { void timer_idle_init(const std::shared_ptr &connection) { if(config.timeout_idle>0) { connection->timer_idle= std::make_unique(connection->socket->get_executor()); - connection->timer_idle->expires_from_now(std::chrono::seconds(static_cast(config.timeout_idle))); + connection->timer_idle->expires_after(std::chrono::seconds(static_cast(config.timeout_idle))); timer_idle_expired_function(connection); } } void timer_idle_reset(const std::shared_ptr &connection) const { - if(config.timeout_idle>0 && connection->timer_idle->expires_from_now(std::chrono::seconds(static_cast(config.timeout_idle)))>0) + if(config.timeout_idle>0 && connection->timer_idle->expires_after(std::chrono::seconds(static_cast(config.timeout_idle)))>0) timer_idle_expired_function(connection); } void timer_idle_cancel(const std::shared_ptr &connection) const { diff --git a/src/mame/capcom/cps2comm.cpp b/src/mame/capcom/cps2comm.cpp index 95701ef264d..2dac7035b1c 100644 --- a/src/mame/capcom/cps2comm.cpp +++ b/src/mame/capcom/cps2comm.cpp @@ -173,7 +173,8 @@ public: void stop() { - m_ioctx.post( + asio::post( + m_ioctx, [this] () { m_stopping = true; @@ -191,7 +192,8 @@ public: void set_routing(u8 val) { - m_ioctx.post( + asio::post( + m_ioctx, [this, val] () { if (BIT(val, 0, 2) == 0U) @@ -216,7 +218,8 @@ public: void send_in(u8 data) { - m_ioctx.post( + asio::post( + m_ioctx, [this, data] () { if (m_in_connected) @@ -231,7 +234,8 @@ public: void send_out(u8 data) { - m_ioctx.post( + asio::post( + m_ioctx, [this, data] () { if (m_out_sock.is_open()) diff --git a/src/mame/nakajima/nakajies.cpp b/src/mame/nakajima/nakajies.cpp index 4506c368d4b..3fc10647388 100644 --- a/src/mame/nakajima/nakajies.cpp +++ b/src/mame/nakajima/nakajies.cpp @@ -302,8 +302,7 @@ public: , m_rtc(*this, "rtc") , m_view{ {*this, "view_0"}, {*this, "view_1"}, {*this, "view_2"}, {*this, "view_3"}, - {*this, "view_4"}, {*this, "view_5"}, {*this, "view_6"}, {*this, "view_7"} - } + {*this, "view_4"}, {*this, "view_5"}, {*this, "view_6"}, {*this, "view_7"} } , m_port_row(*this, "ROW%u", 0U) , m_port_debug(*this, "debug") , m_rombank(*this, "rombank%u", 0U) @@ -312,11 +311,11 @@ public: { } - void nakajies210(machine_config &config); - void nakajies220(machine_config &config); - void nakajies220_256(machine_config &config); - void nakajies250(machine_config &config); - void dator3k(machine_config &config); + void nakajies210(machine_config &config) ATTR_COLD; + void nakajies220(machine_config &config) ATTR_COLD; + void nakajies220_256(machine_config &config) ATTR_COLD; + void nakajies250(machine_config &config) ATTR_COLD; + void dator3k(machine_config &config) ATTR_COLD; DECLARE_INPUT_CHANGED_MEMBER(trigger_irq); @@ -621,16 +620,14 @@ void nakajies_state::machine_reset() m_lcd_memory_start = 0; m_matrix = 0; - for (int i = 0; i < 8; i++) - { - m_view[i].select(0); - } + for (auto &view : m_view) + view.select(0); - for (int i = 0; i < 8; i++) - { - m_rombank[i]->set_entry(0x0f); - m_rambank[i]->set_entry(0x0f); - } + for (auto &bank : m_rombank) + bank->set_entry(0x0f); + + for (auto &bank : m_rambank) + bank->set_entry(0x0f); } u32 nakajies_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) @@ -826,11 +823,11 @@ ROM_END } // anonymous namespace -// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 199?, wales210, 0, 0, nakajies210, nakajies, nakajies_state, empty_init, "Walther", "ES-210", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // German, 128KB RAM -COMP( 199?, dator3k, wales210, 0, dator3k, nakajies, nakajies_state, empty_init, "Dator", "Dator 3000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Spanish, 128KB RAM -COMP( 199?, es210_es, wales210, 0, nakajies210, nakajies, nakajies_state, empty_init, "Nakajima", "ES-210 (Spain)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Spanish, 128KB RAM -COMP( 199?, drwrt100, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 128KB RAM +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 199?, wales210, 0, 0, nakajies210, nakajies, nakajies_state, empty_init, "Walther", "ES-210", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // German, 128KB RAM +COMP( 199?, dator3k, wales210, 0, dator3k, nakajies, nakajies_state, empty_init, "Dator", "Dator 3000", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Spanish, 128KB RAM +COMP( 199?, es210_es, wales210, 0, nakajies210, nakajies, nakajies_state, empty_init, "Nakajima", "ES-210 (Spain)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Spanish, 128KB RAM +COMP( 199?, drwrt100, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T100", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 128KB RAM COMP( 1996, drwrt400, wales210, 0, nakajies220_256, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T400", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 256KB RAM, also found a machine with 160KB RAM -COMP( 199?, drwrt450, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter 450", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 128KB RAM -COMP( 199?, drwrt200, wales210, 0, nakajies250, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T200", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 256KB? RAM +COMP( 199?, drwrt450, wales210, 0, nakajies220, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter 450", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 128KB RAM +COMP( 199?, drwrt200, wales210, 0, nakajies250, nakajies, nakajies_state, empty_init, "NTS", "DreamWriter T200", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // English, 256KB? RAM diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index ded12f49f09..b479313119b 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -51,7 +51,7 @@ using util::BIT; #include "cpu/dsp563xx/dsp563xxd.h" #include "cpu/dspp/dsppdasm.h" #include "cpu/e0c6200/e0c6200d.h" -#include "cpu/e132xs/32xsdasm.h" +#include "cpu/e132xs/e1dasm.h" #include "cpu/es5510/es5510d.h" #include "cpu/esrip/esripdsm.h" #include "cpu/f2mc16/f2mc16d.h" @@ -347,16 +347,6 @@ struct z8000_unidasm_t : z8000_disassembler::config virtual bool get_segmented_mode() const override { return segmented_mode; } } z8000_unidasm; -// Configuration missing -struct hyperstone_unidasm_t : hyperstone_disassembler::config -{ - bool h; - hyperstone_unidasm_t() { h = false; } - virtual ~hyperstone_unidasm_t() = default; - - virtual bool get_h() const { return h; } -} hyperstone_unidasm; - // Configuration missing struct nec_unidasm_t : nec_disassembler::config { @@ -491,7 +481,7 @@ static const dasm_table_entry dasm_table[] = { "hp_09825_67907", be, -1, []() -> util::disasm_interface * { return new hp_09825_67907_disassembler; } }, { "hpc16083", le, 0, []() -> util::disasm_interface * { return new hpc16083_disassembler; } }, { "hpc16164", le, 0, []() -> util::disasm_interface * { return new hpc16164_disassembler; } }, - { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(&hyperstone_unidasm); } }, + { "hyperstone", be, 0, []() -> util::disasm_interface * { return new hyperstone_disassembler(nullptr); } }, { "ht1130", le, 0, []() -> util::disasm_interface * { return new ht1130_disassembler; } }, { "i4004", le, 0, []() -> util::disasm_interface * { return new i4004_disassembler; } }, { "i4040", le, 0, []() -> util::disasm_interface * { return new i4040_disassembler; } }, From f1e58a0f9dde14f3b56564b008718ef1097f28e7 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 4 Mar 2026 18:38:56 +0100 Subject: [PATCH 133/351] New systems marked not working ------------------------------ Fruit Dream II [Hammy] --- src/mame/dataeast/dfruit2.cpp | 328 +++++++++++++++++++++++++++++++++ src/mame/dataeast/exprraid.cpp | 8 +- src/mame/mame.lst | 3 + 3 files changed, 335 insertions(+), 4 deletions(-) create mode 100644 src/mame/dataeast/dfruit2.cpp diff --git a/src/mame/dataeast/dfruit2.cpp b/src/mame/dataeast/dfruit2.cpp new file mode 100644 index 00000000000..968a78755bc --- /dev/null +++ b/src/mame/dataeast/dfruit2.cpp @@ -0,0 +1,328 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +Fruit Dream 2 + +PCB DE-0426 + +Z84C0008PEC CPU +LC3664BML-70 SRAM +52 Data East custom chip (Sprites) +77 Data East custom chip (?) +141 Data East custom chip (Tilemaps) +153 Data East custom chip (Alpha blending) +223 Data East custom chip (GFX) +T82C55AM-10 PPI +MAX695CPE Microprocessor Supervisory IC +YM2203C sound chip +28.0000 MHz XTAL +bank of 8 switches +*/ + +#include "emu.h" + +#include "deco16ic.h" +#include "decocrpt.h" +#include "decospr.h" + +#include "cpu/z80/z80.h" +#include "machine/i8255.h" +#include "sound/ymopn.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" +#include "tilemap.h" + + +namespace { + +class dfruit2_state : public driver_device +{ +public: + dfruit2_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_deco_tilegen(*this, "tilegen"), + m_sprgen(*this, "sprgen"), + m_spriteram(*this, "spriteram", 0x1000, ENDIANNESS_BIG) + { } + + void dfruit2(machine_config &config) ATTR_COLD; + + void init_dfruit2() ATTR_COLD; + +private: + required_device m_maincpu; + required_device m_deco_tilegen; + required_device m_sprgen; + + memory_share_creator m_spriteram; + + uint16_t m_pf_control = 0; + uint16_t m_pf1_data = 0; + uint16_t m_pf2_data = 0; + + uint8_t spriteram_r(offs_t offset); + void spriteram_w(offs_t offset, uint8_t data); + uint8_t tilegen_pf1_data_r(offs_t offset); + void tilegen_pf1_data_w(offs_t offset, uint8_t data); + uint8_t tilegen_pf2_data_r(offs_t offset); + void tilegen_pf2_data_w(offs_t offset, uint8_t data); + void tilegen_control_w(offs_t offset, uint8_t data); + DECO16IC_BANK_CB_MEMBER(bank_callback); + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + void program_map(address_map &map) ATTR_COLD; +}; + + +uint32_t dfruit2_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + m_sprgen->set_flip_screen(true); // sprites are flipped relative to tilemaps + + m_deco_tilegen->tilemap_2_draw(screen, bitmap, cliprect, 0, 0); + m_deco_tilegen->tilemap_1_draw(screen, bitmap, cliprect, 0, 0); + m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x1000); + + return 0; +} + +uint8_t dfruit2_state::spriteram_r(offs_t offset) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + return(m_spriteram[offs] & 0xff); + else + return(m_spriteram[offs] >> 8); +} + +void dfruit2_state::spriteram_w(offs_t offset, uint8_t data) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + m_spriteram[offs] = (m_spriteram[offs] & 0xff00) | data; + else + m_spriteram[offs] = (m_spriteram[offs] & 0x00ff) | (data << 8); +} + +uint8_t dfruit2_state::tilegen_pf1_data_r(offs_t offset) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + return m_deco_tilegen->pf1_data_r(offs) & 0xff; + else + return m_deco_tilegen->pf1_data_r(offs) >> 8; +} + +void dfruit2_state::tilegen_pf1_data_w(offs_t offset, uint8_t data) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + m_pf1_data = (m_pf1_data & 0xff00) | data; + else + m_pf1_data = (m_pf1_data & 0x00ff) | (data << 8); + + m_deco_tilegen->pf1_data_w(offs, m_pf1_data, 0xffff); +} + +uint8_t dfruit2_state::tilegen_pf2_data_r(offs_t offset) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + return m_deco_tilegen->pf2_data_r(offs) & 0xff; + else + return m_deco_tilegen->pf2_data_r(offs) >> 8; +} + +void dfruit2_state::tilegen_pf2_data_w(offs_t offset, uint8_t data) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + m_pf2_data = (m_pf2_data & 0xff00) | data; + else + m_pf2_data = (m_pf2_data & 0x00ff) | (data << 8); + + m_deco_tilegen->pf2_data_w(offs, m_pf2_data, 0xffff); +} + +void dfruit2_state::tilegen_control_w(offs_t offset, uint8_t data) +{ + int const offs = offset >> 1; + + if (!BIT(offset, 0)) + m_pf_control = (m_pf_control & 0xff00) | data; + else + m_pf_control = (m_pf_control & 0x00ff) | (data << 8); + + m_deco_tilegen->pf_control_w(offs, m_pf_control, 0xffff); +} + +DECO16IC_BANK_CB_MEMBER(dfruit2_state::bank_callback) +{ + return (bank & 0xf0) << 8; // TODO: not verified +} + + +void dfruit2_state::program_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x0000, 0x7fff).rom(); + map(0x8000, 0x9fff).ram(); // WORK RAM CHECK NG if this range isn't mapped. TODO: probably battery backed by the MAX695CPE + map(0xa000, 0xa003).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); // probably + map(0xa004, 0xa005).rw("ym", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); // probably + // map(0xa008, 0xa008).r(); // watchdog? + // map(0xa028, 0xa028).w(); // MAX695CPE?? + // map(0xa029, 0xa029).w(); // MAX695CPE?? + map(0xa02b, 0xa02b).lr8(NAME([]( ) -> uint8_t { return 0x00; })); // MAX695CPE?? VBLANK / IRQ? + map(0xb000, 0xb00f).w(FUNC(dfruit2_state::tilegen_control_w)); // probably + // map(0xb100, 0xb100).w(); + // map(0xb101, 0xb101).w(); + // map(0xb109, 0xb109).w(); + map(0xc000, 0xc1ff).ram(); // COLOR RAM CHECK NG if this range isn't mapped + map(0xd000, 0xdfff).rw(FUNC(dfruit2_state::tilegen_pf1_data_r), FUNC(dfruit2_state::tilegen_pf1_data_w)); // SCREEN RAM CHECK NG if this range isn't mapped + map(0xe000, 0xefff).rw(FUNC(dfruit2_state::tilegen_pf2_data_r), FUNC(dfruit2_state::tilegen_pf2_data_w)); + map(0xf000, 0xffff).rw(FUNC(dfruit2_state::spriteram_r), FUNC(dfruit2_state::spriteram_w)); // maybe not the whole range +} + + +static INPUT_PORTS_START( dfruit2 ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("DSW") + PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW:1" ) + PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW:2" ) + PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW:3" ) + PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW:4" ) + PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW:5" ) + PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW:6" ) + PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW:7" ) + PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW:8" ) +INPUT_PORTS_END + + +static const gfx_layout tile_8x8_layout = +{ + 8,8, + RGN_FRAC(1,2), + 4, + { RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 }, + { STEP8(0,1) }, + { STEP8(0,8*2) }, + 16*8 +}; + +// TODO: wrong? see missing parts of the disclaimer text at 0x700-0x752 in the GFX viewer +static const gfx_layout _16x16_layout = +{ + 16,16, + RGN_FRAC(1,2), + 4, + { RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 }, + { STEP8(16*8*2,1), STEP8(0,1) }, + { STEP16(0,8*2) }, + 64*8 +}; + +static GFXDECODE_START( gfx_dfruit2 ) // TODO + GFXDECODE_ENTRY( "tiles", 0, tile_8x8_layout, 0, 32 ) + GFXDECODE_ENTRY( "tiles", 0, _16x16_layout, 0, 32 ) +GFXDECODE_END + +static GFXDECODE_START( gfx_dfruit2_spr ) // TODO + GFXDECODE_ENTRY( "sprites", 0, _16x16_layout, 0, 32 ) +GFXDECODE_END + + +void dfruit2_state::dfruit2(machine_config &config) +{ + Z80(config, m_maincpu, 28_MHz_XTAL / 4); // divider not verified + m_maincpu->set_addrmap(AS_PROGRAM, &dfruit2_state::program_map); + m_maincpu->set_vblank_int("screen", FUNC(dfruit2_state::irq0_line_hold)); + + i8255_device &ppi(I8255A(config, "ppi")); // initialized with 0x9b (mode 0 all reads). TODO: ports are just guessed + ppi.in_pa_callback().set_ioport("IN0"); + ppi.in_pb_callback().set_ioport("IN1"); + ppi.in_pc_callback().set_ioport("DSW"); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO + screen.set_refresh_hz(58); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); + screen.set_size(64*8, 32*8); + screen.set_visarea(0*8, 40*8-1, 1*8, 31*8-1); + screen.set_screen_update(FUNC(dfruit2_state::screen_update)); + + PALETTE(config, "palette").set_format(palette_device::xBGR_555, 0x200 / 2); // TODO + + GFXDECODE(config, "gfxdecode", "palette", gfx_dfruit2); + + DECO16IC(config, m_deco_tilegen, 0); // TODO: everything + m_deco_tilegen->set_pf1_size(DECO_64x32); + m_deco_tilegen->set_pf2_size(DECO_64x32); + m_deco_tilegen->set_pf1_col_bank(0x00); + m_deco_tilegen->set_pf2_col_bank(0x10); + m_deco_tilegen->set_pf1_col_mask(0x0f); + m_deco_tilegen->set_pf2_col_mask(0x0f); + m_deco_tilegen->set_bank1_callback(FUNC(dfruit2_state::bank_callback)); + m_deco_tilegen->set_bank2_callback(FUNC(dfruit2_state::bank_callback)); + m_deco_tilegen->set_pf12_8x8_bank(0); + m_deco_tilegen->set_pf12_16x16_bank(1); + m_deco_tilegen->set_gfxdecode_tag("gfxdecode"); + + DECO_SPRITE(config, "sprgen", 0, "palette", gfx_dfruit2_spr); + + SPEAKER(config, "mono").front_center(); + + ym2203_device &ym(YM2203(config, "ym", 28_MHz_XTAL / 8)); + ym.add_route(ALL_OUTPUTS, "mono", 1.00); // divider not verified +} + + +ROM_START( dfruit2 ) + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD( "nn_002.b4", 0x00000, 0x40000, CRC(bab4fa47) SHA1(d9b4ecaf72ced54a1a7f1de7036efe3d939306cf) ) + + ROM_REGION( 0x80000, "sprites", 0 ) + ROM_LOAD( "nn_010.b10", 0x00000, 0x40000, CRC(1ae3c63f) SHA1(c9940c50bfdacf9bbaf823e48abe249b992f74d9) ) + ROM_LOAD( "nn_020.b11", 0x40000, 0x40000, CRC(8e5ebdb8) SHA1(a44c055cd33921561f4b2e1906186d16bfc64783) ) + + ROM_REGION( 0x80000, "tiles", 0 ) + ROM_LOAD( "nn_030.h2", 0x00000, 0x80000, CRC(8f9183af) SHA1(e756306755aed15f40cffcdeedea030c5da9ffb3) ) +ROM_END + + +void dfruit2_state::init_dfruit2() +{ + deco56_decrypt_gfx(machine(), "tiles"); // DECO 141 +} + +} // anonymous namespace + + +GAME( 1994, dfruit2, 0, dfruit2, dfruit2, dfruit2_state, init_dfruit2, ROT0, "Nippon Data Kiki / Star Fish", "Fruit Dream II", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/dataeast/exprraid.cpp b/src/mame/dataeast/exprraid.cpp index 790cab4df6d..442dcfca595 100644 --- a/src/mame/dataeast/exprraid.cpp +++ b/src/mame/dataeast/exprraid.cpp @@ -904,10 +904,10 @@ ROM_START( exprraidbl ) // basically wexpress3 with Express Raider tilemap ROMs ROM_LOAD( "1.12f", 0x0000, 0x8000, CRC(6ce11971) SHA1(16bfa69b3ad02253e81c8110c9b840be03952790) ) ROM_REGION( 0x0400, "proms", 0 ) // PROMs weren't dumped for this set, using the ones from the other - ROM_LOAD( "5b", 0x0000, 0x0100, CRC(da31dfbc) SHA1(ac476440864f538918f7bef2e1db82fd19195f89) ) // red - ROM_LOAD( "6b", 0x0100, 0x0100, CRC(51f25b4c) SHA1(bfcca57613fbb22919e00db1f6a8c7ca50faa60b) ) // green - ROM_LOAD( "7b", 0x0200, 0x0100, CRC(a6168d7f) SHA1(0c7b31adcd764ce2631c3fb5c1a968b01f65e741) ) // blue - ROM_LOAD( "9b", 0x0300, 0x0100, CRC(52aad300) SHA1(ff09772b930afa87e28d0628ef85a589a3d149c9) ) // priority + ROM_LOAD( "prom.5b", 0x0000, 0x0100, CRC(da31dfbc) SHA1(ac476440864f538918f7bef2e1db82fd19195f89) ) // red + ROM_LOAD( "prom.6b", 0x0100, 0x0100, CRC(51f25b4c) SHA1(bfcca57613fbb22919e00db1f6a8c7ca50faa60b) ) // green + ROM_LOAD( "prom.7b", 0x0200, 0x0100, CRC(a6168d7f) SHA1(0c7b31adcd764ce2631c3fb5c1a968b01f65e741) ) // blue + ROM_LOAD( "prom.9b", 0x0300, 0x0100, CRC(52aad300) SHA1(ff09772b930afa87e28d0628ef85a589a3d149c9) ) // priority ROM_END ROM_START( wexpress ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 9b920710598..f5351091f64 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -17287,6 +17287,9 @@ decomult @source:dataeast/deshoros.cpp destiny +@source:dataeast/dfruit2.cpp +dfruit2 + @source:dataeast/dietgo.cpp dietgo dietgoe From efc4a4f712c420884c3b5ec31e6bd0c5f857b2f0 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Wed, 4 Mar 2026 19:40:39 +0200 Subject: [PATCH 134/351] luxor/abc1600: Cleanup. --- src/mame/luxor/abc1600.cpp | 166 +++++++++++++++++++++++++++++++- src/mame/luxor/abc1600.h | 180 ----------------------------------- src/mame/luxor/abc1600_v.cpp | 5 +- src/mame/luxor/abc1600_v.h | 5 +- src/mame/luxor/abc1600mac.h | 2 +- 5 files changed, 169 insertions(+), 189 deletions(-) delete mode 100644 src/mame/luxor/abc1600.h diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 129eb6c1244..6000725fcdb 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -52,9 +52,23 @@ */ #include "emu.h" -#include "abc1600.h" - +#include "abc1600_v.h" +#include "abc1600mac.h" +#include "bus/abcbus/abcbus.h" +#include "bus/abckb/abckb.h" +#include "bus/rs232/rs232.h" +#include "cpu/m68000/m68008.h" +#include "formats/abc1600_dsk.h" +#include "imagedev/floppy.h" #include "machine/74259.h" +#include "machine/e0516.h" +#include "machine/nmc9306.h" +#include "machine/ram.h" +#include "machine/wd_fdc.h" +#include "machine/z80dma.h" +#include "machine/z80scc.h" +#include "machine/z80sio.h" +#include "machine/z8536.h" #include "softlist_dev.h" @@ -65,6 +79,25 @@ #define VERBOSE 0 #include "logmacro.h" +#define MC68008P8_TAG "3f" +#define Z8410AB1_0_TAG "5g" +#define Z8410AB1_1_TAG "7g" +#define Z8410AB1_2_TAG "9g" +#define Z8470AB1_TAG "17b" +#define Z8530B1_TAG "2a" +#define Z8536B1_TAG "15b" +#define SAB1797_02P_TAG "5a" +#define FDC9229BT_TAG "7a" +#define E050_C16PC_TAG "13b" +#define NMC9306_TAG "14c" +#define BUS0I_TAG "bus0i" +#define BUS0X_TAG "bus0x" +#define BUS1_TAG "bus1" +#define BUS2_TAG "bus2" +#define RS232_A_TAG "rs232a" +#define RS232_B_TAG "rs232b" +#define RS232_PR_TAG "rs232pr" +#define ABC_KEYBOARD_PORT_TAG "kb" #define A1 BIT(offset, 1) #define A2 BIT(offset, 2) @@ -92,6 +125,127 @@ enum }; +namespace { + +class abc1600_state : public driver_device +{ +public: + abc1600_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, MC68008P8_TAG), + m_mac(*this, ABC1600_MAC_TAG), + m_dma0(*this, Z8410AB1_0_TAG), + m_dma1(*this, Z8410AB1_1_TAG), + m_dma2(*this, Z8410AB1_2_TAG), + m_dart(*this, Z8470AB1_TAG), + m_scc(*this, Z8530B1_TAG), + m_cio(*this, Z8536B1_TAG), + m_fdc(*this, SAB1797_02P_TAG), + m_rtc(*this, E050_C16PC_TAG), + m_nvram(*this, NMC9306_TAG), + m_ram(*this, RAM_TAG), + m_floppy(*this, SAB1797_02P_TAG":%u", 0U), + m_bus0i(*this, BUS0I_TAG), + m_bus0x(*this, BUS0X_TAG), + m_bus1(*this, BUS1_TAG), + m_bus2(*this, BUS2_TAG), + m_kb(*this, ABC_KEYBOARD_PORT_TAG) + { } + + void abc1600(machine_config &config); + + DECLARE_INPUT_CHANGED_MEMBER( reset ); + +private: + required_device m_maincpu; + required_device m_mac; + required_device m_dma0; + required_device m_dma1; + required_device m_dma2; + required_device m_dart; + required_device m_scc; + required_device m_cio; + required_device m_fdc; + required_device m_rtc; + required_device m_nvram; + required_device m_ram; + required_device_array m_floppy; + required_device m_bus0i; + required_device m_bus0x; + required_device m_bus1; + required_device m_bus2; + required_device m_kb; + + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + + static void floppy_formats(format_registration &fr); + + uint8_t bus_r(offs_t offset); + void bus_w(offs_t offset, uint8_t data); + uint8_t dart_r(offs_t offset); + void dart_w(offs_t offset, uint8_t data); + uint8_t scc_r(offs_t offset); + void scc_w(offs_t offset, uint8_t data); + uint8_t cio_r(offs_t offset); + void cio_w(offs_t offset, uint8_t data); + void fw0_w(uint8_t data); + void fw1_w(uint8_t data); + + void cs7_w(int state); + void btce_w(int state); + void atce_w(int state); + void dmadis_w(int state); + void sysscc_w(int state); + void sysfs_w(int state); + void dbrq0_w(int state) { m_dbrq0 = state; update_br(); } + void dbrq1_w(int state) { m_dbrq1 = state; update_br(); } + void dbrq2_w(int state) { m_dbrq2 = state; update_br(); } + uint8_t read_tren0(offs_t offset) { return m_bus0i->read_tren() & m_bus0x->read_tren(); } + void write_tren0(offs_t offset, uint8_t data) { m_bus0i->write_tren(data); m_bus0x->write_tren(data); } + + uint8_t cio_pa_r(); + uint8_t cio_pb_r(); + void cio_pb_w(uint8_t data); + uint8_t cio_pc_r(); + void cio_pc_w(uint8_t data); + + void nmi_w(int state); + + void cpu_space_map(address_map &map) ATTR_COLD; + + void update_br(); + void update_pren0(int state); + void update_pren1(int state); + void update_drdy0(int state); + void update_drdy1(int state); + void sccrq_a_w(int state) { m_sccrq_a = state; update_drdy1(0); } + void sccrq_b_w(int state) { m_sccrq_b = state; update_drdy1(0); } + void dart_irq_w(int state) { m_dart_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } + void scc_irq_w(int state) { m_scc_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } + + // DMA + int m_dmadis = 0; + int m_sysscc = 0; + int m_sysfs = 0; + int m_dbrq0 = CLEAR_LINE; + int m_dbrq1 = CLEAR_LINE; + int m_dbrq2 = CLEAR_LINE; + + void abc1600_mem(address_map &map) ATTR_COLD; + void mac_mem(address_map &map) ATTR_COLD; + + // peripherals + int m_cs7 = 0; // card select address bit 7 + int m_bus0 = 0; // BUS 0 selected + uint8_t m_csb = 0U; // card select + int m_atce = 0; // V.24 channel A external clock enable + int m_btce = 0; // V.24 channel B external clock enable + bool m_sccrq_a = 0; + bool m_sccrq_b = 0; + int m_scc_irq = 0; + int m_dart_irq = 0; +}; //************************************************************************** @@ -918,14 +1072,14 @@ void abc1600_state::abc1600(machine_config &config) ABC1600_MAC(config, m_mac, 0); m_mac->set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); m_mac->set_cpu(m_maincpu); - m_mac->in_tren0_cb().set(m_bus0i, FUNC(abcbus_slot_device::read_tren)); // TODO bus0x - m_mac->out_tren0_cb().set(m_bus0i, FUNC(abcbus_slot_device::write_tren)); // TODO bus0x + m_mac->in_tren0_cb().set(FUNC(abc1600_state::read_tren0)); + m_mac->out_tren0_cb().set(FUNC(abc1600_state::write_tren0)); m_mac->in_tren1_cb().set(m_bus1, FUNC(abcbus_slot_device::read_tren)); m_mac->out_tren1_cb().set(m_bus1, FUNC(abcbus_slot_device::write_tren)); m_mac->in_tren2_cb().set(m_bus2, FUNC(abcbus_slot_device::read_tren)); m_mac->out_tren2_cb().set(m_bus2, FUNC(abcbus_slot_device::write_tren)); - ls259_device &spec_contr_reg(LS259(config, "spec_contr_reg")); // Special Control Register @ 13E + ls259_device &spec_contr_reg(LS259(config, "spec_contr_reg")); spec_contr_reg.q_out_cb<0>().set(FUNC(abc1600_state::cs7_w)); spec_contr_reg.q_out_cb<2>().set(FUNC(abc1600_state::btce_w)); spec_contr_reg.q_out_cb<3>().set(FUNC(abc1600_state::atce_w)); @@ -1077,6 +1231,8 @@ ROM_START( abc1600 ) ROM_LOAD( "nmc9306.14c", 0x00, 0x20, CRC(1cb59b6e) SHA1(3c955a667034db86fa1b848f0c0317157a3a48f6) ) ROM_END +} // anonymous namespace + //************************************************************************** diff --git a/src/mame/luxor/abc1600.h b/src/mame/luxor/abc1600.h deleted file mode 100644 index 66e7fc93582..00000000000 --- a/src/mame/luxor/abc1600.h +++ /dev/null @@ -1,180 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Curt Coder -#pragma once - -#ifndef MAME_LUXOR_ABC1600_H -#define MAME_LUXOR_ABC1600_H - -#include "bus/abcbus/abcbus.h" -#include "bus/abckb/abckb.h" -#include "bus/rs232/rs232.h" -#include "cpu/m68000/m68008.h" -#include "formats/abc1600_dsk.h" -#include "imagedev/floppy.h" -#include "abc1600mac.h" -#include "machine/e0516.h" -#include "machine/nmc9306.h" -#include "machine/ram.h" -#include "machine/wd_fdc.h" -#include "machine/z80dma.h" -#include "machine/z80scc.h" -#include "machine/z80sio.h" -#include "machine/z8536.h" -#include "abc1600_v.h" - - - -//************************************************************************** -// MACROS / CONSTANTS -//************************************************************************** - -#define MC68008P8_TAG "3f" -#define Z8410AB1_0_TAG "5g" -#define Z8410AB1_1_TAG "7g" -#define Z8410AB1_2_TAG "9g" -#define Z8470AB1_TAG "17b" -#define Z8530B1_TAG "2a" -#define Z8536B1_TAG "15b" -#define SAB1797_02P_TAG "5a" -#define FDC9229BT_TAG "7a" -#define E050_C16PC_TAG "13b" -#define NMC9306_TAG "14c" -#define SCREEN_TAG "screen" -#define BUS0I_TAG "bus0i" -#define BUS0X_TAG "bus0x" -#define BUS1_TAG "bus1" -#define BUS2_TAG "bus2" -#define RS232_A_TAG "rs232a" -#define RS232_B_TAG "rs232b" -#define RS232_PR_TAG "rs232pr" -#define ABC_KEYBOARD_PORT_TAG "kb" - - - -//************************************************************************** -// TYPE DEFINITIONS -//************************************************************************** - -// ======================> abc1600_state - -class abc1600_state : public driver_device -{ -public: - abc1600_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_maincpu(*this, MC68008P8_TAG), - m_mac(*this, ABC1600_MAC_TAG), - m_dma0(*this, Z8410AB1_0_TAG), - m_dma1(*this, Z8410AB1_1_TAG), - m_dma2(*this, Z8410AB1_2_TAG), - m_dart(*this, Z8470AB1_TAG), - m_scc(*this, Z8530B1_TAG), - m_cio(*this, Z8536B1_TAG), - m_fdc(*this, SAB1797_02P_TAG), - m_rtc(*this, E050_C16PC_TAG), - m_nvram(*this, NMC9306_TAG), - m_ram(*this, RAM_TAG), - m_floppy(*this, SAB1797_02P_TAG":%u", 0U), - m_bus0i(*this, BUS0I_TAG), - m_bus0x(*this, BUS0X_TAG), - m_bus1(*this, BUS1_TAG), - m_bus2(*this, BUS2_TAG), - m_kb(*this, ABC_KEYBOARD_PORT_TAG) - { } - - void abc1600(machine_config &config); - - DECLARE_INPUT_CHANGED_MEMBER( reset ); - -private: - required_device m_maincpu; - required_device m_mac; - required_device m_dma0; - required_device m_dma1; - required_device m_dma2; - required_device m_dart; - required_device m_scc; - required_device m_cio; - required_device m_fdc; - required_device m_rtc; - required_device m_nvram; - required_device m_ram; - required_device_array m_floppy; - required_device m_bus0i; - required_device m_bus0x; - required_device m_bus1; - required_device m_bus2; - required_device m_kb; - - virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; - - static void floppy_formats(format_registration &fr); - - uint8_t bus_r(offs_t offset); - void bus_w(offs_t offset, uint8_t data); - uint8_t dart_r(offs_t offset); - void dart_w(offs_t offset, uint8_t data); - uint8_t scc_r(offs_t offset); - void scc_w(offs_t offset, uint8_t data); - uint8_t cio_r(offs_t offset); - void cio_w(offs_t offset, uint8_t data); - void fw0_w(uint8_t data); - void fw1_w(uint8_t data); - - void cs7_w(int state); - void btce_w(int state); - void atce_w(int state); - void dmadis_w(int state); - void sysscc_w(int state); - void sysfs_w(int state); - void dbrq0_w(int state) { m_dbrq0 = state; update_br(); } - void dbrq1_w(int state) { m_dbrq1 = state; update_br(); } - void dbrq2_w(int state) { m_dbrq2 = state; update_br(); } - - uint8_t cio_pa_r(); - uint8_t cio_pb_r(); - void cio_pb_w(uint8_t data); - uint8_t cio_pc_r(); - void cio_pc_w(uint8_t data); - - void nmi_w(int state); - - void cpu_space_map(address_map &map) ATTR_COLD; - - void update_br(); - void update_pren0(int state); - void update_pren1(int state); - void update_drdy0(int state); - void update_drdy1(int state); - void sccrq_a_w(int state) { m_sccrq_a = state; update_drdy1(0); } - void sccrq_b_w(int state) { m_sccrq_b = state; update_drdy1(0); } - void dart_irq_w(int state) { m_dart_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } - void scc_irq_w(int state) { m_scc_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } - - // DMA - int m_dmadis = 0; - int m_sysscc = 0; - int m_sysfs = 0; - int m_dbrq0 = CLEAR_LINE; - int m_dbrq1 = CLEAR_LINE; - int m_dbrq2 = CLEAR_LINE; - - void abc1600_mem(address_map &map) ATTR_COLD; - void mac_mem(address_map &map) ATTR_COLD; - - // peripherals - int m_cs7 = 0; // card select address bit 7 - int m_bus0 = 0; // BUS 0 selected - uint8_t m_csb = 0U; // card select - int m_atce = 0; // V.24 channel A external clock enable - int m_btce = 0; // V.24 channel B external clock enable - bool m_sccrq_a = 0; - bool m_sccrq_b = 0; - int m_scc_irq = 0; - int m_dart_irq = 0; -}; - - - -#endif // MAME_LUXOR_ABC1600_H diff --git a/src/mame/luxor/abc1600_v.cpp b/src/mame/luxor/abc1600_v.cpp index a3fcef6bba6..6f57426bd36 100644 --- a/src/mame/luxor/abc1600_v.cpp +++ b/src/mame/luxor/abc1600_v.cpp @@ -7,8 +7,8 @@ **********************************************************************/ #include "emu.h" -#include "abc1600.h" #include "abc1600.lh" +#include "abc1600_v.h" #include "render.h" //#define VERBOSE 1 @@ -19,6 +19,9 @@ // CONSTANTS / MACROS //************************************************************************** +#define SCREEN_TAG "screen" + + // video RAM #define VIDEORAM_SIZE 0x40000 #define VIDEORAM16_MASK 0x3ffff diff --git a/src/mame/luxor/abc1600_v.h b/src/mame/luxor/abc1600_v.h index 835c1bfb950..0ac2ff6c7df 100644 --- a/src/mame/luxor/abc1600_v.h +++ b/src/mame/luxor/abc1600_v.h @@ -13,7 +13,7 @@ #include "video/mc6845.h" #include "emupal.h" - +#include "screen.h" ///************************************************************************* @@ -29,7 +29,7 @@ // ======================> abc1600_mover_device class abc1600_mover_device : public device_t, - public device_memory_interface + public device_memory_interface { public: // construction/destruction @@ -42,6 +42,7 @@ public: virtual void iowr2_map(address_map &map) ATTR_COLD; void mover_map(address_map &map) ATTR_COLD; + protected: // device-level overrides virtual void device_start() override ATTR_COLD; diff --git a/src/mame/luxor/abc1600mac.h b/src/mame/luxor/abc1600mac.h index 6033ed6fa7f..760be574758 100644 --- a/src/mame/luxor/abc1600mac.h +++ b/src/mame/luxor/abc1600mac.h @@ -30,7 +30,7 @@ // ======================> abc1600_mac_device class abc1600_mac_device : public device_t, - public device_memory_interface + public device_memory_interface { public: abc1600_mac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); From 9bfc5b0dedce7e8cb0573f29edb336a5152fa1a2 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Thu, 5 Mar 2026 09:12:53 +1100 Subject: [PATCH 135/351] -cpu/e132xs: Allow recompiler to skip unused condition flag calculations. * Also fixed some instruction analysis bugs. -cpu/drcbearm64.cpp: Reduced unnecessary rounding mode changes. --- src/devices/cpu/drcbearm64.cpp | 90 +++- src/devices/cpu/e132xs/e132xs.h | 12 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 5 +- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 629 +++++++++++++++-------- src/devices/cpu/e132xs/e1fe.cpp | 4 +- 5 files changed, 521 insertions(+), 219 deletions(-) diff --git a/src/devices/cpu/drcbearm64.cpp b/src/devices/cpu/drcbearm64.cpp index 6deb4b47dd8..8e8f40052b0 100644 --- a/src/devices/cpu/drcbearm64.cpp +++ b/src/devices/cpu/drcbearm64.cpp @@ -510,6 +510,8 @@ private: struct near_state { uint64_t saved_fpcr; + uint8_t nominal_fmod; + uint8_t fmod_changed; }; struct memory_accessors @@ -1648,6 +1650,11 @@ drcbe_arm64::drcbe_arm64(drcuml_state &drcuml, device_t &device, drc_cache &cach a.mrs(SCRATCH_REG1, a64::Predicate::SysReg::kFPCR); a.mov(FLAGS_REG, 0); emit_str_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); + a.add(SCRATCH_REG1, SCRATCH_REG1, 1 << 22); + a.ubfx(SCRATCH_REG1, SCRATCH_REG1, 22, 2); + emit_strb_mem(a, SCRATCH_REG1, &m_state.fmod); + emit_strb_mem(a, SCRATCH_REG1, &m_near.nominal_fmod); + emit_strb_mem(a, a64::xzr, &m_near.fmod_changed); a.emit_args_assignment(frame, args); @@ -1657,8 +1664,12 @@ drcbe_arm64::drcbe_arm64(drcuml_state &drcuml, device_t &device, drc_cache &cach m_exit = dst + a.offset(); a.bind(a.new_named_label("exit_point")); + Label const skip = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, skip); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(skip); a.mov(a64::sp, a64::x29); @@ -1951,24 +1962,30 @@ void drcbe_arm64::op_debug(a64::Assembler &a, const uml::instruction &inst) be_parameter pcp(*this, inst.param(0), PTYPE_MRI); - Label const skip = a.new_label(); + Label const nosave = a.new_label(); + Label const done = a.new_label(); emit_ldr_mem(a, temp, &m_device.machine().debug_flags); - a.tbz(temp, 1, skip); // DEBUG_FLAG_CALL_HOOK + a.tbz(temp, 1, done); // DEBUG_FLAG_CALL_HOOK + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); get_imm_relative(a, REG_PARAM1, m_debug_cpu_instruction_hook.obj); mov_reg_param(a, 4, REG_PARAM2, pcp); call_arm_addr(a, m_debug_cpu_instruction_hook.func); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); - a.bind(skip); + a.bind(done); } } @@ -2247,19 +2264,27 @@ void drcbe_arm64::op_callc(a64::Assembler &a, const uml::instruction &inst) assert(funcp.is_c_function()); be_parameter paramp(*this, inst.param(1), PTYPE_M); + Label const nosave = a.new_label(); + Label const norestore = a.new_label(); Label skip; emit_skip(a, inst.condition(), skip); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); get_imm_relative(a, REG_PARAM1, (uintptr_t)paramp.memory()); get_imm_relative(a, TEMP_REG1, (uintptr_t)funcp.cfunc()); a.blr(TEMP_REG1); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, norestore); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); + a.bind(norestore); if (inst.condition() != uml::COND_ALWAYS) a.bind(skip); @@ -2296,6 +2321,8 @@ void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst) be_parameter srcp(*this, inst.param(0), PTYPE_MRI); const a64::Gp scratch = select_register(TEMP_REG1, inst.size()); + emit_ldrb_mem(a, TEMP_REG2.w(), &m_near.nominal_fmod); + if (srcp.is_immediate()) { a.mov(scratch, srcp.immediate() & 3); @@ -2308,8 +2335,11 @@ void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst) a.and_(scratch, src, 3); } - a.mrs(TEMP_REG2, a64::Predicate::SysReg::kFPCR); emit_strb_mem(a, scratch.w(), &m_state.fmod); + a.cmp(TEMP_REG2.w(), scratch.w()); + a.cset(TEMP_REG2.w(), a64::CondCode::kNE); + emit_strb_mem(a, TEMP_REG2.w(), &m_near.fmod_changed); + a.mrs(TEMP_REG2, a64::Predicate::SysReg::kFPCR); a.sub(scratch.w(), scratch.w(), 1); a.bfi(TEMP_REG2, scratch.x(), 22, 2); a.msr(a64::Predicate::SysReg::kFPCR, TEMP_REG2); @@ -2536,7 +2566,11 @@ void drcbe_arm64::op_restore(a64::Assembler &a, const uml::instruction &inst) } a.ldrb(TEMP_REG1.w(), a64::Mem(membase, offsetof(drcuml_machine_state, fmod))); + emit_ldrb_mem(a, TEMP_REG2.w(), &m_near.nominal_fmod); a.and_(TEMP_REG1.w(), TEMP_REG1.w(), 3); + a.cmp(TEMP_REG2.w(), TEMP_REG1.w()); + a.cset(TEMP_REG2.w(), a64::CondCode::kNE); + emit_strb_mem(a, TEMP_REG2.w(), &m_near.fmod_changed); a.mrs(TEMP_REG2, a64::Predicate::SysReg::kFPCR); emit_strb_mem(a, TEMP_REG1.w(), &m_state.fmod); a.sub(TEMP_REG1.w(), TEMP_REG1.w(), 1); @@ -2715,10 +2749,14 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual; + Label const nosave = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes)) { @@ -2786,6 +2824,9 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst) mov_param_reg(a, inst.size(), dstp, REG_PARAM1); } + Label const done = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) { a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); @@ -2799,6 +2840,7 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst) a.bfi(SCRATCH_REG2, SCRATCH_REG1, 22, 2); a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG2); } + a.bind(done); } void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) @@ -2818,10 +2860,14 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual; + Label const nosave = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes)) { @@ -2891,6 +2937,9 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) mov_param_reg(a, inst.size(), dstp, REG_PARAM1); } + Label const done = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) { a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); @@ -2904,6 +2953,7 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) a.bfi(SCRATCH_REG2, SCRATCH_REG1, 22, 2); a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG2); } + a.bind(done); } void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst) @@ -2922,9 +2972,13 @@ void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual; + Label const nosave = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes)) { @@ -2974,8 +3028,12 @@ void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst) } } + Label const done = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); + a.bind(done); } void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst) @@ -2996,9 +3054,13 @@ void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual; + Label const nosave = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes)) { @@ -3049,8 +3111,12 @@ void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst) } } + Label const done = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); + a.bind(done); } void drcbe_arm64::op_carry(a64::Assembler &a, const uml::instruction &inst) @@ -5239,9 +5305,13 @@ void drcbe_arm64::op_fread(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; + Label const nosave = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); mov_reg_param(a, 4, REG_PARAM2, addrp); @@ -5260,8 +5330,12 @@ void drcbe_arm64::op_fread(a64::Assembler &a, const uml::instruction &inst) mov_float_param_int_reg(a, inst.size(), dstp, REG_PARAM1); } + Label const done = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); + a.bind(done); } void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst) @@ -5280,9 +5354,13 @@ void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; + Label const nosave = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); + a.bind(nosave); mov_reg_param(a, 4, REG_PARAM2, addrp); mov_float_reg_param(a, inst.size(), TEMPF_REG1, srcp); @@ -5300,8 +5378,12 @@ void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst) call_arm_addr(a, accessors.resolved.write_qword.func); } + Label const done = a.new_label(); + emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); + a.bind(done); } void drcbe_arm64::op_fmov(a64::Assembler &a, const uml::instruction &inst) diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h index ba78ff17272..f2066d59126 100644 --- a/src/devices/cpu/e132xs/e132xs.h +++ b/src/devices/cpu/e132xs/e132xs.h @@ -509,12 +509,12 @@ private: void generate_add_dis(drcuml_block &block, compiler_state &compiler, uml::parameter dst, uml::parameter base, uint32_t dis, unsigned alignment); void generate_set_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx); void generate_set_dst(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx); - void generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, uml::parameter sr); - void generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, uml::parameter sr); - void generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, uml::parameter sr); - void generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, uml::parameter sr); - void generate_update_nz(drcuml_block &block, compiler_state &compiler, uml::parameter sr); - void generate_update_nz_d(drcuml_block &block, compiler_state &compiler, uml::parameter sr); + void generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr); + void generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr); + void generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr); + void generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr); + void generate_update_nz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr); + void generate_update_nz_d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr); template void generate_trap_exception_or_int(drcuml_block &block, uml::code_label &label, uml::parameter trapno); void generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index c3bb9fb22d2..b045b129cbe 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -14,6 +14,9 @@ #include +// configuration +enum { DO_ELIDE_CONDITION_CALC = 1 }; + // map variables #define MAPVAR_PC M0 #define MAPVAR_CYCLES M1 @@ -385,7 +388,7 @@ void hyperstone_device::log_descriptions(const opcode_desc *desc_list, unsigned else m_disassembler.disassemble_one(buffer, desc_list->pc, desc_list->opptr); buffer.put('\0'); - m_drcuml->log_printf("%-36s", &buffer.vec()[0]); + m_drcuml->log_printf("%-40s", &buffer.vec()[0]); // output register dependencies buffer.clear(); diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index af0795bea2b..9f2d42b3ece 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -388,93 +388,158 @@ void hyperstone_device::generate_set_dst(drcuml_block &block, compiler_state &co } -void hyperstone_device::generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, uml::parameter sr) +void hyperstone_device::generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr) { // expects result in I0 and UML flags set by ADD/SUB // clobbers I1, I4 and I5 - UML_SETc(block, uml::COND_V, I4); // I4 = ...V - UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z - UML_SETc(block, uml::COND_C, I1); // I1 = ...C - UML_SHL(block, I4, I4, V_SHIFT); // I4 = V... - UML_OR(block, I1, I1, I4); // I1 = V..C - UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z. - UML_OR(block, I1, I1, I4); // I1 = V.ZC - UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK); // I4 = .N.. - UML_OR(block, I1, I1, I4); // I1 = VNZC + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SETc(block, uml::COND_V, I4); // I4 = ...V + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_SETc(block, uml::COND_C, I1); // I1 = ...C + else + UML_MOV(block, I1, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + { + UML_SHL(block, I4, I4, V_SHIFT); // I4 = V... + UML_OR(block, I1, I1, I4); // I1 = V..C + } + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z. + UML_OR(block, I1, I1, I4); // I1 = V.ZC + } + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + { + UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK); // I4 = .N.. + UML_OR(block, I1, I1, I4); // I1 = VNZC + } UML_ROLINS(block, sr, I1, 0, (V_MASK | N_MASK | Z_MASK | C_MASK)); } -void hyperstone_device::generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, uml::parameter sr) +void hyperstone_device::generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr) { // expects result in I0 and UML flags set by ADD/SUB // clobbers I1, I4 and I5 - UML_SETc(block, uml::COND_V, I4); // I4 = ...V - UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z - UML_SETc(block, uml::COND_C, I1); // I1 = ...C - UML_SHL(block, I4, I4, V_SHIFT); // I4 = V... - UML_OR(block, I1, I1, I4); // I1 = V..C - UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z. - UML_OR(block, I1, I1, I4); // I1 = V.ZC - UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK); // I4 = .N.. - UML_OR(block, I1, I1, I4); // I1 = VNZC - UML_OR(block, I4, I2, ~Z_MASK); // combine with old Z flag - UML_AND(block, I1, I1, I4); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SETc(block, uml::COND_V, I4); // I4 = ...V + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_SETc(block, uml::COND_C, I1); // I1 = ...C + else + UML_MOV(block, I1, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + { + UML_SHL(block, I4, I4, V_SHIFT); // I4 = V... + UML_OR(block, I1, I1, I4); // I1 = V..C + } + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z. + UML_OR(block, I1, I1, I4); // I1 = V.ZC + } + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + { + UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK); // I4 = .N.. + UML_OR(block, I1, I1, I4); // I1 = VNZC + } + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_OR(block, I4, sr, ~Z_MASK); // combine with old Z flag + UML_AND(block, I1, I1, I4); + } UML_ROLINS(block, sr, I1, 0, (V_MASK | N_MASK | Z_MASK | C_MASK)); } -void hyperstone_device::generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, uml::parameter sr) +void hyperstone_device::generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr) { // expects UML flags set by ADD/SUB // clobbers I1, I4 and I5 - UML_SETc(block, uml::COND_V, I4); // I4 = ...V - UML_SETc(block, uml::COND_S, I1); // I1 = ...S - UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z - UML_SHL(block, I4, I4, V_SHIFT); // I4 = V... - UML_SHL(block, I1, I1, N_SHIFT); // I1 = .N.. - UML_OR(block, I1, I1, I4); // I1 = VN.. - UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z. - UML_OR(block, I1, I1, I4); // I1 = VNZ. + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SETc(block, uml::COND_V, I4); // I4 = ...V + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + UML_SETc(block, uml::COND_S, I1); // I1 = ...N + else + UML_MOV(block, I1, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SHL(block, I4, I4, V_SHIFT); // I4 = V... + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + UML_SHL(block, I1, I1, N_SHIFT); // I1 = .N.. + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_OR(block, I1, I1, I4); // I1 = VN.. + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z. + UML_OR(block, I1, I1, I4); // I1 = VNZ. + } UML_ROLINS(block, sr, I1, 0, (V_MASK | N_MASK | Z_MASK)); } -void hyperstone_device::generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, uml::parameter sr) +void hyperstone_device::generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr) { // expects UML flags set by ADD/SUB // clobbers I0, I1, I3 and I4 - UML_SETc(block, uml::COND_V, I0); // I0 = ...V - UML_SETc(block, uml::COND_L, I1); // I1 = ...N - UML_SETc(block, uml::COND_Z, I3); // I3 = ...Z - UML_SETc(block, uml::COND_C, I4); // I4 = ...C + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SETc(block, uml::COND_V, I0); // I0 = ...V + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + UML_SETc(block, uml::COND_L, I1); // I1 = ...N + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + UML_SETc(block, uml::COND_Z, I3); // I3 = ...Z + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_SETc(block, uml::COND_C, I4); // I4 = ...C UML_AND(block, sr, sr, ~(V_MASK | N_MASK | Z_MASK | C_MASK)); - UML_SHL(block, I0, I0, V_SHIFT); // I0 = V... - UML_SHL(block, I1, I1, N_SHIFT); // I1 = .N.. - UML_SHL(block, I3, I3, Z_SHIFT); // I3 = ..Z. - UML_SHL(block, I4, I4, C_SHIFT); // I4 = ...C - UML_OR(block, I0, I0, I1); // I0 = VN.. - UML_OR(block, I3, I3, I4); // I1 = ..ZC - UML_OR(block, sr, sr, I0); - UML_OR(block, sr, sr, I3); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SHL(block, I0, I0, V_SHIFT); // I0 = V... + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + UML_SHL(block, I1, I1, N_SHIFT); // I1 = .N.. + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + UML_SHL(block, I3, I3, Z_SHIFT); // I3 = ..Z. + if (!DO_ELIDE_CONDITION_CALC || (desc->v_calc_required() && desc->n_calc_required())) + UML_OR(block, I0, I0, I1); // I0 = VN.. + if (!DO_ELIDE_CONDITION_CALC || (desc->c_calc_required() && desc->z_calc_required())) + UML_OR(block, I3, I3, I4); // I3 = ..ZC + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_OR(block, sr, sr, I0); + else if (desc->n_calc_required()) + UML_OR(block, sr, sr, I1); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + UML_OR(block, sr, sr, I3); + else if (desc->c_calc_required()) + UML_OR(block, sr, sr, I4); } -void hyperstone_device::generate_update_nz(drcuml_block &block, compiler_state &compiler, uml::parameter sr) +void hyperstone_device::generate_update_nz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr) { // expects result in I0 and UML Z flag to be set // clobbers I1 - UML_SETc(block, uml::COND_Z, I1); - UML_SHL(block, I1, I1, Z_SHIFT); - UML_ROLINS(block, I1, I0, N_SHIFT + 1, N_MASK); - UML_OR(block, sr, sr, I1); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_SETc(block, uml::COND_Z, I1); + UML_SHL(block, I1, I1, Z_SHIFT); + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + UML_ROLINS(block, I1, I0, N_SHIFT + 1, N_MASK); + } + else if (desc->n_calc_required()) + { + UML_ROLAND(block, I1, I0, N_SHIFT + 1, N_MASK); + } + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required() || desc->n_calc_required()) + UML_OR(block, sr, sr, I1); } -void hyperstone_device::generate_update_nz_d(drcuml_block &block, compiler_state &compiler, uml::parameter sr) +void hyperstone_device::generate_update_nz_d(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr) { // expects result in I0 and UML Z flag to be set // assumes Z and N bits in sr have already been cleared @@ -1134,8 +1199,11 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil (BIT(result, 31) << N_SHIFT) | (BIT((compiler.pc() ^ result) & (src ^ result), 31) << V_SHIFT); - UML_ROLINS(block, I2, flags, 0, V_MASK | N_MASK | Z_MASK | C_MASK); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + UML_ROLINS(block, I2, flags, 0, V_MASK | N_MASK | Z_MASK | C_MASK); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uint32_t(result), uml::I3, true); } @@ -1145,8 +1213,11 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil UML_ADD(block, I0, I0, src); - generate_update_flags_addsub(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsub(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true); } @@ -1171,8 +1242,11 @@ void hyperstone_device::generate_sums(drcuml_block &block, compiler_state &compi UML_ADD(block, I0, I0, src); - generate_update_flags_addsubs(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsubs(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true); generate_exception_on_overflow(block, compiler, desc, uml::I2); @@ -1211,8 +1285,11 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil UML_CMP(block, I0, I1); - generate_update_flags_cmp(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_cmp(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } } template @@ -1275,8 +1352,11 @@ void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compil UML_LOAD(block, I0, (void *)m_core->local_regs, I0, SIZE_DWORD, SCALE_x4); } - UML_TEST(block, I0, ~uint32_t(0)); - generate_update_nz(block, compiler, uml::I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + UML_TEST(block, I0, ~uint32_t(0)); + generate_update_nz(block, compiler, desc, uml::I2); + } if (DstGlobal) { @@ -1363,8 +1443,11 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil (BIT(result, 31) << N_SHIFT) | (BIT((compiler.pc() ^ result), 31) << V_SHIFT); - UML_ROLINS(block, I2, flags, 0, M_MASK | V_MASK | N_MASK | Z_MASK | C_MASK); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + UML_ROLINS(block, I2, flags, 0, M_MASK | V_MASK | N_MASK | Z_MASK | C_MASK); + UML_MOV(block, DRC_SR, I2); + } UML_MOV(block, DRC_PC, result); generate_branch(block, compiler, compiler.mode(), result, desc); @@ -1376,8 +1459,11 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil UML_ADD(block, I0, I0, compiler.pc()); - generate_update_flags_addsub(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsub(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); return; @@ -1388,7 +1474,8 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil UML_ADD(block, I0, I0, compiler.pc()); - generate_update_flags_addsub(block, compiler, uml::I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + generate_update_flags_addsub(block, compiler, desc, uml::I2); UML_AND(block, I2, I2, ~M_MASK); UML_MOV(block, DRC_SR, I2); @@ -1404,8 +1491,11 @@ void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compil UML_ADD(block, I0, I0, I1); - generate_update_flags_addsub(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsub(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -1429,8 +1519,11 @@ void hyperstone_device::generate_adds(drcuml_block &block, compiler_state &compi UML_ADD(block, I0, I0, I1); - generate_update_flags_addsubs(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsubs(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); generate_exception_on_overflow(block, compiler, desc, uml::I2); @@ -1498,8 +1591,11 @@ void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compi UML_SUB(block, I0, I0, I1); } - generate_update_flags_addsubc(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsubc(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -1523,8 +1619,11 @@ void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compil UML_SUB(block, I0, I0, I1); - generate_update_flags_addsub(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsub(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -1548,8 +1647,11 @@ void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compi UML_SUB(block, I0, I0, I1); - generate_update_flags_addsubs(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsubs(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); generate_exception_on_overflow(block, compiler, desc, uml::I2); @@ -1596,8 +1698,11 @@ void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compi UML_ADD(block, I0, I0, I1); } - generate_update_flags_addsubc(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsubc(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -1620,8 +1725,11 @@ void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compil UML_SUB(block, I0, 0, I0); - generate_update_flags_addsub(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsub(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true); } @@ -1644,8 +1752,11 @@ void hyperstone_device::generate_negs(drcuml_block &block, compiler_state &compi UML_SUB(block, I0, 0, I0); - generate_update_flags_addsubs(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsubs(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true); @@ -1766,8 +1877,11 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi UML_CMP(block, I0, src); - generate_update_flags_cmp(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_cmp(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } } @@ -1884,8 +1998,11 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi (BIT((compiler.pc() ^ result) & (src ^ result), 31) << V_SHIFT); } - UML_ROLINS(block, I2, flags, 0, M_MASK | V_MASK | N_MASK | Z_MASK | C_MASK); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + UML_ROLINS(block, I2, flags, 0, M_MASK | V_MASK | N_MASK | Z_MASK | C_MASK); + UML_MOV(block, DRC_SR, I2); + } result = uint32_t(result) & uint32_t(1); UML_MOV(block, DRC_PC, result); @@ -1906,8 +2023,11 @@ void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compi UML_ADD(block, I0, I0, srcp); - generate_update_flags_addsub(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_flags_addsub(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -2044,16 +2164,20 @@ void hyperstone_device::generate_shrdi(drcuml_block &block, compiler_state &comp UML_DSHL(block, I1, I1, 32); UML_DOR(block, I0, I0, I1); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); - if (n) + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (n && (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required())) { UML_DROLAND(block, I1, I0, 64 - C_SHIFT + 1 - n, C_MASK); UML_OR(block, I2, I2, I1); } UML_DSHR(block, I0, I0, n); - generate_update_nz_d(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz_d(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } UML_DSHR(block, I1, I0, 32); UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4); @@ -2085,18 +2209,25 @@ void hyperstone_device::generate_shrd(drcuml_block &block, compiler_state &compi generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I3); - const int no_shift = compiler.next_label(); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); UML_AND(block, I1, I1, 0x1f); - UML_JMPc(block, uml::COND_Z, no_shift); - UML_SUB(block, I3, 64 - C_SHIFT + 1, I1); - UML_DROLAND(block, I3, I0, I3, C_MASK); - UML_OR(block, I2, I2, I3); - UML_LABEL(block, no_shift); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + { + const int no_shift = compiler.next_label(); + UML_JMPc(block, uml::COND_Z, no_shift); + UML_SUB(block, I3, 64 - C_SHIFT + 1, I1); + UML_DROLAND(block, I3, I0, I3, C_MASK); + UML_OR(block, I2, I2, I3); + UML_LABEL(block, no_shift); + } UML_DSHR(block, I0, I0, I1); - generate_update_nz_d(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz_d(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } UML_DSHR(block, I1, I0, 32); UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4); @@ -2118,18 +2249,25 @@ void hyperstone_device::generate_shr(drcuml_block &block, compiler_state &compil generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I1); generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3); - const int no_shift = compiler.next_label(); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); UML_AND(block, I1, I1, 0x1f); - UML_JMPc(block, uml::COND_Z, no_shift); - UML_SUB(block, I4, 32 - C_SHIFT + 1, I1); - UML_ROLAND(block, I4, I0, I4, C_MASK); - UML_OR(block, I2, I2, I4); - UML_LABEL(block, no_shift); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + { + const int no_shift = compiler.next_label(); + UML_JMPc(block, uml::COND_Z, no_shift); + UML_SUB(block, I4, 32 - C_SHIFT + 1, I1); + UML_ROLAND(block, I4, I0, I4, C_MASK); + UML_OR(block, I2, I2, I4); + UML_LABEL(block, no_shift); + } UML_SHR(block, I0, I0, I1); - generate_update_nz(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4); } @@ -2150,16 +2288,20 @@ void hyperstone_device::generate_shri(drcuml_block &block, compiler_state &compi generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); - if (n) + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (n && (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required())) { UML_ROLAND(block, I4, I0, 32 - C_SHIFT + 1 - n, C_MASK); UML_OR(block, I2, I2, I4); } UML_SHR(block, I0, I0, n); - generate_update_nz(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -2183,16 +2325,20 @@ void hyperstone_device::generate_sardi(drcuml_block &block, compiler_state &comp UML_DSHL(block, I1, I1, 32); UML_DOR(block, I0, I0, I1); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); - if (n) + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (n && (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required())) { UML_DROLAND(block, I1, I0, 64 - C_SHIFT + 1 - n, C_MASK); UML_OR(block, I2, I2, I1); } UML_DSAR(block, I0, I0, n); - generate_update_nz_d(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz_d(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } UML_DSHR(block, I1, I0, 32); UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4); @@ -2224,18 +2370,25 @@ void hyperstone_device::generate_sard(drcuml_block &block, compiler_state &compi generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I3); - const int no_shift = compiler.next_label(); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); UML_AND(block, I1, I1, 0x1f); - UML_JMPc(block, uml::COND_Z, no_shift); - UML_SUB(block, I3, 64 - C_SHIFT + 1, I1); - UML_DROLAND(block, I3, I0, I3, C_MASK); - UML_OR(block, I2, I2, I3); - UML_LABEL(block, no_shift); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + { + const int no_shift = compiler.next_label(); + UML_JMPc(block, uml::COND_Z, no_shift); + UML_SUB(block, I3, 64 - C_SHIFT + 1, I1); + UML_DROLAND(block, I3, I0, I3, C_MASK); + UML_OR(block, I2, I2, I3); + UML_LABEL(block, no_shift); + } UML_DSAR(block, I0, I0, I1); - generate_update_nz_d(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz_d(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } UML_DSHR(block, I1, I0, 32); UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4); @@ -2257,18 +2410,25 @@ void hyperstone_device::generate_sar(drcuml_block &block, compiler_state &compil generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I1); generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3); - const int no_shift = compiler.next_label(); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); UML_AND(block, I1, I1, 0x1f); - UML_JMPc(block, uml::COND_Z, no_shift); - UML_SUB(block, I4, 32 - C_SHIFT + 1, I1); - UML_ROLAND(block, I4, I0, I4, C_MASK); - UML_OR(block, I2, I2, I4); - UML_LABEL(block, no_shift); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + { + const int no_shift = compiler.next_label(); + UML_JMPc(block, uml::COND_Z, no_shift); + UML_SUB(block, I4, 32 - C_SHIFT + 1, I1); + UML_ROLAND(block, I4, I0, I4, C_MASK); + UML_OR(block, I2, I2, I4); + UML_LABEL(block, no_shift); + } UML_SAR(block, I0, I0, I1); - generate_update_nz(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4); } @@ -2289,16 +2449,20 @@ void hyperstone_device::generate_sari(drcuml_block &block, compiler_state &compi generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); - if (n) + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK)); + if (n && (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required())) { UML_ROLAND(block, I4, I0, 32 - C_SHIFT + 1 - n, C_MASK); UML_OR(block, I2, I2, I4); } UML_SAR(block, I0, I0, n); - generate_update_nz(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + { + generate_update_nz(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -2319,23 +2483,25 @@ void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &comp generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I4); generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I5); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); - if (n) + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); + if (n && (!DO_ELIDE_CONDITION_CALC || (desc->c_calc_required() || desc->v_calc_required()))) UML_SHR(block, I3, I1, 32 - n); UML_DSHL(block, I1, I1, 32); UML_DOR(block, I0, I0, I1); - if (n) + if (n && (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required())) { UML_ROLAND(block, I1, I3, C_SHIFT, C_MASK); UML_OR(block, I2, I2, I1); } UML_DSHL(block, I0, I0, n); - generate_update_nz_d(block, compiler, uml::I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + generate_update_nz_d(block, compiler, desc, uml::I2); - if (n) + if (n && (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required())) { UML_DTEST(block, I0, ~uint64_t(0)); UML_MOV(block, I1, util::make_bitmask(n)); @@ -2346,7 +2512,8 @@ void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &comp UML_OR(block, I2, I2, I1); } - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_MOV(block, DRC_SR, I2); UML_DSHR(block, I1, I0, 32); UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4); @@ -2378,31 +2545,44 @@ void hyperstone_device::generate_shld(drcuml_block &block, compiler_state &compi generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I3); - const int no_shift = compiler.next_label(); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); UML_AND(block, I1, I1, 0x1f); - UML_JMPc(block, uml::COND_Z, no_shift); - UML_SUB(block, I3, 64, I1); - UML_DSHR(block, I4, I0, I3); - UML_ROLINS(block, I2, I4, C_SHIFT, C_MASK); - UML_LABEL(block, no_shift); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required() || desc->v_calc_required()) + { + const int no_shift = compiler.next_label(); + UML_JMPc(block, uml::COND_Z, no_shift); + UML_SUB(block, I3, 64, I1); + UML_DSHR(block, I4, I0, I3); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_ROLINS(block, I2, I4, C_SHIFT, C_MASK); + UML_LABEL(block, no_shift); + } UML_DSHL(block, I0, I0, I1); - const int no_overflow = compiler.next_label(); - UML_TEST(block, I1, ~uint32_t(0)); - UML_JMPc(block, uml::COND_Z, no_overflow); - UML_SHR(block, I1, ~uint32_t(0), I3); - UML_DTEST(block, I0, ~uint64_t(0)); - UML_MOVc(block, uml::COND_NS, I1, 0); - UML_CMP(block, I4, I1); - UML_JMPc(block, uml::COND_E, no_overflow); - UML_OR(block, I2, I2, V_MASK); - UML_LABEL(block, no_overflow); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + { + const int no_overflow = compiler.next_label(); + UML_TEST(block, I1, ~uint32_t(0)); + UML_JMPc(block, uml::COND_Z, no_overflow); + UML_SHR(block, I1, ~uint32_t(0), I3); + UML_DTEST(block, I0, ~uint64_t(0)); + UML_MOVc(block, uml::COND_NS, I1, 0); + UML_CMP(block, I4, I1); + UML_JMPc(block, uml::COND_E, no_overflow); + UML_OR(block, I2, I2, V_MASK); + UML_LABEL(block, no_overflow); + } - UML_DTEST(block, I0, I0); - generate_update_nz_d(block, compiler, uml::I2); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required() || desc->n_calc_required()) + { + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_DTEST(block, I0, I0); + generate_update_nz_d(block, compiler, desc, uml::I2); + } + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_MOV(block, DRC_SR, I2); UML_DSHR(block, I1, I0, 32); UML_STORE(block, (void *)m_core->local_regs, I5, I1, SIZE_DWORD, SCALE_x4); @@ -2433,26 +2613,39 @@ void hyperstone_device::generate_shl(drcuml_block &block, compiler_state &compil UML_AND(block, I1, I0, 0x1f); } - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); - UML_SUB(block, I4, 32, I1); - UML_SHR(block, I5, ~uint32_t(0), I4); - UML_SHR(block, I4, I0, I4); - UML_TEST(block, I1, 0xffffffff); - UML_MOVc(block, uml::COND_Z, I4, 0); - UML_MOVc(block, uml::COND_Z, I5, 0); - UML_ROLINS(block, I2, I4, C_SHIFT, C_MASK); + if (!DO_ELIDE_CONDITION_CALC || (desc->c_calc_required() || desc->v_calc_required())) + { + UML_SUB(block, I4, 32, I1); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_SHR(block, I5, ~uint32_t(0), I4); + UML_SHR(block, I4, I0, I4); + UML_TEST(block, I1, 0xffffffff); + UML_MOVc(block, uml::COND_Z, I4, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_MOVc(block, uml::COND_Z, I5, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_ROLINS(block, I2, I4, C_SHIFT, C_MASK); + } UML_SHL(block, I0, I0, I1); - UML_MOVc(block, uml::COND_NS, I5, 0); - generate_update_nz(block, compiler, uml::I2); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_MOVc(block, uml::COND_NS, I5, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + generate_update_nz(block, compiler, desc, uml::I2); - UML_CMP(block, I4, I5); - UML_MOV(block, I1, V_MASK); - UML_MOVc(block, uml::COND_E, I1, 0); - UML_OR(block, I2, I2, I1); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + { + UML_CMP(block, I4, I5); + UML_MOV(block, I1, V_MASK); + UML_MOVc(block, uml::COND_E, I1, 0); + UML_OR(block, I2, I2, I1); + } - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_MOV(block, DRC_SR, I2); UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4); } @@ -2473,23 +2666,32 @@ void hyperstone_device::generate_shli(drcuml_block &block, compiler_state &compi generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3); - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); - if (n) + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); + if (n && (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required() || desc->v_calc_required())) { - UML_SHR(block, I4, I0, 32 - n); - UML_MOV(block, I5, util::make_bitmask(n)); - UML_ROLAND(block, I1, I4, C_SHIFT, C_MASK); - UML_OR(block, I2, I2, I1); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + { + UML_SHR(block, I4, I0, 32 - n); + UML_MOV(block, I5, util::make_bitmask(n)); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_ROLAND(block, I1, I4, C_SHIFT, C_MASK); + } + else + { + UML_ROLAND(block, I1, I0, n + C_SHIFT, C_MASK); + } + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_OR(block, I2, I2, I1); } UML_SHL(block, I0, I0, n); - if (n) - { + if (n && (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required())) UML_MOVc(block, uml::COND_NS, I5, 0); - } - generate_update_nz(block, compiler, uml::I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + generate_update_nz(block, compiler, desc, uml::I2); - if (n) + if (n && (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required())) { UML_CMP(block, I4, I5); UML_MOV(block, I1, V_MASK); @@ -2497,7 +2699,8 @@ void hyperstone_device::generate_shli(drcuml_block &block, compiler_state &compi UML_OR(block, I2, I2, I1); } - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_MOV(block, DRC_SR, I2); generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); } @@ -2544,26 +2747,38 @@ void hyperstone_device::generate_rol(drcuml_block &block, compiler_state &compil UML_AND(block, I1, I0, 0x1f); } - UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK)); - UML_SUB(block, I4, 32, I1); - UML_SHR(block, I4, ~uint32_t(0), I4); - UML_TEST(block, I1, 0xffffffff); - UML_MOVc(block, uml::COND_Z, I4, 0); - UML_MOV(block, I5, I4); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required() || desc->v_calc_required()) + { + UML_SUB(block, I4, 32, I1); + UML_SHR(block, I4, ~uint32_t(0), I4); + UML_TEST(block, I1, 0xffffffff); + UML_MOVc(block, uml::COND_Z, I4, 0); + UML_MOV(block, I5, I4); + } UML_ROL(block, I0, I0, I1); - UML_MOVc(block, uml::COND_NS, I4, 0); - generate_update_nz(block, compiler, uml::I2); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + UML_MOVc(block, uml::COND_NS, I4, 0); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + generate_update_nz(block, compiler, desc, uml::I2); - UML_AND(block, I1, I5, I0); - UML_ROLINS(block, I2, I1, C_SHIFT, C_MASK); - UML_CMP(block, I4, I1); - UML_MOV(block, I1, V_MASK); - UML_MOVc(block, uml::COND_E, I1, 0); - UML_OR(block, I2, I2, I1); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required() || desc->v_calc_required()) + UML_AND(block, I1, I5, I0); + if (!DO_ELIDE_CONDITION_CALC || desc->c_calc_required()) + UML_ROLINS(block, I2, I1, C_SHIFT, C_MASK); + if (!DO_ELIDE_CONDITION_CALC || desc->v_calc_required()) + { + UML_CMP(block, I4, I1); + UML_MOV(block, I1, V_MASK); + UML_MOVc(block, uml::COND_E, I1, 0); + UML_OR(block, I2, I2, I1); + } - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + UML_MOV(block, DRC_SR, I2); UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4); } diff --git a/src/devices/cpu/e132xs/e1fe.cpp b/src/devices/cpu/e132xs/e1fe.cpp index 6b8852a0f6c..55859b96750 100644 --- a/src/devices/cpu/e132xs/e1fe.cpp +++ b/src/devices/cpu/e132xs/e1fe.cpp @@ -483,9 +483,11 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc case 0x20: // cmp global,global case 0x21: // cmp global,local case 0x22: // cmp local,global + case 0x23: // cmp local,local case 0x30: // cmpb global,global case 0x31: // cmpb global,local case 0x32: // cmpb local,global + case 0x33: // cmpb local,local decode_rr(desc); if (desc.dst_local || desc.src_local) desc.set_fp_used(); @@ -1027,7 +1029,7 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc case 0xdf: // stdp local decode_lr(desc); desc.set_fp_used(); - if (!desc.src_local) + if (!desc.src_local && !desc.src_is_sr()) { desc.set_g_used(desc.src_code); if (op & 0x0200) From 271251e2d49fef73d54e41926fab8554c019c4b9 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Thu, 5 Mar 2026 09:34:55 +0200 Subject: [PATCH 136/351] Systems promoted to working --------------------------- Nokia MikroMikko 2 [Curt Coder] Software list items promoted to working --------------------------------------- mm2_flop: Nokia MS-DOS 2.00 Versio 2.21 (Fin) [Curt Coder] New working software list items ------------------------------- mm2_hdd: Nokia MS-DOS 2.00 Versio 2.21 (Fin) [Curt Coder] --- src/devices/bus/mm2/mm2kb.cpp | 164 +++++++++++++++++++++++++++++++-- src/devices/bus/mm2/mm2kb.h | 18 +++- src/mame/nokia/mikromikko2.cpp | 2 +- 3 files changed, 173 insertions(+), 11 deletions(-) diff --git a/src/devices/bus/mm2/mm2kb.cpp b/src/devices/bus/mm2/mm2kb.cpp index 991698eec1e..5a639f0db3e 100644 --- a/src/devices/bus/mm2/mm2kb.cpp +++ b/src/devices/bus/mm2/mm2kb.cpp @@ -8,9 +8,18 @@ #include "emu.h" #include "mm2kb.h" +#include "machine/keyboard.ipp" DEFINE_DEVICE_TYPE(NOKIA_MM2_KBD, mm2_keyboard_device, "nokia_mm2_kbd", "MikroMikko 2 Keyboard") +mm2_keyboard_device::mm2_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NOKIA_MM2_KBD, tag, owner, clock), + device_buffered_serial_interface(mconfig, *this), + device_matrix_keyboard_interface(mconfig, *this, "Y0", "Y1", "Y2", "Y3", "Y4", "Y5", "Y6", "Y7", "Y8", "Y9", "Y10"), + m_write_txd(*this) +{ +} + ROM_START( mm2_keyboard ) ROM_REGION( 0x400, "keyboard", 0 ) ROM_LOAD( "keyboard", 0x000, 0x400, NO_DUMP ) @@ -25,7 +34,144 @@ void mm2_keyboard_device::device_add_mconfig(machine_config &config) { } -INPUT_PORTS_START( mm2_keyboard ) +static INPUT_PORTS_START( mm2_keyboard ) + PORT_START("Y0") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/') + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=') + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('+') PORT_CHAR('?') + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(U'´') PORT_CHAR(U'`') + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad .") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + + PORT_START("Y1") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR(U'å') PORT_CHAR(U'Å') + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(U'ü') PORT_CHAR('^') + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + + PORT_START("Y2") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(U'ö') PORT_CHAR(U'Ö') + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(U'ä') PORT_CHAR(U'Ä') + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('@') PORT_CHAR('*') + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + + PORT_START("Y3") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';') + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':') + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_') + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("Y4") + PORT_BIT(0xffff, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("Y5") + PORT_BIT(0xffff, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("Y6") + PORT_BIT(0xffff, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("Y7") + PORT_BIT(0xffff, IP_ACTIVE_HIGH, IPT_UNUSED) + + PORT_START("Y8") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("AIDS") + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ESC") PORT_CODE(KEYCODE_ESC) + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("BS") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right TAB") + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CAPS LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RET") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r') + + PORT_START("Y9") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('<') PORT_CHAR('>') + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right SHIFT") PORT_CODE(KEYCODE_RSHIFT) + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1") + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3") + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5") + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6") + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F7") + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F8") + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F9") + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F10") + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F11") + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F12") + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2196") // U+2196 = ↖ + + PORT_START("Y10") + PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2191") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // U+2191 = ↑ + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad INS") + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad DEL") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) + PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2190") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // U+2190 = ← + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2193") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // U+2193 = ↓ + PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2192") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // U+2192 = → + PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad ERASE") + PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) + PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad +") PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) + PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad RETURN") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) + PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SW1") + PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SW2") + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SW3") + PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SW4") + PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_UNUSED) INPUT_PORTS_END ioport_constructor mm2_keyboard_device::device_input_ports() const @@ -33,17 +179,19 @@ ioport_constructor mm2_keyboard_device::device_input_ports() const return INPUT_PORTS_NAME( mm2_keyboard ); } -mm2_keyboard_device::mm2_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, NOKIA_MM2_KBD, tag, owner, clock), - m_write_txd(*this) -{ -} - void mm2_keyboard_device::device_start() { } void mm2_keyboard_device::device_reset() { - m_write_txd(1); + set_data_frame(1, 8, PARITY_EVEN, STOP_BITS_1); + set_rcv_rate(9600); + set_tra_rate(9600); + receive_register_reset(); + transmit_register_reset(); + + clear_fifo(); + reset_key_state(); + start_processing(attotime::from_hz(600)); } diff --git a/src/devices/bus/mm2/mm2kb.h b/src/devices/bus/mm2/mm2kb.h index 194dee9a5d7..9dff44ff469 100644 --- a/src/devices/bus/mm2/mm2kb.h +++ b/src/devices/bus/mm2/mm2kb.h @@ -11,9 +11,14 @@ #pragma once +#include "diserial.h" +#include "machine/keyboard.h" + DECLARE_DEVICE_TYPE(NOKIA_MM2_KBD, mm2_keyboard_device) -class mm2_keyboard_device : public device_t +class mm2_keyboard_device : public device_t, + public device_buffered_serial_interface<16U>, + protected device_matrix_keyboard_interface<11U> { public: // construction/destruction @@ -21,9 +26,11 @@ public: auto txd_handler() { return m_write_txd.bind(); } - void rxd_w(int state) { } + void rxd_w(int state) { device_buffered_serial_interface::rx_w(state); } protected: + mm2_keyboard_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; virtual ioport_constructor device_input_ports() const override ATTR_COLD; @@ -31,7 +38,14 @@ protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; + virtual void tra_callback() override { m_write_txd(transmit_register_get_data_bit()); } + + void key_make(u8 row, u8 column) override { transmit_byte((row << 4) + column); } + void key_break(u8 row, u8 column) override { if (row > 7) transmit_byte(0x40 | ((row << 4) + column)); } + private: + virtual void received_byte(uint8_t byte) override {}; + devcb_write_line m_write_txd; }; diff --git a/src/mame/nokia/mikromikko2.cpp b/src/mame/nokia/mikromikko2.cpp index 561595ddefc..6cc370baa9a 100644 --- a/src/mame/nokia/mikromikko2.cpp +++ b/src/mame/nokia/mikromikko2.cpp @@ -394,4 +394,4 @@ ROM_END } // anonymous namespace -COMP( 1983, mm2m35d, 0, 0, mm2, mm2, mm2_state, empty_init, "Nokia Data", "MikroMikko 2 M35D", MACHINE_NOT_WORKING ) +COMP( 1983, mm2m35d, 0, 0, mm2, mm2, mm2_state, empty_init, "Nokia Data", "MikroMikko 2 M35D", MACHINE_IMPERFECT_GRAPHICS ) From f996f83eb7d173b496bab267fbb1b746e876ba5f Mon Sep 17 00:00:00 2001 From: Dirk Best Date: Thu, 5 Mar 2026 12:58:28 +0100 Subject: [PATCH 137/351] apricot: Add support for plain sector format disk images --- scripts/src/formats.lua | 12 ++++++++ src/lib/formats/all.cpp | 7 +++++ src/lib/formats/apricotpc_dsk.cpp | 50 +++++++++++++++++++++++++++++++ src/lib/formats/apricotpc_dsk.h | 33 ++++++++++++++++++++ src/mame/act/apricot.cpp | 2 ++ 5 files changed, 104 insertions(+) create mode 100644 src/lib/formats/apricotpc_dsk.cpp create mode 100644 src/lib/formats/apricotpc_dsk.h diff --git a/scripts/src/formats.lua b/scripts/src/formats.lua index 6d9fae25b90..611f9fcfd3b 100644 --- a/scripts/src/formats.lua +++ b/scripts/src/formats.lua @@ -330,6 +330,18 @@ if opt_tool(FORMATS, "APPLIX_DSK") then } end +-------------------------------------------------- +-- +--@src/lib/formats/apricotpc_dsk.h,FORMATS["APRICOTPC_DSK"] = true +-------------------------------------------------- + +if opt_tool(FORMATS, "APRICOTPC_DSK") then + files { + MAME_DIR.. "src/lib/formats/apricotpc_dsk.cpp", + MAME_DIR.. "src/lib/formats/apricotpc_dsk.h", + } +end + -------------------------------------------------- -- --@src/lib/formats/apridisk.h,FORMATS["APRIDISK"] = true diff --git a/src/lib/formats/all.cpp b/src/lib/formats/all.cpp index ed3bdd86cce..87870c366dd 100644 --- a/src/lib/formats/all.cpp +++ b/src/lib/formats/all.cpp @@ -94,6 +94,10 @@ #include "applix_dsk.h" #endif +#ifdef HAS_FORMATS_APRICOTPC_DSK +#include "apricotpc_dsk.h" +#endif + #ifdef HAS_FORMATS_APRIDISK #include "apridisk.h" #endif @@ -936,6 +940,9 @@ void mame_formats_full_list(mame_formats_enumerator &en) #endif en.category("Apricot"); +#ifdef HAS_FORMATS_APRICOTPC_DSK + en.add(FLOPPY_APRICOTPC_FORMAT); // apricotpc_dsk.h +#endif #ifdef HAS_FORMATS_APRIDISK en.add(FLOPPY_APRIDISK_FORMAT); // apridisk.h #endif diff --git a/src/lib/formats/apricotpc_dsk.cpp b/src/lib/formats/apricotpc_dsk.cpp new file mode 100644 index 00000000000..a956b95ec90 --- /dev/null +++ b/src/lib/formats/apricotpc_dsk.cpp @@ -0,0 +1,50 @@ +// license: BSD-3-Clause +// copyright-holders: Dirk Best +/*************************************************************************** + + ACT Apricot PC/Xi + + Disk image format + + Notes: + - The system has a WD2797 FDC, but the format is similar to the UPD765 + - Use /M0 to create single sided disks with 70 tracks + - Use /M1 to create double sided disks with 80 tracks (default) + +***************************************************************************/ + +#include "apricotpc_dsk.h" + +apricotpc_format::apricotpc_format() : upd765_format(formats) +{ +} + +const char *apricotpc_format::name() const noexcept +{ + return "apricotpc"; +} + +const char *apricotpc_format::description() const noexcept +{ + return "ACT Apricot PC/Xi disk image"; +} + +const char *apricotpc_format::extensions() const noexcept +{ + return "img"; +} + +const apricotpc_format::format apricotpc_format::formats[] = +{ + { + floppy_image::FF_35, floppy_image::SSDD, floppy_image::MFM, + 2000, 9, 70, 1, 512, {}, 1, {}, 80, 50, 22, 84 + }, + { + floppy_image::FF_35, floppy_image::DSDD, floppy_image::MFM, + 2000, 9, 80, 2, 512, {}, 1, {}, 80, 50, 22, 84 + }, + {} +}; + +const apricotpc_format FLOPPY_APRICOTPC_FORMAT; diff --git a/src/lib/formats/apricotpc_dsk.h b/src/lib/formats/apricotpc_dsk.h new file mode 100644 index 00000000000..9051857d41b --- /dev/null +++ b/src/lib/formats/apricotpc_dsk.h @@ -0,0 +1,33 @@ +// license: BSD-3-Clause +// copyright-holders: Dirk Best +/*************************************************************************** + + ACT Apricot PC/Xi + + Disk image format + +***************************************************************************/ + +#ifndef MAME_FORMATS_APRICOTPC_DSK_H +#define MAME_FORMATS_APRICOTPC_DSK_H + +#pragma once + +#include "upd765_dsk.h" + +class apricotpc_format : public upd765_format +{ +public: + apricotpc_format(); + + virtual const char *name() const noexcept override; + virtual const char *description() const noexcept override; + virtual const char *extensions() const noexcept override; + +private: + static const format formats[]; +}; + +extern const apricotpc_format FLOPPY_APRICOTPC_FORMAT; + +#endif // MAME_FORMATS_APRICOTPC_DSK_H diff --git a/src/mame/act/apricot.cpp b/src/mame/act/apricot.cpp index ec645d08d11..ee2bec1eda6 100644 --- a/src/mame/act/apricot.cpp +++ b/src/mame/act/apricot.cpp @@ -20,6 +20,7 @@ #include "bus/rs232/rs232.h" #include "cpu/i86/i86.h" #include "cpu/i8089/i8089.h" +#include "formats/apricotpc_dsk.h" #include "formats/apridisk.h" #include "imagedev/floppy.h" #include "machine/clock.h" @@ -257,6 +258,7 @@ void apricot_state::fdc_intrq_w(int state) void apricot_state::floppy_formats(format_registration &fr) { fr.add_mfm_containers(); + fr.add(FLOPPY_APRICOTPC_FORMAT); fr.add(FLOPPY_APRIDISK_FORMAT); } From 75596f80fc07e5e7b97728abffaafafc294d91b9 Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Thu, 5 Mar 2026 15:55:55 +0100 Subject: [PATCH 138/351] -namcos23.cpp: Use custom tilemap drawing, eliminate gfxdecode from base class. [Ryan Holtz] --- src/mame/namco/namcos23.cpp | 211 ++++++++++++++++++++---------------- 1 file changed, 115 insertions(+), 96 deletions(-) diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp index b8c523d9882..0f4dbcb40ae 100644 --- a/src/mame/namco/namcos23.cpp +++ b/src/mame/namco/namcos23.cpp @@ -1246,7 +1246,6 @@ It can also be used with Final Furlong when wired correctly. #include "emupal.h" #include "screen.h" #include "speaker.h" -#include "tilemap.h" #include "md8412b_s23.h" #include "namco_settings.h" @@ -1614,6 +1613,7 @@ struct c404_t u16 spritedata_idx; u64 rowscroll_frame; u16 rowscroll[480]; + u16 linexscroll[1024]; u16 lastrow; u16 xscroll; u16 yscroll; @@ -1667,7 +1667,6 @@ public: m_charram(*this, "charram"), m_textram(*this, "textram"), m_czattr(*this, "czattr", 0x10, ENDIANNESS_BIG), - m_gfxdecode(*this, "gfxdecode"), m_lightx(*this, "LIGHTX"), m_lighty(*this, "LIGHTY"), m_p1(*this, "P1"), @@ -1681,7 +1680,6 @@ public: m_texram(nullptr), m_tileid_mask(0), m_tile_mask(0), - m_bgtilemap(nullptr), m_jvs_sense(jvs_port_device::sense::None), m_main_irqcause(0), m_ctl_vbl_active(false), @@ -1881,14 +1879,12 @@ protected: u8 mcu_p6_r(); void mcu_p6_w(u8 data); - TILE_GET_INFO_MEMBER(text_tilemap_get_info); virtual u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_CALLBACK_MEMBER(subcpu_scanline_on_tick); TIMER_CALLBACK_MEMBER(subcpu_scanline_off_tick); virtual void vblank(int state); u8 nthbyte(const u32 *pSource, int offs); - u16 nthword(const u32 *pSource, int offs); float f24_to_f32(u32 v); void render_apply_transform(s32 xi, s32 yi, s32 zi, const namcos23_render_entry *re, float &x, float &y, float &z); @@ -1896,13 +1892,13 @@ protected: void render_project(poly_vertex &v); void render_model(const namcos23_render_entry *re); void render_direct_poly(const namcos23_render_entry *re); - void render_sprite(const namcos23_render_entry *re); - void render_sprite_tile(u32 code_offset, const namcos23_render_entry *re, int row, int col); void render_immediate(const namcos23_render_entry *re); + virtual void dispatch_render_entry(const namcos23_render_entry *re); virtual void render_run(screen_device &screen, bitmap_rgb32 &bitmap); void update_text_rowscroll(); void apply_text_scroll(); + void draw_text_layer(screen_device &screen); void mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival); required_device m_maincpu; @@ -1916,7 +1912,6 @@ protected: required_shared_ptr m_charram; required_shared_ptr m_textram; memory_share_creator m_czattr; - required_device m_gfxdecode; optional_ioport m_lightx; optional_ioport m_lighty; required_ioport m_p1; @@ -1940,7 +1935,6 @@ protected: const u16 *m_texram; u32 m_tileid_mask; u32 m_tile_mask; - tilemap_t *m_bgtilemap; u8 m_jvs_sense; @@ -1995,7 +1989,8 @@ class gorgon_state : public namcos23_state { public: gorgon_state(const machine_config &mconfig, device_type type, const char *tag) : - namcos23_state(mconfig, type, tag) + namcos23_state(mconfig, type, tag), + m_gfxdecode(*this, "gfxdecode") { } @@ -2017,12 +2012,18 @@ protected: void c435_pio_mode_w(offs_t offset, u32 data, u32 mem_mask = ~0); + void render_sprite(const namcos23_render_entry *re); + void render_sprite_tile(u32 code_offset, const namcos23_render_entry *re, int row, int col); + virtual u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) override; + virtual void dispatch_render_entry(const namcos23_render_entry *re) override; virtual void render_run(screen_device &screen, bitmap_rgb32 &bitmap) override; virtual void vblank(int state) override; void recalc_czram(); + required_device m_gfxdecode; + std::unique_ptr m_banked_czram[4]; std::unique_ptr m_recalc_czram[4]; u32 m_cz_was_written[4]; @@ -2277,12 +2278,6 @@ u8 namcos23_state::nthbyte(const u32 *pSource, int offs) return (pSource[0]<<((offs&3)*8))>>24; } -u16 namcos23_state::nthword(const u32 *pSource, int offs) -{ - pSource += offs/2; - return (pSource[0]<<((offs&1)*16))>>16; -} - /*************************************************************************** @@ -3752,7 +3747,7 @@ void namcos23_state::render_direct_poly(const namcos23_render_entry *re) } } -void namcos23_state::render_sprite(const namcos23_render_entry *re) +void gorgon_state::render_sprite(const namcos23_render_entry *re) { int offset = 0; @@ -3766,14 +3761,14 @@ void namcos23_state::render_sprite(const namcos23_render_entry *re) } } -void namcos23_state::render_sprite_tile(u32 code_offset, const namcos23_render_entry *re, int row, int col) +void gorgon_state::render_sprite_tile(u32 code_offset, const namcos23_render_entry *re, int row, int col) { const namcos23_sprite_data &sprite = re->sprite; render_t &render = m_render; u32 code = sprite.code + code_offset; - gfx_element *gfx = m_gfxdecode->gfx(2); + gfx_element *gfx = m_gfxdecode->gfx(0); s32 sprite_screen_height = (((sprite.ysize << 16) >> 5) * gfx->height() + 0x8000) >> 16; s32 sprite_screen_width = (((sprite.xsize << 16) >> 5) * gfx->width() + 0x8000) >> 16; if (sprite_screen_width && sprite_screen_height) @@ -4443,6 +4438,38 @@ void gorgon_state::render_run(screen_device &screen, bitmap_rgb32 &bitmap) namcos23_state::render_run(screen, bitmap); } +void gorgon_state::dispatch_render_entry(const namcos23_render_entry *re) +{ + switch (re->type) + { + case SPRITE: + render_sprite(re); + return; + default: + namcos23_state::dispatch_render_entry(re); + return; + } +} + +void namcos23_state::dispatch_render_entry(const namcos23_render_entry *re) +{ + switch (re->type) + { + case MODEL: + if (m_c404.layer_flags & 1) + render_model(re); + return; + case DIRECT: + if (m_c404.layer_flags & 1) + render_direct_poly(re); + return; + case IMMEDIATE: + if (m_c404.layer_flags & 1) + render_immediate(re); + return; + } +} + void namcos23_state::render_run(screen_device &screen, bitmap_rgb32 &bitmap) { render_t &render = m_render; @@ -4451,24 +4478,7 @@ void namcos23_state::render_run(screen_device &screen, bitmap_rgb32 &bitmap) render.poly_count = 0; for (int i = 0; i < render.count[!render.cur]; i++) { - switch (re->type) - { - case MODEL: - if (m_c404.layer_flags & 1) - render_model(re); - break; - case DIRECT: - if (m_c404.layer_flags & 1) - render_direct_poly(re); - break; - case IMMEDIATE: - if (m_c404.layer_flags & 1) - render_immediate(re); - break; - case SPRITE: - render_sprite(re); - break; - } + dispatch_render_entry(re); re++; } @@ -4514,28 +4524,14 @@ void namcos23_state::paletteram_w(offs_t offset, u32 data, u32 mem_mask) // C361 (text) -TILE_GET_INFO_MEMBER(namcos23_state::text_tilemap_get_info) -{ - u16 data = nthword(m_textram, tile_index); - /** - * xxxx.----.----.---- palette select - * ----.xx--.----.---- flip - * ----.--xx.xxxx.xxxx code - */ - tileinfo.set(0, data & 0x03ff, data >> 12, TILE_FLIPYX((data & 0x0c00) >> 10)); -} - void namcos23_state::textram_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_textram[offset]); - m_bgtilemap->mark_tile_dirty(offset*2); - m_bgtilemap->mark_tile_dirty((offset*2)+1); } void namcos23_state::textchar_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_charram[offset]); - m_gfxdecode->gfx(0)->mark_dirty(offset/32); } // C404 (mixing, gamma RAM) @@ -4723,17 +4719,10 @@ void namcos23_state::video_start() m_tileid_mask = (memregion("textilemapl")->bytes()/2 - 1) & ~0xff; // Used for y masking m_tile_mask = memregion("textile")->bytes()/256 - 1; - m_gfxdecode->gfx(0)->set_source(reinterpret_cast(m_charram.target())); m_mix_bitmap = std::make_unique(640, 480); - m_bgtilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(namcos23_state::text_tilemap_get_info)), TILEMAP_SCAN_ROWS, 16, 16, 64, 64); - m_bgtilemap->set_scroll_rows(64 * 16); // fake - m_bgtilemap->set_transparent_pen(0xf); m_render.polymgr = std::make_unique(*this, m_tmlrom, m_tmhrom, m_texrom, m_c412.sram, m_tileid_mask, m_tile_mask); m_ptrom_limit = memregion("pointrom")->bytes()/4; - - for (int i = 0; i < m_gfxdecode->gfx(1)->elements(); i++) - m_gfxdecode->gfx(1)->get_data(i); } void gorgon_state::video_start() @@ -4742,6 +4731,70 @@ void gorgon_state::video_start() m_sprrom = memregion("sprites")->base(); } +void namcos23_state::draw_text_layer(screen_device &screen) +{ + // tile width: 16 + // tile height: 16 + // total elements: 0x3c0 + // bitplanes: 4 + // plane offsets: 0, 1, 2, 3 + // bit offset of each horizontal pixel: + // 0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52, 56, 60 + // bit offset of each vertical pixel: + // 0, 64, 128, 192, 256, 320, 384, 448, 512, 576, 640, 704, 768, 832, 896, 960 + // tile spacing (in bits): 1024 + + // xxxx.----.----.---- palette select + // ----.xx--.----.---- flip + // ----.--xx.xxxx.xxxx code + + for (u32 tmy = 0; tmy < 30; tmy++) + { + for (u32 ty = 0; ty < 16; ty++) + { + const u32 y = (tmy << 4) | ty; + u16 *dst = &m_mix_bitmap->pix(y); + u8 *pri = &screen.priority().pix(y); + const u32 scrolled_y = (y + m_c404.yscroll) & 0x03ff; + const u32 adjusted_tmy = scrolled_y >> 4; + const u32 adjusted_ty = scrolled_y & 0xf; + for (u32 tmx = 0; tmx < 40; tmx++) + { + const u16 scroll_x = m_c404.linexscroll[scrolled_y]; + u16 tile_scroll = scroll_x >> 4; + s16 pix_scroll = scroll_x & 0xf; + u16 tile_data = util::big_endian_cast(m_textram.target())[(adjusted_tmy << 6) | ((tmx + tile_scroll) & 0x3f)]; + u32 pal_select = BIT(tile_data, 12, 4) << 4; + u32 tile_code = (tile_data & 0x03ff) << 5; + u8 flipx_mask = BIT(tile_data, 10) ? 0x00 : 0x3c; + u16 flipy_mask = BIT(tile_data, 11) ? 0x1e : 0x00; + u64 char_data = ((u64)m_charram[tile_code | (adjusted_ty << 1)] << 32) | m_charram[tile_code | ((adjusted_ty << 1) ^ flipy_mask) | 1]; + for (u32 tx = 0; tx < 16; tx++) + { + const u8 val = BIT(char_data, ((tx + pix_scroll) << 2) ^ flipx_mask, 4); + if (val != 0xf) + { + *dst = m_c404.palbase | pal_select | val; + *pri = 4; + } + dst++; + pri++; + if (pix_scroll && (tx + pix_scroll) == 15) + { + tile_data = util::big_endian_cast(m_textram.target())[(adjusted_tmy << 6) | ((tmx + tile_scroll + 1) & 0x3f)]; + pal_select = BIT(tile_data, 12, 4) << 4; + tile_code = (tile_data & 0x03ff) << 5; + flipx_mask = BIT(tile_data, 10) ? 0x00 : 0x3c; + flipy_mask = BIT(tile_data, 11) ? 0x1e : 0x00; + char_data = ((u64)m_charram[tile_code | (adjusted_ty << 1)] << 32) | m_charram[tile_code | ((adjusted_ty << 1) ^ flipy_mask) | 1]; + pix_scroll -= 16; + } + } + } + } + } +} + void namcos23_state::mix_text_layer(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int prival) { const pen_t *pens = m_palette->pens(); @@ -4819,7 +4872,6 @@ u32 namcos23_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c return UPDATE_HAS_NOT_CHANGED; } - m_bgtilemap->set_palette_offset(m_c404.palbase); screen.priority().fill(0, cliprect); // background color @@ -4841,9 +4893,8 @@ u32 namcos23_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c if (m_c404.layer_flags & 4) { apply_text_scroll(); - m_bgtilemap->set_palette_offset(m_c404.palbase); - m_bgtilemap->draw(screen, *m_mix_bitmap, cliprect, 0, 4, 4); + draw_text_layer(screen); mix_text_layer(screen, bitmap, cliprect, 4); } @@ -5374,17 +5425,11 @@ void namcos23_state::update_text_rowscroll() void namcos23_state::apply_text_scroll() { update_text_rowscroll(); - int scroll_y = m_c404.yscroll & 0x3ff; - - m_bgtilemap->set_scrolly(0, scroll_y); - - for (int i = 0; i < 0x400; i++) - m_bgtilemap->set_scrollx(i, m_c404.rowscroll[0]); // apply current frame x scroll updates to tilemap for (int i = 0; i < 480; i++) { - m_bgtilemap->set_scrollx((i + scroll_y + 4) & 0x3ff, m_c404.rowscroll[i]); + m_c404.linexscroll[(i + (m_c404.yscroll & 0x3ff) + 4) & 0x3ff] = m_c404.rowscroll[i]; } } @@ -6464,34 +6509,10 @@ void namcoss23_gmen_state::machine_reset() m_vpx_sdao = 0; } - - -#define XOR(a) WORD2_XOR_BE(a) -static const gfx_layout namcos23_cg_layout = -{ - 16,16, - 0x400, /* 0x3c0 */ - 4, - { 0,1,2,3 }, - { XOR(0)*4, XOR(1)*4, XOR(2)*4, XOR(3)*4, XOR(4)*4, XOR(5)*4, XOR(6)*4, XOR(7)*4, - XOR(8)*4, XOR(9)*4, XOR(10)*4, XOR(11)*4, XOR(12)*4, XOR(13)*4, XOR(14)*4, XOR(15)*4 }, - { 64*0,64*1,64*2,64*3,64*4,64*5,64*6,64*7,64*8,64*9,64*10,64*11,64*12,64*13,64*14,64*15 }, - 64*16 -}; /* cg_layout */ - -#undef XOR - -static GFXLAYOUT_RAW(namcos23_sprite_layout, 32, 32, 32*8, 32*32*8) - -static GFXDECODE_START( gfx_namcos23 ) - GFXDECODE_RAM( nullptr, 0, namcos23_cg_layout, 0, 0x800 ) - GFXDECODE_ENTRY( "textile", 0, gfx_16x16x8_raw, 0, 0x80 ) -GFXDECODE_END +static GFXLAYOUT_RAW(gorgon_sprite_layout, 32, 32, 32*8, 32*32*8) static GFXDECODE_START( gfx_gorgon ) - GFXDECODE_RAM( nullptr, 0, namcos23_cg_layout, 0, 0x800 ) - GFXDECODE_ENTRY( "textile", 0, gfx_16x16x8_raw, 0, 0x80 ) - GFXDECODE_ENTRY( "sprites", 0, namcos23_sprite_layout, 0, 0x80 ) + GFXDECODE_ENTRY( "sprites", 0, gorgon_sprite_layout, 0, 0x80 ) GFXDECODE_END void gorgon_state::gorgon(machine_config &config) @@ -6617,8 +6638,6 @@ void namcos23_state::s23(machine_config &config) PALETTE(config, m_palette).set_entries(0x8000); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_namcos23); - /* sound hardware */ SPEAKER(config, "speaker", 2).front(); From e2dbc608c38558ee078d675c08fc91e9726beee0 Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Thu, 5 Mar 2026 16:08:16 +0100 Subject: [PATCH 139/351] -namcos23.cpp: Remove now-unneeded textram_w and textchar_w. [Ryan Holtz] --- src/mame/namco/namcos23.cpp | 26 ++++++-------------------- 1 file changed, 6 insertions(+), 20 deletions(-) diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp index 0f4dbcb40ae..489d9088ca1 100644 --- a/src/mame/namco/namcos23.cpp +++ b/src/mame/namco/namcos23.cpp @@ -1735,8 +1735,6 @@ protected: virtual void irq_update(u32 cause); void subcpu_irq1_update(int state); - void textram_w(offs_t offset, u32 data, u32 mem_mask = ~0); - void textchar_w(offs_t offset, u32 data, u32 mem_mask = ~0); void paletteram_w(offs_t offset, u32 data, u32 mem_mask = ~0); void sprites_idx_w(offs_t offset, u16 data, u16 mem_mask = ~0); void sprites_data_w(offs_t offset, u16 data, u16 mem_mask = ~0); @@ -4522,18 +4520,6 @@ void namcos23_state::paletteram_w(offs_t offset, u32 data, u32 mem_mask) -// C361 (text) - -void namcos23_state::textram_w(offs_t offset, u32 data, u32 mem_mask) -{ - COMBINE_DATA(&m_textram[offset]); -} - -void namcos23_state::textchar_w(offs_t offset, u32 data, u32 mem_mask) -{ - COMBINE_DATA(&m_charram[offset]); -} - // C404 (mixing, gamma RAM) u16 namcos23_state::c404_ram_r(offs_t offset) @@ -5797,8 +5783,8 @@ void gorgon_state::mips_map(address_map &map) map(0x06110000, 0x0613ffff).ram().w(FUNC(gorgon_state::paletteram_w)).share("paletteram"); // Palette RAM (C404) map(0x06300000, 0x06300001).w(FUNC(gorgon_state::sprites_idx_w)); map(0x06300002, 0x06300003).w(FUNC(gorgon_state::sprites_data_w)); - map(0x06400000, 0x0641dfff).ram().w(FUNC(gorgon_state::textchar_w)).share("charram"); // Text CGRAM (C361) - map(0x0641e000, 0x0641ffff).ram().w(FUNC(gorgon_state::textram_w)).share("textram"); // Text VRAM (C361) + map(0x06400000, 0x0641dfff).ram().share("charram"); // Text CGRAM (C361) + map(0x0641e000, 0x0641ffff).ram().share("textram"); // Text VRAM (C361) c361_map(map, 0x06420000); @@ -5822,8 +5808,8 @@ void namcos23_state::mips_map(address_map &map) map(0x06200000, 0x06203fff).ram(); // C422 RAM map(0x06400000, 0x0640000f).rw(FUNC(namcos23_state::c422_r), FUNC(namcos23_state::c422_w)); // C422 registers map(0x06400002, 0x06400003).w(FUNC(gorgon_state::c422_irq_w)); - map(0x06800000, 0x0681dfff).ram().w(FUNC(namcos23_state::textchar_w)).share("charram"); // Text CGRAM (C361) - map(0x0681e000, 0x0681ffff).ram().w(FUNC(namcos23_state::textram_w)).share("textram"); // Text VRAM (C361) + map(0x06800000, 0x0681dfff).ram().share("charram"); // Text CGRAM (C361) + map(0x0681e000, 0x0681ffff).ram().share("textram"); // Text VRAM (C361) c361_map(map, 0x06820000); c404_map(map, 0x06a08000); @@ -5881,8 +5867,8 @@ void crszone_state::mips_map(address_map &map) map(0x16200000, 0x16203fff).ram(); // C422 RAM map(0x16400000, 0x1640000f).rw(FUNC(crszone_state::c422_r), FUNC(crszone_state::c422_w)); // C422 registers map(0x16400002, 0x16400003).w(FUNC(crszone_state::c422_irq_w)); - map(0x16800000, 0x1681dfff).ram().w(FUNC(crszone_state::textchar_w)).share("charram"); // Text CGRAM (C361) - map(0x1681e000, 0x1681ffff).ram().w(FUNC(crszone_state::textram_w)).share("textram"); // Text VRAM (C361) + map(0x16800000, 0x1681dfff).ram().share("charram"); // Text CGRAM (C361) + map(0x1681e000, 0x1681ffff).ram().share("textram"); // Text VRAM (C361) c361_map(map, 0x16820000); c404_map(map, 0x16a08000); From fee23037375166275937e15caf0b45f5de1cb3c7 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 6 Mar 2026 02:59:05 +1100 Subject: [PATCH 140/351] More stuff mostly related to recompiling CPUs: cpu/drcbearm64.cpp: Don't set the rounding mode on SETFMOD if it hasn't changed. cpu/e132xs.cpp: Skip more unnecessary flag calculations, use pre-calculated PC for updating G0 in memory when possible, better analysis of pre-calculated PC values when delay slots are involved. cpu/sh: Cleaned up register dependency analysis logging, fixed an instruction analysis bug. cpu/sharc: Disassemble unimplemented instructions executed in recompiled code, include tag in more fatal errors, use throw syntax to make it cleared it's an early out. --- scripts/src/cpu.lua | 4 +- src/devices/cpu/drcbearm64.cpp | 17 ++- src/devices/cpu/e132xs/e132xsdrc.cpp | 20 ++- src/devices/cpu/e132xs/e132xsdrc_ops.hxx | 134 ++++++++++++------ src/devices/cpu/e132xs/e1fe.cpp | 62 ++++---- src/devices/cpu/e132xs/e1fe.h | 11 ++ src/devices/cpu/powerpc/ppcdrc.cpp | 13 +- src/devices/cpu/sh/sh.cpp | 93 +++--------- src/devices/cpu/sh/sh.h | 3 - src/devices/cpu/sh/sh_fe.cpp | 60 +++++++- src/devices/cpu/sh/sh_fe.h | 32 +++-- src/devices/cpu/sharc/sharc.cpp | 15 +- src/devices/cpu/sharc/sharc.h | 4 +- .../sharc/{sharcdsm.cpp => sharc_dasm.cpp} | 95 +++++++------ .../cpu/sharc/{sharcdsm.h => sharc_dasm.h} | 80 +++++------ src/devices/cpu/sharc/sharcdrc.cpp | 9 +- src/devices/cpu/sharc/sharcfe.cpp | 12 +- src/devices/cpu/sharc/sharcops.hxx | 66 ++++----- src/tools/unidasm.cpp | 2 +- 19 files changed, 419 insertions(+), 313 deletions(-) rename src/devices/cpu/sharc/{sharcdsm.cpp => sharc_dasm.cpp} (95%) rename src/devices/cpu/sharc/{sharcdsm.h => sharc_dasm.h} (65%) diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 3490ca9d4f9..570d2bd1b87 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -283,8 +283,8 @@ if CPUS["ADSP2106X"] then end if opt_tool(CPUS, "ADSP2106X") then - table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/sharc/sharcdsm.cpp") - table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/sharc/sharcdsm.h") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/sharc/sharc_dasm.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/sharc/sharc_dasm.h") end -------------------------------------------------- diff --git a/src/devices/cpu/drcbearm64.cpp b/src/devices/cpu/drcbearm64.cpp index 8e8f40052b0..2a9507cde10 100644 --- a/src/devices/cpu/drcbearm64.cpp +++ b/src/devices/cpu/drcbearm64.cpp @@ -1863,7 +1863,7 @@ void drcbe_arm64::op_handle(a64::Assembler &a, const uml::instruction &inst) a.bind(handle); // emit a jump around the stack adjust in case code falls through here - Label skip = a.new_label(); + Label const skip = a.new_label(); a.b(skip); // register the current pointer for the handle @@ -2319,9 +2319,9 @@ void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst) assert_no_flags(inst); be_parameter srcp(*this, inst.param(0), PTYPE_MRI); - const a64::Gp scratch = select_register(TEMP_REG1, inst.size()); + a64::Gp const scratch = select_register(TEMP_REG1, inst.size()); - emit_ldrb_mem(a, TEMP_REG2.w(), &m_near.nominal_fmod); + emit_ldrb_mem(a, TEMP_REG2.w(), &m_state.fmod); if (srcp.is_immediate()) { @@ -2329,20 +2329,29 @@ void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst) } else { - const a64::Gp src = srcp.select_register(scratch, inst.size()); + a64::Gp const src = srcp.select_register(scratch, inst.size()); mov_reg_param(a, inst.size(), src, srcp); a.and_(scratch, src, 3); } + Label const skip = a.new_label(); + a.cmp(TEMP_REG2.w(), scratch.w()); + a.b_eq(skip); + + emit_ldrb_mem(a, TEMP_REG2.w(), &m_near.nominal_fmod); emit_strb_mem(a, scratch.w(), &m_state.fmod); + a.cmp(TEMP_REG2.w(), scratch.w()); a.cset(TEMP_REG2.w(), a64::CondCode::kNE); emit_strb_mem(a, TEMP_REG2.w(), &m_near.fmod_changed); + a.mrs(TEMP_REG2, a64::Predicate::SysReg::kFPCR); a.sub(scratch.w(), scratch.w(), 1); a.bfi(TEMP_REG2, scratch.x(), 22, 2); a.msr(a64::Predicate::SysReg::kFPCR, TEMP_REG2); + + a.bind(skip); } void drcbe_arm64::op_getfmod(a64::Assembler &a, const uml::instruction &inst) diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index b045b129cbe..b2b12bc1506 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -388,18 +388,20 @@ void hyperstone_device::log_descriptions(const opcode_desc *desc_list, unsigned else m_disassembler.disassemble_one(buffer, desc_list->pc, desc_list->opptr); buffer.put('\0'); - m_drcuml->log_printf("%-40s", &buffer.vec()[0]); + m_drcuml->log_printf( + (desc_list->regin.any() || desc_list->regout.any()) ? "%-40s" : "%s", + &buffer.vec()[0]); // output register dependencies buffer.clear(); buffer.seekp(0); - if (!desc_list->regin.none()) + if (desc_list->regin.any()) { desc_list->log_registers_used(buffer); - if (!desc_list->regout.none()) + if (desc_list->regout.any()) buffer << ' '; } - if (!desc_list->regout.none()) + if (desc_list->regout.any()) desc_list->log_registers_modified(buffer); buffer.put('\0'); m_drcuml->log_printf("%s\n", &buffer.vec()[0]); @@ -919,7 +921,10 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compi UML_TEST(block, mem(&m_core->delay_slot), ~uint32_t(0)); UML_JMPc(block, uml::COND_NZ, set_delay_pc); - UML_ADD(block, DRC_PC, DRC_PC, desc->length); + if (desc->pc_value_unknown()) + UML_ADD(block, DRC_PC, DRC_PC, desc->length); + else + UML_MOV(block, DRC_PC, desc->pc_value()); UML_MOV(block, mem(&m_core->delay_slot_taken), 0); UML_JMP(block, done); @@ -931,7 +936,10 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compi } else { - UML_ADD(block, DRC_PC, DRC_PC, desc->length); + if (desc->pc_value_unknown()) + UML_ADD(block, DRC_PC, DRC_PC, desc->length); + else + UML_MOV(block, DRC_PC, desc->pc_value()); UML_MOV(block, mem(&m_core->delay_slot_taken), 0); } diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx index 9f2d42b3ece..f1244440bde 100644 --- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx +++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx @@ -665,8 +665,10 @@ inline void hyperstone_device::generate_logic_op(drcuml_block &block, compiler_s const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src_code = op & 0xf; + const bool need_cond = (!DstGlobal || (dst_code != SR_REGISTER)) && (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()); - UML_MOV(block, I2, DRC_SR); + if (!SrcGlobal || !DstGlobal || need_cond) + UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); @@ -684,9 +686,12 @@ inline void hyperstone_device::generate_logic_op(drcuml_block &block, compiler_s body(dst, src); - UML_SETc(block, uml::COND_Z, I1); - UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); - UML_MOV(block, DRC_SR, I2); + if (need_cond) + { + UML_SETc(block, uml::COND_Z, I1); + UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); + UML_MOV(block, DRC_SR, I2); + } if (!DstGlobal || (dst_code <= SR_REGISTER)) generate_set_dst(block, compiler, desc, DstGlobal, dst_code, dst, uml::I3, false); @@ -699,7 +704,10 @@ inline void hyperstone_device::generate_logic_op_imm(drcuml_block &block, compil // body should update dst and set Z flag // body must not clobber I2 or I3 - UML_MOV(block, I2, DRC_SR); + const bool need_cond = (!DstGlobal || (dst_code != SR_REGISTER)) && (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()); + + if (!DstGlobal || need_cond) + UML_MOV(block, I2, DRC_SR); if (!DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); @@ -714,9 +722,12 @@ inline void hyperstone_device::generate_logic_op_imm(drcuml_block &block, compil body(uml::mem(&m_core->global_regs[dst_code])); } - UML_SETc(block, uml::COND_Z, I1); - UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); - UML_MOV(block, DRC_SR, I2); + if (need_cond) + { + UML_SETc(block, uml::COND_Z, I1); + UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); + UML_MOV(block, DRC_SR, I2); + } if (!DstGlobal || (dst_code <= SR_REGISTER)) generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false); @@ -1076,12 +1087,27 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp else UML_DDIVU(block, I2, I4, I1, I0); - UML_AND(block, I3, DRC_SR, ~(V_MASK | Z_MASK | N_MASK)); - UML_TEST(block, I2, ~uint32_t(0)); - UML_SETc(block, uml::COND_Z, I0); - UML_SHL(block, I0, I0, Z_SHIFT); - UML_ROLINS(block, I0, I2, N_SHIFT + 1, N_MASK); - UML_OR(block, DRC_SR, I3, I0); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required() || desc->n_calc_required()) + { + UML_AND(block, I3, DRC_SR, ~(V_MASK | Z_MASK | N_MASK)); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_TEST(block, I2, ~uint32_t(0)); + UML_SETc(block, uml::COND_Z, I0); + UML_SHL(block, I0, I0, Z_SHIFT); + if (!DO_ELIDE_CONDITION_CALC || desc->n_calc_required()) + UML_ROLINS(block, I0, I2, N_SHIFT + 1, N_MASK); + } + else if (desc->n_calc_required()) + { + UML_ROLAND(block, I0, I2, N_SHIFT + 1, N_MASK); + } + UML_OR(block, DRC_SR, I3, I0); + } + else if (desc->v_calc_required()) + { + UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK)); + } if (DstGlobal) { @@ -1097,6 +1123,7 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp UML_JMP(block, done); UML_LABEL(block, no_result); + UML_OR(block, DRC_SR, DRC_SR, V_MASK); generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR); UML_LABEL(block, done); @@ -1160,17 +1187,22 @@ void hyperstone_device::generate_mask(drcuml_block &block, compiler_state &compi const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src = desc->imm; + const bool need_cond = (!DstGlobal || (dst_code != SR_REGISTER)) && (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()); - UML_MOV(block, I2, DRC_SR); + if (!SrcGlobal || !DstGlobal || need_cond) + UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0); UML_AND(block, I0, I0, src); - UML_SETc(block, uml::COND_Z, I1); - UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); - UML_MOV(block, DRC_SR, I2); + if (need_cond) + { + UML_SETc(block, uml::COND_Z, I1); + UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true); } @@ -1185,22 +1217,25 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src = desc->imm; + const bool need_cond = (!DstGlobal || (dst_code != SR_REGISTER)) && (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()); - UML_MOV(block, I2, DRC_SR); + if (!SrcGlobal || !DstGlobal || need_cond) + UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); if (SrcGlobal && (src_code == PC_REGISTER) && (desc->in_delay_slot() || !compiler.check_delay())) { const uint64_t result = uint64_t(compiler.pc()) + src; - const uint32_t flags = - (BIT(result, 32) << C_SHIFT) | - (!uint32_t(result) ? Z_MASK : 0) | - (BIT(result, 31) << N_SHIFT) | - (BIT((compiler.pc() ^ result) & (src ^ result), 31) << V_SHIFT); - if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + if (need_cond) { + const uint32_t flags = + (BIT(result, 32) << C_SHIFT) | + (!uint32_t(result) ? Z_MASK : 0) | + (BIT(result, 31) << N_SHIFT) | + (BIT((compiler.pc() ^ result) & (src ^ result), 31) << V_SHIFT); + UML_ROLINS(block, I2, flags, 0, V_MASK | N_MASK | Z_MASK | C_MASK); UML_MOV(block, DRC_SR, I2); } @@ -1213,7 +1248,7 @@ void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compil UML_ADD(block, I0, I0, src); - if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) + if (need_cond) { generate_update_flags_addsub(block, compiler, desc, uml::I2); UML_MOV(block, DRC_SR, I2); @@ -1272,6 +1307,9 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); + if (DO_ELIDE_CONDITION_CALC && !desc->condition_calc_required()) + return; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1285,11 +1323,8 @@ void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compil UML_CMP(block, I0, I1); - if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) - { - generate_update_flags_cmp(block, compiler, desc, uml::I2); - UML_MOV(block, DRC_SR, I2); - } + generate_update_flags_cmp(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); } template @@ -1300,12 +1335,13 @@ void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compil const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; + const bool check_h = desc->check_h() || desc->is_branch_target(); UML_MOV(block, I2, DRC_SR); if (!SrcGlobal || !DstGlobal) UML_BFXU(block, I3, I2, FP_SHIFT, 7); - if (DstGlobal && compiler.user_mode()) + if (DstGlobal && check_h && compiler.user_mode()) { const int no_exception = compiler.next_label(); UML_TEST(block, I2, H_MASK); @@ -1318,7 +1354,7 @@ void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compil if (SrcGlobal) { - if (!DstGlobal || compiler.supervisor_mode()) + if (check_h && (!DstGlobal || compiler.supervisor_mode())) { const int highglobal = compiler.next_label(); const int done = compiler.next_label(); @@ -1360,7 +1396,7 @@ void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compil if (DstGlobal) { - if (compiler.supervisor_mode()) + if (check_h && compiler.supervisor_mode()) { const int highglobal = compiler.next_label(); const int done = compiler.next_label(); @@ -1549,6 +1585,9 @@ void hyperstone_device::generate_cmpb(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); + if (DO_ELIDE_CONDITION_CALC && !desc->z_calc_required()) + return; + const uint16_t op = desc->opptr[0]; const uint32_t src_code = op & 0xf; const uint32_t dst_code = (op & 0xf0) >> 4; @@ -1852,9 +1891,12 @@ void hyperstone_device::generate_not(drcuml_block &block, compiler_state &compil generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0); UML_XOR(block, I0, I0, ~uint32_t(0)); - UML_SETc(block, uml::COND_Z, I1); - UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); - UML_MOV(block, DRC_SR, I2); + if (!DO_ELIDE_CONDITION_CALC || desc->z_calc_required()) + { + UML_SETc(block, uml::COND_Z, I1); + UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK); + UML_MOV(block, DRC_SR, I2); + } generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true); } @@ -1865,6 +1907,9 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); + if (DO_ELIDE_CONDITION_CALC && !desc->condition_calc_required()) + return; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); @@ -1877,11 +1922,8 @@ void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compi UML_CMP(block, I0, src); - if (!DO_ELIDE_CONDITION_CALC || desc->condition_calc_required()) - { - generate_update_flags_cmp(block, compiler, desc, uml::I2); - UML_MOV(block, DRC_SR, I2); - } + generate_update_flags_cmp(block, compiler, desc, uml::I2); + UML_MOV(block, DRC_SR, I2); } @@ -1893,10 +1935,11 @@ void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compi const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t src = ImmLong ? desc->imm : (op & 0x0f); + const bool check_h = desc->check_h() || desc->is_branch_target(); UML_MOV(block, I2, DRC_SR); - if (DstGlobal && compiler.user_mode()) + if (check_h && DstGlobal && compiler.user_mode()) { const int no_exception = compiler.next_label(); UML_TEST(block, I2, H_MASK); @@ -1913,7 +1956,7 @@ void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compi if (DstGlobal) { - if (compiler.supervisor_mode()) + if (check_h && compiler.supervisor_mode()) { const int highglobal = compiler.next_label(); const int done = compiler.next_label(); @@ -2048,6 +2091,9 @@ void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &comp { UML_MOV(block, I7, mem(&m_core->clock_cycles_1)); + if (DO_ELIDE_CONDITION_CALC && !desc->z_calc_required()) + return; + const uint16_t op = desc->opptr[0]; const uint32_t dst_code = (op & 0xf0) >> 4; const uint32_t n = ((op & 0x100) >> 4) | (op & 0x0f); diff --git a/src/devices/cpu/e132xs/e1fe.cpp b/src/devices/cpu/e132xs/e1fe.cpp index 55859b96750..7a397185317 100644 --- a/src/devices/cpu/e132xs/e1fe.cpp +++ b/src/devices/cpu/e132xs/e1fe.cpp @@ -439,10 +439,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_z_modified(); if (desc.dst_is_pc()) { - if (!desc.src_is_pc()) + if (!desc.src_is_pc() || desc.pc_value_unknown()) desc.targetpc = BRANCH_TARGET_DYNAMIC; else - desc.targetpc = (desc.pc + desc.length) & desc.imm; + desc.targetpc = desc.pc_value() & desc.imm; desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -472,10 +472,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_cznv_modified(); // sum if (desc.dst_is_pc()) { - if (!desc.src_is_pc()) + if (!desc.src_is_pc() || desc.pc_value_unknown()) desc.targetpc = BRANCH_TARGET_DYNAMIC; else - desc.targetpc = ((desc.pc + desc.length) + desc.imm) & ~uint32_t(1); + desc.targetpc = (desc.pc_value() + desc.imm) & ~uint32_t(1); desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -529,11 +529,11 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_g_modified(desc.dst_code + 16); if (desc.dst_code == PC_REGISTER) { - if (!desc.src_is_pc()) + if (!desc.src_is_pc() || desc.pc_value_unknown()) desc.targetpc = BRANCH_TARGET_DYNAMIC; else - desc.targetpc = desc.pc + desc.length; - desc.set_is_conditional_branch(); // technically it won't branch if H is clear + desc.targetpc = desc.pc_value(); + desc.set_is_conditional_branch(); // technically it won't branch if H is set desc.set_end_sequence(); } else if (desc.dst_code == 5) // TPR_REGISTER & 0xf @@ -576,10 +576,12 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc { if (!desc.src_is_pc()) desc.targetpc = BRANCH_TARGET_DYNAMIC; - else if ((op & 0xf800) == 0x2800) - desc.targetpc = (desc.pc + desc.length) << 1; // add, adds - else + else if ((op & 0xf800) == 0x4800) desc.targetpc = 0; // sub, subs + else if (!desc.pc_value_unknown()) + desc.targetpc = desc.pc_value() << 1; // add, adds + else + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -620,8 +622,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.targetpc = BRANCH_TARGET_DYNAMIC; else if ((op & 0xf400) == 0x3400) desc.targetpc = 0; // andn, xor + else if (!desc.pc_value_unknown()) + desc.targetpc = desc.pc_value(); // or, and else - desc.targetpc = desc.pc + desc.length; // or, and + desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -648,10 +652,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_g_modified(desc.dst_code); if (desc.dst_code == PC_REGISTER) { - if (!desc.src_is_sr() || ((op & 0xfc00) == 0x4000)) + if (!desc.src_is_sr() || desc.pc_value_unknown() || ((op & 0xfc00) == 0x4000)) desc.targetpc = BRANCH_TARGET_DYNAMIC; else - desc.targetpc = desc.pc + desc.length; + desc.targetpc = desc.pc_value(); desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -684,12 +688,12 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_g_modified(desc.dst_code); if (desc.dst_code == PC_REGISTER) { - if (!desc.src_is_pc()) + if (!desc.src_is_pc() || desc.pc_value_unknown()) desc.targetpc = BRANCH_TARGET_DYNAMIC; else if ((op & 0xfc00) == 0x4400) - desc.targetpc = ~(desc.pc + desc.length) & ~uint32_t(1); // not + desc.targetpc = ~desc.pc_value() & ~uint32_t(1); // not else - desc.targetpc = uint32_t(-int32_t(desc.pc + desc.length)) & ~uint32_t(1); // neg, negs + desc.targetpc = uint32_t(-int32_t(desc.pc_value())) & ~uint32_t(1); // neg, negs desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -768,7 +772,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_g_modified(desc.dst_code); if (desc.dst_code == PC_REGISTER) { - desc.targetpc = (desc.pc + desc.length + desc.imm) & ~uint32_t(1); + if (desc.pc_value_unknown()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else + desc.targetpc = (desc.pc_value() + desc.imm) & ~uint32_t(1); desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -789,12 +796,14 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_g_modified(desc.dst_code); if (desc.dst_code == PC_REGISTER) { - if (!(op & 0x0800)) - desc.targetpc = (desc.pc + desc.length) & ~desc.imm; // andni + if (desc.pc_value_unknown()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else if (!(op & 0x0800)) + desc.targetpc = desc.pc_value() & ~desc.imm; // andni else if (!(op & 0x0400)) - desc.targetpc = ((desc.pc + desc.length) | desc.imm) & ~uint32_t(1); // ori + desc.targetpc = (desc.pc_value() | desc.imm) & ~uint32_t(1); // ori else - desc.targetpc = ((desc.pc + desc.length) ^ desc.imm) & ~uint32_t(1); // xori + desc.targetpc = (desc.pc_value() ^ desc.imm) & ~uint32_t(1); // xori desc.set_is_unconditional_branch(); desc.set_end_sequence(); } @@ -1075,7 +1084,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc if ((op & 0x0f00) != 0x0c00) desc.set_is_conditional_branch(); desc.delayslots = (op & 0x1000) ? 0 : 1; - desc.targetpc = desc.pc + desc.length + desc.imm; + if (desc.pc_value_unknown()) + desc.targetpc = BRANCH_TARGET_DYNAMIC; + else + desc.targetpc = desc.pc_value() + desc.imm; break; case 0xed: // frame desc.set_can_cause_exception(); @@ -1094,10 +1106,10 @@ bool hyperstone_device::frontend::describe(opcode_desc &desc, const opcode_desc desc.set_g_used(desc.src_code); desc.set_g_used(PC_REGISTER); desc.set_g_used(SR_REGISTER); - if (desc.src_is_pc()) - desc.targetpc = (desc.pc + desc.length + desc.imm) & ~uint32_t(1); - else if (desc.src_is_sr()) + if (desc.src_is_sr()) desc.targetpc = desc.imm & ~uint32_t(1); + else if (desc.src_is_pc() && !desc.pc_value_unknown()) + desc.targetpc = (desc.pc_value() + desc.imm) & ~uint32_t(1); else desc.targetpc = BRANCH_TARGET_DYNAMIC; desc.set_is_unconditional_branch(); diff --git a/src/devices/cpu/e132xs/e1fe.h b/src/devices/cpu/e132xs/e1fe.h index 97354a950f2..d1a00c018d9 100644 --- a/src/devices/cpu/e132xs/e1fe.h +++ b/src/devices/cpu/e132xs/e1fe.h @@ -129,6 +129,17 @@ public: return in_delay_slot() ? branch->pc : pc; } + // pc_value - value of PC when used for arithmetic + uint32_t pc_value() const + { + return in_delay_slot() ? branch->targetpc : (pc + length); + } + + bool pc_value_unknown() const + { + return in_delay_slot() && (branch->targetpc == BRANCH_TARGET_DYNAMIC); + } + void reset(offs_t curpc, bool in_delay_slot) { static_assert(REG_COUNT <= 40); diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp index ee0c9b664bc..66a99cc2bda 100644 --- a/src/devices/cpu/powerpc/ppcdrc.cpp +++ b/src/devices/cpu/powerpc/ppcdrc.cpp @@ -3914,8 +3914,9 @@ void ppc_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32 if (m_drcuml->logging()) { std::ostringstream stream; + stream.imbue(std::locale::classic()); m_dasm.dasm_one(stream, pc, op); - block.append_comment("%08X: %s", pc, stream.str()); // comment + block.append_comment("%08X: %s", pc, std::move(stream).str()); } } @@ -3950,18 +3951,20 @@ void ppc_device::log_opcode_desc(const opcode_desc *desclist, int indent) else m_dasm.dasm_one(buffer, desclist->pc, desclist->opptr); buffer.put('\0'); - m_drcuml->log_printf("%-30s", &buffer.vec()[0]); + m_drcuml->log_printf( + (desclist->regin.any() || desclist->regout.any()) ? "%-30s" : "%s", + &buffer.vec()[0]); // output register dependencies buffer.clear(); buffer.seekp(0); - if (!desclist->regin.none()) + if (desclist->regin.any()) { desclist->log_registers_used(buffer); - if (!desclist->regout.none()) + if (desclist->regout.any()) buffer << ' '; } - if (!desclist->regout.none()) + if (desclist->regout.any()) desclist->log_registers_modified(buffer); buffer.put('\0'); m_drcuml->log_printf("%s\n", &buffer.vec()[0]); diff --git a/src/devices/cpu/sh/sh.cpp b/src/devices/cpu/sh/sh.cpp index 72945b2e364..99a674fd91f 100644 --- a/src/devices/cpu/sh/sh.cpp +++ b/src/devices/cpu/sh/sh.cpp @@ -2032,75 +2032,6 @@ void sh_common_execution::save_fast_iregs(drcuml_block &block) } -/*------------------------------------------------- - log_register_list - log a list of GPR registers --------------------------------------------------*/ - -void sh_common_execution::log_register_list(const char *string, const std::bitset<32> ®list, const std::bitset<32> *regnostarlist) -{ - int count = 0; - - /* skip if nothing */ - if (reglist.none()) - return; - - m_drcuml->log_printf("[%s:", string); - - for (int regnum = 0; regnum < 16; regnum++) - { - if (reglist[opcode_desc::REG_R0 + regnum]) - { - m_drcuml->log_printf("%sr%d", (count++ == 0) ? "" : ",", regnum); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_R0 + regnum]) - m_drcuml->log_printf("*"); - } - } - - if (reglist[opcode_desc::REG_PR]) - { - m_drcuml->log_printf("%spr", (count++ == 0) ? "" : ","); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_PR]) - m_drcuml->log_printf("*"); - } - - if (reglist[opcode_desc::REG_SR]) - { - m_drcuml->log_printf("%ssr", (count++ == 0) ? "" : ","); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_SR]) - m_drcuml->log_printf("*"); - } - - if (reglist[opcode_desc::REG_MACL]) - { - m_drcuml->log_printf("%smacl", (count++ == 0) ? "" : ","); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_MACL]) - m_drcuml->log_printf("*"); - } - - if (reglist[opcode_desc::REG_MACH]) - { - m_drcuml->log_printf("%smach", (count++ == 0) ? "" : ","); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_MACH]) - m_drcuml->log_printf("*"); - } - - if (reglist[opcode_desc::REG_GBR]) - { - m_drcuml->log_printf("%sgbr", (count++ == 0) ? "" : ","); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_GBR]) - m_drcuml->log_printf("*"); - } - - if (reglist[opcode_desc::REG_VBR]) - { - m_drcuml->log_printf("%svbr", (count++ == 0) ? "" : ","); - if (regnostarlist && !(*regnostarlist)[opcode_desc::REG_VBR]) - m_drcuml->log_printf("*"); - } - - m_drcuml->log_printf("] "); -} - /*------------------------------------------------- log_opcode_desc - log a list of descriptions -------------------------------------------------*/ @@ -2124,20 +2055,32 @@ void sh_common_execution::log_opcode_desc(const opcode_desc *desclist, int inden buffer.put('\0'); m_drcuml->log_printf("%08X [%08X] t:%08X f:%s: ", desclist->pc, desclist->physpc, desclist->targetpc, &buffer.vec()[0]); - /* disassemle the current instruction and output it to the log */ + /* disassemble the current instruction and output it to the log */ buffer.clear(); buffer.seekp(0); + util::stream_format(buffer, "%*s", 4 * indent, ""); if (desclist->virtual_noop()) buffer << ""; else sh2d.dasm_one(buffer, desclist->pc, desclist->opptr); buffer.put('\0'); - m_drcuml->log_printf("%-36s", &buffer.vec()[0]); + m_drcuml->log_printf( + (desclist->regin.any() || desclist->regout.any()) ? "%-36s" : "%s", + &buffer.vec()[0]); - /* output register states */ - log_register_list("use", desclist->regin, nullptr); - log_register_list("mod", desclist->regout, &desclist->regreq); - m_drcuml->log_printf("\n"); + /* output register dependencies */ + buffer.clear(); + buffer.seekp(0); + if (desclist->regin.any()) + { + desclist->log_registers_used(buffer); + if (desclist->regout.any()) + buffer << ' '; + } + if (desclist->regout.any()) + desclist->log_registers_modified(buffer); + buffer.put('\0'); + m_drcuml->log_printf("%s\n", &buffer.vec()[0]); /* if we have a delay slot, output it recursively */ if (desclist->delay.first() != nullptr) diff --git a/src/devices/cpu/sh/sh.h b/src/devices/cpu/sh/sh.h index c06fbeddf10..fbf5e2a93f8 100644 --- a/src/devices/cpu/sh/sh.h +++ b/src/devices/cpu/sh/sh.h @@ -8,8 +8,6 @@ #include "cpu/drcuml.h" -#include - /*************************************************************************** DEBUGGING @@ -443,7 +441,6 @@ public: void alloc_handle(uml::code_handle *&handleptr, const char *name); void load_fast_iregs(drcuml_block &block); void save_fast_iregs(drcuml_block &block); - void log_register_list(const char *string, const std::bitset<32> ®list, const std::bitset<32> *regnostarlist); void log_opcode_desc(const opcode_desc *desclist, int indent); void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op); void generate_delay_slot(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t ovrpc); diff --git a/src/devices/cpu/sh/sh_fe.cpp b/src/devices/cpu/sh/sh_fe.cpp index 0716231aef7..a557109f7b7 100644 --- a/src/devices/cpu/sh/sh_fe.cpp +++ b/src/devices/cpu/sh/sh_fe.cpp @@ -63,6 +63,62 @@ void sh_common_execution::opcode_desc::log_flags(std::ostream &stream) const } +/*------------------------------------------------- + log_register_list - log a list of registers +-------------------------------------------------*/ + +void sh_common_execution::opcode_desc::log_registers_used(std::ostream &stream) const +{ + stream << "[use:"; + log_register_list(stream, regin, nullptr); + stream << ']'; +} + +void sh_common_execution::opcode_desc::log_registers_modified(std::ostream &stream) const +{ + stream << "[mod:"; + log_register_list(stream, regout, ®req); + stream << ']'; +} + +void sh_common_execution::opcode_desc::log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist) +{ + int count = 0; + + for (int regnum = 0; regnum < 16; regnum++) + { + if (reglist[REG_R0 + regnum]) + { + if (count++) + stream << ','; + stream << 'r' << regnum; + if (regnostarlist && !(*regnostarlist)[REG_R0 + regnum]) + stream << '*'; + } + } + + const auto log_bit = + [&stream, &count, ®list, ®nostarlist] (size_t bit, const char *name) + { + if (reglist[bit]) + { + if (count++) + stream << ','; + stream << name; + if (regnostarlist && !(*regnostarlist)[bit]) + stream << '*'; + } + }; + + log_bit(REG_PR, "pr"); + log_bit(REG_SR, "sr"); + log_bit(REG_MACL, "macl"); + log_bit(REG_MACH, "mach"); + log_bit(REG_GBR, "gbr"); + log_bit(REG_VBR, "vbr"); +} + + /*************************************************************************** INSTRUCTION PARSERS @@ -313,7 +369,7 @@ bool sh_common_execution::frontend::describe_group_6(opcode_desc &desc, const op case 5: // MOVWP(Rm, Rn); case 6: // MOVLP(Rm, Rn); desc.set_r_used(REG_M); - desc.set_r_used(REG_N); + desc.set_r_modified(REG_M); desc.set_r_modified(REG_N); desc.set_reads_memory(); return true; @@ -631,7 +687,7 @@ bool sh_common_execution::frontend::describe_group_0(opcode_desc &desc, const op bool sh_common_execution::frontend::describe_group_4(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode) { - switch (opcode & 0x3F) + switch (opcode & 0x3f) { case 0x00: // SHLL(Rn); case 0x01: // SHLR(Rn); diff --git a/src/devices/cpu/sh/sh_fe.h b/src/devices/cpu/sh/sh_fe.h index ba63138e3eb..266dc4f2821 100644 --- a/src/devices/cpu/sh/sh_fe.h +++ b/src/devices/cpu/sh/sh_fe.h @@ -23,20 +23,6 @@ class sh_common_execution::opcode_desc : public opcode_desc_base { public: - enum - { - REG_R0 = 0, - - REG_PR = REG_R0 + 16, - REG_SR, - REG_MACL, - REG_MACH, - REG_GBR, - REG_VBR, - - REG_COUNT - }; - offs_t physpc; // physical PC of this opcode uint16_t opptr; // copy of opcode @@ -87,8 +73,26 @@ public: } void log_flags(std::ostream &stream) const; + void log_registers_used(std::ostream &stream) const; + void log_registers_modified(std::ostream &stream) const; private: + enum + { + REG_R0 = 0, + + REG_PR = REG_R0 + 16, + REG_SR, + REG_MACL, + REG_MACH, + REG_GBR, + REG_VBR, + + REG_COUNT + }; + + static void log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist); + bool m_reads_memory; bool m_writes_memory; bool m_can_expose_external_int; diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index a7466fd012f..0b11008ed99 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -8,7 +8,7 @@ #include "emu.h" #include "sharc.h" -#include "sharcdsm.h" +#include "sharc_dasm.h" #include "sharcfe.h" #include "sharcinternal.ipp" @@ -18,6 +18,8 @@ #include #include +#include +#include //#define VERBOSE 1 #include "logmacro.h" @@ -67,6 +69,17 @@ enum DEFINE_DEVICE_TYPE(ADSP21062, adsp21062_device, "adsp21062", "Analog Devices ADSP21062 \"SHARC\"") DEFINE_DEVICE_TYPE(ADSP21060, adsp21060_device, "adsp21060", "Analog Devices ADSP21060 \"SHARC\"") + +std::string adsp21062_device::disassemble_one(uint32_t pc, uint64_t opcode) +{ + // expensive - don't use this frequently + std::ostringstream stream; + stream.imbue(std::locale::classic()); + sharc_disassembler().disassemble_one(stream, pc, opcode); + return std::move(stream).str(); +} + + void adsp21062_device::pgm_2m(address_map &map) { map(0x20000, 0x24fff).mirror(0x18000).rw(FUNC(adsp21062_device::pm_r<1>), FUNC(adsp21062_device::pm_w<1>)); diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 0094437238f..0e685452a5f 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -300,6 +300,9 @@ private: bool m_input_update_pending; bool m_enable_drc; + static std::string disassemble_one(uint32_t pc, uint64_t opcode); + void build_opcode_table(); + TIMER_CALLBACK_MEMBER(sharc_iop_delayed_write_callback); TIMER_CALLBACK_MEMBER(sharc_dma_callback); TIMER_CALLBACK_MEMBER(sharc_update_inputs); @@ -434,7 +437,6 @@ private: inline void compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fmin(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya); - void build_opcode_table(); // internal compiler state struct compiler_state diff --git a/src/devices/cpu/sharc/sharcdsm.cpp b/src/devices/cpu/sharc/sharc_dasm.cpp similarity index 95% rename from src/devices/cpu/sharc/sharcdsm.cpp rename to src/devices/cpu/sharc/sharc_dasm.cpp index f215e8816b9..e316ab8162e 100644 --- a/src/devices/cpu/sharc/sharcdsm.cpp +++ b/src/devices/cpu/sharc/sharc_dasm.cpp @@ -7,12 +7,14 @@ */ #include "emu.h" -#include "sharcdsm.h" +#include "sharc_dasm.h" #include -const char sharc_disassembler::ureg_names[256][16] = +namespace { + +const char ureg_names[256][16] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15", @@ -48,12 +50,12 @@ const char sharc_disassembler::ureg_names[256][16] = "???", "???", "???", "???", "???", "???", "???", "???" }; -const char sharc_disassembler::bopnames[8][8] = +const char bopnames[8][8] = { "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???" }; -const char sharc_disassembler::condition_codes_if[32][32] = +const char condition_codes_if[32][32] = { "EQ", "LT", "LE", "AC", "AV", "MV", "MS", "SV", @@ -65,7 +67,7 @@ const char sharc_disassembler::condition_codes_if[32][32] = "NOT FLAG3_IN", "NOT TF", "NBM", "" }; -const char sharc_disassembler::condition_codes_do[32][32] = +const char condition_codes_do[32][32] = { "EQ", "LT", "LE", "AC", "AV", "MV", "MS", "SV", @@ -77,7 +79,7 @@ const char sharc_disassembler::condition_codes_do[32][32] = "NOT FLAG3_IN", "NOT TF", "NBM", "FOREVER" }; -const char sharc_disassembler::mr_regnames[16][8] = +const char mr_regnames[16][8] = { "MR0F", "MR1F", "MR2F", "MR0B", "MR1B", "MR2B", "???", "???", "???", "???", "???", "???", "???", "???", "???", "???" @@ -95,8 +97,10 @@ const char sharc_disassembler::mr_regnames[16][8] = #define GET_DAG2_L(x) (GET_UREG(0x30 | (8 + (x & 0x7)))) #define GET_DAG2_B(x) (GET_UREG(0x40 | (8 + (x & 0x7)))) +} // anonymous namespace -void sharc_disassembler::compute(std::ostream &stream, uint32_t opcode) + +void sharc_disassembler::compute(std::ostream &stream, uint32_t opcode) const { int op = (opcode >> 12) & 0xff; int cu = (opcode >> 20) & 0x3; @@ -347,7 +351,7 @@ void sharc_disassembler::compute(std::ostream &stream, uint32_t opcode) } } -void sharc_disassembler::get_if_condition(std::ostream &stream, int cond) +void sharc_disassembler::get_if_condition(std::ostream &stream, int cond) const { if (cond != 31) { @@ -355,7 +359,7 @@ void sharc_disassembler::get_if_condition(std::ostream &stream, int cond) } } -void sharc_disassembler::pm_dm_ureg(std::ostream &stream, int g, int d, int i, int m, int ureg, int update) +void sharc_disassembler::pm_dm_ureg(std::ostream &stream, int g, int d, int i, int m, int ureg, int update) const { if (update) // post-modify { @@ -410,7 +414,7 @@ void sharc_disassembler::pm_dm_ureg(std::ostream &stream, int g, int d, int i, i } } -void sharc_disassembler::pm_dm_imm_dreg(std::ostream &stream, int g, int d, int i, int data, int dreg, int update) +void sharc_disassembler::pm_dm_imm_dreg(std::ostream &stream, int g, int d, int i, int data, int dreg, int update) const { const char *sign = ""; if (data & 0x20) @@ -471,7 +475,7 @@ void sharc_disassembler::pm_dm_imm_dreg(std::ostream &stream, int g, int d, int } } -void sharc_disassembler::pm_dm_dreg(std::ostream &stream, int g, int d, int i, int m, int dreg) +void sharc_disassembler::pm_dm_dreg(std::ostream &stream, int g, int d, int i, int m, int dreg) const { if (d) { @@ -497,7 +501,7 @@ void sharc_disassembler::pm_dm_dreg(std::ostream &stream, int g, int d, int i, i } } -void sharc_disassembler::shiftop(std::ostream &stream, int shift, int data, int rn, int rx) +void sharc_disassembler::shiftop(std::ostream &stream, int shift, int data, int rn, int rx) const { int8_t data8 = data & 0xff; int bit6 = data & 0x3f; @@ -530,7 +534,7 @@ void sharc_disassembler::shiftop(std::ostream &stream, int shift, int data, int } } -uint32_t sharc_disassembler::dasm_compute_dreg_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_dreg_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int dmi = (opcode >> 41) & 0x7; int dmm = (opcode >> 38) & 0x7; @@ -566,7 +570,7 @@ uint32_t sharc_disassembler::dasm_compute_dreg_dmpm(std::ostream &stream, uint32 return 0; } -uint32_t sharc_disassembler::dasm_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 33) & 0x1f; int comp = opcode & 0x7fffff; @@ -579,7 +583,7 @@ uint32_t sharc_disassembler::dasm_compute(std::ostream &stream, uint32_t pc, uin return 0; } -uint32_t sharc_disassembler::dasm_compute_uregdmpm_regmod(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_uregdmpm_regmod(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 32) & 0x1; @@ -600,7 +604,7 @@ uint32_t sharc_disassembler::dasm_compute_uregdmpm_regmod(std::ostream &stream, return 0; } -uint32_t sharc_disassembler::dasm_compute_dregdmpm_immmod(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_dregdmpm_immmod(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 40) & 0x1; @@ -621,7 +625,7 @@ uint32_t sharc_disassembler::dasm_compute_dregdmpm_immmod(std::ostream &stream, return 0; } -uint32_t sharc_disassembler::dasm_compute_ureg_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_ureg_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 31) & 0x1f; int uregs = (opcode >> 36) & 0xff; @@ -638,7 +642,7 @@ uint32_t sharc_disassembler::dasm_compute_ureg_ureg(std::ostream &stream, uint32 return 0; } -uint32_t sharc_disassembler::dasm_immshift_dregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immshift_dregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 32) & 0x1; @@ -658,7 +662,7 @@ uint32_t sharc_disassembler::dasm_immshift_dregdmpm(std::ostream &stream, uint32 return 0; } -uint32_t sharc_disassembler::dasm_immshift_dregdmpm_nodata(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immshift_dregdmpm_nodata(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 33) & 0x1f; int rn = (opcode >> 4) & 0xf; @@ -671,7 +675,7 @@ uint32_t sharc_disassembler::dasm_immshift_dregdmpm_nodata(std::ostream &stream, return 0; } -uint32_t sharc_disassembler::dasm_compute_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_compute_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int cond = (opcode >> 33) & 0x1f; int g = (opcode >> 38) & 0x7; @@ -689,7 +693,7 @@ uint32_t sharc_disassembler::dasm_compute_modify(std::ostream &stream, uint32_t return 0; } -uint32_t sharc_disassembler::dasm_direct_jump(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_direct_jump(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int j = (opcode >> 26) & 0x1; int cond = (opcode >> 33) & 0x1f; @@ -730,7 +734,7 @@ uint32_t sharc_disassembler::dasm_direct_jump(std::ostream &stream, uint32_t pc, return flags; } -uint32_t sharc_disassembler::dasm_indirect_jump_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_indirect_jump_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int b = (opcode >> 39) & 0x1; int j = (opcode >> 26) & 0x1; @@ -787,7 +791,7 @@ uint32_t sharc_disassembler::dasm_indirect_jump_compute(std::ostream &stream, ui return flags; } -uint32_t sharc_disassembler::dasm_indirect_jump_compute_dregdm(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_indirect_jump_compute_dregdm(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int d = (opcode >> 44) & 0x1; int cond = (opcode >> 33) & 0x1f; @@ -829,7 +833,7 @@ uint32_t sharc_disassembler::dasm_indirect_jump_compute_dregdm(std::ostream &str return flags; } -uint32_t sharc_disassembler::dasm_rts_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_rts_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int j = (opcode >> 26) & 0x1; int e = (opcode >> 25) & 0x1; @@ -874,7 +878,7 @@ uint32_t sharc_disassembler::dasm_rts_compute(std::ostream &stream, uint32_t pc, return flags; } -uint32_t sharc_disassembler::dasm_do_until_counter(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_do_until_counter(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int data = (opcode >> 24) & 0xffff; int ureg = (opcode >> 32) & 0xff; @@ -893,7 +897,7 @@ uint32_t sharc_disassembler::dasm_do_until_counter(std::ostream &stream, uint32_ return 0; } -uint32_t sharc_disassembler::dasm_do_until(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_do_until(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int term = (opcode >> 33) & 0x1f; uint32_t addr = opcode & 0xffffff; @@ -902,7 +906,7 @@ uint32_t sharc_disassembler::dasm_do_until(std::ostream &stream, uint32_t pc, ui return 0; } -uint32_t sharc_disassembler::dasm_immmove_uregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_uregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int d = (opcode >> 40) & 0x1; int g = (opcode >> 41) & 0x1; @@ -934,7 +938,7 @@ uint32_t sharc_disassembler::dasm_immmove_uregdmpm(std::ostream &stream, uint32_ return 0; } -uint32_t sharc_disassembler::dasm_immmove_uregdmpm_indirect(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_uregdmpm_indirect(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int d = (opcode >> 40) & 0x1; int g = (opcode >> 44) & 0x1; @@ -967,7 +971,7 @@ uint32_t sharc_disassembler::dasm_immmove_uregdmpm_indirect(std::ostream &stream return 0; } -uint32_t sharc_disassembler::dasm_immmove_immdata_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_immdata_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int g = (opcode >> 37) & 0x1; int i = (opcode >> 41) & 0x7; @@ -985,7 +989,7 @@ uint32_t sharc_disassembler::dasm_immmove_immdata_dmpm(std::ostream &stream, uin return 0; } -uint32_t sharc_disassembler::dasm_immmove_immdata_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_immmove_immdata_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int ureg = (opcode >> 32) & 0xff; uint32_t data = opcode & 0xffffffff; @@ -994,7 +998,7 @@ uint32_t sharc_disassembler::dasm_immmove_immdata_ureg(std::ostream &stream, uin return 0; } -uint32_t sharc_disassembler::dasm_sysreg_bitop(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_sysreg_bitop(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int bop = (opcode >> 37) & 0x7; int sreg = (opcode >> 32) & 0xf; @@ -1007,7 +1011,7 @@ uint32_t sharc_disassembler::dasm_sysreg_bitop(std::ostream &stream, uint32_t pc return 0; } -uint32_t sharc_disassembler::dasm_ireg_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_ireg_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int g = (opcode >> 38) & 0x1; int i = (opcode >> 32) & 0x7; @@ -1038,7 +1042,7 @@ uint32_t sharc_disassembler::dasm_ireg_modify(std::ostream &stream, uint32_t pc, return 0; } -uint32_t sharc_disassembler::dasm_misc(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_misc(std::ostream &stream, uint32_t pc, uint64_t opcode) const { int bits = (opcode >> 33) & 0x7f; int lpu = (opcode >> 39) & 0x1; @@ -1104,7 +1108,7 @@ uint32_t sharc_disassembler::dasm_misc(std::ostream &stream, uint32_t pc, uint64 return 0; } -uint32_t sharc_disassembler::dasm_idlenop(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_idlenop(std::ostream &stream, uint32_t pc, uint64_t opcode) const { if (opcode & 0x8000000000U) { @@ -1117,7 +1121,7 @@ uint32_t sharc_disassembler::dasm_idlenop(std::ostream &stream, uint32_t pc, uin return 0; } -uint32_t sharc_disassembler::dasm_cjump_rframe(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_cjump_rframe(std::ostream &stream, uint32_t pc, uint64_t opcode) const { /* TODO */ if (opcode & 0x10000000000U) /* RFRAME */ @@ -1131,7 +1135,7 @@ uint32_t sharc_disassembler::dasm_cjump_rframe(std::ostream &stream, uint32_t pc return 0; } -uint32_t sharc_disassembler::dasm_invalid(std::ostream &stream, uint32_t pc, uint64_t opcode) +uint32_t sharc_disassembler::dasm_invalid(std::ostream &stream, uint32_t pc, uint64_t opcode) const { util::stream_format(stream, "?"); return 0; @@ -1208,19 +1212,16 @@ const sharc_disassembler::SHARC_DASM_OP sharc_disassembler::sharc_dasm_ops[] = sharc_disassembler::sharc_disassembler() { - int i, j; - int num_ops = sizeof(sharc_dasm_ops) / sizeof(SHARC_DASM_OP); - - for (i=0; i < 256; i++) + for (int i = 0; i < 256; i++) { sharcdasm_table[i] = &sharc_disassembler::dasm_invalid; } - for (i=0; i < 256; i++) + for (int i = 0; i < 256; i++) { - uint16_t op = i << 8; + const uint16_t op = i << 8; - for (j=0; j < num_ops; j++) + for (int j = 0; j < std::size(sharc_dasm_ops); j++) { if ((sharc_dasm_ops[j].op_mask & op) == sharc_dasm_ops[j].op_bits) { @@ -1239,8 +1240,12 @@ sharc_disassembler::sharc_disassembler() offs_t sharc_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { - u64 opcode = opcodes.r64(pc); - int op = (opcode >> 40) & 0xff; + return disassemble_one(stream, pc, opcodes.r64(pc)); +} + +offs_t sharc_disassembler::disassemble_one(std::ostream &stream, offs_t pc, uint64_t opcode) const +{ + const int op = (opcode >> 40) & 0xff; return 1 | (this->*sharcdasm_table[op])(stream, pc, opcode) | SUPPORTED; } diff --git a/src/devices/cpu/sharc/sharcdsm.h b/src/devices/cpu/sharc/sharc_dasm.h similarity index 65% rename from src/devices/cpu/sharc/sharcdsm.h rename to src/devices/cpu/sharc/sharc_dasm.h index f752a133d6a..f2e92633ccf 100644 --- a/src/devices/cpu/sharc/sharcdsm.h +++ b/src/devices/cpu/sharc/sharc_dasm.h @@ -1,8 +1,7 @@ // license:BSD-3-Clause // copyright-holders:Ville Linde - -#ifndef MAME_CPU_SHARC_SHARCDSM_H -#define MAME_CPU_SHARC_SHARCDSM_H +#ifndef MAME_CPU_SHARC_SHARC_DASM_H +#define MAME_CPU_SHARC_SHARC_DASM_H #pragma once @@ -15,54 +14,53 @@ public: virtual u32 opcode_alignment() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; + offs_t disassemble_one(std::ostream &stream, offs_t pc, uint64_t opcode) const; + private: + using dasm_func = uint32_t (sharc_disassembler::*)(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + struct SHARC_DASM_OP { uint32_t op_mask; uint32_t op_bits; - uint32_t (sharc_disassembler::*handler)(std::ostream &, uint32_t, uint64_t); + dasm_func handler; }; - static const char ureg_names[256][16]; - static const char bopnames[8][8]; - static const char condition_codes_if[32][32]; - static const char condition_codes_do[32][32]; - static const char mr_regnames[16][8]; static const SHARC_DASM_OP sharc_dasm_ops[]; - uint32_t (sharc_disassembler::*sharcdasm_table[256])(std::ostream &, uint32_t, uint64_t); + dasm_func sharcdasm_table[256]; - void compute(std::ostream &stream, uint32_t opcode); - void get_if_condition(std::ostream &stream, int cond); - void pm_dm_ureg(std::ostream &stream, int g, int d, int i, int m, int ureg, int update); - void pm_dm_imm_dreg(std::ostream &stream, int g, int d, int i, int data, int dreg, int update); - void pm_dm_dreg(std::ostream &stream, int g, int d, int i, int m, int dreg); - void shiftop(std::ostream &stream, int shift, int data, int rn, int rx); + void compute(std::ostream &stream, uint32_t opcode) const; + void get_if_condition(std::ostream &stream, int cond) const; + void pm_dm_ureg(std::ostream &stream, int g, int d, int i, int m, int ureg, int update) const; + void pm_dm_imm_dreg(std::ostream &stream, int g, int d, int i, int data, int dreg, int update) const; + void pm_dm_dreg(std::ostream &stream, int g, int d, int i, int m, int dreg) const; + void shiftop(std::ostream &stream, int shift, int data, int rn, int rx) const; - uint32_t dasm_compute_dreg_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_compute(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_compute_uregdmpm_regmod(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_compute_dregdmpm_immmod(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_compute_ureg_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_immshift_dregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_immshift_dregdmpm_nodata(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_compute_modify(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_direct_jump(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_indirect_jump_compute(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_indirect_jump_compute_dregdm(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_rts_compute(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_do_until_counter(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_do_until(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_immmove_uregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_immmove_uregdmpm_indirect(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_immmove_immdata_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_immmove_immdata_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_sysreg_bitop(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_ireg_modify(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_misc(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_idlenop(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_cjump_rframe(std::ostream &stream, uint32_t pc, uint64_t opcode); - uint32_t dasm_invalid(std::ostream &stream, uint32_t pc, uint64_t opcode); + uint32_t dasm_compute_dreg_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_compute_uregdmpm_regmod(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_compute_dregdmpm_immmod(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_compute_ureg_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_immshift_dregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_immshift_dregdmpm_nodata(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_compute_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_direct_jump(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_indirect_jump_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_indirect_jump_compute_dregdm(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_rts_compute(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_do_until_counter(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_do_until(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_immmove_uregdmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_immmove_uregdmpm_indirect(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_immmove_immdata_dmpm(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_immmove_immdata_ureg(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_sysreg_bitop(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_ireg_modify(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_misc(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_idlenop(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_cjump_rframe(std::ostream &stream, uint32_t pc, uint64_t opcode) const; + uint32_t dasm_invalid(std::ostream &stream, uint32_t pc, uint64_t opcode) const; }; -#endif +#endif // MAME_CPU_SHARC_SHARC_DASM_H diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index f3ecdfe3b1a..d4b288458af 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -136,19 +136,22 @@ void adsp21062_device::cfunc_update_flag_out(void *param) void adsp21062_device::cfunc_unimplemented(void *param) { auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Unimplemented op %012X", sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64); + throw emu_fatalerror("%s: PC=%08X: Unimplemented op %012X: %s", + sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); } void adsp21062_device::cfunc_unimplemented_compute(void *param) { auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Unimplemented compute %012X", sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64); + throw emu_fatalerror("%s: PC=%08X: Unimplemented compute %012X: %s", + sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); } void adsp21062_device::cfunc_unimplemented_shiftimm(void *param) { auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Unimplemented shiftimm %012X", sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64); + throw emu_fatalerror("%s: PC=%08X: Unimplemented shiftimm %012X: %s", + sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); } void adsp21062_device::cfunc_pcstack_overflow(void *param) diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp index 4e601f398c6..52f0a115bc1 100644 --- a/src/devices/cpu/sharc/sharcfe.cpp +++ b/src/devices/cpu/sharc/sharcfe.cpp @@ -629,7 +629,7 @@ bool adsp21062_device::frontend::describe(opcode_desc &desc, const opcode_desc * break; default: - fatalerror("adsp21062_device::frontend::describe: unknown subop %02X in opcode %04X%08X", subop, (uint16_t)(opcode >> 32), (uint32_t)(opcode)); + fatalerror("adsp21062_device::frontend::describe: unknown subop %02X in opcode %012X", subop, opcode); return false; } break; @@ -1137,7 +1137,7 @@ bool adsp21062_device::frontend::describe_compute(opcode_desc &desc, uint64_t op break; default: - fatalerror("adsp21062_device::frontend::describe_compute: unknown multiop %02X in opcode %04X%08X at %08X", multiop, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown multiop %02X in opcode %012X at %08X", multiop, opcode, desc.pc); return false; } } @@ -1244,7 +1244,7 @@ bool adsp21062_device::frontend::describe_compute(opcode_desc &desc, uint64_t op } default: - fatalerror("adsp21062_device::frontend::describe_compute: unknown ALU op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown ALU op %02X in opcode %012X at %08X", operation, opcode, desc.pc); return false; } break; @@ -1528,7 +1528,7 @@ bool adsp21062_device::frontend::describe_compute(opcode_desc &desc, uint64_t op break; default: - fatalerror("adsp21062_device::frontend::describe_compute: unknown mult op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown mult op %02X in opcode %012X at %08X", operation, opcode, desc.pc); } break; } @@ -1581,13 +1581,13 @@ bool adsp21062_device::frontend::describe_compute(opcode_desc &desc, uint64_t op break; default: - fatalerror("adsp21062_device::frontend::describe_compute: unknown shift op %02X in opcode %04X%08X at %08X", operation, (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown shift op %02X in opcode %012X at %08X", operation, opcode, desc.pc); } break; } default: - fatalerror("adsp21062_device::frontend::describe_compute: unknown operation type in opcode %04X%08X at %08X", (uint16_t)(opcode >> 32), (uint32_t)(opcode), desc.pc); + fatalerror("adsp21062_device::frontend::describe_compute: unknown operation type in opcode %012X at %08X", opcode, desc.pc); return false; } } diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index 648ffdccefa..d82123eefc9 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -67,7 +67,7 @@ void adsp21062_device::add_systemreg_write_latency_effect(int sysreg, uint32_t d { if (m_core->systemreg_latency_cycles > 0) { - //fatalerror("SHARC: add_systemreg_write_latency_effect: already scheduled! (reg: %02X, data: %08X, PC: %08X)\n", systemreg_latency_reg, systemreg_latency_data, m_core->pc); + //throw emu_fatalerror("%s: add_systemreg_write_latency_effect: already scheduled! (reg: %02X, data: %08X, PC: %08X)", tag(), systemreg_latency_reg, systemreg_latency_data, m_core->pc); systemreg_write_latency_effect(); } @@ -91,15 +91,15 @@ void adsp21062_device::systemreg_write_latency_effect() if ((data & 0x1) != (oldreg & 0x1)) { - fatalerror("SHARC: systemreg_latency_op: enable I8 bit-reversing\n"); + throw emu_fatalerror("%s: systemreg_latency_op: enable I8 bit-reversing", tag()); } if ((data & 0x2) != (oldreg & 0x2)) { - fatalerror("SHARC: systemreg_latency_op: enable I0 bit-reversing\n"); + throw emu_fatalerror("%s: systemreg_latency_op: enable I0 bit-reversing", tag()); } if ((data & 0x4) != (oldreg & 0x4)) { - fatalerror("SHARC: systemreg_latency_op: enable MR alternate\n"); + throw emu_fatalerror("%s: systemreg_latency_op: enable MR alternate", tag()); } if ((data & 0x8) != (oldreg & 0x8)) /* Switch DAG1 7-4 */ @@ -196,7 +196,7 @@ void adsp21062_device::systemreg_write_latency_effect() } break; } - default: fatalerror("SHARC: systemreg_latency_op: unknown register %02X at %08X\n", m_core->systemreg_latency_reg, m_core->pc); + default: throw emu_fatalerror("%s: systemreg_latency_op: unknown register %02X at %08X\n", tag(), m_core->systemreg_latency_reg, m_core->pc); } m_core->systemreg_latency_reg = -1; @@ -271,7 +271,7 @@ uint32_t adsp21062_device::GET_UREG(int ureg) case 0x5: return m_core->pcstkp; /* PCSTKP */ case 0x7: return m_core->curlcntr; /* CURLCNTR */ case 0x8: return m_core->lcntr; /* LCNTR */ - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: GET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } break; } @@ -298,7 +298,7 @@ uint32_t adsp21062_device::GET_UREG(int ureg) } case 0xd: return m_core->imask; /* IMASK */ case 0xe: return m_core->stky; /* STKY */ - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: GET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } break; } @@ -311,12 +311,12 @@ uint32_t adsp21062_device::GET_UREG(int ureg) case 0xb: return uint32_t(m_core->px); /* PX */ case 0xc: return uint16_t(m_core->px); /* PX1 */ case 0xd: return uint32_t(m_core->px >> 16); /* PX2 */ - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: GET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } break; } - default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: GET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } } @@ -396,7 +396,7 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) if (prev < m_core->pcstkp) { if (m_core->pcstkp >= 31) - fatalerror("SHARC: PC Stack overflow!\n"); + throw emu_fatalerror("%s: PC Stack overflow!", tag()); m_core->pcstk = m_core->pcstack[m_core->pcstkp - 1]; @@ -430,7 +430,7 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) m_core->lcntr = data; break; - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: SET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } break; @@ -479,7 +479,7 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) m_core->stky = (m_core->stky & (LSEM | LSOV | SSEM | SSOV | PCEM | PCFL)) | (data & ~(LSEM | LSOV | SSEM | SSOV | PCEM | PCFL)); break; - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: SET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } break; @@ -488,11 +488,11 @@ void adsp21062_device::SET_UREG(int ureg, uint32_t data) { case 0xc: m_core->px &= 0xffffffffffff0000U; m_core->px |= (data & 0xffff); break; /* PX1 */ case 0xd: m_core->px &= 0x000000000000ffffU; m_core->px |= (uint64_t)data << 16; break; /* PX2 */ - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: SET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } break; - default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, m_core->pc); + default: throw emu_fatalerror("%s: SET_UREG: unknown register %08X at %08X", tag(), ureg, m_core->pc); } } @@ -712,7 +712,7 @@ void adsp21062_device::SHIFT_OPERATION_IMM(int shiftop, int data, int rn, int rx break; } - default: fatalerror("SHARC: unimplemented shift operation %02X at %08X\n", shiftop, m_core->pc); + default: throw emu_fatalerror("SHARC: unimplemented shift operation %02X at %08X", tag(), shiftop, m_core->pc); } } @@ -815,8 +815,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) } default: - fatalerror("SHARC: compute: multi-function opcode %02X not implemented ! (%08X, %08X)\n", multiop, m_core->pc, opcode); - break; + throw emu_fatalerror("%s: compute: multi-function opcode %02X not implemented ! (%08X, %08X)", tag(), multiop, m_core->pc, opcode); } } else /* Single-function opcode */ @@ -884,7 +883,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) break; } - default: fatalerror("SHARC: compute: unimplemented ALU operation %02X (%08X, %08X)\n", op, m_core->pc, opcode); + default: throw emu_fatalerror("%s: compute: unimplemented ALU operation %02X (%08X, %08X)", tag(), op, m_core->pc, opcode); } break; } @@ -906,8 +905,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0xb2: REG(rn) = compute_mrb_plus_mul_ssin(rx, ry); break; default: - fatalerror("SHARC: compute: multiplier operation %02X not implemented ! (%08X, %08X)\n", op, m_core->pc, opcode); - break; + throw emu_fatalerror("%s: compute: multiplier operation %02X not implemented ! (%08X, %08X)", tag(), op, m_core->pc, opcode); } break; } @@ -1078,13 +1076,13 @@ void adsp21062_device::COMPUTE(uint32_t opcode) } default: - fatalerror("SHARC: compute: shift operation %02X not implemented ! (%08X, %08X)\n", op >> 2, m_core->pc, opcode); + throw emu_fatalerror("%s: compute: shift operation %02X not implemented ! (%08X, %08X)", tag(), op >> 2, m_core->pc, opcode); } break; } default: - fatalerror("SHARC: compute: invalid single-function operation %02X\n", cu); + throw emu_fatalerror("%s: compute: invalid single-function operation %02X", tag(), cu); } } } @@ -1092,7 +1090,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) inline void adsp21062_device::PUSH_PC() { if (m_core->pcstkp >= 30) - fatalerror("SHARC: PC Stack overflow!\n"); + throw emu_fatalerror("%s: PC Stack overflow!", tag()); if (m_core->pcstkp > 0) m_core->pcstack[m_core->pcstkp - 1] = m_core->pcstk; @@ -1107,7 +1105,7 @@ inline void adsp21062_device::PUSH_PC() inline uint32_t adsp21062_device::POP_PC() { if (m_core->pcstkp == 0) - fatalerror("SHARC: PC Stack underflow!\n"); + throw emu_fatalerror("%s: PC Stack underflow!", tag()); uint32_t const result = m_core->pcstk; @@ -1139,7 +1137,7 @@ inline uint32_t adsp21062_device::TOP_PC() inline void adsp21062_device::PUSH_LOOP() { if (m_core->lstkp >= 6) - fatalerror("SHARC: Loop Stack overflow!\n"); + throw emu_fatalerror("%s: Loop Stack overflow!", tag()); if (m_core->lstkp > 0) { @@ -1162,7 +1160,7 @@ inline void adsp21062_device::PUSH_LOOP() inline void adsp21062_device::POP_LOOP() { if (m_core->lstkp == 0) - fatalerror("SHARC: Loop Stack underflow!\n"); + throw emu_fatalerror("%s: Loop Stack underflow!", tag()); m_core->lstkp--; @@ -1187,7 +1185,7 @@ inline void adsp21062_device::PUSH_STATUS_STACK() { m_core->status_stkp++; if (m_core->status_stkp >= 5) - fatalerror("SHARC: Status stack overflow!\n"); + throw emu_fatalerror("%s: Status stack overflow!", tag()); m_core->status_stack[m_core->status_stkp - 1].mode1 = GET_UREG(REG_MODE1); m_core->status_stack[m_core->status_stkp - 1].astat = GET_UREG(REG_ASTAT); @@ -1198,7 +1196,7 @@ inline void adsp21062_device::PUSH_STATUS_STACK() inline void adsp21062_device::POP_STATUS_STACK() { if (m_core->status_stkp <= 0) - fatalerror("SHARC: Status stack underflow!\n"); + throw emu_fatalerror("%s: Status stack underflow!", tag()); m_core->status_stkp--; @@ -2187,7 +2185,7 @@ void adsp21062_device::sharcop_rts() int const compute = op_get_compute(m_core->opcode); //if(lr) - // fatalerror("SHARC: rts: loop reentry not implemented!\n"); + // throw emu_fatalerror("%s: rts: loop reentry not implemented!", tag()); if (e) /* IF...ELSE */ { @@ -2524,8 +2522,7 @@ void adsp21062_device::sharcop_sysreg_bitop() break; } default: - fatalerror("SHARC: sysreg_bitop: invalid bitop %d\n", bop); - break; + throw emu_fatalerror("%s: sysreg_bitop: invalid bitop %d", tag(), bop); } SET_UREG(0x70 | sreg, src); @@ -2559,7 +2556,7 @@ void adsp21062_device::sharcop_modify() /* I register bit-reverse */ void adsp21062_device::sharcop_bit_reverse() { - fatalerror("SHARC: sharcop_bit_reverse unimplemented\n"); + throw emu_fatalerror("%s: sharcop_bit_reverse unimplemented", tag()); } /*****************************************************************************/ @@ -2578,12 +2575,10 @@ void adsp21062_device::sharcop_push_pop_stacks() } if (m_core->opcode & 0x002000000000U) { - //fatalerror("sharcop_push_pop_stacks: push sts not implemented\n"); PUSH_STATUS_STACK(); } if (m_core->opcode & 0x001000000000U) { - //fatalerror("sharcop_push_pop_stacks: pop sts not implemented\n"); POP_STATUS_STACK(); } if (m_core->opcode & 0x000800000000U) @@ -2622,5 +2617,6 @@ void adsp21062_device::sharcop_idle() void adsp21062_device::sharcop_unimplemented() { - fatalerror("SHARC: Unimplemented opcode %012X at %08X\n", m_core->opcode, m_core->pc); + throw emu_fatalerror("%s: Unimplemented opcode %012X at %08X: %s", + tag(), m_core->opcode, m_core->pc, disassemble_one(m_core->pc, m_core->opcode)); } diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp index b479313119b..a6fd193ae05 100644 --- a/src/tools/unidasm.cpp +++ b/src/tools/unidasm.cpp @@ -169,7 +169,7 @@ using util::BIT; #include "cpu/scudsp/scudspdasm.h" #include "cpu/se3208/se3208dis.h" #include "cpu/sh/sh_dasm.h" -#include "cpu/sharc/sharcdsm.h" +#include "cpu/sharc/sharc_dasm.h" #include "cpu/sigma2/sigma2d.h" #include "cpu/sm510/sm510d.h" #include "cpu/sm8500/sm8500d.h" From 0f66640d7eaa1a94c49b9af6808b9e15c83b0797 Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Thu, 5 Mar 2026 17:41:00 +0100 Subject: [PATCH 141/351] -namcos23.cpp: Fixed Y-flip in manual tilemap drawing. [Ryan Holtz] --- src/mame/namco/namcos23.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp index 489d9088ca1..949fa2e67b8 100644 --- a/src/mame/namco/namcos23.cpp +++ b/src/mame/namco/namcos23.cpp @@ -4754,7 +4754,8 @@ void namcos23_state::draw_text_layer(screen_device &screen) u32 tile_code = (tile_data & 0x03ff) << 5; u8 flipx_mask = BIT(tile_data, 10) ? 0x00 : 0x3c; u16 flipy_mask = BIT(tile_data, 11) ? 0x1e : 0x00; - u64 char_data = ((u64)m_charram[tile_code | (adjusted_ty << 1)] << 32) | m_charram[tile_code | ((adjusted_ty << 1) ^ flipy_mask) | 1]; + const u32 char_addr = tile_code | ((adjusted_ty << 1) ^ flipy_mask); + u64 char_data = ((u64)m_charram[char_addr] << 32) | m_charram[char_addr | 1]; for (u32 tx = 0; tx < 16; tx++) { const u8 val = BIT(char_data, ((tx + pix_scroll) << 2) ^ flipx_mask, 4); @@ -4772,7 +4773,8 @@ void namcos23_state::draw_text_layer(screen_device &screen) tile_code = (tile_data & 0x03ff) << 5; flipx_mask = BIT(tile_data, 10) ? 0x00 : 0x3c; flipy_mask = BIT(tile_data, 11) ? 0x1e : 0x00; - char_data = ((u64)m_charram[tile_code | (adjusted_ty << 1)] << 32) | m_charram[tile_code | ((adjusted_ty << 1) ^ flipy_mask) | 1]; + const u32 char_addr = tile_code | ((adjusted_ty << 1) ^ flipy_mask); + char_data = ((u64)m_charram[char_addr] << 32) | m_charram[char_addr | 1]; pix_scroll -= 16; } } From accda076b7e9abb148f8cf97eb336669ad05687b Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Thu, 5 Mar 2026 17:53:01 +0100 Subject: [PATCH 142/351] -namcos23.cpp: Improved viewport behavior, improved Z-sort modes, added X mirroring. [Ryan Holtz] --- src/mame/namco/namcos23.cpp | 200 +++++++++++++++++++++++++++++------- 1 file changed, 163 insertions(+), 37 deletions(-) diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp index 949fa2e67b8..e75f3f388e2 100644 --- a/src/mame/namco/namcos23.cpp +++ b/src/mame/namco/namcos23.cpp @@ -1253,7 +1253,7 @@ It can also be used with Final Furlong when wired correctly. #include -#define LOG_PROJ_MAT (1ULL << 1) +#define LOG_CLIP_DATA (1ULL << 1) #define LOG_3D_STATE_ERR (1ULL << 2) #define LOG_3D_STATE_UNK (1ULL << 3) #define LOG_MATRIX_ERR (1ULL << 4) @@ -1301,7 +1301,7 @@ It can also be used with Final Furlong when wired correctly. #define LOG_C451 (1ULL << 46) #define LOG_SH2_VPX (1ULL << 47) #define LOG_DIRECT (1ULL << 48) -#define LOG_ALL ( LOG_PROJ_MAT | LOG_3D_STATE_ERR | LOG_3D_STATE_UNK | LOG_VEC_ERR | LOG_VEC_UNK | LOG_RENDER_ERR | LOG_RENDER_INFO | LOG_MODEL_ERR | \ +#define LOG_ALL ( LOG_CLIP_DATA | LOG_3D_STATE_ERR | LOG_3D_STATE_UNK | LOG_VEC_ERR | LOG_VEC_UNK | LOG_RENDER_ERR | LOG_RENDER_INFO | LOG_MODEL_ERR | \ LOG_MODEL_INFO | LOG_MODELS | LOG_C435_PIO_UNK | LOG_C435_UNK | LOG_C417_UNK | LOG_C417_ACK | LOG_C412_UNK | LOG_C421_UNK | \ LOG_C422_IRQ | LOG_C422_UNK | LOG_C361_UNK | LOG_CTL_UNK | LOG_C417_IRQ | LOG_C361_IRQ | LOG_MATRIX_INFO | LOG_VEC_INFO | \ LOG_CTL_REG | LOG_C435_REG | LOG_C361_REG | LOG_C417_REG | LOG_C412_RAM | LOG_C421_RAM | LOG_C404_REGS | LOG_C404_RAM | LOG_GMEN | \ @@ -1445,6 +1445,7 @@ struct namcos23_render_entry u16 model_blend_factor; u16 light_power; u16 light_ambient; + bool mirror_x; u8 poly_fade_r; u8 poly_fade_g; u8 poly_fade_b; @@ -1456,6 +1457,11 @@ struct namcos23_render_entry u8 screen_fade_b; u8 screen_fade_factor; u8 fade_flags; + s16 vp_size_x; + s16 vp_size_y; + s16 vp_offset_x; + s16 vp_offset_y; + float vp_fov; union { @@ -1502,6 +1508,10 @@ struct namcos23_render_data s32 alpha_inv; u8 poly_alpha_pen; u8 prioverchar; + s16 vp_size_x; + s16 vp_size_y; + s16 vp_offset_x; + s16 vp_offset_y; s32 fadecolor_r; s32 fadecolor_g; @@ -1542,6 +1552,7 @@ struct namcos23_poly_entry namcos23_render_data rd; int vertex_count; int zkey; + int index; poly_vertex pv[16]; }; @@ -1695,7 +1706,11 @@ public: m_model_blend_factor(0x4000), m_light_power(0), m_light_ambient(0), - m_proj_matrix_line(0), + m_clip_data_line(0), + m_vp_size_x(320), + m_vp_size_y(240), + m_vp_offset_x(0), + m_vp_offset_y(0), m_scaling(0x4000), m_c361_irqnum(0), m_c422_irqnum(0), @@ -1837,7 +1852,8 @@ protected: s16 *c435_getm(u16 id); void c435_state_set_interrupt(const u16 *param); - void c435_state_set_projection_matrix_line(const u16 *param); + void c435_state_set_viewport_data(const u16 *param); + void c435_state_set_clip_data_line(const u16 *param); void c435_state_set(u16 type, const u16 *param); int c435_get_state_entry_size(u16 type); @@ -1887,7 +1903,7 @@ protected: void render_apply_transform(s32 xi, s32 yi, s32 zi, const namcos23_render_entry *re, float &x, float &y, float &z); void render_apply_matrot(s32 xi, s32 yi, s32 zi, const namcos23_render_entry *re, float &x, float &y, float &z); - void render_project(poly_vertex &v); + void render_project(poly_vertex &v, const s16 vp_size_x, const s16 vp_size_y, const float vp_fov); void render_model(const namcos23_render_entry *re); void render_direct_poly(const namcos23_render_entry *re); void render_immediate(const namcos23_render_entry *re); @@ -1956,8 +1972,12 @@ protected: u16 m_model_blend_factor; u16 m_light_power; u16 m_light_ambient; - float m_proj_matrix[8*3]; - u8 m_proj_matrix_line; + float m_clip_data[8*3]; + u8 m_clip_data_line; + s16 m_vp_size_x; + s16 m_vp_size_y; + s16 m_vp_offset_x; + s16 m_vp_offset_y; // There may only be 128 matrix and vector slots. // At 0x1e bytes per slot, rounded up to 0x20, that's 0x1000 to 0x2000 bytes. @@ -2375,7 +2395,16 @@ void namcos23_state::c435_state_set_interrupt(const u16 *param) irq_update(m_main_irqcause & ~MAIN_C435_IRQ); } -void namcos23_state::c435_state_set_projection_matrix_line(const u16 *param) +void namcos23_state::c435_state_set_viewport_data(const u16 *param) +{ + const u32 vp_data_raw = ((u32)param[7] << 16) | param[8]; + const u16 vp_offset_x_raw = (u16)(vp_data_raw & 0x0fff); + const u16 vp_offset_y_raw = (u16)((vp_data_raw >> 12) & 0x0fff); + m_vp_offset_x = ((s16)(vp_offset_x_raw << 4)) >> 4; + m_vp_offset_y = -(((s16)(vp_offset_y_raw << 4)) >> 4); +} + +void namcos23_state::c435_state_set_clip_data_line(const u16 *param) { // timecrs2: // sx = 640/2, sy = 480/2, t = tan(fov/2) (fov=45 degrees) @@ -2384,24 +2413,30 @@ void namcos23_state::c435_state_set_projection_matrix_line(const u16 *param) // line 3: 0 0 -1 c 0 0 0 sx/t std::ostringstream buf; - buf << "projection matrix line:"; + buf << "clip data line:"; for (int i = 0; i < 8; i++) { util::stream_format(buf, " %f", f24_to_f32((param[2 * i + 1] << 16) | param[2 * i + 2])); - m_proj_matrix[m_proj_matrix_line * 8 + i] = f24_to_f32((param[2 * i + 1] << 16) | param[2 * i + 2]); + m_clip_data[m_clip_data_line * 8 + i] = f24_to_f32((param[2 * i + 1] << 16) | param[2 * i + 2]); } - m_proj_matrix_line = (m_proj_matrix_line + 1) % 3; + m_clip_data_line = (m_clip_data_line + 1) % 3; buf << "\n"; - LOGMASKED(LOG_PROJ_MAT, "%s: %s", machine().describe_context(), std::move(buf).str()); + LOGMASKED(LOG_CLIP_DATA, "%s: %s", machine().describe_context(), std::move(buf).str()); + + if (m_clip_data_line == 0 && m_clip_data[10] != 0.f) + { + m_vp_size_y = (s16)std::roundf(std::abs(m_clip_data[10]) * std::abs(m_clip_data[23])); + m_vp_size_x = (s16)std::roundf((float)m_vp_size_y * std::abs(m_clip_data[2]) / std::abs(m_clip_data[10])); + } std::ostringstream buf2; - buf2 << "projection matrix line:"; + buf2 << "clip data line:"; for (int i = 0; i < 8; i++) { util::stream_format(buf2, " %08x", (param[2 * i + 1] << 16) | param[2 * i + 2]); } buf2 << "\n"; - LOGMASKED(LOG_PROJ_MAT, "%s: %s", machine().describe_context(), std::move(buf2).str()); + LOGMASKED(LOG_CLIP_DATA, "%s: %s", machine().describe_context(), std::move(buf2).str()); } void namcos23_state::c435_state_reset_w(u16 data) @@ -2756,6 +2791,11 @@ void namcos23_state::c435_state_set(u16 type, const u16 *param) re->ty = 0; re->light_power = m_light_power; re->light_ambient = m_light_ambient; + re->vp_size_x = m_vp_size_x; + re->vp_size_y = m_vp_size_y; + re->vp_offset_x = m_vp_offset_x; + re->vp_offset_y = m_vp_offset_y; + re->vp_fov = m_clip_data[23]; if (m_c435.buffer[0] == 0x4f38) { re->immediate.type = param[ 0]; @@ -2837,6 +2877,11 @@ void namcos23_state::c435_state_set(u16 type, const u16 *param) re->ty = 0; re->light_power = m_light_power; re->light_ambient = m_light_ambient; + re->vp_size_x = m_vp_size_x; + re->vp_size_y = m_vp_size_y; + re->vp_offset_x = m_vp_offset_x; + re->vp_offset_y = m_vp_offset_y; + re->vp_fov = m_clip_data[23]; /* 3-e0: 1110 0000, has shade+tex+pos 3-a0: 1010 0000, has tex+pos @@ -2919,6 +2964,11 @@ void namcos23_state::c435_state_set(u16 type, const u16 *param) re->ty = 0; re->light_power = m_light_power; re->light_ambient = m_light_ambient; + re->vp_size_x = m_vp_size_x; + re->vp_size_y = m_vp_size_y; + re->vp_offset_x = m_vp_offset_x; + re->vp_offset_y = m_vp_offset_y; + re->vp_fov = m_clip_data[23]; re->immediate.type = param[ 0]; re->immediate.h = (param[ 1] << 16) | param[ 2]; re->immediate.pal = (param[ 3] << 16) | param[ 4]; @@ -2955,12 +3005,10 @@ void namcos23_state::c435_state_set(u16 type, const u16 *param) LOGMASKED(LOG_3D_STATE_UNK, "%s: Word %02x: %04x\n", machine().describe_context(), i, m_c435.buffer[1 + i]); break; case 0x0046: - LOGMASKED(LOG_3D_STATE_UNK, "%s: unknown matrix(?) set (type 46) (%04x)\n", machine().describe_context(), m_c435.buffer[0]); - for (int i = 0; i < (m_c435.buffer[0] & 0xff); i++) - LOGMASKED(LOG_3D_STATE_UNK, "%s: Word %02x: %04x\n", machine().describe_context(), i, m_c435.buffer[1 + i]); + c435_state_set_viewport_data(param); break; case 0x00c8: - c435_state_set_projection_matrix_line(param); + c435_state_set_clip_data_line(param); break; default: LOGMASKED(LOG_3D_STATE_UNK, "%s: unknown state type (%04x, %04x)\n", machine().describe_context(), m_c435.buffer[0], m_c435.buffer[1]); @@ -3050,7 +3098,14 @@ void namcos23_state::c435_render() // 8 if (size != 3) LOGMASKED(LOG_RENDER_ERR, "%04x %04x %04x %04x %04x\n", m_c435.buffer[0], m_c435.buffer[1], m_c435.buffer[2], m_c435.buffer[3], m_c435.buffer[4]); + if (m_c435.buffer[1] == 0) + { + irq_update(m_main_irqcause | MAIN_C435_IRQ); + return; + } + render_t &render = m_render; + const bool mirror_x = BIT(m_c435.buffer[0], 13); const bool scroll = BIT(m_c435.buffer[0], 9); const bool use_scaling = BIT(m_c435.buffer[0], 7); const bool transpose = BIT(m_c435.buffer[0], 6); @@ -3072,10 +3127,16 @@ void namcos23_state::c435_render() // 8 re->model.transpose = transpose; re->absolute_priority = m_absolute_priority; re->model_blend_factor = m_model_blend_factor; + re->mirror_x = mirror_x; re->tx = scroll ? m_tx : 0; re->ty = scroll ? m_ty : 0; re->light_power = m_light_power; re->light_ambient = m_light_ambient; + re->vp_size_x = m_vp_size_x; + re->vp_size_y = m_vp_size_y; + re->vp_offset_x = m_vp_offset_x; + re->vp_offset_y = m_vp_offset_y; + re->vp_fov = m_clip_data[23]; re->model.light_vector[0] = m_light_vector[0]; re->model.light_vector[1] = m_light_vector[1]; re->model.light_vector[2] = m_light_vector[2]; @@ -3512,9 +3573,17 @@ void namcos23_renderer::render_scanline(s32 scanline, const extent_t& extent, co const s32 polycolor_r = rd.polycolor_r; const s32 polycolor_g = rd.polycolor_g; const s32 polycolor_b = rd.polycolor_b; + const s32 clip_left = ((320 - rd.vp_size_x) + rd.vp_offset_x); + const s32 clip_right = ((320 + rd.vp_size_x) + rd.vp_offset_x); + const s32 clip_top = ((240 - rd.vp_size_y) - rd.vp_offset_y); + const s32 clip_bottom = ((240 + rd.vp_size_y) - rd.vp_offset_y); - u32 *dest = &rd.bitmap->pix(scanline); - u8 *primap = &rd.primap->pix(scanline); + const s32 offset_scanline = scanline + (s32)clip_top; + if (offset_scanline < 0 || offset_scanline >= 480 || offset_scanline < clip_top || offset_scanline >= clip_bottom) + return; + + u32 *dest = &rd.bitmap->pix(offset_scanline); + u8 *primap = &rd.primap->pix(offset_scanline); const pen_t *pens = rd.pens; int prioverchar = rd.prioverchar; @@ -3540,7 +3609,8 @@ void namcos23_renderer::render_scanline(s32 scanline, const extent_t& extent, co u32 tx = u32(u * ooz); u32 ty = u32(v * ooz); u8 pen = 0; - if (!Stencil || !stencil_lookup(tx, ty)) + const u32 view_x = x + clip_left; + if ((!Stencil || !stencil_lookup(tx, ty)) && view_x >= clip_left && view_x < clip_right) { ty += rd.tbase; u32 tex_rgb = texture_lookup(pens, penshift, penmask, tx, ty, pen); @@ -3574,7 +3644,7 @@ void namcos23_renderer::render_scanline(s32 scanline, const extent_t& extent, co s32 dr, dg, db; if (Blend || (PolyAlpha && (alpha_enabled || pen == alpha_pen))) { - drgb = dest[x]; + drgb = dest[view_x]; dr = s32((drgb >> 16) & 0xff); dg = s32((drgb >> 8) & 0xff); db = s32(drgb & 0xff); @@ -3593,8 +3663,8 @@ void namcos23_renderer::render_scanline(s32 scanline, const extent_t& extent, co b = ((b * 0x80) + (db * 0x80)) >> 8; } - dest[x] = 0xff000000 | (r << 16) | (g << 8) | b; - primap[x] = (primap[x] & ~1) | prioverchar; + dest[view_x] = 0xff000000 | (r << 16) | (g << 8) | b; + primap[view_x] = (primap[view_x] & ~1) | prioverchar; } z += dz; @@ -3622,15 +3692,15 @@ void namcos23_state::render_apply_matrot(s32 xi, s32 yi, s32 zi, const namcos23_ z = (re->model.m[6] * xi + re->model.m[7] * yi + re->model.m[8] * zi) / 4194304.f; } -void namcos23_state::render_project(poly_vertex &pv) +void namcos23_state::render_project(poly_vertex &pv, const s16 vp_size_x, const s16 vp_size_y, const float vp_fov) { // 768 validated by the title screen size on tc2: // texture is 640x480, x range is 3.125, y range is 2.34375, z is 3.75 // 640/(3.125/3.75) = 768 // 480/(2.34375/3.75) = 768 - pv.x = 320 + m_proj_matrix[23]*pv.x; - pv.y = 240 - m_proj_matrix[23]*pv.y; + pv.x = (float)vp_size_x + vp_fov * pv.x; + pv.y = (float)vp_size_y - vp_fov * pv.y; pv.p[0] = 1.0f / pv.p[0]; } @@ -3695,7 +3765,9 @@ void namcos23_state::render_direct_poly(const namcos23_render_entry *re) zsort = std::clamp(zsort, 0, 0x1fffff); zsort |= (absolute_priority << 21); p->zkey = zsort; + p->index = render.poly_count; + p->rd.type = re->type; p->rd.stencil_enabled = false; p->rd.pens = m_palette->pens() + (re->direct.d[2] & 0x7f00); p->rd.direct = true; @@ -3709,6 +3781,10 @@ void namcos23_state::render_direct_poly(const namcos23_render_entry *re) p->rd.cz_value = (re->direct.d[3] >> 2) & 0x1fff; p->rd.cz_type = re->direct.d[3] & 3; p->rd.prioverchar = ((p->rd.cmode & 7) == 1) ? 7 : 0; + p->rd.vp_size_x = re->vp_size_x; + p->rd.vp_size_y = re->vp_size_y; + p->rd.vp_offset_x = re->vp_offset_x; + p->rd.vp_offset_y = re->vp_offset_y; p->rd.fogfactor = 0; p->rd.fadefactor = 0xff; @@ -3736,7 +3812,6 @@ void namcos23_state::render_direct_poly(const namcos23_render_entry *re) p->rd.alpha_inv = 0x100 - p->rd.alpha; p->rd.alpha_enabled = ((re->direct.d[2] >> 8) & 0x7f) != re->poly_alpha_color; p->rd.poly_alpha_pen = re->poly_alpha_pen; - p->rd.type = re->type; // blend p->rd.blend_enabled = false; @@ -3802,6 +3877,8 @@ void gorgon_state::render_sprite_tile(u32 code_offset, const namcos23_render_ent p->rd.pens = m_palette->pens() + gfx->granularity() * (sprite.color & 0x7f); p->zkey = sprite.zcoord; + p->index = render.poly_count; + p->rd.sprite = true; p->rd.immediate = false; p->rd.shade_enabled = false; @@ -3879,7 +3956,7 @@ void namcos23_state::render_immediate(const namcos23_render_entry *re) if (z < minz) minz = z; - render_project(p->pv[i]); + render_project(p->pv[i], re->vp_size_x, re->vp_size_y, re->vp_fov); float w = p->pv[i].p[0]; p->pv[i].p[1] *= w; @@ -3901,6 +3978,8 @@ void namcos23_state::render_immediate(const namcos23_render_entry *re) } p->zkey = zsort | (absolute_priority << 21); + p->index = render.poly_count; + p->rd.stencil_enabled = stencil_enabled; p->rd.pens = m_palette->pens() + (re->immediate.pal & 0x7f00); p->rd.rgb = 0x00ffffff; @@ -3910,6 +3989,10 @@ void namcos23_state::render_immediate(const namcos23_render_entry *re) p->rd.shade_enabled = true; p->rd.h = h; p->rd.type = type; + p->rd.vp_size_x = re->vp_size_x; + p->rd.vp_size_y = re->vp_size_y; + p->rd.vp_offset_x = re->vp_offset_x; + p->rd.vp_offset_y = re->vp_offset_y; p->rd.tbase = 0; // global fade @@ -4112,6 +4195,14 @@ void namcos23_state::render_model(const namcos23_render_entry *re) continue; } } + + if (re->mirror_x) + { + pv[0].x *= -1.0f; + pv[1].x *= -1.0f; + pv[2].x *= -1.0f; + pv[3].x *= -1.0f; + } } else { @@ -4142,7 +4233,7 @@ void namcos23_state::render_model(const namcos23_render_entry *re) if (z < minz) minz = z; - render_project(p->pv[i]); + render_project(p->pv[i], re->vp_size_x, re->vp_size_y, re->vp_fov); float w = p->pv[i].p[0]; p->pv[i].p[1] *= w; @@ -4157,7 +4248,19 @@ void namcos23_state::render_model(const namcos23_render_entry *re) continue; } - int zsort = 0.5f * (minz + maxz) + 0.5f; + int zsort = 0; + switch (h & 0x300) + { + case 0x000: + zsort = minz + 0.5f; + break; + case 0x100: + zsort = maxz + 0.5f; + break; + default: + zsort = 0.5f * (minz + maxz) + 0.5f; + break; + } if (zsort > 0x1fffff) zsort = 0x1fffff; int absolute_priority = re->absolute_priority & 7; @@ -4172,7 +4275,9 @@ void namcos23_state::render_model(const namcos23_render_entry *re) zsort = std::clamp(zsort, 0, 0x1fffff); zsort |= (absolute_priority << 21); p->zkey = zsort; + p->index = render.poly_count; + p->rd.type = re->type; p->rd.stencil_enabled = stencil_enabled; p->rd.pens = m_palette->pens() + (color << 8); p->rd.rgb = (alpha << 24) | 0x00ffffff; @@ -4187,7 +4292,10 @@ void namcos23_state::render_model(const namcos23_render_entry *re) p->rd.cmode = cmode; p->rd.cz_value = 0; p->rd.cz_type = 0; - p->rd.type = re->type; + p->rd.vp_size_x = re->vp_size_x; + p->rd.vp_size_y = re->vp_size_y; + p->rd.vp_offset_x = re->vp_offset_x; + p->rd.vp_offset_y = re->vp_offset_y; p->rd.fogfactor = 0; p->rd.fadefactor = 0xff; @@ -4229,7 +4337,15 @@ static int render_poly_compare(const void *i1, const void *i2) const namcos23_poly_entry *p1 = *(const namcos23_poly_entry **)i1; const namcos23_poly_entry *p2 = *(const namcos23_poly_entry **)i2; - return p1->zkey <= p2->zkey ? 1 : p1->zkey > p2->zkey ? -1 : 0; + if (p1->zkey < p2->zkey) + return 1; + if (p1->zkey > p2->zkey) + return -1; + if (p1->index < p2->index) + return -1; + if (p1->index > p2->index) + return 1; + return 0; } #define RENDER_SCANLINE_ENTRY(stencil, shade, polyfade, colorfade, blend, polyalpha) \ @@ -4380,6 +4496,11 @@ void gorgon_state::render_run(screen_device &screen, bitmap_rgb32 &bitmap) re->screen_fade_b = m_c404.screen_fade_b; re->screen_fade_factor = m_c404.screen_fade_factor; re->fade_flags = m_c404.fade_flags; + re->vp_size_x = m_vp_size_x; + re->vp_size_y = m_vp_size_y; + re->vp_offset_x = m_vp_offset_x; + re->vp_offset_y = m_vp_offset_y; + re->vp_fov = m_clip_data[23]; re->absolute_priority = m_absolute_priority; re->model_blend_factor = 0; re->tx = 0; @@ -5500,6 +5621,11 @@ void namcos23_state::direct_buf_w(offs_t offset, u16 data, u16 mem_mask) re->model_blend_factor = 0; re->tx = 0; re->ty = 0; + re->vp_size_x = 320; + re->vp_size_y = 240; + re->vp_offset_x = 0; + re->vp_offset_y = 0; + re->vp_fov = 320.f; memcpy(re->direct.d, m_c435.direct_buf, sizeof(m_c435.direct_buf)); render.count[render.cur]++; @@ -6351,8 +6477,8 @@ void namcos23_state::machine_start() save_item(NAME(m_c435.spritedata)); save_item(NAME(m_ptrom_limit)); - save_item(NAME(m_proj_matrix)); - save_item(NAME(m_proj_matrix_line)); + save_item(NAME(m_clip_data)); + save_item(NAME(m_clip_data_line)); save_item(NAME(m_absolute_priority)); save_item(NAME(m_tx)); @@ -6431,8 +6557,8 @@ void namcos23_state::machine_reset() m_model_blend_factor = 0x4000; m_light_power = 0; m_light_ambient = 0; - memset(m_proj_matrix, 0, sizeof(m_proj_matrix)); - m_proj_matrix_line = 0; + memset(m_clip_data, 0, sizeof(m_clip_data)); + m_clip_data_line = 0; for (int i = 0; i < 256; i++) { From 443aa57c761aee60fc187288161b6b14398fb866 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 5 Mar 2026 18:14:39 +0100 Subject: [PATCH 143/351] battlex: set_flip_screen already marks tilemaps dirty, remove unneeded variable, backfire: add data east to title to not confuse with tecmo version --- src/mame/dataeast/backfire.cpp | 4 ++-- src/mame/handheld/hh_hmcs40.cpp | 4 ++-- src/mame/omori/battlex.cpp | 41 +++++++++++---------------------- 3 files changed, 17 insertions(+), 32 deletions(-) diff --git a/src/mame/dataeast/backfire.cpp b/src/mame/dataeast/backfire.cpp index 539853481e6..e4f83044353 100644 --- a/src/mame/dataeast/backfire.cpp +++ b/src/mame/dataeast/backfire.cpp @@ -600,5 +600,5 @@ void backfire_state::init_backfire() } // anonymous namespace -GAME( 1995, backfire, 0, backfire, backfire, backfire_state, init_backfire, ROT0, "Data East Corporation", "Backfire! (Japan, set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, backfirea, backfire, backfire, backfire, backfire_state, init_backfire, ROT0, "Data East Corporation", "Backfire! (Japan, set 2)", MACHINE_SUPPORTS_SAVE ) // defaults to wheel controls, must change to joystick to play +GAME( 1995, backfire, 0, backfire, backfire, backfire_state, init_backfire, ROT0, "Data East Corporation", "Backfire! (Data East, Japan, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, backfirea, backfire, backfire, backfire, backfire_state, init_backfire, ROT0, "Data East Corporation", "Backfire! (Data East, Japan, set 2)", MACHINE_SUPPORTS_SAVE ) // defaults to wheel controls, must change to joystick to play diff --git a/src/mame/handheld/hh_hmcs40.cpp b/src/mame/handheld/hh_hmcs40.cpp index c9094eacf68..38caa84182d 100644 --- a/src/mame/handheld/hh_hmcs40.cpp +++ b/src/mame/handheld/hh_hmcs40.cpp @@ -5391,8 +5391,8 @@ SYST( 1984, pairmtch, 0, 0, pairmtch, pairmtch, pairmtch_state, SYST( 1981, alnattck, 0, 0, alnattck, alnattck, alnattck_state, empty_init, "Coleco", "Alien Attack", MACHINE_SUPPORTS_SAVE ) SYST( 1982, cdkong, 0, 0, cdkong, cdkong, cdkong_state, empty_init, "Coleco", "Donkey Kong (Coleco)", MACHINE_SUPPORTS_SAVE ) SYST( 1982, cgalaxn, 0, 0, cgalaxn, cgalaxn, cgalaxn_state, empty_init, "Coleco", "Galaxian (Coleco)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND ) -SYST( 1981, cpacman, 0, 0, cpacman, cpacman, cpacman_state, empty_init, "Coleco", "Pac-Man (Coleco, rev. 29)", MACHINE_SUPPORTS_SAVE ) -SYST( 1981, cpacmanr1, cpacman, 0, cpacman, cpacman, cpacman_state, empty_init, "Coleco", "Pac-Man (Coleco, rev. 28)", MACHINE_SUPPORTS_SAVE ) +SYST( 1981, cpacman, 0, 0, cpacman, cpacman, cpacman_state, empty_init, "Coleco", "Pac-Man (Coleco, rev. 2)", MACHINE_SUPPORTS_SAVE ) +SYST( 1981, cpacmanr1, cpacman, 0, cpacman, cpacman, cpacman_state, empty_init, "Coleco", "Pac-Man (Coleco, rev. 1)", MACHINE_SUPPORTS_SAVE ) SYST( 1983, cmspacmn, 0, 0, cmspacmn, cmspacmn, cmspacmn_state, empty_init, "Coleco", "Ms. Pac-Man (Coleco)", MACHINE_SUPPORTS_SAVE ) SYST( 1981, egalaxn2, 0, 0, egalaxn2, egalaxn2, egalaxn2_state, empty_init, "Entex", "Galaxian 2 (Entex)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/omori/battlex.cpp b/src/mame/omori/battlex.cpp index 89ff70feeb3..245d6a167dd 100644 --- a/src/mame/omori/battlex.cpp +++ b/src/mame/omori/battlex.cpp @@ -126,7 +126,7 @@ protected: tilemap_t *m_bg_tilemap = nullptr; - void io_map(address_map &map) ATTR_COLD; + virtual void io_map(address_map &map) ATTR_COLD; private: // video-related @@ -134,8 +134,6 @@ private: uint8_t m_scroll_msb = 0U; uint8_t m_starfield_enabled = 0U; - uint8_t m_in0_b4 = 0U; - void palette_w(offs_t offset, uint8_t data); void scroll_x_lsb_w(uint8_t data); void scroll_x_msb_w(uint8_t data); @@ -163,7 +161,7 @@ protected: private: TILE_GET_INFO_MEMBER(get_bg_tile_info); - void io_map(address_map &map) ATTR_COLD; + virtual void io_map(address_map &map) override ATTR_COLD; }; @@ -206,13 +204,8 @@ void battlex_state::videoram_w(offs_t offset, uint8_t data) void battlex_state::flipscreen_w(uint8_t data) { - m_starfield_enabled = data & 0x10; - - if (flip_screen() != (data >> 7)) - { - flip_screen_set(data & 0x80); - machine().tilemap().mark_all_dirty(); - } + m_starfield_enabled = BIT(data, 4); + flip_screen_set(BIT(data, 7)); } @@ -252,8 +245,8 @@ void battlex_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect { int sx = (source[0] & 0x7f) * 2 - (source[0] & 0x80) * 2; int sy = source[3]; - int const tile = source[2] ; // dodgeman has 0x100 sprites - int const color = source[1] & 0x07; // bits 3, 4, 5 also used during explosions + int const tile = source[2]; // dodgeman has 0x100 sprites + int const color = source[1] & 0x07; // bits 3, 4, 5 also used during explosions int flipy = source[1] & 0x80; int flipx = source[1] & 0x40; @@ -268,7 +261,6 @@ void battlex_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect gfx->transpen(bitmap, cliprect, tile, color, flipx, flipy, sx, sy, 0); source += 4; } - } uint32_t battlex_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) @@ -287,18 +279,15 @@ uint32_t battlex_state::screen_update(screen_device &screen, bitmap_ind16 &bitma INTERRUPT_GEN_MEMBER(battlex_state::interrupt) { - m_in0_b4 = 1; - device.execute().set_input_line(0, ASSERT_LINE); + m_maincpu->set_input_line(0, ASSERT_LINE); } ioport_value battlex_state::in0_b4_r() { - uint32_t ret = m_in0_b4; - if (m_in0_b4) - { + ioport_value ret = m_maincpu->input_line_state(0) ? 1 : 0; + + if (!machine().side_effects_disabled()) m_maincpu->set_input_line(0, CLEAR_LINE); - m_in0_b4 = 0; - } return ret; } @@ -464,7 +453,6 @@ void battlex_state::machine_start() save_item(NAME(m_scroll_lsb)); save_item(NAME(m_scroll_msb)); save_item(NAME(m_starfield_enabled)); - save_item(NAME(m_in0_b4)); } void battlex_state::machine_reset() @@ -472,13 +460,12 @@ void battlex_state::machine_reset() m_scroll_lsb = 0; m_scroll_msb = 0; m_starfield_enabled = 0; - m_in0_b4 = 0; } void battlex_state::battlex(machine_config &config) { // basic machine hardware - Z80(config, m_maincpu, XTAL(10'000'000) / 4 ); // divider not verified + Z80(config, m_maincpu, XTAL(10'000'000) / 4); // divider not verified m_maincpu->set_addrmap(AS_PROGRAM, &battlex_state::main_map); m_maincpu->set_addrmap(AS_IO, &battlex_state::io_map); m_maincpu->set_periodic_int(FUNC(battlex_state::interrupt), attotime::from_hz(400)); // controls game speed? @@ -497,16 +484,14 @@ void battlex_state::battlex(machine_config &config) // sound hardware SPEAKER(config, "mono").front_center(); - AY8910(config, "ay1", XTAL(10'000'000) / 8).add_route(ALL_OUTPUTS, "mono", 0.40); // divider not verified + AY8910(config, "ay1", XTAL(10'000'000) / 8).add_route(ALL_OUTPUTS, "mono", 0.40); // divider not verified } void dodgeman_state::dodgeman(machine_config &config) { battlex(config); - m_maincpu->set_addrmap(AS_IO, &dodgeman_state::io_map); - - AY8910(config, "ay2", XTAL(10'000'000) / 8).add_route(ALL_OUTPUTS, "mono", 0.40); // divider not verified + AY8910(config, "ay2", XTAL(10'000'000) / 8).add_route(ALL_OUTPUTS, "mono", 0.40); // divider not verified } From c26e913f67146c0f93644f8ca4d6bb6dca83d33a Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Thu, 5 Mar 2026 18:24:21 +0100 Subject: [PATCH 144/351] - eolith/ghosteo.cpp: added default EEPROM and speedups for the touryuu sets - namco/namcos6.cpp, skeleton/fdek_h8s.cpp: added info about other games in the same medal series [Wayder] --- src/mame/eolith/ghosteo.cpp | 79 +++++++++++++++++++--------------- src/mame/namco/namcos6.cpp | 12 ++++++ src/mame/skeleton/fdek_h8s.cpp | 25 +++++++++++ 3 files changed, 82 insertions(+), 34 deletions(-) diff --git a/src/mame/eolith/ghosteo.cpp b/src/mame/eolith/ghosteo.cpp index 2a623ad1d4c..f20f028f535 100644 --- a/src/mame/eolith/ghosteo.cpp +++ b/src/mame/eolith/ghosteo.cpp @@ -1,5 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Tim Schuerewegen + /************************************************************************ Eolith Ghost Hardware driver @@ -51,9 +52,12 @@ Hopper, Ticket Counter, Prize System (Option) - Compiler : ADS, SDT -ToDo: verify QS1000 hook-up - - +TODO: +- verify QS1000 hook-up +- touryuu and clone ask for RTC setting on every boot. Probably due to missing support + of battery backup for the RTC in MAME's S3C2410 emulation. Enable logging in + devices/machine/s3c24xx.hxx to see the correct data being written, but then being lost + after reset. */ #include "emu.h" @@ -107,12 +111,13 @@ public: void touryuu(machine_config &config) ATTR_COLD; void bballoon(machine_config &config) ATTR_COLD; - void init_touryuu() ATTR_COLD; void init_bballoon() ATTR_COLD; + void init_hapytour() ATTR_COLD; + void init_touryuu() ATTR_COLD; + void init_touryuua() ATTR_COLD; protected: virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; private: required_device m_maincpu; @@ -127,7 +132,7 @@ private: optional_ioport_array<5> m_mj_input; - uint16_t m_rom_pagesize = 0; + uint16_t m_rom_pagesize = 0x210; // for complete NAND ROM dumps uint8_t m_security_count = 0; uint32_t m_bballoon_port[20]{}; @@ -148,7 +153,7 @@ private: struct nand_t m_nand; - uint32_t bballoon_speedup_r(offs_t offset, uint32_t mem_mask = ~0); + template uint32_t speedup_r(offs_t offset, uint32_t mem_mask = ~0); uint32_t touryuu_port_10000000_r(); void qs1000_p3_w(uint8_t data); @@ -247,7 +252,7 @@ void ghosteo_state::s3c2410_gpio_port_w(offs_t offset, uint32_t data) // 0 -> 1 if (((data & 0x10) != 0) && ((old_value & 0x10) == 0)) { - LOGNAND( "security_count %d -> %d\n", m_security_count, m_security_count + 1); + LOGNAND("security_count %d -> %d\n", m_security_count, m_security_count + 1); m_security_count++; if (m_security_count > 7) m_security_count = 0; } @@ -396,7 +401,7 @@ uint32_t ghosteo_state::touryuu_port_10000000_r() case 0xb : data = m_mj_input[3]->read(); break; case 0xc : data = m_mj_input[4]->read(); break; } - LOGMJINPUT( "touryuu_port_10000000_r (%08X) -> %08X\n", port_g, data); + LOGMJINPUT("touryuu_port_10000000_r (%08X) -> %08X\n", port_g, data); return data; } @@ -504,7 +509,7 @@ static INPUT_PORTS_START( touryuu ) PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1 (3)") PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1 (2)") - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("1 (1)") + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_BIT( 0xffffffe0, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("10000000-09") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) @@ -546,26 +551,16 @@ static INPUT_PORTS_START( touryuu ) PORT_BIT( 0xffffff50, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END -uint32_t ghosteo_state::bballoon_speedup_r(offs_t offset, uint32_t mem_mask) + +template +uint32_t ghosteo_state::speedup_r(offs_t offset, uint32_t mem_mask) { uint32_t const ret = m_s3c2410->s3c24xx_lcd_r(offset + 0x10 / 4, mem_mask); + int const pc = m_maincpu->pc(); - int pc = m_maincpu->pc(); - - // these are vblank waits - if (pc == 0x3001c0e4 || pc == 0x3001c0d8) - { - // BnB Arcade + if (pc == Pc1 || pc == Pc2) m_maincpu->spin_until_time(attotime::from_usec(20)); - } - else if (pc == 0x3002b580 || pc == 0x3002b550) - { - // Happy Tour - m_maincpu->spin_until_time(attotime::from_usec(20)); - } - //else - // printf("speedup %08x %08x\n", pc, ret); return ret; } @@ -587,10 +582,6 @@ void ghosteo_state::machine_start() save_item(NAME(m_nand.addr_load_ptr)); } -void ghosteo_state::machine_reset() -{ - m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013,read32s_delegate(*this, FUNC(ghosteo_state::bballoon_speedup_r))); -} void ghosteo_state::ghosteo(machine_config &config) { @@ -695,7 +686,7 @@ Notes: QS1000 - QDSP QS1000 AdMOS 9638R, Wavetable Audio chip, clock input of 24.000MHz (QFP100) QS1001A - QDSP QS1001A 512k x8 MaskROM (SOP32) - qs1001a.u17 was not dumped from this PCB, but is a standard sample rom found on many Eolith games + qs1001a.u17 was not dumped from this PCB, but is a standard sample ROM found on many Eolith games see eolith.cpp and vegaeo.cpp drivers */ @@ -738,6 +729,9 @@ ROM_START( touryuu ) // Same hardware: GHOST Ver1.1 2003.03.28 ROM_REGION( 0x1000000, "qs1000", 0 ) ROM_LOAD( "8m.eprom_c.s_f8b1h.u16", 0x000000, 0x100000, CRC(238a85ab) SHA1(ddd79429c0c1e67fcbca1e4ebded97ea46229f0b) ) // QDSP samples (SFX) ROM_LOAD( "qs1001a.u17", 0x200000, 0x080000, CRC(d13c6407) SHA1(57b14f97c7d4f9b5d9745d3571a0b7115fbe3176) ) // QDSP wavetable ROM + + ROM_REGION( 0x800, "i2cmem", 0 ) + ROM_LOAD( "m24cl16", 0x000, 0x800, CRC(c9da568a) SHA1(43ce4cd910ae6aec8cb19392bea4b2ce8600fec6) ) ROM_END ROM_START( touryuua ) @@ -751,16 +745,33 @@ ROM_START( touryuua ) ROM_REGION( 0x1000000, "qs1000", 0 ) ROM_LOAD( "8m.eprom_c.s_f8b1h.u16", 0x000000, 0x100000, CRC(238a85ab) SHA1(ddd79429c0c1e67fcbca1e4ebded97ea46229f0b) ) // QDSP samples (SFX) ROM_LOAD( "qs1001a.u17", 0x200000, 0x080000, CRC(d13c6407) SHA1(57b14f97c7d4f9b5d9745d3571a0b7115fbe3176) ) // QDSP wavetable ROM + + ROM_REGION( 0x800, "i2cmem", 0 ) + ROM_LOAD( "m24cl16", 0x000, 0x800, CRC(c9da568a) SHA1(43ce4cd910ae6aec8cb19392bea4b2ce8600fec6) ) ROM_END void ghosteo_state::init_bballoon() { m_rom_pagesize = 0x200; // extra data is missing from the FLASH dumps and needs to be simulated + + m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013, emu::rw_delegate(*this, NAME((&ghosteo_state::speedup_r<0x3001c0e4, 0x3001c0d8>)))); +} + +void ghosteo_state::init_hapytour() +{ + m_rom_pagesize = 0x200; // extra data is missing from the FLASH dumps and needs to be simulated + + m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013, emu::rw_delegate(*this, NAME((&ghosteo_state::speedup_r<0x3002b580, 0x3002b550>)))); } void ghosteo_state::init_touryuu() { - m_rom_pagesize = 0x210; + m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013, emu::rw_delegate(*this, NAME((&ghosteo_state::speedup_r<0x30044820, 0x300447f4>)))); +} + +void ghosteo_state::init_touryuua() +{ + m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013, emu::rw_delegate(*this, NAME((&ghosteo_state::speedup_r<0x300442d0, 0x300442a4>)))); } } // anonymous namespace @@ -769,6 +780,6 @@ ALLOW_SAVE_TYPE(ghosteo_state::nand_mode_t); GAME( 2003, bballoon, 0, bballoon, bballoon, ghosteo_state, init_bballoon, ROT0, "Eolith", "BnB Arcade (V1.0005 World)", MACHINE_IMPERFECT_SOUND ) -GAME( 2005, hapytour, 0, bballoon, bballoon, ghosteo_state, init_bballoon, ROT0, "GAV Company", "Happy Tour (V1.12)", MACHINE_IMPERFECT_SOUND ) -GAME( 2005, touryuu, 0, touryuu, touryuu, ghosteo_state, init_touryuu, ROT0, "Yuki Enterprise", "Touryuumon (V1.1, Apr 14 2005)", MACHINE_IMPERFECT_SOUND ) // On first boot inputs won't work, TODO: hook-up default eeprom -GAME( 2005, touryuua, touryuu, touryuu, touryuu, ghosteo_state, init_touryuu, ROT0, "Yuki Enterprise", "Touryuumon (V1.1, Mar 11 2005)", MACHINE_IMPERFECT_SOUND ) // On first boot inputs won't work, TODO: hook-up default eeprom +GAME( 2005, hapytour, 0, bballoon, bballoon, ghosteo_state, init_hapytour, ROT0, "GAV Company", "Happy Tour (V1.12)", MACHINE_IMPERFECT_SOUND ) +GAME( 2005, touryuu, 0, touryuu, touryuu, ghosteo_state, init_touryuu, ROT0, "Yuki Enterprise", "Touryuumon (V1.1, Apr 14 2005)", MACHINE_IMPERFECT_SOUND ) +GAME( 2005, touryuua, touryuu, touryuu, touryuu, ghosteo_state, init_touryuua, ROT0, "Yuki Enterprise", "Touryuumon (V1.1, Mar 11 2005)", MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/namco/namcos6.cpp b/src/mame/namco/namcos6.cpp index c6d313103f7..b98940bd682 100644 --- a/src/mame/namco/namcos6.cpp +++ b/src/mame/namco/namcos6.cpp @@ -16,6 +16,18 @@ R4543 RTC Altera MAX EPM3128AT100-10 with KC004B sticker 2x empty spaces marked for CXD1178Q ADM3222 ARU transceiver + +List of games in the プチプチメダル (Puchi Puchi Medal) series (so probably all on this system): + +1 - ねこショット！ - Neko Shot! +2 - ぱっくんレストラン - Pakkun Restaurant +3 - わくわくかんらんしゃ - Wakuwaku Kanransha +4 - おてんきテンちゃん - Otenki Ten-chan +5 - ぶんぶんブーメラン - Bunbun Boomerang +6 - にがおえぴったんこ - Nigaoe Pittanko +7 - ハッピーおみくじ - Happy Omikuji +8 - ドキドキ！フラワー - Doki Doki! Flower +9 - きせかえスタジオ - Kisekae Studio */ diff --git a/src/mame/skeleton/fdek_h8s.cpp b/src/mame/skeleton/fdek_h8s.cpp index ddcdc6ea86d..4b0eb4f333f 100644 --- a/src/mame/skeleton/fdek_h8s.cpp +++ b/src/mame/skeleton/fdek_h8s.cpp @@ -26,6 +26,31 @@ YMZ280B-F 16CKSS4JI XTAL 3x bank of 8 switches (SW1-SW3) test push-button + +Siren Kids is part of Fuji Denshi’s (FDEK) Kids Series: + +1 - サーカスキッズ - Circus Kids +2 - でるでるキッズ - Deru Deru Kids +3 - ビンゴキッズ - Bingo Kids +4 - いただきニャンドラキッズ - Itadaki Nyandora Kids +5 - ぱくぱくキッズ - Paku Paku Kids +6 - ちゃんこキッズ - Chanko Kids +7 - たこやきキッズ - Takoyaki Kids +8 - しゅりけんキッズ - Shuriken Kids +9 - サイレンキッズ - Siren Kids + +Later titles weren't numbered anymore and weren't considered part +of the series +ドレミファキッズ - Doremi-fa Kids +バトルキッズ - Battle Kids +バーガーキッズ - Burger Kids +たいやきキッズ - Taiyaki Kids +ダブルスキッズ - Doubles Kids + +These have different mechanics: +ありんこキッズ - Arinko Kids +うずまキッズ - Uzuma Kids +くるくるキッズ - Kuru Kuru Kids */ From f3b970688582c7b94615d88d2c1d9dc7130fb3ed Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 6 Mar 2026 05:12:08 +1100 Subject: [PATCH 145/351] cpu/drcbearm64.cpp: Fixed back-end getting confused about the rounding mode on entry. --- src/devices/cpu/drcbearm64.cpp | 74 +++++++++++++++++----------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/src/devices/cpu/drcbearm64.cpp b/src/devices/cpu/drcbearm64.cpp index 2a9507cde10..379ab1c40de 100644 --- a/src/devices/cpu/drcbearm64.cpp +++ b/src/devices/cpu/drcbearm64.cpp @@ -998,14 +998,14 @@ inline void drcbe_arm64::emit_ldr_str_base_mem(a64::Assembler &a, a64::Inst::Id } void drcbe_arm64::emit_ldr_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdr, reg, reg.is_gp32() ? 2 : 3, ptr); } -void drcbe_arm64::emit_ldrb_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrb, reg, 0, ptr); } -void drcbe_arm64::emit_ldrh_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrh, reg, 1, ptr); } +void drcbe_arm64::emit_ldrb_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrb, reg.w(), 0, ptr); } +void drcbe_arm64::emit_ldrh_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrh, reg.w(), 1, ptr); } void drcbe_arm64::emit_ldrsb_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrsb, reg, 0, ptr); } void drcbe_arm64::emit_ldrsh_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrsh, reg, 1, ptr); } void drcbe_arm64::emit_ldrsw_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrsw, reg, 2, ptr); } void drcbe_arm64::emit_str_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStr, reg, reg.is_gp32() ? 2 : 3, ptr); } -void drcbe_arm64::emit_strb_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStrb, reg, 0, ptr); } -void drcbe_arm64::emit_strh_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStrh, reg, 1, ptr); } +void drcbe_arm64::emit_strb_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStrb, reg.w(), 0, ptr); } +void drcbe_arm64::emit_strh_mem(a64::Assembler &a, const a64::Gp ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStrh, reg.w(), 1, ptr); } void drcbe_arm64::emit_float_ldr_mem(a64::Assembler &a, const a64::Vec ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdr_v, reg, reg.is_vec32() ? 2 : 3, ptr); } void drcbe_arm64::emit_float_str_mem(a64::Assembler &a, const a64::Vec ®, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStr_v, reg, reg.is_vec32() ? 2 : 3, ptr); } @@ -1665,7 +1665,7 @@ drcbe_arm64::drcbe_arm64(drcuml_state &drcuml, device_t &device, drc_cache &cach a.bind(a.new_named_label("exit_point")); Label const skip = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, skip); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.msr(a64::Predicate::SysReg::kFPCR, SCRATCH_REG1); @@ -1968,7 +1968,7 @@ void drcbe_arm64::op_debug(a64::Assembler &a, const uml::instruction &inst) emit_ldr_mem(a, temp, &m_device.machine().debug_flags); a.tbz(temp, 1, done); // DEBUG_FLAG_CALL_HOOK - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here @@ -1980,7 +1980,7 @@ void drcbe_arm64::op_debug(a64::Assembler &a, const uml::instruction &inst) call_arm_addr(a, m_debug_cpu_instruction_hook.func); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); @@ -2269,7 +2269,7 @@ void drcbe_arm64::op_callc(a64::Assembler &a, const uml::instruction &inst) Label skip; emit_skip(a, inst.condition(), skip); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here @@ -2280,7 +2280,7 @@ void drcbe_arm64::op_callc(a64::Assembler &a, const uml::instruction &inst) get_imm_relative(a, TEMP_REG1, (uintptr_t)funcp.cfunc()); a.blr(TEMP_REG1); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, norestore); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); @@ -2321,7 +2321,7 @@ void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst) be_parameter srcp(*this, inst.param(0), PTYPE_MRI); a64::Gp const scratch = select_register(TEMP_REG1, inst.size()); - emit_ldrb_mem(a, TEMP_REG2.w(), &m_state.fmod); + emit_ldrb_mem(a, TEMP_REG2, &m_state.fmod); if (srcp.is_immediate()) { @@ -2339,12 +2339,12 @@ void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst) a.cmp(TEMP_REG2.w(), scratch.w()); a.b_eq(skip); - emit_ldrb_mem(a, TEMP_REG2.w(), &m_near.nominal_fmod); - emit_strb_mem(a, scratch.w(), &m_state.fmod); + emit_ldrb_mem(a, TEMP_REG2, &m_near.nominal_fmod); + emit_strb_mem(a, scratch, &m_state.fmod); a.cmp(TEMP_REG2.w(), scratch.w()); a.cset(TEMP_REG2.w(), a64::CondCode::kNE); - emit_strb_mem(a, TEMP_REG2.w(), &m_near.fmod_changed); + emit_strb_mem(a, TEMP_REG2, &m_near.fmod_changed); a.mrs(TEMP_REG2, a64::Predicate::SysReg::kFPCR); a.sub(scratch.w(), scratch.w(), 1); @@ -2363,7 +2363,7 @@ void drcbe_arm64::op_getfmod(a64::Assembler &a, const uml::instruction &inst) be_parameter dstp(*this, inst.param(0), PTYPE_MR); const a64::Gp dst = dstp.select_register(TEMP_REG1, inst.size()); - emit_ldrb_mem(a, dst.w(), &m_state.fmod); + emit_ldrb_mem(a, dst, &m_state.fmod); mov_param_reg(a, inst.size(), dstp, dst); } @@ -2500,7 +2500,7 @@ void drcbe_arm64::op_save(a64::Assembler &a, const uml::instruction &inst) a.strb(TEMP_REG2.w(), a64::Mem(membase, offsetof(drcuml_machine_state, flags))); - emit_ldrb_mem(a, TEMP_REG1.w(), &m_state.fmod); + emit_ldrb_mem(a, TEMP_REG1, &m_state.fmod); a.strb(TEMP_REG1.w(), a64::Mem(membase, offsetof(drcuml_machine_state, fmod))); emit_ldr_mem(a, TEMP_REG1.w(), &m_state.exp); @@ -2575,13 +2575,13 @@ void drcbe_arm64::op_restore(a64::Assembler &a, const uml::instruction &inst) } a.ldrb(TEMP_REG1.w(), a64::Mem(membase, offsetof(drcuml_machine_state, fmod))); - emit_ldrb_mem(a, TEMP_REG2.w(), &m_near.nominal_fmod); + emit_ldrb_mem(a, TEMP_REG2, &m_near.nominal_fmod); a.and_(TEMP_REG1.w(), TEMP_REG1.w(), 3); a.cmp(TEMP_REG2.w(), TEMP_REG1.w()); a.cset(TEMP_REG2.w(), a64::CondCode::kNE); - emit_strb_mem(a, TEMP_REG2.w(), &m_near.fmod_changed); + emit_strb_mem(a, TEMP_REG2, &m_near.fmod_changed); a.mrs(TEMP_REG2, a64::Predicate::SysReg::kFPCR); - emit_strb_mem(a, TEMP_REG1.w(), &m_state.fmod); + emit_strb_mem(a, TEMP_REG1, &m_state.fmod); a.sub(TEMP_REG1.w(), TEMP_REG1.w(), 1); a.bfi(TEMP_REG2, TEMP_REG1, 22, 2); a.msr(a64::Predicate::SysReg::kFPCR, TEMP_REG2); @@ -2615,9 +2615,9 @@ void drcbe_arm64::op_load(a64::Assembler &a, const uml::instruction &inst) // immediate index if (size == SIZE_BYTE) - emit_ldrb_mem(a, dstreg.w(), memptr); + emit_ldrb_mem(a, dstreg, memptr); else if (size == SIZE_WORD) - emit_ldrh_mem(a, dstreg.w(), memptr); + emit_ldrh_mem(a, dstreg, memptr); else if (size == SIZE_DWORD) emit_ldr_mem(a, dstreg.w(), memptr); else @@ -2714,9 +2714,9 @@ void drcbe_arm64::op_store(a64::Assembler &a, const uml::instruction &inst) mov_reg_param(a, inst.size(), srcreg, srcp); if (size == SIZE_BYTE) - emit_strb_mem(a, srcreg.w(), memptr); + emit_strb_mem(a, srcreg, memptr); else if (size == SIZE_WORD) - emit_strh_mem(a, srcreg.w(), memptr); + emit_strh_mem(a, srcreg, memptr); else if (size == SIZE_DWORD) emit_str_mem(a, srcreg.w(), memptr); else @@ -2759,7 +2759,7 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst) bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual; Label const nosave = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) @@ -2834,7 +2834,7 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst) } Label const done = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) { @@ -2843,7 +2843,7 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst) } else { - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_state.fmod); + emit_ldrb_mem(a, SCRATCH_REG1, &m_state.fmod); a.mrs(SCRATCH_REG2, a64::Predicate::SysReg::kFPCR); a.sub(SCRATCH_REG1.w(), SCRATCH_REG1.w(), 1); a.bfi(SCRATCH_REG2, SCRATCH_REG1, 22, 2); @@ -2870,7 +2870,7 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual; Label const nosave = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) @@ -2947,7 +2947,7 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) } Label const done = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); if (!have_specific || ((1 << spacesizep.size()) >= accessors.specific.native_bytes)) { @@ -2956,7 +2956,7 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst) } else { - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_state.fmod); + emit_ldrb_mem(a, SCRATCH_REG1, &m_state.fmod); a.mrs(SCRATCH_REG2, a64::Predicate::SysReg::kFPCR); a.sub(SCRATCH_REG1.w(), SCRATCH_REG1.w(), 1); a.bfi(SCRATCH_REG2, SCRATCH_REG1, 22, 2); @@ -2982,7 +2982,7 @@ void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst) bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual; Label const nosave = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here @@ -3038,7 +3038,7 @@ void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst) } Label const done = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); @@ -3064,7 +3064,7 @@ void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst) bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual; Label const nosave = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here @@ -3121,7 +3121,7 @@ void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst) } Label const done = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); @@ -5315,7 +5315,7 @@ void drcbe_arm64::op_fread(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; Label const nosave = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here @@ -5340,7 +5340,7 @@ void drcbe_arm64::op_fread(a64::Assembler &a, const uml::instruction &inst) } Label const done = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); @@ -5364,7 +5364,7 @@ void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst) auto const &accessors = m_memory_accessors[spacesizep.space()]; Label const nosave = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, nosave); emit_ldr_mem(a, SCRATCH_REG1, &m_near.saved_fpcr); a.mrs(FLAGS_REG, a64::Predicate::SysReg::kFPCR); // flags are clobbered anyway - save FP control here @@ -5388,7 +5388,7 @@ void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst) } Label const done = a.new_label(); - emit_ldrb_mem(a, SCRATCH_REG1.w(), &m_near.fmod_changed); + emit_ldrb_mem(a, SCRATCH_REG1, &m_near.fmod_changed); a.tbz(SCRATCH_REG1.w(), 0, done); a.msr(a64::Predicate::SysReg::kFPCR, FLAGS_REG); a.mov(FLAGS_REG, a64::xzr); @@ -5511,7 +5511,7 @@ void drcbe_arm64::op_ftoint(a64::Assembler &a, const uml::instruction &inst) Label done = a.new_label(); // this depends on each case being two instructions - emit_ldrb_mem(a, TEMP_REG1.w(), &m_state.fmod); + emit_ldrb_mem(a, TEMP_REG1, &m_state.fmod); a.adr(TEMP_REG2, base); a.add(TEMP_REG2, TEMP_REG2, TEMP_REG1, a64::lsl(3)); a.br(TEMP_REG2); From 8335a2403db6f82ee81dc7a0a2e44696adf56464 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 4 Mar 2026 18:02:11 +0100 Subject: [PATCH 146/351] bus/pci/trident_4dwavedx.cpp: initial hookup of an AC'97 STAC9704 device --- scripts/src/sound.lua | 12 + src/devices/bus/pci/trident_4dwavedx.cpp | 11 +- src/devices/bus/pci/trident_4dwavedx.h | 2 + src/devices/sound/ac97_stac9704.cpp | 280 +++++++++++++++++++++++ src/devices/sound/ac97_stac9704.h | 46 ++++ 5 files changed, 349 insertions(+), 2 deletions(-) create mode 100644 src/devices/sound/ac97_stac9704.cpp create mode 100644 src/devices/sound/ac97_stac9704.h diff --git a/scripts/src/sound.lua b/scripts/src/sound.lua index dcb8c8735f7..95283d41ba7 100644 --- a/scripts/src/sound.lua +++ b/scripts/src/sound.lua @@ -111,6 +111,18 @@ if SOUNDS["AC97"] then } end +--------------------------------------------------- +-- SigmaTel STAC9704 +--@src/devices/sound/ac97_stac9704.h,SOUNDS["AC97_STAC9704"] = true +--------------------------------------------------- + +if SOUNDS["AC97_STAC9704"] then + files { + MAME_DIR .. "src/devices/sound/ac97_stac9704.cpp", + MAME_DIR .. "src/devices/sound/ac97_stac9704.h", + } +end + --------------------------------------------------- -- Apple custom sound chips diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 8ab5f04ac9c..a3188c24fcf 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -27,6 +27,7 @@ DEFINE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device, "trident_4dwaved trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) + , m_ac97(*this, "ac97") , m_joy(*this, "pc_joy") { } @@ -39,8 +40,11 @@ trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, void trident_4dwavedx_device::device_add_mconfig(machine_config &config) { - // TODO: SigmaTel STAC9704T or STAC9700T // Trident suggests to use an AD1819A + // known actual configs: + // '9700 for Hoontech ST-DIGITAL 4D_NX/SoundTrack 4D Wave (with the -NX variant) + // '9704 for Addonics SV750/SIIG IC1607/GoodWell EPC-C4DWV840 + AC97_STAC9704(config, m_ac97, 12'288'000); PC_JOY(config, m_joy); } @@ -111,7 +115,7 @@ void trident_4dwavedx_device::config_map(address_map &map) m_ddma_config &= ~(3 << 1); LOG("PCI 40h: %08x & %08x\n", data, mem_mask); LOG("\tDDMA config write: address %08x Extended Address %d Slave Channel Access %d\n" - , m_ddma_config >> 4, BIT(m_ddma_config, 3), BIT(m_ddma_config, 0)); + , m_ddma_config & ~0xf, BIT(m_ddma_config, 3), BIT(m_ddma_config, 0)); }) ); // map(0x44, 0x44) Legacy I/O Base @@ -170,6 +174,9 @@ void trident_4dwavedx_device::config_map(address_map &map) void trident_4dwavedx_device::io_map(address_map &map) { + map(0x40, 0x43).rw(m_ac97, FUNC(ac97_stac9704_device::codec_write_r), FUNC(ac97_stac9704_device::codec_write_w)); + map(0x44, 0x47).rw(m_ac97, FUNC(ac97_stac9704_device::codec_read_r), FUNC(ac97_stac9704_device::codec_read_w)); + map(0x5c, 0x5f).lrw32( NAME([this] (offs_t offset) { return m_asr4 | (m_asr5 << 16) | (m_asr6 << 24); diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index caa17d9d795..368094ca9b6 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -9,6 +9,7 @@ #include "pci_slot.h" #include "bus/pc_joy/pc_joy.h" +#include "sound/ac97_stac9704.h" class trident_4dwavedx_device : public pci_card_device { @@ -37,6 +38,7 @@ private: void gameport_map(address_map &map); + required_device m_ac97; required_device m_joy; u32 m_ddma_config; diff --git a/src/devices/sound/ac97_stac9704.cpp b/src/devices/sound/ac97_stac9704.cpp new file mode 100644 index 00000000000..080594888b0 --- /dev/null +++ b/src/devices/sound/ac97_stac9704.cpp @@ -0,0 +1,280 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" +#include "ac97_stac9704.h" + +#include "speaker.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + + +DEFINE_DEVICE_TYPE(AC97_STAC9704, ac97_stac9704_device, "ac97_stac9704", "SigmaTel STAC9704 AC'97 Codec") + +ac97_stac9704_device::ac97_stac9704_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_memory_interface(mconfig, *this) +{ +} + +ac97_stac9704_device::ac97_stac9704_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ac97_stac9704_device(mconfig, AC97_STAC9704, tag, owner, clock) +{ + m_space_config = address_space_config("ac97_regs", ENDIANNESS_LITTLE, 16, 7, -1, address_map_constructor(FUNC(ac97_stac9704_device::mixer_map), this)); + m_vendor_id1 = 0x8384; + m_vendor_id2 = 0x7604; +} + +device_memory_interface::space_config_vector ac97_stac9704_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(0, &m_space_config) + }; +} + +void ac97_stac9704_device::device_start() +{ + save_item(NAME(m_index_r)); + save_item(NAME(m_index_w)); + save_item(NAME(m_data_w)); + + save_item(NAME(m_master_vol)); + save_item(NAME(m_lnlvl_vol)); + save_item(NAME(m_master_mono_vol)); + save_item(NAME(m_pc_beep_vol)); + save_item(NAME(m_phone_vol)); + save_item(NAME(m_mic_vol)); + save_item(NAME(m_linein_vol)); + save_item(NAME(m_cd_vol)); + save_item(NAME(m_video_vol)); + save_item(NAME(m_aux_vol)); + save_item(NAME(m_pcm_out_vol)); + save_item(NAME(m_record_sel)), + save_item(NAME(m_record_gain)); + save_item(NAME(m_general_purpose)); + save_item(NAME(m_3d_control)); + save_item(NAME(m_power_ctrl)); +} + +void ac97_stac9704_device::device_reset() +{ + // undefined for index and data interface + + m_master_vol = 0x8000; + m_lnlvl_vol = 0x8000; + m_master_mono_vol = 0x8000; + m_pc_beep_vol = 0; + m_phone_vol = 0x8008; + m_mic_vol = 0x8008; + m_linein_vol = 0x8808; + m_cd_vol = 0x8808; + m_video_vol = 0x8808; + m_aux_vol = 0x8808; + m_pcm_out_vol = 0x8808; + m_record_sel = 0, + m_record_gain = 0x8000; + m_general_purpose = 0; + m_3d_control = 0; + m_power_ctrl = 0x000f; +} + +// TODO: the whole thing is asynchronous, bit 15 goes high if the codec is busy +u32 ac97_stac9704_device::codec_write_r(offs_t offset, u32 mem_mask) +{ + return (m_index_w) | (m_data_w << 16) | (0 << 15); +} + +void ac97_stac9704_device::codec_write_w(offs_t offset, u32 data, u32 mem_mask) +{ + if (ACCESSING_BITS_16_31) + m_data_w = data >> 16; + + if (BIT(data, 15) && ACCESSING_BITS_0_15) + { + m_index_w = data & 0x7f; + space().write_word(m_index_w, m_data_w); + } +} + +u32 ac97_stac9704_device::codec_read_r(offs_t offset, u32 mem_mask) +{ + return (m_index_r) | (space().read_word(m_index_r) << 16) | (0 << 15); +} + +void ac97_stac9704_device::codec_read_w(offs_t offset, u32 data, u32 mem_mask) +{ + if (BIT(data, 15) && ACCESSING_BITS_0_15) + { + m_index_r = data & 0x7f; + } +} + + +void ac97_stac9704_device::mixer_map(address_map &map) +{ + map(0x00, 0x00).lrw16( + NAME([this] (offs_t offset) { + LOG("REG #00: Reset read ID\n"); + // TODO: unverified + // just bit 15 known to be low + return 0x1704; + }), + NAME([this] (offs_t offset, u16 data) { + (void)data; + LOG("REG #00: Reset issued\n"); + this->reset(); + }) + ); + map(0x02, 0x02).lrw16( + NAME([this] (offs_t offset) { + return m_master_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #02: Master Volume %04x\n", data); + m_master_vol = data & 0x9f1f; + }) + ); + map(0x04, 0x04).lrw16( + NAME([this] (offs_t offset) { + return m_lnlvl_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #04: LNLVL Volume %04x\n", data); + m_lnlvl_vol = data & 0x9f1f; + }) + ); + map(0x06, 0x06).lrw16( + NAME([this] (offs_t offset) { + return m_master_mono_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #06: Master Volume Mono %04x\n", data); + m_master_mono_vol = data & 0x901f; + }) + ); + map(0x0a, 0x0a).lrw16( + NAME([this] (offs_t offset) { + return m_pc_beep_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #0A: PC_BEEP Volume %04x\n", data); + m_pc_beep_vol = data & 0x801e; + }) + ); + map(0x0c, 0x0c).lrw16( + NAME([this] (offs_t offset) { + return m_phone_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #0C: Phone Volume %04x\n", data); + m_phone_vol = data & 0x801f; + }) + ); + map(0x0e, 0x0e).lrw16( + NAME([this] (offs_t offset) { + return m_mic_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #0E: Mic Volume %04x\n", data); + m_mic_vol = data & 0x805f; + }) + ); + map(0x10, 0x10).lrw16( + NAME([this] (offs_t offset) { + return m_linein_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #10: Line In Volume %04x\n", data); + m_linein_vol = data & 0x9f1f; + }) + ); + map(0x12, 0x12).lrw16( + NAME([this] (offs_t offset) { + return m_cd_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #12: CD Volume %04x\n", data); + m_cd_vol = data & 0x9f1f; + }) + ); + map(0x14, 0x14).lrw16( + NAME([this] (offs_t offset) { + return m_video_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #14: Video Volume %04x\n", data); + m_video_vol = data & 0x9f1f; + }) + ); + map(0x16, 0x16).lrw16( + NAME([this] (offs_t offset) { + return m_aux_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #16: AUX Volume %04x\n", data); + m_aux_vol = data & 0x9f1f; + }) + ); + map(0x18, 0x18).lrw16( + NAME([this] (offs_t offset) { + return m_pcm_out_vol; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #18: PCM Out Volume %04x\n", data); + m_pcm_out_vol = data & 0x9f1f; + }) + ); + map(0x1a, 0x1a).lrw16( + NAME([this] (offs_t offset) { + return m_record_sel; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #1A: Record Select %04x\n", data); + m_record_sel = data & 0x0707; + }) + ); + map(0x1c, 0x1c).lrw16( + NAME([this] (offs_t offset) { + return m_record_gain; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #1C: Record Gain %04x\n", data); + m_record_gain = data & 0x8f0f; + }) + ); + map(0x20, 0x20).lrw16( + NAME([this] (offs_t offset) { + return m_general_purpose; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #20: General Purpose %04x\n", data); + m_general_purpose = data & 0x2380; + }) + ); + map(0x22, 0x22).lrw16( + NAME([this] (offs_t offset) { + return m_3d_control; + }), + NAME([this] (offs_t offset, u16 data) { + // under AC97 3D Stereo Enhancement of PCI Audio Properties + LOG("REG #22: 3D Control %04x\n", data); + m_3d_control = data & 0x0003; + }) + ); + map(0x26, 0x26).lrw16( + NAME([this] (offs_t offset) { + // make REF / ANL / DAC and ADC always ready for now + return m_power_ctrl | 0xf; + }), + NAME([this] (offs_t offset, u16 data) { + LOG("REG #26: Powerdown Control %04x\n", data); + m_power_ctrl = data & 0xff00; + }) + ); + map(0x7c, 0x7c).lr16(NAME([this] () { LOG("REG #7C: Vendor ID1 read\n"); return m_vendor_id1; })); + map(0x7e, 0x7e).lr16(NAME([this] () { LOG("REG #7E: Vendor ID2 read\n"); return m_vendor_id2; })); +} + diff --git a/src/devices/sound/ac97_stac9704.h b/src/devices/sound/ac97_stac9704.h new file mode 100644 index 00000000000..3e417c7bd81 --- /dev/null +++ b/src/devices/sound/ac97_stac9704.h @@ -0,0 +1,46 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +#ifndef MAME_SOUND_AC97_STAC9704_H +#define MAME_SOUND_AC97_STAC9704_H + +#pragma once + +class ac97_stac9704_device : public device_t + , public device_memory_interface +{ +public: + ac97_stac9704_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + void codec_write_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 codec_write_r(offs_t offset, u32 mem_mask = ~0); + void codec_read_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 codec_read_r(offs_t offset, u32 mem_mask = ~0); + +protected: + ac97_stac9704_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual space_config_vector memory_space_config() const override; + +private: + address_space_config m_space_config; + + void mixer_map(address_map &map); + + u8 m_index_r, m_index_w; + u16 m_data_w; + + u16 m_master_vol, m_lnlvl_vol, m_master_mono_vol; + u16 m_pc_beep_vol, m_phone_vol, m_mic_vol, m_linein_vol, m_cd_vol; + u16 m_video_vol, m_aux_vol, m_pcm_out_vol; + u16 m_record_sel, m_record_gain; + u16 m_general_purpose, m_3d_control, m_power_ctrl; + + u16 m_vendor_id1, m_vendor_id2; +}; + +DECLARE_DEVICE_TYPE(AC97_STAC9704, ac97_stac9704_device) + + +#endif // MAME_SOUND_AC97_STAC9704_H From 8bff3ef32327d8a9a526363ae8150809ab15b1bd Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 5 Mar 2026 23:12:22 +0100 Subject: [PATCH 147/351] bus/pci/trident_4dwavedx.cpp: preliminary Wave Engine --- src/devices/bus/pci/trident_4dwavedx.cpp | 441 ++++++++++++++++++++++- src/devices/bus/pci/trident_4dwavedx.h | 108 +++++- 2 files changed, 542 insertions(+), 7 deletions(-) diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index a3188c24fcf..ae865274582 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders: +// copyright-holders: Angelo Salese /************************************************************************************************** Trident 4DWAVE-DX @@ -7,7 +7,12 @@ Trident 4DWAVE-DX AC'97 v1.x (fixed 48 kHz) TODO: -- Stub-ish, enough to install fine in win98se and nothing else; +- Fix loop repeats in wave engine (busmastering and/or actual FIFO); +- Add delta sample rate; +- Add mono, 8-bit and unsigned modes; +- Missing features in Bank A (testable in dxdiag -> Music -> Trident PCI WaveTable MIDI); +- winamp has encoding issues with negative numbers (CPU core bug?); +- Hookup wave engine output to AC'97 input; - wavetsr.com can't find a free IRQ for SB emulation under DOS; - Soundblaster, FM and MPU-401 are emulated by the 4dwave sound engine; @@ -16,6 +21,8 @@ TODO: #include "emu.h" #include "trident_4dwavedx.h" +#include "speaker.h" + #define VERBOSE (LOG_GENERAL) //#define LOG_OUTPUT_FUNC osd_printf_info @@ -23,10 +30,12 @@ TODO: DEFINE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device, "trident_4dwavedx", "Trident 4D Wave-DX sound card") +DEFINE_DEVICE_TYPE(T4DWAVE_PCM, t4dwave_pcm_device, "t4dwave_pcm", "Trident 4D Wave-DX PCM sound engine") trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : pci_card_device(mconfig, type, tag, owner, clock) + , m_pcm(*this, "pcm") , m_ac97(*this, "ac97") , m_joy(*this, "pc_joy") { @@ -46,6 +55,22 @@ void trident_4dwavedx_device::device_add_mconfig(machine_config &config) // '9704 for Addonics SV750/SIIG IC1607/GoodWell EPC-C4DWV840 AC97_STAC9704(config, m_ac97, 12'288'000); + SPEAKER(config, "speaker", 2).front(); + + T4DWAVE_PCM(config, m_pcm, 0); + m_pcm->datain_cb().set([this] (offs_t offset) { + address_space &dma_space = *get_pci_busmaster_space(); + return dma_space.read_dword(offset); + }); + m_pcm->irq_cb().set([this] (int state) { + irq_pin_w(0, state); + //irq_pin_w(0, 0); + //if (state) + // irq_pin_w(0, 1); + }); + m_pcm->add_route(0, "speaker", 0.50, 0); + m_pcm->add_route(1, "speaker", 0.50, 1); + PC_JOY(config, m_joy); } @@ -68,6 +93,7 @@ void trident_4dwavedx_device::device_start() save_item(STRUCT_MEMBER(m_interrupt_snoop, enable)); save_item(STRUCT_MEMBER(m_interrupt_snoop, vector)); + save_item(NAME(m_asr3)); save_item(NAME(m_asr4)); save_item(NAME(m_asr5)); save_item(NAME(m_asr6)); @@ -87,6 +113,7 @@ void trident_4dwavedx_device::device_reset() m_interrupt_snoop.enable = false; m_interrupt_snoop.vector = 0; + m_asr3 = 0; m_asr4 = 0; m_asr5 = 0x04; m_asr6 = 0x02; @@ -123,16 +150,16 @@ void trident_4dwavedx_device::config_map(address_map &map) // map(0x46, 0x46) Legacy Control map(0x44, 0x47).lrw32( NAME([this] (offs_t offset, u32 mem_mask) { - LOG("PCI 44h: legacy control read (mask %08x)\n", mem_mask); + LOG("PCI 44h: Legacy control read (mask %08x)\n", mem_mask); return m_legacy_control; }), NAME([this] (offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_legacy_control); - m_legacy_control &= 0x0006'03ff; + m_legacy_control &= 0x0006'07ff; LOG("PCI 44h: %08x & %08x\n", data, mem_mask); LOG("\tLegacy I/O base: %02x Legacy DMA: %02x Audio Engine Reset: %d Writable subsystem %d\n" , m_legacy_control & 0xff - , (m_legacy_control >> 8) & 3 + , (m_legacy_control >> 8) & 7 , BIT(m_legacy_control, 18) , BIT(m_legacy_control, 17) ); @@ -174,9 +201,31 @@ void trident_4dwavedx_device::config_map(address_map &map) void trident_4dwavedx_device::io_map(address_map &map) { +// map(0x00, 0x0f) Legacy DMA +// map(0x10, 0x1f) Legacy SB mapping + +// map(0x20, 0x23) Legacy MPU-401 + +// map(0x30, 0x31) Legacy Game Port +// map(0x34, 0x37) Enhanced Game Port 1 +// map(0x38, 0x3b) Enhanced Game Port 2 + map(0x40, 0x43).rw(m_ac97, FUNC(ac97_stac9704_device::codec_write_r), FUNC(ac97_stac9704_device::codec_write_w)); map(0x44, 0x47).rw(m_ac97, FUNC(ac97_stac9704_device::codec_read_r), FUNC(ac97_stac9704_device::codec_read_w)); +// map(0x48, 0x4b) AC'97 Command/Status +// map(0x50, 0x50) 4DWAVE-DX Status (r/o) +// map(0x54, 0x55) Legacy SB Frequency (r/o) +// map(0x57, 0x57) Legacy SB Time Constant (r/o) + map(0x58, 0x5b).lrw32( + NAME([this] (offs_t offset) { + return m_asr3; + }), + NAME([this] (offs_t offset, u32 data, u32 mem_mask) { + LOG("ASR3: Scratch %04x\n", data); + COMBINE_DATA(&m_asr3); + }) + ); map(0x5c, 0x5f).lrw32( NAME([this] (offs_t offset) { return m_asr4 | (m_asr5 << 16) | (m_asr6 << 24); @@ -196,10 +245,51 @@ void trident_4dwavedx_device::io_map(address_map &map) } }) ); +// map(0x60, 0x63) OPL3 Emulation Channel Key on/off Trace + +// map(0x70, 0x73) Record Channel index 2 (chorus) / 1 (reverb) / 0 (mixer) +// map(0x78, 0x7b) Bank A PCI Stream Buffer Valid flags (testing only) +// map(0x7c, 0x7f) Bank B PCI Stream Buffer Valid flags (testing only) + +// map(0x80, 0xff) Wave Engine + map(0x80, 0x83).rw(m_pcm, FUNC(t4dwave_pcm_device::banka_status_r), FUNC(t4dwave_pcm_device::starta_w)); + map(0x84, 0x87).rw(m_pcm, FUNC(t4dwave_pcm_device::banka_status_r), FUNC(t4dwave_pcm_device::stopa_w)); +// map(0x88, 0x8b) DLYA +// map(0x8c, 0x8f) SIGNCSOA +// map(0x90, 0x93) CSPFA +// map(0x94, 0x97) CEBCA + map(0x98, 0x9b).rw(m_pcm, FUNC(t4dwave_pcm_device::aina_r), FUNC(t4dwave_pcm_device::aina_w)); +// map(0x9c, 0x9f) EINTA + map(0xa0, 0xa3).rw(m_pcm, FUNC(t4dwave_pcm_device::global_control_r), FUNC(t4dwave_pcm_device::global_control_w)); + map(0xa4, 0xa7).rw(m_pcm, FUNC(t4dwave_pcm_device::aintena_r), FUNC(t4dwave_pcm_device::aintena_w)); + map(0xa8, 0xab).rw(m_pcm, FUNC(t4dwave_pcm_device::wavevol_r), FUNC(t4dwave_pcm_device::wavevol_w)); +// map(0xac, 0xaf) DELTAR + map(0xb0, 0xb3).r(m_pcm, FUNC(t4dwave_pcm_device::miscint_r)); + map(0xb4, 0xb7).rw(m_pcm, FUNC(t4dwave_pcm_device::bankb_status_r), FUNC(t4dwave_pcm_device::startb_w)); + map(0xb8, 0xbb).rw(m_pcm, FUNC(t4dwave_pcm_device::bankb_status_r), FUNC(t4dwave_pcm_device::stopb_w)); +// map(0xbc, 0xbf) CSPFB +// map(0xc0, 0xc3) SBBL/SBCL +// map(0xc4, 0xc7) SBE2R/SBDD/SBCTRL +// map(0xc8, 0xcb) STIMER (r/o) +// map(0xcc, 0xcd) ROM Test +// map(0xce, 0xcf) LFOB +// map(0xd0, 0xd3) Test Mixer FIFO +// map(0xd4, 0xd7) Test Mixer Accumulator + map(0xd8, 0xdb).rw(m_pcm, FUNC(t4dwave_pcm_device::ainb_r), FUNC(t4dwave_pcm_device::ainb_w)); + map(0xdc, 0xdf).rw(m_pcm, FUNC(t4dwave_pcm_device::aintenb_r), FUNC(t4dwave_pcm_device::aintenb_w)); + + map(0xe0, 0xe3).rw(m_pcm, FUNC(t4dwave_pcm_device::cso_r), FUNC(t4dwave_pcm_device::cso_w)); + map(0xe4, 0xe7).w(m_pcm, FUNC(t4dwave_pcm_device::lba_w)); + map(0xe8, 0xeb).rw(m_pcm, FUNC(t4dwave_pcm_device::eso_r), FUNC(t4dwave_pcm_device::eso_w)); +// map(0xec, 0xef) FMC/RVOL/CVOL + map(0xf0, 0xf3).rw(m_pcm, FUNC(t4dwave_pcm_device::gvsel_r), FUNC(t4dwave_pcm_device::gvsel_w)); +// map(0xf4, 0xf7) EBUF1 (bank A only) +// map(0xf8, 0xfb) EBUF2 (bank A only) } void trident_4dwavedx_device::mmio_map(address_map &map) { + map(0x00, 0xff).m(*this, FUNC(trident_4dwavedx_device::io_map)); } void trident_4dwavedx_device::gameport_map(address_map &map) @@ -240,3 +330,344 @@ void trident_4dwavedx_device::map_extra(uint64_t memory_window_start, uint64_t m #endif } + +/* + * + * 4DWAVE-DX wave engine + * + */ + +t4dwave_pcm_device::t4dwave_pcm_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_sound_interface(mconfig, *this) + , m_datain_cb(*this, 0) + , m_irq_cb(*this) +{ +} + +t4dwave_pcm_device::t4dwave_pcm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : t4dwave_pcm_device(mconfig, T4DWAVE_PCM, tag, owner, clock) +{ +} + +void t4dwave_pcm_device::device_start() +{ + m_stream = stream_alloc(0, 2, 48000 / 2); + + save_item(NAME(m_global_control)); + save_item(NAME(m_cir)); + + save_item(NAME(m_aina)); + save_item(NAME(m_aintena)); + save_item(NAME(m_bankA_keyon)); + + save_item(NAME(m_ainb)); + save_item(NAME(m_aintenb)); + save_item(NAME(m_bankB_keyon)); + + save_item(NAME(m_vol_cache)); + save_item(NAME(m_volL)); + save_item(NAME(m_volR)); + + save_item(STRUCT_MEMBER(m_channel, lba)); + save_item(STRUCT_MEMBER(m_channel, cso)); + save_item(STRUCT_MEMBER(m_channel, hso)); + save_item(STRUCT_MEMBER(m_channel, eso)); + save_item(STRUCT_MEMBER(m_channel, delta)); + save_item(STRUCT_MEMBER(m_channel, gvsel_cache)); + save_item(STRUCT_MEMBER(m_channel, gvsel)); + save_item(STRUCT_MEMBER(m_channel, pan_control)); + save_item(STRUCT_MEMBER(m_channel, pan_vol)); + save_item(STRUCT_MEMBER(m_channel, vol)); + save_item(STRUCT_MEMBER(m_channel, is_16bit)); + save_item(STRUCT_MEMBER(m_channel, is_stereo)); + save_item(STRUCT_MEMBER(m_channel, is_signed)); + save_item(STRUCT_MEMBER(m_channel, loop_enable)); + save_item(STRUCT_MEMBER(m_channel, ec_envelope)); + save_item(STRUCT_MEMBER(m_channel, pci_buf)); +} + +void t4dwave_pcm_device::device_reset() +{ + m_global_control = 0; + m_cir = 0; + + m_aina = m_aintena = m_ainb = m_aintenb = 0; + m_bankA_keyon = m_bankB_keyon = 0; +} + +// START_A & STOP_A +u32 t4dwave_pcm_device::banka_status_r(offs_t offset) +{ + return m_bankA_keyon; +} + +u32 t4dwave_pcm_device::aina_r(offs_t offset) +{ + return m_aina; +} + +void t4dwave_pcm_device::aina_w(offs_t offset, u32 data, u32 mem_mask) +{ + m_aina &= ~data; + update_irq_state(); +} + +void t4dwave_pcm_device::starta_w(offs_t offset, u32 data, u32 mem_mask) +{ + m_bankA_keyon |= data; + m_stream->update(); +} + +void t4dwave_pcm_device::stopa_w(offs_t offset, u32 data, u32 mem_mask) +{ + m_bankA_keyon &= ~data; + m_stream->update(); +} + +u32 t4dwave_pcm_device::aintena_r(offs_t offset) +{ + return m_aintena; +} + +void t4dwave_pcm_device::aintena_w(offs_t offset, u32 data, u32 mem_mask) +{ + COMBINE_DATA(&m_aintena); + update_irq_state(); +} + +u32 t4dwave_pcm_device::wavevol_r(offs_t offset) +{ + return m_vol_cache; +} + +// 6.2 format +void t4dwave_pcm_device::wavevol_w(offs_t offset, u32 data, u32 mem_mask) +{ + COMBINE_DATA(&m_vol_cache); + m_volR[MUSICVOL] = 0x3f - ((m_vol_cache >> 26) & 0x3f); + m_volL[MUSICVOL] = 0x3f - ((m_vol_cache >> 18) & 0x3f); + m_volR[WAVEVOL] = 0x3f - ((m_vol_cache >> 10) & 0x3f); + m_volL[WAVEVOL] = 0x3f - ((m_vol_cache >> 2) & 0x3f); +} + +// LFO_A & GC & CIR +u32 t4dwave_pcm_device::global_control_r(offs_t offset) +{ + return m_global_control; +} + +void t4dwave_pcm_device::global_control_w(offs_t offset, u32 data, u32 mem_mask) +{ + COMBINE_DATA(&m_global_control); + + LOG("WAVE A0: Global Control %08x & %08x\n", data, mem_mask); + + if (ACCESSING_BITS_0_7) + m_cir = data & 0x3f; +} + +u32 t4dwave_pcm_device::miscint_r(offs_t offset) +{ + u32 res = 0; + if ((m_aina & m_aintena) || (m_ainb & m_aintenb)) + res |= (1 << 5); + return res; +} + +// START_B / STOP_B +u32 t4dwave_pcm_device::bankb_status_r(offs_t offset) +{ + return m_bankB_keyon; +} + +void t4dwave_pcm_device::startb_w(offs_t offset, u32 data, u32 mem_mask) +{ + m_bankB_keyon |= data; + m_stream->update(); +} + +void t4dwave_pcm_device::stopb_w(offs_t offset, u32 data, u32 mem_mask) +{ + m_bankB_keyon &= ~data; + m_stream->update(); +} + +u32 t4dwave_pcm_device::ainb_r(offs_t offset) +{ + return m_ainb; +} + +void t4dwave_pcm_device::ainb_w(offs_t offset, u32 data, u32 mem_mask) +{ + m_ainb &= ~data; + update_irq_state(); +} + +u32 t4dwave_pcm_device::aintenb_r(offs_t offset) +{ + return m_aintenb; +} + +void t4dwave_pcm_device::aintenb_w(offs_t offset, u32 data, u32 mem_mask) +{ + COMBINE_DATA(&m_aintenb); + update_irq_state(); +} + +u32 t4dwave_pcm_device::cso_r(offs_t offset) +{ + channel_t &channel = m_channel[m_cir]; + + if (!machine().side_effects_disabled()) + { + //printf("%d: %08x\n", m_cir, channel.cso); + m_stream->update(); + } + return (channel.cso >> 2) << 16; +} + +void t4dwave_pcm_device::cso_w(offs_t offset, u32 data, u32 mem_mask) +{ + channel_t &channel = m_channel[m_cir]; + + if (ACCESSING_BITS_16_31) + channel.cso = (data >> 16) << 2; +} + +void t4dwave_pcm_device::lba_w(offs_t offset, u32 data, u32 mem_mask) +{ + channel_t &channel = m_channel[m_cir]; + + COMBINE_DATA(&channel.lba); + // bit 31-30 are for PCI Stream Buffer address pointer, set by HW + channel.lba &= 0x3fff'ffff; + channel.pci_buf = 0; + m_stream->update(); +} + +u32 t4dwave_pcm_device::eso_r(offs_t offset) +{ + channel_t &channel = m_channel[m_cir]; + + return ((channel.eso >> 2) << 16) | (channel.delta & 0xffff); +} + +void t4dwave_pcm_device::eso_w(offs_t offset, u32 data, u32 mem_mask) +{ + channel_t &channel = m_channel[m_cir]; + + if (ACCESSING_BITS_16_31) + { + channel.eso = ((data >> 16) + 1) << 2; + channel.hso = channel.eso >> 1; + } + if (ACCESSING_BITS_0_15) + channel.delta = data & 0xffff; + m_stream->update(); +} + +u32 t4dwave_pcm_device::gvsel_r(offs_t offset) +{ + return m_channel[m_cir].gvsel_cache; +} + +void t4dwave_pcm_device::gvsel_w(offs_t offset, u32 data, u32 mem_mask) +{ + channel_t &channel = m_channel[m_cir]; + COMBINE_DATA(&channel.gvsel_cache); + + channel.gvsel = !!BIT(channel.gvsel_cache, 31); + channel.pan_control = !!BIT(channel.gvsel_cache, 30); + channel.pan_vol = (channel.gvsel_cache >> 24) & 0x3f; + channel.vol = (channel.gvsel_cache >> 16) & 0xff; + channel.is_16bit = !!BIT(channel.gvsel_cache, 15); + channel.is_stereo = !!BIT(channel.gvsel_cache, 14); + channel.is_signed = !!BIT(channel.gvsel_cache, 13); + channel.loop_enable = !!BIT(channel.gvsel_cache, 12); + channel.ec_envelope = channel.gvsel_cache & 0xfff; + + m_stream->update(); +} + +/* + * IRQ + */ + +void t4dwave_pcm_device::update_irq_state() +{ + //printf("%08x & %08x\n", m_ainb, m_aintenb); + m_irq_cb(((m_aina & m_aintena) || (m_ainb & m_aintenb)) ? 1 : 0); +} + +/* + * Sound Stream + */ + +void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) +{ + if (!m_bankA_keyon && !m_bankB_keyon) + return; + + int ch; + + for (ch = 0; ch < 64; ch ++) + { + channel_t &channel = m_channel[ch]; + + const bool is_bankB = !!BIT(ch, 5); + const u8 chB = ch - 32; + if ((!is_bankB && !BIT(m_bankA_keyon, ch)) || (is_bankB && !BIT(m_bankB_keyon, chB)) || channel.cso >= channel.eso) + continue; + + s16 left = 0, right = 0; + + popmessage("%d: %08x -> %04x %04x delta %04x |16-bit %d sign %d stereo %d| control: %08x %d", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo, m_global_control, stream.samples()); + + for (int sampindex = 0; sampindex < stream.samples(); sampindex++) + { + u32 sample_data = m_datain_cb(channel.lba + channel.cso); + + left = (s16)(sample_data >> 16); + right = (s16)(sample_data & 0xffff); + + stream.add_int(0, sampindex, left * m_volL[channel.gvsel], 32768 << 6); + stream.add_int(1, sampindex, right * m_volR[channel.gvsel], 32768 << 6); + + channel.cso += 4; + if (channel.cso >= channel.hso * 4) + { + // MIDLP_IE + if (BIT(m_global_control, 13)) + { + if (is_bankB) + m_ainb |= 1 << chB; + else + m_aina |= 1 << ch; + update_irq_state(); + } + } + if (channel.cso >= channel.eso) + { + channel.cso = 0; + // ENDLP_IE + if (BIT(m_global_control, 12)) + { + if (is_bankB) + m_ainb |= 1 << chB; + else + m_aina |= 1 << ch; + update_irq_state(); + } + if (!channel.loop_enable) + { + if (is_bankB) + m_bankB_keyon &= ~(1 << chB); + else + m_bankA_keyon &= ~(1 << ch); + continue; + } + } + } + } +} diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index 368094ca9b6..a7a076df3e2 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders: +// copyright-holders: Angelo Salese #ifndef MAME_BUS_PCI_TRIDENT_4DWAVEDX_H #define MAME_BUS_PCI_TRIDENT_4DWAVEDX_H @@ -11,12 +11,14 @@ #include "bus/pc_joy/pc_joy.h" #include "sound/ac97_stac9704.h" +class t4dwave_pcm_device; + class trident_4dwavedx_device : public pci_card_device { public: trident_4dwavedx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - static constexpr feature_type unemulated_features() { return feature::SOUND; } + static constexpr feature_type imperfect_features() { return feature::SOUND; } protected: trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -38,6 +40,7 @@ private: void gameport_map(address_map &map); + required_device m_pcm; required_device m_ac97; required_device m_joy; @@ -50,9 +53,110 @@ private: u8 m_power_state; + u32 m_asr3; u8 m_asr4, m_asr5, m_asr6; }; +class t4dwave_pcm_device : public device_t + , public device_sound_interface +{ +public: + t4dwave_pcm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + auto datain_cb() { return m_datain_cb.bind(); } + auto irq_cb() { return m_irq_cb.bind(); } + + u32 banka_status_r(offs_t offset); + void starta_w(offs_t offset, u32 data, u32 mem_mask = ~0); + void stopa_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 aina_r(offs_t offset); + void aina_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 aintena_r(offs_t offset); + void aintena_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 wavevol_r(offs_t offset); + void wavevol_w(offs_t offset, u32 data, u32 mem_mask = ~0); + + u32 global_control_r(offs_t offset); + void global_control_w(offs_t offset, u32 data, u32 mem_mask = ~0); + + u32 miscint_r(offs_t offset); + + u32 bankb_status_r(offs_t offset); + void startb_w(offs_t offset, u32 data, u32 mem_mask = ~0); + void stopb_w(offs_t offset, u32 data, u32 mem_mask = ~0); + + u32 ainb_r(offs_t offset); + void ainb_w(offs_t offset, u32 data, u32 mem_mask = ~0); + + u32 aintenb_r(offs_t offset); + void aintenb_w(offs_t offset, u32 data, u32 mem_mask = ~0); + + u32 cso_r(offs_t offset); + void cso_w(offs_t offset, u32 data, u32 mem_mask = ~0); + //u32 lba_r(offs_t offset); + void lba_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 eso_r(offs_t offset); + void eso_w(offs_t offset, u32 data, u32 mem_mask = ~0); + + u32 gvsel_r(offs_t offset); + void gvsel_w(offs_t offset, u32 data, u32 mem_mask = ~0); + +protected: + t4dwave_pcm_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void sound_stream_update(sound_stream &stream) override; +private: + sound_stream *m_stream; + + devcb_read32 m_datain_cb; + devcb_write_line m_irq_cb; + + struct channel_t { + u32 lba; + u32 cso; // current sample pointer + u32 hso; // half trigger irq + u32 eso; // end trigger irq + s16 delta; + + u32 gvsel_cache; + bool gvsel; + bool pan_control; + u8 pan_vol; + u8 vol; + bool is_16bit; + bool is_stereo; + bool is_signed; + bool loop_enable; + u16 ec_envelope; + u8 pci_buf; + }; + + u32 m_global_control; + u8 m_cir; + + u32 m_aina, m_aintena; + u32 m_bankA_keyon; + + u32 m_ainb, m_aintenb; + u32 m_bankB_keyon; + + enum { + MUSICVOL = 0, + WAVEVOL = 1 + }; + + u32 m_vol_cache; + u8 m_volL[2], m_volR[2]; + + channel_t m_channel[64]; + + void update_irq_state(); +}; + DECLARE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device) +DECLARE_DEVICE_TYPE(T4DWAVE_PCM, t4dwave_pcm_device) #endif // MAME_BUS_PCI_TRIDENT_4DWAVEDX_H From 0af5d49657f0328d693c9bbfffdc9765d682e296 Mon Sep 17 00:00:00 2001 From: Matthew Daniels <108370479+gm-matthew@users.noreply.github.com> Date: Fri, 6 Mar 2026 04:33:23 +0000 Subject: [PATCH 148/351] cpu/sharc: Implemented fixed point clip and saturating arithmetic in interpreter. (#15055) * Corrected logic for generating carry/overflow flags in add-with-carry and subtract-with-borrow operations. * Corrected floating point clip calculation for Fx < 0. * Implemented the LT, LE, GE and GT conditions properly. --- src/devices/cpu/sharc/compute.hxx | 92 ++++++++++++++++++------------ src/devices/cpu/sharc/sharc.h | 1 + src/devices/cpu/sharc/sharcops.hxx | 21 +++---- 3 files changed, 67 insertions(+), 47 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 36a7db1a9b5..91bae8e04c6 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -3,6 +3,7 @@ /* compute operations */ #include +#include #define CLEAR_ALU_FLAGS() do { m_core->astat &= ~(AZ|AN|AV|AC|AS|AI); } while (false) @@ -21,6 +22,9 @@ /* TODO: MU needs 80-bit result */ #define SET_FLAG_MU(r) do { m_core->astat |= (((uint32_t((r) >> 32) == 0) && (uint32_t(r)) != 0) ? MU : 0); } while (false) +// saturate overflowed result +inline void SATURATE(uint32_t &r) { r = uint32_t((int32_t(r) < 0) ? std::numeric_limits::max() : std::numeric_limits::min()); } + constexpr bool IS_FLOAT_ZERO(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == 0; } constexpr bool IS_FLOAT_DENORMAL(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == 0) && ((r & FLOAT_MANTISSA_MASK) != 0); } constexpr bool IS_FLOAT_NAN(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK) && ((r & FLOAT_MANTISSA_MASK) != 0); } @@ -111,14 +115,16 @@ void adsp21062_device::compute_add(int rn, int rx, int ry) { uint32_t r = REG(rx) + REG(ry); - if (m_core->mode1 & MODE1_ALUSAT) - fatalerror("SHARC: compute_add: ALU saturation not implemented!\n"); - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); SET_FLAG_AV_ADD(r, REG(rx), REG(ry)); SET_FLAG_AC_ADD(r, REG(rx), REG(ry)); + + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + REG(rn) = r; m_core->astat &= ~AF; @@ -129,14 +135,16 @@ void adsp21062_device::compute_sub(int rn, int rx, int ry) { uint32_t r = REG(rx) - REG(ry); - if (m_core->mode1 & MODE1_ALUSAT) - fatalerror("SHARC: compute_sub: ALU saturation not implemented!\n"); - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); SET_FLAG_AV_SUB(r, REG(rx), REG(ry)); SET_FLAG_AC_SUB(r, REG(rx), REG(ry)); + + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + REG(rn) = r; m_core->astat &= ~AF; @@ -148,14 +156,18 @@ void adsp21062_device::compute_add_ci(int rn, int rx, int ry) int c = (m_core->astat & AC) ? 1 : 0; uint32_t r = REG(rx) + REG(ry) + c; - if (m_core->mode1 & MODE1_ALUSAT) - fatalerror("SHARC: compute_add_ci: ALU saturation not implemented!\n"); - CLEAR_ALU_FLAGS(); + SET_FLAG_AV_ADD(r, REG(rx), REG(ry)); + SET_FLAG_AC_ADD(r, REG(rx), REG(ry)); + if (c == 1 && REG(ry) == 0xffffffff) + m_core->astat |= AC; + + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + SET_FLAG_AN(r); SET_FLAG_AZ(r); - SET_FLAG_AV_ADD(r, REG(rx), REG(ry)+c); - SET_FLAG_AC_ADD(r, REG(rx), REG(ry)+c); + REG(rn) = r; m_core->astat &= ~AF; @@ -167,14 +179,18 @@ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) int c = (m_core->astat & AC) ? 1 : 0; uint32_t r = REG(rx) - REG(ry) + c - 1; - if (m_core->mode1 & MODE1_ALUSAT) - fatalerror("SHARC: compute_sub_ci: ALU saturation not implemented!\n"); - CLEAR_ALU_FLAGS(); + SET_FLAG_AV_SUB(r, REG(rx), REG(ry)); + SET_FLAG_AC_SUB(r, REG(rx), REG(ry)); + if (c == 0 && REG(ry) == 0xffffffff) + m_core->astat |= AC; + + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + SET_FLAG_AN(r); SET_FLAG_AZ(r); - SET_FLAG_AV_SUB(r, REG(rx), REG(ry)+c-1); - SET_FLAG_AC_SUB(r, REG(rx), REG(ry)+c-1); + REG(rn) = r; m_core->astat &= ~AF; @@ -316,6 +332,21 @@ void adsp21062_device::compute_max(int rn, int rx, int ry) m_core->astat &= ~AF; } +/* Rn = CLIP Rx BY Ry */ +void adsp21062_device::compute_clip(int rn, int rx, int ry) +{ + const int32_t absry = sd::abs(int32_t(REG(ry))); + const uint32_t r = std::clamp(int32_t(REG(rx)), -absry, absry); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + + m_core->astat &= ~AF; +} + /* Rn = -Rx */ void adsp21062_device::compute_neg(int rn, int rx) { @@ -681,7 +712,8 @@ void adsp21062_device::compute_fabs_plus(int rn, int rx, int ry) m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; // AI m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ + // AV + m_core->astat |= (IS_FLOAT_INFINITY(r.r)) ? AV : 0; // AIS if (m_core->astat & AI) m_core->stky |= AIS; @@ -755,22 +787,8 @@ void adsp21062_device::compute_fclip(int rn, int rx, int ry) { SHARC_REG r_alu; - if (FREG(rx) < fabsf(FREG(ry))) - { - r_alu.f = FREG(rx); - } - else - { - if (FREG(rx) >= 0.0f) - { - r_alu.f = fabsf(FREG(ry)); - } - else - { - r_alu.f = -fabsf(FREG(ry)); - } - } - + const float absry = fabsf(FREG(ry)); + r_alu.f = std::clamp(FREG(rx), -absry, absry); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r_alu.r); diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 0e685452a5f..95b712eff84 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -394,6 +394,7 @@ private: inline void compute_dec(int rn, int rx); inline void compute_min(int rn, int rx, int ry); inline void compute_max(int rn, int rx, int ry); + inline void compute_clip(int rn, int rx, int ry); inline void compute_neg(int rn, int rx); inline void compute_not(int rn, int rx); inline uint32_t SCALB(SHARC_REG rx, int ry); diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index d82123eefc9..eff2b6eb846 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -60,6 +60,8 @@ } \ } +#define SHARC_COND_LT ((m_core->astat & AF) ? ((m_core->astat & AN) && !(m_core->astat & AZ)) : (bool(m_core->astat & AN) != ((m_core->astat & AV) && !(m_core->mode1 & MODE1_ALUSAT)))) +#define SHARC_COND_LE ((m_core->astat & AZ) || ((m_core->astat & AF) ? (m_core->astat & AN) : (bool(m_core->astat & AN) != ((m_core->astat & AV) && !(m_core->mode1 & MODE1_ALUSAT))))) /*****************************************************************************/ @@ -842,6 +844,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0x43: compute_not(rn, rx); break; case 0x61: compute_min(rn, rx, ry); break; case 0x62: compute_max(rn, rx, ry); break; + case 0x63: compute_clip(rn, rx, ry); break; case 0x81: compute_fadd(rn, rx, ry); break; case 0x82: compute_fsub(rn, rx, ry); break; case 0x89: compute_favg(rn, rx, ry); break; @@ -1210,12 +1213,11 @@ inline void adsp21062_device::POP_STATUS_STACK() inline int adsp21062_device::IF_CONDITION_CODE(int cond) { - // TODO: implement AF flag and correct conditions that depend on it (LT, LE, GE, GT) switch (cond) { case 0x00: return m_core->astat & AZ; /* EQ */ - case 0x01: return !(m_core->astat & AZ) && (m_core->astat & AN); /* LT */ - case 0x02: return (m_core->astat & AZ) || (m_core->astat & AN); /* LE */ + case 0x01: return SHARC_COND_LT; /* LT */ + case 0x02: return SHARC_COND_LE; /* LE */ case 0x03: return (m_core->astat & AC); /* AC */ case 0x04: return (m_core->astat & AV); /* AV */ case 0x05: return (m_core->astat & MV); /* MV */ @@ -1230,8 +1232,8 @@ inline int adsp21062_device::IF_CONDITION_CODE(int cond) case 0x0e: return 0; /* BM */ case 0x0f: return (m_core->curlcntr != 1); /* NOT LCE */ case 0x10: return !(m_core->astat & AZ); /* NOT EQUAL */ - case 0x11: return (m_core->astat & AZ) || !(m_core->astat & AN); /* GE */ - case 0x12: return !(m_core->astat & AZ) && !(m_core->astat & AN); /* GT */ + case 0x11: return !SHARC_COND_LT; /* GE */ + case 0x12: return !SHARC_COND_LE; /* GT */ case 0x13: return !(m_core->astat & AC); /* NOT AC */ case 0x14: return !(m_core->astat & AV); /* NOT AV */ case 0x15: return !(m_core->astat & MV); /* NOT MV */ @@ -1251,12 +1253,11 @@ inline int adsp21062_device::IF_CONDITION_CODE(int cond) inline int adsp21062_device::DO_CONDITION_CODE(int cond) { - // TODO: implement AF flag and correct conditions that depend on it (LT, LE, GE, GT) switch (cond) { case 0x00: return m_core->astat & AZ; /* EQ */ - case 0x01: return !(m_core->astat & AZ) && (m_core->astat & AN); /* LT */ - case 0x02: return (m_core->astat & AZ) || (m_core->astat & AN); /* LE */ + case 0x01: return SHARC_COND_LT; /* LT */ + case 0x02: return SHARC_COND_LE; /* LE */ case 0x03: return (m_core->astat & AC); /* AC */ case 0x04: return (m_core->astat & AV); /* AV */ case 0x05: return (m_core->astat & MV); /* MV */ @@ -1271,8 +1272,8 @@ inline int adsp21062_device::DO_CONDITION_CODE(int cond) case 0x0e: return 0; /* BM */ case 0x0f: return (m_core->curlcntr == 1); /* LCE */ case 0x10: return !(m_core->astat & AZ); /* NOT EQUAL */ - case 0x11: return (m_core->astat & AZ) || !(m_core->astat & AN); /* GE */ - case 0x12: return !(m_core->astat & AZ) && !(m_core->astat & AN); /* GT */ + case 0x11: return !SHARC_COND_LT; /* GE */ + case 0x12: return !SHARC_COND_LE; /* GT */ case 0x13: return !(m_core->astat & AC); /* NOT AC */ case 0x14: return !(m_core->astat & AV); /* NOT AV */ case 0x15: return !(m_core->astat & MV); /* NOT MV */ From c9ff76c7fd9496e0bac76d13ab7f122df4094a8c Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 6 Mar 2026 15:56:35 +1100 Subject: [PATCH 149/351] cpu/sharc/compute.hxx: Fixed my dumb typo. --- src/devices/cpu/sharc/compute.hxx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 91bae8e04c6..c29f6da52cc 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -335,7 +335,7 @@ void adsp21062_device::compute_max(int rn, int rx, int ry) /* Rn = CLIP Rx BY Ry */ void adsp21062_device::compute_clip(int rn, int rx, int ry) { - const int32_t absry = sd::abs(int32_t(REG(ry))); + const int32_t absry = std::abs(int32_t(REG(ry))); const uint32_t r = std::clamp(int32_t(REG(rx)), -absry, absry); CLEAR_ALU_FLAGS(); From f6c613d3ecaa25f95c178ec0724b5297c2882673 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 6 Mar 2026 17:36:38 +1100 Subject: [PATCH 150/351] cpu/drcbex64.cpp: Avoid unnecessarily changing SSE mode on SETFMOD and when leaving recompiled code. --- src/devices/cpu/drcbex64.cpp | 75 +++++++++++++++++++++++++++--------- 1 file changed, 57 insertions(+), 18 deletions(-) diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp index 620d4c88970..01d51c2623c 100644 --- a/src/devices/cpu/drcbex64.cpp +++ b/src/devices/cpu/drcbex64.cpp @@ -466,8 +466,10 @@ private: x86code * debug_log_hashjmp; // hashjmp debugging x86code * debug_log_hashjmp_fail; // hashjmp debugging - u32 ssemode; // saved SSE mode - u32 ssemodesave; // temporary location for saving + u32 ssemode; // saved SSE mode on entry + u32 ssemodesave; // temporary location for saving SSE mode across calls + u8 nominalfmod; // FMOD equivalent to SSE mode on entry or 0xff + u32 ssecontrol[4]; // copy of the sse_control array float single1; // 1.0 in single-precision double double1; // 1.0 in double-precision @@ -1038,10 +1040,10 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u // build up necessary arrays constexpr u32 sse_control[4] = { - 0xff80, // ROUND_TRUNC - 0x9f80, // ROUND_ROUND - 0xdf80, // ROUND_CEIL - 0xbf80 // ROUND_FLOOR + 0x7f80, // ROUND_TRUNC + 0x1f80, // ROUND_ROUND + 0x5f80, // ROUND_CEIL + 0x3f80 // ROUND_FLOOR }; memcpy(m_near.ssecontrol, sse_control, sizeof(m_near.ssecontrol)); m_near.single1 = 1.0F; @@ -1161,13 +1163,40 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u a.sub(rsp, 40); a.mov(MABS(&m_near.stacksave), rsp); + + // save MXCSR with flags masked out a.stmxcsr(MABS(&m_near.ssemode)); + a.mov(eax, MABS(&m_near.ssemode)); + a.and_(eax, 0xffffffc0); + a.mov(MABS(&m_near.ssemode), eax); + + // convert rounding mode from MXCSR to equivalent FMOD value + a.mov(gpd(REG_PARAM1), eax); + a.shr(gpd(REG_PARAM1), 13); + a.add(gpd(REG_PARAM1), 1); + a.and_(gpd(REG_PARAM1), 3); + a.mov(gpd(REG_PARAM3), gpd(REG_PARAM1)); + a.shr(gpd(REG_PARAM3), 1); + a.xor_(gpd(REG_PARAM1), gpd(REG_PARAM3)); + + // see if the saved MXCSR value matches what we'd set + a.mov(gpd(REG_PARAM3), ptr(rbp, gpq(REG_PARAM1), 2, offset_from_rbp(&m_near.ssecontrol[0]))); + a.cmp(eax, gpd(REG_PARAM3)); + a.mov(gpd(REG_PARAM3), 0xff); + a.cmovne(gpd(REG_PARAM1), gpd(REG_PARAM3)); + a.mov(MABS(&m_near.nominalfmod), gpb_lo(REG_PARAM1)); + a.call(gpq(REG_PARAM2)); // generate an exit point + Label const norestore = a.new_label(); m_exit = dst + a.offset(); a.bind(a.new_named_label("exit_point")); + a.movzx(gpd(REG_PARAM1), MABS(&m_state.fmod, 1)); + a.cmp(gpb_lo(REG_PARAM1), MABS(&m_near.nominalfmod)); + a.short_().je(norestore); a.ldmxcsr(MABS(&m_near.ssemode)); + a.bind(norestore); a.mov(rsp, MABS(&m_near.stacksave)); a.add(rsp, 40); a.emit_epilog(frame); @@ -2343,21 +2372,30 @@ void drcbe_x64::op_setfmod(Assembler &a, const instruction &inst) // normalize parameters be_parameter srcp(*this, inst.param(0), PTYPE_MRI); + Label const skip = a.new_label(); + if (srcp.is_immediate()) { // immediate case - int value = srcp.immediate() & 3; - a.mov(MABS(&m_state.fmod, 1), value); // mov [fmod],srcp - a.ldmxcsr(MABS(&m_near.ssecontrol[value])); // ldmxcsr fp_control[srcp] + int const value = srcp.immediate() & 3; + a.mov(eax, value); + a.cmp(MABS(&m_state.fmod), al); + a.short_().je(skip); + a.mov(MABS(&m_state.fmod), al); + a.ldmxcsr(MABS(&m_near.ssecontrol[value])); } else { // register/memory case - mov_reg_param(a, eax, srcp); // mov eax,srcp - a.and_(eax, 3); // and eax,3 - a.mov(MABS(&m_state.fmod), al); // mov [fmod],al - a.ldmxcsr(ptr(rbp, rax, 2, offset_from_rbp(&m_near.ssecontrol[0]))); // ldmxcsr fp_control[eax] + mov_reg_param(a, eax, srcp); + a.and_(eax, 3); + a.cmp(MABS(&m_state.fmod), al); + a.short_().je(skip); + a.mov(MABS(&m_state.fmod), al); + a.ldmxcsr(ptr(rbp, rax, 2, offset_from_rbp(&m_near.ssecontrol[0]))); } + + a.bind(skip); } @@ -2375,16 +2413,17 @@ void drcbe_x64::op_getfmod(Assembler &a, const instruction &inst) // normalize parameters be_parameter dstp(*this, inst.param(0), PTYPE_MR); - Mem fmod = MABS(&m_state.fmod); - fmod.set_size(1); + Mem const fmod = MABS(&m_state.fmod, 1); // fetch the current mode and store to the destination if (dstp.is_int_register()) - a.movzx(gpd(dstp.ireg()), fmod); // movzx reg,[fmod] + { + a.movzx(gpd(dstp.ireg()), fmod); + } else { - a.movzx(eax, fmod); // movzx eax,[fmod] - a.mov(MABS(dstp.memory()), eax); // mov [dstp],eax + a.movzx(eax, fmod); + a.mov(MABS(dstp.memory()), eax); } } From 93bb4549255f94d83ed599d5f80600371ad24a34 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 6 Mar 2026 11:57:06 +0100 Subject: [PATCH 151/351] sound/ac97_stac9704.cpp: basic PCM volume handling --- src/devices/bus/pci/trident_4dwavedx.cpp | 36 +++++++++++------------- src/devices/sound/ac97_stac9704.cpp | 34 ++++++++++++++++++++-- src/devices/sound/ac97_stac9704.h | 6 ++++ 3 files changed, 54 insertions(+), 22 deletions(-) diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index ae865274582..195d3903fb9 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -2,7 +2,7 @@ // copyright-holders: Angelo Salese /************************************************************************************************** -Trident 4DWAVE-DX +Trident 4DWAVE-DX / 4DWAVE-NX AC'97 v1.x (fixed 48 kHz) @@ -12,9 +12,10 @@ TODO: - Add mono, 8-bit and unsigned modes; - Missing features in Bank A (testable in dxdiag -> Music -> Trident PCI WaveTable MIDI); - winamp has encoding issues with negative numbers (CPU core bug?); -- Hookup wave engine output to AC'97 input; +- Mix-in wave engine output to AC'97 input, upsample to 48 kHz there; - wavetsr.com can't find a free IRQ for SB emulation under DOS; - Soundblaster, FM and MPU-401 are emulated by the 4dwave sound engine; +- Support for 4DWAVE-NX (minor upgrade with extra TLB, scatter-gather and SPDIF interface) **************************************************************************************************/ @@ -49,12 +50,6 @@ trident_4dwavedx_device::trident_4dwavedx_device(const machine_config &mconfig, void trident_4dwavedx_device::device_add_mconfig(machine_config &config) { - // Trident suggests to use an AD1819A - // known actual configs: - // '9700 for Hoontech ST-DIGITAL 4D_NX/SoundTrack 4D Wave (with the -NX variant) - // '9704 for Addonics SV750/SIIG IC1607/GoodWell EPC-C4DWV840 - AC97_STAC9704(config, m_ac97, 12'288'000); - SPEAKER(config, "speaker", 2).front(); T4DWAVE_PCM(config, m_pcm, 0); @@ -68,8 +63,17 @@ void trident_4dwavedx_device::device_add_mconfig(machine_config &config) //if (state) // irq_pin_w(0, 1); }); - m_pcm->add_route(0, "speaker", 0.50, 0); - m_pcm->add_route(1, "speaker", 0.50, 1); + m_pcm->add_route(0, m_ac97, 1.00, 0); + m_pcm->add_route(1, m_ac97, 1.00, 1); + + // Trident suggests to use an AD1819A + // known actual configs: + // '9700 for Hoontech ST-DIGITAL 4D_NX/SoundTrack 4D Wave (with the -NX variant) + // '9704 for Addonics SV750/SIIG IC1607/GoodWell EPC-C4DWV840 + AC97_STAC9704(config, m_ac97, 12'288'000); + m_ac97->set_pcm_tag(m_pcm); + m_ac97->add_route(0, "speaker", 1.0, 0); + m_ac97->add_route(1, "speaker", 1.0, 1); PC_JOY(config, m_joy); } @@ -352,7 +356,7 @@ t4dwave_pcm_device::t4dwave_pcm_device(const machine_config &mconfig, const char void t4dwave_pcm_device::device_start() { - m_stream = stream_alloc(0, 2, 48000 / 2); + m_stream = stream_alloc(0, 2, 44100 / 2); save_item(NAME(m_global_control)); save_item(NAME(m_cir)); @@ -520,10 +524,7 @@ u32 t4dwave_pcm_device::cso_r(offs_t offset) channel_t &channel = m_channel[m_cir]; if (!machine().side_effects_disabled()) - { - //printf("%d: %08x\n", m_cir, channel.cso); m_stream->update(); - } return (channel.cso >> 2) << 16; } @@ -596,7 +597,6 @@ void t4dwave_pcm_device::gvsel_w(offs_t offset, u32 data, u32 mem_mask) void t4dwave_pcm_device::update_irq_state() { - //printf("%08x & %08x\n", m_ainb, m_aintenb); m_irq_cb(((m_aina & m_aintena) || (m_ainb & m_aintenb)) ? 1 : 0); } @@ -609,9 +609,7 @@ void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) if (!m_bankA_keyon && !m_bankB_keyon) return; - int ch; - - for (ch = 0; ch < 64; ch ++) + for (int ch = 0; ch < 64; ch ++) { channel_t &channel = m_channel[ch]; @@ -622,7 +620,7 @@ void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) s16 left = 0, right = 0; - popmessage("%d: %08x -> %04x %04x delta %04x |16-bit %d sign %d stereo %d| control: %08x %d", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo, m_global_control, stream.samples()); + //popmessage("%d: %08x -> %04x %04x delta %04x |16-bit %d sign %d stereo %d| control: %08x %d", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo, m_global_control, stream.samples()); for (int sampindex = 0; sampindex < stream.samples(); sampindex++) { diff --git a/src/devices/sound/ac97_stac9704.cpp b/src/devices/sound/ac97_stac9704.cpp index 080594888b0..ba05b224c20 100644 --- a/src/devices/sound/ac97_stac9704.cpp +++ b/src/devices/sound/ac97_stac9704.cpp @@ -16,7 +16,9 @@ DEFINE_DEVICE_TYPE(AC97_STAC9704, ac97_stac9704_device, "ac97_stac9704", "SigmaT ac97_stac9704_device::ac97_stac9704_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, type, tag, owner, clock) + , device_mixer_interface(mconfig, *this) , device_memory_interface(mconfig, *this) + , m_pcm(*this, finder_base::DUMMY_TAG) { } @@ -79,6 +81,8 @@ void ac97_stac9704_device::device_reset() m_general_purpose = 0; m_3d_control = 0; m_power_ctrl = 0x000f; + + update_gain_levels(); } // TODO: the whole thing is asynchronous, bit 15 goes high if the codec is busy @@ -117,7 +121,8 @@ void ac97_stac9704_device::mixer_map(address_map &map) { map(0x00, 0x00).lrw16( NAME([this] (offs_t offset) { - LOG("REG #00: Reset read ID\n"); + if (!machine().side_effects_disabled()) + LOG("REG #00: Reset read ID\n"); // TODO: unverified // just bit 15 known to be low return 0x1704; @@ -135,6 +140,7 @@ void ac97_stac9704_device::mixer_map(address_map &map) NAME([this] (offs_t offset, u16 data) { LOG("REG #02: Master Volume %04x\n", data); m_master_vol = data & 0x9f1f; + update_gain_levels(); }) ); map(0x04, 0x04).lrw16( @@ -225,6 +231,7 @@ void ac97_stac9704_device::mixer_map(address_map &map) NAME([this] (offs_t offset, u16 data) { LOG("REG #18: PCM Out Volume %04x\n", data); m_pcm_out_vol = data & 0x9f1f; + update_gain_levels(); }) ); map(0x1a, 0x1a).lrw16( @@ -274,7 +281,28 @@ void ac97_stac9704_device::mixer_map(address_map &map) m_power_ctrl = data & 0xff00; }) ); - map(0x7c, 0x7c).lr16(NAME([this] () { LOG("REG #7C: Vendor ID1 read\n"); return m_vendor_id1; })); - map(0x7e, 0x7e).lr16(NAME([this] () { LOG("REG #7E: Vendor ID2 read\n"); return m_vendor_id2; })); + map(0x7c, 0x7c).lr16(NAME([this] () { + if (!machine().side_effects_disabled()) { LOG("REG #7C: Vendor ID1 read\n"); } return m_vendor_id1; })); + map(0x7e, 0x7e).lr16(NAME([this] () { + if (!machine().side_effects_disabled()) { LOG("REG #7E: Vendor ID2 read\n"); } return m_vendor_id2; })); } +void ac97_stac9704_device::update_gain_levels() +{ + float mainL = (0x1f - ((m_master_vol & 0x1f00) >> 8)) / 31.0; + float mainR = (0x1f - (m_master_vol & 0x1f)) / 31.0; + bool global_mute = !!BIT(m_master_vol, 15); + + if (global_mute || BIT(m_pcm_out_vol, 15)) + { + m_pcm->set_output_gain(0, 0.0); + m_pcm->set_output_gain(1, 0.0); + } + else + { + float pcmL = (0x1f - ((m_pcm_out_vol & 0x1f00) >> 8)) / 31.0; + float pcmR = (0x1f - (m_pcm_out_vol & 0x1f)) / 31.0; + m_pcm->set_output_gain(0, mainL * pcmL); + m_pcm->set_output_gain(1, mainR * pcmR); + } +} diff --git a/src/devices/sound/ac97_stac9704.h b/src/devices/sound/ac97_stac9704.h index 3e417c7bd81..6da4c293e76 100644 --- a/src/devices/sound/ac97_stac9704.h +++ b/src/devices/sound/ac97_stac9704.h @@ -6,11 +6,14 @@ #pragma once class ac97_stac9704_device : public device_t + , public device_mixer_interface , public device_memory_interface { public: ac97_stac9704_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template void set_pcm_tag(T &&tag) { m_pcm.set_tag(std::forward(tag)); } + void codec_write_w(offs_t offset, u32 data, u32 mem_mask = ~0); u32 codec_write_r(offs_t offset, u32 mem_mask = ~0); void codec_read_w(offs_t offset, u32 data, u32 mem_mask = ~0); @@ -25,6 +28,7 @@ protected: private: address_space_config m_space_config; + required_device m_pcm; void mixer_map(address_map &map); @@ -38,6 +42,8 @@ private: u16 m_general_purpose, m_3d_control, m_power_ctrl; u16 m_vendor_id1, m_vendor_id2; + + void update_gain_levels(); }; DECLARE_DEVICE_TYPE(AC97_STAC9704, ac97_stac9704_device) From dae43e461bff9aac8e12eda3b1f27e3176a06547 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 6 Mar 2026 13:45:27 +0100 Subject: [PATCH 152/351] machine/pci.cpp: standardize minimum grant & maximum latency readbacks --- src/devices/bus/pci/aha2940au.cpp | 19 ++++++++------- src/devices/bus/pci/audiowerk2.cpp | 4 +++- src/devices/bus/pci/ess_maestro.cpp | 4 +++- src/devices/bus/pci/ncr53c825.cpp | 4 +++- src/devices/bus/pci/oti_spitfire.cpp | 4 +++- src/devices/bus/pci/pdc20262.cpp | 7 ++++-- src/devices/bus/pci/pdc20262.h | 2 ++ src/devices/bus/pci/trident_4dwavedx.cpp | 4 +++- src/devices/bus/pci/virge_pci.cpp | 4 +++- src/devices/bus/pci/vt6306.cpp | 4 +++- src/devices/bus/pci/zr36057.cpp | 7 ++++-- src/devices/machine/pci.cpp | 22 ++++++++++++++++- src/devices/machine/pci.h | 3 +++ src/devices/machine/sis7018_audio.cpp | 19 +++++++++++---- src/devices/machine/vt82c586b_acpi.cpp | 7 ++++-- src/devices/machine/vt82c586b_acpi.h | 3 +++ src/devices/machine/vt82c586b_usb.cpp | 7 ++++-- src/devices/machine/vt82c586b_usb.h | 1 + src/devices/video/voodoo_pci.cpp | 2 ++ src/mame/shared/xbox_pci.cpp | 30 ++++++++++++++---------- src/mame/shared/xbox_pci.h | 10 -------- 21 files changed, 115 insertions(+), 52 deletions(-) diff --git a/src/devices/bus/pci/aha2940au.cpp b/src/devices/bus/pci/aha2940au.cpp index 80360721024..a321197bb7b 100644 --- a/src/devices/bus/pci/aha2940au.cpp +++ b/src/devices/bus/pci/aha2940au.cpp @@ -44,6 +44,7 @@ aha2940_scsi_device::aha2940_scsi_device(const machine_config &mconfig, device_t aha2940_scsi_device::aha2940_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : aha2940_scsi_device(mconfig, AHA2940, tag, owner, clock) { + // lspci confirmed values set_ids(0x90047178, 0x01, 0x010000, 0x90047178); } @@ -62,7 +63,7 @@ const tiny_rom_entry *aha2940_scsi_device::device_rom_region() const void aha2940_scsi_device::device_add_mconfig(machine_config &config) { - // AIC-7870 + // AIC-7870P/7881U [AHA-2940U/UW/D/S76] // C06/C46/C56/C66 compatible, confirmed C46 in this case EEPROM_93C46_16BIT(config, m_eeprom); @@ -83,8 +84,9 @@ void aha2940_scsi_device::device_start() // INTA# intr_pin = 1; - // TODO: definitely uses PCI regs 0x3e/0x3f - // max_lat = 0x08, min_gnt = 0x08 + // max_lat = 2 usec, min_gnt = 2 usec + minimum_grant = 0x08; + maximum_latency = 0x08; } void aha2940_scsi_device::device_reset() @@ -165,9 +167,8 @@ void aha2940_scsi_device::mem_map(address_map &map) aha2940au_scsi_device::aha2940au_scsi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : aha2940_scsi_device(mconfig, AHA2940AU, tag, owner, clock) { - // TODO: unknown revision - // class code should be 0x01'0000 as per AIC-7890 manual - set_ids(0x90046178, 0x00, 0x010000, 0x90046178); + // lspci confirmed values + set_ids(0x90046178, 0x01, 0x010000, 0x90046178); } // NOTE: BIOS is FAT compressed, decompress as 8bios.bin under the hood. @@ -210,9 +211,9 @@ void aha2940au_scsi_device::device_start() // INTA# intr_pin = 1; - // TODO: definitely uses PCI regs 0x3e/0x3f - // max_lat = 0x19, min_gnt = 0x27 for AIC-7890 - // others may be different + // max_lat = 1 usec, min_gnt = 1 usec + minimum_grant = 0x04; + maximum_latency = 0x04; } void aha2940au_scsi_device::device_reset() diff --git a/src/devices/bus/pci/audiowerk2.cpp b/src/devices/bus/pci/audiowerk2.cpp index d6fbfda7445..04d00bad4d3 100644 --- a/src/devices/bus/pci/audiowerk2.cpp +++ b/src/devices/bus/pci/audiowerk2.cpp @@ -67,7 +67,9 @@ void audiowerk2_device::device_start() // INTA# intr_pin = 1; - // TODO: PCI regs 0x3e/0x3f max_lat = 0x26, min_gnt = 0x0f + // min_gnt = 3.75 usec, max_lat = 9.5 usec + minimum_grant = 0x0f; + maximum_latency = 0x26; } void audiowerk2_device::device_reset() diff --git a/src/devices/bus/pci/ess_maestro.cpp b/src/devices/bus/pci/ess_maestro.cpp index a6a3107d1ac..e61d6af0550 100644 --- a/src/devices/bus/pci/ess_maestro.cpp +++ b/src/devices/bus/pci/ess_maestro.cpp @@ -74,7 +74,9 @@ void es1946_solo1e_device::device_reset() command = 0x0000; // ACPI capable, Fast back-to-back, medium DEVSEL# status = 0x0290; - // TODO: min_gnt 0x02, max_lat = 0x18 + // min_gnt = 0.5 usec, max_lat = 6 usec + minimum_grant = 0x02; + maximum_latency = 0x18; remap_cb(); } diff --git a/src/devices/bus/pci/ncr53c825.cpp b/src/devices/bus/pci/ncr53c825.cpp index b30263cd604..12315c26c15 100644 --- a/src/devices/bus/pci/ncr53c825.cpp +++ b/src/devices/bus/pci/ncr53c825.cpp @@ -64,7 +64,9 @@ void ncr53c825_pci_device::device_start() // INTA# intr_pin = 1; - // TODO: min_gnt = 0x11, max_lat = 0x40 + // min_gnt = 4.25 usec, max_lat = 16 usec + minimum_grant = 0x11; + maximum_latency = 0x40; } void ncr53c825_pci_device::device_reset() diff --git a/src/devices/bus/pci/oti_spitfire.cpp b/src/devices/bus/pci/oti_spitfire.cpp index 3c2cdc06b0a..d2c17d030c1 100644 --- a/src/devices/bus/pci/oti_spitfire.cpp +++ b/src/devices/bus/pci/oti_spitfire.cpp @@ -80,7 +80,9 @@ void oti64111_pci_device::device_start() // INTA# intr_pin = 1; - // TODO: (default?) min_gnt = 0xff, max_lat = 0x01 + // min_gnt = , max_lat = 0.25 usec + minimum_grant = 0xff; + maximum_latency = 0x01; } void oti64111_pci_device::device_reset() diff --git a/src/devices/bus/pci/pdc20262.cpp b/src/devices/bus/pci/pdc20262.cpp index 0516e363b2e..542f9114291 100644 --- a/src/devices/bus/pci/pdc20262.cpp +++ b/src/devices/bus/pci/pdc20262.cpp @@ -197,11 +197,14 @@ void pdc20262_device::device_reset() remap_cb(); } +u8 pdc20262_device::latency_timer_r() +{ + return 0x01; +} + void pdc20262_device::config_map(address_map &map) { pci_card_device::config_map(map); - // latency timer - map(0x0d, 0x0d).lr8(NAME([] () { return 0x01; })); // TODO: everything, starting from capptr_r override } diff --git a/src/devices/bus/pci/pdc20262.h b/src/devices/bus/pci/pdc20262.h index a1ae63916c0..71efe0b8840 100644 --- a/src/devices/bus/pci/pdc20262.h +++ b/src/devices/bus/pci/pdc20262.h @@ -33,6 +33,8 @@ protected: required_memory_region m_bios; + virtual uint8_t latency_timer_r() override; + private: void ide1_command_map(address_map &map) ATTR_COLD; void ide1_control_map(address_map &map) ATTR_COLD; diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 195d3903fb9..6bbbd9e5c18 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -89,7 +89,9 @@ void trident_4dwavedx_device::device_start() intr_pin = 1; intr_line = 0x05; - // TODO: max_lat = 0x05, min_gnt = 0x02 + // min_gnt = 0.5 usec, max_lat = 1.25 usec + minimum_grant = 0x02; + maximum_latency = 0x05; save_item(NAME(m_ddma_config)); save_item(NAME(m_legacy_control)); diff --git a/src/devices/bus/pci/virge_pci.cpp b/src/devices/bus/pci/virge_pci.cpp index ad54f89fe16..8d2dcd487db 100644 --- a/src/devices/bus/pci/virge_pci.cpp +++ b/src/devices/bus/pci/virge_pci.cpp @@ -181,7 +181,9 @@ void virge_pci_device::device_start() // INTA# intr_pin = 1; - // TODO: min_gnt 0x04, max_lat = 0xff + // min_gnt = 1 usec, max_lat = + minimum_grant = 0x04; + maximum_latency = 0xff; remap_cb(); machine().save().register_postload(save_prepost_delegate(FUNC(virge_pci_device::postload), this)); diff --git a/src/devices/bus/pci/vt6306.cpp b/src/devices/bus/pci/vt6306.cpp index 182144b7567..ca076a4dad8 100644 --- a/src/devices/bus/pci/vt6306.cpp +++ b/src/devices/bus/pci/vt6306.cpp @@ -57,7 +57,9 @@ void vt6306_device::device_start() // INTA# intr_pin = 1; - // TODO: min_gnt = 0x00, max_lat = 0x20 + // min_gnt = , max_lat = 8 usec + minimum_grant = 0x00; + maximum_latency = 0x20; } void vt6306_device::device_reset() diff --git a/src/devices/bus/pci/zr36057.cpp b/src/devices/bus/pci/zr36057.cpp index f8a0ac98f85..f8cd882e734 100644 --- a/src/devices/bus/pci/zr36057.cpp +++ b/src/devices/bus/pci/zr36057.cpp @@ -106,6 +106,7 @@ void zr36057_device::device_start() // INTA# intr_pin = 1; + intr_line = 0x0a; } void zr36057_device::device_reset() @@ -116,8 +117,10 @@ void zr36057_device::device_reset() command = 0x0000; command_mask = 0x0006; status = 0x0000; - intr_line = 0x0a; - // TODO: PCI regs 0x3e/0x3f max_lat = 0x10 (4 usec), min_gnt = 0x02 (0.5 usec) + + // min_gnt = 0.5 usec, max_lat = 4 usec + minimum_grant = 0x02; + maximum_latency = 0x10; remap_cb(); diff --git a/src/devices/machine/pci.cpp b/src/devices/machine/pci.cpp index e4c582e29a8..4e44f47be00 100644 --- a/src/devices/machine/pci.cpp +++ b/src/devices/machine/pci.cpp @@ -34,6 +34,8 @@ void pci_device::config_map(address_map &map) map(0x34, 0x34).r(FUNC(pci_device::capptr_r)); map(0x3c, 0x3c).rw(FUNC(pci_device::interrupt_line_r), FUNC(pci_device::interrupt_line_w)); map(0x3d, 0x3d).rw(FUNC(pci_device::interrupt_pin_r), FUNC(pci_device::interrupt_pin_w)); + map(0x3e, 0x3e).r(FUNC(pci_device::minimum_grant_r)); + map(0x3f, 0x3f).r(FUNC(pci_device::maximum_latency_r)); } void pci_bridge_device::config_map(address_map &map) @@ -97,7 +99,7 @@ pci_device::pci_device(const machine_config &mconfig, device_type type, const ch // main_id & 0xffff = device ID ($02-$03) // revision = board versioning ($08) // pclass = programming interface/sub class code/base class code ($09-$0b) -// subsystem_id << 16 = sub vendor ID ($2c-$2d) - NB: not all cards have these +// subsystem_id << 16 = sub vendor ID ($2c-$2d) - NOTE: not all cards have these // subsystem_id & 0xffff = sub device ID ($2e-$2f) / void pci_device::set_ids(uint32_t _main_id, uint8_t _revision, uint32_t _pclass, uint32_t _subsystem_id) { @@ -112,6 +114,8 @@ void pci_device::device_start() command = 0x0000; command_mask = 0x01bf; status = 0x0000; + minimum_grant = 0; + maximum_latency = 0; bank_count = 0; bank_reg_count = 0; @@ -224,11 +228,13 @@ uint32_t pci_device::class_rev_r() return (pclass << 8) | revision; } +// vendor defined, writeable with optional "fallback to zero" if unsupported uint8_t pci_device::cache_line_size_r() { return 0x00; } +// latency timer in PCI bus clocks, optionally writeable if supported uint8_t pci_device::latency_timer_r() { return 0x00; @@ -317,6 +323,20 @@ void pci_device::interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask) logerror("interrupt_pin_w = %02x\n", data); } +// value x 0.25 usec to complete a burst +uint8_t pci_device::minimum_grant_r() +{ + logerror("minimum_grant_r = %02x\n", minimum_grant); + return minimum_grant; +} + +// value x 0.25 usec between request cycles +uint8_t pci_device::maximum_latency_r() +{ + logerror("maximum_latency_r = %02x\n", maximum_latency); + return maximum_latency; +} + void pci_device::set_remap_cb(mapper_cb _remap_cb) { remap_cb = _remap_cb; diff --git a/src/devices/machine/pci.h b/src/devices/machine/pci.h index 3d2173de545..28cbef8df45 100644 --- a/src/devices/machine/pci.h +++ b/src/devices/machine/pci.h @@ -69,6 +69,8 @@ public: void interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); uint8_t interrupt_pin_r(); void interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint8_t minimum_grant_r(); + uint8_t maximum_latency_r(); protected: pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -112,6 +114,7 @@ protected: uint32_t expansion_rom_base; bool is_multifunction_device; uint8_t intr_line, intr_pin; + uint8_t minimum_grant, maximum_latency; virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; diff --git a/src/devices/machine/sis7018_audio.cpp b/src/devices/machine/sis7018_audio.cpp index 44090d1ff4a..ea8450c4793 100644 --- a/src/devices/machine/sis7018_audio.cpp +++ b/src/devices/machine/sis7018_audio.cpp @@ -5,9 +5,8 @@ SiS 7018 Audio device (AC'97 compliant) TODO: -- Stub interface, to be improved; +- Derive from Trident 4DWave-DX/-NX (very similar interface); - shutms11 uses an AD1881 as AC'97 engine; -- Reportedly based off Trident 4DWave technology, some registers effectively matches up; **************************************************************************************************/ @@ -35,7 +34,7 @@ sis7018_audio_device::sis7018_audio_device(const machine_config &mconfig, const : pci_device(mconfig, SIS7018_AUDIO, tag, owner, clock) , m_joy(*this, "pc_joy") { - // 0x040100 - Multimedia device, audio device (vendor specific i/f) + // 0x040100 - Multimedia device, audio device (no specific vendor interface) // 0x01 - Rev 1 set_ids(0x10397018, 0x01, 0x040100, 0x00); } @@ -65,6 +64,8 @@ void sis7018_audio_device::config_map(address_map &map) ); // 0x45 Legacy DMA Decoding // 0x46 PM_CFG Power Management Config (Legacy Control on Trident) + // 0x47 Inactivity Timer Expiration Control + // 0x48-0x49 Int Acknowledge Snoop // PMC capability identifier map(0xdc, 0xdf).r(FUNC(sis7018_audio_device::pmc_id_r)); @@ -100,11 +101,14 @@ void sis7018_audio_device::io_map(address_map &map) void sis7018_audio_device::device_start() { pci_device::device_start(); + add_map(256, M_IO, FUNC(sis7018_audio_device::io_map)); // not explicitly stated, assume 4096 size from the MEM decoding add_map(4096, M_MEM, FUNC(sis7018_audio_device::memory_map)); - // TODO: PCI regs 0x3e/0x3f max_lat = 0x18, min_gnt = 0x02 + // min_gnt = 500 nsec, max_lat = 6 usec (way more than Trident) + minimum_grant = 0x02; + maximum_latency = 0x18; } @@ -113,9 +117,14 @@ void sis7018_audio_device::device_reset() pci_device::device_reset(); command = 0x0000; - status = 0x0000; + command_mask = 7; + // NOTE: claims fast back-to-back capable vs. Trident + status = 0x0290; + // INTA# intr_pin = 1; + intr_line = 0x05; + // TODO: can be written to with $46=1 subsystem_id = 0x10397018; diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index 53802e1a3d4..c50c6798ba4 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -86,11 +86,14 @@ void vt82c586b_acpi_device::device_reset() remap_cb(); } +uint8_t vt82c586b_acpi_device::latency_timer_r() +{ + return 0x16; +} + void vt82c586b_acpi_device::config_map(address_map &map) { pci_device::config_map(map); - // latency timer - map(0x0d, 0x0d).lr8(NAME([] () { return 0x16; })); map(0x40, 0x40).lrw8( NAME([this] () { return m_pin_config; }), diff --git a/src/devices/machine/vt82c586b_acpi.h b/src/devices/machine/vt82c586b_acpi.h index bbc3514ffc4..3aec290ca19 100644 --- a/src/devices/machine/vt82c586b_acpi.h +++ b/src/devices/machine/vt82c586b_acpi.h @@ -28,6 +28,9 @@ protected: uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; void acpi_map(address_map &map) ATTR_COLD; + + virtual uint8_t latency_timer_r() override; + private: required_device m_acpi; devcb_write8 m_sci_pin_cb; diff --git a/src/devices/machine/vt82c586b_usb.cpp b/src/devices/machine/vt82c586b_usb.cpp index 0842e3b2d95..a84e977076d 100644 --- a/src/devices/machine/vt82c586b_usb.cpp +++ b/src/devices/machine/vt82c586b_usb.cpp @@ -59,11 +59,14 @@ void vt82c586b_usb_device::device_reset() std::fill(std::begin(m_misc_control), std::end(m_misc_control), 0); } +uint8_t vt82c586b_usb_device::latency_timer_r() +{ + return 0x16; +} + void vt82c586b_usb_device::config_map(address_map &map) { pci_device::config_map(map); - // latency timer - map(0x0d, 0x0d).lr8(NAME([] () { return 0x16; })); map(0x40, 0x40).lrw8( NAME([this] () { return m_misc_control[0]; }), diff --git a/src/devices/machine/vt82c586b_usb.h b/src/devices/machine/vt82c586b_usb.h index 82fbe6fbaa9..6027c481188 100644 --- a/src/devices/machine/vt82c586b_usb.h +++ b/src/devices/machine/vt82c586b_usb.h @@ -24,6 +24,7 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; + virtual uint8_t latency_timer_r() override; private: u8 m_misc_control[2]; }; diff --git a/src/devices/video/voodoo_pci.cpp b/src/devices/video/voodoo_pci.cpp index b5d791f5e81..e2c29d9baed 100644 --- a/src/devices/video/voodoo_pci.cpp +++ b/src/devices/video/voodoo_pci.cpp @@ -122,6 +122,8 @@ void voodoo_1_pci_device::device_start() status = 0; // no max_gnt / max_lat (hardwired to 0, cannot bus master) + minimum_grant = 0x00; + maximum_latency = 0x00; intr_line = 5; // INTA# diff --git a/src/mame/shared/xbox_pci.cpp b/src/mame/shared/xbox_pci.cpp index dceef0d7f6e..b3ca5d7b356 100644 --- a/src/mame/shared/xbox_pci.cpp +++ b/src/mame/shared/xbox_pci.cpp @@ -695,8 +695,6 @@ DEFINE_DEVICE_TYPE(MCPX_SMBUS, mcpx_smbus_device, "mcpx_smbus", "MCPX SMBus Cont void mcpx_smbus_device::config_map(address_map &map) { pci_device::config_map(map); - map(0x3e, 0x3e).r(FUNC(mcpx_smbus_device::minimum_grant_r)); - map(0x3f, 0x3f).r(FUNC(mcpx_smbus_device::maximum_latency_r)); } void mcpx_smbus_device::smbus_io0(address_map &map) @@ -738,8 +736,10 @@ void mcpx_smbus_device::device_start() bank_infos[2].adr = 0xc200; status = 0x00b0; command = 0x0001; - // Min Grant 3 - // Max Latency 1 + // min_gnt = 0.75 usec, max_lat = 0.25 usec + minimum_grant = 3; + maximum_latency = 1; + intr_pin = 1; memset(&smbusst, 0, sizeof(smbusst)); for (int b = 0; b < 2; b++) @@ -866,8 +866,6 @@ DEFINE_DEVICE_TYPE(MCPX_OHCI, mcpx_ohci_device, "mcpx_ohci", "MCPX OHCI USB Cont void mcpx_ohci_device::config_map(address_map &map) { pci_device::config_map(map); - map(0x3e, 0x3e).r(FUNC(mcpx_ohci_device::minimum_grant_r)); - map(0x3f, 0x3f).r(FUNC(mcpx_ohci_device::maximum_latency_r)); } void mcpx_ohci_device::ohci_mmio(address_map &map) @@ -904,6 +902,9 @@ void mcpx_ohci_device::device_start() bank_infos[0].adr = 0xfed00000; status = 0x00b0; command = 0x0002; + // min_gnt = 0.75 usec, max_lat = 0.25 usec + minimum_grant = 3; + maximum_latency = 1; intr_pin = 1; ohci_usb = new ohci_usb_controller(); ohci_usb->set_cpu(maincpu.target()); @@ -1034,8 +1035,6 @@ DEFINE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device, "mcpx_apu", "MCP APU") void mcpx_apu_device::config_map(address_map &map) { pci_device::config_map(map); - map(0x3e, 0x3e).r(FUNC(mcpx_apu_device::minimum_grant_r)); - map(0x3f, 0x3f).r(FUNC(mcpx_apu_device::maximum_latency_r)); } void mcpx_apu_device::apu_mmio(address_map &map) @@ -1063,6 +1062,10 @@ void mcpx_apu_device::device_start() bank_infos[0].adr = 0xfe800000; status = 0x00b0; command = 0x0002; + // min_gnt = 0.25 usec, max_lat = 3 usec + minimum_grant = 1; + maximum_latency = 0xc; + intr_pin = 1; memset(apust.memory, 0, sizeof(apust.memory)); memset(apust.voices_heap_blockaddr, 0, sizeof(apust.voices_heap_blockaddr)); @@ -1239,8 +1242,6 @@ DEFINE_DEVICE_TYPE(MCPX_AC97_AUDIO, mcpx_ac97_audio_device, "mcpx_ac97_audio", " void mcpx_ac97_audio_device::config_map(address_map &map) { pci_device::config_map(map); - map(0x3e, 0x3e).r(FUNC(mcpx_ac97_audio_device::minimum_grant_r)); - map(0x3f, 0x3f).r(FUNC(mcpx_ac97_audio_device::maximum_latency_r)); } void mcpx_ac97_audio_device::ac97_mmio(address_map &map) @@ -1281,6 +1282,10 @@ void mcpx_ac97_audio_device::device_start() bank_infos[2].adr = 0xfec00000; status = 0x00b0; command = 0x0003; + // min_gnt = 0.5 usec, max_lat = 1.25 usec + minimum_grant = 2; + maximum_latency = 5; + intr_pin = 1; memset(&ac97st, 0, sizeof(ac97st)); } @@ -1373,8 +1378,6 @@ void mcpx_ide_device::config_map(address_map &map) { pci_device::config_map(map); map(0x08, 0x0b).rw(FUNC(pci_device::class_rev_r), FUNC(mcpx_ide_device::class_rev_w)); - map(0x3e, 0x3e).r(FUNC(mcpx_ide_device::minimum_grant_r)); - map(0x3f, 0x3f).r(FUNC(mcpx_ide_device::maximum_latency_r)); } void mcpx_ide_device::ide_pri_command(address_map &map) @@ -1431,6 +1434,9 @@ void mcpx_ide_device::device_start() bank_infos[4].adr = 0xff60; status = 0x00b0; command = 0x0001; + // min_gnt = 0.75 usec, max_lat = 0.25 usec + minimum_grant = 3; + maximum_latency = 1; } void mcpx_ide_device::device_reset() diff --git a/src/mame/shared/xbox_pci.h b/src/mame/shared/xbox_pci.h index 39877833e0e..f34a818aeac 100644 --- a/src/mame/shared/xbox_pci.h +++ b/src/mame/shared/xbox_pci.h @@ -273,8 +273,6 @@ private: void smbus_io2(address_map &map) ATTR_COLD; uint32_t smbus_read(int bus, offs_t offset, uint32_t mem_mask); void smbus_write(int bus, offs_t offset, uint32_t data, uint32_t mem_mask); - uint8_t minimum_grant_r() { return 3; } - uint8_t maximum_latency_r() { return 1; } }; DECLARE_DEVICE_TYPE(MCPX_SMBUS, mcpx_smbus_device) @@ -316,8 +314,6 @@ private: int port; } connecteds[4]; int connecteds_count; - uint8_t minimum_grant_r() { return 3; } - uint8_t maximum_latency_r() { return 1; } }; DECLARE_DEVICE_TYPE(MCPX_OHCI, mcpx_ohci_device) @@ -402,8 +398,6 @@ private: } apust; void apu_mmio(address_map &map) ATTR_COLD; void p_map(address_map &map) ATTR_COLD; - uint8_t minimum_grant_r() { return 1; } - uint8_t maximum_latency_r() { return 0xc; } }; DECLARE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device) @@ -438,8 +432,6 @@ private: void ac97_mmio(address_map &map) ATTR_COLD; void ac97_io0(address_map &map) ATTR_COLD; void ac97_io1(address_map &map) ATTR_COLD; - uint8_t minimum_grant_r() { return 2; } - uint8_t maximum_latency_r() { return 5; } }; DECLARE_DEVICE_TYPE(MCPX_AC97_AUDIO, mcpx_ac97_audio_device) @@ -504,8 +496,6 @@ private: void ide_io(address_map &map) ATTR_COLD; void ide_pri_interrupt(int state); void ide_sec_interrupt(int state); - uint8_t minimum_grant_r() { return 3; } - uint8_t maximum_latency_r() { return 1; } }; DECLARE_DEVICE_TYPE(MCPX_IDE, mcpx_ide_device) From b54076df2aff0764a59d77502f643fc72f7dd6f6 Mon Sep 17 00:00:00 2001 From: ajrhacker Date: Fri, 6 Mar 2026 07:58:49 -0500 Subject: [PATCH 153/351] st9: Fix operand disassembly for PUSH(U)W immediate --- src/devices/cpu/st9/st9dasm.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/st9/st9dasm.cpp b/src/devices/cpu/st9/st9dasm.cpp index dcce74300a0..371b9c0290f 100644 --- a/src/devices/cpu/st9/st9dasm.cpp +++ b/src/devices/cpu/st9/st9dasm.cpp @@ -538,7 +538,7 @@ offs_t st9_disassembler::dasm_8f(std::ostream &stream, u8 byte1, offs_t pc, cons case 0xc1: case 0xc3: util::stream_format(stream, "%-8s", BIT(byte1, 1) ? "pushuw" : "pushw"); - format_immw(stream, opcodes.r8(pc + 2)); + format_immw(stream, opcodes.r16(pc + 2)); return 4 | SUPPORTED; case 0xf1: case 0xf3: From b3b90ba937b199faecaea09bb1843d0f8c1927ca Mon Sep 17 00:00:00 2001 From: ajrhacker Date: Fri, 6 Mar 2026 10:07:36 -0500 Subject: [PATCH 154/351] apple/apple2.cpp: Remove phantom (probably lost) ROM set that was always commented out --- src/mame/apple/apple2.cpp | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/src/mame/apple/apple2.cpp b/src/mame/apple/apple2.cpp index 15a3cd6049d..3ad8e64e9e5 100644 --- a/src/mame/apple/apple2.cpp +++ b/src/mame/apple/apple2.cpp @@ -1223,29 +1223,6 @@ ROM_START(laser2c) ROM_LOAD( "mon.bin", 0x003000, 0x001000, CRC(978c083f) SHA1(14e87cb717780b19db75c313004ba4d6ef20bc26) ) ROM_END -#if 0 -ROM_START(laba2p) /* II Plus clone with on-board Disk II controller and Videx-compatible 80-column card, supposedly from lab equipment */ - ROM_REGION(0x1000,"gfx1",0) - ROM_LOAD( "char.u30", 0x0000, 0x1000, CRC(2dbaef88) SHA1(9834842796132a11facd57923326d6954bcb609f) ) - - ROM_REGION(0x4700,"maincpu",0) - ROM_LOAD( "maind0.u35", 0x1000, 0x1000, CRC(24d73c7b) SHA1(d17a15868dc875c67061c95ec53a6b2699d3a425) ) - ROM_LOAD( "maine0.u34", 0x2000, 0x2000, CRC(314462ca) SHA1(5a23616dca14e59b4aca8ff6cfa0d98592a78a79) ) - - ROM_REGION(0x1000, "fw80col", 0) - ROM_LOAD( "80cfw.u3", 0x0000, 0x1000, CRC(92d2b8b0) SHA1(5149483eb3e550ece1584e85fc821bb04d068dec) ) // firmware for on-board Videx - - ROM_REGION(0x1000, "cg80col", 0) - ROM_LOAD( "80ccgv80.u25", 0x0000, 0x1000, CRC(6d5e2707) SHA1(c56f76e8a366fee7374eb09f4866435c692490b2) ) // character generator for on-board Videx - - ROM_REGION(0x800, "diskii", 0) - ROM_LOAD( "diskfw.u7", 0x0000, 0x0800, CRC(9207ef4e) SHA1(5fcffa4c68b16a7ef2f62651d4c7470400e5bd35) ) // firmware for on-board Disk II - - ROM_REGION(0x800, "unknown", 0) - ROM_LOAD( "unk.u5", 0x0000, 0x0800, CRC(240a1774) SHA1(e6aeb0702dc99d76fd8c5a642fdfbe9ab896acd4) ) // unknown ROM -ROM_END -#endif - ROM_START( basis108 ) ROM_REGION(0x4000, "maincpu", 0) // all roms overdumped ROM_LOAD( "d0.d83", 0x1000, 0x0800, CRC(bb4ac440) SHA1(7901203845adab588850ae35f81e4ee2a2248686) ) @@ -1349,7 +1326,6 @@ COMP( 1984, ivelultr, apple2, 0, ivelultr, apple2, apple2_state, empty_init COMP( 1985, prav8m, apple2, 0, apple2p, apple2, apple2_state, empty_init, "Pravetz", "Pravetz 8M", MACHINE_SUPPORTS_SAVE ) COMP( 1985, space84, apple2, 0, apple2p, apple2, apple2_state, empty_init, "ComputerTechnik/IBS", "Space 84", MACHINE_SUPPORTS_SAVE ) COMP( 1985, am64, apple2, 0, am64, apple2, apple2_state, empty_init, "ASEM", "AM 64", MACHINE_SUPPORTS_SAVE ) -//COMP( 19??, laba2p, apple2, 0, laba2p, apple2, apple2_state, empty_init, "", "Lab equipment Apple II Plus clone", MACHINE_SUPPORTS_SAVE ) COMP( 1985, laser2c, apple2, 0, dodo, apple2, apple2_state, empty_init, "Milmar", "Laser //c", MACHINE_SUPPORTS_SAVE ) COMP( 1982, basis108, apple2, 0, apple2, apple2, apple2_state, empty_init, "Basis Microcomputer GmbH", "Basis 108", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) COMP( 1984, hkc8800a, apple2, 0, apple2p, apple2, apple2_state, empty_init, "China HKC", "HKC 8800A", MACHINE_SUPPORTS_SAVE ) From 4b5d60a0c2e8cb29455bed09d839bc1e5a44f3c4 Mon Sep 17 00:00:00 2001 From: ajrhacker Date: Fri, 6 Mar 2026 10:08:39 -0500 Subject: [PATCH 155/351] apple/apple2.cpp: Remove this leftover entry, too --- src/mame/apple/apple2.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mame/apple/apple2.cpp b/src/mame/apple/apple2.cpp index 3ad8e64e9e5..5e91b42ebfd 100644 --- a/src/mame/apple/apple2.cpp +++ b/src/mame/apple/apple2.cpp @@ -1319,7 +1319,6 @@ COMP( 1982, ace100, apple2, 0, apple2, apple2, apple2_state, empty_init COMP( 1982, ace1000, apple2, 0, apple2p, apple2, apple2_state, empty_init, "Franklin Computer", "Franklin ACE 1000", MACHINE_SUPPORTS_SAVE ) COMP( 1982, uniap2en, apple2, 0, uniap2, apple2, apple2_state, empty_init, "Unitron Eletronica", "Unitron AP II (in English)", MACHINE_SUPPORTS_SAVE ) COMP( 1982, uniap2pt, apple2, 0, uniap2, apple2, apple2_state, empty_init, "Unitron Eletronica", "Unitron AP II (in Brazilian Portuguese)", MACHINE_SUPPORTS_SAVE ) -//COMP( 1984, uniap2ti, apple2, 0, apple2p, apple2, apple2_state, empty_init, "Unitron Eletronica", "Unitron AP II+ (Teclado Inteligente)", MACHINE_SUPPORTS_SAVE ) COMP( 1982, craft2p, apple2, 0, apple2p, apple2, apple2_state, empty_init, "Craft", "Craft II+", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // reverse font direction + wider character cell -\/ COMP( 1984, ivelultr, apple2, 0, ivelultr, apple2, apple2_state, empty_init, "Ivasim", "Ivel Ultra", MACHINE_SUPPORTS_SAVE ) From 0edf02aea873379876de8b42a8cfd00bd1967cc9 Mon Sep 17 00:00:00 2001 From: holub Date: Fri, 6 Mar 2026 11:18:20 -0500 Subject: [PATCH 156/351] sinclair/*: Fixed various bugs (#15066) * specnext.cpp: "dot commands" loading issue with NextZXOS - switched back to safer sdcard implementation which not such sensitive to timings. * spectrum.cpp: focus on debugger memory window crashing the emulator if exp devices are not activated. * sprinter.cpp: typo in fastram memory check; drop write if following access supported by the accelerator. --- src/mame/sinclair/specnext.cpp | 2 +- src/mame/sinclair/spectrum.cpp | 2 +- src/mame/sinclair/sprinter.cpp | 4 +++- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/mame/sinclair/specnext.cpp b/src/mame/sinclair/specnext.cpp index a7dacdac561..3f98e3c1c39 100644 --- a/src/mame/sinclair/specnext.cpp +++ b/src/mame/sinclair/specnext.cpp @@ -58,7 +58,7 @@ namespace { -#define TIMINGS_PERFECT 1 +#define TIMINGS_PERFECT 0 constexpr u8 INT_PRIORITY_LINE = 0; constexpr u8 INT_PRIORITY_UART0_RX = 1; diff --git a/src/mame/sinclair/spectrum.cpp b/src/mame/sinclair/spectrum.cpp index 7e77e21cf63..0bc9c4bd10c 100644 --- a/src/mame/sinclair/spectrum.cpp +++ b/src/mame/sinclair/spectrum.cpp @@ -331,7 +331,7 @@ void spectrum_state::spectrum_rom_w(offs_t offset, uint8_t data) uint8_t spectrum_state::spectrum_rom_r(offs_t offset) { - return m_exp->romcs() + return (m_exp && m_exp->romcs()) ? m_exp->mreq_r(offset) : m_rom[offset]; } diff --git a/src/mame/sinclair/sprinter.cpp b/src/mame/sinclair/sprinter.cpp index bfaf5de32a3..084f40630ac 100644 --- a/src/mame/sinclair/sprinter.cpp +++ b/src/mame/sinclair/sprinter.cpp @@ -1027,7 +1027,7 @@ void sprinter_state::check_accel(bool is_read, offs_t offset, u8 &data) if (BIT(m_acc_dir, 2)) // block operation { // fastram doesn't apply waits, hence m_wait_cycles_count is not updated - if (is_read && ~(m_pages[BIT(offset, 14, 2)] & BANK_FASTRAM_MASK)) + if (is_read && (~m_pages[BIT(offset, 14, 2)] & BANK_FASTRAM_MASK)) m_maincpu->adjust_icount(m_wait_ticks_count); m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); @@ -1181,6 +1181,8 @@ template u8 sprinter_state::ram_r(offs_t offset) template void sprinter_state::ram_w(offs_t offset, u8 data) { static_assert(Bank < 4, "unexpected bank number"); + if (m_access_state == ACCEL_GO) + return; do_mem_wait(3); From 1f7fa43c3d2692d3523e8b72a24e04fff7c30a57 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sat, 7 Mar 2026 03:20:05 +1100 Subject: [PATCH 157/351] cpu/sharc: Implemented a bit more functionality and fixed bugs: * Implemented short word sign extension. * Fixed DAG2 (PM) register display in debugger. * Track AF dependencies when analysing instructions. * Log analysed instructions when logging UML code. * Removed misplaced break in cpu/sharc/sharcfe.cpp. * cpu/uml.h: Let C functions take any pointer/reference parameter. --- docs/source/techspecs/uml_instructions.rst | 4 +- src/devices/cpu/e132xs/e132xsdrc.cpp | 47 ++- src/devices/cpu/e132xs/e1fe.cpp | 2 + src/devices/cpu/powerpc/ppcfe.cpp | 2 + src/devices/cpu/sh/sh_fe.cpp | 2 + src/devices/cpu/sharc/sharc.cpp | 75 ++-- src/devices/cpu/sharc/sharc.h | 32 +- src/devices/cpu/sharc/sharcdrc.cpp | 395 +++++++++++++-------- src/devices/cpu/sharc/sharcfe.cpp | 221 ++++++++---- src/devices/cpu/sharc/sharcfe.h | 63 ++-- src/devices/cpu/sharc/sharcops.hxx | 35 +- src/devices/cpu/uml.h | 9 +- 12 files changed, 548 insertions(+), 339 deletions(-) diff --git a/docs/source/techspecs/uml_instructions.rst b/docs/source/techspecs/uml_instructions.rst index f12fc679b60..0613f941a76 100644 --- a/docs/source/techspecs/uml_instructions.rst +++ b/docs/source/techspecs/uml_instructions.rst @@ -616,7 +616,9 @@ Simplification rules CALLC ~~~~~ -Call a C function with the signature ``void (*)(void *)``. +Call a C function with the signature ``void (*)(T *)`` or +``void (*)(T &)`` (i.e. a function with a single pointer or reference +parameter that does not return a value). +---------------------------+-----------------------------------------+ | Disassembly | Usage | diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp index b2b12bc1506..7195062c2d0 100644 --- a/src/devices/cpu/e132xs/e132xsdrc.cpp +++ b/src/devices/cpu/e132xs/e132xsdrc.cpp @@ -70,65 +70,60 @@ public: struct hyperstone_device::c_funcs { - static void unimplemented(void *param) + static void unimplemented(hyperstone_device &that) { - auto &that = *reinterpret_cast(param); fatalerror("PC=%08X: Unimplemented op %08X\n", that.PC, that.m_core->arg0); } - static void print(void *param) + static void print(hyperstone_device &that) { - auto &that = *reinterpret_cast(param); printf("%c: %08x\n", (char)that.m_core->arg0, that.m_core->arg1); } - static void standard_irq_callback(void *param) + static void standard_irq_callback(hyperstone_device &that) { - auto &that = *reinterpret_cast(param); that.standard_irq_callback(that.m_core->arg0, that.m_core->global_regs[0]); } - static void debugger_exception_hook(void *param) + static void debugger_exception_hook(hyperstone_device &that) { - auto &that = *reinterpret_cast(param); that.debugger_exception_hook(int32_t(that.m_core->arg0)); } - static void adjust_timer_interrupt(void *param) + static void adjust_timer_interrupt(hyperstone_device &that) { - reinterpret_cast(param)->adjust_timer_interrupt(); + that.adjust_timer_interrupt(); } - static void compute_tr(void *param) + static void compute_tr(hyperstone_device &that) { - reinterpret_cast(param)->compute_tr(); + that.compute_tr(); } - static void update_timer_prescale(void *param) + static void update_timer_prescale(hyperstone_device &that) { - reinterpret_cast(param)->update_timer_prescale(); + that.update_timer_prescale(); } - static void update_bus_control(void *param) + static void update_bus_control(hyperstone_device &that) { - reinterpret_cast(param)->update_bus_control(); + that.update_bus_control(); } - static void update_memory_control(void *param) + static void update_memory_control(hyperstone_device &that) { - reinterpret_cast(param)->update_memory_control(); + that.update_memory_control(); } #if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS - static void dump_registers(void *param) + static void dump_registers(hyperstone_device &that) { - reinterpret_cast(param)->dump_registers(); + that.dump_registers(); } #endif - static void total_cycles(void *param) + static void total_cycles(hyperstone_device &that) { - auto &that = *reinterpret_cast(param); that.m_core->numcycles = that.total_cycles(); } }; @@ -268,8 +263,6 @@ void hyperstone_device::generate_get_trap_addr(drcuml_block &block, uml::code_la void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) { compiler_state compiler(mode); - const opcode_desc *seqhead, *seqlast; - bool override = false; auto profile = g_profiler.start(PROFILER_DRC_COMPILE); @@ -278,6 +271,7 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) if (m_drcuml->logging()) log_descriptions(desclist, 0); + bool override = false; bool succeeded = false; while (!succeeded) { @@ -287,14 +281,15 @@ void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc) drcuml_block &block(m_drcuml->begin_block(8192)); /* loop until we get through all instruction sequences */ - for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next()) + const opcode_desc *seqlast = nullptr; + for (const opcode_desc *seqhead = desclist; seqhead; seqhead = seqlast->next()) { /* add a code log entry */ if (m_drcuml->logging()) block.append_comment("-------------------------"); /* determine the last instruction in this sequence */ - for (seqlast = seqhead; seqlast != nullptr; seqlast = seqlast->next()) + for (seqlast = seqhead; seqlast; seqlast = seqlast->next()) if (seqlast->end_sequence()) break; assert(seqlast != nullptr); diff --git a/src/devices/cpu/e132xs/e1fe.cpp b/src/devices/cpu/e132xs/e1fe.cpp index 7a397185317..56fbbc20286 100644 --- a/src/devices/cpu/e132xs/e1fe.cpp +++ b/src/devices/cpu/e132xs/e1fe.cpp @@ -15,6 +15,8 @@ #include "cpu/drcfe.ipp" +#include + void hyperstone_device::opcode_desc::log_flags(std::ostream &stream) const diff --git a/src/devices/cpu/powerpc/ppcfe.cpp b/src/devices/cpu/powerpc/ppcfe.cpp index e970e6706f8..991149578f8 100644 --- a/src/devices/cpu/powerpc/ppcfe.cpp +++ b/src/devices/cpu/powerpc/ppcfe.cpp @@ -15,6 +15,8 @@ #include "cpu/drcfe.ipp" +#include + /*------------------------------------------------- diff --git a/src/devices/cpu/sh/sh_fe.cpp b/src/devices/cpu/sh/sh_fe.cpp index a557109f7b7..6e888dedd3b 100644 --- a/src/devices/cpu/sh/sh_fe.cpp +++ b/src/devices/cpu/sh/sh_fe.cpp @@ -13,6 +13,8 @@ #include "cpu/drcfe.ipp" +#include + /*------------------------------------------------- diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp index 0b11008ed99..5039686a7c7 100644 --- a/src/devices/cpu/sharc/sharc.cpp +++ b/src/devices/cpu/sharc/sharc.cpp @@ -97,8 +97,11 @@ void adsp21062_device::data_2m(address_map &map) map(0x00000, 0x000ff).rw(FUNC(adsp21062_device::iop_r), FUNC(adsp21062_device::iop_w)); map(0x20000, 0x27fff).mirror(0x18000).ram().share(m_blocks[1]); map(0x20000, 0x27fff).ram().share(m_blocks[0]); - map(0x40000, 0x4ffff).mirror(0x30000).rw(FUNC(adsp21062_device::dmw_r<1>), FUNC(adsp21062_device::dmw_w<1>)); - map(0x40000, 0x4ffff).rw(FUNC(adsp21062_device::dmw_r<0>), FUNC(adsp21062_device::dmw_w<0>)); + map(0x40000, 0x4ffff).mirror(0x30000).rw(FUNC(adsp21062_device::dm_short_r<1>), FUNC(adsp21062_device::dm_short_w<1>)); + map(0x40000, 0x4ffff).rw(FUNC(adsp21062_device::dm_short_r<0>), FUNC(adsp21062_device::dm_short_w<0>)); + map(0x40000, 0x7ffff).view(m_dm_short_view); + m_dm_short_view[0](0x40000, 0x4ffff).mirror(0x30000).r(FUNC(adsp21062_device::dm_short_se_r<1>)); + m_dm_short_view[0](0x40000, 0x4ffff).r(FUNC(adsp21062_device::dm_short_se_r<0>)); } void adsp21062_device::data_4m(address_map &map) @@ -106,8 +109,11 @@ void adsp21062_device::data_4m(address_map &map) map(0x00000, 0x000ff).rw(FUNC(adsp21062_device::iop_r), FUNC(adsp21062_device::iop_w)); map(0x20000, 0x2ffff).ram().share(m_blocks[0]); map(0x30000, 0x3ffff).ram().share(m_blocks[1]); - map(0x40000, 0x5ffff).rw(FUNC(adsp21062_device::dmw_r<0>), FUNC(adsp21062_device::dmw_w<0>)); - map(0x60000, 0x7ffff).rw(FUNC(adsp21062_device::dmw_r<1>), FUNC(adsp21062_device::dmw_w<1>)); + map(0x40000, 0x5ffff).rw(FUNC(adsp21062_device::dm_short_r<0>), FUNC(adsp21062_device::dm_short_w<0>)); + map(0x60000, 0x7ffff).rw(FUNC(adsp21062_device::dm_short_r<1>), FUNC(adsp21062_device::dm_short_w<1>)); + map(0x40000, 0x7ffff).view(m_dm_short_view); + m_dm_short_view[0](0x40000, 0x5ffff).r(FUNC(adsp21062_device::dm_short_se_r<0>)); + m_dm_short_view[0](0x60000, 0x7ffff).r(FUNC(adsp21062_device::dm_short_se_r<1>)); } adsp21062_device::adsp21062_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -171,6 +177,7 @@ adsp21062_device::adsp21062_device( , m_swap_dag2_4_7(nullptr) , m_swap_r0_7(nullptr) , m_swap_r8_15(nullptr) + , m_dm_short_view(*this, "short_words") , m_flag_out_cb(*this) , m_blocks(*this, "block%u", 0U) , m_flag_pending_val{ 0, 0, 0, 0 } @@ -327,13 +334,19 @@ void adsp21062_device::pm_w(offs_t offset, uint64_t data, uint64_t mem_mask) } template -uint32_t adsp21062_device::dmw_r(offs_t offset) +uint32_t adsp21062_device::dm_short_r(offs_t offset) { return util::little_endian_cast(&m_blocks[N][0])[offset]; } template -void adsp21062_device::dmw_w(offs_t offset, uint32_t data) +uint32_t adsp21062_device::dm_short_se_r(offs_t offset) +{ + return uint32_t(int32_t(util::little_endian_cast(&m_blocks[N][0])[offset])); +} + +template +void adsp21062_device::dm_short_w(offs_t offset, uint32_t data) { util::little_endian_cast(&m_blocks[N][0])[offset] = uint16_t(data); } @@ -850,21 +863,21 @@ void adsp21062_device::device_start() save_item(NAME(m_core->astat_old_old)); save_item(NAME(m_core->astat_old_old_old)); - state_add( SHARC_PC, "PC", m_core->pc).mask(0x00ffffff).formatstr("%06X"); - state_add( SHARC_PCSTK, "PCSTK", m_core->pcstk).mask(0x00ffffff).formatstr("%06X"); - state_add( SHARC_PCSTKP, "PCSTKP", m_core->pcstkp).mask(0x1f).formatstr("%02X"); - state_add( SHARC_LSTKP, "LSTKP", m_core->lstkp).mask(0x07).formatstr("%01X"); - state_add( SHARC_FADDR, "FADDR", m_core->faddr).formatstr("%08X"); - state_add( SHARC_DADDR, "DADDR", m_core->daddr).formatstr("%08X"); - state_add( SHARC_MODE1, "MODE1", m_core->mode1).formatstr("%08X"); - state_add( SHARC_MODE2, "MODE2", m_core->mode2).formatstr("%08X"); - state_add( SHARC_ASTAT, "ASTAT", m_core->astat).formatstr("%08X").callimport().callexport(); - state_add( SHARC_IRPTL, "IRPTL", m_core->irptl).formatstr("%08X"); - state_add( SHARC_IMASK, "IMASK", m_core->imask).formatstr("%08X"); - state_add( SHARC_USTAT1, "USTAT1", m_core->ustat1).formatstr("%08X"); - state_add( SHARC_USTAT2, "USTAT2", m_core->ustat2).formatstr("%08X"); - state_add( SHARC_CURLCNTR, "CURLCNTR", m_core->curlcntr).formatstr("%08X"); - state_add( SHARC_STSTKP, "STSTKP", m_core->status_stkp).formatstr("%08X"); + state_add(SHARC_PC, "PC", m_core->pc).mask(0x00ffffff).formatstr("%06X"); + state_add(SHARC_PCSTK, "PCSTK", m_core->pcstk).mask(0x00ffffff).formatstr("%06X"); + state_add(SHARC_PCSTKP, "PCSTKP", m_core->pcstkp).mask(0x1f).formatstr("%02X"); + state_add(SHARC_LSTKP, "LSTKP", m_core->lstkp).mask(0x07).formatstr("%01X"); + state_add(SHARC_FADDR, "FADDR", m_core->faddr).formatstr("%08X"); + state_add(SHARC_DADDR, "DADDR", m_core->daddr).formatstr("%08X"); + state_add(SHARC_MODE1, "MODE1", m_core->mode1).formatstr("%08X"); + state_add(SHARC_MODE2, "MODE2", m_core->mode2).formatstr("%08X"); + state_add(SHARC_ASTAT, "ASTAT", m_core->astat).formatstr("%08X").callimport().callexport(); + state_add(SHARC_IRPTL, "IRPTL", m_core->irptl).formatstr("%08X"); + state_add(SHARC_IMASK, "IMASK", m_core->imask).formatstr("%08X"); + state_add(SHARC_USTAT1, "USTAT1", m_core->ustat1).formatstr("%08X"); + state_add(SHARC_USTAT2, "USTAT2", m_core->ustat2).formatstr("%08X"); + state_add(SHARC_CURLCNTR, "CURLCNTR", m_core->curlcntr).formatstr("%08X"); + state_add(SHARC_STSTKP, "STSTKP", m_core->status_stkp).formatstr("%08X"); char namebuf[8]; for (int i = 0; 16 > i; ++i) @@ -876,29 +889,37 @@ void adsp21062_device::device_start() { std::snprintf(namebuf, std::size(namebuf), "I%d", i); auto &dag((i < 8) ? m_core->dag1 : m_core->dag2); - state_add(SHARC_I0 + i, namebuf, dag.i[i]).formatstr("%08X"); + auto const mask((i < 8) ? 0xffffffff : 0x00ffffff); + auto const format((i < 8) ? "%08X" : "%06X"); + state_add(SHARC_I0 + i, namebuf, dag.i[i & 0x7]).mask(mask).formatstr(format); } for (int i = 0; 16 > i; ++i) { std::snprintf(namebuf, std::size(namebuf), "M%d", i); auto &dag((i < 8) ? m_core->dag1 : m_core->dag2); - state_add(SHARC_M0 + i, namebuf, dag.m[i]).formatstr("%08X"); + auto const mask((i < 8) ? 0xffffffff : 0x00ffffff); + auto const format((i < 8) ? "%08X" : "%06X"); + state_add(SHARC_M0 + i, namebuf, dag.m[i & 0x7]).mask(mask).formatstr(format); } for (int i = 0; 16 > i; ++i) { std::snprintf(namebuf, std::size(namebuf), "L%d", i); auto &dag((i < 8) ? m_core->dag1 : m_core->dag2); - state_add(SHARC_L0 + i, namebuf, dag.l[i]).formatstr("%08X"); + auto const mask((i < 8) ? 0xffffffff : 0x00ffffff); + auto const format((i < 8) ? "%08X" : "%06X"); + state_add(SHARC_L0 + i, namebuf, dag.l[i & 0x7]).mask(mask).formatstr(format); } for (int i = 0; 16 > i; ++i) { std::snprintf(namebuf, std::size(namebuf), "B%d", i); auto &dag((i < 8) ? m_core->dag1 : m_core->dag2); - state_add(SHARC_B0 + i, namebuf, dag.b[i]).formatstr("%08X"); + auto const mask((i < 8) ? 0xffffffff : 0x00ffffff); + auto const format((i < 8) ? "%08X" : "%06X"); + state_add(SHARC_B0 + i, namebuf, dag.b[i & 0x7]).mask(mask).formatstr(format); } - state_add( STATE_GENPC, "GENPC", m_core->pc).noshow(); - state_add( STATE_GENPCBASE, "CURPC", m_core->pc).noshow(); + state_add(STATE_GENPC, "GENPC", m_core->pc).noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_core->pc).noshow(); set_icountptr(m_core->icount); } diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 95b712eff84..45f3f8796e5 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -8,6 +8,9 @@ #include "cpu/drcuml.h" +class sharc_disassembler; + + class adsp21062_device : public cpu_device { public: @@ -38,8 +41,9 @@ public: template uint64_t pm_r(offs_t offset); template void pm_w(offs_t offset, uint64_t data, uint64_t mem_mask = ~0); - template uint32_t dmw_r(offs_t offset); - template void dmw_w(offs_t offset, uint32_t data); + template uint32_t dm_short_r(offs_t offset); + template uint32_t dm_short_se_r(offs_t offset); + template void dm_short_w(offs_t offset, uint32_t data); uint32_t iop_r(offs_t offset); void iop_w(offs_t offset, uint32_t data); @@ -130,7 +134,7 @@ private: static constexpr uint32_t MV = 0x0000'0080; // Multiplier overflow static constexpr uint32_t MU = 0x0000'0100; // Multiplier underflow static constexpr uint32_t MI = 0x0000'0200; // Multiplier floating-point invalid operation - static constexpr uint32_t AF = 0x0000'0400; + static constexpr uint32_t AF = 0x0000'0400; // Last ALU operation was a floating-point operation static constexpr uint32_t SV = 0x0000'0800; // Shifter overflow static constexpr uint32_t SZ = 0x0000'1000; // Shifter result zero static constexpr uint32_t SS = 0x0000'2000; // Shifter input sign @@ -188,6 +192,8 @@ private: static constexpr uint32_t MODE2_CAFRZ = 0x0008'0000; // Cache freeze + struct cfuncs; + using opcode_func = void (adsp21062_device::*)(); struct SHARC_OP { @@ -283,6 +289,7 @@ private: uml::code_handle *m_swap_r0_7; uml::code_handle *m_swap_r8_15; + memory_view m_dm_short_view; memory_access<24, 3, -3, ENDIANNESS_LITTLE>::specific m_program; memory_access<32, 2, -2, ENDIANNESS_LITTLE>::specific m_data; @@ -300,8 +307,8 @@ private: bool m_input_update_pending; bool m_enable_drc; - static std::string disassemble_one(uint32_t pc, uint64_t opcode); - void build_opcode_table(); + static std::string disassemble_one(uint32_t pc, uint64_t opcode) ATTR_COLD; + void build_opcode_table() ATTR_COLD; TIMER_CALLBACK_MEMBER(sharc_iop_delayed_write_callback); TIMER_CALLBACK_MEMBER(sharc_dma_callback); @@ -380,7 +387,7 @@ private: void sharcop_push_pop_stacks(); void sharcop_nop(); void sharcop_idle(); - void sharcop_unimplemented(); + [[noreturn]] void sharcop_unimplemented() ATTR_COLD; inline void compute_add(int rn, int rx, int ry); inline void compute_sub(int rn, int rx, int ry); inline void compute_add_ci(int rn, int rx, int ry); @@ -454,6 +461,7 @@ private: }; void execute_run_drc(); + void log_descriptions(const sharc_disassembler &disassembler, const opcode_desc *desc_list, unsigned indent); void generate_invariant(); void flush_drc_cache(); void compile_block(offs_t pc); @@ -496,18 +504,6 @@ private: bool if_condition_always_true(int condition); uint32_t do_condition_astat_bits(int condition); - - template static void cfunc_update_flag_out(void *param); - - [[noreturn]] static void cfunc_unimplemented(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_unimplemented_compute(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_unimplemented_shiftimm(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_pcstack_overflow(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_pcstack_underflow(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_loopstack_overflow(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_loopstack_underflow(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_statusstack_overflow(void *param) ATTR_COLD; - [[noreturn]] static void cfunc_statusstack_underflow(void *param) ATTR_COLD; }; diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index d4b288458af..074bcb9048f 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -10,12 +10,17 @@ #include "emu.h" #include "sharc.h" +#include "sharc_dasm.h" #include "sharcfe.h" #include "sharcinternal.ipp" #include "cpu/drcuml.h" #include "cpu/drcumlsh.h" +#include "util/vecstream.h" + +#include + #define USE_ASTAT_ELISION 1 #define USE_FAST_APPROX 0 @@ -117,6 +122,75 @@ const uint32_t loop_cond_map[16] = { } // anonymous namespace + + +struct adsp21062_device::cfuncs +{ + static void update_sse(adsp21062_device &sharc) + { + if (sharc.m_core->mode1 & MODE1_SSE) + sharc.m_dm_short_view.select(0); + else + sharc.m_dm_short_view.disable(); + } + + template + static void update_flag_out(adsp21062_device &sharc) + { + sharc.m_flag_out_cb[N](BIT(sharc.m_core->astat, FLG0_SHIFT + N)); + } + + + [[noreturn]] static void unimplemented(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Unimplemented op %012X: %s", + sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); + } + + [[noreturn]] static void unimplemented_compute(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Unimplemented compute %012X: %s", + sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); + } + + [[noreturn]] static void unimplemented_shiftimm(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Unimplemented shiftimm %012X: %s", + sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); + } + + [[noreturn]] static void pcstack_overflow(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: PCStack overflow", sharc.tag(), sharc.m_core->pc); + } + + [[noreturn]] static void pcstack_underflow(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: PCStack underflow", sharc.tag(), sharc.m_core->pc); + } + + [[noreturn]] static void loopstack_overflow(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Loop Stack overflow", sharc.tag(), sharc.m_core->pc); + } + + [[noreturn]] static void loopstack_underflow(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Loop Stack underflow", sharc.tag(), sharc.m_core->pc); + } + + [[noreturn]] static void statusstack_overflow(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Status Stack overflow", sharc.tag(), sharc.m_core->pc); + } + + [[noreturn]] static void statusstack_underflow(adsp21062_device &sharc) ATTR_COLD + { + throw emu_fatalerror("%s: PC=%08X: Status Stack underflow", sharc.tag(), sharc.m_core->pc); + } +}; + + inline void adsp21062_device::alloc_handle(uml::code_handle *&handleptr, const char *name) { if (!handleptr) @@ -124,74 +198,6 @@ inline void adsp21062_device::alloc_handle(uml::code_handle *&handleptr, const c } - -template -void adsp21062_device::cfunc_update_flag_out(void *param) -{ - auto &sharc = *reinterpret_cast(param); - sharc.m_flag_out_cb[N](BIT(sharc.m_core->astat, FLG0_SHIFT + N)); -} - - -void adsp21062_device::cfunc_unimplemented(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Unimplemented op %012X: %s", - sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); -} - -void adsp21062_device::cfunc_unimplemented_compute(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Unimplemented compute %012X: %s", - sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); -} - -void adsp21062_device::cfunc_unimplemented_shiftimm(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Unimplemented shiftimm %012X: %s", - sharc.tag(), sharc.m_core->pc, sharc.m_core->arg64, disassemble_one(sharc.m_core->pc, sharc.m_core->arg64)); -} - -void adsp21062_device::cfunc_pcstack_overflow(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: PCStack overflow", sharc.tag(), sharc.m_core->pc); -} - -void adsp21062_device::cfunc_pcstack_underflow(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: PCStack underflow", sharc.tag(), sharc.m_core->pc); -} - -void adsp21062_device::cfunc_loopstack_overflow(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Loop Stack overflow", sharc.tag(), sharc.m_core->pc); -} - -void adsp21062_device::cfunc_loopstack_underflow(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Loop Stack underflow", sharc.tag(), sharc.m_core->pc); -} - -void adsp21062_device::cfunc_statusstack_overflow(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Status Stack overflow", sharc.tag(), sharc.m_core->pc); -} - -void adsp21062_device::cfunc_statusstack_underflow(void *param) -{ - auto &sharc = *reinterpret_cast(param); - throw emu_fatalerror("%s: PC=%08X: Status Stack underflow", sharc.tag(), sharc.m_core->pc); -} - - - bool adsp21062_device::if_condition_always_true(int condition) { if (condition == 0x1f || condition == 0x1e) @@ -205,26 +211,26 @@ uint32_t adsp21062_device::do_condition_astat_bits(int condition) uint32_t r = 0; switch (condition) { - case 0x00: r = AZ; break; // EQ - case 0x01: r = AZ | AN; break; // LT - case 0x02: r = AZ | AN; break; // LE - case 0x03: r = AC; break; // AC - case 0x04: r = AV; break; // AV - case 0x05: r = MV; break; // MV - case 0x06: r = MN; break; // MS - case 0x07: r = SV; break; // SV - case 0x08: r = SZ; break; // SZ - case 0x0d: r = BTF; break; // TF - case 0x10: r = AZ; break; // NOT EQUAL - case 0x11: r = AZ | AN; break; // GE - case 0x12: r = AZ | AN; break; // GT - case 0x13: r = AC; break; // NOT AC - case 0x14: r = AV; break; // NOT AV - case 0x15: r = MV; break; // NOT MV - case 0x16: r = MN; break; // NOT MS - case 0x17: r = SV; break; // NOT SV - case 0x18: r = SZ; break; // NOT SZ - case 0x1d: r = BTF; break; // NOT TF + case 0x00: r = AZ; break; // EQ + case 0x01: r = AZ | AV | AN | AF; break; // LT + case 0x02: r = AZ | AV | AN | AF; break; // LE + case 0x03: r = AC; break; // AC + case 0x04: r = AV; break; // AV + case 0x05: r = MV; break; // MV + case 0x06: r = MN; break; // MS + case 0x07: r = SV; break; // SV + case 0x08: r = SZ; break; // SZ + case 0x0d: r = BTF; break; // TF + case 0x10: r = AZ; break; // NOT EQUAL + case 0x11: r = AZ | AV | AN | AF; break; // GE + case 0x12: r = AZ | AV | AN | AF; break; // GT + case 0x13: r = AC; break; // NOT AC + case 0x14: r = AV; break; // NOT AV + case 0x15: r = MV; break; // NOT MV + case 0x16: r = MN; break; // NOT MS + case 0x17: r = SV; break; // NOT SV + case 0x18: r = SZ; break; // NOT SZ + case 0x1d: r = BTF; break; // NOT TF } return r; @@ -323,6 +329,7 @@ void adsp21062_device::static_generate_memory_accessors() uml::code_label const space_access = label++; uml::code_label const sram_short = label++; uml::code_label const sram_short_block1 = label++; + uml::code_label const sram_short_sext = label++; UML_HANDLE(block, *m_dm_read32); UML_CMP(block, I1, 0x20000); @@ -351,10 +358,16 @@ void adsp21062_device::static_generate_memory_accessors() UML_JMPc(block, COND_NZ, sram_short_block1); UML_AND(block, I1, I1, (m_blocks[0].length() << 1) - 1); UML_LOAD(block, I0, &m_blocks[0][0], I1, SIZE_WORD, SCALE_x2); + UML_TEST(block, MODE1, MODE1_SSE); + UML_JMPc(block, COND_NZ, sram_short_sext); UML_RET(block); UML_LABEL(block, sram_short_block1); UML_AND(block, I1, I1, (m_blocks[0].length() << 1) - 1); UML_LOAD(block, I0, &m_blocks[1][0], I1, SIZE_WORD, SCALE_x2); + UML_TEST(block, MODE1, MODE1_SSE); + UML_RETc(block, COND_Z); + UML_LABEL(block, sram_short_sext); + UML_SEXT(block, I0, I0, SIZE_WORD); UML_RET(block); } @@ -426,7 +439,7 @@ void adsp21062_device::static_generate_push_pc() UML_MOV(block, I1, PCSTKP); UML_CMP(block, I1, 30); UML_JMPc(block, COND_B, no_overflow); - UML_CALLC(block, cfunc_pcstack_overflow, this); + UML_CALLC(block, cfuncs::pcstack_overflow, this); UML_LABEL(block, no_overflow); // store the top-of-stack pseudo-register if the stack isn't empty @@ -469,7 +482,7 @@ void adsp21062_device::static_generate_pop_pc() UML_SUB(block, I1, PCSTKP, 1); UML_MOV(block, I0, PCSTK); UML_JMPc(block, COND_AE, no_underflow); - UML_CALLC(block, cfunc_pcstack_underflow, this); + UML_CALLC(block, cfuncs::pcstack_underflow, this); UML_LABEL(block, no_underflow); UML_MOV(block, PCSTKP, I1); @@ -507,7 +520,7 @@ void adsp21062_device::static_generate_push_loop() UML_MOV(block, I1, LSTKP); UML_CMP(block, I1, 6); UML_JMPc(block, COND_B, no_overflow); - UML_CALLC(block, cfunc_loopstack_overflow, this); + UML_CALLC(block, cfuncs::loopstack_overflow, this); UML_LABEL(block, no_overflow); // store the top-of-stack pseudo-registers if the stack isn't empty @@ -556,7 +569,7 @@ void adsp21062_device::static_generate_pop_loop() // check for stack underflow UML_SUB(block, I0, LSTKP, 1); UML_JMPc(block, COND_NS, no_underflow); - UML_CALLC(block, cfunc_loopstack_underflow, this); + UML_CALLC(block, cfuncs::loopstack_underflow, this); UML_LABEL(block, no_underflow); UML_MOV(block, LSTKP, I0); @@ -600,7 +613,7 @@ void adsp21062_device::static_generate_push_status() UML_ADD(block, I2, mem(&m_core->status_stkp), 1); UML_CMP(block, I2, 5); UML_JMPc(block, COND_B, no_overflow); - UML_CALLC(block, cfunc_statusstack_overflow, this); + UML_CALLC(block, cfuncs::statusstack_overflow, this); UML_LABEL(block, no_overflow); UML_MOV(block, mem(&m_core->status_stkp), I2); UML_AND(block, STKY, STKY, ~SSEM); @@ -645,7 +658,7 @@ void adsp21062_device::static_generate_pop_status() UML_SUB(block, I2, mem(&m_core->status_stkp), 1); UML_JMPc(block, COND_NS, no_underflow); - UML_CALLC(block, cfunc_statusstack_underflow, this); + UML_CALLC(block, cfuncs::statusstack_underflow, this); UML_LABEL(block, no_underflow); UML_MOV(block, mem(&m_core->status_stkp), I2); UML_JMPc(block, COND_NZ, do_load); @@ -675,29 +688,34 @@ void adsp21062_device::static_generate_pop_status() UML_MOV(block, MODE1, I0); // DAG1 regs 4-7 - UML_TEST(block, I2, 0x8); // don't swap if the bits are same + UML_TEST(block, I2, MODE1_SRD1H); // don't swap if the bits are same UML_CALLHc(block, COND_NZ, *m_swap_dag1_4_7); // DAG1 regs 0-3 - UML_TEST(block, I2, 0x10); // don't swap if the bits are same + UML_TEST(block, I2, MODE1_SRD1L); // don't swap if the bits are same UML_CALLHc(block, COND_NZ, *m_swap_dag1_0_3); // DAG2 regs 4-7 - UML_TEST(block, I2, 0x20); // don't swap if the bits are same + UML_TEST(block, I2, MODE1_SRD2H); // don't swap if the bits are same UML_CALLHc(block, COND_NZ, *m_swap_dag2_4_7); // DAG2 regs 0-3 - UML_TEST(block, I2, 0x40); // don't swap if the bits are same + UML_TEST(block, I2, MODE1_SRD2L); // don't swap if the bits are same UML_CALLHc(block, COND_NZ, *m_swap_dag2_0_3); // REG 8-15 - UML_TEST(block, I2, 0x80); // don't swap if the bits are same + UML_TEST(block, I2, MODE1_SRRFH); // don't swap if the bits are same UML_CALLHc(block, COND_NZ, *m_swap_r8_15); // REG 0-7 - UML_TEST(block, I2, 0x400); // don't swap if the bits are same + UML_TEST(block, I2, MODE1_SRRFL); // don't swap if the bits are same UML_CALLHc(block, COND_NZ, *m_swap_r0_7); + // short word sign extension + UML_TEST(block, I2, MODE1_SSE); // don't update if the bits are the same + UML_RETc(block, COND_Z); + UML_CALLC(block, cfuncs::update_sse, this); + UML_RET(block); block.end(); @@ -1147,10 +1165,14 @@ void adsp21062_device::compile_block(offs_t pc) { compiler_state compiler; + opcode_desc const *const desclist = m_drcfe->describe_code(pc); + if (m_drcuml->logging()) + { + sharc_disassembler const disassembler; + log_descriptions(disassembler, desclist, 0); + } + bool override = false; - - const opcode_desc *const desclist = m_drcfe->describe_code(pc); - bool succeeded = false; while (!succeeded) { @@ -1161,6 +1183,10 @@ void adsp21062_device::compile_block(offs_t pc) const opcode_desc *seqlast = nullptr; for (const opcode_desc *seqhead = desclist; seqhead; seqhead = seqlast->next()) { + // add a code log entry + if (m_drcuml->logging()) + block.append_comment("-------------------------"); + // determine the last instruction in this sequence seqlast = seqhead; while (seqlast && !seqlast->end_sequence()) @@ -1230,6 +1256,62 @@ void adsp21062_device::compile_block(offs_t pc) } +void adsp21062_device::log_descriptions(const sharc_disassembler &disassembler, const opcode_desc *desc_list, unsigned indent) +{ + util::ovectorstream buffer; + buffer.imbue(std::locale::classic()); + + // assume no indent is the start of a sequence and needs a heading + if (!indent) + m_drcuml->log_printf("\nDescriptor list @ %08X\n", desc_list->pc); + + for ( ; desc_list; desc_list = desc_list->next()) + { + buffer.clear(); + buffer.seekp(0); + desc_list->log_flags(buffer); + buffer.put('\0'); + + m_drcuml->log_printf("%08X t:%08X f:%s: ", desc_list->pc, desc_list->targetpc, &buffer.vec()[0]); + + // disassemble the current instruction and output it to the log + buffer.clear(); + buffer.seekp(0); + util::stream_format(buffer, "%*s", 4 * indent, ""); + if (desc_list->virtual_noop()) + buffer << ""; + else + disassembler.disassemble_one(buffer, desc_list->pc, desc_list->opptr); + buffer.put('\0'); + m_drcuml->log_printf( + (desc_list->regin.any() || desc_list->regout.any()) ? "%-48s" : "%s", + &buffer.vec()[0]); + + // output register dependencies + buffer.clear(); + buffer.seekp(0); + if (desc_list->regin.any()) + { + desc_list->log_registers_used(buffer); + if (desc_list->regout.any()) + buffer << ' '; + } + if (desc_list->regout.any()) + desc_list->log_registers_modified(buffer); + buffer.put('\0'); + m_drcuml->log_printf("%s\n", &buffer.vec()[0]); + + // if we have a delay slot, output it recursively + if (desc_list->delay.first()) + log_descriptions(disassembler, desc_list->delay.first(), indent + 1); + + // at the end of a sequence add a dividing line + if (desc_list->end_sequence()) + m_drcuml->log_printf("-----\n"); + } +} + + void adsp21062_device::generate_invariant() { try @@ -1359,20 +1441,20 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil // log_add_disasm_comment(block, desc->pc, desc->opptr); /* set the PC map variable */ - UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc + UML_MAPVAR(block, MAPVAR_PC, desc->pc); /* accumulate total cycles */ compiler.cycles += 1; /* update the icount map variable */ - UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles + UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); /* if we are debugging, call the debugger */ if (debugger_enabled()) { - UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - save_fast_iregs(block); // - UML_DEBUG(block, desc->pc); // debug desc->pc + UML_MOV(block, mem(&m_core->pc), desc->pc); + save_fast_iregs(block); + UML_DEBUG(block, desc->pc); } // handle a special case where call is used as the last operation in a loop @@ -1384,7 +1466,7 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil /* if this is an invalid opcode, generate the exception now */ // if (desc->invalid_opcode()) -// UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000 +// UML_EXH(block, *m_exception[EXCEPTION_PROGRAM], 0x80000); /* unless this is a virtual no-op, it's a regular instruction */ if (!desc->virtual_noop()) @@ -1392,9 +1474,9 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil /* compile the instruction */ if (!generate_opcode(block, compiler, desc)) { - UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc - UML_DMOV(block, mem(&m_core->arg64), desc->opptr); // dmov [arg64],*desc->opptr - UML_CALLC(block, cfunc_unimplemented, this); // callc cfunc_unimplemented,ppc + UML_MOV(block, mem(&m_core->pc), desc->pc); + UML_DMOV(block, mem(&m_core->arg64), desc->opptr); + UML_CALLC(block, cfuncs::unimplemented, this); } } @@ -1498,38 +1580,47 @@ void adsp21062_device::generate_update_cycles(drcuml_block &block, compiler_stat void adsp21062_device::generate_write_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data) { // TODO: swap effects - if (data & 0x1) + if (data & MODE1_BR8) fatalerror("generate_write_mode1_imm: tried to enable I8 bit reversing"); - if (data & 0x2) + if (data & MODE1_BR0) fatalerror("generate_write_mode1_imm: tried to enable I0 bit reversing"); - if (data & 0x4) + if (data & MODE1_SRCU) fatalerror("generate_write_mode1_imm: tried to enable MR alternate"); + uml::code_label const skip_sse = compiler.labelnum++; + + UML_MOV(block, I2, MODE1); + UML_MOV(block, MODE1, data); + // DAG1 regs 4-7 - UML_TEST(block, MODE1, 0x8); // don't swap if the bits are same - UML_CALLHc(block, (data & 0x8) ? COND_Z : COND_NZ, *m_swap_dag1_4_7); + UML_TEST(block, I2, MODE1_SRD1H); // don't swap if the bits are same + UML_CALLHc(block, (data & MODE1_SRD1H) ? COND_Z : COND_NZ, *m_swap_dag1_4_7); // DAG1 regs 0-3 - UML_TEST(block, MODE1, 0x10); // don't swap if the bits are same - UML_CALLHc(block, (data & 0x10) ? COND_Z : COND_NZ, *m_swap_dag1_0_3); + UML_TEST(block, I2, MODE1_SRD1L); // don't swap if the bits are same + UML_CALLHc(block, (data & MODE1_SRD1L) ? COND_Z : COND_NZ, *m_swap_dag1_0_3); // DAG2 regs 4-7 - UML_TEST(block, MODE1, 0x20); // don't swap if the bits are same - UML_CALLHc(block, (data & 0x20) ? COND_Z : COND_NZ, *m_swap_dag2_4_7); + UML_TEST(block, I2, MODE1_SRD2H); // don't swap if the bits are same + UML_CALLHc(block, (data & MODE1_SRD2H) ? COND_Z : COND_NZ, *m_swap_dag2_4_7); // DAG2 regs 0-3 - UML_TEST(block, MODE1, 0x40); // don't swap if the bits are same - UML_CALLHc(block, (data & 0x40) ? COND_Z : COND_NZ, *m_swap_dag2_0_3); + UML_TEST(block, I2, MODE1_SRD2L); // don't swap if the bits are same + UML_CALLHc(block, (data & MODE1_SRD2L) ? COND_Z : COND_NZ, *m_swap_dag2_0_3); // REG 8-15 - UML_TEST(block, MODE1, 0x80); // don't swap if the bits are same - UML_CALLHc(block, (data & 0x80) ? COND_Z : COND_NZ, *m_swap_r8_15); + UML_TEST(block, I2, MODE1_SRRFH); // don't swap if the bits are same + UML_CALLHc(block, (data & MODE1_SRRFH) ? COND_Z : COND_NZ, *m_swap_r8_15); // REG 0-7 - UML_TEST(block, MODE1, 0x400); // don't swap if the bits are same - UML_CALLHc(block, (data & 0x400) ? COND_Z : COND_NZ, *m_swap_r0_7); + UML_TEST(block, I2, MODE1_SRRFL); // don't swap if the bits are same + UML_CALLHc(block, (data & MODE1_SRRFL) ? COND_Z : COND_NZ, *m_swap_r0_7); - UML_MOV(block, MODE1, data); + // short word sign extension + UML_TEST(block, I2, MODE1_SSE); // don't update if the bits are same + UML_JMPc(block, (data & MODE1_SSE) ? COND_NZ : COND_Z, skip_sse); + UML_CALLC(block, cfuncs::update_sse, this); + UML_LABEL(block, skip_sse); } void adsp21062_device::generate_set_mode1_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t data) @@ -2057,7 +2148,7 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & UML_AND(block, I0, I0, 0x1f); UML_CMP(block, I0, 31); UML_JMPc(block, COND_B, no_overflow); - UML_CALLC(block, cfunc_pcstack_overflow, this); + UML_CALLC(block, cfuncs::pcstack_overflow, this); UML_LABEL(block, no_overflow); UML_CMP(block, I1, I0); UML_JMPc(block, COND_E, done); @@ -2124,19 +2215,19 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & UML_AND(block, I1, I1, imm ? data : I0); UML_TEST(block, I1, 1 << (15 + 0)); UML_JMPc(block, COND_Z, skip0); - UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_CALLC(block, cfuncs::update_flag_out<0>, this); UML_LABEL(block, skip0); UML_TEST(block, I1, 1 << (15 + 1)); UML_JMPc(block, COND_Z, skip1); - UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_CALLC(block, cfuncs::update_flag_out<1>, this); UML_LABEL(block, skip1); UML_TEST(block, I1, 1 << (15 + 2)); UML_JMPc(block, COND_Z, skip2); - UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_CALLC(block, cfuncs::update_flag_out<2>, this); UML_LABEL(block, skip2); UML_TEST(block, I1, 1 << (15 + 3)); UML_JMPc(block, COND_Z, skip3); - UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_CALLC(block, cfuncs::update_flag_out<3>, this); UML_LABEL(block, skip3); break; } @@ -2208,19 +2299,19 @@ void adsp21062_device::generate_write_ureg(drcuml_block &block, compiler_state & UML_AND(block, I0, I0, I1); UML_TEST(block, I0, FLG0); UML_JMPc(block, COND_Z, skip0); - UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_CALLC(block, cfuncs::update_flag_out<0>, this); UML_LABEL(block, skip0); UML_TEST(block, I0, FLG1); UML_JMPc(block, COND_Z, skip1); - UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_CALLC(block, cfuncs::update_flag_out<1>, this); UML_LABEL(block, skip1); UML_TEST(block, I0, FLG2); UML_JMPc(block, COND_Z, skip2); - UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_CALLC(block, cfuncs::update_flag_out<2>, this); UML_LABEL(block, skip2); UML_TEST(block, I0, FLG3); UML_JMPc(block, COND_Z, skip3); - UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_CALLC(block, cfuncs::update_flag_out<3>, this); UML_LABEL(block, skip3); break; } @@ -2814,7 +2905,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, 1 << (15 + 0)); UML_JMPc(block, COND_NZ, skip); - UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_CALLC(block, cfuncs::update_flag_out<0>, this); UML_LABEL(block, skip); } if (BIT(data, 15 + 1)) @@ -2822,7 +2913,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, 1 << (15 + 1)); UML_JMPc(block, COND_NZ, skip); - UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_CALLC(block, cfuncs::update_flag_out<1>, this); UML_LABEL(block, skip); } if (BIT(data, 15 + 2)) @@ -2830,7 +2921,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, 1 << (15 + 2)); UML_JMPc(block, COND_NZ, skip); - UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_CALLC(block, cfuncs::update_flag_out<2>, this); UML_LABEL(block, skip); } if (BIT(data, 15 + 3)) @@ -2838,7 +2929,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, 1 << (15 + 3)); UML_JMPc(block, COND_NZ, skip); - UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_CALLC(block, cfuncs::update_flag_out<3>, this); UML_LABEL(block, skip); } } @@ -2897,7 +2988,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG0); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_CALLC(block, cfuncs::update_flag_out<0>, this); UML_LABEL(block, skip); } if (data & FLG1) @@ -2905,7 +2996,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG1); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_CALLC(block, cfuncs::update_flag_out<1>, this); UML_LABEL(block, skip); } if (data & FLG2) @@ -2913,7 +3004,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG2); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_CALLC(block, cfuncs::update_flag_out<2>, this); UML_LABEL(block, skip); } if (data & FLG3) @@ -2921,7 +3012,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG3); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_CALLC(block, cfuncs::update_flag_out<3>, this); UML_LABEL(block, skip); } if (data & 0xff000000) @@ -3009,7 +3100,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG0); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<0>, this); + UML_CALLC(block, cfuncs::update_flag_out<0>, this); UML_LABEL(block, skip); } if (data & FLG1) @@ -3017,7 +3108,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG1); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<1>, this); + UML_CALLC(block, cfuncs::update_flag_out<1>, this); UML_LABEL(block, skip); } if (data & FLG2) @@ -3025,7 +3116,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG2); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<2>, this); + UML_CALLC(block, cfuncs::update_flag_out<2>, this); UML_LABEL(block, skip); } if (data & FLG3) @@ -3033,7 +3124,7 @@ bool adsp21062_device::generate_opcode(drcuml_block &block, compiler_state &comp uml::code_label const skip = compiler.labelnum++; UML_TEST(block, I0, FLG3); UML_JMPc(block, COND_Z, skip); - UML_CALLC(block, cfunc_update_flag_out<3>, this); + UML_CALLC(block, cfuncs::update_flag_out<3>, this); UML_LABEL(block, skip); } if (data & 0xff000000) @@ -3785,7 +3876,7 @@ void adsp21062_device::generate_unimplemented_compute(drcuml_block &block, compi { UML_MOV(block, mem(&m_core->pc), desc->pc); UML_DMOV(block, mem(&m_core->arg64), desc->opptr); - UML_CALLC(block, cfunc_unimplemented_compute, this); + UML_CALLC(block, cfuncs::unimplemented_compute, this); } void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) @@ -5628,7 +5719,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block &block, compiler_state &c case 0x1b: // Rn = Rn OR FDEP Rx BY : (SE) UML_MOV(block, mem(&m_core->pc), desc->pc); UML_DMOV(block, mem(&m_core->arg64), desc->opptr); - UML_CALLC(block, cfunc_unimplemented_shiftimm, this); + UML_CALLC(block, cfuncs::unimplemented_shiftimm, this); break; case 0x00: // LSHIFT Rx BY @@ -5804,7 +5895,7 @@ void adsp21062_device::generate_shift_imm(drcuml_block &block, compiler_state &c default: UML_MOV(block, mem(&m_core->pc), desc->pc); UML_DMOV(block, mem(&m_core->arg64), desc->opptr); - UML_CALLC(block, cfunc_unimplemented_compute, this); + UML_CALLC(block, cfuncs::unimplemented_compute, this); return; } } diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp index 52f0a115bc1..387fe457eae 100644 --- a/src/devices/cpu/sharc/sharcfe.cpp +++ b/src/devices/cpu/sharc/sharcfe.cpp @@ -14,6 +14,133 @@ #include "cpu/drcfe.ipp" +#include + + +void adsp21062_device::opcode_desc::log_flags(std::ostream &stream) const +{ + // branches + if (is_unconditional_branch()) + stream << 'U'; + else if (is_conditional_branch()) + stream << 'C'; + else + stream << '.'; + + // intrablock branches + stream << (intrablock_branch() ? 'i' : '.'); + + // branch targets + stream << (is_branch_target() ? 'B' : '.'); + + // delay slots + stream << (in_delay_slot() ? 'D' : '.'); + + // exceptions + if (will_cause_exception()) + stream << 'E'; + else if (can_cause_exception()) + stream << 'e'; + else + stream << '.'; + + // read/write + if (reads_memory()) + stream << (writes_memory() ? '+' : 'R'); + else if (writes_memory()) + stream << 'W'; + else + stream << '.'; + + // TLB validation + stream << (validate_tlb() ? 'V' : '.'); + + // redispatch + stream << (redispatch() ? 'R' : '.'); +} + +void adsp21062_device::opcode_desc::log_registers_used(std::ostream &stream) const +{ + stream << "[use:"; + log_register_list(stream, regin, nullptr); + stream << ']'; +} + +void adsp21062_device::opcode_desc::log_registers_modified(std::ostream &stream) const +{ + stream << "[mod:"; + log_register_list(stream, regout, ®req); + stream << ']'; +} + +void adsp21062_device::opcode_desc::log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist) +{ + int count = 0; + + for (int regnum = 0; regnum < 16; regnum++) + { + if (reglist[REG_R0 + regnum]) + { + if (count++) + stream << ','; + stream << 'R' << regnum; + if (regnostarlist && !(*regnostarlist)[REG_R0 + regnum]) + stream << '*'; + } + } + + const auto log_bit = + [&stream, &count, ®list, ®nostarlist] (size_t bit, const char *name) + { + if (reglist[bit]) + { + if (count++) + stream << ','; + stream << name; + if (regnostarlist && !(*regnostarlist)[bit]) + stream << '*'; + } + }; + + log_bit(REG_AZ, "AZ"); + log_bit(REG_AV, "AV"); + log_bit(REG_AN, "AN"); + log_bit(REG_AC, "AC"); + log_bit(REG_AS, "AS"); + log_bit(REG_AI, "AI"); + log_bit(REG_MN, "MN"); + log_bit(REG_MV, "MV"); + log_bit(REG_MU, "MU"); + log_bit(REG_MI, "MI"); + log_bit(REG_AF, "AF"); + log_bit(REG_SV, "SV"); + log_bit(REG_SZ, "SZ"); + log_bit(REG_SS, "SS"); + log_bit(REG_BTF, "BTF"); + + auto const log_dag = + [&stream, &count, ®list, ®nostarlist] (size_t d, size_t p, char name) + { + for (int regnum = 0; regnum < 16; regnum++) + { + size_t const bit = ((regnum < 8) ? d : p) + (regnum & 0x7); + if (reglist[bit]) + { + if (count++) + stream << ','; + stream << name << regnum; + if (regnostarlist && !(*regnostarlist)[bit]) + stream << '*'; + } + } + }; + + log_dag(REG_DM_I0, REG_PM_I0, 'I'); + log_dag(REG_DM_M0, REG_PM_M0, 'M'); + log_dag(REG_DM_L0, REG_PM_L0, 'L'); + log_dag(REG_DM_B0, REG_PM_B0, 'B'); +} + adsp21062_device::frontend::frontend(adsp21062_device *sharc, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) : drc_frontend_base(sharc->space_config(AS_PROGRAM)->page_shift(), window_start, window_end, max_sequence) @@ -70,11 +197,12 @@ void adsp21062_device::frontend::insert_loop(const LOOP_DESCRIPTOR &loopdesc) opcode_desc::extra_flags userflags; userflags.reset(); if (flags & AZ) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AZ); } - if (flags & AN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AN); } if (flags & AV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AV); } + if (flags & AN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AN); } if (flags & AC) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AC); } if (flags & MN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_MN); } if (flags & MV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_MV); } + if (flags & AF) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AF); } if (flags & SV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_SV); } if (flags & SZ) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_SZ); } if (flags & BTF) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_BTF); } @@ -513,76 +641,31 @@ bool adsp21062_device::frontend::describe(opcode_desc &desc, const opcode_desc * if (data & MV) desc.set_mv_modified(); if (data & MU) desc.set_mu_modified(); if (data & MI) desc.set_mi_modified(); + if (data & AF) desc.set_af_modified(); if (data & SV) desc.set_sv_modified(); if (data & SZ) desc.set_sz_modified(); if (data & SS) desc.set_ss_modified(); if (data & BTF) desc.set_btf_modified(); - if (data & AF) desc.set_af_modified(); } break; case 2: // TOGGLE if (sreg == 0x7c) // ASTAT { - if (data & AZ) - { - desc.set_az_used(); desc.set_az_modified(); - } - if (data & AV) - { - desc.set_av_used(); desc.set_av_modified(); - } - if (data & AN) - { - desc.set_an_used(); desc.set_an_modified(); - } - if (data & AC) - { - desc.set_ac_used(); desc.set_ac_modified(); - } - if (data & AS) - { - desc.set_as_used(); desc.set_as_modified(); - } - if (data & AI) - { - desc.set_ai_used(); desc.set_ai_modified(); - } - if (data & MN) - { - desc.set_mn_used(); desc.set_mn_modified(); - } - if (data & MV) - { - desc.set_mv_used(); desc.set_mv_modified(); - } - if (data & MU) - { - desc.set_mu_used(); desc.set_mu_modified(); - } - if (data & MI) - { - desc.set_mi_used(); desc.set_mi_modified(); - } - if (data & SV) - { - desc.set_sv_used(); desc.set_sv_modified(); - } - if (data & SZ) - { - desc.set_sz_used(); desc.set_sz_modified(); - } - if (data & SS) - { - desc.set_ss_used(); desc.set_ss_modified(); - } - if (data & BTF) - { - desc.set_btf_used(); desc.set_btf_modified(); - } - if (data & AF) - { - desc.set_af_used(); desc.set_af_modified(); - } + if (data & AZ) { desc.set_az_used(); desc.set_az_modified(); } + if (data & AV) { desc.set_av_used(); desc.set_av_modified(); } + if (data & AN) { desc.set_an_used(); desc.set_an_modified(); } + if (data & AC) { desc.set_ac_used(); desc.set_ac_modified(); } + if (data & AS) { desc.set_as_used(); desc.set_as_modified(); } + if (data & AI) { desc.set_ai_used(); desc.set_ai_modified(); } + if (data & MN) { desc.set_mn_used(); desc.set_mn_modified(); } + if (data & MV) { desc.set_mv_used(); desc.set_mv_modified(); } + if (data & MU) { desc.set_mu_used(); desc.set_mu_modified(); } + if (data & MI) { desc.set_mi_used(); desc.set_mi_modified(); } + if (data & AF) { desc.set_af_used(); desc.set_af_modified(); } + if (data & SV) { desc.set_sv_used(); desc.set_sv_modified(); } + if (data & SZ) { desc.set_sz_used(); desc.set_sz_modified(); } + if (data & SS) { desc.set_ss_used(); desc.set_ss_modified(); } + if (data & BTF) { desc.set_btf_used(); desc.set_btf_modified(); } } break; @@ -1376,7 +1459,6 @@ bool adsp21062_device::frontend::describe_compute(opcode_desc &desc, uint64_t op case 0xb6: // MRB = MRB + Rx * Ry (SSI) case 0xbe: // MRB = MRB + Rx * Ry (SSF) case 0xbf: // MRB = MRB + Rx * Ry (SSFR) - break; // TODO: track MRB? desc.set_reg_used(rx); desc.set_reg_used(ry); @@ -1690,8 +1772,8 @@ bool adsp21062_device::frontend::describe_ureg_access(opcode_desc &desc, int reg if (access == UREG_READ) { desc.set_az_used(); - desc.set_an_used(); desc.set_av_used(); + desc.set_an_used(); desc.set_ac_used(); desc.set_as_used(); desc.set_ai_used(); @@ -1699,11 +1781,11 @@ bool adsp21062_device::frontend::describe_ureg_access(opcode_desc &desc, int reg desc.set_mv_used(); desc.set_mu_used(); desc.set_mi_used(); + desc.set_af_used(); desc.set_sv_used(); desc.set_sz_used(); desc.set_ss_used(); desc.set_btf_used(); - desc.set_af_used(); } else { @@ -1711,7 +1793,6 @@ bool adsp21062_device::frontend::describe_ureg_access(opcode_desc &desc, int reg desc.set_mult_flags_modified(); desc.set_shift_flags_modified(); desc.set_btf_modified(); - desc.set_af_modified(); } break; @@ -1782,8 +1863,8 @@ void adsp21062_device::frontend::describe_if_condition(opcode_desc &desc, int co switch (condition) { case 0x00: desc.set_az_used(); break; // EQ - case 0x01: desc.set_az_used(); desc.set_an_used(); break; // LT - case 0x02: desc.set_az_used(); desc.set_an_used(); break; // LE + case 0x01: desc.set_az_used(); desc.set_av_used(); desc.set_an_used(); desc.set_af_used(); break; // LT + case 0x02: desc.set_az_used(); desc.set_av_used(); desc.set_an_used(); desc.set_af_used(); break; // LE case 0x03: desc.set_ac_used(); break; // AC case 0x04: desc.set_av_used(); break; // AV case 0x05: desc.set_mv_used(); break; // MV @@ -1792,8 +1873,8 @@ void adsp21062_device::frontend::describe_if_condition(opcode_desc &desc, int co case 0x08: desc.set_sz_used(); break; // SZ case 0x0d: desc.set_btf_used(); break; // TF case 0x10: desc.set_az_used(); break; // NOT EQUAL - case 0x11: desc.set_az_used(); desc.set_an_used(); break; // GE - case 0x12: desc.set_az_used(); desc.set_an_used(); break; // GT + case 0x11: desc.set_az_used(); desc.set_av_used(); desc.set_an_used(); desc.set_af_used(); break; // GE + case 0x12: desc.set_az_used(); desc.set_av_used(); desc.set_an_used(); desc.set_af_used(); break; // GT case 0x13: desc.set_ac_used(); break; // NOT AC case 0x14: desc.set_av_used(); break; // NOT AV case 0x15: desc.set_mv_used(); break; // NOT MV diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h index a3493d9cd91..0888b1ed01b 100644 --- a/src/devices/cpu/sharc/sharcfe.h +++ b/src/devices/cpu/sharc/sharcfe.h @@ -17,6 +17,7 @@ #include #include +#include class adsp21062_device::opcode_desc : public opcode_desc_base @@ -26,11 +27,12 @@ public: { LOOP = 0, ASTAT_DELAY_COPY_AZ, + ASTAT_DELAY_COPY_AV, ASTAT_DELAY_COPY_AN, ASTAT_DELAY_COPY_AC, - ASTAT_DELAY_COPY_AV, ASTAT_DELAY_COPY_MV, ASTAT_DELAY_COPY_MN, + ASTAT_DELAY_COPY_AF, ASTAT_DELAY_COPY_SV, ASTAT_DELAY_COPY_SZ, ASTAT_DELAY_COPY_BTF, @@ -69,6 +71,8 @@ public: void set_mu_modified() { regout.set(REG_MU); } void set_mi_used() { regin.set(REG_MI); } void set_mi_modified() { regout.set(REG_MI); } + void set_af_used() { regin.set(REG_AF); } + void set_af_modified() { regout.set(REG_AF); } void set_sv_used() { regin.set(REG_SV); } void set_sv_modified() { regout.set(REG_SV); } void set_sz_used() { regin.set(REG_SZ); } @@ -77,35 +81,34 @@ public: void set_ss_modified() { regout.set(REG_SS); } void set_btf_used() { regin.set(REG_BTF); } void set_btf_modified() { regout.set(REG_BTF); } - void set_af_used() { regin.set(REG_AF); } - void set_af_modified() { regout.set(REG_AF); } - - void set_pm_i_used(unsigned x) { regin.set(REG_PM_I0 + x); } - void set_pm_i_modified(unsigned x) { regout.set(REG_PM_I0 + x); } - void set_pm_m_used(unsigned x) { regin.set(REG_PM_M0 + x); } - void set_pm_m_modified(unsigned x) { regout.set(REG_PM_M0 + x); } - void set_pm_b_used(unsigned x) { regin.set(REG_PM_B0 + x); } - void set_pm_b_modified(unsigned x) { regout.set(REG_PM_B0 + x); } - void set_pm_l_used(unsigned x) { regin.set(REG_PM_L0 + x); } - void set_pm_l_modified(unsigned x) { regout.set(REG_PM_L0 + x); } void set_dm_i_used(unsigned x) { regin.set(REG_DM_I0 + x); } void set_dm_i_modified(unsigned x) { regout.set(REG_DM_I0 + x); } void set_dm_m_used(unsigned x) { regin.set(REG_DM_M0 + x); } void set_dm_m_modified(unsigned x) { regout.set(REG_DM_M0 + x); } - void set_dm_b_used(unsigned x) { regin.set(REG_DM_B0 + x); } - void set_dm_b_modified(unsigned x) { regout.set(REG_DM_B0 + x); } void set_dm_l_used(unsigned x) { regin.set(REG_DM_L0 + x); } void set_dm_l_modified(unsigned x) { regout.set(REG_DM_L0 + x); } + void set_dm_b_used(unsigned x) { regin.set(REG_DM_B0 + x); } + void set_dm_b_modified(unsigned x) { regout.set(REG_DM_B0 + x); } + + void set_pm_i_used(unsigned x) { regin.set(REG_PM_I0 + x); } + void set_pm_i_modified(unsigned x) { regout.set(REG_PM_I0 + x); } + void set_pm_m_used(unsigned x) { regin.set(REG_PM_M0 + x); } + void set_pm_m_modified(unsigned x) { regout.set(REG_PM_M0 + x); } + void set_pm_l_used(unsigned x) { regin.set(REG_PM_L0 + x); } + void set_pm_l_modified(unsigned x) { regout.set(REG_PM_L0 + x); } + void set_pm_b_used(unsigned x) { regin.set(REG_PM_B0 + x); } + void set_pm_b_modified(unsigned x) { regout.set(REG_PM_B0 + x); } void set_alu_flags_modified() { set_az_modified(); - set_an_modified(); set_av_modified(); + set_an_modified(); set_ac_modified(); set_as_modified(); set_ai_modified(); + set_af_modified(); } void set_mult_flags_modified() @@ -118,8 +121,8 @@ public: void set_shift_flags_modified() { - set_sz_modified(); set_sv_modified(); + set_sz_modified(); set_ss_modified(); } @@ -133,11 +136,11 @@ public: bool mv_calc_required() const { return regreq[REG_MV] || in_delay_slot(); } bool mu_calc_required() const { return regreq[REG_MU] || in_delay_slot(); } bool mi_calc_required() const { return regreq[REG_MI] || in_delay_slot(); } + bool af_calc_required() const { return regreq[REG_AF] || in_delay_slot(); } bool sv_calc_required() const { return regreq[REG_SV] || in_delay_slot(); } bool sz_calc_required() const { return regreq[REG_SZ] || in_delay_slot(); } bool ss_calc_required() const { return regreq[REG_SS] || in_delay_slot(); } bool btf_calc_required() const { return regreq[REG_BTF] || in_delay_slot(); } - bool af_calc_required() const { return regreq[REG_AF] || in_delay_slot(); } void set_loop() { m_extra_flags.set(LOOP); } void set_astat_delay_copy_az() { m_extra_flags.set(ASTAT_DELAY_COPY_AZ); } @@ -182,6 +185,10 @@ public: m_extra_flags.reset(); } + void log_flags(std::ostream &stream) const; + void log_registers_used(std::ostream &stream) const; + void log_registers_modified(std::ostream &stream) const; + private: enum { @@ -197,25 +204,27 @@ private: REG_MV, REG_MU, REG_MI, + REG_AF, REG_SV, REG_SZ, REG_SS, REG_BTF, - REG_AF, - REG_PM_I0, - REG_PM_M0 = REG_PM_I0 + 8, - REG_PM_B0 = REG_PM_M0 + 8, - REG_PM_L0 = REG_PM_B0 + 8, - - REG_DM_I0 = REG_PM_L0 + 8, + REG_DM_I0, REG_DM_M0 = REG_DM_I0 + 8, - REG_DM_B0 = REG_DM_M0 + 8, - REG_DM_L0 = REG_DM_B0 + 8, + REG_DM_L0 = REG_DM_M0 + 8, + REG_DM_B0 = REG_DM_L0 + 8, - REG_COUNT = REG_DM_L0 + 8 + REG_PM_I0 = REG_DM_B0 + 8, + REG_PM_M0 = REG_PM_I0 + 8, + REG_PM_L0 = REG_PM_M0 + 8, + REG_PM_B0 = REG_PM_L0 + 8, + + REG_COUNT = REG_PM_B0 + 8 }; + static void log_register_list(std::ostream &stream, const regmask ®list, const regmask *regnostarlist); + extra_flags m_extra_flags; }; diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index eff2b6eb846..9c4956a5a2f 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -81,30 +81,30 @@ void adsp21062_device::add_systemreg_write_latency_effect(int sysreg, uint32_t d void adsp21062_device::systemreg_write_latency_effect() { - uint32_t data = m_core->systemreg_latency_data; - uint32_t old_data = m_core->systemreg_previous_data; + uint32_t const data = m_core->systemreg_latency_data; + uint32_t const old_data = m_core->systemreg_previous_data; switch (m_core->systemreg_latency_reg) { case 0xb: /* MODE1 */ { - uint32_t oldreg = old_data; + uint32_t const diff = data ^ old_data; m_core->mode1 = data; - if ((data & 0x1) != (oldreg & 0x1)) + if (diff & MODE1_BR8) { throw emu_fatalerror("%s: systemreg_latency_op: enable I8 bit-reversing", tag()); } - if ((data & 0x2) != (oldreg & 0x2)) + if (diff & MODE1_BR0) { throw emu_fatalerror("%s: systemreg_latency_op: enable I0 bit-reversing", tag()); } - if ((data & 0x4) != (oldreg & 0x4)) + if (diff & MODE1_SRCU) { throw emu_fatalerror("%s: systemreg_latency_op: enable MR alternate", tag()); } - if ((data & 0x8) != (oldreg & 0x8)) /* Switch DAG1 7-4 */ + if (diff & MODE1_SRD1H) // Switch DAG1 7-4 { using std::swap; swap(m_core->dag1.i[4], m_core->dag1_alt.i[4]); @@ -124,7 +124,7 @@ void adsp21062_device::systemreg_write_latency_effect() swap(m_core->dag1.b[6], m_core->dag1_alt.b[6]); swap(m_core->dag1.b[7], m_core->dag1_alt.b[7]); } - if ((data & 0x10) != (oldreg & 0x10)) /* Switch DAG1 3-0 */ + if (diff & MODE1_SRD1L) // Switch DAG1 3-0 { using std::swap; swap(m_core->dag1.i[0], m_core->dag1_alt.i[0]); @@ -144,7 +144,7 @@ void adsp21062_device::systemreg_write_latency_effect() swap(m_core->dag1.b[2], m_core->dag1_alt.b[2]); swap(m_core->dag1.b[3], m_core->dag1_alt.b[3]); } - if ((data & 0x20) != (oldreg & 0x20)) /* Switch DAG2 15-12 */ + if (diff & MODE1_SRD2H) // Switch DAG2 15-12 { using std::swap; swap(m_core->dag2.i[4], m_core->dag2_alt.i[4]); @@ -164,7 +164,7 @@ void adsp21062_device::systemreg_write_latency_effect() swap(m_core->dag2.b[6], m_core->dag2_alt.b[6]); swap(m_core->dag2.b[7], m_core->dag2_alt.b[7]); } - if ((data & 0x40) != (oldreg & 0x40)) /* Switch DAG2 11-8 */ + if (diff & MODE1_SRD2L) // Switch DAG2 11-8 { using std::swap; swap(m_core->dag2.i[0], m_core->dag2_alt.i[0]); @@ -184,18 +184,25 @@ void adsp21062_device::systemreg_write_latency_effect() swap(m_core->dag2.b[2], m_core->dag2_alt.b[2]); swap(m_core->dag2.b[3], m_core->dag2_alt.b[3]); } - if ((data & 0x80) != (oldreg & 0x80)) + if (diff & MODE1_SRRFH) { using std::swap; - for (int i=8; i<16; i++) + for (int i = 8; i < 16; i++) swap(m_core->r[i].r, m_core->reg_alt[i].r); } - if ((data & 0x400) != (oldreg & 0x400)) + if (diff & MODE1_SRRFL) { using std::swap; - for (int i=0; i<8; i++) + for (int i = 0; i < 8; i++) swap(m_core->r[i].r, m_core->reg_alt[i].r); } + if (diff & MODE1_SSE) // Short word sign extension + { + if (data & MODE1_SSE) + m_dm_short_view.select(0); + else + m_dm_short_view.disable(); + } break; } default: throw emu_fatalerror("%s: systemreg_latency_op: unknown register %02X at %08X\n", tag(), m_core->systemreg_latency_reg, m_core->pc); diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h index 1431fb3b638..f455546fc19 100644 --- a/src/devices/cpu/uml.h +++ b/src/devices/cpu/uml.h @@ -326,7 +326,8 @@ namespace uml { static parameter make_memory(void const *base) { return parameter(PTYPE_MEMORY, reinterpret_cast(const_cast(base))); } static parameter make_size(operand_size size) { assert(size >= SIZE_BYTE && size <= SIZE_QWORD); return parameter(PTYPE_SIZE, size); } static parameter make_string(char const *string) { return parameter(PTYPE_STRING, reinterpret_cast(const_cast(string))); } - static parameter make_cfunc(c_function func) { return parameter(PTYPE_C_FUNCTION, reinterpret_cast(func)); } + template static parameter make_cfunc(void (*func)(T *)) { return parameter(PTYPE_C_FUNCTION, parameter_value(reinterpret_cast(func))); } + template static parameter make_cfunc(void (*func)(T &)) { return parameter(PTYPE_C_FUNCTION, parameter_value(reinterpret_cast(func))); } static parameter make_rounding(float_rounding_mode mode) { assert(mode >= ROUND_TRUNC && mode <= ROUND_DEFAULT); return parameter(PTYPE_ROUNDING, mode); } // operators @@ -345,7 +346,7 @@ namespace uml { memory_space space() const { assert(m_type == PTYPE_SIZE_SPACE); return memory_space(m_value >> 4); } code_handle &handle() const { assert(m_type == PTYPE_CODE_HANDLE); return *reinterpret_cast(m_value); } code_label label() const { assert(m_type == PTYPE_CODE_LABEL); return code_label(m_value); } - c_function cfunc() const { assert(m_type == PTYPE_C_FUNCTION); return reinterpret_cast(m_value); } + c_function cfunc() const { assert(m_type == PTYPE_C_FUNCTION); return reinterpret_cast(uintptr_t(m_value)); } float_rounding_mode rounding() const { assert(m_type == PTYPE_ROUNDING); return float_rounding_mode(m_value); } char const *string() const { assert(m_type == PTYPE_STRING); return reinterpret_cast(m_value); } @@ -465,8 +466,8 @@ namespace uml { void callh(condition_t cond, code_handle &handle) { configure(OP_CALLH, 4, handle, cond); } void ret() { configure(OP_RET, 4); } void ret(condition_t cond) { configure(OP_RET, 4, cond); } - void callc(c_function func, void *ptr) { configure(OP_CALLC, 4, parameter::make_cfunc(func), parameter::make_memory(ptr)); } - void callc(condition_t cond, c_function func, void *ptr) { configure(OP_CALLC, 4, parameter::make_cfunc(func), parameter::make_memory(ptr), cond); } + template void callc(T func, void *ptr) { configure(OP_CALLC, 4, parameter::make_cfunc(func), parameter::make_memory(ptr)); } + template void callc(condition_t cond, T func, void *ptr) { configure(OP_CALLC, 4, parameter::make_cfunc(func), parameter::make_memory(ptr), cond); } void recover(parameter dst, parameter mapvar) { assert(mapvar.is_mapvar()); configure(OP_RECOVER, 4, dst, mapvar); } // internal register operations From 6dc72789fcee1251c6cf7e2b7acf717c7a9a6f22 Mon Sep 17 00:00:00 2001 From: ajrhacker Date: Fri, 6 Mar 2026 11:23:07 -0500 Subject: [PATCH 158/351] hd63450: Fix regression with device-to-memory byte transfers that broke X68K floppy loading --- src/devices/machine/hd63450.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/machine/hd63450.cpp b/src/devices/machine/hd63450.cpp index e6af8ab070d..5e9699a7084 100644 --- a/src/devices/machine/hd63450.cpp +++ b/src/devices/machine/hd63450.cpp @@ -374,7 +374,7 @@ void hd63450_device::single_transfer(int x) { case 0x00: // 8 bit case 0x30: // 8 bit unpacked - if (m_reg[x].dcr & 0x20) + if (!m_dma8_read[x].isunset()) { data = m_dma8_read[x](m_reg[x].mar); if (data == -1) From 78029e51faf272e74bcf73bb53f5ee9130e701a7 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 6 Mar 2026 18:45:07 +0100 Subject: [PATCH 159/351] bus/pci/trident_4dwavedx.cpp: fix unintended bug with hso range --- src/devices/bus/pci/sis6326.cpp | 5 +++-- src/devices/bus/pci/trident_4dwavedx.cpp | 4 ++-- src/devices/machine/pci.cpp | 2 +- src/devices/machine/vt82c598mvp.cpp | 3 ++- 4 files changed, 8 insertions(+), 6 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 0eca2a8c06a..ebe47a1e961 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -97,7 +97,8 @@ void sis6326_pci_device::device_reset() // doc makes multiple ninja jumps in messing up these defaults // bus master (hardwired) command = 0x0004; - command_mask = 0x23; + // palette snoop, uses bit 7 as r/w buffer + command_mask = 0xa3; // medium DEVSEL# // assume capability list & 66 MHz disabled in this variant status = 0x0200; @@ -589,7 +590,7 @@ void sis6326_agp_device::device_reset() // doc makes multiple ninja jumps in messing up these defaults // bus master (hardwired) command = 0x0004; - command_mask = 0x23; + command_mask = 0xa3; // medium DEVSEL#, 66 MHz capable, has capabilities list status = 0x0230; diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 6bbbd9e5c18..098635bc6cf 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -7,10 +7,10 @@ Trident 4DWAVE-DX / 4DWAVE-NX AC'97 v1.x (fixed 48 kHz) TODO: -- Fix loop repeats in wave engine (busmastering and/or actual FIFO); - Add delta sample rate; - Add mono, 8-bit and unsigned modes; - Missing features in Bank A (testable in dxdiag -> Music -> Trident PCI WaveTable MIDI); +- Move DMA reading out of sound_stream_update; - winamp has encoding issues with negative numbers (CPU core bug?); - Mix-in wave engine output to AC'97 input, upsample to 48 kHz there; - wavetsr.com can't find a free IRQ for SB emulation under DOS; @@ -635,7 +635,7 @@ void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) stream.add_int(1, sampindex, right * m_volR[channel.gvsel], 32768 << 6); channel.cso += 4; - if (channel.cso >= channel.hso * 4) + if (channel.cso >= channel.hso) { // MIDLP_IE if (BIT(m_global_control, 13)) diff --git a/src/devices/machine/pci.cpp b/src/devices/machine/pci.cpp index 4e44f47be00..8550a08c8bb 100644 --- a/src/devices/machine/pci.cpp +++ b/src/devices/machine/pci.cpp @@ -213,7 +213,7 @@ void pci_device::command_w(offs_t offset, uint16_t data, uint16_t mem_mask) mem_mask &= command_mask; COMBINE_DATA(&command); - logerror("command = %04x\n", command); + logerror("command = %04x (%04x & %04x)\n", command, data, command_mask); if ((old ^ command) & 3) remap_cb(); } diff --git a/src/devices/machine/vt82c598mvp.cpp b/src/devices/machine/vt82c598mvp.cpp index e4a4b1de109..2c078d2466a 100644 --- a/src/devices/machine/vt82c598mvp.cpp +++ b/src/devices/machine/vt82c598mvp.cpp @@ -514,7 +514,8 @@ void vt82c598mvp_bridge_device::device_reset() pci_bridge_device::device_reset(); command = 0x0007; - command_mask = 0x0047; + // has SERR# enable (bit 8), has parity error response (bit 6) + command_mask = 0x0147; // Medium DEVSEL#, 66 MHz Capable status = 0x0220; From 6f5638ef91d317dd4fa5251083fff90054281778 Mon Sep 17 00:00:00 2001 From: yz70s Date: Thu, 5 Mar 2026 21:41:51 +0100 Subject: [PATCH 160/351] xbox_pci.cpp: add another dsp56362 as the encode procesor dsp to the audio apu And when the dsps exit reset copy 24 bit words from pentium processor ram into dsp program ram --- src/mame/shared/xbox_pci.cpp | 75 +++++++++++++++++++++++++++++++++--- src/mame/shared/xbox_pci.h | 8 +++- 2 files changed, 77 insertions(+), 6 deletions(-) diff --git a/src/mame/shared/xbox_pci.cpp b/src/mame/shared/xbox_pci.cpp index b3ca5d7b356..abd90e2a060 100644 --- a/src/mame/shared/xbox_pci.cpp +++ b/src/mame/shared/xbox_pci.cpp @@ -1044,13 +1044,43 @@ void mcpx_apu_device::apu_mmio(address_map &map) void mcpx_apu_device::p_map(address_map &map) { - map(0xc00000, 0xc01fff).ram(); - //map(0x002000, 0x002fff).r(FUNC(mcpx_apu_device::test_r)); + map(0x000c00, 0x003fff).ram(); + map(0x100000, 0x02fffff).r(FUNC(mcpx_apu_device::program_memory_r)); +} + +// a routine to help you look at the contents of the scatter-gather memories +// for the global and encode processor dsps +uint32_t mcpx_apu_device::program_memory_r(offs_t offset) +{ + offs_t sub; + offs_t page; + u32 *sgblocks, *sgaddress; + + if (~offset & 0x100000) { + sub = 0; + sgblocks = &apust.gpdsp_sgblocks; + sgaddress = &apust.gpdsp_sgaddress; + } + else if (offset & 0x100000) { + sub = 0x100000; + sgblocks = &apust.epdsp_sgblocks; + sgaddress = &apust.epdsp_sgaddress; + } + else + return 0x0bad; + offset -= sub; + page = offset >> 10; + if (page >= *sgblocks) + return 0; + u32 page_address = apust.space->read_dword(*sgaddress + page * 2 * 4); + u32 opcode_dword = apust.space->read_dword(page_address + (offset & 0x3ff) * 4); + return opcode_dword & 0xffffff; } mcpx_apu_device::mcpx_apu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : pci_device(mconfig, MCPX_APU, tag, owner, clock), gpdsp(*this, "gpdsp"), + epdsp(*this, "epdsp"), cpu(*this, finder_base::DUMMY_TAG) { } @@ -1078,6 +1108,7 @@ void mcpx_apu_device::device_start() apust.timer = timer_alloc(FUNC(mcpx_apu_device::audio_update), this); apust.timer->enable(false); gpdsp->set_disable(); + epdsp->set_disable(); } void mcpx_apu_device::device_reset() @@ -1090,8 +1121,9 @@ void mcpx_apu_device::device_add_mconfig(machine_config &config) DSP56362(config, gpdsp, 10'000'000); gpdsp->set_hard_omr(0); // try to reset at 0xc00000 gpdsp->set_addrmap(dsp56362_device::AS_P, &mcpx_apu_device::p_map); - //m_dsp->set_addrmap(dsp56364_device::AS_X, &mcpx_apu_device::x_map); - //m_dsp->set_addrmap(dsp56364_device::AS_Y, &mcpx_apu_device::y_map); + DSP56362(config, epdsp, 10'000'000); + //epdsp->set_addrmap(dsp56364_device::AS_X, &mcpx_apu_device::x_map); + //epdsp->set_addrmap(dsp56364_device::AS_Y, &mcpx_apu_device::y_map); } TIMER_CALLBACK_MEMBER(mcpx_apu_device::audio_update) @@ -1142,6 +1174,10 @@ void mcpx_apu_device::apu_w(offs_t offset, uint32_t data, uint32_t mem_mask) apust.timer->enable(); apust.timer->adjust(attotime::from_msec(1), 0, attotime::from_msec(1)); } + if (offset == 0x02044 / 4) // address of memory area with information about blocks + apust.gpdsp_sgaddress2 = data; + if (offset == 0x020d8 / 4) // block count - 1 + apust.gpdsp_sgblocks2 = data; if (offset == 0x02048 / 4) // (epdsp scratch dma) apust.epdsp_sgaddress = data; if (offset == 0x020dc / 4) // (epdsp) @@ -1197,7 +1233,7 @@ void mcpx_apu_device::apu_w(offs_t offset, uint32_t data, uint32_t mem_mask) int16_t v0 = (int16_t)(data >> 16); // upper 16 bits as a signed 16 bit value float vv = ((float)v0) / 4096.0f; // divide by 4096 float vvv = powf(2, vv); // two to the vv - int f = vvv*48000.0f; // sample rate + int f = vvv * 48000.0f; // sample rate apust.voices_frequency[apust.voice_number] = f; return; } @@ -1231,6 +1267,35 @@ void mcpx_apu_device::apu_w(offs_t offset, uint32_t data, uint32_t mem_mask) return; if (offset == 0x20280 / 4) // hrtf headroom ? return; + if (offset == 0x3fffc / 4) { // some reset ? + LOGMASKED(LOG_AUDIO, "Audio_APU: reset %08X\n", data); + data = data & 0xf; + if (data == 3) + // copy 24 bit words from processor ram into dsp program ram + for (int b = 0; b < apust.gpdsp_sgblocks; b++) { + uint32_t page = apust.space->read_dword(apust.gpdsp_sgaddress + b * 8); + for (int w = 0; w < 1024; w++) { + v = apust.space->read_dword(page + w * 4); + v = v & 0xffffff; + gpdsp->space(dsp563xx_device::AS_P).write_dword(b * 1024 + w, v); + } + } + return; + } + if (offset == 0x5fffc / 4) { + LOGMASKED(LOG_AUDIO, "Audio_APU: reset %08X\n", data); + data = data & 0xf; + if (data == 3) + // copy 24 bit words from processor ram into dsp program ram + for (int b = 0; b < apust.epdsp_sgblocks; b++) { + uint32_t page = apust.space->read_dword(apust.epdsp_sgaddress + b * 8); + for (int w = 0; w < 1024; w++) { + v = apust.space->read_dword(page + w * 4); + v = v & 0xffffff; + epdsp->space(dsp563xx_device::AS_P).write_dword(b * 1024 + w, v); + } + } + } } /* diff --git a/src/mame/shared/xbox_pci.h b/src/mame/shared/xbox_pci.h index f34a818aeac..48f8edb2122 100644 --- a/src/mame/shared/xbox_pci.h +++ b/src/mame/shared/xbox_pci.h @@ -372,13 +372,16 @@ protected: TIMER_CALLBACK_MEMBER(audio_update); private: - required_device gpdsp; + required_device gpdsp; // global processor + required_device epdsp; // encode processor required_device cpu; // APU contains 3 dsps: voice processor (VP) global processor (GP) encode processor (EP) struct apu_state { uint32_t memory[0x60000 / 4]{}; uint32_t gpdsp_sgaddress = 0; // global processor scatter-gather uint32_t gpdsp_sgblocks = 0; + uint32_t gpdsp_sgaddress2 = 0; + uint32_t gpdsp_sgblocks2 = 0; uint32_t gpdsp_address = 0; uint32_t epdsp_sgaddress = 0; // encoder processor scatter-gather uint32_t epdsp_sgblocks = 0; @@ -398,6 +401,9 @@ private: } apust; void apu_mmio(address_map &map) ATTR_COLD; void p_map(address_map &map) ATTR_COLD; + uint8_t minimum_grant_r() { return 1; } + uint8_t maximum_latency_r() { return 0xc; } + uint32_t program_memory_r(offs_t offset); }; DECLARE_DEVICE_TYPE(MCPX_APU, mcpx_apu_device) From 8bf5db9977d31243136760fe6a436c94f02ae55c Mon Sep 17 00:00:00 2001 From: yz70s Date: Fri, 6 Mar 2026 19:33:32 +0100 Subject: [PATCH 161/351] xbox_pci.h: fix conflict resolution --- src/mame/shared/xbox_pci.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mame/shared/xbox_pci.h b/src/mame/shared/xbox_pci.h index 48f8edb2122..e33c222a97b 100644 --- a/src/mame/shared/xbox_pci.h +++ b/src/mame/shared/xbox_pci.h @@ -401,8 +401,6 @@ private: } apust; void apu_mmio(address_map &map) ATTR_COLD; void p_map(address_map &map) ATTR_COLD; - uint8_t minimum_grant_r() { return 1; } - uint8_t maximum_latency_r() { return 0xc; } uint32_t program_memory_r(offs_t offset); }; From 4510879b73277d57c0d2249ee6671cedd4a59f88 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 7 Mar 2026 00:50:00 +0100 Subject: [PATCH 162/351] carjmbre: improve priorities, assume 0x8800-0x8807 is a 74259 --- src/mame/omori/carjmbre.cpp | 89 +++++++++++++++++++--------------- src/mame/omori/popper.cpp | 6 +-- src/mame/sanritsu/sprcros2.cpp | 2 +- 3 files changed, 53 insertions(+), 44 deletions(-) diff --git a/src/mame/omori/carjmbre.cpp b/src/mame/omori/carjmbre.cpp index 8782792fe9c..5d240fff804 100644 --- a/src/mame/omori/carjmbre.cpp +++ b/src/mame/omori/carjmbre.cpp @@ -2,14 +2,13 @@ // copyright-holders:hap /*************************************************************************** - Car Jamboree + Car Jamboree 『カージャンボリー』 Omori Electric CAD (OEC) 1983 TODO: - colors are probably wrong - - sprite priorities? (eg. player car jumping on the ramp, 1 part disappears) - first 2 letters on titlescreen look misaligned with the tilemap - - The spriteram holds 2 sprite lists (00-7f and 80-ff), they are identical. + - The spriteram holds 2 sprite lists (00-5f and 80-df), they are identical. Is it an unused feature? Or a RAM access speed workaround? ---------------------------------------------------------------------------- @@ -44,6 +43,7 @@ #include "emu.h" #include "cpu/z80/z80.h" +#include "machine/74259.h" #include "machine/gen_latch.h" #include "sound/ay8910.h" #include "video/resnet.h" @@ -63,10 +63,11 @@ public: driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), - m_videoram(*this, "videoram"), - m_spriteram(*this, "spriteram"), m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette") + m_palette(*this, "palette"), + m_screen(*this, "screen"), + m_videoram(*this, "videoram"), + m_spriteram(*this, "spriteram") { } void carjmbre(machine_config &config); @@ -79,19 +80,19 @@ private: // devices/pointers required_device m_maincpu; required_device m_audiocpu; - required_shared_ptr m_videoram; - required_shared_ptr m_spriteram; required_device m_gfxdecode; required_device m_palette; + required_device m_screen; + required_shared_ptr m_videoram; + required_shared_ptr m_spriteram; bool m_nmi_enabled = false; uint8_t m_bgcolor = 0; tilemap_t *m_tilemap = nullptr; - void bgcolor_w(uint8_t data); + template void bgcolor_w(int state); void videoram_w(offs_t offset, uint8_t data); - void nmi_enable_w(uint8_t data); - void flipscreen_w(uint8_t data); + void nmi_enable_w(int state); INTERRUPT_GEN_MEMBER(vblank_nmi); void carjmbre_palette(palette_device &palette) const; @@ -149,10 +150,12 @@ void carjmbre_state::carjmbre_palette(palette_device &palette) const palette.palette()->normalize_range(0, 63); } -void carjmbre_state::bgcolor_w(uint8_t data) +template +void carjmbre_state::bgcolor_w(int state) { // guessed, seems to match with flyer - m_bgcolor = ~data & 0x3f; + const uint8_t mask = 1 << N; + m_bgcolor = (m_bgcolor & ~mask) | (state ? 0 : mask); } @@ -168,7 +171,9 @@ TILE_GET_INFO_MEMBER(carjmbre_state::get_tile_info) { int attr = m_videoram[tile_index | 0x400]; int code = (m_videoram[tile_index] & 0xff) | (attr << 1 & 0x100); + tileinfo.set(0, code, attr & 0xf, 0); + tileinfo.category = code >> 6 & 3; } void carjmbre_state::video_start() @@ -181,8 +186,12 @@ void carjmbre_state::video_start() uint32_t carjmbre_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { bitmap.fill(m_bgcolor, cliprect); - m_tilemap->draw(screen, bitmap, cliprect, 0, 0); + m_tilemap->draw(screen, bitmap, cliprect); draw_sprites(bitmap, cliprect); + + // draw high priority tiles (eg. score panel, high score entry) + m_tilemap->draw(screen, bitmap, cliprect, TILEMAP_DRAW_LAYER0); + return 0; } @@ -191,13 +200,17 @@ uint32_t carjmbre_state::screen_update(screen_device &screen, bitmap_ind16 &bitm void carjmbre_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) { - for (int offs = 0x80 - 4; offs >= 0; offs -= 4) + for (int i = 0x60 - 4; i >= 0; i -= 4) { + // before copying the sprites to spriteram the game reorders the first + // sprite to last, sprite ordering is incorrect if this isn't undone + int offs = (i - 4 + 0x60) % 0x60; + int sy = m_spriteram[offs]; int code = m_spriteram[offs + 1]; int color = m_spriteram[offs + 2] & 0xf; - int flipx = m_spriteram[offs + 2] >> 6 & 1; - int flipy = m_spriteram[offs + 2] >> 7 & 1; + int flipx = BIT(m_spriteram[offs + 2], 6); + int flipy = BIT(m_spriteram[offs + 2], 7); int sx = m_spriteram[offs + 3]; // align to tilemap @@ -231,29 +244,20 @@ void carjmbre_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec INTERRUPT_GEN_MEMBER(carjmbre_state::vblank_nmi) { if (m_nmi_enabled) - m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); + m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -void carjmbre_state::nmi_enable_w(uint8_t data) +void carjmbre_state::nmi_enable_w(int state) { - // d0: enable/clear vblank nmi - m_nmi_enabled = bool(data & 1); - m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); -} - -void carjmbre_state::flipscreen_w(uint8_t data) -{ - // d0: flip screen (cocktail mode) - flip_screen_set(data & 1); + m_nmi_enabled = bool(state); } void carjmbre_state::main_map(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8803, 0x8803).w(FUNC(carjmbre_state::nmi_enable_w)); - map(0x8805, 0x8805).w(FUNC(carjmbre_state::bgcolor_w)); - map(0x8807, 0x8807).w(FUNC(carjmbre_state::flipscreen_w)); map(0x8000, 0x87ff).ram(); // 6116 + map(0x8800, 0x8800).nopr(); // watchdog? + map(0x8800, 0x8807).w("outlatch", FUNC(addressable_latch_device::write_d0)); map(0x9000, 0x97ff).ram().w(FUNC(carjmbre_state::videoram_w)).share("videoram"); // 2114*4 map(0x9800, 0x98ff).ram().share("spriteram"); // 5101*2 map(0xa000, 0xa000).portr("IN1"); @@ -372,14 +376,20 @@ void carjmbre_state::carjmbre(machine_config &config) m_audiocpu->set_addrmap(AS_PROGRAM, &carjmbre_state::sound_map); m_audiocpu->set_addrmap(AS_IO, &carjmbre_state::sound_io_map); + ls259_device &outlatch(LS259(config, "outlatch")); + outlatch.q_out_cb<3>().set(FUNC(carjmbre_state::nmi_enable_w)); + outlatch.q_out_cb<5>().set(FUNC(carjmbre_state::bgcolor_w<0>)); + outlatch.q_out_cb<6>().set(FUNC(carjmbre_state::bgcolor_w<1>)); + outlatch.q_out_cb<7>().set(FUNC(carjmbre_state::flip_screen_set)); + /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */); - screen.set_size(32*8, 32*8); - screen.set_visarea(0*8, 32*8-1, 2*8, 30*8-1); - screen.set_screen_update(FUNC(carjmbre_state::screen_update)); - screen.set_palette(m_palette); + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh_hz(60); + m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */); + m_screen->set_size(32*8, 32*8); + m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1); + m_screen->set_screen_update(FUNC(carjmbre_state::screen_update)); + m_screen->set_palette(m_palette); GFXDECODE(config, m_gfxdecode, m_palette, gfx_carjmbre); PALETTE(config, m_palette, FUNC(carjmbre_state::carjmbre_palette), 64); @@ -390,7 +400,6 @@ void carjmbre_state::carjmbre(machine_config &config) GENERIC_LATCH_8(config, "soundlatch"); AY8910(config, "ay1", XTAL(18'432'000)/6/2).add_route(ALL_OUTPUTS, "mono", 0.25); - AY8910(config, "ay2", XTAL(18'432'000)/6/2).add_route(ALL_OUTPUTS, "mono", 0.25); } @@ -398,7 +407,7 @@ void carjmbre_state::carjmbre(machine_config &config) /*************************************************************************** - Game drivers + ROM definitions ***************************************************************************/ diff --git a/src/mame/omori/popper.cpp b/src/mame/omori/popper.cpp index 740c2075bac..a505c900a9a 100644 --- a/src/mame/omori/popper.cpp +++ b/src/mame/omori/popper.cpp @@ -270,9 +270,9 @@ static const res_net_info popper_net_info = { RES_NET_VCC_5V | RES_NET_VBIAS_5V | RES_NET_VIN_TTL_OUT, { - { RES_NET_AMP_NONE, 0, 0, 3, { 1000, 470, 220 } }, - { RES_NET_AMP_NONE, 0, 0, 3, { 1000, 470, 220 } }, - { RES_NET_AMP_NONE, 0, 0, 2, { 470, 220, 0 } } + { RES_NET_AMP_NONE, 0, 0, 3, { 1000, 470, 220 } }, + { RES_NET_AMP_NONE, 0, 0, 3, { 1000, 470, 220 } }, + { RES_NET_AMP_NONE, 0, 0, 2, { 470, 220, 0 } } } }; diff --git a/src/mame/sanritsu/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp index 0d8b2d72119..7193de2e562 100644 --- a/src/mame/sanritsu/sprcros2.cpp +++ b/src/mame/sanritsu/sprcros2.cpp @@ -2,7 +2,7 @@ // copyright-holders:Angelo Salese /* -Super Cross II (スーパークロスⅡ) (c) 1986 GM Shoji +Super Cross II 『スーパークロスⅡ』 (c) 1986 GM Shoji driver by Angelo Salese, based on "wiped off due to not anymore licenseable" driver by insideoutboy. From 9641b67e9155c25eb068363d6fb8d944fdb4034a Mon Sep 17 00:00:00 2001 From: cracyc Date: Fri, 6 Mar 2026 22:20:17 -0600 Subject: [PATCH 163/351] i386: fix softfloat with gcc 15 optimizer --- 3rdparty/softfloat/softfloat.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/3rdparty/softfloat/softfloat.c b/3rdparty/softfloat/softfloat.c index edd4def337b..f9e5fed7d1c 100644 --- a/3rdparty/softfloat/softfloat.c +++ b/3rdparty/softfloat/softfloat.c @@ -827,6 +827,7 @@ float64 int32_to_float64( int32 a ) bits64 zSig; if ( a == 0 ) return 0; + if ( a == (sbits32) 0x80000000 ) return packFloat64( 1, 0x41E, 0 ); zSign = ( a < 0 ); absA = zSign ? - a : a; shiftCount = countLeadingZeros32( absA ) + 21; @@ -852,6 +853,7 @@ floatx80 int32_to_floatx80( int32 a ) bits64 zSig; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); + if ( a == (sbits32) 0x80000000 ) return packFloatx80( 1, 0x401E, 0 ); zSign = ( a < 0 ); absA = zSign ? - a : a; shiftCount = countLeadingZeros32( absA ) + 32; From 71c530e827939539ee81fb9bc8a89f6749fc7dde Mon Sep 17 00:00:00 2001 From: JOTEGO Date: Sat, 7 Mar 2026 11:49:40 +0100 Subject: [PATCH 164/351] seta/downtown: handle calibr50 sub CPU reset write (#15068) --- src/mame/seta/downtown.cpp | 212 +++++++++++++++++++------------------ 1 file changed, 109 insertions(+), 103 deletions(-) diff --git a/src/mame/seta/downtown.cpp b/src/mame/seta/downtown.cpp index f1c1de602df..f6b9cd74ee8 100644 --- a/src/mame/seta/downtown.cpp +++ b/src/mame/seta/downtown.cpp @@ -422,6 +422,7 @@ protected: u8 downtown_ip_r(offs_t offset); void calibr50_sub_bankswitch_w(u8 data); void calibr50_soundlatch2_w(u8 data); + void calibr50_sub_reset_w(u8 data); void twineagl_ctrl_w(u8 data); u16 twineagl_debug_r(); u16 twineagl_200100_r(offs_t offset); @@ -756,20 +757,20 @@ void downtown_state::ipl2_ack_w(u16 data) void tndrcade_state::tndrcade_map(address_map &map) { - map(0x000000, 0x07ffff).rom(); // ROM + map(0x000000, 0x07ffff).rom(); map(0x200000, 0x200001).w(FUNC(tndrcade_state::ipl1_ack_w)); - map(0x280000, 0x280001).nopw(); // ? 0 / 1 (sub cpu related?) - map(0x300000, 0x300001).nopw(); // ? 0 / 1 - map(0x380000, 0x3803ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette + map(0x280000, 0x280001).nopw(); // ? 0 / 1 (sub cpu related?) + map(0x300000, 0x300001).nopw(); // ? 0 / 1 + map(0x380000, 0x3803ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); map(0x400000, 0x400000).w(m_spritegen, FUNC(x1_001_device::spritebgflag_w8)); - map(0x600000, 0x6005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); // Sprites Y + map(0x600000, 0x6005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); map(0x600600, 0x600607).ram().rw(m_spritegen, FUNC(x1_001_device::spritectrl_r16), FUNC(x1_001_device::spritectrl_w16)); - map(0x800000, 0x800007).w(FUNC(tndrcade_state::sub_ctrl_w)).umask16(0x00ff); // Sub CPU Control? - map(0xa00000, 0xa00fff).rw(FUNC(tndrcade_state::sharedram_68000_r), FUNC(tndrcade_state::sharedram_68000_w)).umask16(0x00ff); // Shared RAM - map(0xc00000, 0xc03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); // Sprites Code + X + Attr - map(0xe00000, 0xe03fff).ram().share("mainram"); // RAM (Mirrored?) - map(0xffc000, 0xffffff).ram().share("mainram"); // RAM (Mirrored?) + map(0x800000, 0x800007).w(FUNC(tndrcade_state::sub_ctrl_w)).umask16(0x00ff); // Sub CPU Control? + map(0xa00000, 0xa00fff).rw(FUNC(tndrcade_state::sharedram_68000_r), FUNC(tndrcade_state::sharedram_68000_w)).umask16(0x00ff); + map(0xc00000, 0xc03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); + map(0xe00000, 0xe03fff).ram().share("mainram"); // Mirrored? + map(0xffc000, 0xffffff).ram().share("mainram"); // Mirrored? } @@ -789,24 +790,24 @@ void downtown_state::twineagl_ctrl_w(u8 data) void downtown_state::downtown_map(address_map &map) { - map(0x000000, 0x09ffff).rom(); // ROM - map(0x100000, 0x103fff).rw(m_x1snd, FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0x200000, 0x200001).noprw(); // watchdog? (twineagl) + map(0x000000, 0x09ffff).rom(); + map(0x100000, 0x103fff).rw(m_x1snd, FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); + map(0x200000, 0x200001).noprw(); // watchdog? (twineagl) map(0x300000, 0x300001).w(FUNC(downtown_state::ipl1_ack_w)); - map(0x400000, 0x400007).w(FUNC(downtown_state::twineagl_tilebank_w)).umask16(0x00ff); // special tile banking to animate water in twineagl + map(0x400000, 0x400007).w(FUNC(downtown_state::twineagl_tilebank_w)).umask16(0x00ff); // special tile banking to animate water in twineagl map(0x500001, 0x500001).w(FUNC(downtown_state::twineagl_ctrl_w)); map(0x600001, 0x600001).r(FUNC(downtown_state::dsw1_r)); map(0x600003, 0x600003).r(FUNC(downtown_state::dsw2_r)); - map(0x700000, 0x7003ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0x800000, 0x800005).w(m_tiles, FUNC(x1_012_device::vctrl_w));// VRAM Ctrl - map(0x900000, 0x903fff).ram().w(m_tiles, FUNC(x1_012_device::vram_w)).share("tiles"); // VRAM - map(0xa00000, 0xa00007).w(FUNC(downtown_state::sub_ctrl_w)).umask16(0x00ff); // Sub CPU Control? - map(0xb00000, 0xb00fff).rw(FUNC(downtown_state::sharedram_68000_r), FUNC(downtown_state::sharedram_68000_w)).umask16(0x00ff); // Shared RAM + map(0x700000, 0x7003ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x800000, 0x800005).w(m_tiles, FUNC(x1_012_device::vctrl_w)); + map(0x900000, 0x903fff).ram().w(m_tiles, FUNC(x1_012_device::vram_w)).share("tiles"); + map(0xa00000, 0xa00007).w(FUNC(downtown_state::sub_ctrl_w)).umask16(0x00ff); + map(0xb00000, 0xb00fff).rw(FUNC(downtown_state::sharedram_68000_r), FUNC(downtown_state::sharedram_68000_w)).umask16(0x00ff); map(0xc00000, 0xc00000).w(m_spritegen, FUNC(x1_001_device::spritebgflag_w8)); - map(0xd00000, 0xd005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); // Sprites Y + map(0xd00000, 0xd005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); map(0xd00600, 0xd00607).ram().rw(m_spritegen, FUNC(x1_001_device::spritectrl_r16), FUNC(x1_001_device::spritectrl_w16)); - map(0xe00000, 0xe03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); // Sprites Code + X + Attr - map(0xf00000, 0xffffff).ram(); // RAM + map(0xe00000, 0xe03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); + map(0xf00000, 0xffffff).ram(); } @@ -816,30 +817,30 @@ void downtown_state::downtown_map(address_map &map) void downtown_state::calibr50_map(address_map &map) { - map(0x000000, 0x09ffff).rom(); // ROM + map(0x000000, 0x09ffff).rom(); map(0x100000, 0x100001).r(FUNC(downtown_state::ipl2_ack_r)); - map(0x200000, 0x200fff).ram().share("nvram"); // NVRAM (battery backed) + map(0x200000, 0x200fff).ram().share("nvram"); map(0x300000, 0x300001).rw(FUNC(downtown_state::ipl1_ack_r), FUNC(downtown_state::ipl1_ack_w)); map(0x400000, 0x400001).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); - map(0x500000, 0x500001).nopw(); // ? + map(0x500001, 0x500001).w(FUNC(downtown_state::calibr50_sub_reset_w)); map(0x600001, 0x600001).r(FUNC(downtown_state::dsw1_r)); map(0x600003, 0x600003).r(FUNC(downtown_state::dsw2_r)); - map(0x700000, 0x7003ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0x800000, 0x800005).w(FUNC(downtown_state::vram_layer0_vctrl_raster_trampoline_w));// VRAM Ctrl - map(0x900000, 0x903fff).ram().w(m_tiles, FUNC(x1_012_device::vram_w)).share("tiles"); // VRAM - map(0x904000, 0x904fff).ram(); // - map(0xa00000, 0xa00001).portr("P1"); // X1-004 - map(0xa00002, 0xa00003).portr("P2"); // X1-004 - map(0xa00008, 0xa00009).portr("COINS"); // X1-004 + map(0x700000, 0x7003ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0x800000, 0x800005).w(FUNC(downtown_state::vram_layer0_vctrl_raster_trampoline_w)); + map(0x900000, 0x903fff).ram().w(m_tiles, FUNC(x1_012_device::vram_w)).share("tiles"); + map(0x904000, 0x904fff).ram(); + map(0xa00000, 0xa00001).portr("P1"); // X1-004 + map(0xa00002, 0xa00003).portr("P2"); // X1-004 + map(0xa00008, 0xa00009).portr("COINS"); // X1-004 map(0xa00010, 0xa00017).r("upd4701", FUNC(upd4701_device::read_xy)).umask16(0x00ff); map(0xa00019, 0xa00019).r("upd4701", FUNC(upd4701_device::reset_xy_r)); - map(0xb00001, 0xb00001).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); // From Sub CPU - map(0xb00001, 0xb00001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); // To Sub CPU + map(0xb00001, 0xb00001).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0xb00001, 0xb00001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); map(0xc00000, 0xc00000).w(m_spritegen, FUNC(x1_001_device::spritebgflag_w8)); - map(0xd00000, 0xd005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); // Sprites Y + map(0xd00000, 0xd005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); map(0xd00600, 0xd00607).ram().rw(m_spritegen, FUNC(x1_001_device::spritectrl_r16), FUNC(x1_001_device::spritectrl_w16)); - map(0xe00000, 0xe03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); // Sprites Code + X + Attr - map(0xff0000, 0xffffff).ram(); // RAM + map(0xe00000, 0xe03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); + map(0xff0000, 0xffffff).ram(); } @@ -895,25 +896,25 @@ void usclssic_state::lockout_w(u8 data) void usclssic_state::usclssic_map(address_map &map) { - map(0x000000, 0x07ffff).rom(); // ROM - map(0x800000, 0x8005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); // Sprites Y + map(0x000000, 0x07ffff).rom(); + map(0x800000, 0x8005ff).ram().rw(m_spritegen, FUNC(x1_001_device::spriteylow_r16), FUNC(x1_001_device::spriteylow_w16)); map(0x800600, 0x800607).ram().rw(m_spritegen, FUNC(x1_001_device::spritectrl_r16), FUNC(x1_001_device::spritectrl_w16)); map(0x900000, 0x900000).w(m_spritegen, FUNC(x1_001_device::spritebgflag_w8)); - map(0xa00000, 0xa00005).rw(m_tiles, FUNC(x1_012_device::vctrl_r), FUNC(x1_012_device::vctrl_w)); // VRAM Ctrl - map(0xb00000, 0xb003ff).ram().share(m_paletteram); // Palette + map(0xa00000, 0xa00005).rw(m_tiles, FUNC(x1_012_device::vctrl_r), FUNC(x1_012_device::vctrl_w)); + map(0xb00000, 0xb003ff).ram().share(m_paletteram); map(0xb40000, 0xb40007).r(m_upd4701, FUNC(upd4701_device::read_xy)).umask16(0x00ff); - map(0xb40001, 0xb40001).w(FUNC(usclssic_state::lockout_w)); // Coin Lockout + Tiles Banking + map(0xb40001, 0xb40001).w(FUNC(usclssic_state::lockout_w)); // Coin Lockout + Tiles Banking map(0xb4000a, 0xb4000b).w(FUNC(usclssic_state::ipl1_ack_w)); - map(0xb40010, 0xb40011).portr("COINS"); // Coins - map(0xb40011, 0xb40011).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); // To Sub CPU - map(0xb40018, 0xb4001f).r(FUNC(usclssic_state::dsw_r)); // 2 DSWs + map(0xb40010, 0xb40011).portr("COINS"); + map(0xb40011, 0xb40011).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); + map(0xb40018, 0xb4001f).r(FUNC(usclssic_state::dsw_r)); // 2 DSWs map(0xb40018, 0xb40019).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); map(0xb80000, 0xb80001).r(FUNC(usclssic_state::ipl2_ack_r)); - map(0xc00000, 0xc03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); // Sprites Code + X + Attr - map(0xd00000, 0xd03fff).ram().w(m_tiles, FUNC(x1_012_device::vram_w)).share("tiles"); // VRAM - map(0xd04000, 0xd04fff).ram(); // - map(0xe00000, 0xe00fff).ram(); // NVRAM? (odd bytes) - map(0xff0000, 0xffffff).ram(); // RAM + map(0xc00000, 0xc03fff).ram().rw(m_spritegen, FUNC(x1_001_device::spritecode_r16), FUNC(x1_001_device::spritecode_w16)); + map(0xd00000, 0xd03fff).ram().w(m_tiles, FUNC(x1_012_device::vram_w)).share("tiles"); + map(0xd04000, 0xd04fff).ram(); + map(0xe00000, 0xe00fff).ram(); // NVRAM? (odd bytes) + map(0xff0000, 0xffffff).ram(); } @@ -946,20 +947,20 @@ u8 tndrcade_state::ff_r(){return 0xff;} void tndrcade_state::tndrcade_sub_map(address_map &map) { - map(0x0000, 0x01ff).ram(); // RAM - map(0x0800, 0x0800).r(FUNC(tndrcade_state::ff_r)); // ? (bits 0/1/2/3: 1 -> do test 0-ff/100-1e0/5001-57ff/banked rom) - //map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); // - //map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); // - map(0x1000, 0x1000).portr("P1"); // P1 - map(0x1000, 0x1000).w(FUNC(tndrcade_state::sub_bankswitch_lockout_w)); // ROM Bank + Coin Lockout - map(0x1001, 0x1001).portr("P2"); // P2 - map(0x1002, 0x1002).portr("COINS"); // Coins + map(0x0000, 0x01ff).ram(); + map(0x0800, 0x0800).r(FUNC(tndrcade_state::ff_r)); // ? (bits 0/1/2/3: 1 -> do test 0-ff/100-1e0/5001-57ff/banked rom) + //map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); + //map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x1000, 0x1000).portr("P1"); + map(0x1000, 0x1000).w(FUNC(tndrcade_state::sub_bankswitch_lockout_w)); + map(0x1001, 0x1001).portr("P2"); + map(0x1002, 0x1002).portr("COINS"); map(0x2000, 0x2001).rw("ym1", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); map(0x3000, 0x3001).w("ym2", FUNC(ym3812_device::write)); - map(0x5000, 0x57ff).ram().share(m_sharedram); // Shared RAM - map(0x6000, 0x7fff).rom(); // ROM - map(0x8000, 0xbfff).bankr(m_subbank); // Banked ROM - map(0xc000, 0xffff).rom(); // ROM + map(0x5000, 0x57ff).ram().share(m_sharedram); + map(0x6000, 0x7fff).rom(); + map(0x8000, 0xbfff).bankr(m_subbank); + map(0xc000, 0xffff).rom(); } @@ -969,17 +970,17 @@ void tndrcade_state::tndrcade_sub_map(address_map &map) void downtown_state::twineagl_sub_map(address_map &map) { - map(0x0000, 0x01ff).ram(); // RAM - map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); // - map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); // - map(0x1000, 0x1000).portr("P1"); // P1 - map(0x1000, 0x1000).w(FUNC(downtown_state::sub_bankswitch_lockout_w)); // ROM Bank + Coin Lockout - map(0x1001, 0x1001).portr("P2"); // P2 - map(0x1002, 0x1002).portr("COINS"); // Coins - map(0x5000, 0x57ff).ram().share(m_sharedram); // Shared RAM - map(0x7000, 0x7fff).rom(); // ROM - map(0x8000, 0xbfff).bankr(m_subbank); // Banked ROM - map(0xc000, 0xffff).rom(); // ROM + map(0x0000, 0x01ff).ram(); + map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); + map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x1000, 0x1000).portr("P1"); + map(0x1000, 0x1000).w(FUNC(downtown_state::sub_bankswitch_lockout_w)); + map(0x1001, 0x1001).portr("P2"); + map(0x1002, 0x1002).portr("COINS"); + map(0x5000, 0x57ff).ram().share(m_sharedram); + map(0x7000, 0x7fff).rom(); + map(0x8000, 0xbfff).bankr(m_subbank); + map(0xc000, 0xffff).rom(); } @@ -999,11 +1000,11 @@ u8 downtown_state::downtown_ip_r(offs_t offset) { case 0: return (m_coins->read() & 0xf0) + (dir1 >> 8); // upper 4 bits of p1 rotation + coins case 1: return (dir1 & 0xff); // lower 8 bits of p1 rotation - case 2: return m_p1->read(); // p1 + case 2: return m_p1->read(); // p1 case 3: return 0xff; // ? case 4: return (dir2 >> 8); // upper 4 bits of p2 rotation + ? case 5: return (dir2 & 0xff); // lower 8 bits of p2 rotation - case 6: return m_p2->read(); // p2 + case 6: return m_p2->read(); // p2 case 7: return 0xff; // ? } @@ -1012,15 +1013,15 @@ u8 downtown_state::downtown_ip_r(offs_t offset) void downtown_state::downtown_sub_map(address_map &map) { - map(0x0000, 0x01ff).ram(); // RAM - map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); // - map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); // - map(0x1000, 0x1007).r(FUNC(downtown_state::downtown_ip_r)); // Input Ports - map(0x1000, 0x1000).w(FUNC(downtown_state::sub_bankswitch_lockout_w)); // ROM Bank + Coin Lockout - map(0x5000, 0x57ff).ram().share(m_sharedram); // Shared RAM - map(0x7000, 0x7fff).rom(); // ROM - map(0x8000, 0xbfff).bankr(m_subbank); // Banked ROM - map(0xc000, 0xffff).rom(); // ROM + map(0x0000, 0x01ff).ram(); + map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); + map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x1000, 0x1007).r(FUNC(downtown_state::downtown_ip_r)); + map(0x1000, 0x1000).w(FUNC(downtown_state::sub_bankswitch_lockout_w)); + map(0x5000, 0x57ff).ram().share(m_sharedram); + map(0x7000, 0x7fff).rom(); + map(0x8000, 0xbfff).bankr(m_subbank); + map(0xc000, 0xffff).rom(); } @@ -1056,16 +1057,21 @@ void downtown_state::calibr50_soundlatch2_w(u8 data) m_subcpu->spin_until_time(attotime::from_usec(50)); // Allow the other cpu to reply } +void downtown_state::calibr50_sub_reset_w(u8 data) +{ + m_subcpu->set_input_line(INPUT_LINE_RESET, BIT(data, 4) ? CLEAR_LINE : ASSERT_LINE); +} + void downtown_state::calibr50_sub_map(address_map &map) { map(0x0000, 0x1fff).lrw8( - NAME([this](offs_t offset) { return m_x1snd->read(offset ^ 0x1000); }), - NAME([this](offs_t offset, u8 data) { m_x1snd->write(offset ^ 0x1000, data); })); // Sound - map(0x4000, 0x4000).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); // From Main CPU - map(0x4000, 0x4000).w(FUNC(downtown_state::calibr50_sub_bankswitch_w)); // Bankswitching - map(0x8000, 0xbfff).bankr(m_subbank); // Banked ROM - map(0xc000, 0xffff).rom(); // ROM - map(0xc000, 0xc000).w(FUNC(downtown_state::calibr50_soundlatch2_w)); // To Main CPU + NAME([this](offs_t offset) { return m_x1snd->read(offset ^ 0x1000); }), + NAME([this](offs_t offset, u8 data) { m_x1snd->write(offset ^ 0x1000, data); })); + map(0x4000, 0x4000).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); + map(0x4000, 0x4000).w(FUNC(downtown_state::calibr50_sub_bankswitch_w)); + map(0x8000, 0xbfff).bankr(m_subbank); + map(0xc000, 0xffff).rom(); + map(0xc000, 0xc000).w(FUNC(downtown_state::calibr50_soundlatch2_w)); } @@ -1075,18 +1081,18 @@ void downtown_state::calibr50_sub_map(address_map &map) void downtown_state::metafox_sub_map(address_map &map) { - map(0x0000, 0x01ff).ram(); // RAM - map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); // - map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); // - map(0x1000, 0x1000).portr("COINS"); // Coins - map(0x1000, 0x1000).w(FUNC(downtown_state::sub_bankswitch_lockout_w)); // ROM Bank + Coin Lockout - map(0x1002, 0x1002).portr("P1"); // P1 - //map(0x1004, 0x1004).nopr(); // ? - map(0x1006, 0x1006).portr("P2"); // P2 - map(0x5000, 0x57ff).ram().share(m_sharedram); // Shared RAM - map(0x7000, 0x7fff).rom(); // ROM - map(0x8000, 0xbfff).bankr(m_subbank); // Banked ROM - map(0xc000, 0xffff).rom(); // ROM + map(0x0000, 0x01ff).ram(); + map(0x0800, 0x0800).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); + map(0x0801, 0x0801).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x1000, 0x1000).portr("COINS"); + map(0x1000, 0x1000).w(FUNC(downtown_state::sub_bankswitch_lockout_w)); + map(0x1002, 0x1002).portr("P1"); + //map(0x1004, 0x1004).nopr(); // ? + map(0x1006, 0x1006).portr("P2"); + map(0x5000, 0x57ff).ram().share(m_sharedram); + map(0x7000, 0x7fff).rom(); + map(0x8000, 0xbfff).bankr(m_subbank); + map(0xc000, 0xffff).rom(); } From d2160f33edc1bb178a7ac7fc27a638758349e63e Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 7 Mar 2026 06:36:11 -0500 Subject: [PATCH 165/351] bus/a2bus: Add emulation of Apple II Serial Interface Card [AJR, Apple II Documentation Project] --- scripts/src/bus.lua | 2 + src/devices/bus/a2bus/a2sic.cpp | 211 ++++++++++++++++++++++++++++++++ src/devices/bus/a2bus/a2sic.h | 12 ++ src/devices/bus/a2bus/cards.cpp | 3 + 4 files changed, 228 insertions(+) create mode 100644 src/devices/bus/a2bus/a2sic.cpp create mode 100644 src/devices/bus/a2bus/a2sic.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 5deef16914c..35f4b431fc8 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -86,6 +86,8 @@ if BUSES["A2BUS"] then MAME_DIR .. "src/devices/bus/a2bus/a2scsi.h", MAME_DIR .. "src/devices/bus/a2bus/a2sd.cpp", MAME_DIR .. "src/devices/bus/a2bus/a2sd.h", + MAME_DIR .. "src/devices/bus/a2bus/a2sic.cpp", + MAME_DIR .. "src/devices/bus/a2bus/a2sic.h", MAME_DIR .. "src/devices/bus/a2bus/a2softcard.cpp", MAME_DIR .. "src/devices/bus/a2bus/a2softcard.h", MAME_DIR .. "src/devices/bus/a2bus/a2ssc.cpp", diff --git a/src/devices/bus/a2bus/a2sic.cpp b/src/devices/bus/a2bus/a2sic.cpp new file mode 100644 index 00000000000..c5ecb0a0404 --- /dev/null +++ b/src/devices/bus/a2bus/a2sic.cpp @@ -0,0 +1,211 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************* + + Apple II (High-Speed) Serial Interface Card (A2B0005, 670-X005) + + This was Apple's second attempt at an RS-232 serial interface, + announced in 1978 but not released until 1979. Unlike the earlier + Communications Card, it uses neither an UART nor a clock divider + circuit, instead providing bitbanged half-duplex communications + at a baud rate determined by firmware delay loops. (In practice, + however, the firmware's normal mode spends so much time post- + processing each received character that continuous reception of + any data stream tends to fail even at low baud rates.) + +**********************************************************************/ + +#include "emu.h" +#include "a2sic.h" + +#include "bus/rs232/rs232.h" + +namespace { + +class a2sic_device : public device_t, public device_a2bus_card_interface +{ +public: + // device type constructor + a2sic_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + +protected: + // device_t implementation + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual ioport_constructor device_input_ports() const override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + + // device_a2bus_card_interface implementation + virtual u8 read_c0nx(u8 offset) override; + virtual void write_c0nx(u8 offset, u8 data) override; + virtual u8 read_cnxx(u8 offset) override; + virtual u8 read_c800(u16 offset) override; + virtual bool take_c800() const override; + virtual void reset_from_bus() override; + +private: + // line handlers + void cts_loopback_w(int state); + void dsr_loopback_w(int state); + + // object finders + required_device m_rs232; + required_region_ptr m_p7; + required_region_ptr m_p8; + required_ioport m_switches; + + // internal state + bool m_cts; + bool m_dsr; +}; + +//************************************************************************** +// DEVICE IMPLEMENTATION +//************************************************************************** + +a2sic_device::a2sic_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, A2BUS_SIC, tag, owner, clock) + , device_a2bus_card_interface(mconfig, *this) + , m_rs232(*this, "rs232") + , m_p7(*this, "p7") + , m_p8(*this, "p8") + , m_switches(*this, "SWITCHES") + , m_cts(false) + , m_dsr(false) +{ +} + +void a2sic_device::device_start() +{ + save_item(NAME(m_cts)); + save_item(NAME(m_dsr)); +} + +void a2sic_device::device_reset() +{ + reset_from_bus(); + + m_rs232->write_rts(m_cts); + m_rs232->write_dtr(m_dsr); +} + +u8 a2sic_device::read_c0nx(u8 offset) +{ + u8 result = m_switches->read() | m_rs232->rxd_r() << 7; + + // clock A0 into 74LS109 flip-flop (inverted output) + if (!machine().side_effects_disabled()) + m_rs232->write_txd(!BIT(offset, 0)); + + return result; +} + +void a2sic_device::write_c0nx(u8 offset, u8 data) +{ + m_rs232->write_txd(!BIT(offset, 0)); +} + +u8 a2sic_device::read_cnxx(u8 offset) +{ + return m_p7[offset]; +} + +u8 a2sic_device::read_c800(u16 offset) +{ + if (BIT(offset, 9)) + return 0xff; // TODO: select open bus + else + return m_p8[offset & 0x1ff]; +} + +bool a2sic_device::take_c800() const +{ + return true; +} + +void a2sic_device::reset_from_bus() +{ + m_rs232->write_txd(1); +} + +void a2sic_device::cts_loopback_w(int state) +{ + if (m_cts != bool(state)) + { + m_cts = state; + m_rs232->write_rts(state); + } +} + +void a2sic_device::dsr_loopback_w(int state) +{ + if (m_dsr != bool(state)) + { + m_dsr = state; + m_rs232->write_dtr(state); + } +} + +static INPUT_PORTS_START(a2sic) + PORT_START("SWITCHES") + PORT_DIPNAME(0x07, 0x06, "Baud Rate") PORT_DIPLOCATION("SW1:1,2,3") + PORT_DIPSETTING(0x00, "110") + PORT_DIPSETTING(0x01, "134.5") + PORT_DIPSETTING(0x02, "300") + PORT_DIPSETTING(0x03, "1200") + PORT_DIPSETTING(0x04, "2400") + PORT_DIPSETTING(0x05, "4800") + PORT_DIPSETTING(0x06, "9600") + PORT_DIPSETTING(0x07, "19200") + PORT_DIPNAME(0x08, 0x08, "Carriage Return Delay") PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING(0x08, DEF_STR(Off)) + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPNAME(0x30, 0x00, "Line Width") PORT_DIPLOCATION("SW1:5,6") + PORT_DIPSETTING(0x00, "40 (Video Enabled)") + PORT_DIPSETTING(0x10, "72 (Video Disabled)") + PORT_DIPSETTING(0x20, "80 (Video Disabled)") + PORT_DIPSETTING(0x30, "132 (Video Disabled)") + PORT_DIPNAME(0x40, 0x00, "Line Feed After Carriage Return") PORT_DIPLOCATION("SW1:7") + PORT_DIPSETTING(0x00, DEF_STR(Off)) + PORT_DIPSETTING(0x40, DEF_STR(On)) +INPUT_PORTS_END + +ioport_constructor a2sic_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(a2sic); +} + +void a2sic_device::device_add_mconfig(machine_config &config) +{ + RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); + m_rs232->cts_handler().set(FUNC(a2sic_device::cts_loopback_w)); + m_rs232->dsr_handler().set(FUNC(a2sic_device::dsr_loopback_w)); +} + +ROM_START(a2sic) + ROM_SYSTEM_BIOS(0, "r4", "Revision 4") + ROM_SYSTEM_BIOS(1, "r3", "Revision 3") + + ROM_REGION(0x100, "p7", 0) + ROMX_LOAD("341-0017.p7", 0x000, 0x100, CRC(5be57c50) SHA1(897c92517566f74b179165b8c7b1c9a9df89f014), ROM_BIOS(0)) // probably 317-0017-04 (P7-04) + ROMX_LOAD("p7-03", 0x000, 0x100, CRC(99d96608) SHA1(3abc7054f00fd09cc9ee7e76df913912990452f5), ROM_BIOS(1)) // from published listing dated July 21, 1978 + + ROM_REGION(0x200, "p8", 0) + ROMX_LOAD("341-0048.p8a", 0x000, 0x200, CRC(361c0462) SHA1(369fb95586efa184025d4770ae3686517b13598b), ROM_BIOS(0)) + ROMX_LOAD("p8-01", 0x000, 0x200, CRC(7eafe564) SHA1(8ff44e892b2510573e9528d781b60429c38dbe30), ROM_BIOS(1)) // from published listing dated July 21, 1978 +ROM_END + +const tiny_rom_entry *a2sic_device::device_rom_region() const +{ + return ROM_NAME(a2sic); +} + +} // anonymous namespace + +//************************************************************************** +// GLOBAL VARIABLES +//************************************************************************** + +// device type definition +DEFINE_DEVICE_TYPE_PRIVATE(A2BUS_SIC, device_a2bus_card_interface, a2sic_device, "a2sic", "Apple II Serial Interface Card") diff --git a/src/devices/bus/a2bus/a2sic.h b/src/devices/bus/a2bus/a2sic.h new file mode 100644 index 00000000000..a2b43056f49 --- /dev/null +++ b/src/devices/bus/a2bus/a2sic.h @@ -0,0 +1,12 @@ +// license:BSD-3-Clause +// copyright-holders:AJR + +#ifndef MAME_BUS_A2BUS_A2SIC_H +#define MAME_BUS_A2BUS_A2SIC_H + +#include "a2bus.h" + +// device type declarations +DECLARE_DEVICE_TYPE(A2BUS_SIC, device_a2bus_card_interface) + +#endif // MAME_BUS_A2BUS_A2SIC_H diff --git a/src/devices/bus/a2bus/cards.cpp b/src/devices/bus/a2bus/cards.cpp index 8a201c5f600..673f66e1643 100644 --- a/src/devices/bus/a2bus/cards.cpp +++ b/src/devices/bus/a2bus/cards.cpp @@ -33,6 +33,7 @@ #include "a2sam.h" #include "a2scsi.h" #include "a2sd.h" +#include "a2sic.h" #include "a2softcard.h" #include "a2ssc.h" #include "a2superdrive.h" @@ -161,6 +162,7 @@ void apple2_cards(device_slot_interface &device) device.option_add("romcardfp", A2BUS_ROMCARDFP); // Apple II ROM Card with Autostart Monitor + Applesoft BASIC device.option_add("romcardint", A2BUS_ROMCARDINT); // Apple II ROM Card with Autostart Monitor + Integer BASIC device.option_add("ap2", A2BUS_IBSAP2); // IBS Computertechnik AP 2 Serial Interface + device.option_add("sic", A2BUS_SIC); // Apple II Serial Interface Card } void apple2e_cards(device_slot_interface &device) @@ -248,6 +250,7 @@ void apple2e_cards(device_slot_interface &device) device.option_add("romcardfp", A2BUS_ROMCARDFP); // Apple II ROM Card with Autostart Monitor + Applesoft BASIC device.option_add("romcardint", A2BUS_ROMCARDINT); // Apple II ROM Card with Autostart Monitor + Integer BASIC device.option_add("ap2", A2BUS_IBSAP2); // IBS Computertechnik AP 2 Serial Interface + device.option_add("sic", A2BUS_SIC); // Apple II Serial Interface Card } void apple2gs_cards(device_slot_interface &device) From ea520c4118b38ab664062d9461f11fbc34141d79 Mon Sep 17 00:00:00 2001 From: JOTEGO Date: Sat, 7 Mar 2026 13:21:01 +0100 Subject: [PATCH 166/351] rungun fix: irq 5 enable bit comes from a different register (#15067) --- src/mame/konami/rungun.cpp | 46 ++++++++++++++++++++------------------ 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/src/mame/konami/rungun.cpp b/src/mame/konami/rungun.cpp index 3f422900d6c..97a71ca2446 100644 --- a/src/mame/konami/rungun.cpp +++ b/src/mame/konami/rungun.cpp @@ -120,15 +120,16 @@ private: uint8_t *m_roz_rom = nullptr; uint8_t m_roz_rombase = 0; - /* sound */ - uint8_t m_sound_ctrl = 0; - uint8_t m_sound_nmi_clk = 0; - bool m_video_priority_mode = false; std::unique_ptr m_banked_ram; bool m_single_screen_mode = false; uint8_t m_video_mux_bank = 0; + /* misc */ + uint8_t m_sound_ctrl = 0; + uint8_t m_sound_nmi_clk = 0; + bool m_irq5_enable = false; + uint16_t sysregs_r(offs_t offset, uint16_t mem_mask = ~0); void sysregs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void sound_irq_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); @@ -173,7 +174,6 @@ uint16_t rungun_state::sysregs_r(offs_t offset, uint16_t mem_mask) case 0x02/2: return (m_p_inputs[1]->read() | m_p_inputs[3]->read() << 8); - case 0x04/2: /* bit0-7: coin mechs and services @@ -212,37 +212,39 @@ void rungun_state::sysregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) bit3 : coin counter #1 bit4 : coin counter #2 (when coin slot "common" is selected) bit7 : set before massive memory writes (video chip select?) - bit10 : IRQ5 ACK + bit10 : IRQ5 enable bit12 : if set, forces screen output to 1 monitor. bit14 : (0) sprite on top of PSAC2 layer (1) other way around (title screen) */ if (ACCESSING_BITS_0_7) { - m_spriteram_bank->set_entry((data & 0x80) >> 7); - m_video_mux_bank = ((data & 0x80) >> 7) ^ 1; + m_spriteram_bank->set_entry(BIT(data, 7)); + m_video_mux_bank = BIT(data, 7) ^ 1; m_eepromout->write(data, 0xff); - machine().bookkeeping().coin_counter_w(0, data & 0x08); - machine().bookkeeping().coin_counter_w(1, data & 0x10); + machine().bookkeeping().coin_counter_w(0, BIT(data, 3)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 4)); } if (ACCESSING_BITS_8_15) { - m_single_screen_mode = (data & 0x1000) == 0x1000; - m_video_priority_mode = (data & 0x4000) == 0x4000; - if (!(data & 0x400)) // actually a 0 -> 1 transition + m_irq5_enable = BIT(data, 10); + if (!m_irq5_enable) m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE); + + m_single_screen_mode = BIT(data, 12); + m_video_priority_mode = BIT(data, 14); } break; case 0x0c/2: /* - bit 0 : also enables IRQ??? - bit 1 : disable PSAC2 input? + bit 0 : screen field selection (FSEL) + bit 1 : screen field mode (FMODE) bit 2 : OBJCHA - bit 3 : enable IRQ 5 + bit 3 : MUTE bit 7-4: base address for 53936 ROM readback. */ - m_k055673->k053246_set_objcha_line((data & 0x04) ? ASSERT_LINE : CLEAR_LINE); + m_k055673->k053246_set_objcha_line(BIT(data, 2) ? ASSERT_LINE : CLEAR_LINE); m_roz_rombase = (data & 0xf0) >> 4; break; } @@ -260,7 +262,7 @@ INTERRUPT_GEN_MEMBER(rungun_state::rng_interrupt) // TODO: firing this in screen update causes sprites to desync badly ... sprite_dma_trigger(); - if (m_sysreg[0x0c / 2] & 0x09) + if (m_irq5_enable) device.execute().set_input_line(M68K_IRQ_5, ASSERT_LINE); } @@ -488,7 +490,7 @@ void rungun_state::sound_ctrl_w(uint8_t data) m_bank2->set_entry(data & 0x07); - if (!(data & 0x10)) + if (!BIT(data, 4)) m_soundcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); m_sound_ctrl = data; @@ -496,13 +498,11 @@ void rungun_state::sound_ctrl_w(uint8_t data) void rungun_state::k054539_nmi_gen(int state) { - if (m_sound_ctrl & 0x10) + if (BIT(m_sound_ctrl, 4)) { // Trigger an /NMI on the rising edge if (!m_sound_nmi_clk && state) - { m_soundcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - } } m_sound_nmi_clk = state; @@ -630,12 +630,14 @@ void rungun_state::machine_start() save_item(NAME(m_sound_ctrl)); save_item(NAME(m_sound_nmi_clk)); + save_item(NAME(m_irq5_enable)); } void rungun_state::machine_reset() { memset(m_sysreg, 0, 0x20); m_sound_ctrl = 0; + m_irq5_enable = false; } void rungun_state::rng(machine_config &config) From 26ee71f4ba3252166733f5df47d4318eeb65b09b Mon Sep 17 00:00:00 2001 From: cam900 Date: Sat, 7 Mar 2026 23:50:18 +0900 Subject: [PATCH 167/351] machine/vrender0.cpp: Add DMA address direction, Updates (#15065) * machine/vrender0.cpp: Add DMA address direction, Updates - Use struct for timer for reduce duplicates - Add struct name for DMA registers for reduce duplicates - Add notes for DMA control register - Use BIT helper for single bit values - Replace printf to logerror - Use static function for DMA address increment calculation * machine/vrender0.cpp: Add DMA register format notes * machine/vrender0.h: Moved note into machine/vrender0.cpp * machine/vrender0.cpp: Make DMA comment shorter --- src/devices/machine/vrender0.cpp | 130 +++++++++++++++++++------------ src/devices/machine/vrender0.h | 19 +++-- 2 files changed, 92 insertions(+), 57 deletions(-) diff --git a/src/devices/machine/vrender0.cpp b/src/devices/machine/vrender0.cpp index b13611a608b..2c3a45cebec 100644 --- a/src/devices/machine/vrender0.cpp +++ b/src/devices/machine/vrender0.cpp @@ -94,7 +94,7 @@ void vrender0soc_device::regs_map(address_map &map) // map(0x02400, 0x027ff) // Peripheral Chip Select // map(0x02800, 0x02bff) // SIO // map(0x03400, 0x037ff) // CRT Controller - map(0x03400, 0x037ff).rw(FUNC(vrender0soc_device::crtc_r), FUNC(vrender0soc_device::crtc_w)).share("crtcregs"); + map(0x03400, 0x037ff).rw(FUNC(vrender0soc_device::crtc_r), FUNC(vrender0soc_device::crtc_w)).share(m_crtcregs); // map(0x04000, 0x043ff) // RAMDAC & PLL // map(0x04000, 0x04003) // PLL control register // map(0x04004, 0x04007) // PLL Program register @@ -160,10 +160,10 @@ void vrender0soc_device::device_start() if (this->clock() == 0) fatalerror("%s: bus clock not setup properly", machine().describe_context()); - m_timer[0] = timer_alloc(FUNC(vrender0soc_device::timer_cb<0>), this); - m_timer[1] = timer_alloc(FUNC(vrender0soc_device::timer_cb<1>), this); - m_timer[2] = timer_alloc(FUNC(vrender0soc_device::timer_cb<2>), this); - m_timer[3] = timer_alloc(FUNC(vrender0soc_device::timer_cb<3>), this); + m_timer[0].timer = timer_alloc(FUNC(vrender0soc_device::timer_cb<0>), this); + m_timer[1].timer = timer_alloc(FUNC(vrender0soc_device::timer_cb<1>), this); + m_timer[2].timer = timer_alloc(FUNC(vrender0soc_device::timer_cb<2>), this); + m_timer[3].timer = timer_alloc(FUNC(vrender0soc_device::timer_cb<3>), this); for (int i = 0; i < 2; i++) { @@ -175,8 +175,8 @@ void vrender0soc_device::device_start() save_item(NAME(m_int_high)); save_item(NAME(m_intst)); - save_item(NAME(m_timer_control)); - save_item(NAME(m_timer_count)); + save_item(STRUCT_MEMBER(m_timer, control)); + save_item(STRUCT_MEMBER(m_timer, count)); save_item(STRUCT_MEMBER(m_dma, src)); save_item(STRUCT_MEMBER(m_dma, dst)); save_item(STRUCT_MEMBER(m_dma, size)); @@ -185,7 +185,7 @@ void vrender0soc_device::device_start() void vrender0soc_device::write_line_tx(int port, u8 value) { - //printf("callback %d %02x\n",port,value); + //logerror("callback %d %02x\n", port, value); m_write_tx[port & 1](value); } @@ -203,13 +203,14 @@ void vrender0soc_device::device_reset() //m_FlipCount = 0; m_int_high = 0; - m_dma[0].ctrl = 0; - m_dma[1].ctrl = 0; - - for (int i = 0; i < 4; i++) + for (auto &dma: m_dma) { - m_timer_control[i] = 0xff << 8; - m_timer[i]->adjust(attotime::never); + dma.ctrl = 0; + } + for (auto &tmr : m_timer) + { + tmr.control = 0xff << 8; + tmr.timer->adjust(attotime::never); } } @@ -332,24 +333,26 @@ void vrender0soc_device::soundirq_cb(int state) void vrender0soc_device::timer_start(int which) { - int const pd = (m_timer_control[which] >> 8) & 0xff; - int const tcv = m_timer_count[which] & 0xffff; + vr0_timer &tmr = m_timer[which]; + int const pd = (tmr.control >> 8) & 0xff; + int const tcv = tmr.count & 0xffff; // TODO: documentation claims this is bus clock, half the internal PLL frequency. attotime const period = attotime::from_hz(this->clock()) * 2 * ((pd + 1) * (tcv + 1)); - m_timer[which]->adjust(period); + tmr.timer->adjust(period); -// printf("timer %d start, pd = %x tcv = %x period = %s\n", which, pd, tcv, period.as_string()); +// logerror("timer %d start, pd = %x tcv = %x period = %s\n", which, pd, tcv, period.as_string()); } template TIMER_CALLBACK_MEMBER(vrender0soc_device::timer_cb) { static const int num[] = { 0, 1, 9, 10 }; + vr0_timer &tmr = m_timer[Which]; - if (m_timer_control[Which] & 2) + if (BIT(tmr.control, 1)) timer_start(Which); else - m_timer_control[Which] &= ~1; + tmr.control &= ~1; int_req(num[Which]); } @@ -357,26 +360,27 @@ TIMER_CALLBACK_MEMBER(vrender0soc_device::timer_cb) template u32 vrender0soc_device::tmcon_r() { - return m_timer_control[Which]; + return m_timer[Which].control; } template void vrender0soc_device::tmcon_w(offs_t offset, u32 data, u32 mem_mask) { - u32 const old = m_timer_control[Which]; - data = COMBINE_DATA(&m_timer_control[Which]); + vr0_timer &tmr = m_timer[Which]; + u32 const old = tmr.control; + data = COMBINE_DATA(&tmr.control); - if ((data ^ old) & 1) + if (BIT(data ^ old, 0)) { - if (data & 1) + if (BIT(data, 0)) { timer_start(Which); } else { // Timer stop - m_timer[Which]->adjust(attotime::never); -// printf("timer %d stop\n", Which); + tmr.timer->adjust(attotime::never); +// logerror("%s: timer %d stop\n", machine().describe_context(), Which); } } } @@ -384,13 +388,13 @@ void vrender0soc_device::tmcon_w(offs_t offset, u32 data, u32 mem_mask) template u16 vrender0soc_device::tmcnt_r() { - return m_timer_count[Which] & 0xffff; + return m_timer[Which].count & 0xffff; } template void vrender0soc_device::tmcnt_w(offs_t offset, u16 data, u16 mem_mask) { - COMBINE_DATA(&m_timer_count[Which]); + COMBINE_DATA(&m_timer[Which].count); } /* @@ -400,13 +404,16 @@ void vrender0soc_device::tmcnt_w(offs_t offset, u16 data, u16 mem_mask) */ // helper -// bit 5 and bit 3 of the DMA control don't increment source/destination addresses if enabled. +// bit 5 and bit 3 of the DMA control don't in/decrement source/destination addresses if enabled. // At the time of writing P's Attack is the only SW that uses this feature, // in a work RAM to area $4500000 transfer, probably to extend something ... -inline int vrender0soc_device::dma_setup_hold(u8 setting, u8 bitmask) +static inline int dma_setup_hold(u8 setting, u8 holdbit, u8 dirbit) { - // TODO: supports negative value - return setting & bitmask ? 0 : (setting & 2) ? 4 : (1 << (setting & 1)); + if (BIT(setting, holdbit)) + return 0; + + int const amount = BIT(setting, 1) ? 4 : (1 << BIT(setting, 0)); + return BIT(setting, dirbit) ? -amount : amount; } template u32 vrender0soc_device::dmasa_r() { return m_dma[Which].src; } @@ -419,19 +426,42 @@ template u32 vrender0soc_device::dmac_r() { return m_dma[Which].ctrl; template void vrender0soc_device::dmac_w(offs_t offset, u32 data, u32 mem_mask) { - if (((data ^ m_dma[Which].ctrl) & (1 << 10)) && (data & (1 << 10))) //DMAOn + vr0_dma &dma = m_dma[Which]; + // Control register format: (per DMA controller) + // Bit Description + // 1111 1111 1111 1111 0000 0000 0000 0000 + // fedc ba98 7654 3210 fedc ba98 7654 3210 + // xxxx xxxx xxxx xxxx xxxx x--- ---- ---- Reserved + // ---- ---- ---- ---- ---- -x-- ---- ---- DMA enable + // ---- ---- ---- ---- ---- --x- ---- ---- DMA request active polarity (0: high, 1: low) + // ---- ---- ---- ---- ---- ---x ---- ---- DMA Counter write enable (0: disable, 1: enable) + // ---- ---- ---- ---- ---- ---- xx-- ---- DMA transfer mode + // ---- ---- ---- ---- ---- ---- 0*-- ---- Single transfer + // ---- ---- ---- ---- ---- ---- 10-- ---- Repeat with reload counter + // ---- ---- ---- ---- ---- ---- 11-- ---- Repeat with reload counter and registers + // ---- ---- ---- ---- ---- ---- --x- ---- DMA Source address hold (0: in/decrease, 1: fix address) + // ---- ---- ---- ---- ---- ---- ---x ---- DMA Source address direction (0: increase, 1: decrease) + // ---- ---- ---- ---- ---- ---- ---- x--- DMA Destination address hold (0: in/decrease, 1: fix address) + // ---- ---- ---- ---- ---- ---- ---- -x-- DMA Destination address direction (0: increase, 1: decrease) + // ---- ---- ---- ---- ---- ---- ---- --xx DMA Transfer width + // ---- ---- ---- ---- ---- ---- ---- --00 8 bit + // ---- ---- ---- ---- ---- ---- ---- --01 16 bit + // ---- ---- ---- ---- ---- ---- ---- --1* 32 bit + // *: Don't care + + if (BIT(data ^ dma.ctrl, 10) && BIT(data, 10)) //DMAOn { u32 const ctr = data; - u32 const src = m_dma[Which].src; - u32 const dst = m_dma[Which].dst; - u32 const cnt = m_dma[Which].size; - int const src_inc = dma_setup_hold(ctr, 0x20); - int const dst_inc = dma_setup_hold(ctr, 0x08); + u32 const src = dma.src; + u32 const dst = dma.dst; + u32 const cnt = dma.size; + int const src_inc = dma_setup_hold(ctr, 5, 4); + int const dst_inc = dma_setup_hold(ctr, 3, 2); - if ((ctr & 0xd4) != 0) - popmessage("DMA%d with unhandled mode %02x, contact MAMEdev",Which,ctr); + if ((ctr & 0xc0) != 0) + popmessage("DMA%d with unhandled mode %02x, contact MAMEdev", Which, ctr); - if (ctr & 0x2) //32 bits + if (BIT(ctr, 1)) //32 bits { for (int i = 0; i < cnt; ++i) { @@ -439,7 +469,7 @@ void vrender0soc_device::dmac_w(offs_t offset, u32 data, u32 mem_mask) m_host_space->write_dword(dst + i * dst_inc, v); } } - else if (ctr & 0x1) //16 bits + else if (BIT(ctr, 0)) //16 bits { for (int i = 0; i < cnt; ++i) { @@ -457,10 +487,10 @@ void vrender0soc_device::dmac_w(offs_t offset, u32 data, u32 mem_mask) } data &= ~(1 << 10); // TODO: insta-DMA - m_dma[Which].size = 0; + dma.size = 0; int_req(7 + Which); } - COMBINE_DATA(&m_dma[Which].ctrl); + COMBINE_DATA(&dma.ctrl); } /* @@ -638,10 +668,10 @@ void vrender0soc_device::crtc_update() // TODO: divider setting = 0 is reserved, guess it just desyncs the signal? pixel_clock /= (m_crtcregs[0x04 / 4] & 7) + 1; - //printf("DCLK divider %d\n",(m_crtcregs[0x04 / 4] & 7) + 1); - //printf("VCLK select %d\n",(m_crtcregs[0x04 / 4] & 8)); - //printf("CBCLK divider %d\n",((m_crtcregs[0x04 / 4] & 0x70) >> 4) + 1); - //printf("ivclk speed %d\n",(m_crtcregs[0x04 / 4] & 0x80)); + //logerror("DCLK divider %d\n",(m_crtcregs[0x04 / 4] & 7) + 1); + //logerror("VCLK select %d\n",(m_crtcregs[0x04 / 4] & 8)); + //logerror("CBCLK divider %d\n",((m_crtcregs[0x04 / 4] & 0x70) >> 4) + 1); + //logerror("ivclk speed %d\n",(m_crtcregs[0x04 / 4] & 0x80)); if (!interlace_mode) { @@ -653,7 +683,7 @@ void vrender0soc_device::crtc_update() vtot += 9; - //printf("%dX%d %dX%d %d\n",htot, vtot, hdisp, vdisp, pixel_clock); + //logerror("%dX%d %dX%d %d\n",htot, vtot, hdisp, vdisp, pixel_clock); rectangle const visarea(0, hdisp - 1, 0, vdisp - 1); m_screen->configure(htot, vtot, visarea, HZ_TO_ATTOSECONDS(pixel_clock) * vtot * htot); diff --git a/src/devices/machine/vrender0.h b/src/devices/machine/vrender0.h index ef7739bd196..dbaa9591d7f 100644 --- a/src/devices/machine/vrender0.h +++ b/src/devices/machine/vrender0.h @@ -90,7 +90,7 @@ public: template void rx_w(int state) { m_uart[Port]->rx_w((u8)state); } // handlers - bool crt_is_blanked() { return ((m_crtcregs[0] & 0x0200) == 0x0200); } + bool crt_is_blanked() { return BIT(m_crtcregs[0], 9); } bool crt_active_vblank_irq(); void int_req(int num); u8 irq_callback(); @@ -127,16 +127,22 @@ private: u8 m_int_high = 0; u32 m_intst = 0; - u32 m_timer_control[4]{0}; - u16 m_timer_count[4]{0}; - emu_timer *m_timer[4]{nullptr}; + struct vr0_timer + { + u32 control = 0; + u16 count = 0; + emu_timer *timer = nullptr; + }; + vr0_timer m_timer[4]; - struct { + struct vr0_dma + { u32 src = 0; u32 dst = 0; u32 size = 0; u32 ctrl = 0; - } m_dma[2]; + }; + vr0_dma m_dma[2]; devcb_write_line m_int_cb; devcb_write_line::array<2> m_write_tx; @@ -171,7 +177,6 @@ private: template void dmasa_w(offs_t offset, u32 data, u32 mem_mask = ~0); template u32 dmada_r(); template void dmada_w(offs_t offset, u32 data, u32 mem_mask = ~0); - inline int dma_setup_hold(u8 setting, u8 bitmask); // CRTC u32 crtc_r(offs_t offset); From 14cec11c19130e4074070da1f15397c283d30f05 Mon Sep 17 00:00:00 2001 From: m1macrophage <168948267+m1macrophage@users.noreply.github.com> Date: Sat, 7 Mar 2026 06:51:53 -0800 Subject: [PATCH 168/351] machine/pit8253.cpp: Improved timing accuracy. (#15064) * machine/pit8253.cpp: Improved timing accuracy. * The counter is loaded and decremented on the falling edge of CLK. * GATE and GATE transitions (for edge-sensitive modes) are sampled on the rising edge of CLK. * Mode 3 treats GATE as edge-sensitive. * In modes 2 and 3, GATE has an immediate effect on OUT. * Deferred the execution of `set_clock_signal`. * Removed 8253 timing workarounds from sixtrak. * pit8253.cpp: Ensure the recent fix for mode 3 does not yet apply to `set_clk` configurations. --- src/devices/machine/pit8253.cpp | 81 +++++++++++++++++++++++++++------ src/devices/machine/pit8253.h | 12 +++-- src/mame/sequential/sixtrak.cpp | 38 ++-------------- 3 files changed, 79 insertions(+), 52 deletions(-) diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp index c75c8b6a9cc..7ea6a19ce88 100644 --- a/src/devices/machine/pit8253.cpp +++ b/src/devices/machine/pit8253.cpp @@ -127,7 +127,10 @@ void pit_counter_device::device_start() save_item(NAME(m_wmsb)); save_item(NAME(m_rmsb)); save_item(NAME(m_output)); + save_item(NAME(m_output_pin)); save_item(NAME(m_gate)); + save_item(NAME(m_gate_input)); + save_item(NAME(m_gate_rose)); save_item(NAME(m_latched_count)); save_item(NAME(m_latched_status)); save_item(NAME(m_null_count)); @@ -137,6 +140,8 @@ void pit_counter_device::device_start() /* zerofill */ m_gate = 1; + m_gate_input = 1; + m_gate_rose = 0; m_phase = 0; m_clock_signal = 0; @@ -146,6 +151,7 @@ void pit_counter_device::device_start() m_lowcount = 0; m_output = 0; + m_output_pin = 0; m_latched_count = 0; m_latched_status = 0; m_null_count = 1; @@ -178,6 +184,7 @@ void pit_counter_device::device_reset() m_lowcount = 0; m_output = 2; /* output is undetermined */ + m_output_pin = 2; m_latched_count = 0; m_latched_status = 0; m_null_count = 1; @@ -300,12 +307,29 @@ void pit_counter_device::set_output(int output) if (output != m_output) { m_output = output; - LOG2("set_output() timer %d: %s\n", m_index, output ? "low to high" : "high to low"); - - downcast(owner())->m_out_handler[m_index](output); + flush_output(); } } +void pit_counter_device::flush_output() +{ + int new_output = m_output; + if (m_clockin == 0) + { + // TODO: The same logic should apply when m_clockin != 0, but that needs + // to be verified. + const int mode = CTRL_MODE(m_control); + if ((mode == 2 || mode == 3) && m_gate_input == 0) + new_output = 1; + } + + if (new_output != m_output_pin) + { + LOG2("set_output() timer %d: %s\n", m_index, new_output ? "low to high" : "high to low"); + m_output_pin = new_output; + downcast(owner())->m_out_handler[m_index](new_output); + } +} /* This emulates timer "timer" for "elapsed_cycles" cycles and assumes no callbacks occur during that time. */ @@ -1017,7 +1041,8 @@ TIMER_CALLBACK_MEMBER(pit_counter_device::count_w_deferred) m_last_updated += m_clock_period; load_count(data); - simulate(0); + if (m_clockin != 0) + simulate(0); if (CTRL_MODE(m_control) == 0) set_output(0); @@ -1031,7 +1056,8 @@ TIMER_CALLBACK_MEMBER(pit_counter_device::count_w_deferred) m_last_updated += m_clock_period; load_count(data << 8); - simulate(0); + if (m_clockin != 0) + simulate(0); if (CTRL_MODE(m_control) == 0) set_output(0); @@ -1046,7 +1072,8 @@ TIMER_CALLBACK_MEMBER(pit_counter_device::count_w_deferred) m_last_updated += m_clock_period; load_count(m_lowcount | (data << 8)); - simulate(0); + if (m_clockin != 0) + simulate(0); } else { @@ -1084,22 +1111,35 @@ void pit8253_device::write(offs_t offset, uint8_t data) m_counter[offset]->count_w(data); } +bool pit_counter_device::edge_sensitive_gate() const +{ + const int mode = CTRL_MODE(m_control); + // TODO: The m_clockin check should not be necessary, but removing it needs + // to be verified. + return mode == 1 || mode == 2 || (mode == 3 && m_clockin == 0) || mode == 5; +} + TIMER_CALLBACK_MEMBER(pit_counter_device::gate_w_deferred) { update(); int state = param; LOG2("gate_w(): state=%d\n", state); - if (state != m_gate) + if (state != m_gate_input) { - int mode = CTRL_MODE(m_control); - update(); - m_gate = state; - if (state != 0 && ( mode == 1 || mode == 2 || mode == 5 )) + m_gate_input = state; + if (m_clockin != 0) + m_gate = state; + if (state != 0 && edge_sensitive_gate()) { - m_phase = 1; + if (m_clockin != 0) + m_phase = 1; + else + m_gate_rose = 1; } + if (m_clockin == 0) + flush_output(); update(); } } @@ -1120,12 +1160,25 @@ void pit_counter_device::set_clockin(double new_clockin) } -void pit_counter_device::set_clock_signal(int state) +TIMER_CALLBACK_MEMBER(pit_counter_device::set_clock_signal_deferred) { + const int state = param; LOG2("set_clock_signal(): state = %d\n", state); - /* Trigger on low to high transition */ + /* Sample GATE and the GATE edge detection flipflop on low to high transition */ if (!m_clock_signal && state) + { + m_gate = m_gate_input; + if (m_gate_rose) + { + if (edge_sensitive_gate()) + m_phase = 1; + m_gate_rose = 0; + } + } + + /* Trigger on high to low transition */ + if (m_clock_signal && !state) { /* Advance a cycle */ simulate(1); diff --git a/src/devices/machine/pit8253.h b/src/devices/machine/pit8253.h index 0a1da759a09..198c80b39ea 100644 --- a/src/devices/machine/pit8253.h +++ b/src/devices/machine/pit8253.h @@ -57,6 +57,7 @@ private: void decrease_counter_value(int64_t cycles); void load_counter_value(); void set_output(int output); + void flush_output(); void simulate(int64_t elapsed_cycles); TIMER_CALLBACK_MEMBER(update_tick); void update(); @@ -64,13 +65,15 @@ private: uint8_t read(); void load_count(uint16_t newcount); void readback(int command); + bool edge_sensitive_gate() const; void control_w(uint8_t data) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(pit_counter_device::control_w_deferred), this), data); } TIMER_CALLBACK_MEMBER(control_w_deferred); void count_w(uint8_t data) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(pit_counter_device::count_w_deferred), this), data); } TIMER_CALLBACK_MEMBER(count_w_deferred); void gate_w(int state) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(pit_counter_device::gate_w_deferred), this), state); } TIMER_CALLBACK_MEMBER(gate_w_deferred); - void set_clock_signal(int state); + void set_clock_signal(int state) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(pit_counter_device::set_clock_signal_deferred), this), state); } + TIMER_CALLBACK_MEMBER(set_clock_signal_deferred); void set_clockin(double new_clockin); // internal state @@ -92,9 +95,12 @@ private: uint8_t m_lowcount; // LSB of new counter value for 16-bit writes bool m_rmsb; // true = Next read is MSB of 16-bit value bool m_wmsb; // true = Next write is MSB of 16-bit value - int m_output; // 0 = low, 1 = high + int m_output; // output value based on counter state (0 = low, 1 = high) + int m_output_pin; // state of the output pin (0 = low, 1 = high) - int m_gate; // gate input (0 = low, 1 = high) + int m_gate; // sampled gate (0 = low, 1 = high) + int m_gate_input; // state of the gate input pin (0 = low, 1 = high) + int m_gate_rose; // gate input had a low-to-high transition (0 = no, 1 = yes) int m_latched_count; // number of bytes of count latched int m_latched_status; // 1 = status latched (8254 only) int m_null_count; // 1 = mode control or count written, 0 = count loaded diff --git a/src/mame/sequential/sixtrak.cpp b/src/mame/sequential/sixtrak.cpp index 128729854b9..79a5560178c 100644 --- a/src/mame/sequential/sixtrak.cpp +++ b/src/mame/sequential/sixtrak.cpp @@ -187,7 +187,6 @@ private: void tuning_counter_gate_w(int state); void tuning_counter_out_changed(int state); - void tuning_ff_comp_out_changed(int state); void update_tuning_timer(); TIMER_CALLBACK_MEMBER(tuning_timer_tick); @@ -227,8 +226,6 @@ private: output_finder<2> m_digits; emu_timer *m_tuning_timer = nullptr; - bool m_tuning_counter_clock_started = false; - u8 m_tuning_counter_gate = 0; u8 m_tuning_counter_out = 0; u8 m_key_row = 0; @@ -507,13 +504,9 @@ void sixtrak_state::update_master_volume() void sixtrak_state::tuning_counter_gate_w(int state) { - m_tuning_counter_gate = state; - if (!m_tuning_counter_gate) - m_tuning_counter_clock_started = false; + m_pit->write_gate0(state); - m_pit->write_gate0(m_tuning_counter_gate); - - if (m_tuning_counter_gate) + if (state) { LOGMASKED(LOG_AUTOTUNE, "Autotune routine started.\n"); update_tuning_timer(); @@ -532,29 +525,6 @@ void sixtrak_state::tuning_counter_out_changed(int state) } } -void sixtrak_state::tuning_ff_comp_out_changed(int state) -{ - // The autotune implementation on the Six-Trak depends on behavior of the - // 8253 that does not seem to be accurately emulated in pit8253.cpp. - // Specifically, the Six-Trak expects that: - // - The counter is incremented on the negative-going edge of the clock. - // - In mode 1, counting will start after the first *full* clock cycle - // (positive-going edge followed by negative-going) after the gate is - // enabled. - - // This implementation works around those issues as follows: - // - The signal to the CLK0 PIT input is inverted. - // - Using `m_tuning_counter_clock_started` to detect the first positive- - // going clock edge after the gate is enabled, and only clocking the PIT - // after this has occurred. - - if (m_tuning_counter_gate && state) - m_tuning_counter_clock_started = true; - - if (m_tuning_counter_clock_started) - m_pit->write_clk0(!state); -} - void sixtrak_state::update_tuning_timer() { // The tuning circuit uses a comparator (U144, LM311) that senses the @@ -771,8 +741,6 @@ void sixtrak_state::io_map(address_map &map) void sixtrak_state::machine_start() { - save_item(NAME(m_tuning_counter_clock_started)); - save_item(NAME(m_tuning_counter_gate)); save_item(NAME(m_tuning_counter_out)); save_item(NAME(m_key_row)); save_item(NAME(m_dac_value)); @@ -826,7 +794,7 @@ void sixtrak_state::sixtrak_common(machine_config &config, device_sound_interfac TTL7474(config, "nmiff", 0).output_cb().set_inputline(m_maincpu, INPUT_LINE_NMI).invert(); // U146B TTL7474(config, m_tuning_ff, 0); - m_tuning_ff->comp_output_cb().set(FUNC(sixtrak_state::tuning_ff_comp_out_changed)); + m_tuning_ff->comp_output_cb().set(m_pit, FUNC(pit8253_device::write_clk0)); MIDI_PORT(config, "mdin", midiin_slot, "midiin").rxd_handler().set("midiacia", FUNC(acia6850_device::write_rxd)); MIDI_PORT(config, "mdout", midiout_slot, "midiout"); From b7c814a4a35fa22a07950a9a29dd2a75bd237b35 Mon Sep 17 00:00:00 2001 From: Jesus Ramos Date: Sat, 7 Mar 2026 06:54:36 -0800 Subject: [PATCH 169/351] cpu/sh: Add cv1k SH7709S cache handling behavior for slowdown emulation (#15054) * Add cv1k SH7709S cache handling behavior for slowdown emulation - Handles some basic caching for the sh7709s used for cv1k titles so that they run at more appropriate speeds * sh7709s.cpp: Fix up a couple of timing handling bugs - Use the writeback flag instead of write flag as the access to external memory is what matters for those - Fix up the writeback buffer timing, we don't need to precharge twice for writes. Also rolled up the command costs the SDRAM region handling so the writes only need to add trwl to the penalty - Check for burst mode availability when determining the base cycle cost, only burst ROM and sdram can use burst access to each other area requires 4 separate accesses * sh7709s.cpp: Add some comments explaining missing/unimplemented features - Add the non-burst timing table for WCR2 - Updates and adds a couple of extra comments related to the penalties/timing --- scripts/src/cpu.lua | 2 + src/devices/cpu/sh/sh4.cpp | 27 -- src/devices/cpu/sh/sh4.h | 11 - src/devices/cpu/sh/sh7709s.cpp | 562 +++++++++++++++++++++++++++++++++ src/devices/cpu/sh/sh7709s.h | 56 ++++ src/mame/cave/cv1k.cpp | 4 +- 6 files changed, 622 insertions(+), 40 deletions(-) create mode 100644 src/devices/cpu/sh/sh7709s.cpp create mode 100644 src/devices/cpu/sh/sh7709s.h diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 570d2bd1b87..967f01e75ee 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -943,6 +943,8 @@ if CPUS["SH"] then MAME_DIR .. "src/devices/cpu/sh/sh7604_wdt.h", MAME_DIR .. "src/devices/cpu/sh/sh7604.cpp", MAME_DIR .. "src/devices/cpu/sh/sh7604.h", + MAME_DIR .. "src/devices/cpu/sh/sh7709s.h", + MAME_DIR .. "src/devices/cpu/sh/sh7709s.cpp", } end diff --git a/src/devices/cpu/sh/sh4.cpp b/src/devices/cpu/sh/sh4.cpp index a47754ba4e0..abcfbc0c4fd 100644 --- a/src/devices/cpu/sh/sh4.cpp +++ b/src/devices/cpu/sh/sh4.cpp @@ -40,7 +40,6 @@ DEFINE_DEVICE_TYPE(SH3, sh3_device, "sh3", "Hitachi SH-3 (Unidentified)") DEFINE_DEVICE_TYPE(SH7708S, sh7708s_device, "sh7708s", "Hitachi SH7708S") DEFINE_DEVICE_TYPE(SH7709, sh7709_device, "sh7709", "Hitachi SH7709") -DEFINE_DEVICE_TYPE(SH7709S, sh7709s_device, "sh7709s", "Hitachi SH7709S") DEFINE_DEVICE_TYPE(SH4, sh4_device, "sh4", "Hitachi SH-4 (Unidentified)") DEFINE_DEVICE_TYPE(SH7091, sh7091_device, "sh7091", "Hitachi SH7091") DEFINE_DEVICE_TYPE(SH7750, sh7750_device, "sh7750", "Hitachi SH7750") @@ -574,26 +573,6 @@ void sh7709_device::sh3_register_map(address_map& map) scif_7709_map(map); } -void sh7709s_device::sh3_register_map(address_map& map) -{ - ccn_7709s_map(map); - ubc_7709s_map(map); - cpg_7709_map(map); - bsc_7709s_map(map); - rtc_map(map); - intc_7709_map(map); - dmac_7709_map(map); - tmu_map(map); - sci_7709_map(map); - cmt_7709_map(map); - ad_7709_map(map); - da_7709_map(map); - port_7709_map(map); - irda_7709_map(map); - scif_7709_map(map); - udi_7709s_map(map); -} - void sh3_base_device::ccn_map(address_map& map) { map(0xfffffff0, 0xfffffff3).rw(FUNC(sh3_base_device::pteh_r), FUNC(sh3_base_device::pteh_w)); @@ -972,12 +951,6 @@ sh7709_device::sh7709_device(const machine_config &mconfig, const char *tag, dev { } -sh7709s_device::sh7709s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness) - : sh3_base_device(mconfig, SH7709S, tag, owner, clock, endianness) -{ -} - - sh4_device::sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness) : sh4_base_device(mconfig, SH4, tag, owner, clock, endianness) { diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h index d92e374bc5e..56bff8f171e 100644 --- a/src/devices/cpu/sh/sh4.h +++ b/src/devices/cpu/sh/sh4.h @@ -677,7 +677,6 @@ protected: virtual void static_generate_entry_point() override; virtual void static_generate_memory_accessor(int size, int iswrite, const char *name, uml::code_handle *&handleptr) override; -private: bool m_bigendian; }; @@ -1902,15 +1901,6 @@ public: virtual void sh3_register_map(address_map& map) override ATTR_COLD; }; -class sh7709s_device : public sh3_base_device -{ -public: - sh7709s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE); - - virtual void sh3_register_map(address_map& map) override ATTR_COLD; -}; - - class sh4_device : public sh4_base_device { public: @@ -1978,7 +1968,6 @@ protected: DECLARE_DEVICE_TYPE(SH3, sh3_device) DECLARE_DEVICE_TYPE(SH7708S, sh7708s_device) DECLARE_DEVICE_TYPE(SH7709, sh7709_device) -DECLARE_DEVICE_TYPE(SH7709S, sh7709s_device) DECLARE_DEVICE_TYPE(SH4, sh4_device) DECLARE_DEVICE_TYPE(SH7091, sh7091_device) diff --git a/src/devices/cpu/sh/sh7709s.cpp b/src/devices/cpu/sh/sh7709s.cpp new file mode 100644 index 00000000000..a2cdb2d622a --- /dev/null +++ b/src/devices/cpu/sh/sh7709s.cpp @@ -0,0 +1,562 @@ +// license:BSD-3-Clause +// copyright-holders:Jesus Ramos + +// SH 7709S experimental cache/memory timing +// Some values/timing tables are hardcoded +// (such as no bank mode timing/sdram access logic, and some area mappings) +// for cv1k emulation specifically + +// Unimplemented functionality: +// - Cache invalidation and write locking of cache lines +// - Uncached access penalty +// - Prefix instruction fetch timing + cache handling +// - Checks for certain area specifics : bank mode timing for sdram access, area check for sdram, area check for burst mode + burst size +// - TLB simulation + timing and lookups +// - Branch predicition/mispredict penalties - Needs a branch target buffer and some basic tracking, didn't make a huge difference for cv1k when I threw one together +// - Full pipeline simulation: +// Some penalties should overlap with following instructions that don't involve bus access +// Writeback timing for certain operations should also overlap in some cases +// If the CPU supports critical word first the instruction that takes the miss should be able to start as soon as that address is read in from memory even if there are further words to be read + +#include "sh7709s.h" +#include "sh3comn.h" +#include "sh4comn.h" +#include "cpu/drcumlsh.h" + +DEFINE_DEVICE_TYPE(SH7709S, sh7709s_device, "sh7709s", "Hitachi SH7709S") + +sh7709s_device::sh7709s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness) + : sh3_base_device(mconfig, SH7709S, tag, owner, clock, endianness) +{ +} + +void sh7709s_device::device_reset() +{ + sh3_base_device::device_reset(); + + memset(m_cache, 0, sizeof(m_cache)); + m_wb_address = 0; + m_last_area_accessed = 0; + m_last_area_accessed_was_write = false; +} + +void sh7709s_device::device_start() +{ + sh3_base_device::device_start(); + + memset(m_cache, 0, sizeof(m_cache)); + m_wb_address = 0; + m_last_area_accessed = 0; + m_last_area_accessed_was_write = false; + + for (int i = 0; i < SH7709S_CACHE_BLOCKS; i++) + for (int j = 0; j < SH7709S_CACHE_ASSOCIATIVITY; j++) + { + save_item(NAME(m_cache[i][j].tag), j + (i * SH7709S_CACHE_BLOCKS)); + save_item(NAME(m_cache[i][j].lru), j + (i * SH7709S_CACHE_BLOCKS)); + save_item(NAME(m_cache[i][j].dirty), j + (i * SH7709S_CACHE_BLOCKS)); + } + + save_item(NAME(m_wb_address)); + save_item(NAME(m_last_area_accessed)); + save_item(NAME(m_last_area_accessed_was_write)); +} + +static bool is_cacheable(uint32_t address) +{ + // 0x00000000 - 0x80000000 2GB cacheable virtual space + // 0x80000000 - 0xA0000000 0.5GB fixed physical cacheable space + // 0xC0000000 - 0xE0000000 0.5GB virtual cacheable space + uint8_t region = address >> 29; + return region != 0x5 && region != 0x7; +} + +// Returns true on cache hit, false if there was a miss cache miss and updates the cache state to reflect the access +bool sh7709s_device::cache_access(uint32_t address, bool write) +{ + if (!is_cacheable(address)) + return false; + + uint32_t cache_address = address / SH7709S_CACHE_LINE_SIZE; + uint32_t cache_block = cache_address % SH7709S_CACHE_BLOCKS; + + for (int i = 0; i < SH7709S_CACHE_ASSOCIATIVITY; i++) + { + struct sh7709s_cache_entry *entry = &m_cache[cache_block][i]; + if (entry->tag == cache_address) + { + if (write) + entry->dirty = 1; + // If the entry is already the latest in the LRU no need to update anything else + if (entry->lru != SH7709S_CACHE_ASSOCIATIVITY - 1) + { + entry->lru = SH7709S_CACHE_ASSOCIATIVITY - 1; + for (int j = 0; j < SH7709S_CACHE_ASSOCIATIVITY; j++) + { + struct sh7709s_cache_entry* update_entry = &m_cache[cache_block][j]; + if (i != j && update_entry->lru != 0) + update_entry->lru--; + } + } + return true; + } + } + + // We didn't find the entry in the cache so it's time to evict a cache line + for (int i = 0; i < SH7709S_CACHE_ASSOCIATIVITY; i++) + { + struct sh7709s_cache_entry* entry = &m_cache[cache_block][i]; + if (entry->lru == 0) + { + if (entry->dirty) + { + m_wb_address = entry->tag * SH7709S_CACHE_LINE_SIZE; + m_sh2_state->icount--; // Takes 1 cycle to move the cache line to the wb buffer + } + entry->tag = cache_address; + entry->lru = SH7709S_CACHE_ASSOCIATIVITY - 1; + entry->dirty = write; + for (int j = 0; j < SH7709S_CACHE_ASSOCIATIVITY; j++) + { + struct sh7709s_cache_entry* update_entry = &m_cache[cache_block][j]; + if (i != j && update_entry->lru != 0) + update_entry->lru--; + } + break; + } + } + + return false; +} + +#define SH7709S_AREA_MASK (0x1FFFFFFF) + +unsigned int get_area(uint32_t address) +{ + // Mask to 29 bit physical space + uint32_t phys_mask = address & SH7709S_AREA_MASK; + + return phys_mask >> 26; +} + +static bool is_sdram_region(uint32_t address) +{ + unsigned int area = get_area(address); + + // Hardcoded for now, assumes area 2 and 3 are both mapped to SDRAM + return area == 2 || area == 3; +} + +bool can_use_burst(uint32_t address) +{ + // Assumes only sdram can burst read/write + return is_sdram_region(address); +} + +#define CACHE_LINE_BURST_READ_PENALTY (6) // 2 base + 4 to burst read 16 bytes for a cache line +#define CACHE_LINE_BURST_WRITE_PENALTY (4) // Only the 4 data cycles for the cache line +#define CACHE_MISS_STALL_PENALTY (4) // 3 base (tag lookup, compare, etc...) + 1 for BSC sync +#define BUS_ACCESS_PENALTY (2) + +static unsigned int get_wcr1_timing(uint32_t address, uint16_t wcr1) +{ + unsigned int area = get_area(address); + + if (area > 6 || area == 1) + return 0; + + unsigned int area_shift = 12 - (area * 2); + unsigned int area_val = (wcr1 >> area_shift) & 0x3; + + if (area_val == 0) + return 1; + + return area_val; +} + +static unsigned int get_wcr2_timing(uint32_t address, uint16_t wcr2) +{ + unsigned int area = get_area(address); + bool burst_capable = can_use_burst(address); + + if (area > 6 || area == 1) + return 0; + + unsigned int area_val = 0; + + if (area == 0) + { + area_val = wcr2 & 0x7; + } + else if (area == 2 || area == 3) // These areas have their own timings + { + wcr2 >>= 3; + if (area == 3) + wcr2 >>= 2; + area_val = wcr2 & 0x3; + if (area_val == 0) + return 1; + return area_val; + } + else + { + wcr2 >>= 7 + ((area - 4) * 3); + area_val = wcr2 & 0x7; + } + + if (burst_capable) + { + switch (area_val) + { + case 0: return 2; + case 1: return 2; + case 2: return 3; + case 3: return 4; + case 4: return 4; + case 5: return 6; + case 6: return 8; + case 7: return 10; + } + } + else + { + switch (area_val) + { + case 0: return 0; + case 1: return 1; + case 2: return 2; + case 3: return 3; + case 4: return 4; + case 5: return 6; + case 6: return 8; + case 7: return 10; + } + } + + return 2; // Unreachable +} + +unsigned int mcr_tpc(uint16_t mcr) +{ + unsigned int tpc_val((mcr >> 14) & 0x3); + + // self refresh mode timings, should check RMODE in + // MCR for non cv1k and use the other timings + switch (tpc_val) + { + case 0: return 2; + case 1: return 5; + case 2: return 8; + case 3: return 11; + } + + return 2; // Unreachable +} + +unsigned int mcr_rcd(uint16_t mcr) +{ + return ((mcr >> 12) & 0x3) + 1; +} + +unsigned int mcr_trwl(uint16_t mcr) +{ + return ((mcr >> 10) & 0x3) + 1; +} + +unsigned int mcr_tras(uint16_t mcr) +{ + return ((mcr >> 8) & 0x3) + 2; +} + +// Some of the values used here are bus cycles that might need conversion but it's close enough for now +// It's possible for some instructions to overlap in the pipeline with the fetches but that's a good bit +// of extra tracking required +unsigned int sh7709s_device::access_penalty(uint32_t address, bool write) +{ + // cv1k doesn't use TLB so we can just use raw physical address + unsigned int penalty = 0; + bool is_in_cache = cache_access(address, write); + bool is_wb = false; + bool burst_capable = false; + unsigned int area = 0; + + if (is_in_cache) + goto check_wb; + +wb_handle: + area = get_area(address); + burst_capable = can_use_burst(address); + // If we're swapping access area or read<->write pay the cost in WCR1 for the switch + if (area != m_last_area_accessed || (m_last_area_accessed_was_write && !is_wb) || (!m_last_area_accessed_was_write && is_wb)) + penalty += get_wcr1_timing(address, m_wcr1); + + m_last_area_accessed = area; + m_last_area_accessed_was_write = is_wb; + + // We don't really handle uncached access here but it doesn't seem to affect cv1k slowodwn + if (burst_capable && !is_wb) + penalty += CACHE_LINE_BURST_READ_PENALTY; + if (burst_capable && is_wb) + penalty += CACHE_LINE_BURST_WRITE_PENALTY - 1; // First 4 bytes of the transfer overlaps the column (write) command issue so we can remove 1 cycle + + // If we can't use burst timing it's gonna be pricey to access + // Each access will have to initiate bus access and wait to read 4 words for the cache line fill + if (!burst_capable) + penalty += (BUS_ACCESS_PENALTY + get_wcr2_timing(address, m_wcr2)) * 4; + else if (!is_wb) // For cache line writeback we can ignore the stall as well as CAS latency + penalty += CACHE_MISS_STALL_PENALTY + get_wcr2_timing(address, m_wcr2); + + // On cv1k boards the SDRAM is in self refresh mode so every access is a page miss due to the page close after each fetch + if (is_sdram_region(address)) + { + penalty += BUS_ACCESS_PENALTY + + 1 /* ACTV command issue */ + + mcr_rcd(m_mcr) + + 1 /* Column command issue (read/write), for writes this overlaps the first word write */ + + mcr_tpc(m_mcr) + mcr_tras(m_mcr); + // If trcd cycles is 2 or more for sdram a NOP command to SDRAM is inserted between tr and tc1 which is trcd - 1 cycles long + if (mcr_rcd(m_mcr) >= 2) + penalty += mcr_rcd(m_mcr) - 1; + } + +check_wb: + // The read fetch is always handled first before any wb buffer eviction + // so we always handle those first + // This would normally happen in the background but it's likely that + // you'll hit a subsequent cache miss and take the hit anyway + if (m_wb_address != 0) + { + address = m_wb_address; + is_wb = true; + m_wb_address = 0; + penalty += mcr_trwl(m_mcr); + goto wb_handle; + } + + return penalty; +} + +void sh7709s_device::drc_memory_access_read() +{ + uint32_t address = m_sh2_state->arg0; + m_sh2_state->icount -= access_penalty(address, false); +} + +void sh7709s_device::drc_memory_access_write() +{ + uint32_t address = m_sh2_state->arg0; + m_sh2_state->icount -= access_penalty(address, true); +} + +void sh7709s_device::drc_update_icache() +{ + // Assume the instruction prefetch is perfect for now + // we'll still pay a bit of penalty for the access and + // handle cache writeback when the icache fetch causes + // a dirty line eviction + uint32_t pc_addr = m_sh2_state->pc & SH34_AM; + m_sh2_state->icount -= access_penalty(pc_addr, false); +} + +static void cfunc_drc_memory_access_read(void *param) +{ + ((sh7709s_device*)param)->drc_memory_access_read(); +} + +static void cfunc_drc_memory_access_write(void* param) +{ + ((sh7709s_device*)param)->drc_memory_access_write(); +} + +static void cfunc_drc_update_icache(void* param) +{ + ((sh7709s_device*)param)->drc_update_icache(); +} + +// Have each instruction update the icache when executed since it's a shared icache+dcache + +bool sh7709s_device::generate_group_0(drcuml_block& block, compiler_state& compiler, const opcode_desc* desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +{ + UML_CALLC(block, cfunc_drc_update_icache, this); + + return sh3_base_device::generate_group_0(block, compiler, desc, opcode, in_delay_slot, ovrpc); +} + +bool sh7709s_device::generate_group_4(drcuml_block& block, compiler_state& compiler, const opcode_desc* desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +{ + UML_CALLC(block, cfunc_drc_update_icache, this); + + return sh3_base_device::generate_group_4(block, compiler, desc, opcode, in_delay_slot, ovrpc); +} + +bool sh7709s_device::generate_group_15(drcuml_block& block, compiler_state& compiler, const opcode_desc* desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) +{ + UML_CALLC(block, cfunc_drc_update_icache, this); + + return sh3_base_device::generate_group_15(block, compiler, desc, opcode, in_delay_slot, ovrpc); +} + +// Same as static_generate_memory_accessor from sh4.cpp but with added read/write penalty tracking +// Address of access stored in arg0, size in arg1 (unused for now) +void sh7709s_device::static_generate_memory_accessor(int size, int iswrite, const char* name, uml::code_handle*& handleptr) +{ + /* on entry, address is in I0; data for writes is in I1 */ + /* on exit, read result is in I0 */ + /* routine trashes I0 */ + int label = 1; + + /* begin generating */ + drcuml_block& block(m_drcuml->begin_block(1024)); + + /* add a global entry for this */ + alloc_handle(handleptr, name); + UML_HANDLE(block, *handleptr); // handle *handleptr + + UML_CMP(block, I0, 0xe0000000); + UML_JMPc(block, COND_AE, label); + + UML_AND(block, I0, I0, SH34_AM); // and r0, r0, #AM (0x1fffffff) + + UML_LABEL(block, label++); // label: + + if (!debugger_enabled()) + { + for (auto& elem : m_fastram) + { + if (elem.base != nullptr && (!iswrite || !elem.readonly)) + { + void* fastbase = (uint8_t*)elem.base - elem.start; + uint32_t skip = label++; + if (elem.end != 0xffffffff) + { + UML_CMP(block, I0, elem.end); // cmp i0,end + UML_JMPc(block, COND_A, skip); // ja skip + } + if (elem.start != 0x00000000) + { + UML_CMP(block, I0, elem.start);// cmp i0,fastram_start + UML_JMPc(block, COND_B, skip); // jb skip + } + + if (!iswrite) + { + if (size == 1) + { + UML_XOR(block, I0, I0, m_bigendian ? BYTE8_XOR_BE(0) : BYTE8_XOR_LE(0)); + UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1); // load i0,fastbase,i0,byte + } + else if (size == 2) + { + UML_XOR(block, I0, I0, m_bigendian ? WORD2_XOR_BE(0) : WORD2_XOR_LE(0)); + UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1); // load i0,fastbase,i0,word_x1 + } + else if (size == 4) + { + + UML_XOR(block, I0, I0, m_bigendian ? DWORD_XOR_BE(0) : DWORD_XOR_LE(0)); + UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dword_x1 + } + + UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 + UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size + UML_CALLC(block, cfunc_drc_memory_access_read, this); // callc cfunc_drc_memory_access_read,this + + UML_RET(block); // ret + } + else + { + if (size == 1) + { + UML_XOR(block, I0, I0, m_bigendian ? BYTE8_XOR_BE(0) : BYTE8_XOR_LE(0)); + UML_STORE(block, fastbase, I0, I1, SIZE_BYTE, SCALE_x1);// store fastbase,i0,i1,byte + } + else if (size == 2) + { + UML_XOR(block, I0, I0, m_bigendian ? WORD2_XOR_BE(0) : WORD2_XOR_LE(0)); + UML_STORE(block, fastbase, I0, I1, SIZE_WORD, SCALE_x1);// store fastbase,i0,i1,word_x1 + } + else if (size == 4) + { + UML_XOR(block, I0, I0, m_bigendian ? DWORD_XOR_BE(0) : DWORD_XOR_LE(0)); + UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1 + } + + UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 + UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size + UML_CALLC(block, cfunc_drc_memory_access_write, this); // callc cfunc_drc_memory_access_write,this + + UML_RET(block); // ret + } + + UML_LABEL(block, skip); // skip: + } + } + } + + if (iswrite) + { + switch (size) + { + case 1: + UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write r0, r1, program_byte + break; + + case 2: + UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write r0, r1, program_word + break; + + case 4: + UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write r0, r1, program_dword + break; + } + + UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 + UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size + UML_CALLC(block, cfunc_drc_memory_access_write, this); // callc cfunc_drc_memory_access_write,this + } + else + { + switch (size) + { + case 1: + UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read r0, program_byte + break; + + case 2: + UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read r0, program_word + break; + + case 4: + UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read r0, program_dword + break; + } + + UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 + UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size + UML_CALLC(block, cfunc_drc_memory_access_read, this); // callc cfunc_drc_memory_access_read,this + } + + UML_RET(block); // ret + + block.end(); +} + +void sh7709s_device::sh3_register_map(address_map& map) +{ + ccn_7709s_map(map); + ubc_7709s_map(map); + cpg_7709_map(map); + bsc_7709s_map(map); + rtc_map(map); + intc_7709_map(map); + dmac_7709_map(map); + tmu_map(map); + sci_7709_map(map); + cmt_7709_map(map); + ad_7709_map(map); + da_7709_map(map); + port_7709_map(map); + irda_7709_map(map); + scif_7709_map(map); + udi_7709s_map(map); +} diff --git a/src/devices/cpu/sh/sh7709s.h b/src/devices/cpu/sh/sh7709s.h new file mode 100644 index 00000000000..3feb58caf33 --- /dev/null +++ b/src/devices/cpu/sh/sh7709s.h @@ -0,0 +1,56 @@ +// license:BSD-3-Clause +// copyright-holders:Jesus Ramos + +#ifndef MAME_CPU_SH_SH7709S_H +#define MAME_CPU_SH_SH7709S_H + +#include "sh4.h" + +#define SH7709S_CACHE_SIZE (16384) +#define SH7709S_CACHE_LINE_SIZE (16) +#define SH7709S_CACHE_ENTRY_COUNT (SH7709S_CACHE_SIZE / SH7709S_CACHE_LINE_SIZE) +#define SH7709S_CACHE_ASSOCIATIVITY (4) +#define SH7709S_CACHE_BLOCKS (SH7709S_CACHE_ENTRY_COUNT / SH7709S_CACHE_ASSOCIATIVITY) + +// U bit tracked in the dirty field, V bit currently untracked +// Assumes all cache lines are valid as cache line invalidation is unimplemented +struct sh7709s_cache_entry +{ + uint32_t tag; // Address tag for entry + uint8_t lru; // LRU value [0, SH7709S_CACHE_ASSOCIATIVITY) + uint8_t dirty; // Dirty bit for write eviction +}; + +class sh7709s_device : public sh3_base_device +{ +public: + sh7709s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE); + + // DRC functions used to update the cache state + void drc_memory_access_read(); + void drc_memory_access_write(); + void drc_update_icache(); + +protected: + virtual void sh3_register_map(address_map& map) override ATTR_COLD; + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual void static_generate_memory_accessor(int size, int iswrite, const char* name, uml::code_handle*& handleptr) override; + virtual bool generate_group_0(drcuml_block& block, compiler_state& compiler, const opcode_desc* desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override; + virtual bool generate_group_4(drcuml_block& block, compiler_state& compiler, const opcode_desc* desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override; + virtual bool generate_group_15(drcuml_block& block, compiler_state& compiler, const opcode_desc* desc, uint16_t opcode, int in_delay_slot, uint32_t ovrpc) override; + +private: + // Cache state tracking + struct sh7709s_cache_entry m_cache[SH7709S_CACHE_BLOCKS][SH7709S_CACHE_ASSOCIATIVITY]; + uint32_t m_wb_address; // writeback buffer address if there's a dirty cache line to evict + uint8_t m_last_area_accessed; // last memory area accessed for WCR1 timing purposes + bool m_last_area_accessed_was_write; // last memory area accessed operation also for WCR1 timing purposes + + bool cache_access(uint32_t address, bool write); + unsigned int access_penalty(uint32_t address, bool write); +}; + +DECLARE_DEVICE_TYPE(SH7709S, sh7709s_device) + +#endif /* MAME_CPU_SH7709S_H */ diff --git a/src/mame/cave/cv1k.cpp b/src/mame/cave/cv1k.cpp index d30e70789f8..d3989d268ae 100644 --- a/src/mame/cave/cv1k.cpp +++ b/src/mame/cave/cv1k.cpp @@ -180,7 +180,7 @@ Remaining Video issues - End of Blit should send IRQ1. (one game has a valid irq routine that looks like it was used for profiling, but nothing depends on it) Timing - - Correct CPU slowdown emulation and flags (and speed of RAM). Most slowdown seems due to SH-3 uncached RAM access wait states, which is not implemented. + - Experimental SH7709S cache/memory timing - Requires to measure screen raw params for correct video timing? 31/12/2021: @@ -194,7 +194,7 @@ Timing #include "cv1k_v.h" #include "cpu/sh/sh3comn.h" -#include "cpu/sh/sh4.h" +#include "cpu/sh/sh7709s.h" #include "machine/nandflash.h" #include "machine/rtc9701.h" #include "sound/ymz770.h" From 676e03c2f104e962982b718642a6a3f64ee095bd Mon Sep 17 00:00:00 2001 From: ClawGrip Date: Sat, 7 Mar 2026 15:58:19 +0100 Subject: [PATCH 170/351] gaelco/glass.cpp: Add a new Glass set (#15059) New working clones ------------------ Glass (ver 1.0, Break Edition, checksum 13BE832C) [twistedsymphony] --- src/mame/gaelco/glass.cpp | 33 +++++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 34 insertions(+) diff --git a/src/mame/gaelco/glass.cpp b/src/mame/gaelco/glass.cpp index 4e53eab08af..74e80403725 100644 --- a/src/mame/gaelco/glass.cpp +++ b/src/mame/gaelco/glass.cpp @@ -870,6 +870,38 @@ ROM_START( glass10d ) // 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs ROM_END +ROM_START( glass10e ) + ROM_REGION( 0x100000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "pic_3.c23", 0x000000, 0x040000, CRC(96b1e125) SHA1(7934640b80ec73e625317bc49533184b27131330) ) + ROM_LOAD16_BYTE( "pic_2.c22", 0x000001, 0x040000, CRC(6816d508) SHA1(fb9e5c2281d3b99ffb687e74741365305ef24785) ) + + ROM_REGION( 0x8000, "gaelco_ds5002fp:sram", 0 ) // DS5002FP code + ROM_LOAD( "glass_ds5002fp_sram.bin", 0x00000, 0x8000, CRC(47c9df4c) SHA1(e0ac4f3d3086a4e8164d42aaae125037c222118a) ) + + ROM_REGION( 0x100, "gaelco_ds5002fp:mcu:internal", ROMREGION_ERASE00 ) + // these are the default states stored in NVRAM + DS5002FP_SET_MON( 0x29 ) + DS5002FP_SET_RPCTL( 0x00 ) + DS5002FP_SET_CRCR( 0x80 ) + + ROM_REGION( 0x400000, "gfx", 0 ) // same split format as the development board + ROM_LOAD16_BYTE( "al_d0-d7_27c4001.bin", 0x000000, 0x080000, CRC(c668caad) SHA1(742030d27ed5f7f7966d00181e13c7ba9b885df5) ) + ROM_LOAD16_BYTE( "bl_d8-d15_27c4001.bin", 0x000001, 0x080000, CRC(7a6cb91f) SHA1(2c8592d4f92ea380a85f3a43acef3f3898973963) ) + ROM_LOAD16_BYTE( "ah_d0-d7_27c4001.bin", 0x100000, 0x080000, CRC(de27b785) SHA1(aa14e33f42039f67fb418ff45b26bef511c9c7c8) ) + ROM_LOAD16_BYTE( "bh_d8-d15_27c4001.bin", 0x100001, 0x080000, CRC(e9aa45d3) SHA1(a9e09b2e338d75a414eea90672a1a7142e858d84) ) + ROM_LOAD16_BYTE( "cl_d0-d7_27c4001.bin", 0x200000, 0x080000, CRC(e32639be) SHA1(9c18c871d042fe7c62a344f35968457ae8302fa9) ) + ROM_LOAD16_BYTE( "dl_d8-d15_27c4001.bin", 0x200001, 0x080000, CRC(b56eb8a4) SHA1(5d647a3ae175051a11a3c496a32b34a368096487) ) + ROM_LOAD16_BYTE( "ch_d0-d7_27c4001.bin", 0x300000, 0x080000, CRC(1b3f148d) SHA1(b62c5c6fb3f4ad543538764305e2e27b35c37334) ) + ROM_LOAD16_BYTE( "dh_d8-d15_27c4001.bin", 0x300001, 0x080000, CRC(f3638123) SHA1(60d58608de193c1a3176c95419aa38a66e149e2a) ) + + ROM_REGION( 0x100000, "bmap", 0 ) // 16 bitmaps (320x200, indexed colors) + ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) ) + + ROM_REGION( 0x100000, "oki", 0 ) + ROM_LOAD( "c1.bin", 0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) ) + // 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs +ROM_END + ROM_START( glassp ) ROM_REGION( 0x100000, "maincpu", 0 ) // There were 8 x SRM20100LC chips near the CPU and the 2 ROMs below; presumably the game code would have @@ -940,6 +972,7 @@ GAME( 1993, glass10a, glass, glass_ds5002fp, glass, glass_state, empty_init, RO GAME( 1993, glass10b, glass, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (ver 1.0, Break Edition, checksum EBCB0BFE, 22 Nov 1993)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // date from stickers GAME( 1993, glass10c, glass, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (ver 1.0, Break Edition, checksum 6241CD67, 16 Nov 1993)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // date from stickers GAME( 1993, glass10d, glass, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (ver 1.0, Break Edition, checksum 2B43D337, 10 Nov 1993)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // date from stickers +GAME( 1993, glass10e, glass, glass_ds5002fp, glass, glass_state, empty_init, ROT0, "OMK / Gaelco", "Glass (ver 1.0, Break Edition, checksum 13BE832C)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // Even older 1.0 version, without the Break Edition subtitle, maybe prototype? // Enemies don't move correctly and can't be shot, probably requires a different DS5002FP even if it 'passes' the startup check diff --git a/src/mame/mame.lst b/src/mame/mame.lst index f5351091f64..00e4402c8a1 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -18888,6 +18888,7 @@ glass10a glass10b glass10c glass10d +glass10e glassa glassat glasskr From 9b5de8b9a2e45b7c45d14f4c92e7809adff213e6 Mon Sep 17 00:00:00 2001 From: ClawGrip Date: Sat, 7 Mar 2026 15:59:08 +0100 Subject: [PATCH 171/351] gaelco/lotoplay.cpp: Add three Z80-based Loto-Play sets (#15061) New clones marked not working ----------------------------- Loto-Play (Z80, set 1) [Javier Valero, Josep Quingles, Recreativas.org] Loto-Play (Z80, set 2) [Javier Valero, Josep Quingles, Recreativas.org] Loto-Play (Z80, set 3) [Javier Valero, Josep Quingles, Recreativas.org] --- src/mame/gaelco/lotoplay.cpp | 63 +++++++++++++++++++++++++++--------- src/mame/mame.lst | 11 ++++--- 2 files changed, 55 insertions(+), 19 deletions(-) diff --git a/src/mame/gaelco/lotoplay.cpp b/src/mame/gaelco/lotoplay.cpp index 7a1c98ef325..ac8bcf53164 100644 --- a/src/mame/gaelco/lotoplay.cpp +++ b/src/mame/gaelco/lotoplay.cpp @@ -17,9 +17,9 @@ =|= <- 8-Pin Connector | |__________________________________| - Roulette of eight LEDS, seven red and one green (the upper one). - There are at least two version, onw from 1988 and other from 1990. - Some units use a M68705P5 instead of a MC68705P3S. + Roulette of eight LEDs, seven red and one green (the upper one). + There are at least two versions, one from 1988 and other from 1990. + Some units use a M68705P5 or a Z80 instead of a MC68705P3S. More info and dip switches: - https://www.recreativas.org/loto-play-88-11392-gaelco-sa @@ -28,8 +28,7 @@ First Games arcade cab (see the bezel left upper corner with the roulette): - https://www.recreativas.org/first-games-954-covielsa - There are other versions with external ROM, and even others with PIC16C54 - instead of the MC68705 MCU: + Version with a PIC16C54 as main CPU: _____________________________________________ | |_8xDIPS_| __________ O <- GREEN LED | |SN74LS166N O O | @@ -42,11 +41,15 @@ | |__| |__| |__| | |____________________________________________| + There is another type of PCB with a Z80 (exact model unknown) and a external ROM. + *******************************************************************************/ #include "emu.h" + #include "cpu/m6805/m68705.h" #include "cpu/pic16c5x/pic16c5x.h" +#include "cpu/z80/z80.h" namespace { @@ -62,6 +65,7 @@ public: void lotoplay_p3(machine_config &config); void lotoplay_pic(machine_config &config); + void lotoplay_z80(machine_config &config); protected: required_device m_maincpu; @@ -80,34 +84,63 @@ void lotoplay_state::lotoplay_pic(machine_config &config) PIC16C54(config, m_maincpu, 4_MHz_XTAL); // PIC16C54 } -// Sets with MC68705 MCU. +void lotoplay_state::lotoplay_z80(machine_config &config) +{ + Z80(config, m_maincpu, 4'000'000); // unknown clock +} -ROM_START(lotoplay) + +// Sets with MC68705. + +ROM_START(lotoply) ROM_REGION(0x0800, "maincpu", 0) ROM_LOAD("lp_mostra_sp_ultima_68705p3s.bin", 0x0000, 0x0800, CRC(112645cd) SHA1(f2ad6b2fbec36d0bfe034d7bfb036ef6bf4ee395)) ROM_END -ROM_START(lotoplaya) +ROM_START(lotoplya) ROM_REGION(0x0800, "maincpu", 0) ROM_LOAD("lp_mostra_s_125d9_68705p3s.bin", 0x0000, 0x0800, CRC(9b77603c) SHA1(6799b930f9805332bf20c6146b044222fe49d243)) ROM_END -ROM_START(lotoplayb) +ROM_START(lotoplyb) ROM_REGION(0x0800, "maincpu", 0) ROM_LOAD("lp_vii_sch_mostra_11302_68705p3s.bin", 0x0000, 0x0800, CRC(61b426d3) SHA1(b66dc6c382a04d8cdbaee342f179ce80abfd3c71)) ROM_END + // Sets with PIC16C54. -ROM_START(lotoplayp) +ROM_START(lotoplyp) ROM_REGION(0x1fff, "maincpu", 0) ROM_LOAD("loto_play_ff46_pic16c54.bin", 0x0000, 0x1fff, CRC(8840349d) SHA1(e9dcc572c7b577618ddda06be1538be69eb15584)) ROM_END + +// Sets with Z80. + +ROM_START(lotoplyz) + ROM_REGION(0x2000, "maincpu", 0) + ROM_LOAD("grab._lp_sp_ultima_27c64.bin", 0x0000, 0x2000, CRC(980e14ac) SHA1(3f6dc75a8cb3fe38941b8a7900ecccdafabc14e9)) +ROM_END + +ROM_START(lotoplyza) + ROM_REGION(0x2000, "maincpu", 0) + ROM_LOAD("grab._lp_s_3b4c_27c64.bin", 0x0000, 0x2000, CRC(556e2c35) SHA1(612f160592fd122e5a91914618e19eade5b52c3e)) +ROM_END + +ROM_START(lotoplyzb) + ROM_REGION(0x2000, "maincpu", 0) + ROM_LOAD("multn_0.0_27c64.bin", 0x0000, 0x2000, CRC(e74bce2a) SHA1(66a09f5df3a27b0c4bc964b19450734b736dc768)) +ROM_END + + } // anonymous namespace -// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS -GAME( 1988?, lotoplay, 0, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1988?, lotoplaya, lotoplay, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1988?, lotoplayb, lotoplay, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1990?, lotoplayp, lotoplay, lotoplay_pic, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (PIC16C54)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS +GAME( 1988?, lotoply, 0, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1988?, lotoplya, lotoply, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1988?, lotoplyb, lotoply, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplyp, lotoply, lotoplay_pic, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (PIC16C54)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplyz, lotoply, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplyza, lotoply, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplyzb, lotoply, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 00e4402c8a1..d3db08a12c9 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -18910,10 +18910,13 @@ goldartpuk goldartuk @source:gaelco/lotoplay.cpp -lotoplay -lotoplaya -lotoplayb -lotoplayp +lotoply +lotoplya +lotoplyb +lotoplyp +lotoplyz +lotoplyza +lotoplyzb @source:gaelco/mastboy.cpp mastboy From 56dea0516289e2b1cac8595f1d81d4557c989bb7 Mon Sep 17 00:00:00 2001 From: cracyc Date: Sat, 7 Mar 2026 09:46:17 -0600 Subject: [PATCH 172/351] i386: qword ptr also needs the fix --- 3rdparty/softfloat/softfloat.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/3rdparty/softfloat/softfloat.c b/3rdparty/softfloat/softfloat.c index f9e5fed7d1c..b1029e036b8 100644 --- a/3rdparty/softfloat/softfloat.c +++ b/3rdparty/softfloat/softfloat.c @@ -958,6 +958,9 @@ floatx80 int64_to_floatx80( int64 a ) int8 shiftCount; if ( a == 0 ) return packFloatx80( 0, 0, 0 ); + if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) { + return packFloatx80( 1, 0x403E, 0x8000000000000000 ); + } zSign = ( a < 0 ); absA = zSign ? - a : a; shiftCount = countLeadingZeros64( absA ); From 74cb29c61ada4059dae146f105d0fc5df972723a Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 8 Mar 2026 04:04:02 +1100 Subject: [PATCH 173/351] -cpu/sharc: More recompiler improvements: * Implemented fixed point CLIP and add/subtract with carry for recompiler. * Cleaned up and de-duplicated code for setting ASTAT flags on fixed point ALU operationf for recompiler, and fixed AC flag for subract operations. * Optimised generated code for fixed point dual add subtrat, PASS and COMP for recompiler. * Reduced unnecessary ASTAT flag copies for recompiler and added more glue that will be needed for supporting saturating arithmetic. * Cleaned up fixed point COMP code for interpreter. -machine/microtch.cpp: Added the host interface microcontroller to make it easier to look at the program (disabled for now, will be emulated in the future). -video/vrender0.cpp: The inline qualifier implies internal linkage for free functions in C++ - there's no need for static. --- src/devices/cpu/mcs51/i8052.h | 8 +- src/devices/cpu/sharc/compute.hxx | 20 +- src/devices/cpu/sharc/sharc.h | 3 +- src/devices/cpu/sharc/sharcdrc.cpp | 324 +++++++++++++---------------- src/devices/cpu/sharc/sharcfe.cpp | 49 +++-- src/devices/cpu/sharc/sharcfe.h | 22 +- src/devices/machine/microtch.cpp | 20 +- src/devices/machine/microtch.h | 17 +- src/devices/machine/vrender0.cpp | 2 +- 9 files changed, 249 insertions(+), 216 deletions(-) diff --git a/src/devices/cpu/mcs51/i8052.h b/src/devices/cpu/mcs51/i8052.h index a303285a12d..d6d94a930b6 100644 --- a/src/devices/cpu/mcs51/i8052.h +++ b/src/devices/cpu/mcs51/i8052.h @@ -4,12 +4,14 @@ #ifndef MAME_CPU_MCS51_I8052_H #define MAME_CPU_MCS51_I8052_H +#pragma once + #include "i8051.h" -// variants with no internal rom and 256 byte internal memory +// variants with no internal ROM and 256 byte internal memory DECLARE_DEVICE_TYPE(I8032, i8032_device) -// variants 8k internal rom and 256 byte internal memory and more registers +// variants 8k internal ROM, 256 byte internal memory and more registers DECLARE_DEVICE_TYPE(I8052, i8052_device) DECLARE_DEVICE_TYPE(I8752, i8752_device) @@ -74,4 +76,4 @@ public: }; -#endif +#endif // MAME_CPU_MCS51_I8052_H diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index c29f6da52cc..7048460a373 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -212,23 +212,19 @@ void adsp21062_device::compute_and(int rn, int rx, int ry) /* COMP(Rx, Ry) */ void adsp21062_device::compute_comp(int rx, int ry) { - uint32_t comp_accum; - CLEAR_ALU_FLAGS(); - if( REG(rx) == REG(ry) ) + if (REG(rx) == REG(ry) ) m_core->astat |= AZ; - if( (int32_t)REG(rx) < (int32_t)REG(ry) ) + if (int32_t(REG(rx)) < int32_t(REG(ry))) m_core->astat |= AN; // Update ASTAT compare accumulation register - comp_accum = (m_core->astat >> 24) & 0xff; - comp_accum >>= 1; - if ((m_core->astat & (AZ|AN)) == 0) - { - comp_accum |= 0x80; - } - m_core->astat &= 0xffffff; - m_core->astat |= comp_accum << 24; + uint32_t comp_accum = (m_core->astat >> 1) & 0x7f000000; + if ((m_core->astat & (AZ | AN)) == 0) + comp_accum |= 0x80000000; + + m_core->astat &= 0x00ffffff; + m_core->astat |= comp_accum; m_core->astat &= ~AF; } diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 45f3f8796e5..33df1541875 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -484,6 +484,8 @@ private: void static_generate_mode1_ops(); void load_fast_iregs(drcuml_block &block); void save_fast_iregs(drcuml_block &block); + void update_az_an_fixed(drcuml_block &block, const opcode_desc *desc); + void update_az_av_an_ac_fixed(drcuml_block &block, const opcode_desc *desc, bool sub); void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, bool last_delayslot); void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception); bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); @@ -503,7 +505,6 @@ private: void generate_astat_copy(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc); bool if_condition_always_true(int condition); - uint32_t do_condition_astat_bits(int condition); }; diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index 074bcb9048f..3bd565f3cc2 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -206,36 +206,6 @@ bool adsp21062_device::if_condition_always_true(int condition) return false; } -uint32_t adsp21062_device::do_condition_astat_bits(int condition) -{ - uint32_t r = 0; - switch (condition) - { - case 0x00: r = AZ; break; // EQ - case 0x01: r = AZ | AV | AN | AF; break; // LT - case 0x02: r = AZ | AV | AN | AF; break; // LE - case 0x03: r = AC; break; // AC - case 0x04: r = AV; break; // AV - case 0x05: r = MV; break; // MV - case 0x06: r = MN; break; // MS - case 0x07: r = SV; break; // SV - case 0x08: r = SZ; break; // SZ - case 0x0d: r = BTF; break; // TF - case 0x10: r = AZ; break; // NOT EQUAL - case 0x11: r = AZ | AV | AN | AF; break; // GE - case 0x12: r = AZ | AV | AN | AF; break; // GT - case 0x13: r = AC; break; // NOT AC - case 0x14: r = AV; break; // NOT AV - case 0x15: r = MV; break; // NOT MV - case 0x16: r = MN; break; // NOT MS - case 0x17: r = SV; break; // NOT SV - case 0x18: r = SZ; break; // NOT SZ - case 0x1d: r = BTF; break; // NOT TF - } - - return r; -} - /*------------------------------------------------- load_fast_iregs - load any fast integer @@ -266,6 +236,32 @@ void adsp21062_device::save_fast_iregs(drcuml_block &block) } } + +void adsp21062_device::update_az_an_fixed(drcuml_block &block, const opcode_desc *desc) +{ + // expects Z and S flags to be set appropriately + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + if (AF_CALC_REQUIRED) UML_MOV(block, ASTAT_AF, 0); +} + +void adsp21062_device::update_az_av_an_ac_fixed(drcuml_block &block, const opcode_desc *desc, bool sub) +{ + // expects Z, V, S and C flags to be set appropriately + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); + if (AC_CALC_REQUIRED) UML_SETc(block, sub ? COND_NC : COND_C, ASTAT_AC); + if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); + if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + if (AF_CALC_REQUIRED) UML_MOV(block, ASTAT_AF, 0); +} + + void adsp21062_device::static_generate_memory_accessors() { // I0 = read/write data @@ -1524,10 +1520,10 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil // copy ASTAT bits over for conditional loop if (desc->astat_delay_copy_az()) UML_MOV(block, mem(&m_core->astat_delay_copy.az), mem(&m_core->astat_drc.az)); - if (desc->astat_delay_copy_an()) - UML_MOV(block, mem(&m_core->astat_delay_copy.an), mem(&m_core->astat_drc.an)); if (desc->astat_delay_copy_av()) UML_MOV(block, mem(&m_core->astat_delay_copy.av), mem(&m_core->astat_drc.av)); + if (desc->astat_delay_copy_an()) + UML_MOV(block, mem(&m_core->astat_delay_copy.an), mem(&m_core->astat_drc.an)); if (desc->astat_delay_copy_ac()) UML_MOV(block, mem(&m_core->astat_delay_copy.ac), mem(&m_core->astat_drc.ac)); if (desc->astat_delay_copy_mn()) @@ -1540,6 +1536,8 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil UML_MOV(block, mem(&m_core->astat_delay_copy.sz), mem(&m_core->astat_drc.sz)); if (desc->astat_delay_copy_btf()) UML_MOV(block, mem(&m_core->astat_delay_copy.btf), mem(&m_core->astat_drc.btf)); + if (desc->astat_delay_copy_af()) + UML_MOV(block, mem(&m_core->astat_delay_copy.af), mem(&m_core->astat_drc.af)); } void adsp21062_device::generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception) @@ -1757,21 +1755,34 @@ void adsp21062_device::generate_update_circular_buffer(drcuml_block &block, comp void adsp21062_device::generate_astat_copy(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc) { - UML_MOV(block, mem(&m_core->astat_drc_copy.az), ASTAT_AZ); - UML_MOV(block, mem(&m_core->astat_drc_copy.av), ASTAT_AV); - UML_MOV(block, mem(&m_core->astat_drc_copy.an), ASTAT_AN); - UML_MOV(block, mem(&m_core->astat_drc_copy.av), ASTAT_AV); - UML_MOV(block, mem(&m_core->astat_drc_copy.as), ASTAT_AS); - UML_MOV(block, mem(&m_core->astat_drc_copy.ai), ASTAT_AI); - UML_MOV(block, mem(&m_core->astat_drc_copy.af), ASTAT_AF); - UML_MOV(block, mem(&m_core->astat_drc_copy.mn), ASTAT_MN); - UML_MOV(block, mem(&m_core->astat_drc_copy.mv), ASTAT_MV); - UML_MOV(block, mem(&m_core->astat_drc_copy.mu), ASTAT_MU); - UML_MOV(block, mem(&m_core->astat_drc_copy.mi), ASTAT_MI); - UML_MOV(block, mem(&m_core->astat_drc_copy.sv), ASTAT_SV); - UML_MOV(block, mem(&m_core->astat_drc_copy.sz), ASTAT_SZ); - UML_MOV(block, mem(&m_core->astat_drc_copy.ss), ASTAT_SS); - UML_MOV(block, mem(&m_core->astat_drc_copy.btf), ASTAT_BTF); + if (desc->az_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.az), ASTAT_AZ); + if (desc->av_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.av), ASTAT_AV); + if (desc->an_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.an), ASTAT_AN); + if (desc->as_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.as), ASTAT_AS); + if (desc->ai_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.ai), ASTAT_AI); + if (desc->mn_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.mn), ASTAT_MN); + if (desc->mv_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.mv), ASTAT_MV); + if (desc->mu_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.mu), ASTAT_MU); + if (desc->mi_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.mi), ASTAT_MI); + if (desc->sv_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.sv), ASTAT_SV); + if (desc->sz_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.sz), ASTAT_SZ); + if (desc->ss_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.ss), ASTAT_SS); + if (desc->btf_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.btf), ASTAT_BTF); + if (desc->af_used()) + UML_MOV(block, mem(&m_core->astat_drc_copy.af), ASTAT_AF); UML_MOV(block, mem(&m_core->astat_drc_copy.cacc), mem(&m_core->astat_drc.cacc)); } @@ -4038,12 +4049,7 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com UML_DSHR(block, I0, I0, 31); UML_ADD(block, I2, REG(fxa), REG(fya)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, false); // TODO: multiplier flags @@ -4058,12 +4064,7 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com UML_DSHR(block, I0, I0, 31); UML_SUB(block, I2, REG(fxa), REG(fya)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, true); // TODO: multiplier flags @@ -4370,14 +4371,9 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com switch (operation) { case 0x09: // Rn = (Rx + Ry) / 2 - case 0x63: // Rn = CLIP Rx BY Ry case 0x92: // Fn = ABS(Fx - Fy) case 0xdd: // Rn = TRUNC Fx BY Ry case 0xe0: // Fn = Fx COPYSIGN Fy - case 0x05: // Rn = Rx + Ry + CI - case 0x06: // Rn = Rx - Ry + CI - 1 - case 0x25: // Rn = Rx + CI - case 0x26: // Rn = Rx + CI - 1 case 0x30: // Rn = ABS Rx case 0xa5: // Fn = RND Fx case 0xad: // Rn = MANT Fx @@ -4387,125 +4383,105 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com case 0x01: // Rn = Rx + Ry UML_ADD(block, REG(rn), REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, false); return; case 0x02: // Rn = Rx - Ry UML_SUB(block, REG(rn), REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, true); + return; + + case 0x05: // Rn = Rx + Ry + CI + UML_CARRY(block, ASTAT_AC, 0); + UML_ADDC(block, REG(rn), REG(rx), REG(ry)); + update_az_av_an_ac_fixed(block, desc, false); + return; + + case 0x06: // Rn = Rx - Ry + CI - 1 + UML_XOR(block, I0, ASTAT_AC, 0xffffffff); + UML_CARRY(block, I0, 0); + UML_SUBB(block, REG(rn), REG(rx), REG(ry)); + update_az_av_an_ac_fixed(block, desc, true); return; case 0x0a: // COMP(Rx, Ry) + UML_SHR(block, I1, mem(&m_core->astat_drc.cacc), 1); UML_CMP(block, REG(rx), REG(ry)); - UML_SETc(block, COND_Z, I0); - UML_SETc(block, COND_L, I1); - UML_MOV(block, ASTAT_AZ, I0); - UML_MOV(block, ASTAT_AN, I1); - UML_XOR(block, I0, I0, 1); - UML_XOR(block, I1, I1, 1); - UML_AND(block, I0, I0, I1); - UML_SHL(block, I0, I0, 7); - - UML_SHR(block, I2, mem(&m_core->astat_drc.cacc), 1); - UML_OR(block, I2, I2, I0); - UML_MOV(block, mem(&m_core->astat_drc.cacc), I2); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_E, ASTAT_AZ); if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_L, ASTAT_AN); if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + if (AF_CALC_REQUIRED) UML_MOV(block, ASTAT_AF, 0); + + UML_SETc(block, COND_G, I0); + UML_SHL(block, I0, I0, 7); + UML_OR(block, mem(&m_core->astat_drc.cacc), I0, I1); return; case 0x21: // Rn = PASS Rx - UML_MOV(block, REG(rn), REG(rx)); - if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) - UML_CMP(block, REG(rn), 0); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + if (!AZ_CALC_REQUIRED && !AN_CALC_REQUIRED) + { + UML_MOV(block, REG(rn), REG(rx)); + } + else if (rn == rx) + { + UML_TEST(block, REG(rx), 0xffffffff); + } + else + { + UML_AND(block, I0, REG(rx), 0xffffffff); + UML_MOV(block, REG(rn), I0); + } + update_az_an_fixed(block, desc); return; case 0x22: // Rn = -Rx UML_SUB(block, REG(rn), 0, REG(rx)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, true); return; case 0x29: // Rn = Rx + 1 UML_ADD(block, REG(rn), REG(rx), 1); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, false); + return; + + case 0x25: // Rn = Rx + CI + UML_ADD(block, REG(rn), REG(rx), ASTAT_AC); + update_az_av_an_ac_fixed(block, desc, false); + return; + + case 0x26: // Rn = Rx + CI - 1 + UML_XOR(block, I0, ASTAT_AC, 1); + UML_ADD(block, REG(rn), REG(rx), ASTAT_AC); + update_az_av_an_ac_fixed(block, desc, false); return; case 0x2a: // Rn = Rx - 1 UML_SUB(block, REG(rn), REG(rx), 1); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_av_an_ac_fixed(block, desc, true); return; case 0x40: // Rn = Rx AND Ry UML_AND(block, REG(rn), REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_an_fixed(block, desc); return; case 0x41: // Rn = Rx OR Ry UML_OR(block, REG(rn), REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_an_fixed(block, desc); return; case 0x42: // Rn = Rx XOR Ry UML_XOR(block, REG(rn), REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_an_fixed(block, desc); return; case 0x43: // Rn = NOT Rx UML_XOR(block, REG(rn), REG(rx), 0xffffffff); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + update_az_an_fixed(block, desc); return; case 0x61: // Rn = MIN(Rx, Ry) @@ -4515,13 +4491,8 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com if (rn != ry) UML_MOVc(block, COND_G, REG(rn), REG(ry)); if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) - UML_CMP(block, REG(rn), 0); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_TEST(block, REG(rn), 0xffffffff); + update_az_an_fixed(block, desc); return; case 0x62: // Rn = MAX(Rx, Ry) @@ -4531,39 +4502,44 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com if (rn != ry) UML_MOVc(block, COND_L, REG(rn), REG(ry)); if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) - UML_CMP(block, REG(rn), 0); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_MOV(block, ASTAT_AV, 0); - if (AC_CALC_REQUIRED) UML_MOV(block, ASTAT_AC, 0); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); + UML_TEST(block, REG(rn), 0xffffffff); + update_az_an_fixed(block, desc); + return; + + case 0x63: // Rn = CLIP Rx BY Ry + UML_MOV(block, I0, REG(ry)); + UML_SUB(block, I1, 0, I0); + UML_MOV(block, I2, I0); + UML_MOVc(block, COND_NS, I2, I1); + UML_MOVc(block, COND_NS, I1, I0); + UML_MOV(block, I0, REG(rx)); + UML_CMP(block, I0, I1); + UML_MOVc(block, COND_L, I0, I1); + UML_CMP(block, I0, I2); + UML_MOVc(block, COND_G, I0, I2); + UML_MOV(block, REG(rn), I0); + if (AZ_CALC_REQUIRED || AN_CALC_REQUIRED) + UML_TEST(block, I0, 0xffffffff); + update_az_an_fixed(block, desc); return; case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: - { - /* Fixed-point Dual Add/Subtract */ - UML_ADD(block, I0, REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, ASTAT_AZ); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, ASTAT_AN); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, ASTAT_AV); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, ASTAT_AC); - UML_SUB(block, I1, REG(rx), REG(ry)); - if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, mem(&m_core->arg0)); - if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, mem(&m_core->arg1)); - if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, mem(&m_core->arg2)); - if (AC_CALC_REQUIRED) UML_SETc(block, COND_C, mem(&m_core->arg3)); - if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, mem(&m_core->arg0)); - if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, mem(&m_core->arg1)); - if (AV_CALC_REQUIRED) UML_OR(block, ASTAT_AV, ASTAT_AV, mem(&m_core->arg2)); - if (AC_CALC_REQUIRED) UML_OR(block, ASTAT_AC, ASTAT_AC, mem(&m_core->arg3)); - if (AS_CALC_REQUIRED) UML_MOV(block, ASTAT_AS, 0); - if (AI_CALC_REQUIRED) UML_MOV(block, ASTAT_AI, 0); - UML_MOV(block, REG(ra), I0); - UML_MOV(block, REG(rs), I1); + // Fixed-point Dual Add/Subtract + UML_MOV(block, I0, REG(rx)); + UML_MOV(block, I1, REG(ry)); + UML_ADD(block, REG(ra), I0, I1); + update_az_av_an_ac_fixed(block, desc, false); + UML_SUB(block, REG(rs), I0, I1); + if (AZ_CALC_REQUIRED) UML_SETc(block, COND_Z, I0); + if (AV_CALC_REQUIRED) UML_SETc(block, COND_V, I1); + if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, I2); + if (AC_CALC_REQUIRED) UML_SETc(block, COND_NC, I3); + if (AZ_CALC_REQUIRED) UML_OR(block, ASTAT_AZ, ASTAT_AZ, I0); + if (AV_CALC_REQUIRED) UML_OR(block, ASTAT_AV, ASTAT_AV, I1); + if (AN_CALC_REQUIRED) UML_OR(block, ASTAT_AN, ASTAT_AN, I2); + if (AC_CALC_REQUIRED) UML_OR(block, ASTAT_AC, ASTAT_AC, I3); return; - } case 0x81: // Fn = Fx + Fy // TODO: denormals diff --git a/src/devices/cpu/sharc/sharcfe.cpp b/src/devices/cpu/sharc/sharcfe.cpp index 387fe457eae..84ad10eaab8 100644 --- a/src/devices/cpu/sharc/sharcfe.cpp +++ b/src/devices/cpu/sharc/sharcfe.cpp @@ -193,19 +193,41 @@ void adsp21062_device::frontend::insert_loop(const LOOP_DESCRIPTOR &loopdesc) add_loop_entry(loopdesc.end_pc, LOOP_ENTRY_EVALUATION, 0); if (loopdesc.astat_check_pc != 0xffffffff) { - uint32_t flags = m_sharc->do_condition_astat_bits(loopdesc.condition); opcode_desc::extra_flags userflags; userflags.reset(); - if (flags & AZ) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AZ); } - if (flags & AV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AV); } - if (flags & AN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AN); } - if (flags & AC) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AC); } - if (flags & MN) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_MN); } - if (flags & MV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_MV); } - if (flags & AF) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_AF); } - if (flags & SV) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_SV); } - if (flags & SZ) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_SZ); } - if (flags & BTF) { userflags.set(opcode_desc::ASTAT_DELAY_COPY_BTF); } + switch (loopdesc.condition) + { + case 0x00: case 0x10: // EQ NE + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AZ); + break; + case 0x01: case 0x11: case 0x02: case 0x12: // LT GE LE GT + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AZ); + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AV); + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AN); + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AF); + break; + case 0x03: case 0x13: // AC NOT AC + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AC); + break; + case 0x04: case 0x14: // AV NOT AV + userflags.set(opcode_desc::ASTAT_DELAY_COPY_AV); + break; + case 0x05: case 0x15: // MV NOT MV + userflags.set(opcode_desc::ASTAT_DELAY_COPY_MV); + break; + case 0x06: case 0x16: // MS NOT MS + userflags.set(opcode_desc::ASTAT_DELAY_COPY_MN); + break; + case 0x07: case 0x17: // SV NOT SV + userflags.set(opcode_desc::ASTAT_DELAY_COPY_SV); + break; + case 0x08: case 0x18: // SZ NOT SZ + userflags.set(opcode_desc::ASTAT_DELAY_COPY_SZ); + break; + case 0x0d: case 0x1d: // TF NOT TF + userflags.set(opcode_desc::ASTAT_DELAY_COPY_BTF); + break; + } add_loop_entry(loopdesc.astat_check_pc, LOOP_ENTRY_ASTAT_CHECK, userflags); } } @@ -269,11 +291,12 @@ bool adsp21062_device::frontend::describe(opcode_desc &desc, const opcode_desc * int index = desc.pc & 0x1ffff; desc.set_extra_flags(map[index].userflags); if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AZ]) { desc.set_az_used(); } - if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AN]) { desc.set_an_used(); } if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AV]) { desc.set_av_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AN]) { desc.set_an_used(); } if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AC]) { desc.set_ac_used(); } - if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_MN]) { desc.set_mn_used(); } if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_MV]) { desc.set_mv_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_MN]) { desc.set_mn_used(); } + if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_AF]) { desc.set_af_used(); } if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_SV]) { desc.set_sv_used(); } if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_SZ]) { desc.set_sz_used(); } if (map[index].userflags[opcode_desc::ASTAT_DELAY_COPY_BTF]) { desc.set_btf_used(); } diff --git a/src/devices/cpu/sharc/sharcfe.h b/src/devices/cpu/sharc/sharcfe.h index 0888b1ed01b..4f411863170 100644 --- a/src/devices/cpu/sharc/sharcfe.h +++ b/src/devices/cpu/sharc/sharcfe.h @@ -126,6 +126,22 @@ public: set_ss_modified(); } + bool az_used() const { return regin[REG_AZ]; } + bool av_used() const { return regin[REG_AV]; } + bool an_used() const { return regin[REG_AN]; } + bool ac_used() const { return regin[REG_AC]; } + bool as_used() const { return regin[REG_AS]; } + bool ai_used() const { return regin[REG_AI]; } + bool mn_used() const { return regin[REG_MN]; } + bool mv_used() const { return regin[REG_MV]; } + bool mu_used() const { return regin[REG_MU]; } + bool mi_used() const { return regin[REG_MI]; } + bool af_used() const { return regin[REG_AF]; } + bool sv_used() const { return regin[REG_SV]; } + bool sz_used() const { return regin[REG_SZ]; } + bool ss_used() const { return regin[REG_SS]; } + bool btf_used() const { return regin[REG_BTF]; } + bool az_calc_required() const { return regreq[REG_AZ] || in_delay_slot(); } bool av_calc_required() const { return regreq[REG_AV] || in_delay_slot(); } bool an_calc_required() const { return regreq[REG_AN] || in_delay_slot(); } @@ -144,11 +160,12 @@ public: void set_loop() { m_extra_flags.set(LOOP); } void set_astat_delay_copy_az() { m_extra_flags.set(ASTAT_DELAY_COPY_AZ); } + void set_astat_delay_copy_av() { m_extra_flags.set(ASTAT_DELAY_COPY_AV); } void set_astat_delay_copy_an() { m_extra_flags.set(ASTAT_DELAY_COPY_AN); } void set_astat_delay_copy_ac() { m_extra_flags.set(ASTAT_DELAY_COPY_AC); } - void set_astat_delay_copy_av() { m_extra_flags.set(ASTAT_DELAY_COPY_AV); } void set_astat_delay_copy_mv() { m_extra_flags.set(ASTAT_DELAY_COPY_MV); } void set_astat_delay_copy_mn() { m_extra_flags.set(ASTAT_DELAY_COPY_MN); } + void set_astat_delay_copy_af() { m_extra_flags.set(ASTAT_DELAY_COPY_AF); } void set_astat_delay_copy_sv() { m_extra_flags.set(ASTAT_DELAY_COPY_SV); } void set_astat_delay_copy_sz() { m_extra_flags.set(ASTAT_DELAY_COPY_SZ); } void set_astat_delay_copy_btf() { m_extra_flags.set(ASTAT_DELAY_COPY_BTF); } @@ -163,11 +180,12 @@ public: bool loop() const { return m_extra_flags[LOOP]; } bool astat_delay_copy_az() const { return m_extra_flags[ASTAT_DELAY_COPY_AZ]; } + bool astat_delay_copy_av() const { return m_extra_flags[ASTAT_DELAY_COPY_AV]; } bool astat_delay_copy_an() const { return m_extra_flags[ASTAT_DELAY_COPY_AN]; } bool astat_delay_copy_ac() const { return m_extra_flags[ASTAT_DELAY_COPY_AC]; } - bool astat_delay_copy_av() const { return m_extra_flags[ASTAT_DELAY_COPY_AV]; } bool astat_delay_copy_mv() const { return m_extra_flags[ASTAT_DELAY_COPY_MV]; } bool astat_delay_copy_mn() const { return m_extra_flags[ASTAT_DELAY_COPY_MN]; } + bool astat_delay_copy_af() const { return m_extra_flags[ASTAT_DELAY_COPY_AF]; } bool astat_delay_copy_sv() const { return m_extra_flags[ASTAT_DELAY_COPY_SV]; } bool astat_delay_copy_sz() const { return m_extra_flags[ASTAT_DELAY_COPY_SZ]; } bool astat_delay_copy_btf() const { return m_extra_flags[ASTAT_DELAY_COPY_BTF]; } diff --git a/src/devices/machine/microtch.cpp b/src/devices/machine/microtch.cpp index 3f9fd67267b..e62cd0ad21e 100644 --- a/src/devices/machine/microtch.cpp +++ b/src/devices/machine/microtch.cpp @@ -34,9 +34,9 @@ _________________________________________________________________ JP1 = ADDRESS / INTERRUPT (A1, A2, A3, A4, A5, A6, I2, I3, I4, I5, I10, I11, I12, I15) JP2 = TEST (T1, T2, T3, T4, T5, T6) -Y1 = XTAL R11APB18 +Y1 = XTAL R11APB18 maked A11.059 on some boards U3 = MicroTouch Excalibur -U4 = 80C32 +U4 = 80C32 (SAB80C32, P80C32EBAA, etc.) U11 = 93C46S Serial EEPROM P1 = RS-232 @@ -57,6 +57,8 @@ COM8 3F0-3F7 ON : ON : : ON #include "emu.h" #include "microtch.h" +#include "cpu/mcs51/i8052.h" + //#define VERBOSE 1 #include "logmacro.h" @@ -387,7 +389,7 @@ INPUT_CHANGED_MEMBER(microtouch_device::touch) // BIOS not hooked up ROM_START(microtouch) - ROM_REGION(0x10000, "bios", 0) + ROM_REGION(0x10000, "u1", 0) ROM_SYSTEM_BIOS(0, "microtouch_5_6", "MicroTouch Rev.5.6") // "Excalibur", ISA card ROMX_LOAD("microtouch_5604010_rev_5.6.u1", 0x0000, 0x10000, CRC(d19ee080) SHA1(c695405ec8c2ac4408a63bacfc68a5a4b878928c), ROM_BIOS(0)) // 27c512 ROM_SYSTEM_BIOS(1, "microtouch_5_5", "MicroTouch Rev.5.5") // "Kahuna", daughterboard integrated on monitor @@ -410,6 +412,18 @@ ioport_constructor microtouch_device::device_input_ports() const return INPUT_PORTS_NAME(microtouch); } +void microtouch_device::device_add_mconfig(machine_config &config) +{ + auto &mcu(I8032(config, "u4", 11.0592_MHz_XTAL)); // REV5.6 card has a crystal marked A11.059 - assume it's the common type + mcu.set_addrmap(AS_PROGRAM, µtouch_device::u4_program); + mcu.set_disable(); +} + +void microtouch_device::u4_program(address_map &map) +{ + map(0x0000, 0xffff).rom().region("u1", 0); +} + void microtouch_device::tra_callback() { m_out_stx_func(transmit_register_get_data_bit()); diff --git a/src/devices/machine/microtch.h b/src/devices/machine/microtch.h index c90a2bcd4a7..36424507ea0 100644 --- a/src/devices/machine/microtch.h +++ b/src/devices/machine/microtch.h @@ -25,6 +25,7 @@ public: protected: // device_t implementation virtual ioport_constructor device_input_ports() const override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; virtual void device_start() override ATTR_COLD; // device_serial_interface implementation @@ -38,13 +39,6 @@ protected: TIMER_CALLBACK_MEMBER(update_output); private: - int check_command( const char* commandtocheck, int command_len, uint8_t* command_data ); - void send_format_table_packet(uint8_t flag, int x, int y); - void send_format_decimal_packet(int x, int y); - void send_format_hex_packet(int x, int y); - void send_touch_packet(); - char ntoc(int n) { return n < 10 ? n + '0' : n - 10 + 'A'; } - enum { FORMAT_UNKNOWN, @@ -60,6 +54,15 @@ private: MODE_POINT }; + int check_command( const char* commandtocheck, int command_len, uint8_t* command_data ); + void send_format_table_packet(uint8_t flag, int x, int y); + void send_format_decimal_packet(int x, int y); + void send_format_hex_packet(int x, int y); + void send_touch_packet(); + char ntoc(int n) { return n < 10 ? n + '0' : n - 10 + 'A'; } + + void u4_program(address_map &map) ATTR_COLD; + uint8_t m_rx_buffer[16]; int m_rx_buffer_ptr; uint8_t m_tx_buffer[16]; diff --git a/src/devices/machine/vrender0.cpp b/src/devices/machine/vrender0.cpp index 2c3a45cebec..e830f793d38 100644 --- a/src/devices/machine/vrender0.cpp +++ b/src/devices/machine/vrender0.cpp @@ -407,7 +407,7 @@ void vrender0soc_device::tmcnt_w(offs_t offset, u16 data, u16 mem_mask) // bit 5 and bit 3 of the DMA control don't in/decrement source/destination addresses if enabled. // At the time of writing P's Attack is the only SW that uses this feature, // in a work RAM to area $4500000 transfer, probably to extend something ... -static inline int dma_setup_hold(u8 setting, u8 holdbit, u8 dirbit) +inline int dma_setup_hold(u8 setting, u8 holdbit, u8 dirbit) { if (BIT(setting, holdbit)) return 0; From 2bda0d67a93cc3b30bb90acdd92d17126b47e3b1 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 7 Mar 2026 18:19:13 +0100 Subject: [PATCH 174/351] spaceg: remove hardcoded color table, add dsw locations --- src/mame/konami/rungun.cpp | 1 + src/mame/omori/spaceg.cpp | 89 +++++++++++++------------------------- 2 files changed, 32 insertions(+), 58 deletions(-) diff --git a/src/mame/konami/rungun.cpp b/src/mame/konami/rungun.cpp index 97a71ca2446..c1166f116b3 100644 --- a/src/mame/konami/rungun.cpp +++ b/src/mame/konami/rungun.cpp @@ -39,6 +39,7 @@ #include "machine/k054321.h" #include "sound/k054539.h" #include "video/k053936.h" + #include "emupal.h" #include "screen.h" #include "speaker.h" diff --git a/src/mame/omori/spaceg.cpp b/src/mame/omori/spaceg.cpp index 19583c219ba..ab51c48cce1 100644 --- a/src/mame/omori/spaceg.cpp +++ b/src/mame/omori/spaceg.cpp @@ -203,7 +203,7 @@ public: void spaceg(machine_config &config); protected: - virtual void driver_start() override; + virtual void machine_start() override; private: required_shared_ptr m_colorram; @@ -226,13 +226,12 @@ private: void sound2_w(uint8_t data); void sound3_w(uint8_t data); - void spaceg_palette(palette_device &palette) const; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void spaceg_map(address_map &map) ATTR_COLD; }; -void spaceg_state::driver_start() +void spaceg_state::machine_start() { save_item(NAME(m_sound1)); save_item(NAME(m_sound2)); @@ -246,31 +245,6 @@ void spaceg_state::driver_start() * *************************************/ -void spaceg_state::spaceg_palette(palette_device &palette) const -{ - for (int i = 0; i < 128; i++) - palette.set_pen_color(i, rgb_t(0x00, 0x00, 0x00)); - - // proms are currently undumped... - palette.set_pen_color( 0, rgb_t(0x00, 0x00, 0x00)); //ok czarny - palette.set_pen_color( 1, rgb_t(0x7f, 0x00, 0x00)); //??? - palette.set_pen_color( 2, rgb_t(0xff, 0xff, 0xff)); //ok+ bialy - palette.set_pen_color( 3, rgb_t(0xff, 0x00, 0x00)); //ok j.czerw. - palette.set_pen_color( 4, rgb_t(0x3f, 0x3f, 0xff)); //ok j.niebieski - palette.set_pen_color( 5, rgb_t(0x3f, 0xff, 0x3f)); //ok j.zielony - palette.set_pen_color( 6, rgb_t(0xff, 0xbf, 0xbf)); //ok+ 'majtki' - palette.set_pen_color( 7, rgb_t(0xff, 0xff, 0x00)); //ok+ zolty - - palette.set_pen_color( 8, rgb_t(0xff, 0x7f, 0x00)); //ok+ pomaranczowy - palette.set_pen_color( 9, rgb_t(0x3f, 0xbf, 0xff)); //ok j.niebieski (ciemniejszy od 13) - palette.set_pen_color(10, rgb_t(0x3f, 0xbf, 0x3f)); //ok+ c.zielony - palette.set_pen_color(11, rgb_t(0x00, 0xff, 0x00)); //ok j.zielony - palette.set_pen_color(12, rgb_t(0x7f, 0x00, 0x00)); //ok brazowy (c.czerw) - palette.set_pen_color(13, rgb_t(0x7f, 0xbf, 0xff)); //ok j.niebieski (jasniejszy od 9) - palette.set_pen_color(14, rgb_t(0x00, 0xff, 0xff)); //??? - palette.set_pen_color(15, rgb_t(0x7f, 0x7f, 0x7f)); //??? -} - void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) { int col = m_colorram[0x400]; @@ -279,7 +253,7 @@ void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) uint16_t sdata = data << (8 - xoff); uint16_t vram_data = m_videoram[offset] << 8 | (m_videoram[offset2]); - if (col > 0x0f) popmessage("color > 0x0f = %2d", col); + if (col > 0x0f) logerror("color > 0x0f = %2d\n", col); col &= 0x0f; switch (*m_io9401) @@ -303,7 +277,6 @@ void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) default: logerror("mode = %02x pc = %04x\n", *m_io9401, m_maincpu->pc()); - popmessage("mode = %02x pc = %04x\n", *m_io9401, m_maincpu->pc()); return; } @@ -314,29 +287,24 @@ void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) uint8_t spaceg_state::colorram_r(offs_t offset) { - if (offset < 0x400) + if (!machine().side_effects_disabled()) { - int rgbcolor = (m_colorram[offset] << 1) | ((offset & 0x100) >> 8); + if (offset < 0x400) + { + if ((offset & 0xff) < 0x20) + { + const int rgbcolor = (m_colorram[offset] << 1) | ((offset & 0x100) >> 8); + const int index = (offset & 0x1f) | (~offset >> 4 & 0x20); + m_palette->set_pen_color(index, pal3bit(rgbcolor >> 0), pal3bit(rgbcolor >> 6), pal3bit(rgbcolor >> 3)); + } + else + logerror("palette? read from colorram offset = %04x\n", offset); + } - if ((offset >= 0x200) && (offset < 0x220)) /* 0xa200- 0xa21f */ - { - /* palette 1 */ - int col_ind = offset & 0x1f; - m_palette->set_pen_color(0x10 + 0x00 + col_ind, pal3bit(rgbcolor >> 0), pal3bit(rgbcolor >> 6), pal3bit(rgbcolor >> 3)); - } - else if ((offset >= 0x300) && (offset < 0x320)) /* 0xa300- 0xa31f */ - { - /* palette 2 */ - int col_ind = offset & 0x1f; - m_palette->set_pen_color(0x10 + 0x00 + col_ind, pal3bit(rgbcolor >> 0), pal3bit(rgbcolor >> 6), pal3bit(rgbcolor >> 3)); - } - else - logerror("palette? read from colorram offset = %04x\n",offset); + if (*m_io9401 != 0x40) + logerror("colorram read in mode: 9401 = %02x (offset = %04x)\n", *m_io9401, offset); } - if (*m_io9401 != 0x40) - logerror("colorram read in mode: 9401 = %02x (offset = %04x)\n", *m_io9401, offset); - return m_colorram[offset]; } @@ -351,7 +319,7 @@ uint32_t spaceg_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap for (int i = 0; i < 8; i++) { - bitmap.pix(y, x) = (data & 0x80) ? m_colorram[offs] : 0; + bitmap.pix(y, x) = (data & 0x80) ? (m_colorram[offs] & 0x0f) : 0x20; x++; data <<= 1; @@ -470,19 +438,24 @@ void spaceg_state::spaceg_map(address_map &map) static INPUT_PORTS_START( spaceg ) PORT_START("9800") - PORT_DIPUNUSED( 0x01, IP_ACTIVE_HIGH ) /* was related to coinage */ - PORT_DIPUNKNOWN( 0x02, IP_ACTIVE_HIGH ) /* check code at 0x127d - when bases are supposed to disappear */ - PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Lives ) ) + PORT_DIPNAME( 0x01, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:1") + PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) + PORT_DIPNAME( 0x02, 0x00, "Swarm Trips" ) PORT_DIPLOCATION("SW:2") + PORT_DIPSETTING( 0x00, "3" ) + PORT_DIPSETTING( 0x02, "4" ) + PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:3,4") PORT_DIPSETTING( 0x00, "3" ) PORT_DIPSETTING( 0x04, "4" ) PORT_DIPSETTING( 0x08, "5" ) PORT_DIPSETTING( 0x0c, "6" ) - PORT_DIPNAME( 0x30, 0x00, DEF_STR( Bonus_Life ) ) + PORT_DIPNAME( 0x30, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW:5,6") PORT_DIPSETTING( 0x00, "10000" ) PORT_DIPSETTING( 0x20, "30000" ) PORT_DIPSETTING( 0x10, "40000" ) PORT_DIPSETTING( 0x30, "50000" ) - PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Unknown ) ) /* set bit 2 of 0x9402 depending on score - previously 2nd bonus life ? */ + // SW7,8: Unlisted in manual, set bit 2 of 0x9402 depending on score - previously 2nd bonus life? + PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW:7,8") PORT_DIPSETTING( 0x00, "10000" ) PORT_DIPSETTING( 0x80, "30000" ) PORT_DIPSETTING( 0x40, "40000" ) @@ -497,11 +470,11 @@ static INPUT_PORTS_START( spaceg ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 ) - PORT_START("9805") /* player 1 */ + PORT_START("9805") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(1) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(1) - PORT_START("9806") /* player 2 */ + PORT_START("9806") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2) INPUT_PORTS_END @@ -529,7 +502,7 @@ void spaceg_state::spaceg(machine_config &config) screen.set_palette(m_palette); screen.screen_vblank().set_inputline("maincpu", INPUT_LINE_NMI); // 60 Hz NMIs (verified) - PALETTE(config, m_palette, FUNC(spaceg_state::spaceg_palette), 16+128-16); + PALETTE(config, m_palette, palette_device::BLACK, 0x40); /* sound hardware */ SPEAKER(config, "mono").front_center(); From 6498190508d4297fd8a76d9f2695328320414937 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 8 Mar 2026 04:33:46 +1100 Subject: [PATCH 175/351] cpu/sharc/sharcdrc.cpp: Fixed Rn = Rx + CI - 1 ALU operation. Neglected to git add the change after copy/pasting complementary operation above. --- src/devices/cpu/sharc/sharcdrc.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index 3bd565f3cc2..a857b74cb3b 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -4455,8 +4455,8 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com case 0x26: // Rn = Rx + CI - 1 UML_XOR(block, I0, ASTAT_AC, 1); - UML_ADD(block, REG(rn), REG(rx), ASTAT_AC); - update_az_av_an_ac_fixed(block, desc, false); + UML_SUB(block, REG(rn), REG(rx), I0); + update_az_av_an_ac_fixed(block, desc, true); return; case 0x2a: // Rn = Rx - 1 From b401ac85b4d37aa82f9b42f484f0c2f9d59513aa Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 8 Mar 2026 05:49:08 +1100 Subject: [PATCH 176/351] cpu/sharc: Fixed several interpreter issues: * Fixed carry flag calculation for subtract with carry. * Implemented Rn = Rx + CI and Rn = Rx + CI - 1. * Rn = Rx + 1, Rn = Rx - 1 and Rn = -Rx should saturate the result. --- src/devices/cpu/sharc/compute.hxx | 93 +++++++++++++++++++++++------- src/devices/cpu/sharc/sharc.h | 2 + src/devices/cpu/sharc/sharcdrc.cpp | 10 ++-- src/devices/cpu/sharc/sharcops.hxx | 2 + 4 files changed, 82 insertions(+), 25 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 7048460a373..b0e515fca77 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -11,7 +11,7 @@ #define SET_FLAG_AN(r) do { m_core->astat |= (((r) & 0x80000000) ? AN : 0); } while (false) #define SET_FLAG_AC_ADD(r,a,b) do { m_core->astat |= ((uint32_t(r) < uint32_t(a)) ? AC : 0); } while (false) #define SET_FLAG_AV_ADD(r,a,b) do { m_core->astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } while (false) -#define SET_FLAG_AC_SUB(r,a,b) do { m_core->astat |= (!(uint32_t(a) < uint32_t(b)) ? AC : 0); } while (false) +#define SET_FLAG_AC_SUB(r,a,b) do { m_core->astat |= ((uint32_t(r) <= uint32_t(a)) ? AC : 0); } while (false) #define SET_FLAG_AV_SUB(r,a,b) do { m_core->astat |= (((((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } while (false) #define CLEAR_MULTIPLIER_FLAGS() do { m_core->astat &= ~(MN|MV|MU|MI); } while (false) @@ -153,13 +153,13 @@ void adsp21062_device::compute_sub(int rn, int rx, int ry) /* Rn = Rx + Ry + CI */ void adsp21062_device::compute_add_ci(int rn, int rx, int ry) { - int c = (m_core->astat & AC) ? 1 : 0; + int const c = (m_core->astat & AC) ? 1 : 0; uint32_t r = REG(rx) + REG(ry) + c; CLEAR_ALU_FLAGS(); SET_FLAG_AV_ADD(r, REG(rx), REG(ry)); SET_FLAG_AC_ADD(r, REG(rx), REG(ry)); - if (c == 1 && REG(ry) == 0xffffffff) + if ((c == 1) && (REG(ry) == 0xffffffff)) m_core->astat |= AC; if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) @@ -176,14 +176,13 @@ void adsp21062_device::compute_add_ci(int rn, int rx, int ry) /* Rn = Rx - Ry + CI - 1 */ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) { - int c = (m_core->astat & AC) ? 1 : 0; + int const c = (m_core->astat & AC) ? 1 : 0; uint32_t r = REG(rx) - REG(ry) + c - 1; CLEAR_ALU_FLAGS(); SET_FLAG_AV_SUB(r, REG(rx), REG(ry)); - SET_FLAG_AC_SUB(r, REG(rx), REG(ry)); - if (c == 0 && REG(ry) == 0xffffffff) - m_core->astat |= AC; + if ((c != 0) || (REG(ry) != 0xffffffff)) + SET_FLAG_AC_SUB(r, REG(rx), REG(ry)); if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) SATURATE(r); @@ -199,7 +198,7 @@ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) /* Rn = Rx AND Ry */ void adsp21062_device::compute_and(int rn, int rx, int ry) { - uint32_t r = REG(rx) & REG(ry); + uint32_t const r = REG(rx) & REG(ry); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r); @@ -247,7 +246,7 @@ void adsp21062_device::compute_pass(int rn, int rx) /* Rn = Rx XOR Ry */ void adsp21062_device::compute_xor(int rn, int rx, int ry) { - uint32_t r = REG(rx) ^ REG(ry); + uint32_t const r = REG(rx) ^ REG(ry); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r); SET_FLAG_AZ(r); @@ -259,7 +258,7 @@ void adsp21062_device::compute_xor(int rn, int rx, int ry) /* Rn = Rx OR Ry */ void adsp21062_device::compute_or(int rn, int rx, int ry) { - uint32_t r = REG(rx) | REG(ry); + uint32_t const r = REG(rx) | REG(ry); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r); SET_FLAG_AZ(r); @@ -268,17 +267,63 @@ void adsp21062_device::compute_or(int rn, int rx, int ry) m_core->astat &= ~AF; } +/* Rn = Rx + CI */ +void adsp21062_device::compute_add_ci(int rn, int rx) +{ + int const c = (m_core->astat & AC) ? 1 : 0; + uint32_t r = REG(rx) + c; + + CLEAR_ALU_FLAGS(); + SET_FLAG_AV_ADD(r, REG(rx), 0); + SET_FLAG_AC_ADD(r, REG(rx), 0); + + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + + m_core->astat &= ~AF; +} + +/* Rn = Rx + CI - 1 */ +void adsp21062_device::compute_sub_ci(int rn, int rx) +{ + int const c = (m_core->astat & AC) ? 1 : 0; + uint32_t r = REG(rx) + c - 1; + + CLEAR_ALU_FLAGS(); + SET_FLAG_AV_SUB(r, REG(rx), 0); + SET_FLAG_AC_SUB(r, REG(rx), 0); + + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + + m_core->astat &= ~AF; +} + /* Rn = Rx + 1 */ void adsp21062_device::compute_inc(int rn, int rx) { uint32_t r = REG(rx) + 1; CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); SET_FLAG_AV_ADD(r, REG(rx), 1); SET_FLAG_AC_ADD(r, REG(rx), 1); + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + REG(rn) = r; m_core->astat &= ~AF; @@ -290,11 +335,15 @@ void adsp21062_device::compute_dec(int rn, int rx) uint32_t r = REG(rx) - 1; CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); SET_FLAG_AV_SUB(r, REG(rx), 1); SET_FLAG_AC_SUB(r, REG(rx), 1); + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + REG(rn) = r; m_core->astat &= ~AF; @@ -303,7 +352,7 @@ void adsp21062_device::compute_dec(int rn, int rx) /* Rn = MIN(Rx, Ry) */ void adsp21062_device::compute_min(int rn, int rx, int ry) { - uint32_t r = std::min((int32_t)REG(rx), (int32_t)REG(ry)); + uint32_t const r = std::min(int32_t(REG(rx)), int32_t(REG(ry))); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r); @@ -317,7 +366,7 @@ void adsp21062_device::compute_min(int rn, int rx, int ry) /* Rn = MAX(Rx, Ry) */ void adsp21062_device::compute_max(int rn, int rx, int ry) { - uint32_t r = std::max((int32_t)REG(rx), (int32_t)REG(ry)); + uint32_t const r = std::max(int32_t(REG(rx)), int32_t(REG(ry))); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r); @@ -346,14 +395,18 @@ void adsp21062_device::compute_clip(int rn, int rx, int ry) /* Rn = -Rx */ void adsp21062_device::compute_neg(int rn, int rx) { - uint32_t r = -(int32_t)(REG(rx)); + uint32_t r = -int32_t(REG(rx)); CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); SET_FLAG_AV_SUB(r, 0, REG(rx)); SET_FLAG_AC_SUB(r, 0, REG(rx)); + if ((m_core->mode1 & MODE1_ALUSAT) && (m_core->astat & AV)) + SATURATE(r); + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + REG(rn) = r; m_core->astat &= ~AF; @@ -362,7 +415,7 @@ void adsp21062_device::compute_neg(int rn, int rx) /* Rn = NOT Rx */ void adsp21062_device::compute_not(int rn, int rx) { - uint32_t r = ~REG(rx); + uint32_t const r = ~REG(rx); CLEAR_ALU_FLAGS(); SET_FLAG_AN(r); diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 33df1541875..fd41dd9d7b2 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -397,6 +397,8 @@ private: inline void compute_pass(int rn, int rx); inline void compute_xor(int rn, int rx, int ry); inline void compute_or(int rn, int rx, int ry); + inline void compute_add_ci(int rn, int rx); + inline void compute_sub_ci(int rn, int rx); inline void compute_inc(int rn, int rx); inline void compute_dec(int rn, int rx); inline void compute_min(int rn, int rx, int ry); diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp index a857b74cb3b..1a5e5355292 100644 --- a/src/devices/cpu/sharc/sharcdrc.cpp +++ b/src/devices/cpu/sharc/sharcdrc.cpp @@ -4443,11 +4443,6 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com update_az_av_an_ac_fixed(block, desc, true); return; - case 0x29: // Rn = Rx + 1 - UML_ADD(block, REG(rn), REG(rx), 1); - update_az_av_an_ac_fixed(block, desc, false); - return; - case 0x25: // Rn = Rx + CI UML_ADD(block, REG(rn), REG(rx), ASTAT_AC); update_az_av_an_ac_fixed(block, desc, false); @@ -4459,6 +4454,11 @@ void adsp21062_device::generate_compute(drcuml_block &block, compiler_state &com update_az_av_an_ac_fixed(block, desc, true); return; + case 0x29: // Rn = Rx + 1 + UML_ADD(block, REG(rn), REG(rx), 1); + update_az_av_an_ac_fixed(block, desc, false); + return; + case 0x2a: // Rn = Rx - 1 UML_SUB(block, REG(rn), REG(rx), 1); update_az_av_an_ac_fixed(block, desc, true); diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index 9c4956a5a2f..d78f05a27c6 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -843,6 +843,8 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0x0a: compute_comp(rx, ry); break; case 0x21: compute_pass(rn, rx); break; case 0x22: compute_neg(rn, rx); break; + case 0x25: compute_add_ci(rn, rx); break; + case 0x26: compute_sub_ci(rn, rx); break; case 0x29: compute_inc(rn, rx); break; case 0x2a: compute_dec(rn, rx); break; case 0x40: compute_and(rn, rx, ry); break; From d7c77d4b07ee34d8aa7dfa23ae0b6a3513c55a43 Mon Sep 17 00:00:00 2001 From: Brian Johnson Date: Sat, 7 Mar 2026 14:09:30 -0500 Subject: [PATCH 177/351] wd1000.cpp: Set ID not found error properly (#15070) This makes the wd1000 controller report the ID not found error condition on read or write operations. This fixes an issue with valdocs on the QX010 not detecting a CR1510 hard drive properly. This is due to Valdocs probing the hard disk geometry via the read command and expecting the drive to report an error if the geometry is incorrect. --- src/devices/machine/wd1000.cpp | 48 +++++++++++++++++++--------------- src/devices/machine/wd1000.h | 1 + 2 files changed, 28 insertions(+), 21 deletions(-) diff --git a/src/devices/machine/wd1000.cpp b/src/devices/machine/wd1000.cpp index 109a3776df4..5babc993f57 100644 --- a/src/devices/machine/wd1000.cpp +++ b/src/devices/machine/wd1000.cpp @@ -230,34 +230,28 @@ void wd1000_device::end_command() set_intrq(1); } +bool wd1000_device::validate_id_field() +{ + harddisk_image_device *file = m_drives[drive()]; + const auto &info = file->get_info(); + int16_t sector = m_sector_number - m_sector_base; + if (m_cylinder > info.cylinders || + head() >= info.heads || sector < 0 || + sector >= info.sectors || + sector_bytes() != info.sectorbytes) { + return false; + } + return true; +} + int wd1000_device::get_lbasector() { harddisk_image_device *file = m_drives[drive()]; const auto &info = file->get_info(); int lbasector; - if (m_cylinder > info.cylinders) - { - logerror("%s: Unexpected cylinder %d for range 0 to %d\n", machine().describe_context(), m_cylinder, info.cylinders - 1); - } - - if (head() >= info.heads) - { - logerror("%s: Unexpected head %d for range 0 to %d\n", machine().describe_context(), head(), info.heads - 1); - } - int16_t sector = m_sector_number - m_sector_base; - if (sector < 0 || sector >= info.sectors) - { - logerror("%s: Unexpected sector number %d for range %d to %d\n", machine().describe_context(), m_sector_number, m_sector_base, info.sectors + m_sector_base); - } - - if (sector_bytes() != info.sectorbytes) - { - logerror("%s: Unexpected sector bytes %d, expected %d\n", machine().describe_context(), sector_bytes(), info.sectorbytes); - } - lbasector = m_cylinder; lbasector *= info.heads; lbasector += head(); @@ -568,8 +562,14 @@ void wd1000_device::cmd_restore() void wd1000_device::cmd_read_sector() { harddisk_image_device *file = m_drives[drive()]; - uint8_t dma = BIT(m_command, 3); + if (!validate_id_field()) { + set_error(ERR_ID); + end_command(); + return; + } + + uint8_t dma = BIT(m_command, 3); file->read(get_lbasector(), m_buffer); m_buffer_index = 0; @@ -590,6 +590,12 @@ void wd1000_device::cmd_write_sector() { harddisk_image_device *file = m_drives[drive()]; + if (!validate_id_field()) { + set_error(ERR_ID); + end_command(); + return; + } + if (m_buffer_index != sector_bytes()) { logerror("%s: Unexpected unfilled buffer on write, only %d or %d bytes filled\n", machine().describe_context(), m_buffer_index, sector_bytes()); diff --git a/src/devices/machine/wd1000.h b/src/devices/machine/wd1000.h index ed620e4afe6..a792ab43461 100644 --- a/src/devices/machine/wd1000.h +++ b/src/devices/machine/wd1000.h @@ -86,6 +86,7 @@ private: attotime get_stepping_rate(); void start_command(); void end_command(); + bool validate_id_field(); int get_lbasector(); int head() { return (m_sdh >> 0) & 0x07; } From 79ef8be5f1fd20e9b70a9f4a570e56a04e136e03 Mon Sep 17 00:00:00 2001 From: stonedDiscord Date: Sat, 7 Mar 2026 20:09:58 +0100 Subject: [PATCH 178/351] adp/adp.cpp: New working systems (#15060) Skat Bierskat Solitaire (F2) [stonedDiscord] --- src/mame/adp/adp.cpp | 11 +++++++++++ src/mame/mame.lst | 1 + 2 files changed, 12 insertions(+) diff --git a/src/mame/adp/adp.cpp b/src/mame/adp/adp.cpp index 73c74729467..81d5ee60783 100644 --- a/src/mame/adp/adp.cpp +++ b/src/mame/adp/adp.cpp @@ -639,6 +639,16 @@ ROM_START( quickjac ) ROM_LOAD16_BYTE( "quick_jack_video_inde_a.2.u6.bin", 0x00001, 0x20000, CRC(61d55be2) SHA1(bc17dc91fd1ef0f862eb0d7dbbbfa354a8403eb8) ) ROM_END +ROM_START(sbsoli) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "skat_bierskat_solitaire_f2_i.u2", 0x00000, 0x20000, CRC(314390cf) SHA1(86c2f4e120235eba379ec54f2afea59e68c94e7e)) + ROM_LOAD16_BYTE( "skat_bierskat_solitaire_f2_ii.u6", 0x00001, 0x20000, CRC(6e7f88cc) SHA1(07e306222cbd94ab7a39be2685941d12c82645fb)) + + ROM_REGION16_BE( 0x100000, "gfx1", 0 ) + ROM_LOAD16_BYTE( "skat_bier_solitaire_video_f1_i.u2", 0x00000, 0x80000, CRC(3726a21e) SHA1(63fd2f01ce6103ef9a2c585f1045091dfc4b3408)) + ROM_LOAD16_BYTE( "skat_bier_solitaire_video_f1_ii.u5", 0x00001, 0x80000, CRC(9109774f) SHA1(480a7cd4260dc3481049b108eba749de7eeedfa3)) +ROM_END + ROM_START( skattv ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_BYTE( "f2_i.bin", 0x00000, 0x20000, CRC(3cb8b431) SHA1(e7930876b6cd4cba837c3da05d6948ef9167daea) ) @@ -783,6 +793,7 @@ GAME( 1994, trumpfas, skattv, skattv, skattv, adp_state, empty_init, ROT0 GAME( 1995, skattva, skattv, skattva, skattva, adp_state, empty_init, ROT0, "ADP", "Skat TV (version TS3)", 0 ) GAME( 1997, fashiong, 0, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Fashion Gambler (set 1)", 0 ) GAME( 1997, fashiong2, fashiong, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Fashion Gambler (set 2)", 0 ) +GAME( 1998, sbsoli, 0, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Skat Bierskat Solitaire (F2)", 0 ) GAME( 1999, funlddlx, funlddlx4,funland, skattv, adp_state, empty_init, ROT0, "Stella", "Funny Land de Luxe", MACHINE_NOT_WORKING ) GAME( 2000, fstation7, fstation, fstation, fstation, adp_state, empty_init, ROT0, "ADP", "Fun Station Spielekoffer 7 Spiele", MACHINE_NOT_WORKING ) // suntris crashes when executing HD63484 paint commands GAME( 2000, fstation8, fstation, fstation, fstation, adp_state, empty_init, ROT0, "ADP", "Fun Station Spielekoffer 8 Spiele", MACHINE_NOT_WORKING ) // suntris crashes when executing HD63484 paint commands diff --git a/src/mame/mame.lst b/src/mame/mame.lst index d3db08a12c9..46a8e23edd2 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -463,6 +463,7 @@ funlddlx funlddlx2 funlddlx4 quickjac +sbsoli skattv skattva trumpfas From fd921eec839da58980a4128ef09b630933c38090 Mon Sep 17 00:00:00 2001 From: stonedDiscord Date: Sat, 7 Mar 2026 20:10:34 +0100 Subject: [PATCH 179/351] adp/stellafr.cpp: New systems marked not working (#15052) Big Winner [stonedDiscord] Disc 4000 [stonedDiscord] Disc Fun [stonedDiscord] Doppel-Sonne [stonedDiscord] Golden Jubilar [stonedDiscord] Granada [stonedDiscord] Jack 4000 [stonedDiscord] Jumbo 400 [stonedDiscord] Jumbo Action [stonedDiscord] Komet [stonedDiscord] Double [stonedDiscord] Money [stonedDiscord] Multi Prima [stonedDiscord] Multi Star [stonedDiscord] Mystery Jackpot [stonedDiscord] Nun Ran [stonedDiscord] Super Disc [stonedDiscord] --- src/mame/adp/stellafr.cpp | 136 ++++++++++++++++++++++++++++++++++++-- src/mame/mame.lst | 17 +++++ 2 files changed, 146 insertions(+), 7 deletions(-) diff --git a/src/mame/adp/stellafr.cpp b/src/mame/adp/stellafr.cpp index 892ca518a19..0721b54be27 100644 --- a/src/mame/adp/stellafr.cpp +++ b/src/mame/adp/stellafr.cpp @@ -417,6 +417,30 @@ ROM_START( bigjkpot ) ROM_LOAD16_BYTE( "big_jackpot_f1_pr_2.u6", 0x00001, 0x8000, CRC(51f8ab0b) SHA1(1cb2aa40922956d93605c77862f0fd6f38595eb8) ) ROM_END +ROM_START( bigwinnr ) + ROM_REGION(0x100000, "maincpu", 0) + ROM_LOAD16_BYTE("big_winner_f1_1_m27c1001.u2", 0x00000, 0x20000, CRC(3abc347b) SHA1(7f6c570cecdab8e7db070c744b9222f725c7af66)) + ROM_LOAD16_BYTE("big_winner_f1_2_m27c1001.u6", 0x00001, 0x20000, CRC(7c4f8a70) SHA1(da797544f897ce8ebbc4c3c5277a6fe83c274a9a)) +ROM_END + +ROM_START( disc4000 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "disc_4000_f2_1.u2", 0x00000, 0x10000, CRC(ca766804) SHA1(53d338084fe4d3a0d9dd6bd5f6a5541aafc50037) ) + ROM_LOAD16_BYTE( "disc_4000_f2_2.u6", 0x00001, 0x10000, CRC(ae772983) SHA1(2c9cebbe7a2d1503742126112b685ba5826cc6df) ) +ROM_END + +ROM_START( discfun ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "disc_fun_f1_1.u2", 0x00000, 0x10000, CRC(7c2f9eff) SHA1(82d4511b039277784426923574407a0ab0155047) ) + ROM_LOAD16_BYTE( "disc_fun_f1_2.u6", 0x00001, 0x10000, CRC(873cb431) SHA1(dac69324c0a60a790d47d19af3288329656c3afe) ) +ROM_END + +ROM_START( dpplson ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "doppelsonne_f2_1.u2", 0x00000, 0x10000, CRC(4dcdc269) SHA1(05182ba671890a102184e3dadc53d4aca267db9d) ) + ROM_LOAD16_BYTE( "doppelsonne_f2_2.u6", 0x00001, 0x10000, CRC(9d024a01) SHA1(fd674ad65d5a202504e619ae37dd1c2a1792b9f2) ) +ROM_END + ROM_START( dscbonus ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD16_BYTE( "disc_bonus_f3_1.u2", 0x00000, 0x10000, CRC(6599babf) SHA1(4ba8844ecee15d299e00fff1c5f51d53ce2ccfde) ) @@ -429,12 +453,30 @@ ROM_START( dscjkpot ) ROM_LOAD16_BYTE( "disc_jackpot_f2_pr.2.u6", 0x00001, 0x8000, CRC(95a7f938) SHA1(2d14da419d89fd26ea3245fbe24cafa346fecdca) ) ROM_END +ROM_START( gjubil ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_goldenjubilar_f1_1.u2", 0x00000, 0x20000, CRC(5babe5f7) SHA1(75e99203e86c8977fe8363c17dab8324133fe0a8) ) + ROM_LOAD16_BYTE( "m27c1001_goldenjubilar_f1_2.u6", 0x00001, 0x20000, CRC(25b8691f) SHA1(f28cd4523b387880175b66ee71276f977293b06d) ) +ROM_END + ROM_START( grandhnd ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD16_BYTE( "grandhand_f2.u2", 0x00000, 0x10000, CRC(367c86f0) SHA1(c4a42887887614f0d4927b5a36a12b7d88a28e32) ) ROM_LOAD16_BYTE( "grandhand_f2.u6", 0x00001, 0x10000, CRC(b0f14dd4) SHA1(f6a713334ed85ecf52e0671aa15c6c43d32db4d2) ) ROM_END +ROM_START( grnada ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_granada_f1.u2", 0x00000, 0x20000, CRC(45d080b8) SHA1(1543ee5bb3f0d490744d0d0df852914797902198) ) + ROM_LOAD16_BYTE( "m27c1001_granada_f1.u6", 0x00001, 0x20000, CRC(8016fc9b) SHA1(3c438701bdb221ab373f3356d95911d8a6568d9a) ) +ROM_END + +ROM_START( jack4000 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c512_jackpot4000_f2_1.u2", 0x00000, 0x10000, CRC(5abc4d8c) SHA1(87ca16fd23724629b7882068475fe0d479f885bd) ) + ROM_LOAD16_BYTE( "m27c512_jackpot4000_f2_2.u6", 0x00001, 0x10000, CRC(efcb85e4) SHA1(b6de892cf097fd027a3d7c4bf2d00912fe3e97aa) ) +ROM_END + ROM_START( jkrpoker ) ROM_REGION( 0x300000, "maincpu", 0 ) ROM_LOAD16_BYTE( "joker_poker_f1.u2", 0x00000, 0x18000, CRC(9f8ef927) SHA1(9a894e7a9326c9846eabb7b22916244b51c16fd3) ) @@ -453,16 +495,79 @@ ROM_START( jmbojmbf ) ROM_LOAD16_BYTE( "jumbo_jumbo_fun_f1_pr2.u6", 0x00001, 0x20000, CRC(be428893) SHA1(273a5339201997b6043992e278f262db28fb3bf9) ) ROM_END +ROM_START( jumbo400 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "jumbo_400_f3_i.u2", 0x00000, 0x10000, CRC(c2e57b9c) SHA1(7f9b39f2c07dcbe0fbef6c23c57a55c77041d2ee) ) + ROM_LOAD16_BYTE( "jumbo_400_f3_ii.u6", 0x00001, 0x10000, CRC(6a9849fb) SHA1(c8464a8c7c4342e218ca6e9be1c6523f231c60c2) ) +ROM_END + +ROM_START( jumboa ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "jumbo_action_f2_1.u2", 0x00000, 0x20000, CRC(d775b564) SHA1(8f6e2a0cf55114689e4fca28fadc3536e8d7967b) ) + ROM_LOAD16_BYTE( "jumbo_action_f2_2.u6", 0x00001, 0x20000, CRC(d8f0f7ee) SHA1(5bd4d603c84e7b5ffa5b4a8c9f9271b7ee28f52b) ) +ROM_END + ROM_START( kleoptra ) ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_BYTE( "kleopatra_w4_i.u2", 0x00000, 0x80000, CRC(2035d182) SHA1(683cab310445a6d31f080830a12c07d711119874) ) ROM_LOAD16_BYTE( "kleopatra_w4_ii.u6", 0x00001, 0x80000, CRC(fdf02576) SHA1(7750ff6f3611b5c6903cdd3c138e34248ba378be) ) ROM_END +ROM_START( kometf1 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "komet_f1_pr1.u2", 0x00000, 0x20000, CRC(c0328d5d) SHA1(ebb934f72e2bf275717d47b72aeffe4b38136622) ) + ROM_LOAD16_BYTE( "komet_f1_pr2.u6", 0x00001, 0x20000, CRC(86715c37) SHA1(cb986eb50d215294375450c651043e617f66fe21) ) +ROM_END + +ROM_START( mdouble ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "double_f4_1.u2", 0x00000, 0x10000, CRC(0b84c92f) SHA1(818f21d43571a214862e84efd3ee083515ba5860) ) + ROM_LOAD16_BYTE( "double_f4_2.u6", 0x00001, 0x10000, CRC(b1f6c974) SHA1(db8622f2109ebb2ca0797e8228519cf0f80a41be) ) +ROM_END + +ROM_START( moneyf1 ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_money_f1_ic1", 0x00000, 0x20000, CRC(5ca79bfa) SHA1(c52b7d2ecd649ccde3457bc922ad05e734fba862) ) + ROM_LOAD16_BYTE( "m27c1001_money_f1_ic2", 0x00001, 0x20000, CRC(ad95ffc4) SHA1(1062be41a3822efd1d4c848c8ec50488dde42a78) ) +ROM_END + ROM_START( multmult ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "multi_multi_f1_i.u2", 0x00000, 0x20000, CRC(6aa663af) SHA1(cfcdf930fa26c06e49b241dbcb520c0c64cc8af0) ) ROM_LOAD16_BYTE( "multi_multi_f1_ii.u6", 0x00001, 0x20000, CRC(a7a5ac70) SHA1(38fd3ad4306aa46a1a9414b3ae3d0691c67f0357) ) + + ROM_REGION( 0x20000, "dsp", 0 ) + ROM_LOAD( "js28f640.bin", 0x00000, 0x20000, CRC(effdd573) SHA1(2e3b09e440ea266ed6db9fd7c04f030d5cf5edb9) ) +ROM_END + +ROM_START( multprim ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_multi_prima_f1_i.u2", 0x00000, 0x20000, CRC(b873f300) SHA1(4c605ea6337ab3c8eed818b23a9d9979a5047750) ) + ROM_LOAD16_BYTE( "m27c1001_multi_prima_f1_ii.u6", 0x00001, 0x20000, CRC(2a4e371c) SHA1(02494cab0ff7e4c169383a335169edf76501ed1a) ) +ROM_END + +ROM_START( multstar ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "multi_star_f2_pr_1.u2", 0x00000, 0x20000, CRC(8f63fd16) SHA1(d9b8ef2e1f7616bc0569768af26794fa6166cc0d) ) + ROM_LOAD16_BYTE( "multi_star_f2_pr_2.u6", 0x00001, 0x20000, CRC(26952bd7) SHA1(20de0d890a91e728776278fb9c8d6de3b65f8703) ) +ROM_END + +ROM_START( mystjack ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "mystery_jackpot_f4_i.u2", 0x00000, 0x80000, CRC(4ff3ddd7) SHA1(6765628c4858ba78898bad5d3aed6e2e8e651264) ) + ROM_LOAD16_BYTE( "mystery_jackpot_f4_ii.u6", 0x00001, 0x80000, CRC(96523e1a) SHA1(4f53b454790dab4ce45b1db78bd033c40ce47179) ) +ROM_END + +ROM_START( nunran ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "nun_ran_f1_nr1.u2", 0x00000, 0x20000, CRC(d8eed6de) SHA1(937cf33694a3d3baf1cc0577cef6974e1d99a6c4) ) + ROM_LOAD16_BYTE( "nun_ran_f1_nr2.u6", 0x00001, 0x20000, CRC(2a7b9cf2) SHA1(bf30d41dd75b4d316f2f24d11886126484b10415) ) +ROM_END + +ROM_START( suprdisc ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "super_disc_f2_pr1.bin", 0x00000, 0x10000, CRC(0e3d67f9) SHA1(19e081ac8e3f0d8d16f67be032ebc788dcb53b26) ) + ROM_LOAD16_BYTE( "super_disc_f2_pr2.bin", 0x00001, 0x10000, CRC(f5c5f6a4) SHA1(9a19dc12027e1b26160fa20cbd53f96ecd679576) ) ROM_END ROM_START( st_ohla ) @@ -477,6 +582,12 @@ ROM_START( st_vulkn ) ROM_LOAD16_BYTE( "vulkan_f1_2.bin", 0x00001, 0x10000, CRC(951baf42) SHA1(1346043155ba85926b2bf9eef8136b377953abe1) ) ROM_END +ROM_START( sunny ) + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "sunny_f2_i.u2", 0x00000, 0x20000, CRC(49776821) SHA1(d68a9e86ea336c46cc07d7bf6ecc3632930f18b9) ) + ROM_LOAD16_BYTE( "sunny_f2_ii.u6", 0x00001, 0x20000, CRC(86b3b81d) SHA1(e12a511bbc53e4614bed561c9544f9ac8faa9fd2) ) +ROM_END + ROM_START( taipan ) ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "taipan_w1_i.u2", 0x00000, 0x20000, CRC(feaf45f9) SHA1(ded06e9536aa69d17a1f6dcd2b84f7ecaed7ad18) ) @@ -489,27 +600,38 @@ ROM_START( turbosun ) ROM_LOAD16_BYTE( "turbo_sunny_f1_ii.u6", 0x00001, 0x20000, CRC(4d431ae3) SHA1(bb5ff763b9bbaf4eb15ec3fde643b601421fbde1) ) ROM_END -ROM_START( sunny ) - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_LOAD16_BYTE( "sunny_f2_i.u2", 0x00000, 0x20000, CRC(49776821) SHA1(d68a9e86ea336c46cc07d7bf6ecc3632930f18b9) ) - ROM_LOAD16_BYTE( "sunny_f2_ii.u6", 0x00001, 0x20000, CRC(86b3b81d) SHA1(e12a511bbc53e4614bed561c9544f9ac8faa9fd2) ) -ROM_END - } // anonymous namespace GAMEL(1993, action, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Action", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1993, disc4000, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Disc 4000", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1993, jack4000, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Jackpot 4000", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1993, jumbo400, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Jumbo 400", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1994, dscbonus, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Disc Bonus", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1994, grandhnd, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Stella", "Grand Hand", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1994, jmbojmbo, jmbojmbf, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Venus", "Jumbo Jumbo", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1994, mdouble, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Mega", "Double", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1994, st_vulkn, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Stella", "Vulkan", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1994, suprdisc, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Super Disc", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1995, multmult, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Multi Multi", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1995, dscjkpot, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Disc Jackpot", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1995, sunny, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Mega", "Sunny", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1996, bigjkpot, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Big Jackpot", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1994, jmbojmbf, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Venus", "Jumbo Jumbo Fun", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1996, discfun, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Disc Fun", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1996, multstar, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Multi Star", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1996, st_ohla, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Stella", "Oh La La", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, dpplson, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Doppel-Sonne", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, gjubil, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Golden Jubilar", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1997, jkrpoker, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Joker Poker (Merkur)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, jumboa, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Jumbo Action", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, kometf1, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Komet", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, moneyf1, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Money", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, multprim, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Venus", "Multi Prima", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, mystjack, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Mystery Jackpot", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1997, nunran, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Nun Ran", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1998, allfred, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Stella", "Allfred", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1998, grnada, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "ADP", "Granada", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(1998, taipan, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Nova", "Tai Pan Money", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) -GAMEL(199?, kleoptra, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Stella", "Asterix und Kleopatra", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(1998, bigwinnr, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Nova", "Big Winner", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) +GAMEL(2001, kleoptra, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Stella", "Asterix und Kleopatra", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) GAMEL(2001, turbosun, 0, stellafr, stellafr, stellafr_state, empty_init, ROT0, "Mega", "Turbo Sunny", MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_stellafr ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 46a8e23edd2..feab7c87a68 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -523,17 +523,34 @@ vmulti action allfred bigjkpot +bigwinnr +disc4000 +discfun +dpplson dscbonus dscjkpot +gjubil grandhnd +grnada +jack4000 jkrpoker jmbojmbo jmbojmbf +jumbo400 +jumboa kleoptra +kometf1 +mdouble +moneyf1 multmult +multprim +multstar +mystjack +nunran st_ohla st_vulkn sunny +suprdisc taipan turbosun From 3f9e919db8977c675e3e34c940bf75ff6e123c8f Mon Sep 17 00:00:00 2001 From: James Charles Taylor <125845637+JimCarlTay@users.noreply.github.com> Date: Sun, 8 Mar 2026 03:11:06 +0800 Subject: [PATCH 180/351] bonkadv, bonkadva: Tidied up title and manufacturer metadata (#15049) * bonkadv, bonkadva: Tidied up title and manufacturer metadata * bonkadv: Changed region description for "B.C. Kid" title to Europe In the service menu, the "EC" region setting changes the game's title to "B.C. Kid." Since "EC" stands for "European countries" or the "European Community," "Europe" is more appropriate in this case than "World." --- src/mame/kaneko/kaneko16.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/kaneko/kaneko16.cpp b/src/mame/kaneko/kaneko16.cpp index 8f0c1783341..8dff0f25f59 100644 --- a/src/mame/kaneko/kaneko16.cpp +++ b/src/mame/kaneko/kaneko16.cpp @@ -4526,8 +4526,8 @@ GAME( 1992, explbrkrk, explbrkr, bakubrkr, bakubrkr, kaneko16_state, GAME( 1992, bakubrkr, explbrkr, bakubrkr, bakubrkr, kaneko16_state, init_bakubrkr, ROT90, "Kaneko", "Bakuretsu Breaker (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, wingforc, 0, wingforc, wingforc, kaneko16_blazeon_state, init_bakubrkr, ROT270,"A.I (Atlus license)", "Wing Force (Japan, prototype)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, bonkadv, 0, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko (Hudson soft / Red license)", "B.C. Kid (World) / Bonk's Adventure - Arcade Version (US, China, Korea) / Kyukyoku!! PC Genjin - Special Arcade Version (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, bonkadva, bonkadv, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko (Hudson soft / Red license)", "Bonk's Adventure - Arcade version (prototype)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // shows an upside down KO! sprite, probably cause of check failing. Playable apart from that +GAME( 1994, bonkadv, 0, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko (Hudson Soft / Red license)", "B.C. Kid (Europe) / Bonk's Adventure: Arcade Version (US, China, Korea) / Kyukyoku!! PC Genjin: Special Arcade Version (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, bonkadva, bonkadv, bonkadv, bonkadv, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko (Hudson Soft / Red license)", "Bonk's Adventure: Arcade Version (prototype)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // shows an upside down KO! sprite, probably cause of check failing. Playable apart from that GAME( 1994, bloodwar, 0, bloodwar, bloodwar, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Blood Warrior", MACHINE_SUPPORTS_SAVE ) GAME( 1994, oedfight, bloodwar, bloodwar, bloodwar, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Oedo Fight (Japan, Bloodshed version)", MACHINE_SUPPORTS_SAVE ) // shows blood effects like Blood Warrior version GAME( 1994, oedfighta, bloodwar, bloodwar, bloodwar, kaneko16_gtmr_state, init_gtmr, ROT0, "Kaneko", "Oedo Fight (Japan, Bloodless version)", MACHINE_SUPPORTS_SAVE ) // shows no blood effects From cfaac587913407539a859ed9184ad0c66b9f0856 Mon Sep 17 00:00:00 2001 From: shattered Date: Sat, 7 Mar 2026 22:11:58 +0300 Subject: [PATCH 181/351] korvet: improve emulation accuracy (floppy, video, printer, etc.) (#14973) --- src/mame/ussr/pk8020.cpp | 181 +++++++++++++++++++------------------ src/mame/ussr/pk8020.h | 17 +++- src/mame/ussr/pk8020_m.cpp | 39 +++++--- src/mame/ussr/pk8020_v.cpp | 20 ++-- 4 files changed, 145 insertions(+), 112 deletions(-) diff --git a/src/mame/ussr/pk8020.cpp b/src/mame/ussr/pk8020.cpp index db5c34087db..c9bd37a2e3c 100644 --- a/src/mame/ussr/pk8020.cpp +++ b/src/mame/ussr/pk8020.cpp @@ -30,6 +30,7 @@ BK8T - Keys to navigate initial config screen are mostly unknown #include "pk8020.h" #include "bus/rs232/rs232.h" +#include "bus/rs232/hlemouse.h" #include "cpu/i8085/i8085.h" #include "machine/clock.h" #include "machine/i8255.h" @@ -66,112 +67,111 @@ void pk8020_state::devices_map(address_map &map) /* Input ports */ static INPUT_PORTS_START( pk8020 ) PORT_START("LINE0") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("@") PORT_CODE(KEYCODE_F9) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("@") PORT_CODE(KEYCODE_F9) PORT_CHAR('@') PORT_CHAR('`') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('A') PORT_CHAR('a') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('B') PORT_CHAR('b') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('C') PORT_CHAR('c') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('D') PORT_CHAR('d') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('E') PORT_CHAR('e') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('F') PORT_CHAR('f') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('G') PORT_CHAR('g') PORT_START("LINE1") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("H") PORT_CODE(KEYCODE_H) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("I") PORT_CODE(KEYCODE_I) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("L") PORT_CODE(KEYCODE_L) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("O") PORT_CODE(KEYCODE_O) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('H') PORT_CHAR('h') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('I') PORT_CHAR('i') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('J') PORT_CHAR('j') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('K') PORT_CHAR('k') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_CHAR('L') PORT_CHAR('l') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('M') PORT_CHAR('m') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('N') PORT_CHAR('n') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('O') PORT_CHAR('o') PORT_START("LINE2") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("S") PORT_CODE(KEYCODE_S) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("T") PORT_CODE(KEYCODE_T) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("U") PORT_CODE(KEYCODE_U) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("V") PORT_CODE(KEYCODE_V) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("W") PORT_CODE(KEYCODE_W) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('P') PORT_CHAR('p') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('Q') PORT_CHAR('q') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('R') PORT_CHAR('r') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('S') PORT_CHAR('s') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('T') PORT_CHAR('t') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('U') PORT_CHAR('u') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('V') PORT_CHAR('v') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('W') PORT_CHAR('w') PORT_START("LINE3") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("\\") PORT_CODE(KEYCODE_BACKSLASH) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("]") PORT_CODE(KEYCODE_CLOSEBRACE) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("^") PORT_CODE(KEYCODE_TILDE) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("_") PORT_CODE(KEYCODE_EQUALS) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('X') PORT_CHAR('x') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('Y') PORT_CHAR('y') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') PORT_CHAR('z') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("\\") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("]") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("^") PORT_CODE(KEYCODE_TILDE) PORT_CHAR('^') PORT_CHAR('~') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("_") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('_') PORT_START("LINE4") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') PORT_START("LINE5") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(":") PORT_CODE(KEYCODE_QUOTE) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(".") PORT_CODE(KEYCODE_STOP) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("?") PORT_CODE(KEYCODE_SLASH) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(":") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(".") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("?") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') PORT_START("LINE6") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("STRN") PORT_CODE(KEYCODE_MINUS_PAD) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("STOP") PORT_CODE(KEYCODE_F12) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("IZ") PORT_CODE(KEYCODE_ASTERISK) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("VZ") PORT_CODE(KEYCODE_SLASH_PAD) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Backspace") PORT_CODE(KEYCODE_BACKSPACE) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("STRN (CLS)") PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("STOP") PORT_CODE(KEYCODE_PAUSE) PORT_CHAR(UCHAR_MAMEKEY(PAUSE)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("IZ (DEL)") PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("VZ (INS)") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Backspace") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR(9) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') PORT_START("LINE7") - // All keys in this line are reversed logic - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Alf") PORT_CODE(KEYCODE_F11) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Graf") PORT_CODE(KEYCODE_F10) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Prf") PORT_CODE(KEYCODE_ESC) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Sel") PORT_CODE(KEYCODE_RCONTROL) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Upr") PORT_CODE(KEYCODE_LCONTROL) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("OO") PORT_CODE(KEYCODE_LALT) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Alf") PORT_CODE(KEYCODE_LALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Graf") PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_MAMEKEY(RALT)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Prf (Esc)") PORT_CODE(KEYCODE_ESC) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Sel") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Upr (Ctrl)") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("OO (Lock)") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_START("LINE8") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 0") PORT_CODE(KEYCODE_0_PAD) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 1") PORT_CODE(KEYCODE_1_PAD) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 2") PORT_CODE(KEYCODE_2_PAD) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 3") PORT_CODE(KEYCODE_3_PAD) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 4") PORT_CODE(KEYCODE_4_PAD) - PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 5") PORT_CODE(KEYCODE_5_PAD) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 6") PORT_CODE(KEYCODE_6_PAD) - PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 7") PORT_CODE(KEYCODE_7_PAD) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 0") PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 1") PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 2") PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 3") PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 4") PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 5") PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 6") PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 7") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_START("LINE9") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 8") PORT_CODE(KEYCODE_8_PAD) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 9") PORT_CODE(KEYCODE_9_PAD) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 8") PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num 9") PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num .") PORT_CODE(KEYCODE_DEL_PAD) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Num .") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(10) PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) PORT_START("LINE10") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) - PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) - PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) - PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F1 F6") PORT_CODE(KEYCODE_F1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F2 F7") PORT_CODE(KEYCODE_F2) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F3 F8") PORT_CODE(KEYCODE_F3) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F4 F9") PORT_CODE(KEYCODE_F4) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("F5 F10") PORT_CODE(KEYCODE_F5) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED) @@ -253,16 +253,16 @@ void pk8020_state::pk8020(machine_config &config) m_devbank->set_addr_width(6); /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(20_MHz_XTAL / 2, 640, 0, 512, 312, 0, 256); - screen.set_screen_update(FUNC(pk8020_state::screen_update_pk8020)); - screen.set_palette(m_palette); + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(20_MHz_XTAL / 2, 656, 0, 512, 312, 0, 256); + m_screen->set_screen_update(FUNC(pk8020_state::screen_update_pk8020)); + m_screen->set_palette(m_palette); GFXDECODE(config, "gfxdecode", m_palette, gfx_pk8020); PALETTE(config, m_palette, FUNC(pk8020_state::pk8020_palette), 16); i8255_device &iop1(I8255(config, "iop1")); // КР580ВВ55А (D17) - iop1.in_pa_callback().set(FUNC(pk8020_state::ppi_porta_r)); + iop1.in_pa_callback().set(FUNC(pk8020_state::iop1_porta_r)); iop1.out_pb_callback().set(FUNC(pk8020_state::floppy_control_w)); iop1.out_pc_callback().set(FUNC(pk8020_state::video_page_w)); @@ -275,7 +275,7 @@ void pk8020_state::pk8020(machine_config &config) iop2.out_pa_callback().append(m_printer, FUNC(centronics_device::write_data5)).bit(5).invert(); iop2.out_pa_callback().append(m_printer, FUNC(centronics_device::write_data6)).bit(6).invert(); iop2.out_pa_callback().append(m_printer, FUNC(centronics_device::write_data7)).bit(7).invert(); - iop2.out_pc_callback().set(FUNC(pk8020_state::ppi_2_portc_w)); + iop2.out_pc_callback().set(FUNC(pk8020_state::iop2_portc_w)); I8255(config, "iop3"); // КР580ВВ55А (D2) @@ -293,13 +293,16 @@ void pk8020_state::pk8020(machine_config &config) i8251_device &ios1(I8251(config, "ios1", 20_MHz_XTAL / 10)); // КР580ВВ51А (D10) ios1.txd_handler().set("v24", FUNC(rs232_port_device::write_txd)); - ios1.dtr_handler().set("v24", FUNC(rs232_port_device::write_rts)); + ios1.dtr_handler().set("v24", FUNC(rs232_port_device::write_rts)).invert(); ios1.rxrdy_handler().set(m_inr, FUNC(pic8259_device::ir1_w)); ios1.txrdy_handler().set(m_inr, FUNC(pic8259_device::ir2_w)); rs232_port_device &v24(RS232_PORT(config, "v24", default_rs232_devices, nullptr)); v24.rxd_handler().set("ios1", FUNC(i8251_device::write_rxd)); - v24.dsr_handler().set("ios1", FUNC(i8251_device::write_dsr)); + v24.dsr_handler().set("ios1", FUNC(i8251_device::write_dsr)).invert(); + + v24.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); + v24.set_default_option("microsoft_mouse"); i8251_device &ios2(I8251(config, "ios2", 20_MHz_XTAL / 10)); // КР580ВВ51А (D11) ios2.txd_handler().set("line", FUNC(rs232_port_device::write_txd)); @@ -313,7 +316,6 @@ void pk8020_state::pk8020(machine_config &config) c1.signal_handler().append("ios2", FUNC(i8251_device::write_rxc)); KR1818VG93(config, m_fdc, 20_MHz_XTAL / 20); // КР1818ВГ93 - m_fdc->intrq_wr_callback().set(m_inr, FUNC(pic8259_device::ir7_w)); for (auto &floppy : m_floppy) FLOPPY_CONNECTOR(config, floppy, pk8020_floppies, "qd", pk8020_state::floppy_formats); @@ -330,6 +332,7 @@ void pk8020_state::pk8020(machine_config &config) CENTRONICS(config, m_printer, centronics_devices, nullptr); m_printer->busy_handler().set(m_inr, FUNC(pic8259_device::ir6_w)).invert(); + m_printer->busy_handler().append([this] (int state) { m_printer_busy = !state; }); /* internal ram */ RAM(config, RAM_TAG).set_default_size("258K").set_default_value(0x00); // 64 + 4*48 + 2 = 258 diff --git a/src/mame/ussr/pk8020.h b/src/mame/ussr/pk8020.h index 9bf79cadbb7..28b2bc39b8d 100644 --- a/src/mame/ussr/pk8020.h +++ b/src/mame/ussr/pk8020.h @@ -20,7 +20,14 @@ #include "machine/ram.h" #include "machine/wd_fdc.h" #include "sound/spkrdev.h" + #include "emupal.h" +#include "screen.h" + + +static constexpr int TEXT_RAM_BASE = 0x40000; +static constexpr int GRAPHICS_RAM_BASE = 0x10000; +static constexpr int GRAPHICS_PAGE_SIZE = 0xc000; class pk8020_state : public driver_device @@ -43,6 +50,7 @@ public: , m_region_gfx1(*this, "gfx1") , m_io_port(*this, "LINE%u", 0U) , m_palette(*this, "palette") + , m_screen(*this, "screen") { } void pk8020(machine_config &config); @@ -71,11 +79,14 @@ private: void pk8020_palette(palette_device &palette) const; uint32_t screen_update_pk8020(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(pk8020_interrupt); - uint8_t ppi_porta_r(); + uint8_t iop1_porta_r(); void floppy_control_w(uint8_t data); - void ppi_2_portc_w(uint8_t data); + void iop2_portc_w(uint8_t data); void pit_out0(int state); + emu_timer *m_timer; + TIMER_CALLBACK_MEMBER(timer_tick); + static const char *plm_select_name(uint8_t data); void log_bank_select(uint8_t bank, offs_t start, offs_t end, uint8_t rdecplm, uint8_t wdecplm); @@ -94,6 +105,7 @@ private: uint8_t m_video_page_access = 0; uint8_t m_sound_gate = 0; uint8_t m_sound_level = 0; + int m_printer_busy = 0; required_device m_maincpu; required_device m_decplm; @@ -110,6 +122,7 @@ private: required_region_ptr m_region_gfx1; required_ioport_array<16> m_io_port; required_device m_palette; + required_device m_screen; }; #endif // MAME_USSR_PK8020_H diff --git a/src/mame/ussr/pk8020_m.cpp b/src/mame/ussr/pk8020_m.cpp index 35b1b5eafdb..01551722bc4 100644 --- a/src/mame/ussr/pk8020_m.cpp +++ b/src/mame/ussr/pk8020_m.cpp @@ -40,8 +40,11 @@ void pk8020_state::sysreg_w(offs_t offset, uint8_t data) { if (!BIT(offset, 7)) { + if ((m_bank_select ^ data) & 0xfc) + { + logerror("%s: Bank select = %02X (raw %02X)\n", machine().describe_context(), (data >> 2) & 0x1f, data & 0xfc); + } m_bank_select = data & 0xfc; - logerror("%s: Bank select = %02X\n", machine().describe_context(), (data >> 2) & 0x1f); } if (!BIT(offset, 6)) @@ -93,20 +96,15 @@ void pk8020_state::memory_w(offs_t offset, uint8_t data) text_w(offset & 0x3ff, data); } -uint8_t pk8020_state::ppi_porta_r() +uint8_t pk8020_state::iop1_porta_r() { - return 0xf0 | (m_takt <<1) | (m_text_attr<<3) | ((m_cass->input() > +0.04) ? 1 : 0); + return 0xf0 | (m_screen->vblank() << 1) | (m_printer_busy << 2) | (m_text_attr << 3) | ((m_cass->input() > +0.04) ? 1 : 0); } void pk8020_state::floppy_control_w(uint8_t data) { floppy_image_device *floppy = nullptr; - // Turn all motors off - for (int n = 0; n < 4; n++) - if (m_floppy[n]->get_device()) - m_floppy[n]->get_device()->mon_w(1); - for (int n = 0; n < 4; n++) if (BIT(data, n)) floppy = m_floppy[n]->get_device(); @@ -115,20 +113,24 @@ void pk8020_state::floppy_control_w(uint8_t data) if (floppy) { - floppy->mon_w(0); + if (BIT(data, 5)) + { + floppy->mon_w(0); + m_inr->ir7_w(CLEAR_LINE); + m_timer->adjust(attotime::from_msec(3000)); + } floppy->ss_w(BIT(data, 4)); } - // todo: at least bit 5 and bit 7 is connected to something too... } -void pk8020_state::ppi_2_portc_w(uint8_t data) +void pk8020_state::iop2_portc_w(uint8_t data) { static const double levels[4] = { 0.0, 1.0, -1.0, 0.0 }; m_cass->output(levels[data & 3]); - m_sound_gate = BIT(data,3); + m_sound_gate = BIT(data, 3); m_speaker->level_w(m_sound_gate ? m_sound_level : 0); m_printer->write_select(!BIT(data, 4)); @@ -183,6 +185,16 @@ void pk8020_state::log_bank_select(uint8_t bank, offs_t start, offs_t end, uint8 logerror("Bank select %02X, %04X-%04Xh: read %s (%02X), write %s (%02X)\n", bank, start, end, plm_select_name(rdecplm), rdecplm, plm_select_name(wdecplm), wdecplm); } +TIMER_CALLBACK_MEMBER(pk8020_state::timer_tick) +{ + m_inr->ir7_w(ASSERT_LINE); + + // Turn all motors off + for (int n = 0; n < 4; n++) + if (m_floppy[n]->get_device()) + m_floppy[n]->get_device()->mon_w(1); +} + void pk8020_state::machine_start() { m_ios[0]->write_cts(0); @@ -190,6 +202,9 @@ void pk8020_state::machine_start() m_ios[1]->write_dsr(0); m_takt = 0; + m_timer = timer_alloc(FUNC(pk8020_state::timer_tick), this); + m_timer->adjust(attotime::never, 0, attotime::never); + save_item(NAME(m_bank_select)); save_item(NAME(m_takt)); save_item(NAME(m_sound_gate)); diff --git a/src/mame/ussr/pk8020_v.cpp b/src/mame/ussr/pk8020_v.cpp index a78f9b4820f..04fd4997d94 100644 --- a/src/mame/ussr/pk8020_v.cpp +++ b/src/mame/ussr/pk8020_v.cpp @@ -46,7 +46,7 @@ void pk8020_state::palette_w(uint8_t data) void pk8020_state::video_page_w(uint8_t data) { - m_video_page_access =(data>>6) & 3; + m_video_page_access = (data >> 6) & 3; m_attr = (data >> 4) & 3; m_wide = (data >> 3) & 1; m_font = (data >> 2) & 1; @@ -56,13 +56,13 @@ void pk8020_state::video_page_w(uint8_t data) uint8_t pk8020_state::text_r(offs_t offset) { if (m_attr == 3) m_text_attr=m_ram->pointer()[0x40400+offset]; - return m_ram->pointer()[0x40000+offset]; + return m_ram->pointer()[TEXT_RAM_BASE + offset]; } void pk8020_state::text_w(offs_t offset, uint8_t data) { uint8_t *ram = m_ram->pointer(); - ram[0x40000+offset] = data; + ram[TEXT_RAM_BASE + offset] = data; switch (m_attr) { case 0: break; case 1: ram[0x40400+offset]=0x01;break; @@ -73,7 +73,7 @@ void pk8020_state::text_w(offs_t offset, uint8_t data) uint8_t pk8020_state::gzu_r(offs_t offset) { - uint8_t *addr = m_ram->pointer() + 0x10000 + (m_video_page_access * 0xC000); + uint8_t *addr = m_ram->pointer() + GRAPHICS_RAM_BASE + (m_video_page_access * GRAPHICS_PAGE_SIZE); uint8_t p0 = addr[offset]; uint8_t p1 = addr[offset + 0x4000]; uint8_t p2 = addr[offset + 0x8000]; @@ -107,7 +107,7 @@ uint8_t pk8020_state::gzu_r(offs_t offset) void pk8020_state::gzu_w(offs_t offset, uint8_t data) { - uint8_t *addr = m_ram->pointer() + 0x10000 + (m_video_page_access * 0xC000); + uint8_t *addr = m_ram->pointer() + GRAPHICS_RAM_BASE + (m_video_page_access * GRAPHICS_PAGE_SIZE); uint8_t *plane_0 = addr; uint8_t *plane_1 = addr + 0x4000; uint8_t *plane_2 = addr + 0x8000; @@ -141,11 +141,12 @@ uint32_t pk8020_state::screen_update_pk8020(screen_device &screen, bitmap_ind16 { for (int x = 0; x < 64; x++) { - uint8_t const chr = ram[x +(y*64) + 0x40000]; - uint8_t const attr= ram[x +(y*64) + 0x40400]; + const int wx = m_wide ? (x & ~1) : x; + uint8_t const chr = ram[wx + (y*64) + TEXT_RAM_BASE]; + uint8_t const attr= ram[wx + (y*64) + TEXT_RAM_BASE + 0x400]; for (int j = 0; j < 16; j++) { - uint32_t const addr = 0x10000 + x + ((y*16+j)*64) + (m_video_page * 0xC000); + uint32_t const addr = GRAPHICS_RAM_BASE + x + ((y*16+j)*64) + (m_video_page * GRAPHICS_PAGE_SIZE); uint8_t code1 = ram[addr]; uint8_t code2 = ram[addr + 0x4000]; uint8_t code3 = ram[addr + 0x8000]; @@ -153,7 +154,8 @@ uint32_t pk8020_state::screen_update_pk8020(screen_device &screen, bitmap_ind16 if (attr) code4 ^= 0xff; for (int b = 0; b < 8; b++) { - uint8_t col = (((code4 >> b) & 0x01) ? 0x08 : 0x00); + const int wb = m_wide ? ((b >> 1) + (((x ^ 1) & 1) << 2)) : b; + uint8_t col = (((code4 >> wb) & 0x01) ? 0x08 : 0x00); col |= (((code3 >> b) & 0x01) ? 0x04 : 0x00); col |= (((code2 >> b) & 0x01) ? 0x02 : 0x00); col |= (((code1 >> b) & 0x01) ? 0x01 : 0x00); From 307a439311c4bb63e1ee3cb69e56da8c1ae30e1c Mon Sep 17 00:00:00 2001 From: TheLostNinja <116140256+TheLostNinja@users.noreply.github.com> Date: Sat, 7 Mar 2026 22:12:36 +0300 Subject: [PATCH 182/351] onetwo.cpp driver repropriation. (#14967) * Move onetwo.cpp from misc to dgrm * Update mame.lst --- src/mame/{misc => dgrm}/onetwo.cpp | 0 src/mame/mame.lst | 8 ++++---- 2 files changed, 4 insertions(+), 4 deletions(-) rename src/mame/{misc => dgrm}/onetwo.cpp (100%) diff --git a/src/mame/misc/onetwo.cpp b/src/mame/dgrm/onetwo.cpp similarity index 100% rename from src/mame/misc/onetwo.cpp rename to src/mame/dgrm/onetwo.cpp diff --git a/src/mame/mame.lst b/src/mame/mame.lst index feab7c87a68..13a9b6dbd81 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -17711,6 +17711,10 @@ aviion_4600 @source:dgrm/blackt96.cpp blackt96 +@source:dgrm/onetwo.cpp +onetwo +onetwoe + @source:dgrm/pokechmp.cpp billlist pokechmp @@ -32745,10 +32749,6 @@ komocomo maddonnab oneshot -@source:misc/onetwo.cpp -onetwo -onetwoe - @source:misc/opercoin.cpp multibaby spirulo From b37b9316d59e60d3e35704dbe688ec379717fd13 Mon Sep 17 00:00:00 2001 From: ICEknigh7 <47050710+ICEknigh7@users.noreply.github.com> Date: Sat, 7 Mar 2026 20:15:35 +0100 Subject: [PATCH 183/351] nes.xml: Added two partially working prototypes and two working clones (#15036) New partially working software list items (nes.xml) --------------------------------------------------- Magical Puzzle Popils (prototype) [VGHF] Galaga (prototype) [VGHF] New working software list items (nes.xml) ----------------------------------------- Magical Puzzle Popils (prototype, with recreated sound) [VGHF, Mister Man, ndiddy] Galaga (prototype, with recreated graphics) [VGHF, Frank Cifaldi, Rushifell, ndiddy] --- hash/nes.xml | 100 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/hash/nes.xml b/hash/nes.xml index daa40604911..daa2ceadc36 100644 --- a/hash/nes.xml +++ b/hash/nes.xml @@ -13831,6 +13831,50 @@ license:CC0-1.0 + + Galaga (prototype) + 1988? + HAL Laboratory + + + + + + + + + + + + + + + + + + Galaga (prototype, with recreated graphics) + 1988? + HAL Laboratory + + + + + + + + + + + + + + + + Galaxian (Japan) 1984 @@ -29395,6 +29439,62 @@ license:CC0-1.0 + + Magical Puzzle Popils (prototype) + 1989 + Tengen + + + + + + + + + + + + + + + + + + + + + + + + Magical Puzzle Popils (prototype, with recreated sound) + 1989 + Tengen + + + + + + + + + + + + + + + + + + + + + + Portopia Renzoku Satsujin Jiken (Japan) 1985 From 33d08231c447f96f3efc3e0c5e2b346cfe611a42 Mon Sep 17 00:00:00 2001 From: David 'Foxhack' Silva <71686027+FoxhackDN@users.noreply.github.com> Date: Sat, 7 Mar 2026 11:16:34 -0800 Subject: [PATCH 184/351] saturn.xml: Added two prototypes (#15048) New working software list items ------------------------------- Prize Fighter: Heavyweight Edition (USA, prototype 19960325) [Limited Run, Scheming Villains] Prize Fighter: Heavyweight Edition (Japan, prototype 19960418) [Limited Run, Scheming Villains] --- hash/saturn.xml | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/hash/saturn.xml b/hash/saturn.xml index 56d7610987c..5d6b4e96c59 100644 --- a/hash/saturn.xml +++ b/hash/saturn.xml @@ -38804,6 +38804,48 @@ Doesn't accept any input on System Memory requirement screen + + + Prize Fighter: Heavyweight Edition (USA, prototype 19960325) + 1996 + Digital Pictures + + + + + + + + + + + + + + + + + Prize Fighter: Heavyweight Edition (Japan, prototype 19960418) + 1996 + Digital Pictures + + + + + + + + + + + + + + Major Damage (USA, prototype 19960614) From 4404ce31f052eb1db132a2b002075b6ad573803c Mon Sep 17 00:00:00 2001 From: shattered Date: Sat, 7 Mar 2026 22:18:40 +0300 Subject: [PATCH 185/351] New system: tipc (#15006) New systems marked not working ------------------------------ Texas Instruments Professional Computer [shattered] --- src/mame/mame.lst | 3 + src/mame/ti/tipc.cpp | 589 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 592 insertions(+) create mode 100644 src/mame/ti/tipc.cpp diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 13a9b6dbd81..5240caccb1c 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -47008,6 +47008,9 @@ ti990_10 ti990_4 ti990_4v +@source:ti/tipc.cpp +tipc + @source:ti/tm990189.cpp 990189 990189v diff --git a/src/mame/ti/tipc.cpp b/src/mame/ti/tipc.cpp new file mode 100644 index 00000000000..3de7359959d --- /dev/null +++ b/src/mame/ti/tipc.cpp @@ -0,0 +1,589 @@ +// license:BSD-3-Clause +// copyright-holders:Sergey Svishchev +/*************************************************************************** + + Texas Instruments Professional Computer (a MS-DOS compatible PC) + + to do: + + - native keyboard (not dumped) + - cursor blink rate, blink attr + - diags: pass all tests (interrupt test depends on timing of LOOP insn) + - sound + - printer + - hdc + - other cards (clock, serial)? + - softlist + +***************************************************************************/ + +#include "emu.h" + +#include "bus/rs232/rs232.h" +#include "cpu/i86/i86.h" +#include "imagedev/floppy.h" +#include "machine/clock.h" +#include "machine/i8251.h" +#include "machine/input_merger.h" +#include "machine/keyboard.h" +#include "machine/pic8259.h" +#include "machine/pit8253.h" +#include "machine/ram.h" +#include "machine/wd_fdc.h" +#include "sound/spkrdev.h" +#include "video/mc6845.h" + +#include "emupal.h" +#include "screen.h" + + +#define LOG_DISK (1U << 1) + +//#define VERBOSE (LOG_GENERAL|LOG_DISK) +#include "logmacro.h" + +#define LOGDISK(...) LOGMASKED(LOG_DISK, __VA_ARGS__) + + +namespace { + +class tipc_state : public driver_device +{ +public: + tipc_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_dsw0(*this, "DSW0") + , m_upd8251(*this, "upd8251") + , m_pit8253(*this, "pit8253") + , m_pic8259(*this, "pic8259") + , m_rs232(*this, "rs232") + , m_irq2_merger(*this, "merge_irq2") + , m_irq3_merger(*this, "merge_irq3") + , m_ram(*this, RAM_TAG) + , m_crtc(*this, "crtc") + , m_palette(*this, "palette") + , m_vdu_char_rom(*this, "vduchar") + , m_crtc_gfx(*this, "crtc_gfx%u", 0U) + , m_fdc(*this, "fdc") + , m_floppies(*this, "fdc:%u", 0U) + { } + + void tipc(machine_config &config); + +protected: + void machine_start() override ATTR_COLD; + void machine_reset() override ATTR_COLD; + +private: + enum + { + CPU_SBUF = 0, + SBUF_WRITE, + CPU_FDC, + SBUF_READ + }; + + void tipc_io(address_map &map) ATTR_COLD; + void tipc_map(address_map &map) ATTR_COLD; + + required_device m_maincpu; + required_ioport m_dsw0; + required_device m_upd8251; + required_device m_pit8253; + required_device m_pic8259; + required_device m_rs232; + required_device m_irq2_merger; + required_device m_irq3_merger; + required_device m_ram; + required_device m_crtc; + required_device m_palette; + required_region_ptr m_vdu_char_rom; + required_shared_ptr_array m_crtc_gfx; + required_device m_fdc; + required_device_array m_floppies; + + MC6845_UPDATE_ROW(crtc_update_row); + MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr_changed); + + void u47_w(uint8_t data); + void u51_w(uint8_t data); + + uint8_t fdc_r(offs_t offset); + void fdc_w(offs_t offset, uint8_t data); + + void fdc_drq_w(int state); + + uint8_t char_ram_r(offs_t offset); + void char_ram_w(offs_t offset, uint8_t data); + + uint8_t attr_r(offs_t offset); + void attr_w(offs_t offset, uint8_t data); + + uint8_t misc_r(offs_t offset); + void misc_w(offs_t offset, uint8_t data); + + void palette_w(offs_t offset, uint8_t data); + + void vsync_changed(int state); + + uint8_t m_u47; + + int m_buf_mode, side; + uint16_t m_buf_ptr; + std::unique_ptr m_buf; + + uint8_t m_crtc_attr_latch, m_crtc_misc_latch, m_crtc_misc_buffer, m_crtc_palette[3]; + std::unique_ptr m_crtc_ram, m_crtc_attr; + + floppy_image_device *m_floppy = nullptr; +}; + + +static DEVICE_INPUT_DEFAULTS_START( kbd_rs232_defaults ) + DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_2400 ) + DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_8 ) + DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_EVEN ) + DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 ) +DEVICE_INPUT_DEFAULTS_END + +void tipc_state::machine_start() +{ + if (!m_ram->started()) + throw device_missing_dependencies(); + + m_maincpu->space(AS_PROGRAM).install_ram(0, m_ram->size() - 1, m_ram->pointer()); + m_buf = make_unique_clear(1024); + + m_crtc_ram = make_unique_clear(2048); + m_crtc_attr = make_unique_clear(2048); +} + +void tipc_state::machine_reset() +{ + m_buf_ptr = 0; + m_buf_mode = 0; + side = 0; + m_floppy = nullptr; + + m_u47 = 0; + m_crtc_attr_latch = m_crtc_misc_latch = m_crtc_misc_buffer = 0; +} + + +void tipc_state::u47_w(uint8_t data) +{ + m_pit8253->write_gate0(BIT(data, 0)); // FIXME replace with input merger? + + m_irq3_merger->in_w<1>(BIT(data, 1)); + m_irq2_merger->in_w<1>(BIT(data, 2)); + + if (BIT(m_u47 ^ data, 1) && !BIT(data, 1)) + m_irq3_merger->in_w<2>(0); + if (BIT(m_u47 ^ data, 2) && !BIT(data, 2)) + m_irq2_merger->in_w<2>(0); + + m_fdc->dden_w(BIT(data, 3)); + side = !BIT(data, 5); + if (m_floppy) m_floppy->ss_w(side); + m_buf_mode = BIT(data, 6, 2); + + m_u47 = data; + + LOG("U47 <- %02x, mode %d, side %d\n", data, m_buf_mode, side); +} + +void tipc_state::u51_w(uint8_t data) +{ + LOG("U51 <- %02x\n", data); + + data ^= 255; + + switch (data & 3) + { + case 1: + m_floppy = m_floppies[0]->get_device(); + break; + + case 2: + m_floppy = m_floppies[1]->get_device(); + break; + + case 0: + m_floppy = nullptr; + break; + } + + m_fdc->set_floppy(m_floppy); + if (m_floppy) + { + m_floppy->mon_w(0); + m_floppy->ss_w(side); + LOG("floppy ON %d ready? %d\n", data & 3, m_floppy->ready_r()); + } + + if (m_floppies[0]->get_device()) + m_floppies[0]->get_device()->mon_w(BIT(data, 4)); + if (m_floppies[1]->get_device()) + m_floppies[1]->get_device()->mon_w(BIT(data, 5)); +} + +void tipc_state::fdc_w(offs_t offset, uint8_t data) +{ + LOGDISK("disk mode %d fdc_w %d <- %02x\n", m_buf_mode, offset, data); + switch (m_buf_mode) + { + case CPU_FDC: + m_fdc->write(offset, data); + break; + + case CPU_SBUF: + if (offset == 2) + { + m_buf_ptr = 0; + } + else if (offset < 2) + { + m_buf[m_buf_ptr++] = data; + m_buf_ptr &= 1023; + } + break; + + default: + break; + } +} + +uint8_t tipc_state::fdc_r(offs_t offset) +{ + uint8_t data = 0; + switch (m_buf_mode) + { + case CPU_FDC: + data = m_fdc->read(offset); + break; + + case CPU_SBUF: + if (offset < 2) + { + data = m_buf[m_buf_ptr++]; + m_buf_ptr &= 1023; + } + break; + + default: + break; + } + LOGDISK("disk mode %d fdc_r %d == %02x\n", m_buf_mode, offset, data); + return data; +} + +void tipc_state::fdc_drq_w(int state) +{ + if (!state) return; + + switch (m_buf_mode) + { + case SBUF_READ: + LOGDISK("drq sbuf %d == %02x\n", m_buf_mode, m_buf[m_buf_ptr]); + m_fdc->data_w(m_buf[m_buf_ptr++]); + m_buf_ptr &= 1023; + break; + + case SBUF_WRITE: + m_buf[m_buf_ptr] = m_fdc->data_r(); + LOGDISK("drq sbuf %d <- %02x\n", m_buf_mode, m_buf[m_buf_ptr]); + m_buf_ptr += 1; + m_buf_ptr &= 1023; + break; + + default: + LOGDISK("unexpected drq in mode %d\n"); + break; + } +} + + +void tipc_state::char_ram_w(offs_t offset, uint8_t data) +{ + m_crtc_ram[offset] = data; + m_crtc_attr[offset] = m_crtc_attr_latch; +} + +uint8_t tipc_state::char_ram_r(offs_t offset) +{ + m_crtc_attr_latch = m_crtc_attr[offset]; + return m_crtc_ram[offset]; +} + +void tipc_state::attr_w(offs_t offset, uint8_t data) +{ + m_crtc_attr_latch = data; +} + +uint8_t tipc_state::attr_r(offs_t offset) +{ + return m_crtc_attr_latch; +} + +/* + * TechRef pp. 2-51, B-2 + * + * b7 - interrupt enable + * b6 - text screen enable + * b5 - undocumented + */ +void tipc_state::misc_w(offs_t offset, uint8_t data) +{ + m_crtc_misc_latch = data; + m_crtc_misc_buffer &= ~(1 << 3); + m_crtc_misc_buffer |= BIT(data, 7) << 3; +} + +/* + * Bits 0-2 loop back color outputs (TechRef p. 2-56) + * + * Self test expects values 0xf0 and 0xf7 (ROM listing p. 90) + */ +uint8_t tipc_state::misc_r(offs_t offset) +{ + m_crtc_misc_buffer ^= 7; + LOG("crtc misc buf %02x\n", 0xf0 | m_crtc_misc_buffer); + return 0xf0 | m_crtc_misc_buffer; +} + +// 0=blue, 1=green, 2=red +void tipc_state::palette_w(offs_t offset, uint8_t data) +{ + m_crtc_palette[offset >> 4] = data; +} + +void tipc_state::vsync_changed(int state) +{ + m_maincpu->set_input_line(INPUT_LINE_NMI, state & BIT(m_crtc_misc_latch, 7)); + if (BIT(m_crtc_misc_latch, 7)) m_crtc_misc_buffer |= state << 3; +} + +/* + * attribute bits (TechRef p. 2-42) + * + * 0 intensity level 1 (blue) + * 1 intensity level 2 (red) + * 2 intensity level 3 (green) + * 3 character enable + * 4 reverse + * 5 underline + * 6 blink + * 7 alt character set + * + * attribute priority, from high to low (p. 2-55) + * + * color + * reverse video and cursor + * character enable + * blink + * underline + */ +MC6845_UPDATE_ROW(tipc_state::crtc_update_row) +{ + const pen_t *const pen = m_palette->pens(); + + de = BIT(m_crtc_misc_latch, 6); + + for (int column = 0; column < 90; column++) + { + u8 code_0 = m_crtc_gfx[0][y * 92 + (column ^ 1)]; + u8 code_1 = m_crtc_gfx[1][y * 92 + (column ^ 1)]; + u8 code_2 = m_crtc_gfx[2][y * 92 + (column ^ 1)]; + + for (int bit = 0; bit < 8; bit++) + { + int x = (column * 8) + bit; + int color = BIT(code_0, 7) | (BIT(code_1, 7) << 2) | (BIT(code_2, 7) << 1); + color = BIT(m_crtc_palette[0], color) | (BIT(m_crtc_palette[2], color) << 1) | (BIT(m_crtc_palette[1], color) << 2); + + bitmap.pix(y, x) = pen[color]; + + code_0 <<= 1; + code_1 <<= 1; + code_2 <<= 1; + } + } + + for (int column = 0; column < x_count; column++) + { + u8 code = m_crtc_ram[((ma + column) & 0x7ff)]; + u8 attr = m_crtc_attr[((ma + column) & 0x7ff)]; + u16 addr = (code << 4) | ra; + u16 data = (m_vdu_char_rom[addr & 0xfff] ^ 0xff) << 1; + + if (BIT(data, 8)) + data = bitswap<9>(data, 7, 7, 6, 5, 4, 3, 2, 1, 1); + + if (column == cursor_x) + { + data = 0x1ff; + } + + // underline + if (BIT(attr, 5) && ra == 11) data = 0x1ff; + + // blink TODO + + // character enable + if (!BIT(attr, 3)) data = 0; + + // reverse video + if (BIT(attr, 4)) data ^= 0x1ff; + + for (int bit = 0; bit < 9; bit++) + { + int x = (column * 9) + bit; + int color = (de && BIT(data, 8)) ? (attr & 7) : 0; + + if (color) bitmap.pix(y, x) = pen[color]; + + data <<= 1; + } + } +} + +MC6845_ON_UPDATE_ADDR_CHANGED(tipc_state::crtc_addr_changed) +{ +} + + +static void pc_dd_floppies(device_slot_interface &device) +{ + device.option_add("525dd", FLOPPY_525_DD); + device.option_add("525qd", FLOPPY_525_QD); +} + +static INPUT_PORTS_START(tipc) + PORT_START("DSW0") + PORT_DIPNAME( 0x04, 0x04, "Monitor type") + PORT_DIPSETTING( 0x00, "50 Hz" ) + PORT_DIPSETTING( 0x04, "60 Hz" ) + PORT_DIPNAME( 0x03, 0x02, "Floppy type") + PORT_DIPSETTING( 0x01, "640 KB DSQD" ) + PORT_DIPSETTING( 0x02, "320 KB DSDD" ) + PORT_DIPSETTING( 0x03, "160 KB SSDD" ) +INPUT_PORTS_END + +void tipc_state::tipc_map(address_map &map) +{ + map.unmap_value_high(); + + map(0xc0000, 0xc7fff).ram().share(m_crtc_gfx[0]); + map(0xc8000, 0xcffff).ram().share(m_crtc_gfx[1]); + map(0xd0000, 0xd7fff).ram().share(m_crtc_gfx[2]); + map(0xde000, 0xde7ff).rw(FUNC(tipc_state::char_ram_r), FUNC(tipc_state::char_ram_w)).mirror(0x800); + map(0xdf000, 0xdf000).r(FUNC(tipc_state::misc_r)); + map(0xdf010, 0xdf03f).w(FUNC(tipc_state::palette_w)); + map(0xdf800, 0xdf800).rw(FUNC(tipc_state::attr_r), FUNC(tipc_state::attr_w)); + map(0xdf810, 0xdf810).w(m_crtc, FUNC(sy6545_1_device::address_w)); + map(0xdf811, 0xdf811).r(m_crtc, FUNC(sy6545_1_device::status_r)); + map(0xdf812, 0xdf812).w(m_crtc, FUNC(sy6545_1_device::register_w)); + map(0xdf813, 0xdf813).r(m_crtc, FUNC(sy6545_1_device::register_r)); + map(0xdf820, 0xdf820).w(FUNC(tipc_state::misc_w)); + map(0xf4000, 0xfffff).rom().region("bios", 0); +} + +void tipc_state::tipc_io(address_map &map) +{ + map.unmap_value_high(); + map(0x0000, 0x0000).w(FUNC(tipc_state::u47_w)); + map(0x0001, 0x0001).portr("DSW0"); // U48 input buffer + map(0x0002, 0x0002).nopw(); // U49 latch (printer data) + map(0x0003, 0x0003).nopw(); // U50 latch (printer, leds) + map(0x0004, 0x0004).w(FUNC(tipc_state::u51_w)); + map(0x0010, 0x0011).rw(m_upd8251, FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x0014, 0x0017).rw(m_pit8253, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); + map(0x0018, 0x0019).rw(m_pic8259, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); + map(0x0020, 0x0023).rw(FUNC(tipc_state::fdc_r), FUNC(tipc_state::fdc_w)); + map(0x0030, 0x0033).noprw(); // HDC +} + +void tipc_state::tipc(machine_config &config) +{ + I8088(config, m_maincpu, XTAL(15'000'000) / 3); + m_maincpu->set_addrmap(AS_PROGRAM, &tipc_state::tipc_map); + m_maincpu->set_addrmap(AS_IO, &tipc_state::tipc_io); + m_maincpu->set_irq_acknowledge_callback(m_pic8259, FUNC(pic8259_device::inta_cb)); + + I8251(config, m_upd8251, 0); + m_upd8251->txd_handler().set(m_rs232, FUNC(rs232_port_device::write_txd)); + m_upd8251->txd_handler().append(m_upd8251, FUNC(i8251_device::write_dsr)); // keyboard loops back tx to dsr + m_upd8251->dtr_handler().set_inputline(m_maincpu, INPUT_LINE_NMI).invert(); + m_upd8251->rxrdy_handler().set(m_pic8259, FUNC(pic8259_device::ir7_w)); + m_upd8251->txrdy_handler().set(m_pic8259, FUNC(pic8259_device::ir7_w)); + + RS232_PORT(config, m_rs232, default_rs232_devices, "keyboard"); // FIXME + m_rs232->rxd_handler().set(m_upd8251, FUNC(i8251_device::write_rxd)); + m_rs232->cts_handler().set(m_upd8251, FUNC(i8251_device::write_cts)); + m_rs232->set_option_device_input_defaults("keyboard", DEVICE_INPUT_DEFAULTS_NAME(kbd_rs232_defaults)); + + clock_device &keyboard_tx_clock(CLOCK(config, "keyboard_tx_clock", XTAL(15'000'000) / (3 * 256))); // 300 + keyboard_tx_clock.signal_handler().set(m_upd8251, FUNC(i8251_device::write_txc)); + + clock_device &keyboard_rx_clock(CLOCK(config, "keyboard_rx_clock", XTAL(15'000'000) / (3 * 32))); // 2400 + keyboard_rx_clock.signal_handler().set(m_upd8251, FUNC(i8251_device::write_rxc)); + + PIT8253(config, m_pit8253); + m_pit8253->set_clk<0>(XTAL(15'000'000) / (3 * 4)); // speaker + m_pit8253->set_clk<1>(XTAL(15'000'000) / (3 * 8)); // timer A + m_pit8253->out_handler<1>().set(m_irq3_merger, FUNC(input_merger_all_high_device::in_w<0>)).invert(); + m_pit8253->out_handler<1>().append(m_irq3_merger, FUNC(input_merger_all_high_device::in_w<2>)).invert(); + m_pit8253->set_clk<2>(XTAL(15'000'000) / (3 * 8)); // timer B + m_pit8253->out_handler<2>().set(m_irq2_merger, FUNC(input_merger_all_high_device::in_w<0>)).invert(); + m_pit8253->out_handler<2>().append(m_irq2_merger, FUNC(input_merger_all_high_device::in_w<2>)).invert(); + + INPUT_MERGER_ALL_HIGH(config, m_irq2_merger).output_handler().set(m_pic8259, FUNC(pic8259_device::ir2_w)); + INPUT_MERGER_ALL_HIGH(config, m_irq3_merger).output_handler().set(m_pic8259, FUNC(pic8259_device::ir3_w)); + + PIC8259(config, m_pic8259); + m_pic8259->out_int_callback().set_inputline(m_maincpu, 0); + + FD1793(config, m_fdc, 1000000); + m_fdc->intrq_wr_callback().set(m_pic8259, FUNC(pic8259_device::ir6_w)); + m_fdc->drq_wr_callback().set(FUNC(tipc_state::fdc_drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_dd_floppies, "525dd", floppy_image_device::default_pc_floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", pc_dd_floppies, "525dd", floppy_image_device::default_pc_floppy_formats); + + // CRT Controller board + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(XTAL(18'000'000), 936, 0, 720, 320, 0, 300); + screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); + + PALETTE(config, m_palette, palette_device::BRG_3BIT); + + SY6545_1(config, m_crtc, XTAL(18'000'000) / 9); + m_crtc->set_char_width(9); + m_crtc->set_show_border_area(false); + m_crtc->set_screen("screen"); + m_crtc->set_update_row_callback(FUNC(tipc_state::crtc_update_row)); + m_crtc->set_on_update_addr_change_callback(FUNC(tipc_state::crtc_addr_changed)); + m_crtc->out_vsync_callback().set(FUNC(tipc_state::vsync_changed)); + + /* internal ram */ + RAM(config, RAM_TAG).set_default_size("256K").set_extra_options("512K, 768K"); +} + +ROM_START(tipc) + ROM_REGION(0x10000, "bios", ROMREGION_ERASEFF) + ROM_DEFAULT_BIOS("v124") + ROM_SYSTEM_BIOS(0, "v124", "v1.24") + // XU62, U63 + ROMX_LOAD("u62.bin", 0xa000, 0x1000, CRC(7b057200) SHA1(2a7a7cd3a36e023110ae7a04dff109982a0fa95d), ROM_BIOS(0)) + ROMX_LOAD("u63.bin", 0xb000, 0x1000, CRC(9facde50) SHA1(07e561f8812fc43133414ac62d350fba729433b3), ROM_BIOS(0)) + + ROM_REGION(0x2000, "vduchar", 0) + ROM_LOAD("u25.bin", 0x00000, 0x1000, CRC(c4e9ac25) SHA1(d7b0e6d5d2a4e5feab3bcf9ab5fd1d7c15401883)) // p/n 2223065-1 +ROM_END + +} // anonymous namespace + + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1983, tipc, 0, 0, tipc, tipc, tipc_state, empty_init, "Texas Instruments", "Professional Computer", MACHINE_NOT_WORKING | MACHINE_NO_SOUND) From af450a181d0e897ebfca9603ad73abd8586f2c3e Mon Sep 17 00:00:00 2001 From: qufb <93520295+qufb@users.noreply.github.com> Date: Sat, 7 Mar 2026 19:20:03 +0000 Subject: [PATCH 186/351] nec/piet1.cpp: Add skeleton driver (#15041) New systems marked not working ------------------------------ NEC Electronic Tool PI-ET1 [QUFB] --- src/mame/mame.lst | 3 + src/mame/nec/piet1.cpp | 141 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 144 insertions(+) create mode 100644 src/mame/nec/piet1.cpp diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 5240caccb1c..e205729d836 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -35000,6 +35000,9 @@ tg16 pcfx pcfxga +@source:nec/piet1.cpp +piet1 + @source:nec/tk80bs.cpp tk80bs diff --git a/src/mame/nec/piet1.cpp b/src/mame/nec/piet1.cpp new file mode 100644 index 00000000000..fbb6e5e2cbd --- /dev/null +++ b/src/mame/nec/piet1.cpp @@ -0,0 +1,141 @@ +// license:BSD-3-Clause +// copyright-holders:QUFB +/*************************************************************************** + + Skeleton driver for NEC PI-ET1. + + - PCB Markings: NEC PWD-850 707V / 72408502 / W03-104PE + - Cart Slot Markings: JAE JC20-C45PD-F1-A2-1 9X1 + - IC101: Hitachi 9M3T HC74N (Dual D-Type Flip-Flop) + - IC106: NEC D70008A-8 (µPD780 CPU) + - IC109: NEC D65013GFE63 (Gate Array) + - IC110: NEC D4991A (4bit Calendar Clock) + - IC111: NEC D43257AGU-15L (256Kbit Static RAM) + - IC112: NEC D23C4000GF A69 (4Mbit Mask ROM) + +***************************************************************************/ + +#include "emu.h" + +#include "cpu/z80/z80.h" +#include "machine/ram.h" +#include "machine/upd4991a.h" + +#include "emupal.h" +#include "screen.h" + + +namespace { + +class piet1_state : public driver_device +{ +public: + piet1_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_banks(*this, "bank%u", 0U) + , m_maincpu(*this, "maincpu") + , m_ram(*this, RAM_TAG) + , m_rtc(*this, "rtc") + , m_screen(*this, "screen") + { } + + void piet1(machine_config &config); + +protected: + virtual void machine_start() override ATTR_COLD; + +private: + required_memory_bank_array<4> m_banks; + required_device m_maincpu; + required_device m_ram; + required_device m_rtc; + required_device m_screen; + + void bank_switch(u8 bank, u8 entry); + void piet1_io_map(address_map &map) ATTR_COLD; + void piet1_map(address_map &map) ATTR_COLD; + void piet1_palette(palette_device &palette) const ATTR_COLD { } + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { return 0; } +}; + +void piet1_state::bank_switch(u8 bank, u8 entry) +{ + if (entry < 0x20) { + m_banks[bank]->set_entry(entry); + } +} + +void piet1_state::piet1_io_map(address_map &map) +{ + map.unmap_value_high(); + map.global_mask(0xff); + map(0x20, 0x20).lw8( + NAME([this](u8 data) { + logerror("%s: io_20_w %02x\n", machine().describe_context(), data); + bank_switch(2, data); + })); + map(0x21, 0x21).lw8( + NAME([this](u8 data) { + logerror("%s: io_21_w %02x\n", machine().describe_context(), data); + bank_switch(3, data); + })); + map(0x70, 0x70).lr8( + NAME([this]() { + logerror("%s: io_70_r\n", machine().describe_context()); + return 0x08; // Avoid jump to NMI ISR @ 0x0bb6 + })); +} + +void piet1_state::piet1_map(address_map &map) +{ + map(0x0000, 0x3fff).bankr(m_banks[0]); + map(0x4000, 0x7fff).bankrw(m_banks[1]); + map(0x8000, 0xbfff).bankr(m_banks[2]); + map(0xc000, 0xffff).bankr(m_banks[3]); +} + +void piet1_state::machine_start() +{ + u8 *rom = memregion("mask_rom")->base(); + u8 *ram = m_ram->pointer(); + + m_banks[0]->configure_entries(0, 32, rom, 0x4000); + m_banks[1]->configure_entries(0, 2, ram, 0x4000); + m_banks[2]->configure_entries(0, 32, rom, 0x4000); + m_banks[3]->configure_entries(0, 32, rom, 0x4000); + + for (size_t i = 0; i < 4; i++) { + m_banks[i]->set_entry(0); + } +} + +void piet1_state::piet1(machine_config &config) +{ + Z80(config, m_maincpu, 8_MHz_XTAL); // FIXME: Guessed (D70008A-6 = 6MHz). + m_maincpu->set_addrmap(AS_PROGRAM, &piet1_state::piet1_map); + m_maincpu->set_addrmap(AS_IO, &piet1_state::piet1_io_map); + + RAM(config, RAM_TAG).set_default_size("32K").set_default_value(0x00); + + UPD4991A(config, m_rtc, 32'768); // Frequency marked on PCB. + + SCREEN(config, m_screen, SCREEN_TYPE_LCD); + m_screen->set_refresh_hz(60); + m_screen->set_size(160, 64); + m_screen->set_visarea(0, 160 - 1, 0, 64 - 1); + m_screen->set_screen_update(FUNC(piet1_state::screen_update)); + m_screen->set_palette("palette"); + + PALETTE(config, "palette", FUNC(piet1_state::piet1_palette), 2); +} + +ROM_START( piet1 ) + ROM_REGION16_LE(0x80000, "mask_rom", 0) + ROM_LOAD("d23c4000gf-a69.ic112", 0x00000, 0x80000, CRC(e175fb54) SHA1(db5f72904b7f6a82a728a7ce968612673119def4)) +ROM_END + +} // anonymous namespace + + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1990, piet1, 0, 0, piet1, 0, piet1_state, empty_init, "NEC", "Electronic Tool PI-ET1", MACHINE_NOT_WORKING|MACHINE_NO_SOUND ) From 5a5fdc1e8cfa7272a251211d3b872db3b4162bad Mon Sep 17 00:00:00 2001 From: cam900 Date: Sun, 8 Mar 2026 04:22:16 +0900 Subject: [PATCH 187/351] kaneko/kan_pand.cpp and related drivers: Cleanups and Updates (#15002) * kaneko/kan_pand.cpp and related drivers: Cleanups and Updates common: - Use shortened typename value for consistency - Use BIT macro for single bit flags - Fix loggings - Fix spacings - Fix namings - Make some variables constant - Reduce literal tag usages - Fill empty sprite gfx region to transparent kaneko/kan_pand.cpp: - Remove unnecessary checks - Fix comments (Original chip has 14 bit tile code, used at djboy.cpp and hvyunit.cpp) kaneko/airbustr.cpp: - Fix ROM set name in comments kaneko/djboy.cpp: - Fix initializer - Reduce duplicated comment block - Add notes for bankswitch entry kaneko/galpanic.cpp: - Restrict foreground bitmap draw routine to screen cliprect kaneko/hvyunit.cpp: - Remove empty override kaneko/sandscrp.cpp: - Fix CALC1 naming (CALC1 hasn't any mcu core) kaneko/snowbros.cpp - Fix comment order sort to MSB first and same byte - Split driver states per hardware configs - Simplified sound bankswitch method for snowbro3 and clones - Reduce duplicates - Fix toto dip switch config for describe broken title screen - Add korean titles when exists, Fix metadata due to title screen * kaneko/kan_pand.cpp: Add notes for sprite bitmap RAM * kaneko/kan_pand.cpp: Fix sprite trail, Fix notes Chip has double buffering, so this commit fixes sprite trail match to PCB. (ex: airbustr) --- src/mame/kaneko/airbustr.cpp | 187 ++++--- src/mame/kaneko/djboy.cpp | 238 +++++---- src/mame/kaneko/galpanic.cpp | 73 ++- src/mame/kaneko/hvyunit.cpp | 257 +++++----- src/mame/kaneko/kan_pand.cpp | 158 +++--- src/mame/kaneko/kan_pand.h | 35 +- src/mame/kaneko/sandscrp.cpp | 47 +- src/mame/kaneko/snowbros.cpp | 895 +++++++++++++++++---------------- src/mame/kaneko/snowbros.h | 217 +++++--- src/mame/kaneko/snowbros_v.cpp | 214 ++++---- 10 files changed, 1156 insertions(+), 1165 deletions(-) diff --git a/src/mame/kaneko/airbustr.cpp b/src/mame/kaneko/airbustr.cpp index 03ac24d96d1..d7386b777ff 100644 --- a/src/mame/kaneko/airbustr.cpp +++ b/src/mame/kaneko/airbustr.cpp @@ -244,11 +244,11 @@ public: , m_devram(*this, "devram") , m_videoram(*this, "videoram%u", 1) , m_colorram(*this, "colorram%u", 1) - , m_masterbank(*this, "masterbank") - , m_slavebank(*this, "slavebank") + , m_mainbank(*this, "mainbank") + , m_subbank(*this, "subbank") , m_audiobank(*this, "audiobank") - , m_master(*this, "master") - , m_slave(*this, "slave") + , m_maincpu(*this, "maincpu") + , m_subcpu(*this, "subcpu") , m_audiocpu(*this, "audiocpu") , m_pandora(*this, "pandora") , m_calc1(*this, "calc1") @@ -269,23 +269,23 @@ protected: private: // memory pointers - required_shared_ptr m_devram; - required_shared_ptr_array m_videoram; - required_shared_ptr_array m_colorram; + required_shared_ptr m_devram; + required_shared_ptr_array m_videoram; + required_shared_ptr_array m_colorram; - required_memory_bank m_masterbank; - required_memory_bank m_slavebank; + required_memory_bank m_mainbank; + required_memory_bank m_subbank; required_memory_bank m_audiobank; // video-related tilemap_t *m_tilemap[2]{}; - uint8_t m_scrollx[2]{}; - uint8_t m_scrolly[2]{}; - uint8_t m_highbits = 0; + u8 m_scrollx[2]{}; + u8 m_scrolly[2]{}; + u8 m_highbits = 0; // devices - required_device m_master; - required_device m_slave; + required_device m_maincpu; + required_device m_subcpu; required_device m_audiocpu; required_device m_pandora; optional_device m_calc1; @@ -294,28 +294,28 @@ private: required_device m_palette; required_device_array m_soundlatch; - void calc1_w(offs_t offset, uint8_t data); - uint8_t calc1_r(offs_t offset); - void master_nmi_trigger_w(uint8_t data); - void master_bankswitch_w(uint8_t data); - void slave_bankswitch_w(uint8_t data); - void sound_bankswitch_w(uint8_t data); - uint8_t soundcommand_status_r(); - void coin_counter_w(uint8_t data); - template void videoram_w(offs_t offset, uint8_t data); - template void colorram_w(offs_t offset, uint8_t data); - void scrollregs_w(offs_t offset, uint8_t data); + void calc1_w(offs_t offset, u8 data); + u8 calc1_r(offs_t offset); + void main_nmi_trigger_w(u8 data); + void main_bankswitch_w(u8 data); + void sub_bankswitch_w(u8 data); + void sound_bankswitch_w(u8 data); + u8 soundcommand_status_r(); + void coin_counter_w(u8 data); + template void videoram_w(offs_t offset, u8 data); + template void colorram_w(offs_t offset, u8 data); + void scrollregs_w(offs_t offset, u8 data); template TILE_GET_INFO_MEMBER(get_tile_info); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void screen_vblank(int state); - INTERRUPT_GEN_MEMBER(slave_interrupt); + INTERRUPT_GEN_MEMBER(sub_interrupt); TIMER_DEVICE_CALLBACK_MEMBER(scanline); - void master_map(address_map &map) ATTR_COLD; - void master_prot_map(address_map &map) ATTR_COLD; - void master_io_map(address_map &map) ATTR_COLD; - void slave_map(address_map &map) ATTR_COLD; - void slave_io_map(address_map &map) ATTR_COLD; + void main_map(address_map &map) ATTR_COLD; + void main_prot_map(address_map &map) ATTR_COLD; + void main_io_map(address_map &map) ATTR_COLD; + void sub_map(address_map &map) ATTR_COLD; + void sub_io_map(address_map &map) ATTR_COLD; void sound_map(address_map &map) ATTR_COLD; void sound_io_map(address_map &map) ATTR_COLD; }; @@ -363,7 +363,7 @@ private: Bg Y Bg X Fg Y Fg X <-Scroll High Bits (complemented!) */ -void airbustr_state::scrollregs_w(offs_t offset, uint8_t data) +void airbustr_state::scrollregs_w(offs_t offset, u8 data) { switch (offset) // offset 0 <-> port 4 { @@ -373,7 +373,7 @@ void airbustr_state::scrollregs_w(offs_t offset, uint8_t data) case 0x06: m_scrollx[((offset & 4) >> 2) ^ 1] = data; break; case 0x08: m_highbits = ~data; break; // complemented high bits - default: LOGSCROLLREGS("CPU #2 - port %02X written with %02X - PC = %04X\n", offset, data, m_slave->pc()); + default: LOGSCROLLREGS("%s: port %02X written with %02X\n", machine().describe_context(), offset, data); } for (int layer = 0; layer < 2; layer++) @@ -408,7 +408,7 @@ void airbustr_state::video_start() } -uint32_t airbustr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 airbustr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { m_tilemap[0]->draw(screen, bitmap, cliprect, 0, 0); m_tilemap[1]->draw(screen, bitmap, cliprect, 0, 0); @@ -434,36 +434,36 @@ void airbustr_state::screen_vblank(int state) // Read / Write Handlers -void airbustr_state::calc1_w(offs_t offset, uint8_t data) +void airbustr_state::calc1_w(offs_t offset, u8 data) { offset += 0xfe0; m_devram[offset] = data; // CALC1 chip is 16-bit - uint16_t data16 = m_devram[offset | 1] << 8 | m_devram[offset & ~1]; + u16 const data16 = m_devram[offset | 1] << 8 | m_devram[offset & ~1]; m_calc1->kaneko_hit_w((offset & 0x1f) / 2, data16); } -uint8_t airbustr_state::calc1_r(offs_t offset) +u8 airbustr_state::calc1_r(offs_t offset) { // CALC1 chip is 16-bit - uint16_t ret = m_calc1->kaneko_hit_r(offset / 2); + u16 const ret = m_calc1->kaneko_hit_r(offset / 2); return (offset & 1) ? (ret >> 8) : (ret & 0xff); } -void airbustr_state::master_nmi_trigger_w(uint8_t data) +void airbustr_state::main_nmi_trigger_w(u8 data) { - m_slave->pulse_input_line(INPUT_LINE_NMI, attotime::zero); + m_subcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -void airbustr_state::master_bankswitch_w(uint8_t data) +void airbustr_state::main_bankswitch_w(u8 data) { - m_masterbank->set_entry(data & 0x07); + m_mainbank->set_entry(data & 0x07); } -void airbustr_state::slave_bankswitch_w(uint8_t data) +void airbustr_state::sub_bankswitch_w(u8 data) { - m_slavebank->set_entry(data & 0x07); + m_subbank->set_entry(data & 0x07); for (int layer = 0; layer < 2; layer++) m_tilemap[layer]->set_flip(BIT(data, 4) ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0); @@ -474,12 +474,12 @@ void airbustr_state::slave_bankswitch_w(uint8_t data) m_pandora->set_clear_bitmap(BIT(data, 5)); } -void airbustr_state::sound_bankswitch_w(uint8_t data) +void airbustr_state::sound_bankswitch_w(u8 data) { m_audiobank->set_entry(data & 0x07); } -uint8_t airbustr_state::soundcommand_status_r() +u8 airbustr_state::soundcommand_status_r() { // bits: 2 <-> ? 1 <-> soundlatch full 0 <-> soundlatch2 empty return 4 | (m_soundlatch[0]->pending_r() << 1) | !m_soundlatch[1]->pending_r(); @@ -487,58 +487,58 @@ uint8_t airbustr_state::soundcommand_status_r() template -void airbustr_state::videoram_w(offs_t offset, uint8_t data) +void airbustr_state::videoram_w(offs_t offset, u8 data) { m_videoram[Layer][offset] = data; m_tilemap[Layer]->mark_tile_dirty(offset); } template -void airbustr_state::colorram_w(offs_t offset, uint8_t data) +void airbustr_state::colorram_w(offs_t offset, u8 data) { m_colorram[Layer][offset] = data; m_tilemap[Layer]->mark_tile_dirty(offset); } -void airbustr_state::coin_counter_w(uint8_t data) +void airbustr_state::coin_counter_w(u8 data) { - machine().bookkeeping().coin_counter_w(0, data & 1); - machine().bookkeeping().coin_counter_w(1, data & 2); - machine().bookkeeping().coin_lockout_w(0, ~data & 4); - machine().bookkeeping().coin_lockout_w(1, ~data & 8); + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); + machine().bookkeeping().coin_lockout_w(0, BIT(~data, 2)); + machine().bookkeeping().coin_lockout_w(1, BIT(~data, 3)); } // Memory Maps -void airbustr_state::master_map(address_map &map) +void airbustr_state::main_map(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xbfff).bankr(m_masterbank); + map(0x8000, 0xbfff).bankr(m_mainbank); map(0xc000, 0xcfff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_r), FUNC(kaneko_pandora_device::spriteram_w)); map(0xd000, 0xdfff).ram(); map(0xe000, 0xefff).ram().share(m_devram); // shared with protection device (see below) - map(0xf000, 0xffff).ram().share("master_slave"); + map(0xf000, 0xffff).ram().share("main_sub"); } -void airbustr_state::master_prot_map(address_map &map) +void airbustr_state::main_prot_map(address_map &map) { - master_map(map); + main_map(map); map(0xefe0, 0xeff5).rw(FUNC(airbustr_state::calc1_r), FUNC(airbustr_state::calc1_w)); } -void airbustr_state::master_io_map(address_map &map) +void airbustr_state::main_io_map(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(airbustr_state::master_bankswitch_w)); + map(0x00, 0x00).w(FUNC(airbustr_state::main_bankswitch_w)); map(0x01, 0x01).nopw(); // ??? - map(0x02, 0x02).w(FUNC(airbustr_state::master_nmi_trigger_w)); + map(0x02, 0x02).w(FUNC(airbustr_state::main_nmi_trigger_w)); } -void airbustr_state::slave_map(address_map &map) +void airbustr_state::sub_map(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xbfff).bankr(m_slavebank); + map(0x8000, 0xbfff).bankr(m_subbank); map(0xc000, 0xc3ff).ram().w(FUNC(airbustr_state::videoram_w<1>)).share(m_videoram[1]); map(0xc400, 0xc7ff).ram().w(FUNC(airbustr_state::colorram_w<1>)).share(m_colorram[1]); map(0xc800, 0xcbff).ram().w(FUNC(airbustr_state::videoram_w<0>)).share(m_videoram[0]); @@ -546,13 +546,13 @@ void airbustr_state::slave_map(address_map &map) map(0xd000, 0xd5ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); map(0xd600, 0xdfff).ram(); map(0xe000, 0xefff).ram(); - map(0xf000, 0xffff).ram().share("master_slave"); + map(0xf000, 0xffff).ram().share("main_sub"); } -void airbustr_state::slave_io_map(address_map &map) +void airbustr_state::sub_io_map(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(airbustr_state::slave_bankswitch_w)); + map(0x00, 0x00).w(FUNC(airbustr_state::sub_bankswitch_w)); map(0x02, 0x02).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); map(0x04, 0x0c).w(FUNC(airbustr_state::scrollregs_w)); map(0x0e, 0x0e).r(FUNC(airbustr_state::soundcommand_status_r)); @@ -696,18 +696,18 @@ GFXDECODE_END // Main Z80 uses IM2 TIMER_DEVICE_CALLBACK_MEMBER(airbustr_state::scanline) { - int scanline = param; + int const scanline = param; if (scanline == 240) // vblank-out irq - m_master->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 // Pandora "sprite end dma" irq? TODO: timing is likely off if (scanline == 64) - m_master->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 } // Sub Z80 uses IM2 too, but 0xff irq routine just contains an irq ack in it -INTERRUPT_GEN_MEMBER(airbustr_state::slave_interrupt) +INTERRUPT_GEN_MEMBER(airbustr_state::sub_interrupt) { device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 } @@ -717,8 +717,8 @@ INTERRUPT_GEN_MEMBER(airbustr_state::slave_interrupt) void airbustr_state::machine_start() { - m_masterbank->configure_entries(0, 8, memregion("master")->base(), 0x4000); - m_slavebank->configure_entries(0, 8, memregion("slave")->base(), 0x4000); + m_mainbank->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000); + m_subbank->configure_entries(0, 8, memregion("subcpu")->base(), 0x4000); m_audiobank->configure_entries(0, 8, memregion("audiocpu")->base(), 0x4000); save_item(NAME(m_scrollx)); @@ -741,15 +741,15 @@ void airbustr_state::machine_reset() void airbustr_state::airbustrb(machine_config &config) { // basic machine hardware - Z80(config, m_master, XTAL(12'000'000) / 2); // verified on PCB - m_master->set_addrmap(AS_PROGRAM, &airbustr_state::master_map); - m_master->set_addrmap(AS_IO, &airbustr_state::master_io_map); + Z80(config, m_maincpu, XTAL(12'000'000) / 2); // verified on PCB + m_maincpu->set_addrmap(AS_PROGRAM, &airbustr_state::main_map); + m_maincpu->set_addrmap(AS_IO, &airbustr_state::main_io_map); TIMER(config, "scantimer").configure_scanline(FUNC(airbustr_state::scanline), "screen", 0, 1); - Z80(config, m_slave, XTAL(12'000'000) / 2); // verified on PCB - m_slave->set_addrmap(AS_PROGRAM, &airbustr_state::slave_map); - m_slave->set_addrmap(AS_IO, &airbustr_state::slave_io_map); - m_slave->set_vblank_int("screen", FUNC(airbustr_state::slave_interrupt)); // nmi signal from master CPU + Z80(config, m_subcpu, XTAL(12'000'000) / 2); // verified on PCB + m_subcpu->set_addrmap(AS_PROGRAM, &airbustr_state::sub_map); + m_subcpu->set_addrmap(AS_IO, &airbustr_state::sub_io_map); + m_subcpu->set_vblank_int("screen", FUNC(airbustr_state::sub_interrupt)); // nmi signal from main CPU Z80(config, m_audiocpu, XTAL(12'000'000) / 2); // verified on PCB m_audiocpu->set_addrmap(AS_PROGRAM, &airbustr_state::sound_map); @@ -797,7 +797,7 @@ void airbustr_state::airbustr(machine_config &config) { airbustrb(config); - m_master->set_addrmap(AS_PROGRAM, &airbustr_state::master_prot_map); + m_maincpu->set_addrmap(AS_PROGRAM, &airbustr_state::main_prot_map); KANEKO_HIT(config, m_calc1).set_type(0); WATCHDOG_TIMER(config, "watchdog").set_time(attotime::from_seconds(3)); // a guess, and certainly wrong @@ -807,10 +807,10 @@ void airbustr_state::airbustr(machine_config &config) // ROMs ROM_START( airbustr ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "pr12.h19", 0x00000, 0x20000, CRC(91362eb2) SHA1(cd85acfa6542af68dd1cad46f9426a95cfc9432e) ) - ROM_REGION( 0x20000, "slave", 0 ) + ROM_REGION( 0x20000, "subcpu", 0 ) ROM_LOAD( "pr13.l15", 0x00000, 0x20000, CRC(13b2257b) SHA1(325efa54e757a1f08caf81801930d61ea4e7b6d4) ) ROM_REGION( 0x20000, "audiocpu", 0 ) @@ -819,7 +819,7 @@ ROM_START( airbustr ) ROM_REGION( 0x80000, "tiles", 0 ) ROM_LOAD( "pr-000.bin", 0x00000, 0x80000, CRC(8ca68f0d) SHA1(d60389e7e63e9850bcddecb486558de1414f1276) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "sprites", ROMREGION_ERASE00 ) ROM_LOAD( "pr-001.bin", 0x00000, 0x80000, CRC(7e6cb377) SHA1(005290f9f53a0c3a6a9d04486b16b7fd52cc94b6) ) ROM_LOAD( "pr-02.bin", 0x80000, 0x10000, CRC(6bbd5e46) SHA1(26563737f3f91ee0a056d35ce42217bb57d8a081) ) @@ -829,14 +829,13 @@ ROM_START( airbustr ) ROM_REGION( 0x400, "plds", ROMREGION_ERASE00 ) ROM_LOAD( "pal16l8-pr-500.16f", 0x000, 0x104, CRC(e0f901e1) SHA1(f436f5357408ad7056c950018c0e94681b34fd11) ) ROM_LOAD( "gal16v8a-pr-501.13j", 0x200, 0x117, CRC(d8bf8cb5) SHA1(2ccd4b35f97a4fdaf13f3eccb741a0ff54fc7115) ) - ROM_END ROM_START( airbustrj ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "pr-14j.bin", 0x00000, 0x20000, CRC(6b9805bd) SHA1(db6df33cf17316a4b81d7731dca9fe8bbf81f014) ) - ROM_REGION( 0x20000, "slave", 0 ) + ROM_REGION( 0x20000, "subcpu", 0 ) ROM_LOAD( "pr-11j.bin", 0x00000, 0x20000, CRC(85464124) SHA1(8cce8dfdede48032c40d5f155fd58061866668de) ) ROM_REGION( 0x20000, "audiocpu", 0 ) @@ -845,7 +844,7 @@ ROM_START( airbustrj ) ROM_REGION( 0x80000, "tiles", 0 ) ROM_LOAD( "pr-000.bin", 0x00000, 0x80000, CRC(8ca68f0d) SHA1(d60389e7e63e9850bcddecb486558de1414f1276) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "sprites", ROMREGION_ERASE00 ) ROM_LOAD( "pr-001.bin", 0x000000, 0x80000, CRC(7e6cb377) SHA1(005290f9f53a0c3a6a9d04486b16b7fd52cc94b6) ) ROM_LOAD( "pr-02.bin", 0x080000, 0x10000, CRC(6bbd5e46) SHA1(26563737f3f91ee0a056d35ce42217bb57d8a081) ) @@ -871,24 +870,24 @@ ROM 5 is on a piggyback daughterboard with a z80 and a PAL */ ROM_START( airbustrb ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "5.bin", 0x00000, 0x20000, CRC(9e4216a2) SHA1(46572da4df5a67b10cc3ee21bdc0ec4bcecaaf93) ) - ROM_REGION( 0x20000, "slave", 0 ) + ROM_REGION( 0x20000, "subcpu", 0 ) ROM_LOAD( "1.bin", 0x00000, 0x20000, CRC(85464124) SHA1(8cce8dfdede48032c40d5f155fd58061866668de) ) ROM_REGION( 0x20000, "audiocpu", 0 ) ROM_LOAD( "2.bin", 0x00000, 0x20000, CRC(6e0a5df0) SHA1(616b7c7aaf52a9a55b63c60717c1866940635cd4) ) ROM_REGION( 0x80000, "tiles", 0 ) - // Same content as airbusj, pr-001.bin, different sized ROMs / interleave + // Same content as airbustrj, pr-001.bin, different sized ROMs / interleave ROM_LOAD16_BYTE( "7.bin", 0x00000, 0x20000, CRC(2e3bf0a2) SHA1(84cabc753e5fd1164f0a8a9a9dee7d339a5607c5) ) ROM_LOAD16_BYTE( "9.bin", 0x00001, 0x20000, CRC(2c23c646) SHA1(41c0f8788c9715918b4138f076415f8640adc483) ) ROM_LOAD16_BYTE( "6.bin", 0x40000, 0x20000, CRC(0d6cd470) SHA1(329286bc6c9d1eccc74735d1c155a0f5f98f1444) ) ROM_LOAD16_BYTE( "8.bin", 0x40001, 0x20000, CRC(b3372e51) SHA1(aa8dcbb84c829994ae04ceecbef795ac53e72493) ) - ROM_REGION( 0x100000, "sprites", 0 ) - // Same content as airbusj, pr-001.bin, different sized ROMs + ROM_REGION( 0x100000, "sprites", ROMREGION_ERASE00 ) + // Same content as airbustrj, pr-001.bin, different sized ROMs ROM_LOAD( "13.bin", 0x00000, 0x20000, CRC(75dee86d) SHA1(fe342fed5bb84ee6f35d3f91987141c559e94d5a) ) ROM_LOAD( "12.bin", 0x20000, 0x20000, CRC(c98a8333) SHA1(3a990460e232ee07a9297fcffdb02451406f5bf1) ) ROM_LOAD( "11.bin", 0x40000, 0x20000, CRC(4e9baebd) SHA1(6cf878a3fb3d344e3f5f4d031fbde6f14b653636) ) @@ -897,7 +896,7 @@ ROM_START( airbustrb ) ROM_LOAD( "14.bin", 0x80000, 0x10000, CRC(6bbd5e46) SHA1(26563737f3f91ee0a056d35ce42217bb57d8a081) ) ROM_REGION( 0x40000, "oki", 0 ) - // Same content as airbusj, pr-200.bin, different sized ROMs + // Same content as airbustrj, pr-200.bin, different sized ROMs ROM_LOAD( "4.bin", 0x00000, 0x20000, CRC(21d9bfe3) SHA1(4a69458cd2a6309e389c9e7593ae29d3ef0f8daf) ) ROM_LOAD( "3.bin", 0x20000, 0x20000, CRC(58cd19e2) SHA1(479f22241bf29f7af67d9679fc6c20f10004fdd8) ) ROM_END diff --git a/src/mame/kaneko/djboy.cpp b/src/mame/kaneko/djboy.cpp index 9cb4a52eebb..d149c4f18cd 100644 --- a/src/mame/kaneko/djboy.cpp +++ b/src/mame/kaneko/djboy.cpp @@ -163,19 +163,19 @@ class djboy_state : public driver_device public: djboy_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) - , m_mastercpu(*this, "mastercpu") - , m_slavecpu(*this, "slavecpu") + , m_maincpu(*this, "maincpu") + , m_subcpu(*this, "subcpu") , m_soundcpu(*this, "soundcpu") , m_beast(*this, "beast") , m_pandora(*this, "pandora") , m_gfxdecode(*this, "gfxdecode") , m_palette(*this, "palette") , m_soundlatch(*this, "soundlatch") - , m_slavelatch(*this, "slavelatch") + , m_sublatch(*this, "sublatch") , m_beastlatch(*this, "beastlatch") , m_videoram(*this, "videoram") - , m_masterbank(*this, "master_bank%u", 0U) - , m_slavebank(*this, "slave_bank") + , m_mainbank(*this, "main_bank%u", 0U) + , m_subbank(*this, "sub_bank") , m_soundbank(*this, "sound_bank") , m_port_in(*this, "IN%u", 0) , m_port_dsw(*this, "DSW%u", 1) @@ -195,93 +195,96 @@ protected: private: //static constexpr unsigned PROT_OUTPUT_BUFFER_SIZE = 8; - uint8_t beast_status_r(); - void trigger_nmi_on_mastercpu(uint8_t data); - void mastercpu_bankswitch_w(uint8_t data); - void slavecpu_bankswitch_w(uint8_t data); - void coin_count_w(uint8_t data); - void soundcpu_bankswitch_w(uint8_t data); - uint8_t beast_p0_r(); - void beast_p0_w(uint8_t data); - uint8_t beast_p1_r(); - void beast_p1_w(uint8_t data); - uint8_t beast_p2_r(); - void beast_p2_w(uint8_t data); - uint8_t beast_p3_r(); - void beast_p3_w(uint8_t data); - void scrollx_w(uint8_t data); - void scrolly_w(uint8_t data); - void videoram_w(offs_t offset, uint8_t data); + u8 beast_status_r(); + void trigger_nmi_on_maincpu(u8 data); + void maincpu_bankswitch_w(u8 data); + void subcpu_bankswitch_w(u8 data); + void coin_count_w(u8 data); + void soundcpu_bankswitch_w(u8 data); + u8 beast_p0_r(); + void beast_p0_w(u8 data); + u8 beast_p1_r(); + void beast_p1_w(u8 data); + u8 beast_p2_r(); + void beast_p2_w(u8 data); + u8 beast_p3_r(); + void beast_p3_w(u8 data); + void scrollx_w(u8 data); + void scrolly_w(u8 data); + void videoram_w(offs_t offset, u8 data); + TILE_GET_INFO_MEMBER(get_bg_tile_info); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void screen_vblank(int state); + TIMER_DEVICE_CALLBACK_MEMBER(scanline); - void mastercpu_am(address_map &map) ATTR_COLD; - void mastercpu_port_am(address_map &map) ATTR_COLD; - void slavecpu_am(address_map &map) ATTR_COLD; - void slavecpu_port_am(address_map &map) ATTR_COLD; + + void maincpu_am(address_map &map) ATTR_COLD; + void maincpu_port_am(address_map &map) ATTR_COLD; + void subcpu_am(address_map &map) ATTR_COLD; + void subcpu_port_am(address_map &map) ATTR_COLD; void soundcpu_am(address_map &map) ATTR_COLD; void soundcpu_port_am(address_map &map) ATTR_COLD; // devices - required_device m_mastercpu; - required_device m_slavecpu; + required_device m_maincpu; + required_device m_subcpu; required_device m_soundcpu; required_device m_beast; required_device m_pandora; required_device m_gfxdecode; required_device m_palette; required_device m_soundlatch; - required_device m_slavelatch; + required_device m_sublatch; required_device m_beastlatch; // memory pointers - required_shared_ptr m_videoram; + required_shared_ptr m_videoram; // ROM banking - required_memory_bank_array<2> m_masterbank; - required_memory_bank m_slavebank; + required_memory_bank_array<2> m_mainbank; + required_memory_bank m_subbank; required_memory_bank m_soundbank; required_ioport_array<3> m_port_in; required_ioport_array<2> m_port_dsw; - uint8_t m_bankxor; + u8 m_bankxor = 0; // video-related tilemap_t *m_background = nullptr; - uint8_t m_videoreg = 0; - uint8_t m_scrollx = 0; - uint8_t m_scrolly = 0; + u8 m_videoreg = 0; + u8 m_scrollx = 0; + u8 m_scrolly = 0; // Kaneko BEAST state - uint8_t m_beast_p[4]{}; + u8 m_beast_p[4]{}; }; -void djboy_state::scrollx_w(uint8_t data) +void djboy_state::scrollx_w(u8 data) { m_scrollx = data; } -void djboy_state::scrolly_w(uint8_t data) +void djboy_state::scrolly_w(u8 data) { m_scrolly = data; } TILE_GET_INFO_MEMBER(djboy_state::get_bg_tile_info) { - uint8_t const attr = m_videoram[tile_index + 0x800]; - int code = m_videoram[tile_index] + (attr & 0xf) * 256; - int const color = attr >> 4; + u8 const attr = m_videoram[tile_index + 0x800]; + u32 code = m_videoram[tile_index] + ((attr & 0xf) << 8); + u32 const color = attr >> 4; - if (color & 8) + if (BIT(color, 3)) code |= 0x1000; tileinfo.set(0, code, color, 0); // no flip } -void djboy_state::videoram_w(offs_t offset, uint8_t data) +void djboy_state::videoram_w(offs_t offset, u8 data) { m_videoram[offset] = data; m_background->mark_tile_dirty(offset & 0x7ff); @@ -292,15 +295,8 @@ void djboy_state::video_start() m_background = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(djboy_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); } -uint32_t djboy_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 djboy_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - /** - * xx------ msb x - * --x----- msb y - * ---x---- flipscreen? - * ----xxxx ROM bank - */ - int const scrollx = m_scrollx | ((m_videoreg & 0xc0) << 2); m_background->set_scrollx(0, scrollx - 0x391); @@ -325,23 +321,23 @@ void djboy_state::screen_vblank(int state) // KANEKO BEAST state -uint8_t djboy_state::beast_status_r() +u8 djboy_state::beast_status_r() { - return (m_slavelatch->pending_r() ? 0x0 : 0x4) | (m_beastlatch->pending_r() ? 0x8 : 0x0); + return (m_sublatch->pending_r() ? 0x0 : 0x4) | (m_beastlatch->pending_r() ? 0x8 : 0x0); } /******************************************************************************/ -void djboy_state::trigger_nmi_on_mastercpu(uint8_t data) +void djboy_state::trigger_nmi_on_maincpu(u8 data) { - m_mastercpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); + m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -void djboy_state::mastercpu_bankswitch_w(uint8_t data) +void djboy_state::maincpu_bankswitch_w(u8 data) { data ^= m_bankxor; - m_masterbank[0]->set_entry(data); - m_masterbank[1]->set_entry(0); // unsure if / how this area is banked + m_mainbank[0]->set_entry(data); + m_mainbank[1]->set_entry(0); // unsure if / how this area is banked } /******************************************************************************/ @@ -352,65 +348,65 @@ void djboy_state::mastercpu_bankswitch_w(uint8_t data) * ---x---- screen flip * ----xxxx bank */ -void djboy_state::slavecpu_bankswitch_w(uint8_t data) +void djboy_state::subcpu_bankswitch_w(u8 data) { m_videoreg = data; if ((data & 0xc) != 4) - m_slavebank->set_entry((data & 0xf)); + m_subbank->set_entry((data & 0xf)); } -void djboy_state::coin_count_w(uint8_t data) +void djboy_state::coin_count_w(u8 data) { - machine().bookkeeping().coin_counter_w(0, data & 1); - machine().bookkeeping().coin_counter_w(1, data & 2); + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); } /******************************************************************************/ -void djboy_state::soundcpu_bankswitch_w(uint8_t data) +void djboy_state::soundcpu_bankswitch_w(u8 data) { m_soundbank->set_entry(data); // shall we check data<0x07? } /******************************************************************************/ -void djboy_state::mastercpu_am(address_map &map) +void djboy_state::maincpu_am(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xafff).bankr(m_masterbank[1]); + map(0x8000, 0xafff).bankr(m_mainbank[1]); map(0xb000, 0xbfff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_r), FUNC(kaneko_pandora_device::spriteram_w)); - map(0xc000, 0xdfff).bankr(m_masterbank[0]); - map(0xe000, 0xffff).ram().share("master_slave"); + map(0xc000, 0xdfff).bankr(m_mainbank[0]); + map(0xe000, 0xffff).ram().share("main_sub"); } -void djboy_state::mastercpu_port_am(address_map &map) +void djboy_state::maincpu_port_am(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(djboy_state::mastercpu_bankswitch_w)); + map(0x00, 0x00).w(FUNC(djboy_state::maincpu_bankswitch_w)); } /******************************************************************************/ -void djboy_state::slavecpu_am(address_map &map) +void djboy_state::subcpu_am(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xbfff).bankr(m_slavebank); + map(0x8000, 0xbfff).bankr(m_subbank); map(0xc000, 0xcfff).ram().w(FUNC(djboy_state::videoram_w)).share(m_videoram); map(0xd000, 0xd3ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); map(0xd400, 0xd8ff).ram(); - map(0xe000, 0xffff).ram().share("master_slave"); + map(0xe000, 0xffff).ram().share("main_sub"); } -void djboy_state::slavecpu_port_am(address_map &map) +void djboy_state::subcpu_port_am(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(djboy_state::slavecpu_bankswitch_w)); + map(0x00, 0x00).w(FUNC(djboy_state::subcpu_bankswitch_w)); map(0x02, 0x02).w(m_soundlatch, FUNC(generic_latch_8_device::write)); - map(0x04, 0x04).r(m_slavelatch, FUNC(generic_latch_8_device::read)).w(m_beastlatch, FUNC(generic_latch_8_device::write)); + map(0x04, 0x04).r(m_sublatch, FUNC(generic_latch_8_device::read)).w(m_beastlatch, FUNC(generic_latch_8_device::write)); map(0x06, 0x06).w(FUNC(djboy_state::scrolly_w)); map(0x08, 0x08).w(FUNC(djboy_state::scrollx_w)); - map(0x0a, 0x0a).w(FUNC(djboy_state::trigger_nmi_on_mastercpu)); + map(0x0a, 0x0a).w(FUNC(djboy_state::trigger_nmi_on_maincpu)); map(0x0c, 0x0c).r(FUNC(djboy_state::beast_status_r)); map(0x0e, 0x0e).w(FUNC(djboy_state::coin_count_w)); } @@ -436,17 +432,17 @@ void djboy_state::soundcpu_port_am(address_map &map) /******************************************************************************/ -uint8_t djboy_state::beast_p0_r() +u8 djboy_state::beast_p0_r() { // ? return 0; } -void djboy_state::beast_p0_w(uint8_t data) +void djboy_state::beast_p0_w(u8 data) { if (!BIT(m_beast_p[0], 1) && BIT(data, 1)) { - m_slavelatch->write(m_beast_p[1]); + m_sublatch->write(m_beast_p[1]); } if (BIT(~data, 0)) @@ -455,7 +451,7 @@ void djboy_state::beast_p0_w(uint8_t data) m_beast_p[0] = data; } -uint8_t djboy_state::beast_p1_r() +u8 djboy_state::beast_p1_r() { if (BIT(~m_beast_p[0], 0)) return m_beastlatch->read(); @@ -463,12 +459,12 @@ uint8_t djboy_state::beast_p1_r() return 0; // ? } -void djboy_state::beast_p1_w(uint8_t data) +void djboy_state::beast_p1_w(u8 data) { m_beast_p[1] = data; } -uint8_t djboy_state::beast_p2_r() +u8 djboy_state::beast_p2_r() { switch ((m_beast_p[0] >> 2) & 3) { @@ -479,16 +475,16 @@ uint8_t djboy_state::beast_p2_r() } } -void djboy_state::beast_p2_w(uint8_t data) +void djboy_state::beast_p2_w(u8 data) { m_beast_p[2] = data; } -uint8_t djboy_state::beast_p3_r() +u8 djboy_state::beast_p3_r() { - uint8_t dsw = 0; - uint8_t const dsw1 = ~m_port_dsw[0]->read(); - uint8_t const dsw2 = ~m_port_dsw[1]->read(); + u8 dsw = 0; + u8 const dsw1 = ~m_port_dsw[0]->read(); + u8 const dsw2 = ~m_port_dsw[1]->read(); switch ((m_beast_p[0] >> 5) & 3) { @@ -497,13 +493,13 @@ uint8_t djboy_state::beast_p3_r() case 2: dsw = (BIT(dsw2, 6) << 3) | (BIT(dsw2, 2) << 2) | (BIT(dsw1, 6) << 1) | BIT(dsw1, 2); break; case 3: dsw = (BIT(dsw2, 7) << 3) | (BIT(dsw2, 3) << 2) | (BIT(dsw1, 7) << 1) | BIT(dsw1, 3); break; } - return (dsw << 4) | (m_beastlatch->pending_r() ? 0x0 : 0x4) | (m_slavelatch->pending_r() ? 0x8 : 0x0); + return (dsw << 4) | (m_beastlatch->pending_r() ? 0x0 : 0x4) | (m_sublatch->pending_r() ? 0x8 : 0x0); } -void djboy_state::beast_p3_w(uint8_t data) +void djboy_state::beast_p3_w(u8 data) { m_beast_p[3] = data; - m_slavecpu->set_input_line(INPUT_LINE_RESET, BIT(data, 1) ? CLEAR_LINE : ASSERT_LINE); + m_subcpu->set_input_line(INPUT_LINE_RESET, BIT(data, 1) ? CLEAR_LINE : ASSERT_LINE); } // Program / data maps are defined in the 8051 core @@ -603,27 +599,27 @@ GFXDECODE_END // Main Z80 uses IM2 TIMER_DEVICE_CALLBACK_MEMBER(djboy_state::scanline) { - int scanline = param; + int const scanline = param; if (scanline == 240) // vblank-out irq - m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 // Pandora "sprite end dma" irq? TODO: timing is clearly off, attract mode relies on this if (scanline == 64) - m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 } void djboy_state::machine_start() { - uint8_t *master = memregion("mastercpu")->base(); - uint8_t *slave = memregion("slavecpu")->base(); - uint8_t *sound = memregion("soundcpu")->base(); + u8 *main = memregion("maincpu")->base(); + u8 *sub = memregion("subcpu")->base(); + u8 *sound = memregion("soundcpu")->base(); - m_masterbank[0]->configure_entries(0, 32, &master[0x00000], 0x2000); - m_slavebank->configure_entries(0, 4, &slave[0x00000], 0x4000); - m_slavebank->configure_entries(8, 8, &slave[0x10000], 0x4000); + m_mainbank[0]->configure_entries(0, 32, &main[0x00000], 0x2000); + m_subbank->configure_entries(0, 4, &sub[0x00000], 0x4000); // TODO: Mirrored? + m_subbank->configure_entries(8, 8, &sub[0x10000], 0x4000); m_soundbank->configure_entries(0, 8, &sound[0x00000], 0x4000); - m_masterbank[1]->configure_entry(0, &master[0x08000]); // unsure if / how this area is banked + m_mainbank[1]->configure_entry(0, &main[0x08000]); // unsure if / how this area is banked save_item(NAME(m_videoreg)); save_item(NAME(m_scrollx)); @@ -642,15 +638,15 @@ void djboy_state::machine_reset() void djboy_state::djboy(machine_config &config) { - Z80(config, m_mastercpu, 12_MHz_XTAL / 2); // 6.000MHz, verified - m_mastercpu->set_addrmap(AS_PROGRAM, &djboy_state::mastercpu_am); - m_mastercpu->set_addrmap(AS_IO, &djboy_state::mastercpu_port_am); + Z80(config, m_maincpu, 12_MHz_XTAL / 2); // 6.000MHz, verified + m_maincpu->set_addrmap(AS_PROGRAM, &djboy_state::maincpu_am); + m_maincpu->set_addrmap(AS_IO, &djboy_state::maincpu_port_am); TIMER(config, "scantimer").configure_scanline(FUNC(djboy_state::scanline), "screen", 0, 1); - Z80(config, m_slavecpu, 12_MHz_XTAL / 2); // 6.000MHz, verified - m_slavecpu->set_addrmap(AS_PROGRAM, &djboy_state::slavecpu_am); - m_slavecpu->set_addrmap(AS_IO, &djboy_state::slavecpu_port_am); - m_slavecpu->set_vblank_int("screen", FUNC(djboy_state::irq0_line_hold)); + Z80(config, m_subcpu, 12_MHz_XTAL / 2); // 6.000MHz, verified + m_subcpu->set_addrmap(AS_PROGRAM, &djboy_state::subcpu_am); + m_subcpu->set_addrmap(AS_IO, &djboy_state::subcpu_port_am); + m_subcpu->set_vblank_int("screen", FUNC(djboy_state::irq0_line_hold)); Z80(config, m_soundcpu, 12_MHz_XTAL / 2); // 6.000MHz, verified m_soundcpu->set_addrmap(AS_PROGRAM, &djboy_state::soundcpu_am); @@ -668,7 +664,7 @@ void djboy_state::djboy(machine_config &config) config.set_maximum_quantum(attotime::from_hz(6000)); - GENERIC_LATCH_8(config, m_slavelatch); + GENERIC_LATCH_8(config, m_sublatch); GENERIC_LATCH_8(config, m_beastlatch); m_beastlatch->data_pending_callback().set_inputline(m_beast, INPUT_LINE_IRQ0); @@ -710,11 +706,11 @@ void djboy_state::djboy(machine_config &config) ROM_START( djboy ) - ROM_REGION( 0x40000, "mastercpu", 0 ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "djboy.4b", 0x00000, 0x20000, CRC(354531ec) SHA1(4722376601ca2d8fb79622fef35ab5b5b084555d) ) // verified on 2 PCBs, neither PCB had a label on the ROM ROM_LOAD( "bs100.4d", 0x20000, 0x20000, CRC(081e8af8) SHA1(3589dab1cf31b109a40370b4db1f31785023e2ed) ) - ROM_REGION( 0x30000, "slavecpu", 0 ) + ROM_REGION( 0x30000, "subcpu", 0 ) ROM_LOAD( "djboy.5y", 0x00000, 0x10000, CRC(91eb189a) SHA1(a6a2662369cd6c851ae45a49654f6150fa8cf42e) ) // mask ROM without label ROM_LOAD( "bs101.6w", 0x10000, 0x20000, CRC(a7c85577) SHA1(8296b96d5f69f6c730b7ed77fa8c93496b33529c) ) @@ -740,11 +736,11 @@ ROM_START( djboy ) ROM_END ROM_START( djboyu ) - ROM_REGION( 0x40000, "mastercpu", 0 ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "bs64.4b", 0x00000, 0x20000, CRC(b77aacc7) SHA1(78100d4695738a702f13807526eb1bcac759cce3) ) ROM_LOAD( "bs100.4d", 0x20000, 0x20000, CRC(081e8af8) SHA1(3589dab1cf31b109a40370b4db1f31785023e2ed) ) - ROM_REGION( 0x30000, "slavecpu", 0 ) + ROM_REGION( 0x30000, "subcpu", 0 ) ROM_LOAD( "bs65.5y", 0x00000, 0x10000, CRC(0f1456eb) SHA1(62ed48c0d71c1fabbb3f6ada60381f57f692cef8) ) ROM_LOAD( "bs101.6w", 0x10000, 0x20000, CRC(a7c85577) SHA1(8296b96d5f69f6c730b7ed77fa8c93496b33529c) ) @@ -770,11 +766,11 @@ ROM_START( djboyu ) ROM_END ROM_START( djboyua ) - ROM_REGION( 0x40000, "mastercpu", 0 ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "bs19s.4b", 0x00000, 0x20000, CRC(17ce9f6c) SHA1(a0c1832b05dc46991e8949067ca0278f5498835f) ) // found labeled as both BS19 and BS19S, same data - verified ROM_LOAD( "bs100.4d", 0x20000, 0x20000, CRC(081e8af8) SHA1(3589dab1cf31b109a40370b4db1f31785023e2ed) ) - ROM_REGION( 0x30000, "slavecpu", 0 ) + ROM_REGION( 0x30000, "subcpu", 0 ) ROM_LOAD( "bs15s.5y", 0x00000, 0x10000, CRC(e6f966b2) SHA1(f9df16035a8b09d87eb70315b216892e25d99b03) ) // found labeled as both BS15 and BS15S, same data - verified ROM_LOAD( "bs101.6w", 0x10000, 0x20000, CRC(a7c85577) SHA1(8296b96d5f69f6c730b7ed77fa8c93496b33529c) ) @@ -800,11 +796,11 @@ ROM_START( djboyua ) ROM_END ROM_START( djboyj ) - ROM_REGION( 0x40000, "mastercpu", 0 ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "bs12.4b", 0x00000, 0x20000, CRC(0971523e) SHA1(f90cd02cedf8632f4b651de7ea75dc8c0e682f6e) ) ROM_LOAD( "bs100.4d", 0x20000, 0x20000, CRC(081e8af8) SHA1(3589dab1cf31b109a40370b4db1f31785023e2ed) ) - ROM_REGION( 0x30000, "slavecpu", 0 ) + ROM_REGION( 0x30000, "subcpu", 0 ) ROM_LOAD( "bs13.5y", 0x00000, 0x10000, CRC(5c3f2f96) SHA1(bb7ee028a2d8d3c76a78a29fba60bcc36e9399f5) ) ROM_LOAD( "bs101.6w", 0x10000, 0x20000, CRC(a7c85577) SHA1(8296b96d5f69f6c730b7ed77fa8c93496b33529c) ) @@ -830,11 +826,11 @@ ROM_START( djboyj ) ROM_END ROM_START( djboyja ) - ROM_REGION( 0x40000, "mastercpu", 0 ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD( "djboyja.4b", 0x00000, 0x20000, CRC(f7ac20ca) SHA1(1bf66bfaa6d98f4cff50bc4d15cebfb7f4b09ae5) ) // mask ROM without label ROM_LOAD( "bs100.4d", 0x20000, 0x20000, CRC(081e8af8) SHA1(3589dab1cf31b109a40370b4db1f31785023e2ed) ) - ROM_REGION( 0x30000, "slavecpu", 0 ) + ROM_REGION( 0x30000, "subcpu", 0 ) ROM_LOAD( "bs13.5y", 0x00000, 0x10000, CRC(5c3f2f96) SHA1(bb7ee028a2d8d3c76a78a29fba60bcc36e9399f5) ) ROM_LOAD( "bs101.6w", 0x10000, 0x20000, CRC(a7c85577) SHA1(8296b96d5f69f6c730b7ed77fa8c93496b33529c) ) diff --git a/src/mame/kaneko/galpanic.cpp b/src/mame/kaneko/galpanic.cpp index 1090fbcba68..8c7a7148a0a 100644 --- a/src/mame/kaneko/galpanic.cpp +++ b/src/mame/kaneko/galpanic.cpp @@ -110,19 +110,19 @@ private: required_device m_palette; required_device m_pandora; - required_shared_ptr m_bgvideoram; - required_shared_ptr m_fgvideoram; + required_shared_ptr m_bgvideoram; + required_shared_ptr m_fgvideoram; required_memory_bank m_okibank; bitmap_ind16 m_bitmap; - void m6295_bankswitch_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void coin_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void bgvideoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void m6295_bankswitch_w(offs_t offset, u16 data, u16 mem_mask = ~0); + void coin_w(offs_t offset, u16 data, u16 mem_mask = ~0); + void bgvideoram_w(offs_t offset, u16 data, u16 mem_mask = ~0); void palette(palette_device &palette) const; - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void screen_vblank(int state); TIMER_DEVICE_CALLBACK_MEMBER(scanline); void draw_fgbitmap(bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -149,29 +149,32 @@ void galpanic_state::palette(palette_device &palette) const palette.set_pen_color(i + 1024, pal5bit(i >> 5), pal5bit(i >> 10), pal5bit(i >> 0)); } -void galpanic_state::bgvideoram_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void galpanic_state::bgvideoram_w(offs_t offset, u16 data, u16 mem_mask) { data = COMBINE_DATA(&m_bgvideoram[offset]); - int sy = offset / 256; - int sx = offset % 256; + int const sy = offset >> 8; + int const sx = offset & 0xff; m_bitmap.pix(sy, sx) = 1024 + (data >> 1); } void galpanic_state::draw_fgbitmap(bitmap_ind16 &bitmap, const rectangle &cliprect) { - for (int offs = 0; offs < m_fgvideoram.bytes() / 2; offs++) + for (int sy = cliprect.min_y; sy <= cliprect.max_y; sy++) { - int const sx = offs % 256; - int const sy = offs / 256; - int const color = m_fgvideoram[offs]; - if (color) - bitmap.pix(sy, sx) = color; + u16 const *const src = &m_fgvideoram[(sy << 8) & 0xff00]; + u16 *const dst = &bitmap.pix(sy); + for (int sx = cliprect.min_x; sx <= cliprect.max_x; sx++) + { + u16 const color = src[sx & 0xff]; + if (color) + dst[sx] = color; + } } } -uint32_t galpanic_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 galpanic_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { // copy the temporary bitmap to the screen copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect); @@ -183,12 +186,6 @@ uint32_t galpanic_state::screen_update(screen_device &screen, bitmap_ind16 &bitm return 0; } - -void galpanic_state::machine_start() -{ - m_okibank->configure_entries(0, 16, memregion("oki")->base(), 0x10000); -} - void galpanic_state::screen_vblank(int state) { // rising edge @@ -198,48 +195,50 @@ void galpanic_state::screen_vblank(int state) } } +void galpanic_state::machine_start() +{ + m_okibank->configure_entries(0, 16, memregion("oki")->base(), 0x10000); +} + + TIMER_DEVICE_CALLBACK_MEMBER(galpanic_state::scanline) { - int scanline = param; + int const scanline = param; - if(scanline == 224) // vblank-out irq + if (scanline == 224) // vblank-out irq m_maincpu->set_input_line(3, HOLD_LINE); // Pandora "sprite end dma" irq? - if(scanline == 32) + if (scanline == 32) m_maincpu->set_input_line(5, HOLD_LINE); } - - -void galpanic_state::m6295_bankswitch_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void galpanic_state::m6295_bankswitch_w(offs_t offset, u16 data, u16 mem_mask) { if (ACCESSING_BITS_8_15) { m_okibank->set_entry((data >> 8) & 0x0f); // used before title screen - m_pandora->set_clear_bitmap((data & 0x8000) >> 15); + m_pandora->set_clear_bitmap(BIT(data, 15)); } } - -void galpanic_state::coin_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void galpanic_state::coin_w(offs_t offset, u16 data, u16 mem_mask) { if (ACCESSING_BITS_8_15) { - machine().bookkeeping().coin_counter_w(0, data & 0x100); - machine().bookkeeping().coin_counter_w(1, data & 0x200); + machine().bookkeeping().coin_counter_w(0, BIT(data, 8)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 9)); - machine().bookkeeping().coin_lockout_w(0, ~data & 0x400); - machine().bookkeeping().coin_lockout_w(1, ~data & 0x800); + machine().bookkeeping().coin_lockout_w(0, BIT(~data, 10)); + machine().bookkeeping().coin_lockout_w(1, BIT(~data, 11)); } } - void galpanic_state::galpanic_map(address_map &map) { map(0x000000, 0x3fffff).rom(); @@ -247,7 +246,7 @@ void galpanic_state::galpanic_map(address_map &map) map(0x500000, 0x51ffff).ram().share(m_fgvideoram); map(0x520000, 0x53ffff).ram().w(FUNC(galpanic_state::bgvideoram_w)).share(m_bgvideoram); // + work RAM map(0x600000, 0x6007ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // 1024 colors, but only 512 seem to be used - map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_LSB_r), FUNC(kaneko_pandora_device::spriteram_LSB_w)); + map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_lsb_r), FUNC(kaneko_pandora_device::spriteram_lsb_w)); map(0x702000, 0x704fff).ram(); map(0x800000, 0x800001).portr("DSW1"); map(0x800002, 0x800003).portr("DSW2"); diff --git a/src/mame/kaneko/hvyunit.cpp b/src/mame/kaneko/hvyunit.cpp index 8b05812796e..e9e28309011 100644 --- a/src/mame/kaneko/hvyunit.cpp +++ b/src/mame/kaneko/hvyunit.cpp @@ -88,8 +88,8 @@ class hvyunit_state : public driver_device public: hvyunit_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) - , m_mastercpu(*this, "master") - , m_slavecpu(*this, "slave") + , m_maincpu(*this, "maincpu") + , m_subcpu(*this, "subcpu") , m_mermaid(*this, "mermaid") , m_soundcpu(*this, "soundcpu") , m_pandora(*this, "pandora") @@ -97,11 +97,11 @@ public: , m_palette(*this, "palette") , m_soundlatch(*this, "soundlatch") , m_mermaidlatch(*this, "mermaidlatch") - , m_slavelatch(*this, "slavelatch") + , m_sublatch(*this, "sublatch") , m_videoram(*this, "videoram") , m_colorram(*this, "colorram") - , m_masterbank(*this, "master_bank") - , m_slavebank(*this, "slave_bank") + , m_mainbank(*this, "main_bank") + , m_subbank(*this, "sub_bank") , m_soundbank(*this, "sound_bank") , m_port_in(*this, "IN%u", 0U) , m_port_dsw(*this, "DSW%u", 1U) @@ -110,45 +110,45 @@ public: void hvyunit(machine_config &config); +protected: + virtual void machine_start() override ATTR_COLD; + virtual void video_start() override ATTR_COLD; + private: - void trigger_nmi_on_slave_cpu(uint8_t data); - void master_bankswitch_w(uint8_t data); - uint8_t mermaid_status_r(); - void videoram_w(offs_t offset, uint8_t data); - void colorram_w(offs_t offset, uint8_t data); - void slave_bankswitch_w(uint8_t data); - void scrollx_w(uint8_t data); - void scrolly_w(uint8_t data); - void slave_ack_w(uint8_t data); - void sound_bankswitch_w(uint8_t data); - void mermaid_p0_w(uint8_t data); - uint8_t mermaid_p1_r(); - void mermaid_p1_w(uint8_t data); - uint8_t mermaid_p2_r(); - void mermaid_p2_w(uint8_t data); - uint8_t mermaid_p3_r(); - void mermaid_p3_w(uint8_t data); + void trigger_nmi_on_sub_cpu(u8 data); + void main_bankswitch_w(u8 data); + u8 mermaid_status_r(); + void videoram_w(offs_t offset, u8 data); + void colorram_w(offs_t offset, u8 data); + void sub_bankswitch_w(u8 data); + void scrollx_w(u8 data); + void scrolly_w(u8 data); + void sub_ack_w(u8 data); + void sound_bankswitch_w(u8 data); + void mermaid_p0_w(u8 data); + u8 mermaid_p1_r(); + void mermaid_p1_w(u8 data); + u8 mermaid_p2_r(); + void mermaid_p2_w(u8 data); + u8 mermaid_p3_r(); + void mermaid_p3_w(u8 data); TILE_GET_INFO_MEMBER(get_bg_tile_info); - virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; - virtual void video_start() override ATTR_COLD; - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void screen_vblank(int state); TIMER_DEVICE_CALLBACK_MEMBER(scanline); - void master_io(address_map &map) ATTR_COLD; - void master_memory(address_map &map) ATTR_COLD; - void slave_io(address_map &map) ATTR_COLD; - void slave_memory(address_map &map) ATTR_COLD; + void main_io(address_map &map) ATTR_COLD; + void main_memory(address_map &map) ATTR_COLD; + void sub_io(address_map &map) ATTR_COLD; + void sub_memory(address_map &map) ATTR_COLD; void sound_io(address_map &map) ATTR_COLD; void sound_memory(address_map &map) ATTR_COLD; // Devices - required_device m_mastercpu; - required_device m_slavecpu; + required_device m_maincpu; + required_device m_subcpu; required_device m_mermaid; required_device m_soundcpu; required_device m_pandora; @@ -156,14 +156,14 @@ private: required_device m_palette; required_device m_soundlatch; required_device m_mermaidlatch; - required_device m_slavelatch; + required_device m_sublatch; // Memory pointers - required_shared_ptr m_videoram; - required_shared_ptr m_colorram; + required_shared_ptr m_videoram; + required_shared_ptr m_colorram; - required_memory_bank m_masterbank; - required_memory_bank m_slavebank; + required_memory_bank m_mainbank; + required_memory_bank m_subbank; required_memory_bank m_soundbank; // Ports @@ -171,13 +171,13 @@ private: required_ioport_array<2> m_port_dsw; // Video - tilemap_t *m_bg_tilemap = nullptr; - uint16_t m_scrollx = 0; - uint16_t m_scrolly = 0; - uint16_t m_port0_data = 0; + tilemap_t *m_bg_tilemap = nullptr; + u16 m_scrollx = 0; + u16 m_scrolly = 0; + u16 m_port0_data = 0; // Mermaid - uint8_t m_mermaid_p[4]{}; + u8 m_mermaid_p[4]{}; }; @@ -190,18 +190,14 @@ private: void hvyunit_state::machine_start() { - m_masterbank->configure_entries(0, 8, memregion("master")->base(), 0x4000); - m_slavebank->configure_entries(0, 4, memregion("slave")->base(), 0x4000); + m_mainbank->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000); + m_subbank->configure_entries(0, 4, memregion("subcpu")->base(), 0x4000); m_soundbank->configure_entries(0, 4, memregion("soundcpu")->base(), 0x4000); std::fill_n(&m_mermaid_p[0], 4, 0xff); save_item(NAME(m_mermaid_p)); } -void hvyunit_state::machine_reset() -{ -} - /************************************* * @@ -211,9 +207,9 @@ void hvyunit_state::machine_reset() TILE_GET_INFO_MEMBER(hvyunit_state::get_bg_tile_info) { - uint32_t const attr = m_colorram[tile_index]; - uint32_t const code = m_videoram[tile_index] + ((attr & 0x0f) << 8); - uint32_t const color = (attr >> 4); + u32 const attr = m_colorram[tile_index]; + u32 const code = m_videoram[tile_index] + ((attr & 0x0f) << 8); + u32 const color = (attr >> 4); tileinfo.set(0, code, color, 0); } @@ -227,7 +223,7 @@ void hvyunit_state::video_start() save_item(NAME(m_port0_data)); } -uint32_t hvyunit_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 hvyunit_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { constexpr int SX_POS = 96; constexpr int SY_POS = 0; @@ -253,63 +249,63 @@ void hvyunit_state::screen_vblank(int state) /************************************* * - * Master CPU handlers + * Main CPU handlers * *************************************/ -void hvyunit_state::trigger_nmi_on_slave_cpu(uint8_t data) +void hvyunit_state::trigger_nmi_on_sub_cpu(u8 data) { - m_slavecpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); + m_subcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); } -void hvyunit_state::master_bankswitch_w(uint8_t data) +void hvyunit_state::main_bankswitch_w(u8 data) { - m_masterbank->set_entry(data & 7); + m_mainbank->set_entry(data & 7); } -uint8_t hvyunit_state::mermaid_status_r() +u8 hvyunit_state::mermaid_status_r() { - return (!m_slavelatch->pending_r() << 2) | (m_mermaidlatch->pending_r() << 3); + return (!m_sublatch->pending_r() << 2) | (m_mermaidlatch->pending_r() << 3); } /************************************* * - * Slave CPU handlers + * Sub CPU handlers * *************************************/ -void hvyunit_state::videoram_w(offs_t offset, uint8_t data) +void hvyunit_state::videoram_w(offs_t offset, u8 data) { m_videoram[offset] = data; m_bg_tilemap->mark_tile_dirty(offset); } -void hvyunit_state::colorram_w(offs_t offset, uint8_t data) +void hvyunit_state::colorram_w(offs_t offset, u8 data) { m_colorram[offset] = data; m_bg_tilemap->mark_tile_dirty(offset); } -void hvyunit_state::slave_bankswitch_w(uint8_t data) +void hvyunit_state::sub_bankswitch_w(u8 data) { m_port0_data = data; - m_slavebank->set_entry(data & 3); + m_subbank->set_entry(data & 3); } -void hvyunit_state::scrollx_w(uint8_t data) +void hvyunit_state::scrollx_w(u8 data) { m_scrollx = data; } -void hvyunit_state::scrolly_w(uint8_t data) +void hvyunit_state::scrolly_w(u8 data) { m_scrolly = data; } -void hvyunit_state::slave_ack_w(uint8_t data) +void hvyunit_state::sub_ack_w(u8 data) { - m_slavecpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); + m_subcpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); } @@ -319,7 +315,7 @@ void hvyunit_state::slave_ack_w(uint8_t data) * *************************************/ -void hvyunit_state::sound_bankswitch_w(uint8_t data) +void hvyunit_state::sound_bankswitch_w(u8 data) { m_soundbank->set_entry(data & 3); } @@ -331,10 +327,10 @@ void hvyunit_state::sound_bankswitch_w(uint8_t data) * *************************************/ -void hvyunit_state::mermaid_p0_w(uint8_t data) +void hvyunit_state::mermaid_p0_w(u8 data) { if (!BIT(m_mermaid_p[0], 1) && BIT(data, 1)) - m_slavelatch->write(m_mermaid_p[1]); + m_sublatch->write(m_mermaid_p[1]); if (BIT(data, 0) == 0) m_mermaid_p[1] = m_mermaidlatch->read(); @@ -350,17 +346,17 @@ void hvyunit_state::mermaid_p0_w(uint8_t data) m_mermaid_p[0] = data; } -uint8_t hvyunit_state::mermaid_p1_r() +u8 hvyunit_state::mermaid_p1_r() { return m_mermaid_p[1]; } -void hvyunit_state::mermaid_p1_w(uint8_t data) +void hvyunit_state::mermaid_p1_w(u8 data) { m_mermaid_p[1] = data; } -uint8_t hvyunit_state::mermaid_p2_r() +u8 hvyunit_state::mermaid_p2_r() { switch ((m_mermaid_p[0] >> 2) & 3) { @@ -371,16 +367,16 @@ uint8_t hvyunit_state::mermaid_p2_r() } } -void hvyunit_state::mermaid_p2_w(uint8_t data) +void hvyunit_state::mermaid_p2_w(u8 data) { m_mermaid_p[2] = data; } -uint8_t hvyunit_state::mermaid_p3_r() +u8 hvyunit_state::mermaid_p3_r() { - uint8_t dsw = 0; - uint8_t const dsw1 = m_port_dsw[0]->read(); - uint8_t const dsw2 = m_port_dsw[1]->read(); + u8 dsw = 0; + u8 const dsw1 = m_port_dsw[0]->read(); + u8 const dsw2 = m_port_dsw[1]->read(); switch ((m_mermaid_p[0] >> 5) & 3) { @@ -390,13 +386,13 @@ uint8_t hvyunit_state::mermaid_p3_r() case 3: dsw = (BIT(dsw2, 7) << 3) | (BIT(dsw2, 3) << 2) | (BIT(dsw1, 7) << 1) | BIT(dsw1, 3); break; } - return (dsw << 4) | (m_slavelatch->pending_r() << 3) | (!m_mermaidlatch->pending_r() << 2); + return (dsw << 4) | (m_sublatch->pending_r() << 3) | (!m_mermaidlatch->pending_r() << 2); } -void hvyunit_state::mermaid_p3_w(uint8_t data) +void hvyunit_state::mermaid_p3_w(u8 data) { m_mermaid_p[3] = data; - m_slavecpu->set_input_line(INPUT_LINE_RESET, BIT(data, 1) ? CLEAR_LINE : ASSERT_LINE); + m_subcpu->set_input_line(INPUT_LINE_RESET, BIT(data, 1) ? CLEAR_LINE : ASSERT_LINE); } @@ -406,28 +402,28 @@ void hvyunit_state::mermaid_p3_w(uint8_t data) * *************************************/ -void hvyunit_state::master_memory(address_map &map) +void hvyunit_state::main_memory(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xbfff).bankr(m_masterbank); + map(0x8000, 0xbfff).bankr(m_mainbank); map(0xc000, 0xcfff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_r), FUNC(kaneko_pandora_device::spriteram_w)); map(0xd000, 0xdfff).ram(); map(0xe000, 0xffff).ram().share("sharedram"); } -void hvyunit_state::master_io(address_map &map) +void hvyunit_state::main_io(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(hvyunit_state::master_bankswitch_w)); - map(0x01, 0x01).w(FUNC(hvyunit_state::master_bankswitch_w)); // correct? - map(0x02, 0x02).w(FUNC(hvyunit_state::trigger_nmi_on_slave_cpu)); + map(0x00, 0x00).w(FUNC(hvyunit_state::main_bankswitch_w)); + map(0x01, 0x01).w(FUNC(hvyunit_state::main_bankswitch_w)); // correct? + map(0x02, 0x02).w(FUNC(hvyunit_state::trigger_nmi_on_sub_cpu)); } -void hvyunit_state::slave_memory(address_map &map) +void hvyunit_state::sub_memory(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xbfff).bankr(m_slavebank); + map(0x8000, 0xbfff).bankr(m_subbank); map(0xc000, 0xc3ff).ram().w(FUNC(hvyunit_state::videoram_w)).share(m_videoram); map(0xc400, 0xc7ff).ram().w(FUNC(hvyunit_state::colorram_w)).share(m_colorram); map(0xd000, 0xd1ff).ram().w(m_palette, FUNC(palette_device::write8_ext)).share("palette_ext"); @@ -437,20 +433,19 @@ void hvyunit_state::slave_memory(address_map &map) map(0xe000, 0xffff).ram().share("sharedram"); } -void hvyunit_state::slave_io(address_map &map) +void hvyunit_state::sub_io(address_map &map) { map.global_mask(0xff); - map(0x00, 0x00).w(FUNC(hvyunit_state::slave_bankswitch_w)); + map(0x00, 0x00).w(FUNC(hvyunit_state::sub_bankswitch_w)); map(0x02, 0x02).w(m_soundlatch, FUNC(generic_latch_8_device::write)); - map(0x04, 0x04).r(m_slavelatch, FUNC(generic_latch_8_device::read)); - map(0x04, 0x04).w(m_mermaidlatch, FUNC(generic_latch_8_device::write)); + map(0x04, 0x04).r(m_sublatch, FUNC(generic_latch_8_device::read)).w(m_mermaidlatch, FUNC(generic_latch_8_device::write)); map(0x06, 0x06).w(FUNC(hvyunit_state::scrolly_w)); map(0x08, 0x08).w(FUNC(hvyunit_state::scrollx_w)); map(0x0c, 0x0c).r(FUNC(hvyunit_state::mermaid_status_r)); - map(0x0e, 0x0e).w(FUNC(hvyunit_state::slave_ack_w)); + map(0x0e, 0x0e).w(FUNC(hvyunit_state::sub_ack_w)); -// map(0x22, 0x22).r(FUNC(hvyunit_state::hu_scrolly_hi_reset)); //22/a2 taken from ram $f065 -// map(0xa2, 0xa2).r(FUNC(hvyunit_state::hu_scrolly_hi_set)); +// map(0x22, 0x22).r(FUNC(hvyunit_state::scrolly_hi_reset)); //22/a2 taken from ram $f065 +// map(0xa2, 0xa2).r(FUNC(hvyunit_state::scrolly_hi_set)); } @@ -604,14 +599,14 @@ GFXDECODE_END // Main Z80 uses IM2 TIMER_DEVICE_CALLBACK_MEMBER(hvyunit_state::scanline) { - int scanline = param; + int const scanline = param; - if(scanline == 240) // vblank-out irq - m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 + if (scanline == 240) // vblank-out irq + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80 // Pandora "sprite end dma" irq? TODO: timing is likely off - if(scanline == 64) - m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 + if (scanline == 64) + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 } /************************************* @@ -622,15 +617,15 @@ TIMER_DEVICE_CALLBACK_MEMBER(hvyunit_state::scanline) void hvyunit_state::hvyunit(machine_config &config) { - Z80(config, m_mastercpu, XTAL(12'000'000)/2); // 6MHz verified on PCB - m_mastercpu->set_addrmap(AS_PROGRAM, &hvyunit_state::master_memory); - m_mastercpu->set_addrmap(AS_IO, &hvyunit_state::master_io); + Z80(config, m_maincpu, XTAL(12'000'000)/2); // 6MHz verified on PCB + m_maincpu->set_addrmap(AS_PROGRAM, &hvyunit_state::main_memory); + m_maincpu->set_addrmap(AS_IO, &hvyunit_state::main_io); TIMER(config, "scantimer").configure_scanline(FUNC(hvyunit_state::scanline), "screen", 0, 1); - Z80(config, m_slavecpu, XTAL(12'000'000)/2); // 6MHz verified on PCB - m_slavecpu->set_addrmap(AS_PROGRAM, &hvyunit_state::slave_memory); - m_slavecpu->set_addrmap(AS_IO, &hvyunit_state::slave_io); - m_slavecpu->set_vblank_int("screen", FUNC(hvyunit_state::irq0_line_assert)); + Z80(config, m_subcpu, XTAL(12'000'000)/2); // 6MHz verified on PCB + m_subcpu->set_addrmap(AS_PROGRAM, &hvyunit_state::sub_memory); + m_subcpu->set_addrmap(AS_IO, &hvyunit_state::sub_io); + m_subcpu->set_vblank_int("screen", FUNC(hvyunit_state::irq0_line_assert)); Z80(config, m_soundcpu, XTAL(12'000'000)/2); // 6MHz verified on PCB m_soundcpu->set_addrmap(AS_PROGRAM, &hvyunit_state::sound_memory); @@ -648,7 +643,7 @@ void hvyunit_state::hvyunit(machine_config &config) GENERIC_LATCH_8(config, m_mermaidlatch); m_mermaidlatch->data_pending_callback().set_inputline(m_mermaid, INPUT_LINE_IRQ0); - GENERIC_LATCH_8(config, m_slavelatch); + GENERIC_LATCH_8(config, m_sublatch); config.set_maximum_quantum(attotime::from_hz(6000)); @@ -688,19 +683,19 @@ void hvyunit_state::hvyunit(machine_config &config) // There is likely a World version using the newer (B73_25 - B73_28) graphics ROMs with a program ROM labeled B73_29 ROM_START( hvyunit ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b73_10.5c", 0x00000, 0x20000, CRC(ca52210f) SHA1(346951962aa5bbad641117dbd66f035dddc7c0bf) ) - ROM_REGION( 0x10000, "slave", 0 ) + ROM_REGION( 0x10000, "subcpu", 0 ) ROM_LOAD( "b73_11.5p", 0x00000, 0x10000, CRC(cb451695) SHA1(116fd59f96a54c22fae65eea9ee5e58cb9ce5074) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) + ROM_LOAD( "b73_12.7e", 0x00000, 0x10000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) ROM_REGION( 0x1000, "mermaid", 0 ) ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) ) - ROM_REGION( 0x200000, "sprites", 0 ) + ROM_REGION( 0x200000, "sprites", ROMREGION_ERASE00 ) ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) ) ROM_LOAD( "b73_07.2c", 0x100000, 0x010000, CRC(5cffa42c) SHA1(687e047345039479b35d5099e56dbc1d57284ed9) ) ROM_LOAD( "b73_06.2b", 0x120000, 0x010000, CRC(a98e4aea) SHA1(560fef03ad818894c9c7578c6282d55b646e8129) ) @@ -717,19 +712,19 @@ ROM_START( hvyunit ) ROM_END ROM_START( hvyunitj ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b73_30.5c", 0x00000, 0x20000, CRC(600af545) SHA1(c52b9be2bae28848ad0818c296f000a1bda4fa4f) ) - ROM_REGION( 0x10000, "slave", 0 ) + ROM_REGION( 0x10000, "subcpu", 0 ) ROM_LOAD( "b73_14.5p", 0x00000, 0x10000, CRC(0dfb51d4) SHA1(0e6f3b3d4558f12fe1b1620f57a0f4ac2065fd1a) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) + ROM_LOAD( "b73_12.7e", 0x00000, 0x10000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) ROM_REGION( 0x1000, "mermaid", 0 ) ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) ) - ROM_REGION( 0x200000, "sprites", 0 ) + ROM_REGION( 0x200000, "sprites", ROMREGION_ERASE00 ) ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) ) ROM_LOAD( "b73_28.2c", 0x100000, 0x020000, CRC(a02e08d6) SHA1(72764d4e8474aaac0674fd1c20278a706da7ade2) ) // == b73_22.2c, despite the different label ROM_LOAD( "b73_27.2b", 0x120000, 0x020000, CRC(8708f97c) SHA1(ccddc7f2fa53c5e35345c2db0520f515c512b723) ) // == b73_21.2b, despite the different label @@ -741,19 +736,19 @@ ROM_START( hvyunitj ) ROM_END ROM_START( hvyunitja ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b73_24.5c", 0x00000, 0x20000, CRC(60122f5a) SHA1(f9abccc8c4f65c613f901c7baebe02881ea8bf60) ) - ROM_REGION( 0x10000, "slave", 0 ) + ROM_REGION( 0x10000, "subcpu", 0 ) ROM_LOAD( "b73_14.5p", 0x00000, 0x10000, CRC(0dfb51d4) SHA1(0e6f3b3d4558f12fe1b1620f57a0f4ac2065fd1a) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) + ROM_LOAD( "b73_12.7e", 0x00000, 0x10000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) ROM_REGION( 0x1000, "mermaid", 0 ) ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) ) - ROM_REGION( 0x200000, "sprites", 0 ) // The data in first half of b73_15.0b actually differs slightly to the other sets, a 0x22 fill is replaced by 0xff on empty tiles + ROM_REGION( 0x200000, "sprites", ROMREGION_ERASE00 ) // The data in first half of b73_15.0b actually differs slightly to the other sets, a 0x22 fill is replaced by 0xff on empty tiles ROM_LOAD( "b73_22.2c", 0x100000, 0x020000, CRC(a02e08d6) SHA1(72764d4e8474aaac0674fd1c20278a706da7ade2) ) // == b73_28.2c, despite the different label - M5M27C101P mask ROM ROM_LOAD( "b73_21.2b", 0x120000, 0x020000, CRC(8708f97c) SHA1(ccddc7f2fa53c5e35345c2db0520f515c512b723) ) // == b73_27.2b, despite the different label - M5M27C101P mask ROM ROM_LOAD( "b73_15.0b", 0x140000, 0x020000, CRC(2f13f81e) SHA1(9d9c1869bf582a0bc0581cdf5b65237124b9e456) ) // == b73_25.0b, despite the different label - M5M27C101P mask ROM @@ -773,19 +768,19 @@ ROM_START( hvyunitja ) ROM_END ROM_START( hvyunitjo ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b73_13.5c", 0x00000, 0x20000, CRC(e2874601) SHA1(7f7f3287113b8622eb365d04135d2d9c35d70554) ) - ROM_REGION( 0x10000, "slave", 0 ) + ROM_REGION( 0x10000, "subcpu", 0 ) ROM_LOAD( "b73_14.5p", 0x00000, 0x10000, CRC(0dfb51d4) SHA1(0e6f3b3d4558f12fe1b1620f57a0f4ac2065fd1a) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) + ROM_LOAD( "b73_12.7e", 0x00000, 0x10000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) ROM_REGION( 0x1000, "mermaid", 0 ) ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) ) - ROM_REGION( 0x200000, "sprites", 0 ) + ROM_REGION( 0x200000, "sprites", ROMREGION_ERASE00 ) ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) ) ROM_LOAD( "b73_07.2c", 0x100000, 0x010000, CRC(5cffa42c) SHA1(687e047345039479b35d5099e56dbc1d57284ed9) ) ROM_LOAD( "b73_06.2b", 0x120000, 0x010000, CRC(a98e4aea) SHA1(560fef03ad818894c9c7578c6282d55b646e8129) ) @@ -802,19 +797,19 @@ ROM_START( hvyunitjo ) ROM_END ROM_START( hvyunitu ) - ROM_REGION( 0x20000, "master", 0 ) + ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b73_34.5c", 0x00000, 0x20000, CRC(05c30a90) SHA1(97cc0ded2896e0945d790247c284e5058c28c735) ) - ROM_REGION( 0x10000, "slave", 0 ) + ROM_REGION( 0x10000, "subcpu", 0 ) ROM_LOAD( "b73_35.6p", 0x00000, 0x10000, CRC(aed1669d) SHA1(d0539261d6128fa2d58b529e8383b6d1f3ccac77) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "b73_12.7e", 0x000000, 0x010000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) + ROM_LOAD( "b73_12.7e", 0x00000, 0x10000, CRC(d1d24fab) SHA1(ed0312535d0b136d79aa885b9e6eea19ebde6409) ) ROM_REGION( 0x1000, "mermaid", 0 ) ROM_LOAD( "mermaid.bin", 0x0000, 0x0e00, CRC(88c5dd27) SHA1(5043fed7fd192891be7e4096f2c5daaae1538bc4) ) - ROM_REGION( 0x200000, "sprites", 0 ) + ROM_REGION( 0x200000, "sprites", ROMREGION_ERASE00 ) ROM_LOAD( "b73_08.2f", 0x000000, 0x080000, CRC(f83dd808) SHA1(09d5f1e86fad3a0d2d3ac1845103d3f2833c6793) ) ROM_LOAD( "b73_28.2c", 0x100000, 0x020000, CRC(a02e08d6) SHA1(72764d4e8474aaac0674fd1c20278a706da7ade2) ) // == b73_22.2c, despite the different label ROM_LOAD( "b73_27.2b", 0x120000, 0x020000, CRC(8708f97c) SHA1(ccddc7f2fa53c5e35345c2db0520f515c512b723) ) // == b73_21.2b, despite the different label diff --git a/src/mame/kaneko/kan_pand.cpp b/src/mame/kaneko/kan_pand.cpp index 53d1181d49a..d4239b96c8d 100644 --- a/src/mame/kaneko/kan_pand.cpp +++ b/src/mame/kaneko/kan_pand.cpp @@ -9,16 +9,16 @@ which is found on several Kaneko boards. there several bootleg variants of this chip, - these are emulated in kan_panb.c instead. + these are emulated in kaneko/snowbros_v.cpp instead. Original Games using this Chip - Snow Bros - Air Buster - DJ Boy - Heavy Unit - Sand Scorpion - Gals Panic (1st release) + Snow Bros (kaneko/snowbros.cpp) + Air Buster (kaneko/airbustr.cpp) + DJ Boy (kaneko/djboy.cpp) + Heavy Unit (kaneko/hvyunit.cpp) + Sand Scorpion (kaneko/sandscrp.cpp) + Gals Panic (1st release) (kaneko/galpanic.cpp) The SemiCom games are also using this because their bootleg chip appears to function in an @@ -36,15 +36,15 @@ hookups. to use this in a driver you must hook functions to - VIDEO_UPDATE (copies framebuffer to screen) + screen_update (copies framebuffer to screen) and - VIDEO_EOF (renders the sprites to the framebuffer) + screen_vblank (renders the sprites to the framebuffer) - also, you have to add the correspondent device in MACHINE_DRIVER + also, you have to add the correspondent device in machine_config spriteram should be accessed only with the - pandora_spriteram_r / pandora_spriteram_w or - pandora_spriteram_LSB_r / pandora_spriteram_LSB_w + spriteram_r / spriteram_w or + spriteram_lsb_r / spriteram_lsb_w handlers, depending on the CPU being used with it. ***********************************************************************/ @@ -53,12 +53,13 @@ #include "kan_pand.h" #include "screen.h" -DEFINE_DEVICE_TYPE(KANEKO_PANDORA, kaneko_pandora_device, "kaneko_pandora", "Kaneko PANDORA GFX") +DEFINE_DEVICE_TYPE(KANEKO_PANDORA, kaneko_pandora_device, "kaneko_pandora", "Kaneko PANDORA Sprite Generator") -kaneko_pandora_device::kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +kaneko_pandora_device::kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, KANEKO_PANDORA, tag, owner, clock) , device_video_interface(mconfig, *this) , device_gfx_interface(mconfig, *this) + , m_buffer(0) , m_clear_bitmap(false) , m_bg_pen(0) , m_xoffset(0) @@ -76,15 +77,22 @@ void kaneko_pandora_device::device_start() m_bg_pen = 0; m_flip_screen = false; - m_spriteram = std::make_unique(0x1000); + m_spriteram = std::make_unique(0x1000); - m_sprites_bitmap = std::make_unique(screen().width(), screen().height()); + // 4 64x4 DRAMs - 256x256 8 bit, double buffered + for (auto &elem : m_sprites_bitmap) + { + elem.allocate(256, 256); + elem.fill(m_bg_pen); + } + save_item(NAME(m_buffer)); save_item(NAME(m_clear_bitmap)); save_item(NAME(m_bg_pen)); save_item(NAME(m_flip_screen)); save_pointer(NAME(m_spriteram), 0x1000); - save_item(NAME(*m_sprites_bitmap)); + save_item(NAME(m_sprites_bitmap[0])); + save_item(NAME(m_sprites_bitmap[1])); } //------------------------------------------------- @@ -103,7 +111,7 @@ void kaneko_pandora_device::device_reset() IMPLEMENTATION *****************************************************************************/ -void kaneko_pandora_device::set_bg_pen(uint16_t pen) +void kaneko_pandora_device::set_bg_pen(u16 pen) { m_bg_pen = pen; } @@ -113,22 +121,15 @@ void kaneko_pandora_device::set_clear_bitmap(int clear) m_clear_bitmap = clear != 0; } -void kaneko_pandora_device::update( bitmap_ind16 &bitmap, const rectangle &cliprect ) +void kaneko_pandora_device::update(bitmap_ind16 &bitmap, const rectangle &cliprect) { - if (!m_sprites_bitmap) - { - printf("ERROR: pandora_update with no pandora_sprites_bitmap\n"); - return; - } - - copybitmap_trans(bitmap, *m_sprites_bitmap, 0, 0, 0, 0, cliprect, 0); + copybitmap_trans(bitmap, m_sprites_bitmap[m_buffer], 0, 0, 0, 0, cliprect, 0); } -void kaneko_pandora_device::draw( bitmap_ind16 &bitmap, const rectangle &cliprect ) +void kaneko_pandora_device::draw(bitmap_ind16 &bitmap, const rectangle &cliprect) { - int sx = 0, sy = 0, x = 0, y = 0, offs; - + int x = 0, y = 0; /* * Sprite Tile Format @@ -138,33 +139,33 @@ void kaneko_pandora_device::draw( bitmap_ind16 &bitmap, const rectangle &cliprec * -----+-76543210-+---------------- * 0-2 | -------- | unused * 3 | xxxx.... | Palette Bank - * 3 | .......x | XPos - Sign Bit - * 3 | ......x. | YPos - Sign Bit * 3 | .....x.. | Use Relative offsets + * 3 | ......x. | YPos - Sign Bit + * 3 | .......x | XPos - Sign Bit * 4 | xxxxxxxx | XPos * 5 | xxxxxxxx | YPos * 6 | xxxxxxxx | Sprite Number (low 8 bits) - * 7 | ....xxxx | Sprite Number (high 4 bits) * 7 | x....... | Flip Sprite Y-Axis * 7 | .x...... | Flip Sprite X-Axis + * 7 | ..xxxxxx | Sprite Number (high 6 bits) */ - for (offs = 0; offs < 0x1000; offs += 8) + for (int offs = 0; offs < 0x1000; offs += 8) { - int dx = m_spriteram[offs + 4]; - int dy = m_spriteram[offs + 5]; - int tilecolour = m_spriteram[offs + 3]; - int attr = m_spriteram[offs + 7]; - int flipx = attr & 0x80; - int flipy = (attr & 0x40) << 1; - int tile = ((attr & 0x3f) << 8) + (m_spriteram[offs + 6] & 0xff); + int dx = m_spriteram[offs + 4]; + int dy = m_spriteram[offs + 5]; + const u8 tilecolour = m_spriteram[offs + 3]; + const u8 attr = m_spriteram[offs + 7]; + bool flipx = BIT(attr, 7); + bool flipy = BIT(attr, 6); + const u32 tile = ((attr & 0x3f) << 8) + (m_spriteram[offs + 6] & 0xff); - if (tilecolour & 1) + if (BIT(tilecolour, 0)) dx |= 0x100; - if (tilecolour & 2) + if (BIT(tilecolour, 1)) dy |= 0x100; - if (tilecolour & 4) + if (BIT(tilecolour, 2)) { x += dx; y += dy; @@ -175,104 +176,77 @@ void kaneko_pandora_device::draw( bitmap_ind16 &bitmap, const rectangle &cliprec y = dy; } + int sx = x, sy = y; if (m_flip_screen) { - sx = 240 - x; - sy = 240 - y; + sx = 240 - sx; + sy = 240 - sy; flipx = !flipx; flipy = !flipy; } - else - { - sx = x; - sy = y; - } /* global offset */ sx += m_xoffset; sy += m_yoffset; - sx &= 0x1ff; - sy &= 0x1ff; - - if (sx & 0x100) - sx -= 0x200; - if (sy & 0x100) - sy -= 0x200; + sx = util::sext(sx & 0x1ff, 9); + sy = util::sext(sy & 0x1ff, 9); gfx(0)->transpen(bitmap,cliprect, tile, (tilecolour & 0xf0) >> 4, flipx, flipy, - sx,sy,0); + sx, sy, 0); } } -void kaneko_pandora_device::eof( ) +void kaneko_pandora_device::eof() { - assert(m_spriteram != nullptr); - + m_buffer ^= 1; // the games can disable the clearing of the sprite bitmap, to leave sprite trails if (m_clear_bitmap) - m_sprites_bitmap->fill(m_bg_pen, screen().visible_area()); + m_sprites_bitmap[m_buffer].fill(m_bg_pen); - kaneko_pandora_device::draw(*m_sprites_bitmap, screen().visible_area()); + draw(m_sprites_bitmap[m_buffer], m_sprites_bitmap[m_buffer].cliprect()); } /***************************************************************************** DEVICE HANDLERS *****************************************************************************/ -void kaneko_pandora_device::spriteram_w(offs_t offset, uint8_t data) +void kaneko_pandora_device::spriteram_w(offs_t offset, u8 data) { // it's either hooked up oddly on this, or on the 16-bit games // either way, we swap the address lines so that the spriteram is in the same format - offset = bitswap<16>(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 ); - - if (!m_spriteram) - { - printf("ERROR: spriteram_w with no m__spriteram\n"); - return; - } + offset = bitswap<16>(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8); if (offset >= 0x1000) { - logerror("spriteram_w write past spriteram, offset %04x %02x\n", offset, data); + logerror("%s: spriteram_w write past spriteram, offset %04x %02x\n", machine().describe_context(), offset, data); return; } m_spriteram[offset] = data; } -uint8_t kaneko_pandora_device::spriteram_r(offs_t offset) +u8 kaneko_pandora_device::spriteram_r(offs_t offset) { // it's either hooked up oddly on this, or on the 16-bit games // either way, we swap the address lines so that the spriteram is in the same format - offset = bitswap<16>(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8 ); - - if (!m_spriteram) - { - printf("ERROR: spriteram_r with no m_spriteram\n"); - return 0x00; - } + offset = bitswap<16>(offset, 15,14,13,12, 11, 7,6,5,4,3,2,1,0, 10,9,8); if (offset >= 0x1000) { - logerror("spriteram_r read past spriteram, offset %04x\n", offset); + if (!machine().side_effects_disabled()) + logerror("%s: spriteram_r read past spriteram, offset %04x\n", machine().describe_context(), offset); return 0x00; } return m_spriteram[offset]; } /* I don't know if this MSB/LSB mirroring is correct, or if there is twice as much ram, with half of it unused */ -void kaneko_pandora_device::spriteram_LSB_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void kaneko_pandora_device::spriteram_lsb_w(offs_t offset, u16 data, u16 mem_mask) { - if (!m_spriteram) - { - printf("ERROR: m_spriteram_LSB_w with no m_spriteram\n"); - return; - } - if (ACCESSING_BITS_8_15) { m_spriteram[offset] = (data >> 8) & 0xff; @@ -284,13 +258,7 @@ void kaneko_pandora_device::spriteram_LSB_w(offs_t offset, uint16_t data, uint16 } } -uint16_t kaneko_pandora_device::spriteram_LSB_r(offs_t offset) +u16 kaneko_pandora_device::spriteram_lsb_r(offs_t offset) { - if (!m_spriteram) - { - printf("ERROR: spriteram_LSB_r with no m_spriteram\n"); - return 0x0000; - } - return m_spriteram[offset] | (m_spriteram[offset] << 8); } diff --git a/src/mame/kaneko/kan_pand.h b/src/mame/kaneko/kan_pand.h index 866aea2f5fc..c3d80449bbc 100644 --- a/src/mame/kaneko/kan_pand.h +++ b/src/mame/kaneko/kan_pand.h @@ -22,8 +22,8 @@ class kaneko_pandora_device : public device_t, { public: // constructor/destructor - kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - template kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&palette_tag, const gfx_decode_entry *gfxinfo) + kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + template kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, T &&palette_tag, const gfx_decode_entry *gfxinfo) : kaneko_pandora_device(mconfig, tag, owner, clock) { set_info(gfxinfo); @@ -32,20 +32,20 @@ public: // configuration void set_gfxinfo(const gfx_decode_entry *gfxinfo) { set_info(gfxinfo); } - void set_offsets(int32_t x_offset, int32_t y_offset) + void set_offsets(s32 x_offset, s32 y_offset) { m_xoffset = x_offset; m_yoffset = y_offset; } - void spriteram_w(offs_t offset, uint8_t data); - uint8_t spriteram_r(offs_t offset); - void spriteram_LSB_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t spriteram_LSB_r(offs_t offset); - void update( bitmap_ind16 &bitmap, const rectangle &cliprect ); + void spriteram_w(offs_t offset, u8 data); + u8 spriteram_r(offs_t offset); + void spriteram_lsb_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 spriteram_lsb_r(offs_t offset); + void update(bitmap_ind16 &bitmap, const rectangle &cliprect); void set_clear_bitmap(int clear); void eof(); - void set_bg_pen(uint16_t pen); + void set_bg_pen(u16 pen); void flip_screen_set(bool flip) { m_flip_screen = flip; } protected: @@ -53,17 +53,18 @@ protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; - void draw( bitmap_ind16 &bitmap, const rectangle &cliprect ); + void draw(bitmap_ind16 &bitmap, const rectangle &cliprect); private: // internal state - std::unique_ptr m_spriteram; - std::unique_ptr m_sprites_bitmap; // bitmap to render sprites to, Pandora seems to be frame'buffered' - bool m_clear_bitmap; - uint16_t m_bg_pen; // might work some other way.. - int32_t m_xoffset; - int32_t m_yoffset; - bool m_flip_screen; + std::unique_ptr m_spriteram; + bitmap_ind16 m_sprites_bitmap[2]; // bitmap to render sprites to, Pandora seems to be frame'buffered' + u8 m_buffer; + bool m_clear_bitmap; + u16 m_bg_pen; // might work some other way.. + s32 m_xoffset; + s32 m_yoffset; + bool m_flip_screen; }; DECLARE_DEVICE_TYPE(KANEKO_PANDORA, kaneko_pandora_device) diff --git a/src/mame/kaneko/sandscrp.cpp b/src/mame/kaneko/sandscrp.cpp index 235eb2ecba8..c6d8079ddb7 100644 --- a/src/mame/kaneko/sandscrp.cpp +++ b/src/mame/kaneko/sandscrp.cpp @@ -116,10 +116,10 @@ private: required_memory_bank m_audiobank; - u8 m_sprite_irq; - u8 m_unknown_irq; - u8 m_vblank_irq; - bool m_latch_full[2]; + u8 m_sprite_irq = 0; + u8 m_unknown_irq = 0; + u8 m_vblank_irq = 0; + bool m_latch_full[2]{}; u8 irq_cause_r(); void irq_cause_w(u8 data); @@ -152,17 +152,17 @@ u32 sandscrp_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c m_view2->prepare(bitmap, cliprect); - for ( int l = 0; l < 4; l++ ) + for (int l = 0; l < 4; l++) { - m_view2->render_tilemap(screen,bitmap,cliprect,l); + m_view2->render_tilemap(screen, bitmap, cliprect, l); } // copy sprite bitmap to screen m_pandora->update(bitmap, cliprect); - for ( int h = 4; h < 8; h++ ) // high bit of tile priority : above sprites + for (int h = 4; h < 8; h++) // high bit of tile priority : above sprites { - m_view2->render_tilemap(screen,bitmap,cliprect,h); + m_view2->render_tilemap(screen, bitmap, cliprect, h); } return 0; @@ -212,21 +212,24 @@ void sandscrp_state::screen_vblank(int state) /* Reads the cause of the interrupt */ u8 sandscrp_state::irq_cause_r() { - return ( m_sprite_irq ? 0x08 : 0 ) | - ( m_unknown_irq ? 0x10 : 0 ) | - ( m_vblank_irq ? 0x20 : 0 ) ; + return (m_sprite_irq ? 0x08 : 0) | + (m_unknown_irq ? 0x10 : 0) | + (m_vblank_irq ? 0x20 : 0); } /* Clear the cause of the interrupt */ void sandscrp_state::irq_cause_w(u8 data) { -// m_sprite_flipx = data & 1; -// m_sprite_flipy = data & 1; +// m_sprite_flipx = BIT(data, 0); +// m_sprite_flipy = BIT(data, 0); - if (BIT(data, 3)) m_sprite_irq = 0; - if (BIT(data, 4)) m_unknown_irq = 0; - if (BIT(data, 5)) m_vblank_irq = 0; + if (BIT(data, 3)) + m_sprite_irq = 0; + if (BIT(data, 4)) + m_unknown_irq = 0; + if (BIT(data, 5)) + m_vblank_irq = 0; update_irq_state(); } @@ -246,7 +249,7 @@ void sandscrp_state::coincounter_w(u8 data) u8 sandscrp_state::latchstatus_68k_r() { return (m_latch_full[0] ? 0x80 : 0) | - (m_latch_full[1] ? 0x40 : 0) ; + (m_latch_full[1] ? 0x40 : 0); } void sandscrp_state::latchstatus_68k_w(u8 data) @@ -275,10 +278,10 @@ void sandscrp_state::sandscrp_mem(address_map &map) map(0x000000, 0x07ffff).rom(); // ROM map(0x100001, 0x100001).w(FUNC(sandscrp_state::irq_cause_w)); // IRQ Ack - map(0x200000, 0x20001f).rw("calc1_mcu", FUNC(kaneko_hit_device::kaneko_hit_r), FUNC(kaneko_hit_device::kaneko_hit_w)); + map(0x200000, 0x20001f).rw("calc1", FUNC(kaneko_hit_device::kaneko_hit_r), FUNC(kaneko_hit_device::kaneko_hit_w)); map(0x300000, 0x30001f).rw(m_view2, FUNC(kaneko_view2_tilemap_device::regs_r), FUNC(kaneko_view2_tilemap_device::regs_w)); map(0x400000, 0x403fff).m(m_view2, FUNC(kaneko_view2_tilemap_device::vram_map)); - map(0x500000, 0x501fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_LSB_r), FUNC(kaneko_pandora_device::spriteram_LSB_w)); // sprites + map(0x500000, 0x501fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_lsb_r), FUNC(kaneko_pandora_device::spriteram_lsb_w)); // sprites map(0x600000, 0x600fff).ram().w("palette", FUNC(palette_device::write16)).share("palette"); // Palette map(0x700000, 0x70ffff).ram(); // RAM map(0x800001, 0x800001).r(FUNC(sandscrp_state::irq_cause_r)); // IRQ Cause @@ -305,13 +308,13 @@ void sandscrp_state::bankswitch_w(u8 data) u8 sandscrp_state::latchstatus_r() { return (m_latch_full[1] ? 0x80 : 0) | // swapped!? - (m_latch_full[0] ? 0x40 : 0) ; + (m_latch_full[0] ? 0x40 : 0); } void sandscrp_state::sandscrp_soundmem(address_map &map) { map(0x0000, 0x7fff).rom(); // ROM - map(0x8000, 0xbfff).bankr("audiobank"); // Banked ROM + map(0x8000, 0xbfff).bankr(m_audiobank); // Banked ROM map(0xc000, 0xdfff).ram(); // RAM } @@ -461,7 +464,7 @@ void sandscrp_state::sandscrp(machine_config &config) m_view2->set_offset(0x5b, 0, 256, 224); m_view2->set_palette("palette"); - KANEKO_HIT(config, "calc1_mcu").set_type(0); + KANEKO_HIT(config, "calc1").set_type(0); KANEKO_PANDORA(config, m_pandora, 0, "palette", gfx_sandscrp_spr); diff --git a/src/mame/kaneko/snowbros.cpp b/src/mame/kaneko/snowbros.cpp index 8a193300973..d98a0ad0be3 100644 --- a/src/mame/kaneko/snowbros.cpp +++ b/src/mame/kaneko/snowbros.cpp @@ -87,19 +87,19 @@ a joystick. This is not an emulation bug. #include "speaker.h" -void snowbros_state::snowbros_flipscreen_w(uint8_t data) +void snowbros_pandora_state::snowbros_flipscreen_w(u8 data) { m_pandora->flip_screen_set(!BIT(data, 7)); } -void snowbros_state::bootleg_flipscreen_w(uint8_t data) +void snowbros_state::bootleg_flipscreen_w(u8 data) { - flip_screen_set(~data & 0x80); + flip_screen_set(BIT(~data, 7)); } -uint32_t snowbros_state::screen_update_snowbros(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 snowbros_pandora_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { /* This clears & redraws the entire screen each pass */ bitmap.fill(0xf0, cliprect); @@ -108,7 +108,7 @@ uint32_t snowbros_state::screen_update_snowbros(screen_device &screen, bitmap_in } -void snowbros_state::screen_vblank_snowbros(int state) +void snowbros_pandora_state::screen_vblank(int state) { // rising edge if (state) @@ -118,94 +118,83 @@ void snowbros_state::screen_vblank_snowbros(int state) } - -void snowbros_state::snowbros_irq4_ack_w(uint16_t data) +template +void snowbros_state::irq_ack_w(u16 data) { - m_maincpu->set_input_line(4, CLEAR_LINE); + m_maincpu->set_input_line(Line, CLEAR_LINE); } -void snowbros_state::snowbros_irq3_ack_w(uint16_t data) +TIMER_DEVICE_CALLBACK_MEMBER(snowbros_state::scanline) { - m_maincpu->set_input_line(3, CLEAR_LINE); -} + const int scanline = param; -void snowbros_state::snowbros_irq2_ack_w(uint16_t data) -{ - m_maincpu->set_input_line(2, CLEAR_LINE); -} - -TIMER_DEVICE_CALLBACK_MEMBER(snowbros_state::snowbros_irq) -{ - int scanline = param; - - if(scanline == 240) + if (scanline == 240) m_maincpu->set_input_line(2, ASSERT_LINE); - if(scanline == 128) + if (scanline == 128) m_maincpu->set_input_line(3, ASSERT_LINE); - if(scanline == 32) + if (scanline == 32) m_maincpu->set_input_line(4, ASSERT_LINE); } -TIMER_DEVICE_CALLBACK_MEMBER(snowbros_state::snowbros3_irq) +TIMER_DEVICE_CALLBACK_MEMBER(snowbros3_state::snowbros3_scanline) { - int status = m_oki->read(); - int scanline = param; + const u8 status = m_oki[0]->read(); + const int scanline = param; - if(scanline == 240) + if (scanline == 240) m_maincpu->set_input_line(2, ASSERT_LINE); - if(scanline == 128) + if (scanline == 128) m_maincpu->set_input_line(3, ASSERT_LINE); - if(scanline == 32) + if (scanline == 32) m_maincpu->set_input_line(4, ASSERT_LINE); if (m_sb3_music_is_playing) { - if ((status&0x08)==0x00) + if (BIT(~status, 3)) { - m_oki->write(0x80|m_sb3_music); - m_oki->write(0x00|0x82); + m_oki[0]->write(0x80 | m_sb3_music); + m_oki[0]->write(0x00 | 0x82); } - } else { - if ((status&0x08)==0x08) + if (BIT(status, 3)) { - m_oki->write(0x40); /* Stop playing music */ + m_oki[0]->write(0x40); /* Stop playing music */ } } - } -uint16_t snowbros_state::toto_read(offs_t offset, uint16_t mem_mask) +u16 snowbros_pandora_state::toto_read(offs_t offset, u16 mem_mask) { - int pc = m_maincpu->pc(); - if ((pc!= 0x3f010) && (pc!= 0x38008)) printf("toto prot %08x %04x\n", pc, mem_mask); + const offs_t pc = m_maincpu->pc(); + if ((pc!= 0x3f010) && (pc!= 0x38008) && (!machine().side_effects_disabled())) + logerror("%s: toto prot %08x %04x\n", machine().describe_context(), pc, mem_mask); return 0x0700; } /* Snow Bros Memory Map */ -void snowbros_state::snowbros_map(address_map &map) +void snowbros_pandora_state::snowbros_map(address_map &map) { map(0x000000, 0x03ffff).rom(); map(0x100000, 0x103fff).ram(); map(0x200000, 0x200001).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); - map(0x300001, 0x300001).r("soundlatch2", FUNC(generic_latch_8_device::read)); - map(0x300001, 0x300001).w(m_soundlatch, FUNC(generic_latch_8_device::write)); - map(0x400000, 0x400000).w(FUNC(snowbros_state::snowbros_flipscreen_w)); + map(0x300001, 0x300001).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x300001, 0x300001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); + map(0x400000, 0x400000).w(FUNC(snowbros_pandora_state::snowbros_flipscreen_w)); map(0x500000, 0x500001).portr("DSW1"); map(0x500002, 0x500003).portr("DSW2"); map(0x500004, 0x500005).portr("SYSTEM"); map(0x600000, 0x6001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_LSB_r), FUNC(kaneko_pandora_device::spriteram_LSB_w)); - map(0x800000, 0x800001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_lsb_r), FUNC(kaneko_pandora_device::spriteram_lsb_w)); + map(0x800000, 0x800001).w(FUNC(snowbros_pandora_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).w(FUNC(snowbros_pandora_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).w(FUNC(snowbros_pandora_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ } void snowbros_state::sound_map(address_map &map) @@ -218,30 +207,30 @@ void snowbros_state::sound_io_map(address_map &map) { map.global_mask(0xff); map(0x02, 0x03).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write)); - map(0x04, 0x04).r(m_soundlatch, FUNC(generic_latch_8_device::read)); - map(0x04, 0x04).w("soundlatch2", FUNC(generic_latch_8_device::write)); // goes back to the main CPU, checked during boot + // goes back to the main CPU, checked during boot + map(0x04, 0x04).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)).w(m_soundlatch[1], FUNC(generic_latch_8_device::write)); } /* Semicom AT89C52 MCU */ // probably not endian safe -void snowbros_state::prot_p0_w(uint8_t data) +void semicom_state::prot_p0_w(u8 data) { - uint16_t word = m_hyperpac_ram[m_semicom_prot_base + m_semicom_prot_offset]; + u16 word = m_hyperpac_ram[m_semicom_prot_base + m_semicom_prot_offset]; word = (word & 0xff00) | (data << 0); m_hyperpac_ram[m_semicom_prot_base + m_semicom_prot_offset] = word; } // probably not endian safe -void snowbros_state::prot_p1_w(uint8_t data) +void semicom_state::prot_p1_w(u8 data) { - uint16_t word = m_hyperpac_ram[m_semicom_prot_base + m_semicom_prot_offset]; + u16 word = m_hyperpac_ram[m_semicom_prot_base + m_semicom_prot_offset]; word = (word & 0x00ff) | (data << 8); m_hyperpac_ram[m_semicom_prot_base + m_semicom_prot_offset] = word; } -void snowbros_state::prot_p2_w(uint8_t data) +void semicom_state::prot_p2_w(u8 data) { // offset m_semicom_prot_offset = data; @@ -254,17 +243,17 @@ void snowbros_state::wintbob_map(address_map &map) map(0x000000, 0x03ffff).rom(); map(0x100000, 0x103fff).ram(); map(0x200000, 0x200001).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); - map(0x300001, 0x300001).r("soundlatch2", FUNC(generic_latch_8_device::read)); - map(0x300001, 0x300001).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x300001, 0x300001).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x300001, 0x300001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); map(0x400000, 0x400000).w(FUNC(snowbros_state::bootleg_flipscreen_w)); map(0x500000, 0x500001).portr("DSW1"); map(0x500002, 0x500003).portr("DSW2"); map(0x500004, 0x500005).portr("SYSTEM"); map(0x600000, 0x6001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x700000, 0x701fff).ram().share("spriteram16b"); - map(0x800000, 0x800001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x700000, 0x701fff).ram().share(m_bootleg_spriteram); + map(0x800000, 0x800001).w(FUNC(snowbros_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).w(FUNC(snowbros_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).w(FUNC(snowbros_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ } /* Honey Doll */ @@ -272,32 +261,32 @@ void snowbros_state::wintbob_map(address_map &map) void snowbros_state::honeydol_map(address_map &map) { map(0x000000, 0x03ffff).rom(); - map(0x100000, 0x10ffff).ram().share("hyperpac_ram"); + map(0x100000, 0x10ffff).ram(); map(0x200000, 0x200001).nopw(); /* ? */ - map(0x300001, 0x300001).w(m_soundlatch, FUNC(generic_latch_8_device::write)); - map(0x400000, 0x400001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x500000, 0x500001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0x600000, 0x600001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x300001, 0x300001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); + map(0x400000, 0x400001).w(FUNC(snowbros_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x500000, 0x500001).w(FUNC(snowbros_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0x600000, 0x600001).w(FUNC(snowbros_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ map(0x800000, 0x800001).nopw(); /* ? */ map(0x900000, 0x900001).portr("DSW1"); map(0x900002, 0x900003).portr("DSW2"); map(0x900004, 0x900005).portr("SYSTEM"); map(0xa00000, 0xa007ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0xb00000, 0xb01fff).ram().share("spriteram16b"); + map(0xb00000, 0xb01fff).ram().share(m_bootleg_spriteram); } void snowbros_state::honeydol_sound_map(address_map &map) { map(0x0000, 0x7fff).rom(); map(0x8000, 0x87ff).ram(); - map(0xe010, 0xe010).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write)); + map(0xe010, 0xe010).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write)); } void snowbros_state::honeydol_sound_io_map(address_map &map) { map.global_mask(0xff); map(0x02, 0x03).rw("ymsnd", FUNC(ym3812_device::read), FUNC(ym3812_device::write)); // not connected? - map(0x04, 0x04).r(m_soundlatch, FUNC(generic_latch_8_device::read)); + map(0x04, 0x04).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); map(0x04, 0x04).nopw(); // still written but never actually read by the main CPU } @@ -308,36 +297,37 @@ void snowbros_state::twinadv_map(address_map &map) map(0x000000, 0x03ffff).rom(); map(0x100000, 0x10ffff).ram(); map(0x200000, 0x200001).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); - map(0x300001, 0x300001).r("soundlatch2", FUNC(generic_latch_8_device::read)); - map(0x300001, 0x300001).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x300001, 0x300001).r(m_soundlatch[1], FUNC(generic_latch_8_device::read)); + map(0x300001, 0x300001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); map(0x400000, 0x400000).w(FUNC(snowbros_state::bootleg_flipscreen_w)); map(0x500000, 0x500001).portr("DSW1"); map(0x500002, 0x500003).portr("DSW2"); map(0x500004, 0x500005).portr("SYSTEM"); map(0x600000, 0x6001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x700000, 0x701fff).ram().share("spriteram16b"); - map(0x800000, 0x800001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x700000, 0x701fff).ram().share(m_bootleg_spriteram); + map(0x800000, 0x800001).w(FUNC(snowbros_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).w(FUNC(snowbros_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).w(FUNC(snowbros_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ } -void snowbros_state::twinadv_oki_bank_w(uint8_t data) +void snowbros_state::twinadv_oki_bank_w(u8 data) { - int bank = (data &0x02)>>1; + const u8 bank = BIT(data, 1); - if (data&0xfd) logerror ("Unused bank bits! %02x\n",data); + if (data & 0xfd) + logerror("%s: Unused bank bits! %02x\n", machine().describe_context(), data); - m_oki->set_rom_bank(bank); + m_oki[0]->set_rom_bank(bank); } void snowbros_state::twinadv_sound_io_map(address_map &map) { map.global_mask(0xff); - map(0x02, 0x02).r(m_soundlatch, FUNC(generic_latch_8_device::read)); - map(0x02, 0x02).w("soundlatch2", FUNC(generic_latch_8_device::write)); // back to 68k? + map(0x02, 0x02).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); + map(0x02, 0x02).w(m_soundlatch[1], FUNC(generic_latch_8_device::write)); // back to 68k? map(0x04, 0x04).w(FUNC(snowbros_state::twinadv_oki_bank_w)); // oki bank? - map(0x06, 0x06).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write)); + map(0x06, 0x06).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write)); } @@ -348,43 +338,41 @@ sound hardware is also different */ -void snowbros_state::hyperpac_map(address_map &map) +void semicom_state::hyperpac_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x10ffff).ram().share("hyperpac_ram"); - map(0x300001, 0x300001).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x100000, 0x10ffff).ram().share(m_hyperpac_ram); + map(0x300001, 0x300001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); // map(0x400000, 0x400001) ??? map(0x500000, 0x500001).portr("DSW1"); map(0x500002, 0x500003).portr("DSW2"); map(0x500004, 0x500005).portr("SYSTEM"); map(0x600000, 0x6001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_LSB_r), FUNC(kaneko_pandora_device::spriteram_LSB_w)); - map(0x800000, 0x800001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_lsb_r), FUNC(kaneko_pandora_device::spriteram_lsb_w)); + map(0x800000, 0x800001).w(FUNC(semicom_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).w(FUNC(semicom_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).w(FUNC(semicom_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ } -void snowbros_state::hyperpac_sound_map(address_map &map) +void semicom_state::hyperpac_sound_map(address_map &map) { map(0x0000, 0xcfff).rom(); map(0xd000, 0xd7ff).ram(); map(0xf000, 0xf001).rw("ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); - map(0xf002, 0xf002).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write)); - map(0xf008, 0xf008).r(m_soundlatch, FUNC(generic_latch_8_device::read)); + map(0xf002, 0xf002).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write)); + map(0xf008, 0xf008).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); } /* Same volume used for all samples at the Moment, could be right, we have no way of knowing .. */ -uint16_t snowbros_state::sb3_sound_r() +u16 snowbros3_state::sb3_sound_r() { return 0x0003; } -void snowbros_state::sb3_play_music(int data) +void snowbros3_state::sb3_play_music(u16 data) { - uint8_t *snd; - /* sample is actually played in interrupt function so it loops */ m_sb3_music = data; @@ -392,16 +380,14 @@ void snowbros_state::sb3_play_music(int data) { case 0x23: case 0x26: - snd = memregion("oki")->base(); - memcpy(snd+0x20000, snd+0x80000+0x00000, 0x20000); - m_sb3_music_is_playing = 1; - break; + m_okibank->set_entry(0); + m_sb3_music_is_playing = 1; + break; case 0x24: - snd = memregion("oki")->base(); - memcpy(snd+0x20000, snd+0x80000+0x20000, 0x20000); - m_sb3_music_is_playing = 1; - break; + m_okibank->set_entry(1); + m_sb3_music_is_playing = 1; + break; case 0x25: case 0x27: @@ -411,101 +397,102 @@ void snowbros_state::sb3_play_music(int data) case 0x2b: case 0x2c: case 0x2d: - snd = memregion("oki")->base(); - memcpy(snd+0x20000, snd+0x80000+0x40000, 0x20000); - m_sb3_music_is_playing = 1; - break; + m_okibank->set_entry(2); + m_sb3_music_is_playing = 1; + break; case 0x2e: - m_sb3_music_is_playing = 0; - break; + m_sb3_music_is_playing = 0; + break; } } -void snowbros_state::sb3_play_sound (int data) +void snowbros3_state::sb3_play_sound(u16 data) { - int status = m_oki->read(); + const u8 status = m_oki[0]->read(); - if ((status&0x01)==0x00) + if (BIT(~status, 0)) { - m_oki->write(0x80|data); - m_oki->write(0x00|0x12); + m_oki[0]->write(0x80 | data); + m_oki[0]->write(0x00 | 0x12); } - else if ((status&0x02)==0x00) + else if (BIT(~status, 1)) { - m_oki->write(0x80|data); - m_oki->write(0x00|0x22); + m_oki[0]->write(0x80 | data); + m_oki[0]->write(0x00 | 0x22); } - else if ((status&0x04)==0x00) + else if (BIT(~status, 2)) { - m_oki->write(0x80|data); - m_oki->write(0x00|0x42); + m_oki[0]->write(0x80 | data); + m_oki[0]->write(0x00 | 0x42); } - - } -void snowbros_state::sb3_sound_w(uint16_t data) +void snowbros3_state::sb3_sound_w(u16 data) { if (data == 0x00fe) { m_sb3_music_is_playing = 0; - m_oki->write(0x78); /* Stop sounds */ + m_oki[0]->write(0x78); /* Stop sounds */ } else /* the alternating 0x00-0x2f or 0x30-0x5f might be something to do with the channels */ { - data = data>>8; + data = data >> 8; if (data <= 0x21) { sb3_play_sound(data); } - if (data>=0x22 && data<=0x31) + if ((data >= 0x22) && (data <= 0x31)) { sb3_play_music(data); } - if ((data>=0x30) && (data<=0x51)) + if ((data >= 0x30) && (data <= 0x51)) { - sb3_play_sound(data-0x30); + sb3_play_sound(data - 0x30); } - if (data>=0x52 && data<=0x5f) + if ((data >= 0x52) && (data <= 0x5f)) { - sb3_play_music(data-0x30); + sb3_play_music(data - 0x30); } - } } - -void snowbros_state::snowbros3_map(address_map &map) +void snowbros3_state::snowbros3_map(address_map &map) { map(0x000000, 0x03ffff).rom(); map(0x100000, 0x103fff).ram(); map(0x200000, 0x200001).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); - map(0x300000, 0x300001).r(FUNC(snowbros_state::sb3_sound_r)); // ? - map(0x300000, 0x300001).w(FUNC(snowbros_state::sb3_sound_w)); // ? - map(0x400000, 0x400000).w(FUNC(snowbros_state::bootleg_flipscreen_w)); + map(0x300000, 0x300001).r(FUNC(snowbros3_state::sb3_sound_r)); // ? + map(0x300000, 0x300001).w(FUNC(snowbros3_state::sb3_sound_w)); // ? + map(0x400000, 0x400000).w(FUNC(snowbros3_state::bootleg_flipscreen_w)); map(0x500000, 0x500001).portr("DSW1"); map(0x500002, 0x500003).portr("DSW2"); map(0x500004, 0x500005).portr("SYSTEM"); map(0x600000, 0x6003ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x700000, 0x7021ff).ram().share("spriteram16b"); - map(0x800000, 0x800001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x700000, 0x7021ff).ram().share(m_bootleg_spriteram); + map(0x800000, 0x800001).w(FUNC(snowbros3_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).w(FUNC(snowbros3_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).w(FUNC(snowbros3_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ +} + +void snowbros3_state::snowbros3_oki_map(address_map &map) +{ + map(0x00000, 0x1ffff).rom().region("oki1", 0); + map(0x20000, 0x3ffff).bankr(m_okibank); } /* Final Tetris */ -void snowbros_state::finalttr_map(address_map &map) +void semicom_state::finalttr_map(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x100000, 0x103fff).ram().share("hyperpac_ram"); - map(0x300001, 0x300001).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x100000, 0x103fff).ram().share(m_hyperpac_ram); + map(0x300001, 0x300001).w(m_soundlatch[0], FUNC(generic_latch_8_device::write)); // map(0x400000, 0x400001) ??? map(0x500000, 0x500001).portr("DSW1"); @@ -513,10 +500,10 @@ void snowbros_state::finalttr_map(address_map &map) map(0x500004, 0x500005).portr("SYSTEM"); map(0x600000, 0x6001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_LSB_r), FUNC(kaneko_pandora_device::spriteram_LSB_w)); - map(0x800000, 0x800001).w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x700000, 0x701fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_lsb_r), FUNC(kaneko_pandora_device::spriteram_lsb_w)); + map(0x800000, 0x800001).w(FUNC(semicom_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).w(FUNC(semicom_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).w(FUNC(semicom_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ } @@ -524,9 +511,9 @@ void snowbros_state::finalttr_map(address_map &map) // The sequence MEN is sent to the protection device, followed by the code request (4 bytes in all). // After each byte, a number of NOPs are executed to give the device time to catch up. // After the 4th byte, the code reads the device to get its response. -uint16_t snowbros_state::yutnori_prot_r() +u16 snowbros_pandora_state::yutnori_prot_r() { - switch(m_yutnori_prot_val) // the 4th byte + switch (m_yutnori_prot_val) // the 4th byte { case 0x33: // C3B6 return 0xcc; @@ -535,22 +522,23 @@ uint16_t snowbros_state::yutnori_prot_r() case 0xb8: // D820 return 0x74; } - logerror("%s: Unhandled protection sequence found: %02X\n", machine().describe_context(), m_yutnori_prot_val); + if (!machine().side_effects_disabled()) + logerror("%s: Unhandled protection sequence found: %02X\n", machine().describe_context(), m_yutnori_prot_val); return 0; } -void snowbros_state::yutnori_prot_w(uint16_t data) +void snowbros_pandora_state::yutnori_prot_w(u16 data) { m_yutnori_prot_val = data; } -void snowbros_state::yutnori_map(address_map &map) +void snowbros_pandora_state::yutnori_map(address_map &map) { map(0x000000, 0x03ffff).rom(); // 0x100000 clr.w on startup - map(0x200000, 0x200001).rw(FUNC(snowbros_state::yutnori_prot_r),FUNC(snowbros_state::yutnori_prot_w)); // protection + map(0x200000, 0x200001).rw(FUNC(snowbros_pandora_state::yutnori_prot_r),FUNC(snowbros_pandora_state::yutnori_prot_w)); // protection map(0x300000, 0x300001).portr("DSW1"); map(0x300002, 0x300003).portr("DSW2"); @@ -558,20 +546,20 @@ void snowbros_state::yutnori_map(address_map &map) // could be one of the OKIs? but gets value to write from RAM, always seems to be 0? map(0x30000c, 0x30000d).nopw(); - map(0x30000e, 0x30000f).nopr(); //.r(FUNC(snowbros_state::yutnori_unk_r)); // ?? + map(0x30000e, 0x30000f).nopr(); //.r(FUNC(snowbros_pandora_state::yutnori_unk_r)); // ?? // map(0x400000, 0x400001).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); // maybe? map(0x400000, 0x400001).noprw(); map(0x500000, 0x5001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0x600000, 0x601fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_LSB_r), FUNC(kaneko_pandora_device::spriteram_LSB_w)); + map(0x600000, 0x601fff).rw(m_pandora, FUNC(kaneko_pandora_device::spriteram_lsb_r), FUNC(kaneko_pandora_device::spriteram_lsb_w)); map(0x700000, 0x70ffff).ram(); - map(0x800000, 0x800001).nopr().w(FUNC(snowbros_state::snowbros_irq4_ack_w)); /* IRQ 4 acknowledge */ - map(0x900000, 0x900001).nopr().w(FUNC(snowbros_state::snowbros_irq3_ack_w)); /* IRQ 3 acknowledge */ - map(0xa00000, 0xa00001).nopr().w(FUNC(snowbros_state::snowbros_irq2_ack_w)); /* IRQ 2 acknowledge */ + map(0x800000, 0x800001).nopr().w(FUNC(snowbros_pandora_state::irq_ack_w<4>)); /* IRQ 4 acknowledge */ + map(0x900000, 0x900001).nopr().w(FUNC(snowbros_pandora_state::irq_ack_w<3>)); /* IRQ 3 acknowledge */ + map(0xa00000, 0xa00001).nopr().w(FUNC(snowbros_pandora_state::irq_ack_w<2>)); /* IRQ 2 acknowledge */ } static INPUT_PORTS_START( snowbros ) @@ -664,6 +652,15 @@ static INPUT_PORTS_START( snowbroj ) PORT_DIPSETTING( 0x01, DEF_STR( On ) ) INPUT_PORTS_END +static INPUT_PORTS_START( toto ) + PORT_INCLUDE(snowbros) + + PORT_MODIFY("DSW1") + PORT_DIPNAME( 0x01, 0x00, "Show All Rights Reserved (Broken)" ) PORT_DIPLOCATION("SW1:1") // Copyright screen is broken if set + PORT_DIPSETTING( 0x00, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x01, DEF_STR( No ) ) +INPUT_PORTS_END + static INPUT_PORTS_START( ballboy3p ) PORT_INCLUDE(snowbros) @@ -1906,35 +1903,42 @@ static GFXDECODE_START( gfx_hyperpac_spr ) GFXDECODE_ENTRY( "gfx1", 0, hyperpac_tilelayout, 0, 16 ) GFXDECODE_END -MACHINE_RESET_MEMBER(snowbros_state,semiprot) +void snowbros3_state::machine_start() { - uint16_t *PROTDATA = (uint16_t*)memregion("user1")->base(); - int i; + m_okibank->configure_entries(0, 3, memregion("oki1")->base() + 0x20000, 0x20000); + m_okibank->set_entry(0); - for (i = 0;i < 0x200/2;i++) - m_hyperpac_ram[0xf000/2 + i] = PROTDATA[i]; + save_item(NAME(m_sb3_music_is_playing)); + save_item(NAME(m_sb3_music)); } -MACHINE_RESET_MEMBER(snowbros_state,finalttr) +MACHINE_RESET_MEMBER(semicom_state,semiprot) { - uint16_t *PROTDATA = (uint16_t*)memregion("user1")->base(); - int i; + u16 const *const PROTDATA = (u16*)memregion("protdata")->base(); - for (i = 0;i < 0x200/2;i++) - m_hyperpac_ram[0x2000/2 + i] = PROTDATA[i]; + for (int i = 0; i < 0x200 / 2; i++) + m_hyperpac_ram[0xf000 / 2 + i] = PROTDATA[i]; } -void snowbros_state::snowbros(machine_config &config) +MACHINE_RESET_MEMBER(semicom_state,finalttr) +{ + u16 const *const PROTDATA = (u16*)memregion("protdata")->base(); + + for (int i = 0; i < 0x200 / 2; i++) + m_hyperpac_ram[0x2000 / 2 + i] = PROTDATA[i]; +} + +void snowbros_state::snowbros_base(machine_config &config) { - /* basic machine hardware */ M68000(config, m_maincpu, XTAL(16'000'000)/2); /* 8 Mhz - confirmed */ - m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::snowbros_map); - TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::snowbros_irq), "screen", 0, 1); + + TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_pandora_state::scanline), "screen", 0, 1); + WATCHDOG_TIMER(config, "watchdog"); Z80(config, m_soundcpu, XTAL(12'000'000)/2); /* 6 MHz - confirmed */ - m_soundcpu->set_addrmap(AS_PROGRAM, &snowbros_state::sound_map); - m_soundcpu->set_addrmap(AS_IO, &snowbros_state::sound_io_map); + m_soundcpu->set_addrmap(AS_PROGRAM, &snowbros_pandora_state::sound_map); + m_soundcpu->set_addrmap(AS_IO, &snowbros_pandora_state::sound_io_map); /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); @@ -1942,59 +1946,65 @@ void snowbros_state::snowbros(machine_config &config) m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); m_screen->set_size(32*8, 262); m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1); - m_screen->set_screen_update(FUNC(snowbros_state::screen_update_snowbros)); - m_screen->screen_vblank().set(FUNC(snowbros_state::screen_vblank_snowbros)); m_screen->set_palette(m_palette); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 256); - KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_snowbros_spr); - /* sound hardware */ SPEAKER(config, "mono").front_center(); - GENERIC_LATCH_8(config, m_soundlatch); - m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); + GENERIC_LATCH_8(config, m_soundlatch[0]); + m_soundlatch[0]->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); - GENERIC_LATCH_8(config, "soundlatch2"); + GENERIC_LATCH_8(config, m_soundlatch[1]); ym3812_device &ymsnd(YM3812(config, "ymsnd", XTAL(12'000'000)/4)); /* 3 MHz - confirmed */ ymsnd.irq_handler().set_inputline("soundcpu", 0); ymsnd.add_route(ALL_OUTPUTS, "mono", 1.0); } -void snowbros_state::wintbob(machine_config &config) +void snowbros_pandora_state::snowbros(machine_config &config) { - snowbros(config); + snowbros_base(config); /* basic machine hardware */ - m_maincpu->set_clock(10000000); /* 10mhz - Confirmed */ - m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::wintbob_map); + m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_pandora_state::snowbros_map); - config.device_remove("pandora"); + m_screen->set_screen_update(FUNC(snowbros_pandora_state::screen_update)); + m_screen->screen_vblank().set(FUNC(snowbros_pandora_state::screen_vblank)); - /* video hardware */ - GFXDECODE(config, m_gfxdecode, m_palette, gfx_wb); - - m_screen->set_screen_update(FUNC(snowbros_state::screen_update_wintbob)); - m_screen->screen_vblank().set_nop(); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_snowbros_spr); } -void snowbros_state::semicom(machine_config &config) +void snowbros_state::wintbob(machine_config &config) +{ + snowbros_base(config); + + /* basic machine hardware */ + m_maincpu->set_clock(10000000); /* 10 MHz - Confirmed */ + m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::wintbob_map); + + /* video hardware */ + m_screen->set_screen_update(FUNC(snowbros_state::screen_update_wintbob)); + + GFXDECODE(config, m_gfxdecode, m_palette, gfx_wb); +} + +void semicom_state::semicom(machine_config &config) { snowbros(config); /* basic machine hardware */ m_maincpu->set_clock(XTAL(12'000'000)); /* 12MHz - Confirmed */ - m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::hyperpac_map); + m_maincpu->set_addrmap(AS_PROGRAM, &semicom_state::hyperpac_map); m_soundcpu->set_clock(XTAL(16'000'000)/4); /* 4MHz - Confirmed */ - m_soundcpu->set_addrmap(AS_PROGRAM, &snowbros_state::hyperpac_sound_map); + m_soundcpu->set_addrmap(AS_PROGRAM, &semicom_state::hyperpac_sound_map); m_soundcpu->set_addrmap(AS_IO, address_map_constructor()); m_pandora->set_gfxinfo(gfx_hyperpac_spr); - m_soundlatch->data_pending_callback().set_nop(); + m_soundlatch[0]->data_pending_callback().set_nop(); config.device_remove("soundlatch2"); @@ -2004,26 +2014,26 @@ void snowbros_state::semicom(machine_config &config) ymsnd.add_route(0, "mono", 0.10); ymsnd.add_route(1, "mono", 0.10); - OKIM6295(config, m_oki, XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); /* 1MHz & pin 7 High - Confirmed */ - m_oki->add_route(ALL_OUTPUTS, "mono", 1.0); + OKIM6295(config, m_oki[0], XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); /* 1MHz & pin 7 High - Confirmed */ + m_oki[0]->add_route(ALL_OUTPUTS, "mono", 1.0); } -void snowbros_state::semicom_mcu(machine_config &config) +void semicom_state::semicom_mcu(machine_config &config) { semicom(config); /* basic machine hardware */ at89c52_device &prot(AT89C52(config, "protection", XTAL(16'000'000))); - prot.port_out_cb<0>().set(FUNC(snowbros_state::prot_p0_w)); - prot.port_out_cb<1>().set(FUNC(snowbros_state::prot_p1_w)); - prot.port_out_cb<2>().set(FUNC(snowbros_state::prot_p2_w)); + prot.port_out_cb<0>().set(FUNC(semicom_state::prot_p0_w)); + prot.port_out_cb<1>().set(FUNC(semicom_state::prot_p1_w)); + prot.port_out_cb<2>().set(FUNC(semicom_state::prot_p2_w)); } -void snowbros_state::semiprot(machine_config &config) +void semicom_state::semiprot(machine_config &config) { semicom(config); - MCFG_MACHINE_RESET_OVERRIDE(snowbros_state, semiprot) + MCFG_MACHINE_RESET_OVERRIDE(semicom_state, semiprot) } @@ -2032,7 +2042,7 @@ void snowbros_state::honeydol(machine_config &config) /* basic machine hardware */ M68000(config, m_maincpu, XTAL(12'000'000)); /* MC68000P12 @ 12MHz */ m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::honeydol_map); - TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::snowbros_irq), "screen", 0, 1); + TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::scanline), "screen", 0, 1); Z80(config, m_soundcpu, XTAL(16'000'000)/4); /* 4Mhz (16MHz/4) like SemiCom or 6MHz (12MHz/2) like snowbros??? */ m_soundcpu->set_addrmap(AS_PROGRAM, &snowbros_state::honeydol_sound_map); @@ -2053,15 +2063,15 @@ void snowbros_state::honeydol(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); - GENERIC_LATCH_8(config, m_soundlatch); - m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); + GENERIC_LATCH_8(config, m_soundlatch[0]); + m_soundlatch[0]->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); ym3812_device &ymsnd(YM3812(config, "ymsnd", XTAL(12'000'000)/4)); /* 3Mhz */ ymsnd.irq_handler().set_inputline("soundcpu", 0); ymsnd.add_route(ALL_OUTPUTS, "mono", 1.0); - OKIM6295(config, m_oki, XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); /* freq? */ - m_oki->add_route(ALL_OUTPUTS, "mono", 1.0); + OKIM6295(config, m_oki[0], XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); /* freq? */ + m_oki[0]->add_route(ALL_OUTPUTS, "mono", 1.0); } void snowbros_state::twinadv(machine_config &config) @@ -2069,7 +2079,7 @@ void snowbros_state::twinadv(machine_config &config) /* basic machine hardware */ M68000(config, m_maincpu, XTAL(12'000'000)); /* 12MHz like Honey Doll ? */ m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::twinadv_map); - TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::snowbros_irq), "screen", 0, 1); + TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::scanline), "screen", 0, 1); WATCHDOG_TIMER(config, "watchdog"); Z80(config, m_soundcpu, XTAL(16'000'000)/4); /* 4Mhz (16MHz/4) like SemiCom or 6MHz (12MHz/2) like snowbros??? */ @@ -2092,14 +2102,14 @@ void snowbros_state::twinadv(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); - GENERIC_LATCH_8(config, m_soundlatch); - m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); + GENERIC_LATCH_8(config, m_soundlatch[0]); + m_soundlatch[0]->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); - GENERIC_LATCH_8(config, "soundlatch2"); + GENERIC_LATCH_8(config, m_soundlatch[1]); /* sound hardware */ - OKIM6295(config, m_oki, XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); /* freq? */ - m_oki->add_route(ALL_OUTPUTS, "mono", 1.0); + OKIM6295(config, m_oki[0], XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); /* freq? */ + m_oki[0]->add_route(ALL_OUTPUTS, "mono", 1.0); } @@ -2121,28 +2131,28 @@ Intel P8752 (mcu) */ -void snowbros_state::finalttr(machine_config &config) +void semicom_state::finalttr(machine_config &config) { semicom(config); m_maincpu->set_clock(XTAL(12'000'000)); - m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::finalttr_map); + m_maincpu->set_addrmap(AS_PROGRAM, &semicom_state::finalttr_map); m_soundcpu->set_clock(XTAL(3'579'545)); - MCFG_MACHINE_RESET_OVERRIDE(snowbros_state, finalttr) + MCFG_MACHINE_RESET_OVERRIDE(semicom_state, finalttr) ym2151_device &ymsnd(YM2151(config.replace(), "ymsnd", XTAL(3'579'545))); /* possible but less likely 4MHz (12MHz/3) */ ymsnd.irq_handler().set_inputline(m_soundcpu, 0); ymsnd.add_route(0, "mono", 0.08); ymsnd.add_route(1, "mono", 0.08); - m_oki->set_clock(999900); - m_oki->reset_routes().add_route(ALL_OUTPUTS, "mono", 0.4); + m_oki[0]->set_clock(999900); + m_oki[0]->reset_routes().add_route(ALL_OUTPUTS, "mono", 0.4); } -void snowbros_state::_4in1(machine_config &config) +void semicom_state::_4in1(machine_config &config) { semicom(config); @@ -2150,12 +2160,12 @@ void snowbros_state::_4in1(machine_config &config) m_pandora->set_gfxinfo(gfx_snowbros_spr); } -void snowbros_state::snowbro3(machine_config &config) /* PCB has 16MHz & 12MHz OSCs */ +void snowbros3_state::snowbro3(machine_config &config) /* PCB has 16MHz & 12MHz OSCs */ { /* basic machine hardware */ M68000(config, m_maincpu, XTAL(12'000'000)); /* MC68000P10 CPU @ 12mhz or 8MHz (16MHz/2) ? */ - m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::snowbros3_map); - TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::snowbros3_irq), "screen", 0, 1); + m_maincpu->set_addrmap(AS_PROGRAM, &snowbros3_state::snowbros3_map); + TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros3_state::snowbros3_scanline), "screen", 0, 1); WATCHDOG_TIMER(config, "watchdog"); /* video hardware */ @@ -2164,7 +2174,7 @@ void snowbros_state::snowbro3(machine_config &config) /* PCB has 16MHz & 12MHz O m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); m_screen->set_size(32*8, 32*8); m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1); - m_screen->set_screen_update(FUNC(snowbros_state::screen_update_snowbro3)); + m_screen->set_screen_update(FUNC(snowbros3_state::screen_update_snowbro3)); m_screen->set_palette(m_palette); GFXDECODE(config, m_gfxdecode, m_palette, gfx_sb3); @@ -2173,16 +2183,17 @@ void snowbros_state::snowbro3(machine_config &config) /* PCB has 16MHz & 12MHz O /* sound hardware */ SPEAKER(config, "mono").front_center(); - OKIM6295(config, m_oki, XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); // clock frequency & pin 7 not verified - m_oki->add_route(ALL_OUTPUTS, "mono", 1.0); + OKIM6295(config, m_oki[0], XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); // clock frequency & pin 7 not verified + m_oki[0]->set_addrmap(0, &snowbros3_state::snowbros3_oki_map); + m_oki[0]->add_route(ALL_OUTPUTS, "mono", 1.0); } -void snowbros_state::yutnori(machine_config &config) +void snowbros_pandora_state::yutnori(machine_config &config) { /* basic machine hardware */ M68000(config, m_maincpu, XTAL(16'000'000)/2); - m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_state::yutnori_map); - TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_state::snowbros_irq), "screen", 0, 1); + m_maincpu->set_addrmap(AS_PROGRAM, &snowbros_pandora_state::yutnori_map); + TIMER(config, "scantimer", 0).configure_scanline(FUNC(snowbros_pandora_state::scanline), "screen", 0, 1); // WATCHDOG_TIMER(config, "watchdog"); // maybe @@ -2192,8 +2203,8 @@ void snowbros_state::yutnori(machine_config &config) m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); m_screen->set_size(32*8, 262); m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1); - m_screen->set_screen_update(FUNC(snowbros_state::screen_update_snowbros)); - m_screen->screen_vblank().set(FUNC(snowbros_state::screen_vblank_snowbros)); + m_screen->set_screen_update(FUNC(snowbros_pandora_state::screen_update)); + m_screen->screen_vblank().set(FUNC(snowbros_pandora_state::screen_vblank)); m_screen->set_palette(m_palette); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 256); @@ -2203,11 +2214,11 @@ void snowbros_state::yutnori(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); - okim6295_device &oki1(OKIM6295(config, "oki1", XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH)); // clock frequency & pin 7 not verified - oki1.add_route(ALL_OUTPUTS, "mono", 1.0); + OKIM6295(config, m_oki[0], XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); // clock frequency & pin 7 not verified + m_oki[0]->add_route(ALL_OUTPUTS, "mono", 1.0); - okim6295_device &oki2(OKIM6295(config, "oki2", XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH)); // clock frequency & pin 7 not verified - oki2.add_route(ALL_OUTPUTS, "mono", 1.0); + OKIM6295(config, m_oki[1], XTAL(16'000'000)/16, okim6295_device::PIN7_HIGH); // clock frequency & pin 7 not verified + m_oki[1]->add_route(ALL_OUTPUTS, "mono", 1.0); } /*************************************************************************** @@ -2221,7 +2232,7 @@ ROM_START( snowbros ) ROM_LOAD16_BYTE( "sn6.bin", 0x00000, 0x20000, CRC(4899ddcf) SHA1(47d750d3022a80e47ffabe47566bb2556cc8d477) ) ROM_LOAD16_BYTE( "sn5.bin", 0x00001, 0x20000, CRC(ad310d3f) SHA1(f39295b38d99087dbb9c5b00bf9cb963337a50e2) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "sbros-4.29", 0x0000, 0x8000, CRC(e6eab4e4) SHA1(d08187d03b21192e188784cb840a37a7bdb5ad32) ) ROM_REGION( 0x80000, "gfx1", 0 ) @@ -2238,7 +2249,7 @@ ROM_START( snowbrosa ) ROM_LOAD16_BYTE( "sbros-3a.5", 0x00000, 0x20000, CRC(10cb37e1) SHA1(786be4640f8df2c81a32decc189ea7657ace00c6) ) ROM_LOAD16_BYTE( "sbros-2a.6", 0x00001, 0x20000, CRC(ab91cc1e) SHA1(8cff61539dc7d35fcbf110d3e54fc1883e7b8509) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "sbros-4.29", 0x0000, 0x8000, CRC(e6eab4e4) SHA1(d08187d03b21192e188784cb840a37a7bdb5ad32) ) ROM_REGION( 0x80000, "gfx1", 0 ) @@ -2250,7 +2261,7 @@ ROM_START( snowbrosb ) ROM_LOAD16_BYTE( "sbros3-a", 0x00000, 0x20000, CRC(301627d6) SHA1(0d1dc70091c87e9c27916d4232ff31b7381a64e1) ) ROM_LOAD16_BYTE( "sbros2-a", 0x00001, 0x20000, CRC(f6689f41) SHA1(e4fd27b930a31479c0d99e0ddd23d5db34044666) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "sbros-4.29", 0x0000, 0x8000, CRC(e6eab4e4) SHA1(d08187d03b21192e188784cb840a37a7bdb5ad32) ) ROM_REGION( 0x80000, "gfx1", 0 ) @@ -2262,7 +2273,7 @@ ROM_START( snowbrosc ) ROM_LOAD16_BYTE( "3-a.ic5", 0x00000, 0x20000, CRC(e1bc346b) SHA1(a20c343d9ed2ad4f785d21076499008edad251f9) ) ROM_LOAD16_BYTE( "2-a.ic6", 0x00001, 0x20000, CRC(1be27f9d) SHA1(76dd14480b9274831e51016f7bb57459d7b15cf9) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "sbros-4.29", 0x0000, 0x8000, CRC(e6eab4e4) SHA1(d08187d03b21192e188784cb840a37a7bdb5ad32) ) ROM_REGION( 0x80000, "gfx1", 0 ) @@ -2274,7 +2285,7 @@ ROM_START( snowbrosd ) /* Korean release, but no specific "For use in Korea only ROM_LOAD16_BYTE( "sbk_3-a.bin", 0x00000, 0x20000, CRC(97174d40) SHA1(481e8c680af8b03d4bcf97b87ca0ba5a3ffca0d7) ) ROM_LOAD16_BYTE( "sbk_2-a.bin", 0x00001, 0x20000, CRC(80cc80e5) SHA1(1eeca0924c93e9f0536683160e80c59871569088) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "sbros-4.29", 0x0000, 0x8000, CRC(e6eab4e4) SHA1(d08187d03b21192e188784cb840a37a7bdb5ad32) ) ROM_REGION( 0x80000, "gfx1", 0 ) @@ -2286,7 +2297,7 @@ ROM_START( snowbrosj )/* "For use in Japan only..." notice screen */ ROM_LOAD16_BYTE( "snowbros.3", 0x00000, 0x20000, CRC(3f504f9e) SHA1(700758b114c3fde6ea8f84222af0850dba13cd3b) ) ROM_LOAD16_BYTE( "snowbros.2", 0x00001, 0x20000, CRC(854b02bc) SHA1(4ad1548eef94dcb95119cb4a7dcdefa037591b5b) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "sbros-4.29", 0x0000, 0x8000, CRC(e6eab4e4) SHA1(d08187d03b21192e188784cb840a37a7bdb5ad32) ) ROM_REGION( 0x80000, "gfx1", 0 ) @@ -2313,7 +2324,7 @@ ROM_START( wintbob ) ROM_LOAD16_BYTE( "wb02.bin", 0x20001, 0x10000, CRC(fc8e292e) SHA1(857cfeb0be121e64e6117120514ae1f2ffeae4d6) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ - ROM_LOAD( "wb05.bin", 0x0000, 0x10000, CRC(53fe59df) SHA1(a99053e82b9fed76f744fa9f67078294641c6317) ) + ROM_LOAD( "wb05.bin", 0x00000, 0x10000, CRC(53fe59df) SHA1(a99053e82b9fed76f744fa9f67078294641c6317) ) ROM_REGION( 0x80000, "gfx1", 0 ) ROM_LOAD16_BYTE( "wb13.bin", 0x00000, 0x10000, CRC(426921de) SHA1(5107c58e7e08d71895baa67fe260b17ebd61389c) ) @@ -2335,7 +2346,7 @@ ROM_START( snowbroswb ) ROM_LOAD16_BYTE( "wb02.bin", 0x20001, 0x10000, CRC(fc8e292e) SHA1(857cfeb0be121e64e6117120514ae1f2ffeae4d6) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ - ROM_LOAD( "wb05.bin", 0x0000, 0x10000, CRC(53fe59df) SHA1(a99053e82b9fed76f744fa9f67078294641c6317) ) + ROM_LOAD( "wb05.bin", 0x00000, 0x10000, CRC(53fe59df) SHA1(a99053e82b9fed76f744fa9f67078294641c6317) ) ROM_REGION( 0x80000, "gfx1", 0 ) ROM_LOAD16_BYTE( "wb13.bin", 0x00000, 0x10000, CRC(426921de) SHA1(5107c58e7e08d71895baa67fe260b17ebd61389c) ) @@ -2353,8 +2364,8 @@ ROM_START( toto ) ROM_LOAD16_BYTE( "u60.5j", 0x00000, 0x20000, CRC(39203792) SHA1(4c8d560be02a514cbf91774c7a0b4a95cf573356) ) ROM_LOAD16_BYTE( "u51.4j", 0x00001, 0x20000, CRC(7b846cd4) SHA1(04aa0bbaab4303fb08dff52d5515f7e764f1be6d)) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ - ROM_LOAD( "u46.4c", 0x0000, 0x8000, CRC(77b1ef42) SHA1(75e3c8c2b687669cc56f972dd7375dab5185859c) ) + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_LOAD( "u46.4c", 0x00000, 0x8000, CRC(77b1ef42) SHA1(75e3c8c2b687669cc56f972dd7375dab5185859c) ) ROM_REGION( 0x80000, "gfx1", 0 ) ROM_LOAD( "u107.8k", 0x00000, 0x20000, CRC(4486153b) SHA1(a6dc0c17bf2328ab725bce4aaa0a413a42129fb0) ) @@ -2388,7 +2399,7 @@ ROM_START( honeydol ) ROM_LOAD16_BYTE( "d-16.uh12", 0x00001, 0x20000, CRC(cee1a2e3) SHA1(6d1ff5358ec704616b724eea2ab9b60b84709eb1) ) ROM_LOAD16_BYTE( "d-17.ui12", 0x00000, 0x20000, CRC(cac44154) SHA1(2c30dc033001fc9303da7e117e3401bc7af16607) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "d-12.uh15", 0x0000, 0x8000, CRC(386f1b63) SHA1(d719875226cd3d380e2ebec49209590d91b6f07b) ) ROM_REGION( 0x80000, "gfx1", 0 ) // 4 bpp gfx @@ -2400,7 +2411,7 @@ ROM_START( honeydol ) ROM_LOAD( "d-18.9", 0x100000, 0x80000, CRC(0210507a) SHA1(5b7348bf253b1ae8bfa86cdee2ff80aa2b3faa79) ) ROM_LOAD( "d-19.10", 0x180000, 0x80000, CRC(d27375d5) SHA1(2a39ce9b985e00a290c3ea75be3b1edbc00d39ec) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "d-11.u14", 0x00000, 0x40000, CRC(f3ee4861) SHA1(f24f1f855ae6c96a6d84a4b5e5c196df8f922d0a) ) ROM_END @@ -2450,7 +2461,7 @@ ROM_START( twinadv ) ROM_LOAD16_BYTE( "13.uh12", 0x00001, 0x20000, CRC(9f70a39b) SHA1(d49823be58b00c4c5a4f6cc4e4371531492aff1e) ) ROM_LOAD16_BYTE( "12.ui12", 0x00000, 0x20000, CRC(d8776495) SHA1(15b93ded80bf9f240faef2d89b6076f33f1f4ece) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "uh15.bin", 0x0000, 0x8000, CRC(3d5acd08) SHA1(c19f686862dfc12d2fa91c2dd3d3b75d9cb410c3) ) ROM_REGION( 0x180000, "gfx1", 0 ) /* 4bpp gfx */ @@ -2458,7 +2469,7 @@ ROM_START( twinadv ) ROM_LOAD( "15.ua5", 0x080000, 0x80000, CRC(79a08b8d) SHA1(034c0a3b9e27ac174092d265b32fb82d6ee45d47) ) ROM_LOAD( "14.ua6", 0x100000, 0x80000, CRC(79faee0b) SHA1(7421a5fa038d01658ba5ac1f65ea87b97ac25c36) ) - ROM_REGION( 0x080000, "oki", 0 ) /* Samples - both banks are almost the same */ + ROM_REGION( 0x080000, "oki1", 0 ) /* Samples - both banks are almost the same */ /* todo, check bank ordering .. */ ROM_LOAD( "sra.bin", 0x00000, 0x40000, CRC(82f452c4) SHA1(95ad6ede87ceafb045ed7df40496baf96190b97f) ) // bank 1 ROM_LOAD( "srb.bin", 0x40000, 0x40000, CRC(109e51e6) SHA1(3344c68d63bbad4a02b47143b2d2f72ce9bcb4bb) ) // bank 2 @@ -2469,7 +2480,7 @@ ROM_START( twinadvk ) ROM_LOAD16_BYTE( "uh12", 0x00001, 0x20000, CRC(e0bcc738) SHA1(7fc6a793fcdd80122c0ac6409ae4cac5597b7b5a) ) ROM_LOAD16_BYTE( "ui12", 0x00000, 0x20000, CRC(a3ee6451) SHA1(9c0b415a2f325513739f2047780c2a56df350aa5) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "uh15.bin", 0x0000, 0x8000, CRC(3d5acd08) SHA1(c19f686862dfc12d2fa91c2dd3d3b75d9cb410c3) ) ROM_REGION( 0x180000, "gfx1", 0 ) /* 4bpp gfx */ @@ -2477,7 +2488,7 @@ ROM_START( twinadvk ) ROM_LOAD( "ua5", 0x080000, 0x80000, CRC(f83b3b97) SHA1(2e967d49ef411d164a0b6cf32444f60fcd8068a9) ) ROM_LOAD( "ua6", 0x100000, 0x80000, CRC(4dfcffb9) SHA1(c157e031acbb321b9435389f9fc4e1ffebca106d) ) - ROM_REGION( 0x080000, "oki", 0 ) /* Samples - both banks are almost the same */ + ROM_REGION( 0x080000, "oki1", 0 ) /* Samples - both banks are almost the same */ /* todo, check bank ordering .. */ ROM_LOAD( "sra.bin", 0x00000, 0x40000, CRC(82f452c4) SHA1(95ad6ede87ceafb045ed7df40496baf96190b97f) ) // bank 1 ROM_LOAD( "srb.bin", 0x40000, 0x40000, CRC(109e51e6) SHA1(3344c68d63bbad4a02b47143b2d2f72ce9bcb4bb) ) // bank 2 @@ -2488,7 +2499,7 @@ ROM_START( multi96 ) ROM_LOAD16_BYTE( "uh12", 0x00001, 0x20000, CRC(e912ea4e) SHA1(cf0b37d6b6fbdd311ef7b404c4ba2c6a7e1f8486) ) // sldh ROM_LOAD16_BYTE( "ui12", 0x00000, 0x20000, CRC(ac99e837) SHA1(20bc1599f78a4eac65cae54350872fa292daa807) ) // sldh - ROM_REGION( 0x10000, "soundcpu", 0 ) /* 64k for z80 sound code */ + ROM_REGION( 0x8000, "soundcpu", 0 ) /* 64k for z80 sound code */ ROM_LOAD( "uh15.bin", 0x0000, 0x8000, CRC(3d5acd08) SHA1(c19f686862dfc12d2fa91c2dd3d3b75d9cb410c3) ) ROM_REGION( 0x180000, "gfx1", 0 ) /* 4bpp gfx */ @@ -2496,7 +2507,7 @@ ROM_START( multi96 ) ROM_LOAD( "ua5", 0x080000, 0x80000, CRC(0bd9f6bb) SHA1(400ddff7a76860caacfe8bfd803f9ccd2dba3356) ) // sldh ROM_LOAD( "ua6", 0x100000, 0x80000, CRC(0e90b26c) SHA1(fd9b40988d03db8ed797abf859a8828bb65db8d5) ) // sldh - ROM_REGION( 0x080000, "oki", 0 ) /* Samples - both banks are almost the same */ + ROM_REGION( 0x080000, "oki1", 0 ) /* Samples - both banks are almost the same */ /* todo, check bank ordering .. */ ROM_LOAD( "sra.bin", 0x00000, 0x40000, CRC(82f452c4) SHA1(95ad6ede87ceafb045ed7df40496baf96190b97f) ) // bank 1 ROM_LOAD( "srb.bin", 0x40000, 0x40000, CRC(109e51e6) SHA1(3344c68d63bbad4a02b47143b2d2f72ce9bcb4bb) ) // bank 2 @@ -2510,12 +2521,12 @@ ROM_START( hyperpac ) ROM_LOAD16_BYTE( "hyperpac.i12", 0x00000, 0x20000, CRC(9c7d85b8) SHA1(432d5fbe8bef875ce4a9aeb74a7b57dc79c709fd) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "hyperpac.u1", 0x00000, 0x10000 , CRC(03faf88e) SHA1(a8da883d4b765b809452bbffca37ff224edbe86d) ) + ROM_LOAD( "hyperpac.u1", 0x00000, 0x10000, CRC(03faf88e) SHA1(a8da883d4b765b809452bbffca37ff224edbe86d) ) ROM_REGION( 0x2000, "protection", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "at89c52.bin", 0x0000, 0x2000 , CRC(291f9326) SHA1(e440ce7d92188faa86e02e7f9db4ec6bce21efd3) ) /* decapped */ + ROM_LOAD( "at89c52.bin", 0x0000, 0x2000, CRC(291f9326) SHA1(e440ce7d92188faa86e02e7f9db4ec6bce21efd3) ) /* decapped */ - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "hyperpac.j15", 0x00000, 0x40000, CRC(fb9f468d) SHA1(52857b1a04c64ac853340ebb8e92d98eabea8bc1) ) ROM_REGION( 0x0c0000, "gfx1", 0 ) /* Sprites */ @@ -2530,9 +2541,9 @@ ROM_START( hyperpacb ) ROM_LOAD16_BYTE( "hpacui12.bin", 0x00000, 0x20000, CRC(23dc00d1) SHA1(8d4d00f450b94912adcbb24073f9b3b01eab0450) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "hyperpac.u1", 0x00000, 0x10000 , CRC(03faf88e) SHA1(a8da883d4b765b809452bbffca37ff224edbe86d) ) // was missing from this set, using the one from the original + ROM_LOAD( "hyperpac.u1", 0x00000, 0x10000, CRC(03faf88e) SHA1(a8da883d4b765b809452bbffca37ff224edbe86d) ) // was missing from this set, using the one from the original - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "hyperpac.j15", 0x00000, 0x40000, CRC(fb9f468d) SHA1(52857b1a04c64ac853340ebb8e92d98eabea8bc1) ) ROM_REGION( 0x0c0000, "gfx1", 0 ) /* Sprites */ @@ -2547,17 +2558,17 @@ ROM_START( twinkle ) ROM_LOAD16_BYTE( "ui12.bin", 0x00000, 0x20000, CRC(5af73684) SHA1(9be43e5c71152d515366e422eb077a41dbb3fe62) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u1.bin", 0x00000, 0x10000 , CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) + ROM_LOAD( "u1.bin", 0x00000, 0x10000, CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(00d3e4b4) SHA1(afa359a8b48605ff034133bad2a0a182429dec71) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "uj15.bin", 0x00000, 0x40000, CRC(0a534b37) SHA1(b7d780eb4668f1f757a60884c022f5bbc424dc97) ) ROM_REGION( 0x080000, "gfx1", 0 ) /* Sprites */ @@ -2570,16 +2581,16 @@ ROM_START( twinklea ) ROM_LOAD16_BYTE( "ui12.bin", 0x00000, 0x20000, CRC(79420382) SHA1(13183d819f5b7699e8e0974c193796151a0a9617) ) // sldh ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "u1.bin", 0x00000, 0x10000 , CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) + ROM_LOAD( "u1.bin", 0x00000, 0x10000, CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) - ROM_REGION( 0x10000, "cpu2", 0 ) // Intel 87C52 MCU Code - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) // needs decapping + ROM_REGION( 0x10000, "mcu", 0 ) // Intel 87C52 MCU Code + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) // needs decapping - ROM_REGION16_BE( 0x200, "user1", 0 ) // Data from Shared RAM + ROM_REGION16_BE( 0x200, "protdata", 0 ) // Data from Shared RAM // this is not a real rom but instead the data extracted from shared ram, the MCU puts it there ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, BAD_DUMP CRC(00d3e4b4) SHA1(afa359a8b48605ff034133bad2a0a182429dec71) ) // this has been extracted for the parent set, seems to work for this set, too - ROM_REGION( 0x040000, "oki", 0 ) + ROM_REGION( 0x040000, "oki1", 0 ) ROM_LOAD( "uj15.bin", 0x00000, 0x40000, CRC(0a534b37) SHA1(b7d780eb4668f1f757a60884c022f5bbc424dc97) ) ROM_REGION( 0x080000, "gfx1", 0 ) // Sprites @@ -2592,17 +2603,17 @@ ROM_START( pzlbreak ) ROM_LOAD16_BYTE( "5.ui12", 0x00000, 0x20000, CRC(13c298a0) SHA1(9455de7ea45c9a61ed6105023eb909c086c44007) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "0.u1", 0x00000, 0x10000 , CRC(1ad646b7) SHA1(0132baa097e48df2450afdcd316375dc546ea4d0) ) + ROM_LOAD( "0.u1", 0x00000, 0x10000, CRC(1ad646b7) SHA1(0132baa097e48df2450afdcd316375dc546ea4d0) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", ROMREGION_ERASEFF ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", ROMREGION_ERASEFF ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(092cb794) SHA1(eb2b336d97b440453ca37ee7605654b35dfb6bad) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "1.uj15", 0x00000, 0x40000, CRC(dbfae77c) SHA1(cc509d52cd9c608fc80df799890e62e7b4c143c6) ) ROM_REGION( 0x100000, "gfx1", 0 ) /* Sprites */ @@ -2616,16 +2627,16 @@ ROM_START( pzlbreaka ) ROM_LOAD16_BYTE( "ui12", 0x00000, 0x20000, CRC(2f66c4ce) SHA1(4349f093ce1267c2ebcbf1233082661604f10851) ) ROM_REGION( 0x10000, "soundcpu", 0 ) - ROM_LOAD( "u1", 0x00000, 0x10000 , CRC(1ad646b7) SHA1(0132baa097e48df2450afdcd316375dc546ea4d0) ) + ROM_LOAD( "u1", 0x00000, 0x10000, CRC(1ad646b7) SHA1(0132baa097e48df2450afdcd316375dc546ea4d0) ) - ROM_REGION( 0x10000, "cpu2", 0 ) // Intel 87C52 MCU Code - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) // Intel 87C52 MCU Code + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", ROMREGION_ERASEFF ) // Data from Shared RAM + ROM_REGION16_BE( 0x200, "protdata", ROMREGION_ERASEFF ) // Data from Shared RAM // this is not a real rom but instead the data extracted from shared ram, the MCU puts it there ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, BAD_DUMP CRC(092cb794) SHA1(eb2b336d97b440453ca37ee7605654b35dfb6bad) ) // extracted from the parent set, so marked as bad - ROM_REGION( 0x040000, "oki", 0 ) + ROM_REGION( 0x040000, "oki1", 0 ) ROM_LOAD( "uj15", 0x00000, 0x20000, CRC(5cdffcc5) SHA1(793a20bd0480cfea0dbf9397797428f6d105f724) ) // 1xxxxxxxxxxxxxxxx = 0xFF and half sized compared to the parent ROM_REGION( 0x100000, "gfx1", 0 ) @@ -2640,18 +2651,18 @@ ROM_START( toppyrap ) ROM_LOAD16_BYTE( "ui12.bin", 0x00000, 0x40000, CRC(caf5a7e1) SHA1(b521b2f06a804a52dad1b07657db2a29e1411844) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u1.bin", 0x00000, 0x10000 , CRC(07f50947) SHA1(83740655ab5f677bd009191bb0de60e237aaa11c) ) + ROM_LOAD( "u1.bin", 0x00000, 0x10000, CRC(07f50947) SHA1(83740655ab5f677bd009191bb0de60e237aaa11c) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this contains the code for 2 of the IRQ functions, but the game only uses one of them, the other is executed from ROM. The version in ROM is slightly patched version so maybe there is an earlier revision which uses the code provided by the MCU instead */ ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(0704e6c7) SHA1(22387257db569990378c304af9677e6dc1436207) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "uj15.bin", 0x00000, 0x20000, CRC(a3bacfd7) SHA1(d015d8bd26d0189fc13d09fefcb9b8baaaacec8a) ) ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2661,23 +2672,24 @@ ROM_START( toppyrap ) ROM_LOAD( "ua7.bin", 0x180000, 0x80000, CRC(663dd099) SHA1(84b52af54ac49e8b4bae23995e3cf94494be2bb3) ) ROM_END +// 퍼즐 특급 모아모아/Puzzle Express More More ROM_START( moremore ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "u52.bin", 0x00001, 0x40000, CRC(cea4b246) SHA1(5febcb5dda6581caccfe9079b28c2366dfc1db2b) ) ROM_LOAD16_BYTE( "u74.bin", 0x00000, 0x40000, CRC(2acdcb88) SHA1(74d661d07752bbccab7eab151209a414e9bf7675) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u35.bin", 0x00000, 0x10000 , CRC(92dc95fc) SHA1(f04e63cc680835458246989532faf5657e28db13) ) + ROM_LOAD( "u35.bin", 0x00000, 0x10000, CRC(92dc95fc) SHA1(f04e63cc680835458246989532faf5657e28db13) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200 , CRC(782dd2aa) SHA1(2587734271e0c85cb76bcdee171366c4e6fc9f81) ) + ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(782dd2aa) SHA1(2587734271e0c85cb76bcdee171366c4e6fc9f81) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "u14.bin", 0x00000, 0x40000, CRC(90580088) SHA1(c64de2c0db95ab4ce06fc0a29c0cc8b7f3deeb28) ) ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2693,17 +2705,17 @@ ROM_START( moremorp ) ROM_LOAD16_BYTE( "mmp_u74.bin", 0x00000, 0x40000, CRC(7c6fede5) SHA1(41bc539a6efe9eb2304243701857b972d2170bcf) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "mmp_u35.bin", 0x00000, 0x10000 , CRC(4d098cad) SHA1(a79d417e7525a25dd6697da9f3d1de269e759d2e) ) + ROM_LOAD( "mmp_u35.bin", 0x00000, 0x10000, CRC(4d098cad) SHA1(a79d417e7525a25dd6697da9f3d1de269e759d2e) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200 , CRC(782dd2aa) SHA1(2587734271e0c85cb76bcdee171366c4e6fc9f81) ) + ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(782dd2aa) SHA1(2587734271e0c85cb76bcdee171366c4e6fc9f81) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "mmp_u14.bin", 0x00000, 0x40000, CRC(211a2566) SHA1(48138547822a8e76c101dd4189d581f80eee1e24) ) ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2719,17 +2731,17 @@ ROM_START( 3in1semi ) /* SemiCom Ser-4331-4 PCB */ ROM_LOAD16_BYTE( "u74", 0x00000, 0x40000, CRC(266862c4) SHA1(2c5c513fee99bdb6e0ae3e0e644e516bdaddd629) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u35", 0x00000, 0x10000 , CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) + ROM_LOAD( "u35", 0x00000, 0x10000, CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200 , CRC(85deba7c) SHA1(44c6d9306b4f8e47182f4740a18971c49a8df8db) ) + ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(85deba7c) SHA1(44c6d9306b4f8e47182f4740a18971c49a8df8db) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "u14", 0x00000, 0x40000, CRC(c83c11be) SHA1(c05d96d61e5b8245232c85cbbcb7cc1e4e066492) ) ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2745,17 +2757,17 @@ ROM_START( 3in1semia ) // SemiCom Ser-4331-4 PCB ROM_LOAD16_BYTE( "u74.bin", 0x00000, 0x40000, CRC(555ae716) SHA1(9a3d7d81d7c6fb8443d263087bb7dca7bc3918b6) ) ROM_REGION( 0x10000, "soundcpu", 0 ) // Z80 Code - ROM_LOAD( "u35.bin", 0x00000, 0x10000 , CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) + ROM_LOAD( "u35.bin", 0x00000, 0x10000, CRC(e40481da) SHA1(1c1fabcb67693235eaa6ff59ae12a35854b5564a) ) - ROM_REGION( 0x10000, "cpu2", 0 ) // Intel 87C52 MCU Code - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) // Intel 87C52 MCU Code + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) // Data from Shared RAM + ROM_REGION16_BE( 0x200, "protdata", 0 ) // Data from Shared RAM /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200 , CRC(85deba7c) SHA1(44c6d9306b4f8e47182f4740a18971c49a8df8db) ) + ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(85deba7c) SHA1(44c6d9306b4f8e47182f4740a18971c49a8df8db) ) - ROM_REGION( 0x040000, "oki", 0 ) // Samples + ROM_REGION( 0x040000, "oki1", 0 ) // Samples ROM_LOAD( "u14.bin", 0x00000, 0x40000, CRC(c83c11be) SHA1(c05d96d61e5b8245232c85cbbcb7cc1e4e066492) ) ROM_REGION( 0x200000, "gfx1", 0 ) // Sprites @@ -2767,7 +2779,7 @@ ROM_END /* -Ma Cheon Ru +마천루/Ma Cheon Ru SemiCom (c) 1999 PCB: Ser-4331-4 @@ -2790,17 +2802,17 @@ ROM_START( mcheonru ) /* SemiCom Ser-4331-4 PCB */ ROM_LOAD16_BYTE( "u74", 0x00000, 0x40000, CRC(3edb17ce) SHA1(0c6ea239f57eca114d75c173b77b2c8ef43d63a2) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u35", 0x00000, 0x10000 , CRC(79e965b4) SHA1(268df67ec6ea828ae01a6e4d2da9ad2a08a837f1) ) + ROM_LOAD( "u35", 0x00000, 0x10000, CRC(79e965b4) SHA1(268df67ec6ea828ae01a6e4d2da9ad2a08a837f1) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD( "protdata.bin", 0x00000, 0x200 , CRC(d61f4f07) SHA1(29485bce6e3a7ed2ace540bb81fe028456ae1ae9) ) + ROM_LOAD( "protdata.bin", 0x00000, 0x200, CRC(d61f4f07) SHA1(29485bce6e3a7ed2ace540bb81fe028456ae1ae9) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "u14", 0x00000, 0x40000, CRC(28a62d23) SHA1(24dbe6229647032599e02225de57650205dce5c3) ) ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2827,12 +2839,12 @@ ROM_START( cookbib2 ) ROM_LOAD16_BYTE( "unico_01.ui12", 0x00000, 0x40000, CRC(65aafde2) SHA1(01f9f261527c35182f0445d641d987aa86ad750f) ) // 27C020 ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "unico_07.u1", 0x00000, 0x10000 , CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) // 27C512 + ROM_LOAD( "unico_07.u1", 0x00000, 0x10000, CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) // 27C512 ROM_REGION( 0x2000, "protection", 0 ) /* P87C52EBPN (XSC6407A) Code (8052) */ - ROM_LOAD( "p87c52ebpn.bin", 0x0000, 0x2000 , CRC(ef042cef) SHA1(3089d5a3cb5ed663a8d89d59e427a06cffcd6219) ) /* dumped via laser glitching */ + ROM_LOAD( "p87c52ebpn.bin", 0x0000, 0x2000, CRC(ef042cef) SHA1(3089d5a3cb5ed663a8d89d59e427a06cffcd6219) ) /* dumped via laser glitching */ - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "unico_06.uj15", 0x00000, 0x20000, CRC(5e6f76b8) SHA1(725800143dfeaa6093ed5fcc5b9f15678ae9e547) ) // 27C010 ROM_REGION( 0x140000, "gfx1", 0 ) /* Sprites */ @@ -2848,12 +2860,12 @@ ROM_START( cookbib2a ) ROM_LOAD16_BYTE( "unico.ui12", 0x00000, 0x40000, CRC(0d09ecf5) SHA1(16f787638041d38ee2567ca958ca4405324cf5fa) ) // both program ROMs are 27C020 ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "unico_07.u1", 0x00000, 0x10000 , CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) // 27C512 + ROM_LOAD( "unico_07.u1", 0x00000, 0x10000, CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) // 27C512 ROM_REGION( 0x2000, "protection", 0 ) /* P87C52EBPN (XSC6407A) Code (8052) */ - ROM_LOAD( "p87c52ebpn.bin", 0x0000, 0x2000 , CRC(ef042cef) SHA1(3089d5a3cb5ed663a8d89d59e427a06cffcd6219) ) /* dumped via laser glitching */ + ROM_LOAD( "p87c52ebpn.bin", 0x0000, 0x2000, CRC(ef042cef) SHA1(3089d5a3cb5ed663a8d89d59e427a06cffcd6219) ) /* dumped via laser glitching */ - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "unico_06.uj15", 0x00000, 0x20000, CRC(5e6f76b8) SHA1(725800143dfeaa6093ed5fcc5b9f15678ae9e547) ) // 27C010 ROM_REGION( 0x140000, "gfx1", 0 ) /* Sprites */ @@ -2869,19 +2881,19 @@ ROM_START( cookbib2b ) ROM_LOAD16_BYTE( "ui12.020", 0x00000, 0x40000, CRC(bdbcd0d1) SHA1(9a6a85a492c21f6dd5daef964071a8a1c62f73c8) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u1.512", 0x00000, 0x10000 , CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) + ROM_LOAD( "u1.512", 0x00000, 0x10000, CRC(f59f1c9a) SHA1(2830261fd55249e015514fcb4cf8392e83b7fd0d) ) ROM_REGION( 0x2000, "protection", 0 ) /* P87C52EBPN (XSC6407A) Code (8052) */ - ROM_LOAD( "87c52.mcu", 0x0000, 0x2000 , NO_DUMP ) /* not dumped yet */ + ROM_LOAD( "87c52.mcu", 0x0000, 0x2000, NO_DUMP ) /* not dumped yet */ - ROM_REGION( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there this one is hacked from the cookbib2 one, absolute code jump needed to be changed at least */ ROM_LOAD16_WORD_SWAP( "protdata_alt.bin", 0x000, 0x200, BAD_DUMP CRC(bc136ead) SHA1(96459c2ccf7f95880421ba082c2414fa1040f3ed) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "uj15.010", 0x00000, 0x20000, CRC(5e6f76b8) SHA1(725800143dfeaa6093ed5fcc5b9f15678ae9e547) ) ROM_REGION( 0x180000, "gfx1", 0 ) /* Sprites */ @@ -2898,19 +2910,19 @@ ROM_START( cookbib2c ) // no ROM matches any of the other sets ROM_LOAD16_BYTE( "unico.ui12", 0x00000, 0x40000, CRC(ed49a0e5) SHA1(fbb6c45559d82ec84253aac5e4e6ff0a8c4d04e0) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "unico.u1", 0x00000, 0x10000 , CRC(f1100b20) SHA1(92c78e028e9020743b68744a759a11638cf2c971) ) + ROM_LOAD( "unico.u1", 0x00000, 0x10000, CRC(f1100b20) SHA1(92c78e028e9020743b68744a759a11638cf2c971) ) ROM_REGION( 0x2000, "protection", 0 ) /* P87C52EBPN (XSC6407A) Code (8052) */ - ROM_LOAD( "87c52.mcu", 0x0000, 0x2000 , NO_DUMP ) /* not dumped yet */ + ROM_LOAD( "87c52.mcu", 0x0000, 0x2000, NO_DUMP ) /* not dumped yet */ - ROM_REGION( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there this one is hacked from the old cookbib2 one, absolute code jump needed to be changed at least */ ROM_LOAD16_WORD_SWAP( "protdata.bin", 0x000, 0x200, BAD_DUMP CRC(b956f056) SHA1(aa9a73e8546b027ae8ef30b03524d302d07cae92) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "unico.uj15", 0x00000, 0x20000, CRC(ae5cc9e5) SHA1(f001c00fea76795ad2d7f4f0e436abecbc7ff00d) ) ROM_REGION( 0x140000, "gfx1", 0 ) /* Sprites */ @@ -2925,21 +2937,21 @@ ROM_START( cookbib3 ) ROM_LOAD16_BYTE( "u74.bin", 0x00000, 0x40000, CRC(c4ab8435) SHA1(7f97d3deafb3eb5412a44308ef20d3317405e94c) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u35.bin", 0x0c000, 0x4000 , CRC(5dfd2a98) SHA1(193c0cd9272144c25cbc3660967424d34d0da185) ) /* bit strange but verified, not the first time SemiCom have done this, see bcstory.. */ + ROM_LOAD( "u35.bin", 0x0c000, 0x4000, CRC(5dfd2a98) SHA1(193c0cd9272144c25cbc3660967424d34d0da185) ) /* bit strange but verified, not the first time SemiCom have done this, see bcstory.. */ ROM_CONTINUE(0x8000,0x4000) ROM_CONTINUE(0x4000,0x4000) ROM_CONTINUE(0x0000,0x4000) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200 , CRC(c819b9a8) SHA1(1d425e8c9940c0e691149e5406dd71808bd73832) ) + ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, CRC(c819b9a8) SHA1(1d425e8c9940c0e691149e5406dd71808bd73832) ) /* the 'empty' pattern continued after 0x200 but the game doesn't use it or attempt to decrypt it */ - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "u14.bin", 0x00000, 0x20000, CRC(e5bf9288) SHA1(12fb9542f9105fe1a21a74a08cda4d6372b984ee) ) ROM_REGION( 0x180000, "gfx1", 0 ) /* Sprites */ @@ -2954,9 +2966,9 @@ ROM_START( 4in1boot ) /* snow bros, tetris, hyperman 1, pacman 2 */ ROM_LOAD16_BYTE( "u74", 0x00000, 0x80000, CRC(e22d3fa2) SHA1(020ab92d8cbf37a9f8186a81934abb97088c16f9) ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "u35", 0x00000, 0x10000 , CRC(c894ac80) SHA1(ee896675b5205ab2dbd0cbb13db16aa145391d06) ) + ROM_LOAD( "u35", 0x00000, 0x10000, CRC(c894ac80) SHA1(ee896675b5205ab2dbd0cbb13db16aa145391d06) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "u14", 0x00000, 0x40000, CRC(94b09b0e) SHA1(414de3e36eff85126038e8ff74145b35076e0a43) ) ROM_REGION( 0x200000, "gfx1", 0 ) /* Sprites */ @@ -2969,8 +2981,8 @@ ROM_START( snowbro3 ) ROM_LOAD16_BYTE( "ur3", 0x00001, 0x20000, CRC(3f32fa15) SHA1(1402c173c1df142ff9dd7b859689c075813a50e5) ) /* the sound is driven by an MCU */ - ROM_REGION( 0x10000, "cpu2", 0 ) - ROM_LOAD( "sound.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) + ROM_LOAD( "sound.mcu", 0x00000, 0x10000, NO_DUMP ) ROM_REGION( 0x80000, "gfx1", 0 ) ROM_LOAD( "ua5", 0x000000, 0x80000, CRC(0604e385) SHA1(96acbc65a8db89a7be100f852dc07ba9a0313167) ) /* 16x16 tiles */ @@ -2979,9 +2991,8 @@ ROM_START( snowbro3 ) ROM_LOAD( "un7", 0x000000, 0x200000, CRC(4a79da4c) SHA1(59207d116d39b9ee25c51affe520f5fdff34e536) ) ROM_LOAD( "un8", 0x200000, 0x200000, CRC(7a4561a4) SHA1(1dd823369c09368d1f0ec8e1cb85d700f10ff448) ) - ROM_REGION( 0x100000, "oki", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "us5", 0x00000, 0x20000, CRC(7c6368ef) SHA1(53393c570c605f7582b61c630980041e2ed32e2d) ) - ROM_CONTINUE(0x80000,0x60000) + ROM_REGION( 0x80000, "oki1", 0 ) /* OKIM6295 samples */ + ROM_LOAD( "us5", 0x00000, 0x80000, CRC(7c6368ef) SHA1(53393c570c605f7582b61c630980041e2ed32e2d) ) ROM_END ROM_START( ballboy ) @@ -2990,8 +3001,8 @@ ROM_START( ballboy ) ROM_LOAD16_BYTE( "27c010.ur3", 0x00001, 0x20000, CRC(a9c1fdda) SHA1(efb7eaab993f99d89d3b9c159c3b8eb18ace9c2c) ) /* the sound is driven by an MCU */ - ROM_REGION( 0x10000, "cpu2", 0 ) - ROM_LOAD( "sound.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) + ROM_LOAD( "sound.mcu", 0x00000, 0x10000, NO_DUMP ) ROM_REGION( 0x80000, "gfx1", 0 ) ROM_LOAD( "27c040.ua5", 0x000000, 0x80000, CRC(0604e385) SHA1(96acbc65a8db89a7be100f852dc07ba9a0313167) ) /* 16x16 tiles */ @@ -3000,9 +3011,8 @@ ROM_START( ballboy ) ROM_LOAD( "27c160.un7", 0x000000, 0x200000, CRC(4a79da4c) SHA1(59207d116d39b9ee25c51affe520f5fdff34e536) ) ROM_LOAD( "27c160.un8", 0x200000, 0x200000, CRC(bfef8c44) SHA1(86930cfcaedbd111d5b985e87a76d2211d2ce2ec) ) - ROM_REGION( 0x100000, "oki", 0 ) /* OKIM6295 samples */ - ROM_LOAD( "27c040.us5", 0x00000, 0x20000, CRC(7c6368ef) SHA1(53393c570c605f7582b61c630980041e2ed32e2d) ) - ROM_CONTINUE(0x80000,0x60000) + ROM_REGION( 0x80000, "oki1", 0 ) /* OKIM6295 samples */ + ROM_LOAD( "27c040.us5", 0x00000, 0x80000, CRC(7c6368ef) SHA1(53393c570c605f7582b61c630980041e2ed32e2d) ) ROM_END @@ -3012,8 +3022,8 @@ ROM_START( ballboy3p ) //PCB etched JOYCUS1B and 2001927 ROM_LOAD16_BYTE( "ur3", 0x00001, 0x20000, CRC(4d462a75) SHA1(30a84a618bea5c64201329d02847382c2d0c84ba) ) // the sound is driven by an MCU - ROM_REGION( 0x10000, "cpu2", 0 ) - ROM_LOAD( "sound.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) + ROM_LOAD( "sound.mcu", 0x00000, 0x10000, NO_DUMP ) ROM_REGION( 0x80000, "gfx1", 0 ) ROM_LOAD( "ua5", 0x000000, 0x80000, CRC(fc72011f) SHA1(f1f10b34fd3365c6542299bd0224dad926d650b4) ) // 16x16 tiles @@ -3021,9 +3031,8 @@ ROM_START( ballboy3p ) //PCB etched JOYCUS1B and 2001927 ROM_REGION( 0x400000, "gfx2", 0 ) // 16x16 BG Tiles ROM_LOAD( "un7", 0x000000, 0x400000, CRC(fe427e9d) SHA1(6932ad18b6807af860f8430e2a00e959d6c36a23) ) - ROM_REGION( 0x100000, "oki", 0 ) // OKIM6295 samples - ROM_LOAD( "us5", 0x00000, 0x20000, CRC(7c6368ef) SHA1(53393c570c605f7582b61c630980041e2ed32e2d) ) // only ROM identical to the 2 player version - ROM_CONTINUE(0x80000,0x60000) + ROM_REGION( 0x80000, "oki1", 0 ) // OKIM6295 samples + ROM_LOAD( "us5", 0x00000, 0x80000, CRC(7c6368ef) SHA1(53393c570c605f7582b61c630980041e2ed32e2d) ) // only ROM identical to the 2 player version ROM_END @@ -3045,18 +3054,18 @@ ROM_START( finalttr ) // also seen on a PCB with half sized GFX ROMs ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ ROM_LOAD( "12.5r", 0x00000, 0x10000, CRC(4bc21361) SHA1(dab9bea665c0f2fd7cee8ab7f3762e427911bcca) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real rom but instead the data extracted from shared ram, the MCU puts it there */ - ROM_LOAD16_WORD_SWAP( "protdata.bin", 0x00000, 0x200 , CRC(d5bbb006) SHA1(2f9ce6c4f4f5a304a807134da9c85c68a7b49200) ) + ROM_LOAD16_WORD_SWAP( "protdata.bin", 0x00000, 0x200, CRC(d5bbb006) SHA1(2f9ce6c4f4f5a304a807134da9c85c68a7b49200) ) /* after 0xc7 the data read seems meaningless garbage, it doesn't appear to stop at 0x102200, might be worth going back and checking if its simply random values due to ram not being cleared, or actual data */ - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "11.7p", 0x00000, 0x20000, CRC(2e331022) SHA1(1e74c66d16eb9c8ae04acecbb4040dea037492cc) ) ROM_REGION( 0x100000, "gfx1", 0 ) /* Sprites */ @@ -3067,23 +3076,22 @@ ROM_START( finalttr ) // also seen on a PCB with half sized GFX ROMs ROM_END - +// 수호성 ROM_START( suhosong ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "su_ho_sung.uh12", 0x00001, 0x20000, CRC(6bd8bd08) SHA1(668398c9c77cc4cc52858daefd3cb13fbaf29a37) ) ROM_LOAD16_BYTE( "su_ho_sung.ui12", 0x00000, 0x20000, CRC(79a4806e) SHA1(a4080ea70fa588ada384ffa9877f5cf965fb68df) ) - ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ - ROM_LOAD( "su_ho_sung.u1", 0x00000, 0x10000 , CRC(509ce74e) SHA1(a93add5ab674671078b55128281dcf9b0db46617) ) + ROM_LOAD( "su_ho_sung.u1", 0x00000, 0x10000, CRC(509ce74e) SHA1(a93add5ab674671078b55128281dcf9b0db46617) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", ROMREGION_ERASE00 ) /* Data from Shared RAM */ - ROM_LOAD16_WORD( "protdata.bin", 0x000, 0x200 , CRC(4478e251) SHA1(08489d6bfe5503c8eb62909e56a07193a922b4c1) ) + ROM_REGION16_BE( 0x200, "protdata", ROMREGION_ERASE00 ) /* Data from Shared RAM */ + ROM_LOAD16_WORD( "protdata.bin", 0x000, 0x200, CRC(4478e251) SHA1(08489d6bfe5503c8eb62909e56a07193a922b4c1) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "su_ho_sung.uj15", 0x00000, 0x40000, CRC(266fcae8) SHA1(0f15f880bde0c12b5c663ed387f9353c13b731b6) ) ROM_REGION( 0x180000, "gfx1", 0 ) /* Sprites */ @@ -3092,7 +3100,7 @@ ROM_START( suhosong ) ROM_LOAD( "su_ho_sung.ua6", 0x100000, 0x80000, CRC(92fea02c) SHA1(946c7bf55354875a1581ce484cb185b640f74166) ) ROM_END - +// Puzzle 윷놀이 ROM_START( yutnori ) ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_BYTE( "sys_d0-d7", 0x000001, 0x20000, CRC(d5c853da) SHA1(578f29c3a307f82fcaa23a7fe2931c0a673e777e) ) @@ -3113,8 +3121,8 @@ ROM_START( yutnori ) ROM_LOAD("voice_rom", 0x000000, 0x040000, CRC(25e85201) SHA1(6c0001e2942f49b62e1bbf3a68c59abad1e2f94c) ) ROM_END - -ROM_START( sutjarod ) // 숫자로 해요 Deluxe +// 숫자로 해요 Deluxe +ROM_START( sutjarod ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "ul12_am27c512.bin", 0x00000, 0x10000, CRC(50e2563c) SHA1(d02e0805ae5aa5058e8c096f4265603006de2a6d) ) ROM_LOAD16_BYTE( "uh12_am27c512.bin", 0x00001, 0x10000, CRC(dc7e036c) SHA1(90a9b29b3f776e26303ccfa74800501152e05ceb) ) @@ -3122,10 +3130,10 @@ ROM_START( sutjarod ) // 숫자로 해요 Deluxe ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ ROM_LOAD( "u1_am27c512.bin", 0x00000, 0x10000, CRC(c6e31c4a) SHA1(178e10432d9d1096ac0d11b0da9e5441279f5ffe) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ /* this is not a real ROM but instead the data extracted from shared RAM - the MCU puts it there @@ -3135,7 +3143,7 @@ ROM_START( sutjarod ) // 숫자로 해요 Deluxe */ ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, BAD_DUMP CRC(c819b9a8) SHA1(1d425e8c9940c0e691149e5406dd71808bd73832) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "uj15_tms27c010a.bin", 0x00000, 0x20000, CRC(da9dea73) SHA1(b72da82686054dbbe423724fecf0e58966b0ea45) ) ROM_REGION( 0x100000, "gfx1", 0 ) /* Sprites */ @@ -3143,7 +3151,7 @@ ROM_START( sutjarod ) // 숫자로 해요 Deluxe ROM_LOAD( "ua5_am27c040.bin", 0x80000, 0x80000, CRC(b286427d) SHA1(ee7f98a9d451b901c211326bff6b3ed4e2c1b76f) ) ROM_END - +// 과수원 ROM_START( gwasu ) ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "ul12_tms27c010a.bin", 0x00000, 0x20000, CRC(af76012a) SHA1(05177440db95d15ade683d13a255043a2bfb6a5c) ) @@ -3152,14 +3160,14 @@ ROM_START( gwasu ) ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */ ROM_LOAD( "u1_am27c512.bin", 0x00000, 0x10000, CRC(91127141) SHA1(03b6f55fa6ce4fee4cfb350768d0f0b1f0049944) ) - ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */ - ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) + ROM_REGION( 0x10000, "mcu", 0 ) /* Intel 87C52 MCU Code */ + ROM_LOAD( "87c52.mcu", 0x00000, 0x10000, NO_DUMP ) - ROM_REGION16_BE( 0x200, "user1", 0 ) /* Data from Shared RAM */ + ROM_REGION16_BE( 0x200, "protdata", 0 ) /* Data from Shared RAM */ // see note in sutjarod, same workaround is being used ROM_LOAD16_WORD( "protdata.bin", 0x00000, 0x200, BAD_DUMP CRC(c819b9a8) SHA1(1d425e8c9940c0e691149e5406dd71808bd73832) ) - ROM_REGION( 0x040000, "oki", 0 ) /* Samples */ + ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */ ROM_LOAD( "uj15_tms27c010a.bin", 0x00000, 0x20000, CRC(a3c3fe53) SHA1(318e017b86e96f3adda830216fe6da3680a7cfab) ) ROM_REGION( 0x100000, "gfx1", 0 ) /* Sprites */ @@ -3168,7 +3176,7 @@ ROM_START( gwasu ) ROM_END -void snowbros_state::init_cookbib2() +void semicom_state::init_cookbib2() { save_item(NAME(m_semicom_prot_offset)); @@ -3176,19 +3184,19 @@ void snowbros_state::init_cookbib2() } -uint16_t snowbros_state::_4in1_02_read() +u16 semicom_state::_4in1_02_read() { return 0x0202; } -void snowbros_state::init_4in1boot() +void semicom_state::init_4in1boot() { - uint8_t *src = memregion("maincpu")->base(); + u8 *src = memregion("maincpu")->base(); int len = memregion("maincpu")->bytes(); /* strange order */ { - std::vector buffer(len); + std::vector buffer(len); for (int i = 0;i < len; i++) if (i & 1) buffer[i] = bitswap<8>(src[i],6,7,5,4,3,2,1,0); else buffer[i] = src[i]; @@ -3201,62 +3209,59 @@ void snowbros_state::init_4in1boot() /* strange order */ { - std::vector buffer(len); + std::vector buffer(len); for (int i = 0;i < len; i++) buffer[i] = src[i^0x4000]; memcpy(src,&buffer[0],len); } - m_maincpu->space(AS_PROGRAM).install_read_handler(0x200000, 0x200001, read16smo_delegate(*this, FUNC(snowbros_state::_4in1_02_read))); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x200000, 0x200001, read16smo_delegate(*this, FUNC(semicom_state::_4in1_02_read))); } -void snowbros_state::init_snowbro3() +void snowbros3_state::init_snowbro3() { - uint8_t *src = memregion("maincpu")->base(); + u8 *src = memregion("maincpu")->base(); int len = memregion("maincpu")->bytes(); /* strange order */ { - std::vector buffer(len); + std::vector buffer(len); for (int i = 0;i < len; i++) buffer[i] = src[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6,5,3,4,1,2,0)]; memcpy(src,&buffer[0],len); } - - save_item(NAME(m_sb3_music_is_playing)); - save_item(NAME(m_sb3_music)); } -void snowbros_state::init_ballboy3p() +void snowbros3_state::init_ballboy3p() { init_snowbro3(); m_maincpu->space(AS_PROGRAM).unmap_write(0x400000, 0x400001); // unmap flipscreen as the DSW has been removed in favor of the controls for the 3rd player } -uint16_t snowbros_state::_3in1_read() +u16 semicom_state::_3in1_read() { return 0x000a; } -void snowbros_state::init_3in1semi() +void semicom_state::init_3in1semi() { - m_maincpu->space(AS_PROGRAM).install_read_handler(0x200000, 0x200001, read16smo_delegate(*this, FUNC(snowbros_state::_3in1_read))); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x200000, 0x200001, read16smo_delegate(*this, FUNC(semicom_state::_3in1_read))); } -uint16_t snowbros_state::cookbib3_read() +u16 semicom_state::cookbib3_read() { return 0x2a2a; } -void snowbros_state::init_cookbib3() +void semicom_state::init_cookbib3() { - m_maincpu->space(AS_PROGRAM).install_read_handler(0x200000, 0x200001, read16smo_delegate(*this, FUNC(snowbros_state::cookbib3_read))); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x200000, 0x200001, read16smo_delegate(*this, FUNC(semicom_state::cookbib3_read))); } -void snowbros_state::init_sutjarod() +void semicom_state::init_sutjarod() { - uint16_t *rom = (uint16_t*)memregion("maincpu")->base(); + u16 *rom = (u16*)memregion("maincpu")->base(); // patch RAM decrypt key in ROM to be the same as cookbib3 rom[0xb994 / 2] = 0x434b; rom[0xb996 / 2] = 0x3345; @@ -3266,10 +3271,10 @@ void snowbros_state::init_sutjarod() rom[0x54 / 2] = 0x2508; } -void snowbros_state::init_gwasu() +void semicom_state::init_gwasu() { // same reason for patch as init_sutjarod - uint16_t *rom = (uint16_t*)memregion("maincpu")->base(); + u16 *rom = (u16*)memregion("maincpu")->base(); rom[0xfda8 / 2] = 0x434b; rom[0xfdaa / 2] = 0x3345; @@ -3279,17 +3284,17 @@ void snowbros_state::init_gwasu() -void snowbros_state::init_pzlbreak() +void semicom_state::init_pzlbreak() { m_pandora->set_bg_pen(0xc0); } -void snowbros_state::init_toto() +void snowbros_pandora_state::init_toto() { // every single rom has bits 0x10 and 0x08 swapped - uint8_t *src = memregion("maincpu")->base(); + u8 *src = memregion("maincpu")->base(); int len = memregion("maincpu")->bytes(); for (int i = 0; i < len; i++) @@ -3314,17 +3319,17 @@ void snowbros_state::init_toto() } // protection? (just return 0x07) - m_maincpu->space(AS_PROGRAM).install_read_handler(0x500006, 0x500007, read16s_delegate(*this, FUNC(snowbros_state::toto_read))); + m_maincpu->space(AS_PROGRAM).install_read_handler(0x500006, 0x500007, read16s_delegate(*this, FUNC(snowbros_pandora_state::toto_read))); } -void snowbros_state::init_hyperpac() +void semicom_state::init_hyperpac() { save_item(NAME(m_semicom_prot_offset)); m_semicom_prot_base = 0xe000 / 2; } -void snowbros_state::init_yutnori() +void snowbros_pandora_state::init_yutnori() { m_yutnori_prot_val = 0; m_pandora->set_bg_pen(0xf0); @@ -3332,56 +3337,56 @@ void snowbros_state::init_yutnori() } -GAME( 1990, snowbros, 0, snowbros, snowbros, snowbros_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, snowbrosa, snowbros, snowbros, snowbros, snowbros_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, snowbrosb, snowbros, snowbros, snowbros, snowbros_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 3)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, snowbrosc, snowbros, snowbros, snowbros, snowbros_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 4)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, snowbrosj, snowbros, snowbros, snowbroj, snowbros_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, snowbrosd, snowbros, snowbros, snowbroj, snowbros_state, empty_init, ROT0, "Toaplan (Dooyong license)", "Snow Bros. - Nick & Tom (Dooyong license)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, wintbob, snowbros, wintbob, snowbros, snowbros_state, empty_init, ROT0, "bootleg (Sakowa Project Korea)", "The Winter Bobble (bootleg of Snow Bros.)", MACHINE_SUPPORTS_SAVE ) -GAME( 1990, snowbroswb, snowbros, wintbob, snowbros, snowbros_state, empty_init, ROT0, "bootleg", "Snow Bros. - Nick & Tom (The Winter Bobble hardware bootleg)", MACHINE_SUPPORTS_SAVE ) // this was probably unhacked back from the more common Winter Bobble to make it look more original +GAME( 1990, snowbros, 0, snowbros, snowbros, snowbros_pandora_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, snowbrosa, snowbros, snowbros, snowbros, snowbros_pandora_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, snowbrosb, snowbros, snowbros, snowbros, snowbros_pandora_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 3)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, snowbrosc, snowbros, snowbros, snowbros, snowbros_pandora_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (set 4)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, snowbrosj, snowbros, snowbros, snowbroj, snowbros_pandora_state, empty_init, ROT0, "Toaplan", "Snow Bros. - Nick & Tom (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, snowbrosd, snowbros, snowbros, snowbroj, snowbros_pandora_state, empty_init, ROT0, "Toaplan (Dooyong license)", "Snow Bros. - Nick & Tom (Dooyong license)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, wintbob, snowbros, wintbob, snowbros, snowbros_state, empty_init, ROT0, "bootleg (Sakowa Project Korea)", "The Winter Bobble (bootleg of Snow Bros.)", MACHINE_SUPPORTS_SAVE ) +GAME( 1990, snowbroswb, snowbros, wintbob, snowbros, snowbros_state, empty_init, ROT0, "bootleg", "Snow Bros. - Nick & Tom (The Winter Bobble hardware bootleg)", MACHINE_SUPPORTS_SAVE ) // this was probably unhacked back from the more common Winter Bobble to make it look more original -GAME( 1996, toto, 0, snowbros, snowbros, snowbros_state, init_toto, ROT0, "SoftClub", "Come Back Toto", MACHINE_SUPPORTS_SAVE ) // modified from 'snowbros' code +GAME( 1996, toto, 0, snowbros, toto, snowbros_pandora_state, init_toto, ROT0, "SoftClub", "Come Back Toto", MACHINE_SUPPORTS_SAVE ) // modified from 'snowbros' code // none of the games below are on genuine SnowBros hardware, but they clone the functionality of it. // SemiCom / Jeil titles are protected, a dumb MCU copies code into RAM at startup, some also check for a specific return value from an address on startup. -GAME( 1993, finalttr, 0, finalttr, finalttr, snowbros_state, empty_init, ROT0, "Jeil Computer System", "Final Tetris", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, hyperpac, 0, semicom_mcu, hyperpac, snowbros_state, init_hyperpac, ROT0, "SemiCom", "Hyper Pacman", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, hyperpacb, hyperpac, semicom, hyperpac, snowbros_state, empty_init, ROT0, "bootleg", "Hyper Pacman (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, cookbib2, 0, semicom_mcu, cookbib2, snowbros_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English, set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, cookbib2a, cookbib2, semicom_mcu, cookbib2, snowbros_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English, set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, cookbib2b, cookbib2, semiprot, cookbib2, snowbros_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English, set 3)", MACHINE_SUPPORTS_SAVE ) // older? test mode looks even worse on this, but neither shows the correct dip info anyway -GAME( 1996, cookbib2c, cookbib2, semiprot, cookbib2c,snowbros_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English / Korean)", MACHINE_SUPPORTS_SAVE ) // in this set the language switch actually works but its effects are inverted to what test mode shows. Sticker on PCB shows 95 so maybe earliest set? -GAME( 1996, toppyrap, 0, semiprot, toppyrap, snowbros_state, empty_init, ROT0, "SemiCom", "Toppy & Rappy", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, sutjarod, 0, semiprot, sutjarod, snowbros_state, init_sutjarod, ROT0, "SemiCom", "Sutjaro Haeyo Deluxe (Korea)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // playable, but left as not working until protection data is extracted -GAME( 1997, gwasu, 0, semiprot, gwasu, snowbros_state, init_gwasu, ROT0, "SemiCom / DMD", "Gwasuwon (Korea)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // playable, but left as not working until protection data is extracted -GAME( 1997, cookbib3, 0, semiprot, cookbib3, snowbros_state, init_cookbib3, ROT0, "SemiCom", "Cookie & Bibi 3", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, pzlbreak, 0, semiprot, pzlbreak, snowbros_state, init_pzlbreak, ROT0, "SemiCom / Tirano", "Puzzle Break (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, pzlbreaka, pzlbreak, semiprot, pzlbreak, snowbros_state, init_pzlbreak, ROT0, "SemiCom / Tirano", "Puzzle Break (set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, suhosong, 0, semiprot, suhosong, snowbros_state, empty_init, ROT0, "SemiCom", "Su Ho Seong (Korea)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, twinkle, 0, semiprot, twinkle, snowbros_state, empty_init, ROT0, "SemiCom / Tirano", "Twinkle (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, twinklea, twinkle, semiprot, twinkle, snowbros_state, empty_init, ROT0, "SemiCom / Tirano", "Twinkle (set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1998, 3in1semi, 0, semiprot, moremore, snowbros_state, init_3in1semi, ROT0, "SemiCom / XESS", "New HyperMan (3-in-1 with Cookie & Bibi & HyperMan) (set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1998, 3in1semia, 3in1semi, semiprot, moremore, snowbros_state, init_3in1semi, ROT0, "SemiCom / XESS", "New HyperMan (3-in-1 with Cookie & Bibi & HyperMan) (set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, mcheonru, 0, semiprot, mcheonru, snowbros_state, init_3in1semi, ROT0, "SemiCom / AceVer", "Ma Cheon Ru (Korea)", MACHINE_SUPPORTS_SAVE ) // a flyer exists for an English version called Arirang, AceVer team logo is displayed on it -GAME( 1999, moremore, 0, semiprot, moremore, snowbros_state, init_3in1semi, ROT0, "SemiCom / Exit", "More More", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, moremorp, 0, semiprot, moremore, snowbros_state, init_3in1semi, ROT0, "SemiCom / Exit", "More More Plus", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, finalttr, 0, finalttr, finalttr, semicom_state, empty_init, ROT0, "Jeil Computer System", "Final Tetris", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, hyperpac, 0, semicom_mcu, hyperpac, semicom_state, init_hyperpac, ROT0, "SemiCom", "Hyper Pacman", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, hyperpacb, hyperpac, semicom, hyperpac, semicom_state, empty_init, ROT0, "bootleg", "Hyper Pacman (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, cookbib2, 0, semicom_mcu, cookbib2, semicom_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, cookbib2a, cookbib2, semicom_mcu, cookbib2, semicom_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English, set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, cookbib2b, cookbib2, semiprot, cookbib2, semicom_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English, set 3)", MACHINE_SUPPORTS_SAVE ) // older? test mode looks even worse on this, but neither shows the correct dip info anyway +GAME( 1996, cookbib2c, cookbib2, semiprot, cookbib2c, semicom_state, init_cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2 (English / Korean)", MACHINE_SUPPORTS_SAVE ) // in this set the language switch actually works but its effects are inverted to what test mode shows. Sticker on PCB shows 95 so maybe earliest set? +GAME( 1996, toppyrap, 0, semiprot, toppyrap, semicom_state, empty_init, ROT0, "SemiCom", "Toppy & Rappy", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, sutjarod, 0, semiprot, sutjarod, semicom_state, init_sutjarod, ROT0, "SemiCom", "Sutjaro Haeyo Deluxe (Korea)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // playable, but left as not working until protection data is extracted +GAME( 1997, gwasu, 0, semiprot, gwasu, semicom_state, init_gwasu, ROT0, "SemiCom / DMD", "Gwasuwon (Korea)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // playable, but left as not working until protection data is extracted +GAME( 1997, cookbib3, 0, semiprot, cookbib3, semicom_state, init_cookbib3, ROT0, "SemiCom", "Cookie & Bibi 3", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, pzlbreak, 0, semiprot, pzlbreak, semicom_state, init_pzlbreak, ROT0, "SemiCom / Tirano", "Puzzle Break (set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, pzlbreaka, pzlbreak, semiprot, pzlbreak, semicom_state, init_pzlbreak, ROT0, "SemiCom / Tirano", "Puzzle Break (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, suhosong, 0, semiprot, suhosong, semicom_state, empty_init, ROT0, "SemiCom", "Suhoseong (Korea)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, twinkle, 0, semiprot, twinkle, semicom_state, empty_init, ROT0, "SemiCom / Tirano", "Twinkle (set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, twinklea, twinkle, semiprot, twinkle, semicom_state, empty_init, ROT0, "SemiCom / Tirano", "Twinkle (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1998, 3in1semi, 0, semiprot, moremore, semicom_state, init_3in1semi, ROT0, "SemiCom / XESS", "New HyperMan (3-in-1 with Cookie & Bibi & HyperMan) (set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1998, 3in1semia, 3in1semi, semiprot, moremore, semicom_state, init_3in1semi, ROT0, "SemiCom / XESS", "New HyperMan (3-in-1 with Cookie & Bibi & HyperMan) (set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1999, mcheonru, 0, semiprot, mcheonru, semicom_state, init_3in1semi, ROT0, "SemiCom / AceVer", "Macheonlu (Korea)", MACHINE_SUPPORTS_SAVE ) // a flyer exists for an English version called Arirang, AceVer team logo is displayed on it +GAME( 1999, moremore, 0, semiprot, moremore, semicom_state, init_3in1semi, ROT0, "SemiCom / Exit", "Puzzle Express More More (Korea)", MACHINE_SUPPORTS_SAVE ) // korean title screen, english title call +GAME( 1999, moremorp, 0, semiprot, moremore, semicom_state, init_3in1semi, ROT0, "SemiCom / Exit", "Puzzle Express More More Plus", MACHINE_SUPPORTS_SAVE ) // vice versa of above // This is very similar to the SemiCom titles, but unprotected. -GAME( 2002, 4in1boot, 0, _4in1, 4in1boot, snowbros_state, init_4in1boot, ROT0, "K1 Soft", "Puzzle King (PacMan 2, Tetris, HyperMan 2, Snow Bros.)" , MACHINE_SUPPORTS_SAVE ) +GAME( 2002, 4in1boot, 0, _4in1, 4in1boot, semicom_state, init_4in1boot, ROT0, "K1 Soft", "Puzzle King (PacMan 2, Tetris, HyperMan 2, Snow Bros.)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, honeydol, 0, honeydol, honeydol, snowbros_state, empty_init, ROT0, "Barko Corp.", "Honey Doll", MACHINE_SUPPORTS_SAVE ) // based on snowbros code.. +GAME( 1995, honeydol, 0, honeydol, honeydol, snowbros_state, empty_init, ROT0, "Barko Corp.", "Honey Doll", MACHINE_SUPPORTS_SAVE ) // based on snowbros code.. -GAME( 1995, twinadv, 0, twinadv, twinadv, snowbros_state, empty_init, ROT0, "Barko Corp.", "Twin Adventure (World)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, twinadvk, twinadv, twinadv, twinadv, snowbros_state, empty_init, ROT0, "Barko Corp.", "Twin Adventure (Korea)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, multi96, twinadv, twinadv, twinadv, snowbros_state, empty_init, ROT0, "Barko Corp.", "Multi Game '96 (Italy)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, twinadv, 0, twinadv, twinadv, snowbros_state, empty_init, ROT0, "Barko Corp.", "Twin Adventure (World)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, twinadvk, twinadv, twinadv, twinadv, snowbros_state, empty_init, ROT0, "Barko Corp.", "Twin Adventure (Korea)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, multi96, twinadv, twinadv, twinadv, snowbros_state, empty_init, ROT0, "Barko Corp.", "Multi Game '96 (Italy)", MACHINE_SUPPORTS_SAVE ) // The Korean games database shows an earlier version of this called Ball Boy with a different title screen to the version of Ball Boy we have // http://mamedev.emulab.it/undumped/images/Ballboy.jpg // it is possible this 'ball boy' is the original bootleg, with snwobro3 being a hack of that, and the ballboy set we have a further hack of that // these use an MCU to drive the sound -GAME( 2002, snowbro3, 0, snowbro3, snowbroj, snowbros_state, init_snowbro3, ROT0, "Syrmex", "Snow Brothers 3 - Magical Adventure", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // hacked from SnowBros code but released as an original game -GAME( 2003, ballboy, snowbro3, snowbro3, snowbroj, snowbros_state, init_snowbro3, ROT0, "bootleg", "Ball Boy (2 players)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 2004, ballboy3p, snowbro3, snowbro3, ballboy3p, snowbros_state, init_ballboy3p, ROT0, "bootleg", "Ball Boy (3 players)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 2002, snowbro3, 0, snowbro3, snowbroj, snowbros3_state, init_snowbro3, ROT0, "Syrmex", "Snow Brothers 3 - Magical Adventure", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // hacked from SnowBros code but released as an original game +GAME( 2003, ballboy, snowbro3, snowbro3, snowbroj, snowbros3_state, init_snowbro3, ROT0, "bootleg", "Ball Boy (2 players)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 2004, ballboy3p, snowbro3, snowbro3, ballboy3p, snowbros3_state, init_ballboy3p, ROT0, "bootleg", "Ball Boy (3 players)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // protection appears to handle the sound, should check if it's just a block of code that is conditionally executed like some of the Semicom titles. -GAME( 1999, yutnori, 0, yutnori, yutnori, snowbros_state, init_yutnori, ROT0, "Nunal", "Puzzle Yutnori (Korea)", MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // Nunal is apparently Korean slang for Eyeball, hence the logo. Some places report 'JCC Soft' as the manufacturer +GAME( 1999, yutnori, 0, yutnori, yutnori, snowbros_pandora_state, init_yutnori, ROT0, "Nunal", "Puzzle Yutnori (Korea)", MACHINE_UNEMULATED_PROTECTION | MACHINE_NO_SOUND ) // Nunal is apparently Korean slang for Eyeball, hence the logo. Some places report 'JCC Soft' as the manufacturer diff --git a/src/mame/kaneko/snowbros.h b/src/mame/kaneko/snowbros.h index 41ec4c02cc9..680afc9a7ee 100644 --- a/src/mame/kaneko/snowbros.h +++ b/src/mame/kaneko/snowbros.h @@ -14,117 +14,172 @@ #include "emupal.h" #include "screen.h" - +// base class, no pandora chip class snowbros_state : public driver_device { public: snowbros_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), - m_maincpu(*this,"maincpu"), - m_soundcpu(*this, "soundcpu"), - m_oki(*this, "oki"), - m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette"), - m_screen(*this, "screen"), - m_soundlatch(*this, "soundlatch"), - m_pandora(*this, "pandora"), - m_hyperpac_ram(*this, "hyperpac_ram"), - m_bootleg_spriteram16(*this, "spriteram16b"), - m_semicom_prot_base(0) + : driver_device(mconfig, type, tag) + , m_maincpu(*this,"maincpu") + , m_soundcpu(*this, "soundcpu") + , m_oki(*this, "oki%u", 1U) + , m_gfxdecode(*this, "gfxdecode") + , m_palette(*this, "palette") + , m_screen(*this, "screen") + , m_soundlatch(*this, "soundlatch%u", 1U) + , m_bootleg_spriteram(*this, "spriteram") { } - void _4in1(machine_config &config); - void semiprot(machine_config &config); - void semicom_mcu(machine_config &config); - void yutnori(machine_config &config); - void snowbros(machine_config &config); - void semicom(machine_config &config); void twinadv(machine_config &config); void wintbob(machine_config &config); void honeydol(machine_config &config); - void snowbro3(machine_config &config); - void finalttr(machine_config &config); - void init_pzlbreak(); - void init_snowbro3(); - void init_ballboy3p(); - void init_cookbib3(); - void init_4in1boot(); - void init_3in1semi(); - void init_cookbib2(); - void init_toto(); - void init_hyperpac(); - void init_yutnori(); - void init_sutjarod(); - void init_gwasu(); - -private: +protected: required_device m_maincpu; optional_device m_soundcpu; - optional_device m_oki; + optional_device_array m_oki; optional_device m_gfxdecode; required_device m_palette; required_device m_screen; - optional_device m_soundlatch; // not snowbro3 + optional_device_array m_soundlatch; // not snowbro3 - optional_device m_pandora; - optional_shared_ptr m_hyperpac_ram; - optional_shared_ptr m_bootleg_spriteram16; + optional_shared_ptr m_bootleg_spriteram; - int m_sb3_music_is_playing = 0; - int m_sb3_music = 0; - uint8_t m_semicom_prot_offset = 0; - uint16_t m_semicom_prot_base; - uint16_t m_yutnori_prot_val = 0; + void bootleg_flipscreen_w(u8 data); + template void irq_ack_w(u16 data); + void twinadv_oki_bank_w(u8 data); - void snowbros_flipscreen_w(uint8_t data); - void bootleg_flipscreen_w(uint8_t data); - void snowbros_irq4_ack_w(uint16_t data); - void snowbros_irq3_ack_w(uint16_t data); - void snowbros_irq2_ack_w(uint16_t data); - void prot_p0_w(uint8_t data); - void prot_p1_w(uint8_t data); - void prot_p2_w(uint8_t data); - uint16_t sb3_sound_r(); - uint16_t _4in1_02_read(); - uint16_t _3in1_read(); - uint16_t cookbib3_read(); - void twinadv_oki_bank_w(uint8_t data); - void sb3_sound_w(uint16_t data); - uint16_t toto_read(offs_t offset, uint16_t mem_mask = ~0); - void yutnori_prot_w(uint16_t data); - uint16_t yutnori_prot_r(); + u32 screen_update_honeydol(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u32 screen_update_twinadv(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + u32 screen_update_wintbob(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - DECLARE_MACHINE_RESET(semiprot); - DECLARE_MACHINE_RESET(finalttr); + TIMER_DEVICE_CALLBACK_MEMBER(scanline); - uint32_t screen_update_snowbros(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_honeydol(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_twinadv(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_snowbro3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_wintbob(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void screen_vblank_snowbros(int state); + void snowbros_base(machine_config &config) ATTR_COLD; - TIMER_DEVICE_CALLBACK_MEMBER(snowbros_irq); - TIMER_DEVICE_CALLBACK_MEMBER(snowbros3_irq); - - void sb3_play_music(int data); - void sb3_play_sound(int data); - - void finalttr_map(address_map &map) ATTR_COLD; void honeydol_map(address_map &map) ATTR_COLD; void honeydol_sound_io_map(address_map &map) ATTR_COLD; void honeydol_sound_map(address_map &map) ATTR_COLD; - void hyperpac_map(address_map &map) ATTR_COLD; - void hyperpac_sound_map(address_map &map) ATTR_COLD; - void snowbros3_map(address_map &map) ATTR_COLD; - void snowbros_map(address_map &map) ATTR_COLD; void sound_io_map(address_map &map) ATTR_COLD; void sound_map(address_map &map) ATTR_COLD; void twinadv_map(address_map &map) ATTR_COLD; void twinadv_sound_io_map(address_map &map) ATTR_COLD; void wintbob_map(address_map &map) ATTR_COLD; +}; + +// with original pandora hardware +class snowbros_pandora_state : public snowbros_state +{ +public: + snowbros_pandora_state(const machine_config &mconfig, device_type type, const char *tag) + : snowbros_state(mconfig, type, tag) + , m_pandora(*this, "pandora") + { } + + void snowbros(machine_config &config); + void yutnori(machine_config &config); + + void init_toto(); + void init_yutnori(); + +protected: + required_device m_pandora; + + u16 m_yutnori_prot_val = 0; + + void snowbros_flipscreen_w(u8 data); + u16 toto_read(offs_t offset, u16 mem_mask = ~0); + void yutnori_prot_w(u16 data); + u16 yutnori_prot_r(); + + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void screen_vblank(int state); + + void snowbros_map(address_map &map) ATTR_COLD; void yutnori_map(address_map &map) ATTR_COLD; }; +// with sound MCU (HLE until hooked up MCU) and bankswitched OKI +class snowbros3_state : public snowbros_state +{ +public: + snowbros3_state(const machine_config &mconfig, device_type type, const char *tag) + : snowbros_state(mconfig, type, tag) + , m_okibank(*this, "okibank") + { } + + void snowbro3(machine_config &config); + + void init_snowbro3(); + void init_ballboy3p(); + +protected: + virtual void machine_start() override ATTR_COLD; + +private: + required_memory_bank m_okibank; + + s32 m_sb3_music_is_playing = 0; + s32 m_sb3_music = 0; + + u16 sb3_sound_r(); + void sb3_sound_w(u16 data); + + u32 screen_update_snowbro3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + TIMER_DEVICE_CALLBACK_MEMBER(snowbros3_scanline); + + void sb3_play_music(u16 data); + void sb3_play_sound(u16 data); + + void snowbros3_map(address_map &map) ATTR_COLD; + void snowbros3_oki_map(address_map &map) ATTR_COLD; +}; + +// with protection MCU +class semicom_state : public snowbros_pandora_state +{ +public: + semicom_state(const machine_config &mconfig, device_type type, const char *tag) + : snowbros_pandora_state(mconfig, type, tag) + , m_hyperpac_ram(*this, "hyperpac_ram") + , m_semicom_prot_base(0) + { } + + void _4in1(machine_config &config); + void semiprot(machine_config &config); + void semicom_mcu(machine_config &config); + void semicom(machine_config &config); + void finalttr(machine_config &config); + + void init_pzlbreak(); + void init_cookbib3(); + void init_4in1boot(); + void init_3in1semi(); + void init_cookbib2(); + void init_hyperpac(); + void init_sutjarod(); + void init_gwasu(); + +protected: + optional_shared_ptr m_hyperpac_ram; + + u8 m_semicom_prot_offset = 0; + u16 m_semicom_prot_base; + + void prot_p0_w(u8 data); + void prot_p1_w(u8 data); + void prot_p2_w(u8 data); + u16 _4in1_02_read(); + u16 _3in1_read(); + u16 cookbib3_read(); + + DECLARE_MACHINE_RESET(semiprot); + DECLARE_MACHINE_RESET(finalttr); + + void finalttr_map(address_map &map) ATTR_COLD; + void hyperpac_map(address_map &map) ATTR_COLD; + void hyperpac_sound_map(address_map &map) ATTR_COLD; +}; + #endif // MAME_KANEKO_SNOWBROS_H diff --git a/src/mame/kaneko/snowbros_v.cpp b/src/mame/kaneko/snowbros_v.cpp index 6910e5b468f..ad6fd8de9cc 100644 --- a/src/mame/kaneko/snowbros_v.cpp +++ b/src/mame/kaneko/snowbros_v.cpp @@ -5,10 +5,8 @@ #include "emu.h" #include "snowbros.h" -uint32_t snowbros_state::screen_update_honeydol(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 snowbros_state::screen_update_honeydol(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint16_t *spriteram16 = m_bootleg_spriteram16; - int sx=0, sy=0, x=0, y=0, offs; /* sprites clip on left / right edges when scrolling, but it seems correct, no extra sprite attribute bits are set during this time, the sprite co-ordinates are simply set to 0 */ @@ -17,83 +15,65 @@ uint32_t snowbros_state::screen_update_honeydol(screen_device &screen, bitmap_in bitmap.fill(0xf0, cliprect); - for (offs = 0x0000/2;offs < 0x2000/2;offs += 8) + for (int offs = 0x0000 / 2; offs < 0x2000 / 2; offs += 8) { - int dx,dy,tilecolour,attr,flipx,flipy,tile; + int dx, dy, tilecolour, attr, flipx, flipy, tile; /* 8bpp gfx */ - dx = (spriteram16[offs+4]>>8) & 0xff; - dy = (spriteram16[offs+5]>>8) & 0xff; - tilecolour = (spriteram16[offs+3]>>8)&3; - attr = spriteram16[offs+7]>>8; - flipx = attr & 0x80; - flipy = (attr & 0x40) << 1; - tile = ((attr & 0x3f)<<8) + ((spriteram16[offs+6]>>8) & 0xff); - - x = dx; - y = dy; + dx = (m_bootleg_spriteram[offs + 4] >> 8) & 0xff; + dy = (m_bootleg_spriteram[offs + 5] >> 8) & 0xff; + tilecolour = (m_bootleg_spriteram[offs + 3] >> 8) & 3; + attr = m_bootleg_spriteram[offs + 7] >> 8; + flipx = BIT(attr, 7); + flipy = BIT(attr, 6); + tile = ((attr & 0x3f) << 8) + ((m_bootleg_spriteram[offs + 6] >> 8) & 0xff); if (flip_screen()) { - sx = 240 - x; - sy = 240 - y; + dx = 240 - dx; + dy = 240 - dy; flipx = !flipx; flipy = !flipy; } - else - { - sx = x; - sy = y; - } - m_gfxdecode->gfx(1)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, tile, tilecolour, flipx, flipy, - sx,sy,0); + dx, dy, 0); /* second list interleaved with first (4bpp) ??? */ - dx = spriteram16[offs+4] & 0xff; - dy = spriteram16[offs+5] & 0xff; - tilecolour = spriteram16[offs+3]; - attr = spriteram16[offs+7]; - flipx = attr & 0x80; - flipy = (attr & 0x40) << 1; - tile = ((attr & 0x3f) << 8) + (spriteram16[offs+6] & 0xff); - - x = dx; - y = dy; + dx = m_bootleg_spriteram[offs + 4] & 0xff; + dy = m_bootleg_spriteram[offs + 5] & 0xff; + tilecolour = m_bootleg_spriteram[offs + 3]; + attr = m_bootleg_spriteram[offs + 7]; + flipx = BIT(attr, 7); + flipy = BIT(attr, 6); + tile = ((attr & 0x3f) << 8) + (m_bootleg_spriteram[offs + 6] & 0xff); if (flip_screen()) { - sx = 240 - x; - sy = 240 - y; + dx = 240 - dx; + dy = 240 - dy; flipx = !flipx; flipy = !flipy; } - else - { - sx = x; - sy = y; - } - tilecolour = (tilecolour&0x03f0) >> 4; - tilecolour ^=0x3f; // unusual, but correct.. + tilecolour = (tilecolour & 0x03f0) >> 4; + tilecolour ^= 0x3f; // unusual, but correct.. - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(0)->transpen(bitmap, cliprect, tile, tilecolour, flipx, flipy, - sx,sy,0); + dx, dy, 0); } return 0; } -uint32_t snowbros_state::screen_update_twinadv(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 snowbros_state::screen_update_twinadv(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint16_t *spriteram16 = m_bootleg_spriteram16; - int sx=0, sy=0, x=0, y=0, offs; /* sprites clip on left / right edges when scrolling, but it seems correct, no extra sprite attribute bits are set during this time, the sprite co-ordinates are simply set to 0 */ @@ -102,70 +82,62 @@ uint32_t snowbros_state::screen_update_twinadv(screen_device &screen, bitmap_ind bitmap.fill(0xf0, cliprect); - for (offs = 0x0000/2;offs < 0x2000/2;offs += 8) + for (int offs = 0x0000 / 2; offs < 0x2000 / 2; offs += 8) { - int dx,dy,tilecolour,attr,flipx,flipy,tile; - /* Similar to Honey Doll, but no 8bpp list / gfx */ - dx = spriteram16[offs+4] & 0xff; - dy = spriteram16[offs+5] & 0xff; - tilecolour = spriteram16[offs+3]; - attr = spriteram16[offs+7]; - flipx = attr & 0x80; - flipy = (attr & 0x40) << 1; - tile = ((attr & 0x3f) << 8) + (spriteram16[offs+6] & 0xff); - - x = dx; - y = dy; + int dx = m_bootleg_spriteram[offs + 4] & 0xff; + int dy = m_bootleg_spriteram[offs + 5] & 0xff; + int tilecolour = m_bootleg_spriteram[offs + 3]; + const u8 attr = m_bootleg_spriteram[offs + 7] & 0xff; + bool flipx = BIT(attr, 7); + bool flipy = BIT(attr, 6); + const u32 tile = ((attr & 0x3f) << 8) + (m_bootleg_spriteram[offs + 6] & 0xff); if (flip_screen()) { - sx = 240 - x; - sy = 240 - y; + dx = 240 - dx; + dy = 240 - dy; flipx = !flipx; flipy = !flipy; } - else - { - sx = x; - sy = y; - } - tilecolour = (tilecolour&0x00f0) >> 4; - tilecolour ^=0xf; // unusual, but correct.. + tilecolour = (tilecolour & 0x00f0) >> 4; + tilecolour ^= 0xf; // unusual, but correct.. - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, + m_gfxdecode->gfx(0)->transpen(bitmap, cliprect, tile, tilecolour, flipx, flipy, - sx,sy,0); + dx, dy, 0); } return 0; } -uint32_t snowbros_state::screen_update_wintbob(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 snowbros_state::screen_update_wintbob(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint16_t *spriteram16 = m_bootleg_spriteram16; - int offs; - bitmap.fill(m_palette->black_pen(), cliprect); - for (offs = 0;offs < m_bootleg_spriteram16.bytes()/2;offs += 8) + for (int offs = 0; offs < m_bootleg_spriteram.bytes() / 2; offs += 8) { - int xpos = spriteram16[offs] & 0xff; - int ypos = spriteram16[offs+4] & 0xff; -/* int unk1 = spriteram16[offs+1] & 0x01;*/ /* Unknown .. Set for the Bottom Left part of Sprites */ - int disbl = spriteram16[offs+1] & 0x02; -/* int unk2 = spriteram16[offs+1] & 0x04;*/ /* Unknown .. Set for most things */ - int wrapr = spriteram16[offs+1] & 0x08; - int colr = (spriteram16[offs+1] & 0xf0) >> 4; - int tilen = (spriteram16[offs+2] << 8) + (spriteram16[offs+3] & 0xff); - int flipx = spriteram16[offs+2] & 0x80; - int flipy = (spriteram16[offs+2] & 0x40) << 1; + const u8 attr = m_bootleg_spriteram[offs + 1] & 0xff; + if (BIT(attr, 1)) + continue; - if (wrapr == 8) xpos -= 256; + int xpos = m_bootleg_spriteram[offs] & 0xff; + int ypos = m_bootleg_spriteram[offs + 4] & 0xff; +/* const bool unk1 = BIT(attr, 0);*/ /* Unknown .. Set for the Bottom Left part of Sprites */ +/* const bool unk2 = BIT(attr, 2);*/ /* Unknown .. Set for most things */ + const bool wrapr = BIT(attr, 3); + const u32 colr = (attr & 0xf0) >> 4; + const u8 tile_flip = m_bootleg_spriteram[offs + 2] & 0xff; + const u32 tile = (tile_flip << 8) + (m_bootleg_spriteram[offs + 3] & 0xff); + bool flipx = BIT(tile_flip, 7); + bool flipy = BIT(tile_flip, 6); + + if (wrapr) + xpos -= 256; if (flip_screen()) { @@ -175,26 +147,25 @@ uint32_t snowbros_state::screen_update_wintbob(screen_device &screen, bitmap_ind flipy = !flipy; } - if ((xpos > -16) && (ypos > 0) && (xpos < 256) && (ypos < 240) && (disbl !=2)) + if ((xpos > -16) && (ypos > 0) && (xpos < 256) && (ypos < 240)) { - m_gfxdecode->gfx(0)->transpen(bitmap,cliprect, - tilen, + m_gfxdecode->gfx(0)->transpen(bitmap, cliprect, + tile, colr, flipx, flipy, - xpos,ypos,0); + xpos, ypos, 0); } } return 0; } -uint32_t snowbros_state::screen_update_snowbro3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 snowbros3_state::screen_update_snowbro3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint16_t *spriteram16 = m_bootleg_spriteram16; - int sx=0, sy=0, x=0, y=0, offs; + int x = 0, y = 0; /* - * Sprite Tile Format + * Sprite Tile Format (Only low bytes are used?) * ------------------ * * Byte | Bit(s) | Use @@ -202,37 +173,40 @@ uint32_t snowbros_state::screen_update_snowbro3(screen_device &screen, bitmap_in * 0-5 | -------- | ? * 6 | -------- | ? * 7 | xxxx.... | Palette Bank + * 7 | .....x.. | Use Relative offsets + * 7 | ......x. | YPos - Sign Bit * 7 | .......x | XPos - Sign Bit * 9 | xxxxxxxx | XPos - * 7 | ......x. | YPos - Sign Bit * B | xxxxxxxx | YPos - * 7 | .....x.. | Use Relative offsets * C | -------- | ? * D | xxxxxxxx | Sprite Number (low 8 bits) * E | -------- | ? - * F | ....xxxx | Sprite Number (high 4 bits) * F | x....... | Flip Sprite Y-Axis * F | .x...... | Flip Sprite X-Axis + * F | ....xxxx | Sprite Number (high 4 bits) */ /* This clears & redraws the entire screen each pass */ bitmap.fill(m_palette->black_pen(), cliprect); - for (offs = 0;offs < m_bootleg_spriteram16.bytes()/2;offs += 8) + for (int offs = 0; offs < m_bootleg_spriteram.bytes() / 2; offs += 8) { - gfx_element *gfx = m_gfxdecode->gfx(0); - int dx = spriteram16[offs+4] & 0xff; - int dy = spriteram16[offs+5] & 0xff; - int tilecolour = spriteram16[offs+3]; - int attr = spriteram16[offs+7]; - int flipx = attr & 0x80; - int flipy = (attr & 0x40) << 1; - int tile = ((attr & 0xff) << 8) + (spriteram16[offs+6] & 0xff); + u8 gfx = 0; + int dx = m_bootleg_spriteram[offs + 4] & 0xff; + int dy = m_bootleg_spriteram[offs + 5] & 0xff; + u8 tilecolour = m_bootleg_spriteram[offs + 3] & 0xff; + const u8 attr = m_bootleg_spriteram[offs + 7] & 0xff; + bool flipx = BIT(attr, 7); + bool flipy = BIT(attr, 6); + const u32 tile = ((attr & 0xff) << 8) + (m_bootleg_spriteram[offs + 6] & 0xff); - if (tilecolour & 1) dx = -1 - (dx ^ 0xff); - if (tilecolour & 2) dy = -1 - (dy ^ 0xff); - if (tilecolour & 4) + if (BIT(tilecolour, 0)) + dx = -1 - (dx ^ 0xff); + if (BIT(tilecolour, 1)) + dy = -1 - (dy ^ 0xff); + + if (BIT(tilecolour, 2)) { x += dx; y += dy; @@ -246,6 +220,7 @@ uint32_t snowbros_state::screen_update_snowbro3(screen_device &screen, bitmap_in if (x > 511) x &= 0x1ff; if (y > 511) y &= 0x1ff; + int sx = x, sy = y; if (flip_screen()) { sx = 240 - x; @@ -253,23 +228,18 @@ uint32_t snowbros_state::screen_update_snowbro3(screen_device &screen, bitmap_in flipx = !flipx; flipy = !flipy; } - else - { - sx = x; - sy = y; - } if (offs < 0x800) /* i guess this is the right way */ { - gfx = m_gfxdecode->gfx(1); + gfx = 1; tilecolour = 0x10; } - gfx->transpen(bitmap,cliprect, - tile, - (tilecolour & 0xf0) >> 4, - flipx, flipy, - sx,sy,0); + m_gfxdecode->gfx(gfx)->transpen(bitmap, cliprect, + tile, + (tilecolour & 0xf0) >> 4, + flipx, flipy, + sx, sy, 0); } return 0; } From 58f07ba199005a9cfc99167fe53e6a9de4483683 Mon Sep 17 00:00:00 2001 From: TheLostNinja <116140256+TheLostNinja@users.noreply.github.com> Date: Sat, 7 Mar 2026 22:23:18 +0300 Subject: [PATCH 188/351] tumbleb.cpp: Consolidate driver files into single file. (#14905) --- src/mame/dataeast/tumbleb.cpp | 681 +++++++++++++++++++++++++++++++- src/mame/dataeast/tumbleb.h | 219 ---------- src/mame/dataeast/tumbleb_v.cpp | 487 ----------------------- 3 files changed, 677 insertions(+), 710 deletions(-) delete mode 100644 src/mame/dataeast/tumbleb.h delete mode 100644 src/mame/dataeast/tumbleb_v.cpp diff --git a/src/mame/dataeast/tumbleb.cpp b/src/mame/dataeast/tumbleb.cpp index 735f80c1d2e..2b32bd06f76 100644 --- a/src/mame/dataeast/tumbleb.cpp +++ b/src/mame/dataeast/tumbleb.cpp @@ -299,23 +299,696 @@ Stephh's notes (based on the games M68000 code and some tests) : ***************************************************************************/ #include "emu.h" -#include "tumbleb.h" +#include "emupal.h" #include "cpu/z80/z80.h" #include "cpu/m68000/m68000.h" #include "cpu/h6280/h6280.h" #include "cpu/mcs51/i80c52.h" // for semicom mcu #include "cpu/pic16c5x/pic16c5x.h" -#include "decocrpt.h" +#include "machine/gen_latch.h" #include "sound/okim6295.h" #include "sound/ymopm.h" #include "sound/ymopl.h" -#include "speaker.h" +#include "decocrpt.h" +#include "decospr.h" +#include "screen.h" +#include "speaker.h" +#include "tilemap.h" #define TUMBLEP_HACK 0 +namespace { +class tumbleb_state : public driver_device +{ +public: + tumbleb_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_mainram(*this, "mainram"), + m_spriteram(*this, "spriteram"), + m_pf1_data(*this, "pf1_data"), + m_pf2_data(*this, "pf2_data"), + m_control(*this, "control"), + m_pf1_tilemap(nullptr), + m_pf1_alt_tilemap(nullptr), + m_pf2_tilemap(nullptr), + m_pf2_alt_tilemap(nullptr), + m_maincpu(*this, "maincpu"), + m_audiocpu(*this, "audiocpu"), + m_oki(*this, "oki"), + m_gfxdecode(*this, "gfxdecode"), + m_palette(*this, "palette"), + m_sprgen(*this, "spritegen"), + m_screen(*this, "screen"), + m_soundlatch(*this, "soundlatch"), + m_protbase(0) + { } + + void tumblepb(machine_config &config); + void tumblepba(machine_config &config); + void bcstory(machine_config &config); + void pangpang(machine_config &config); + void semibase(machine_config &config); + void tumbleb2(machine_config &config); + void cookbib(machine_config &config); + void metlsavr(machine_config &config); + void fncywld(machine_config &config); + void magipur(machine_config &config); + void suprtrio(machine_config &config); + void htchctch(machine_config &config); + void htchctch_mcu(machine_config &config); + void sdfight(machine_config &config); + void chokchok(machine_config &config); + void cookbib_mcu(machine_config &config); + void jumpkids(machine_config &config); + + void init_dquizgo(); + void init_jumpkids(); + void init_htchctch(); + void init_wlstar(); + void init_suprtrio(); + void init_tumblepb(); + void init_tumblepba(); + void init_bcstory(); + void init_wondl96(); + void init_tumbleb2(); + void init_chokchok(); + void init_fncywld(); + void init_magipur(); + void init_carket(); + + ioport_value suprtrio_prot_latch_r(); + +protected: + /* memory pointers */ + optional_shared_ptr m_mainram; + required_shared_ptr m_spriteram; + required_shared_ptr m_pf1_data; + required_shared_ptr m_pf2_data; + optional_shared_ptr m_control; + + /* misc */ + int m_music_command = 0; + int m_music_bank = 0; + int m_music_is_playing = 0; + + /* video-related */ + tilemap_t *m_pf1_tilemap = nullptr; + tilemap_t *m_pf1_alt_tilemap = nullptr; + tilemap_t *m_pf2_tilemap = nullptr; + tilemap_t *m_pf2_alt_tilemap = nullptr; + uint16_t m_control_0[8]{}; + uint16_t m_tilebank = 0; + + /* devices */ + required_device m_maincpu; + optional_device m_audiocpu; + required_device m_oki; + required_device m_gfxdecode; + required_device m_palette; + optional_device m_sprgen; + required_device m_screen; + optional_device m_soundlatch; + + uint8_t m_semicom_prot_offset = 0; + uint16_t m_protbase; + void tumblepb_oki_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t tumblepb_prot_r(); + uint16_t tumblepopb_controls_r(offs_t offset); + uint16_t semibase_unknown_r(); + void jumpkids_sound_w(uint16_t data); + void semicom_soundcmd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void oki_sound_bank_w(uint8_t data); + void jumpkids_oki_bank_w(uint8_t data); + void prot_p0_w(uint8_t data); + void prot_p1_w(uint8_t data); + void prot_p2_w(uint8_t data); + uint16_t bcstory_1a0_read(); + void bcstory_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void chokchok_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void wlstar_tilebank_w(uint16_t data); + void suprtrio_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void tumblepb_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void tumblepb_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void fncywld_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void fncywld_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void tumblepb_control_0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void pangpang_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void pangpang_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void tumbleb2_soundmcu_w(uint16_t data); + + TILEMAP_MAPPER_MEMBER(tumblep_scan); + TILE_GET_INFO_MEMBER(get_bg1_tile_info); + TILE_GET_INFO_MEMBER(get_bg2_tile_info); + TILE_GET_INFO_MEMBER(get_fg_tile_info); + TILE_GET_INFO_MEMBER(get_fncywld_bg1_tile_info); + TILE_GET_INFO_MEMBER(get_fncywld_bg2_tile_info); + TILE_GET_INFO_MEMBER(get_fncywld_fg_tile_info); + TILE_GET_INFO_MEMBER(pangpang_get_bg1_tile_info); + TILE_GET_INFO_MEMBER(pangpang_get_bg2_tile_info); + TILE_GET_INFO_MEMBER(pangpang_get_fg_tile_info); + DECLARE_MACHINE_START(tumbleb); + DECLARE_MACHINE_RESET(tumbleb); + DECLARE_VIDEO_START(tumblepb); + DECLARE_VIDEO_START(fncywld); + DECLARE_MACHINE_RESET(htchctch); + DECLARE_VIDEO_START(suprtrio); + DECLARE_VIDEO_START(pangpang); + DECLARE_VIDEO_START(sdfight); + uint32_t screen_update_tumblepb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_jumpkids(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_fncywld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_semicom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_suprtrio(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_pangpang(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_semicom_altoffsets(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_bcstory(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_semibase(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_sdfight(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + INTERRUPT_GEN_MEMBER(tumbleb2_interrupt); + void tumbleb_tilemap_redraw(); + inline void get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); + inline void get_fncywld_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); + inline void pangpang_get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ); + inline void pangpang_get_bg2x_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ); + void tumbleb_draw_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pf1x_offs, int pf1y_offs, int pf2x_offs, int pf2y_offs); + void tumbleb2_set_music_bank( int bank ); + void tumbleb2_play_sound( okim6295_device *oki, int data ); + void tumbleb2_playmusic(okim6295_device *oki); + void process_tumbleb2_music_command( okim6295_device *oki, int data ); + void tumblepb_gfx_rearrange(int rgn); + void suprtrio_decrypt_code(); + void suprtrio_decrypt_gfx(); + + void unico_base_map(address_map &map) ATTR_COLD; + void fncywld_main_map(address_map &map) ATTR_COLD; + void magipur_main_map(address_map &map) ATTR_COLD; + void htchctch_main_map(address_map &map) ATTR_COLD; + void jumpkids_main_map(address_map &map) ATTR_COLD; + void jumpkids_sound_map(address_map &map) ATTR_COLD; + void pangpang_main_map(address_map &map) ATTR_COLD; + void semicom_sound_map(address_map &map) ATTR_COLD; + void suprtrio_main_map(address_map &map) ATTR_COLD; + void suprtrio_sound_map(address_map &map) ATTR_COLD; + void tumblepopb_main_map(address_map &map) ATTR_COLD; + void tumblepopba_main_map(address_map &map) ATTR_COLD; + + u8 m_suprtrio_prot_latch = 0; +}; + +class tumbleb_pic_state : public tumbleb_state +{ +public: + tumbleb_pic_state(const machine_config &mconfig, device_type type, const char *tag) : + tumbleb_state(mconfig, type, tag), + m_okibank(*this, "okibank") + { } + + void funkyjetb(machine_config &config); + +protected: + virtual void driver_start() override; + +private: + void oki_bank_w(uint8_t data); + uint8_t pic_data_r(); + void pic_data_w(uint8_t data); + void pic_ctrl_w(uint8_t data); + + void funkyjetb_map(address_map &map) ATTR_COLD; + void funkyjetb_oki_map(address_map &map) ATTR_COLD; + + required_memory_bank m_okibank; + + uint8_t m_pic_data; +}; + +/****************************************************************************** + +The original uses Data East custom chip 55 for backgrounds, +custom chip 52 for sprites. The bootlegs use generic chips to perform similar +functions + +Tumblepop is one of few games to take advantage of the playfields ability +to switch between 8*8 tiles and 16*16 tiles. + +******************************************************************************/ + +void tumbleb_state::bcstory_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + data &= mem_mask; + + m_tilebank = data; + m_pf1_tilemap->mark_all_dirty(); + m_pf1_alt_tilemap->mark_all_dirty(); + m_pf2_tilemap->mark_all_dirty(); +} + +void tumbleb_state::chokchok_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + data &= mem_mask; + + m_tilebank = data << 1; + m_pf1_tilemap->mark_all_dirty(); + m_pf1_alt_tilemap->mark_all_dirty(); + m_pf2_tilemap->mark_all_dirty(); +} + +void tumbleb_state::wlstar_tilebank_w(uint16_t data) +{ + /* it just writes 0000 or ffff */ + m_tilebank = data & 0x4000; + m_pf1_tilemap->mark_all_dirty(); + m_pf1_alt_tilemap->mark_all_dirty(); + m_pf2_tilemap->mark_all_dirty(); +} + +void tumbleb_state::suprtrio_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + data &= mem_mask; + + m_tilebank = data << 14; // shift it here, makes using bcstory_tilebank easier + m_pf1_tilemap->mark_all_dirty(); + m_pf1_alt_tilemap->mark_all_dirty(); + m_pf2_tilemap->mark_all_dirty(); +} + +void tumbleb_state::tumblepb_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_pf1_data[offset]); + m_pf1_tilemap->mark_tile_dirty(offset); + m_pf1_alt_tilemap->mark_tile_dirty(offset); +} + +void tumbleb_state::tumblepb_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_pf2_data[offset]); + m_pf2_tilemap->mark_tile_dirty(offset); + + if (m_pf2_alt_tilemap) + m_pf2_alt_tilemap->mark_tile_dirty(offset); +} + +void tumbleb_state::fncywld_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_pf1_data[offset]); + m_pf1_tilemap->mark_tile_dirty(offset / 2); + m_pf1_alt_tilemap->mark_tile_dirty(offset / 2); +} + +void tumbleb_state::fncywld_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_pf2_data[offset]); + m_pf2_tilemap->mark_tile_dirty(offset / 2); +} + +void tumbleb_state::tumblepb_control_0_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_control_0[offset]); +} + +void tumbleb_state::pangpang_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_pf1_data[offset]); + m_pf1_tilemap->mark_tile_dirty(offset / 2); + m_pf1_alt_tilemap->mark_tile_dirty(offset / 2); +} + +void tumbleb_state::pangpang_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + COMBINE_DATA(&m_pf2_data[offset]); + m_pf2_tilemap->mark_tile_dirty(offset / 2); + + if (m_pf2_alt_tilemap) + m_pf2_alt_tilemap->mark_tile_dirty(offset / 2); +} + +/******************************************************************************/ + +TILEMAP_MAPPER_MEMBER(tumbleb_state::tumblep_scan) +{ + /* logical (col,row) -> memory offset */ + return (col & 0x1f) + ((row & 0x1f) << 5) + ((col & 0x60) << 5); +} + +inline void tumbleb_state::get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) +{ + int data = gfx_base[tile_index]; + + tileinfo.set(gfx_bank, + (data & 0x0fff) | (m_tilebank >> 2), + data >> 12, + 0); +} + +TILE_GET_INFO_MEMBER(tumbleb_state::get_bg1_tile_info){ get_bg_tile_info(tileinfo, tile_index, 2, m_pf1_data); } +TILE_GET_INFO_MEMBER(tumbleb_state::get_bg2_tile_info){ get_bg_tile_info(tileinfo, tile_index, 1, m_pf2_data); } + +TILE_GET_INFO_MEMBER(tumbleb_state::get_fg_tile_info) +{ + int data = m_pf1_data[tile_index]; + + tileinfo.set(0, + (data & 0x0fff) | m_tilebank, + data >> 12, + 0); +} + +inline void tumbleb_state::get_fncywld_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) +{ + int data = gfx_base[tile_index * 2]; + int attr = gfx_base[tile_index * 2 + 1]; + + tileinfo.set(gfx_bank, + data & 0x1fff, + attr & 0x1f, + 0); +} + +TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_bg1_tile_info){ get_fncywld_bg_tile_info(tileinfo, tile_index, 2, m_pf1_data); } +TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_bg2_tile_info){ get_fncywld_bg_tile_info(tileinfo, tile_index, 1, m_pf2_data); } + +TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_fg_tile_info) +{ + int data = m_pf1_data[tile_index * 2]; + int attr = m_pf1_data[tile_index * 2 + 1]; + + tileinfo.set(0, + data & 0x1fff, + attr & 0x1f, + 0); +} + +inline void tumbleb_state::pangpang_get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ) +{ + int data = gfx_base[tile_index * 2 + 1]; + int attr = gfx_base[tile_index * 2]; + + tileinfo.set(gfx_bank, + data & 0x1fff, + (attr >>12) & 0xf, + 0); +} + +inline void tumbleb_state::pangpang_get_bg2x_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ) +{ + int data = gfx_base[tile_index * 2 + 1]; + int attr = gfx_base[tile_index * 2]; + + tileinfo.set(gfx_bank, + (data & 0xfff) + 0x1000, + (attr >>12) & 0xf, + 0); +} + +TILE_GET_INFO_MEMBER(tumbleb_state::pangpang_get_bg1_tile_info){ pangpang_get_bg_tile_info(tileinfo, tile_index, 2, m_pf1_data); } +TILE_GET_INFO_MEMBER(tumbleb_state::pangpang_get_bg2_tile_info){ pangpang_get_bg2x_tile_info(tileinfo, tile_index, 1, m_pf2_data); } + +TILE_GET_INFO_MEMBER(tumbleb_state::pangpang_get_fg_tile_info) +{ + int data = m_pf1_data[tile_index * 2 + 1]; + int attr = m_pf1_data[tile_index * 2]; + + tileinfo.set(0, + data & 0x1fff, + (attr >> 12)& 0x1f, + 0); +} + +void tumbleb_state::tumbleb_tilemap_redraw() +{ + m_pf1_tilemap->mark_all_dirty(); + m_pf1_alt_tilemap->mark_all_dirty(); + m_pf2_tilemap->mark_all_dirty(); + if (m_pf2_alt_tilemap) + m_pf2_alt_tilemap->mark_all_dirty(); +} + +VIDEO_START_MEMBER(tumbleb_state,pangpang) +{ + m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::pangpang_get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::pangpang_get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::pangpang_get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + + m_pf1_tilemap->set_transparent_pen(0); + m_pf1_alt_tilemap->set_transparent_pen(0); + + machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); +} + + +VIDEO_START_MEMBER(tumbleb_state,tumblepb) +{ + m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + + m_pf1_tilemap->set_transparent_pen(0); + m_pf1_alt_tilemap->set_transparent_pen(0); + + machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); +} + +VIDEO_START_MEMBER(tumbleb_state,sdfight) +{ + m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); // 64*64 to prevent bad tilemap wrapping? - check real behavior + m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + + m_pf1_tilemap->set_transparent_pen(0); + m_pf1_alt_tilemap->set_transparent_pen(0); + + machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); +} + +VIDEO_START_MEMBER(tumbleb_state,fncywld) +{ + m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fncywld_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fncywld_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fncywld_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + + m_pf1_tilemap->set_transparent_pen(15); + m_pf1_alt_tilemap->set_transparent_pen(15); + + machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); +} + + +VIDEO_START_MEMBER(tumbleb_state,suprtrio) +{ + m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); + + m_pf1_alt_tilemap->set_transparent_pen(0); + + machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); +} + +/******************************************************************************/ + +void tumbleb_state::tumbleb_draw_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pf1x_offs, int pf1y_offs, int pf2x_offs, int pf2y_offs) +{ + m_pf1_tilemap->set_scrollx(0, m_control_0[1] + pf1x_offs); + m_pf1_tilemap->set_scrolly(0, m_control_0[2] + pf1y_offs); + m_pf1_alt_tilemap->set_scrollx(0, m_control_0[1] + pf1x_offs); + m_pf1_alt_tilemap->set_scrolly(0, m_control_0[2] + pf1y_offs); + m_pf2_tilemap->set_scrollx(0, m_control_0[3] + pf2x_offs); + m_pf2_tilemap->set_scrolly(0, m_control_0[4] + pf2y_offs); + + m_pf2_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + if (m_control_0[6] & 0x80) + m_pf1_tilemap->draw(screen, bitmap, cliprect, 0, 0); + else + m_pf1_alt_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + m_sprgen->set_flip_screen(flip_screen() != 0); + m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, m_spriteram.bytes()/2); +} + +uint32_t tumbleb_state::screen_update_tumblepb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + if (flip_screen()) + offs = 1; + else + offs = -1; + + if (flip_screen()) + offs2 = -3; + else + offs2 = -5; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + + return 0; +} + +uint32_t tumbleb_state::screen_update_jumpkids(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + if (flip_screen()) + offs = 1; + else + offs = -1; + + if (flip_screen()) + offs2 = -3; + else + offs2 = -5; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + return 0; +} + +uint32_t tumbleb_state::screen_update_semicom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + if (flip_screen()) + offs = 1; + else + offs = -1; + + if (flip_screen()) + offs2 = -3; + else + offs2 = -5; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + return 0; +} + +uint32_t tumbleb_state::screen_update_semicom_altoffsets(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offsx, offsy, offsx2; + + flip_screen_set(m_control_0[0] & 0x80); + + offsx = -1; + offsy = 2; + offsx2 = -5; + + tumbleb_draw_common(screen, bitmap, cliprect, offsx2, 0, offsx, offsy); + + return 0; +} + +uint32_t tumbleb_state::screen_update_bcstory(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + /* not sure of this */ + if (flip_screen()) + offs = 1; + else + offs = 8; + + /* not sure of this */ + if (flip_screen()) + offs2 = -3; + else + offs2 = 8; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + return 0; +} + +uint32_t tumbleb_state::screen_update_semibase(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + offs = -1; + offs2 = -2; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + + return 0; +} + +uint32_t tumbleb_state::screen_update_sdfight(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + offs = -1; + offs2 = -5; // foreground scroll.. + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, -16, offs, 0); + + return 0; +} + +uint32_t tumbleb_state::screen_update_fncywld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + if (flip_screen()) + offs = 1; + else + offs = -1; + + if (flip_screen()) + offs2 = -3; + else + offs2 = -5; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + + return 0; +} + +uint32_t tumbleb_state::screen_update_pangpang(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int offs, offs2; + + flip_screen_set(m_control_0[0] & 0x80); + + if (flip_screen()) + offs = 1; + else + offs = -1; + + if (flip_screen()) + offs2 = -3; + else + offs2 = -5; + + tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); + return 0; +} + +uint32_t tumbleb_state::screen_update_suprtrio(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + m_pf1_alt_tilemap->set_scrollx(0, -m_control[1] - 6); + m_pf1_alt_tilemap->set_scrolly(0, -m_control[2]); + m_pf2_tilemap->set_scrollx(0, -m_control[3] - 2); + m_pf2_tilemap->set_scrolly(0, -m_control[4]); + + m_pf2_tilemap->draw(screen, bitmap, cliprect, 0, 0); + m_pf1_alt_tilemap->draw(screen, bitmap, cliprect, 0, 0); + + m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, m_spriteram.bytes()/2); + return 0; +} /******************************************************************************/ @@ -3857,7 +4530,7 @@ void tumbleb_state::init_dquizgo() m_protbase = 0x0200; } - +} // anonymous namespace /******************************************************************************/ diff --git a/src/mame/dataeast/tumbleb.h b/src/mame/dataeast/tumbleb.h deleted file mode 100644 index a96bb774a70..00000000000 --- a/src/mame/dataeast/tumbleb.h +++ /dev/null @@ -1,219 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood,Bryan McPhail -#ifndef MAME_DATAEAST_TUMBLEB_H -#define MAME_DATAEAST_TUMBLEB_H - -#pragma once - -#include "machine/gen_latch.h" -#include "sound/okim6295.h" -#include "decospr.h" -#include "emupal.h" -#include "screen.h" -#include "tilemap.h" - -class tumbleb_state : public driver_device -{ -public: - tumbleb_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_mainram(*this, "mainram"), - m_spriteram(*this, "spriteram"), - m_pf1_data(*this, "pf1_data"), - m_pf2_data(*this, "pf2_data"), - m_control(*this, "control"), - m_pf1_tilemap(nullptr), - m_pf1_alt_tilemap(nullptr), - m_pf2_tilemap(nullptr), - m_pf2_alt_tilemap(nullptr), - m_maincpu(*this, "maincpu"), - m_audiocpu(*this, "audiocpu"), - m_oki(*this, "oki"), - m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette"), - m_sprgen(*this, "spritegen"), - m_screen(*this, "screen"), - m_soundlatch(*this, "soundlatch"), - m_protbase(0) - { } - - void tumblepb(machine_config &config); - void tumblepba(machine_config &config); - void bcstory(machine_config &config); - void pangpang(machine_config &config); - void semibase(machine_config &config); - void tumbleb2(machine_config &config); - void cookbib(machine_config &config); - void metlsavr(machine_config &config); - void fncywld(machine_config &config); - void magipur(machine_config &config); - void suprtrio(machine_config &config); - void htchctch(machine_config &config); - void htchctch_mcu(machine_config &config); - void sdfight(machine_config &config); - void chokchok(machine_config &config); - void cookbib_mcu(machine_config &config); - void jumpkids(machine_config &config); - - void init_dquizgo(); - void init_jumpkids(); - void init_htchctch(); - void init_wlstar(); - void init_suprtrio(); - void init_tumblepb(); - void init_tumblepba(); - void init_bcstory(); - void init_wondl96(); - void init_tumbleb2(); - void init_chokchok(); - void init_fncywld(); - void init_magipur(); - void init_carket(); - - ioport_value suprtrio_prot_latch_r(); - -protected: - /* memory pointers */ - optional_shared_ptr m_mainram; - required_shared_ptr m_spriteram; - required_shared_ptr m_pf1_data; - required_shared_ptr m_pf2_data; - optional_shared_ptr m_control; - - /* misc */ - int m_music_command = 0; - int m_music_bank = 0; - int m_music_is_playing = 0; - - /* video-related */ - tilemap_t *m_pf1_tilemap = nullptr; - tilemap_t *m_pf1_alt_tilemap = nullptr; - tilemap_t *m_pf2_tilemap = nullptr; - tilemap_t *m_pf2_alt_tilemap = nullptr; - uint16_t m_control_0[8]{}; - uint16_t m_tilebank = 0; - - /* devices */ - required_device m_maincpu; - optional_device m_audiocpu; - required_device m_oki; - required_device m_gfxdecode; - required_device m_palette; - optional_device m_sprgen; - required_device m_screen; - optional_device m_soundlatch; - - uint8_t m_semicom_prot_offset = 0; - uint16_t m_protbase; - void tumblepb_oki_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t tumblepb_prot_r(); - uint16_t tumblepopb_controls_r(offs_t offset); - uint16_t semibase_unknown_r(); - void jumpkids_sound_w(uint16_t data); - void semicom_soundcmd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void oki_sound_bank_w(uint8_t data); - void jumpkids_oki_bank_w(uint8_t data); - void prot_p0_w(uint8_t data); - void prot_p1_w(uint8_t data); - void prot_p2_w(uint8_t data); - uint16_t bcstory_1a0_read(); - void bcstory_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void chokchok_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void wlstar_tilebank_w(uint16_t data); - void suprtrio_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void tumblepb_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void tumblepb_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void fncywld_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void fncywld_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void tumblepb_control_0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void pangpang_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void pangpang_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void tumbleb2_soundmcu_w(uint16_t data); - - TILEMAP_MAPPER_MEMBER(tumblep_scan); - TILE_GET_INFO_MEMBER(get_bg1_tile_info); - TILE_GET_INFO_MEMBER(get_bg2_tile_info); - TILE_GET_INFO_MEMBER(get_fg_tile_info); - TILE_GET_INFO_MEMBER(get_fncywld_bg1_tile_info); - TILE_GET_INFO_MEMBER(get_fncywld_bg2_tile_info); - TILE_GET_INFO_MEMBER(get_fncywld_fg_tile_info); - TILE_GET_INFO_MEMBER(pangpang_get_bg1_tile_info); - TILE_GET_INFO_MEMBER(pangpang_get_bg2_tile_info); - TILE_GET_INFO_MEMBER(pangpang_get_fg_tile_info); - DECLARE_MACHINE_START(tumbleb); - DECLARE_MACHINE_RESET(tumbleb); - DECLARE_VIDEO_START(tumblepb); - DECLARE_VIDEO_START(fncywld); - DECLARE_MACHINE_RESET(htchctch); - DECLARE_VIDEO_START(suprtrio); - DECLARE_VIDEO_START(pangpang); - DECLARE_VIDEO_START(sdfight); - uint32_t screen_update_tumblepb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_jumpkids(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_fncywld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_semicom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_suprtrio(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_pangpang(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_semicom_altoffsets(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_bcstory(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_semibase(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update_sdfight(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - INTERRUPT_GEN_MEMBER(tumbleb2_interrupt); - void tumbleb_tilemap_redraw(); - inline void get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); - inline void get_fncywld_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); - inline void pangpang_get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ); - inline void pangpang_get_bg2x_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ); - void tumbleb_draw_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pf1x_offs, int pf1y_offs, int pf2x_offs, int pf2y_offs); - void tumbleb2_set_music_bank( int bank ); - void tumbleb2_play_sound( okim6295_device *oki, int data ); - void tumbleb2_playmusic(okim6295_device *oki); - void process_tumbleb2_music_command( okim6295_device *oki, int data ); - void tumblepb_gfx_rearrange(int rgn); - void suprtrio_decrypt_code(); - void suprtrio_decrypt_gfx(); - - void unico_base_map(address_map &map) ATTR_COLD; - void fncywld_main_map(address_map &map) ATTR_COLD; - void magipur_main_map(address_map &map) ATTR_COLD; - void htchctch_main_map(address_map &map) ATTR_COLD; - void jumpkids_main_map(address_map &map) ATTR_COLD; - void jumpkids_sound_map(address_map &map) ATTR_COLD; - void pangpang_main_map(address_map &map) ATTR_COLD; - void semicom_sound_map(address_map &map) ATTR_COLD; - void suprtrio_main_map(address_map &map) ATTR_COLD; - void suprtrio_sound_map(address_map &map) ATTR_COLD; - void tumblepopb_main_map(address_map &map) ATTR_COLD; - void tumblepopba_main_map(address_map &map) ATTR_COLD; - - u8 m_suprtrio_prot_latch = 0; -}; - -class tumbleb_pic_state : public tumbleb_state -{ -public: - tumbleb_pic_state(const machine_config &mconfig, device_type type, const char *tag) : - tumbleb_state(mconfig, type, tag), - m_okibank(*this, "okibank") - { } - - void funkyjetb(machine_config &config); - -protected: - virtual void driver_start() override; - -private: - void oki_bank_w(uint8_t data); - uint8_t pic_data_r(); - void pic_data_w(uint8_t data); - void pic_ctrl_w(uint8_t data); - - void funkyjetb_map(address_map &map) ATTR_COLD; - void funkyjetb_oki_map(address_map &map) ATTR_COLD; - - required_memory_bank m_okibank; - - uint8_t m_pic_data; -}; - -#endif // MAME_DATAEAST_TUMBLEB_H diff --git a/src/mame/dataeast/tumbleb_v.cpp b/src/mame/dataeast/tumbleb_v.cpp deleted file mode 100644 index c3534199be4..00000000000 --- a/src/mame/dataeast/tumbleb_v.cpp +++ /dev/null @@ -1,487 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:David Haywood,Bryan McPhail -/*************************************************************************** - - Tumblepop (bootlegs) and similar hardware - Video emulation - Bryan McPhail, mish@tendril.co.uk - -********************************************************************* - -The original uses Data East custom chip 55 for backgrounds, -custom chip 52 for sprites. The bootlegs use generic chips to perform similar -functions - -Tumblepop is one of few games to take advantage of the playfields ability -to switch between 8*8 tiles and 16*16 tiles. - -***************************************************************************/ - -#include "emu.h" -#include "tumbleb.h" - -/******************************************************************************/ - - -/******************************************************************************/ - -void tumbleb_state::bcstory_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - data &= mem_mask; - - m_tilebank = data; - m_pf1_tilemap->mark_all_dirty(); - m_pf1_alt_tilemap->mark_all_dirty(); - m_pf2_tilemap->mark_all_dirty(); -} - -void tumbleb_state::chokchok_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - data &= mem_mask; - - m_tilebank = data << 1; - m_pf1_tilemap->mark_all_dirty(); - m_pf1_alt_tilemap->mark_all_dirty(); - m_pf2_tilemap->mark_all_dirty(); -} - -void tumbleb_state::wlstar_tilebank_w(uint16_t data) -{ - /* it just writes 0000 or ffff */ - m_tilebank = data & 0x4000; - m_pf1_tilemap->mark_all_dirty(); - m_pf1_alt_tilemap->mark_all_dirty(); - m_pf2_tilemap->mark_all_dirty(); -} - - -void tumbleb_state::suprtrio_tilebank_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - data &= mem_mask; - - m_tilebank = data << 14; // shift it here, makes using bcstory_tilebank easier - m_pf1_tilemap->mark_all_dirty(); - m_pf1_alt_tilemap->mark_all_dirty(); - m_pf2_tilemap->mark_all_dirty(); -} - - -void tumbleb_state::tumblepb_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_pf1_data[offset]); - m_pf1_tilemap->mark_tile_dirty(offset); - m_pf1_alt_tilemap->mark_tile_dirty(offset); -} - -void tumbleb_state::tumblepb_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_pf2_data[offset]); - m_pf2_tilemap->mark_tile_dirty(offset); - - if (m_pf2_alt_tilemap) - m_pf2_alt_tilemap->mark_tile_dirty(offset); -} - -void tumbleb_state::fncywld_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_pf1_data[offset]); - m_pf1_tilemap->mark_tile_dirty(offset / 2); - m_pf1_alt_tilemap->mark_tile_dirty(offset / 2); -} - -void tumbleb_state::fncywld_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_pf2_data[offset]); - m_pf2_tilemap->mark_tile_dirty(offset / 2); -} - -void tumbleb_state::tumblepb_control_0_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_control_0[offset]); -} - - -void tumbleb_state::pangpang_pf1_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_pf1_data[offset]); - m_pf1_tilemap->mark_tile_dirty(offset / 2); - m_pf1_alt_tilemap->mark_tile_dirty(offset / 2); -} - -void tumbleb_state::pangpang_pf2_data_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - COMBINE_DATA(&m_pf2_data[offset]); - m_pf2_tilemap->mark_tile_dirty(offset / 2); - - if (m_pf2_alt_tilemap) - m_pf2_alt_tilemap->mark_tile_dirty(offset / 2); -} - -/******************************************************************************/ - -TILEMAP_MAPPER_MEMBER(tumbleb_state::tumblep_scan) -{ - /* logical (col,row) -> memory offset */ - return (col & 0x1f) + ((row & 0x1f) << 5) + ((col & 0x60) << 5); -} - -inline void tumbleb_state::get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) -{ - int data = gfx_base[tile_index]; - - tileinfo.set(gfx_bank, - (data & 0x0fff) | (m_tilebank >> 2), - data >> 12, - 0); -} - -TILE_GET_INFO_MEMBER(tumbleb_state::get_bg1_tile_info){ get_bg_tile_info(tileinfo, tile_index, 2, m_pf1_data); } -TILE_GET_INFO_MEMBER(tumbleb_state::get_bg2_tile_info){ get_bg_tile_info(tileinfo, tile_index, 1, m_pf2_data); } - -TILE_GET_INFO_MEMBER(tumbleb_state::get_fg_tile_info) -{ - int data = m_pf1_data[tile_index]; - - tileinfo.set(0, - (data & 0x0fff) | m_tilebank, - data >> 12, - 0); -} - -inline void tumbleb_state::get_fncywld_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) -{ - int data = gfx_base[tile_index * 2]; - int attr = gfx_base[tile_index * 2 + 1]; - - tileinfo.set(gfx_bank, - data & 0x1fff, - attr & 0x1f, - 0); -} - -TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_bg1_tile_info){ get_fncywld_bg_tile_info(tileinfo, tile_index, 2, m_pf1_data); } -TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_bg2_tile_info){ get_fncywld_bg_tile_info(tileinfo, tile_index, 1, m_pf2_data); } - -TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_fg_tile_info) -{ - int data = m_pf1_data[tile_index * 2]; - int attr = m_pf1_data[tile_index * 2 + 1]; - - tileinfo.set(0, - data & 0x1fff, - attr & 0x1f, - 0); -} - - -inline void tumbleb_state::pangpang_get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ) -{ - int data = gfx_base[tile_index * 2 + 1]; - int attr = gfx_base[tile_index * 2]; - - tileinfo.set(gfx_bank, - data & 0x1fff, - (attr >>12) & 0xf, - 0); -} - -inline void tumbleb_state::pangpang_get_bg2x_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ) -{ - int data = gfx_base[tile_index * 2 + 1]; - int attr = gfx_base[tile_index * 2]; - - tileinfo.set(gfx_bank, - (data & 0xfff) + 0x1000, - (attr >>12) & 0xf, - 0); -} - - -TILE_GET_INFO_MEMBER(tumbleb_state::pangpang_get_bg1_tile_info){ pangpang_get_bg_tile_info(tileinfo, tile_index, 2, m_pf1_data); } -TILE_GET_INFO_MEMBER(tumbleb_state::pangpang_get_bg2_tile_info){ pangpang_get_bg2x_tile_info(tileinfo, tile_index, 1, m_pf2_data); } - -TILE_GET_INFO_MEMBER(tumbleb_state::pangpang_get_fg_tile_info) -{ - int data = m_pf1_data[tile_index * 2 + 1]; - int attr = m_pf1_data[tile_index * 2]; - - tileinfo.set(0, - data & 0x1fff, - (attr >> 12)& 0x1f, - 0); -} - - -void tumbleb_state::tumbleb_tilemap_redraw() -{ - m_pf1_tilemap->mark_all_dirty(); - m_pf1_alt_tilemap->mark_all_dirty(); - m_pf2_tilemap->mark_all_dirty(); - if (m_pf2_alt_tilemap) - m_pf2_alt_tilemap->mark_all_dirty(); -} - -VIDEO_START_MEMBER(tumbleb_state,pangpang) -{ - m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::pangpang_get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::pangpang_get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::pangpang_get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - - m_pf1_tilemap->set_transparent_pen(0); - m_pf1_alt_tilemap->set_transparent_pen(0); - - machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); -} - - -VIDEO_START_MEMBER(tumbleb_state,tumblepb) -{ - m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - - m_pf1_tilemap->set_transparent_pen(0); - m_pf1_alt_tilemap->set_transparent_pen(0); - - machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); -} - -VIDEO_START_MEMBER(tumbleb_state,sdfight) -{ - m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); // 64*64 to prevent bad tilemap wrapping? - check real behavior - m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - - m_pf1_tilemap->set_transparent_pen(0); - m_pf1_alt_tilemap->set_transparent_pen(0); - - machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); -} - -VIDEO_START_MEMBER(tumbleb_state,fncywld) -{ - m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fncywld_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fncywld_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fncywld_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - - m_pf1_tilemap->set_transparent_pen(15); - m_pf1_alt_tilemap->set_transparent_pen(15); - - machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); -} - - -VIDEO_START_MEMBER(tumbleb_state,suprtrio) -{ - m_pf1_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_fg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - m_pf1_alt_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg1_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - m_pf2_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(tumbleb_state::get_bg2_tile_info)), tilemap_mapper_delegate(*this, FUNC(tumbleb_state::tumblep_scan)), 16, 16, 64, 32); - - m_pf1_alt_tilemap->set_transparent_pen(0); - - machine().save().register_postload(save_prepost_delegate(FUNC(tumbleb_state::tumbleb_tilemap_redraw), this)); -} - -/******************************************************************************/ - -void tumbleb_state::tumbleb_draw_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pf1x_offs, int pf1y_offs, int pf2x_offs, int pf2y_offs) -{ - m_pf1_tilemap->set_scrollx(0, m_control_0[1] + pf1x_offs); - m_pf1_tilemap->set_scrolly(0, m_control_0[2] + pf1y_offs); - m_pf1_alt_tilemap->set_scrollx(0, m_control_0[1] + pf1x_offs); - m_pf1_alt_tilemap->set_scrolly(0, m_control_0[2] + pf1y_offs); - m_pf2_tilemap->set_scrollx(0, m_control_0[3] + pf2x_offs); - m_pf2_tilemap->set_scrolly(0, m_control_0[4] + pf2y_offs); - - m_pf2_tilemap->draw(screen, bitmap, cliprect, 0, 0); - - if (m_control_0[6] & 0x80) - m_pf1_tilemap->draw(screen, bitmap, cliprect, 0, 0); - else - m_pf1_alt_tilemap->draw(screen, bitmap, cliprect, 0, 0); - - m_sprgen->set_flip_screen(flip_screen() != 0); - m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, m_spriteram.bytes()/2); -} - -uint32_t tumbleb_state::screen_update_tumblepb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - if (flip_screen()) - offs = 1; - else - offs = -1; - - if (flip_screen()) - offs2 = -3; - else - offs2 = -5; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - - return 0; -} - -uint32_t tumbleb_state::screen_update_jumpkids(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - if (flip_screen()) - offs = 1; - else - offs = -1; - - if (flip_screen()) - offs2 = -3; - else - offs2 = -5; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - return 0; -} - -uint32_t tumbleb_state::screen_update_semicom(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - if (flip_screen()) - offs = 1; - else - offs = -1; - - if (flip_screen()) - offs2 = -3; - else - offs2 = -5; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - return 0; -} - -uint32_t tumbleb_state::screen_update_semicom_altoffsets(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offsx, offsy, offsx2; - - flip_screen_set(m_control_0[0] & 0x80); - - offsx = -1; - offsy = 2; - offsx2 = -5; - - tumbleb_draw_common(screen, bitmap, cliprect, offsx2, 0, offsx, offsy); - - return 0; -} - -uint32_t tumbleb_state::screen_update_bcstory(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - /* not sure of this */ - if (flip_screen()) - offs = 1; - else - offs = 8; - - /* not sure of this */ - if (flip_screen()) - offs2 = -3; - else - offs2 = 8; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - return 0; -} - -uint32_t tumbleb_state::screen_update_semibase(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - offs = -1; - offs2 = -2; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - - return 0; -} - -uint32_t tumbleb_state::screen_update_sdfight(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - offs = -1; - offs2 = -5; // foreground scroll.. - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, -16, offs, 0); - - return 0; -} - -uint32_t tumbleb_state::screen_update_fncywld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - if (flip_screen()) - offs = 1; - else - offs = -1; - - if (flip_screen()) - offs2 = -3; - else - offs2 = -5; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - - return 0; -} - -uint32_t tumbleb_state::screen_update_pangpang(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int offs, offs2; - - flip_screen_set(m_control_0[0] & 0x80); - - if (flip_screen()) - offs = 1; - else - offs = -1; - - if (flip_screen()) - offs2 = -3; - else - offs2 = -5; - - tumbleb_draw_common(screen, bitmap, cliprect, offs2, 0, offs, 0); - return 0; -} - - - -uint32_t tumbleb_state::screen_update_suprtrio(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - m_pf1_alt_tilemap->set_scrollx(0, -m_control[1] - 6); - m_pf1_alt_tilemap->set_scrolly(0, -m_control[2]); - m_pf2_tilemap->set_scrollx(0, -m_control[3] - 2); - m_pf2_tilemap->set_scrolly(0, -m_control[4]); - - m_pf2_tilemap->draw(screen, bitmap, cliprect, 0, 0); - m_pf1_alt_tilemap->draw(screen, bitmap, cliprect, 0, 0); - - m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, m_spriteram.bytes()/2); - return 0; -} From a17fde481e16bce70d07b5ce0527aac1d87e0fbf Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 7 Mar 2026 15:09:43 -0500 Subject: [PATCH 189/351] konami/trackfld.cpp: Cleanup - Consolidate in single driver file (except for audio device) - Use same raw parameters for screen as contemporary Konami games - yieartf: Use scanline timer for NMI generation as in parent set --- src/mame/konami/trackfld.cpp | 391 +++++++++++++++++++++++++++++++-- src/mame/konami/trackfld.h | 134 ----------- src/mame/konami/trackfld_v.cpp | 247 --------------------- 3 files changed, 371 insertions(+), 401 deletions(-) delete mode 100644 src/mame/konami/trackfld.h delete mode 100644 src/mame/konami/trackfld_v.cpp diff --git a/src/mame/konami/trackfld.cpp b/src/mame/konami/trackfld.cpp index 4561028f4e8..8cc9eb51b69 100644 --- a/src/mame/konami/trackfld.cpp +++ b/src/mame/konami/trackfld.cpp @@ -181,22 +181,379 @@ MAIN BOARD: ***************************************************************************/ #include "emu.h" -#include "trackfld.h" -#include "konamipt.h" + #include "hyprolyb.h" +#include "konami1.h" +#include "konamipt.h" +#include "trackfld_a.h" #include "cpu/z80/z80.h" #include "cpu/m6800/m6800.h" #include "cpu/m6809/m6809.h" -#include "konami1.h" +#include "machine/74259.h" #include "machine/nvram.h" +#include "machine/timer.h" #include "machine/watchdog.h" +#include "sound/dac.h" +#include "sound/sn76496.h" +#include "sound/vlm5030.h" + +#include "emupal.h" +#include "screen.h" #include "speaker.h" +#include "tilemap.h" +#include "video/resnet.h" + +namespace { + +class trackfld_state : public driver_device +{ + static constexpr XTAL MASTER_CLOCK = XTAL(18'432'000); + static constexpr XTAL SOUND_CLOCK = XTAL(14'318'181); + static constexpr XTAL VLM_CLOCK = XTAL(3'579'545); + +public: + trackfld_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_spriteram2(*this, "spriteram2"), + m_scroll(*this, "scroll"), + m_spriteram(*this, "spriteram"), + m_scroll2(*this, "scroll2"), + m_videoram(*this, "videoram"), + m_colorram(*this, "colorram"), + m_maincpu(*this, "maincpu"), + m_mainlatch(*this, "mainlatch"), + m_audiocpu(*this, "audiocpu"), + m_soundbrd(*this, "trackfld_audio"), + m_sn(*this, "snsnd"), + m_vlm(*this, "vlm"), + m_dac(*this, "dac"), + m_screen(*this, "screen"), + m_gfxdecode(*this, "gfxdecode"), + m_palette(*this, "palette") + { } + + void reaktor(machine_config &config); + void atlantol(machine_config &config); + void yieartf(machine_config &config); + void wizzquiz(machine_config &config); + void trackfld(machine_config &config); + void trackfldu(machine_config &config); + void hyprolyb(machine_config &config); + void mastkin(machine_config &config); + + void init_trackfld(); + void init_atlantol(); + void init_wizzquiz(); + void init_mastkin(); + void init_trackfldnz(); + +private: + void questions_bank_w(uint8_t data); + void trackfld_videoram_w(offs_t offset, uint8_t data); + void trackfld_colorram_w(offs_t offset, uint8_t data); + void atlantol_gfxbank_w(uint8_t data); + uint8_t trackfld_SN76489a_r(); + uint8_t trackfld_speech_r(); + void trackfld_VLM5030_control_w(uint8_t data); + void konami_SN76489a_latch_w(uint8_t data) { m_SN76489a_latch = data; } + void konami_SN76489a_w(uint8_t data) { m_sn->write(m_SN76489a_latch); } + + void hyprolyb_sound_map(address_map &map) ATTR_COLD; + void main_map(address_map &map) ATTR_COLD; + void mastkin_map(address_map &map) ATTR_COLD; + void reaktor_io_map(address_map &map) ATTR_COLD; + void reaktor_map(address_map &map) ATTR_COLD; + void sound_map(address_map &map) ATTR_COLD; + void vlm_map(address_map &map) ATTR_COLD; + void wizzquiz_map(address_map &map) ATTR_COLD; + void yieartf_map(address_map &map) ATTR_COLD; + void hyprolyb_adpcm_map(address_map &map) ATTR_COLD; + + /* memory pointers */ + required_shared_ptr m_spriteram2; + required_shared_ptr m_scroll; + required_shared_ptr m_spriteram; + required_shared_ptr m_scroll2; + required_shared_ptr m_videoram; + required_shared_ptr m_colorram; + + /* devices */ + required_device m_maincpu; + optional_device m_mainlatch; + optional_device m_audiocpu; + optional_device m_soundbrd; + optional_device m_sn; + optional_device m_vlm; + required_device m_dac; + required_device m_screen; + required_device m_gfxdecode; + required_device m_palette; + + /* video-related */ + tilemap_t *m_bg_tilemap = nullptr; + int m_bg_bank = 0; + int m_sprite_bank1 = 0; + int m_sprite_bank2 = 0; + int m_old_gfx_bank = 0; // needed by atlantol + int m_sprites_gfx_banked = 0; + + bool m_irq_mask = false; + bool m_nmi_mask = false; + + uint8_t m_SN76489a_latch = 0; + + void coin_counter_1_w(int state); + void coin_counter_2_w(int state); + void irq_mask_w(int state); + void nmi_mask_w(int state); + + TILE_GET_INFO_MEMBER(get_bg_tile_info); + DECLARE_MACHINE_START(trackfld); + DECLARE_MACHINE_RESET(trackfld); + DECLARE_VIDEO_START(trackfld); + void trackfld_palette(palette_device &palette) const; + DECLARE_VIDEO_START(atlantol); + uint32_t screen_update_trackfld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void vblank_irq(int state); + void vblank_nmi(int state); + TIMER_DEVICE_CALLBACK_MEMBER(yieartf_timer_irq); + void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ); +}; -#define MASTER_CLOCK XTAL(18'432'000) -#define SOUND_CLOCK XTAL(14'318'181) -#define VLM_CLOCK XTAL(3'579'545) +/*************************************************************************** + + Convert the color PROMs into a more useable format. + + Track 'n Field has one 32x8 palette PROM and two 256x4 lookup table PROMs + (one for characters, one for sprites). + The palette PROM is connected to the RGB output this way: + + bit 7 -- 220 ohm resistor -- BLUE + -- 470 ohm resistor -- BLUE + -- 220 ohm resistor -- GREEN + -- 470 ohm resistor -- GREEN + -- 1 kohm resistor -- GREEN + -- 220 ohm resistor -- RED + -- 470 ohm resistor -- RED + bit 0 -- 1 kohm resistor -- RED + +***************************************************************************/ + +void trackfld_state::trackfld_palette(palette_device &palette) const +{ + const uint8_t *color_prom = memregion("proms")->base(); + static constexpr int resistances_rg[3] = { 1000, 470, 220 }; + static constexpr int resistances_b [2] = { 470, 220 }; + + // compute the color output resistor weights + double rweights[3], gweights[3], bweights[2]; + compute_resistor_weights(0, 255, -1.0, + 3, &resistances_rg[0], rweights, 1000, 0, + 3, &resistances_rg[0], gweights, 1000, 0, + 2, &resistances_b[0], bweights, 1000, 0); + + // create a lookup table for the palette + for (int i = 0; i < 0x20; i++) + { + int bit0, bit1, bit2; + + // red component + bit0 = BIT(color_prom[i], 0); + bit1 = BIT(color_prom[i], 1); + bit2 = BIT(color_prom[i], 2); + int const r = combine_weights(rweights, bit0, bit1, bit2); + + // green component + bit0 = BIT(color_prom[i], 3); + bit1 = BIT(color_prom[i], 4); + bit2 = BIT(color_prom[i], 5); + int const g = combine_weights(gweights, bit0, bit1, bit2); + + // blue component + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = combine_weights(bweights, bit0, bit1); + + palette.set_indirect_color(i, rgb_t(r, g, b)); + } + + // color_prom now points to the beginning of the lookup table + color_prom += 0x20; + + // sprites + for (int i = 0; i < 0x100; i++) + { + uint8_t const ctabentry = color_prom[i] & 0x0f; + palette.set_pen_indirect(i, ctabentry); + } + + // characters + for (int i = 0x100; i < 0x200; i++) + { + uint8_t const ctabentry = (color_prom[i] & 0x0f) | 0x10; + palette.set_pen_indirect(i, ctabentry); + } +} + +void trackfld_state::trackfld_videoram_w(offs_t offset, uint8_t data) +{ + m_videoram[offset] = data; + m_bg_tilemap->mark_tile_dirty(offset); +} + +void trackfld_state::trackfld_colorram_w(offs_t offset, uint8_t data) +{ + m_colorram[offset] = data; + m_bg_tilemap->mark_tile_dirty(offset); +} + +void trackfld_state::atlantol_gfxbank_w(uint8_t data) +{ + if (data & 1) + { + /* male / female sprites switch */ + if ((m_old_gfx_bank == 1 && (data & 1) == 1) || (m_old_gfx_bank == 0 && (data & 1) == 1)) + m_sprite_bank2 = 0x200; + else + m_sprite_bank2 = 0; + + m_sprite_bank1 = 0; + m_old_gfx_bank = data & 1; + } + else + { + /* male / female sprites switch */ + if ((m_old_gfx_bank == 0 && (data & 1) == 0) || (m_old_gfx_bank == 1 && (data & 1) == 0)) + m_sprite_bank2 = 0; + else + m_sprite_bank2 = 0x200; + + m_sprite_bank1 = 0; + m_old_gfx_bank = data & 1; + } + + if ((data & 3) == 3) + { + if (m_sprite_bank2) + m_sprite_bank1 = 0x500; + else + m_sprite_bank1 = 0x300; + } + else if ((data & 3) == 2) + { + if (m_sprite_bank2) + m_sprite_bank1 = 0x300; + else + m_sprite_bank1 = 0x100; + } + + if (m_bg_bank != (data & 0x8)) + { + m_bg_bank = data & 0x8; + m_bg_tilemap->mark_all_dirty(); + } +} + +TILE_GET_INFO_MEMBER(trackfld_state::get_bg_tile_info) +{ + int attr = m_colorram[tile_index]; + int code = m_videoram[tile_index] + 4 * (attr & 0xc0); + int color = attr & 0x0f; + int flags = ((attr & 0x10) ? TILE_FLIPX : 0) | ((attr & 0x20) ? TILE_FLIPY : 0); + + if (m_bg_bank) + code |= 0x400; + + tileinfo.set(1, code, color, flags); +} + +VIDEO_START_MEMBER(trackfld_state,trackfld) +{ + m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(trackfld_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); + m_bg_tilemap->set_scroll_rows(32); + m_sprites_gfx_banked = 0; +} + + +VIDEO_START_MEMBER(trackfld_state,atlantol) +{ + VIDEO_START_CALL_MEMBER( trackfld ); + m_sprites_gfx_banked = 1; +} + + + +void trackfld_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ) +{ + uint8_t *spriteram = m_spriteram; + uint8_t *spriteram_2 = m_spriteram2; + int offs; + + for (offs = m_spriteram.bytes() - 2; offs >= 0; offs -= 2) + { + int attr = spriteram_2[offs]; + int code = spriteram[offs + 1]; + int color = attr & 0x0f; + if (!m_sprites_gfx_banked) + if (attr&1) code|=0x100; // extra tile# bit for the yiear conversion, trackfld doesn't have this many sprites so it will just get masked + int flipx = ~attr & 0x40; + int flipy = attr & 0x80; + int sx = spriteram[offs] - 1; + int sy = 240 - spriteram_2[offs + 1]; + + if (flip_screen()) + { + sy = 240 - sy; + flipy = !flipy; + } + + /* Note that this adjustement must be done AFTER handling flip screen, thus */ + /* proving that this is a hardware related "feature" */ + sy += 1; + + // to fix the title screen in yieartf it would have to be like this, the same as yiear.c, this should be verified on the hw + // + //if (offs < 0x26) + //{ + // sy++; /* fix title screen & garbage at the bottom of the screen */ + //} + + + + m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, + code + m_sprite_bank1 + m_sprite_bank2, color, + flipx, flipy, + sx, sy, + m_palette->transpen_mask(*m_gfxdecode->gfx(0), color, 0)); + + /* redraw with wraparound */ + + m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, + code + m_sprite_bank1 + m_sprite_bank2, color, + flipx, flipy, + sx - 256, sy, + m_palette->transpen_mask(*m_gfxdecode->gfx(0), color, 0)); + } +} + + +uint32_t trackfld_state::screen_update_trackfld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int row, scrollx; + + for (row = 0; row < 32; row++) + { + scrollx = m_scroll[row] + 256 * (m_scroll2[row] & 0x01); + if (flip_screen()) scrollx = -scrollx; + m_bg_tilemap->set_scrollx(row, scrollx); + } + + m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); + draw_sprites(bitmap, cliprect); + return 0; +} void trackfld_state::coin_counter_1_w(int state) @@ -911,10 +1268,7 @@ void trackfld_state::trackfld(machine_config &config) /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); - m_screen->set_size(32*8, 32*8); - m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1); + m_screen->set_raw(MASTER_CLOCK/3, 384, 0, 256, 264, 16, 240); m_screen->set_screen_update(FUNC(trackfld_state::screen_update_trackfld)); m_screen->set_palette(m_palette); m_screen->screen_vblank().set(FUNC(trackfld_state::vblank_irq)); @@ -947,10 +1301,10 @@ void trackfld_state::trackfldu(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &trackfld_state::main_map); } -INTERRUPT_GEN_MEMBER(trackfld_state::yieartf_timer_irq) +TIMER_DEVICE_CALLBACK_MEMBER(trackfld_state::yieartf_timer_irq) { if (m_nmi_mask) - device.execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE); + m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); } void trackfld_state::yieartf(machine_config &config) @@ -958,11 +1312,9 @@ void trackfld_state::yieartf(machine_config &config) /* basic machine hardware */ MC6809E(config, m_maincpu, MASTER_CLOCK/6/2); /* a guess for now */ m_maincpu->set_addrmap(AS_PROGRAM, &trackfld_state::yieartf_map); - m_maincpu->set_periodic_int(FUNC(trackfld_state::yieartf_timer_irq), attotime::from_hz(480)); -// z80 isn't used -// Z80(config, m_audiocpu, SOUND_CLOCK/4); -// m_audiocpu->set_addrmap(AS_PROGRAM, &trackfld_state::sound_map); + // NMI source assumed to be same as in yiear + TIMER(config, "16v").configure_scanline(FUNC(trackfld_state::yieartf_timer_irq), "screen", 16, 32); MCFG_MACHINE_START_OVERRIDE(trackfld_state,trackfld) MCFG_MACHINE_RESET_OVERRIDE(trackfld_state,trackfld) @@ -983,10 +1335,7 @@ void trackfld_state::yieartf(machine_config &config) /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); - m_screen->set_size(32*8, 32*8); - m_screen->set_visarea(0*8, 32*8-1, 2*8, 30*8-1); + m_screen->set_raw(MASTER_CLOCK/3, 384, 0, 256, 264, 16, 240); m_screen->set_screen_update(FUNC(trackfld_state::screen_update_trackfld)); m_screen->set_palette(m_palette); m_screen->screen_vblank().set(FUNC(trackfld_state::vblank_irq)); @@ -1718,6 +2067,8 @@ void trackfld_state::init_wizzquiz() membank("bank1")->configure_entries(0, 8, ROM, 0x8000); } +} // anonymous namespace + GAME( 1983, trackfld, 0, trackfld, trackfld, trackfld_state, init_trackfld, ROT0, "Konami", "Track & Field", MACHINE_SUPPORTS_SAVE ) GAME( 1983, trackfldc, trackfld, trackfld, trackfld, trackfld_state, init_trackfld, ROT0, "Konami (Centuri license)", "Track & Field (Centuri)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/konami/trackfld.h b/src/mame/konami/trackfld.h deleted file mode 100644 index ad8621c2af2..00000000000 --- a/src/mame/konami/trackfld.h +++ /dev/null @@ -1,134 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Chris Hardy -/*************************************************************************** - - Track'n'Field - -***************************************************************************/ -#ifndef MAME_KONAMI_TRACKFLD_H -#define MAME_KONAMI_TRACKFLD_H - -#pragma once - -#include "trackfld_a.h" -#include "machine/74259.h" -#include "sound/dac.h" -#include "sound/sn76496.h" -#include "sound/vlm5030.h" - -#include "emupal.h" -#include "screen.h" -#include "tilemap.h" - -class trackfld_state : public driver_device -{ -public: - trackfld_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_spriteram2(*this, "spriteram2"), - m_scroll(*this, "scroll"), - m_spriteram(*this, "spriteram"), - m_scroll2(*this, "scroll2"), - m_videoram(*this, "videoram"), - m_colorram(*this, "colorram"), - m_maincpu(*this, "maincpu"), - m_mainlatch(*this, "mainlatch"), - m_audiocpu(*this, "audiocpu"), - m_soundbrd(*this, "trackfld_audio"), - m_sn(*this, "snsnd"), - m_vlm(*this, "vlm"), - m_dac(*this, "dac"), - m_screen(*this, "screen"), - m_gfxdecode(*this, "gfxdecode"), - m_palette(*this, "palette") - { } - - void reaktor(machine_config &config); - void atlantol(machine_config &config); - void yieartf(machine_config &config); - void wizzquiz(machine_config &config); - void trackfld(machine_config &config); - void trackfldu(machine_config &config); - void hyprolyb(machine_config &config); - void mastkin(machine_config &config); - - void init_trackfld(); - void init_atlantol(); - void init_wizzquiz(); - void init_mastkin(); - void init_trackfldnz(); - -private: - void questions_bank_w(uint8_t data); - void trackfld_videoram_w(offs_t offset, uint8_t data); - void trackfld_colorram_w(offs_t offset, uint8_t data); - void atlantol_gfxbank_w(uint8_t data); - uint8_t trackfld_SN76489a_r(); - uint8_t trackfld_speech_r(); - void trackfld_VLM5030_control_w(uint8_t data); - void konami_SN76489a_latch_w(uint8_t data) { m_SN76489a_latch = data; } - void konami_SN76489a_w(uint8_t data) { m_sn->write(m_SN76489a_latch); } - - void hyprolyb_sound_map(address_map &map) ATTR_COLD; - void main_map(address_map &map) ATTR_COLD; - void mastkin_map(address_map &map) ATTR_COLD; - void reaktor_io_map(address_map &map) ATTR_COLD; - void reaktor_map(address_map &map) ATTR_COLD; - void sound_map(address_map &map) ATTR_COLD; - void vlm_map(address_map &map) ATTR_COLD; - void wizzquiz_map(address_map &map) ATTR_COLD; - void yieartf_map(address_map &map) ATTR_COLD; - void hyprolyb_adpcm_map(address_map &map) ATTR_COLD; - - /* memory pointers */ - required_shared_ptr m_spriteram2; - required_shared_ptr m_scroll; - required_shared_ptr m_spriteram; - required_shared_ptr m_scroll2; - required_shared_ptr m_videoram; - required_shared_ptr m_colorram; - - /* devices */ - required_device m_maincpu; - optional_device m_mainlatch; - optional_device m_audiocpu; - optional_device m_soundbrd; - optional_device m_sn; - optional_device m_vlm; - required_device m_dac; - required_device m_screen; - required_device m_gfxdecode; - required_device m_palette; - - /* video-related */ - tilemap_t *m_bg_tilemap = nullptr; - int m_bg_bank = 0; - int m_sprite_bank1 = 0; - int m_sprite_bank2 = 0; - int m_old_gfx_bank = 0; // needed by atlantol - int m_sprites_gfx_banked = 0; - - bool m_irq_mask = false; - bool m_nmi_mask = false; - - uint8_t m_SN76489a_latch = 0; - - void coin_counter_1_w(int state); - void coin_counter_2_w(int state); - void irq_mask_w(int state); - void nmi_mask_w(int state); - - TILE_GET_INFO_MEMBER(get_bg_tile_info); - DECLARE_MACHINE_START(trackfld); - DECLARE_MACHINE_RESET(trackfld); - DECLARE_VIDEO_START(trackfld); - void trackfld_palette(palette_device &palette) const; - DECLARE_VIDEO_START(atlantol); - uint32_t screen_update_trackfld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void vblank_irq(int state); - void vblank_nmi(int state); - INTERRUPT_GEN_MEMBER(yieartf_timer_irq); - void draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ); -}; - -#endif // MAME_KONAMI_TRACKFLD_H diff --git a/src/mame/konami/trackfld_v.cpp b/src/mame/konami/trackfld_v.cpp deleted file mode 100644 index 07c629481b7..00000000000 --- a/src/mame/konami/trackfld_v.cpp +++ /dev/null @@ -1,247 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Chris Hardy -/*************************************************************************** - - video.c - - Functions to emulate the video hardware of the machine. - -***************************************************************************/ - -#include "emu.h" -#include "video/resnet.h" -#include "trackfld.h" - -/*************************************************************************** - - Convert the color PROMs into a more useable format. - - Track 'n Field has one 32x8 palette PROM and two 256x4 lookup table PROMs - (one for characters, one for sprites). - The palette PROM is connected to the RGB output this way: - - bit 7 -- 220 ohm resistor -- BLUE - -- 470 ohm resistor -- BLUE - -- 220 ohm resistor -- GREEN - -- 470 ohm resistor -- GREEN - -- 1 kohm resistor -- GREEN - -- 220 ohm resistor -- RED - -- 470 ohm resistor -- RED - bit 0 -- 1 kohm resistor -- RED - -***************************************************************************/ - -void trackfld_state::trackfld_palette(palette_device &palette) const -{ - const uint8_t *color_prom = memregion("proms")->base(); - static constexpr int resistances_rg[3] = { 1000, 470, 220 }; - static constexpr int resistances_b [2] = { 470, 220 }; - - // compute the color output resistor weights - double rweights[3], gweights[3], bweights[2]; - compute_resistor_weights(0, 255, -1.0, - 3, &resistances_rg[0], rweights, 1000, 0, - 3, &resistances_rg[0], gweights, 1000, 0, - 2, &resistances_b[0], bweights, 1000, 0); - - // create a lookup table for the palette - for (int i = 0; i < 0x20; i++) - { - int bit0, bit1, bit2; - - // red component - bit0 = BIT(color_prom[i], 0); - bit1 = BIT(color_prom[i], 1); - bit2 = BIT(color_prom[i], 2); - int const r = combine_weights(rweights, bit0, bit1, bit2); - - // green component - bit0 = BIT(color_prom[i], 3); - bit1 = BIT(color_prom[i], 4); - bit2 = BIT(color_prom[i], 5); - int const g = combine_weights(gweights, bit0, bit1, bit2); - - // blue component - bit0 = BIT(color_prom[i], 6); - bit1 = BIT(color_prom[i], 7); - int const b = combine_weights(bweights, bit0, bit1); - - palette.set_indirect_color(i, rgb_t(r, g, b)); - } - - // color_prom now points to the beginning of the lookup table - color_prom += 0x20; - - // sprites - for (int i = 0; i < 0x100; i++) - { - uint8_t const ctabentry = color_prom[i] & 0x0f; - palette.set_pen_indirect(i, ctabentry); - } - - // characters - for (int i = 0x100; i < 0x200; i++) - { - uint8_t const ctabentry = (color_prom[i] & 0x0f) | 0x10; - palette.set_pen_indirect(i, ctabentry); - } -} - -void trackfld_state::trackfld_videoram_w(offs_t offset, uint8_t data) -{ - m_videoram[offset] = data; - m_bg_tilemap->mark_tile_dirty(offset); -} - -void trackfld_state::trackfld_colorram_w(offs_t offset, uint8_t data) -{ - m_colorram[offset] = data; - m_bg_tilemap->mark_tile_dirty(offset); -} - -void trackfld_state::atlantol_gfxbank_w(uint8_t data) -{ - if (data & 1) - { - /* male / female sprites switch */ - if ((m_old_gfx_bank == 1 && (data & 1) == 1) || (m_old_gfx_bank == 0 && (data & 1) == 1)) - m_sprite_bank2 = 0x200; - else - m_sprite_bank2 = 0; - - m_sprite_bank1 = 0; - m_old_gfx_bank = data & 1; - } - else - { - /* male / female sprites switch */ - if ((m_old_gfx_bank == 0 && (data & 1) == 0) || (m_old_gfx_bank == 1 && (data & 1) == 0)) - m_sprite_bank2 = 0; - else - m_sprite_bank2 = 0x200; - - m_sprite_bank1 = 0; - m_old_gfx_bank = data & 1; - } - - if ((data & 3) == 3) - { - if (m_sprite_bank2) - m_sprite_bank1 = 0x500; - else - m_sprite_bank1 = 0x300; - } - else if ((data & 3) == 2) - { - if (m_sprite_bank2) - m_sprite_bank1 = 0x300; - else - m_sprite_bank1 = 0x100; - } - - if (m_bg_bank != (data & 0x8)) - { - m_bg_bank = data & 0x8; - m_bg_tilemap->mark_all_dirty(); - } -} - -TILE_GET_INFO_MEMBER(trackfld_state::get_bg_tile_info) -{ - int attr = m_colorram[tile_index]; - int code = m_videoram[tile_index] + 4 * (attr & 0xc0); - int color = attr & 0x0f; - int flags = ((attr & 0x10) ? TILE_FLIPX : 0) | ((attr & 0x20) ? TILE_FLIPY : 0); - - if (m_bg_bank) - code |= 0x400; - - tileinfo.set(1, code, color, flags); -} - -VIDEO_START_MEMBER(trackfld_state,trackfld) -{ - m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(trackfld_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); - m_bg_tilemap->set_scroll_rows(32); - m_sprites_gfx_banked = 0; -} - - -VIDEO_START_MEMBER(trackfld_state,atlantol) -{ - VIDEO_START_CALL_MEMBER( trackfld ); - m_sprites_gfx_banked = 1; -} - - - -void trackfld_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &cliprect ) -{ - uint8_t *spriteram = m_spriteram; - uint8_t *spriteram_2 = m_spriteram2; - int offs; - - for (offs = m_spriteram.bytes() - 2; offs >= 0; offs -= 2) - { - int attr = spriteram_2[offs]; - int code = spriteram[offs + 1]; - int color = attr & 0x0f; - if (!m_sprites_gfx_banked) - if (attr&1) code|=0x100; // extra tile# bit for the yiear conversion, trackfld doesn't have this many sprites so it will just get masked - int flipx = ~attr & 0x40; - int flipy = attr & 0x80; - int sx = spriteram[offs] - 1; - int sy = 240 - spriteram_2[offs + 1]; - - if (flip_screen()) - { - sy = 240 - sy; - flipy = !flipy; - } - - /* Note that this adjustement must be done AFTER handling flip screen, thus */ - /* proving that this is a hardware related "feature" */ - sy += 1; - - // to fix the title screen in yieartf it would have to be like this, the same as yiear.c, this should be verified on the hw - // - //if (offs < 0x26) - //{ - // sy++; /* fix title screen & garbage at the bottom of the screen */ - //} - - - - m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, - code + m_sprite_bank1 + m_sprite_bank2, color, - flipx, flipy, - sx, sy, - m_palette->transpen_mask(*m_gfxdecode->gfx(0), color, 0)); - - /* redraw with wraparound */ - - m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, - code + m_sprite_bank1 + m_sprite_bank2, color, - flipx, flipy, - sx - 256, sy, - m_palette->transpen_mask(*m_gfxdecode->gfx(0), color, 0)); - } -} - - - -uint32_t trackfld_state::screen_update_trackfld(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - int row, scrollx; - - for (row = 0; row < 32; row++) - { - scrollx = m_scroll[row] + 256 * (m_scroll2[row] & 0x01); - if (flip_screen()) scrollx = -scrollx; - m_bg_tilemap->set_scrollx(row, scrollx); - } - - m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); - draw_sprites(bitmap, cliprect); - return 0; -} From e5952effca46e0b57ab1780a5ee3c1721eff7c16 Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 7 Mar 2026 15:14:52 -0500 Subject: [PATCH 190/351] konami/trackfld_a.cpp: Add file accidentally omitted from a17fde481e16bce70d07b5ce0527aac1d87e0fbf --- src/mame/konami/trackfld_a.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/mame/konami/trackfld_a.cpp b/src/mame/konami/trackfld_a.cpp index 676e896c94c..ba7b0b1fe2e 100644 --- a/src/mame/konami/trackfld_a.cpp +++ b/src/mame/konami/trackfld_a.cpp @@ -3,7 +3,6 @@ #include "emu.h" #include "sound/sn76496.h" #include "sound/msm5205.h" -#include "trackfld.h" #include "trackfld_a.h" From 459b91e55fb52f301c0f830e4133564cf4f93d10 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 8 Mar 2026 07:29:19 +1100 Subject: [PATCH 191/351] konami/trackfld_a.cpp: Inputs don't magically change on reset. Also tidy some stuff up. --- src/devices/machine/wd1000.cpp | 24 +++---- src/mame/dataeast/tumbleb.cpp | 114 +++++++++++++++++---------------- src/mame/konami/trackfld_a.cpp | 41 +++++------- src/mame/konami/trackfld_a.h | 4 +- src/mame/nec/piet1.cpp | 2 +- src/mame/seta/downtown.cpp | 4 +- src/mame/ti/tipc.cpp | 34 +++++----- 7 files changed, 109 insertions(+), 114 deletions(-) diff --git a/src/devices/machine/wd1000.cpp b/src/devices/machine/wd1000.cpp index 5babc993f57..16b027d8751 100644 --- a/src/devices/machine/wd1000.cpp +++ b/src/devices/machine/wd1000.cpp @@ -234,13 +234,11 @@ bool wd1000_device::validate_id_field() { harddisk_image_device *file = m_drives[drive()]; const auto &info = file->get_info(); - int16_t sector = m_sector_number - m_sector_base; - if (m_cylinder > info.cylinders || - head() >= info.heads || sector < 0 || - sector >= info.sectors || - sector_bytes() != info.sectorbytes) { + if ((m_cylinder > info.cylinders) || (head() >= info.heads)) + return false; + const int16_t sector = m_sector_number - m_sector_base; + if ((sector < 0) || (sector >= info.sectors) || (sector_bytes() != info.sectorbytes)) return false; - } return true; } @@ -561,14 +559,15 @@ void wd1000_device::cmd_restore() // so it is not necessary to guard that case in these functions. void wd1000_device::cmd_read_sector() { - harddisk_image_device *file = m_drives[drive()]; - - if (!validate_id_field()) { + if (!validate_id_field()) + { set_error(ERR_ID); end_command(); return; } + harddisk_image_device *file = m_drives[drive()]; + uint8_t dma = BIT(m_command, 3); file->read(get_lbasector(), m_buffer); @@ -588,9 +587,8 @@ void wd1000_device::cmd_read_sector() void wd1000_device::cmd_write_sector() { - harddisk_image_device *file = m_drives[drive()]; - - if (!validate_id_field()) { + if (!validate_id_field()) + { set_error(ERR_ID); end_command(); return; @@ -601,6 +599,8 @@ void wd1000_device::cmd_write_sector() logerror("%s: Unexpected unfilled buffer on write, only %d or %d bytes filled\n", machine().describe_context(), m_buffer_index, sector_bytes()); } + harddisk_image_device *file = m_drives[drive()]; + file->write(get_lbasector(), m_buffer); end_command(); diff --git a/src/mame/dataeast/tumbleb.cpp b/src/mame/dataeast/tumbleb.cpp index 2b32bd06f76..1ed5f6b5632 100644 --- a/src/mame/dataeast/tumbleb.cpp +++ b/src/mame/dataeast/tumbleb.cpp @@ -299,20 +299,21 @@ Stephh's notes (based on the games M68000 code and some tests) : ***************************************************************************/ #include "emu.h" -#include "emupal.h" - -#include "cpu/z80/z80.h" -#include "cpu/m68000/m68000.h" -#include "cpu/h6280/h6280.h" -#include "cpu/mcs51/i80c52.h" // for semicom mcu -#include "cpu/pic16c5x/pic16c5x.h" -#include "machine/gen_latch.h" -#include "sound/okim6295.h" -#include "sound/ymopm.h" -#include "sound/ymopl.h" #include "decocrpt.h" #include "decospr.h" + +#include "cpu/h6280/h6280.h" +#include "cpu/m68000/m68000.h" +#include "cpu/mcs51/i80c52.h" // for semicom mcu +#include "cpu/pic16c5x/pic16c5x.h" +#include "cpu/z80/z80.h" +#include "machine/gen_latch.h" +#include "sound/okim6295.h" +#include "sound/ymopl.h" +#include "sound/ymopm.h" + +#include "emupal.h" #include "screen.h" #include "speaker.h" #include "tilemap.h" @@ -346,38 +347,38 @@ public: m_protbase(0) { } - void tumblepb(machine_config &config); - void tumblepba(machine_config &config); - void bcstory(machine_config &config); - void pangpang(machine_config &config); - void semibase(machine_config &config); - void tumbleb2(machine_config &config); - void cookbib(machine_config &config); - void metlsavr(machine_config &config); - void fncywld(machine_config &config); - void magipur(machine_config &config); - void suprtrio(machine_config &config); - void htchctch(machine_config &config); - void htchctch_mcu(machine_config &config); - void sdfight(machine_config &config); - void chokchok(machine_config &config); - void cookbib_mcu(machine_config &config); - void jumpkids(machine_config &config); + void tumblepb(machine_config &config) ATTR_COLD; + void tumblepba(machine_config &config) ATTR_COLD; + void bcstory(machine_config &config) ATTR_COLD; + void pangpang(machine_config &config) ATTR_COLD; + void semibase(machine_config &config) ATTR_COLD; + void tumbleb2(machine_config &config) ATTR_COLD; + void cookbib(machine_config &config) ATTR_COLD; + void metlsavr(machine_config &config) ATTR_COLD; + void fncywld(machine_config &config) ATTR_COLD; + void magipur(machine_config &config) ATTR_COLD; + void suprtrio(machine_config &config) ATTR_COLD; + void htchctch(machine_config &config) ATTR_COLD; + void htchctch_mcu(machine_config &config) ATTR_COLD; + void sdfight(machine_config &config) ATTR_COLD; + void chokchok(machine_config &config) ATTR_COLD; + void cookbib_mcu(machine_config &config) ATTR_COLD; + void jumpkids(machine_config &config) ATTR_COLD; - void init_dquizgo(); - void init_jumpkids(); - void init_htchctch(); - void init_wlstar(); - void init_suprtrio(); - void init_tumblepb(); - void init_tumblepba(); - void init_bcstory(); - void init_wondl96(); - void init_tumbleb2(); - void init_chokchok(); - void init_fncywld(); - void init_magipur(); - void init_carket(); + void init_dquizgo() ATTR_COLD; + void init_jumpkids() ATTR_COLD; + void init_htchctch() ATTR_COLD; + void init_wlstar() ATTR_COLD; + void init_suprtrio() ATTR_COLD; + void init_tumblepb() ATTR_COLD; + void init_tumblepba() ATTR_COLD; + void init_bcstory() ATTR_COLD; + void init_wondl96() ATTR_COLD; + void init_tumbleb2() ATTR_COLD; + void init_chokchok() ATTR_COLD; + void init_fncywld() ATTR_COLD; + void init_magipur() ATTR_COLD; + void init_carket() ATTR_COLD; ioport_value suprtrio_prot_latch_r(); @@ -414,6 +415,9 @@ protected: uint8_t m_semicom_prot_offset = 0; uint16_t m_protbase; + + u8 m_suprtrio_prot_latch = 0; + void tumblepb_oki_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint16_t tumblepb_prot_r(); uint16_t tumblepopb_controls_r(offs_t offset); @@ -469,15 +473,15 @@ protected: uint32_t screen_update_sdfight(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(tumbleb2_interrupt); void tumbleb_tilemap_redraw(); - inline void get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); - inline void get_fncywld_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); - inline void pangpang_get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ); - inline void pangpang_get_bg2x_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ); + inline void get_bg_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); + inline void get_fncywld_bg_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); + inline void pangpang_get_bg_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); + inline void pangpang_get_bg2x_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base); void tumbleb_draw_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int pf1x_offs, int pf1y_offs, int pf2x_offs, int pf2y_offs); - void tumbleb2_set_music_bank( int bank ); - void tumbleb2_play_sound( okim6295_device *oki, int data ); + void tumbleb2_set_music_bank(int bank); + void tumbleb2_play_sound(okim6295_device *oki, int data); void tumbleb2_playmusic(okim6295_device *oki); - void process_tumbleb2_music_command( okim6295_device *oki, int data ); + void process_tumbleb2_music_command(okim6295_device *oki, int data); void tumblepb_gfx_rearrange(int rgn); void suprtrio_decrypt_code(); void suprtrio_decrypt_gfx(); @@ -494,8 +498,6 @@ protected: void suprtrio_sound_map(address_map &map) ATTR_COLD; void tumblepopb_main_map(address_map &map) ATTR_COLD; void tumblepopba_main_map(address_map &map) ATTR_COLD; - - u8 m_suprtrio_prot_latch = 0; }; class tumbleb_pic_state : public tumbleb_state @@ -633,7 +635,7 @@ TILEMAP_MAPPER_MEMBER(tumbleb_state::tumblep_scan) return (col & 0x1f) + ((row & 0x1f) << 5) + ((col & 0x60) << 5); } -inline void tumbleb_state::get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) +inline void tumbleb_state::get_bg_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) { int data = gfx_base[tile_index]; @@ -656,7 +658,7 @@ TILE_GET_INFO_MEMBER(tumbleb_state::get_fg_tile_info) 0); } -inline void tumbleb_state::get_fncywld_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) +inline void tumbleb_state::get_fncywld_bg_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) { int data = gfx_base[tile_index * 2]; int attr = gfx_base[tile_index * 2 + 1]; @@ -681,7 +683,7 @@ TILE_GET_INFO_MEMBER(tumbleb_state::get_fncywld_fg_tile_info) 0); } -inline void tumbleb_state::pangpang_get_bg_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ) +inline void tumbleb_state::pangpang_get_bg_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) { int data = gfx_base[tile_index * 2 + 1]; int attr = gfx_base[tile_index * 2]; @@ -692,7 +694,7 @@ inline void tumbleb_state::pangpang_get_bg_tile_info( tile_data &tileinfo, int t 0); } -inline void tumbleb_state::pangpang_get_bg2x_tile_info( tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base ) +inline void tumbleb_state::pangpang_get_bg2x_tile_info(tile_data &tileinfo, int tile_index, int gfx_bank, uint16_t *gfx_base) { int data = gfx_base[tile_index * 2 + 1]; int attr = gfx_base[tile_index * 2]; @@ -1143,7 +1145,7 @@ static const int tumbleb_sound_lookup[256] = { }; /* we use channels 1,2,3 for sound effects, and channel 4 for music */ -void tumbleb_state::tumbleb2_set_music_bank( int bank ) +void tumbleb_state::tumbleb2_set_music_bank(int bank) { uint8_t *oki = memregion("oki")->base(); memcpy(&oki[0x38000], &oki[0x80000 + 0x38000 + 0x8000 * bank], 0x8000); diff --git a/src/mame/konami/trackfld_a.cpp b/src/mame/konami/trackfld_a.cpp index ba7b0b1fe2e..62d0ba911df 100644 --- a/src/mame/konami/trackfld_a.cpp +++ b/src/mame/konami/trackfld_a.cpp @@ -1,12 +1,10 @@ // license:BSD-3-Clause // copyright-holders:Chris Hardy #include "emu.h" -#include "sound/sn76496.h" -#include "sound/msm5205.h" #include "trackfld_a.h" -#define TIMER_RATE (4096/4) +constexpr unsigned TIMER_RATE = 4096 / 4; @@ -27,7 +25,6 @@ trackfld_audio_device::trackfld_audio_device(const machine_config &mconfig, cons void trackfld_audio_device::device_start() { - /* sound */ save_item(NAME(m_last_addr)); save_item(NAME(m_last_irq)); } @@ -38,8 +35,6 @@ void trackfld_audio_device::device_start() void trackfld_audio_device::device_reset() { - m_last_addr = 0; - m_last_irq = 0; } /* The timer port on TnF and HyperSports sound hardware is derived from @@ -67,17 +62,17 @@ uint8_t trackfld_audio_device::trackfld_speech_r() void trackfld_audio_device::trackfld_sound_w(offs_t offset, uint8_t data) { - int changes = offset ^ m_last_addr; + const uint8_t changes = offset ^ m_last_addr; - /* A7 = data enable for VLM5030 (don't care ) */ - /* A8 = STA pin (1->0 data data , 0->1 start speech */ - /* A9 = RST pin 1=reset */ + // A7 = data enable for VLM5030 (don't care) + // A8 = STA pin (1->0 data data , 0->1 start speech + // A9 = RST pin 1=reset - /* A8 VLM5030 ST pin */ + // A8 VLM5030 ST pin if (changes & 0x100) m_vlm->st(offset & 0x100); - /* A9 VLM5030 RST pin */ + // A9 VLM5030 RST pin if (changes & 0x200) m_vlm->rst(offset & 0x200); @@ -96,20 +91,20 @@ uint8_t trackfld_audio_device::hyperspt_sh_timer_r() void trackfld_audio_device::hyperspt_sound_w(offs_t offset, uint8_t data) { - int changes = offset ^ m_last_addr; + const uint8_t changes = offset ^ m_last_addr; - /* A3 = data enable for VLM5030 (don't care ) */ - /* A4 = STA pin (1->0 data data , 0->1 start speech */ - /* A5 = RST pin 1=reset */ - /* A6 = VLM5030 output disable (don't care ) */ - /* A7 = kONAMI DAC output disable (don't care ) */ - /* A8 = SN76489AN output disable (don't care ) */ + // A3 = data enable for VLM5030 (don't care ) + // A4 = STA pin (1->0 data data , 0->1 start speech + // A5 = RST pin 1=reset + // A6 = VLM5030 output disable (don't care ) + // A7 = kONAMI DAC output disable (don't care ) + // A8 = SN76489AN output disable (don't care ) - /* A4 VLM5030 ST pin */ + // A4 VLM5030 ST pin if (changes & 0x10) m_vlm->st(offset & 0x10); - /* A5 VLM5030 RST pin */ + // A5 VLM5030 RST pin if( changes & 0x20 ) m_vlm->rst(offset & 0x20); @@ -120,11 +115,9 @@ void trackfld_audio_device::hyperspt_sound_w(offs_t offset, uint8_t data) void trackfld_audio_device::sh_irqtrigger_w(int state) { + // setting bit 0 low then high triggers IRQ on the sound CPU if (m_last_irq == 0 && state) - { - /* setting bit 0 low then high triggers IRQ on the sound CPU */ m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 - } m_last_irq = state; } diff --git a/src/mame/konami/trackfld_a.h b/src/mame/konami/trackfld_a.h index a9c198bfaa7..a7dd896011b 100644 --- a/src/mame/konami/trackfld_a.h +++ b/src/mame/konami/trackfld_a.h @@ -5,8 +5,8 @@ #pragma once -#include "sound/vlm5030.h" #include "cpu/m6800/m6800.h" +#include "sound/vlm5030.h" class trackfld_audio_device : public device_t { @@ -29,7 +29,7 @@ public: void hyperspt_sound_w(offs_t offset, uint8_t data); protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; diff --git a/src/mame/nec/piet1.cpp b/src/mame/nec/piet1.cpp index fbb6e5e2cbd..1c766b35f9d 100644 --- a/src/mame/nec/piet1.cpp +++ b/src/mame/nec/piet1.cpp @@ -39,7 +39,7 @@ public: , m_screen(*this, "screen") { } - void piet1(machine_config &config); + void piet1(machine_config &config) ATTR_COLD; protected: virtual void machine_start() override ATTR_COLD; diff --git a/src/mame/seta/downtown.cpp b/src/mame/seta/downtown.cpp index f6b9cd74ee8..bf715d80a59 100644 --- a/src/mame/seta/downtown.cpp +++ b/src/mame/seta/downtown.cpp @@ -1065,8 +1065,8 @@ void downtown_state::calibr50_sub_reset_w(u8 data) void downtown_state::calibr50_sub_map(address_map &map) { map(0x0000, 0x1fff).lrw8( - NAME([this](offs_t offset) { return m_x1snd->read(offset ^ 0x1000); }), - NAME([this](offs_t offset, u8 data) { m_x1snd->write(offset ^ 0x1000, data); })); + NAME([this] (offs_t offset) { return m_x1snd->read(offset ^ 0x1000); }), + NAME([this] (offs_t offset, u8 data) { m_x1snd->write(offset ^ 0x1000, data); })); map(0x4000, 0x4000).r(m_soundlatch[0], FUNC(generic_latch_8_device::read)); map(0x4000, 0x4000).w(FUNC(downtown_state::calibr50_sub_bankswitch_w)); map(0x8000, 0xbfff).bankr(m_subbank); diff --git a/src/mame/ti/tipc.cpp b/src/mame/ti/tipc.cpp index 3de7359959d..e707efcd193 100644 --- a/src/mame/ti/tipc.cpp +++ b/src/mame/ti/tipc.cpp @@ -69,7 +69,7 @@ public: , m_floppies(*this, "fdc:%u", 0U) { } - void tipc(machine_config &config); + void tipc(machine_config &config) ATTR_COLD; protected: void machine_start() override ATTR_COLD; @@ -87,22 +87,6 @@ private: void tipc_io(address_map &map) ATTR_COLD; void tipc_map(address_map &map) ATTR_COLD; - required_device m_maincpu; - required_ioport m_dsw0; - required_device m_upd8251; - required_device m_pit8253; - required_device m_pic8259; - required_device m_rs232; - required_device m_irq2_merger; - required_device m_irq3_merger; - required_device m_ram; - required_device m_crtc; - required_device m_palette; - required_region_ptr m_vdu_char_rom; - required_shared_ptr_array m_crtc_gfx; - required_device m_fdc; - required_device_array m_floppies; - MC6845_UPDATE_ROW(crtc_update_row); MC6845_ON_UPDATE_ADDR_CHANGED(crtc_addr_changed); @@ -127,6 +111,22 @@ private: void vsync_changed(int state); + required_device m_maincpu; + required_ioport m_dsw0; + required_device m_upd8251; + required_device m_pit8253; + required_device m_pic8259; + required_device m_rs232; + required_device m_irq2_merger; + required_device m_irq3_merger; + required_device m_ram; + required_device m_crtc; + required_device m_palette; + required_region_ptr m_vdu_char_rom; + required_shared_ptr_array m_crtc_gfx; + required_device m_fdc; + required_device_array m_floppies; + uint8_t m_u47; int m_buf_mode, side; From 27e8329725cb0e94a87f31333d93e0cb54fd41f8 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 8 Mar 2026 17:08:09 +1100 Subject: [PATCH 192/351] cpu/sharc: Implemented saturation for ALU dual add/subtract in interpreter. --- src/devices/cpu/sharc/compute.hxx | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index b0e515fca77..1a6452a9739 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -10,9 +10,9 @@ #define SET_FLAG_AZ(r) do { m_core->astat |= (((r) == 0) ? AZ : 0); } while (false) #define SET_FLAG_AN(r) do { m_core->astat |= (((r) & 0x80000000) ? AN : 0); } while (false) #define SET_FLAG_AC_ADD(r,a,b) do { m_core->astat |= ((uint32_t(r) < uint32_t(a)) ? AC : 0); } while (false) -#define SET_FLAG_AV_ADD(r,a,b) do { m_core->astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } while (false) +#define SET_FLAG_AV_ADD(r,a,b) do { m_core->astat |= ((~((a) ^ (b)) & ((a) ^ (r)) & 0x80000000) ? AV : 0); } while (false) #define SET_FLAG_AC_SUB(r,a,b) do { m_core->astat |= ((uint32_t(r) <= uint32_t(a)) ? AC : 0); } while (false) -#define SET_FLAG_AV_SUB(r,a,b) do { m_core->astat |= (((((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); } while (false) +#define SET_FLAG_AV_SUB(r,a,b) do { m_core->astat |= ((((a) ^ (b)) & ((a) ^ (r)) & 0x80000000) ? AV : 0); } while (false) #define CLEAR_MULTIPLIER_FLAGS() do { m_core->astat &= ~(MN|MV|MU|MI); } while (false) @@ -1111,27 +1111,22 @@ void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry) { uint32_t r_add = REG(rx) + REG(ry); uint32_t r_sub = REG(rx) - REG(ry); + bool const av_add = ~(REG(rx) ^ REG(ry)) & (REG(rx) ^ r_add) & 0x80000000; + bool const av_sub = (REG(rx) ^ REG(ry)) & (REG(rx) ^ r_sub) & 0x80000000; CLEAR_ALU_FLAGS(); - if (r_add == 0 || r_sub == 0) + m_core->astat |= (av_add || av_sub) ? AV : 0; + m_core->astat |= ((r_add < uint32_t(REG(rx))) || (r_sub <= uint32_t(REG(rx)))) ? AC : 0; + + if (m_core->mode1 & MODE1_ALUSAT) { - m_core->astat |= AZ; - } - if (r_add & 0x80000000 || r_sub & 0x80000000) - { - m_core->astat |= AN; - } - if (((~(REG(rx) ^ REG(ry)) & (REG(rx) ^ r_add)) & 0x80000000) || - (( (REG(rx) ^ REG(ry)) & (REG(rx) ^ r_sub)) & 0x80000000)) - { - m_core->astat |= AV; - } - if (((uint32_t)r_add < (uint32_t)REG(rx)) || - (!((uint32_t)r_sub < (uint32_t)REG(rx)))) - { - m_core->astat |= AC; + if (av_add) SATURATE(r_add); + if (av_sub) SATURATE(r_sub); } + m_core->astat |= ((r_add == 0) || (r_sub == 0)) ? AZ : 0; + m_core->astat |= ((r_add | r_sub) & 0x80000000) ? AN : 0; + REG(ra) = r_add; REG(rs) = r_sub; From 4eeba32954f1f8c411d45670be3ab1543f7a28bb Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Sun, 8 Mar 2026 11:18:03 +0200 Subject: [PATCH 193/351] z8536: Fix port pattern polarity. [Curt Coder] --- src/devices/machine/z8536.cpp | 2 +- src/mame/luxor/abc1600.cpp | 30 +++++++++++++++--------------- src/mame/luxor/abc1600mac.cpp | 7 +------ src/mame/luxor/abc1600mac.h | 1 - 4 files changed, 17 insertions(+), 23 deletions(-) diff --git a/src/devices/machine/z8536.cpp b/src/devices/machine/z8536.cpp index 1f3f3a8aa88..d85455f2585 100644 --- a/src/devices/machine/z8536.cpp +++ b/src/devices/machine/z8536.cpp @@ -867,7 +867,7 @@ void cio_base_device::match_pattern(int port) switch ((pms & PMS_PMS_MASK) >> 1) { case PMS_OR_PEV: - m_match[port] = (m_input[port] ^ pol) & ddr & pm; + m_match[port] = (m_input[port] ^ ~pol) & ddr & pm; if (m_match[port]) { diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 6000725fcdb..eef48a8273f 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -864,14 +864,14 @@ uint8_t abc1600_state::cio_pa_r() uint8_t data = 0; - data |= m_bus2->irq_r(); - data |= m_bus1->irq_r() << 1; - data |= m_bus0x->xint2_r() << 2; - data |= m_bus0x->xint3_r() << 3; - data |= m_bus0x->xint4_r() << 4; - data |= m_bus0x->xint5_r() << 5; - data |= m_bus0x->irq_r() << 6; - data |= m_bus0i->irq_r() << 7; + data |= !m_bus2->irq_r(); + data |= !m_bus1->irq_r() << 1; + data |= !m_bus0x->xint2_r() << 2; + data |= !m_bus0x->xint3_r() << 3; + data |= !m_bus0x->xint4_r() << 4; + data |= !m_bus0x->xint5_r() << 5; + data |= !m_bus0x->irq_r() << 6; + data |= !m_bus0i->irq_r() << 7; return data; } @@ -1181,22 +1181,22 @@ void abc1600_state::abc1600(machine_config &config) m_bus0i->trrq_callback().set(FUNC(abc1600_state::update_drdy0)); ABCBUS_SLOT(config, m_bus0x, 64_MHz_XTAL / 16, abc1600bus_cards, nullptr); - m_bus0x->irq_callback().set(m_cio, FUNC(z8536_device::pa6_w)); + m_bus0x->irq_callback().set(m_cio, FUNC(z8536_device::pa6_w)).invert(); m_bus0x->nmi_callback().set(FUNC(abc1600_state::nmi_w)); - m_bus0x->xint2_callback().set(m_cio, FUNC(z8536_device::pa2_w)); - m_bus0x->xint3_callback().set(m_cio, FUNC(z8536_device::pa3_w)); - m_bus0x->xint4_callback().set(m_cio, FUNC(z8536_device::pa4_w)); - m_bus0x->xint5_callback().set(m_cio, FUNC(z8536_device::pa5_w)); + m_bus0x->xint2_callback().set(m_cio, FUNC(z8536_device::pa2_w)).invert(); + m_bus0x->xint3_callback().set(m_cio, FUNC(z8536_device::pa3_w)).invert(); + m_bus0x->xint4_callback().set(m_cio, FUNC(z8536_device::pa4_w)).invert(); + m_bus0x->xint5_callback().set(m_cio, FUNC(z8536_device::pa5_w)).invert(); m_bus0x->pren_callback().set(FUNC(abc1600_state::update_pren0)); m_bus0x->trrq_callback().set(FUNC(abc1600_state::update_drdy0)); ABCBUS_SLOT(config, m_bus1, 64_MHz_XTAL / 16, abc1600bus_cards, nullptr); - m_bus1->irq_callback().set(m_cio, FUNC(z8536_device::pa1_w)); + m_bus1->irq_callback().set(m_cio, FUNC(z8536_device::pa1_w)).invert(); m_bus1->pren_callback().set(FUNC(abc1600_state::update_pren1)); m_bus1->trrq_callback().set(FUNC(abc1600_state::update_drdy1)); ABCBUS_SLOT(config, m_bus2, 64_MHz_XTAL / 16, abc1600bus_cards, "4105"); - m_bus2->irq_callback().set(m_cio, FUNC(z8536_device::pa0_w)); + m_bus2->irq_callback().set(m_cio, FUNC(z8536_device::pa0_w)).invert(); m_bus2->pren_callback().set(m_dma2, FUNC(z80dma_device::iei_w)).exor(1); m_bus2->trrq_callback().set(m_dma2, FUNC(z80dma_device::rdy_w)); diff --git a/src/mame/luxor/abc1600mac.cpp b/src/mame/luxor/abc1600mac.cpp index 9474cd0448a..4f519bf6953 100644 --- a/src/mame/luxor/abc1600mac.cpp +++ b/src/mame/luxor/abc1600mac.cpp @@ -47,11 +47,6 @@ DEFINE_DEVICE_TYPE(ABC1600_MAC, abc1600_mac_device, "abc1600mac", "ABC 1600 MAC") -void abc1600_mac_device::program_map(address_map &map) -{ - // populated in src/mame/luxor/abc1600.cpp -} - void abc1600_mac_device::mac_map(address_map &map) { map(0x80000, 0x80000).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mac_device::page_hi_r), FUNC(abc1600_mac_device::page_hi_w)); @@ -106,7 +101,7 @@ const tiny_rom_entry *abc1600_mac_device::device_rom_region() const abc1600_mac_device::abc1600_mac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, ABC1600_MAC, tag, owner, clock), device_memory_interface(mconfig, *this), - m_program_config("program", ENDIANNESS_BIG, 8, 21, 0, address_map_constructor(FUNC(abc1600_mac_device::program_map), this)), + m_program_config("program", ENDIANNESS_BIG, 8, 21, 0), m_mac_config("mac", ENDIANNESS_BIG, 8, 20, 0, address_map_constructor(FUNC(abc1600_mac_device::mac_map), this)), m_rom(*this, "boot"), m_cpu(*this, finder_base::DUMMY_TAG), diff --git a/src/mame/luxor/abc1600mac.h b/src/mame/luxor/abc1600mac.h index 760be574758..28e58acd930 100644 --- a/src/mame/luxor/abc1600mac.h +++ b/src/mame/luxor/abc1600mac.h @@ -107,7 +107,6 @@ private: uint8_t dma_iorq_r(int dmamap, offs_t offset); void dma_iorq_w(int dmamap, offs_t offset, uint8_t data); - void program_map(address_map &map) ATTR_COLD; void mac_map(address_map &map) ATTR_COLD; const address_space_config m_program_config; const address_space_config m_mac_config; From 68c7bc9c4574212a26ffd66b6ac9ceef9c45cd3a Mon Sep 17 00:00:00 2001 From: Olivier Galibert Date: Sun, 8 Mar 2026 10:45:13 +0100 Subject: [PATCH 194/351] Missing emu.h --- src/devices/cpu/sh/sh7709s.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/devices/cpu/sh/sh7709s.cpp b/src/devices/cpu/sh/sh7709s.cpp index a2cdb2d622a..0d453ac76f9 100644 --- a/src/devices/cpu/sh/sh7709s.cpp +++ b/src/devices/cpu/sh/sh7709s.cpp @@ -18,6 +18,7 @@ // Writeback timing for certain operations should also overlap in some cases // If the CPU supports critical word first the instruction that takes the miss should be able to start as soon as that address is read in from memory even if there are further words to be read +#include "emu.h" #include "sh7709s.h" #include "sh3comn.h" #include "sh4comn.h" From dc9cda9954529029d308087e9df7d3168d015373 Mon Sep 17 00:00:00 2001 From: npwoods Date: Sun, 8 Mar 2026 08:15:32 -0400 Subject: [PATCH 195/351] Some fixes for -attach_window functionality under SDL3 (#15071) * Some fixes for -attach_window functionality under SDL3 - Ensuring that when -attach_window that some inappropriate properties (e.g. - `SDL_PROP_WINDOW_CREATE_TITLE_STRING`) are not specified - Ensuring that under X11, we invoke `XSelectInput()` with our own mask rather than what SDL3 does by default - Windows support * Attempting to fix macOS specific warning --- src/osd/sdl3/sdlopts.h | 6 +++- src/osd/sdl3/window.cpp | 74 +++++++++++++++++++++++++++++++++-------- 2 files changed, 66 insertions(+), 14 deletions(-) diff --git a/src/osd/sdl3/sdlopts.h b/src/osd/sdl3/sdlopts.h index f6338fe1db6..5d55649c234 100644 --- a/src/osd/sdl3/sdlopts.h +++ b/src/osd/sdl3/sdlopts.h @@ -77,9 +77,13 @@ public: // full screen options #if defined(SDLMAME_X11) bool use_all_heads() const { return bool_value(SDLOPTION_USEALLHEADS); } - const char *attach_window() const { return value(SDLOPTION_ATTACH_WINDOW); } #endif // SDLMAME_X11 + // attach window +#if defined(SDLMAME_X11) || defined(SDLMAME_WIN32) + const char *attach_window() const { return value(SDLOPTION_ATTACH_WINDOW); } +#endif // SDLMAME_X11 || SDLMAME_WIN32 + // keyboard mapping bool keymap() const { return bool_value(SDLOPTION_KEYMAP); } const char *keymap_file() const { return value(SDLOPTION_KEYMAP_FILE); } diff --git a/src/osd/sdl3/window.cpp b/src/osd/sdl3/window.cpp index 5b9881db990..541528902ad 100644 --- a/src/osd/sdl3/window.cpp +++ b/src/osd/sdl3/window.cpp @@ -36,6 +36,10 @@ #include #endif +#ifdef SDLMAME_X11 +#include +#endif + //============================================================ // PARAMETERS @@ -837,20 +841,32 @@ int sdl_window_info::complete_create() // create or attach to an existing window SDL_Window *sdlwindow; -#ifdef SDLMAME_X11 +#if defined(SDLMAME_X11) || defined(SDLMAME_WIN32) const char *attach_window = downcast(machine().options()).attach_window(); + attach_window = attach_window && *attach_window ? attach_window : nullptr; #else const char *attach_window = nullptr; #endif +#ifdef SDLMAME_X11 + if (attach_window) + { + // if we're attaching a window on X11, we need to stop SDL3 doing its own XSelectInput() call + SDL_SetHint(SDL_HINT_VIDEO_X11_EXTERNAL_WINDOW_INPUT, "0"); + } +#endif + // create the SDL window SDL_PropertiesID props = SDL_CreateProperties(); - SDL_SetStringProperty(props, SDL_PROP_WINDOW_CREATE_TITLE_STRING, title().c_str()); - SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_X_NUMBER, work.left() + (work.width() - temp.width()) / 2); - SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_Y_NUMBER, work.top() + (work.height() - temp.height()) / 2); - SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_WIDTH_NUMBER, temp.width()); - SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_HEIGHT_NUMBER, temp.height()); - SDL_SetBooleanProperty(props, SDL_PROP_WINDOW_CREATE_RESIZABLE_BOOLEAN, true); + if (!attach_window) + { + SDL_SetStringProperty(props, SDL_PROP_WINDOW_CREATE_TITLE_STRING, title().c_str()); + SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_X_NUMBER, work.left() + (work.width() - temp.width()) / 2); + SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_Y_NUMBER, work.top() + (work.height() - temp.height()) / 2); + SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_WIDTH_NUMBER, temp.width()); + SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_HEIGHT_NUMBER, temp.height()); + SDL_SetBooleanProperty(props, SDL_PROP_WINDOW_CREATE_RESIZABLE_BOOLEAN, true); + } if (fullscreen()) { @@ -862,7 +878,7 @@ int sdl_window_info::complete_create() SDL_SetBooleanProperty(props, SDL_PROP_WINDOW_CREATE_OPENGL_BOOLEAN, true); } - if (attach_window && *attach_window) + if (attach_window) { // we're attaching to an existing window; parse the argument unsigned long long attach_window_value; @@ -875,9 +891,15 @@ int sdl_window_info::complete_create() osd_printf_error("Invalid -attach_window value: %s\n", attach_window); return 1; } + (void)attach_window_value; // and attach to it +#ifdef SDLMAME_X11 SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_X11_WINDOW_NUMBER, attach_window_value); +#endif // SDLMAME_X11 +#ifdef SDLMAME_WIN32 + SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_WIN32_HWND_POINTER, attach_window_value); +#endif // SDLMAME_WIN32 } sdlwindow = SDL_CreateWindowWithProperties(props); @@ -897,6 +919,30 @@ int sdl_window_info::complete_create() return 1; } + if (attach_window) + { +#ifdef SDLMAME_X11 + SDL_PropertiesID props = SDL_GetWindowProperties(sdlwindow); + + Display *display = (Display *) SDL_GetPointerProperty( + props, + SDL_PROP_WINDOW_X11_DISPLAY_POINTER, + nullptr); + + Window xwindow = (Window) SDL_GetNumberProperty( + props, + SDL_PROP_WINDOW_X11_WINDOW_NUMBER, + 0); + + // while SDL3 will by default call XSelectInput, it is too aggressive for our purposes + XSelectInput(display, xwindow, + FocusChangeMask | EnterWindowMask | LeaveWindowMask | + PointerMotionMask | KeyPressMask | KeyReleaseMask | + PropertyChangeMask | StructureNotifyMask | + ExposureMask | KeymapStateMask); +#endif // SDLMAME_X11 + } + set_platform_window(sdlwindow); renderer_create(); @@ -928,11 +974,13 @@ int sdl_window_info::complete_create() } // show window - - SDL_ShowWindow(platform_window()); - //SDL_SetWindowFullscreen(window->sdl_window(), 0); - //SDL_SetWindowFullscreen(window->sdl_window(), window->fullscreen()); - SDL_RaiseWindow(platform_window()); + if (!attach_window) + { + SDL_ShowWindow(platform_window()); + //SDL_SetWindowFullscreen(window->sdl_window(), 0); + //SDL_SetWindowFullscreen(window->sdl_window(), window->fullscreen()); + SDL_RaiseWindow(platform_window()); + } #ifdef SDLMAME_WIN32 // if (fullscreen()) From 0a88465813915b7e617d98020ad1ef5d73d4d54c Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 8 Mar 2026 13:29:46 +0100 Subject: [PATCH 196/351] vlm5030: fix pin rising edge detect if state high val is not 1, add _r/_w to handlers --- src/devices/bus/msx/cart/konami.cpp | 8 +- src/devices/sound/vlm5030.cpp | 122 ++++++++++++---------------- src/devices/sound/vlm5030.h | 12 ++- src/mame/konami/ddribble.cpp | 9 +- src/mame/konami/jailbrek.cpp | 10 +-- src/mame/konami/nemesis.cpp | 12 +-- src/mame/konami/rockrage.cpp | 6 +- src/mame/konami/trackfld.cpp | 19 ++--- src/mame/konami/trackfld_a.cpp | 36 +++----- src/mame/konami/trackfld_a.h | 3 +- src/mame/konami/yiear.cpp | 9 +- src/mame/nintendo/punchout.cpp | 10 +-- 12 files changed, 106 insertions(+), 150 deletions(-) diff --git a/src/devices/bus/msx/cart/konami.cpp b/src/devices/bus/msx/cart/konami.cpp index 6e0cb011326..41eee56630f 100644 --- a/src/devices/bus/msx/cart/konami.cpp +++ b/src/devices/bus/msx/cart/konami.cpp @@ -840,14 +840,14 @@ uint8_t msx_cart_keyboard_master_device::read_vlm(offs_t offset) void msx_cart_keyboard_master_device::io_20_w(uint8_t data) { - m_vlm5030->rst(BIT(data, 0) ? 1 : 0); - m_vlm5030->vcu(BIT(data, 2) ? 1 : 0); - m_vlm5030->st(BIT(data, 1) ? 1 : 0); + m_vlm5030->rst_w(BIT(data, 0)); + m_vlm5030->vcu_w(BIT(data, 2)); + m_vlm5030->st_w(BIT(data, 1)); } uint8_t msx_cart_keyboard_master_device::io_00_r() { - return m_vlm5030->bsy() ? 0x10 : 0x00; + return m_vlm5030->bsy_r() ? 0x10 : 0x00; } diff --git a/src/devices/sound/vlm5030.cpp b/src/devices/sound/vlm5030.cpp index 8f6e3715360..ff2e7e04601 100644 --- a/src/devices/sound/vlm5030.cpp +++ b/src/devices/sound/vlm5030.cpp @@ -264,7 +264,16 @@ void vlm5030_device::device_reset() void vlm5030_device::device_post_load() { - restore_state(); + int interp_effect = FR_SIZE - (m_interp_count%FR_SIZE); + /* restore parameter data */ + setup_parameter(m_parameter); + + /* restore current energy,pitch & filter */ + m_current_energy = m_old_energy + (m_target_energy - m_old_energy) * interp_effect / FR_SIZE; + if (m_old_pitch > 1) + m_current_pitch = m_old_pitch + (m_target_pitch - m_old_pitch) * interp_effect / FR_SIZE; + for (int i = 0; i <= 9; i++) + m_current_k[i] = m_old_k[i] + (m_target_k[i] - m_old_k[i]) * interp_effect / FR_SIZE; } void vlm5030_device::rom_bank_pre_change() @@ -272,14 +281,13 @@ void vlm5030_device::rom_bank_pre_change() m_channel->update(); } -int vlm5030_device::get_bits(int sbit,int bits) +int vlm5030_device::get_bits(int sbit, int bits) { - int offset = m_address + (sbit>>3); - int data; + const int offset = m_address + (sbit >> 3); - data = read_byte(offset) | (read_byte(offset+1)<<8); - data >>= (sbit&7); - data &= (0xff>>(8-bits)); + int data = read_byte(offset) | (read_byte(offset + 1) << 8); + data >>= (sbit & 7); + data &= (0xff >> (8 - bits)); return data; } @@ -326,16 +334,16 @@ int vlm5030_device::parse_frame() m_new_energy = m_coeff->energytable[get_bits(6,m_coeff->energy_bits)]; /* 10 K's */ - m_new_k[9] = m_coeff->ktable[9][get_bits(11,m_coeff->kbits[9])]; - m_new_k[8] = m_coeff->ktable[8][get_bits(14,m_coeff->kbits[8])]; - m_new_k[7] = m_coeff->ktable[7][get_bits(17,m_coeff->kbits[7])]; - m_new_k[6] = m_coeff->ktable[6][get_bits(20,m_coeff->kbits[6])]; - m_new_k[5] = m_coeff->ktable[5][get_bits(23,m_coeff->kbits[5])]; - m_new_k[4] = m_coeff->ktable[4][get_bits(26,m_coeff->kbits[4])]; - m_new_k[3] = m_coeff->ktable[3][get_bits(29,m_coeff->kbits[3])]; - m_new_k[2] = m_coeff->ktable[2][get_bits(33,m_coeff->kbits[2])]; - m_new_k[1] = m_coeff->ktable[1][get_bits(37,m_coeff->kbits[1])]; - m_new_k[0] = m_coeff->ktable[0][get_bits(42,m_coeff->kbits[0])]; + m_new_k[9] = m_coeff->ktable[9][get_bits(11, m_coeff->kbits[9])]; + m_new_k[8] = m_coeff->ktable[8][get_bits(14, m_coeff->kbits[8])]; + m_new_k[7] = m_coeff->ktable[7][get_bits(17, m_coeff->kbits[7])]; + m_new_k[6] = m_coeff->ktable[6][get_bits(20, m_coeff->kbits[6])]; + m_new_k[5] = m_coeff->ktable[5][get_bits(23, m_coeff->kbits[5])]; + m_new_k[4] = m_coeff->ktable[4][get_bits(26, m_coeff->kbits[4])]; + m_new_k[3] = m_coeff->ktable[3][get_bits(29, m_coeff->kbits[3])]; + m_new_k[2] = m_coeff->ktable[2][get_bits(33, m_coeff->kbits[2])]; + m_new_k[1] = m_coeff->ktable[1][get_bits(37, m_coeff->kbits[1])]; + m_new_k[0] = m_coeff->ktable[0][get_bits(42, m_coeff->kbits[0])]; m_address += 6; logerror("VLM5030 %04X voice \n", m_address); @@ -343,12 +351,6 @@ int vlm5030_device::parse_frame() return FR_SIZE; } -/* realtime update */ -void vlm5030_device::update() -{ - m_channel->update(); -} - /* setup parameteroption when RST=H */ void vlm5030_device::setup_parameter(uint8_t param) { @@ -364,7 +366,7 @@ void vlm5030_device::setup_parameter(uint8_t param) m_interp_step = 1; /* 2400bps : 4 interpolator */ /* bit 3,4,5 : speed (frame size) */ - m_frame_size = vlm5030_speed_table[(param>>3) & 7]; + m_frame_size = vlm5030_speed_table[(param >> 3) & 7]; /* bit 6,7 : low / high pitch */ if (param & 0x80) /* bit7=1 , high pitch */ @@ -376,24 +378,10 @@ void vlm5030_device::setup_parameter(uint8_t param) } -void vlm5030_device::restore_state() -{ - int interp_effect = FR_SIZE - (m_interp_count%FR_SIZE); - /* restore parameter data */ - setup_parameter(m_parameter); - - /* restore current energy,pitch & filter */ - m_current_energy = m_old_energy + (m_target_energy - m_old_energy) * interp_effect / FR_SIZE; - if (m_old_pitch > 1) - m_current_pitch = m_old_pitch + (m_target_pitch - m_old_pitch) * interp_effect / FR_SIZE; - for (int i = 0; i <= 9 ; i++) - m_current_k[i] = m_old_k[i] + (m_target_k[i] - m_old_k[i]) * interp_effect / FR_SIZE; -} - /* get BSY pin level */ -int vlm5030_device::bsy() +int vlm5030_device::bsy_r() { - update(); + m_channel->update(); return m_pin_BSY; } @@ -404,23 +392,24 @@ void vlm5030_device::data_w(uint8_t data) } /* set RST pin level : reset / set table address A8-A15 */ -void vlm5030_device::rst(int state) +void vlm5030_device::rst_w(int state) { + state = state ? 1 : 0; + if (m_pin_RST != state) { /* pin level is changed */ - update(); + m_channel->update(); + m_pin_RST = state; if (!state) { /* H -> L : latch parameters */ - m_pin_RST = 0; setup_parameter(m_latch_data); } else { /* L -> H : reset chip */ - m_pin_RST = 1; if (m_pin_BSY) { device_reset(); @@ -430,29 +419,30 @@ void vlm5030_device::rst(int state) } /* set VCU pin level : ?? unknown */ -void vlm5030_device::vcu(int state) +void vlm5030_device::vcu_w(int state) { /* direct mode / indirect mode */ - m_pin_VCU = state; + m_pin_VCU = state ? 1 : 0; } /* set ST pin level : set table address A0-A7 / start speech */ -void vlm5030_device::st(int state) +void vlm5030_device::st_w(int state) { + state = state ? 1 : 0; + if (m_pin_ST != state) { /* pin level is changed */ - update(); + m_channel->update(); + m_pin_ST = state; if (!state) { /* H -> L */ - m_pin_ST = 0; - if (m_pin_VCU) { /* direct access mode & address High */ - m_vcu_addr_h = ((int)m_latch_data<<8) + 0x01; + m_vcu_addr_h = ((int)m_latch_data << 8) + 0x01; } else { @@ -461,14 +451,14 @@ void vlm5030_device::st(int state) if (m_vcu_addr_h) { /* direct access mode */ - m_address = (m_vcu_addr_h&0xff00) + m_latch_data; + m_address = (m_vcu_addr_h & 0xff00) + m_latch_data; m_vcu_addr_h = 0; } else { /* indirect access mode */ - int table = (m_latch_data&0xfe) + (((int)m_latch_data&1)<<8); - m_address = (read_byte(table)<<8) | read_byte(table+1); + int table = (m_latch_data & 0xfe) + (((int)m_latch_data & 1) << 8); + m_address = (read_byte(table) << 8) | read_byte(table + 1); /* show unsupported parameter message */ /* if (m_interp_step != 1) popmessage("No %d %dBPS parameter",table/2,m_interp_step*2400); */ } @@ -484,7 +474,6 @@ void vlm5030_device::st(int state) else { /* L -> H */ - m_pin_ST = 1; /* setup speech , BSY on after 30ms? */ m_phase = PH_SETUP; m_sample_count = 1; /* wait time for busy on */ @@ -500,16 +489,13 @@ void vlm5030_device::st(int state) void vlm5030_device::sound_stream_update(sound_stream &stream) { - int interp_effect; - int i; - int u[11]; - /* running */ - int sampindex = 0; if (m_phase == PH_RUN || m_phase == PH_STOP) { + int u[11]; + /* playing speech */ - for ( ; sampindex < stream.samples(); sampindex++) + for (int sampindex = 0; sampindex < stream.samples(); sampindex++) { int current_val; @@ -540,7 +526,7 @@ void vlm5030_device::sound_stream_update(sound_stream &stream) /* Set old target as new start of frame */ m_current_energy = m_old_energy; m_current_pitch = m_old_pitch; - for (i = 0; i <= 9; i++) + for (int i = 0; i <= 9; i++) m_current_k[i] = m_old_k[i]; /* is this a zero energy frame? */ @@ -549,7 +535,7 @@ void vlm5030_device::sound_stream_update(sound_stream &stream) /*osd_printf_debug("processing frame: zero energy\n");*/ m_target_energy = 0; m_target_pitch = m_current_pitch; - for (i = 0; i <= 9; i++) + for (int i = 0; i <= 9; i++) m_target_k[i] = m_current_k[i]; } else @@ -559,7 +545,7 @@ void vlm5030_device::sound_stream_update(sound_stream &stream) /*osd_printf_debug("proc: %d %d\n",last_fbuf_head,fbuf_head);*/ m_target_energy = m_new_energy; m_target_pitch = m_new_pitch; - for (i = 0; i <= 9; i++) + for (int i = 0; i <= 9; i++) m_target_k[i] = m_new_k[i]; } } @@ -568,11 +554,11 @@ void vlm5030_device::sound_stream_update(sound_stream &stream) /* Update values based on step values 25% , 50% , 75% , 100% */ m_interp_count -= m_interp_step; /* 3,2,1,0 -> 1,2,3,4 */ - interp_effect = FR_SIZE - (m_interp_count%FR_SIZE); + int interp_effect = FR_SIZE - (m_interp_count % FR_SIZE); m_current_energy = m_old_energy + (m_target_energy - m_old_energy) * interp_effect / FR_SIZE; if (m_old_pitch > 1) m_current_pitch = m_old_pitch + (m_target_pitch - m_old_pitch) * interp_effect / FR_SIZE; - for (i = 0; i <= 9 ; i++) + for (int i = 0; i <= 9; i++) m_current_k[i] = m_old_k[i] + (m_target_k[i] - m_old_k[i]) * interp_effect / FR_SIZE; } @@ -595,9 +581,9 @@ void vlm5030_device::sound_stream_update(sound_stream &stream) /* Lattice filter here */ u[10] = current_val; - for (i = 9; i >= 0; i--) + for (int i = 9; i >= 0; i--) u[i] = u[i+1] - ((-m_current_k[i] * m_x[i]) / 512); - for (i = 9; i >= 1; i--) + for (int i = 9; i >= 1; i--) m_x[i] = m_x[i-1] + ((-m_current_k[i-1] * u[i-1]) / 512); m_x[0] = u[0]; diff --git a/src/devices/sound/vlm5030.h b/src/devices/sound/vlm5030.h index f9d05749882..9ccee24bfd7 100644 --- a/src/devices/sound/vlm5030.h +++ b/src/devices/sound/vlm5030.h @@ -13,19 +13,19 @@ public: vlm5030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); /* get BSY pin level */ - int bsy(); + int bsy_r(); /* latch contoll data */ void data_w(uint8_t data); /* set RST pin level : reset / set table address A8-A15 */ - void rst(int state); + void rst_w(int state); /* set VCU pin level : ?? unknown */ - void vcu(int state); + void vcu_w(int state); /* set ST pin level : set table address A0-A7 / start speech */ - void st(int state); + void st_w(int state); protected: // device-level overrides @@ -88,11 +88,9 @@ private: int32_t m_x[10]; - int get_bits(int sbit,int bits); + int get_bits(int sbit, int bits); int parse_frame(); - void update(); void setup_parameter(uint8_t param); - void restore_state(); }; DECLARE_DEVICE_TYPE(VLM5030, vlm5030_device) diff --git a/src/mame/konami/ddribble.cpp b/src/mame/konami/ddribble.cpp index 39bd1f5005f..9ef896ef31b 100644 --- a/src/mame/konami/ddribble.cpp +++ b/src/mame/konami/ddribble.cpp @@ -349,8 +349,7 @@ uint8_t ddribble_state::vlm5030_busy_r() return machine().rand(); // patch // FIXME: remove ? #if 0 - if (m_vlm->bsy()) return 1; - else return 0; + return m_vlm->bsy_r(); #endif } @@ -359,13 +358,13 @@ void ddribble_state::vlm5030_ctrl_w(uint8_t data) // b7 : vlm data bus OE // b6 : VLM5030-RST - m_vlm->rst(BIT(data, 6)); + m_vlm->rst_w(BIT(data, 6)); // b5 : VLM5030-ST - m_vlm->st(BIT(data, 5)); + m_vlm->st_w(BIT(data, 5)); // b4 : VLM5300-VCU - m_vlm->vcu(BIT(data, 4)); + m_vlm->vcu_w(BIT(data, 4)); // b3 : ROM bank select m_vlmbank->set_entry(BIT(data, 3)); diff --git a/src/mame/konami/jailbrek.cpp b/src/mame/konami/jailbrek.cpp index 35a1f7db216..1145c3e6d53 100644 --- a/src/mame/konami/jailbrek.cpp +++ b/src/mame/konami/jailbrek.cpp @@ -268,20 +268,20 @@ uint32_t jailbrek_state::screen_update(screen_device &screen, bitmap_ind16 &bitm void jailbrek_state::coin_w(uint8_t data) { - machine().bookkeeping().coin_counter_w(0, data & 0x01); - machine().bookkeeping().coin_counter_w(1, data & 0x02); + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); } uint8_t jailbrek_state::speech_r() { - return (m_vlm->bsy() ? 1 : 0); + return m_vlm->bsy_r(); } void jailbrek_state::speech_w(uint8_t data) { // bit 0 is latch direction like in yiear - m_vlm->st((data >> 1) & 1); - m_vlm->rst((data >> 2) & 1); + m_vlm->st_w(BIT(data, 1)); + m_vlm->rst_w(BIT(data, 2)); } void jailbrek_state::prg_map(address_map &map) diff --git a/src/mame/konami/nemesis.cpp b/src/mame/konami/nemesis.cpp index 167a3707581..4c14bb729c4 100644 --- a/src/mame/konami/nemesis.cpp +++ b/src/mame/konami/nemesis.cpp @@ -386,22 +386,22 @@ void gx400_state::speech_w(offs_t offset, uint8_t data) m_vlm->data_w(data); // bit 5: ST, bit 6: RST - m_vlm->st(BIT(offset, 5)); - m_vlm->rst(BIT(offset, 6)); + m_vlm->st_w(BIT(offset, 5)); + m_vlm->rst_w(BIT(offset, 6)); m_speech_offset = offset; } void salamand_state::speech_start_w(uint8_t data) { - m_vlm->rst(BIT(data, 0)); - m_vlm->st(BIT(data, 1)); + m_vlm->rst_w(BIT(data, 0)); + m_vlm->st_w(BIT(data, 1)); // bit 2 is OE for VLM data } uint8_t salamand_state::speech_busy_r() { - return m_vlm->bsy(); + return m_vlm->bsy_r(); } uint8_t gx400_state::nemesis_portA_r() @@ -416,7 +416,7 @@ uint8_t gx400_state::nemesis_portA_r() res |= 0xd0; - if (m_vlm != nullptr && m_vlm->bsy()) + if (m_vlm != nullptr && m_vlm->bsy_r()) res |= 0x20; return res; diff --git a/src/mame/konami/rockrage.cpp b/src/mame/konami/rockrage.cpp index 58335b4460e..c1b0c83a313 100644 --- a/src/mame/konami/rockrage.cpp +++ b/src/mame/konami/rockrage.cpp @@ -219,14 +219,14 @@ void rockrage_state::bankswitch_w(uint8_t data) uint8_t rockrage_state::vlm5030_busy_r() { - return (m_vlm->bsy() ? 1 : 0); + return m_vlm->bsy_r(); } void rockrage_state::speech_w(uint8_t data) { // bit2 = data bus enable - m_vlm->rst((data >> 1) & 0x01); - m_vlm->st((data >> 0) & 0x01); + m_vlm->rst_w(BIT(data, 1)); + m_vlm->st_w(BIT(data, 0)); } void rockrage_state::main_map(address_map &map) diff --git a/src/mame/konami/trackfld.cpp b/src/mame/konami/trackfld.cpp index 8cc9eb51b69..f340fdbac9b 100644 --- a/src/mame/konami/trackfld.cpp +++ b/src/mame/konami/trackfld.cpp @@ -489,9 +489,8 @@ void trackfld_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &clipre { uint8_t *spriteram = m_spriteram; uint8_t *spriteram_2 = m_spriteram2; - int offs; - for (offs = m_spriteram.bytes() - 2; offs >= 0; offs -= 2) + for (int offs = m_spriteram.bytes() - 2; offs >= 0; offs -= 2) { int attr = spriteram_2[offs]; int code = spriteram[offs + 1]; @@ -520,17 +519,14 @@ void trackfld_state::draw_sprites( bitmap_ind16 &bitmap, const rectangle &clipre // sy++; /* fix title screen & garbage at the bottom of the screen */ //} - - - m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, + m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, code + m_sprite_bank1 + m_sprite_bank2, color, flipx, flipy, sx, sy, m_palette->transpen_mask(*m_gfxdecode->gfx(0), color, 0)); /* redraw with wraparound */ - - m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, + m_gfxdecode->gfx(0)->transmask(bitmap,cliprect, code + m_sprite_bank1 + m_sprite_bank2, color, flipx, flipy, sx - 256, sy, @@ -617,17 +613,14 @@ void trackfld_state::nmi_mask_w(int state) uint8_t trackfld_state::trackfld_speech_r() { - if (m_vlm->bsy()) - return 1; - else - return 0; + return m_vlm->bsy_r(); } void trackfld_state::trackfld_VLM5030_control_w(uint8_t data) { /* bit 0 is latch direction */ - m_vlm->st((data >> 1) & 1); - m_vlm->rst((data >> 2) & 1); + m_vlm->st_w(BIT(data, 1)); + m_vlm->rst_w(BIT(data, 2)); } diff --git a/src/mame/konami/trackfld_a.cpp b/src/mame/konami/trackfld_a.cpp index 62d0ba911df..fea1eea2f2f 100644 --- a/src/mame/konami/trackfld_a.cpp +++ b/src/mame/konami/trackfld_a.cpp @@ -6,15 +6,12 @@ constexpr unsigned TIMER_RATE = 4096 / 4; - - DEFINE_DEVICE_TYPE(TRACKFLD_AUDIO, trackfld_audio_device, "trackfld_audio", "Track And Field Audio") trackfld_audio_device::trackfld_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, TRACKFLD_AUDIO, tag, owner, clock) , m_audiocpu(*this, finder_base::DUMMY_TAG) , m_vlm(*this, finder_base::DUMMY_TAG) - , m_last_addr(0) , m_last_irq(0) { } @@ -25,7 +22,6 @@ trackfld_audio_device::trackfld_audio_device(const machine_config &mconfig, cons void trackfld_audio_device::device_start() { - save_item(NAME(m_last_addr)); save_item(NAME(m_last_irq)); } @@ -52,31 +48,25 @@ uint8_t trackfld_audio_device::trackfld_sh_timer_r() { uint32_t clock = m_audiocpu->total_cycles() / TIMER_RATE; - return clock & 0xF; + return clock & 0xf; } uint8_t trackfld_audio_device::trackfld_speech_r() { - return m_vlm->bsy() ? 0x10 : 0; + return m_vlm->bsy_r() ? 0x10 : 0; } void trackfld_audio_device::trackfld_sound_w(offs_t offset, uint8_t data) { - const uint8_t changes = offset ^ m_last_addr; - // A7 = data enable for VLM5030 (don't care) - // A8 = STA pin (1->0 data data , 0->1 start speech + // A8 = STA pin (1->0 data data, 0->1 start speech) // A9 = RST pin 1=reset // A8 VLM5030 ST pin - if (changes & 0x100) - m_vlm->st(offset & 0x100); + m_vlm->st_w(BIT(offset, 8)); // A9 VLM5030 RST pin - if (changes & 0x200) - m_vlm->rst(offset & 0x200); - - m_last_addr = offset; + m_vlm->rst_w(BIT(offset, 9)); } uint8_t trackfld_audio_device::hyperspt_sh_timer_r() @@ -84,31 +74,25 @@ uint8_t trackfld_audio_device::hyperspt_sh_timer_r() uint32_t clock = m_audiocpu->total_cycles() / TIMER_RATE; if (m_vlm != nullptr) - return (clock & 0x3) | (m_vlm->bsy() ? 0x04 : 0); + return (clock & 0x3) | (m_vlm->bsy_r() ? 0x04 : 0); else return (clock & 0x3); } void trackfld_audio_device::hyperspt_sound_w(offs_t offset, uint8_t data) { - const uint8_t changes = offset ^ m_last_addr; - // A3 = data enable for VLM5030 (don't care ) - // A4 = STA pin (1->0 data data , 0->1 start speech + // A4 = STA pin (1->0 data data, 0->1 start speech) // A5 = RST pin 1=reset // A6 = VLM5030 output disable (don't care ) // A7 = kONAMI DAC output disable (don't care ) // A8 = SN76489AN output disable (don't care ) // A4 VLM5030 ST pin - if (changes & 0x10) - m_vlm->st(offset & 0x10); + m_vlm->st_w(BIT(offset, 4)); // A5 VLM5030 RST pin - if( changes & 0x20 ) - m_vlm->rst(offset & 0x20); - - m_last_addr = offset; + m_vlm->rst_w(BIT(offset, 5)); } @@ -116,7 +100,7 @@ void trackfld_audio_device::hyperspt_sound_w(offs_t offset, uint8_t data) void trackfld_audio_device::sh_irqtrigger_w(int state) { // setting bit 0 low then high triggers IRQ on the sound CPU - if (m_last_irq == 0 && state) + if (!m_last_irq && state) m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 m_last_irq = state; diff --git a/src/mame/konami/trackfld_a.h b/src/mame/konami/trackfld_a.h index a7dd896011b..808244b4059 100644 --- a/src/mame/konami/trackfld_a.h +++ b/src/mame/konami/trackfld_a.h @@ -38,8 +38,7 @@ private: optional_device m_vlm; // internal state - int m_last_addr; - int m_last_irq; + uint8_t m_last_irq; }; DECLARE_DEVICE_TYPE(TRACKFLD_AUDIO, trackfld_audio_device) diff --git a/src/mame/konami/yiear.cpp b/src/mame/konami/yiear.cpp index 5643f468a7c..23f28be0ae6 100644 --- a/src/mame/konami/yiear.cpp +++ b/src/mame/konami/yiear.cpp @@ -315,17 +315,14 @@ uint32_t yiear_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, uint8_t yiear_state::speech_r() { - if (m_vlm->bsy()) - return 1; - else - return 0; + return m_vlm->bsy_r(); } void yiear_state::vlm5030_control_w(uint8_t data) { // bit 0 is latch direction - m_vlm->st((data >> 1) & 1); - m_vlm->rst((data >> 2) & 1); + m_vlm->st_w(BIT(data, 1)); + m_vlm->rst_w(BIT(data, 2)); } void yiear_state::vblank_irq(int state) diff --git a/src/mame/nintendo/punchout.cpp b/src/mame/nintendo/punchout.cpp index f8649010ebc..1b4db1cc715 100644 --- a/src/mame/nintendo/punchout.cpp +++ b/src/mame/nintendo/punchout.cpp @@ -329,7 +329,7 @@ static INPUT_PORTS_START( punchout ) PORT_DIPSETTING( 0x0a, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x07, DEF_STR( 1C_6C ) ) PORT_DIPSETTING( 0x0f, DEF_STR( Free_Play ) ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("vlm", FUNC(vlm5030_device::bsy)) /* VLM5030 busy signal */ + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("vlm", FUNC(vlm5030_device::bsy_r)) /* VLM5030 busy signal */ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "R18:!1" ) /* Not documented, R18 resistor */ PORT_DIPNAME( 0x80, 0x00, "Copyright" ) PORT_DIPLOCATION("R19:!1") /* Not documented, R19 resistor */ @@ -562,7 +562,7 @@ bit 3210 5432 L R C PORT_DIPSETTING( 0x0d, "1101" ) PORT_DIPSETTING( 0x0e, "1110" ) PORT_DIPSETTING( 0x0f, "1111" ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("vlm", FUNC(vlm5030_device::bsy)) /* VLM5030 busy signal */ + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("vlm", FUNC(vlm5030_device::bsy_r)) /* VLM5030 busy signal */ PORT_DIPNAME( 0x40, 0x00, "Coin Slots" ) PORT_DIPLOCATION("R18:!1") /* R18 resistor */ PORT_DIPSETTING( 0x40, "1" ) PORT_DIPSETTING( 0x00, "2" ) @@ -623,9 +623,9 @@ void punchout_state::punchout(machine_config &config) mainlatch.q_out_cb<1>().set_nop(); // watchdog reset, seldom used because 08 clears the watchdog as well mainlatch.q_out_cb<2>().set_nop(); // ? mainlatch.q_out_cb<3>().set_inputline("audiocpu", INPUT_LINE_RESET); - mainlatch.q_out_cb<4>().set("vlm", FUNC(vlm5030_device::rst)); - mainlatch.q_out_cb<5>().set("vlm", FUNC(vlm5030_device::st)); - mainlatch.q_out_cb<6>().set("vlm", FUNC(vlm5030_device::vcu)); + mainlatch.q_out_cb<4>().set("vlm", FUNC(vlm5030_device::rst_w)); + mainlatch.q_out_cb<5>().set("vlm", FUNC(vlm5030_device::st_w)); + mainlatch.q_out_cb<6>().set("vlm", FUNC(vlm5030_device::vcu_w)); mainlatch.q_out_cb<7>().set_nop(); // enable NVRAM? /* video hardware */ From 13184ea25598422dfe837c40baafa2d86110909d Mon Sep 17 00:00:00 2001 From: arekkusu42 Date: Sun, 8 Mar 2026 05:51:46 -0700 Subject: [PATCH 197/351] apple2video: improve video timing (#15073) * apple2e, apple2gs: fix HBL relative timing * HBL is placed to the left of active video on apple2 hardware; Use set_raw() and manually schedule video callbacks to align timing. This fixes glitches visible in various demos using C019 VBL sync. * apple2gs: also align VGC SCB IRQ timing to match hardware. Also fix CO2F HORIZCNT to match hardware. This fixes the FTA XMAS demo crash. * tk2000: note XTAL TODO * apple2video: add 80STORE and NEWVIDEO beam-racing Several fixes to match hardware: * Add missing softswitch beam-racing support: C001 80STORE (effectively toggling PAGE2) C029 NEWVIDEO (.: 32 colors per scanline is possible) * Also followup #14053: make C068 STATEREG participate in beam-racing. * Also fix C055 PAGE2 to work with 80VID. * Also encapsulate update_now() handling for C022 and C034 colors. * apple2gs: fix intra-scanline beam-racing Implement clipping in screen_update_GS(). This fixes various demo effects like text scrolling in the border. --- src/mame/apple/apple2.cpp | 2 +- src/mame/apple/apple2e.cpp | 37 ++++++-- src/mame/apple/apple2gs.cpp | 155 +++++++++++++++++++------------- src/mame/apple/apple2video.cpp | 160 ++++++++++++++++++--------------- src/mame/apple/apple2video.h | 19 ++-- src/mame/apple/superga2.cpp | 2 +- src/mame/apple/tk2000.cpp | 9 +- 7 files changed, 222 insertions(+), 162 deletions(-) diff --git a/src/mame/apple/apple2.cpp b/src/mame/apple/apple2.cpp index 5e91b42ebfd..031d63c4205 100644 --- a/src/mame/apple/apple2.cpp +++ b/src/mame/apple/apple2.cpp @@ -841,7 +841,7 @@ void apple2_state::apple2_common(machine_config &config) APPLE2_COMMON(config, m_a2common, XTAL(14'318'181)); SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(1021800*14, (65*7)*2, 0, (40*7)*2, 262, 0, 192); + m_screen->set_raw(1021800 * 14, 65 * 14, 0, 40 * 14, 262, 0, 192); m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); m_screen->set_palette(m_video); diff --git a/src/mame/apple/apple2e.cpp b/src/mame/apple/apple2e.cpp index 373df53d661..3dd2339f231 100644 --- a/src/mame/apple/apple2e.cpp +++ b/src/mame/apple/apple2e.cpp @@ -310,6 +310,8 @@ public: optional_device m_kbdcpu; optional_device m_kbdlatch; + // align VBL to the end of active video + static constexpr int HPOS_VBL = 40 * 14; TIMER_DEVICE_CALLBACK_MEMBER(apple2_interrupt); TIMER_DEVICE_CALLBACK_MEMBER(accel_timer); TIMER_DEVICE_CALLBACK_MEMBER(ay3600_repeat); @@ -468,7 +470,7 @@ private: bool m_an0, m_an1, m_an2, m_an3; - bool m_vblmask; + bool m_vbl, m_vblmask; bool m_xy, m_x0edge, m_y0edge; bool m_x0, m_x1, m_y0, m_y1; @@ -991,6 +993,9 @@ void apple2e_state::machine_start() m_video->set_aux_mask(m_aux_mask); m_video->set_char_pointer(memregion("gfx1")->base(), memregion("gfx1")->bytes()); + // IOU events occur at the rightmost edge of active video + m_scantimer->adjust(m_screen->time_until_pos(0, HPOS_VBL)); + int ram_size = 0x10000; if (m_ram_size < 0x10000) { @@ -1126,6 +1131,7 @@ void apple2e_state::machine_start() save_item(NAME(m_ramrd)); save_item(NAME(m_ramwrt)); save_item(NAME(m_ioudis)); + save_item(NAME(m_vbl)); save_item(NAME(m_vblmask)); save_item(NAME(m_romswitch)); save_item(NAME(m_irqmask)); @@ -1195,7 +1201,7 @@ void apple2e_state::machine_reset() m_video->a80store_w(false); m_video->a80col_w(false); m_video->altcharset_w(false); - m_video->page2_w(false); + m_video->scr_w(0); m_video->res_w(0); // IIe IOU @@ -1217,6 +1223,7 @@ void apple2e_state::machine_reset() m_lcwriteenable = true; m_video->monohgr_w(m_iscecm); + m_vbl = false; m_vblmask = false; m_irqmask = 0; m_strobe = 0; @@ -1377,7 +1384,8 @@ void apple2e_state::lower_irq(int irq) TIMER_DEVICE_CALLBACK_MEMBER(apple2e_state::apple2_interrupt) { - int scanline = param; + // timer fires at the end of active video; handle events for the next line + int scanline = param + 1; if ((m_isiic) || (m_has_laser_mouse) || (m_isace500)) { @@ -1396,6 +1404,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2e_state::apple2_interrupt) if (scanline == 192) { + m_vbl = true; if (m_vblmask) { raise_irq(IRQ_VBL); @@ -1419,6 +1428,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2e_state::apple2_interrupt) m_franklin_last_fkeys = uFkeys; } } + else if (scanline == m_screen->height()) + { + m_vbl = false; + scanline = 0; + } + + m_scantimer->adjust(m_screen->time_until_pos(scanline, HPOS_VBL), scanline); } void apple2e_state::reset_w(int state) @@ -1454,7 +1470,7 @@ void apple2e_state::reset_w(int state) m_video->a80store_w(false); m_video->a80col_w(false); m_video->altcharset_w(false); - m_video->page2_w(false); + m_video->scr_w(0); m_video->res_w(0); // IIe IOU @@ -1504,7 +1520,7 @@ void apple2e_state::accel_full_speed() void apple2e_state::accel_normal_speed() { - m_maincpu->set_unscaled_clock(1021800); + m_maincpu->set_unscaled_clock(1021800, true); // re-align to PH0 } void apple2e_state::accel_slot(int slot) @@ -2082,7 +2098,7 @@ u8 apple2e_state::c000_r(offs_t offset) return (m_video->get_80store() ? 0x80 : 0x00) | m_transchar; case 0x19: // read VBLBAR - return (m_screen->vblank() ? 0x00 : 0x80) | m_transchar; + return (m_vbl ? 0x00 : 0x80) | m_transchar; case 0x1a: // read TEXT return (m_video->get_graphics() ? 0x00 : 0x80) | m_transchar; @@ -2674,6 +2690,7 @@ void apple2e_state::update_iic_mouse() m_y0 = !m_y0; } + // FIXME: IIc Tech Ref states this happens only once per frame if (raise_mousexy_irq) { raise_irq(IRQ_MOUSEXY); @@ -5011,7 +5028,7 @@ void apple2e_state::apple2e_common(machine_config &config, bool enhanced, bool r m_maincpu->set_addrmap(AS_PROGRAM, &apple2e_state::base_map); m_maincpu->set_dasm_override(FUNC(apple2e_state::dasm_trampoline)); - TIMER(config, m_scantimer, 0).configure_scanline(FUNC(apple2e_state::apple2_interrupt), "screen", 0, 1); + TIMER(config, m_scantimer, 0).configure_generic(FUNC(apple2e_state::apple2_interrupt)); config.set_maximum_quantum(attotime::from_hz(60)); TIMER(config, m_acceltimer, 0).configure_generic(FUNC(apple2e_state::accel_timer)); @@ -5027,8 +5044,10 @@ void apple2e_state::apple2e_common(machine_config &config, bool enhanced, bool r APPLE2_COMMON(config, m_a2common, XTAL(14'318'181)); + // HBL is positioned to the right of active video here, but to the left on hardware. + // this must be compensated for in any use of hpos/vpos/vblank. SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(1021800*14, (65*7)*2, 0, (40*7)*2, 262, 0, 192); + m_screen->set_raw(1021800 * 14, 65 * 14, 0, 40 * 14, 262, 0, 192); m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); m_screen->set_palette(m_video); @@ -5153,7 +5172,7 @@ void apple2e_state::tk3000_keybio_map(address_map &map) u8 apple2e_state::tk3000_kbdflags_r() { auto kbspecial = m_kbspecial->read(); - return (m_screen->vblank() || m_screen->hblank() ? 0x20 : 0) + return (m_vbl || m_screen->hblank() ? 0x20 : 0) | (kbspecial & 0x40) >> 2 | (m_an1 ? 0x08 : 0) | (kbspecial & 0x01) << 2 diff --git a/src/mame/apple/apple2gs.cpp b/src/mame/apple/apple2gs.cpp index b058c0bf333..fa6a132d506 100644 --- a/src/mame/apple/apple2gs.cpp +++ b/src/mame/apple/apple2gs.cpp @@ -125,6 +125,7 @@ public: m_maincpu(*this, "maincpu"), m_screen(*this, "screen"), m_scantimer(*this, "scantimer"), + m_vgctimer(*this, "vgctimer"), m_acceltimer(*this, "acceltimer"), m_adbmicro(*this, "adbmicro"), m_macadb(*this, "macadb"), @@ -187,7 +188,7 @@ protected: private: required_device m_maincpu; required_device m_screen; - required_device m_scantimer, m_acceltimer; + required_device m_scantimer, m_vgctimer, m_acceltimer; required_device m_adbmicro; required_device m_macadb; required_device m_ram; @@ -306,7 +307,15 @@ private: address_space *m_maincpu_space = nullptr; + // align timing to match observed hardware behavior + static constexpr int ALIGN_VBL = 4; + static constexpr int ALIGN_CNT = 2; + static constexpr int ALIGN_RFB = 1; + static constexpr int HPOS_VBL = BORDER_LEFT + ((40 - ALIGN_VBL) * 16); + // hardware testing shows SCB IRQs fire 8 video cycles after VBL + static constexpr int HPOS_VGC = HPOS_VBL + (8 * 16); TIMER_DEVICE_CALLBACK_MEMBER(apple2_interrupt); + TIMER_DEVICE_CALLBACK_MEMBER(apple2_vgc); TIMER_DEVICE_CALLBACK_MEMBER(accel_timer); void palette_init(palette_device &palette); @@ -441,7 +450,7 @@ private: bool m_lcram = false, m_lcram2 = false, m_lcprewrite = false, m_lcwriteenable = false; bool m_rombank = false; - u8 m_shadow = 0, m_speed = 0, m_textcol = 0; + u8 m_shadow = 0, m_speed = 0; u8 m_motors_active = 0, m_slotromsel = 0, m_intflag = 0, m_vgcint = 0, m_inten = 0; bool m_last_speed = false; @@ -519,7 +528,7 @@ private: } else { - m_maincpu->set_unscaled_clock(A2GS_1M); + m_maincpu->set_unscaled_clock(A2GS_1M, true); // re-align with PH0 } } @@ -543,7 +552,7 @@ private: } else { - m_maincpu->set_unscaled_clock(A2GS_1M); + m_maincpu->set_unscaled_clock(A2GS_1M, true); // re-align with PH0 } } @@ -726,9 +735,12 @@ void apple2gs_state::machine_start() m_video->set_char_pointer(memregion("gfx1")->base(), memregion("gfx1")->bytes()); m_video->setup_GS_graphics(); - m_textcol = 0xf2; - m_video->set_GS_foreground((m_textcol >> 4) & 0xf); - m_video->set_GS_background(m_textcol & 0xf); + m_video->set_GS_textcol(0xf2); + + // Mega II events occur near the rightmost edge of active video + m_scantimer->adjust(m_screen->time_until_pos(0, HPOS_VBL)); + // VGC IRQs occur slightly later during HBL + m_vgctimer->adjust(m_screen->time_until_pos(0, HPOS_VGC)); m_inh_slot = -1; m_cnxx_slot = CNXX_UNCLAIMED; @@ -768,7 +780,6 @@ void apple2gs_state::machine_start() save_item(NAME(m_lcwriteenable)); save_item(NAME(m_shadow)); save_item(NAME(m_speed)); - save_item(NAME(m_textcol)); save_item(NAME(m_clock_control)); save_item(NAME(m_clkdata)); save_item(NAME(m_motors_active)); @@ -812,10 +823,9 @@ void apple2gs_state::machine_reset() m_adb_p2_last = m_adb_p3_last = 0; m_adb_reset_freeze = 0; m_romswitch = false; - m_video->page2_w(false); + m_video->scr_w(0); m_video->set_GS_border(0x02); - m_video->set_GS_background(0x02); - m_video->set_GS_foreground(0x0f); + m_video->set_GS_textcol(0xf2); m_an0 = m_an1 = m_an2 = m_an3 = false; m_gameio->an0_w(0); m_gameio->an1_w(0); @@ -969,7 +979,7 @@ void apple2gs_state::update_speed() } else { - m_maincpu->set_unscaled_clock(isfast ? A2GS_2_8M : A2GS_1M); + m_maincpu->set_unscaled_clock(isfast ? A2GS_2_8M : A2GS_1M, !isfast); } m_last_speed = isfast; } @@ -1001,37 +1011,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::accel_timer) TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::apple2_interrupt) { - int scanline = m_screen->vpos(); - m_screen->update_partial(scanline); - - // check scanline interrupt bits if we're in super hi-res and the current scanline is within the active display area - if ((m_video->get_newvideo() & 0x80) && (scanline >= BORDER_TOP) && (scanline < (200+BORDER_TOP))) - { - u8 scb; - const int shrline = scanline - BORDER_TOP; - - if (shrline & 1) - { - scb = m_megaii_ram[0x19e80 + (shrline >> 1)]; - } - else - { - scb = m_megaii_ram[0x15e80 + (shrline >> 1)]; - } - - if (scb & 0x40) - { - // VGC and MegaII status flags are set even when the interrupt is disabled - m_vgcint |= VGCINT_SCANLINE; - - // trigger the interrupt if enabled - if (m_vgcint & VGCINT_SCANLINEEN) - { - m_vgcint |= VGCINT_ANYVGCINT; - raise_irq(IRQS_SCAN); - } - } - } + // timer fires near the end of active video; handle events for the next line + int scanline = param + 1; if (scanline == BORDER_TOP) { @@ -1041,7 +1022,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::apple2_interrupt) { m_vbl = true; - // VBL interrupt + // Mega II status flags are set even when the interrupt is disabled m_intflag |= INTFLAG_VBL; if (m_inten & 0x08) { @@ -1069,7 +1050,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::apple2_interrupt) { // TODO: latch LANGSEL here to toggle NTSC/PAL - // "quarter" second IRQ occurs every 16 frames, ~3.75 Hz (NTSC) + // "quarter" second IRQ occurs every 16 frames, ~3.75 Hz if ((m_screen->frame_number() & 0xf) == 0) { m_intflag |= INTFLAG_QUARTER; @@ -1079,6 +1060,55 @@ TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::apple2_interrupt) } } } + else if (scanline == m_screen->height()) + scanline = 0; + + m_scantimer->adjust(m_screen->time_until_pos(scanline, HPOS_VBL), scanline); +} + +TIMER_DEVICE_CALLBACK_MEMBER(apple2gs_state::apple2_vgc) +{ + // flush the previous scanline to ensure SCB or palette changes are visible + m_screen->update_now(); + + // timer fires during HBL past right border; handle events for the next line + int scanline = param + 1; + if (scanline >= m_screen->height()) + scanline -= m_screen->height(); // catch 50Hz toggle + + // scanline interrupts occur during HBL of each super hi-res line + if ((m_video->get_newvideo() & 0x80) && (scanline >= BORDER_TOP) && (scanline < (BORDER_TOP + 200))) + { + u8 scb; + const int shrline = scanline - BORDER_TOP; + + if (shrline & 1) + { + scb = m_megaii_ram[0x19e80 + (shrline >> 1)]; + } + else + { + scb = m_megaii_ram[0x15e80 + (shrline >> 1)]; + } + + // latch scb on this cycle for subsequent palette lookups + m_video->set_SHR_scb(shrline, scb); + + if (scb & 0x40) + { + // VGC status flags are set even when the interrupt is disabled + m_vgcint |= VGCINT_SCANLINE; + + // trigger the interrupt if enabled + if (m_vgcint & VGCINT_SCANLINEEN) + { + m_vgcint |= VGCINT_ANYVGCINT; + raise_irq(IRQS_SCAN); + } + } + } + + m_vgctimer->adjust(m_screen->time_until_pos(scanline, HPOS_VGC), scanline); } void apple2gs_state::rtc_vgc(int cko) @@ -1460,12 +1490,13 @@ void apple2gs_state::do_io(int offset) int apple2gs_state::get_vpos() { int vpos = m_screen->vpos(); + vpos += (m_screen->hpos() >= (BORDER_LEFT + (40 - ALIGN_CNT) * 16)); // adjust for set_raw if (vpos < BORDER_TOP) vpos += m_screen->height(); // remap top border to bottom of VBL vpos += 256 - BORDER_TOP; if (vpos > 511) - vpos -= m_screen->height(); // reset scanline 256 to 250 (NTSC) or 200 (PAL) + vpos -= m_screen->height(); // wrap scanline 256 to 250 (60 Hz) or 200 (50 Hz) return vpos; } @@ -1580,7 +1611,7 @@ u8 apple2gs_state::c000_r(offs_t offset) return m_video->get_80col() ? 0x80 : 0x00; case 0x22: // TEXTCOL - return m_textcol; + return m_video->get_GS_textcol(); case 0x23: // VGCINT return m_vgcint; @@ -1616,10 +1647,12 @@ u8 apple2gs_state::c000_r(offs_t offset) // reading HORIZCNT clears SCB status clear_vgcint(~VGCINT_SCANLINE); - ret = m_screen->hpos() / 11; + ret = (m_screen->hpos() - BORDER_LEFT) / 16 + (25 + ALIGN_CNT); // adjust for set_raw + if (ret >= 65) + ret -= 65; if (ret > 0) { - ret += 0x40; + ret += 0x3f; // HBL [0, 0x40...57] active [0x58...7f] } if (get_vpos() & 1) @@ -1873,13 +1906,7 @@ void apple2gs_state::c000_w(offs_t offset, u8 data) break; case 0x22: // TEXTCOL - if (m_textcol != data) - { - m_screen->update_now(); - } - m_textcol = data; - m_video->set_GS_foreground((data >> 4) & 0xf); - m_video->set_GS_background(data & 0xf); + m_video->set_GS_textcol(data); break; case 0x23: // VGCINT @@ -2114,7 +2141,7 @@ void apple2gs_state::c000_w(offs_t offset, u8 data) case 0x68: // STATEREG m_altzp = (data & 0x80); - m_video->page2_w(data & 0x40); + m_video->scr_w(data & 0x40); m_ramrd = (data & 0x20); m_ramwrt = (data & 0x10); m_lcram = (data & 0x08) ? false : true; @@ -3362,7 +3389,7 @@ void apple2gs_state::adbmicro_p2_out(u8 data) m_ramrd = false; m_ramwrt = false; m_altzp = false; - m_video->page2_w(false); + m_video->scr_w(0); m_video->res_w(0); m_irqmask = 0; @@ -3742,9 +3769,8 @@ void apple2gs_state::apple2gs(machine_config &config) m_maincpu->set_addrmap(g65816_device::AS_VECTORS, &apple2gs_state::vectors_map); m_maincpu->set_dasm_override(FUNC(apple2gs_state::dasm_trampoline)); m_maincpu->wdm_handler().set(FUNC(apple2gs_state::wdm_trampoline)); - TIMER(config, m_scantimer, 0); - m_scantimer->configure_scanline(FUNC(apple2gs_state::apple2_interrupt), "screen", 0, 1); - + TIMER(config, m_scantimer, 0).configure_generic(FUNC(apple2gs_state::apple2_interrupt)); + TIMER(config, m_vgctimer, 0).configure_generic(FUNC(apple2gs_state::apple2_vgc)); TIMER(config, m_acceltimer, 0).configure_generic(FUNC(apple2gs_state::accel_timer)); config.set_maximum_quantum(attotime::from_hz(60)); @@ -3776,10 +3802,11 @@ void apple2gs_state::apple2gs(machine_config &config) APPLE2_GAMEIO(config, m_gameio, apple2_gameio_device::default_options, nullptr); + // HBL is positioned to the right of active video here, but to the left on hardware. + // the left border is positioned to the left here, but to the far right on hardware. + // these must be compensated for in any use of hpos/vpos/hblank/vblank. SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); - m_screen->set_size(704, 262); // 640+32+32 for the borders - m_screen->set_visarea(0,703,0,230); + m_screen->set_raw(A2GS_1M.value() * 16, 65 * 16, 0, BORDER_LEFT + 40 * 16 + BORDER_RIGHT, 262, 0, 231); m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update_GS))); PALETTE(config, "palette", FUNC(apple2gs_state::palette_init), 256); diff --git a/src/mame/apple/apple2video.cpp b/src/mame/apple/apple2video.cpp index 3f8487a281a..699a7c6d6a7 100644 --- a/src/mame/apple/apple2video.cpp +++ b/src/mame/apple/apple2video.cpp @@ -61,6 +61,7 @@ void a2_video_device::device_start() // initialise for device_palette_interface init_palette(); + save_item(NAME(m_hgr2)); save_item(NAME(m_page2)); save_item(NAME(m_flash)); save_item(NAME(m_mix)); @@ -80,6 +81,7 @@ void a2_video_device::device_start() save_item(NAME(m_monochrome)); save_item(NAME(m_rgbmode)); save_item(NAME(m_shr_palette)); + save_item(NAME(m_shr_scbs)); } void a2_video_device::device_reset() @@ -124,7 +126,7 @@ void a2_video_device::mix_w(int state) void a2_video_device::scr_w(int state) { // select primary or secondary page - if (!m_80col) + if (!m_80store && (m_page2 != state)) screen().update_now(); m_page2 = state; } @@ -174,6 +176,14 @@ void a2_video_device::a80col_w(bool b80Col) } } +void a2_video_device::a80store_w(bool b80Store) +{ + // select PAGE2 aux RAM (displaying PAGE1) + if (m_page2 && (m_80store != b80Store)) + screen().update_now(); + m_80store = b80Store; +} + void a2_video_device::altcharset_w(bool altch) { if (m_altcharset != altch) @@ -184,10 +194,41 @@ void a2_video_device::altcharset_w(bool altch) } } +void a2_video_device::set_GS_textcol(u8 textcol) +{ + // select foreground and background text colors + const u8 fg = textcol >> 4; + const u8 bg = textcol & 0xf; + if ((m_GSfg != fg) || (m_GSbg != bg)) + { + screen().update_now(); + m_GSfg = fg; + m_GSbg = bg; + } +} + +void a2_video_device::set_GS_border(u8 border) +{ + // select border color + if (m_GSborder != border) + { + screen().update_now(); + m_GSborder = border; + } +} + +void a2_video_device::set_newvideo(u8 newvideo) +{ + // select super hi-res and monochrome modes + if ((m_newvideo & 0xA0) != (newvideo & 0xA0)) + screen().update_now(); + m_newvideo = newvideo; +} + void a2_video_device::set_GS_langsel(u8 langsel) { // select primary language character set - if ((langsel & 0xe8) != (m_GS_langsel & 0xe8)) + if ((m_GS_langsel & 0xe8) != (langsel & 0xe8)) screen().update_now(); m_GS_langsel = langsel; } @@ -825,55 +866,42 @@ uint32_t a2_video_device::palette_entries() const noexcept uint32_t a2_video_device::screen_update_GS(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - int const beamy = cliprect.top(); + // de-jitter clock drift; video scanner latches whole bytes + const int left = cliprect.left() & ~0xF; + const int right = (cliprect.right() + 1) & ~0xF; // inclusive bounds + const bool shr = BIT(m_newvideo, 7); - if (m_newvideo & 0x80) + const int beamy = cliprect.top(); { - // in top or bottom border? - if ((beamy < BORDER_TOP) || (beamy >= 200+BORDER_TOP)) - { - // don't draw past the bottom border - if (beamy >= 231+BORDER_TOP) - { - return 0; - } + uint32_t *const scanline = &bitmap.pix(beamy); + if ((beamy < BORDER_TOP) || (beamy >= BORDER_TOP + (shr ? 200 : 192))) + { + // in top or bottom border uint32_t *const scanline = &bitmap.pix(beamy); - for (int col = 0; col < BORDER_LEFT+BORDER_RIGHT+640; col++) - { + for (int col = left; col < right; col++) scanline[col] = m_GSborder_colors[m_GSborder]; - } } - else // regular screen area + else if (shr) { - int const shrline = beamy - BORDER_TOP; - - uint8_t scb; - if (shrline & 1) - { - scb = m_aux_ptr[0x9e80 + (shrline >> 1)]; - } - else - { - scb = m_aux_ptr[0x5e80 + (shrline >> 1)]; - } - int const palette = ((scb & 0x0f) << 4); - - uint8_t const *const vram = &m_aux_ptr[0x2000 + (shrline * 80)]; - uint8_t const *const vram2 = &m_aux_ptr[0x6000 + (shrline * 80)]; - - uint32_t *const scanline = &bitmap.pix(beamy); + const int shrline = beamy - BORDER_TOP; + const u8 scb = m_shr_scbs[shrline]; + const int palette = ((scb & 0x0f) << 4); + const uint8_t *const vram = &m_aux_ptr[0x2000 + (shrline * 80)]; + const uint8_t *const vram2 = &m_aux_ptr[0x6000 + (shrline * 80)]; // draw left and right borders - for (int col = 0; col < BORDER_LEFT; col++) - { + for (int col = left; col < (std::min)(right, BORDER_LEFT); col++) scanline[col] = m_GSborder_colors[m_GSborder]; - scanline[col+BORDER_LEFT+640] = m_GSborder_colors[m_GSborder]; - } + for (int col = (std::max)(left, BORDER_LEFT + 640); col < right; col++) + scanline[col] = m_GSborder_colors[m_GSborder]; + + const int gsleft = (std::max)((left - BORDER_LEFT), 0) / 8; + const int gsright = (std::min)((right - BORDER_LEFT), 640) / 8; if (scb & 0x80) // 640 mode { - for (int col = 0; col < 80; col++) + for (int col = gsleft; col < gsright; col++) { uint8_t b = vram[col]; scanline[col * 8 + 0 + BORDER_LEFT] = m_shr_palette[palette + 0 + ((b >> 6) & 0x03)]; @@ -888,7 +916,7 @@ uint32_t a2_video_device::screen_update_GS(screen_device &screen, bitmap_rgb32 & scanline[col * 8 + 7 + BORDER_LEFT] = m_shr_palette[palette + 12 + ((b >> 0) & 0x03)]; } } - else // 320 mode + else // 320 mode { // the low 5 bits of the SCB determine the initial fillmode color // for the scanline (hardware testing by John Brooks) @@ -899,7 +927,7 @@ uint32_t a2_video_device::screen_update_GS(screen_device &screen, bitmap_rgb32 & }; uint32_t last_pixel = fillmode_init[scb & 0x1f]; - for (int col = 0; col < 80; col++) + for (int col = gsleft; col < gsright; col++) { uint8_t b; uint32_t pixel; @@ -948,44 +976,32 @@ uint32_t a2_video_device::screen_update_GS(screen_device &screen, bitmap_rgb32 & } } } - } - else - { - if (beamy >= BORDER_TOP) - { - rectangle const new_cliprect(0, 559, cliprect.top() - BORDER_TOP, cliprect.bottom() - BORDER_TOP); - screen_update(screen, *m_8bit_graphics, new_cliprect); - } - - if ((beamy < BORDER_TOP) || (beamy >= (192 + BORDER_TOP))) - { - if (beamy >= (231+BORDER_TOP)) - { - return 0; - } - - uint32_t *const scanline = &bitmap.pix(beamy); - for (int col = 0; col < BORDER_LEFT+BORDER_RIGHT+640; col++) - { - scanline[col] = m_GSborder_colors[m_GSborder]; - } - } else { - uint32_t *const scanline = &bitmap.pix(beamy); + // scale 16 MHz cliprect to 14 MHz + const int a2left = (std::max)(((left - BORDER_LEFT) / 16 * 14), 0); + const int a2right = (std::min)(((right - BORDER_LEFT) / 16 * 14), 560); + const rectangle a2cliprect(a2left, a2right - 1, cliprect.top() - BORDER_TOP, cliprect.bottom() - BORDER_TOP); + screen_update(screen, *m_8bit_graphics, a2cliprect); // exclusive bounds + + // these stretch factors align partial updates within left and right borders + // FIXME: stretch 8-bit modes to match super hi-res, stop stretching borders + const float lbstretch = (float)(BORDER_LEFT + 40) / (BORDER_LEFT / 16); + const float rbstretch = (float)(BORDER_RIGHT + 40) / (BORDER_RIGHT / 16); + const int lbleft = left / 16 * lbstretch; + const int lbright = right / 16 * lbstretch; + const int rbleft = ((left - (BORDER_LEFT + 640)) / 16 * rbstretch) + (BORDER_LEFT + 40 + 560); + const int rbright = ((right - (BORDER_LEFT + 640)) / 16 * rbstretch) + (BORDER_LEFT + 40 + 560); // draw left and right borders - for (int col = 0; col < BORDER_LEFT + 40; col++) - { + for (int col = lbleft; col < (std::min)(lbright, BORDER_LEFT + 40); col++) + scanline[col] = m_GSborder_colors[m_GSborder]; + for (int col = (std::max)(rbleft, BORDER_LEFT + 40 + 560); col < rbright; col++) scanline[col] = m_GSborder_colors[m_GSborder]; - scanline[col+BORDER_LEFT+600] = m_GSborder_colors[m_GSborder]; - } - uint16_t *a2pixel = &m_8bit_graphics->pix(beamy - BORDER_TOP); - for (int x = 0; x < 560; x++) - { - scanline[40 + BORDER_LEFT + x] = m_GSborder_colors[*a2pixel++]; - } + const uint16_t *const a2pixel = &m_8bit_graphics->pix(beamy - BORDER_TOP); + for (int col = a2left; col < a2right; col++) + scanline[BORDER_LEFT + 40 + col] = m_GSborder_colors[a2pixel[col]]; } } return 0; diff --git a/src/mame/apple/apple2video.h b/src/mame/apple/apple2video.h index d0484b48033..4fb819a7722 100644 --- a/src/mame/apple/apple2video.h +++ b/src/mame/apple/apple2video.h @@ -11,9 +11,9 @@ #include "emupal.h" -#define BORDER_LEFT (32) -#define BORDER_RIGHT (32) -#define BORDER_TOP (16) // (plus bottom) +#define BORDER_LEFT (16 * 2) +#define BORDER_RIGHT (16 * 2) +#define BORDER_TOP (16) // (plus bottom) class a2_video_device : public device_t, public device_palette_interface, public device_video_interface { @@ -25,6 +25,7 @@ public: a2_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); u32 m_GSborder_colors[16]{}, m_shr_palette[256]{}; + u8 m_shr_scbs[200]{}; std::unique_ptr m_8bit_graphics; void txt_w(int state); @@ -45,24 +46,24 @@ public: bool get_monohgr() const { return m_monohgr; } void a80col_w(bool b80Col); - void a80store_w(bool b80Store) { m_80store = b80Store; } - void page2_w(bool page2) { m_page2 = page2; } + void a80store_w(bool b80Store); void altcharset_w(bool altch); void monohgr_w(bool mono) { m_monohgr = mono; } // IIgs-specific accessors void set_GS_monochrome(u8 mono) { m_monochrome = mono; } - void set_GS_foreground(u8 fg) { m_GSfg = fg; } - void set_GS_background(u8 bg) { m_GSbg = bg; } + u8 get_GS_textcol() { return (m_GSfg << 4) | m_GSbg; } + void set_GS_textcol(u8 textcol); u8 get_GS_border() { return m_GSborder; } - void set_GS_border(u8 border) { m_GSborder = border; } + void set_GS_border(u8 border); const u8 get_newvideo() { return m_newvideo; } - void set_newvideo(u8 newvideo) { m_newvideo = newvideo; } + void set_newvideo(u8 newvideo); u8 get_GS_langsel() { return m_GS_langsel; } bool is_pal_video_mode() { return BIT(m_GS_langsel, 4); } void set_GS_langsel(u8 langsel); void set_SHR_color(u8 color, u32 rgb) { m_shr_palette[color] = rgb; } void set_GS_border_color(u8 color, u32 rgb) { m_GSborder_colors[color] = rgb; } + void set_SHR_scb(u8 shrline, u8 scb) { m_shr_scbs[shrline] = scb; } void set_ram_pointers(u8 *main, u8 *aux) { m_ram_ptr = main; m_aux_ptr = aux; } void set_aux_mask(u16 aux_mask) { m_aux_mask = aux_mask; } diff --git a/src/mame/apple/superga2.cpp b/src/mame/apple/superga2.cpp index a29956c1120..f3a8af2a87d 100644 --- a/src/mame/apple/superga2.cpp +++ b/src/mame/apple/superga2.cpp @@ -208,7 +208,7 @@ void superga2_state::superga2(machine_config &config) APPLE2_COMMON(config, m_a2common, XTAL(14'318'181)); SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_raw(1021800*14, (65*7)*2, 0, (40*7)*2, 262, 0, 192); + m_screen->set_raw(1021800 * 14, 65 * 14, 0, 40 * 14, 262, 0, 192); m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); m_screen->set_palette(m_video); diff --git a/src/mame/apple/tk2000.cpp b/src/mame/apple/tk2000.cpp index 9ea3a3da8a3..e182c03f73b 100644 --- a/src/mame/apple/tk2000.cpp +++ b/src/mame/apple/tk2000.cpp @@ -13,7 +13,7 @@ TODO: emulate joystick port (wired to KBIN and KBOUT) TODO: emulate cassette MOTOR softswitch TODO: emulate dual RESET keys - TODO: correct PAL colors + TODO: correct PAL colors and XTAL $C05A - banks RAM from c100-ffff $C05B - banks ROM from c100-ffff @@ -558,7 +558,7 @@ INPUT_PORTS_END void tk2000_state::tk2000(machine_config &config) { /* basic machine hardware */ - M6502(config, m_maincpu, 1021800); /* close to actual CPU frequency of 1.020484 MHz */ + M6502(config, m_maincpu, 1021800); // FIXME 14.30244 MHz XTAL m_maincpu->set_addrmap(AS_PROGRAM, &tk2000_state::apple2_map); TIMER(config, "scantimer").configure_scanline(FUNC(tk2000_state::apple2_interrupt), "screen", 0, 1); @@ -567,10 +567,7 @@ void tk2000_state::tk2000(machine_config &config) APPLE2_VIDEO_COMPOSITE(config, m_video, XTAL(14'318'181)).set_screen(m_screen); SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ - m_screen->set_size(280*2, 262); - m_screen->set_visarea(0, (280*2)-1,0,192-1); + m_screen->set_raw(1021800 * 14, 65 * 14, 0, 40 * 14, 262, 0, 192); m_screen->set_screen_update(m_video, NAME((&a2_video_device::screen_update))); m_screen->set_palette(m_video); From 4525bead136c52e21e8a6438d7a010956636cca9 Mon Sep 17 00:00:00 2001 From: Jesus Ramos Date: Sun, 8 Mar 2026 05:52:56 -0700 Subject: [PATCH 198/351] sh/sh7709s.cpp: Fix bug in DRC memory accessor using clobbered IO reg (#15074) Fix a shift error in the wcr1 register values Add bcr2 plumbing for determining cache line fetch reads based off BCR2. Area 0 is set via external pins so hardcoding the cv1k value, this is typically code space though so it only affects timing during copy of code to main memory --- src/devices/cpu/sh/sh7709s.cpp | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/src/devices/cpu/sh/sh7709s.cpp b/src/devices/cpu/sh/sh7709s.cpp index 0d453ac76f9..5d90b78bc6b 100644 --- a/src/devices/cpu/sh/sh7709s.cpp +++ b/src/devices/cpu/sh/sh7709s.cpp @@ -166,8 +166,7 @@ static unsigned int get_wcr1_timing(uint32_t address, uint16_t wcr1) if (area > 6 || area == 1) return 0; - unsigned int area_shift = 12 - (area * 2); - unsigned int area_val = (wcr1 >> area_shift) & 0x3; + unsigned int area_val = (wcr1 >> (area * 2)) & 0x3; if (area_val == 0) return 1; @@ -269,6 +268,23 @@ unsigned int mcr_tras(uint16_t mcr) return ((mcr >> 8) & 0x3) + 2; } +unsigned int cache_line_fetch_count(uint32_t address, uint16_t bcr2) +{ + unsigned int area = get_area(address); + + // Hardcoded for area 0 for cv1k code rom, 16 bit bus size + if (area == 0) + return 8; + + // Not encoded in bcr2 + if (area == 1) + return 0; + + unsigned int bcr2_val = (bcr2 >> (area * 2)) & 0x3; + + return SH7709S_CACHE_LINE_SIZE >> bcr2_val; +} + // Some of the values used here are bus cycles that might need conversion but it's close enough for now // It's possible for some instructions to overlap in the pipeline with the fetches but that's a good bit // of extra tracking required @@ -303,7 +319,7 @@ wb_handle: // If we can't use burst timing it's gonna be pricey to access // Each access will have to initiate bus access and wait to read 4 words for the cache line fill if (!burst_capable) - penalty += (BUS_ACCESS_PENALTY + get_wcr2_timing(address, m_wcr2)) * 4; + penalty += (BUS_ACCESS_PENALTY + get_wcr2_timing(address, m_wcr2)) * cache_line_fetch_count(address, m_bcr2); else if (!is_wb) // For cache line writeback we can ignore the stall as well as CAS latency penalty += CACHE_MISS_STALL_PENALTY + get_wcr2_timing(address, m_wcr2); @@ -418,6 +434,9 @@ void sh7709s_device::static_generate_memory_accessor(int size, int iswrite, cons UML_AND(block, I0, I0, SH34_AM); // and r0, r0, #AM (0x1fffffff) + UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 + UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size + UML_LABEL(block, label++); // label: if (!debugger_enabled()) @@ -458,8 +477,6 @@ void sh7709s_device::static_generate_memory_accessor(int size, int iswrite, cons UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dword_x1 } - UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 - UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size UML_CALLC(block, cfunc_drc_memory_access_read, this); // callc cfunc_drc_memory_access_read,this UML_RET(block); // ret @@ -482,8 +499,6 @@ void sh7709s_device::static_generate_memory_accessor(int size, int iswrite, cons UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1 } - UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 - UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size UML_CALLC(block, cfunc_drc_memory_access_write, this); // callc cfunc_drc_memory_access_write,this UML_RET(block); // ret @@ -511,8 +526,6 @@ void sh7709s_device::static_generate_memory_accessor(int size, int iswrite, cons break; } - UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 - UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size UML_CALLC(block, cfunc_drc_memory_access_write, this); // callc cfunc_drc_memory_access_write,this } else @@ -532,8 +545,6 @@ void sh7709s_device::static_generate_memory_accessor(int size, int iswrite, cons break; } - UML_MOV(block, mem(&m_sh2_state->arg0), I0); // mov [arg0],i0 - UML_MOV(block, mem(&m_sh2_state->arg1), size); // mov [arg1],size UML_CALLC(block, cfunc_drc_memory_access_read, this); // callc cfunc_drc_memory_access_read,this } From e8981b25d73ce2420953d786f5b08a81549d4e35 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Sun, 8 Mar 2026 15:26:55 +0200 Subject: [PATCH 199/351] luxor/abc1600: Fix SASI callback. [Curt Coder] --- src/devices/bus/abcbus/lux4105.cpp | 7 +++++-- src/devices/bus/abcbus/lux4105.h | 4 +++- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/src/devices/bus/abcbus/lux4105.cpp b/src/devices/bus/abcbus/lux4105.cpp index cf4f8dc04fe..9bb3c990af3 100644 --- a/src/devices/bus/abcbus/lux4105.cpp +++ b/src/devices/bus/abcbus/lux4105.cpp @@ -180,6 +180,8 @@ void luxor_4105_device::internal_reset() m_scsi_bus->ctrl_w(m_scsi_refid, S_RST, S_RST); m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_RST); + + m_scsi_bus->ctrl_wait(m_scsi_refid, S_BSY|S_REQ|S_CTL|S_MSG|S_INP, S_ALL); } @@ -277,9 +279,10 @@ void luxor_4105_device::write_sasi_data(uint8_t data) void luxor_4105_device::scsi_ctrl_changed() { - if(m_scsi_bus->ctrl_r() & S_BSY) + if (m_scsi_bus->ctrl_r() & S_BSY) m_scsi_bus->ctrl_w(m_scsi_refid, 0, S_SEL); - if(!(m_scsi_bus->ctrl_r() & S_REQ)) + + if (!(m_scsi_bus->ctrl_r() & S_REQ)) // reset REQ FF m_req = 0; diff --git a/src/devices/bus/abcbus/lux4105.h b/src/devices/bus/abcbus/lux4105.h index e5c718ba470..7d9fdb5734a 100644 --- a/src/devices/bus/abcbus/lux4105.h +++ b/src/devices/bus/abcbus/lux4105.h @@ -54,13 +54,15 @@ protected: virtual void abcbus_tren(uint8_t data) override; virtual void abcbus_prac(int state) override; + // nscsi_device_interface overrides + virtual void scsi_ctrl_changed() override; + private: void internal_reset(); void update_ack(); void update_dma(); void write_dma_register(uint8_t data); void write_sasi_data(uint8_t data); - virtual void scsi_ctrl_changed() override; required_ioport m_1e; required_ioport m_5e; From 359eba61fe9a816b9a3765e6b01386b876421687 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 8 Mar 2026 09:53:22 -0400 Subject: [PATCH 200/351] apple2_cass.xml: Split out required_ram from usage info; many other metadata corrections and improvements --- hash/apple2_cass.xml | 812 ++++++++++++++++++++++++++++++------------- 1 file changed, 566 insertions(+), 246 deletions(-) diff --git a/hash/apple2_cass.xml b/hash/apple2_cass.xml index af674f7569b..74ea599d774 100644 --- a/hash/apple2_cass.xml +++ b/hash/apple2_cass.xml @@ -18,7 +18,9 @@ license:CC0-1.0 3D Art Graphics 1978 - Unknown + <unknown> + + @@ -29,13 +31,16 @@ license:CC0-1.0 - 3D-Docking + 3-D Docking 1978 Programma International, Inc. + + + - + - + @@ -43,12 +48,13 @@ license:CC0-1.0 - 3D Star Fire - 19?? - Unknown + 3-D Star Fire + 1980 + Tsukumo Original Software + - + @@ -59,7 +65,10 @@ license:CC0-1.0 Ack-Ack 1978 Programma International, Inc. - + + + + @@ -72,8 +81,9 @@ license:CC0-1.0 Computer Acquire 1982 Microcomputer Games + - + @@ -86,8 +96,9 @@ license:CC0-1.0 Computer Acquire (original) 1980 Microcomputer Games + - + @@ -101,7 +112,8 @@ license:CC0-1.0 1979 Adventure International - + + @@ -115,7 +127,8 @@ license:CC0-1.0 1979 Adventure International - + + @@ -129,7 +142,8 @@ license:CC0-1.0 1979 Adventure International - + + @@ -143,7 +157,8 @@ license:CC0-1.0 1979 Adventure International - + + @@ -157,8 +172,10 @@ license:CC0-1.0 Alignment Test Tone / Renumber 1979 Apple Computer, Inc. + - + + @@ -178,8 +195,11 @@ license:CC0-1.0 Alignment Test Tone / Sampler 1979 Apple Computer, Inc. + + - + + @@ -198,8 +218,9 @@ license:CC0-1.0 Andromeda Conquest 1982 Microcomputer Games + - + @@ -212,7 +233,8 @@ license:CC0-1.0 Apple-2 Trek 1977 Apple Computer, Inc. - + + @@ -225,8 +247,11 @@ license:CC0-1.0 Apple Bowl 1979 Apple Computer, Inc. + + - + + @@ -245,8 +270,9 @@ license:CC0-1.0 Apple Casino 1978 Powersoft, Inc. + - + @@ -259,8 +285,9 @@ license:CC0-1.0 Apple Derby 1978 Powersoft, Inc. + - + @@ -273,8 +300,9 @@ license:CC0-1.0 Apple ][ Organ 1978 Powersoft, Inc. + - + @@ -287,9 +315,10 @@ license:CC0-1.0 Applesoft IIa 1978 Apple Computer, Inc. + - + @@ -303,8 +332,9 @@ license:CC0-1.0 Apple Stock Quote Reporter 1978 Apple Computer, Inc. + - + @@ -317,8 +347,9 @@ license:CC0-1.0 Apple Trek 1977 Apple Computer, Inc. + - + @@ -331,8 +362,11 @@ license:CC0-1.0 Apple-Vision / Biorhythms 1979 Apple Computer, Inc. + + - + + @@ -351,9 +385,11 @@ license:CC0-1.0 Applesoft ][ Floating Point BASIC / Floating Point BASIC Demo 1978 Apple Computer, Inc. + - + + @@ -372,8 +408,9 @@ license:CC0-1.0 Assembler 1978 Powersoft, Inc. + - + @@ -386,8 +423,9 @@ license:CC0-1.0 Applesoft Utility Programs 1979 Hayden Book Company + - + @@ -400,8 +438,9 @@ license:CC0-1.0 Air Traffic Controller 1980 Creative Computing Software + - + @@ -414,8 +453,9 @@ license:CC0-1.0 B-1 Nuclear Bomber 1980 Microcomputer Games + - + @@ -428,15 +468,16 @@ license:CC0-1.0 Beneath Apple Manor 1978 The Software Factory - + + - + - + @@ -447,8 +488,10 @@ license:CC0-1.0 Baseball 1979 Programma International, Inc. + + - + @@ -461,8 +504,11 @@ license:CC0-1.0 Battlestar I 1979 Programma International, Inc. + + + - + @@ -476,8 +522,10 @@ license:CC0-1.0 Black Jack / Slot Machine 1978 Apple Computer, Inc. + - + + @@ -509,7 +557,10 @@ license:CC0-1.0 Bomber 1978 Softape - + + + + @@ -522,16 +573,19 @@ license:CC0-1.0 Bowling / Trilogy 1979 Instant Software, Inc. + + - + + - + - + @@ -542,8 +596,10 @@ license:CC0-1.0 Brian's Theme / Phone List 1979 Apple Computer, Inc. - - + + + + @@ -562,8 +618,10 @@ license:CC0-1.0 Brick Out / Color Demonstration Programs 1978 Apple Computer, Inc. + - + + @@ -582,7 +640,8 @@ license:CC0-1.0 Bridge Challenger 1978 Personal Software - + + @@ -595,7 +654,9 @@ license:CC0-1.0 Breakout / Color Demos 1977 Apple Computer, Inc. - + + + @@ -614,8 +675,11 @@ license:CC0-1.0 Breakout / Color Graphics 1978 Apple Computer, Inc. + + - + + @@ -634,8 +698,11 @@ license:CC0-1.0 Canter Downs 1979 Programma International, Inc. + + + - + @@ -648,7 +715,9 @@ license:CC0-1.0 Checkbook 1 1978 Apple Computer, Inc. - + + + @@ -661,8 +730,10 @@ license:CC0-1.0 Color Demosoft / Little Brickout 1979 Apple Computer, Inc. + - + + @@ -681,8 +752,11 @@ license:CC0-1.0 Color Sketch / Supermath 1979 Apple Computer, Inc. + + - + + @@ -701,8 +775,9 @@ license:CC0-1.0 Complex Mathematics 1979 Hayden Book Company + - + @@ -715,8 +790,9 @@ license:CC0-1.0 Conflict 2500 1981 Microcomputer Games + - + @@ -726,19 +802,22 @@ license:CC0-1.0 - Craps / Bright Pen Craps 1979 Softape - + + + + + - + - + @@ -762,7 +841,10 @@ license:CC0-1.0 Crazy Eights 1979 Softape - + + + + @@ -775,8 +857,9 @@ license:CC0-1.0 Cubik 1978 Powersoft, Inc. + - + @@ -792,7 +875,8 @@ license:CC0-1.0 - + + @@ -808,8 +892,11 @@ license:CC0-1.0 Datamover / Telepong 1978 Apple Computer, Inc. + + - + + @@ -828,8 +915,11 @@ license:CC0-1.0 Depth Charge 1978 Programma International, Inc. + + + - + @@ -842,7 +932,8 @@ license:CC0-1.0 Disk-O-Tape 1980 Dann McCreary - + + @@ -855,8 +946,9 @@ license:CC0-1.0 Dnieper River Line 1982 Microcomputer Games + - + @@ -869,7 +961,8 @@ license:CC0-1.0 Don't Fall 1980 Innerglo - + + @@ -882,8 +975,11 @@ license:CC0-1.0 Echo 1979 Programma International, Inc. + + + - + @@ -896,7 +992,10 @@ license:CC0-1.0 Electronic Index-Card File 1978 Softape - + + + + @@ -909,7 +1008,9 @@ license:CC0-1.0 Enchanted Island 1980 Mad Hatter Software - + + + @@ -922,8 +1023,9 @@ license:CC0-1.0 Engineering Mathematics - 1 1979 Hayden Book Company + - + @@ -936,7 +1038,9 @@ license:CC0-1.0 Escape! 1978 Micro Users Software Exchange - + + + @@ -963,8 +1067,9 @@ license:CC0-1.0 Financial Wizard 2 1978 Powersoft, Inc. + - + @@ -977,8 +1082,9 @@ license:CC0-1.0 Financial Wizard 3 1978 Powersoft, Inc. + - + @@ -991,8 +1097,9 @@ license:CC0-1.0 Financial Wizard 4 1978 Powersoft, Inc. + - + @@ -1005,8 +1112,10 @@ license:CC0-1.0 Basic Finance I / Penny Arcade 1979 Apple Computer, Inc. + - + + @@ -1025,8 +1134,9 @@ license:CC0-1.0 Football Predictions 1979 Programma International, Inc. + - + @@ -1036,19 +1146,23 @@ license:CC0-1.0 - Forte / Forte Music + Forté 1979 Softape - + + + + + - + - + @@ -1058,7 +1172,8 @@ license:CC0-1.0 Funpak I 1978 - System Design Lab + Systems Design Lab + @@ -1072,6 +1187,7 @@ license:CC0-1.0 Galaxian 19?? unknown + @@ -1085,8 +1201,9 @@ license:CC0-1.0 Galaxy 1982 Microcomputer Games + - + @@ -1099,6 +1216,7 @@ license:CC0-1.0 Galaxy Travel 1980 Tsukumo Original Software + @@ -1109,11 +1227,12 @@ license:CC0-1.0 - A Beginner's Guide to Game Prgrams and Number Programs (Tape 2) + A Beginner's Guide to Game Programs and Number Programs (Tape 2) 1977 Hayden Book Company + - + @@ -1126,8 +1245,9 @@ license:CC0-1.0 A Beginner's Guide to Game Programs (Tape 3) 1977 Hayden Book Company + - + @@ -1140,7 +1260,9 @@ license:CC0-1.0 Gammon Gambler 1979 Personal Software - + + + @@ -1154,7 +1276,9 @@ license:CC0-1.0 Global War 1979 Micro Users Software Exchange - + + + @@ -1167,8 +1291,9 @@ license:CC0-1.0 Guns of Fort Defiance 1981 Microcomputer Games + - + @@ -1181,8 +1306,9 @@ license:CC0-1.0 Haunted House 1978 Creative Computing Software + - + @@ -1195,8 +1321,10 @@ license:CC0-1.0 Hires Boxing 1979 Programma International, Inc. + + - + @@ -1209,8 +1337,9 @@ license:CC0-1.0 High Resolution Graphics 1978 Apple Computer, Inc. + - + @@ -1220,12 +1349,13 @@ license:CC0-1.0 - Highres Graphic Printer + Hires Graphic Printer 1979 - System Design Lab + Systems Design Lab + - + @@ -1233,12 +1363,13 @@ license:CC0-1.0 - Highres Playground + Hires Playground 1979 - System Design Lab + Systems Design Lab + - + @@ -1249,8 +1380,11 @@ license:CC0-1.0 Hangman / Color Math 1978 Apple Computer, Inc. + + - + + @@ -1269,8 +1403,9 @@ license:CC0-1.0 Hopalong Cassidy / Lemonade Stand 1979 Apple Computer, Inc. + - + @@ -1289,7 +1424,11 @@ license:CC0-1.0 House of Seven Gables / Journey to the Center of the Earth 19?? Compu-Things - + + + + + @@ -1308,7 +1447,9 @@ license:CC0-1.0 I Got Mine 1978 Softape - + + + @@ -1321,7 +1462,9 @@ license:CC0-1.0 Journey to Atlantis 1979 Mad Hatter Software - + + + @@ -1334,6 +1477,9 @@ license:CC0-1.0 Jupiter Express 1979 Softape + + + @@ -1347,8 +1493,11 @@ license:CC0-1.0 Kaleidoscope 1978 Programma International, Inc. + + + - + @@ -1362,8 +1511,9 @@ license:CC0-1.0 Lords of Karma 1980 Microcomputer Games + - + @@ -1376,7 +1526,8 @@ license:CC0-1.0 Kidstuff 1978 Speakeasy Software Ltd. - + + @@ -1389,8 +1540,10 @@ license:CC0-1.0 Laserblast 1979 Programma International, Inc. + + - + @@ -1403,7 +1556,9 @@ license:CC0-1.0 Learning BASIC, Pt. 1 & 2 1980 Innerglo - + + + @@ -1422,7 +1577,8 @@ license:CC0-1.0 Learning BASIC, Pt. 3 1980 Innerglo - + + @@ -1435,8 +1591,10 @@ license:CC0-1.0 Leases / Loans 1978 Apple Computer, Inc. + - + + @@ -1455,8 +1613,10 @@ license:CC0-1.0 Lunar Lander 1979 Programma International, Inc. + + - + @@ -1469,7 +1629,8 @@ license:CC0-1.0 Lunar Lander II 19?? Sensible Software - + + @@ -1482,8 +1643,11 @@ license:CC0-1.0 Magic Squares 1979 Programma International, Inc. + + + - + @@ -1496,8 +1660,11 @@ license:CC0-1.0 Match Wits 1978 Programma International, Inc. + + + - + @@ -1523,7 +1690,9 @@ license:CC0-1.0 Maze Game 1978 Micro Users Software Exchange - + + + @@ -1536,15 +1705,16 @@ license:CC0-1.0 Memory Builder 1978 Program Design, Inc. - + + - + - + @@ -1555,6 +1725,7 @@ license:CC0-1.0 Memory Check 19?? Tsukumo Original Software + @@ -1568,7 +1739,8 @@ license:CC0-1.0 Microchess 2.0 1978 Personal Software - + + @@ -1581,7 +1753,10 @@ license:CC0-1.0 Microgammon 1.0 1979 Softape - + + + + @@ -1594,8 +1769,10 @@ license:CC0-1.0 Micro Invaders 1979 Programma International, Inc. + + - + @@ -1608,7 +1785,8 @@ license:CC0-1.0 microtrivia 1978 Speakeasy Software Ltd. - + + @@ -1621,8 +1799,9 @@ license:CC0-1.0 Midway Campaign 1980 Microcomputer Games + - + @@ -1635,6 +1814,8 @@ license:CC0-1.0 Missile Command v1.2 1981 Urban E. Soft + + @@ -1649,7 +1830,12 @@ license:CC0-1.0 Don't Fall! / Memory Aide 1978 Magnemedia Inc. - + + + + + + @@ -1681,7 +1867,12 @@ license:CC0-1.0 Grading Routine / Drawing 1978 Magnemedia Inc. - + + + + + + @@ -1713,7 +1904,12 @@ license:CC0-1.0 Study Aide / Keyboard Organ 1978 Magnemedia Inc. - + + + + + + @@ -1745,7 +1941,12 @@ license:CC0-1.0 Super Math / True/False Quiz 1978 Magnemedia Inc. - + + + + + + @@ -1777,7 +1978,12 @@ license:CC0-1.0 Variable Message / Matching Quiz 1978 Magnemedia Inc. - + + + + + + @@ -1805,10 +2011,11 @@ license:CC0-1.0 - Module 1 + Instant Library: Module 1 1978 Softape - + + @@ -1819,10 +2026,11 @@ license:CC0-1.0 - Module 2 + Instant Library: Module 2 1978 Softape - + + @@ -1833,10 +2041,11 @@ license:CC0-1.0 - Module 3 + Instant Library: Module 3 1978 Softape - + + @@ -1846,10 +2055,11 @@ license:CC0-1.0 - Module 4 + Instant Library: Module 4 1978 Softape - + + @@ -1861,10 +2071,11 @@ license:CC0-1.0 - Module 5 + Instant Library: Module 5 1978 Softape - + + @@ -1874,10 +2085,11 @@ license:CC0-1.0 - Module 6 + Instant Library: Module 6 1978 Softape - + + @@ -1887,10 +2099,11 @@ license:CC0-1.0 - Module 7 + Instant Library: Module 7 1978 Softape - + + @@ -1900,10 +2113,11 @@ license:CC0-1.0 - Module 8 + Instant Library: Module 8 1978 Softape - + + @@ -1917,7 +2131,8 @@ license:CC0-1.0 Dunjonquest: Morloc's Tower 1979 Automated Simulations - + + @@ -1930,8 +2145,11 @@ license:CC0-1.0 Moto-Cross 1979 Programma International, Inc. + + + - + @@ -1945,7 +2163,9 @@ license:CC0-1.0 Music Box and Kaleidoscope 1978 Micro Users Software Exchange - + + + @@ -1958,15 +2178,19 @@ license:CC0-1.0 Music Kaleidoscope 1979 Softape - + + + + + - + - + @@ -1977,8 +2201,9 @@ license:CC0-1.0 North Atlantic Convoy Raider 1980 Microcomputer Games + - + @@ -1991,8 +2216,9 @@ license:CC0-1.0 Oil Tycoon 1980 Instant Software, Inc. + - + @@ -2018,15 +2244,20 @@ license:CC0-1.0 Othello 1979 Softape - + + + + + + - + - + @@ -2037,7 +2268,8 @@ license:CC0-1.0 The Patient Professor 16K 1980 Innerglo - + + @@ -2050,7 +2282,8 @@ license:CC0-1.0 The Patient Professor 24K 1980 Innerglo - + + @@ -2063,7 +2296,9 @@ license:CC0-1.0 Peg Jump 1979 Programma International, Inc. - + + + @@ -2076,8 +2311,11 @@ license:CC0-1.0 Phasor Zap 1978 Programma International, Inc. + + + - + @@ -2090,8 +2328,11 @@ license:CC0-1.0 Pinball / Infinite Number of Monkeys 1978 Apple Computer, Inc. + + - + + @@ -2107,13 +2348,15 @@ license:CC0-1.0 - Pirates! + Pirates 1978 Programma International, Inc. + + - + - + @@ -2124,8 +2367,9 @@ license:CC0-1.0 Planet Miners 1981 Microcomputer Games + - + @@ -2139,7 +2383,8 @@ license:CC0-1.0 1981 Adventure International - + + @@ -2152,15 +2397,16 @@ license:CC0-1.0 Preschool IQ-Builder 1978 Program Design, Inc. - + + - + - + @@ -2168,9 +2414,12 @@ license:CC0-1.0 - Puck Man + Apple Puck Man 1981 Star Craft + + + @@ -2183,7 +2432,8 @@ license:CC0-1.0 Quiz Baseball 1980 Innerglo - + + @@ -2196,15 +2446,18 @@ license:CC0-1.0 Racer 1979 Softape - + + + + - + - + @@ -2215,8 +2468,9 @@ license:CC0-1.0 Radar Interceptor 1978 Powersoft, Inc. + - + @@ -2229,9 +2483,10 @@ license:CC0-1.0 RAM Test 1978 Apple Computer, Inc. - - + + + @@ -2257,6 +2512,8 @@ license:CC0-1.0 Renju 1980 Tsukumo Electronics + + @@ -2270,7 +2527,10 @@ license:CC0-1.0 Retreat 1978 Programma International, Inc. - + + + + @@ -2283,8 +2543,9 @@ license:CC0-1.0 Revive - A Utility Program for the Apple 1979 Hayden Book Company + - + @@ -2297,8 +2558,9 @@ license:CC0-1.0 Rocket Pilot 1978 Powersoft, Inc. + - + @@ -2311,7 +2573,9 @@ license:CC0-1.0 Road Race / Saucer War 19?? Wise Owl Workshop - + + + @@ -2330,7 +2594,9 @@ license:CC0-1.0 Roulette 1979 Softape - + + + @@ -2343,8 +2609,10 @@ license:CC0-1.0 Sahara Warriors Commando / French Foreign Legion 1979 Instant Software, Inc. + - + + @@ -2363,8 +2631,9 @@ license:CC0-1.0 Sargon I 1979 Hayden Book Company + - + @@ -2377,8 +2646,9 @@ license:CC0-1.0 Sargon II 1979 Hayden Book Company + - + @@ -2391,8 +2661,9 @@ license:CC0-1.0 Saucer Invasion 1978 Powersoft, Inc. + - + @@ -2406,7 +2677,10 @@ license:CC0-1.0 1978 Apple Computer, Inc. - + + + + @@ -2422,10 +2696,10 @@ license:CC0-1.0 - Softside Mar 1981 + SoftSide March 1981 (V3N6) 1981 - Softside - + SoftSide Publications + @@ -2435,9 +2709,9 @@ license:CC0-1.0 - Softside May 1981 + SoftSide May 1981 (V4N8) 1981 - Softside + SoftSide Publications @@ -2448,9 +2722,9 @@ license:CC0-1.0 - Softside June 1981 + SoftSide June 1981 (V4N9) 1981 - Softside + SoftSide Publications @@ -2461,9 +2735,9 @@ license:CC0-1.0 - Softside July 1981 + SoftSide July 1981 (V4N10) 1981 - Softside + SoftSide Publications @@ -2474,9 +2748,9 @@ license:CC0-1.0 - Softside August 1981 + SoftSide August 1981 (V4N11) 1981 - Softside + SoftSide Publications @@ -2487,9 +2761,9 @@ license:CC0-1.0 - Softside September 1981 + SoftSide September 1981 (V4N12) 1981 - Softside + SoftSide Publications @@ -2500,9 +2774,9 @@ license:CC0-1.0 - Softside October 1981 + SoftSide October 1981 (V5N1) 1981 - Softside + SoftSide Publications @@ -2513,9 +2787,9 @@ license:CC0-1.0 - Softside December 1981 + SoftSide December 1981 (V5N3) 1981 - Softside + SoftSide Publications @@ -2526,9 +2800,9 @@ license:CC0-1.0 - Softside January 1982 + SoftSide January 1982 (V5N4) 1982 - Softside + SoftSide Publications @@ -2539,9 +2813,9 @@ license:CC0-1.0 - Softside May 1982 + SoftSide May 1982 (V5N8) 1982 - Softside + SoftSide Publications @@ -2552,12 +2826,12 @@ license:CC0-1.0 - Softside July 1982 + SoftSide June/July 1982 (V5N9, #30) 1982 - Softside - + SoftSide Publications + - + @@ -2565,12 +2839,12 @@ license:CC0-1.0 - Softside July 1982 Computers in Education + SoftSide August 1982 (V5N10, #31) 1982 - Softside - + SoftSide Publications + - + @@ -2581,8 +2855,9 @@ license:CC0-1.0 Songs in the Key of Apple 1979 Hayden Book Company + - + @@ -2595,8 +2870,9 @@ license:CC0-1.0 Space Maze 1978 Powersoft, Inc. + - + @@ -2609,8 +2885,9 @@ license:CC0-1.0 Space War 1979 Instant Software, Inc. + - + @@ -2623,8 +2900,11 @@ license:CC0-1.0 Speedway 1979 Programma International, Inc. + + + - + @@ -2637,8 +2917,9 @@ license:CC0-1.0 Spider Tag 1980 Programma International, Inc. + - + @@ -2652,7 +2933,9 @@ license:CC0-1.0 Star Blazer 1981 Star Craft - + + + @@ -2665,7 +2948,8 @@ license:CC0-1.0 Starquest: Rescue at Rigel 1980 Automated Simulations - + + @@ -2678,8 +2962,9 @@ license:CC0-1.0 Star Wars 1978 Powersoft, Inc. + - + @@ -2692,8 +2977,11 @@ license:CC0-1.0 Statistics 1979 Programma International, Inc. + + + - + @@ -2706,8 +2994,9 @@ license:CC0-1.0 Stocks & Bonds 1982 Microcomputer Games + - + @@ -2720,15 +3009,16 @@ license:CC0-1.0 Story Builder 1978 Program Design, Inc. - + + - + - + @@ -2740,8 +3030,10 @@ license:CC0-1.0 Startrek / Starwars 1978 Apple Computer, Inc. + - + + @@ -2761,7 +3053,9 @@ license:CC0-1.0 Study Aide 1980 Innerglo - + + + @@ -2780,7 +3074,8 @@ license:CC0-1.0 Super Arithmetica 1980 Innerglo - + + @@ -2806,8 +3101,10 @@ license:CC0-1.0 Super Othello 1979 Programma International, Inc. + + - + @@ -2821,8 +3118,10 @@ license:CC0-1.0 Super Starwars 1978 Programma International, Inc. + + - + @@ -2836,7 +3135,8 @@ license:CC0-1.0 SuperMath 1980 Innerglo - + + @@ -2863,7 +3163,10 @@ license:CC0-1.0 The Talking Calculator 1978 Softape - + + + + @@ -2876,8 +3179,9 @@ license:CC0-1.0 Tanktics 1981 Microcomputer Games + - + @@ -2890,7 +3194,9 @@ license:CC0-1.0 Tank War 1978 Micro Users Software Exchange - + + + @@ -2906,7 +3212,8 @@ license:CC0-1.0 1978 Apple Computer, Inc. - + + @@ -2926,15 +3233,20 @@ license:CC0-1.0 Tic-Tac-Talker / Spectrum Analysis 1978 Softape - + + + + + + - + - + @@ -2945,8 +3257,11 @@ license:CC0-1.0 Time Clock 1978 Programma International, Inc. + + + - + @@ -2959,8 +3274,9 @@ license:CC0-1.0 Typing Tutor 1979 Microsoft Consumer Products + - + @@ -2973,6 +3289,7 @@ license:CC0-1.0 U-Draw 1978 Micro Users Software Exchange + @@ -2986,8 +3303,9 @@ license:CC0-1.0 Voyager I 1981 Microcomputer Games + - + @@ -3000,7 +3318,8 @@ license:CC0-1.0 Warlords 1978 Speakeasy Software Ltd. - + + @@ -3014,8 +3333,9 @@ license:CC0-1.0 1978 Speakeasy Software - - + + + From e6a9e0caa15ce23e659f3e5b8a0c0bb9c0fb3061 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 8 Mar 2026 10:36:45 -0400 Subject: [PATCH 201/351] apple2_cass.xml: Fix typo --- hash/apple2_cass.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hash/apple2_cass.xml b/hash/apple2_cass.xml index 74ea599d774..5116ecaebb4 100644 --- a/hash/apple2_cass.xml +++ b/hash/apple2_cass.xml @@ -2354,7 +2354,7 @@ license:CC0-1.0 - + From e916964bb3b084a70ddc40c665cd34cf9b596a9f Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 9 Mar 2026 03:15:07 +1100 Subject: [PATCH 202/351] cpu/sharc: Better ALU emulation for interpreter: * Implemented fixed-point ALU overflow sticky flag (AOS). * More accurate implementation of Fn = -Fx, Fn = ABS Fx and Fn = PASS Fx. * Implemented Rn = ABS Rx and Fn = ABS(Fx - Fy). * Sorted computer function declarations and definitions to match order of instruction listings in documentation. --- src/devices/cpu/sharc/compute.hxx | 1025 ++++++++++++----------- src/devices/cpu/sharc/sharc.h | 63 +- src/devices/cpu/sharc/sharcinternal.ipp | 1 + src/devices/cpu/sharc/sharcops.hxx | 4 +- 4 files changed, 585 insertions(+), 508 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 1a6452a9739..f871ac04c81 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -5,16 +5,16 @@ #include #include -#define CLEAR_ALU_FLAGS() do { m_core->astat &= ~(AZ|AN|AV|AC|AS|AI); } while (false) +#define CLEAR_ALU_FLAGS() do { m_core->astat &= ~(AZ | AN | AV | AC | AS | AI); } while (false) -#define SET_FLAG_AZ(r) do { m_core->astat |= (((r) == 0) ? AZ : 0); } while (false) -#define SET_FLAG_AN(r) do { m_core->astat |= (((r) & 0x80000000) ? AN : 0); } while (false) -#define SET_FLAG_AC_ADD(r,a,b) do { m_core->astat |= ((uint32_t(r) < uint32_t(a)) ? AC : 0); } while (false) -#define SET_FLAG_AV_ADD(r,a,b) do { m_core->astat |= ((~((a) ^ (b)) & ((a) ^ (r)) & 0x80000000) ? AV : 0); } while (false) -#define SET_FLAG_AC_SUB(r,a,b) do { m_core->astat |= ((uint32_t(r) <= uint32_t(a)) ? AC : 0); } while (false) -#define SET_FLAG_AV_SUB(r,a,b) do { m_core->astat |= ((((a) ^ (b)) & ((a) ^ (r)) & 0x80000000) ? AV : 0); } while (false) +#define SET_FLAG_AZ(r) do { m_core->astat |= ((r) == 0) ? AZ : 0; } while (false) +#define SET_FLAG_AN(r) do { m_core->astat |= ((r) & 0x80000000) ? AN : 0; } while (false) +#define SET_FLAG_AC_ADD(r,a,b) do { m_core->astat |= (uint32_t(r) < uint32_t(a)) ? AC : 0; } while (false) +#define SET_FLAG_AC_SUB(r,a,b) do { m_core->astat |= (uint32_t(r) <= uint32_t(a)) ? AC : 0; } while (false) +#define SET_FLAG_AV_ADD(r,a,b) do { if (~((a) ^ (b)) & ((a) ^ (r)) & 0x80000000) { m_core->astat |= AV; m_core->stky |= AOS; } } while (false) +#define SET_FLAG_AV_SUB(r,a,b) do { if (((a) ^ (b)) & ((a) ^ (r)) & 0x80000000) { m_core->astat |= AV; m_core->stky |= AOS; } } while (false) -#define CLEAR_MULTIPLIER_FLAGS() do { m_core->astat &= ~(MN|MV|MU|MI); } while (false) +#define CLEAR_MULTIPLIER_FLAGS() do { m_core->astat &= ~(MN | MV | MU | MI); } while (false) #define SET_FLAG_MN(r) do { m_core->astat |= (((r) & 0x80000000) ? MN : 0); } while (false) #define SET_FLAG_MV(r) do { m_core->astat |= (((uint32_t((r) >> 32) != 0) && (uint32_t((r) >> 32) != 0xffffffff)) ? MV : 0); } while (false) @@ -29,6 +29,7 @@ constexpr bool IS_FLOAT_ZERO(uint32_t r) { return (r & (FLOAT_EXPONENT_MA constexpr bool IS_FLOAT_DENORMAL(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == 0) && ((r & FLOAT_MANTISSA_MASK) != 0); } constexpr bool IS_FLOAT_NAN(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK) && ((r & FLOAT_MANTISSA_MASK) != 0); } constexpr bool IS_FLOAT_INFINITY(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == FLOAT_INFINITY; } +constexpr bool IS_FLOAT_NEGATIVE(uint32_t r) { return (r & FLOAT_SIGN_MASK) && !IS_FLOAT_NAN(r); } /*****************************************************************************/ @@ -107,6 +108,33 @@ const uint32_t adsp21062_device::rsqrts_mantissa_lookup[128] = 0x00370000, 0x00370000, 0x00360000, 0x00350000, }; +uint32_t adsp21062_device::SCALB(SHARC_REG rx, int ry) +{ + uint32_t const mantissa = rx.r & FLOAT_MANTISSA_MASK; + uint32_t const sign = rx.r & FLOAT_SIGN_MASK; + + int exponent = float_get_unbiased_exponent(rx.r); + exponent += int32_t(REG(ry)); + + if (exponent > 127) + { + // overflow + m_core->astat |= AV; + return sign | FLOAT_INFINITY; + } + else if (exponent < -126) + { + // denormal + m_core->astat |= AZ; + return sign; + } + else + { + return sign | float_make_biased_exponent(exponent) | mantissa; + } +} + + /*****************************************************************************/ /* Integer ALU operations */ @@ -126,7 +154,6 @@ void adsp21062_device::compute_add(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } @@ -146,7 +173,6 @@ void adsp21062_device::compute_sub(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } @@ -169,7 +195,6 @@ void adsp21062_device::compute_add_ci(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } @@ -191,20 +216,6 @@ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) SET_FLAG_AZ(r); REG(rn) = r; - - m_core->astat &= ~AF; -} - -/* Rn = Rx AND Ry */ -void adsp21062_device::compute_and(int rn, int rx, int ry) -{ - uint32_t const r = REG(rx) & REG(ry); - - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); - REG(rn) = r; - m_core->astat &= ~AF; } @@ -228,45 +239,6 @@ void adsp21062_device::compute_comp(int rx, int ry) m_core->astat &= ~AF; } -/* Rn = PASS Rx */ -void adsp21062_device::compute_pass(int rn, int rx) -{ - CLEAR_ALU_FLAGS(); - /* TODO: floating-point extension field is set to 0 */ - - REG(rn) = REG(rx); - if (REG(rn) == 0) - m_core->astat |= AZ; - if (REG(rn) & 0x80000000) - m_core->astat |= AN; - - m_core->astat &= ~AF; -} - -/* Rn = Rx XOR Ry */ -void adsp21062_device::compute_xor(int rn, int rx, int ry) -{ - uint32_t const r = REG(rx) ^ REG(ry); - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); - REG(rn) = r; - - m_core->astat &= ~AF; -} - -/* Rn = Rx OR Ry */ -void adsp21062_device::compute_or(int rn, int rx, int ry) -{ - uint32_t const r = REG(rx) | REG(ry); - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); - REG(rn) = r; - - m_core->astat &= ~AF; -} - /* Rn = Rx + CI */ void adsp21062_device::compute_add_ci(int rn, int rx) { @@ -284,7 +256,6 @@ void adsp21062_device::compute_add_ci(int rn, int rx) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } @@ -305,7 +276,6 @@ void adsp21062_device::compute_sub_ci(int rn, int rx) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } @@ -325,7 +295,6 @@ void adsp21062_device::compute_inc(int rn, int rx) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } @@ -345,50 +314,6 @@ void adsp21062_device::compute_dec(int rn, int rx) SET_FLAG_AZ(r); REG(rn) = r; - - m_core->astat &= ~AF; -} - -/* Rn = MIN(Rx, Ry) */ -void adsp21062_device::compute_min(int rn, int rx, int ry) -{ - uint32_t const r = std::min(int32_t(REG(rx)), int32_t(REG(ry))); - - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); - - REG(rn) = r; - - m_core->astat &= ~AF; -} - -/* Rn = MAX(Rx, Ry) */ -void adsp21062_device::compute_max(int rn, int rx, int ry) -{ - uint32_t const r = std::max(int32_t(REG(rx)), int32_t(REG(ry))); - - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); - - REG(rn) = r; - - m_core->astat &= ~AF; -} - -/* Rn = CLIP Rx BY Ry */ -void adsp21062_device::compute_clip(int rn, int rx, int ry) -{ - const int32_t absry = std::abs(int32_t(REG(ry))); - const uint32_t r = std::clamp(int32_t(REG(rx)), -absry, absry); - - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r); - SET_FLAG_AZ(r); - - REG(rn) = r; - m_core->astat &= ~AF; } @@ -408,7 +333,82 @@ void adsp21062_device::compute_neg(int rn, int rx) SET_FLAG_AZ(r); REG(rn) = r; + m_core->astat &= ~AF; +} +/* Rn = ABS Rx */ +void adsp21062_device::compute_abs(int rn, int rx) +{ + uint32_t r = std::abs(int32_t(REG(rx))); + + CLEAR_ALU_FLAGS(); + if (int32_t(r) < 0) + { + m_core->astat |= AV; + m_core->stky |= AOS; + if (m_core->mode1 & MODE1_ALUSAT) + r = 0x7fffffff; + } + + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + m_core->astat |= (int32_t(REG(rx)) < 0) ? AS : 0; + + REG(rn) = r; + m_core->astat &= ~AF; +} + +/* Rn = PASS Rx */ +void adsp21062_device::compute_pass(int rn, int rx) +{ + CLEAR_ALU_FLAGS(); + /* TODO: floating-point extension field is set to 0 */ + + REG(rn) = REG(rx); + if (REG(rn) == 0) + m_core->astat |= AZ; + if (REG(rn) & 0x80000000) + m_core->astat |= AN; + + m_core->astat &= ~AF; +} + +/* Rn = Rx AND Ry */ +void adsp21062_device::compute_and(int rn, int rx, int ry) +{ + uint32_t const r = REG(rx) & REG(ry); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + m_core->astat &= ~AF; +} + +/* Rn = Rx OR Ry */ +void adsp21062_device::compute_or(int rn, int rx, int ry) +{ + uint32_t const r = REG(rx) | REG(ry); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + m_core->astat &= ~AF; +} + +/* Rn = Rx XOR Ry */ +void adsp21062_device::compute_xor(int rn, int rx, int ry) +{ + uint32_t const r = REG(rx) ^ REG(ry); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; m_core->astat &= ~AF; } @@ -422,64 +422,372 @@ void adsp21062_device::compute_not(int rn, int rx) SET_FLAG_AZ(r); REG(rn) = r; - m_core->astat &= ~AF; } +/* Rn = MIN(Rx, Ry) */ +void adsp21062_device::compute_min(int rn, int rx, int ry) +{ + uint32_t const r = std::min(int32_t(REG(rx)), int32_t(REG(ry))); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + m_core->astat &= ~AF; +} + +/* Rn = MAX(Rx, Ry) */ +void adsp21062_device::compute_max(int rn, int rx, int ry) +{ + uint32_t const r = std::max(int32_t(REG(rx)), int32_t(REG(ry))); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + m_core->astat &= ~AF; +} + +/* Rn = CLIP Rx BY Ry */ +void adsp21062_device::compute_clip(int rn, int rx, int ry) +{ + const int32_t absry = std::abs(int32_t(REG(ry))); + const uint32_t r = std::clamp(int32_t(REG(rx)), -absry, absry); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r); + SET_FLAG_AZ(r); + + REG(rn) = r; + m_core->astat &= ~AF; +} + + /*****************************************************************************/ /* Floating-point ALU operations */ -uint32_t adsp21062_device::SCALB(SHARC_REG rx, int ry) +/* Fn = Fx + Fy */ +void adsp21062_device::compute_fadd(int rn, int rx, int ry) { - uint32_t mantissa = rx.r & FLOAT_MANTISSA_MASK; - uint32_t sign = rx.r & FLOAT_SIGN_MASK; - - int exponent = float_get_unbiased_exponent(rx.r); - exponent += int32_t(REG(ry)); - - if (exponent > 127) - { - // overflow - m_core->astat |= AV; - return sign | FLOAT_INFINITY; - } - else if (exponent < -126) - { - // denormal - m_core->astat |= AZ; - return sign; - } - else - { - return sign | float_make_biased_exponent(exponent) | mantissa; - } -} - -/* Fn = FLOAT Rx */ -void adsp21062_device::compute_float(int rn, int rx) -{ - // verified - FREG(rn) = (float)(int32_t)REG(rx); + SHARC_REG r; + r.f = FREG(rx) + FREG(ry); CLEAR_ALU_FLAGS(); // AN - SET_FLAG_AN(REG(rn)); + m_core->astat |= (r.f < 0.0f) ? AN : 0; // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; /* TODO: AV flag */ + // AIS + if (m_core->astat & AI) m_core->stky |= AIS; + + FREG(rn) = r.f; m_core->astat |= AF; } -/* Rn = FIX Fx */ -void adsp21062_device::compute_fix(int rn, int rx) +/* Fn = Fx - Fy */ +void adsp21062_device::compute_fsub(int rn, int rx, int ry) +{ + SHARC_REG r; + r.f = FREG(rx) - FREG(ry); + + CLEAR_ALU_FLAGS(); + // AN + m_core->astat |= (r.f < 0.0f) ? AN : 0; + // AZ + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + // AUS + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + /* TODO: AV flag */ + + // AIS + if (m_core->astat & AI) m_core->stky |= AIS; + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* Fn = ABS(Fx + Fy) */ +void adsp21062_device::compute_fadd_abs(int rn, int rx, int ry) +{ + SHARC_REG r; + r.f = fabsf(FREG(rx) + FREG(ry)); + + CLEAR_ALU_FLAGS(); + // AZ + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + // AUS + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + // AV + m_core->astat |= (IS_FLOAT_INFINITY(r.r)) ? AV : 0; + + // AIS + if (m_core->astat & AI) m_core->stky |= AIS; + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* Fn = ABS(Fx - Fy) */ +void adsp21062_device::compute_fsub_abs(int rn, int rx, int ry) +{ + SHARC_REG r; + r.f = fabsf(FREG(rx) - FREG(ry)); + + CLEAR_ALU_FLAGS(); + // AZ + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + // AUS + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + // AV + m_core->astat |= (IS_FLOAT_INFINITY(r.r)) ? AV : 0; + + // AIS + if (m_core->astat & AI) m_core->stky |= AIS; + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* Fn = (Fx + Fy) / 2 */ +void adsp21062_device::compute_favg(int rn, int rx, int ry) +{ + SHARC_REG r; + r.f = (FREG(rx) + FREG(ry)) / 2.0f; + + CLEAR_ALU_FLAGS(); + // AN + m_core->astat |= (r.f < 0.0f) ? AN : 0; + // AZ + m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + // AUS + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + /* TODO: AV flag */ + + // AIS + if (m_core->astat & AI) m_core->stky |= AIS; + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* COMP(Fx, Fy) */ +void adsp21062_device::compute_fcomp(int rx, int ry) +{ + uint32_t comp_accum; + + CLEAR_ALU_FLAGS(); + // AZ + if (FREG(rx) == FREG(ry)) + m_core->astat |= AZ; + // AN + if (FREG(rx) < FREG(ry)) + m_core->astat |= AN; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + + // AIS + if (m_core->astat & AI) m_core->stky |= AIS; + + // Update ASTAT compare accumulation register + comp_accum = (m_core->astat >> 24) & 0xff; + comp_accum >>= 1; + if ((m_core->astat & (AZ|AN)) == 0) + { + comp_accum |= 0x80; + } + m_core->astat &= 0xffffff; + m_core->astat |= comp_accum << 24; + m_core->astat |= AF; +} + +/* Fn = -Fx */ +void adsp21062_device::compute_fneg(int rn, int rx) +{ + CLEAR_ALU_FLAGS(); + + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + if (IS_FLOAT_DENORMAL(REG(rx))) + { + r.r = ~REG(rx) & FLOAT_SIGN_MASK; + m_core->astat |= AZ; + } + else + { + r.r = REG(rx) ^ FLOAT_SIGN_MASK; + m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* Fn = ABS Fx */ +void adsp21062_device::compute_fabs(int rn, int rx) +{ + CLEAR_ALU_FLAGS(); + + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + if (IS_FLOAT_DENORMAL(REG(rx))) + { + r.r = 0; + m_core->astat |= AZ; + } + else + { + r.r = REG(rx) & ~FLOAT_SIGN_MASK; + m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; + } + m_core->astat |= (REG(rx) & FLOAT_SIGN_MASK) ? AS : 0; + } + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* Fn = PASS Fx */ +void adsp21062_device::compute_fpass(int rn, int rx) +{ + CLEAR_ALU_FLAGS(); + + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + if (IS_FLOAT_DENORMAL(REG(rx))) + { + r.r = REG(rx) & FLOAT_SIGN_MASK; + m_core->astat |= AZ; + } + else + { + r.r = REG(rx); + m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } + + FREG(rn) = r.f; + m_core->astat |= AF; +} + +/* Fn = SCALB Fx BY Fy */ +void adsp21062_device::compute_scalb(int rn, int rx, int ry) +{ + // verified + SHARC_REG r; + CLEAR_ALU_FLAGS(); + + if (IS_FLOAT_NAN(REG(rx))) + { + m_core->astat |= AI; + m_core->stky |= AIS; + + REG(rn) = FLOAT_CANONICAL_NAN; + } + else + { + r.r = SCALB(m_core->r[rx], ry); + + // AN + SET_FLAG_AN(r.r); + // AZ + m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; + // AUS + m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; + + FREG(rn) = r.f; + } + m_core->astat |= AF; +} + +/* Rn = LOGB Fx */ +void adsp21062_device::compute_logb(int rn, int rx) +{ + // verified + uint32_t r = REG(rx); + + CLEAR_ALU_FLAGS(); + + if (IS_FLOAT_INFINITY(REG(rx))) + { + REG(rn) = FLOAT_INFINITY; + + m_core->astat |= AV; + } + else if (IS_FLOAT_ZERO(REG(rx))) + { + REG(rn) = FLOAT_SIGN_MASK | FLOAT_INFINITY; + + m_core->astat |= AV; + } + else if (IS_FLOAT_NAN(REG(rx))) + { + REG(rn) = FLOAT_CANONICAL_NAN; + + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + int exponent = float_get_unbiased_exponent(r); + + // AN + SET_FLAG_AN(exponent); + // AZ + SET_FLAG_AZ(exponent); + + REG(rn) = exponent; + } + m_core->astat |= AF; +} + +/* Rn = FIX Fx BY Ry */ +void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) { int32_t alu_i; SHARC_REG r_alu; - r_alu.f = FREG(rx); + r_alu.r = SCALB(m_core->r[rx], ry); if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = int32_t(floorf(r_alu.f)); @@ -503,13 +811,13 @@ void adsp21062_device::compute_fix(int rn, int rx) m_core->astat |= AF; } -/* Rn = FIX Fx BY Ry */ -void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) +/* Rn = FIX Fx */ +void adsp21062_device::compute_fix(int rn, int rx) { int32_t alu_i; SHARC_REG r_alu; - r_alu.r = SCALB(m_core->r[rx], ry); + r_alu.f = FREG(rx); if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = int32_t(floorf(r_alu.f)); @@ -554,301 +862,21 @@ void adsp21062_device::compute_float_scaled(int rn, int rx, int ry) m_core->astat |= AF; } -/* Rn = LOGB Fx */ -void adsp21062_device::compute_logb(int rn, int rx) +/* Fn = FLOAT Rx */ +void adsp21062_device::compute_float(int rn, int rx) { // verified - uint32_t r = REG(rx); - - CLEAR_ALU_FLAGS(); - - if (IS_FLOAT_INFINITY(REG(rx))) - { - REG(rn) = FLOAT_INFINITY; - - m_core->astat |= AV; - } - else if (IS_FLOAT_ZERO(REG(rx))) - { - REG(rn) = FLOAT_SIGN_MASK | FLOAT_INFINITY; - - m_core->astat |= AV; - } - else if (IS_FLOAT_NAN(REG(rx))) - { - REG(rn) = 0xffffffff; - - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - int exponent = float_get_unbiased_exponent(r); - - // AN - SET_FLAG_AN(exponent); - // AZ - SET_FLAG_AZ(exponent); - - REG(rn) = exponent; - } - m_core->astat |= AF; -} - -/* Fn = SCALB Fx BY Fy */ -void adsp21062_device::compute_scalb(int rn, int rx, int ry) -{ - // verified - SHARC_REG r; - CLEAR_ALU_FLAGS(); - - if (IS_FLOAT_NAN(REG(rx))) - { - m_core->astat |= AI; - m_core->stky |= AIS; - - REG(rn) = 0xffffffff; - } - else - { - r.r = SCALB(m_core->r[rx], ry); - - // AN - SET_FLAG_AN(r.r); - // AZ - m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - - FREG(rn) = r.f; - } - m_core->astat |= AF; -} - -/* Fn = Fx + Fy */ -void adsp21062_device::compute_fadd(int rn, int rx, int ry) -{ - SHARC_REG r; - r.f = FREG(rx) + FREG(ry); + FREG(rn) = (float)(int32_t)REG(rx); CLEAR_ALU_FLAGS(); // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; + SET_FLAG_AN(REG(rn)); // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + m_core->stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; /* TODO: AV flag */ - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - FREG(rn) = r.f; - m_core->astat |= AF; -} - -/* Fn = (Fx + Fy) / 2 */ -void adsp21062_device::compute_favg(int rn, int rx, int ry) -{ - SHARC_REG r; - r.f = (FREG(rx) + FREG(ry)) / 2.0f; - - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - FREG(rn) = r.f; - m_core->astat |= AF; -} - -/* Fn = Fx - Fy */ -void adsp21062_device::compute_fsub(int rn, int rx, int ry) -{ - SHARC_REG r; - r.f = FREG(rx) - FREG(ry); - - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - FREG(rn) = r.f; - m_core->astat |= AF; -} - -/* Fn = -Fx */ -void adsp21062_device::compute_fneg(int rn, int rx) -{ - SHARC_REG r; - r.f = -FREG(rx); - - CLEAR_ALU_FLAGS(); - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - FREG(rn) = r.f; - m_core->astat |= AF; -} - -/* COMP(Fx, Fy) */ -void adsp21062_device::compute_fcomp(int rx, int ry) -{ - uint32_t comp_accum; - - CLEAR_ALU_FLAGS(); - // AZ - if (FREG(rx) == FREG(ry)) - m_core->astat |= AZ; - // AN - if (FREG(rx) < FREG(ry)) - m_core->astat |= AN; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - // Update ASTAT compare accumulation register - comp_accum = (m_core->astat >> 24) & 0xff; - comp_accum >>= 1; - if ((m_core->astat & (AZ|AN)) == 0) - { - comp_accum |= 0x80; - } - m_core->astat &= 0xffffff; - m_core->astat |= comp_accum << 24; - m_core->astat |= AF; -} - -/* Fn = ABS(Fx + Fy) */ -void adsp21062_device::compute_fabs_plus(int rn, int rx, int ry) -{ - SHARC_REG r; - r.f = fabsf(FREG(rx) + FREG(ry)); - - CLEAR_ALU_FLAGS(); - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - // AV - m_core->astat |= (IS_FLOAT_INFINITY(r.r)) ? AV : 0; - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - FREG(rn) = r.f; - m_core->astat |= AF; -} - -/* Fn = MAX(Fx, Fy) */ -void adsp21062_device::compute_fmax(int rn, int rx, int ry) -{ - SHARC_REG r_alu; - - r_alu.f = std::max(FREG(rx), FREG(ry)); - - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - - FREG(rn) = r_alu.f; - m_core->astat |= AF; -} - -/* Fn = MIN(Fx, Fy) */ -void adsp21062_device::compute_fmin(int rn, int rx, int ry) -{ - SHARC_REG r_alu; - - r_alu.f = std::min(FREG(rx), FREG(ry)); - - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - - FREG(rn) = r_alu.f; - m_core->astat |= AF; -} - -/* Fn = COPYSIGN(Fx, Fy) */ -void adsp21062_device::compute_fcopysign(int rn, int rx, int ry) -{ - SHARC_REG r_alu; - - r_alu.r = (REG(rx) & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) | (REG(ry) & FLOAT_SIGN_MASK); // TODO DENORM and NAN cases ? - - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - - FREG(rn) = r_alu.f; - m_core->astat |= AF; -} - -/* Fn = CLIP Fx BY Fy */ -void adsp21062_device::compute_fclip(int rn, int rx, int ry) -{ - SHARC_REG r_alu; - - const float absry = fabsf(FREG(ry)); - r_alu.f = std::clamp(FREG(rx), -absry, absry); - - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r_alu.r); - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - - FREG(rn) = r_alu.f; m_core->astat |= AF; } @@ -863,7 +891,7 @@ void adsp21062_device::compute_recips(int rn, int rx) if (IS_FLOAT_NAN(REG(rx))) { // NaN - r = 0xffffffff; + r = FLOAT_CANONICAL_NAN; // AI m_core->astat |= AI; @@ -904,10 +932,8 @@ void adsp21062_device::compute_recips(int rn, int rx) m_core->astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; } - // AF - m_core->astat |= AF; - REG(rn) = r; + m_core->astat |= AF; } /* Fn = RSQRTS Fx */ @@ -919,12 +945,12 @@ void adsp21062_device::compute_rsqrts(int rn, int rx) if (uint32_t(REG(rx)) > 0x80000000) { // non-zero negative - r = 0xffffffff; + r = FLOAT_CANONICAL_NAN; } else if (IS_FLOAT_NAN(REG(rx))) { // NaN - r = 0xffffffff; + r = FLOAT_CANONICAL_NAN; } else { @@ -948,60 +974,93 @@ void adsp21062_device::compute_rsqrts(int rn, int rx) m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || (REG(rx) & FLOAT_SIGN_MASK)) ? AI : 0; // AIS if (m_core->astat & AI) m_core->stky |= AIS; - // AF - m_core->astat |= AF; REG(rn) = r; -} - - -/* Fn = PASS Fx */ -void adsp21062_device::compute_fpass(int rn, int rx) -{ - SHARC_REG r; - r.f = FREG(rx); - - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; - - FREG(rn) = r.f; m_core->astat |= AF; } -/* Fn = ABS Fx */ -void adsp21062_device::compute_fabs(int rn, int rx) +/* Fn = COPYSIGN(Fx, Fy) */ +void adsp21062_device::compute_fcopysign(int rn, int rx, int ry) { - SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx))) - { - r.r = 0xffffffff; - } - else if (IS_FLOAT_DENORMAL(REG(rx))) - { - r.r = 0; - } - else - { - r.r = REG(rx) & 0x7fffffff; - } + SHARC_REG r_alu; + + r_alu.r = (REG(rx) & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) | (REG(ry) & FLOAT_SIGN_MASK); // TODO DENORM and NAN cases ? CLEAR_ALU_FLAGS(); + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; - // AS - m_core->astat |= (REG(rx) < 0.0f) ? AS : 0; + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - FREG(rn) = r.f; + FREG(rn) = r_alu.f; m_core->astat |= AF; } +/* Fn = MIN(Fx, Fy) */ +void adsp21062_device::compute_fmin(int rn, int rx, int ry) +{ + SHARC_REG r_alu; + + r_alu.f = std::min(FREG(rx), FREG(ry)); + + CLEAR_ALU_FLAGS(); + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; + // AZ + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + // AU + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + /* TODO: AV flag */ + + FREG(rn) = r_alu.f; + m_core->astat |= AF; +} + +/* Fn = MAX(Fx, Fy) */ +void adsp21062_device::compute_fmax(int rn, int rx, int ry) +{ + SHARC_REG r_alu; + + r_alu.f = std::max(FREG(rx), FREG(ry)); + + CLEAR_ALU_FLAGS(); + m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; + // AZ + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + // AU + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + /* TODO: AV flag */ + + FREG(rn) = r_alu.f; + m_core->astat |= AF; +} + +/* Fn = CLIP Fx BY Fy */ +void adsp21062_device::compute_fclip(int rn, int rx, int ry) +{ + SHARC_REG r_alu; + + const float absry = fabsf(FREG(ry)); + r_alu.f = std::clamp(FREG(rx), -absry, absry); + + CLEAR_ALU_FLAGS(); + SET_FLAG_AN(r_alu.r); + // AZ + m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + // AU + m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + // AI + m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; + + FREG(rn) = r_alu.f; + m_core->astat |= AF; +} + + /*****************************************************************************/ /* Multiplier opcodes */ diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index fd41dd9d7b2..93f0d321386 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -388,56 +388,66 @@ private: void sharcop_nop(); void sharcop_idle(); [[noreturn]] void sharcop_unimplemented() ATTR_COLD; + inline uint32_t SCALB(SHARC_REG rx, int ry); + + // ALU fixed-point inline void compute_add(int rn, int rx, int ry); inline void compute_sub(int rn, int rx, int ry); inline void compute_add_ci(int rn, int rx, int ry); inline void compute_sub_ci(int rn, int rx, int ry); - inline void compute_and(int rn, int rx, int ry); inline void compute_comp(int rx, int ry); - inline void compute_pass(int rn, int rx); - inline void compute_xor(int rn, int rx, int ry); - inline void compute_or(int rn, int rx, int ry); inline void compute_add_ci(int rn, int rx); inline void compute_sub_ci(int rn, int rx); inline void compute_inc(int rn, int rx); inline void compute_dec(int rn, int rx); + inline void compute_neg(int rn, int rx); + inline void compute_abs(int rn, int rx); + inline void compute_pass(int rn, int rx); + inline void compute_and(int rn, int rx, int ry); + inline void compute_or(int rn, int rx, int ry); + inline void compute_xor(int rn, int rx, int ry); + inline void compute_not(int rn, int rx); inline void compute_min(int rn, int rx, int ry); inline void compute_max(int rn, int rx, int ry); inline void compute_clip(int rn, int rx, int ry); - inline void compute_neg(int rn, int rx); - inline void compute_not(int rn, int rx); - inline uint32_t SCALB(SHARC_REG rx, int ry); - inline void compute_float(int rn, int rx); - inline void compute_fix(int rn, int rx); - inline void compute_fix_scaled(int rn, int rx, int ry); - inline void compute_float_scaled(int rn, int rx, int ry); - inline void compute_logb(int rn, int rx); - inline void compute_scalb(int rn, int rx, int ry); + + // ALU floating-point inline void compute_fadd(int rn, int rx, int ry); inline void compute_fsub(int rn, int rx, int ry); + inline void compute_fadd_abs(int rn, int rx, int ry); + inline void compute_fsub_abs(int rn, int rx, int ry); inline void compute_favg(int rn, int rx, int ry); - inline void compute_fneg(int rn, int rx); inline void compute_fcomp(int rx, int ry); - inline void compute_fabs_plus(int rn, int rx, int ry); - inline void compute_fmax(int rn, int rx, int ry); - inline void compute_fmin(int rn, int rx, int ry); - inline void compute_fcopysign(int rn, int rx, int ry); - inline void compute_fclip(int rn, int rx, int ry); + inline void compute_fneg(int rn, int rx); + inline void compute_fabs(int rn, int rx); + inline void compute_fpass(int rn, int rx); + inline void compute_scalb(int rn, int rx, int ry); + inline void compute_logb(int rn, int rx); + inline void compute_fix_scaled(int rn, int rx, int ry); + inline void compute_fix(int rn, int rx); + inline void compute_float_scaled(int rn, int rx, int ry); + inline void compute_float(int rn, int rx); inline void compute_recips(int rn, int rx); inline void compute_rsqrts(int rn, int rx); - inline void compute_fpass(int rn, int rx); - inline void compute_fabs(int rn, int rx); + inline void compute_fcopysign(int rn, int rx, int ry); + inline void compute_fmin(int rn, int rx, int ry); + inline void compute_fmax(int rn, int rx, int ry); + inline void compute_fclip(int rn, int rx, int ry); + + // Multiplier inline void compute_mul_uuin(int rn, int rx, int ry); inline void compute_mul_ssin(int rn, int rx, int ry); inline uint32_t compute_mrf_plus_mul_ssin(int rx, int ry); inline uint32_t compute_mrb_plus_mul_ssin(int rx, int ry); inline void compute_fmul(int rn, int rx, int ry); - inline void compute_multi_mr_to_reg(int ai, int rk); - inline void compute_multi_reg_to_mr(int ai, int rk); + + // Dual add/subtract inline void compute_dual_add_sub(int ra, int rs, int rx, int ry); + inline void compute_dual_fadd_fsub(int ra, int rs, int rx, int ry); + + // Parallel multiplier and ALU inline void compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, int rxa, int rya); inline void compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, int rxa, int rya); - inline void compute_dual_fadd_fsub(int ra, int rs, int rx, int ry); inline void compute_fmul_fadd(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fsub(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya); @@ -446,8 +456,13 @@ private: inline void compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fmin(int fm, int fxm, int fym, int fa, int fxa, int fya); + + // Parallel multiplier and dual add/subtract inline void compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya); + inline void compute_multi_mr_to_reg(int ai, int rk); + inline void compute_multi_reg_to_mr(int ai, int rk); + // internal compiler state struct compiler_state { diff --git a/src/devices/cpu/sharc/sharcinternal.ipp b/src/devices/cpu/sharc/sharcinternal.ipp index e4ad191122a..8af23d5dfa4 100644 --- a/src/devices/cpu/sharc/sharcinternal.ipp +++ b/src/devices/cpu/sharc/sharcinternal.ipp @@ -9,6 +9,7 @@ // constants for IEEE754 single-precision float format +constexpr uint32_t FLOAT_CANONICAL_NAN = 0xffffffff; constexpr uint32_t FLOAT_INFINITY = 0x7f800000; constexpr uint32_t FLOAT_SIGN_MASK = 0x80000000; constexpr uint32_t FLOAT_EXPONENT_MASK = 0x7f800000; diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index d78f05a27c6..0a2a116a199 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -847,6 +847,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0x26: compute_sub_ci(rn, rx); break; case 0x29: compute_inc(rn, rx); break; case 0x2a: compute_dec(rn, rx); break; + case 0x30: compute_abs(rn, rx); break; case 0x40: compute_and(rn, rx, ry); break; case 0x41: compute_or(rn, rx, ry); break; case 0x42: compute_xor(rn, rx, ry); break; @@ -858,7 +859,8 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0x82: compute_fsub(rn, rx, ry); break; case 0x89: compute_favg(rn, rx, ry); break; case 0x8a: compute_fcomp(rx, ry); break; - case 0x91: compute_fabs_plus(rn, rx, ry); break; + case 0x91: compute_fadd_abs(rn, rx, ry); break; + case 0x92: compute_fsub_abs(rn, rx, ry); break; case 0xa1: compute_fpass(rn, rx); break; case 0xa2: compute_fneg(rn, rx); break; case 0xb0: compute_fabs(rn, rx); break; From c1cc40b4e6c7e0083c580b39d17959dc0bea78e3 Mon Sep 17 00:00:00 2001 From: angelosa Date: Sun, 8 Mar 2026 18:15:20 +0100 Subject: [PATCH 203/351] video/pc_vga_sis.cpp: implement video overlay playback --- src/devices/bus/pci/sis6326.cpp | 11 +- src/devices/video/pc_vga_sis.cpp | 409 ++++++++++++++++++++++++++++++- src/devices/video/pc_vga_sis.h | 30 +++ 3 files changed, 445 insertions(+), 5 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index ebe47a1e961..76cc47fdf3d 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -537,8 +537,15 @@ void sis6326_pci_device::trigger_2d_command() { const bool major_axis = !!BIT(m_draw_command, 10); const bool last_pixel = !!BIT(m_draw_command, 11); - LOGBLIT("\tLine: major axis %s %d\n", major_axis ? "Y" : "X", !last_pixel); - // ... + const u16 k1_term = (m_mask[0] | (m_mask[1] << 8)) & 0x3fff; + const u16 k2_term = (m_mask[2] | (m_mask[3] << 8)) & 0x3fff; + const u16 error_term = (m_mask[4] | (m_mask[5] << 8)) & 0x3fff; + const u16 line_style = (m_mask[6] | (m_mask[7] << 8)); + LOGBLIT("\tLine: major axis %s last pixel %d\n", major_axis ? "Y" : "X", !last_pixel); + LOGBLIT("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); + LOGBLIT("\tMajor Axial Pixel Count %d K1 %d K2 %d error %d style %04x\n", m_rect_width, k1_term, k2_term, error_term, line_style); + LOGBLIT("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); + break; } } diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index ec6b7f89e15..be979909617 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -36,13 +36,16 @@ TODO (sis630): #include "screen.h" #define LOG_SEQ (1U << 1) // extended sequencer register descriptions +#define LOG_CRTC (1U << 2) // extended CRTC registers (overlay) #define LOG_LOCKED (1U << 4) // log lock/unlock sequences -#define VERBOSE (LOG_GENERAL) +#define VERBOSE (LOG_GENERAL | LOG_CRTC) //#define LOG_OUTPUT_FUNC osd_printf_info #define LOGSEQ(...) LOGMASKED(LOG_SEQ, __VA_ARGS__) +#define LOGCRTC(...) LOGMASKED(LOG_CRTC, __VA_ARGS__) + #define LOGLOCKED(...) LOGMASKED(LOG_LOCKED, __VA_ARGS__) #include "logmacro.h" @@ -94,6 +97,10 @@ void sis6326_vga_device::device_start() // Avoid an infinite loop when displaying. 0 is not possible anyway. vga.crtc.maximum_scan_line = 1; + screen().register_screen_bitmap(m_bitmap); + // VCD resolution, DVD tbd + m_overlay_bitmap = std::make_unique(352, 240); + // copy over interfaces vga.memory = std::make_unique(vga.svga_intf.vram_size); memset(&vga.memory[0], 0, vga.svga_intf.vram_size); @@ -143,6 +150,32 @@ void sis6326_vga_device::device_start() save_item(STRUCT_MEMBER(m_cursor, pattern_select)); save_item(STRUCT_MEMBER(m_cursor, side_pattern_enable)); + save_item(STRUCT_MEMBER(m_overlay, h_display_start)); + save_item(STRUCT_MEMBER(m_overlay, h_display_end)); + save_item(STRUCT_MEMBER(m_overlay, v_display_start)); + save_item(STRUCT_MEMBER(m_overlay, v_display_end)); + save_item(STRUCT_MEMBER(m_overlay, capture_fb_addr)); + save_item(STRUCT_MEMBER(m_overlay, display_fb_addr)); + + save_item(STRUCT_MEMBER(m_overlay, fb_offset)); + save_item(STRUCT_MEMBER(m_overlay, display_fb_end)); + save_item(STRUCT_MEMBER(m_overlay, capture_threshold)); + save_item(STRUCT_MEMBER(m_overlay, h_down_scaling)); + save_item(STRUCT_MEMBER(m_overlay, v_down_scaling)); + save_item(STRUCT_MEMBER(m_overlay, h_up_scaling)); + save_item(STRUCT_MEMBER(m_overlay, h_up_interpolation_factor)); + save_item(STRUCT_MEMBER(m_overlay, v_up_scaling)); + save_item(STRUCT_MEMBER(m_overlay, fb_format)); + save_item(STRUCT_MEMBER(m_overlay, h_scaling_factor_int)); + save_item(STRUCT_MEMBER(m_overlay, control_0)); + save_item(STRUCT_MEMBER(m_overlay, capture_enable)); + save_item(STRUCT_MEMBER(m_overlay, playback_enable)); + save_item(STRUCT_MEMBER(m_overlay, video_only)); + save_item(STRUCT_MEMBER(m_overlay, capture_interlace)); + save_item(STRUCT_MEMBER(m_overlay, yuv_select)); + save_item(STRUCT_MEMBER(m_overlay, field_polarity)); + save_item(STRUCT_MEMBER(m_overlay, color_key)); + save_item(STRUCT_MEMBER(m_tv, pycin)); save_item(STRUCT_MEMBER(m_tv, enyf)); save_item(STRUCT_MEMBER(m_tv, encf)); @@ -174,6 +207,10 @@ void sis6326_vga_device::device_reset() // On win98se this will map at bottom of VRAM i.e. at $3f'fc00 on 4MiB cards m_cursor.address_base = 0x03'fc00; + // same deal for overlay, just knock off enable bits + m_overlay.control_0 = 0; + m_overlay.capture_enable = m_overlay.playback_enable = false; + m_turbo_queue_address = 0; m_mpeg_turbo_queue_address = 0; m_linear_address[0] = 0; @@ -274,7 +311,309 @@ void sis6326_vga_device::crtc_map(address_map &map) LOGLOCKED("CR80: Unlock register write %02x (%s)\n", data, m_crtc_unlock_reg ? "unlocked" : "locked"); }) ); - // ... + map(0x81, 0x81).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.h_display_start & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR80: H Display Start Low %02x\n", data); + m_overlay.h_display_start &= ~0xff; + m_overlay.h_display_start |= data; + }) + ); + map(0x82, 0x82).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.h_display_end & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR81: H Display End Low %02x\n", data); + m_overlay.h_display_end &= ~0xff; + m_overlay.h_display_end |= data; + }) + ); + map(0x83, 0x83).lrw8( + NAME([this] (offs_t offset) { + return (((m_overlay.h_display_end >> 8) & 7) << 4) + | ((m_overlay.h_display_start >> 8) & 7); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR83: H Display Overflow %02x\n", data); + m_overlay.h_display_start &= 0xff; + m_overlay.h_display_start |= (data & 0x7) << 8; + + m_overlay.h_display_end &= 0xff; + m_overlay.h_display_end |= (data & 0x70) << 4; + }) + ); + map(0x84, 0x84).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.v_display_start & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR84: V Display Start Low %02x\n", data); + m_overlay.v_display_start &= ~0xff; + m_overlay.v_display_start |= data; + }) + ); + map(0x85, 0x85).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.v_display_end & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR85: V Display End Low %02x\n", data); + m_overlay.v_display_end &= ~0xff; + m_overlay.v_display_end |= data; + }) + ); + map(0x86, 0x86).lrw8( + NAME([this] (offs_t offset) { + return (((m_overlay.v_display_end >> 8) & 7) << 4) + | ((m_overlay.v_display_start >> 8) & 7); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR86: V Display Overflow %02x\n", data); + m_overlay.v_display_start &= 0xff; + m_overlay.v_display_start |= (data & 0x7) << 8; + + m_overlay.v_display_end &= 0xff; + m_overlay.v_display_end |= (data & 0x70) << (8 - 4); + }) + ); + map(0x87, 0x87).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.capture_fb_addr & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR87: Video Capture FB Starting Address Low %02x\n", data); + m_overlay.capture_fb_addr &= 0x0fff00; + m_overlay.capture_fb_addr |= data & 0xff; + }) + ); + map(0x88, 0x88).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.capture_fb_addr >> 8) & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR88: Video Capture FB Starting Address Middle %02x\n", data); + m_overlay.capture_fb_addr &= 0x0f00ff; + m_overlay.capture_fb_addr |= data << 8; + }) + ); + map(0x89, 0x89).lrw8( + NAME([this] (offs_t offset) { + return ((m_overlay.capture_fb_addr >> 16) & 0xf) + | (((m_overlay.display_fb_addr >> 16) & 0xf) << 4); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR89: Video FB Overflow %02x\n", data); + m_overlay.capture_fb_addr &= 0x00ffff; + m_overlay.capture_fb_addr |= (data & 0xf) << 16; + m_overlay.display_fb_addr &= 0x00ffff; + m_overlay.display_fb_addr |= (data & 0xf0) << (16 - 4); + LOG("\tCapture FB addr %06x Display FB addr %06x\n" + , m_overlay.capture_fb_addr + , m_overlay.display_fb_addr + ); + }) + ); + map(0x8a, 0x8a).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.display_fb_addr & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR8A: Video Display FB Starting Address Low %02x\n", data); + m_overlay.display_fb_addr &= 0x0fff00; + m_overlay.display_fb_addr |= data & 0xff; + }) + ); + map(0x8b, 0x8b).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.display_fb_addr >> 8) & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR88: Video Display FB Starting Address Middle %02x\n", data); + m_overlay.display_fb_addr &= 0x0f00ff; + m_overlay.display_fb_addr |= data << 8; + }) + ); + map(0x8c, 0x8c).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.fb_offset & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR8B: FB Offset Low %02x\n", data); + m_overlay.fb_offset &= 0x0f00; + m_overlay.fb_offset |= data & 0xff; + }) + ); + map(0x8d, 0x8d).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.display_fb_end; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR8D: Video Display FB End Low %02x (%06x)\n", data, data * 1024); + m_overlay.display_fb_end = data; + }) + ); + map(0x8e, 0x8e).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.fb_offset >> 8) & 0x0f; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR8E: FB Offset High %02x\n", data); + m_overlay.fb_offset &= 0x00ff; + m_overlay.fb_offset |= (data & 0x0f) << 8; + }) + ); + map(0x8f, 0x8f).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.capture_threshold; + }), + NAME([this] (offs_t offset, u8 data) { + // TODO: low bits 2-0, high 6-4 + LOG("CR8F: Capture Threshold %02x\n", data); + m_overlay.capture_threshold = data & 0x77; + }) + ); + map(0x90, 0x90).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.h_down_scaling; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR90: H Down Scaling Factor %02x\n", data); + m_overlay.h_down_scaling = data & 0x3f; + }) + ); + map(0x91, 0x91).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.v_down_scaling; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR90: V Down Scaling Factor %02x\n", data); + m_overlay.v_down_scaling = data & 0x3f; + }) + ); + map(0x92, 0x92).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.h_up_scaling & 0x3f) | (m_overlay.h_up_interpolation_factor << 6); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR92: H Up Scaling Factor %02x\n", data); + m_overlay.h_up_scaling = data & 0x3f; + m_overlay.h_up_interpolation_factor = data >> 6; + }) + ); + map(0x93, 0x93).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.v_up_scaling & 0x3f) | (m_overlay.fb_format); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR93: V Up Scaling Factor %02x\n", data); + m_overlay.v_up_scaling = data & 0x3f; + m_overlay.fb_format = data >> 6; + }) + ); + map(0x94, 0x94).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.h_scaling_factor_int; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR94: H Scaling Factor Integer %02x\n", data); + m_overlay.h_scaling_factor_int = data; + }) + ); + map(0x95, 0x95).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.color_key & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR95: Blue Key Low %02x -> %06x\n", data, m_overlay.color_key); + m_overlay.color_key &= 0xffff00; + m_overlay.color_key |= data & 0xff; + }) + ); + map(0x96, 0x96).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.color_key >> 8) & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR96: Green Key Low %02x -> %06x\n", data, m_overlay.color_key); + m_overlay.color_key &= 0xff00ff; + m_overlay.color_key |= data << 8; + }) + ); + map(0x97, 0x97).lrw8( + NAME([this] (offs_t offset) { + return (m_overlay.color_key >> 16) & 0xff; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR97: Red Key Low %02x -> %06x\n", data, m_overlay.color_key); + m_overlay.color_key &= 0x00ffff; + m_overlay.color_key |= data << 16; + }) + ); + map(0x98, 0x98).lrw8( + NAME([this] (offs_t offset) { + return m_overlay.control_0; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("CR98: Control Misc. 0 %02x\n", data); + m_overlay.control_0 = data; + m_overlay.capture_enable = !!BIT(data, 0); + m_overlay.playback_enable = !!BIT(data, 1); + LOGCRTC("\tVideo Capture %d Video Playback %d\n" + , m_overlay.capture_enable + , m_overlay.playback_enable + ); + m_overlay.video_only = !!BIT(data, 4); + m_overlay.capture_interlace = !!BIT(data, 5); + m_overlay.yuv_select = !!BIT(data, 6); + m_overlay.field_polarity = !!BIT(data, 7); + LOGCRTC("\tVideo Only Display %d Capture Interlace %d Format %s Field Polarity %s\n" + , m_overlay.video_only + , m_overlay.capture_interlace + , m_overlay.yuv_select ? "YUV" : "RGB" + , m_overlay.field_polarity ? "*Odd/Even" : "Odd/*Even" + ); + }) + ); +// map(0x99, 0x99) Video Control Misc. 1 +// map(0x9a, 0x9a) Video Chroma B/Y Low +// map(0x9b, 0x9b) Video Chroma G/U Low +// map(0x9c, 0x9c) Video Chroma R/V Low + // NOTE: there's no Video Control Misc. 2 +// map(0x9d, 0x9d) Video Control Misc. 3 +// map(0x9e, 0x9e) Video Playback Threshold Low +// map(0x9f, 0x9f) Video Playback Threshold High +// map(0xa0, 0xa0) Line Buffer Size +// map(0xa1, 0xa1) Color Key Blue High +// map(0xa2, 0xa2) Color Key Green High +// map(0xa3, 0xa3) Color Key Red High +// map(0xa4, 0xa4) Video Chroma B/Y High +// map(0xa5, 0xa5) Video Chroma G/U High +// map(0xa6, 0xa6) Video Chroma R/V High +// map(0xa7, 0xa7) Graphics Data Alpha +// map(0xa8, 0xa8) Video Data Alpha +// map(0xa9, 0xa9) Key Overlay Op Mode +// map(0xaa, 0xaa) Video Capture Horizontal Start +// map(0xab, 0xab) Video Capture Horizontal End +// map(0xac, 0xac) Video Capture Vertical Start +// map(0xad, 0xad) Video Capture Vertical End +// map(0xae, 0xae) Video Capture Horizontal Overflow +// map(0xaf, 0xaf) Video Capture Vertical Overflow (+ Input Delay Compensation) +// map(0xb0, 0xb1) System Memory Video FB Setting 1/2 () +// map(0xb2, 0xb2) System Memory Video FB Setting 3 and Video Control +// map(0xb3, 0xb3) Contrast Enhancement Mean Value Sampling Rate Factor +// map(0xb4, 0xb4) Brightness +// map(0xb5, 0xb5) Contrast Enhancement Control +// map(0xb6, 0xb6) Video Control Misc. 4 +// map(0xb7, 0xb7) Video U Plane Starting Address Low +// map(0xb8, 0xb8) Video U Plane Starting Address Middle +// map(0xb9, 0xb9) Video UV Plane Starting Address High +// map(0xba, 0xba) Video V Plane Starting Address Low +// map(0xbb, 0xbb) Video V Plane Starting Address Middle +// map(0xbc, 0xbc) Video UV Plane Offset Low +// map(0xbd, 0xbd) Video UV Plane Offset High map(0xe0, 0xe0).lrw8( NAME([this] (offs_t offset) -> u8 { @@ -1164,9 +1503,73 @@ void sis6326_vga_device::cursor_mmio_w(offs_t offset, u16 data, u16 mem_mask) } } +u32 sis6326_vga_device::yuvtorgb32(u8 y, u8 u, u8 v) +{ + const double bf = y + (1.772 * (u - 128)); + const double gf = y - (0.334 * (u - 128)) - (0.714 * (v - 128)); + const double rf = y + (1.402 * (v - 128)); + + const u8 r = u8(std::clamp(rf, 0.0, 255.0)); + const u8 g = u8(std::clamp(gf, 0.0, 255.0)); + const u8 b = u8(std::clamp(bf, 0.0, 255.0)); + + return (r << 16) | (g << 8) | b; +} + +void sis6326_vga_device::draw_overlay(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ +// popmessage("(H %d %d V %d %d) %08x %d %06x" +// , m_overlay.h_display_start, m_overlay.h_display_end +// , m_overlay.v_display_start, m_overlay.v_display_end +// , m_overlay.display_fb_addr +// , m_overlay.fb_offset +// , m_overlay.color_key +// ); + + for (int y = 0; y < 240; y++) + { + const u32 base_addr = (m_overlay.display_fb_addr << 2) + ((y * m_overlay.fb_offset) << 2); + for (int x = 0; x < 176; x++) + { + // YUYV 4:2:2 format (mode 2, as used by SiS MMPlayer and mplayer2 with VCDs) + // TODO: any other format, including pure RGB555/565 + u8 const y1 = vga.memory[(base_addr + x * 4) + 0]; + u8 const u = vga.memory[(base_addr + x * 4) + 1]; + u8 const y2 = vga.memory[(base_addr + x * 4) + 2]; + u8 const v = vga.memory[(base_addr + x * 4) + 3]; + + bitmap.pix(y, x * 2 + 0) = yuvtorgb32(y1, u, v); + bitmap.pix(y, x * 2 + 1) = yuvtorgb32(y2, u, v); + } + } +} + uint32_t sis6326_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - svga_device::screen_update(screen, bitmap, cliprect); + if (m_overlay.playback_enable) + { + draw_overlay(screen, *m_overlay_bitmap, cliprect); + + // punch the overlay around the color key + // TODO: color key changes in non-8bpp modes, can also blend thru Key op + bitmap.fill(rgb_t::black(), cliprect); + + // naive upscaling implementation with no real dithering for now, + // more or less enough for 640x480 full screen + // (the actual dithering implementation is unknown at current time, also origin may follow suit) + // - documentation claims 64/value, mplayer2 sets 31, 31 on zoom 200% + const u32 pixel_size = m_overlay.h_up_scaling == 0 ? 0x10000 : 0x10000 - ((63 - m_overlay.h_up_scaling) * 0x400); + const u32 line_size = m_overlay.v_up_scaling == 0 ? 0x10000 : 0x10000 - ((63 - m_overlay.v_up_scaling) * 0x400); + copyrozbitmap(bitmap, cliprect, *m_overlay_bitmap, + (-(m_overlay.h_display_start) << 16), (-(m_overlay.v_display_start) << 16), + pixel_size, 0, 0, line_size, + false + ); + svga_device::screen_update(screen, m_bitmap, cliprect); + copybitmap_trans(bitmap, m_bitmap, 0, 0, 0, 0, cliprect, pen(m_overlay.color_key & 0xff)); + } + else + svga_device::screen_update(screen, bitmap, cliprect); // HW cursor if (BIT(m_ramdac_mode, 6)) diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h index 701ca7dcf72..6aa64095a1f 100644 --- a/src/devices/video/pc_vga_sis.h +++ b/src/devices/video/pc_vga_sis.h @@ -123,6 +123,31 @@ protected: bool m_seq_unlock_reg = false; u8 m_linear_address[2]; + struct { + u16 h_display_start, h_display_end; + u16 v_display_start, v_display_end; + u32 capture_fb_addr; + u32 display_fb_addr; + + u16 fb_offset; + u8 display_fb_end; + u8 capture_threshold; + u8 h_down_scaling; + u8 v_down_scaling; + u8 h_up_scaling, h_up_interpolation_factor; + u8 v_up_scaling, fb_format; + u8 h_scaling_factor_int; + u32 color_key; + + u8 control_0; + bool capture_enable; + bool playback_enable; + bool video_only; + bool capture_interlace; + bool yuv_select; + bool field_polarity; + } m_overlay; + u8 m_tvout_index; struct { u8 control; @@ -137,6 +162,11 @@ protected: //virtual bool get_interlace_mode() override { return BIT(m_ramdac_mode, 5); } virtual u16 line_compare_mask() override; + + bitmap_rgb32 m_bitmap; + std::unique_ptr m_overlay_bitmap; + void draw_overlay(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + u32 yuvtorgb32(u8 y, u8 u, u8 v); }; class sis630_vga_device : public sis6326_vga_device From c00d6670e53d0947312a44aa242f24483a026850 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 9 Mar 2026 05:04:32 +1100 Subject: [PATCH 204/351] sega/segaybd.cpp: Added a Japanese version of Power Drift. New working clones ------------------ Power Drift (Japan, Rev A) [leopold, Apocalypse] --- src/mame/mame.lst | 1 + src/mame/sega/segaybd.cpp | 90 ++++++++++++++++++++++++++++++++++++++- 2 files changed, 90 insertions(+), 1 deletion(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e205729d836..516c76e1359 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -42283,6 +42283,7 @@ pdrift pdrifta pdrifte pdriftj +pdriftja pdriftjb pdriftl rchase diff --git a/src/mame/sega/segaybd.cpp b/src/mame/sega/segaybd.cpp index 88a7790e1ef..26f9e520c5d 100644 --- a/src/mame/sega/segaybd.cpp +++ b/src/mame/sega/segaybd.cpp @@ -2935,6 +2935,93 @@ ROM_START( pdriftjb ) ROM_LOAD( "epr-11898.ic4", 0x000000, 0x20000, CRC(5d19d767) SHA1(d335cd3ef57c75e388df04b04fc3e2881a3902cf) ) ROM_END +//************************************************************************************************************************* +// Power Drift (Japan, Rev A), Sega Y-board +// CPU: 68000 (317-????) +// CPU BD POWER DRIFT 837-6695-08 (or 837-6695-09) +// VIDEO BD POWER DRIFT 837-6696-01 (or 837-6696-02) +// GAME BD 834-6697-02 POWER DRIFT +// +ROM_START( pdriftja ) + ROM_REGION( 0x080000, "maincpu", 0 ) // M + ROM_LOAD16_BYTE( "epr-11746.25", 0x000000, 0x20000, CRC(d8c4b0ef) SHA1(d994a9a8dc49e3f27d722ce741f7c8d852f9c3f6) ) + ROM_LOAD16_BYTE( "epr-11745.24", 0x000001, 0x20000, CRC(100bce7b) SHA1(973b283aebbf3042f19a7789fa6e826f993c6fef) ) + ROM_LOAD16_BYTE( "epr-11748.27", 0x040000, 0x20000, CRC(82a76cab) SHA1(f8d3fe059e18896cd0e64711f1a3ee8b6372b4e0) ) + ROM_LOAD16_BYTE( "epr-11747.26", 0x040001, 0x20000, CRC(9796ece5) SHA1(f84f5689c2edc0853ff173ce20f93f89758b2f31) ) + + ROM_REGION( 0x040000, "subx", 0 ) // X + ROM_LOAD16_BYTE( "epr-11752.81", 0x000000, 0x20000, CRC(b6bb8111) SHA1(475ce4e3d92747a9012a0ab03838ece61f6d33e0) ) + ROM_LOAD16_BYTE( "epr-11751.80", 0x000001, 0x20000, CRC(7f0d0311) SHA1(7917be201ff44c6b895fc8e9e296e8b1ecf8d639) ) + + ROM_REGION( 0x040000, "suby", 0 ) // Y + ROM_LOAD16_BYTE( "epr-11750a.54", 0x000000, 0x20000, CRC(46e649f1) SHA1(1a298168e510618cc3300435f6d3adb403aa6158) ) + ROM_LOAD16_BYTE( "epr-11749a.53", 0x000001, 0x20000, CRC(d3882b03) SHA1(e857cdbde1ca0c5b8c798044115fc6ff88997e93) ) + + ROM_REGION( 0x08000, "drive_board", 0 ) + ROM_LOAD( "epr-11485.ic27", 0x00000, 0x08000, CRC(069b4201) SHA1(7a9a87aef17cb65bc5b03ca9dea4d2d5cdda228a) ) // handwritten label, not confirmed it is actually epr-11485 but the real board works correctly + + ROM_REGION16_BE( 0x080000, "bsprites", 0 ) + ROM_LOAD16_BYTE( "epr-11789.16", 0x000000, 0x20000, CRC(b86f8d2b) SHA1(a053f2021841fd0ef89fd3f28050a698b36c435e) ) + ROM_LOAD16_BYTE( "epr-11791.14", 0x000001, 0x20000, CRC(36b2910a) SHA1(9948b91837f944a7a606542fa685525e74bbe398) ) + ROM_LOAD16_BYTE( "epr-11790.17", 0x040000, 0x20000, CRC(2a564e66) SHA1(5f30fc15bfd017d75cfffe1e9e62ed0bcf32a98e) ) + ROM_LOAD16_BYTE( "epr-11792.15", 0x040001, 0x20000, CRC(c85caf6e) SHA1(2411ea99ec7f6e2b0b4f219e86ff2172539ad2c4) ) + + ROM_REGION64_BE( 0x400000, "ysprites", 0) + ROM_LOAD64_BYTE( "epr-11757.67", 0x000000, 0x20000, CRC(e46dc478) SHA1(baf79e230aef3d63fb50373b2b1626f7c56ee94f) ) + ROM_LOAD64_BYTE( "epr-11758.75", 0x000001, 0x20000, CRC(5b435c87) SHA1(6b42b08e73957c36cd8faa896ca14461d00afd29) ) + ROM_LOAD64_BYTE( "epr-11773.63", 0x000002, 0x20000, CRC(1b5d5758) SHA1(54f58a274740a0566e0553d145c0c284ffd1d36b) ) + ROM_LOAD64_BYTE( "epr-11774.71", 0x000003, 0x20000, CRC(2ca0c170) SHA1(7de74c045bf084659ba70da9458d720125ff25ae) ) + ROM_LOAD64_BYTE( "epr-11759.86", 0x000004, 0x20000, CRC(ac8111f6) SHA1(6412716dc97ae697b438d9c9cd554d1087416bc2) ) + ROM_LOAD64_BYTE( "epr-11760.114", 0x000005, 0x20000, CRC(91282af9) SHA1(fddee7982949b7da724c7830e7bd139aeb84672d) ) + ROM_LOAD64_BYTE( "epr-11775.82", 0x000006, 0x20000, CRC(48225793) SHA1(ee003c2ea24c14e0968da94bac139735660932fe) ) + ROM_LOAD64_BYTE( "epr-11776.110", 0x000007, 0x20000, CRC(78c46198) SHA1(d299e631843da47cb7a46103d52a3dabfab71746) ) + + ROM_LOAD64_BYTE( "epr-11761.66", 0x100000, 0x20000, CRC(baa5d065) SHA1(56dc71814e3f0f327781b0c1587038351c60f7b7) ) + ROM_LOAD64_BYTE( "epr-11762.74", 0x100001, 0x20000, CRC(1d1af7a5) SHA1(86c02565b5aca201588c98678fb0c54faa8d4d6b) ) + ROM_LOAD64_BYTE( "epr-11777.62", 0x100002, 0x20000, CRC(9662dd32) SHA1(454ec914b6c936f692bf90d2232c8169acec470a) ) + ROM_LOAD64_BYTE( "epr-11778.70", 0x100003, 0x20000, CRC(2dfb7494) SHA1(4b9f1609e425c5e634e95dbc2d0ca820dd9212bc) ) + ROM_LOAD64_BYTE( "epr-11763.85", 0x100004, 0x20000, CRC(1ee23407) SHA1(776c868e0e4e601fd6d0a83561b064b4be0560e2) ) + ROM_LOAD64_BYTE( "epr-11764.113", 0x100005, 0x20000, CRC(e859305e) SHA1(aafcc3209a4fb6e0e8169ae6cce386b370b824f7) ) + ROM_LOAD64_BYTE( "epr-11779.81", 0x100006, 0x20000, CRC(a49cd793) SHA1(efe77949be39a2ff88b50bfb2b4664b9267d9a09) ) + ROM_LOAD64_BYTE( "epr-11780.109", 0x100007, 0x20000, CRC(d514ed81) SHA1(fbac3ad085363972a79e77aebb7fdae2200e7cda) ) + + ROM_LOAD64_BYTE( "epr-11765.65", 0x200000, 0x20000, CRC(649e2dff) SHA1(a6c61b71d08b31a0ca175ab0404e2eaf1d09ccc2) ) + ROM_LOAD64_BYTE( "epr-11766.73", 0x200001, 0x20000, CRC(d92fb7fc) SHA1(2f5c2d88ae0766351b9efe8ffcbebc88fc3a6c59) ) + ROM_LOAD64_BYTE( "epr-11781.61", 0x200002, 0x20000, CRC(9692d4cd) SHA1(967351ba2c781ca865e3c1ee9eeef1aad2247c27) ) + ROM_LOAD64_BYTE( "epr-11782.69", 0x200003, 0x20000, CRC(c913bb43) SHA1(9bc15a3180cf4c3134bb55e99e6092f0faf95c56) ) + ROM_LOAD64_BYTE( "epr-11767.84", 0x200004, 0x20000, CRC(1f8ad054) SHA1(289f5795116ee29540f28e35c3b4f72adeca7891) ) + ROM_LOAD64_BYTE( "epr-11768.112", 0x200005, 0x20000, CRC(db2c4053) SHA1(a5b6daa6deb7afb0019e289acb81c82d507ec93a) ) + ROM_LOAD64_BYTE( "epr-11783.80", 0x200006, 0x20000, CRC(6d189007) SHA1(dd871ea3166fdcb59d49707d35dde8b6c7fdc76b) ) + ROM_LOAD64_BYTE( "epr-11784.108", 0x200007, 0x20000, CRC(57f5fd64) SHA1(6aff54d3f3f76ce0f1a93485d1a35a3987d456d9) ) + + ROM_LOAD64_BYTE( "epr-11769.64", 0x300000, 0x20000, CRC(28f0ab51) SHA1(d7cb7b83e5d85eb59d34cfd5c0d8e6c7ff81e24c) ) + ROM_LOAD64_BYTE( "epr-11770.72", 0x300001, 0x20000, CRC(d7557ea9) SHA1(62430505d399ee2cc0f94e03144860056345573c) ) + ROM_LOAD64_BYTE( "epr-11785.60", 0x300002, 0x20000, CRC(e6ef32c4) SHA1(869ba3816f5e3125f613f3b284fec74cd19db79e) ) + ROM_LOAD64_BYTE( "epr-11786.68", 0x300003, 0x20000, CRC(2066b49d) SHA1(905ce70c921043d07591422a87fedd6e897ff38e) ) + ROM_LOAD64_BYTE( "epr-11771.83", 0x300004, 0x20000, CRC(67635618) SHA1(f690ace026130ecb95532c92f2ad3741d0d167c1) ) + ROM_LOAD64_BYTE( "epr-11772.111", 0x300005, 0x20000, CRC(0f798d3a) SHA1(71565ce28b93ae50d64af8c965fba6408a07f031) ) + ROM_LOAD64_BYTE( "epr-11787.79", 0x300006, 0x20000, CRC(e631dc12) SHA1(3fd6db2eb297890b35dec566b6a90fc2d96bd085) ) + ROM_LOAD64_BYTE( "epr-11788.107", 0x300007, 0x20000, CRC(8464c66e) SHA1(af93cbcc50acbd929d0298fb9a75da0369e13ff7) ) + + ROM_REGION( 0x10000, "soundcpu", 0 ) // Z80 sound CPU + ROM_LOAD("epr-11753.ic102", 0x000000, 0x10000, CRC(e81f5748) SHA1(dea9425ddc0f9411b1446477b7fdd3c92a1d4742)) + + ROM_REGION( 0x200000, "pcm", ROMREGION_ERASEFF ) // SegaPCM samples + ROM_LOAD("epr-11894.ic107", 0x000000, 0x40000, CRC(b1e573f2) SHA1(e566dc49b8f2002ca8d72a813856a272e0c9a9ac)) + ROM_RELOAD( 0x040000, 0x40000 ) + ROM_LOAD("epr-11893.ic106", 0x080000, 0x40000, CRC(58b40f19) SHA1(20a06928392d0e612a5e764d4eb1492070afe526)) + ROM_RELOAD( 0x0c0000, 0x40000 ) + ROM_LOAD("epr-11892.ic105", 0x100000, 0x40000, CRC(3248a758) SHA1(e6fc3a7b2356ef017f59858f8b37eef5d92f54a2)) + ROM_RELOAD( 0x140000, 0x40000 ) + + ROM_REGION( 0x100000, "user1", 0 ) + // These are mpr-11754.107 split into 4 ROMs. They would be located on a Sega 839-0221 daughter card. + ROM_LOAD( "epr-11895.ic1", 0x000000, 0x20000, CRC(ee99a6fd) SHA1(4444826e751d9186e6d46b081e47cd99ee3cf853) ) + ROM_LOAD( "epr-11896.ic2", 0x000000, 0x20000, CRC(4bebc015) SHA1(307022ea1c1ee87c9ef3782526888c48c3c69fd2) ) + ROM_LOAD( "epr-11897.ic3", 0x000000, 0x20000, CRC(4463cb95) SHA1(e86fd4611cf83fe72d59950a60fc8c3a7381a1c7) ) + ROM_LOAD( "epr-11898.ic4", 0x000000, 0x20000, CRC(5d19d767) SHA1(d335cd3ef57c75e388df04b04fc3e2881a3902cf) ) +ROM_END + //************************************************************************************************************************* // Power Drift (Japan), Sega Y-board Link version // Sega Game ID: 833-6697 @@ -3439,9 +3526,10 @@ GAME( 1990, glocr360j, gloc, yboard, glocr360, segaybd_state, init_r3 GAMEL(1988, pdrift, 0, yboard, pdrift, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (World, Rev A)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) GAMEL(1988, pdrifta, pdrift, yboard, pdrift, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (World)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) -GAMEL(1988, pdrifte, pdrift, yboard, pdrifte, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (World, Earlier)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) +GAMEL(1988, pdrifte, pdrift, yboard, pdrifte, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (World, earlier)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) GAMEL(1988, pdriftj, pdrift, yboard, pdriftj, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (Japan, Rev C)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) GAMEL(1988, pdriftjb, pdrift, yboard, pdriftj, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (Japan, Rev B)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) +GAMEL(1988, pdriftja, pdrift, yboard, pdriftj, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift (Japan, Rev A)", MACHINE_SUPPORTS_SAVE, layout_pdrift ) GAMEL(1988, pdriftl, 0, yboard_link, pdriftl, segaybd_state, init_pdrift, ROT0, "Sega", "Power Drift - Link Version (Japan, Rev A)", MACHINE_SUPPORTS_SAVE | MACHINE_NODEVICE_LAN, layout_pdrift ) From 487d9d9388a37248f82ae36c26b36f8cd14bfb7c Mon Sep 17 00:00:00 2001 From: angelosa Date: Sun, 8 Mar 2026 19:51:39 +0100 Subject: [PATCH 205/351] sega/model3.cpp: dot product for lighting effects can't be negative by definition --- src/devices/video/pc_vga_sis.cpp | 9 +++++---- src/mame/sega/model3_v.cpp | 13 +++---------- 2 files changed, 8 insertions(+), 14 deletions(-) diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index be979909617..868c4cb6c42 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -1531,12 +1531,13 @@ void sis6326_vga_device::draw_overlay(screen_device &screen, bitmap_rgb32 &bitma const u32 base_addr = (m_overlay.display_fb_addr << 2) + ((y * m_overlay.fb_offset) << 2); for (int x = 0; x < 176; x++) { + const u32 pixel_addr = (base_addr + x * 4); // YUYV 4:2:2 format (mode 2, as used by SiS MMPlayer and mplayer2 with VCDs) // TODO: any other format, including pure RGB555/565 - u8 const y1 = vga.memory[(base_addr + x * 4) + 0]; - u8 const u = vga.memory[(base_addr + x * 4) + 1]; - u8 const y2 = vga.memory[(base_addr + x * 4) + 2]; - u8 const v = vga.memory[(base_addr + x * 4) + 3]; + u8 const y1 = vga.memory[pixel_addr + 0]; + u8 const u = vga.memory[pixel_addr + 1]; + u8 const y2 = vga.memory[pixel_addr + 2]; + u8 const v = vga.memory[pixel_addr + 3]; bitmap.pix(y, x * 2 + 0) = yuvtorgb32(y1, u, v); bitmap.pix(y, x * 2 + 1) = yuvtorgb32(y2, u, v); diff --git a/src/mame/sega/model3_v.cpp b/src/mame/sega/model3_v.cpp index fb8d0da5a53..f34fef68c4e 100644 --- a/src/mame/sega/model3_v.cpp +++ b/src/mame/sega/model3_v.cpp @@ -1655,18 +1655,11 @@ void model3_state::draw_model(uint32_t addr) { float dot = dot_product3(n, m_parallel_light); - if (header[1] & 0x10) - dot = fabs(dot); + //if (header[1] & 0x10) nope, this is double face select + dot = fabs(dot); intensity = ((dot * m_parallel_light_intensity) + m_ambient_light_intensity) * 255.0f; - if (intensity > 255.0f) - { - intensity = 255.0f; - } - if (intensity < 0.0f) - { - intensity = 0.0f; - } + intensity = std::clamp(intensity, 0.0f, 255.0f); } else { From 6eb9e4ba0daf661a16a193bdfa0aac433d703770 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 9 Mar 2026 06:04:45 +1100 Subject: [PATCH 206/351] cpu/sharc: More ALU refinements for the interpreter: * Set AOS on fixed point dual add/subtract overflow. * Handle corner cases better for floating point MIN, MAX and CLIP. * Cleaned up code for floating point COMP. --- src/devices/cpu/sharc/compute.hxx | 150 +++++++++++++++++------------- 1 file changed, 87 insertions(+), 63 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index f871ac04c81..61954aad446 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -223,9 +223,9 @@ void adsp21062_device::compute_sub_ci(int rn, int rx, int ry) void adsp21062_device::compute_comp(int rx, int ry) { CLEAR_ALU_FLAGS(); - if (REG(rx) == REG(ry) ) + if (REG(rx) == REG(ry)) m_core->astat |= AZ; - if (int32_t(REG(rx)) < int32_t(REG(ry))) + else if (int32_t(REG(rx)) < int32_t(REG(ry))) m_core->astat |= AN; // Update ASTAT compare accumulation register @@ -590,30 +590,29 @@ void adsp21062_device::compute_favg(int rn, int rx, int ry) /* COMP(Fx, Fy) */ void adsp21062_device::compute_fcomp(int rx, int ry) { - uint32_t comp_accum; - CLEAR_ALU_FLAGS(); - // AZ - if (FREG(rx) == FREG(ry)) - m_core->astat |= AZ; - // AN - if (FREG(rx) < FREG(ry)) - m_core->astat |= AN; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + { + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + if (FREG(rx) == FREG(ry)) + m_core->astat |= AZ; + else if (FREG(rx) < FREG(ry)) + m_core->astat |= AN; + } // Update ASTAT compare accumulation register - comp_accum = (m_core->astat >> 24) & 0xff; - comp_accum >>= 1; - if ((m_core->astat & (AZ|AN)) == 0) - { - comp_accum |= 0x80; - } - m_core->astat &= 0xffffff; - m_core->astat |= comp_accum << 24; + // TODO: confirm whether this is set for unordered operands + uint32_t comp_accum = (m_core->astat >> 1) & 0x7f000000; + if ((m_core->astat & (AZ | AN)) == 0) + comp_accum |= 0x80000000; + + m_core->astat &= 0x00ffffff; + m_core->astat |= comp_accum; + m_core->astat |= AF; } @@ -1000,63 +999,84 @@ void adsp21062_device::compute_fcopysign(int rn, int rx, int ry) /* Fn = MIN(Fx, Fy) */ void adsp21062_device::compute_fmin(int rn, int rx, int ry) { - SHARC_REG r_alu; - - r_alu.f = std::min(FREG(rx), FREG(ry)); - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - FREG(rn) = r_alu.f; + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + // TODO: flush denormals to zero, handle negative versus positive zero + r.f = std::min(FREG(rx), FREG(ry)); + + m_core->astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + } + + FREG(rn) = r.f; m_core->astat |= AF; } /* Fn = MAX(Fx, Fy) */ void adsp21062_device::compute_fmax(int rn, int rx, int ry) { - SHARC_REG r_alu; - - r_alu.f = std::max(FREG(rx), FREG(ry)); - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - FREG(rn) = r_alu.f; + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + // TODO: flush denormals to zero, handle negative versus positive zero + r.f = std::max(FREG(rx), FREG(ry)); + + m_core->astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + } + + FREG(rn) = r.f; m_core->astat |= AF; } /* Fn = CLIP Fx BY Fy */ void adsp21062_device::compute_fclip(int rn, int rx, int ry) { - SHARC_REG r_alu; - - const float absry = fabsf(FREG(ry)); - r_alu.f = std::clamp(FREG(rx), -absry, absry); - CLEAR_ALU_FLAGS(); - SET_FLAG_AN(r_alu.r); - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - FREG(rn) = r_alu.f; + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + if (IS_FLOAT_ZERO(REG(rx)) || IS_FLOAT_ZERO(REG(ry)) || IS_FLOAT_DENORMAL(REG(rx)) || IS_FLOAT_DENORMAL(REG(ry))) + { + r.r = REG(rx) & FLOAT_SIGN_MASK; + m_core->astat |= AZ; + } + else + { + SHARC_REG absry, negabsry; + absry.r = REG(ry) & ~FLOAT_SIGN_MASK; + negabsry.r = REG(ry) | FLOAT_SIGN_MASK; + r.f = std::clamp(FREG(rx), negabsry.f, absry.f); + m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } + + FREG(rn) = r.f; m_core->astat |= AF; } @@ -1174,7 +1194,11 @@ void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry) bool const av_sub = (REG(rx) ^ REG(ry)) & (REG(rx) ^ r_sub) & 0x80000000; CLEAR_ALU_FLAGS(); - m_core->astat |= (av_add || av_sub) ? AV : 0; + if (av_add || av_sub) + { + m_core->astat |= AV; + m_core->stky |= AOS; + } m_core->astat |= ((r_add < uint32_t(REG(rx))) || (r_sub <= uint32_t(REG(rx)))) ? AC : 0; if (m_core->mode1 & MODE1_ALUSAT) From d0656643810c632a1b72e4230ba15a5afa839212 Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 9 Mar 2026 00:15:32 +0100 Subject: [PATCH 207/351] sega/model3.cpp: rectify previous commit over gw-matthew suggestion --- src/mame/sega/model3.cpp | 5 +++-- src/mame/sega/model3_v.cpp | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mame/sega/model3.cpp b/src/mame/sega/model3.cpp index 83fde0ceb6a..71fa952b73a 100644 --- a/src/mame/sega/model3.cpp +++ b/src/mame/sega/model3.cpp @@ -15,7 +15,8 @@ Step 2.1: 166 MHz PPC, same 3D engine as 2.0, differences unknown Game status: - vf3/vf3a/vf3tb - crashes + vf3/vf3a/vf3tb - crashes sometimes, performance dips at startup (illegal polygons filling the + pipeline?), runs too slow during gameplay getbassur - works basssdx/getbass/getbassdx - I/O board error (?) @@ -32,7 +33,7 @@ skichamp - boots after skipping the drive board errors, massive slowdowns srally2 - works, uses JTAG patch, draws no polygon if coin is inserted at Sega logo srally2p/srally2pa/sraly2dx - needs specific JTAG patch / bypass - von2/von2a/von2o/von254g - works + von2/von2a/von2o/von254g - works, corrupted robot textures (mip mapping?) fvipers2 - crashes after player selection vs298 - hangs with an onscreen "unknown error code" during attract, polygon covers most of the 3d. vs299/vs2v991 - works, polygon covers most of the 3d. diff --git a/src/mame/sega/model3_v.cpp b/src/mame/sega/model3_v.cpp index f34fef68c4e..e823c381c2e 100644 --- a/src/mame/sega/model3_v.cpp +++ b/src/mame/sega/model3_v.cpp @@ -1655,8 +1655,9 @@ void model3_state::draw_model(uint32_t addr) { float dot = dot_product3(n, m_parallel_light); - //if (header[1] & 0x10) nope, this is double face select - dot = fabs(dot); + // apply sun clamp + // TODO: lamachin and daytona2 disables this thru JTAG + dot = std::max(dot, 0.0f); intensity = ((dot * m_parallel_light_intensity) + m_ambient_light_intensity) * 255.0f; intensity = std::clamp(intensity, 0.0f, 255.0f); From 515a134ed06b7d573cf10a14bac04270f27f0a97 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 8 Mar 2026 20:23:29 -0400 Subject: [PATCH 208/351] Add support for cassette images in AIFF format [AJR] --- scripts/src/formats.lua | 2 + src/lib/formats/aiffile.cpp | 173 ++++++++++++++++++++++++++++++++++++ src/lib/formats/aiffile.h | 11 +++ src/lib/formats/cassimg.h | 4 +- 4 files changed, 189 insertions(+), 1 deletion(-) create mode 100644 src/lib/formats/aiffile.cpp create mode 100644 src/lib/formats/aiffile.h diff --git a/scripts/src/formats.lua b/scripts/src/formats.lua index 611f9fcfd3b..cd7820d3c72 100644 --- a/scripts/src/formats.lua +++ b/scripts/src/formats.lua @@ -36,6 +36,8 @@ project "formats" MAME_DIR .. "src/lib/formats/imageutl.cpp", MAME_DIR .. "src/lib/formats/imageutl.h", + MAME_DIR .. "src/lib/formats/aiffile.cpp", + MAME_DIR .. "src/lib/formats/aiffile.h", MAME_DIR .. "src/lib/formats/cassimg.cpp", MAME_DIR .. "src/lib/formats/cassimg.h", MAME_DIR .. "src/lib/formats/flacfile.cpp", diff --git a/src/lib/formats/aiffile.cpp b/src/lib/formats/aiffile.cpp new file mode 100644 index 00000000000..4d1a9463c7f --- /dev/null +++ b/src/lib/formats/aiffile.cpp @@ -0,0 +1,173 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************* + + aiffile.cpp + + Format code for cassette images in Apple Computer's AIFF + (Audio Interchange Format File) format. + +*********************************************************************/ + +#include "aiffile.h" + +#include "ioprocs.h" +#include "multibyte.h" + +#include "eminline.h" + +#include + + +namespace { + +constexpr unsigned COMM_OFFSET = 0x0c; +constexpr unsigned SSND_OFFSET = 0x26; +constexpr unsigned SOUND_DATA_OFFSET = 0x36; + +constexpr int MAX_CHANNELS = 8; + + +int encode_bits_per_sample(std::uint16_t bits_per_sample) +{ + if (bits_per_sample == 32) + return cassette_image::WAVEFORM_32BITBE; + else if (bits_per_sample == 16) + return cassette_image::WAVEFORM_16BITBE; + else + return cassette_image::WAVEFORM_8BIT; +} + + +cassette_image::error aiffile_identify(cassette_image *cassette, cassette_image::Options *opts) +{ + std::uint64_t length; + if (cassette->get_raw_cassette_image()->length(length)) + return cassette_image::error::INVALID_IMAGE; // FIXME: return the actual error here + + const auto [err, chunk_header, header_length] = util::read_at(*cassette->get_raw_cassette_image(), 0, SOUND_DATA_OFFSET); + if (err || header_length != SOUND_DATA_OFFSET) + return cassette_image::error::INVALID_IMAGE; // FIXME: return the actual error here + + // Check for the presence of IDs at the usual offsets + if (std::memcmp(&chunk_header[0], "FORM", 4) || + std::memcmp(&chunk_header[8], "AIFF", 4) || + std::memcmp(&chunk_header[COMM_OFFSET], "COMM", 4) || + std::memcmp(&chunk_header[SSND_OFFSET], "SSND", 4)) + return cassette_image::error::INVALID_IMAGE; + + // Verify the chunk lengths + if (get_u32be(&chunk_header[4]) != length - 8 || + get_u32be(&chunk_header[COMM_OFFSET + 4]) != SSND_OFFSET - 8 - COMM_OFFSET || + get_u32be(&chunk_header[SSND_OFFSET + 4]) != length - 8 - SSND_OFFSET) + return cassette_image::error::INVALID_IMAGE; + + // Prepare to convert 80-bit extended floating point the cheap and simple way + const std::uint16_t sample_rate_exp = get_u16be(&chunk_header[COMM_OFFSET + 16]); + if (sample_rate_exp < 0x4000 || sample_rate_exp > 0x401e) + return cassette_image::error::UNSUPPORTED; + + opts->channels = get_u16be(&chunk_header[COMM_OFFSET + 8]); + opts->bits_per_sample = get_u16be(&chunk_header[COMM_OFFSET + 14]); + opts->sample_frequency = get_u32be(&chunk_header[COMM_OFFSET + 18]) >> (0x401e - sample_rate_exp); + + const std::uint32_t sample_frames = get_u32be(&chunk_header[COMM_OFFSET + 10]); + const std::uint32_t offset = get_u32be(&chunk_header[SSND_OFFSET + 8]); + const std::uint32_t block_size = get_u32be(&chunk_header[SSND_OFFSET + 12]); + if (opts->channels > MAX_CHANNELS) + return cassette_image::error::INVALID_IMAGE; + else if (opts->bits_per_sample != 8 && opts->bits_per_sample != 16 && opts->bits_per_sample != 32) + return cassette_image::error::UNSUPPORTED; + else if (offset != 0 || block_size != 0) + return cassette_image::error::UNSUPPORTED; // we don't support block-aligning here + else if (opts->channels > 0 && opts->sample_frequency > 0 && sample_frames > 0) + return cassette_image::error::SUCCESS; + else + return cassette_image::error::INVALID_IMAGE; +} + + +cassette_image::error aiffile_load(cassette_image *cassette) +{ + const auto [err, comm_info, info_length] = util::read_at(*cassette->get_raw_cassette_image(), COMM_OFFSET + 8, 14); + if (err || info_length != 14) + return cassette_image::error::INVALID_IMAGE; // FIXME: return the actual error here + + const std::uint16_t channels = get_u16be(&comm_info[0]); + const std::uint32_t sample_frames = get_u32be(&comm_info[2]); + const std::uint16_t bits_per_sample = get_u16be(&comm_info[6]); + const std::uint16_t sample_rate_exp = get_u16be(&comm_info[8]); + const std::uint32_t sample_rate = get_u32be(&comm_info[10]) >> (0x401e - sample_rate_exp); + + const cassette_image::error caserr = cassette->read_samples( + channels, + 0.0, + double(sample_frames) / sample_rate, + sample_frames, + SOUND_DATA_OFFSET, + encode_bits_per_sample(bits_per_sample)); + if (caserr != cassette_image::error::SUCCESS) + return caserr; + + return cassette_image::error::SUCCESS; +} + + +cassette_image::error aiffile_save(cassette_image *cassette, const cassette_image::Info *info) +{ + if (info->channels > MAX_CHANNELS || info->sample_frequency == 0) + return cassette_image::error::UNSUPPORTED; + if (info->bits_per_sample != 8 && info->bits_per_sample != 16 && info->bits_per_sample != 32) + return cassette_image::error::UNSUPPORTED; + + uint8_t chunk_header[SOUND_DATA_OFFSET]; + std::memcpy(&chunk_header[0], "FORM", 4); + std::memcpy(&chunk_header[8], "AIFF", 4); + std::memcpy(&chunk_header[COMM_OFFSET], "COMM", 4); + std::memcpy(&chunk_header[SSND_OFFSET], "SSND", 4); + + put_u16be(&chunk_header[COMM_OFFSET + 8], info->channels); + put_u32be(&chunk_header[COMM_OFFSET + 10], info->sample_count); + put_u16be(&chunk_header[COMM_OFFSET + 14], info->bits_per_sample); + + const unsigned bytes_per_sample = info->bits_per_sample / 8; + const std::uint32_t container_length = SOUND_DATA_OFFSET + std::uint64_t(info->sample_count) * info->channels * bytes_per_sample; + put_u32be(&chunk_header[4], container_length - 8); + put_u32be(&chunk_header[COMM_OFFSET + 4], SSND_OFFSET - 8 - COMM_OFFSET); + put_u32be(&chunk_header[SSND_OFFSET + 4], container_length - 8 - SSND_OFFSET); + + const std::uint32_t sample_rate = std::uint32_t(info->sample_frequency); + const std::uint16_t sample_rate_exp = 0x401e - count_leading_zeros_32(sample_rate); + put_u16be(&chunk_header[COMM_OFFSET + 16], sample_rate_exp); + put_u32be(&chunk_header[COMM_OFFSET + 18], sample_rate << (0x401e - sample_rate_exp)); + std::memset(&chunk_header[COMM_OFFSET + 22], 0, 4); + + std::memset(&chunk_header[SSND_OFFSET + 8], 0, 8); + + auto [err, length] = util::write_at(*cassette->get_raw_cassette_image(), 0, &chunk_header[0], SOUND_DATA_OFFSET); + if (err || length != SOUND_DATA_OFFSET) + return cassette_image::error::INTERNAL; // FIXME: return actual error + + const cassette_image::error caserr = cassette->write_samples( + info->channels, + 0.0, + double(info->sample_count) / sample_rate, + info->sample_count, + SOUND_DATA_OFFSET, + encode_bits_per_sample(info->bits_per_sample)); + if (caserr != cassette_image::error::SUCCESS) + return caserr; + + return cassette_image::error::SUCCESS; +} + +} // anonymous namespace + + +const cassette_image::Format cassette_image::aiffile_format = +{ + "aif,aiff", + aiffile_identify, + aiffile_load, + aiffile_save +}; diff --git a/src/lib/formats/aiffile.h b/src/lib/formats/aiffile.h new file mode 100644 index 00000000000..2e710f312cd --- /dev/null +++ b/src/lib/formats/aiffile.h @@ -0,0 +1,11 @@ +// license:BSD-3-Clause +// copyright-holders:AJR + +#ifndef MAME_FORMATS_AIFFILE_H +#define MAME_FORMATS_AIFFILE_H + +#pragma once + +#include "cassimg.h" + +#endif // MAME_FORMATS_AIFFILE_H diff --git a/src/lib/formats/cassimg.h b/src/lib/formats/cassimg.h index 9867ecbdf4a..cb4d73d54d6 100644 --- a/src/lib/formats/cassimg.h +++ b/src/lib/formats/cassimg.h @@ -193,6 +193,7 @@ public: // builtin formats static const Format wavfile_format; static const Format flacfile_format; + static const Format aiffile_format; private: struct manipulation_ranges; @@ -227,7 +228,8 @@ private: const cassette_image::Format *const name[] = \ { \ &cassette_image::wavfile_format, \ - &cassette_image::flacfile_format, + &cassette_image::flacfile_format, \ + &cassette_image::aiffile_format, #define CASSETTE_FORMAT(name) \ &(name), #define CASSETTE_FORMATLIST_END \ From ea70f633ebb98c994fea7b97894ff06470ff8536 Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 8 Mar 2026 21:16:54 -0400 Subject: [PATCH 209/351] formats/wavfile.cpp: Use helper functions from multibyte.h --- src/lib/formats/wavfile.cpp | 77 +++++++++++-------------------------- 1 file changed, 22 insertions(+), 55 deletions(-) diff --git a/src/lib/formats/wavfile.cpp b/src/lib/formats/wavfile.cpp index 6cce494f1c8..71491083e10 100644 --- a/src/lib/formats/wavfile.cpp +++ b/src/lib/formats/wavfile.cpp @@ -10,7 +10,7 @@ #include "wavfile.h" -#include "osdcomm.h" // little_endianize_int16 +#include "multibyte.h" #include #include @@ -25,39 +25,6 @@ static const char data_tag_id[4] = { 'd', 'a', 't', 'a' }; -static uint32_t get_leuint32(const void *ptr) -{ - uint32_t value; - memcpy(&value, ptr, sizeof(value)); - return little_endianize_int32(value); -} - - - -static uint16_t get_leuint16(const void *ptr) -{ - uint16_t value; - memcpy(&value, ptr, sizeof(value)); - return little_endianize_int16(value); -} - - - -static void put_leuint32(void *ptr, uint32_t value) -{ - value = little_endianize_int32(value); - memcpy(ptr, &value, sizeof(value)); -} - - - -static void put_leuint16(void *ptr, uint16_t value) -{ - value = little_endianize_int16(value); - memcpy(ptr, &value, sizeof(value)); -} - - static cassette_image::error wavfile_process(cassette_image *cassette, cassette_image::Options *opts, bool read_waveform) @@ -88,7 +55,7 @@ static cassette_image::error wavfile_process(cassette_image *cassette, cassette_ return cassette_image::error::INVALID_IMAGE; /* read and sanity check size */ - stated_size = get_leuint32(&file_header[4]) + 8; + stated_size = get_u32le(&file_header[4]) + 8; file_size = cassette->image_size(); if (stated_size > file_size) stated_size = (uint32_t) file_size; @@ -96,7 +63,7 @@ static cassette_image::error wavfile_process(cassette_image *cassette, cassette_ while(offset < stated_size) { cassette->image_read(tag_header, offset, sizeof(tag_header)); - tag_size = get_leuint32(&tag_header[4]); + tag_size = get_u32le(&tag_header[4]); offset += sizeof(tag_header); if (!memcmp(tag_header, format_tag_id, 4)) @@ -108,12 +75,12 @@ static cassette_image::error wavfile_process(cassette_image *cassette, cassette_ cassette->image_read(format_tag, offset, sizeof(format_tag)); - format_type = get_leuint16(&format_tag[0]); - opts->channels = get_leuint16(&format_tag[2]); - opts->sample_frequency = get_leuint32(&format_tag[4]); - bytes_per_second = get_leuint32(&format_tag[8]); -// block_align = get_leuint16(&format_tag[12]); - opts->bits_per_sample = get_leuint16(&format_tag[14]); + format_type = get_u16le(&format_tag[0]); + opts->channels = get_u16le(&format_tag[2]); + opts->sample_frequency = get_u32le(&format_tag[4]); + bytes_per_second = get_u32le(&format_tag[8]); +// block_align = get_u16le(&format_tag[12]); + opts->bits_per_sample = get_u16le(&format_tag[14]); if (format_type != WAV_FORMAT_PCM) return cassette_image::error::INVALID_IMAGE; @@ -198,23 +165,23 @@ static cassette_image::error wavfile_save(cassette_image *cassette, const casset block_align = (uint16_t) (bytes_per_sample * info->channels); /* set up header */ - memcpy(&header[0], magic1, 4); - memcpy(&header[8], magic2, 4); - put_leuint32(&header[4], file_size); + memcpy(&header[0], magic1, 4); + memcpy(&header[8], magic2, 4); + put_u32le(&header[4], file_size); /* set up format tag */ - memcpy(&format_tag_header[0], format_tag_id, 4); - put_leuint32(&format_tag_header[4], 16); - put_leuint16(&format_tag_data[0], WAV_FORMAT_PCM); - put_leuint16(&format_tag_data[2], info->channels); - put_leuint32(&format_tag_data[4], info->sample_frequency); - put_leuint32(&format_tag_data[8], bytes_per_second); - put_leuint16(&format_tag_data[12], block_align); - put_leuint16(&format_tag_data[14], bits_per_sample); + memcpy(&format_tag_header[0], format_tag_id, 4); + put_u32le(&format_tag_header[4], 16); + put_u16le(&format_tag_data[0], WAV_FORMAT_PCM); + put_u16le(&format_tag_data[2], info->channels); + put_u32le(&format_tag_data[4], info->sample_frequency); + put_u32le(&format_tag_data[8], bytes_per_second); + put_u16le(&format_tag_data[12], block_align); + put_u16le(&format_tag_data[14], bits_per_sample); /* set up data tag */ - memcpy(&data_tag_header[0], data_tag_id, 4); - put_leuint32(&data_tag_header[4], data_size); + memcpy(&data_tag_header[0], data_tag_id, 4); + put_u32le(&data_tag_header[4], data_size); /* write consolidated header */ cassette->image_write(consolidated_header, 0, sizeof(consolidated_header)); From acc1391dec5a57a733a632625eec86c0d0cc3c8d Mon Sep 17 00:00:00 2001 From: AJR Date: Sun, 8 Mar 2026 22:43:18 -0400 Subject: [PATCH 210/351] bus/a2bus: Add emulation of Micromint Sweet Talker Phonetic Speech Synthesizer Interface --- scripts/src/bus.lua | 2 + src/devices/bus/a2bus/cards.cpp | 4 ++ src/devices/bus/a2bus/sweetalk.cpp | 73 ++++++++++++++++++++++++++++++ src/devices/bus/a2bus/sweetalk.h | 12 +++++ 4 files changed, 91 insertions(+) create mode 100644 src/devices/bus/a2bus/sweetalk.cpp create mode 100644 src/devices/bus/a2bus/sweetalk.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 35f4b431fc8..14e5122e1a8 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -182,6 +182,8 @@ if BUSES["A2BUS"] then MAME_DIR .. "src/devices/bus/a2bus/ssprite.h", MAME_DIR .. "src/devices/bus/a2bus/suprterminal.cpp", MAME_DIR .. "src/devices/bus/a2bus/suprterminal.h", + MAME_DIR .. "src/devices/bus/a2bus/sweetalk.cpp", + MAME_DIR .. "src/devices/bus/a2bus/sweetalk.h", MAME_DIR .. "src/devices/bus/a2bus/timemasterho.cpp", MAME_DIR .. "src/devices/bus/a2bus/timemasterho.h", MAME_DIR .. "src/devices/bus/a2bus/titan3plus2.cpp", diff --git a/src/devices/bus/a2bus/cards.cpp b/src/devices/bus/a2bus/cards.cpp index 673f66e1643..adab8856a85 100644 --- a/src/devices/bus/a2bus/cards.cpp +++ b/src/devices/bus/a2bus/cards.cpp @@ -71,6 +71,7 @@ #include "ssbapple.h" #include "ssprite.h" #include "suprterminal.h" +#include "sweetalk.h" #include "timemasterho.h" #include "titan3plus2.h" #include "transwarp.h" @@ -163,6 +164,7 @@ void apple2_cards(device_slot_interface &device) device.option_add("romcardint", A2BUS_ROMCARDINT); // Apple II ROM Card with Autostart Monitor + Integer BASIC device.option_add("ap2", A2BUS_IBSAP2); // IBS Computertechnik AP 2 Serial Interface device.option_add("sic", A2BUS_SIC); // Apple II Serial Interface Card + device.option_add("sweetalk", A2BUS_SWEETALK); // Micromint Sweet Talker Phonetic Speech Synthesizer Interface } void apple2e_cards(device_slot_interface &device) @@ -251,6 +253,7 @@ void apple2e_cards(device_slot_interface &device) device.option_add("romcardint", A2BUS_ROMCARDINT); // Apple II ROM Card with Autostart Monitor + Integer BASIC device.option_add("ap2", A2BUS_IBSAP2); // IBS Computertechnik AP 2 Serial Interface device.option_add("sic", A2BUS_SIC); // Apple II Serial Interface Card + device.option_add("sweetalk", A2BUS_SWEETALK); // Micromint Sweet Talker Phonetic Speech Synthesizer Interface } void apple2gs_cards(device_slot_interface &device) @@ -327,6 +330,7 @@ void apple2gs_cards(device_slot_interface &device) device.option_add("wicotrackball", A2BUS_WICOTRACKBALL); // Wico Trackball device.option_add("ieee488", A2BUS_IEEE488); // Apple II IEEE-488 Interface Card device.option_add("ap2", A2BUS_IBSAP2); // IBS Computertechnik AP 2 Serial Interface + device.option_add("sweetalk", A2BUS_SWEETALK); // Micromint Sweet Talker Phonetic Speech Synthesizer Interface } void apple3_cards(device_slot_interface &device) diff --git a/src/devices/bus/a2bus/sweetalk.cpp b/src/devices/bus/a2bus/sweetalk.cpp new file mode 100644 index 00000000000..ea9d6f421c5 --- /dev/null +++ b/src/devices/bus/a2bus/sweetalk.cpp @@ -0,0 +1,73 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/********************************************************************* + + Sweet Talker Phonetic Speech Synthesizer Interface + (The Micromint Inc.) + +**********************************************************************/ + +#include "emu.h" +#include "sweetalk.h" + +#include "sound/votrax.h" +#include "speaker.h" + +namespace { + +class sweetalk_device : public device_t, public device_a2bus_card_interface +{ +public: + // device type constructor + sweetalk_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + +protected: + // device_t implementation + virtual void device_start() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + + // device_a2bus_card_interface implementation + virtual u8 read_cnxx(u8 offset) override; + virtual void write_cnxx(u8 offset, u8 data) override; + +private: + // object finders + required_device m_sc01; +}; + +sweetalk_device::sweetalk_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, A2BUS_SWEETALK, tag, owner, clock) + , device_a2bus_card_interface(mconfig, *this) + , m_sc01(*this, "sc01") +{ +} + +void sweetalk_device::device_start() +{ +} + +u8 sweetalk_device::read_cnxx(u8 offset) +{ + // lower 7 bits are actually open bus + return m_sc01->request() ? 0x80 : 0; +} + +void sweetalk_device::write_cnxx(u8 offset, u8 data) +{ + m_sc01->write(data); + m_sc01->inflection_w(~data >> 6); +} + +void sweetalk_device::device_add_mconfig(machine_config &config) +{ + // "The frequency is adjusted through potentiometer R8 and nominally set for 720 KHz." (owner's manual, p. 5) + VOTRAX_SC01A(config, m_sc01, 720'000); + m_sc01->add_route(ALL_OUTPUTS, "speaker", 0.8); + + SPEAKER(config, "speaker").front_center(); +} + +} // anonymous namespace + +// device type definition +DEFINE_DEVICE_TYPE_PRIVATE(A2BUS_SWEETALK, device_a2bus_card_interface, sweetalk_device, "sweetalk", "Micromint Sweet Talker Phonetic Speech Synthesizer Interface") diff --git a/src/devices/bus/a2bus/sweetalk.h b/src/devices/bus/a2bus/sweetalk.h new file mode 100644 index 00000000000..1e72027140f --- /dev/null +++ b/src/devices/bus/a2bus/sweetalk.h @@ -0,0 +1,12 @@ +// license:BSD-3-Clause +// copyright-holders:AJR + +#ifndef MAME_BUS_A2BUS_SWEETALK_H +#define MAME_BUS_A2BUS_SWEETALK_H + +#include "a2bus.h" + +// device type definition +DECLARE_DEVICE_TYPE(A2BUS_SWEETALK, device_a2bus_card_interface) + +#endif // MAME_BUS_A2BUS_SWEETALK_H From 978a85d4d13dcb9d97ccb3840630c882e1807e39 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 9 Mar 2026 13:32:52 +0100 Subject: [PATCH 211/351] namco/namcos22.cpp: Modernized ROM loading entries to MAME standards. [Brian Troha] namco/namcos22.cpp: Redumped Dirt Dash (World, DT2 Ver.B) program ROMs. [Bill D., Brian Troha, The Dumping Union] New working clones ------------------ Time Crisis (Japan, TS1 Ver.B) [f205v, Sean Sutton, Smitdogg, rtw, Bill D., Brian Troha, The Dumping Union] Clones promoted to working -------------------------- Dirt Dash (World, DT2 Ver.B) [Bill D., Brian Troha, The Dumping Union] --- src/mame/alliedleisure/ace.cpp | 5 +- src/mame/mame.lst | 1 + src/mame/namco/namcos22.cpp | 2536 ++++++++++++++++++-------------- 3 files changed, 1441 insertions(+), 1101 deletions(-) diff --git a/src/mame/alliedleisure/ace.cpp b/src/mame/alliedleisure/ace.cpp index 1ea0ef935ac..e2f0ebff61a 100644 --- a/src/mame/alliedleisure/ace.cpp +++ b/src/mame/alliedleisure/ace.cpp @@ -152,11 +152,10 @@ uint32_t ace_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c void ace_state::ace_characterram_w(offs_t offset, uint8_t data) { + data &= 0x07; + if (m_characterram[offset] != data) { - if (data & ~0x07) - logerror("write to %04x data = %02x\n", 0x8000 + offset, data); - m_characterram[offset] = data; m_gfxdecode->gfx(1)->mark_dirty(0); m_gfxdecode->gfx(2)->mark_dirty(0); diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 516c76e1359..597ca23b903 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34683,6 +34683,7 @@ ridgeracf ridgeracj timecris timecrisa +timecrisj tokyowar tokyowarj victlap diff --git a/src/mame/namco/namcos22.cpp b/src/mame/namco/namcos22.cpp index 3e2ef606d09..f6f1655c7c2 100644 --- a/src/mame/namco/namcos22.cpp +++ b/src/mame/namco/namcos22.cpp @@ -738,9 +738,9 @@ Time Crisis TS1CCRH.5B, TS1CCRH.1D TS1CCRL.7B, TS1CCRL.3D, TS1CG0.12B, TS1CG0.8D, TS1CG1.13B 16M SOP44 TS1CG1.10D, TS1CG2.14B, TS1CG2.12D, TS1CG3.16B, TS1CG3.13D " TS1CG4.18B, TS1CG4.14D, TS1CG5.19B, TS1CG5.16D, TS1CG6.18A " - TS1CG6.18D, TS1CG7.15A, TS1CG7.19D, TS1SCG0.12F,TS1SCG0.12L " - TS1SCG1.10F,TS1SCG1.10L, TS1SCG2.8F, TS1SCG2.8L, TS1SCG3.7F " - TS1SCG3.7L, TS1SCG4.5F, TS1SCG4.5L, TS1SCG5.3F, TS1SCG5.3L " + TS1CG6.18D, TS1SCG0.12F,TS1SCG0.12L,TS1SCG1.10F,TS1SCG1.10L " + TS1SCG2.8F, TS1SCG2.8L, TS1SCG3.7F, TS1SCG3.7L, TS1SCG4.5F " + TS1SCG4.5L, TS1SCG5.3F, TS1SCG5.3L " TS1PTRU0.18F, TS1PTRU1.16F, TS1PTRU2.15F, TS1PTRM0.18J 4M SOP32 TS1PTRM1.16J, TS1PTRM2.15J, TS1PTRL0.18K, TS1PTRL1.16K, TS1PTRL2.15K " @@ -3932,123 +3932,123 @@ void adillor_state::adillor(machine_config &config) /*********************************************************************************************/ ROM_START( ridgerac ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rr2_prgllb.4d", 0x00003, 0x80000, CRC(d50d4fa0) SHA1(0fcd55e653d4f596b38b4e7b876ccd1f2a3836df) ) // Ridge Racer Standard Date 1994-01-17 ROM_LOAD32_BYTE( "rr2_prglmb.2d", 0x00002, 0x80000, CRC(6a266f42) SHA1(470613dbddd6b3050f666de9a2b222a4b7e1e809) ) ROM_LOAD32_BYTE( "rr2_prgumb.8d", 0x00001, 0x80000, CRC(64c3aff1) SHA1(46b30ee0601a0a7887d29bc94d595f50a5a812d6) ) ROM_LOAD32_BYTE( "rr2_prguub.6d", 0x00000, 0x80000, CRC(e6ff0b8d) SHA1(a02ffd2d3dc0a2c4a5665303c8021fd99a50eb8e) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rr1cg0.bin", 0x800000, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0xa00000, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0xc00000, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0xe00000, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rr1ccrl.bin", 0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin", 0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) - ROM_LOAD( "rr1potl1.4b", 0x80000*1, 0x80000,CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) - ROM_LOAD( "rr1potm0.5c", 0x80000*2, 0x80000,CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) - ROM_LOAD( "rr1potm1.4c", 0x80000*3, 0x80000,CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) - ROM_LOAD( "rr1potu0.5d", 0x80000*4, 0x80000,CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) - ROM_LOAD( "rr1potu1.4d", 0x80000*5, 0x80000,CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rr1potl0.5b", 0x000000, 0x080000, CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) + ROM_LOAD( "rr1potl1.4b", 0x080000, 0x080000, CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) + ROM_LOAD( "rr1potm0.5c", 0x100000, 0x080000, CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) + ROM_LOAD( "rr1potm1.4c", 0x180000, 0x080000, CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) + ROM_LOAD( "rr1potu0.5d", 0x200000, 0x080000, CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) + ROM_LOAD( "rr1potu1.4d", 0x280000, 0x080000, CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rr1wav0.10r", 0x100000*0, 0x100000,CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) - ROM_LOAD( "rr1wav1.10p", 0x100000*2, 0x100000,CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) - ROM_LOAD( "rr1wav2.10n", 0x100000*1, 0x100000,CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) - ROM_LOAD( "rr1wav3.10l", 0x100000*3, 0x100000,CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rr1wav0.10r", 0x000000, 0x100000, CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) + ROM_LOAD( "rr1wav1.10p", 0x200000, 0x100000, CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) + ROM_LOAD( "rr1wav2.10n", 0x100000, 0x100000, CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) + ROM_LOAD( "rr1wav3.10l", 0x300000, 0x100000, CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgeraca ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rr2_prgll.4d", 0x00003, 0x80000, CRC(4bb7fc86) SHA1(8291375b8ec4d37e0d9e3bf38da2d5907b0f31bd) ) // Ridge Racer Standard Date 1993-10-07 ROM_LOAD32_BYTE( "rr2_prglm.2d", 0x00002, 0x80000, CRC(68e13830) SHA1(ddc447c7afbb5c4238969d7e78bfe9cf8fac6061) ) ROM_LOAD32_BYTE( "rr2_prgum.8d", 0x00001, 0x80000, CRC(705ef78a) SHA1(881903413e66d6fd83d46eb18c4e1230531832ae) ) ROM_LOAD32_BYTE( "rr2_prguu.6d", 0x00000, 0x80000, CRC(a79e456f) SHA1(049c596e01e53e3a401c5c4260517f170688d387) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rr1cg0.bin", 0x800000, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0xa00000, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0xc00000, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0xe00000, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rr1ccrl.bin", 0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin", 0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) - ROM_LOAD( "rr1potl1.4b", 0x80000*1, 0x80000,CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) - ROM_LOAD( "rr1potm0.5c", 0x80000*2, 0x80000,CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) - ROM_LOAD( "rr1potm1.4c", 0x80000*3, 0x80000,CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) - ROM_LOAD( "rr1potu0.5d", 0x80000*4, 0x80000,CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) - ROM_LOAD( "rr1potu1.4d", 0x80000*5, 0x80000,CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rr1potl0.5b", 0x000000, 0x080000, CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) + ROM_LOAD( "rr1potl1.4b", 0x080000, 0x080000, CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) + ROM_LOAD( "rr1potm0.5c", 0x100000, 0x080000, CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) + ROM_LOAD( "rr1potm1.4c", 0x180000, 0x080000, CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) + ROM_LOAD( "rr1potu0.5d", 0x200000, 0x080000, CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) + ROM_LOAD( "rr1potu1.4d", 0x280000, 0x080000, CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rr1wav0.10r", 0x100000*0, 0x100000,CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) - ROM_LOAD( "rr1wav1.10p", 0x100000*2, 0x100000,CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) - ROM_LOAD( "rr1wav2.10n", 0x100000*1, 0x100000,CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) - ROM_LOAD( "rr1wav3.10l", 0x100000*3, 0x100000,CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rr1wav0.10r", 0x000000, 0x100000, CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) + ROM_LOAD( "rr1wav1.10p", 0x200000, 0x100000, CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) + ROM_LOAD( "rr1wav2.10n", 0x100000, 0x100000, CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) + ROM_LOAD( "rr1wav3.10l", 0x300000, 0x100000, CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgeracb ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rr3_prgllb.4d", 0x00003, 0x80000, CRC(856fe5ec) SHA1(72d95b8bd5da551c3d358b8ab266373a89f8aa6a) ) // Ridge Racer Standard -Foreign B- Date 1994-01-17 ROM_LOAD32_BYTE( "rr3_prglmb.2d", 0x00002, 0x80000, CRC(1e9ef0a9) SHA1(a4577bcdf13673568793d8a324945fca30b10f43) ) ROM_LOAD32_BYTE( "rr3_prgumb.8d", 0x00001, 0x80000, CRC(e160f63f) SHA1(9b4b7a13eb4bc19fcb53daedb87e4945c20a1b8e) ) ROM_LOAD32_BYTE( "rr3_prguub.6d", 0x00000, 0x80000, CRC(f07c78c0) SHA1(dbed76d868b761711faf5b6e11f2c9affb91db5d) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rr1cg0.bin", 0x800000, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0xa00000, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0xc00000, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0xe00000, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rr1ccrl.bin", 0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin", 0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) - ROM_LOAD( "rr1potl1.4b", 0x80000*1, 0x80000,CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) - ROM_LOAD( "rr1potm0.5c", 0x80000*2, 0x80000,CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) - ROM_LOAD( "rr1potm1.4c", 0x80000*3, 0x80000,CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) - ROM_LOAD( "rr1potu0.5d", 0x80000*4, 0x80000,CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) - ROM_LOAD( "rr1potu1.4d", 0x80000*5, 0x80000,CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rr1potl0.5b", 0x000000, 0x080000, CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) + ROM_LOAD( "rr1potl1.4b", 0x080000, 0x080000, CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) + ROM_LOAD( "rr1potm0.5c", 0x100000, 0x080000, CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) + ROM_LOAD( "rr1potm1.4c", 0x180000, 0x080000, CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) + ROM_LOAD( "rr1potu0.5d", 0x200000, 0x080000, CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) + ROM_LOAD( "rr1potu1.4d", 0x280000, 0x080000, CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rr1wav0.10r", 0x100000*0, 0x100000,CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) - ROM_LOAD( "rr1wav1.10p", 0x100000*2, 0x100000,CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) - ROM_LOAD( "rr1wav2.10n", 0x100000*1, 0x100000,CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) - ROM_LOAD( "rr1wav3.10l", 0x100000*3, 0x100000,CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rr1wav0.10r", 0x000000, 0x100000, CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) + ROM_LOAD( "rr1wav1.10p", 0x200000, 0x100000, CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) + ROM_LOAD( "rr1wav2.10n", 0x100000, 0x100000, CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) + ROM_LOAD( "rr1wav3.10l", 0x300000, 0x100000, CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END /* @@ -4059,442 +4059,472 @@ There doesn't seem to be anything specific about this set to indicate it support Until it's verified one way or the other leave as labeled */ ROM_START( ridgeracc ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rr3_prgll-3s.4d", 0x000003, 0x080000, CRC(2c3d8cb7) SHA1(46a7b62938fe3edde5c52ce3fdfe447000cd6af0) ) // Ridge Racer Standard -Foreign B- Date 1993-10-28 ROM_LOAD32_BYTE( "rr3_prglm-3s.2d", 0x000002, 0x080000, CRC(b15343f2) SHA1(3056eb5a3036a74b2ac641a4c3221986c0be1e27) ) ROM_LOAD32_BYTE( "rr3_prgum-3s.8d", 0x000001, 0x080000, CRC(8fda06ac) SHA1(7e9adba198eb0941100cda64ecedac504f6ac696) ) ROM_LOAD32_BYTE( "rr3_prguu-3s.6d", 0x000000, 0x080000, CRC(868398df) SHA1(422e0f9884904b0df93fcacd1468b8da0458eb8e) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rr1cg0.bin", 0x800000, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0xa00000, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0xc00000, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0xe00000, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rr1ccrl.bin", 0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin", 0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) - ROM_LOAD( "rr1potl1.4b", 0x80000*1, 0x80000,CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) - ROM_LOAD( "rr1potm0.5c", 0x80000*2, 0x80000,CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) - ROM_LOAD( "rr1potm1.4c", 0x80000*3, 0x80000,CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) - ROM_LOAD( "rr1potu0.5d", 0x80000*4, 0x80000,CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) - ROM_LOAD( "rr1potu1.4d", 0x80000*5, 0x80000,CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rr1potl0.5b", 0x000000, 0x080000, CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) + ROM_LOAD( "rr1potl1.4b", 0x080000, 0x080000, CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) + ROM_LOAD( "rr1potm0.5c", 0x100000, 0x080000, CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) + ROM_LOAD( "rr1potm1.4c", 0x180000, 0x080000, CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) + ROM_LOAD( "rr1potu0.5d", 0x200000, 0x080000, CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) + ROM_LOAD( "rr1potu1.4d", 0x280000, 0x080000, CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rr1wav0.10r", 0x100000*0, 0x100000,CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) - ROM_LOAD( "rr1wav1.10p", 0x100000*2, 0x100000,CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) - ROM_LOAD( "rr1wav2.10n", 0x100000*1, 0x100000,CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) - ROM_LOAD( "rr1wav3.10l", 0x100000*3, 0x100000,CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rr1wav0.10r", 0x000000, 0x100000, CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) + ROM_LOAD( "rr1wav1.10p", 0x200000, 0x100000, CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) + ROM_LOAD( "rr1wav2.10n", 0x100000, 0x100000, CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) + ROM_LOAD( "rr1wav3.10l", 0x300000, 0x100000, CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgeracj ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rr1_prgll.4d", 0x00003, 0x80000, CRC(4bb7fc86) SHA1(8291375b8ec4d37e0d9e3bf38da2d5907b0f31bd) ) // Ridge Racer Standard Date 1993-10-07 ROM_LOAD32_BYTE( "rr1_prglm.2d", 0x00002, 0x80000, CRC(68e13830) SHA1(ddc447c7afbb5c4238969d7e78bfe9cf8fac6061) ) ROM_LOAD32_BYTE( "rr1_prgum.8d", 0x00001, 0x80000, CRC(705ef78a) SHA1(881903413e66d6fd83d46eb18c4e1230531832ae) ) ROM_LOAD32_BYTE( "rr1_prguu.6d", 0x00000, 0x80000, CRC(c1371f96) SHA1(a78e0bf6c147c034487a85efa0a8470f4e8f4bf0) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rr1cg0.bin", 0x200000*0x4, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) - ROM_LOAD( "rr1cg1.bin", 0x200000*0x5, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) - ROM_LOAD( "rr1cg2.bin", 0x200000*0x6, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) - ROM_LOAD( "rr1cg3.bin", 0x200000*0x7, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rr1cg0.bin", 0x800000, 0x200000, CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rr1cg1.bin", 0xa00000, 0x200000, CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rr1cg2.bin", 0xc00000, 0x200000, CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rr1cg3.bin", 0xe00000, 0x200000, CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rr1ccrl.bin",0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) - ROM_LOAD( "rr1ccrh.bin",0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rr1ccrl.bin", 0x000000, 0x200000, CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rr1ccrh.bin", 0x200000, 0x080000, CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rr1potl0.5b", 0x80000*0, 0x80000,CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) - ROM_LOAD( "rr1potl1.4b", 0x80000*1, 0x80000,CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) - ROM_LOAD( "rr1potm0.5c", 0x80000*2, 0x80000,CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) - ROM_LOAD( "rr1potm1.4c", 0x80000*3, 0x80000,CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) - ROM_LOAD( "rr1potu0.5d", 0x80000*4, 0x80000,CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) - ROM_LOAD( "rr1potu1.4d", 0x80000*5, 0x80000,CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rr1potl0.5b", 0x000000, 0x080000, CRC(3ac193e3) SHA1(ff213766f15e34dc1b25187b57d94e17930090a3) ) + ROM_LOAD( "rr1potl1.4b", 0x080000, 0x080000, CRC(ac3ffba5) SHA1(4eb4dda5faeff237e0d35725b56d309948fba900) ) + ROM_LOAD( "rr1potm0.5c", 0x100000, 0x080000, CRC(42a3fa08) SHA1(15db0ae7ccf7f5a77b9dd9a9d82a488b67f8aaff) ) + ROM_LOAD( "rr1potm1.4c", 0x180000, 0x080000, CRC(1bc1ea7b) SHA1(52c21eef4989c45acc5fa4deda2d0b63214731c8) ) + ROM_LOAD( "rr1potu0.5d", 0x200000, 0x080000, CRC(5e367f72) SHA1(5887f011379dce865fef238b402678a3d2033de9) ) + ROM_LOAD( "rr1potu1.4d", 0x280000, 0x080000, CRC(31d92475) SHA1(51d3c0baa223e1bc16ea2950f2e085597528f870) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rr1wav0.10r", 0x100000*0, 0x100000,CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) - ROM_LOAD( "rr1wav1.10p", 0x100000*2, 0x100000,CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) - ROM_LOAD( "rr1wav2.10n", 0x100000*1, 0x100000,CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) - ROM_LOAD( "rr1wav3.10l", 0x100000*3, 0x100000,CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rr1wav0.10r", 0x000000, 0x100000, CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) + ROM_LOAD( "rr1wav1.10p", 0x200000, 0x100000, CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) + ROM_LOAD( "rr1wav2.10n", 0x100000, 0x100000, CRC(3244cb59) SHA1(b3283b30cfafbfdcbc6d482ecc4ed6a47a527ca4) ) + ROM_LOAD( "rr1wav3.10l", 0x300000, 0x100000, CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgeracf ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rrf2_prgll.4d", 0x00003, 0x80000, CRC(23c6144d) SHA1(99f70e2c60fba7551cafdce12b07da1f8ab8aad6) ) // Ridge Racer Full Scale -Foreign- Date 1993-12-13 ROM_LOAD32_BYTE( "rrf2_prglm.2d", 0x00002, 0x80000, CRC(1ad638a1) SHA1(505a7f4ba60bbc4e735865fbc5d664311b6045d9) ) ROM_LOAD32_BYTE( "rrf2_prgum.8d", 0x00001, 0x80000, CRC(d7e0aa16) SHA1(cab4578cdd3af84b865114be4105cfdc2e7abf36) ) ROM_LOAD32_BYTE( "rrf2_prguu.6d", 0x00000, 0x80000, CRC(12c808bb) SHA1(64e84686d4ceb8145b9a59b75d0dced830884c9d) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rrf1data.6r", 0, 0x080000, CRC(ce3c6ed6) SHA1(23e033364bc967c10c49fd1d5413dda837670633) ) - /* this stuff was missing from this version, and shouldn't be the same (bad textures if we use these roms) */ - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rrf1cg0.bin", 0x200000*0x4, 0x200000, BAD_DUMP CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) - ROM_LOAD( "rrf1cg1.bin", 0x200000*0x5, 0x200000, BAD_DUMP CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) - ROM_LOAD( "rrf1cg2.bin", 0x200000*0x6, 0x200000, BAD_DUMP CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) - ROM_LOAD( "rrf1cg3.bin", 0x200000*0x7, 0x200000, BAD_DUMP CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) + // the texture tiles ROMs were not dumped for this version, and are not the same (bad textures if we use these roms) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rrf1cg0.bin", 0x800000, 0x200000, BAD_DUMP CRC(b557a795) SHA1(f345486ffbe797246ad80a55d3c4a332ed6e2888) ) + ROM_LOAD( "rrf1cg1.bin", 0xa00000, 0x200000, BAD_DUMP CRC(0fa212d9) SHA1(a1311de0a504e2d399044fa8ac32ec6c56ec965f) ) + ROM_LOAD( "rrf1cg2.bin", 0xc00000, 0x200000, BAD_DUMP CRC(18e2d2bd) SHA1(69c2ea62eeb255f27d3c69373f6716b0a34683cc) ) + ROM_LOAD( "rrf1cg3.bin", 0xe00000, 0x200000, BAD_DUMP CRC(9564488b) SHA1(6b27d1aea75d6be747c62e165cfa49ecc5d9e767) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rrf1ccrl.bin",0x000000, 0x200000, BAD_DUMP CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) - ROM_LOAD( "rrf1ccrh.bin",0x200000, 0x080000, BAD_DUMP CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rrf1ccrl.bin", 0x000000, 0x200000, BAD_DUMP CRC(6092d181) SHA1(52c0e3ac20aa23059a87d1a985d24ae641577310) ) + ROM_LOAD( "rrf1ccrh.bin", 0x200000, 0x080000, BAD_DUMP CRC(dd332fd5) SHA1(a7d9c1d6b5a8e3a937b525c1363880e404dcd147) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rrf2potl0.l0", 0x80000*0, 0x80000, CRC(9b762e60) SHA1(50b67ff6678bacba140bad3aedda75c30851fa7a) ) - ROM_LOAD( "rrf2potl1.l1", 0x80000*1, 0x80000, CRC(ab4d66b0) SHA1(59020b3dc2efff99cd528752ca7168b64ae96ac4) ) - ROM_LOAD( "rrf2potm0.m0", 0x80000*2, 0x80000, CRC(02d4daa3) SHA1(9b4e48d3234cb91146b5d31ffcf42ad199ccb903) ) - ROM_LOAD( "rrf2potm1.m1", 0x80000*3, 0x80000, CRC(37e005c2) SHA1(036ae1c44aaa6a6904e6d4938572035ccc6854ed) ) - ROM_LOAD( "rrf2potu0.u0", 0x80000*4, 0x80000, CRC(86b3fe98) SHA1(f242d33f7488e233ccdc0b5d309c64510d7a622d) ) - ROM_LOAD( "rrf2potu1.u1", 0x80000*5, 0x80000, CRC(e0c6ce3d) SHA1(cc559a2237ccb753cb1397fecba64733455a8c43) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rrf2potl0.l0", 0x000000, 0x080000, CRC(9b762e60) SHA1(50b67ff6678bacba140bad3aedda75c30851fa7a) ) + ROM_LOAD( "rrf2potl1.l1", 0x080000, 0x080000, CRC(ab4d66b0) SHA1(59020b3dc2efff99cd528752ca7168b64ae96ac4) ) + ROM_LOAD( "rrf2potm0.m0", 0x100000, 0x080000, CRC(02d4daa3) SHA1(9b4e48d3234cb91146b5d31ffcf42ad199ccb903) ) + ROM_LOAD( "rrf2potm1.m1", 0x180000, 0x080000, CRC(37e005c2) SHA1(036ae1c44aaa6a6904e6d4938572035ccc6854ed) ) + ROM_LOAD( "rrf2potu0.u0", 0x200000, 0x080000, CRC(86b3fe98) SHA1(f242d33f7488e233ccdc0b5d309c64510d7a622d) ) + ROM_LOAD( "rrf2potu1.u1", 0x280000, 0x080000, CRC(e0c6ce3d) SHA1(cc559a2237ccb753cb1397fecba64733455a8c43) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rrf1wave0.10r", 0x100000*0, 0x100000,CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) - ROM_LOAD( "rrf1wave1.10p", 0x100000*2, 0x100000,CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) - ROM_LOAD( "rrf1wave2.10n", 0x100000*1, 0x100000,CRC(4ceeae12) SHA1(ae3a6583f8912bc784c7bc63d32448228cf217ba) ) // differs from normal sets - ROM_LOAD( "rrf1wave3.10l", 0x100000*3, 0x100000,CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rrf1wave0.10r", 0x000000, 0x100000, CRC(a8e85bde) SHA1(b56677e9f6c98f7b600043f5dcfef3a482ca7455) ) + ROM_LOAD( "rrf1wave1.10p", 0x200000, 0x100000, CRC(35f47c8e) SHA1(7c3f9e942f532af8008fbead2a96fee6084bcde6) ) + ROM_LOAD( "rrf1wave2.10n", 0x100000, 0x100000, CRC(4ceeae12) SHA1(ae3a6583f8912bc784c7bc63d32448228cf217ba) ) // differs from normal sets + ROM_LOAD( "rrf1wave3.10l", 0x300000, 0x100000, CRC(c4cda1a7) SHA1(60bc96880ec79efdff3cc70c09e848692a40bea4) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgera2 ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rrs2_prgll.4d", 0x00003, 0x80000, CRC(88199c0f) SHA1(5cf5bb714c3d209943a8d815eaea60afd34641ff) ) // Ridge Racer 2 Standard Date 1994-06-21 -Foreign- ROM_LOAD32_BYTE( "rrs2_prglm.2d", 0x00002, 0x80000, CRC(8e86f199) SHA1(7bd9ec9147ef0380864508f66203ef2c6ad1f7f6) ) // One byte different compared to the Rev.B Japanese set below ROM_LOAD32_BYTE( "rrs2_prgum.8d", 0x00001, 0x80000, CRC(78c360b6) SHA1(8ee502291359cbc8aef39145c8fe7538311cc58f) ) // The "World" set's ROMs are NOT marked as Rev.B even though ROM_LOAD32_BYTE( "rrs2_prguu.6d", 0x00000, 0x80000, CRC(60d6d4a4) SHA1(759762a9b7d7aee7ee1b44b1721e5356898aa7ea) ) // they are clearly based off of the Japanese Rev.B ROM set. - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rrs1data.6r", 0, 0x080000, CRC(b7063aa8) SHA1(08ff689e8dd529b91eee423c93f084945c6de417) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rrs1cg0.1a", 0x200000*0x4, 0x200000,CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) - ROM_LOAD( "rrs1cg1.2a", 0x200000*0x5, 0x200000,CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) - ROM_LOAD( "rrs1cg2.3a", 0x200000*0x6, 0x200000,CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) - ROM_LOAD( "rrs1cg3.5a", 0x200000*0x7, 0x200000,CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rrs1cg0.1a", 0x800000, 0x200000, CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) + ROM_LOAD( "rrs1cg1.2a", 0xa00000, 0x200000, CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) + ROM_LOAD( "rrs1cg2.3a", 0xc00000, 0x200000, CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) + ROM_LOAD( "rrs1cg3.5a", 0xe00000, 0x200000, CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000,CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) - ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000,CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000, CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) + ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000, CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rrs1pol0.5b", 0x80000*0, 0x80000,CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) - ROM_LOAD( "rrs1pol1.4b", 0x80000*1, 0x80000,CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) - ROM_LOAD( "rrs1pom0.5c", 0x80000*2, 0x80000,CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) - ROM_LOAD( "rrs1pom1.4c", 0x80000*3, 0x80000,CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) - ROM_LOAD( "rrs1pou0.5d", 0x80000*4, 0x80000,CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) - ROM_LOAD( "rrs1pou1.4d", 0x80000*5, 0x80000,CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rrs1pol0.5b", 0x000000, 0x080000, CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) + ROM_LOAD( "rrs1pol1.4b", 0x080000, 0x080000, CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) + ROM_LOAD( "rrs1pom0.5c", 0x100000, 0x080000, CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) + ROM_LOAD( "rrs1pom1.4c", 0x180000, 0x080000, CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) + ROM_LOAD( "rrs1pou0.5d", 0x200000, 0x080000, CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) + ROM_LOAD( "rrs1pou1.4d", 0x280000, 0x080000, CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rrs1wav0.10r", 0x100000*0, 0x100000,CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) - ROM_LOAD( "rrs1wav1.10p", 0x100000*2, 0x100000,CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) - ROM_LOAD( "rrs1wav2.10n", 0x100000*1, 0x100000,CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) - ROM_LOAD( "rrs1wav3.10l", 0x100000*3, 0x100000,CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rrs1wav0.10r", 0x000000, 0x100000, CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) + ROM_LOAD( "rrs1wav1.10p", 0x200000, 0x100000, CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) + ROM_LOAD( "rrs1wav2.10n", 0x100000, 0x100000, CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) + ROM_LOAD( "rrs1wav3.10l", 0x300000, 0x100000, CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgera2j ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rrs1_prgllb.4d", 0x00003, 0x80000, CRC(22f069e5) SHA1(fcaec3aa83853c39d713ed01c511060663027ccd) ) // Ridge Racer 2 Standard Date 1994-06-21 ROM_LOAD32_BYTE( "rrs1_prglmb.2d", 0x00002, 0x80000, CRC(8e86f199) SHA1(7bd9ec9147ef0380864508f66203ef2c6ad1f7f6) ) ROM_LOAD32_BYTE( "rrs1_prgumb.8d", 0x00001, 0x80000, CRC(78c360b6) SHA1(8ee502291359cbc8aef39145c8fe7538311cc58f) ) ROM_LOAD32_BYTE( "rrs1_prguub.6d", 0x00000, 0x80000, CRC(60d6d4a4) SHA1(759762a9b7d7aee7ee1b44b1721e5356898aa7ea) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rrs1data.6r", 0, 0x080000, CRC(b7063aa8) SHA1(08ff689e8dd529b91eee423c93f084945c6de417) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rrs1cg0.1a", 0x200000*0x4, 0x200000,CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) - ROM_LOAD( "rrs1cg1.2a", 0x200000*0x5, 0x200000,CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) - ROM_LOAD( "rrs1cg2.3a", 0x200000*0x6, 0x200000,CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) - ROM_LOAD( "rrs1cg3.5a", 0x200000*0x7, 0x200000,CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rrs1cg0.1a", 0x800000, 0x200000, CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) + ROM_LOAD( "rrs1cg1.2a", 0xa00000, 0x200000, CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) + ROM_LOAD( "rrs1cg2.3a", 0xc00000, 0x200000, CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) + ROM_LOAD( "rrs1cg3.5a", 0xe00000, 0x200000, CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000,CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) - ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000,CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000, CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) + ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000, CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rrs1pol0.5b", 0x80000*0, 0x80000,CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) - ROM_LOAD( "rrs1pol1.4b", 0x80000*1, 0x80000,CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) - ROM_LOAD( "rrs1pom0.5c", 0x80000*2, 0x80000,CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) - ROM_LOAD( "rrs1pom1.4c", 0x80000*3, 0x80000,CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) - ROM_LOAD( "rrs1pou0.5d", 0x80000*4, 0x80000,CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) - ROM_LOAD( "rrs1pou1.4d", 0x80000*5, 0x80000,CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rrs1pol0.5b", 0x000000, 0x080000, CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) + ROM_LOAD( "rrs1pol1.4b", 0x080000, 0x080000, CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) + ROM_LOAD( "rrs1pom0.5c", 0x100000, 0x080000, CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) + ROM_LOAD( "rrs1pom1.4c", 0x180000, 0x080000, CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) + ROM_LOAD( "rrs1pou0.5d", 0x200000, 0x080000, CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) + ROM_LOAD( "rrs1pou1.4d", 0x280000, 0x080000, CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rrs1wav0.10r", 0x100000*0, 0x100000,CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) - ROM_LOAD( "rrs1wav1.10p", 0x100000*2, 0x100000,CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) - ROM_LOAD( "rrs1wav2.10n", 0x100000*1, 0x100000,CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) - ROM_LOAD( "rrs1wav3.10l", 0x100000*3, 0x100000,CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rrs1wav0.10r", 0x000000, 0x100000, CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) + ROM_LOAD( "rrs1wav1.10p", 0x200000, 0x100000, CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) + ROM_LOAD( "rrs1wav2.10n", 0x100000, 0x100000, CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) + ROM_LOAD( "rrs1wav3.10l", 0x300000, 0x100000, CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgera2ja ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rrs1_prgll.4d", 0x00003, 0x80000, CRC(fbf785a2) SHA1(b9333c7623f68f48aa6ae50913a22a527a19576a) ) // Ridge Racer 2 Standard Date 1994-06-13 ROM_LOAD32_BYTE( "rrs1_prglm.2d", 0x00002, 0x80000, CRC(562f747a) SHA1(79d818b87c9a992fc9706fb39e6d560c2b0aa392) ) ROM_LOAD32_BYTE( "rrs1_prgum.8d", 0x00001, 0x80000, CRC(93259fb0) SHA1(c29787e873797a003db27adbd20d7b852e26d8c6) ) ROM_LOAD32_BYTE( "rrs1_prguu.6d", 0x00000, 0x80000, CRC(31cdefe8) SHA1(ae836d389bed43dd156eb4cf3e97b6f1ad68181e) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rrs1data.6r", 0, 0x080000, CRC(b7063aa8) SHA1(08ff689e8dd529b91eee423c93f084945c6de417) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rrs1cg0.1a", 0x200000*0x4, 0x200000,CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) - ROM_LOAD( "rrs1cg1.2a", 0x200000*0x5, 0x200000,CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) - ROM_LOAD( "rrs1cg2.3a", 0x200000*0x6, 0x200000,CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) - ROM_LOAD( "rrs1cg3.5a", 0x200000*0x7, 0x200000,CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rrs1cg0.1a", 0x800000, 0x200000, CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) + ROM_LOAD( "rrs1cg1.2a", 0xa00000, 0x200000, CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) + ROM_LOAD( "rrs1cg2.3a", 0xc00000, 0x200000, CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) + ROM_LOAD( "rrs1cg3.5a", 0xe00000, 0x200000, CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000,CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) - ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000,CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000, CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) + ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000, CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rrs1pol0.5b", 0x80000*0, 0x80000,CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) - ROM_LOAD( "rrs1pol1.4b", 0x80000*1, 0x80000,CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) - ROM_LOAD( "rrs1pom0.5c", 0x80000*2, 0x80000,CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) - ROM_LOAD( "rrs1pom1.4c", 0x80000*3, 0x80000,CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) - ROM_LOAD( "rrs1pou0.5d", 0x80000*4, 0x80000,CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) - ROM_LOAD( "rrs1pou1.4d", 0x80000*5, 0x80000,CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rrs1pol0.5b", 0x000000, 0x080000, CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) + ROM_LOAD( "rrs1pol1.4b", 0x080000, 0x080000, CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) + ROM_LOAD( "rrs1pom0.5c", 0x100000, 0x080000, CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) + ROM_LOAD( "rrs1pom1.4c", 0x180000, 0x080000, CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) + ROM_LOAD( "rrs1pou0.5d", 0x200000, 0x080000, CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) + ROM_LOAD( "rrs1pou1.4d", 0x280000, 0x080000, CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rrs1wav0.10r", 0x100000*0, 0x100000,CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) - ROM_LOAD( "rrs1wav1.10p", 0x100000*2, 0x100000,CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) - ROM_LOAD( "rrs1wav2.10n", 0x100000*1, 0x100000,CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) - ROM_LOAD( "rrs1wav3.10l", 0x100000*3, 0x100000,CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rrs1wav0.10r", 0x000000, 0x100000, CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) + ROM_LOAD( "rrs1wav1.10p", 0x200000, 0x100000, CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) + ROM_LOAD( "rrs1wav2.10n", 0x100000, 0x100000, CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) + ROM_LOAD( "rrs1wav3.10l", 0x300000, 0x100000, CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( ridgera28 ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rrs_8_prgll.4d", 0x00003, 0x80000, CRC(c8d2bc61) SHA1(9db734fc45f47e6742ef2a8ba2558efb881df94a) ) // Ridge Racer 2 Standard Date 1994-XX-XX ROM_LOAD32_BYTE( "rrs_8_prglm.2d", 0x00002, 0x80000, CRC(bb1d23c7) SHA1(feaa1387b7003794c192edef4478636d8b125fef) ) // Early dev or test set? Only uses half of music tracks ROM_LOAD32_BYTE( "rrs_8_prgum.8d", 0x00001, 0x80000, CRC(720c854d) SHA1(9c8e2868dd7ef425fdc6f701968b9713bb12b56c) ) // Has extra PCG TEST in service menu ROM_LOAD32_BYTE( "rrs_8_prguu.6d", 0x00000, 0x80000, CRC(fb4b7e8f) SHA1(1919803dbe35a88bbb6b608d0c3ab8daea31f580) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rrs_8_data.6r", 0, 0x080000, CRC(8bf75a96) SHA1(987d24f2195eb5a84c10c68584404556ef1dfe88) ) // this DATA rom unique to this set - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rrs1cg0.1a", 0x200000*0x4, 0x200000,CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) - ROM_LOAD( "rrs1cg1.2a", 0x200000*0x5, 0x200000,CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) - ROM_LOAD( "rrs1cg2.3a", 0x200000*0x6, 0x200000,CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) - ROM_LOAD( "rrs1cg3.5a", 0x200000*0x7, 0x200000,CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rrs1cg0.1a", 0x800000, 0x200000, CRC(714c0091) SHA1(df29512bd6e64827660c40304051366d2c4d7977) ) + ROM_LOAD( "rrs1cg1.2a", 0xa00000, 0x200000, CRC(836545c1) SHA1(05e3346463d8d42b5d33216207e855033a65510d) ) + ROM_LOAD( "rrs1cg2.3a", 0xc00000, 0x200000, CRC(00e9799d) SHA1(280184451138420f64080efe13e5e2795f7b61d4) ) + ROM_LOAD( "rrs1cg3.5a", 0xe00000, 0x200000, CRC(3858983f) SHA1(feda270b71f1310ecf4c17823bc8827ca2951b40) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000,CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) - ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000,CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rrs1ccrl.5a", 0x000000, 0x200000, CRC(304a8b57) SHA1(f4f3e7c194697d754375f36a0e41d0941fa5d225) ) + ROM_LOAD( "rrs1ccrh.5c", 0x200000, 0x080000, CRC(bd3c86ab) SHA1(cd3a8774843c5864e651fa8989c80e2d975a13e8) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rrs1pol0.5b", 0x80000*0, 0x80000,CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) - ROM_LOAD( "rrs1pol1.4b", 0x80000*1, 0x80000,CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) - ROM_LOAD( "rrs1pom0.5c", 0x80000*2, 0x80000,CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) - ROM_LOAD( "rrs1pom1.4c", 0x80000*3, 0x80000,CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) - ROM_LOAD( "rrs1pou0.5d", 0x80000*4, 0x80000,CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) - ROM_LOAD( "rrs1pou1.4d", 0x80000*5, 0x80000,CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rrs1pol0.5b", 0x000000, 0x080000, CRC(9376c384) SHA1(cde0e36db1beab1523607098a760d81fac2ea90e) ) + ROM_LOAD( "rrs1pol1.4b", 0x080000, 0x080000, CRC(094fa832) SHA1(cc59442540b1cdef068c4408b6e048c11042beb8) ) + ROM_LOAD( "rrs1pom0.5c", 0x100000, 0x080000, CRC(b47a7f8b) SHA1(0fa0456ad8b4864a7071b5b5ba1a78877c1ac0f0) ) + ROM_LOAD( "rrs1pom1.4c", 0x180000, 0x080000, CRC(27260361) SHA1(8775cc779eb8b6a0d79fa84d606c970ec2d6ea8d) ) + ROM_LOAD( "rrs1pou0.5d", 0x200000, 0x080000, CRC(74d6ec84) SHA1(63f5beee51443c98100330ec04291f71e10716c4) ) + ROM_LOAD( "rrs1pou1.4d", 0x280000, 0x080000, CRC(f527caaa) SHA1(f92bdd15323239d593ddac92a11d23a27e6635ed) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "rrs1wav0.10r", 0x100000*0, 0x100000,CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) - ROM_LOAD( "rrs1wav1.10p", 0x100000*2, 0x100000,CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) - ROM_LOAD( "rrs1wav2.10n", 0x100000*1, 0x100000,CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) - ROM_LOAD( "rrs1wav3.10l", 0x100000*3, 0x100000,CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "rrs1wav0.10r", 0x000000, 0x100000, CRC(99d11a2d) SHA1(1f3db98a99be0f07c03b0a7817561459a58f310e) ) + ROM_LOAD( "rrs1wav1.10p", 0x200000, 0x100000, CRC(ad28444a) SHA1(c31bbf3cae5015e5494fe4988b9b01d822224c69) ) + ROM_LOAD( "rrs1wav2.10n", 0x100000, 0x100000, CRC(6f0d4619) SHA1(cd3d57f2ea21497f388ffa29ec7d2665647a01c0) ) + ROM_LOAD( "rrs1wav3.10l", 0x300000, 0x100000, CRC(106e761f) SHA1(97f47b857bdcbc79b0aface53dd385e67fcc9108) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( raverace ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rv2_prgllb.4d", 0x00003, 0x80000, CRC(3017cd1e) SHA1(ccd648b4a5dfc74fd141815af2969f423311042f) ) // Raveracer Standard -Foreign- Date: 07/16/95 ROM_LOAD32_BYTE( "rv2_prglmb.2d", 0x00002, 0x80000, CRC(894be0c3) SHA1(4dba93dc3ca1cf502c5f54018b64ad79bb2a632b) ) ROM_LOAD32_BYTE( "rv2_prgumb.8d", 0x00001, 0x80000, CRC(6414a800) SHA1(c278ff644909d12a43ba6fc2bf8d2092e469c3e6) ) ROM_LOAD32_BYTE( "rv2_prguub.6d", 0x00000, 0x80000, CRC(a9f18714) SHA1(8e7b17749d151f92020f68d1ac06003cf1f5c573) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rv1data.6r", 0, 0x080000, CRC(d358ec20) SHA1(140c513349240417bb546dd2d151f3666b818e91) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rv1cg0.1a", 0x200000*0x0, 0x200000,CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) /* rv1cg0.2a */ - ROM_LOAD( "rv1cg1.1c", 0x200000*0x1, 0x200000,CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) /* rv1cg1.2c */ - ROM_LOAD( "rv1cg2.1d", 0x200000*0x2, 0x200000,CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) /* rv1cg2.2d */ - ROM_LOAD( "rv1cg3.1e", 0x200000*0x3, 0x200000,CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) /* rv1cg3.2e */ - ROM_LOAD( "rv1cg4.1f", 0x200000*0x4, 0x200000,CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) /* rv1cg4.2f */ - ROM_LOAD( "rv1cg5.1j", 0x200000*0x5, 0x200000,CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) /* rv1cg5.2j */ - ROM_LOAD( "rv1cg6.1k", 0x200000*0x6, 0x200000,CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) /* rv1cg6.2k */ - ROM_LOAD( "rv1cg7.1n", 0x200000*0x7, 0x200000,CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) /* rv1cg7.2n */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rv1cg0.1a", 0x000000, 0x200000, CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) // == rv1cg0.2a + ROM_LOAD( "rv1cg1.1c", 0x200000, 0x200000, CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) // == rv1cg1.2c + ROM_LOAD( "rv1cg2.1d", 0x400000, 0x200000, CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) // == rv1cg2.2d + ROM_LOAD( "rv1cg3.1e", 0x600000, 0x200000, CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) // == rv1cg3.2e + ROM_LOAD( "rv1cg4.1f", 0x800000, 0x200000, CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) // == rv1cg4.2f + ROM_LOAD( "rv1cg5.1j", 0xa00000, 0x200000, CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) // == rv1cg5.2j + ROM_LOAD( "rv1cg6.1k", 0xc00000, 0x200000, CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) // == rv1cg6.2k + ROM_LOAD( "rv1cg7.1n", 0xe00000, 0x200000, CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) // == rv1cg7.2n + ROM_LOAD( "rv1cg0.2a", 0x000000, 0x200000, CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) + ROM_LOAD( "rv1cg1.2c", 0x200000, 0x200000, CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) + ROM_LOAD( "rv1cg2.2d", 0x400000, 0x200000, CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) + ROM_LOAD( "rv1cg3.2e", 0x600000, 0x200000, CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) + ROM_LOAD( "rv1cg4.2f", 0x800000, 0x200000, CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) + ROM_LOAD( "rv1cg5.2j", 0xa00000, 0x200000, CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) + ROM_LOAD( "rv1cg6.2k", 0xc00000, 0x200000, CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) + ROM_LOAD( "rv1cg7.2n", 0xe00000, 0x200000, CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rv1ccrl.5a", 0x000000, 0x200000,CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) /* rv1ccrl.5l */ - ROM_LOAD( "rv1ccrh.5c", 0x200000, 0x080000,CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) /* rv1ccrh.5j */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rv1ccrl.5a", 0x000000, 0x200000, CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) // == rv1ccrl.5l + ROM_LOAD( "rv1ccrh.5c", 0x200000, 0x080000, CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) // == rv1ccrh.5j + ROM_LOAD( "rv1ccrl.5l", 0x000000, 0x200000, CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) + ROM_LOAD( "rv1ccrh.5j", 0x200000, 0x080000, CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rv1potl0.5b", 0x80000*0x0, 0x80000,CRC(de2ce519) SHA1(2fe0dd000571f76d1a4df6a439d40119125170ef) ) - ROM_LOAD( "rv1potl1.4b", 0x80000*0x1, 0x80000,CRC(2215cb5a) SHA1(d48ee692ab3dbcffdc49d22f6f232ca9390da766) ) - ROM_LOAD( "rv1potl2.3b", 0x80000*0x2, 0x80000,CRC(ddb15bf7) SHA1(4c54ec98e0cba10841d43a4ce593cdacfd7f90f8) ) - ROM_LOAD( "rv1potl3.2b", 0x80000*0x3, 0x80000,CRC(fa9361ca) SHA1(35a5c2712bca9c62400b724754de3a931ad21561) ) - ROM_LOAD( "rv1potm0.5c", 0x80000*0x4, 0x80000,CRC(3c024f3a) SHA1(711f0442823797b2d410352796a5cca66af98dce) ) - ROM_LOAD( "rv1potm1.4c", 0x80000*0x5, 0x80000,CRC(b1a32a68) SHA1(e24abb3a7e35d098abae5420bf8ef5c975718987) ) - ROM_LOAD( "rv1potm2.3c", 0x80000*0x6, 0x80000,CRC(a414fe15) SHA1(eb27cdca045ab2ab27dec179043328847fb65e11) ) - ROM_LOAD( "rv1potm3.2c", 0x80000*0x7, 0x80000,CRC(2953bbb4) SHA1(aca1acd87f7130d2522d0c6f8e60beeb7ab7495a) ) - ROM_LOAD( "rv1potu0.5d", 0x80000*0x8, 0x80000,CRC(b9eaf3cc) SHA1(3b2a9041f1fa90706ecf7d4fbff918516f891a07) ) - ROM_LOAD( "rv1potu1.4d", 0x80000*0x9, 0x80000,CRC(a5c55258) SHA1(826d4dde761aec7d848456f7bc4ba6268fe99605) ) - ROM_LOAD( "rv1potu2.3d", 0x80000*0xa, 0x80000,CRC(c18fcb74) SHA1(a4009ae2b014dc89aed4741fd97f84350117c2f4) ) - ROM_LOAD( "rv1potu3.2d", 0x80000*0xb, 0x80000,CRC(79735aaa) SHA1(1cf14274669b916a7641f7a16785da1b72347485) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rv1potl0.5b", 0x000000, 0x080000, CRC(de2ce519) SHA1(2fe0dd000571f76d1a4df6a439d40119125170ef) ) + ROM_LOAD( "rv1potl1.4b", 0x080000, 0x080000, CRC(2215cb5a) SHA1(d48ee692ab3dbcffdc49d22f6f232ca9390da766) ) + ROM_LOAD( "rv1potl2.3b", 0x100000, 0x080000, CRC(ddb15bf7) SHA1(4c54ec98e0cba10841d43a4ce593cdacfd7f90f8) ) + ROM_LOAD( "rv1potl3.2b", 0x180000, 0x080000, CRC(fa9361ca) SHA1(35a5c2712bca9c62400b724754de3a931ad21561) ) + ROM_LOAD( "rv1potm0.5c", 0x200000, 0x080000, CRC(3c024f3a) SHA1(711f0442823797b2d410352796a5cca66af98dce) ) + ROM_LOAD( "rv1potm1.4c", 0x280000, 0x080000, CRC(b1a32a68) SHA1(e24abb3a7e35d098abae5420bf8ef5c975718987) ) + ROM_LOAD( "rv1potm2.3c", 0x300000, 0x080000, CRC(a414fe15) SHA1(eb27cdca045ab2ab27dec179043328847fb65e11) ) + ROM_LOAD( "rv1potm3.2c", 0x380000, 0x080000, CRC(2953bbb4) SHA1(aca1acd87f7130d2522d0c6f8e60beeb7ab7495a) ) + ROM_LOAD( "rv1potu0.5d", 0x400000, 0x080000, CRC(b9eaf3cc) SHA1(3b2a9041f1fa90706ecf7d4fbff918516f891a07) ) + ROM_LOAD( "rv1potu1.4d", 0x480000, 0x080000, CRC(a5c55258) SHA1(826d4dde761aec7d848456f7bc4ba6268fe99605) ) + ROM_LOAD( "rv1potu2.3d", 0x500000, 0x080000, CRC(c18fcb74) SHA1(a4009ae2b014dc89aed4741fd97f84350117c2f4) ) + ROM_LOAD( "rv1potu3.2d", 0x580000, 0x080000, CRC(79735aaa) SHA1(1cf14274669b916a7641f7a16785da1b72347485) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "rv1wav0.10r", 0x000000, 0x100000, CRC(5aef8143) SHA1(a75d31298e3ff9b290f238976a11e8b85cfb72d3) ) ROM_LOAD( "rv1wav1.10p", 0x200000, 0x100000, CRC(9ed9e6b3) SHA1(dd1da2b08d1b6aa0912daacc77744c9799aabb78) ) ROM_LOAD( "rv1wav2.10n", 0x100000, 0x100000, CRC(5af9dc83) SHA1(9aeb7f8217b806a6f3ed93056513af9fbcb6b372) ) ROM_LOAD( "rv1wav3.10l", 0x300000, 0x100000, CRC(ffb9ad75) SHA1(a9a61a597bd3bbe9732f92747d82264fe4d9af48) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom ROM_LOAD( "rv1eeprm.9e", 0x0000, 0x2000, CRC(e00dd412) SHA1(f594b31ace5e5e980e904faa8b83a450cc95db17) ) ROM_END ROM_START( raveracej ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rv1_prgllb.4d", 0x00003, 0x80000, CRC(71da3eea) SHA1(8a641bb23e0ad89cae5ee1570f8a3627b2434d20) ) // Raveracer Standard Date: 07/16/95 ROM_LOAD32_BYTE( "rv1_prglmb.2d", 0x00002, 0x80000, CRC(6ab7e9ce) SHA1(0c6376ca5a63409aeea344bbc201af6c47afe9ab) ) ROM_LOAD32_BYTE( "rv1_prgumb.8d", 0x00001, 0x80000, CRC(375fabcf) SHA1(448e3db3e3fab8c7c27e214ab5a5fa84e5f84366) ) ROM_LOAD32_BYTE( "rv1_prguub.6d", 0x00000, 0x80000, CRC(92f834d6) SHA1(028368790f0293fcfea5c7b12f7f315e27a62f77) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rv1data.6r", 0, 0x080000, CRC(d358ec20) SHA1(140c513349240417bb546dd2d151f3666b818e91) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rv1cg0.1a", 0x200000*0x0, 0x200000,CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) /* rv1cg0.2a */ - ROM_LOAD( "rv1cg1.1c", 0x200000*0x1, 0x200000,CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) /* rv1cg1.2c */ - ROM_LOAD( "rv1cg2.1d", 0x200000*0x2, 0x200000,CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) /* rv1cg2.2d */ - ROM_LOAD( "rv1cg3.1e", 0x200000*0x3, 0x200000,CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) /* rv1cg3.2e */ - ROM_LOAD( "rv1cg4.1f", 0x200000*0x4, 0x200000,CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) /* rv1cg4.2f */ - ROM_LOAD( "rv1cg5.1j", 0x200000*0x5, 0x200000,CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) /* rv1cg5.2j */ - ROM_LOAD( "rv1cg6.1k", 0x200000*0x6, 0x200000,CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) /* rv1cg6.2k */ - ROM_LOAD( "rv1cg7.1n", 0x200000*0x7, 0x200000,CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) /* rv1cg7.2n */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rv1cg0.1a", 0x000000, 0x200000, CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) // == rv1cg0.2a + ROM_LOAD( "rv1cg1.1c", 0x200000, 0x200000, CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) // == rv1cg1.2c + ROM_LOAD( "rv1cg2.1d", 0x400000, 0x200000, CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) // == rv1cg2.2d + ROM_LOAD( "rv1cg3.1e", 0x600000, 0x200000, CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) // == rv1cg3.2e + ROM_LOAD( "rv1cg4.1f", 0x800000, 0x200000, CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) // == rv1cg4.2f + ROM_LOAD( "rv1cg5.1j", 0xa00000, 0x200000, CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) // == rv1cg5.2j + ROM_LOAD( "rv1cg6.1k", 0xc00000, 0x200000, CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) // == rv1cg6.2k + ROM_LOAD( "rv1cg7.1n", 0xe00000, 0x200000, CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) // == rv1cg7.2n + ROM_LOAD( "rv1cg0.2a", 0x000000, 0x200000, CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) + ROM_LOAD( "rv1cg1.2c", 0x200000, 0x200000, CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) + ROM_LOAD( "rv1cg2.2d", 0x400000, 0x200000, CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) + ROM_LOAD( "rv1cg3.2e", 0x600000, 0x200000, CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) + ROM_LOAD( "rv1cg4.2f", 0x800000, 0x200000, CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) + ROM_LOAD( "rv1cg5.2j", 0xa00000, 0x200000, CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) + ROM_LOAD( "rv1cg6.2k", 0xc00000, 0x200000, CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) + ROM_LOAD( "rv1cg7.2n", 0xe00000, 0x200000, CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rv1ccrl.5a", 0x000000, 0x200000,CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) /* rv1ccrl.5l */ - ROM_LOAD( "rv1ccrh.5c", 0x200000, 0x080000,CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) /* rv1ccrh.5j */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rv1ccrl.5a", 0x000000, 0x200000, CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) // == rv1ccrl.5l + ROM_LOAD( "rv1ccrh.5c", 0x200000, 0x080000, CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) // == rv1ccrh.5j + ROM_LOAD( "rv1ccrl.5l", 0x000000, 0x200000, CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) + ROM_LOAD( "rv1ccrh.5j", 0x200000, 0x080000, CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rv1potl0.5b", 0x80000*0x0, 0x80000,CRC(de2ce519) SHA1(2fe0dd000571f76d1a4df6a439d40119125170ef) ) - ROM_LOAD( "rv1potl1.4b", 0x80000*0x1, 0x80000,CRC(2215cb5a) SHA1(d48ee692ab3dbcffdc49d22f6f232ca9390da766) ) - ROM_LOAD( "rv1potl2.3b", 0x80000*0x2, 0x80000,CRC(ddb15bf7) SHA1(4c54ec98e0cba10841d43a4ce593cdacfd7f90f8) ) - ROM_LOAD( "rv1potl3.2b", 0x80000*0x3, 0x80000,CRC(fa9361ca) SHA1(35a5c2712bca9c62400b724754de3a931ad21561) ) - ROM_LOAD( "rv1potm0.5c", 0x80000*0x4, 0x80000,CRC(3c024f3a) SHA1(711f0442823797b2d410352796a5cca66af98dce) ) - ROM_LOAD( "rv1potm1.4c", 0x80000*0x5, 0x80000,CRC(b1a32a68) SHA1(e24abb3a7e35d098abae5420bf8ef5c975718987) ) - ROM_LOAD( "rv1potm2.3c", 0x80000*0x6, 0x80000,CRC(a414fe15) SHA1(eb27cdca045ab2ab27dec179043328847fb65e11) ) - ROM_LOAD( "rv1potm3.2c", 0x80000*0x7, 0x80000,CRC(2953bbb4) SHA1(aca1acd87f7130d2522d0c6f8e60beeb7ab7495a) ) - ROM_LOAD( "rv1potu0.5d", 0x80000*0x8, 0x80000,CRC(b9eaf3cc) SHA1(3b2a9041f1fa90706ecf7d4fbff918516f891a07) ) - ROM_LOAD( "rv1potu1.4d", 0x80000*0x9, 0x80000,CRC(a5c55258) SHA1(826d4dde761aec7d848456f7bc4ba6268fe99605) ) - ROM_LOAD( "rv1potu2.3d", 0x80000*0xa, 0x80000,CRC(c18fcb74) SHA1(a4009ae2b014dc89aed4741fd97f84350117c2f4) ) - ROM_LOAD( "rv1potu3.2d", 0x80000*0xb, 0x80000,CRC(79735aaa) SHA1(1cf14274669b916a7641f7a16785da1b72347485) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rv1potl0.5b", 0x000000, 0x080000, CRC(de2ce519) SHA1(2fe0dd000571f76d1a4df6a439d40119125170ef) ) + ROM_LOAD( "rv1potl1.4b", 0x080000, 0x080000, CRC(2215cb5a) SHA1(d48ee692ab3dbcffdc49d22f6f232ca9390da766) ) + ROM_LOAD( "rv1potl2.3b", 0x100000, 0x080000, CRC(ddb15bf7) SHA1(4c54ec98e0cba10841d43a4ce593cdacfd7f90f8) ) + ROM_LOAD( "rv1potl3.2b", 0x180000, 0x080000, CRC(fa9361ca) SHA1(35a5c2712bca9c62400b724754de3a931ad21561) ) + ROM_LOAD( "rv1potm0.5c", 0x200000, 0x080000, CRC(3c024f3a) SHA1(711f0442823797b2d410352796a5cca66af98dce) ) + ROM_LOAD( "rv1potm1.4c", 0x280000, 0x080000, CRC(b1a32a68) SHA1(e24abb3a7e35d098abae5420bf8ef5c975718987) ) + ROM_LOAD( "rv1potm2.3c", 0x300000, 0x080000, CRC(a414fe15) SHA1(eb27cdca045ab2ab27dec179043328847fb65e11) ) + ROM_LOAD( "rv1potm3.2c", 0x380000, 0x080000, CRC(2953bbb4) SHA1(aca1acd87f7130d2522d0c6f8e60beeb7ab7495a) ) + ROM_LOAD( "rv1potu0.5d", 0x400000, 0x080000, CRC(b9eaf3cc) SHA1(3b2a9041f1fa90706ecf7d4fbff918516f891a07) ) + ROM_LOAD( "rv1potu1.4d", 0x480000, 0x080000, CRC(a5c55258) SHA1(826d4dde761aec7d848456f7bc4ba6268fe99605) ) + ROM_LOAD( "rv1potu2.3d", 0x500000, 0x080000, CRC(c18fcb74) SHA1(a4009ae2b014dc89aed4741fd97f84350117c2f4) ) + ROM_LOAD( "rv1potu3.2d", 0x580000, 0x080000, CRC(79735aaa) SHA1(1cf14274669b916a7641f7a16785da1b72347485) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "rv1wav0.10r", 0x000000, 0x100000, CRC(5aef8143) SHA1(a75d31298e3ff9b290f238976a11e8b85cfb72d3) ) ROM_LOAD( "rv1wav1.10p", 0x200000, 0x100000, CRC(9ed9e6b3) SHA1(dd1da2b08d1b6aa0912daacc77744c9799aabb78) ) ROM_LOAD( "rv1wav2.10n", 0x100000, 0x100000, CRC(5af9dc83) SHA1(9aeb7f8217b806a6f3ed93056513af9fbcb6b372) ) ROM_LOAD( "rv1wav3.10l", 0x300000, 0x100000, CRC(ffb9ad75) SHA1(a9a61a597bd3bbe9732f92747d82264fe4d9af48) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom ROM_LOAD( "rv1eeprm.9e", 0x0000, 0x2000, CRC(e00dd412) SHA1(f594b31ace5e5e980e904faa8b83a450cc95db17) ) ROM_END ROM_START( raveraceja ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "rv1_prgll.4d", 0x00003, 0x80000, CRC(5dfce6cd) SHA1(1aeeca1e507ae4cbe3d39ca5efd1cc4fe1ab03a8) ) // Raveracer Standard Date: 06/29/95 ROM_LOAD32_BYTE( "rv1_prglm.2d", 0x00002, 0x80000, CRC(0d4d9f74) SHA1(f886b0629cbf5a369af1f44e53c6fd3f51b3fbc9) ) ROM_LOAD32_BYTE( "rv1_prgum.8d", 0x00001, 0x80000, CRC(28e503e3) SHA1(a3071461f840f28c65c660de215c73f812f356b3) ) ROM_LOAD32_BYTE( "rv1_prguu.6d", 0x00000, 0x80000, CRC(c47d9ff4) SHA1(4d7c4ac4151a3b306e7277937add8eee26e561a6) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "rv1data.6r", 0, 0x080000, CRC(d358ec20) SHA1(140c513349240417bb546dd2d151f3666b818e91) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "rv1cg0.1a", 0x200000*0x0, 0x200000,CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) /* rv1cg0.2a */ - ROM_LOAD( "rv1cg1.1c", 0x200000*0x1, 0x200000,CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) /* rv1cg1.2c */ - ROM_LOAD( "rv1cg2.1d", 0x200000*0x2, 0x200000,CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) /* rv1cg2.2d */ - ROM_LOAD( "rv1cg3.1e", 0x200000*0x3, 0x200000,CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) /* rv1cg3.2e */ - ROM_LOAD( "rv1cg4.1f", 0x200000*0x4, 0x200000,CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) /* rv1cg4.2f */ - ROM_LOAD( "rv1cg5.1j", 0x200000*0x5, 0x200000,CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) /* rv1cg5.2j */ - ROM_LOAD( "rv1cg6.1k", 0x200000*0x6, 0x200000,CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) /* rv1cg6.2k */ - ROM_LOAD( "rv1cg7.1n", 0x200000*0x7, 0x200000,CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) /* rv1cg7.2n */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "rv1cg0.1a", 0x000000, 0x200000, CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) // == rv1cg0.2a + ROM_LOAD( "rv1cg1.1c", 0x200000, 0x200000, CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) // == rv1cg1.2c + ROM_LOAD( "rv1cg2.1d", 0x400000, 0x200000, CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) // == rv1cg2.2d + ROM_LOAD( "rv1cg3.1e", 0x600000, 0x200000, CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) // == rv1cg3.2e + ROM_LOAD( "rv1cg4.1f", 0x800000, 0x200000, CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) // == rv1cg4.2f + ROM_LOAD( "rv1cg5.1j", 0xa00000, 0x200000, CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) // == rv1cg5.2j + ROM_LOAD( "rv1cg6.1k", 0xc00000, 0x200000, CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) // == rv1cg6.2k + ROM_LOAD( "rv1cg7.1n", 0xe00000, 0x200000, CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) // == rv1cg7.2n + ROM_LOAD( "rv1cg0.2a", 0x000000, 0x200000, CRC(c518f06b) SHA1(4c01d453244192dd13087bdc72a7f7be80b47cbc) ) + ROM_LOAD( "rv1cg1.2c", 0x200000, 0x200000, CRC(6628f792) SHA1(7a5405c5fcb2f3f001ae17df393c31e61a834f2b) ) + ROM_LOAD( "rv1cg2.2d", 0x400000, 0x200000, CRC(0b707cc5) SHA1(38e1a554b278062edc369565353497ac4b016f78) ) + ROM_LOAD( "rv1cg3.2e", 0x600000, 0x200000, CRC(39b62921) SHA1(873287d81338baf10dd85214d82f6c38bfdf199e) ) + ROM_LOAD( "rv1cg4.2f", 0x800000, 0x200000, CRC(a9791ea2) SHA1(245b2ebbadd1fbca90dc241f88e9f6f341b2a01a) ) + ROM_LOAD( "rv1cg5.2j", 0xa00000, 0x200000, CRC(b2c79ec1) SHA1(6f669996863bdf1fe09b0c1a2a876625029d3d43) ) + ROM_LOAD( "rv1cg6.2k", 0xc00000, 0x200000, CRC(8cddedc2) SHA1(e3993f5505bc7e61bec7be5b48c873572e1220f7) ) + ROM_LOAD( "rv1cg7.2n", 0xe00000, 0x200000, CRC(b39147ca) SHA1(50ca6691fc809c95e6999dd52e39f2b8c2d22f3b) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "rv1ccrl.5a", 0x000000, 0x200000,CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) /* rv1ccrl.5l */ - ROM_LOAD( "rv1ccrh.5c", 0x200000, 0x080000,CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) /* rv1ccrh.5j */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "rv1ccrl.5a", 0x000000, 0x200000, CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) // == rv1ccrl.5l + ROM_LOAD( "rv1ccrh.5c", 0x200000, 0x080000, CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) // == rv1ccrh.5j + ROM_LOAD( "rv1ccrl.5l", 0x000000, 0x200000, CRC(bc634f72) SHA1(b5c504ed92bca7682614fc4c51f38cff607e6f2a) ) + ROM_LOAD( "rv1ccrh.5j", 0x200000, 0x080000, CRC(a741b262) SHA1(363076220a0eacc67befda05f8253963e8ffbcaa) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "rv1potl0.5b", 0x80000*0x0, 0x80000,CRC(de2ce519) SHA1(2fe0dd000571f76d1a4df6a439d40119125170ef) ) - ROM_LOAD( "rv1potl1.4b", 0x80000*0x1, 0x80000,CRC(2215cb5a) SHA1(d48ee692ab3dbcffdc49d22f6f232ca9390da766) ) - ROM_LOAD( "rv1potl2.3b", 0x80000*0x2, 0x80000,CRC(ddb15bf7) SHA1(4c54ec98e0cba10841d43a4ce593cdacfd7f90f8) ) - ROM_LOAD( "rv1potl3.2b", 0x80000*0x3, 0x80000,CRC(fa9361ca) SHA1(35a5c2712bca9c62400b724754de3a931ad21561) ) - ROM_LOAD( "rv1potm0.5c", 0x80000*0x4, 0x80000,CRC(3c024f3a) SHA1(711f0442823797b2d410352796a5cca66af98dce) ) - ROM_LOAD( "rv1potm1.4c", 0x80000*0x5, 0x80000,CRC(b1a32a68) SHA1(e24abb3a7e35d098abae5420bf8ef5c975718987) ) - ROM_LOAD( "rv1potm2.3c", 0x80000*0x6, 0x80000,CRC(a414fe15) SHA1(eb27cdca045ab2ab27dec179043328847fb65e11) ) - ROM_LOAD( "rv1potm3.2c", 0x80000*0x7, 0x80000,CRC(2953bbb4) SHA1(aca1acd87f7130d2522d0c6f8e60beeb7ab7495a) ) - ROM_LOAD( "rv1potu0.5d", 0x80000*0x8, 0x80000,CRC(b9eaf3cc) SHA1(3b2a9041f1fa90706ecf7d4fbff918516f891a07) ) - ROM_LOAD( "rv1potu1.4d", 0x80000*0x9, 0x80000,CRC(a5c55258) SHA1(826d4dde761aec7d848456f7bc4ba6268fe99605) ) - ROM_LOAD( "rv1potu2.3d", 0x80000*0xa, 0x80000,CRC(c18fcb74) SHA1(a4009ae2b014dc89aed4741fd97f84350117c2f4) ) - ROM_LOAD( "rv1potu3.2d", 0x80000*0xb, 0x80000,CRC(79735aaa) SHA1(1cf14274669b916a7641f7a16785da1b72347485) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "rv1potl0.5b", 0x000000, 0x080000, CRC(de2ce519) SHA1(2fe0dd000571f76d1a4df6a439d40119125170ef) ) + ROM_LOAD( "rv1potl1.4b", 0x080000, 0x080000, CRC(2215cb5a) SHA1(d48ee692ab3dbcffdc49d22f6f232ca9390da766) ) + ROM_LOAD( "rv1potl2.3b", 0x100000, 0x080000, CRC(ddb15bf7) SHA1(4c54ec98e0cba10841d43a4ce593cdacfd7f90f8) ) + ROM_LOAD( "rv1potl3.2b", 0x180000, 0x080000, CRC(fa9361ca) SHA1(35a5c2712bca9c62400b724754de3a931ad21561) ) + ROM_LOAD( "rv1potm0.5c", 0x200000, 0x080000, CRC(3c024f3a) SHA1(711f0442823797b2d410352796a5cca66af98dce) ) + ROM_LOAD( "rv1potm1.4c", 0x280000, 0x080000, CRC(b1a32a68) SHA1(e24abb3a7e35d098abae5420bf8ef5c975718987) ) + ROM_LOAD( "rv1potm2.3c", 0x300000, 0x080000, CRC(a414fe15) SHA1(eb27cdca045ab2ab27dec179043328847fb65e11) ) + ROM_LOAD( "rv1potm3.2c", 0x380000, 0x080000, CRC(2953bbb4) SHA1(aca1acd87f7130d2522d0c6f8e60beeb7ab7495a) ) + ROM_LOAD( "rv1potu0.5d", 0x400000, 0x080000, CRC(b9eaf3cc) SHA1(3b2a9041f1fa90706ecf7d4fbff918516f891a07) ) + ROM_LOAD( "rv1potu1.4d", 0x480000, 0x080000, CRC(a5c55258) SHA1(826d4dde761aec7d848456f7bc4ba6268fe99605) ) + ROM_LOAD( "rv1potu2.3d", 0x500000, 0x080000, CRC(c18fcb74) SHA1(a4009ae2b014dc89aed4741fd97f84350117c2f4) ) + ROM_LOAD( "rv1potu3.2d", 0x580000, 0x080000, CRC(79735aaa) SHA1(1cf14274669b916a7641f7a16785da1b72347485) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "rv1wav0.10r", 0x000000, 0x100000, CRC(5aef8143) SHA1(a75d31298e3ff9b290f238976a11e8b85cfb72d3) ) ROM_LOAD( "rv1wav1.10p", 0x200000, 0x100000, CRC(9ed9e6b3) SHA1(dd1da2b08d1b6aa0912daacc77744c9799aabb78) ) ROM_LOAD( "rv1wav2.10n", 0x100000, 0x100000, CRC(5af9dc83) SHA1(9aeb7f8217b806a6f3ed93056513af9fbcb6b372) ) ROM_LOAD( "rv1wav3.10l", 0x300000, 0x100000, CRC(ffb9ad75) SHA1(a9a61a597bd3bbe9732f92747d82264fe4d9af48) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom ROM_LOAD( "rv1eeprm.9e", 0x0000, 0x2000, CRC(e00dd412) SHA1(f594b31ace5e5e980e904faa8b83a450cc95db17) ) @@ -4502,51 +4532,55 @@ ROM_END ROM_START( cybrcomm ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "cy1prgll.4d", 0x00003, 0x80000, CRC(b3eab156) SHA1(2a5c4e0360c3b9500687a4d70f7110a0c30da2a5) ) ROM_LOAD32_BYTE( "cy1prglm.2d", 0x00002, 0x80000, CRC(884a5b0e) SHA1(0e27ae366b8a2695fe112b4740c8c9013bb97e26) ) ROM_LOAD32_BYTE( "cy1prgum.8d", 0x00001, 0x80000, CRC(c9c4a921) SHA1(76a52461165a8bd8d984a34063fbeb4cb73624af) ) ROM_LOAD32_BYTE( "cy1prguu.6d", 0x00000, 0x80000, CRC(5f22975b) SHA1(a1a5cb66358d64a3c564b912f2eeafa182786b1e) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "cy1data.6r", 0x00000, 0x20000, CRC(10d0005b) SHA1(10508eeaf74d24a611b44cd3bb12417ceb78904f) ) ROM_RELOAD( 0x20000, 0x20000) ROM_RELOAD( 0x40000, 0x20000) ROM_RELOAD( 0x60000, 0x20000) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "cyc1cg0.1a", 0x200000*0x4, 0x200000,CRC(e839b9bd) SHA1(fee43d37dcca7f1fb952a6bfb886b7ee30b7d75c) ) /* cyc1cg0.6a */ - ROM_LOAD( "cyc1cg1.2a", 0x200000*0x5, 0x200000,CRC(7d13993f) SHA1(96ac82bcc63afe395bae73f005eb66dad7742d48) ) /* cyc1cg1.7a */ - ROM_LOAD( "cyc1cg2.3a", 0x200000*0x6, 0x200000,CRC(7c464566) SHA1(69817ac3a7c6e43b960e8a904962b58b23417163) ) /* cyc1cg2.8a */ - ROM_LOAD( "cyc1cg3.5a", 0x200000*0x7, 0x200000,CRC(2222e16f) SHA1(562bcd4d43b1543303d8fd66d9f0d9a8e3702492) ) /* cyc1cg3.9a */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "cyc1cg0.1a", 0x800000, 0x200000, CRC(e839b9bd) SHA1(fee43d37dcca7f1fb952a6bfb886b7ee30b7d75c) ) // == cyc1cg0.6a + ROM_LOAD( "cyc1cg1.2a", 0xa00000, 0x200000, CRC(7d13993f) SHA1(96ac82bcc63afe395bae73f005eb66dad7742d48) ) // == cyc1cg1.7a + ROM_LOAD( "cyc1cg2.3a", 0xc00000, 0x200000, CRC(7c464566) SHA1(69817ac3a7c6e43b960e8a904962b58b23417163) ) // == cyc1cg2.8a + ROM_LOAD( "cyc1cg3.5a", 0xe00000, 0x200000, CRC(2222e16f) SHA1(562bcd4d43b1543303d8fd66d9f0d9a8e3702492) ) // == cyc1cg3.9a + ROM_LOAD( "cyc1cg0.6a", 0x800000, 0x200000, CRC(e839b9bd) SHA1(fee43d37dcca7f1fb952a6bfb886b7ee30b7d75c) ) + ROM_LOAD( "cyc1cg1.7a", 0xa00000, 0x200000, CRC(7d13993f) SHA1(96ac82bcc63afe395bae73f005eb66dad7742d48) ) + ROM_LOAD( "cyc1cg2.8a", 0xc00000, 0x200000, CRC(7c464566) SHA1(69817ac3a7c6e43b960e8a904962b58b23417163) ) + ROM_LOAD( "cyc1cg3.9a", 0xe00000, 0x200000, CRC(2222e16f) SHA1(562bcd4d43b1543303d8fd66d9f0d9a8e3702492) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - //cyc1ccrl.1c FIXED BITS (xxxxxxxx11xxxxxx) - ROM_LOAD( "cyc1ccrl.1c", 0x000000, 0x100000,CRC(1a0dc5f0) SHA1(bf0093d9cbdcb45a82705e966c48a1f408fa344e) ) /* cyc1ccrl.8c */ - //cyc1ccrh.2c 1xxxxxxxxxxxxxxxxxx = 0xFF - ROM_LOAD( "cyc1ccrh.2c", 0x200000, 0x080000,CRC(8c4090b8) SHA1(456d548a48833e840c5d39d47b2dcca03f8d6321) ) /* cyc1ccrh.7c */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "cyc1ccrl.1c", 0x000000, 0x100000, CRC(1a0dc5f0) SHA1(bf0093d9cbdcb45a82705e966c48a1f408fa344e) ) // == cyc1ccrl.8c - FIXED BITS xxxxxxxx11xxxxxx + ROM_LOAD( "cyc1ccrh.2c", 0x200000, 0x080000, CRC(8c4090b8) SHA1(456d548a48833e840c5d39d47b2dcca03f8d6321) ) // == cyc1ccrh.7c - 1xxxxxxxxxxxxxxxxxx = 0xFF + ROM_LOAD( "cyc1ccrl.8c", 0x000000, 0x100000, CRC(1a0dc5f0) SHA1(bf0093d9cbdcb45a82705e966c48a1f408fa344e) ) + ROM_LOAD( "cyc1ccrh.7c", 0x200000, 0x080000, CRC(8c4090b8) SHA1(456d548a48833e840c5d39d47b2dcca03f8d6321) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "cyc1ptl0.5b", 0x80000*0x0, 0x80000,CRC(d91de03d) SHA1(05819d285f6111867c41337bda9c4b9ad5394b6b) ) - ROM_LOAD( "cyc1ptl1.4b", 0x80000*0x1, 0x80000,CRC(e5b98021) SHA1(7416cbf74da969f822e0363ced7a25b967277e28) ) - ROM_LOAD( "cyc1ptl2.3b", 0x80000*0x2, 0x80000,CRC(7ba786c6) SHA1(1a5319dec495453bab9d70ae773a807f0036b355) ) - ROM_LOAD( "cyc1ptm0.5c", 0x80000*0x3, 0x80000,CRC(d454b5c6) SHA1(95ae6f0455e9fd7dff066e74cd4343c94d1bc212) ) - ROM_LOAD( "cyc1ptm1.4c", 0x80000*0x4, 0x80000,CRC(74fdf8cc) SHA1(f2627f400e247b6d4c4157eaf0ec69d57212e566) ) - ROM_LOAD( "cyc1ptm2.3c", 0x80000*0x5, 0x80000,CRC(b9c99a45) SHA1(c86cf594b416776eaf9a32c3cb9d34acc79777e9) ) - ROM_LOAD( "cyc1ptu0.5d", 0x80000*0x6, 0x80000,CRC(4d40897f) SHA1(ffe2a0ab66443553c83512f9a1be94b2e385cf2f) ) - ROM_LOAD( "cyc1ptu1.4d", 0x80000*0x7, 0x80000,CRC(3bdaeeeb) SHA1(826f97e2165af8569cfec03874b16030a9486559) ) - ROM_LOAD( "cyc1ptu2.3d", 0x80000*0x8, 0x80000,CRC(a0e73674) SHA1(1e22142a564e664031c12b250664fc82e3b3d43b) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "cyc1ptl0.5b", 0x000000, 0x080000, CRC(d91de03d) SHA1(05819d285f6111867c41337bda9c4b9ad5394b6b) ) + ROM_LOAD( "cyc1ptl1.4b", 0x080000, 0x080000, CRC(e5b98021) SHA1(7416cbf74da969f822e0363ced7a25b967277e28) ) + ROM_LOAD( "cyc1ptl2.3b", 0x100000, 0x080000, CRC(7ba786c6) SHA1(1a5319dec495453bab9d70ae773a807f0036b355) ) + ROM_LOAD( "cyc1ptm0.5c", 0x180000, 0x080000, CRC(d454b5c6) SHA1(95ae6f0455e9fd7dff066e74cd4343c94d1bc212) ) + ROM_LOAD( "cyc1ptm1.4c", 0x200000, 0x080000, CRC(74fdf8cc) SHA1(f2627f400e247b6d4c4157eaf0ec69d57212e566) ) + ROM_LOAD( "cyc1ptm2.3c", 0x280000, 0x080000, CRC(b9c99a45) SHA1(c86cf594b416776eaf9a32c3cb9d34acc79777e9) ) + ROM_LOAD( "cyc1ptu0.5d", 0x300000, 0x080000, CRC(4d40897f) SHA1(ffe2a0ab66443553c83512f9a1be94b2e385cf2f) ) + ROM_LOAD( "cyc1ptu1.4d", 0x380000, 0x080000, CRC(3bdaeeeb) SHA1(826f97e2165af8569cfec03874b16030a9486559) ) + ROM_LOAD( "cyc1ptu2.3d", 0x400000, 0x080000, CRC(a0e73674) SHA1(1e22142a564e664031c12b250664fc82e3b3d43b) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "cy1wav0.10r", 0x000000, 0x100000, CRC(c6f366a2) SHA1(795dbee09df159d3501c748fb3de16cca81742d6) ) ROM_LOAD( "cy1wav1.10p", 0x200000, 0x100000, CRC(f30b5e37) SHA1(9f5a94d82741ef9688c6e415ebb9009c906737c9) ) ROM_LOAD( "cy1wav2.10n", 0x100000, 0x100000, CRC(b98c1ca6) SHA1(4b66aa05f82be5ef3315acc30031872698ff4391) ) ROM_LOAD( "cy1wav3.10l", 0x300000, 0x100000, CRC(43dbac19) SHA1(83fd4ae4e7ec264fc217ed18caf59bf438af0c3d) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom ROM_LOAD( "cy1eeprm.9e", 0x0000, 0x2000, CRC(8432c066) SHA1(99d4bfda3f8aec288dbeaf291bce85fe9009a1de) ) @@ -4554,215 +4588,233 @@ ROM_END ROM_START( acedrive ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "ad2_prgll.4d", 0x00003, 0x80000, CRC(808c5ff8) SHA1(119c90ecb5aa099a0e5d1d7944c004beacead367) ) // Version 94/10/20 16:22:25 ROM_LOAD32_BYTE( "ad2_prglm.2d", 0x00002, 0x80000, CRC(5f726a10) SHA1(d077312c6a387fbdf906d278c73c6a3730687f32) ) ROM_LOAD32_BYTE( "ad2_prgum.8d", 0x00001, 0x80000, CRC(d5042d6e) SHA1(9ae93e7ea7126302831a879ba0aadcb6e5b842f5) ) ROM_LOAD32_BYTE( "ad2_prguu.6d", 0x00000, 0x80000, CRC(86d4661d) SHA1(2a1529a51ca5466994a2d0d84c7aab13cef95a11) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "ad1data.6r", 0, 0x080000, CRC(82024f74) SHA1(711ab0c4f027716aeab18e3a5d3d06fa82af8007) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ad1cg0.1a", 0x200000*0x4, 0x200000,CRC(faaa1ee2) SHA1(878f2b74587ed4d06c5110a0eb0020c49ddc5dfa) ) - ROM_LOAD( "ad1cg1.2a", 0x200000*0x5, 0x200000,CRC(1aab1eb7) SHA1(b8f9eeafec7e0de340cf48e38fa55dd14404c867) ) - ROM_LOAD( "ad1cg2.3a", 0x200000*0x6, 0x200000,CRC(cdcd1874) SHA1(5a7a4a0d897cca4956b0a4f178f39f618c921861) ) - ROM_LOAD( "ad1cg3.5a", 0x200000*0x7, 0x200000,CRC(effdd2cd) SHA1(9ff156e7e38c103b8fa6f3c29776dd38482d9cf2) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ad1cg0.1a", 0x800000, 0x200000, CRC(faaa1ee2) SHA1(878f2b74587ed4d06c5110a0eb0020c49ddc5dfa) ) + ROM_LOAD( "ad1cg1.2a", 0xa00000, 0x200000, CRC(1aab1eb7) SHA1(b8f9eeafec7e0de340cf48e38fa55dd14404c867) ) + ROM_LOAD( "ad1cg2.3a", 0xc00000, 0x200000, CRC(cdcd1874) SHA1(5a7a4a0d897cca4956b0a4f178f39f618c921861) ) + ROM_LOAD( "ad1cg3.5a", 0xe00000, 0x200000, CRC(effdd2cd) SHA1(9ff156e7e38c103b8fa6f3c29776dd38482d9cf2) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ad1ccrl.1c", 0x000000, 0x200000,CRC(bc3c9b12) SHA1(088e861e5c4b37c54b7f72963113a10870bf7927) ) - ROM_LOAD( "ad1ccrh.2c", 0x200000, 0x080000,CRC(71f44526) SHA1(bb4811fc5de626380ce6a17bee73e5e47926d850) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ad1ccrl.1c", 0x000000, 0x200000, CRC(bc3c9b12) SHA1(088e861e5c4b37c54b7f72963113a10870bf7927) ) + ROM_LOAD( "ad1ccrh.2c", 0x200000, 0x080000, CRC(71f44526) SHA1(bb4811fc5de626380ce6a17bee73e5e47926d850) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "ad1potl0.5b", 0x80000*0, 0x80000,CRC(dfc7e729) SHA1(5e3deef66d0a5dd2ff0584b8c8be4bf5e798e4d0) ) - ROM_LOAD( "ad1potl1.4b", 0x80000*1, 0x80000,CRC(5914ef8e) SHA1(f6db9c3061ceda76eef0a9538d9c048366b71124) ) - ROM_LOAD( "ad1potm0.5c", 0x80000*2, 0x80000,CRC(844bcd6b) SHA1(629b8dc0a7e94410c08c8874b69d9f4bc22f3e4f) ) - ROM_LOAD( "ad1potm1.4c", 0x80000*3, 0x80000,CRC(515cf541) SHA1(db1522813ea3e982d479cc1903d18799bf75aea9) ) - ROM_LOAD( "ad1potu0.5d", 0x80000*4, 0x80000,CRC(e0f44949) SHA1(ffdb64d600883974b05edaa9ed3071af355ee17f) ) - ROM_LOAD( "ad1potu1.4d", 0x80000*5, 0x80000,CRC(f2cd2cbb) SHA1(19fe6e3454a1e4353c7fe0a0d7a71742fea946de) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ad1potl0.5b", 0x000000, 0x080000, CRC(dfc7e729) SHA1(5e3deef66d0a5dd2ff0584b8c8be4bf5e798e4d0) ) + ROM_LOAD( "ad1potl1.4b", 0x080000, 0x080000, CRC(5914ef8e) SHA1(f6db9c3061ceda76eef0a9538d9c048366b71124) ) + ROM_LOAD( "ad1potm0.5c", 0x100000, 0x080000, CRC(844bcd6b) SHA1(629b8dc0a7e94410c08c8874b69d9f4bc22f3e4f) ) + ROM_LOAD( "ad1potm1.4c", 0x180000, 0x080000, CRC(515cf541) SHA1(db1522813ea3e982d479cc1903d18799bf75aea9) ) + ROM_LOAD( "ad1potu0.5d", 0x200000, 0x080000, CRC(e0f44949) SHA1(ffdb64d600883974b05edaa9ed3071af355ee17f) ) + ROM_LOAD( "ad1potu1.4d", 0x280000, 0x080000, CRC(f2cd2cbb) SHA1(19fe6e3454a1e4353c7fe0a0d7a71742fea946de) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples - ROM_LOAD( "ad1wave0.10r", 0x100000*0, 0x100000,CRC(c7879a72) SHA1(ae04d664858b0944583590ed0003a9420032d5ca) ) - ROM_LOAD( "ad1wave1.10p", 0x100000*2, 0x100000,CRC(69c1d41e) SHA1(b5cdfe7b75075c585dfd842347f8e4e692bb2781) ) - ROM_LOAD( "ad1wave2.10n", 0x100000*1, 0x100000,CRC(365a6831) SHA1(ddaa44a4436d6de120b64a5d130b1ee18f872e19) ) - ROM_LOAD( "ad1wave3.10l", 0x100000*3, 0x100000,CRC(cd8ecb0b) SHA1(7950b5a3a81f5554f57accabc7a623b8265a21a1) ) + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD( "ad1wave0.10r", 0x000000, 0x100000, CRC(c7879a72) SHA1(ae04d664858b0944583590ed0003a9420032d5ca) ) + ROM_LOAD( "ad1wave1.10p", 0x200000, 0x100000, CRC(69c1d41e) SHA1(b5cdfe7b75075c585dfd842347f8e4e692bb2781) ) + ROM_LOAD( "ad1wave2.10n", 0x100000, 0x100000, CRC(365a6831) SHA1(ddaa44a4436d6de120b64a5d130b1ee18f872e19) ) + ROM_LOAD( "ad1wave3.10l", 0x300000, 0x100000, CRC(cd8ecb0b) SHA1(7950b5a3a81f5554f57accabc7a623b8265a21a1) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( victlap ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "adv2_prgllb.4d", 0x00003, 0x80000, CRC(03ba6e42) SHA1(0e8138214463a6db59a6f7cbea3f0b6ed1b82465) ) // Version 96/05/21 19:39:59 ROM_LOAD32_BYTE( "adv2_prglmb.2d", 0x00002, 0x80000, CRC(9f4b49c0) SHA1(e8d5fc070f3855f11ef12b41bfd889f06acccd3d) ) ROM_LOAD32_BYTE( "adv2_prgumb.8d", 0x00001, 0x80000, CRC(ccad3e90) SHA1(16ccddf5114f1847808b0c5655aadd8ac040ff4e) ) ROM_LOAD32_BYTE( "adv2_prguub.6d", 0x00000, 0x80000, CRC(f3fffc41) SHA1(277cc5b24a094e4adff41d6d35ffc111bc8fef27) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "adv1data.6r", 0, 0x080000, CRC(10eecdb4) SHA1(aaedeed166614e6670e765e0d7e4e9eb5f38ad10) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "adv1cg0.2a", 0x200000*0x0, 0x200000,CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) - ROM_LOAD( "adv1cg1.1c", 0x200000*0x1, 0x200000,CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) - ROM_LOAD( "adv1cg2.2d", 0x200000*0x2, 0x200000,CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) - ROM_LOAD( "adv1cg3.1e", 0x200000*0x3, 0x200000,CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) - ROM_LOAD( "adv1cg4.2f", 0x200000*0x4, 0x200000,CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) - ROM_LOAD( "adv1cg5.1j", 0x200000*0x5, 0x200000,CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) - ROM_LOAD( "adv1cg6.2k", 0x200000*0x6, 0x200000,CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) - ROM_LOAD( "adv1cg7.1n", 0x200000*0x7, 0x200000,CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "adv1cg0.2a", 0x000000, 0x200000, CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) + ROM_LOAD( "adv1cg1.1c", 0x200000, 0x200000, CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) + ROM_LOAD( "adv1cg2.2d", 0x400000, 0x200000, CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) + ROM_LOAD( "adv1cg3.1e", 0x600000, 0x200000, CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) + ROM_LOAD( "adv1cg4.2f", 0x800000, 0x200000, CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) + ROM_LOAD( "adv1cg5.1j", 0xa00000, 0x200000, CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) + ROM_LOAD( "adv1cg6.2k", 0xc00000, 0x200000, CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) + ROM_LOAD( "adv1cg7.1n", 0xe00000, 0x200000, CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000,CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) /* ident to adv1ccrl.5l */ - ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000,CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) /* ident to adv1ccrh.5j */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000, CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) // == adv1ccrl.5l + ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000, CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) // == adv1ccrh.5j + ROM_LOAD( "adv1ccrl.5l", 0x000000, 0x200000, CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) + ROM_LOAD( "adv1ccrh.5j", 0x200000, 0x080000, CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "adv1pot.l0", 0x80000*0, 0x80000,CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) - ROM_LOAD( "adv1pot.l1", 0x80000*1, 0x80000,CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) - ROM_LOAD( "adv1pot.l2", 0x80000*2, 0x80000,CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) - ROM_LOAD( "adv1pot.m0", 0x80000*3, 0x80000,CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) - ROM_LOAD( "adv1pot.m1", 0x80000*4, 0x80000,CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) - ROM_LOAD( "adv1pot.m2", 0x80000*5, 0x80000,CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) - ROM_LOAD( "adv1pot.u0", 0x80000*6, 0x80000,CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) - ROM_LOAD( "adv1pot.u1", 0x80000*7, 0x80000,CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) - ROM_LOAD( "adv1pot.u2", 0x80000*8, 0x80000,CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "adv1pot.l0", 0x000000, 0x080000, CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) + ROM_LOAD( "adv1pot.l1", 0x080000, 0x080000, CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) + ROM_LOAD( "adv1pot.l2", 0x100000, 0x080000, CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) + ROM_LOAD( "adv1pot.m0", 0x180000, 0x080000, CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) + ROM_LOAD( "adv1pot.m1", 0x200000, 0x080000, CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) + ROM_LOAD( "adv1pot.m2", 0x280000, 0x080000, CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) + ROM_LOAD( "adv1pot.u0", 0x300000, 0x080000, CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) + ROM_LOAD( "adv1pot.u1", 0x380000, 0x080000, CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) + ROM_LOAD( "adv1pot.u2", 0x400000, 0x080000, CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "adv1wav0.10r", 0x000000, 0x100000, CRC(f07b2d9d) SHA1(fd46c23b336d5e9a748f7f8d825c19737125d2fb) ) ROM_LOAD( "adv1wav1.10p", 0x200000, 0x100000, CRC(737f3c7a) SHA1(4737994f146c0076e7270785f41f3a85c53c7c5f) ) ROM_LOAD( "adv1wav2.10n", 0x100000, 0x100000, CRC(c1a5ca5e) SHA1(27e6f9256d5fe5966e91d6be1e6e80900a764af1) ) ROM_LOAD( "adv1wav3.10l", 0x300000, 0x100000, CRC(fc6b8004) SHA1(5c9e0805895931ec2b6a43376059bdbf5777222f) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( victlapa ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "adv2_prgll.4d", 0x00003, 0x80000, CRC(4dc1b0ab) SHA1(b5913388d16f824af6dbb01b5b0350d510667a87) ) // Version 96/02/13 17:50:06 ROM_LOAD32_BYTE( "adv2_prglm.2d", 0x00002, 0x80000, CRC(7b658bef) SHA1(cf982b49fde0c1897c4c16e77f9eb2a145d8cd42) ) ROM_LOAD32_BYTE( "adv2_prgum.8d", 0x00001, 0x80000, CRC(af67f2fb) SHA1(f391843ee0d053e33660c60e3718871142d932f2) ) ROM_LOAD32_BYTE( "adv2_prguu.6d", 0x00000, 0x80000, CRC(b60e5d2b) SHA1(f5740615c2864c5c6433275cf4388bda5122b7a7) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "adv1data.6r", 0, 0x080000, CRC(10eecdb4) SHA1(aaedeed166614e6670e765e0d7e4e9eb5f38ad10) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "adv1cg0.2a", 0x200000*0x0, 0x200000,CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) - ROM_LOAD( "adv1cg1.1c", 0x200000*0x1, 0x200000,CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) - ROM_LOAD( "adv1cg2.2d", 0x200000*0x2, 0x200000,CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) - ROM_LOAD( "adv1cg3.1e", 0x200000*0x3, 0x200000,CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) - ROM_LOAD( "adv1cg4.2f", 0x200000*0x4, 0x200000,CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) - ROM_LOAD( "adv1cg5.1j", 0x200000*0x5, 0x200000,CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) - ROM_LOAD( "adv1cg6.2k", 0x200000*0x6, 0x200000,CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) - ROM_LOAD( "adv1cg7.1n", 0x200000*0x7, 0x200000,CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "adv1cg0.2a", 0x000000, 0x200000, CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) + ROM_LOAD( "adv1cg1.1c", 0x200000, 0x200000, CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) + ROM_LOAD( "adv1cg2.2d", 0x400000, 0x200000, CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) + ROM_LOAD( "adv1cg3.1e", 0x600000, 0x200000, CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) + ROM_LOAD( "adv1cg4.2f", 0x800000, 0x200000, CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) + ROM_LOAD( "adv1cg5.1j", 0xa00000, 0x200000, CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) + ROM_LOAD( "adv1cg6.2k", 0xc00000, 0x200000, CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) + ROM_LOAD( "adv1cg7.1n", 0xe00000, 0x200000, CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000,CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) /* ident to adv1ccrl.5l */ - ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000,CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) /* ident to adv1ccrh.5j */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000, CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) // == adv1ccrl.5l + ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000, CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) // == adv1ccrh.5j + ROM_LOAD( "adv1ccrl.5l", 0x000000, 0x200000, CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) + ROM_LOAD( "adv1ccrh.5j", 0x200000, 0x080000, CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "adv1pot.l0", 0x80000*0, 0x80000,CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) - ROM_LOAD( "adv1pot.l1", 0x80000*1, 0x80000,CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) - ROM_LOAD( "adv1pot.l2", 0x80000*2, 0x80000,CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) - ROM_LOAD( "adv1pot.m0", 0x80000*3, 0x80000,CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) - ROM_LOAD( "adv1pot.m1", 0x80000*4, 0x80000,CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) - ROM_LOAD( "adv1pot.m2", 0x80000*5, 0x80000,CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) - ROM_LOAD( "adv1pot.u0", 0x80000*6, 0x80000,CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) - ROM_LOAD( "adv1pot.u1", 0x80000*7, 0x80000,CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) - ROM_LOAD( "adv1pot.u2", 0x80000*8, 0x80000,CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "adv1pot.l0", 0x000000, 0x080000, CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) + ROM_LOAD( "adv1pot.l1", 0x080000, 0x080000, CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) + ROM_LOAD( "adv1pot.l2", 0x100000, 0x080000, CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) + ROM_LOAD( "adv1pot.m0", 0x180000, 0x080000, CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) + ROM_LOAD( "adv1pot.m1", 0x200000, 0x080000, CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) + ROM_LOAD( "adv1pot.m2", 0x280000, 0x080000, CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) + ROM_LOAD( "adv1pot.u0", 0x300000, 0x080000, CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) + ROM_LOAD( "adv1pot.u1", 0x380000, 0x080000, CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) + ROM_LOAD( "adv1pot.u2", 0x400000, 0x080000, CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "adv1wav0.10r", 0x000000, 0x100000, CRC(f07b2d9d) SHA1(fd46c23b336d5e9a748f7f8d825c19737125d2fb) ) ROM_LOAD( "adv1wav1.10p", 0x200000, 0x100000, CRC(737f3c7a) SHA1(4737994f146c0076e7270785f41f3a85c53c7c5f) ) ROM_LOAD( "adv1wav2.10n", 0x100000, 0x100000, CRC(c1a5ca5e) SHA1(27e6f9256d5fe5966e91d6be1e6e80900a764af1) ) ROM_LOAD( "adv1wav3.10l", 0x300000, 0x100000, CRC(fc6b8004) SHA1(5c9e0805895931ec2b6a43376059bdbf5777222f) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( victlapj ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x200000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "adv1_prgllc.4d", 0x00003, 0x80000, CRC(1c630018) SHA1(c4cddeb18c6b81c768e25489f1d5af0e9c0bbfa5) ) // Version 96/02/13 17:29:10 ROM_LOAD32_BYTE( "adv1_prglmc.2d", 0x00002, 0x80000, CRC(78413604) SHA1(08245cc1f8d97a166b6c0022fc03c423d92a3653) ) // Are these really Rev C?? ROM_LOAD32_BYTE( "adv1_prgumc.8d", 0x00001, 0x80000, CRC(464388d9) SHA1(afad780532aff175b0a547392e80c9f01efbf9d9) ) ROM_LOAD32_BYTE( "adv1_prguuc.6d", 0x00000, 0x80000, CRC(ad3cb5f9) SHA1(9a62043f60de4d4c82c5bec169ec975add271367) ) - ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */ + ROM_REGION16_LE( 0x80000, "mcu", 0 ) // sound data ROM_LOAD( "adv1data.6r", 0, 0x080000, CRC(10eecdb4) SHA1(aaedeed166614e6670e765e0d7e4e9eb5f38ad10) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "adv1cg0.2a", 0x200000*0x0, 0x200000,CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) - ROM_LOAD( "adv1cg1.1c", 0x200000*0x1, 0x200000,CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) - ROM_LOAD( "adv1cg2.2d", 0x200000*0x2, 0x200000,CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) - ROM_LOAD( "adv1cg3.1e", 0x200000*0x3, 0x200000,CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) - ROM_LOAD( "adv1cg4.2f", 0x200000*0x4, 0x200000,CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) - ROM_LOAD( "adv1cg5.1j", 0x200000*0x5, 0x200000,CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) - ROM_LOAD( "adv1cg6.2k", 0x200000*0x6, 0x200000,CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) - ROM_LOAD( "adv1cg7.1n", 0x200000*0x7, 0x200000,CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "adv1cg0.2a", 0x000000, 0x200000, CRC(13353848) SHA1(c6c7693e3cb086919daf9fcaf6bf602142213073) ) + ROM_LOAD( "adv1cg1.1c", 0x200000, 0x200000, CRC(1542066c) SHA1(20a053e919b7a81da2a17d31dc7482832a4d4ffe) ) + ROM_LOAD( "adv1cg2.2d", 0x400000, 0x200000, CRC(111f371c) SHA1(29d8062daae51b3c1712bd30baa9813a2b5b374d) ) + ROM_LOAD( "adv1cg3.1e", 0x600000, 0x200000, CRC(a077831f) SHA1(71bb95199b368e48bc474123ca84d19213f73137) ) + ROM_LOAD( "adv1cg4.2f", 0x800000, 0x200000, CRC(71abdacf) SHA1(64409e6aa40dd9e5a6dd1dc306860fbbf6ee7c3e) ) + ROM_LOAD( "adv1cg5.1j", 0xa00000, 0x200000, CRC(cd6cd798) SHA1(51070997a457c0ace078174569cd548ac2226b2d) ) + ROM_LOAD( "adv1cg6.2k", 0xc00000, 0x200000, CRC(94bdafba) SHA1(41e64fa99b342edd8b0ed95ae9869c23e03399e6) ) + ROM_LOAD( "adv1cg7.1n", 0xe00000, 0x200000, CRC(18823475) SHA1(a3244d665b59c352593de21f5cb8d55ddf8cee5c) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000,CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) /* ident to adv1ccrl.5l */ - ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000,CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) /* ident to adv1ccrh.5j */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "adv1ccrl.5a", 0x000000, 0x200000, CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) // == adv1ccrl.5l + ROM_LOAD( "adv1ccrh.5c", 0x200000, 0x080000, CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) // == adv1ccrh.5j + ROM_LOAD( "adv1ccrl.5l", 0x000000, 0x200000, CRC(dd2b96ae) SHA1(6337ce17e617234c27ebad578ba82451649aad9c) ) + ROM_LOAD( "adv1ccrh.5j", 0x200000, 0x080000, CRC(5719844a) SHA1(a17d7bc239235e9f566931ba4fee1d6ad7964d83) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "adv1pot.l0", 0x80000*0, 0x80000,CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) - ROM_LOAD( "adv1pot.l1", 0x80000*1, 0x80000,CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) - ROM_LOAD( "adv1pot.l2", 0x80000*2, 0x80000,CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) - ROM_LOAD( "adv1pot.m0", 0x80000*3, 0x80000,CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) - ROM_LOAD( "adv1pot.m1", 0x80000*4, 0x80000,CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) - ROM_LOAD( "adv1pot.m2", 0x80000*5, 0x80000,CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) - ROM_LOAD( "adv1pot.u0", 0x80000*6, 0x80000,CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) - ROM_LOAD( "adv1pot.u1", 0x80000*7, 0x80000,CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) - ROM_LOAD( "adv1pot.u2", 0x80000*8, 0x80000,CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "adv1pot.l0", 0x000000, 0x080000, CRC(3b85b2a4) SHA1(84c92ed0105618d4aa5508af344b4b6cfa772567) ) + ROM_LOAD( "adv1pot.l1", 0x080000, 0x080000, CRC(601d6488) SHA1(c7932103ba6070e17deb3cc06060eed7789f938e) ) + ROM_LOAD( "adv1pot.l2", 0x100000, 0x080000, CRC(a0323a84) SHA1(deadf9a47461df7b137759d6886e676137b39fd2) ) + ROM_LOAD( "adv1pot.m0", 0x180000, 0x080000, CRC(20951aa2) SHA1(3de55bded443a5b78699cec4845470b53b22301a) ) + ROM_LOAD( "adv1pot.m1", 0x200000, 0x080000, CRC(5aed6fbf) SHA1(8cee781d8a12e00635b9a1e5cc8d82e64b17e8f1) ) + ROM_LOAD( "adv1pot.m2", 0x280000, 0x080000, CRC(00cbff92) SHA1(09a11ba064aafc921a7ca0add5898d91b773f10a) ) + ROM_LOAD( "adv1pot.u0", 0x300000, 0x080000, CRC(6b73dd2a) SHA1(e3654ab2b62e4f3314558209e37c5636f871a6c7) ) + ROM_LOAD( "adv1pot.u1", 0x380000, 0x080000, CRC(c8788f74) SHA1(606e10b05146e3db824aa608745de80584420d12) ) + ROM_LOAD( "adv1pot.u2", 0x400000, 0x080000, CRC(e67f29c5) SHA1(16222afb4f1f494711dd00ebb347c824db333bae) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "adv1wav0.10r", 0x000000, 0x100000, CRC(f07b2d9d) SHA1(fd46c23b336d5e9a748f7f8d825c19737125d2fb) ) ROM_LOAD( "adv1wav1.10p", 0x200000, 0x100000, CRC(737f3c7a) SHA1(4737994f146c0076e7270785f41f3a85c53c7c5f) ) ROM_LOAD( "adv1wav2.10n", 0x100000, 0x100000, CRC(c1a5ca5e) SHA1(27e6f9256d5fe5966e91d6be1e6e80900a764af1) ) ROM_LOAD( "adv1wav3.10l", 0x300000, 0x100000, CRC(fc6b8004) SHA1(5c9e0805895931ec2b6a43376059bdbf5777222f) ) ROM_REGION( 0x300, "gamma_proms", 0 ) - ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) - ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.2d", 0x0000, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.3d", 0x0100, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) + ROM_LOAD( "rr1gam.4d", 0x0200, 0x0100, CRC(b2161bce) SHA1(d2681cc0cf8e68df0d942d392b4eb4458c4bb356) ) ROM_END ROM_START( propcycl ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "pr2ver-a.1", 0x00003, 0x100000, CRC(3f58594c) SHA1(5fdd8c61b47b51088a201799ce0c2f08c32ef852) ) - ROM_LOAD32_BYTE( "pr2ver-a.2", 0x00002, 0x100000, CRC(c0da354a) SHA1(f27a71a62385b842404fcd8ed6513158e3639b8f) ) - ROM_LOAD32_BYTE( "pr2ver-a.3", 0x00001, 0x100000, CRC(74bf4b74) SHA1(02713aa07238cc9e30163ae24d12c034aa972ff3) ) - ROM_LOAD32_BYTE( "pr2ver-a.4", 0x00000, 0x100000, CRC(cf4d5638) SHA1(2ddd00d6ec3b85c234820507650d201e176c94a2) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "pr2vera.1", 0x00003, 0x100000, CRC(3f58594c) SHA1(5fdd8c61b47b51088a201799ce0c2f08c32ef852) ) + ROM_LOAD32_BYTE( "pr2vera.2", 0x00002, 0x100000, CRC(c0da354a) SHA1(f27a71a62385b842404fcd8ed6513158e3639b8f) ) + ROM_LOAD32_BYTE( "pr2vera.3", 0x00001, 0x100000, CRC(74bf4b74) SHA1(02713aa07238cc9e30163ae24d12c034aa972ff3) ) + ROM_LOAD32_BYTE( "pr2vera.4", 0x00000, 0x100000, CRC(cf4d5638) SHA1(2ddd00d6ec3b85c234820507650d201e176c94a2) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* SS22-BIOS ver1.41 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // SS22-BIOS ver1.41 ROM_LOAD( "pr1data.8k", 0, 0x080000, CRC(2e5767a4) SHA1(390bf05c90044d841fe2dd4a427177fa1570b9a6) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "pr1scg0.12f", 0x200000*0, 0x200000,CRC(2d09a869) SHA1(ce8beabaac255e1de29d944c9866022bad713519) ) /* identical to "pr1scg0.12l" */ - ROM_LOAD( "pr1scg1.10f", 0x200000*1, 0x200000,CRC(7433c5bd) SHA1(a8fd4e73de66e3d443c0cb5b5beef8f467014815) ) /* identical to "pr1scg1.10l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "pr1scg0.12f", 0x000000, 0x200000, CRC(2d09a869) SHA1(ce8beabaac255e1de29d944c9866022bad713519) ) // == pr1scg0.12l + ROM_LOAD( "pr1scg1.10f", 0x200000, 0x200000, CRC(7433c5bd) SHA1(a8fd4e73de66e3d443c0cb5b5beef8f467014815) ) // == pr1scg1.10l + ROM_LOAD( "pr1scg0.12l", 0x000000, 0x200000, CRC(2d09a869) SHA1(ce8beabaac255e1de29d944c9866022bad713519) ) + ROM_LOAD( "pr1scg1.10l", 0x200000, 0x200000, CRC(7433c5bd) SHA1(a8fd4e73de66e3d443c0cb5b5beef8f467014815) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "pr1cg0.12b", 0x200000*0x0, 0x200000,CRC(0a041238) SHA1(da5688970432f7fe39337ee9fb46ca25a53fdb11) ) /* identical to "pr1cg0.8d" */ - ROM_LOAD( "pr1cg1.10d", 0x200000*0x1, 0x200000,CRC(7d09e6a7) SHA1(892317ee0bd796fa5c70d64912ef2e696792a2d4) ) /* identical to "pr1cg1.13b" */ - ROM_LOAD( "pr1cg2.12d", 0x200000*0x2, 0x200000,CRC(659f006e) SHA1(23362a922cb1100950181fac4858b953d8fc0794) ) /* identical to "pr1cg2.14b" */ - ROM_LOAD( "pr1cg3.13d", 0x200000*0x3, 0x200000,CRC(d30bffa3) SHA1(2f05227d91d257db9fa8cae114974de602d98729) ) /* identical to "pr1cg3.16b" */ - ROM_LOAD( "pr1cg4.14d", 0x200000*0x4, 0x200000,CRC(f4636cc9) SHA1(4e01a476e418e5790878572e83a8a11536ce30ae) ) /* identical to "pr1cg4.18b" */ - ROM_LOAD( "pr1cg5.16d", 0x200000*0x5, 0x200000,CRC(97d333de) SHA1(e8f8383f49aae834dd8b57231b25899703cef966) ) /* identical to "pr1cg5.19b" */ - ROM_LOAD( "pr1cg6.18a", 0x200000*0x6, 0x200000,CRC(3e081c03) SHA1(6ccb162952f6076359b2785b5d800b39a9a3c5ce) ) /* identical to "pr1cg6.18d" */ - ROM_LOAD( "pr1cg7.15a", 0x200000*0x7, 0x200000,CRC(ec9fc5c8) SHA1(16de614b26f06bbddae3ab56cebba45efd6fe81b) ) /* identical to "pr1cg7.19d" */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "pr1cg0.8d", 0x000000, 0x200000, CRC(0a041238) SHA1(da5688970432f7fe39337ee9fb46ca25a53fdb11) ) // == pr1cg0.12b + ROM_LOAD( "pr1cg1.10d", 0x200000, 0x200000, CRC(7d09e6a7) SHA1(892317ee0bd796fa5c70d64912ef2e696792a2d4) ) // == pr1cg1.13b + ROM_LOAD( "pr1cg2.12d", 0x400000, 0x200000, CRC(659f006e) SHA1(23362a922cb1100950181fac4858b953d8fc0794) ) // == pr1cg2.14b + ROM_LOAD( "pr1cg3.13d", 0x600000, 0x200000, CRC(d30bffa3) SHA1(2f05227d91d257db9fa8cae114974de602d98729) ) // == pr1cg3.16b + ROM_LOAD( "pr1cg4.14d", 0x800000, 0x200000, CRC(f4636cc9) SHA1(4e01a476e418e5790878572e83a8a11536ce30ae) ) // == pr1cg4.18b + ROM_LOAD( "pr1cg5.16d", 0xa00000, 0x200000, CRC(97d333de) SHA1(e8f8383f49aae834dd8b57231b25899703cef966) ) // == pr1cg5.19b + ROM_LOAD( "pr1cg6.18d", 0xc00000, 0x200000, CRC(3e081c03) SHA1(6ccb162952f6076359b2785b5d800b39a9a3c5ce) ) // == pr1cg6.18a + ROM_LOAD( "pr1cg7.19d", 0xe00000, 0x200000, CRC(ec9fc5c8) SHA1(16de614b26f06bbddae3ab56cebba45efd6fe81b) ) // == pr1cg7.15a + ROM_LOAD( "pr1cg0.12b", 0x000000, 0x200000, CRC(0a041238) SHA1(da5688970432f7fe39337ee9fb46ca25a53fdb11) ) + ROM_LOAD( "pr1cg1.13b", 0x200000, 0x200000, CRC(7d09e6a7) SHA1(892317ee0bd796fa5c70d64912ef2e696792a2d4) ) + ROM_LOAD( "pr1cg2.14b", 0x400000, 0x200000, CRC(659f006e) SHA1(23362a922cb1100950181fac4858b953d8fc0794) ) + ROM_LOAD( "pr1cg3.16b", 0x600000, 0x200000, CRC(d30bffa3) SHA1(2f05227d91d257db9fa8cae114974de602d98729) ) + ROM_LOAD( "pr1cg4.18b", 0x800000, 0x200000, CRC(f4636cc9) SHA1(4e01a476e418e5790878572e83a8a11536ce30ae) ) + ROM_LOAD( "pr1cg5.19b", 0xa00000, 0x200000, CRC(97d333de) SHA1(e8f8383f49aae834dd8b57231b25899703cef966) ) + ROM_LOAD( "pr1cg6.18a", 0xc00000, 0x200000, CRC(3e081c03) SHA1(6ccb162952f6076359b2785b5d800b39a9a3c5ce) ) + ROM_LOAD( "pr1cg7.15a", 0xe00000, 0x200000, CRC(ec9fc5c8) SHA1(16de614b26f06bbddae3ab56cebba45efd6fe81b) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "pr1ccrl.3d", 0x000000, 0x200000,CRC(e01321fd) SHA1(5938c6eff8e1b3642728c3be733f567a97cb5aad) ) /* identical to "pr1ccrl.7b" */ - ROM_LOAD( "pr1ccrh.1d", 0x200000, 0x080000,CRC(1d68bc31) SHA1(d534d0daebe7018e83b57cc7919c294ab89bddc8) ) /* identical to "pr1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "pr1ccrl.3d", 0x000000, 0x200000, CRC(e01321fd) SHA1(5938c6eff8e1b3642728c3be733f567a97cb5aad) ) // == pr1ccrl.7b + ROM_LOAD( "pr1ccrh.1d", 0x200000, 0x080000, CRC(1d68bc31) SHA1(d534d0daebe7018e83b57cc7919c294ab89bddc8) ) // == pr1ccrh.5b + ROM_LOAD( "pr1ccrl.7b", 0x000000, 0x200000, CRC(e01321fd) SHA1(5938c6eff8e1b3642728c3be733f567a97cb5aad) ) + ROM_LOAD( "pr1ccrh.5b", 0x200000, 0x080000, CRC(1d68bc31) SHA1(d534d0daebe7018e83b57cc7919c294ab89bddc8) ) /* These two ROMs define a huge texture tilemap using the tiles from "textile". * The tilemap has 0x100 columns. * @@ -4775,156 +4827,190 @@ ROM_START( propcycl ) * 0x1 = tile bank (used in some sys22 games) */ - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "pr1ptrl0.18k", 0x80000*0, 0x80000,CRC(fddb27a2) SHA1(6e837b45e3f9ed7ca3d1a457d0f0124de5618d1f) ) - ROM_LOAD( "pr1ptrl1.16k", 0x80000*1, 0x80000,CRC(6964dd06) SHA1(f38a550165504693d20892a7dcfaf01db19b04ef) ) - ROM_LOAD( "pr1ptrl2.15k", 0x80000*2, 0x80000,CRC(4d7ed1d4) SHA1(8f72864a06ff8962e640cb36d062bddf5d110308) ) - ROM_LOAD( "pr1ptrm0.18j", 0x80000*3, 0x80000,CRC(b6f204b7) SHA1(3b34f240b399b6406faaf338ae0ab536247e64a6) ) - ROM_LOAD( "pr1ptrm1.16j", 0x80000*4, 0x80000,CRC(949588b7) SHA1(fdaf50ff2496200b9c981efc18b035f3c0a96ace) ) - ROM_LOAD( "pr1ptrm2.15j", 0x80000*5, 0x80000,CRC(dc1cef0a) SHA1(8cbc02cf73fac3cc110b676d77602ae628385eae) ) - ROM_LOAD( "pr1ptru0.18f", 0x80000*6, 0x80000,CRC(5d66a7c4) SHA1(c9ed1c18724192d45c1f6b40096f15d02baf2401) ) - ROM_LOAD( "pr1ptru1.16f", 0x80000*7, 0x80000,CRC(e9a3f72b) SHA1(f967e1adf8eee4fffdf4288d36a93c5bb4f9a126) ) - ROM_LOAD( "pr1ptru2.15f", 0x80000*8, 0x80000,CRC(c346a842) SHA1(299bc0a30d0e74d8adfa3dc605aebf6439f5bc18) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "pr1ptrl0.18k", 0x000000, 0x080000, CRC(fddb27a2) SHA1(6e837b45e3f9ed7ca3d1a457d0f0124de5618d1f) ) + ROM_LOAD( "pr1ptrl1.16k", 0x080000, 0x080000, CRC(6964dd06) SHA1(f38a550165504693d20892a7dcfaf01db19b04ef) ) + ROM_LOAD( "pr1ptrl2.15k", 0x100000, 0x080000, CRC(4d7ed1d4) SHA1(8f72864a06ff8962e640cb36d062bddf5d110308) ) + ROM_LOAD( "pr1ptrm0.18j", 0x180000, 0x080000, CRC(b6f204b7) SHA1(3b34f240b399b6406faaf338ae0ab536247e64a6) ) + ROM_LOAD( "pr1ptrm1.16j", 0x200000, 0x080000, CRC(949588b7) SHA1(fdaf50ff2496200b9c981efc18b035f3c0a96ace) ) + ROM_LOAD( "pr1ptrm2.15j", 0x280000, 0x080000, CRC(dc1cef0a) SHA1(8cbc02cf73fac3cc110b676d77602ae628385eae) ) + ROM_LOAD( "pr1ptru0.18f", 0x300000, 0x080000, CRC(5d66a7c4) SHA1(c9ed1c18724192d45c1f6b40096f15d02baf2401) ) + ROM_LOAD( "pr1ptru1.16f", 0x380000, 0x080000, CRC(e9a3f72b) SHA1(f967e1adf8eee4fffdf4288d36a93c5bb4f9a126) ) + ROM_LOAD( "pr1ptru2.15f", 0x400000, 0x080000, CRC(c346a842) SHA1(299bc0a30d0e74d8adfa3dc605aebf6439f5bc18) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "pr1wavea.2l", 0x000000, 0x400000, CRC(320f3913) SHA1(3887b7334ca7762794c14198dd24bab47fcd9505) ) ROM_LOAD( "pr1waveb.1l", 0x800000, 0x400000, CRC(d91acb26) SHA1(c2161e2d70e08aed15cbc875ffee685190611daf) ) ROM_END ROM_START( propcyclj ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "pr1ver-a.1", 0x00003, 0x100000, CRC(dfea7ff7) SHA1(9c81b145d0b6fbe14e1c5ce93ea67dacb2567220) ) /* SYSTEM SUPER22 MPM(F8F) PCB stickered PR1 VER.A */ - ROM_LOAD32_BYTE( "pr1ver-a.2", 0x00002, 0x100000, CRC(84a6f608) SHA1(c05ff3fce709bcdb7c30f019ae794979ba79970c) ) /* Fujitsu MBM29F080 flash ROMs at ROM1 & ROM2 on the underside */ - ROM_LOAD32_BYTE( "pr1ver-a.3", 0x00001, 0x100000, CRC(77f957d2) SHA1(c8a62464f427cc858d9ea33446a8648e9171ead9) ) /* Fujitsu MBM29F080 flash ROMs at ROM3 & ROM4 on the upperside */ - ROM_LOAD32_BYTE( "pr1ver-a.4", 0x00000, 0x100000, CRC(7b6844e4) SHA1(1b1c03d258c4a6d95ae227de7741f29b7d9e28d8) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "pr1vera.1", 0x00003, 0x100000, CRC(dfea7ff7) SHA1(9c81b145d0b6fbe14e1c5ce93ea67dacb2567220) ) // SYSTEM SUPER22 MPM(F8F) PCB stickered PR1 VER.A + ROM_LOAD32_BYTE( "pr1vera.2", 0x00002, 0x100000, CRC(84a6f608) SHA1(c05ff3fce709bcdb7c30f019ae794979ba79970c) ) // Fujitsu MBM29F080 flash ROMs at ROM1 & ROM2 on the underside + ROM_LOAD32_BYTE( "pr1vera.3", 0x00001, 0x100000, CRC(77f957d2) SHA1(c8a62464f427cc858d9ea33446a8648e9171ead9) ) // Fujitsu MBM29F080 flash ROMs at ROM3 & ROM4 on the upperside + ROM_LOAD32_BYTE( "pr1vera.4", 0x00000, 0x100000, CRC(7b6844e4) SHA1(1b1c03d258c4a6d95ae227de7741f29b7d9e28d8) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* SS22-BIOS ver1.41 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // SS22-BIOS ver1.41 ROM_LOAD( "pr1data.8k", 0, 0x080000, CRC(2e5767a4) SHA1(390bf05c90044d841fe2dd4a427177fa1570b9a6) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "pr1scg0.12f", 0x200000*0, 0x200000,CRC(2d09a869) SHA1(ce8beabaac255e1de29d944c9866022bad713519) ) /* identical to "pr1scg0.12l" */ - ROM_LOAD( "pr1scg1.10f", 0x200000*1, 0x200000,CRC(7433c5bd) SHA1(a8fd4e73de66e3d443c0cb5b5beef8f467014815) ) /* identical to "pr1scg1.10l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "pr1scg0.12f", 0x000000, 0x200000, CRC(2d09a869) SHA1(ce8beabaac255e1de29d944c9866022bad713519) ) // == pr1scg0.12l + ROM_LOAD( "pr1scg1.10f", 0x200000, 0x200000, CRC(7433c5bd) SHA1(a8fd4e73de66e3d443c0cb5b5beef8f467014815) ) // == pr1scg1.10l + ROM_LOAD( "pr1scg0.12l", 0x000000, 0x200000, CRC(2d09a869) SHA1(ce8beabaac255e1de29d944c9866022bad713519) ) + ROM_LOAD( "pr1scg1.10l", 0x200000, 0x200000, CRC(7433c5bd) SHA1(a8fd4e73de66e3d443c0cb5b5beef8f467014815) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "pr1cg0.12b", 0x200000*0x0, 0x200000,CRC(0a041238) SHA1(da5688970432f7fe39337ee9fb46ca25a53fdb11) ) /* identical to "pr1cg0.8d" */ - ROM_LOAD( "pr1cg1.10d", 0x200000*0x1, 0x200000,CRC(7d09e6a7) SHA1(892317ee0bd796fa5c70d64912ef2e696792a2d4) ) /* identical to "pr1cg1.13b" */ - ROM_LOAD( "pr1cg2.12d", 0x200000*0x2, 0x200000,CRC(659f006e) SHA1(23362a922cb1100950181fac4858b953d8fc0794) ) /* identical to "pr1cg2.14b" */ - ROM_LOAD( "pr1cg3.13d", 0x200000*0x3, 0x200000,CRC(d30bffa3) SHA1(2f05227d91d257db9fa8cae114974de602d98729) ) /* identical to "pr1cg3.16b" */ - ROM_LOAD( "pr1cg4.14d", 0x200000*0x4, 0x200000,CRC(f4636cc9) SHA1(4e01a476e418e5790878572e83a8a11536ce30ae) ) /* identical to "pr1cg4.18b" */ - ROM_LOAD( "pr1cg5.16d", 0x200000*0x5, 0x200000,CRC(97d333de) SHA1(e8f8383f49aae834dd8b57231b25899703cef966) ) /* identical to "pr1cg5.19b" */ - ROM_LOAD( "pr1cg6.18a", 0x200000*0x6, 0x200000,CRC(3e081c03) SHA1(6ccb162952f6076359b2785b5d800b39a9a3c5ce) ) /* identical to "pr1cg6.18d" */ - ROM_LOAD( "pr1cg7.15a", 0x200000*0x7, 0x200000,CRC(ec9fc5c8) SHA1(16de614b26f06bbddae3ab56cebba45efd6fe81b) ) /* identical to "pr1cg7.19d" */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "pr1cg0.8d", 0x000000, 0x200000, CRC(0a041238) SHA1(da5688970432f7fe39337ee9fb46ca25a53fdb11) ) // == pr1cg0.12b + ROM_LOAD( "pr1cg1.10d", 0x200000, 0x200000, CRC(7d09e6a7) SHA1(892317ee0bd796fa5c70d64912ef2e696792a2d4) ) // == pr1cg1.13b + ROM_LOAD( "pr1cg2.12d", 0x400000, 0x200000, CRC(659f006e) SHA1(23362a922cb1100950181fac4858b953d8fc0794) ) // == pr1cg2.14b + ROM_LOAD( "pr1cg3.13d", 0x600000, 0x200000, CRC(d30bffa3) SHA1(2f05227d91d257db9fa8cae114974de602d98729) ) // == pr1cg3.16b + ROM_LOAD( "pr1cg4.14d", 0x800000, 0x200000, CRC(f4636cc9) SHA1(4e01a476e418e5790878572e83a8a11536ce30ae) ) // == pr1cg4.18b + ROM_LOAD( "pr1cg5.16d", 0xa00000, 0x200000, CRC(97d333de) SHA1(e8f8383f49aae834dd8b57231b25899703cef966) ) // == pr1cg5.19b + ROM_LOAD( "pr1cg6.18d", 0xc00000, 0x200000, CRC(3e081c03) SHA1(6ccb162952f6076359b2785b5d800b39a9a3c5ce) ) // == pr1cg6.18a + ROM_LOAD( "pr1cg7.19d", 0xe00000, 0x200000, CRC(ec9fc5c8) SHA1(16de614b26f06bbddae3ab56cebba45efd6fe81b) ) // == pr1cg7.15a + ROM_LOAD( "pr1cg0.12b", 0x000000, 0x200000, CRC(0a041238) SHA1(da5688970432f7fe39337ee9fb46ca25a53fdb11) ) + ROM_LOAD( "pr1cg1.13b", 0x200000, 0x200000, CRC(7d09e6a7) SHA1(892317ee0bd796fa5c70d64912ef2e696792a2d4) ) + ROM_LOAD( "pr1cg2.14b", 0x400000, 0x200000, CRC(659f006e) SHA1(23362a922cb1100950181fac4858b953d8fc0794) ) + ROM_LOAD( "pr1cg3.16b", 0x600000, 0x200000, CRC(d30bffa3) SHA1(2f05227d91d257db9fa8cae114974de602d98729) ) + ROM_LOAD( "pr1cg4.18b", 0x800000, 0x200000, CRC(f4636cc9) SHA1(4e01a476e418e5790878572e83a8a11536ce30ae) ) + ROM_LOAD( "pr1cg5.19b", 0xa00000, 0x200000, CRC(97d333de) SHA1(e8f8383f49aae834dd8b57231b25899703cef966) ) + ROM_LOAD( "pr1cg6.18a", 0xc00000, 0x200000, CRC(3e081c03) SHA1(6ccb162952f6076359b2785b5d800b39a9a3c5ce) ) + ROM_LOAD( "pr1cg7.15a", 0xe00000, 0x200000, CRC(ec9fc5c8) SHA1(16de614b26f06bbddae3ab56cebba45efd6fe81b) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "pr1ccrl.3d", 0x000000, 0x200000,CRC(e01321fd) SHA1(5938c6eff8e1b3642728c3be733f567a97cb5aad) ) /* identical to "pr1ccrl.7b" */ - ROM_LOAD( "pr1ccrh.1d", 0x200000, 0x080000,CRC(1d68bc31) SHA1(d534d0daebe7018e83b57cc7919c294ab89bddc8) ) /* identical to "pr1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "pr1ccrl.3d", 0x000000, 0x200000, CRC(e01321fd) SHA1(5938c6eff8e1b3642728c3be733f567a97cb5aad) ) // == pr1ccrl.7b + ROM_LOAD( "pr1ccrh.1d", 0x200000, 0x080000, CRC(1d68bc31) SHA1(d534d0daebe7018e83b57cc7919c294ab89bddc8) ) // == pr1ccrh.5b + ROM_LOAD( "pr1ccrl.7b", 0x000000, 0x200000, CRC(e01321fd) SHA1(5938c6eff8e1b3642728c3be733f567a97cb5aad) ) + ROM_LOAD( "pr1ccrh.5b", 0x200000, 0x080000, CRC(1d68bc31) SHA1(d534d0daebe7018e83b57cc7919c294ab89bddc8) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "pr1ptrl0.18k", 0x80000*0, 0x80000,CRC(fddb27a2) SHA1(6e837b45e3f9ed7ca3d1a457d0f0124de5618d1f) ) - ROM_LOAD( "pr1ptrl1.16k", 0x80000*1, 0x80000,CRC(6964dd06) SHA1(f38a550165504693d20892a7dcfaf01db19b04ef) ) - ROM_LOAD( "pr1ptrl2.15k", 0x80000*2, 0x80000,CRC(4d7ed1d4) SHA1(8f72864a06ff8962e640cb36d062bddf5d110308) ) - ROM_LOAD( "pr1ptrm0.18j", 0x80000*3, 0x80000,CRC(b6f204b7) SHA1(3b34f240b399b6406faaf338ae0ab536247e64a6) ) - ROM_LOAD( "pr1ptrm1.16j", 0x80000*4, 0x80000,CRC(949588b7) SHA1(fdaf50ff2496200b9c981efc18b035f3c0a96ace) ) - ROM_LOAD( "pr1ptrm2.15j", 0x80000*5, 0x80000,CRC(dc1cef0a) SHA1(8cbc02cf73fac3cc110b676d77602ae628385eae) ) - ROM_LOAD( "pr1ptru0.18f", 0x80000*6, 0x80000,CRC(5d66a7c4) SHA1(c9ed1c18724192d45c1f6b40096f15d02baf2401) ) - ROM_LOAD( "pr1ptru1.16f", 0x80000*7, 0x80000,CRC(e9a3f72b) SHA1(f967e1adf8eee4fffdf4288d36a93c5bb4f9a126) ) - ROM_LOAD( "pr1ptru2.15f", 0x80000*8, 0x80000,CRC(c346a842) SHA1(299bc0a30d0e74d8adfa3dc605aebf6439f5bc18) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "pr1ptrl0.18k", 0x000000, 0x080000, CRC(fddb27a2) SHA1(6e837b45e3f9ed7ca3d1a457d0f0124de5618d1f) ) + ROM_LOAD( "pr1ptrl1.16k", 0x080000, 0x080000, CRC(6964dd06) SHA1(f38a550165504693d20892a7dcfaf01db19b04ef) ) + ROM_LOAD( "pr1ptrl2.15k", 0x100000, 0x080000, CRC(4d7ed1d4) SHA1(8f72864a06ff8962e640cb36d062bddf5d110308) ) + ROM_LOAD( "pr1ptrm0.18j", 0x180000, 0x080000, CRC(b6f204b7) SHA1(3b34f240b399b6406faaf338ae0ab536247e64a6) ) + ROM_LOAD( "pr1ptrm1.16j", 0x200000, 0x080000, CRC(949588b7) SHA1(fdaf50ff2496200b9c981efc18b035f3c0a96ace) ) + ROM_LOAD( "pr1ptrm2.15j", 0x280000, 0x080000, CRC(dc1cef0a) SHA1(8cbc02cf73fac3cc110b676d77602ae628385eae) ) + ROM_LOAD( "pr1ptru0.18f", 0x300000, 0x080000, CRC(5d66a7c4) SHA1(c9ed1c18724192d45c1f6b40096f15d02baf2401) ) + ROM_LOAD( "pr1ptru1.16f", 0x380000, 0x080000, CRC(e9a3f72b) SHA1(f967e1adf8eee4fffdf4288d36a93c5bb4f9a126) ) + ROM_LOAD( "pr1ptru2.15f", 0x400000, 0x080000, CRC(c346a842) SHA1(299bc0a30d0e74d8adfa3dc605aebf6439f5bc18) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "pr1wavea.2l", 0x000000, 0x400000, CRC(320f3913) SHA1(3887b7334ca7762794c14198dd24bab47fcd9505) ) ROM_LOAD( "pr1waveb.1l", 0x800000, 0x400000, CRC(d91acb26) SHA1(c2161e2d70e08aed15cbc875ffee685190611daf) ) ROM_END ROM_START( airco22b ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x400000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "acs1verb.1", 0x00003, 0x100000, CRC(062c4f61) SHA1(98e1c75dd0f493eb6ebb64b46543217c1d40116e) ) ROM_LOAD32_BYTE( "acs1verb.2", 0x00002, 0x100000, CRC(8ae69711) SHA1(4c5323fa8f0419275e330fec66d1fb2b89bb3795) ) ROM_LOAD32_BYTE( "acs1verb.3", 0x00001, 0x100000, CRC(71738e67) SHA1(eb8c66dedbeff911b6166ebbda466fb9656ef0fb) ) ROM_LOAD32_BYTE( "acs1verb.4", 0x00000, 0x100000, CRC(3b193add) SHA1(5e3bca13905bfa3a2947f4f16ca01878b0a14a3a) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.20 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.20 ROM_LOAD( "acs1data.8k", 0, 0x080000, CRC(33824bc9) SHA1(80ec63883770e5eec1f5f1ddc16a85ef8f22a48b) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "acs1scg0.12l", 0x200000*0, 0x200000,CRC(e5235404) SHA1(3133b71d1bde3a9815cd02e97382b8078b62b0bb) ) - ROM_LOAD( "acs1scg1.10l", 0x200000*1, 0x200000,CRC(828e91e7) SHA1(8383b029cd29fbad107fd49e866defb50c11c99a) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "acs1scg0.12f", 0x000000, 0x200000, CRC(e5235404) SHA1(3133b71d1bde3a9815cd02e97382b8078b62b0bb) ) // == acs1scg0.12l + ROM_LOAD( "acs1scg1.10f", 0x200000, 0x200000, CRC(828e91e7) SHA1(8383b029cd29fbad107fd49e866defb50c11c99a) ) // == acs1scg1.10l + ROM_LOAD( "acs1scg0.12l", 0x000000, 0x200000, CRC(e5235404) SHA1(3133b71d1bde3a9815cd02e97382b8078b62b0bb) ) + ROM_LOAD( "acs1scg1.10l", 0x200000, 0x200000, CRC(828e91e7) SHA1(8383b029cd29fbad107fd49e866defb50c11c99a) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "acs1cg0.8d", 0x200000*0x0, 0x200000,CRC(1f31343e) SHA1(25ba730cec74e0ed0b404f5c4430b7c3368c9b52) ) - ROM_LOAD( "acs1cg1.10d", 0x200000*0x1, 0x200000,CRC(ccd5481d) SHA1(050e6fc7d4e0591f8ffc9552d140b6bd4533c06d) ) - ROM_LOAD( "acs1cg2.12d", 0x200000*0x2, 0x200000,CRC(14e5d0d2) SHA1(3147ad11098030e9cfd93fbc0a1b3aafa8b8aba6) ) - ROM_LOAD( "acs1cg3.13d", 0x200000*0x3, 0x200000,CRC(1a7bcc16) SHA1(bbc4ca5b208bea8394d1679e4e2d17d22331e2c8) ) - ROM_LOAD( "acs1cg4.14d", 0x200000*0x4, 0x200000,CRC(1920b7fb) SHA1(56318f2a96c55998bb9a8d791d56be3dfb39867e) ) - ROM_LOAD( "acs1cg5.16d", 0x200000*0x5, 0x200000,CRC(3dd109b7) SHA1(a7f914b9b80f1bca1afb6144698578a29ca74676) ) - ROM_LOAD( "acs1cg6.18d", 0x200000*0x6, 0x200000,CRC(ec71c8a3) SHA1(86892a91883d483ca0d422b78fa36042e02f3ad3) ) - ROM_LOAD( "acs1cg7.19d", 0x200000*0x7, 0x200000,CRC(82271757) SHA1(023c935e78b14da310e4c29da8785b82aa3241ac) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "acs1cg0.8d", 0x000000, 0x200000, CRC(1f31343e) SHA1(25ba730cec74e0ed0b404f5c4430b7c3368c9b52) ) // == acs1cg0.12b + ROM_LOAD( "acs1cg1.10d", 0x200000, 0x200000, CRC(ccd5481d) SHA1(050e6fc7d4e0591f8ffc9552d140b6bd4533c06d) ) // == acs1cg1.13b + ROM_LOAD( "acs1cg2.12d", 0x400000, 0x200000, CRC(14e5d0d2) SHA1(3147ad11098030e9cfd93fbc0a1b3aafa8b8aba6) ) // == acs1cg2.14b + ROM_LOAD( "acs1cg3.13d", 0x600000, 0x200000, CRC(1a7bcc16) SHA1(bbc4ca5b208bea8394d1679e4e2d17d22331e2c8) ) // == acs1cg3.16b + ROM_LOAD( "acs1cg4.14d", 0x800000, 0x200000, CRC(1920b7fb) SHA1(56318f2a96c55998bb9a8d791d56be3dfb39867e) ) // == acs1cg4.18b + ROM_LOAD( "acs1cg5.16d", 0xa00000, 0x200000, CRC(3dd109b7) SHA1(a7f914b9b80f1bca1afb6144698578a29ca74676) ) // == acs1cg5.19b + ROM_LOAD( "acs1cg6.18d", 0xc00000, 0x200000, CRC(ec71c8a3) SHA1(86892a91883d483ca0d422b78fa36042e02f3ad3) ) // == acs1cg6.18a + ROM_LOAD( "acs1cg7.19d", 0xe00000, 0x200000, CRC(82271757) SHA1(023c935e78b14da310e4c29da8785b82aa3241ac) ) // == acs1cg7.15a + ROM_LOAD( "acs1cg0.12b", 0x000000, 0x200000, CRC(1f31343e) SHA1(25ba730cec74e0ed0b404f5c4430b7c3368c9b52) ) + ROM_LOAD( "acs1cg1.13b", 0x200000, 0x200000, CRC(ccd5481d) SHA1(050e6fc7d4e0591f8ffc9552d140b6bd4533c06d) ) + ROM_LOAD( "acs1cg2.14b", 0x400000, 0x200000, CRC(14e5d0d2) SHA1(3147ad11098030e9cfd93fbc0a1b3aafa8b8aba6) ) + ROM_LOAD( "acs1cg3.16b", 0x600000, 0x200000, CRC(1a7bcc16) SHA1(bbc4ca5b208bea8394d1679e4e2d17d22331e2c8) ) + ROM_LOAD( "acs1cg4.18b", 0x800000, 0x200000, CRC(1920b7fb) SHA1(56318f2a96c55998bb9a8d791d56be3dfb39867e) ) + ROM_LOAD( "acs1cg5.19b", 0xa00000, 0x200000, CRC(3dd109b7) SHA1(a7f914b9b80f1bca1afb6144698578a29ca74676) ) + ROM_LOAD( "acs1cg6.18a", 0xc00000, 0x200000, CRC(ec71c8a3) SHA1(86892a91883d483ca0d422b78fa36042e02f3ad3) ) + ROM_LOAD( "acs1cg7.15a", 0xe00000, 0x200000, CRC(82271757) SHA1(023c935e78b14da310e4c29da8785b82aa3241ac) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "acs1ccrl.3d", 0x000000, 0x200000,CRC(07088ba1) SHA1(a962c0821d5af28ed508cfdbd613675454e306e3) ) - ROM_LOAD( "acs1ccrh.1d", 0x200000, 0x080000,CRC(62936af6) SHA1(ca80b68415aa2cd2ce4e90404f10640d0ae38be9) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "acs1ccrl.3d", 0x000000, 0x200000, CRC(07088ba1) SHA1(a962c0821d5af28ed508cfdbd613675454e306e3) ) // == acs1ccrl.7b + ROM_LOAD( "acs1ccrh.1d", 0x200000, 0x080000, CRC(62936af6) SHA1(ca80b68415aa2cd2ce4e90404f10640d0ae38be9) ) // == acs1ccrh.5b + ROM_LOAD( "acs1ccrl.7b", 0x000000, 0x200000, CRC(07088ba1) SHA1(a962c0821d5af28ed508cfdbd613675454e306e3) ) + ROM_LOAD( "acs1ccrh.5b", 0x200000, 0x080000, CRC(62936af6) SHA1(ca80b68415aa2cd2ce4e90404f10640d0ae38be9) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "acs1ptl0.18k", 0x80000*0x0, 0x80000,CRC(bd5896c7) SHA1(58ec7d0f1e0bfdbf4908e1d920bbd7f094993777) ) - ROM_LOAD( "acs1ptl1.16k", 0x80000*0x1, 0x80000,CRC(e583b975) SHA1(beb0cc2b44bc69af057c2bb744cd7e1b95de577a) ) - ROM_LOAD( "acs1ptl2.15k", 0x80000*0x2, 0x80000,CRC(802d737a) SHA1(3d99a369db70d13fb87c2ff26c82b4b39afe94d9) ) - ROM_LOAD( "acs1ptl3.14k", 0x80000*0x3, 0x80000,CRC(fe556ecb) SHA1(9d9dbbb4f1d3688fb763001834640d79d9987d47) ) - ROM_LOAD( "acs1ptm0.18j", 0x80000*0x4, 0x80000,CRC(949b6c58) SHA1(6ea016551b10f5d5764921dcc5a4b81d2b93d701) ) - ROM_LOAD( "acs1ptm1.16j", 0x80000*0x5, 0x80000,CRC(8b2b99d9) SHA1(89c3545c4035509307728a9577018c1100ce3a54) ) - ROM_LOAD( "acs1ptm2.15j", 0x80000*0x6, 0x80000,CRC(f1515080) SHA1(27a87217a140477a6840a610c95ae57abc0d01a6) ) - ROM_LOAD( "acs1ptm3.14j", 0x80000*0x7, 0x80000,CRC(e364f4aa) SHA1(3af6a864765871664cccad82c4795f677be68d51) ) - ROM_LOAD( "acs1ptu0.18f", 0x80000*0x8, 0x80000,CRC(746b3084) SHA1(73397d1f22300fb3a81a0a068da4d0a8cfdc0a36) ) - ROM_LOAD( "acs1ptu1.16f", 0x80000*0x9, 0x80000,CRC(b44f1d3b) SHA1(f3f1a85c082053653e4da7d7f01f1baef1a013c8) ) - ROM_LOAD( "acs1ptu2.15f", 0x80000*0xa, 0x80000,CRC(fdd2d778) SHA1(0269f971d778e908a1efb5a63b08fb3365d98c2a) ) - ROM_LOAD( "acs1ptu3.14f", 0x80000*0xb, 0x80000,CRC(38b425d4) SHA1(8ff6dd6775d42afdff4c9fb2232e4d72b38e515a) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "acs1ptl0.18k", 0x000000, 0x080000, CRC(bd5896c7) SHA1(58ec7d0f1e0bfdbf4908e1d920bbd7f094993777) ) + ROM_LOAD( "acs1ptl1.16k", 0x080000, 0x080000, CRC(e583b975) SHA1(beb0cc2b44bc69af057c2bb744cd7e1b95de577a) ) + ROM_LOAD( "acs1ptl2.15k", 0x100000, 0x080000, CRC(802d737a) SHA1(3d99a369db70d13fb87c2ff26c82b4b39afe94d9) ) + ROM_LOAD( "acs1ptl3.14k", 0x180000, 0x080000, CRC(fe556ecb) SHA1(9d9dbbb4f1d3688fb763001834640d79d9987d47) ) + ROM_LOAD( "acs1ptm0.18j", 0x200000, 0x080000, CRC(949b6c58) SHA1(6ea016551b10f5d5764921dcc5a4b81d2b93d701) ) + ROM_LOAD( "acs1ptm1.16j", 0x280000, 0x080000, CRC(8b2b99d9) SHA1(89c3545c4035509307728a9577018c1100ce3a54) ) + ROM_LOAD( "acs1ptm2.15j", 0x300000, 0x080000, CRC(f1515080) SHA1(27a87217a140477a6840a610c95ae57abc0d01a6) ) + ROM_LOAD( "acs1ptm3.14j", 0x380000, 0x080000, CRC(e364f4aa) SHA1(3af6a864765871664cccad82c4795f677be68d51) ) + ROM_LOAD( "acs1ptu0.18f", 0x400000, 0x080000, CRC(746b3084) SHA1(73397d1f22300fb3a81a0a068da4d0a8cfdc0a36) ) + ROM_LOAD( "acs1ptu1.16f", 0x480000, 0x080000, CRC(b44f1d3b) SHA1(f3f1a85c082053653e4da7d7f01f1baef1a013c8) ) + ROM_LOAD( "acs1ptu2.15f", 0x500000, 0x080000, CRC(fdd2d778) SHA1(0269f971d778e908a1efb5a63b08fb3365d98c2a) ) + ROM_LOAD( "acs1ptu3.14f", 0x580000, 0x080000, CRC(38b425d4) SHA1(8ff6dd6775d42afdff4c9fb2232e4d72b38e515a) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "acs1wav0.1", 0x400000, 0x400000, CRC(52fb9762) SHA1(125c163e62d701c2e17ba0b572ed27c944ca0412) ) ROM_LOAD( "acs1wav1.2", 0x800000, 0x400000, CRC(b568dca2) SHA1(503deb277691d801acac1380ded2868a5d5ac501) ) ROM_END ROM_START( cybrcycc ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "cb2ver-c.1", 0x00003, 0x100000, CRC(a8e07a14) SHA1(9bef7068c9bf792960df922ea79e4565d7680433) ) - ROM_LOAD32_BYTE( "cb2ver-c.2", 0x00002, 0x100000, CRC(054c504f) SHA1(9bde803ff09be0402f9b0388e55407362a2508e3) ) - ROM_LOAD32_BYTE( "cb2ver-c.3", 0x00001, 0x100000, CRC(47e6306c) SHA1(39d6fc2c3cb9b4c9d3569cedb79b916a90537115) ) - ROM_LOAD32_BYTE( "cb2ver-c.4", 0x00000, 0x100000, CRC(398426e4) SHA1(f20cd4892420e7b978baa51c9129b362422a3895) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "cb2verc.1", 0x00003, 0x100000, CRC(a8e07a14) SHA1(9bef7068c9bf792960df922ea79e4565d7680433) ) + ROM_LOAD32_BYTE( "cb2verc.2", 0x00002, 0x100000, CRC(054c504f) SHA1(9bde803ff09be0402f9b0388e55407362a2508e3) ) + ROM_LOAD32_BYTE( "cb2verc.3", 0x00001, 0x100000, CRC(47e6306c) SHA1(39d6fc2c3cb9b4c9d3569cedb79b916a90537115) ) + ROM_LOAD32_BYTE( "cb2verc.4", 0x00000, 0x100000, CRC(398426e4) SHA1(f20cd4892420e7b978baa51c9129b362422a3895) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "cb1datab.8k", 0, 0x080000, CRC(e2404221) SHA1(b88810dd45aee8a5475c30806cdfded25fa14e0e) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "cb1scg0.12f", 0x200000*0, 0x200000,CRC(7aaca90d) SHA1(9808819db5d86d555a03bb20a2fbedf060d04f0e) ) /* identical to "cb1scg0.12l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "cb1scg0.12f", 0x000000, 0x200000, CRC(7aaca90d) SHA1(9808819db5d86d555a03bb20a2fbedf060d04f0e) ) // == cb1scg0.12l + ROM_LOAD( "cb1scg0.12l", 0x000000, 0x200000, CRC(7aaca90d) SHA1(9808819db5d86d555a03bb20a2fbedf060d04f0e) ) // (intentionally loaded in at 0x000000) - ROM_REGION( 0x200000*7, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "cb1cg0.12b", 0x200000*0x0, 0x200000,CRC(762a47a0) SHA1(8a49c700dca7afec5d8d6a38fedcd3ad4b0e6713) ) /* identical to "cb1cg0.8d" */ - ROM_LOAD( "cb1cg1.10d", 0x200000*0x1, 0x200000,CRC(df92c3e6) SHA1(302d7ee7e073a45e7baa948543bd30251f903a6d) ) /* identical to "cb1cg1.13b" */ - ROM_LOAD( "cb1cg2.12d", 0x200000*0x2, 0x200000,CRC(07bc508e) SHA1(7675694d10b50e57bb10b350559bd321df75d1ea) ) /* identical to "cb1cg2.14b" */ - ROM_LOAD( "cb1cg3.13d", 0x200000*0x3, 0x200000,CRC(50c86dea) SHA1(7837a1d2bd3ade470f7fbc732513dd598badd219) ) /* identical to "cb1cg3.16b" */ - ROM_LOAD( "cb1cg4.14d", 0x200000*0x4, 0x200000,CRC(e93b8894) SHA1(4d28b557b7ed2667e6af9f970f3e99cda785b940) ) /* identical to "cb1cg4.18b" */ - ROM_LOAD( "cb1cg5.16d", 0x200000*0x5, 0x200000,CRC(9ee610a1) SHA1(ebc7892b6a66461ca6b6b912a264da1594340b2d) ) /* identical to "cb1cg5.19b" */ - ROM_LOAD( "cb1cg6.18a", 0x200000*0x6, 0x200000,CRC(ddc3b5cc) SHA1(34edffee9eb6fbf4a00fce0da34d9354b1a1155f) ) /* identical to "cb1cg6.18d" */ + ROM_REGION( 0xe00000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "cb1cg0.8d", 0x000000, 0x200000, CRC(762a47a0) SHA1(8a49c700dca7afec5d8d6a38fedcd3ad4b0e6713) ) // == cb1cg0.12b + ROM_LOAD( "cb1cg1.10d", 0x200000, 0x200000, CRC(df92c3e6) SHA1(302d7ee7e073a45e7baa948543bd30251f903a6d) ) // == cb1cg1.13b + ROM_LOAD( "cb1cg2.12d", 0x400000, 0x200000, CRC(07bc508e) SHA1(7675694d10b50e57bb10b350559bd321df75d1ea) ) // == cb1cg2.14b + ROM_LOAD( "cb1cg3.13d", 0x600000, 0x200000, CRC(50c86dea) SHA1(7837a1d2bd3ade470f7fbc732513dd598badd219) ) // == cb1cg3.16b + ROM_LOAD( "cb1cg4.14d", 0x800000, 0x200000, CRC(e93b8894) SHA1(4d28b557b7ed2667e6af9f970f3e99cda785b940) ) // == cb1cg4.18b + ROM_LOAD( "cb1cg5.16d", 0xa00000, 0x200000, CRC(9ee610a1) SHA1(ebc7892b6a66461ca6b6b912a264da1594340b2d) ) // == cb1cg5.19b + ROM_LOAD( "cb1cg6.18d", 0xc00000, 0x200000, CRC(ddc3b5cc) SHA1(34edffee9eb6fbf4a00fce0da34d9354b1a1155f) ) // == cb1cg6.18a + ROM_LOAD( "cb1cg0.12b", 0x000000, 0x200000, CRC(762a47a0) SHA1(8a49c700dca7afec5d8d6a38fedcd3ad4b0e6713) ) + ROM_LOAD( "cb1cg1.13b", 0x200000, 0x200000, CRC(df92c3e6) SHA1(302d7ee7e073a45e7baa948543bd30251f903a6d) ) + ROM_LOAD( "cb1cg2.14b", 0x400000, 0x200000, CRC(07bc508e) SHA1(7675694d10b50e57bb10b350559bd321df75d1ea) ) + ROM_LOAD( "cb1cg3.16b", 0x600000, 0x200000, CRC(50c86dea) SHA1(7837a1d2bd3ade470f7fbc732513dd598badd219) ) + ROM_LOAD( "cb1cg4.18b", 0x800000, 0x200000, CRC(e93b8894) SHA1(4d28b557b7ed2667e6af9f970f3e99cda785b940) ) + ROM_LOAD( "cb1cg5.19b", 0xa00000, 0x200000, CRC(9ee610a1) SHA1(ebc7892b6a66461ca6b6b912a264da1594340b2d) ) + ROM_LOAD( "cb1cg6.18a", 0xc00000, 0x200000, CRC(ddc3b5cc) SHA1(34edffee9eb6fbf4a00fce0da34d9354b1a1155f) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "cb1ccrl.3d", 0x000000, 0x200000,CRC(2f171c48) SHA1(52b76213e37379b4a5cea7de40cf5396dc2998d8) ) /* identical to "cb1ccrl.7b" */ - ROM_LOAD( "cb1ccrh.1d", 0x200000, 0x080000,CRC(86124b93) SHA1(f2cfd726313cbeff162d402a15de2360377630e7) ) /* identical to "cb1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "cb1ccrl.3d", 0x000000, 0x200000, CRC(2f171c48) SHA1(52b76213e37379b4a5cea7de40cf5396dc2998d8) ) // == cb1ccrl.7b + ROM_LOAD( "cb1ccrh.1d", 0x200000, 0x080000, CRC(86124b93) SHA1(f2cfd726313cbeff162d402a15de2360377630e7) ) // == cb1ccrh.5b + ROM_LOAD( "cb1ccrl.7b", 0x000000, 0x200000, CRC(2f171c48) SHA1(52b76213e37379b4a5cea7de40cf5396dc2998d8) ) + ROM_LOAD( "cb1ccrh.5b", 0x200000, 0x080000, CRC(86124b93) SHA1(f2cfd726313cbeff162d402a15de2360377630e7) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "cb1ptrl0.18k", 0x80000*0x0, 0x80000,CRC(f1393a03) SHA1(c9e808601eef5839e6bff630e5f83380e073c5c0) ) - ROM_LOAD( "cb1ptrl1.16k", 0x80000*0x1, 0x80000,CRC(2ad51de7) SHA1(efd102b960ca10cda70da84661acf61e4bbb9f00) ) - ROM_LOAD( "cb1ptrl2.15k", 0x80000*0x2, 0x80000,CRC(78f77c0d) SHA1(5183a8909c2ac0a3d80e707393bcbb4441d79a3c) ) - ROM_LOAD( "cb1ptrl3.14k", 0x80000*0x3, 0x80000,CRC(804bfb4a) SHA1(74b3fc3931265398e23605d3da7ca84a002da632) ) - ROM_LOAD( "cb1ptrm0.18j", 0x80000*0x4, 0x80000,CRC(f4eece49) SHA1(3f34d1ae5986f0d340563ab0fb637bfdacb8712c) ) - ROM_LOAD( "cb1ptrm1.16j", 0x80000*0x5, 0x80000,CRC(5f3cbd7d) SHA1(d00d0a96b71d6a3b98907c4ba7c702e549dd0adb) ) - ROM_LOAD( "cb1ptrm2.15j", 0x80000*0x6, 0x80000,CRC(02c7e4af) SHA1(6a541a28163b1026a824f6f8aed05d0eb0c8ae93) ) - ROM_LOAD( "cb1ptrm3.14j", 0x80000*0x7, 0x80000,CRC(ace3123b) SHA1(2b590ed967572d77b3cc6b37e341a5bdc55c762f) ) - ROM_LOAD( "cb1ptru0.18f", 0x80000*0x8, 0x80000,CRC(58d35341) SHA1(a5fe00bdcf39521f0465743664ff0dd78be5d6e8) ) - ROM_LOAD( "cb1ptru1.16f", 0x80000*0x9, 0x80000,CRC(f4d005b0) SHA1(0862ed1dd0818bfb765d97f1f9d996c321b0ec83) ) - ROM_LOAD( "cb1ptru2.15f", 0x80000*0xa, 0x80000,CRC(68ffcd50) SHA1(5ca5f71b6b079fde14d76c869d211a815bffae68) ) - ROM_LOAD( "cb1ptru3.14f", 0x80000*0xb, 0x80000,CRC(d89c1c2b) SHA1(9c25df696b2d120ce33d7774381460297740007a) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "cb1ptrl0.18k", 0x000000, 0x080000, CRC(f1393a03) SHA1(c9e808601eef5839e6bff630e5f83380e073c5c0) ) + ROM_LOAD( "cb1ptrl1.16k", 0x080000, 0x080000, CRC(2ad51de7) SHA1(efd102b960ca10cda70da84661acf61e4bbb9f00) ) + ROM_LOAD( "cb1ptrl2.15k", 0x100000, 0x080000, CRC(78f77c0d) SHA1(5183a8909c2ac0a3d80e707393bcbb4441d79a3c) ) + ROM_LOAD( "cb1ptrl3.14k", 0x180000, 0x080000, CRC(804bfb4a) SHA1(74b3fc3931265398e23605d3da7ca84a002da632) ) + ROM_LOAD( "cb1ptrm0.18j", 0x200000, 0x080000, CRC(f4eece49) SHA1(3f34d1ae5986f0d340563ab0fb637bfdacb8712c) ) + ROM_LOAD( "cb1ptrm1.16j", 0x280000, 0x080000, CRC(5f3cbd7d) SHA1(d00d0a96b71d6a3b98907c4ba7c702e549dd0adb) ) + ROM_LOAD( "cb1ptrm2.15j", 0x300000, 0x080000, CRC(02c7e4af) SHA1(6a541a28163b1026a824f6f8aed05d0eb0c8ae93) ) + ROM_LOAD( "cb1ptrm3.14j", 0x380000, 0x080000, CRC(ace3123b) SHA1(2b590ed967572d77b3cc6b37e341a5bdc55c762f) ) + ROM_LOAD( "cb1ptru0.18f", 0x400000, 0x080000, CRC(58d35341) SHA1(a5fe00bdcf39521f0465743664ff0dd78be5d6e8) ) + ROM_LOAD( "cb1ptru1.16f", 0x480000, 0x080000, CRC(f4d005b0) SHA1(0862ed1dd0818bfb765d97f1f9d996c321b0ec83) ) + ROM_LOAD( "cb1ptru2.15f", 0x500000, 0x080000, CRC(68ffcd50) SHA1(5ca5f71b6b079fde14d76c869d211a815bffae68) ) + ROM_LOAD( "cb1ptru3.14f", 0x580000, 0x080000, CRC(d89c1c2b) SHA1(9c25df696b2d120ce33d7774381460297740007a) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "cb1wavea.2l", 0x000000, 0x400000, CRC(b79a624d) SHA1(c0ee358a183ba6d0835731dbdd191b64718fde6e) ) ROM_LOAD( "cb1waveb.1l", 0x800000, 0x200000, CRC(33bf08f6) SHA1(bf9d68b26a8158ea1abfe8428b7454cac25242c5) ) @@ -4933,46 +5019,56 @@ ROM_START( cybrcycc ) ROM_END ROM_START( cybrcyccj ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "cb1ver-c.1", 0x00003, 0x100000, CRC(91166c69) SHA1(08e4d0d8226234b01b7d4fbc8ba2ade1ae409fe4) ) - ROM_LOAD32_BYTE( "cb1ver-c.2", 0x00002, 0x100000, CRC(b2e25e15) SHA1(095df28601dbc98b8974cd99b9329312980eacaf) ) - ROM_LOAD32_BYTE( "cb1ver-c.3", 0x00001, 0x100000, CRC(97fa2f39) SHA1(865e016553f733430aac70809b21a3b2914bb638) ) - ROM_LOAD32_BYTE( "cb1ver-c.4", 0x00000, 0x100000, CRC(529bd227) SHA1(6d7979643d015ae388a4a93b9dccc7f43f93baff) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "cb1verc.1", 0x00003, 0x100000, CRC(91166c69) SHA1(08e4d0d8226234b01b7d4fbc8ba2ade1ae409fe4) ) + ROM_LOAD32_BYTE( "cb1verc.2", 0x00002, 0x100000, CRC(b2e25e15) SHA1(095df28601dbc98b8974cd99b9329312980eacaf) ) + ROM_LOAD32_BYTE( "cb1verc.3", 0x00001, 0x100000, CRC(97fa2f39) SHA1(865e016553f733430aac70809b21a3b2914bb638) ) + ROM_LOAD32_BYTE( "cb1verc.4", 0x00000, 0x100000, CRC(529bd227) SHA1(6d7979643d015ae388a4a93b9dccc7f43f93baff) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "cb1datab.8k", 0, 0x080000, CRC(e2404221) SHA1(b88810dd45aee8a5475c30806cdfded25fa14e0e) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "cb1scg0.12f", 0x200000*0, 0x200000,CRC(7aaca90d) SHA1(9808819db5d86d555a03bb20a2fbedf060d04f0e) ) /* identical to "cb1scg0.12l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "cb1scg0.12f", 0x000000, 0x200000, CRC(7aaca90d) SHA1(9808819db5d86d555a03bb20a2fbedf060d04f0e) ) // == cb1scg0.12l + ROM_LOAD( "cb1scg0.12l", 0x000000, 0x200000, CRC(7aaca90d) SHA1(9808819db5d86d555a03bb20a2fbedf060d04f0e) ) // (intentionally loaded in at 0x000000) - ROM_REGION( 0x200000*7, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "cb1cg0.12b", 0x200000*0x0, 0x200000,CRC(762a47a0) SHA1(8a49c700dca7afec5d8d6a38fedcd3ad4b0e6713) ) /* identical to "cb1cg0.8d" */ - ROM_LOAD( "cb1cg1.10d", 0x200000*0x1, 0x200000,CRC(df92c3e6) SHA1(302d7ee7e073a45e7baa948543bd30251f903a6d) ) /* identical to "cb1cg1.13b" */ - ROM_LOAD( "cb1cg2.12d", 0x200000*0x2, 0x200000,CRC(07bc508e) SHA1(7675694d10b50e57bb10b350559bd321df75d1ea) ) /* identical to "cb1cg2.14b" */ - ROM_LOAD( "cb1cg3.13d", 0x200000*0x3, 0x200000,CRC(50c86dea) SHA1(7837a1d2bd3ade470f7fbc732513dd598badd219) ) /* identical to "cb1cg3.16b" */ - ROM_LOAD( "cb1cg4.14d", 0x200000*0x4, 0x200000,CRC(e93b8894) SHA1(4d28b557b7ed2667e6af9f970f3e99cda785b940) ) /* identical to "cb1cg4.18b" */ - ROM_LOAD( "cb1cg5.16d", 0x200000*0x5, 0x200000,CRC(9ee610a1) SHA1(ebc7892b6a66461ca6b6b912a264da1594340b2d) ) /* identical to "cb1cg5.19b" */ - ROM_LOAD( "cb1cg6.18a", 0x200000*0x6, 0x200000,CRC(ddc3b5cc) SHA1(34edffee9eb6fbf4a00fce0da34d9354b1a1155f) ) /* identical to "cb1cg6.18d" */ + ROM_REGION( 0xe00000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "cb1cg0.8d", 0x000000, 0x200000, CRC(762a47a0) SHA1(8a49c700dca7afec5d8d6a38fedcd3ad4b0e6713) ) // == cb1cg0.12b + ROM_LOAD( "cb1cg1.10d", 0x200000, 0x200000, CRC(df92c3e6) SHA1(302d7ee7e073a45e7baa948543bd30251f903a6d) ) // == cb1cg1.13b + ROM_LOAD( "cb1cg2.12d", 0x400000, 0x200000, CRC(07bc508e) SHA1(7675694d10b50e57bb10b350559bd321df75d1ea) ) // == cb1cg2.14b + ROM_LOAD( "cb1cg3.13d", 0x600000, 0x200000, CRC(50c86dea) SHA1(7837a1d2bd3ade470f7fbc732513dd598badd219) ) // == cb1cg3.16b + ROM_LOAD( "cb1cg4.14d", 0x800000, 0x200000, CRC(e93b8894) SHA1(4d28b557b7ed2667e6af9f970f3e99cda785b940) ) // == cb1cg4.18b + ROM_LOAD( "cb1cg5.16d", 0xa00000, 0x200000, CRC(9ee610a1) SHA1(ebc7892b6a66461ca6b6b912a264da1594340b2d) ) // == cb1cg5.19b + ROM_LOAD( "cb1cg6.18d", 0xc00000, 0x200000, CRC(ddc3b5cc) SHA1(34edffee9eb6fbf4a00fce0da34d9354b1a1155f) ) // == cb1cg6.18a + ROM_LOAD( "cb1cg0.12b", 0x000000, 0x200000, CRC(762a47a0) SHA1(8a49c700dca7afec5d8d6a38fedcd3ad4b0e6713) ) + ROM_LOAD( "cb1cg1.13b", 0x200000, 0x200000, CRC(df92c3e6) SHA1(302d7ee7e073a45e7baa948543bd30251f903a6d) ) + ROM_LOAD( "cb1cg2.14b", 0x400000, 0x200000, CRC(07bc508e) SHA1(7675694d10b50e57bb10b350559bd321df75d1ea) ) + ROM_LOAD( "cb1cg3.16b", 0x600000, 0x200000, CRC(50c86dea) SHA1(7837a1d2bd3ade470f7fbc732513dd598badd219) ) + ROM_LOAD( "cb1cg4.18b", 0x800000, 0x200000, CRC(e93b8894) SHA1(4d28b557b7ed2667e6af9f970f3e99cda785b940) ) + ROM_LOAD( "cb1cg5.19b", 0xa00000, 0x200000, CRC(9ee610a1) SHA1(ebc7892b6a66461ca6b6b912a264da1594340b2d) ) + ROM_LOAD( "cb1cg6.18a", 0xc00000, 0x200000, CRC(ddc3b5cc) SHA1(34edffee9eb6fbf4a00fce0da34d9354b1a1155f) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "cb1ccrl.3d", 0x000000, 0x200000,CRC(2f171c48) SHA1(52b76213e37379b4a5cea7de40cf5396dc2998d8) ) /* identical to "cb1ccrl.7b" */ - ROM_LOAD( "cb1ccrh.1d", 0x200000, 0x080000,CRC(86124b93) SHA1(f2cfd726313cbeff162d402a15de2360377630e7) ) /* identical to "cb1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "cb1ccrl.3d", 0x000000, 0x200000, CRC(2f171c48) SHA1(52b76213e37379b4a5cea7de40cf5396dc2998d8) ) // == cb1ccrl.7b + ROM_LOAD( "cb1ccrh.1d", 0x200000, 0x080000, CRC(86124b93) SHA1(f2cfd726313cbeff162d402a15de2360377630e7) ) // == cb1ccrh.5b + ROM_LOAD( "cb1ccrl.7b", 0x000000, 0x200000, CRC(2f171c48) SHA1(52b76213e37379b4a5cea7de40cf5396dc2998d8) ) + ROM_LOAD( "cb1ccrh.5b", 0x200000, 0x080000, CRC(86124b93) SHA1(f2cfd726313cbeff162d402a15de2360377630e7) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "cb1ptrl0.18k", 0x80000*0x0, 0x80000,CRC(f1393a03) SHA1(c9e808601eef5839e6bff630e5f83380e073c5c0) ) - ROM_LOAD( "cb1ptrl1.16k", 0x80000*0x1, 0x80000,CRC(2ad51de7) SHA1(efd102b960ca10cda70da84661acf61e4bbb9f00) ) - ROM_LOAD( "cb1ptrl2.15k", 0x80000*0x2, 0x80000,CRC(78f77c0d) SHA1(5183a8909c2ac0a3d80e707393bcbb4441d79a3c) ) - ROM_LOAD( "cb1ptrl3.14k", 0x80000*0x3, 0x80000,CRC(804bfb4a) SHA1(74b3fc3931265398e23605d3da7ca84a002da632) ) - ROM_LOAD( "cb1ptrm0.18j", 0x80000*0x4, 0x80000,CRC(f4eece49) SHA1(3f34d1ae5986f0d340563ab0fb637bfdacb8712c) ) - ROM_LOAD( "cb1ptrm1.16j", 0x80000*0x5, 0x80000,CRC(5f3cbd7d) SHA1(d00d0a96b71d6a3b98907c4ba7c702e549dd0adb) ) - ROM_LOAD( "cb1ptrm2.15j", 0x80000*0x6, 0x80000,CRC(02c7e4af) SHA1(6a541a28163b1026a824f6f8aed05d0eb0c8ae93) ) - ROM_LOAD( "cb1ptrm3.14j", 0x80000*0x7, 0x80000,CRC(ace3123b) SHA1(2b590ed967572d77b3cc6b37e341a5bdc55c762f) ) - ROM_LOAD( "cb1ptru0.18f", 0x80000*0x8, 0x80000,CRC(58d35341) SHA1(a5fe00bdcf39521f0465743664ff0dd78be5d6e8) ) - ROM_LOAD( "cb1ptru1.16f", 0x80000*0x9, 0x80000,CRC(f4d005b0) SHA1(0862ed1dd0818bfb765d97f1f9d996c321b0ec83) ) - ROM_LOAD( "cb1ptru2.15f", 0x80000*0xa, 0x80000,CRC(68ffcd50) SHA1(5ca5f71b6b079fde14d76c869d211a815bffae68) ) - ROM_LOAD( "cb1ptru3.14f", 0x80000*0xb, 0x80000,CRC(d89c1c2b) SHA1(9c25df696b2d120ce33d7774381460297740007a) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "cb1ptrl0.18k", 0x000000, 0x080000, CRC(f1393a03) SHA1(c9e808601eef5839e6bff630e5f83380e073c5c0) ) + ROM_LOAD( "cb1ptrl1.16k", 0x080000, 0x080000, CRC(2ad51de7) SHA1(efd102b960ca10cda70da84661acf61e4bbb9f00) ) + ROM_LOAD( "cb1ptrl2.15k", 0x100000, 0x080000, CRC(78f77c0d) SHA1(5183a8909c2ac0a3d80e707393bcbb4441d79a3c) ) + ROM_LOAD( "cb1ptrl3.14k", 0x180000, 0x080000, CRC(804bfb4a) SHA1(74b3fc3931265398e23605d3da7ca84a002da632) ) + ROM_LOAD( "cb1ptrm0.18j", 0x200000, 0x080000, CRC(f4eece49) SHA1(3f34d1ae5986f0d340563ab0fb637bfdacb8712c) ) + ROM_LOAD( "cb1ptrm1.16j", 0x280000, 0x080000, CRC(5f3cbd7d) SHA1(d00d0a96b71d6a3b98907c4ba7c702e549dd0adb) ) + ROM_LOAD( "cb1ptrm2.15j", 0x300000, 0x080000, CRC(02c7e4af) SHA1(6a541a28163b1026a824f6f8aed05d0eb0c8ae93) ) + ROM_LOAD( "cb1ptrm3.14j", 0x380000, 0x080000, CRC(ace3123b) SHA1(2b590ed967572d77b3cc6b37e341a5bdc55c762f) ) + ROM_LOAD( "cb1ptru0.18f", 0x400000, 0x080000, CRC(58d35341) SHA1(a5fe00bdcf39521f0465743664ff0dd78be5d6e8) ) + ROM_LOAD( "cb1ptru1.16f", 0x480000, 0x080000, CRC(f4d005b0) SHA1(0862ed1dd0818bfb765d97f1f9d996c321b0ec83) ) + ROM_LOAD( "cb1ptru2.15f", 0x500000, 0x080000, CRC(68ffcd50) SHA1(5ca5f71b6b079fde14d76c869d211a815bffae68) ) + ROM_LOAD( "cb1ptru3.14f", 0x580000, 0x080000, CRC(d89c1c2b) SHA1(9c25df696b2d120ce33d7774381460297740007a) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "cb1wavea.2l", 0x000000, 0x400000, CRC(b79a624d) SHA1(c0ee358a183ba6d0835731dbdd191b64718fde6e) ) ROM_LOAD( "cb1waveb.1l", 0x800000, 0x200000, CRC(33bf08f6) SHA1(bf9d68b26a8158ea1abfe8428b7454cac25242c5) ) @@ -4982,48 +5078,60 @@ ROM_END ROM_START( alpinerd ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "ar2ver-d.1", 0x00003, 0x100000, CRC(fa3380b9) SHA1(2a46988745bd2672f8082399a68ae0d0ab3d28f2) ) - ROM_LOAD32_BYTE( "ar2ver-d.2", 0x00002, 0x100000, CRC(76141352) SHA1(0f7230dd9cd6f1b83d499034affc7bc2c4385ab5) ) - ROM_LOAD32_BYTE( "ar2ver-d.3", 0x00001, 0x100000, CRC(9beffe6a) SHA1(d8efd1e3829d32bb06537d7cecb59f8df9b6d663) ) - ROM_LOAD32_BYTE( "ar2ver-d.4", 0x00000, 0x100000, CRC(1f3f1134) SHA1(0afa78444d1463d214f1afd7ec500af76d567489) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "ar2verd.1", 0x00003, 0x100000, CRC(fa3380b9) SHA1(2a46988745bd2672f8082399a68ae0d0ab3d28f2) ) + ROM_LOAD32_BYTE( "ar2verd.2", 0x00002, 0x100000, CRC(76141352) SHA1(0f7230dd9cd6f1b83d499034affc7bc2c4385ab5) ) + ROM_LOAD32_BYTE( "ar2verd.3", 0x00001, 0x100000, CRC(9beffe6a) SHA1(d8efd1e3829d32bb06537d7cecb59f8df9b6d663) ) + ROM_LOAD32_BYTE( "ar2verd.4", 0x00000, 0x100000, CRC(1f3f1134) SHA1(0afa78444d1463d214f1afd7ec500af76d567489) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ar1datab.8k", 0, 0x080000, CRC(c26306f8) SHA1(6d8d993c076d5ced523143a86bd0938b3794478d) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ar1scg0.12f", 0x200000*0, 0x200000,CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) /* identical to "ar1scg0.12l" */ - ROM_LOAD( "ar1scg1.10f", 0x200000*1, 0x200000,CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) /* identical to "ar1scg1.10l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ar1scg0.12f", 0x000000, 0x200000, CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) // == ar1scg0.12l + ROM_LOAD( "ar1scg1.10f", 0x200000, 0x200000, CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) // == ar1scg1.10l + ROM_LOAD( "ar1scg0.12l", 0x000000, 0x200000, CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) + ROM_LOAD( "ar1scg1.10l", 0x200000, 0x200000, CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ar1cg0.12b", 0x200000*0x0, 0x200000,CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) /* identical to "ar1cg0.8d" */ - ROM_LOAD( "ar1cg1.10d", 0x200000*0x1, 0x200000,CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) /* identical to "ar1cg1.13b" */ - ROM_LOAD( "ar1cg2.12d", 0x200000*0x2, 0x200000,CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) /* identical to "ar1cg2.14b" */ - ROM_LOAD( "ar1cg3.13d", 0x200000*0x3, 0x200000,CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) /* identical to "ar1cg3.16b" */ - ROM_LOAD( "ar1cg4.14d", 0x200000*0x4, 0x200000,CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) /* identical to "ar1cg4.18b" */ - ROM_LOAD( "ar1cg5.16d", 0x200000*0x5, 0x200000,CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) /* identical to "ar1cg5.19b" */ - ROM_LOAD( "ar1cg6.18a", 0x200000*0x6, 0x200000,CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) /* identical to "ar1cg6.18d" */ - ROM_LOAD( "ar1cg7.15a", 0x200000*0x7, 0x200000,CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) /* identical to "ar1cg7.19d" */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ar1cg0.8d", 0x000000, 0x200000, CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) // == ar1cg0.12b + ROM_LOAD( "ar1cg1.10d", 0x200000, 0x200000, CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) // == ar1cg1.13b + ROM_LOAD( "ar1cg2.12d", 0x400000, 0x200000, CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) // == ar1cg2.14b + ROM_LOAD( "ar1cg3.13d", 0x600000, 0x200000, CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) // == ar1cg3.16b + ROM_LOAD( "ar1cg4.14d", 0x800000, 0x200000, CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) // == ar1cg4.18b + ROM_LOAD( "ar1cg5.16d", 0xa00000, 0x200000, CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) // == ar1cg5.19b + ROM_LOAD( "ar1cg6.18d", 0xc00000, 0x200000, CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) // == ar1cg6.18b + ROM_LOAD( "ar1cg7.19d", 0xe00000, 0x200000, CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) // == ar1cg7.15a + ROM_LOAD( "ar1cg0.12b", 0x000000, 0x200000, CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) + ROM_LOAD( "ar1cg1.13b", 0x200000, 0x200000, CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) + ROM_LOAD( "ar1cg2.14b", 0x400000, 0x200000, CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) + ROM_LOAD( "ar1cg3.16b", 0x600000, 0x200000, CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) + ROM_LOAD( "ar1cg4.18b", 0x800000, 0x200000, CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) + ROM_LOAD( "ar1cg5.19b", 0xa00000, 0x200000, CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) + ROM_LOAD( "ar1cg6.18b", 0xc00000, 0x200000, CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) + ROM_LOAD( "ar1cg7.15a", 0xe00000, 0x200000, CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ar1ccrl.3d", 0x000000, 0x200000,CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) /* identical to "ar1ccrl.7b" */ - ROM_LOAD( "ar1ccrh.1d", 0x200000, 0x080000,CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) /* identical to "pr1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ar1ccrl.3d", 0x000000, 0x200000, CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) // == ar1ccrl.7b + ROM_LOAD( "ar1ccrh.1d", 0x200000, 0x080000, CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) // == ar1ccrh.5b + ROM_LOAD( "ar1ccrl.7b", 0x000000, 0x200000, CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) + ROM_LOAD( "ar1ccrh.5b", 0x200000, 0x080000, CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "ar1ptrl0.18k", 0x80000*0x0, 0x80000,CRC(82405108) SHA1(0a40882a9bc8621c620bede404c78f6b1333f223) ) - ROM_LOAD( "ar1ptrl1.16k", 0x80000*0x1, 0x80000,CRC(8739b09c) SHA1(cd603c4dc2f9ffc4185f891eb83e4c383c564294) ) - ROM_LOAD( "ar1ptrl2.15k", 0x80000*0x2, 0x80000,CRC(bda693a9) SHA1(fe71dd3c63198737aa2d39527f0004e977e3be20) ) - ROM_LOAD( "ar1ptrl3.14k", 0x80000*0x3, 0x80000,CRC(82797405) SHA1(2f205fee2d33e183c80a906fb38900167c011240) ) - ROM_LOAD( "ar1ptrm0.18j", 0x80000*0x4, 0x80000,CRC(64bd6620) SHA1(2e33ff22208805ece304128be8887646fc890f6d) ) - ROM_LOAD( "ar1ptrm1.16j", 0x80000*0x5, 0x80000,CRC(2232f0a5) SHA1(3fccf6d4a0c4100cc85e3051024d659c4a1c769e) ) - ROM_LOAD( "ar1ptrm2.15j", 0x80000*0x6, 0x80000,CRC(8ee14e6f) SHA1(f6f1cbb748b109b365255378c18e710ba6270c1c) ) - ROM_LOAD( "ar1ptrm3.14j", 0x80000*0x7, 0x80000,CRC(1094a970) SHA1(d41b10f48e1ef312bcaf09f27fabc7252c30e648) ) - ROM_LOAD( "ar1ptru0.18f", 0x80000*0x8, 0x80000,CRC(26d88467) SHA1(d528f989fab4dd5ac1aec9b596a05fbadcc0587a) ) - ROM_LOAD( "ar1ptru1.16f", 0x80000*0x9, 0x80000,CRC(c5e2c208) SHA1(152fde0b95a5df8c781e4a83577cfbbc7672ae0d) ) - ROM_LOAD( "ar1ptru2.15f", 0x80000*0xa, 0x80000,CRC(1321ec59) SHA1(dbd3687a4c6b1aa0b18e336f99dabb9010d36639) ) - ROM_LOAD( "ar1ptru3.14f", 0x80000*0xb, 0x80000,CRC(139d7dc1) SHA1(6d25e6ad552a91a0c5fc03db7e1a801ccf9c9556) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ar1ptrl0.18k", 0x000000, 0x080000, CRC(82405108) SHA1(0a40882a9bc8621c620bede404c78f6b1333f223) ) + ROM_LOAD( "ar1ptrl1.16k", 0x080000, 0x080000, CRC(8739b09c) SHA1(cd603c4dc2f9ffc4185f891eb83e4c383c564294) ) + ROM_LOAD( "ar1ptrl2.15k", 0x100000, 0x080000, CRC(bda693a9) SHA1(fe71dd3c63198737aa2d39527f0004e977e3be20) ) + ROM_LOAD( "ar1ptrl3.14k", 0x180000, 0x080000, CRC(82797405) SHA1(2f205fee2d33e183c80a906fb38900167c011240) ) + ROM_LOAD( "ar1ptrm0.18j", 0x200000, 0x080000, CRC(64bd6620) SHA1(2e33ff22208805ece304128be8887646fc890f6d) ) + ROM_LOAD( "ar1ptrm1.16j", 0x280000, 0x080000, CRC(2232f0a5) SHA1(3fccf6d4a0c4100cc85e3051024d659c4a1c769e) ) + ROM_LOAD( "ar1ptrm2.15j", 0x300000, 0x080000, CRC(8ee14e6f) SHA1(f6f1cbb748b109b365255378c18e710ba6270c1c) ) + ROM_LOAD( "ar1ptrm3.14j", 0x380000, 0x080000, CRC(1094a970) SHA1(d41b10f48e1ef312bcaf09f27fabc7252c30e648) ) + ROM_LOAD( "ar1ptru0.18f", 0x400000, 0x080000, CRC(26d88467) SHA1(d528f989fab4dd5ac1aec9b596a05fbadcc0587a) ) + ROM_LOAD( "ar1ptru1.16f", 0x480000, 0x080000, CRC(c5e2c208) SHA1(152fde0b95a5df8c781e4a83577cfbbc7672ae0d) ) + ROM_LOAD( "ar1ptru2.15f", 0x500000, 0x080000, CRC(1321ec59) SHA1(dbd3687a4c6b1aa0b18e336f99dabb9010d36639) ) + ROM_LOAD( "ar1ptru3.14f", 0x580000, 0x080000, CRC(139d7dc1) SHA1(6d25e6ad552a91a0c5fc03db7e1a801ccf9c9556) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "ar1wavea.2l", 0, 0x200000, CRC(dbf64562) SHA1(454fd7d5b860f0e5557d8900393be95d6c992ad1) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom @@ -5031,48 +5139,60 @@ ROM_START( alpinerd ) ROM_END ROM_START( alpinerc ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "ar2ver-c.1", 0x00003, 0x100000, CRC(61323842) SHA1(e3c33248340bee252f230124fa9b7fa935a60565) ) - ROM_LOAD32_BYTE( "ar2ver-c.2", 0x00002, 0x100000, CRC(43795b2d) SHA1(e060f3259661279a36300431c5ca7347bde8b6ec) ) - ROM_LOAD32_BYTE( "ar2ver-c.3", 0x00001, 0x100000, CRC(acb3003b) SHA1(ea0cbf3a1607b06b108df051f38fec1f214f42d2) ) - ROM_LOAD32_BYTE( "ar2ver-c.4", 0x00000, 0x100000, CRC(800acc21) SHA1(41d26766da2db46954a2351bbc50aea94bc1d564) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "ar2verc.1", 0x00003, 0x100000, CRC(61323842) SHA1(e3c33248340bee252f230124fa9b7fa935a60565) ) + ROM_LOAD32_BYTE( "ar2verc.2", 0x00002, 0x100000, CRC(43795b2d) SHA1(e060f3259661279a36300431c5ca7347bde8b6ec) ) + ROM_LOAD32_BYTE( "ar2verc.3", 0x00001, 0x100000, CRC(acb3003b) SHA1(ea0cbf3a1607b06b108df051f38fec1f214f42d2) ) + ROM_LOAD32_BYTE( "ar2verc.4", 0x00000, 0x100000, CRC(800acc21) SHA1(41d26766da2db46954a2351bbc50aea94bc1d564) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ar1datab.8k", 0, 0x080000, CRC(c26306f8) SHA1(6d8d993c076d5ced523143a86bd0938b3794478d) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ar1scg0.12f", 0x200000*0, 0x200000,CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) /* identical to "ar1scg0.12l" */ - ROM_LOAD( "ar1scg1.10f", 0x200000*1, 0x200000,CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) /* identical to "ar1scg1.10l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ar1scg0.12f", 0x000000, 0x200000, CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) // == ar1scg0.12l + ROM_LOAD( "ar1scg1.10f", 0x200000, 0x200000, CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) // == ar1scg1.10l + ROM_LOAD( "ar1scg0.12l", 0x000000, 0x200000, CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) + ROM_LOAD( "ar1scg1.10l", 0x200000, 0x200000, CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ar1cg0.12b", 0x200000*0x0, 0x200000,CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) /* identical to "ar1cg0.8d" */ - ROM_LOAD( "ar1cg1.10d", 0x200000*0x1, 0x200000,CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) /* identical to "ar1cg1.13b" */ - ROM_LOAD( "ar1cg2.12d", 0x200000*0x2, 0x200000,CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) /* identical to "ar1cg2.14b" */ - ROM_LOAD( "ar1cg3.13d", 0x200000*0x3, 0x200000,CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) /* identical to "ar1cg3.16b" */ - ROM_LOAD( "ar1cg4.14d", 0x200000*0x4, 0x200000,CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) /* identical to "ar1cg4.18b" */ - ROM_LOAD( "ar1cg5.16d", 0x200000*0x5, 0x200000,CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) /* identical to "ar1cg5.19b" */ - ROM_LOAD( "ar1cg6.18a", 0x200000*0x6, 0x200000,CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) /* identical to "ar1cg6.18d" */ - ROM_LOAD( "ar1cg7.15a", 0x200000*0x7, 0x200000,CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) /* identical to "ar1cg7.19d" */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ar1cg0.8d", 0x000000, 0x200000, CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) // == ar1cg0.12b + ROM_LOAD( "ar1cg1.10d", 0x200000, 0x200000, CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) // == ar1cg1.13b + ROM_LOAD( "ar1cg2.12d", 0x400000, 0x200000, CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) // == ar1cg2.14b + ROM_LOAD( "ar1cg3.13d", 0x600000, 0x200000, CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) // == ar1cg3.16b + ROM_LOAD( "ar1cg4.14d", 0x800000, 0x200000, CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) // == ar1cg4.18b + ROM_LOAD( "ar1cg5.16d", 0xa00000, 0x200000, CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) // == ar1cg5.19b + ROM_LOAD( "ar1cg6.18d", 0xc00000, 0x200000, CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) // == ar1cg6.18b + ROM_LOAD( "ar1cg7.19d", 0xe00000, 0x200000, CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) // == ar1cg7.15a + ROM_LOAD( "ar1cg0.12b", 0x000000, 0x200000, CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) + ROM_LOAD( "ar1cg1.13b", 0x200000, 0x200000, CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) + ROM_LOAD( "ar1cg2.14b", 0x400000, 0x200000, CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) + ROM_LOAD( "ar1cg3.16b", 0x600000, 0x200000, CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) + ROM_LOAD( "ar1cg4.18b", 0x800000, 0x200000, CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) + ROM_LOAD( "ar1cg5.19b", 0xa00000, 0x200000, CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) + ROM_LOAD( "ar1cg6.18b", 0xc00000, 0x200000, CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) + ROM_LOAD( "ar1cg7.15a", 0xe00000, 0x200000, CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ar1ccrl.3d", 0x000000, 0x200000,CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) /* identical to "ar1ccrl.7b" */ - ROM_LOAD( "ar1ccrh.1d", 0x200000, 0x080000,CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) /* identical to "pr1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ar1ccrl.3d", 0x000000, 0x200000, CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) // == ar1ccrl.7b + ROM_LOAD( "ar1ccrh.1d", 0x200000, 0x080000, CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) // == ar1ccrh.5b + ROM_LOAD( "ar1ccrl.7b", 0x000000, 0x200000, CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) + ROM_LOAD( "ar1ccrh.5b", 0x200000, 0x080000, CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "ar1ptrl0.18k", 0x80000*0x0, 0x80000,CRC(82405108) SHA1(0a40882a9bc8621c620bede404c78f6b1333f223) ) - ROM_LOAD( "ar1ptrl1.16k", 0x80000*0x1, 0x80000,CRC(8739b09c) SHA1(cd603c4dc2f9ffc4185f891eb83e4c383c564294) ) - ROM_LOAD( "ar1ptrl2.15k", 0x80000*0x2, 0x80000,CRC(bda693a9) SHA1(fe71dd3c63198737aa2d39527f0004e977e3be20) ) - ROM_LOAD( "ar1ptrl3.14k", 0x80000*0x3, 0x80000,CRC(82797405) SHA1(2f205fee2d33e183c80a906fb38900167c011240) ) - ROM_LOAD( "ar1ptrm0.18j", 0x80000*0x4, 0x80000,CRC(64bd6620) SHA1(2e33ff22208805ece304128be8887646fc890f6d) ) - ROM_LOAD( "ar1ptrm1.16j", 0x80000*0x5, 0x80000,CRC(2232f0a5) SHA1(3fccf6d4a0c4100cc85e3051024d659c4a1c769e) ) - ROM_LOAD( "ar1ptrm2.15j", 0x80000*0x6, 0x80000,CRC(8ee14e6f) SHA1(f6f1cbb748b109b365255378c18e710ba6270c1c) ) - ROM_LOAD( "ar1ptrm3.14j", 0x80000*0x7, 0x80000,CRC(1094a970) SHA1(d41b10f48e1ef312bcaf09f27fabc7252c30e648) ) - ROM_LOAD( "ar1ptru0.18f", 0x80000*0x8, 0x80000,CRC(26d88467) SHA1(d528f989fab4dd5ac1aec9b596a05fbadcc0587a) ) - ROM_LOAD( "ar1ptru1.16f", 0x80000*0x9, 0x80000,CRC(c5e2c208) SHA1(152fde0b95a5df8c781e4a83577cfbbc7672ae0d) ) - ROM_LOAD( "ar1ptru2.15f", 0x80000*0xa, 0x80000,CRC(1321ec59) SHA1(dbd3687a4c6b1aa0b18e336f99dabb9010d36639) ) - ROM_LOAD( "ar1ptru3.14f", 0x80000*0xb, 0x80000,CRC(139d7dc1) SHA1(6d25e6ad552a91a0c5fc03db7e1a801ccf9c9556) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ar1ptrl0.18k", 0x000000, 0x080000, CRC(82405108) SHA1(0a40882a9bc8621c620bede404c78f6b1333f223) ) + ROM_LOAD( "ar1ptrl1.16k", 0x080000, 0x080000, CRC(8739b09c) SHA1(cd603c4dc2f9ffc4185f891eb83e4c383c564294) ) + ROM_LOAD( "ar1ptrl2.15k", 0x100000, 0x080000, CRC(bda693a9) SHA1(fe71dd3c63198737aa2d39527f0004e977e3be20) ) + ROM_LOAD( "ar1ptrl3.14k", 0x180000, 0x080000, CRC(82797405) SHA1(2f205fee2d33e183c80a906fb38900167c011240) ) + ROM_LOAD( "ar1ptrm0.18j", 0x200000, 0x080000, CRC(64bd6620) SHA1(2e33ff22208805ece304128be8887646fc890f6d) ) + ROM_LOAD( "ar1ptrm1.16j", 0x280000, 0x080000, CRC(2232f0a5) SHA1(3fccf6d4a0c4100cc85e3051024d659c4a1c769e) ) + ROM_LOAD( "ar1ptrm2.15j", 0x300000, 0x080000, CRC(8ee14e6f) SHA1(f6f1cbb748b109b365255378c18e710ba6270c1c) ) + ROM_LOAD( "ar1ptrm3.14j", 0x380000, 0x080000, CRC(1094a970) SHA1(d41b10f48e1ef312bcaf09f27fabc7252c30e648) ) + ROM_LOAD( "ar1ptru0.18f", 0x400000, 0x080000, CRC(26d88467) SHA1(d528f989fab4dd5ac1aec9b596a05fbadcc0587a) ) + ROM_LOAD( "ar1ptru1.16f", 0x480000, 0x080000, CRC(c5e2c208) SHA1(152fde0b95a5df8c781e4a83577cfbbc7672ae0d) ) + ROM_LOAD( "ar1ptru2.15f", 0x500000, 0x080000, CRC(1321ec59) SHA1(dbd3687a4c6b1aa0b18e336f99dabb9010d36639) ) + ROM_LOAD( "ar1ptru3.14f", 0x580000, 0x080000, CRC(139d7dc1) SHA1(6d25e6ad552a91a0c5fc03db7e1a801ccf9c9556) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "ar1wavea.2l", 0, 0x200000, CRC(dbf64562) SHA1(454fd7d5b860f0e5557d8900393be95d6c992ad1) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom @@ -5080,46 +5200,58 @@ ROM_START( alpinerc ) ROM_END ROM_START( alpinerjc ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_WORD_SWAP( "ar1ver-c.1", 0x00002, 0x200000, CRC(8a87dc27) SHA1(ea3675667dce4c184da61dbb204e39da7ae93e82) ) /* SYSTEM SUPER22 MPM(F16) PCB stickered AR1 VER.C */ - ROM_LOAD32_WORD_SWAP( "ar1ver-c.2", 0x00000, 0x200000, CRC(5f4f5615) SHA1(ff8f818a4017ee8546037a10522f2cf1de6dc7cd) ) /* intel E28F016SA flash ROMs at ROM1 & ROM2 */ + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_WORD_SWAP( "ar1verc.1", 0x00002, 0x200000, CRC(8a87dc27) SHA1(ea3675667dce4c184da61dbb204e39da7ae93e82) ) // SYSTEM SUPER22 MPM(F16) PCB stickered AR1 VER.C + ROM_LOAD32_WORD_SWAP( "ar1verc.2", 0x00000, 0x200000, CRC(5f4f5615) SHA1(ff8f818a4017ee8546037a10522f2cf1de6dc7cd) ) // intel E28F016SA flash ROMs at ROM1 & ROM2 - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ar1datab.8k", 0, 0x080000, CRC(c26306f8) SHA1(6d8d993c076d5ced523143a86bd0938b3794478d) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ar1scg0.12f", 0x200000*0, 0x200000,CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) /* identical to "ar1scg0.12l" */ - ROM_LOAD( "ar1scg1.10f", 0x200000*1, 0x200000,CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) /* identical to "ar1scg1.10l" */ + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ar1scg0.12f", 0x000000, 0x200000, CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) // == ar1scg0.12l + ROM_LOAD( "ar1scg1.10f", 0x200000, 0x200000, CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) // == ar1scg1.10l + ROM_LOAD( "ar1scg0.12l", 0x000000, 0x200000, CRC(e7be830a) SHA1(60e2162eecd7401a0c26c525de2715cbfb10c1c5) ) + ROM_LOAD( "ar1scg1.10l", 0x200000, 0x200000, CRC(8f15a686) SHA1(bce2d4380c6c39aa402566ddb0f62bbe6d7bfa1d) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ar1cg0.12b", 0x200000*0x0, 0x200000,CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) /* identical to "ar1cg0.8d" */ - ROM_LOAD( "ar1cg1.10d", 0x200000*0x1, 0x200000,CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) /* identical to "ar1cg1.13b" */ - ROM_LOAD( "ar1cg2.12d", 0x200000*0x2, 0x200000,CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) /* identical to "ar1cg2.14b" */ - ROM_LOAD( "ar1cg3.13d", 0x200000*0x3, 0x200000,CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) /* identical to "ar1cg3.16b" */ - ROM_LOAD( "ar1cg4.14d", 0x200000*0x4, 0x200000,CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) /* identical to "ar1cg4.18b" */ - ROM_LOAD( "ar1cg5.16d", 0x200000*0x5, 0x200000,CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) /* identical to "ar1cg5.19b" */ - ROM_LOAD( "ar1cg6.18a", 0x200000*0x6, 0x200000,CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) /* identical to "ar1cg6.18d" */ - ROM_LOAD( "ar1cg7.15a", 0x200000*0x7, 0x200000,CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) /* identical to "ar1cg7.19d" */ + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ar1cg0.8d", 0x000000, 0x200000, CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) // == ar1cg0.12b + ROM_LOAD( "ar1cg1.10d", 0x200000, 0x200000, CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) // == ar1cg1.13b + ROM_LOAD( "ar1cg2.12d", 0x400000, 0x200000, CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) // == ar1cg2.14b + ROM_LOAD( "ar1cg3.13d", 0x600000, 0x200000, CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) // == ar1cg3.16b + ROM_LOAD( "ar1cg4.14d", 0x800000, 0x200000, CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) // == ar1cg4.18b + ROM_LOAD( "ar1cg5.16d", 0xa00000, 0x200000, CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) // == ar1cg5.19b + ROM_LOAD( "ar1cg6.18d", 0xc00000, 0x200000, CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) // == ar1cg6.18b + ROM_LOAD( "ar1cg7.19d", 0xe00000, 0x200000, CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) // == ar1cg7.15a + ROM_LOAD( "ar1cg0.12b", 0x000000, 0x200000, CRC(93f3a9d9) SHA1(7e94c81ad5ace98a2f0d00d101d464883d38c197) ) + ROM_LOAD( "ar1cg1.13b", 0x200000, 0x200000, CRC(39828c8b) SHA1(424aa67eb0b898c9cab8a4749893a9c5696ac430) ) + ROM_LOAD( "ar1cg2.14b", 0x400000, 0x200000, CRC(f7b058d1) SHA1(fffd0f01724a26dd47b1ecceecf4a139d5746f81) ) + ROM_LOAD( "ar1cg3.16b", 0x600000, 0x200000, CRC(c28a3d2a) SHA1(cdc44fdbc99274e860c834e42b4cfafb478d4d26) ) + ROM_LOAD( "ar1cg4.18b", 0x800000, 0x200000, CRC(abdb161f) SHA1(260bff9b0e94c1b2ea4b9d7fa170fbca212e85ee) ) + ROM_LOAD( "ar1cg5.19b", 0xa00000, 0x200000, CRC(2381cfea) SHA1(1de4c8b94df233fd74771fa47843290a3d8df0c8) ) + ROM_LOAD( "ar1cg6.18b", 0xc00000, 0x200000, CRC(ca0b6d23) SHA1(df969e0eeec557a95584b06995b0d55f2c6ec70a) ) + ROM_LOAD( "ar1cg7.15a", 0xe00000, 0x200000, CRC(ffb9f9f9) SHA1(2b8c75b580f77e887df7d50909a3a95cda570e20) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ar1ccrl.3d", 0x000000, 0x200000,CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) /* identical to "ar1ccrl.7b" */ - ROM_LOAD( "ar1ccrh.1d", 0x200000, 0x080000,CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) /* identical to "pr1ccrh.5b" */ + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ar1ccrl.3d", 0x000000, 0x200000, CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) // == ar1ccrl.7b + ROM_LOAD( "ar1ccrh.1d", 0x200000, 0x080000, CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) // == ar1ccrh.5b + ROM_LOAD( "ar1ccrl.7b", 0x000000, 0x200000, CRC(17387b2c) SHA1(dfd7cadaf97917347c0fa98f395364a543e49612) ) + ROM_LOAD( "ar1ccrh.5b", 0x200000, 0x080000, CRC(ee7a4803) SHA1(8383c9a8ef5ed94df13446ca5cefa5f9e518f175) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "ar1ptrl0.18k", 0x80000*0x0, 0x80000,CRC(82405108) SHA1(0a40882a9bc8621c620bede404c78f6b1333f223) ) - ROM_LOAD( "ar1ptrl1.16k", 0x80000*0x1, 0x80000,CRC(8739b09c) SHA1(cd603c4dc2f9ffc4185f891eb83e4c383c564294) ) - ROM_LOAD( "ar1ptrl2.15k", 0x80000*0x2, 0x80000,CRC(bda693a9) SHA1(fe71dd3c63198737aa2d39527f0004e977e3be20) ) - ROM_LOAD( "ar1ptrl3.14k", 0x80000*0x3, 0x80000,CRC(82797405) SHA1(2f205fee2d33e183c80a906fb38900167c011240) ) - ROM_LOAD( "ar1ptrm0.18j", 0x80000*0x4, 0x80000,CRC(64bd6620) SHA1(2e33ff22208805ece304128be8887646fc890f6d) ) - ROM_LOAD( "ar1ptrm1.16j", 0x80000*0x5, 0x80000,CRC(2232f0a5) SHA1(3fccf6d4a0c4100cc85e3051024d659c4a1c769e) ) - ROM_LOAD( "ar1ptrm2.15j", 0x80000*0x6, 0x80000,CRC(8ee14e6f) SHA1(f6f1cbb748b109b365255378c18e710ba6270c1c) ) - ROM_LOAD( "ar1ptrm3.14j", 0x80000*0x7, 0x80000,CRC(1094a970) SHA1(d41b10f48e1ef312bcaf09f27fabc7252c30e648) ) - ROM_LOAD( "ar1ptru0.18f", 0x80000*0x8, 0x80000,CRC(26d88467) SHA1(d528f989fab4dd5ac1aec9b596a05fbadcc0587a) ) - ROM_LOAD( "ar1ptru1.16f", 0x80000*0x9, 0x80000,CRC(c5e2c208) SHA1(152fde0b95a5df8c781e4a83577cfbbc7672ae0d) ) - ROM_LOAD( "ar1ptru2.15f", 0x80000*0xa, 0x80000,CRC(1321ec59) SHA1(dbd3687a4c6b1aa0b18e336f99dabb9010d36639) ) - ROM_LOAD( "ar1ptru3.14f", 0x80000*0xb, 0x80000,CRC(139d7dc1) SHA1(6d25e6ad552a91a0c5fc03db7e1a801ccf9c9556) ) + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ar1ptrl0.18k", 0x000000, 0x080000, CRC(82405108) SHA1(0a40882a9bc8621c620bede404c78f6b1333f223) ) + ROM_LOAD( "ar1ptrl1.16k", 0x080000, 0x080000, CRC(8739b09c) SHA1(cd603c4dc2f9ffc4185f891eb83e4c383c564294) ) + ROM_LOAD( "ar1ptrl2.15k", 0x100000, 0x080000, CRC(bda693a9) SHA1(fe71dd3c63198737aa2d39527f0004e977e3be20) ) + ROM_LOAD( "ar1ptrl3.14k", 0x180000, 0x080000, CRC(82797405) SHA1(2f205fee2d33e183c80a906fb38900167c011240) ) + ROM_LOAD( "ar1ptrm0.18j", 0x200000, 0x080000, CRC(64bd6620) SHA1(2e33ff22208805ece304128be8887646fc890f6d) ) + ROM_LOAD( "ar1ptrm1.16j", 0x280000, 0x080000, CRC(2232f0a5) SHA1(3fccf6d4a0c4100cc85e3051024d659c4a1c769e) ) + ROM_LOAD( "ar1ptrm2.15j", 0x300000, 0x080000, CRC(8ee14e6f) SHA1(f6f1cbb748b109b365255378c18e710ba6270c1c) ) + ROM_LOAD( "ar1ptrm3.14j", 0x380000, 0x080000, CRC(1094a970) SHA1(d41b10f48e1ef312bcaf09f27fabc7252c30e648) ) + ROM_LOAD( "ar1ptru0.18f", 0x400000, 0x080000, CRC(26d88467) SHA1(d528f989fab4dd5ac1aec9b596a05fbadcc0587a) ) + ROM_LOAD( "ar1ptru1.16f", 0x480000, 0x080000, CRC(c5e2c208) SHA1(152fde0b95a5df8c781e4a83577cfbbc7672ae0d) ) + ROM_LOAD( "ar1ptru2.15f", 0x500000, 0x080000, CRC(1321ec59) SHA1(dbd3687a4c6b1aa0b18e336f99dabb9010d36639) ) + ROM_LOAD( "ar1ptru3.14f", 0x580000, 0x080000, CRC(139d7dc1) SHA1(6d25e6ad552a91a0c5fc03db7e1a801ccf9c9556) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "ar1wavea.2l", 0, 0x200000, CRC(dbf64562) SHA1(454fd7d5b860f0e5557d8900393be95d6c992ad1) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom @@ -5128,31 +5260,40 @@ ROM_END ROM_START( alpinr2b ) - ROM_REGION( 0x800000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "ars2ver-b.2", 0x000003, 0x200000, CRC(ed977f83) SHA1(26c57cdfc15f799a999ee22f141e1c0cabfc91dc) ) // 2nd half empty - ROM_LOAD32_BYTE( "ars2ver-b.3", 0x000001, 0x200000, CRC(8e7a9983) SHA1(34c82e5f080efe04d6b77a77a8391cb48b69c1af) ) // " - ROM_LOAD32_BYTE( "ars2ver-b.4", 0x000002, 0x200000, CRC(610e49c2) SHA1(433c6d2216551bac31584306f748af1c912c3b07) ) // " - ROM_LOAD32_BYTE( "ars2ver-b.5", 0x000000, 0x200000, CRC(7f3517b0) SHA1(3e6ba1a51bf235f40f933aae1f00638b88bba522) ) // " + ROM_REGION( 0x800000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "ars2verb.2", 0x000003, 0x200000, CRC(ed977f83) SHA1(26c57cdfc15f799a999ee22f141e1c0cabfc91dc) ) // 2nd half empty + ROM_LOAD32_BYTE( "ars2verb.3", 0x000001, 0x200000, CRC(8e7a9983) SHA1(34c82e5f080efe04d6b77a77a8391cb48b69c1af) ) // " + ROM_LOAD32_BYTE( "ars2verb.4", 0x000002, 0x200000, CRC(610e49c2) SHA1(433c6d2216551bac31584306f748af1c912c3b07) ) // " + ROM_LOAD32_BYTE( "ars2verb.5", 0x000000, 0x200000, CRC(7f3517b0) SHA1(3e6ba1a51bf235f40f933aae1f00638b88bba522) ) // " - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ars2data.8k", 0x000000, 0x080000, CRC(29b36dcb) SHA1(70fde130c11789c822829493a70ecefb077c0c15) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ars1scg0.12f", 0x000000, 0x200000, CRC(bc49ed86) SHA1(289b39f2cb21c723dbe4ddd64ee4b2c5fa65c368) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ars1scg0.12f", 0x000000, 0x200000, CRC(bc49ed86) SHA1(289b39f2cb21c723dbe4ddd64ee4b2c5fa65c368) ) // == ars1scg0.12l + ROM_LOAD( "ars1scg0.12l", 0x000000, 0x200000, CRC(bc49ed86) SHA1(289b39f2cb21c723dbe4ddd64ee4b2c5fa65c368) ) // (intentionally loaded in at 0x000000) - ROM_REGION( 0xc00000, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ars1cg0.8d", 0x000000, 0x200000, CRC(74f4515c) SHA1(1e3a96281d543213d10c962b4d387c414d76e0c3) ) - ROM_LOAD( "ars1cg1.10d", 0x200000, 0x200000, CRC(329a95c1) SHA1(2cad7fd9e5ca7c64729ca2548ef4f873a0b8de64) ) - ROM_LOAD( "ars1cg2.12d", 0x400000, 0x200000, CRC(5648345a) SHA1(0dc7aedba65b7d97687a9e38a63597f16cee6179) ) - ROM_LOAD( "ars1cg3.13d", 0x600000, 0x200000, CRC(a752f205) SHA1(373b5a69e4488bc30763568ceae512ab7039f5f8) ) - ROM_LOAD( "ars1cg4.14d", 0x800000, 0x200000, CRC(54bf35b6) SHA1(aec43b66e7597ad7d113ae785417bf26164c1bca) ) - ROM_LOAD( "ars1cg5.16d", 0xa00000, 0x200000, CRC(e24a19a2) SHA1(34c1b51eea954ae3000602e550eb1cef0a10e651) ) + ROM_REGION( 0xc00000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ars1cg0.8d", 0x000000, 0x200000, CRC(74f4515c) SHA1(1e3a96281d543213d10c962b4d387c414d76e0c3) ) // == ars1cg0.12b + ROM_LOAD( "ars1cg1.10d", 0x200000, 0x200000, CRC(329a95c1) SHA1(2cad7fd9e5ca7c64729ca2548ef4f873a0b8de64) ) // == ars1cg1.13b + ROM_LOAD( "ars1cg2.12d", 0x400000, 0x200000, CRC(5648345a) SHA1(0dc7aedba65b7d97687a9e38a63597f16cee6179) ) // == ars1cg2.14b + ROM_LOAD( "ars1cg3.13d", 0x600000, 0x200000, CRC(a752f205) SHA1(373b5a69e4488bc30763568ceae512ab7039f5f8) ) // == ars1cg3.16b + ROM_LOAD( "ars1cg4.14d", 0x800000, 0x200000, CRC(54bf35b6) SHA1(aec43b66e7597ad7d113ae785417bf26164c1bca) ) // == ars1cg4.18b + ROM_LOAD( "ars1cg5.16d", 0xa00000, 0x200000, CRC(e24a19a2) SHA1(34c1b51eea954ae3000602e550eb1cef0a10e651) ) // == ars1cg5.19b + ROM_LOAD( "ars1cg0.12b", 0x000000, 0x200000, CRC(74f4515c) SHA1(1e3a96281d543213d10c962b4d387c414d76e0c3) ) + ROM_LOAD( "ars1cg1.13b", 0x200000, 0x200000, CRC(329a95c1) SHA1(2cad7fd9e5ca7c64729ca2548ef4f873a0b8de64) ) + ROM_LOAD( "ars1cg2.14b", 0x400000, 0x200000, CRC(5648345a) SHA1(0dc7aedba65b7d97687a9e38a63597f16cee6179) ) + ROM_LOAD( "ars1cg3.16b", 0x600000, 0x200000, CRC(a752f205) SHA1(373b5a69e4488bc30763568ceae512ab7039f5f8) ) + ROM_LOAD( "ars1cg4.18b", 0x800000, 0x200000, CRC(54bf35b6) SHA1(aec43b66e7597ad7d113ae785417bf26164c1bca) ) + ROM_LOAD( "ars1cg5.19b", 0xa00000, 0x200000, CRC(e24a19a2) SHA1(34c1b51eea954ae3000602e550eb1cef0a10e651) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ars1ccrl.3d", 0x000000, 0x200000, CRC(fc8c9161) SHA1(ad0fcfae27e02d68a6f8d1d03c514dc2f12d9ee8) ) - ROM_LOAD( "ars1ccrh.1d", 0x200000, 0x080000, CRC(a17660bb) SHA1(bae2c3f20772c6cea99f271ee3f39b1f999038c6) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ars1ccrl.3d", 0x000000, 0x200000, CRC(fc8c9161) SHA1(ad0fcfae27e02d68a6f8d1d03c514dc2f12d9ee8) ) // == ars1ccrl.7b + ROM_LOAD( "ars1ccrh.1d", 0x200000, 0x080000, CRC(a17660bb) SHA1(bae2c3f20772c6cea99f271ee3f39b1f999038c6) ) // == ars1ccrh.5b + ROM_LOAD( "ars1ccrl.7b", 0x000000, 0x200000, CRC(fc8c9161) SHA1(ad0fcfae27e02d68a6f8d1d03c514dc2f12d9ee8) ) + ROM_LOAD( "ars1ccrh.5b", 0x200000, 0x080000, CRC(a17660bb) SHA1(bae2c3f20772c6cea99f271ee3f39b1f999038c6) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "ars1ptrl0.18k", 0x000000, 0x080000, CRC(f04e0e61) SHA1(d58a1d3ca1d0922e134db21a04feaee7dc97b020) ) ROM_LOAD( "ars1ptrl1.16k", 0x080000, 0x080000, CRC(8bdb4970) SHA1(a504cd4beca4bedd1a7a228c83dd6b844ca3a1e0) ) ROM_LOAD( "ars1ptrl2.15k", 0x100000, 0x080000, CRC(ec993a4f) SHA1(883f64e3e8d951415e9cef589c354eba9406c0aa) ) @@ -5166,7 +5307,7 @@ ROM_START( alpinr2b ) ROM_LOAD( "ars1ptru2.15f", 0x500000, 0x080000, CRC(bcfad0ba) SHA1(bee7f2f9ecd2b289c6706e19fa86863913b286b5) ) ROM_LOAD( "ars1ptru3.14f", 0x580000, 0x080000, CRC(73ce6958) SHA1(918b0fb0fca33dbe3be3ac679b8b28f58213f75b) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "ars1wavea.2l", 0x000000, 0x400000, CRC(f8d107e9) SHA1(5c418691f0b35403553f21f5570eda8bbb66890f) ) ROM_LOAD( "ars2waveb.1l", 0x800000, 0x400000, CRC(deab4ad1) SHA1(580ad88d516280baaf6cc92b2e07cdc0cfc486f3) ) @@ -5175,31 +5316,40 @@ ROM_START( alpinr2b ) ROM_END ROM_START( alpinr2a ) - ROM_REGION( 0x800000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "ars2ver-a.2", 0x000003, 0x200000, CRC(b07b15a4) SHA1(ea3b2d7b4ef4ccf3aafeef7e7eac92e8d446f4e7) ) // 2nd half empty - ROM_LOAD32_BYTE( "ars2ver-a.3", 0x000002, 0x200000, CRC(90a92e40) SHA1(bf8083256e56e7e33e61b4cdaf9fd03dabfb36ba) ) // " - ROM_LOAD32_BYTE( "ars2ver-a.4", 0x000001, 0x200000, CRC(9e9d771d) SHA1(6fb983e3f4f8233544667b1bbf87864e4fb8698c) ) // " - ROM_LOAD32_BYTE( "ars2ver-a.5", 0x000000, 0x200000, CRC(e93c7771) SHA1(305f35488a55be1b845702df972bba8334c0726c) ) // " + ROM_REGION( 0x800000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "ars2vera.2", 0x000003, 0x200000, CRC(b07b15a4) SHA1(ea3b2d7b4ef4ccf3aafeef7e7eac92e8d446f4e7) ) // 2nd half empty + ROM_LOAD32_BYTE( "ars2vera.3", 0x000002, 0x200000, CRC(90a92e40) SHA1(bf8083256e56e7e33e61b4cdaf9fd03dabfb36ba) ) // " + ROM_LOAD32_BYTE( "ars2vera.4", 0x000001, 0x200000, CRC(9e9d771d) SHA1(6fb983e3f4f8233544667b1bbf87864e4fb8698c) ) // " + ROM_LOAD32_BYTE( "ars2vera.5", 0x000000, 0x200000, CRC(e93c7771) SHA1(305f35488a55be1b845702df972bba8334c0726c) ) // " - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ars2data.8k", 0x000000, 0x080000, CRC(29b36dcb) SHA1(70fde130c11789c822829493a70ecefb077c0c15) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ars1scg0.12f", 0x000000, 0x200000, CRC(bc49ed86) SHA1(289b39f2cb21c723dbe4ddd64ee4b2c5fa65c368) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ars1scg0.12f", 0x000000, 0x200000, CRC(bc49ed86) SHA1(289b39f2cb21c723dbe4ddd64ee4b2c5fa65c368) ) // == ars1scg0.12l + ROM_LOAD( "ars1scg0.12l", 0x000000, 0x200000, CRC(bc49ed86) SHA1(289b39f2cb21c723dbe4ddd64ee4b2c5fa65c368) ) // (intentionally loaded in at 0x000000) - ROM_REGION( 0xc00000, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ars1cg0.8d", 0x000000, 0x200000, CRC(74f4515c) SHA1(1e3a96281d543213d10c962b4d387c414d76e0c3) ) - ROM_LOAD( "ars1cg1.10d", 0x200000, 0x200000, CRC(329a95c1) SHA1(2cad7fd9e5ca7c64729ca2548ef4f873a0b8de64) ) - ROM_LOAD( "ars1cg2.12d", 0x400000, 0x200000, CRC(5648345a) SHA1(0dc7aedba65b7d97687a9e38a63597f16cee6179) ) - ROM_LOAD( "ars1cg3.13d", 0x600000, 0x200000, CRC(a752f205) SHA1(373b5a69e4488bc30763568ceae512ab7039f5f8) ) - ROM_LOAD( "ars1cg4.14d", 0x800000, 0x200000, CRC(54bf35b6) SHA1(aec43b66e7597ad7d113ae785417bf26164c1bca) ) - ROM_LOAD( "ars1cg5.16d", 0xa00000, 0x200000, CRC(e24a19a2) SHA1(34c1b51eea954ae3000602e550eb1cef0a10e651) ) + ROM_REGION( 0xc00000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ars1cg0.8d", 0x000000, 0x200000, CRC(74f4515c) SHA1(1e3a96281d543213d10c962b4d387c414d76e0c3) ) // == ars1cg0.12b + ROM_LOAD( "ars1cg1.10d", 0x200000, 0x200000, CRC(329a95c1) SHA1(2cad7fd9e5ca7c64729ca2548ef4f873a0b8de64) ) // == ars1cg1.13b + ROM_LOAD( "ars1cg2.12d", 0x400000, 0x200000, CRC(5648345a) SHA1(0dc7aedba65b7d97687a9e38a63597f16cee6179) ) // == ars1cg2.14b + ROM_LOAD( "ars1cg3.13d", 0x600000, 0x200000, CRC(a752f205) SHA1(373b5a69e4488bc30763568ceae512ab7039f5f8) ) // == ars1cg3.16b + ROM_LOAD( "ars1cg4.14d", 0x800000, 0x200000, CRC(54bf35b6) SHA1(aec43b66e7597ad7d113ae785417bf26164c1bca) ) // == ars1cg4.18b + ROM_LOAD( "ars1cg5.16d", 0xa00000, 0x200000, CRC(e24a19a2) SHA1(34c1b51eea954ae3000602e550eb1cef0a10e651) ) // == ars1cg5.19b + ROM_LOAD( "ars1cg0.12b", 0x000000, 0x200000, CRC(74f4515c) SHA1(1e3a96281d543213d10c962b4d387c414d76e0c3) ) + ROM_LOAD( "ars1cg1.13b", 0x200000, 0x200000, CRC(329a95c1) SHA1(2cad7fd9e5ca7c64729ca2548ef4f873a0b8de64) ) + ROM_LOAD( "ars1cg2.14b", 0x400000, 0x200000, CRC(5648345a) SHA1(0dc7aedba65b7d97687a9e38a63597f16cee6179) ) + ROM_LOAD( "ars1cg3.16b", 0x600000, 0x200000, CRC(a752f205) SHA1(373b5a69e4488bc30763568ceae512ab7039f5f8) ) + ROM_LOAD( "ars1cg4.18b", 0x800000, 0x200000, CRC(54bf35b6) SHA1(aec43b66e7597ad7d113ae785417bf26164c1bca) ) + ROM_LOAD( "ars1cg5.19b", 0xa00000, 0x200000, CRC(e24a19a2) SHA1(34c1b51eea954ae3000602e550eb1cef0a10e651) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ars1ccrl.3d", 0x000000, 0x200000, CRC(fc8c9161) SHA1(ad0fcfae27e02d68a6f8d1d03c514dc2f12d9ee8) ) - ROM_LOAD( "ars1ccrh.1d", 0x200000, 0x080000, CRC(a17660bb) SHA1(bae2c3f20772c6cea99f271ee3f39b1f999038c6) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ars1ccrl.3d", 0x000000, 0x200000, CRC(fc8c9161) SHA1(ad0fcfae27e02d68a6f8d1d03c514dc2f12d9ee8) ) // == ars1ccrl.7b + ROM_LOAD( "ars1ccrh.1d", 0x200000, 0x080000, CRC(a17660bb) SHA1(bae2c3f20772c6cea99f271ee3f39b1f999038c6) ) // == ars1ccrh.5b + ROM_LOAD( "ars1ccrl.7b", 0x000000, 0x200000, CRC(fc8c9161) SHA1(ad0fcfae27e02d68a6f8d1d03c514dc2f12d9ee8) ) + ROM_LOAD( "ars1ccrh.5b", 0x200000, 0x080000, CRC(a17660bb) SHA1(bae2c3f20772c6cea99f271ee3f39b1f999038c6) ) - ROM_REGION( 0x80000*12, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "ars1ptrl0.18k", 0x000000, 0x080000, CRC(f04e0e61) SHA1(d58a1d3ca1d0922e134db21a04feaee7dc97b020) ) ROM_LOAD( "ars1ptrl1.16k", 0x080000, 0x080000, CRC(8bdb4970) SHA1(a504cd4beca4bedd1a7a228c83dd6b844ca3a1e0) ) ROM_LOAD( "ars1ptrl2.15k", 0x100000, 0x080000, CRC(ec993a4f) SHA1(883f64e3e8d951415e9cef589c354eba9406c0aa) ) @@ -5213,7 +5363,7 @@ ROM_START( alpinr2a ) ROM_LOAD( "ars1ptru2.15f", 0x500000, 0x080000, CRC(bcfad0ba) SHA1(bee7f2f9ecd2b289c6706e19fa86863913b286b5) ) ROM_LOAD( "ars1ptru3.14f", 0x580000, 0x080000, CRC(73ce6958) SHA1(918b0fb0fca33dbe3be3ac679b8b28f58213f75b) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "ars1wavea.2l", 0x000000, 0x400000, CRC(f8d107e9) SHA1(5c418691f0b35403553f21f5570eda8bbb66890f) ) ROM_LOAD( "ars2waveb.1l", 0x800000, 0x400000, CRC(deab4ad1) SHA1(580ad88d516280baaf6cc92b2e07cdc0cfc486f3) ) @@ -5223,166 +5373,280 @@ ROM_END ROM_START( alpines ) - ROM_REGION( 0x800000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x800000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "af2ver-a_ll.ic2", 0x000003, 0x200000, CRC(e776159d) SHA1(5110364afb7ec606074d58a1d216d7d687b9df62) ) ROM_LOAD32_BYTE( "af2ver-a_lm.ic3", 0x000002, 0x200000, CRC(c5333d38) SHA1(9486cead964f95f8e56dac2f88486f3b98561aa6) ) ROM_LOAD32_BYTE( "af2ver-a_um.ic4", 0x000001, 0x200000, CRC(c9095af3) SHA1(4981c8c84057373ef678e51fe72ebac40d1a0cf4) ) ROM_LOAD32_BYTE( "af2ver-a_uu.ic5", 0x000000, 0x200000, CRC(54ee33a1) SHA1(0eaa8707ab13a0a66551f61a08986c98f5c9e446) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 ROM_LOAD( "af1data.8k", 0x000000, 0x080000, CRC(ef13ebe8) SHA1(5d3f697994d4b5b19ee7fea1e2aef8e39449b68e) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "af1scg0b.12f", 0x000000, 0x200000, CRC(46a6222a) SHA1(5322ef60690625b9b8dbe1cfe0c49dcd9c8b1a4c) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "af1scg0b.12f", 0x000000, 0x200000, CRC(46a6222a) SHA1(5322ef60690625b9b8dbe1cfe0c49dcd9c8b1a4c) ) // == af1scg0b.12l + ROM_LOAD( "af1scg0b.12l", 0x000000, 0x200000, CRC(46a6222a) SHA1(5322ef60690625b9b8dbe1cfe0c49dcd9c8b1a4c) ) // (intentionally loaded in at 0x000000) - ROM_REGION( 0x200000*5, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "af1cg0.8d", 0x200000*0, 0x200000, CRC(7423f3ff) SHA1(6a2fd44823ef46111deb57d328b1b75cc355d413) ) - ROM_LOAD( "af1cg1.10d", 0x200000*1, 0x200000, CRC(ea76689a) SHA1(73dd3af737a3e9903abe5ed9c9ae7eded51d8350) ) - ROM_LOAD( "af1cg2.12d", 0x200000*2, 0x200000, CRC(2a38943a) SHA1(15d737996f49bf6374ef6191bbfbe0298d398378) ) - ROM_LOAD( "af1cg3.13d", 0x200000*3, 0x200000, CRC(7f5a3e0f) SHA1(241f9995323b28df23d20a75e1f43ce6e05434cd) ) - ROM_LOAD( "af1cg4.14d", 0x200000*4, 0x200000, CRC(a5ee13e2) SHA1(48fd3c912690f21cbbc2a39bed0a82be41a0d011) ) + ROM_REGION( 0xa00000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "af1cg0.8d", 0x000000, 0x200000, CRC(7423f3ff) SHA1(6a2fd44823ef46111deb57d328b1b75cc355d413) ) // == af1cg0.12b + ROM_LOAD( "af1cg1.10d", 0x200000, 0x200000, CRC(ea76689a) SHA1(73dd3af737a3e9903abe5ed9c9ae7eded51d8350) ) // == af1cg1.13b + ROM_LOAD( "af1cg2.12d", 0x400000, 0x200000, CRC(2a38943a) SHA1(15d737996f49bf6374ef6191bbfbe0298d398378) ) // == af1cg2.14b + ROM_LOAD( "af1cg3.13d", 0x600000, 0x200000, CRC(7f5a3e0f) SHA1(241f9995323b28df23d20a75e1f43ce6e05434cd) ) // == af1cg3.16b + ROM_LOAD( "af1cg4.14d", 0x800000, 0x200000, CRC(a5ee13e2) SHA1(48fd3c912690f21cbbc2a39bed0a82be41a0d011) ) // == af1cg4.18b + ROM_LOAD( "af1cg0.12b", 0x000000, 0x200000, CRC(7423f3ff) SHA1(6a2fd44823ef46111deb57d328b1b75cc355d413) ) + ROM_LOAD( "af1cg1.13b", 0x200000, 0x200000, CRC(ea76689a) SHA1(73dd3af737a3e9903abe5ed9c9ae7eded51d8350) ) + ROM_LOAD( "af1cg2.14b", 0x400000, 0x200000, CRC(2a38943a) SHA1(15d737996f49bf6374ef6191bbfbe0298d398378) ) + ROM_LOAD( "af1cg3.16b", 0x600000, 0x200000, CRC(7f5a3e0f) SHA1(241f9995323b28df23d20a75e1f43ce6e05434cd) ) + ROM_LOAD( "af1cg4.18b", 0x800000, 0x200000, CRC(a5ee13e2) SHA1(48fd3c912690f21cbbc2a39bed0a82be41a0d011) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "af1ccrl.3d", 0x000000, 0x200000, CRC(6c054698) SHA1(8537607646b183883c5aa4060fb0af640da4af87) ) - ROM_LOAD( "af1ccrh.1d", 0x200000, 0x080000, CRC(95a02a27) SHA1(32ee87b76ae9fcec6d825e3cf4d5cbb97db39544) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "af1ccrl.3d", 0x000000, 0x200000, CRC(6c054698) SHA1(8537607646b183883c5aa4060fb0af640da4af87) ) // == af1ccrl.7b + ROM_LOAD( "af1ccrh.1d", 0x200000, 0x080000, CRC(95a02a27) SHA1(32ee87b76ae9fcec6d825e3cf4d5cbb97db39544) ) // == af1ccrh.5b + ROM_LOAD( "af1ccrl.7b", 0x000000, 0x200000, CRC(6c054698) SHA1(8537607646b183883c5aa4060fb0af640da4af87) ) + ROM_LOAD( "af1ccrh.5b", 0x200000, 0x080000, CRC(95a02a27) SHA1(32ee87b76ae9fcec6d825e3cf4d5cbb97db39544) ) - ROM_REGION( 0x80000*6, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "af1ptrl0.18k", 0x80000*0, 0x80000, CRC(31ce46d3) SHA1(568fb9ee9ac14e613a4fd7668cb38315c10be62b) ) - ROM_LOAD( "af1ptrl1.16k", 0x80000*1, 0x80000, CRC(e869bf00) SHA1(b3c3026891ae3958d1774c905e97c3b57a414ea7) ) - ROM_LOAD( "af1ptrm0.18j", 0x80000*2, 0x80000, CRC(ef7f4d8a) SHA1(02f77c68004b7dccc99b61126e7d07960eb15028) ) - ROM_LOAD( "af1ptrm1.16j", 0x80000*3, 0x80000, CRC(7dd01d52) SHA1(adc1087435d31ed6163ad046466955f01517450f) ) - ROM_LOAD( "af1ptru0.18f", 0x80000*4, 0x80000, CRC(177f1591) SHA1(3969e780e5603eca0a65f65c1ad14d1cef918b39) ) - ROM_LOAD( "af1ptru1.16f", 0x80000*5, 0x80000, CRC(7521d18e) SHA1(dc03ef369db16f59c138ff4e22260d1c04782d1f) ) + ROM_REGION( 0x300000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "af1ptrl0.18k", 0x000000, 0x080000, CRC(31ce46d3) SHA1(568fb9ee9ac14e613a4fd7668cb38315c10be62b) ) + ROM_LOAD( "af1ptrl1.16k", 0x080000, 0x080000, CRC(e869bf00) SHA1(b3c3026891ae3958d1774c905e97c3b57a414ea7) ) + ROM_LOAD( "af1ptrm0.18j", 0x100000, 0x080000, CRC(ef7f4d8a) SHA1(02f77c68004b7dccc99b61126e7d07960eb15028) ) + ROM_LOAD( "af1ptrm1.16j", 0x180000, 0x080000, CRC(7dd01d52) SHA1(adc1087435d31ed6163ad046466955f01517450f) ) + ROM_LOAD( "af1ptru0.18f", 0x200000, 0x080000, CRC(177f1591) SHA1(3969e780e5603eca0a65f65c1ad14d1cef918b39) ) + ROM_LOAD( "af1ptru1.16f", 0x280000, 0x080000, CRC(7521d18e) SHA1(dc03ef369db16f59c138ff4e22260d1c04782d1f) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "af1wavea.2l", 0x000000, 0x400000, CRC(28cca494) SHA1(4ff87ab85fd17bf8dbee5b03d99cc5c31dd6349a) ) ROM_END ROM_START( timecris ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "ts2ver-b.1", 0x00003, 0x100000, CRC(29b377f7) SHA1(21864ba964602115c1268fd5edd8006a13a86cfc) ) - ROM_LOAD32_BYTE( "ts2ver-b.2", 0x00002, 0x100000, CRC(79512e25) SHA1(137a215ec192e76e93511456ad504481a566c9c9) ) - ROM_LOAD32_BYTE( "ts2ver-b.3", 0x00001, 0x100000, CRC(9f4ced33) SHA1(32768b5ff263a9e3d11b7b36f6b2d7e951e07419) ) - ROM_LOAD32_BYTE( "ts2ver-b.4", 0x00000, 0x100000, CRC(3e0cfb38) SHA1(3c56342bd73b1617ea579a0d53e19d59bb04fd99) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "ts2verb.1", 0x00003, 0x100000, CRC(29b377f7) SHA1(21864ba964602115c1268fd5edd8006a13a86cfc) ) + ROM_LOAD32_BYTE( "ts2verb.2", 0x00002, 0x100000, CRC(79512e25) SHA1(137a215ec192e76e93511456ad504481a566c9c9) ) + ROM_LOAD32_BYTE( "ts2verb.3", 0x00001, 0x100000, CRC(9f4ced33) SHA1(32768b5ff263a9e3d11b7b36f6b2d7e951e07419) ) + ROM_LOAD32_BYTE( "ts2verb.4", 0x00000, 0x100000, CRC(3e0cfb38) SHA1(3c56342bd73b1617ea579a0d53e19d59bb04fd99) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ts1data.8k", 0, 0x080000, CRC(e68aa973) SHA1(663e80d249be5d5841139d98a9d72e2396851272) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ts1scg0.12f",0x200000*0, 0x200000,CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) - ROM_LOAD( "ts1scg1.10f",0x200000*1, 0x200000,CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) - ROM_LOAD( "ts1scg2.8f", 0x200000*2, 0x200000,CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) - ROM_LOAD( "ts1scg3.7f", 0x200000*3, 0x200000,CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) - ROM_LOAD( "ts1scg4.5f", 0x200000*4, 0x200000,CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) - ROM_LOAD( "ts1scg5.3f", 0x200000*5, 0x200000,CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ts1scg0.12f", 0x000000, 0x200000, CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) // == ts1scg0.12l + ROM_LOAD( "ts1scg1.10f", 0x200000, 0x200000, CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) // == ts1scg1.10l + ROM_LOAD( "ts1scg2.8f", 0x400000, 0x200000, CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) // == ts1scg2.8l + ROM_LOAD( "ts1scg3.7f", 0x600000, 0x200000, CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) // == ts1scg3.7l + ROM_LOAD( "ts1scg4.5f", 0x800000, 0x200000, CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) // == ts1scg4.5l + ROM_LOAD( "ts1scg5.3f", 0xa00000, 0x200000, CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) // == ts1scg5.3l + ROM_LOAD( "ts1scg0.12l", 0x000000, 0x200000, CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) + ROM_LOAD( "ts1scg1.10l", 0x200000, 0x200000, CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) + ROM_LOAD( "ts1scg2.8l", 0x400000, 0x200000, CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) + ROM_LOAD( "ts1scg3.7l", 0x600000, 0x200000, CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) + ROM_LOAD( "ts1scg4.5l", 0x800000, 0x200000, CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) + ROM_LOAD( "ts1scg5.3l", 0xa00000, 0x200000, CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ts1cg0.8d", 0x200000*0x0, 0x200000,CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) - ROM_LOAD( "ts1cg1.10d", 0x200000*0x1, 0x200000,CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) - ROM_LOAD( "ts1cg2.12d", 0x200000*0x2, 0x200000,CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) - ROM_LOAD( "ts1cg3.13d", 0x200000*0x3, 0x200000,CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) - ROM_LOAD( "ts1cg4.14d", 0x200000*0x4, 0x200000,CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) - ROM_LOAD( "ts1cg5.16d", 0x200000*0x5, 0x200000,CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) - ROM_LOAD( "ts1cg6.18d", 0x200000*0x6, 0x200000,CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ts1cg0.8d", 0x000000, 0x200000, CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) // == ts1cg0.12b + ROM_LOAD( "ts1cg1.10d", 0x200000, 0x200000, CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) // == ts1cg1.13b + ROM_LOAD( "ts1cg2.12d", 0x400000, 0x200000, CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) // == ts1cg2.14b + ROM_LOAD( "ts1cg3.13d", 0x600000, 0x200000, CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) // == ts1cg3.16b + ROM_LOAD( "ts1cg4.14d", 0x800000, 0x200000, CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) // == ts1cg4.18b + ROM_LOAD( "ts1cg5.16d", 0xa00000, 0x200000, CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) // == ts1cg5.19b + ROM_LOAD( "ts1cg6.18d", 0xc00000, 0x200000, CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) // == ts1cg6.18a + ROM_LOAD( "ts1cg0.12b", 0x000000, 0x200000, CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) + ROM_LOAD( "ts1cg1.13b", 0x200000, 0x200000, CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) + ROM_LOAD( "ts1cg2.14b", 0x400000, 0x200000, CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) + ROM_LOAD( "ts1cg3.16b", 0x600000, 0x200000, CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) + ROM_LOAD( "ts1cg4.18b", 0x800000, 0x200000, CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) + ROM_LOAD( "ts1cg5.19b", 0xa00000, 0x200000, CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) + ROM_LOAD( "ts1cg6.18a", 0xc00000, 0x200000, CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ts1ccrl.3d", 0x000000, 0x200000,CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) - ROM_LOAD( "ts1ccrh.1d", 0x200000, 0x080000,CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ts1ccrl.3d", 0x000000, 0x200000, CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) // == ts1ccrl.7b + ROM_LOAD( "ts1ccrh.1d", 0x200000, 0x080000, CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) // == ts1ccrh.5b + ROM_LOAD( "ts1ccrl.7b", 0x000000, 0x200000, CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) + ROM_LOAD( "ts1ccrh.5b", 0x200000, 0x080000, CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "ts1ptrl0.18k", 0x80000*0, 0x80000,CRC(e5f2d275) SHA1(2f5057e65ec8a3ec03f841f15f10769ae1f69139) ) - ROM_LOAD( "ts1ptrl1.16k", 0x80000*1, 0x80000,CRC(2bba3800) SHA1(1d9c944cb06417cb0ac47a58b922dddb83387586) ) - ROM_LOAD( "ts1ptrl2.15k", 0x80000*2, 0x80000,CRC(d4441c08) SHA1(6a6bb9cecbf35cb81b7681e220fc33df9a01d07f) ) - ROM_LOAD( "ts1ptrm0.18j", 0x80000*3, 0x80000,CRC(8aea02ba) SHA1(44ba85ba6d59758448d17ec39dfb628882ddc684) ) - ROM_LOAD( "ts1ptrm1.16j", 0x80000*4, 0x80000,CRC(bccf19bc) SHA1(4a6566948bdd2b0f82b7c30e57d3fe65005c26e3) ) - ROM_LOAD( "ts1ptrm2.15j", 0x80000*5, 0x80000,CRC(7280be31) SHA1(476b7171ae855d8bbd968ccbaa55b5100d274e3b) ) - ROM_LOAD( "ts1ptru0.18f", 0x80000*6, 0x80000,CRC(c30d6332) SHA1(a5c59d0abfe38de975fa0d606ed8500eb02008b7) ) - ROM_LOAD( "ts1ptru1.16f", 0x80000*7, 0x80000,CRC(993cde84) SHA1(c9cdcca1d60bcc41ad881c02dda9895563963ead) ) - ROM_LOAD( "ts1ptru2.15f", 0x80000*8, 0x80000,CRC(7cb25c73) SHA1(616eab3ac238864a584394f7ec8736ece227974a) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ts1ptrl0.18k", 0x000000, 0x080000, CRC(e5f2d275) SHA1(2f5057e65ec8a3ec03f841f15f10769ae1f69139) ) + ROM_LOAD( "ts1ptrl1.16k", 0x080000, 0x080000, CRC(2bba3800) SHA1(1d9c944cb06417cb0ac47a58b922dddb83387586) ) + ROM_LOAD( "ts1ptrl2.15k", 0x100000, 0x080000, CRC(d4441c08) SHA1(6a6bb9cecbf35cb81b7681e220fc33df9a01d07f) ) + ROM_LOAD( "ts1ptrm0.18j", 0x180000, 0x080000, CRC(8aea02ba) SHA1(44ba85ba6d59758448d17ec39dfb628882ddc684) ) + ROM_LOAD( "ts1ptrm1.16j", 0x200000, 0x080000, CRC(bccf19bc) SHA1(4a6566948bdd2b0f82b7c30e57d3fe65005c26e3) ) + ROM_LOAD( "ts1ptrm2.15j", 0x280000, 0x080000, CRC(7280be31) SHA1(476b7171ae855d8bbd968ccbaa55b5100d274e3b) ) + ROM_LOAD( "ts1ptru0.18f", 0x300000, 0x080000, CRC(c30d6332) SHA1(a5c59d0abfe38de975fa0d606ed8500eb02008b7) ) + ROM_LOAD( "ts1ptru1.16f", 0x380000, 0x080000, CRC(993cde84) SHA1(c9cdcca1d60bcc41ad881c02dda9895563963ead) ) + ROM_LOAD( "ts1ptru2.15f", 0x400000, 0x080000, CRC(7cb25c73) SHA1(616eab3ac238864a584394f7ec8736ece227974a) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD16_WORD_SWAP( "ts1wavea.2l", 0x000000, 0x400000, CRC(d1123301) SHA1(4bf1fd746fef4e6befa63c61a761971d729e1573) ) ROM_LOAD( "ts1waveb.1l", 0x800000, 0x200000, CRC(bf4d7272) SHA1(c7c7b3620e7b3176644b6784ee36e679c9e31cc1) ) ROM_END ROM_START( timecrisa ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_WORD_SWAP( "ts2ver-a.1", 0x00002, 0x200000, CRC(d57eb74b) SHA1(536dd9305d0ac44110c575776333310cc57b5242) ) - ROM_LOAD32_WORD_SWAP( "ts2ver-a.2", 0x00000, 0x200000, CRC(671588af) SHA1(63f992c6795521fd263a0ebf230f8dc88cbfc443) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_WORD_SWAP( "ts2vera.1", 0x00002, 0x200000, CRC(d57eb74b) SHA1(536dd9305d0ac44110c575776333310cc57b5242) ) + ROM_LOAD32_WORD_SWAP( "ts2vera.2", 0x00000, 0x200000, CRC(671588af) SHA1(63f992c6795521fd263a0ebf230f8dc88cbfc443) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.30 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 ROM_LOAD( "ts1data.8k", 0, 0x080000, CRC(e68aa973) SHA1(663e80d249be5d5841139d98a9d72e2396851272) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "ts1scg0.12f",0x200000*0, 0x200000,CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) - ROM_LOAD( "ts1scg1.10f",0x200000*1, 0x200000,CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) - ROM_LOAD( "ts1scg2.8f", 0x200000*2, 0x200000,CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) - ROM_LOAD( "ts1scg3.7f", 0x200000*3, 0x200000,CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) - ROM_LOAD( "ts1scg4.5f", 0x200000*4, 0x200000,CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) - ROM_LOAD( "ts1scg5.3f", 0x200000*5, 0x200000,CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ts1scg0.12f", 0x000000, 0x200000, CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) // == ts1scg0.12l + ROM_LOAD( "ts1scg1.10f", 0x200000, 0x200000, CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) // == ts1scg1.10l + ROM_LOAD( "ts1scg2.8f", 0x400000, 0x200000, CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) // == ts1scg2.8l + ROM_LOAD( "ts1scg3.7f", 0x600000, 0x200000, CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) // == ts1scg3.7l + ROM_LOAD( "ts1scg4.5f", 0x800000, 0x200000, CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) // == ts1scg4.5l + ROM_LOAD( "ts1scg5.3f", 0xa00000, 0x200000, CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) // == ts1scg5.3l + ROM_LOAD( "ts1scg0.12l", 0x000000, 0x200000, CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) + ROM_LOAD( "ts1scg1.10l", 0x200000, 0x200000, CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) + ROM_LOAD( "ts1scg2.8l", 0x400000, 0x200000, CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) + ROM_LOAD( "ts1scg3.7l", 0x600000, 0x200000, CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) + ROM_LOAD( "ts1scg4.5l", 0x800000, 0x200000, CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) + ROM_LOAD( "ts1scg5.3l", 0xa00000, 0x200000, CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "ts1cg0.8d", 0x200000*0x0, 0x200000,CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) - ROM_LOAD( "ts1cg1.10d", 0x200000*0x1, 0x200000,CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) - ROM_LOAD( "ts1cg2.12d", 0x200000*0x2, 0x200000,CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) - ROM_LOAD( "ts1cg3.13d", 0x200000*0x3, 0x200000,CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) - ROM_LOAD( "ts1cg4.14d", 0x200000*0x4, 0x200000,CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) - ROM_LOAD( "ts1cg5.16d", 0x200000*0x5, 0x200000,CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) - ROM_LOAD( "ts1cg6.18d", 0x200000*0x6, 0x200000,CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ts1cg0.8d", 0x000000, 0x200000, CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) // == ts1cg0.12b + ROM_LOAD( "ts1cg1.10d", 0x200000, 0x200000, CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) // == ts1cg1.13b + ROM_LOAD( "ts1cg2.12d", 0x400000, 0x200000, CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) // == ts1cg2.14b + ROM_LOAD( "ts1cg3.13d", 0x600000, 0x200000, CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) // == ts1cg3.16b + ROM_LOAD( "ts1cg4.14d", 0x800000, 0x200000, CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) // == ts1cg4.18b + ROM_LOAD( "ts1cg5.16d", 0xa00000, 0x200000, CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) // == ts1cg5.19b + ROM_LOAD( "ts1cg6.18d", 0xc00000, 0x200000, CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) // == ts1cg6.18a + ROM_LOAD( "ts1cg0.12b", 0x000000, 0x200000, CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) + ROM_LOAD( "ts1cg1.13b", 0x200000, 0x200000, CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) + ROM_LOAD( "ts1cg2.14b", 0x400000, 0x200000, CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) + ROM_LOAD( "ts1cg3.16b", 0x600000, 0x200000, CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) + ROM_LOAD( "ts1cg4.18b", 0x800000, 0x200000, CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) + ROM_LOAD( "ts1cg5.19b", 0xa00000, 0x200000, CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) + ROM_LOAD( "ts1cg6.18a", 0xc00000, 0x200000, CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "ts1ccrl.3d", 0x000000, 0x200000,CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) - ROM_LOAD( "ts1ccrh.1d", 0x200000, 0x080000,CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ts1ccrl.3d", 0x000000, 0x200000, CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) // == ts1ccrl.7b + ROM_LOAD( "ts1ccrh.1d", 0x200000, 0x080000, CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) // == ts1ccrh.5b + ROM_LOAD( "ts1ccrl.7b", 0x000000, 0x200000, CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) + ROM_LOAD( "ts1ccrh.5b", 0x200000, 0x080000, CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) - ROM_REGION( 0x80000*9, "pointrom", 0 ) /* 3d model data */ - ROM_LOAD( "ts1ptrl0.18k", 0x80000*0, 0x80000,CRC(e5f2d275) SHA1(2f5057e65ec8a3ec03f841f15f10769ae1f69139) ) - ROM_LOAD( "ts1ptrl1.16k", 0x80000*1, 0x80000,CRC(2bba3800) SHA1(1d9c944cb06417cb0ac47a58b922dddb83387586) ) - ROM_LOAD( "ts1ptrl2.15k", 0x80000*2, 0x80000,CRC(d4441c08) SHA1(6a6bb9cecbf35cb81b7681e220fc33df9a01d07f) ) - ROM_LOAD( "ts1ptrm0.18j", 0x80000*3, 0x80000,CRC(8aea02ba) SHA1(44ba85ba6d59758448d17ec39dfb628882ddc684) ) - ROM_LOAD( "ts1ptrm1.16j", 0x80000*4, 0x80000,CRC(bccf19bc) SHA1(4a6566948bdd2b0f82b7c30e57d3fe65005c26e3) ) - ROM_LOAD( "ts1ptrm2.15j", 0x80000*5, 0x80000,CRC(7280be31) SHA1(476b7171ae855d8bbd968ccbaa55b5100d274e3b) ) - ROM_LOAD( "ts1ptru0.18f", 0x80000*6, 0x80000,CRC(c30d6332) SHA1(a5c59d0abfe38de975fa0d606ed8500eb02008b7) ) - ROM_LOAD( "ts1ptru1.16f", 0x80000*7, 0x80000,CRC(993cde84) SHA1(c9cdcca1d60bcc41ad881c02dda9895563963ead) ) - ROM_LOAD( "ts1ptru2.15f", 0x80000*8, 0x80000,CRC(7cb25c73) SHA1(616eab3ac238864a584394f7ec8736ece227974a) ) + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ts1ptrl0.18k", 0x000000, 0x080000, CRC(e5f2d275) SHA1(2f5057e65ec8a3ec03f841f15f10769ae1f69139) ) + ROM_LOAD( "ts1ptrl1.16k", 0x080000, 0x080000, CRC(2bba3800) SHA1(1d9c944cb06417cb0ac47a58b922dddb83387586) ) + ROM_LOAD( "ts1ptrl2.15k", 0x100000, 0x080000, CRC(d4441c08) SHA1(6a6bb9cecbf35cb81b7681e220fc33df9a01d07f) ) + ROM_LOAD( "ts1ptrm0.18j", 0x180000, 0x080000, CRC(8aea02ba) SHA1(44ba85ba6d59758448d17ec39dfb628882ddc684) ) + ROM_LOAD( "ts1ptrm1.16j", 0x200000, 0x080000, CRC(bccf19bc) SHA1(4a6566948bdd2b0f82b7c30e57d3fe65005c26e3) ) + ROM_LOAD( "ts1ptrm2.15j", 0x280000, 0x080000, CRC(7280be31) SHA1(476b7171ae855d8bbd968ccbaa55b5100d274e3b) ) + ROM_LOAD( "ts1ptru0.18f", 0x300000, 0x080000, CRC(c30d6332) SHA1(a5c59d0abfe38de975fa0d606ed8500eb02008b7) ) + ROM_LOAD( "ts1ptru1.16f", 0x380000, 0x080000, CRC(993cde84) SHA1(c9cdcca1d60bcc41ad881c02dda9895563963ead) ) + ROM_LOAD( "ts1ptru2.15f", 0x400000, 0x080000, CRC(7cb25c73) SHA1(616eab3ac238864a584394f7ec8736ece227974a) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples + ROM_LOAD16_WORD_SWAP( "ts1wavea.2l", 0x000000, 0x400000, CRC(d1123301) SHA1(4bf1fd746fef4e6befa63c61a761971d729e1573) ) + ROM_LOAD( "ts1waveb.1l", 0x800000, 0x200000, CRC(bf4d7272) SHA1(c7c7b3620e7b3176644b6784ee36e679c9e31cc1) ) +ROM_END + +ROM_START( timecrisj ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "ts1verb.1", 0x00003, 0x100000, CRC(17c7ba64) SHA1(bb915000dba1a259953e0cd62143e95407f57499) ) + ROM_LOAD32_BYTE( "ts1verb.2", 0x00002, 0x100000, CRC(77bacf13) SHA1(8d0bab13858e8ea813daeb99f2a9bb6946ac5888) ) + ROM_LOAD32_BYTE( "ts1verb.3", 0x00001, 0x100000, CRC(b68e62f3) SHA1(5cd0543ceeaf4399994efbfc377ff65e4e7baca8) ) + ROM_LOAD32_BYTE( "ts1verb.4", 0x00000, 0x100000, CRC(8ea2331f) SHA1(36fc49b617775b7d8d2867d6ff215962d1b96571) ) + + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.30 + ROM_LOAD( "ts1data.8k", 0, 0x080000, CRC(e68aa973) SHA1(663e80d249be5d5841139d98a9d72e2396851272) ) + + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "ts1scg0.12f", 0x000000, 0x200000, CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) // == ts1scg0.12l + ROM_LOAD( "ts1scg1.10f", 0x200000, 0x200000, CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) // == ts1scg1.10l + ROM_LOAD( "ts1scg2.8f", 0x400000, 0x200000, CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) // == ts1scg2.8l + ROM_LOAD( "ts1scg3.7f", 0x600000, 0x200000, CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) // == ts1scg3.7l + ROM_LOAD( "ts1scg4.5f", 0x800000, 0x200000, CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) // == ts1scg4.5l + ROM_LOAD( "ts1scg5.3f", 0xa00000, 0x200000, CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) // == ts1scg5.3l + ROM_LOAD( "ts1scg0.12l", 0x000000, 0x200000, CRC(14a3674d) SHA1(c5792a385572452b43bbc7eb8428335b19daa3c0) ) + ROM_LOAD( "ts1scg1.10l", 0x200000, 0x200000, CRC(11791dbf) SHA1(3d75b468d69a8bf398d45f310cdb8bc88b63f25c) ) + ROM_LOAD( "ts1scg2.8l", 0x400000, 0x200000, CRC(d630fff9) SHA1(691394027b858702f06282f965f5b53e6fed496b) ) + ROM_LOAD( "ts1scg3.7l", 0x600000, 0x200000, CRC(1a62f015) SHA1(7d09ae480ae7813391616ae0090929ba845a345a) ) + ROM_LOAD( "ts1scg4.5l", 0x800000, 0x200000, CRC(511b8dd6) SHA1(936649c0a61d29f024a28e4ab64cce4b55d58f64) ) + ROM_LOAD( "ts1scg5.3l", 0xa00000, 0x200000, CRC(553bb246) SHA1(94659bee4fd0afe834a8bf3414d8825411cf9e86) ) + + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "ts1cg0.8d", 0x000000, 0x200000, CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) // == ts1cg0.12b + ROM_LOAD( "ts1cg1.10d", 0x200000, 0x200000, CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) // == ts1cg1.13b + ROM_LOAD( "ts1cg2.12d", 0x400000, 0x200000, CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) // == ts1cg2.14b + ROM_LOAD( "ts1cg3.13d", 0x600000, 0x200000, CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) // == ts1cg3.16b + ROM_LOAD( "ts1cg4.14d", 0x800000, 0x200000, CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) // == ts1cg4.18b + ROM_LOAD( "ts1cg5.16d", 0xa00000, 0x200000, CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) // == ts1cg5.19b + ROM_LOAD( "ts1cg6.18d", 0xc00000, 0x200000, CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) // == ts1cg6.18a + ROM_LOAD( "ts1cg0.12b", 0x000000, 0x200000, CRC(de07b22c) SHA1(f4d07b8840ec8be625eff634bce619e960c334a5) ) + ROM_LOAD( "ts1cg1.13b", 0x200000, 0x200000, CRC(992d26f6) SHA1(a0b9007312804b413d4c1748527378da4d8d53b3) ) + ROM_LOAD( "ts1cg2.14b", 0x400000, 0x200000, CRC(6273954f) SHA1(d73a43888b53e4c42fc33e8e1b38e60fd3329413) ) + ROM_LOAD( "ts1cg3.16b", 0x600000, 0x200000, CRC(38171f24) SHA1(d04caaa5b1b377ced38501b014e4cb7fc831c41d) ) + ROM_LOAD( "ts1cg4.18b", 0x800000, 0x200000, CRC(51f09856) SHA1(0eef421907ee813d5117e62cf0005bf00eb29c88) ) + ROM_LOAD( "ts1cg5.19b", 0xa00000, 0x200000, CRC(4cd9fd79) SHA1(0d2018ec914683a75bdec8655d678fd562eb6d15) ) + ROM_LOAD( "ts1cg6.18a", 0xc00000, 0x200000, CRC(f17f2ec9) SHA1(ed88ec524626e5bbe2e1ea6838412d3ac85671dd) ) + + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "ts1ccrl.3d", 0x000000, 0x200000, CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) // == ts1ccrl.7b + ROM_LOAD( "ts1ccrh.1d", 0x200000, 0x080000, CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) // == ts1ccrh.5b + ROM_LOAD( "ts1ccrl.7b", 0x000000, 0x200000, CRC(56cad2df) SHA1(49c0e57d5cf5d5fc4c75da6969bec01d6d443259) ) + ROM_LOAD( "ts1ccrh.5b", 0x200000, 0x080000, CRC(a1cc3741) SHA1(7fe57924c42e287b134e5d7ad00cffdff1f18084) ) + + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data + ROM_LOAD( "ts1ptrl0.18k", 0x000000, 0x080000, CRC(e5f2d275) SHA1(2f5057e65ec8a3ec03f841f15f10769ae1f69139) ) + ROM_LOAD( "ts1ptrl1.16k", 0x080000, 0x080000, CRC(2bba3800) SHA1(1d9c944cb06417cb0ac47a58b922dddb83387586) ) + ROM_LOAD( "ts1ptrl2.15k", 0x100000, 0x080000, CRC(d4441c08) SHA1(6a6bb9cecbf35cb81b7681e220fc33df9a01d07f) ) + ROM_LOAD( "ts1ptrm0.18j", 0x180000, 0x080000, CRC(8aea02ba) SHA1(44ba85ba6d59758448d17ec39dfb628882ddc684) ) + ROM_LOAD( "ts1ptrm1.16j", 0x200000, 0x080000, CRC(bccf19bc) SHA1(4a6566948bdd2b0f82b7c30e57d3fe65005c26e3) ) + ROM_LOAD( "ts1ptrm2.15j", 0x280000, 0x080000, CRC(7280be31) SHA1(476b7171ae855d8bbd968ccbaa55b5100d274e3b) ) + ROM_LOAD( "ts1ptru0.18f", 0x300000, 0x080000, CRC(c30d6332) SHA1(a5c59d0abfe38de975fa0d606ed8500eb02008b7) ) + ROM_LOAD( "ts1ptru1.16f", 0x380000, 0x080000, CRC(993cde84) SHA1(c9cdcca1d60bcc41ad881c02dda9895563963ead) ) + ROM_LOAD( "ts1ptru2.15f", 0x400000, 0x080000, CRC(7cb25c73) SHA1(616eab3ac238864a584394f7ec8736ece227974a) ) + + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD16_WORD_SWAP( "ts1wavea.2l", 0x000000, 0x400000, CRC(d1123301) SHA1(4bf1fd746fef4e6befa63c61a761971d729e1573) ) ROM_LOAD( "ts1waveb.1l", 0x800000, 0x200000, CRC(bf4d7272) SHA1(c7c7b3620e7b3176644b6784ee36e679c9e31cc1) ) ROM_END ROM_START( tokyowar ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "tw2ver-a.1", 0x000003, 0x100000, CRC(2b17ca92) SHA1(7bcb1658059c59fb1a0131a41ede7157855130a8) ) - ROM_LOAD32_BYTE( "tw2ver-a.2", 0x000002, 0x100000, CRC(12da84e3) SHA1(a9406d0b77f60ba930c30e60bf4b3656c8905585) ) - ROM_LOAD32_BYTE( "tw2ver-a.3", 0x000001, 0x100000, CRC(7d42c516) SHA1(28c1596dd55c15207bbb41a8b9a5abc97abc2bc8) ) - ROM_LOAD32_BYTE( "tw2ver-a.4", 0x000000, 0x100000, CRC(b904ed16) SHA1(773e11536e1b3fe4971608a63a8e6eca702f8667) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "tw2vera.1", 0x000003, 0x100000, CRC(2b17ca92) SHA1(7bcb1658059c59fb1a0131a41ede7157855130a8) ) + ROM_LOAD32_BYTE( "tw2vera.2", 0x000002, 0x100000, CRC(12da84e3) SHA1(a9406d0b77f60ba930c30e60bf4b3656c8905585) ) + ROM_LOAD32_BYTE( "tw2vera.3", 0x000001, 0x100000, CRC(7d42c516) SHA1(28c1596dd55c15207bbb41a8b9a5abc97abc2bc8) ) + ROM_LOAD32_BYTE( "tw2vera.4", 0x000000, 0x100000, CRC(b904ed16) SHA1(773e11536e1b3fe4971608a63a8e6eca702f8667) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "tw1data.8k", 0x000000, 0x080000, CRC(bd046e4b) SHA1(162bc4ab69959ccab49fd69de291d34d472fb1c8) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "tw1data.8k", 0x000000, 0x080000, CRC(bd046e4b) SHA1(162bc4ab69959ccab49fd69de291d34d472fb1c8) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "tw1scg0.12f", 0x000000, 0x200000, CRC(e3ec4daa) SHA1(f3a71ae9820d62075b814ffa2fecf3343ae09ffe) ) - ROM_LOAD( "tw1scg1.10f", 0x200000, 0x200000, CRC(b18a06e9) SHA1(ecf6a1e11603b8ea5119a036a57595dea021d778) ) - ROM_LOAD( "tw1scg2.8f", 0x400000, 0x200000, CRC(36f8c3d8) SHA1(d5c965d5cdd258c77b9db3137ce33404a5a3641c) ) - ROM_LOAD( "tw1scg3.7f", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "tw1scg0.12f", 0x000000, 0x200000, CRC(e3ec4daa) SHA1(f3a71ae9820d62075b814ffa2fecf3343ae09ffe) ) // == tw1scg0.12l + ROM_LOAD( "tw1scg1.10f", 0x200000, 0x200000, CRC(b18a06e9) SHA1(ecf6a1e11603b8ea5119a036a57595dea021d778) ) // == tw1scg1.10l + ROM_LOAD( "tw1scg2.8f", 0x400000, 0x200000, CRC(36f8c3d8) SHA1(d5c965d5cdd258c77b9db3137ce33404a5a3641c) ) // == tw1scg2.8l + ROM_LOAD( "tw1scg3.7f", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) ) // == tw1scg3.7l + ROM_LOAD( "tw1scg0.12l", 0x000000, 0x200000, CRC(e3ec4daa) SHA1(f3a71ae9820d62075b814ffa2fecf3343ae09ffe) ) + ROM_LOAD( "tw1scg1.10l", 0x200000, 0x200000, CRC(b18a06e9) SHA1(ecf6a1e11603b8ea5119a036a57595dea021d778) ) + ROM_LOAD( "tw1scg2.8l", 0x400000, 0x200000, CRC(36f8c3d8) SHA1(d5c965d5cdd258c77b9db3137ce33404a5a3641c) ) + ROM_LOAD( "tw1scg3.7l", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "tw1cg0.8d", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) ) - ROM_LOAD( "tw1cg1.10d", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) ) - ROM_LOAD( "tw1cg2.12d", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) ) - ROM_LOAD( "tw1cg3.13d", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) ) - ROM_LOAD( "tw1cg4.14d", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) ) - ROM_LOAD( "tw1cg5.16d", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) ) - ROM_LOAD( "tw1cg6.18d", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) ) - ROM_LOAD( "tw1cg7.19d", 0xe00000, 0x200000, CRC(12da0a43) SHA1(99287348a5219146bcd3e61fde3f2bc26b0c5a25) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "tw1cg0.8d", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) ) // == tw1cg0.12b + ROM_LOAD( "tw1cg1.10d", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) ) // == tw1cg1.13b + ROM_LOAD( "tw1cg2.12d", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) ) // == tw1cg2.14b + ROM_LOAD( "tw1cg3.13d", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) ) // == tw1cg3.16b + ROM_LOAD( "tw1cg4.14d", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) ) // == tw1cg4.18b + ROM_LOAD( "tw1cg5.16d", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) ) // == tw1cg5.19b + ROM_LOAD( "tw1cg6.18d", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) ) // == tw1cg6.18a + ROM_LOAD( "tw1cg7.19d", 0xe00000, 0x200000, CRC(12da0a43) SHA1(99287348a5219146bcd3e61fde3f2bc26b0c5a25) ) // == tw1cg7.15a + ROM_LOAD( "tw1cg0.12b", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) ) + ROM_LOAD( "tw1cg1.13b", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) ) + ROM_LOAD( "tw1cg2.14b", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) ) + ROM_LOAD( "tw1cg3.16b", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) ) + ROM_LOAD( "tw1cg4.18b", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) ) + ROM_LOAD( "tw1cg5.19b", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) ) + ROM_LOAD( "tw1cg6.18a", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) ) + ROM_LOAD( "tw1cg7.15a", 0xe00000, 0x200000, CRC(12da0a43) SHA1(99287348a5219146bcd3e61fde3f2bc26b0c5a25) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "tw1ccrl.3d", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) ) - ROM_LOAD( "tw1ccrh.1d", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "tw1ccrl.3d", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) ) // == tw1ccrl.7b + ROM_LOAD( "tw1ccrh.1d", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) ) // == tw1ccrh.5b + ROM_LOAD( "tw1ccrl.7b", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) ) + ROM_LOAD( "tw1ccrh.5b", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) ) - ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "tw1ptrl0.18k", 0x000000, 0x080000, CRC(44ac5e86) SHA1(5e42db58f2e352c0fe5e49588a9283817dd15ab1) ) ROM_LOAD( "tw1ptrl1.16k", 0x080000, 0x080000, CRC(3c769860) SHA1(19b32c3d262f2a9d07354fbd6ac6be97b05f176e) ) ROM_LOAD( "tw1ptrl2.15k", 0x100000, 0x080000, CRC(6e94103c) SHA1(ee90b77939a9f5780ce271882133cdf977eb643e) ) @@ -5396,7 +5660,7 @@ ROM_START( tokyowar ) ROM_LOAD( "tw1ptru2.15f", 0x500000, 0x080000, CRC(ceacb1c9) SHA1(b86cf576e16bbe26ad0d6d6df8bf28d0071c25e2) ) ROM_LOAD( "tw1ptru3.14f", 0x580000, 0x080000, CRC(939044c2) SHA1(f4c1c0a1c2f07ca7f784d59ef4162a2a6a8bbc43) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "tw1wavea.2l", 0x000000, 0x400000, CRC(ebce6366) SHA1(44ebe90ff3c7af5bebbf1baba3b7a2b1863daebb) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom @@ -5404,36 +5668,50 @@ ROM_START( tokyowar ) ROM_END ROM_START( tokyowarj ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "tw1ver-a.1", 0x000003, 0x100000, CRC(29b38f05) SHA1(d55a34dce5f61d72e3edc331d3a346397069a5fc) ) - ROM_LOAD32_BYTE( "tw1ver-a.2", 0x000002, 0x100000, CRC(5f8e2e9e) SHA1(14513480fed483e5381ac5bf4467a1c17b0d9e75) ) - ROM_LOAD32_BYTE( "tw1ver-a.3", 0x000001, 0x100000, CRC(17146e7f) SHA1(0fd270152eef1966e0960531554cbe115668205f) ) - ROM_LOAD32_BYTE( "tw1ver-a.4", 0x000000, 0x100000, CRC(12698e2a) SHA1(51761ea96cb458f56d832cd233afbc374ded7f20) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "tw1vera.1", 0x000003, 0x100000, CRC(29b38f05) SHA1(d55a34dce5f61d72e3edc331d3a346397069a5fc) ) + ROM_LOAD32_BYTE( "tw1vera.2", 0x000002, 0x100000, CRC(5f8e2e9e) SHA1(14513480fed483e5381ac5bf4467a1c17b0d9e75) ) + ROM_LOAD32_BYTE( "tw1vera.3", 0x000001, 0x100000, CRC(17146e7f) SHA1(0fd270152eef1966e0960531554cbe115668205f) ) + ROM_LOAD32_BYTE( "tw1vera.4", 0x000000, 0x100000, CRC(12698e2a) SHA1(51761ea96cb458f56d832cd233afbc374ded7f20) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "tw1data.8k", 0x000000, 0x080000, CRC(bd046e4b) SHA1(162bc4ab69959ccab49fd69de291d34d472fb1c8) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "tw1data.8k", 0x000000, 0x080000, CRC(bd046e4b) SHA1(162bc4ab69959ccab49fd69de291d34d472fb1c8) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "tw1scg0.12f", 0x000000, 0x200000, CRC(e3ec4daa) SHA1(f3a71ae9820d62075b814ffa2fecf3343ae09ffe) ) - ROM_LOAD( "tw1scg1.10f", 0x200000, 0x200000, CRC(b18a06e9) SHA1(ecf6a1e11603b8ea5119a036a57595dea021d778) ) - ROM_LOAD( "tw1scg2.8f", 0x400000, 0x200000, CRC(36f8c3d8) SHA1(d5c965d5cdd258c77b9db3137ce33404a5a3641c) ) - ROM_LOAD( "tw1scg3.7f", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "tw1scg0.12f", 0x000000, 0x200000, CRC(e3ec4daa) SHA1(f3a71ae9820d62075b814ffa2fecf3343ae09ffe) ) // == tw1scg0.12l + ROM_LOAD( "tw1scg1.10f", 0x200000, 0x200000, CRC(b18a06e9) SHA1(ecf6a1e11603b8ea5119a036a57595dea021d778) ) // == tw1scg1.10l + ROM_LOAD( "tw1scg2.8f", 0x400000, 0x200000, CRC(36f8c3d8) SHA1(d5c965d5cdd258c77b9db3137ce33404a5a3641c) ) // == tw1scg2.8l + ROM_LOAD( "tw1scg3.7f", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) ) // == tw1scg3.7l + ROM_LOAD( "tw1scg0.12l", 0x000000, 0x200000, CRC(e3ec4daa) SHA1(f3a71ae9820d62075b814ffa2fecf3343ae09ffe) ) + ROM_LOAD( "tw1scg1.10l", 0x200000, 0x200000, CRC(b18a06e9) SHA1(ecf6a1e11603b8ea5119a036a57595dea021d778) ) + ROM_LOAD( "tw1scg2.8l", 0x400000, 0x200000, CRC(36f8c3d8) SHA1(d5c965d5cdd258c77b9db3137ce33404a5a3641c) ) + ROM_LOAD( "tw1scg3.7l", 0x600000, 0x200000, CRC(8e14d013) SHA1(ca63105a5c07bb9653499eef7a757db52612b59b) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "tw1cg0.8d", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) ) - ROM_LOAD( "tw1cg1.10d", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) ) - ROM_LOAD( "tw1cg2.12d", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) ) - ROM_LOAD( "tw1cg3.13d", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) ) - ROM_LOAD( "tw1cg4.14d", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) ) - ROM_LOAD( "tw1cg5.16d", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) ) - ROM_LOAD( "tw1cg6.18d", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) ) - ROM_LOAD( "tw1cg7.19d", 0xe00000, 0x200000, CRC(12da0a43) SHA1(99287348a5219146bcd3e61fde3f2bc26b0c5a25) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "tw1cg0.8d", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) ) // == tw1cg0.12b + ROM_LOAD( "tw1cg1.10d", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) ) // == tw1cg1.13b + ROM_LOAD( "tw1cg2.12d", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) ) // == tw1cg2.14b + ROM_LOAD( "tw1cg3.13d", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) ) // == tw1cg3.16b + ROM_LOAD( "tw1cg4.14d", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) ) // == tw1cg4.18b + ROM_LOAD( "tw1cg5.16d", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) ) // == tw1cg5.19b + ROM_LOAD( "tw1cg6.18d", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) ) // == tw1cg6.18a + ROM_LOAD( "tw1cg7.19d", 0xe00000, 0x200000, CRC(12da0a43) SHA1(99287348a5219146bcd3e61fde3f2bc26b0c5a25) ) // == tw1cg7.15a + ROM_LOAD( "tw1cg0.12b", 0x000000, 0x200000, CRC(98b9b070) SHA1(cb920a34700dab330c967cc634717134c04b7e1d) ) + ROM_LOAD( "tw1cg1.13b", 0x200000, 0x200000, CRC(f96a723a) SHA1(5ba14963a4c51c875ac8d3b42049bc334de90038) ) + ROM_LOAD( "tw1cg2.14b", 0x400000, 0x200000, CRC(573e9ded) SHA1(815bda1ac000532c915c2d65ffdb04fee6fa8201) ) + ROM_LOAD( "tw1cg3.16b", 0x600000, 0x200000, CRC(302d5c74) SHA1(5a823f6842cf0f79eb93da47d5bf8c5f51e420db) ) + ROM_LOAD( "tw1cg4.18b", 0x800000, 0x200000, CRC(ab8aa1df) SHA1(355192d999f493e0761fbc822fa9b30c33d8e1c4) ) + ROM_LOAD( "tw1cg5.19b", 0xa00000, 0x200000, CRC(5063f3d0) SHA1(ad8dd2f4184373a3a3ca748b411a5eec1835dc97) ) + ROM_LOAD( "tw1cg6.18a", 0xc00000, 0x200000, CRC(d764027c) SHA1(5cbf93392683885c220628936ba50c09cb40fcfb) ) + ROM_LOAD( "tw1cg7.15a", 0xe00000, 0x200000, CRC(12da0a43) SHA1(99287348a5219146bcd3e61fde3f2bc26b0c5a25) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "tw1ccrl.3d", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) ) - ROM_LOAD( "tw1ccrh.1d", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "tw1ccrl.3d", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) ) // == tw1ccrl.7b + ROM_LOAD( "tw1ccrh.1d", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) ) // == tw1ccrh.5b + ROM_LOAD( "tw1ccrl.7b", 0x000000, 0x200000, CRC(d08f5794) SHA1(336a97a2b060505e259e3bcedb9eb8aa4ea8815e) ) + ROM_LOAD( "tw1ccrh.5b", 0x200000, 0x080000, CRC(ad17e693) SHA1(4f06dc82c03159894fb8e10383862920f94563b1) ) - ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "tw1ptrl0.18k", 0x000000, 0x080000, CRC(44ac5e86) SHA1(5e42db58f2e352c0fe5e49588a9283817dd15ab1) ) ROM_LOAD( "tw1ptrl1.16k", 0x080000, 0x080000, CRC(3c769860) SHA1(19b32c3d262f2a9d07354fbd6ac6be97b05f176e) ) ROM_LOAD( "tw1ptrl2.15k", 0x100000, 0x080000, CRC(6e94103c) SHA1(ee90b77939a9f5780ce271882133cdf977eb643e) ) @@ -5447,7 +5725,7 @@ ROM_START( tokyowarj ) ROM_LOAD( "tw1ptru2.15f", 0x500000, 0x080000, CRC(ceacb1c9) SHA1(b86cf576e16bbe26ad0d6d6df8bf28d0071c25e2) ) ROM_LOAD( "tw1ptru3.14f", 0x580000, 0x080000, CRC(939044c2) SHA1(f4c1c0a1c2f07ca7f784d59ef4162a2a6a8bbc43) ) - ROM_REGION( 0x1000000, "c352", 0 ) // Samples + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "tw1wavea.2l", 0x000000, 0x400000, CRC(ebce6366) SHA1(44ebe90ff3c7af5bebbf1baba3b7a2b1863daebb) ) ROM_REGION( 0x2000, "eeprom", 0 ) // default eeprom @@ -5456,34 +5734,46 @@ ROM_END ROM_START( dirtdash ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x400000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "dt2verc.rom1", 0x000003, 0x100000, CRC(b2d7916c) SHA1(4f4cb75ef12b57bdc12b6aba59678f09b22bcfce) ) ROM_LOAD32_BYTE( "dt2verc.rom2", 0x000002, 0x100000, CRC(5dc040d1) SHA1(4b285d146adb0cff146b79d7471597148b3c4a97) ) ROM_LOAD32_BYTE( "dt2verc.rom3", 0x000001, 0x100000, CRC(a55157e1) SHA1(ede052ad55430418905987b8bcba4aa229ac037c) ) ROM_LOAD32_BYTE( "dt2verc.rom4", 0x000000, 0x100000, CRC(f3a9bedb) SHA1(71366108dec0803b585d409095f126cc55ec3e4d) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) - ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) // == dt1scg0.12l + ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) // == dt1scg1.10l + ROM_LOAD( "dt1scg0.12l", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) + ROM_LOAD( "dt1scg1.10l", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) - ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) - ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) - ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) - ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) - ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) - ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) - ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) // == dt1cg0.12b + ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) // == dt1cg1.13b + ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) // == dt1cg2.14b + ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) // == dt1cg3.16b + ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) // == dt1cg4.18b + ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) // == dt1cg5.19b + ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) // == dt1cg6.18a + ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) // == dt1cg7.15a + ROM_LOAD( "dt1cg0.12b", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) + ROM_LOAD( "dt1cg1.13b", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) + ROM_LOAD( "dt1cg2.14b", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) + ROM_LOAD( "dt1cg3.16b", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) + ROM_LOAD( "dt1cg4.18b", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) + ROM_LOAD( "dt1cg5.19b", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) + ROM_LOAD( "dt1cg6.18a", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) + ROM_LOAD( "dt1cg7.15a", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) - ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) // == dt1ccrl.7b + ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) // == dt1ccrh.5b + ROM_LOAD( "dt1ccrl.7b", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) + ROM_LOAD( "dt1ccrh.5b", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) - ROM_REGION( 0x480000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data ROM_LOAD( "dt1ptrl0.18k", 0x000000, 0x080000, CRC(4e0cac3a) SHA1(c2778e9e93be2de729c6f118caf62ac9f48efbb0) ) ROM_LOAD( "dt1ptrl1.16k", 0x080000, 0x080000, CRC(59ba9dba) SHA1(a2e9488cf0ff255284c06a1ef653ae86c0d98adc) ) ROM_LOAD( "dt1ptrl2.15k", 0x100000, 0x080000, CRC(cfe80c67) SHA1(ba3bc48aa39712e63c915070a76974fbd560dee6) ) @@ -5494,40 +5784,52 @@ ROM_START( dirtdash ) ROM_LOAD( "dt1ptru1.16f", 0x380000, 0x080000, CRC(4a5097df) SHA1(a9c814b0ed4bd92accd0e57be8e3d887114b06a5) ) ROM_LOAD( "dt1ptru2.15f", 0x400000, 0x080000, CRC(1171eaf5) SHA1(168365ea619386f218585c49025cdd7fd1224082) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "dt1wavea.2l", 0x000000, 0x400000, CRC(cbd52e40) SHA1(dc995dd919548c96a90efb0375e5b5f1055e05cb) ) ROM_LOAD( "dt1waveb.1l", 0x800000, 0x400000, CRC(6b736f94) SHA1(ac3715480aa9a9c2dec099607f89859bb3b73a6a) ) ROM_END ROM_START( dirtdashb ) - ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASE00 ) /* main program */ + ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASE00 ) // main program ROM_LOAD32_BYTE( "dt2verb.rom1", 0x000003, 0x100000, CRC(d133c6d7) SHA1(6fbdb823771826ba8c62d8d85223eeda38c081e7) ) ROM_LOAD32_BYTE( "dt2verb.rom2", 0x000002, 0x100000, CRC(ba4d7626) SHA1(c48b724a454b97c47122548c77793599e9d8f92c) ) - ROM_LOAD32_BYTE( "dt2verb.rom3", 0x000001, 0x100000, NO_DUMP ) // has failed internally, reads always 0x00 filled + ROM_LOAD32_BYTE( "dt2verb.rom3", 0x000001, 0x100000, CRC(f0d9aff2) SHA1(2ebccbd9524d29c12e001d897fd81948fb6068fa) ) ROM_LOAD32_BYTE( "dt2verb.rom4", 0x000000, 0x100000, CRC(9a80fc82) SHA1(81a14749a39d213db58527f7a98d48dbfca1c153) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) - ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) // == dt1scg0.12l + ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) // == dt1scg1.10l + ROM_LOAD( "dt1scg0.12l", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) + ROM_LOAD( "dt1scg1.10l", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) - ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) - ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) - ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) - ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) - ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) - ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) - ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) // == dt1cg0.12b + ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) // == dt1cg1.13b + ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) // == dt1cg2.14b + ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) // == dt1cg3.16b + ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) // == dt1cg4.18b + ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) // == dt1cg5.19b + ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) // == dt1cg6.18a + ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) // == dt1cg7.15a + ROM_LOAD( "dt1cg0.12b", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) + ROM_LOAD( "dt1cg1.13b", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) + ROM_LOAD( "dt1cg2.14b", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) + ROM_LOAD( "dt1cg3.16b", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) + ROM_LOAD( "dt1cg4.18b", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) + ROM_LOAD( "dt1cg5.19b", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) + ROM_LOAD( "dt1cg6.18a", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) + ROM_LOAD( "dt1cg7.15a", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) - ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) // == dt1ccrl.7b + ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) // == dt1ccrh.5b + ROM_LOAD( "dt1ccrl.7b", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) + ROM_LOAD( "dt1ccrh.5b", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) - ROM_REGION( 0x480000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data ROM_LOAD( "dt1ptrl0.18k", 0x000000, 0x080000, CRC(4e0cac3a) SHA1(c2778e9e93be2de729c6f118caf62ac9f48efbb0) ) ROM_LOAD( "dt1ptrl1.16k", 0x080000, 0x080000, CRC(59ba9dba) SHA1(a2e9488cf0ff255284c06a1ef653ae86c0d98adc) ) ROM_LOAD( "dt1ptrl2.15k", 0x100000, 0x080000, CRC(cfe80c67) SHA1(ba3bc48aa39712e63c915070a76974fbd560dee6) ) @@ -5538,38 +5840,50 @@ ROM_START( dirtdashb ) ROM_LOAD( "dt1ptru1.16f", 0x380000, 0x080000, CRC(4a5097df) SHA1(a9c814b0ed4bd92accd0e57be8e3d887114b06a5) ) ROM_LOAD( "dt1ptru2.15f", 0x400000, 0x080000, CRC(1171eaf5) SHA1(168365ea619386f218585c49025cdd7fd1224082) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "dt1wavea.2l", 0x000000, 0x400000, CRC(cbd52e40) SHA1(dc995dd919548c96a90efb0375e5b5f1055e05cb) ) ROM_LOAD( "dt1waveb.1l", 0x800000, 0x400000, CRC(6b736f94) SHA1(ac3715480aa9a9c2dec099607f89859bb3b73a6a) ) ROM_END ROM_START( dirtdasha ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x400000, "maincpu", 0 ) // main program ROM_LOAD32_WORD_SWAP( "dt2vera.1", 0x000002, 0x200000, CRC(402a3d73) SHA1(009b57ed0ea228ccedb139d945b9eaf2a36e2502) ) ROM_LOAD32_WORD_SWAP( "dt2vera.2", 0x000000, 0x200000, CRC(66ed140d) SHA1(a472fdc7b6aaeb4b3643ecdafd32fa665e7c7aa2) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) - ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) // == dt1scg0.12l + ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) // == dt1scg1.10l + ROM_LOAD( "dt1scg0.12l", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) + ROM_LOAD( "dt1scg1.10l", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) - ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) - ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) - ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) - ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) - ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) - ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) - ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) // == dt1cg0.12b + ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) // == dt1cg1.13b + ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) // == dt1cg2.14b + ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) // == dt1cg3.16b + ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) // == dt1cg4.18b + ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) // == dt1cg5.19b + ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) // == dt1cg6.18a + ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) // == dt1cg7.15a + ROM_LOAD( "dt1cg0.12b", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) + ROM_LOAD( "dt1cg1.13b", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) + ROM_LOAD( "dt1cg2.14b", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) + ROM_LOAD( "dt1cg3.16b", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) + ROM_LOAD( "dt1cg4.18b", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) + ROM_LOAD( "dt1cg5.19b", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) + ROM_LOAD( "dt1cg6.18a", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) + ROM_LOAD( "dt1cg7.15a", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) - ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) // == dt1ccrl.7b + ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) // == dt1ccrh.5b + ROM_LOAD( "dt1ccrl.7b", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) + ROM_LOAD( "dt1ccrh.5b", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) - ROM_REGION( 0x480000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data ROM_LOAD( "dt1ptrl0.18k", 0x000000, 0x080000, CRC(4e0cac3a) SHA1(c2778e9e93be2de729c6f118caf62ac9f48efbb0) ) ROM_LOAD( "dt1ptrl1.16k", 0x080000, 0x080000, CRC(59ba9dba) SHA1(a2e9488cf0ff255284c06a1ef653ae86c0d98adc) ) ROM_LOAD( "dt1ptrl2.15k", 0x100000, 0x080000, CRC(cfe80c67) SHA1(ba3bc48aa39712e63c915070a76974fbd560dee6) ) @@ -5580,38 +5894,50 @@ ROM_START( dirtdasha ) ROM_LOAD( "dt1ptru1.16f", 0x380000, 0x080000, CRC(4a5097df) SHA1(a9c814b0ed4bd92accd0e57be8e3d887114b06a5) ) ROM_LOAD( "dt1ptru2.15f", 0x400000, 0x080000, CRC(1171eaf5) SHA1(168365ea619386f218585c49025cdd7fd1224082) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "dt1wavea.2l", 0x000000, 0x400000, CRC(cbd52e40) SHA1(dc995dd919548c96a90efb0375e5b5f1055e05cb) ) ROM_LOAD( "dt1waveb.1l", 0x800000, 0x400000, CRC(6b736f94) SHA1(ac3715480aa9a9c2dec099607f89859bb3b73a6a) ) ROM_END ROM_START( dirtdashj ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_WORD_SWAP( "dt1vera.1", 0x000002, 0x200000, CRC(057b280b) SHA1(e7f038c1b3c7520d32c9962cc00104bcf65d60f6) ) - ROM_LOAD32_WORD_SWAP( "dt1vera.2", 0x000000, 0x200000, CRC(82f822d2) SHA1(170cf326903fe7b4e203b181124de609826b8e1f) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_WORD_SWAP( "dt1vera.1", 0x000002, 0x200000, CRC(057b280b) SHA1(e7f038c1b3c7520d32c9962cc00104bcf65d60f6) ) + ROM_LOAD32_WORD_SWAP( "dt1vera.2", 0x000000, 0x200000, CRC(82f822d2) SHA1(170cf326903fe7b4e203b181124de609826b8e1f) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "dt1dataa.8k", 0x000000, 0x080000, CRC(9bcdea21) SHA1(26ae025cf746d3a703a82495eb2bb515b828a650) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) - ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "dt1scg0.12f", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) // == dt1scg0.12l + ROM_LOAD( "dt1scg1.10f", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) // == dt1scg1.10l + ROM_LOAD( "dt1scg0.12l", 0x000000, 0x200000, CRC(a09b5760) SHA1(3dd54ebebf9da1de76874a1adf491ed15849e1b1) ) + ROM_LOAD( "dt1scg1.10l", 0x200000, 0x200000, CRC(f9ac8111) SHA1(814074ae8cc81c6c1201d764a84dd95fe914f19c) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) - ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) - ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) - ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) - ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) - ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) - ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) - ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "dt1cg0.8d", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) // == dt1cg0.12b + ROM_LOAD( "dt1cg1.10d", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) // == dt1cg1.13b + ROM_LOAD( "dt1cg2.12d", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) // == dt1cg2.14b + ROM_LOAD( "dt1cg3.13d", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) // == dt1cg3.16b + ROM_LOAD( "dt1cg4.14d", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) // == dt1cg4.18b + ROM_LOAD( "dt1cg5.16d", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) // == dt1cg5.19b + ROM_LOAD( "dt1cg6.18d", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) // == dt1cg6.18a + ROM_LOAD( "dt1cg7.19d", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) // == dt1cg7.15a + ROM_LOAD( "dt1cg0.12b", 0x000000, 0x200000, CRC(10ab95e0) SHA1(ffde1f00ac3e82a36fbcfa060c6b97c92dfcfc8b) ) + ROM_LOAD( "dt1cg1.13b", 0x200000, 0x200000, CRC(d9f1ba53) SHA1(5a1095b726c55001cc1d4c695adc38097e6a0201) ) + ROM_LOAD( "dt1cg2.14b", 0x400000, 0x200000, CRC(bd8b1e0b) SHA1(fcd94e33a0cbd17c9308cb8952e3c618ab56f9fc) ) + ROM_LOAD( "dt1cg3.16b", 0x600000, 0x200000, CRC(ba960663) SHA1(e98149bc4652ea7933ac47d760a6f7e6489f15e2) ) + ROM_LOAD( "dt1cg4.18b", 0x800000, 0x200000, CRC(424b9652) SHA1(fa8865110db03559740c4e633e123d1a009782c4) ) + ROM_LOAD( "dt1cg5.19b", 0xa00000, 0x200000, CRC(29516626) SHA1(1f12c5dc3975b88dc60d87d0409bf311837e9fa4) ) + ROM_LOAD( "dt1cg6.18a", 0xc00000, 0x200000, CRC(e6fa7180) SHA1(85316cde282cff1f913cf9f155cfa36adcc1108e) ) + ROM_LOAD( "dt1cg7.15a", 0xe00000, 0x200000, CRC(2ca19153) SHA1(c82403c8b40bf85daedf610b1bc7bfea9dfc6206) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) - ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "dt1ccrl.3d", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) // == dt1ccrl.7b + ROM_LOAD( "dt1ccrh.1d", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) // == dt1ccrh.5b + ROM_LOAD( "dt1ccrl.7b", 0x000000, 0x200000, CRC(e536b313) SHA1(7357da993d2bb3fcc8c1c2feb53689ad368cd80a) ) + ROM_LOAD( "dt1ccrh.5b", 0x200000, 0x080000, CRC(af257064) SHA1(0da561d9f8824618c00209ccef6146e9f3ad72bb) ) - ROM_REGION( 0x480000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x480000, "pointrom", 0 ) // 3d model data ROM_LOAD( "dt1ptrl0.18k", 0x000000, 0x080000, CRC(4e0cac3a) SHA1(c2778e9e93be2de729c6f118caf62ac9f48efbb0) ) ROM_LOAD( "dt1ptrl1.16k", 0x080000, 0x080000, CRC(59ba9dba) SHA1(a2e9488cf0ff255284c06a1ef653ae86c0d98adc) ) ROM_LOAD( "dt1ptrl2.15k", 0x100000, 0x080000, CRC(cfe80c67) SHA1(ba3bc48aa39712e63c915070a76974fbd560dee6) ) @@ -5622,42 +5948,55 @@ ROM_START( dirtdashj ) ROM_LOAD( "dt1ptru1.16f", 0x380000, 0x080000, CRC(4a5097df) SHA1(a9c814b0ed4bd92accd0e57be8e3d887114b06a5) ) ROM_LOAD( "dt1ptru2.15f", 0x400000, 0x080000, CRC(1171eaf5) SHA1(168365ea619386f218585c49025cdd7fd1224082) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "dt1wavea.2l", 0x000000, 0x400000, CRC(cbd52e40) SHA1(dc995dd919548c96a90efb0375e5b5f1055e05cb) ) ROM_LOAD( "dt1waveb.1l", 0x800000, 0x400000, CRC(6b736f94) SHA1(ac3715480aa9a9c2dec099607f89859bb3b73a6a) ) ROM_END ROM_START( aquajet ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ - ROM_LOAD32_BYTE( "aj2ver-b.1", 0x000003, 0x100000, CRC(3a67b9f4) SHA1(8cd51f319e082297fdb99634486fe297a0ace654) ) - ROM_LOAD32_BYTE( "aj2ver-b.2", 0x000002, 0x100000, CRC(f5e8fc96) SHA1(e23fcf6f84724d1de15870ff578ff8a6b26e8f31) ) - ROM_LOAD32_BYTE( "aj2ver-b.3", 0x000001, 0x100000, CRC(ef6ebcf7) SHA1(358973b678b9a3065e945fb589af16e8102d437b) ) - ROM_LOAD32_BYTE( "aj2ver-b.4", 0x000000, 0x100000, CRC(7799b909) SHA1(e40005f96f51742b2778605926b8184c9b2c1ad2) ) + ROM_REGION( 0x400000, "maincpu", 0 ) // main program + ROM_LOAD32_BYTE( "aj2verb.1", 0x000003, 0x100000, CRC(3a67b9f4) SHA1(8cd51f319e082297fdb99634486fe297a0ace654) ) + ROM_LOAD32_BYTE( "aj2verb.2", 0x000002, 0x100000, CRC(f5e8fc96) SHA1(e23fcf6f84724d1de15870ff578ff8a6b26e8f31) ) + ROM_LOAD32_BYTE( "aj2verb.3", 0x000001, 0x100000, CRC(ef6ebcf7) SHA1(358973b678b9a3065e945fb589af16e8102d437b) ) + ROM_LOAD32_BYTE( "aj2verb.4", 0x000000, 0x100000, CRC(7799b909) SHA1(e40005f96f51742b2778605926b8184c9b2c1ad2) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ - ROM_LOAD( "aj1data.8k", 0x000000, 0x080000, CRC(52bcc6d5) SHA1(25319ea6db35cc9bdcb39cc83d597a2a9f1690f3) ) + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 + ROM_LOAD( "aj1data.8k", 0x000000, 0x080000, CRC(52bcc6d5) SHA1(25319ea6db35cc9bdcb39cc83d597a2a9f1690f3) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "aj1scg0.12f", 0x000000, 0x200000, CRC(13ea766c) SHA1(a1a259bd8f468b90cbc891f1c2875fe03bba9802) ) - ROM_LOAD( "aj1scg1.10f", 0x200000, 0x200000, CRC(cb3638de) SHA1(0af99aaf00782036d7f479b00b0c3d9d7ad4fc37) ) - ROM_LOAD( "aj1scg2.8f", 0x400000, 0x200000, CRC(1048a09b) SHA1(6859533e24db5ac54e28d480aaac7b411a648dfe) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "aj1scg0.12f", 0x000000, 0x200000, CRC(13ea766c) SHA1(a1a259bd8f468b90cbc891f1c2875fe03bba9802) ) // == aj1scg0.12l + ROM_LOAD( "aj1scg1.10f", 0x200000, 0x200000, CRC(cb3638de) SHA1(0af99aaf00782036d7f479b00b0c3d9d7ad4fc37) ) // == aj1scg1.10l + ROM_LOAD( "aj1scg2.8f", 0x400000, 0x200000, CRC(1048a09b) SHA1(6859533e24db5ac54e28d480aaac7b411a648dfe) ) // == aj1scg2.8l + ROM_LOAD( "aj1scg0.12l", 0x000000, 0x200000, CRC(13ea766c) SHA1(a1a259bd8f468b90cbc891f1c2875fe03bba9802) ) + ROM_LOAD( "aj1scg1.10l", 0x200000, 0x200000, CRC(cb3638de) SHA1(0af99aaf00782036d7f479b00b0c3d9d7ad4fc37) ) + ROM_LOAD( "aj1scg2.8l", 0x400000, 0x200000, CRC(1048a09b) SHA1(6859533e24db5ac54e28d480aaac7b411a648dfe) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "aj1cg0.8d", 0x000000, 0x200000, CRC(b814e1eb) SHA1(1af29897dcfd0a58743b4fcdd5049d9e6e3d4cbd) ) - ROM_LOAD( "aj1cg1.10d", 0x200000, 0x200000, CRC(dc63d496) SHA1(d3c3eea6b134850004062dd513c0f26096101227) ) - ROM_LOAD( "aj1cg2.12d", 0x400000, 0x200000, CRC(71fbb571) SHA1(40f84ab5a4a7bb4438fb53751762609671d17800) ) - ROM_LOAD( "aj1cg3.13d", 0x600000, 0x200000, CRC(e28052e2) SHA1(3dbc446d7a13312ed4c1d20c2e1209947853f2c4) ) - ROM_LOAD( "aj1cg4.14d", 0x800000, 0x200000, CRC(c77ae1a0) SHA1(e15f2ccbadb8634f6e5cfd2cf48f428d68bd92e1) ) - ROM_LOAD( "aj1cg5.16d", 0xa00000, 0x200000, CRC(15be0080) SHA1(ca14dfd2a66996f0b32fa1155c04f21d300e8f30) ) - ROM_LOAD( "aj1cg6.18d", 0xc00000, 0x200000, CRC(1a4f733a) SHA1(60a991f06e73667fa2c9016189999c4301cba24f) ) - ROM_LOAD( "aj1cg7.19d", 0xe00000, 0x200000, CRC(ea118130) SHA1(24ef22e5c8c6f6e8a01c72466be1e7acbfba63bc) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "aj1cg0.8d", 0x000000, 0x200000, CRC(b814e1eb) SHA1(1af29897dcfd0a58743b4fcdd5049d9e6e3d4cbd) ) // == aj1cg0.12b + ROM_LOAD( "aj1cg1.10d", 0x200000, 0x200000, CRC(dc63d496) SHA1(d3c3eea6b134850004062dd513c0f26096101227) ) // == aj1cg1.13b + ROM_LOAD( "aj1cg2.12d", 0x400000, 0x200000, CRC(71fbb571) SHA1(40f84ab5a4a7bb4438fb53751762609671d17800) ) // == aj1cg2.14b + ROM_LOAD( "aj1cg3.13d", 0x600000, 0x200000, CRC(e28052e2) SHA1(3dbc446d7a13312ed4c1d20c2e1209947853f2c4) ) // == aj1cg3.16b + ROM_LOAD( "aj1cg4.14d", 0x800000, 0x200000, CRC(c77ae1a0) SHA1(e15f2ccbadb8634f6e5cfd2cf48f428d68bd92e1) ) // == aj1cg4.18b + ROM_LOAD( "aj1cg5.16d", 0xa00000, 0x200000, CRC(15be0080) SHA1(ca14dfd2a66996f0b32fa1155c04f21d300e8f30) ) // == aj1cg5.19b + ROM_LOAD( "aj1cg6.18d", 0xc00000, 0x200000, CRC(1a4f733a) SHA1(60a991f06e73667fa2c9016189999c4301cba24f) ) // == aj1cg6.18a + ROM_LOAD( "aj1cg7.19d", 0xe00000, 0x200000, CRC(ea118130) SHA1(24ef22e5c8c6f6e8a01c72466be1e7acbfba63bc) ) // == aj1cg7.15a + ROM_LOAD( "aj1cg0.12b", 0x000000, 0x200000, CRC(b814e1eb) SHA1(1af29897dcfd0a58743b4fcdd5049d9e6e3d4cbd) ) + ROM_LOAD( "aj1cg1.13b", 0x200000, 0x200000, CRC(dc63d496) SHA1(d3c3eea6b134850004062dd513c0f26096101227) ) + ROM_LOAD( "aj1cg2.14b", 0x400000, 0x200000, CRC(71fbb571) SHA1(40f84ab5a4a7bb4438fb53751762609671d17800) ) + ROM_LOAD( "aj1cg3.16b", 0x600000, 0x200000, CRC(e28052e2) SHA1(3dbc446d7a13312ed4c1d20c2e1209947853f2c4) ) + ROM_LOAD( "aj1cg4.18b", 0x800000, 0x200000, CRC(c77ae1a0) SHA1(e15f2ccbadb8634f6e5cfd2cf48f428d68bd92e1) ) + ROM_LOAD( "aj1cg5.19b", 0xa00000, 0x200000, CRC(15be0080) SHA1(ca14dfd2a66996f0b32fa1155c04f21d300e8f30) ) + ROM_LOAD( "aj1cg6.18a", 0xc00000, 0x200000, CRC(1a4f733a) SHA1(60a991f06e73667fa2c9016189999c4301cba24f) ) + ROM_LOAD( "aj1cg7.15a", 0xe00000, 0x200000, CRC(ea118130) SHA1(24ef22e5c8c6f6e8a01c72466be1e7acbfba63bc) ) - ROM_REGION16_LE( 0x280000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "aj1ccrl.3d", 0x000000, 0x200000, CRC(3cc7a247) SHA1(336e4dd506d932987e20a5890dd3b0db75c02ccf) ) - ROM_LOAD( "aj1ccrh.1d", 0x200000, 0x080000, CRC(9d936030) SHA1(a383bcca494a9f8d9a08fbe9940c8071d4525d65) ) + ROM_REGION16_LE( 0x280000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "aj1ccrl.3d", 0x000000, 0x200000, CRC(3cc7a247) SHA1(336e4dd506d932987e20a5890dd3b0db75c02ccf) ) // == aj1ccrl.7b + ROM_LOAD( "aj1ccrh.1d", 0x200000, 0x080000, CRC(9d936030) SHA1(a383bcca494a9f8d9a08fbe9940c8071d4525d65) ) // == aj1ccrh.5b + ROM_LOAD( "aj1ccrl.7b", 0x000000, 0x200000, CRC(3cc7a247) SHA1(336e4dd506d932987e20a5890dd3b0db75c02ccf) ) + ROM_LOAD( "aj1ccrh.5b", 0x200000, 0x080000, CRC(9d936030) SHA1(a383bcca494a9f8d9a08fbe9940c8071d4525d65) ) - ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "aj1ptrl0.18k", 0x000000, 0x080000, CRC(16205d45) SHA1(7e9681af852e2e875f80cbbe350e4982eaf80884) ) ROM_LOAD( "aj1ptrl1.16k", 0x080000, 0x080000, CRC(6f114da7) SHA1(a1e7349ef8eb0ef043fce06f88bfbb76c2967393) ) ROM_LOAD( "aj1ptrl2.15k", 0x100000, 0x080000, CRC(719b73f0) SHA1(bf8530a706097ae663769090177f1f259c540aa6) ) @@ -5671,7 +6010,7 @@ ROM_START( aquajet ) ROM_LOAD( "aj1ptru2.15f", 0x500000, 0x080000, CRC(91ffbb77) SHA1(fbfe7d32ef22037f7190d1b8263b5e8c55f2d892) ) ROM_LOAD( "aj1ptru3.14f", 0x580000, 0x080000, CRC(d83d8d42) SHA1(e1561ce4538b01db92b7e645ad008cd1a2ddaf8a) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD( "aj1wavea.2l", 0x000000, 0x400000, CRC(8c72ea59) SHA1(3ae8dbd8baae08f1daab2b218932ba9d9451231d) ) ROM_LOAD( "aj1waveb.1l", 0x800000, 0x400000, CRC(ab5a457f) SHA1(c34531fd574eb0c3e78fc31a9af8658df3446adc) ) @@ -5681,46 +6020,46 @@ ROM_END ROM_START( adillor ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x400000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "am2vera.rom1", 0x000003, 0x100000, CRC(b974e931) SHA1(db1c99ed56044f667a9a0a5801f62215004af847) ) ROM_LOAD32_BYTE( "am2vera.rom2", 0x000002, 0x100000, CRC(c7cd78f1) SHA1(2f909be1c9a9acf42a8e446c83a06b3b36012196) ) ROM_LOAD32_BYTE( "am2vera.rom3", 0x000001, 0x100000, CRC(80e9435a) SHA1(d92f6ec607e628270ceb3e09c1980d6e13bd88a7) ) ROM_LOAD32_BYTE( "am2vera.rom4", 0x000000, 0x100000, CRC(1e3a6032) SHA1(f4c6539a78f94ae2c240aeb8f85712a612933e8c) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 ROM_LOAD( "am1data.8k", 0x000000, 0x080000, CRC(3c176589) SHA1(fabf8debfa118893449f6086986fd1aa012daf27) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "am1scg0.12f", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) - ROM_LOAD( "am1scg1.10f", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) - ROM_LOAD( "am1scg0.12l", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) - ROM_LOAD( "am1scg1.10l", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "am1scg0.12f", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) // == am1scg0.12l + ROM_LOAD( "am1scg1.10f", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) // == am1scg1.10l + ROM_LOAD( "am1scg0.12l", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) + ROM_LOAD( "am1scg1.10l", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "am1cg0.8d", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) - ROM_LOAD( "am1cg1.10d", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) - ROM_LOAD( "am1cg2.12d", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) - ROM_LOAD( "am1cg3.13d", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) - ROM_LOAD( "am1cg3.14d", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) - ROM_LOAD( "am1cg5.16d", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) - ROM_LOAD( "am1cg6.18d", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) - ROM_LOAD( "am1cg7.19d", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) - ROM_LOAD( "am1cg0.12b", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) - ROM_LOAD( "am1cg1.13b", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) - ROM_LOAD( "am1cg2.14b", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) - ROM_LOAD( "am1cg3.16b", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) - ROM_LOAD( "am1cg3.18b", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) - ROM_LOAD( "am1cg5.19b", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) - ROM_LOAD( "am1cg6.18a", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) - ROM_LOAD( "am1cg7.15a", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "am1cg0.8d", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) // == am1cg0.12b + ROM_LOAD( "am1cg1.10d", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) // == am1cg1.13b + ROM_LOAD( "am1cg2.12d", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) // == am1cg2.14b + ROM_LOAD( "am1cg3.13d", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) // == am1cg3.16b + ROM_LOAD( "am1cg4.14d", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) // == am1cg4.18b + ROM_LOAD( "am1cg5.16d", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) // == am1cg5.19b + ROM_LOAD( "am1cg6.18d", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) // == am1cg6.18a + ROM_LOAD( "am1cg7.19d", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) // == am1cg7.15a + ROM_LOAD( "am1cg0.12b", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) + ROM_LOAD( "am1cg1.13b", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) + ROM_LOAD( "am1cg2.14b", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) + ROM_LOAD( "am1cg3.16b", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) + ROM_LOAD( "am1cg4.18b", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) + ROM_LOAD( "am1cg5.19b", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) + ROM_LOAD( "am1cg6.18a", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) + ROM_LOAD( "am1cg7.15a", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) - ROM_REGION16_LE( 0x300000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "am1ccrl.3d", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) - ROM_LOAD( "am1ccrh.1d", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) - ROM_LOAD( "am1ccrl.7b", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) - ROM_LOAD( "am1ccrh.5b", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) + ROM_REGION16_LE( 0x300000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "am1ccrl.3d", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) // == am1ccrl.7b + ROM_LOAD( "am1ccrh.1d", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) // == am1ccrh.5b + ROM_LOAD( "am1ccrl.7b", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) + ROM_LOAD( "am1ccrh.5b", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) - ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "am1ptrl0.18k", 0x000000, 0x080000, CRC(6fdb34f6) SHA1(5dc7359eef0dbe6d421808eefd3920159ce34944) ) ROM_LOAD( "am1ptrl1.16k", 0x080000, 0x080000, CRC(32e40601) SHA1(161b148aae688e944cfe456d9bca1ca7139812e1) ) ROM_LOAD( "am1ptrl2.15k", 0x100000, 0x080000, CRC(e27e29cc) SHA1(3a2b0d18d23b2ace6fe1c6c4dbcc73cb74acd189) ) @@ -5734,52 +6073,52 @@ ROM_START( adillor ) ROM_LOAD( "am1ptru2.15f", 0x500000, 0x080000, CRC(ce790635) SHA1(fb49646a9b35ee7cb3ace59a7f0932a08c393052) ) ROM_LOAD( "am1ptru3.14f", 0x580000, 0x080000, CRC(5e4e6333) SHA1(5897251e4694c5c24f1810ff6f9177a0456baf2e) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD16_WORD_SWAP( "am1wavea.2l", 0x000000, 0x400000, CRC(48f8c20c) SHA1(48b4fbcb7e9dbbb70a542ef7cb7ee0e46fad23fc) ) ROM_LOAD16_WORD_SWAP( "am1waveb.1l", 0x800000, 0x400000, CRC(fd8e7384) SHA1(91e53ab0293f81f8357645fd319249abc128b78e) ) ROM_END ROM_START( adillorj ) - ROM_REGION( 0x400000, "maincpu", 0 ) /* main program */ + ROM_REGION( 0x400000, "maincpu", 0 ) // main program ROM_LOAD32_BYTE( "am1vera.rom1", 0x000003, 0x100000, CRC(e99157f9) SHA1(7a200f3b5890f5badbf529a8c8ac6a8548adb801) ) ROM_LOAD32_BYTE( "am1vera.rom2", 0x000002, 0x100000, CRC(b63d79b0) SHA1(c83251727b2973f5b9dc2eea23b51b1275bd88ed) ) ROM_LOAD32_BYTE( "am1vera.rom3", 0x000001, 0x100000, CRC(af0983bc) SHA1(136d2e14485864e20d7a6947d640577b8a85243c) ) ROM_LOAD32_BYTE( "am1vera.rom4", 0x000000, 0x100000, CRC(4424047f) SHA1(d0ca736c085db58d33b603813b7a54c8ce995bac) ) - ROM_REGION16_LE( 0x080000, "mcu", 0 ) /* S22-BIOS ver1.41 */ + ROM_REGION16_LE( 0x080000, "mcu", 0 ) // S22-BIOS ver1.41 ROM_LOAD( "am1data.8k", 0x000000, 0x080000, CRC(3c176589) SHA1(fabf8debfa118893449f6086986fd1aa012daf27) ) - ROM_REGION( 0x200000*8, "sprite", ROMREGION_ERASEFF ) /* 32x32x8bpp sprite tiles */ - ROM_LOAD( "am1scg0.12f", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) - ROM_LOAD( "am1scg1.10f", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) - ROM_LOAD( "am1scg0.12l", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) - ROM_LOAD( "am1scg1.10l", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) + ROM_REGION( 0x1000000, "sprite", ROMREGION_ERASEFF ) // 32x32x8bpp sprite tiles + ROM_LOAD( "am1scg0.12f", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) // == am1scg0.12l + ROM_LOAD( "am1scg1.10f", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) // == am1scg1.10l + ROM_LOAD( "am1scg0.12l", 0x000000, 0x200000, CRC(e576f993) SHA1(704645c2b2af4d3f6b77f2299cd7277837e204d2) ) + ROM_LOAD( "am1scg1.10l", 0x200000, 0x200000, CRC(d6d26cc1) SHA1(1da35ec2f89cfc5778d81b6a892fcf100d6e9933) ) - ROM_REGION( 0x200000*8, "textile", 0) /* 16x16x8bpp texture tiles */ - ROM_LOAD( "am1cg0.8d", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) - ROM_LOAD( "am1cg1.10d", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) - ROM_LOAD( "am1cg2.12d", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) - ROM_LOAD( "am1cg3.13d", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) - ROM_LOAD( "am1cg3.14d", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) - ROM_LOAD( "am1cg5.16d", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) - ROM_LOAD( "am1cg6.18d", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) - ROM_LOAD( "am1cg7.19d", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) - ROM_LOAD( "am1cg0.12b", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) - ROM_LOAD( "am1cg1.13b", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) - ROM_LOAD( "am1cg2.14b", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) - ROM_LOAD( "am1cg3.16b", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) - ROM_LOAD( "am1cg3.18b", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) - ROM_LOAD( "am1cg5.19b", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) - ROM_LOAD( "am1cg6.18a", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) - ROM_LOAD( "am1cg7.15a", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) + ROM_REGION( 0x1000000, "textile", 0) // 16x16x8bpp texture tiles + ROM_LOAD( "am1cg0.8d", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) // == am1cg0.12b + ROM_LOAD( "am1cg1.10d", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) // == am1cg1.13b + ROM_LOAD( "am1cg2.12d", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) // == am1cg2.14b + ROM_LOAD( "am1cg3.13d", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) // == am1cg3.16b + ROM_LOAD( "am1cg4.14d", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) // == am1cg4.18b + ROM_LOAD( "am1cg5.16d", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) // == am1cg5.19b + ROM_LOAD( "am1cg6.18d", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) // == am1cg6.18a + ROM_LOAD( "am1cg7.19d", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) // == am1cg7.15a + ROM_LOAD( "am1cg0.12b", 0x000000, 0x200000, CRC(b91e4259) SHA1(3de7fee2be9843ef6a8718f9dcbc3aeb1fb23b64) ) + ROM_LOAD( "am1cg1.13b", 0x200000, 0x200000, CRC(c1b82a26) SHA1(25dc3cdf5fe18de89e6d7304ff76b6157aba2cd6) ) + ROM_LOAD( "am1cg2.14b", 0x400000, 0x200000, CRC(36a7d3fd) SHA1(f07bb746f775d1eb70c4b6a65e6002d2136cfe4d) ) + ROM_LOAD( "am1cg3.16b", 0x600000, 0x200000, CRC(8b0857ef) SHA1(1c86db318d7bb7bc303ba65a9db493b033035d7b) ) + ROM_LOAD( "am1cg4.18b", 0x800000, 0x200000, CRC(ebc516fe) SHA1(585554f14cfdf69a89a6431867b7cfc1a9eae379) ) + ROM_LOAD( "am1cg5.19b", 0xa00000, 0x200000, CRC(30fad30d) SHA1(bb0d9e2b479d83cc38ffd76d0d55f06dca0f304a) ) + ROM_LOAD( "am1cg6.18a", 0xc00000, 0x200000, CRC(62eea883) SHA1(37e441bb1289e45ef3043f70f77646c15b6dff0e) ) + ROM_LOAD( "am1cg7.15a", 0xe00000, 0x200000, CRC(2d257f47) SHA1(6406556b4b142b6c596eb25f407275a63f6a44f1) ) - ROM_REGION16_LE( 0x300000, "textilemap", 0 ) /* texture tilemap */ - ROM_LOAD( "am1ccrl.3d", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) - ROM_LOAD( "am1ccrh.1d", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) - ROM_LOAD( "am1ccrl.7b", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) - ROM_LOAD( "am1ccrh.5b", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) + ROM_REGION16_LE( 0x300000, "textilemap", 0 ) // texture tilemap + ROM_LOAD( "am1ccrl.3d", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) // == am1ccrl.7b + ROM_LOAD( "am1ccrh.1d", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) // == am1ccrh.5b + ROM_LOAD( "am1ccrl.7b", 0x000000, 0x200000, CRC(76c6d5f3) SHA1(637efe30d004a9c42864b7536e02e9805ed9b6ef) ) + ROM_LOAD( "am1ccrh.5b", 0x200000, 0x080000, CRC(180c4a33) SHA1(5e0818ba8a135c51953bc3bc5c4a1475f7f93eff) ) - ROM_REGION( 0x600000, "pointrom", 0 ) /* 3d model data */ + ROM_REGION( 0x600000, "pointrom", 0 ) // 3d model data ROM_LOAD( "am1ptrl0.18k", 0x000000, 0x080000, CRC(6fdb34f6) SHA1(5dc7359eef0dbe6d421808eefd3920159ce34944) ) ROM_LOAD( "am1ptrl1.16k", 0x080000, 0x080000, CRC(32e40601) SHA1(161b148aae688e944cfe456d9bca1ca7139812e1) ) ROM_LOAD( "am1ptrl2.15k", 0x100000, 0x080000, CRC(e27e29cc) SHA1(3a2b0d18d23b2ace6fe1c6c4dbcc73cb74acd189) ) @@ -5793,7 +6132,7 @@ ROM_START( adillorj ) ROM_LOAD( "am1ptru2.15f", 0x500000, 0x080000, CRC(ce790635) SHA1(fb49646a9b35ee7cb3ace59a7f0932a08c393052) ) ROM_LOAD( "am1ptru3.14f", 0x580000, 0x080000, CRC(5e4e6333) SHA1(5897251e4694c5c24f1810ff6f9177a0456baf2e) ) - ROM_REGION( 0x1000000, "c352", 0 ) /* sound samples */ + ROM_REGION( 0x1000000, "c352", 0 ) // samples ROM_LOAD16_WORD_SWAP( "am1wavea.2l", 0x000000, 0x400000, CRC(48f8c20c) SHA1(48b4fbcb7e9dbbb70a542ef7cb7ee0e46fad23fc) ) ROM_LOAD16_WORD_SWAP( "am1waveb.1l", 0x800000, 0x400000, CRC(fd8e7384) SHA1(91e53ab0293f81f8357645fd319249abc128b78e) ) ROM_END @@ -6045,10 +6384,11 @@ GAME( 1995, cybrcycc, 0, cybrcycc, cybrcycc, namcos22s_state, init_cy GAME( 1995, cybrcyccj, cybrcycc, cybrcycc, cybrcycc, namcos22s_state, init_cybrcycc, ROT0, "Namco", "Cyber Cycles (Japan, CB1 Ver.C)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN ) // 95/04/04 GAME( 1995, dirtdash, 0, dirtdash, dirtdash, namcos22s_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (World, DT2 Ver.C)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/02/29 12:08:19 GAME( 1995, dirtdasha, dirtdash, dirtdash, dirtdash, namcos22s_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (World, DT2 Ver.A)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 95/12/20 20:01:56 -GAME( 1995, dirtdashb, dirtdash, dirtdash, dirtdash, namcos22s_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (World, DT2 Ver.B)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) // 96/?1/0? 21:03:?6, one ROM is bad +GAME( 1995, dirtdashb, dirtdash, dirtdash, dirtdash, namcos22s_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (World, DT2 Ver.B)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/01/08 21:03:46 GAME( 1995, dirtdashj, dirtdash, dirtdash, dirtdash, namcos22s_state, init_dirtdash, ROT0, "Namco", "Dirt Dash (Japan, DT1 Ver.A)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 95/12/20 20:06:45 GAME( 1996, timecris, 0, timecris, timecris, timecris_state, init_timecris, ROT0, "Namco", "Time Crisis (World, TS2 Ver.B)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/04/02 18:48:00 GAME( 1996, timecrisa, timecris, timecris, timecris, timecris_state, init_timecris, ROT0, "Namco", "Time Crisis (World, TS2 Ver.A)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/01/08 18:56:09 +GAME( 1996, timecrisj, timecris, timecris, timecris, timecris_state, init_timecris, ROT0, "Namco", "Time Crisis (Japan, TS1 Ver.B)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/04/02 16:54:41 GAME( 1996, propcycl, 0, propcycl, propcycl, propcycl_state, init_propcycl, ROT0, "Namco", "Prop Cycle (World, PR2 Ver.A)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/06/18 21:22:13 GAME( 1996, propcyclj, propcycl, propcycl, propcycl, propcycl_state, init_propcyclj, ROT0, "Namco", "Prop Cycle (Japan, PR1 Ver.A)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/06/18 21:06:03 GAME( 1996, alpines, 0, alpines, alpines, alpines_state, init_alpines, ROT0, "Namco", "Alpine Surfer (World, AF2 Ver.A)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_GRAPHICS ) // 96/07/01 15:19:23 From 774b588772d6cdfe328e5f99ff86093c96eff50b Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Tue, 10 Mar 2026 01:19:43 +1100 Subject: [PATCH 212/351] cpu/sharc: More detailed emulation of floating point addition, subtraction and COPYSIGN, and some minor optimisation, for interpreter. --- src/devices/cpu/sharc/compute.hxx | 282 ++++++++++++++++++++---------- 1 file changed, 191 insertions(+), 91 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 61954aad446..2c8917b7794 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -23,13 +23,30 @@ #define SET_FLAG_MU(r) do { m_core->astat |= (((uint32_t((r) >> 32) == 0) && (uint32_t(r)) != 0) ? MU : 0); } while (false) // saturate overflowed result -inline void SATURATE(uint32_t &r) { r = uint32_t((int32_t(r) < 0) ? std::numeric_limits::max() : std::numeric_limits::min()); } +inline void SATURATE(uint32_t &r) { r = (r ^ 0x80000000) | 0x7fffffff; } -constexpr bool IS_FLOAT_ZERO(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == 0; } -constexpr bool IS_FLOAT_DENORMAL(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == 0) && ((r & FLOAT_MANTISSA_MASK) != 0); } -constexpr bool IS_FLOAT_NAN(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK) && ((r & FLOAT_MANTISSA_MASK) != 0); } -constexpr bool IS_FLOAT_INFINITY(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == FLOAT_INFINITY; } -constexpr bool IS_FLOAT_NEGATIVE(uint32_t r) { return (r & FLOAT_SIGN_MASK) && !IS_FLOAT_NAN(r); } +constexpr bool IS_FLOAT_ZERO(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == 0; } +constexpr bool IS_FLOAT_DENORMAL(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == 0) && ((r & FLOAT_MANTISSA_MASK) != 0); } +constexpr bool IS_FLOAT_DENORMAL_OR_ZERO(uint32_t r) { return (r & FLOAT_EXPONENT_MASK) == 0; } +constexpr bool IS_FLOAT_NAN(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK) && ((r & FLOAT_MANTISSA_MASK) != 0); } +constexpr bool IS_FLOAT_INFINITY(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == FLOAT_INFINITY; } +constexpr bool IS_FLOAT_NEGATIVE(uint32_t r) { return (r & FLOAT_SIGN_MASK) && !IS_FLOAT_NAN(r); } + +inline bool IS_FLOAT_NAN_ADD(uint32_t a, uint32_t b) +{ + bool const aemax = (a & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + bool const bemax = (b & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + return (aemax && ((a & FLOAT_MANTISSA_MASK) != 0)) || (bemax && ((b & FLOAT_MANTISSA_MASK) != 0)) || (aemax && bemax && ((a ^ b) & FLOAT_SIGN_MASK)); +} + +inline bool IS_FLOAT_NAN_SUB(uint32_t a, uint32_t b) +{ + bool const aemax = (a & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + bool const bemax = (b & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + return (aemax && ((a & FLOAT_MANTISSA_MASK) != 0)) || (bemax && ((b & FLOAT_MANTISSA_MASK) != 0)) || (aemax && bemax && !((a ^ b) & FLOAT_SIGN_MASK)); +} + +constexpr uint32_t FLOAT_FLUSH_DENORMAL(uint32_t r) { return IS_FLOAT_DENORMAL_OR_ZERO(r) ? (r & FLOAT_SIGN_MASK) : r; } /*****************************************************************************/ @@ -472,22 +489,37 @@ void adsp21062_device::compute_clip(int rn, int rx, int ry) /* Fn = Fx + Fy */ void adsp21062_device::compute_fadd(int rn, int rx, int ry) { - SHARC_REG r; - r.f = FREG(rx) + FREG(ry); - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r; + if (IS_FLOAT_NAN_ADD(REG(rx), REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + r.f = x.f + y.f; + + if (IS_FLOAT_INFINITY(r.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r &= FLOAT_SIGN_MASK; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } FREG(rn) = r.f; m_core->astat |= AF; @@ -496,22 +528,37 @@ void adsp21062_device::compute_fadd(int rn, int rx, int ry) /* Fn = Fx - Fy */ void adsp21062_device::compute_fsub(int rn, int rx, int ry) { - SHARC_REG r; - r.f = FREG(rx) - FREG(ry); - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r; + if (IS_FLOAT_NAN_SUB(REG(rx), REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + r.f = x.f - y.f; + + if (IS_FLOAT_INFINITY(r.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r &= FLOAT_SIGN_MASK; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } FREG(rn) = r.f; m_core->astat |= AF; @@ -520,21 +567,37 @@ void adsp21062_device::compute_fsub(int rn, int rx, int ry) /* Fn = ABS(Fx + Fy) */ void adsp21062_device::compute_fadd_abs(int rn, int rx, int ry) { - SHARC_REG r; - r.f = fabsf(FREG(rx) + FREG(ry)); - CLEAR_ALU_FLAGS(); - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - // AV - m_core->astat |= (IS_FLOAT_INFINITY(r.r)) ? AV : 0; - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r; + if (IS_FLOAT_NAN_ADD(REG(rx), REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + r.f = x.f + y.f; + r.r &= ~FLOAT_SIGN_MASK; + + if (r.r == FLOAT_EXPONENT_MASK) // sign bit won't be set, avoid redundant masking + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r = 0; + } + } FREG(rn) = r.f; m_core->astat |= AF; @@ -543,21 +606,37 @@ void adsp21062_device::compute_fadd_abs(int rn, int rx, int ry) /* Fn = ABS(Fx - Fy) */ void adsp21062_device::compute_fsub_abs(int rn, int rx, int ry) { - SHARC_REG r; - r.f = fabsf(FREG(rx) - FREG(ry)); - CLEAR_ALU_FLAGS(); - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - // AV - m_core->astat |= (IS_FLOAT_INFINITY(r.r)) ? AV : 0; - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r; + if (IS_FLOAT_NAN_SUB(REG(rx), REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + r.f = x.f - y.f; + r.r &= ~FLOAT_SIGN_MASK; + + if (r.r == FLOAT_EXPONENT_MASK) // sign bit won't be set, avoid redundant masking + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r = 0; + } + } FREG(rn) = r.f; m_core->astat |= AF; @@ -566,22 +645,38 @@ void adsp21062_device::compute_fsub_abs(int rn, int rx, int ry) /* Fn = (Fx + Fy) / 2 */ void adsp21062_device::compute_favg(int rn, int rx, int ry) { - SHARC_REG r; - r.f = (FREG(rx) + FREG(ry)) / 2.0f; - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r.r) || IS_FLOAT_ZERO(r.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r; + if (IS_FLOAT_NAN_ADD(REG(rx), REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + // TODO: this loses one bit of range due to the intermediate sub being constrained to single precision + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + r.f = (x.f + y.f) * 0.5f; + + if (IS_FLOAT_INFINITY(r.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r &= FLOAT_SIGN_MASK; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } FREG(rn) = r.f; m_core->astat |= AF; @@ -630,7 +725,7 @@ void adsp21062_device::compute_fneg(int rn, int rx) } else { - if (IS_FLOAT_DENORMAL(REG(rx))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) { r.r = ~REG(rx) & FLOAT_SIGN_MASK; m_core->astat |= AZ; @@ -638,7 +733,6 @@ void adsp21062_device::compute_fneg(int rn, int rx) else { r.r = REG(rx) ^ FLOAT_SIGN_MASK; - m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; } m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; } @@ -661,7 +755,7 @@ void adsp21062_device::compute_fabs(int rn, int rx) } else { - if (IS_FLOAT_DENORMAL(REG(rx))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) { r.r = 0; m_core->astat |= AZ; @@ -669,7 +763,6 @@ void adsp21062_device::compute_fabs(int rn, int rx) else { r.r = REG(rx) & ~FLOAT_SIGN_MASK; - m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; } m_core->astat |= (REG(rx) & FLOAT_SIGN_MASK) ? AS : 0; } @@ -692,7 +785,7 @@ void adsp21062_device::compute_fpass(int rn, int rx) } else { - if (IS_FLOAT_DENORMAL(REG(rx))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) { r.r = REG(rx) & FLOAT_SIGN_MASK; m_core->astat |= AZ; @@ -700,7 +793,6 @@ void adsp21062_device::compute_fpass(int rn, int rx) else { r.r = REG(rx); - m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; } m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; } @@ -981,18 +1073,26 @@ void adsp21062_device::compute_rsqrts(int rn, int rx) /* Fn = COPYSIGN(Fx, Fy) */ void adsp21062_device::compute_fcopysign(int rn, int rx, int ry) { - SHARC_REG r_alu; - - r_alu.r = (REG(rx) & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) | (REG(ry) & FLOAT_SIGN_MASK); // TODO DENORM and NAN cases ? - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - FREG(rn) = r_alu.f; + SHARC_REG r; + if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + r.r = REG(ry) & FLOAT_SIGN_MASK; + m_core->astat |= r.r ? AN : 0; // only the sign bit is set here so it avoids need to mask + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) + m_core->astat |= AZ; + else + r.r |= REG(rx) & ~FLOAT_SIGN_MASK; + } + + FREG(rn) = r.f; m_core->astat |= AF; } @@ -1060,7 +1160,7 @@ void adsp21062_device::compute_fclip(int rn, int rx, int ry) } else { - if (IS_FLOAT_ZERO(REG(rx)) || IS_FLOAT_ZERO(REG(ry)) || IS_FLOAT_DENORMAL(REG(rx)) || IS_FLOAT_DENORMAL(REG(ry))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx)) || IS_FLOAT_DENORMAL_OR_ZERO(REG(ry))) { r.r = REG(rx) & FLOAT_SIGN_MASK; m_core->astat |= AZ; From 20b736540e8353730b2d154120b734467fa14292 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 9 Mar 2026 18:17:45 +0100 Subject: [PATCH 213/351] New working clones ------------------ Gouketsuji Ichizoku 2 (Japan, Ver. 94.04.08, set 2) [twistedsymphony] New systems marked not working ------------------------------ Cool Gunman (V1.70) [Caldenza] --- src/mame/atlus/cave.cpp | 61 +++++++++++++++++++++++++++---- src/mame/mame.lst | 2 ++ src/mame/namco/quickncrash.cpp | 65 ++++++++++++++++++++++++++++++++-- 3 files changed, 120 insertions(+), 8 deletions(-) diff --git a/src/mame/atlus/cave.cpp b/src/mame/atlus/cave.cpp index 0439deea8b9..11e92b142fa 100644 --- a/src/mame/atlus/cave.cpp +++ b/src/mame/atlus/cave.cpp @@ -4668,8 +4668,8 @@ ROM_END ROM_START( pwrinst2j ) ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */ - ROM_LOAD16_BYTE( "g02j.u45", 0x000000, 0x80000, CRC(42d0abd7) SHA1(c58861d43c4539ccc8b2f93eabc56aab37d3aa34)) - ROM_LOAD16_BYTE( "g02j.u44", 0x000001, 0x80000, CRC(362b7af3) SHA1(2d15611530cef76f0f9c82ee0411966079ae19c3)) + ROM_LOAD16_BYTE( "g02j.u45", 0x000000, 0x80000, CRC(42d0abd7) SHA1(c58861d43c4539ccc8b2f93eabc56aab37d3aa34) ) + ROM_LOAD16_BYTE( "g02j.u44", 0x000001, 0x80000, CRC(362b7af3) SHA1(2d15611530cef76f0f9c82ee0411966079ae19c3) ) ROM_LOAD16_BYTE( "g02j.u43", 0x100000, 0x80000, CRC(c94c596b) SHA1(ee755a344f769e3ed05d8ca57f517b9e8c02f22e) ) ROM_LOAD16_BYTE( "g02j.u42", 0x100001, 0x80000, CRC(4f4c8270) SHA1(1fa964f5646bd1d078e3661c21e191b0789c05c9) ) @@ -4714,6 +4714,54 @@ ROM_START( pwrinst2j ) ROM_LOAD( "peel18cv8p-15.u25", 0x02aa, 0x0155, CRC(61b414df) SHA1(f12c5e62f83114f83108895ee58ceea31cdcb9fd) ) /* PEEL18CV8P-15 */ ROM_END +ROM_START( pwrinst2ja ) // only the first 2 program ROMs differ from the other Japanese set + ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */ + ROM_LOAD16_BYTE( "g02_u45-j.u45", 0x000000, 0x80000, CRC(0dc8a37b) SHA1(241b171517f437620fd6144b91e0a9305a7ae46a) ) + ROM_LOAD16_BYTE( "g02_u44-j.u44", 0x000001, 0x80000, CRC(42b35ec5) SHA1(ba923e838e4bcd2271f178be7f9c7068103d6d03) ) + ROM_LOAD16_BYTE( "g02_u43-j.u43", 0x100000, 0x80000, CRC(c94c596b) SHA1(ee755a344f769e3ed05d8ca57f517b9e8c02f22e) ) + ROM_LOAD16_BYTE( "g02_u42-j.u42", 0x100001, 0x80000, CRC(4f4c8270) SHA1(1fa964f5646bd1d078e3661c21e191b0789c05c9) ) + + ROM_REGION16_BE( 0x100000, "user1", ROMREGION_ERASE00 ) /* 68000 extra data roms */ + /* not used */ + + ROM_REGION( 0x20000, "audiocpu", 0 ) /* Z80 code */ + ROM_LOAD( "g02_u3-j.u3", 0x00000, 0x20000, CRC(eead01f1) SHA1(0ced6755e471e0303fe397b3d54a5c799762ebd8) ) + + ROM_REGION( 0xe00000, "sprites0", 0 ) /* Sprites: * 2 */ + ROM_LOAD( "g02.u61", 0x000000, 0x200000, CRC(91e30398) SHA1(2b59a5e40bed2a988382054fe30d92808dad3348) ) + ROM_LOAD( "g02.u62", 0x200000, 0x200000, CRC(d9455dd7) SHA1(afa69fe9a540cd78b8cfecf09cffa1401c01141a) ) + ROM_LOAD( "g02.u63", 0x400000, 0x200000, CRC(4d20560b) SHA1(ceaee8cf0b69cc366b95ddcb689a5594d79e5114) ) + ROM_LOAD( "g02.u64", 0x600000, 0x200000, CRC(b17b9b6e) SHA1(fc6213d8322cda4c7f653e2d7d6d314ce84c97b7) ) + ROM_LOAD( "g02.u65", 0x800000, 0x200000, CRC(08541878) SHA1(138cf077a49a26440a3da1bdc2c399a208359e57) ) + ROM_LOAD( "g02.u66", 0xa00000, 0x200000, CRC(becf2a36) SHA1(f8b386d0292b1dc745b7253a3df51d1aa8d5e9db) ) + ROM_LOAD( "g02.u67", 0xc00000, 0x200000, CRC(52fe2b8b) SHA1(dd50aa62f7db995e28f47de9b3fb749aeeaaa5b0) ) + + ROM_REGION( 0x200000, "layer0", 0 ) + ROM_LOAD( "g02.u78", 0x000000, 0x200000, CRC(1eca63d2) SHA1(538942b43301f950e3d5139461331c54dc90129d) ) + + ROM_REGION( 0x100000, "layer1", 0 ) + ROM_LOAD( "g02.u81", 0x000000, 0x100000, CRC(8a3ff685) SHA1(4a59ec50ec4470453374fe10f76d3e894494b49f) ) + + ROM_REGION( 0x100000, "layer2", 0 ) + ROM_LOAD( "g02.u89", 0x000000, 0x100000, CRC(373e1f73) SHA1(ec1ae9fab37eee41be8e1bc6dad03809b62fdbce) ) + + ROM_REGION( 0x080000, "layer3", 0 ) + ROM_LOAD( "g02_u82-j.u82", 0x000000, 0x080000, CRC(3be86fe1) SHA1(313bfe5fb8dc5fee4462db259738e079759f9390) ) + + ROM_REGION( 0x400000, "oki1", 0 ) /* OKIM6295 #1 Samples */ + ROM_LOAD( "g02.u53", 0x000000, 0x200000, CRC(c4bdd9e0) SHA1(a938a831e789ddf6f3cc5f3e5f3877ec7bd62d4e) ) + ROM_LOAD( "g02.u54", 0x200000, 0x200000, CRC(1357d50e) SHA1(433766177ce9d6933f90de85ba91bfc6d8d5d664) ) + + ROM_REGION( 0x400000, "oki2", 0 ) /* OKIM6295 #2 Samples */ + ROM_LOAD( "g02.u55", 0x000000, 0x200000, CRC(2d102898) SHA1(bd81f4cd2ba100707db0c5bb1419f0b23c998574) ) + ROM_LOAD( "g02.u56", 0x200000, 0x200000, CRC(9ff50dda) SHA1(1121685e387c20e228032f2b0f5cbb606376fc15) ) + + ROM_REGION( 0x03ff, "pal", 0 ) + ROM_LOAD( "peel18cv8p-15.u7", 0x0000, 0x0155, CRC(e02b2d2b) SHA1(26293538ca17674e1b249ed82a6df2570c6e5155) ) /* PEEL18CV8P-15 */ + ROM_LOAD( "peel18cv8p-15.u21", 0x0155, 0x0155, CRC(7ca78400) SHA1(1cebdd64e08bbc535f23592daf9380696bd2c281) ) /* PEEL18CV8P-15 */ + ROM_LOAD( "peel18cv8p-15.u25", 0x02aa, 0x0155, CRC(61b414df) SHA1(f12c5e62f83114f83108895ee58ceea31cdcb9fd) ) /* PEEL18CV8P-15 */ +ROM_END + /* Power Instinct Legends (US) / Gouketsuji Ichizoku Saikyou Densetsu (Japan) @@ -5673,10 +5721,11 @@ void cave_state::init_korokoro() ***************************************************************************/ -// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS -GAME( 1994, pwrinst2, 0, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2, ROT0, "Atlus", "Power Instinct 2 (US, Ver. 94.04.08, set 1)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, pwrinst2a, pwrinst2, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2a, ROT0, "Atlus", "Power Instinct 2 (US, Ver. 94.04.08, set 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, pwrinst2j, pwrinst2, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2, ROT0, "Atlus", "Gouketsuji Ichizoku 2 (Japan, Ver. 94.04.08)", MACHINE_SUPPORTS_SAVE ) +// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS +GAME( 1994, pwrinst2, 0, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2, ROT0, "Atlus", "Power Instinct 2 (US, Ver. 94.04.08, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, pwrinst2a, pwrinst2, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2a, ROT0, "Atlus", "Power Instinct 2 (US, Ver. 94.04.08, set 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, pwrinst2j, pwrinst2, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2, ROT0, "Atlus", "Gouketsuji Ichizoku 2 (Japan, Ver. 94.04.08, set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, pwrinst2ja, pwrinst2, pwrinst2, metmqstr, cave_z80_state, init_pwrinst2, ROT0, "Atlus", "Gouketsuji Ichizoku 2 (Japan, Ver. 94.04.08, set 2)", MACHINE_SUPPORTS_SAVE ) // Version/Date string is stored at 68000 ROM 0x1200-0x121f // The EEPROM determines the region, program roms are the same between sets diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 597ca23b903..616a321df50 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -2491,6 +2491,7 @@ ppsatan pwrinst2 pwrinst2a pwrinst2j +pwrinst2ja sailormn sailormnh sailormnj @@ -34765,6 +34766,7 @@ topracera topracern @source:namco/quickncrash.cpp +cgunman qncrash qncrasha diff --git a/src/mame/namco/quickncrash.cpp b/src/mame/namco/quickncrash.cpp index 287f52cd759..1e1cbdc51a6 100644 --- a/src/mame/namco/quickncrash.cpp +++ b/src/mame/namco/quickncrash.cpp @@ -21,7 +21,16 @@ Namco H-5 CPU PCB (8830970101 - 8830960101) - Epson SED1351F0A - 2x TC55257DFL-70L -Cool Gunman is thought to run on similar hardware, it probably belongs here +Cool Gunman runs on similar hardware: +Main PCB has both 'Namco TY294V-0 1329960102' and 'Tamura GAME PCB' +- KL5C80A12CFP +- Oki M9810 +- 93C46N +- 6264 (removed?) +- 20.000 MHz XTAL +- lots of connectors + +It probably needs at least a LED driving PCB, too. */ #include "emu.h" @@ -46,12 +55,14 @@ public: { } void qncrash(machine_config &config) ATTR_COLD; + void cgunman(machine_config &config) ATTR_COLD; private: required_device m_maincpu; void main_program_map(address_map &map) ATTR_COLD; void main_io_map(address_map &map) ATTR_COLD; + void cgunman_main_io_map(address_map &map) ATTR_COLD; void dot_program_map(address_map &map) ATTR_COLD; void dot_io_map(address_map &map) ATTR_COLD; }; @@ -71,6 +82,13 @@ void qncrash_state::main_io_map(address_map &map) map(0x58, 0x5b).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); } +void qncrash_state::cgunman_main_io_map(address_map &map) +{ + map.global_mask(0xff); + map(0x40, 0x40).lw8(NAME([this] (u8 data) { logerror("%s: port40 out %02X\n", machine().describe_context(), data); })); + //map(0x50, 0x50).rw("oki", FUNC(okim9810_device::read), FUNC(okim9810_device::write_command_or_tmp_register)); +} + void qncrash_state::dot_program_map(address_map &map) { map(0x0000, 0x7fff).rom().region("dotcpu", 0x0000); @@ -162,12 +180,40 @@ void qncrash_state::qncrash(machine_config &config) SPEAKER(config, "gun_speaker").front_center(); SPEAKER(config, "target_speaker").front_center(); - okim9810_device &oki(OKIM9810(config, "oki", 4'096'000)); // no evident XTAL on PCB + okim9810_device &oki(OKIM9810(config, "oki", 4'096'000)); // XTAL on PCB not readable from the pic // TODO: May need to be swapped. The announcer should come from gun_speaker oki.add_route(0, "gun_speaker", 1.00); oki.add_route(1, "target_speaker", 1.00); } +void qncrash_state::cgunman(machine_config &config) +{ + // basic machine hardware + KL5C80A12(config, m_maincpu, 20_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &qncrash_state::main_program_map); + m_maincpu->set_addrmap(AS_IO, &qncrash_state::cgunman_main_io_map); + m_maincpu->in_p0_callback().set_ioport("IN0"); + m_maincpu->out_p0_callback().set([this] (u8 data) { logerror("%s: p0 out %02X\n", machine().describe_context(), data); }); + m_maincpu->out_p1_callback().set("eeprom", FUNC(eeprom_serial_93cxx_device::cs_write)).bit(0); + m_maincpu->out_p1_callback().append("eeprom", FUNC(eeprom_serial_93cxx_device::clk_write)).bit(1); + m_maincpu->out_p1_callback().append("eeprom", FUNC(eeprom_serial_93cxx_device::di_write)).bit(2); + m_maincpu->out_p2_callback().set([this] (u8 data) { logerror("%s: p2 out %02X\n", machine().describe_context(), data); }); + m_maincpu->out_p3_callback().set([this] (u8 data) { logerror("%s: p3 out %02X\n", machine().describe_context(), data); }); + m_maincpu->out_p4_callback().set([this] (u8 data) { logerror("%s: p4 out %02X\n", machine().describe_context(), data); }); + + TMPZ84C015(config, "dotcpu", 24'000'000 / 2).set_disable(); + + EEPROM_93C46_16BIT(config, "eeprom"); + + // video hardware + // TODO: + + // sound hardware + SPEAKER(config, "mono").front_center(); + + OKIM9810(config, "oki", 4'096'000).add_route(ALL_OUTPUTS, "mono", 1.00); // XTAL on PCB not readable from the pic +} + ROM_START( qncrash ) ROM_REGION( 0x10000, "maincpu", 0 ) @@ -209,8 +255,23 @@ ROM_START( qncrasha ) ROM_LOAD( "j4155.ic5", 0x400, 0x155, NO_DUMP ) ROM_END +ROM_START( cgunman ) + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "cgm1_mpro.ic3", 0x00000, 0x10000, CRC(0aed68fb) SHA1(d72a39c37c33369dae8a298fec2c8ef9065101d9) ) + + ROM_REGION( 0x20000, "dotcpu", 0 ) + ROM_LOAD( "cgm1_dot0.bin", 0x00000, 0x20000, NO_DUMP ) // not 100% sure it exists + + ROM_REGION( 0x400000, "oki", 0 ) + ROM_LOAD( "cgm1_vo1.ic18", 0x000000, 0x400000, NO_DUMP ) // size not verified + + ROM_REGION16_BE( 0x80, "eeprom", 0 ) + ROM_LOAD( "93c46n.ic6", 0x00, 0x80, NO_DUMP ) +ROM_END + } // anonymous namespace GAME( 1999, qncrash, 0, qncrash, qncrash, qncrash_state, empty_init, ROT0, "Namco", "Quick & Crash (Japan, V2.200)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) // version listed at 0xa97a in program ROM GAME( 1999, qncrasha, qncrash, qncrash, qncrash, qncrash_state, empty_init, ROT0, "Namco", "Quick & Crash (US)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 1998, cgunman, 0, cgunman, qncrash, qncrash_state, empty_init, ROT0, "Namco", "Cool Gunman (V1.70)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) From 550d001cd43054c60401b2001267e410822d2d46 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Tue, 10 Mar 2026 04:36:22 +1100 Subject: [PATCH 214/351] cpu/sharc/compute.hxx: Share interpreter code for some single ALU ops and dual multiplier/ALU ops, be stricter about Rn vs Fn. --- src/devices/cpu/sharc/compute.hxx | 722 ++++++++++++++--------------- src/devices/cpu/sharc/sharc.h | 64 +-- src/devices/cpu/sharc/sharcops.hxx | 6 +- 3 files changed, 387 insertions(+), 405 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 2c8917b7794..77fbc935559 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -125,12 +125,202 @@ const uint32_t adsp21062_device::rsqrts_mantissa_lookup[128] = 0x00370000, 0x00370000, 0x00360000, 0x00350000, }; -uint32_t adsp21062_device::SCALB(SHARC_REG rx, int ry) -{ - uint32_t const mantissa = rx.r & FLOAT_MANTISSA_MASK; - uint32_t const sign = rx.r & FLOAT_SIGN_MASK; - int exponent = float_get_unbiased_exponent(rx.r); +/*****************************************************************************/ +/* ALU helpers */ + +/* Fx + Fy */ +adsp21062_device::SHARC_REG adsp21062_device::FADD(int fx, int fy) +{ + SHARC_REG r; + if (IS_FLOAT_NAN_ADD(REG(fx), REG(fy))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(fx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(fy)); + r.f = x.f + y.f; + + if (IS_FLOAT_INFINITY(r.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r &= FLOAT_SIGN_MASK; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } + + m_core->astat |= AF; + return r; +} + +/* Fx - Fy */ +adsp21062_device::SHARC_REG adsp21062_device::FSUB(int fx, int fy) +{ + SHARC_REG r; + if (IS_FLOAT_NAN_SUB(REG(fx), REG(fy))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(fx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(fy)); + r.f = x.f - y.f; + + if (IS_FLOAT_INFINITY(r.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r &= FLOAT_SIGN_MASK; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } + + m_core->astat |= AF; + return r; +} + +// (Fx + Fy) / 2 +adsp21062_device::SHARC_REG adsp21062_device::FAVG(int fx, int fy) +{ + SHARC_REG r; + if (IS_FLOAT_NAN_ADD(REG(fx), REG(fy))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + // TODO: this loses one bit of range due to the intermediate sub being constrained to single precision + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(fx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(fy)); + r.f = (x.f + y.f) * 0.5f; + + if (IS_FLOAT_INFINITY(r.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.r &= FLOAT_SIGN_MASK; + } + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; + } + + m_core->astat |= AF; + return r; +} + +// ABS Fx +adsp21062_device::SHARC_REG adsp21062_device::FABS(int fx) +{ + SHARC_REG r; + if (IS_FLOAT_NAN(REG(fx))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(fx))) + { + r.r = 0; + m_core->astat |= AZ; + } + else + { + r.r = REG(fx) & ~FLOAT_SIGN_MASK; + } + m_core->astat |= (REG(fx) & FLOAT_SIGN_MASK) ? AS : 0; + } + + m_core->astat |= AF; + return r; +} + +// MIN(Fx, Fy) +adsp21062_device::SHARC_REG adsp21062_device::FMIN(int fx, int fy) +{ + SHARC_REG r; + if (IS_FLOAT_NAN(REG(fx)) || IS_FLOAT_NAN(REG(fy))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + // TODO: flush denormals to zero, handle negative versus positive zero + r.f = std::min(FREG(fx), FREG(fy)); + + m_core->astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + } + + m_core->astat |= AF; + return r; +} + +// MAX(Fx, Fy) +adsp21062_device::SHARC_REG adsp21062_device::FMAX(int fx, int fy) +{ + SHARC_REG r; + if (IS_FLOAT_NAN(REG(fx)) || IS_FLOAT_NAN(REG(fy))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else + { + // TODO: flush denormals to zero, handle negative versus positive zero + r.f = std::max(FREG(fx), FREG(fy)); + + m_core->astat |= (r.f < 0.0f) ? AN : 0; + m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; + } + + m_core->astat |= AF; + return r; +} + +uint32_t adsp21062_device::SCALB(SHARC_REG fx, int ry) +{ + uint32_t const mantissa = fx.r & FLOAT_MANTISSA_MASK; + uint32_t const sign = fx.r & FLOAT_SIGN_MASK; + + int exponent = float_get_unbiased_exponent(fx.r); exponent += int32_t(REG(ry)); if (exponent > 127) @@ -487,90 +677,26 @@ void adsp21062_device::compute_clip(int rn, int rx, int ry) /* Floating-point ALU operations */ /* Fn = Fx + Fy */ -void adsp21062_device::compute_fadd(int rn, int rx, int ry) +void adsp21062_device::compute_fadd(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); - - SHARC_REG r; - if (IS_FLOAT_NAN_ADD(REG(rx), REG(ry))) - { - r.r = FLOAT_CANONICAL_NAN; - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - SHARC_REG x, y; - x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); - y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); - r.f = x.f + y.f; - - if (IS_FLOAT_INFINITY(r.r)) - { - m_core->astat |= AV; - m_core->stky |= AVS; - if (m_core->mode1 & MODE1_TRUNCATE) - r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; - } - else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) - { - m_core->astat |= AZ; - m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; - r.r &= FLOAT_SIGN_MASK; - } - m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; - } - - FREG(rn) = r.f; - m_core->astat |= AF; + FREG(fn) = FADD(fx, fy).f; } /* Fn = Fx - Fy */ -void adsp21062_device::compute_fsub(int rn, int rx, int ry) +void adsp21062_device::compute_fsub(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); - - SHARC_REG r; - if (IS_FLOAT_NAN_SUB(REG(rx), REG(ry))) - { - r.r = FLOAT_CANONICAL_NAN; - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - SHARC_REG x, y; - x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); - y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); - r.f = x.f - y.f; - - if (IS_FLOAT_INFINITY(r.r)) - { - m_core->astat |= AV; - m_core->stky |= AVS; - if (m_core->mode1 & MODE1_TRUNCATE) - r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; - } - else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) - { - m_core->astat |= AZ; - m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; - r.r &= FLOAT_SIGN_MASK; - } - m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; - } - - FREG(rn) = r.f; - m_core->astat |= AF; + FREG(fn) = FSUB(fx, fy).f; } /* Fn = ABS(Fx + Fy) */ -void adsp21062_device::compute_fadd_abs(int rn, int rx, int ry) +void adsp21062_device::compute_fadd_abs(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); SHARC_REG r; - if (IS_FLOAT_NAN_ADD(REG(rx), REG(ry))) + if (IS_FLOAT_NAN_ADD(REG(fx), REG(fy))) { r.r = FLOAT_CANONICAL_NAN; m_core->astat |= AI; @@ -579,8 +705,8 @@ void adsp21062_device::compute_fadd_abs(int rn, int rx, int ry) else { SHARC_REG x, y; - x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); - y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + x.r = FLOAT_FLUSH_DENORMAL(REG(fx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(fy)); r.f = x.f + y.f; r.r &= ~FLOAT_SIGN_MASK; @@ -599,17 +725,17 @@ void adsp21062_device::compute_fadd_abs(int rn, int rx, int ry) } } - FREG(rn) = r.f; + FREG(fn) = r.f; m_core->astat |= AF; } /* Fn = ABS(Fx - Fy) */ -void adsp21062_device::compute_fsub_abs(int rn, int rx, int ry) +void adsp21062_device::compute_fsub_abs(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); SHARC_REG r; - if (IS_FLOAT_NAN_SUB(REG(rx), REG(ry))) + if (IS_FLOAT_NAN_SUB(REG(fx), REG(fy))) { r.r = FLOAT_CANONICAL_NAN; m_core->astat |= AI; @@ -618,8 +744,8 @@ void adsp21062_device::compute_fsub_abs(int rn, int rx, int ry) else { SHARC_REG x, y; - x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); - y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); + x.r = FLOAT_FLUSH_DENORMAL(REG(fx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(fy)); r.f = x.f - y.f; r.r &= ~FLOAT_SIGN_MASK; @@ -638,64 +764,31 @@ void adsp21062_device::compute_fsub_abs(int rn, int rx, int ry) } } - FREG(rn) = r.f; + FREG(fn) = r.f; m_core->astat |= AF; } /* Fn = (Fx + Fy) / 2 */ -void adsp21062_device::compute_favg(int rn, int rx, int ry) +void adsp21062_device::compute_favg(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); - - SHARC_REG r; - if (IS_FLOAT_NAN_ADD(REG(rx), REG(ry))) - { - r.r = FLOAT_CANONICAL_NAN; - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - // TODO: this loses one bit of range due to the intermediate sub being constrained to single precision - SHARC_REG x, y; - x.r = FLOAT_FLUSH_DENORMAL(REG(rx)); - y.r = FLOAT_FLUSH_DENORMAL(REG(ry)); - r.f = (x.f + y.f) * 0.5f; - - if (IS_FLOAT_INFINITY(r.r)) - { - m_core->astat |= AV; - m_core->stky |= AVS; - if (m_core->mode1 & MODE1_TRUNCATE) - r.r = (r.r & FLOAT_SIGN_MASK) | 0x7f7fffff; - } - else if (IS_FLOAT_DENORMAL_OR_ZERO(r.r)) - { - m_core->astat |= AZ; - m_core->stky |= ((r.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; - r.r &= FLOAT_SIGN_MASK; - } - m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; - } - - FREG(rn) = r.f; - m_core->astat |= AF; + FREG(fn) = FAVG(fx, fy).f; } /* COMP(Fx, Fy) */ -void adsp21062_device::compute_fcomp(int rx, int ry) +void adsp21062_device::compute_fcomp(int fx, int fy) { CLEAR_ALU_FLAGS(); - if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + if (IS_FLOAT_NAN(REG(fx)) || IS_FLOAT_NAN(REG(fy))) { m_core->astat |= AI; m_core->stky |= AIS; } else { - if (FREG(rx) == FREG(ry)) + if (FREG(fx) == FREG(fy)) m_core->astat |= AZ; - else if (FREG(rx) < FREG(ry)) + else if (FREG(fx) < FREG(fy)) m_core->astat |= AN; } @@ -712,12 +805,12 @@ void adsp21062_device::compute_fcomp(int rx, int ry) } /* Fn = -Fx */ -void adsp21062_device::compute_fneg(int rn, int rx) +void adsp21062_device::compute_fneg(int fn, int fx) { CLEAR_ALU_FLAGS(); SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx))) + if (IS_FLOAT_NAN(REG(fx))) { r.r = FLOAT_CANONICAL_NAN; m_core->astat |= AI; @@ -725,59 +818,36 @@ void adsp21062_device::compute_fneg(int rn, int rx) } else { - if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(fx))) { - r.r = ~REG(rx) & FLOAT_SIGN_MASK; + r.r = ~REG(fx) & FLOAT_SIGN_MASK; m_core->astat |= AZ; } else { - r.r = REG(rx) ^ FLOAT_SIGN_MASK; + r.r = REG(fx) ^ FLOAT_SIGN_MASK; } m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; } - FREG(rn) = r.f; + FREG(fn) = r.f; m_core->astat |= AF; } /* Fn = ABS Fx */ -void adsp21062_device::compute_fabs(int rn, int rx) +void adsp21062_device::compute_fabs(int fn, int fx) { CLEAR_ALU_FLAGS(); - - SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx))) - { - r.r = FLOAT_CANONICAL_NAN; - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) - { - r.r = 0; - m_core->astat |= AZ; - } - else - { - r.r = REG(rx) & ~FLOAT_SIGN_MASK; - } - m_core->astat |= (REG(rx) & FLOAT_SIGN_MASK) ? AS : 0; - } - - FREG(rn) = r.f; - m_core->astat |= AF; + FREG(fn) = FABS(fx).f; } /* Fn = PASS Fx */ -void adsp21062_device::compute_fpass(int rn, int rx) +void adsp21062_device::compute_fpass(int fn, int fx) { CLEAR_ALU_FLAGS(); SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx))) + if (IS_FLOAT_NAN(REG(fx))) { r.r = FLOAT_CANONICAL_NAN; m_core->astat |= AI; @@ -785,39 +855,39 @@ void adsp21062_device::compute_fpass(int rn, int rx) } else { - if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(fx))) { - r.r = REG(rx) & FLOAT_SIGN_MASK; + r.r = REG(fx) & FLOAT_SIGN_MASK; m_core->astat |= AZ; } else { - r.r = REG(rx); + r.r = REG(fx); } m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; } - FREG(rn) = r.f; + FREG(fn) = r.f; m_core->astat |= AF; } /* Fn = SCALB Fx BY Fy */ -void adsp21062_device::compute_scalb(int rn, int rx, int ry) +void adsp21062_device::compute_scalb(int fn, int fx, int ry) { // verified SHARC_REG r; CLEAR_ALU_FLAGS(); - if (IS_FLOAT_NAN(REG(rx))) + if (IS_FLOAT_NAN(REG(fx))) { m_core->astat |= AI; m_core->stky |= AIS; - REG(rn) = FLOAT_CANONICAL_NAN; + REG(fn) = FLOAT_CANONICAL_NAN; } else { - r.r = SCALB(m_core->r[rx], ry); + r.r = SCALB(m_core->r[fx], ry); // AN SET_FLAG_AN(r.r); @@ -826,32 +896,32 @@ void adsp21062_device::compute_scalb(int rn, int rx, int ry) // AUS m_core->stky |= (IS_FLOAT_DENORMAL(r.r)) ? AUS : 0; - FREG(rn) = r.f; + FREG(fn) = r.f; } m_core->astat |= AF; } /* Rn = LOGB Fx */ -void adsp21062_device::compute_logb(int rn, int rx) +void adsp21062_device::compute_logb(int rn, int fx) { // verified - uint32_t r = REG(rx); + uint32_t r = REG(fx); CLEAR_ALU_FLAGS(); - if (IS_FLOAT_INFINITY(REG(rx))) + if (IS_FLOAT_INFINITY(REG(fx))) { REG(rn) = FLOAT_INFINITY; m_core->astat |= AV; } - else if (IS_FLOAT_ZERO(REG(rx))) + else if (IS_FLOAT_ZERO(REG(fx))) { REG(rn) = FLOAT_SIGN_MASK | FLOAT_INFINITY; m_core->astat |= AV; } - else if (IS_FLOAT_NAN(REG(rx))) + else if (IS_FLOAT_NAN(REG(fx))) { REG(rn) = FLOAT_CANONICAL_NAN; @@ -873,12 +943,12 @@ void adsp21062_device::compute_logb(int rn, int rx) } /* Rn = FIX Fx BY Ry */ -void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) +void adsp21062_device::compute_fix_scaled(int rn, int fx, int ry) { int32_t alu_i; SHARC_REG r_alu; - r_alu.r = SCALB(m_core->r[rx], ry); + r_alu.r = SCALB(m_core->r[fx], ry); if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = int32_t(floorf(r_alu.f)); @@ -895,7 +965,7 @@ void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) // AU m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fx))) ? AI : 0; /* TODO: AV flag */ REG(rn) = alu_i; @@ -903,12 +973,12 @@ void adsp21062_device::compute_fix_scaled(int rn, int rx, int ry) } /* Rn = FIX Fx */ -void adsp21062_device::compute_fix(int rn, int rx) +void adsp21062_device::compute_fix(int rn, int fx) { int32_t alu_i; SHARC_REG r_alu; - r_alu.f = FREG(rx); + r_alu.f = FREG(fx); if (m_core->mode1 & MODE1_TRUNCATE) { alu_i = int32_t(floorf(r_alu.f)); @@ -925,7 +995,7 @@ void adsp21062_device::compute_fix(int rn, int rx) // AU m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fx))) ? AI : 0; /* TODO: AV flag */ REG(rn) = alu_i; @@ -933,7 +1003,7 @@ void adsp21062_device::compute_fix(int rn, int rx) } /* Fn = FLOAT Rx BY Ry */ -void adsp21062_device::compute_float_scaled(int rn, int rx, int ry) +void adsp21062_device::compute_float_scaled(int fn, int rx, int ry) { SHARC_REG x; x.f = float(int32_t(REG(rx))); @@ -941,45 +1011,45 @@ void adsp21062_device::compute_float_scaled(int rn, int rx, int ry) // verified CLEAR_ALU_FLAGS(); - REG(rn) = SCALB(x, ry); + REG(fn) = SCALB(x, ry); // AN - SET_FLAG_AN(REG(rn)); + SET_FLAG_AN(REG(fn)); // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; + m_core->astat |= IS_FLOAT_DENORMAL_OR_ZERO(REG(fn)) ? AZ : 0; // AU - m_core->stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; + m_core->stky |= IS_FLOAT_DENORMAL(REG(fn)) ? AUS : 0; m_core->astat |= AF; } /* Fn = FLOAT Rx */ -void adsp21062_device::compute_float(int rn, int rx) +void adsp21062_device::compute_float(int fn, int rx) { // verified - FREG(rn) = (float)(int32_t)REG(rx); + FREG(fn) = (float)(int32_t)REG(rx); CLEAR_ALU_FLAGS(); // AN - SET_FLAG_AN(REG(rn)); + SET_FLAG_AN(REG(fn)); // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(REG(rn)) || IS_FLOAT_ZERO(REG(rn))) ? AZ : 0; + m_core->astat |= IS_FLOAT_DENORMAL_OR_ZERO(REG(fn)) ? AZ : 0; // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(REG(rn))) ? AUS : 0; + m_core->stky |= IS_FLOAT_DENORMAL(REG(fn)) ? AUS : 0; /* TODO: AV flag */ m_core->astat |= AF; } /* Fn = RECIPS Fx */ -void adsp21062_device::compute_recips(int rn, int rx) +void adsp21062_device::compute_recips(int fn, int fx) { // verified uint32_t r; CLEAR_ALU_FLAGS(); - if (IS_FLOAT_NAN(REG(rx))) + if (IS_FLOAT_NAN(REG(fx))) { // NaN r = FLOAT_CANONICAL_NAN; @@ -990,19 +1060,19 @@ void adsp21062_device::compute_recips(int rn, int rx) // AIS m_core->stky |= AIS; } - else if (IS_FLOAT_ZERO(REG(rx))) + else if (IS_FLOAT_ZERO(REG(fx))) { // +- Zero - r = (REG(rx) & FLOAT_SIGN_MASK) | FLOAT_INFINITY; + r = (REG(fx) & FLOAT_SIGN_MASK) | FLOAT_INFINITY; m_core->astat |= AV; } else { - uint32_t mantissa = REG(rx) & FLOAT_MANTISSA_MASK; - uint32_t sign = REG(rx) & FLOAT_SIGN_MASK; + uint32_t mantissa = REG(fx) & FLOAT_MANTISSA_MASK; + uint32_t sign = REG(fx) & FLOAT_SIGN_MASK; - int res_exponent = -float_get_unbiased_exponent(REG(rx)) - 1; + int res_exponent = -float_get_unbiased_exponent(REG(fx)) - 1; uint32_t res_mantissa = recips_mantissa_lookup[mantissa >> 16]; @@ -1018,37 +1088,37 @@ void adsp21062_device::compute_recips(int rn, int rx) r = sign | (uint32_t(res_exponent) << FLOAT_EXPONENT_SHIFT) | res_mantissa; - SET_FLAG_AN(REG(rx)); + SET_FLAG_AN(REG(fx)); // AZ m_core->astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; } - REG(rn) = r; + REG(fn) = r; m_core->astat |= AF; } /* Fn = RSQRTS Fx */ -void adsp21062_device::compute_rsqrts(int rn, int rx) +void adsp21062_device::compute_rsqrts(int fn, int fx) { // verified uint32_t r; - if (uint32_t(REG(rx)) > 0x80000000) + if (uint32_t(REG(fx)) > 0x80000000) { // non-zero negative r = FLOAT_CANONICAL_NAN; } - else if (IS_FLOAT_NAN(REG(rx))) + else if (IS_FLOAT_NAN(REG(fx))) { // NaN r = FLOAT_CANONICAL_NAN; } else { - uint32_t mantissa = REG(rx) & 0xffffff; // mantissa + LSB of biased exponent - uint32_t sign = REG(rx) & FLOAT_SIGN_MASK; + uint32_t mantissa = REG(fx) & 0xffffff; // mantissa + LSB of biased exponent + uint32_t sign = REG(fx) & FLOAT_SIGN_MASK; - int32_t res_exponent = -(float_get_unbiased_exponent(REG(rx)) >> 1) - 1; + int32_t res_exponent = -(float_get_unbiased_exponent(REG(fx)) >> 1) - 1; uint32_t res_mantissa = rsqrts_mantissa_lookup[mantissa >> 17]; @@ -1057,26 +1127,26 @@ void adsp21062_device::compute_rsqrts(int rn, int rx) CLEAR_ALU_FLAGS(); // AN - m_core->astat |= (REG(rx) == 0x80000000) ? AN : 0; + m_core->astat |= (REG(fx) == 0x80000000) ? AN : 0; // AZ & AV m_core->astat |= (IS_FLOAT_ZERO(r)) ? AZ : 0; - m_core->astat |= (IS_FLOAT_ZERO(REG(rx))) ? AV : 0; + m_core->astat |= (IS_FLOAT_ZERO(REG(fx))) ? AV : 0; // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || (REG(rx) & FLOAT_SIGN_MASK)) ? AI : 0; + m_core->astat |= (IS_FLOAT_NAN(REG(fx)) || (REG(fx) & FLOAT_SIGN_MASK)) ? AI : 0; // AIS if (m_core->astat & AI) m_core->stky |= AIS; - REG(rn) = r; + REG(fn) = r; m_core->astat |= AF; } /* Fn = COPYSIGN(Fx, Fy) */ -void adsp21062_device::compute_fcopysign(int rn, int rx, int ry) +void adsp21062_device::compute_fcopysign(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + if (IS_FLOAT_NAN(REG(fx)) || IS_FLOAT_NAN(REG(fy))) { r.r = FLOAT_CANONICAL_NAN; m_core->astat |= AI; @@ -1084,75 +1154,39 @@ void adsp21062_device::compute_fcopysign(int rn, int rx, int ry) } else { - r.r = REG(ry) & FLOAT_SIGN_MASK; + r.r = REG(fy) & FLOAT_SIGN_MASK; m_core->astat |= r.r ? AN : 0; // only the sign bit is set here so it avoids need to mask - if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(fx))) m_core->astat |= AZ; else - r.r |= REG(rx) & ~FLOAT_SIGN_MASK; + r.r |= REG(fx) & ~FLOAT_SIGN_MASK; } - FREG(rn) = r.f; + FREG(fn) = r.f; m_core->astat |= AF; } /* Fn = MIN(Fx, Fy) */ -void adsp21062_device::compute_fmin(int rn, int rx, int ry) +void adsp21062_device::compute_fmin(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); - - SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) - { - r.r = FLOAT_CANONICAL_NAN; - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - // TODO: flush denormals to zero, handle negative versus positive zero - r.f = std::min(FREG(rx), FREG(ry)); - - m_core->astat |= (r.f < 0.0f) ? AN : 0; - m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; - } - - FREG(rn) = r.f; - m_core->astat |= AF; + FREG(fn) = FMIN(fx, fy).f; } /* Fn = MAX(Fx, Fy) */ -void adsp21062_device::compute_fmax(int rn, int rx, int ry) +void adsp21062_device::compute_fmax(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); - - SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) - { - r.r = FLOAT_CANONICAL_NAN; - m_core->astat |= AI; - m_core->stky |= AIS; - } - else - { - // TODO: flush denormals to zero, handle negative versus positive zero - r.f = std::max(FREG(rx), FREG(ry)); - - m_core->astat |= (r.f < 0.0f) ? AN : 0; - m_core->astat |= (IS_FLOAT_ZERO(r.r)) ? AZ : 0; - } - - FREG(rn) = r.f; - m_core->astat |= AF; + FREG(fn) = FMAX(fx, fy).f; } /* Fn = CLIP Fx BY Fy */ -void adsp21062_device::compute_fclip(int rn, int rx, int ry) +void adsp21062_device::compute_fclip(int fn, int fx, int fy) { CLEAR_ALU_FLAGS(); SHARC_REG r; - if (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) + if (IS_FLOAT_NAN(REG(fx)) || IS_FLOAT_NAN(REG(fy))) { r.r = FLOAT_CANONICAL_NAN; m_core->astat |= AI; @@ -1160,23 +1194,23 @@ void adsp21062_device::compute_fclip(int rn, int rx, int ry) } else { - if (IS_FLOAT_DENORMAL_OR_ZERO(REG(rx)) || IS_FLOAT_DENORMAL_OR_ZERO(REG(ry))) + if (IS_FLOAT_DENORMAL_OR_ZERO(REG(fx)) || IS_FLOAT_DENORMAL_OR_ZERO(REG(fy))) { - r.r = REG(rx) & FLOAT_SIGN_MASK; + r.r = REG(fx) & FLOAT_SIGN_MASK; m_core->astat |= AZ; } else { SHARC_REG absry, negabsry; - absry.r = REG(ry) & ~FLOAT_SIGN_MASK; - negabsry.r = REG(ry) | FLOAT_SIGN_MASK; - r.f = std::clamp(FREG(rx), negabsry.f, absry.f); + absry.r = REG(fy) & ~FLOAT_SIGN_MASK; + negabsry.r = REG(fy) | FLOAT_SIGN_MASK; + r.f = std::clamp(FREG(fx), negabsry.f, absry.f); m_core->astat |= IS_FLOAT_ZERO(r.r) ? AZ : 0; } m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? AN : 0; } - FREG(rn) = r.f; + FREG(fn) = r.f; m_core->astat |= AF; } @@ -1367,8 +1401,6 @@ void adsp21062_device::compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, in } -/* floating-point */ - /* Fa = Fx + Fy, Fs = Fx - Fy */ void adsp21062_device::compute_dual_fadd_fsub(int ra, int rs, int rx, int ry) { @@ -1380,8 +1412,8 @@ void adsp21062_device::compute_dual_fadd_fsub(int ra, int rs, int rx, int ry) // AN m_core->astat |= ((r_add.f < 0.0f) || (r_sub.f < 0.0f)) ? AN : 0; // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r) || - IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; + m_core->astat |= (IS_FLOAT_DENORMAL_OR_ZERO(r_add.r) || + IS_FLOAT_DENORMAL_OR_ZERO(r_sub.r)) ? AZ : 0; // AUS m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; // AI @@ -1396,78 +1428,60 @@ void adsp21062_device::compute_dual_fadd_fsub(int ra, int rs, int rx, int ry) m_core->astat |= AF; } + +/*****************************************************************************/ +/* Floating-point multiplication and ALU operation */ + /* Fm = Fxm * Fym, Fa = Fxa + Fya */ void adsp21062_device::compute_fmul_fadd(int fm, int fxm, int fym, int fa, int fxa, int fya) { - SHARC_REG r_mul, r_add; - r_mul.f = FREG(fxm) * FREG(fym); - r_add.f = FREG(fxa) + FREG(fya); - CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul; + r_mul.f = FREG(fxm) * FREG(fym); + SET_FLAG_MN(r_mul.r); /* TODO: MV flag */ /* TODO: MU flag */ /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_add.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; - /* TODO: AV flag */ - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r_alu = FADD(fxa, fya); FREG(fm) = r_mul.f; - FREG(fa) = r_add.f; - m_core->astat |= AF; + FREG(fa) = r_alu.f; } /* Fm = Fxm * Fym, Fa = Fxa - Fya */ void adsp21062_device::compute_fmul_fsub(int fm, int fxm, int fym, int fa, int fxa, int fya) { - SHARC_REG r_mul, r_sub; - r_mul.f = FREG(fxm) * FREG(fym); - r_sub.f = FREG(fxa) - FREG(fya); - CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul; + r_mul.f = FREG(fxm) * FREG(fym); + SET_FLAG_MN(r_mul.r); /* TODO: MV flag */ /* TODO: MU flag */ /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_sub.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; - /* TODO: AV flag */ - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r_alu = FSUB(fxa, fya); FREG(fm) = r_mul.f; - FREG(fa) = r_sub.f; - m_core->astat |= AF; + FREG(fa) = r_alu.f; } -/* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Fya */ -void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya) +/* Fm = Fxm * Fym, Fa = FLOAT Rxa BY Rya */ +void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int rxa, int rya) { SHARC_REG x; SHARC_REG r_mul, r_alu; r_mul.f = FREG(fxm) * FREG(fym); - x.f = float(int32_t(REG(fxa))); + x.f = float(int32_t(REG(rxa))); - r_alu.r = SCALB(x, fya); + r_alu.r = SCALB(x, rya); CLEAR_MULTIPLIER_FLAGS(); SET_FLAG_MN(r_mul.r); @@ -1478,9 +1492,9 @@ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int f CLEAR_ALU_FLAGS(); m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r_alu.r) || IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; + m_core->astat |= IS_FLOAT_DENORMAL_OR_ZERO(r_alu.r) ? AZ : 0; // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; + m_core->stky |= IS_FLOAT_DENORMAL(r_alu.r) ? AUS : 0; /* TODO: set AV if overflowed */ FREG(fm) = r_mul.f; @@ -1488,14 +1502,14 @@ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int f m_core->astat |= AF; } -/* Fm = Fxm * Fym, Fa = FIX Fxa BY Fya */ -void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya) +/* Fm = Fxm * Fym, Ra = FIX Fxa BY Rya */ +void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int ra, int fxa, int rya) { int32_t alu_i; SHARC_REG r_mul, r_alu; r_mul.f = FREG(fxm) * FREG(fym); - r_alu.r = SCALB(m_core->r[fxa], fya); + r_alu.r = SCALB(m_core->r[fxa], rya); if (m_core->mode1 & MODE1_TRUNCATE) { @@ -1523,134 +1537,92 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, /* TODO: AV flag */ FREG(fm) = r_mul.f; - REG(fa) = alu_i; // TODO: check this, should be RA? + REG(ra) = alu_i; m_core->astat |= AF; } void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya) { - SHARC_REG r_mul, r_alu; - r_mul.f = FREG(fxm) * FREG(fym); - r_alu.f = (FREG(fxa) + FREG(fya)) / 2.0f; - CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul; + r_mul.f = FREG(fxm) * FREG(fym); + SET_FLAG_MN(r_mul.r); /* TODO: MV flag */ /* TODO: MU flag */ /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r_alu.r) || IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; - /* TODO: AV flag */ + SHARC_REG r_alu = FAVG(fxa, fya); FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_core->astat |= AF; } -void adsp21062_device::compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa, int fya) +void adsp21062_device::compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa) { - SHARC_REG r_mul, r_alu; - r_mul.f = FREG(fxm) * FREG(fym); - if (IS_FLOAT_NAN(REG(fxa))) - { - r_alu.r = 0xffffffff; - } - else if (IS_FLOAT_DENORMAL(REG(fxa))) - { - r_alu.r = 0; - } - else - { - r_alu.r = REG(fxa) & 0x7fffffff; - } - CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul; + r_mul.f = FREG(fxm) * FREG(fym); + SET_FLAG_MN(r_mul.r); /* TODO: MV flag */ /* TODO: MU flag */ /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - // AZ - m_core->astat |= IS_FLOAT_ZERO(r_alu.r) ? AZ : 0; - // AS - m_core->astat |= (REG(fxa) < 0.0f) ? AS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa))) ? AI : 0; + SHARC_REG r_alu = FABS(fxa); FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = MAX(Fxa, Fya) */ void adsp21062_device::compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya) { - SHARC_REG r_mul, r_alu; + CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul; r_mul.f = FREG(fxm) * FREG(fym); - r_alu.f = std::max(FREG(fxa), FREG(fya)); - - CLEAR_MULTIPLIER_FLAGS(); SET_FLAG_MN(r_mul.r); /* TODO: MV flag */ /* TODO: MU flag */ /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; - /* TODO: AV flag */ + SHARC_REG r_alu = FMAX(fxa, fya); FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_core->astat |= AF; } /* Fm = Fxm * Fym, Fa = MIN(Fxa, Fya) */ void adsp21062_device::compute_fmul_fmin(int fm, int fxm, int fym, int fa, int fxa, int fya) { - SHARC_REG r_mul, r_alu; + CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul; r_mul.f = FREG(fxm) * FREG(fym); - r_alu.f = std::min(FREG(fxa), FREG(fya)); - - CLEAR_MULTIPLIER_FLAGS(); SET_FLAG_MN(r_mul.r); /* TODO: MV flag */ /* TODO: MU flag */ /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_ZERO(r_alu.r)) ? AZ : 0; - // AU - m_core->stky |= (IS_FLOAT_DENORMAL(r_alu.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; - /* TODO: AV flag */ + SHARC_REG r_alu = FMIN(fxa, fya); FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; - m_core->astat |= AF; } +/*****************************************************************************/ +/* Multiplication and dual add/subtract */ /* Fm = Fxm * Fym, Fa = Fxa + Fya, Fs = Fxa - Fya */ void adsp21062_device::compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya) diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 93f0d321386..032e7edc671 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -388,7 +388,15 @@ private: void sharcop_nop(); void sharcop_idle(); [[noreturn]] void sharcop_unimplemented() ATTR_COLD; - inline uint32_t SCALB(SHARC_REG rx, int ry); + + // ALU helpers + inline SHARC_REG FADD(int fx, int fy); + inline SHARC_REG FSUB(int fx, int fy); + inline SHARC_REG FAVG(int fx, int fy); + inline SHARC_REG FABS(int fx); + inline SHARC_REG FMIN(int fx, int fy); + inline SHARC_REG FMAX(int fx, int fy); + inline uint32_t SCALB(SHARC_REG fx, int ry); // ALU fixed-point inline void compute_add(int rn, int rx, int ry); @@ -412,27 +420,27 @@ private: inline void compute_clip(int rn, int rx, int ry); // ALU floating-point - inline void compute_fadd(int rn, int rx, int ry); - inline void compute_fsub(int rn, int rx, int ry); - inline void compute_fadd_abs(int rn, int rx, int ry); - inline void compute_fsub_abs(int rn, int rx, int ry); - inline void compute_favg(int rn, int rx, int ry); - inline void compute_fcomp(int rx, int ry); - inline void compute_fneg(int rn, int rx); - inline void compute_fabs(int rn, int rx); - inline void compute_fpass(int rn, int rx); - inline void compute_scalb(int rn, int rx, int ry); - inline void compute_logb(int rn, int rx); - inline void compute_fix_scaled(int rn, int rx, int ry); - inline void compute_fix(int rn, int rx); - inline void compute_float_scaled(int rn, int rx, int ry); - inline void compute_float(int rn, int rx); - inline void compute_recips(int rn, int rx); - inline void compute_rsqrts(int rn, int rx); - inline void compute_fcopysign(int rn, int rx, int ry); - inline void compute_fmin(int rn, int rx, int ry); - inline void compute_fmax(int rn, int rx, int ry); - inline void compute_fclip(int rn, int rx, int ry); + inline void compute_fadd(int fn, int fx, int fy); + inline void compute_fsub(int fn, int fx, int fy); + inline void compute_fadd_abs(int fn, int fx, int fy); + inline void compute_fsub_abs(int fn, int fx, int fy); + inline void compute_favg(int fn, int fx, int fy); + inline void compute_fcomp(int fx, int fy); + inline void compute_fneg(int fn, int fx); + inline void compute_fabs(int fn, int fx); + inline void compute_fpass(int fn, int fx); + inline void compute_scalb(int fn, int fx, int ry); + inline void compute_logb(int rn, int fx); + inline void compute_fix_scaled(int rn, int fx, int ry); + inline void compute_fix(int rn, int fx); + inline void compute_float_scaled(int fn, int rx, int ry); + inline void compute_float(int fn, int rx); + inline void compute_recips(int fn, int fx); + inline void compute_rsqrts(int fn, int fx); + inline void compute_fcopysign(int fn, int fx, int fy); + inline void compute_fmin(int fn, int fx, int fy); + inline void compute_fmax(int fn, int fx, int fy); + inline void compute_fclip(int fn, int fx, int fy); // Multiplier inline void compute_mul_uuin(int rn, int rx, int ry); @@ -445,19 +453,21 @@ private: inline void compute_dual_add_sub(int ra, int rs, int rx, int ry); inline void compute_dual_fadd_fsub(int ra, int rs, int rx, int ry); - // Parallel multiplier and ALU + // Fixed-Point multiply/accumulate and add, subtract or average inline void compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, int rxa, int rya); inline void compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, int rxa, int rya); + + // Floating-Point multiplication and ALU operation inline void compute_fmul_fadd(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fsub(int fm, int fxm, int fym, int fa, int fxa, int fya); - inline void compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya); - inline void compute_fmul_fix_scaled(int fm, int fxm, int fym, int fa, int fxa, int fya); + inline void compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int rxa, int rya); + inline void compute_fmul_fix_scaled(int fm, int fxm, int fym, int ra, int fxa, int rya); inline void compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya); - inline void compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa, int fya); + inline void compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa); inline void compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fmin(int fm, int fxm, int fym, int fa, int fxa, int fya); - // Parallel multiplier and dual add/subtract + // Multiplication and dual add/subtract inline void compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya); inline void compute_multi_mr_to_reg(int ai, int rk); diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index 0a2a116a199..2cc071ccfe7 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -777,13 +777,13 @@ void adsp21062_device::COMPUTE(uint32_t opcode) break; } - case 0x1a: /* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Fya */ + case 0x1a: /* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Rya */ { compute_fmul_float_scaled(fm, fxm, fym, fa, fxa, fya); break; } - case 0x1b: /* Fm = Fxm * Fym, Fa = FIX Fxa BY Fya */ + case 0x1b: /* Fm = Fxm * Fym, Ra = FIX Fxa BY Rya */ { compute_fmul_fix_scaled(fm, fxm, fym, fa, fxa, fya); break; @@ -797,7 +797,7 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0x1d: /* Fm = Fxm * Fym, Fa = ABS Fxa */ { - compute_fmul_abs(fm, fxm, fym, fa, fxa, fya); + compute_fmul_abs(fm, fxm, fym, fa, fxa); break; } From 08cc625c92ddac7f8c266b78f03c2c30559db880 Mon Sep 17 00:00:00 2001 From: stonedDiscord Date: Mon, 9 Mar 2026 20:05:55 +0100 Subject: [PATCH 215/351] adp/stellafr.cpp: Fix ROM sizes for discfun and dpplson; redump DSP for multmult (#15077) --- src/mame/adp/stellafr.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mame/adp/stellafr.cpp b/src/mame/adp/stellafr.cpp index 0721b54be27..39022bcf5a5 100644 --- a/src/mame/adp/stellafr.cpp +++ b/src/mame/adp/stellafr.cpp @@ -431,14 +431,14 @@ ROM_END ROM_START( discfun ) ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "disc_fun_f1_1.u2", 0x00000, 0x10000, CRC(7c2f9eff) SHA1(82d4511b039277784426923574407a0ab0155047) ) - ROM_LOAD16_BYTE( "disc_fun_f1_2.u6", 0x00001, 0x10000, CRC(873cb431) SHA1(dac69324c0a60a790d47d19af3288329656c3afe) ) + ROM_LOAD16_BYTE( "disc_fun_f1_1.u2", 0x00000, 0x80000, CRC(7c2f9eff) SHA1(82d4511b039277784426923574407a0ab0155047) ) + ROM_LOAD16_BYTE( "disc_fun_f1_2.u6", 0x00001, 0x80000, CRC(873cb431) SHA1(dac69324c0a60a790d47d19af3288329656c3afe) ) ROM_END ROM_START( dpplson ) ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "doppelsonne_f2_1.u2", 0x00000, 0x10000, CRC(4dcdc269) SHA1(05182ba671890a102184e3dadc53d4aca267db9d) ) - ROM_LOAD16_BYTE( "doppelsonne_f2_2.u6", 0x00001, 0x10000, CRC(9d024a01) SHA1(fd674ad65d5a202504e619ae37dd1c2a1792b9f2) ) + ROM_LOAD16_BYTE( "doppelsonne_f2_1.u2", 0x00000, 0x20000, CRC(4dcdc269) SHA1(05182ba671890a102184e3dadc53d4aca267db9d) ) + ROM_LOAD16_BYTE( "doppelsonne_f2_2.u6", 0x00001, 0x20000, CRC(9d024a01) SHA1(fd674ad65d5a202504e619ae37dd1c2a1792b9f2) ) ROM_END ROM_START( dscbonus ) @@ -536,8 +536,8 @@ ROM_START( multmult ) ROM_LOAD16_BYTE( "multi_multi_f1_i.u2", 0x00000, 0x20000, CRC(6aa663af) SHA1(cfcdf930fa26c06e49b241dbcb520c0c64cc8af0) ) ROM_LOAD16_BYTE( "multi_multi_f1_ii.u6", 0x00001, 0x20000, CRC(a7a5ac70) SHA1(38fd3ad4306aa46a1a9414b3ae3d0691c67f0357) ) - ROM_REGION( 0x20000, "dsp", 0 ) - ROM_LOAD( "js28f640.bin", 0x00000, 0x20000, CRC(effdd573) SHA1(2e3b09e440ea266ed6db9fd7c04f030d5cf5edb9) ) + ROM_REGION( 0x800000, "dsp", 0 ) + ROM_LOAD( "js28f640.bin", 0x00000, 0x800000, CRC(b71f87da) SHA1(b8adb307655fb0a79ee0ad4521351c237c3ff161) ) ROM_END ROM_START( multprim ) From 9d61c9b15fe82f0ce35946830cf90832ce266595 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Tue, 10 Mar 2026 06:07:01 +1100 Subject: [PATCH 216/351] cpu/sharc/compute.hxx: Fixed saturation without resorting to comparisons. --- src/devices/cpu/sharc/compute.hxx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 77fbc935559..2271d2eec37 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -23,7 +23,7 @@ #define SET_FLAG_MU(r) do { m_core->astat |= (((uint32_t((r) >> 32) == 0) && (uint32_t(r)) != 0) ? MU : 0); } while (false) // saturate overflowed result -inline void SATURATE(uint32_t &r) { r = (r ^ 0x80000000) | 0x7fffffff; } +inline void SATURATE(uint32_t &r) { r = uint32_t((int32_t(r) >> 31) ^ 0x80000000); } constexpr bool IS_FLOAT_ZERO(uint32_t r) { return (r & (FLOAT_EXPONENT_MASK | FLOAT_MANTISSA_MASK)) == 0; } constexpr bool IS_FLOAT_DENORMAL(uint32_t r) { return ((r & FLOAT_EXPONENT_MASK) == 0) && ((r & FLOAT_MANTISSA_MASK) != 0); } From 553ab2984864b4a27b16875cc71731cfd240c7b3 Mon Sep 17 00:00:00 2001 From: yz70s Date: Mon, 9 Mar 2026 20:45:16 +0100 Subject: [PATCH 217/351] Stop the windows debugger from crashing when using a widescreen monitor Happened with text windows wider that 256 characters --- src/osd/modules/debugger/win/debugviewinfo.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/osd/modules/debugger/win/debugviewinfo.cpp b/src/osd/modules/debugger/win/debugviewinfo.cpp index 8f3f05c16d2..60883c9c364 100644 --- a/src/osd/modules/debugger/win/debugviewinfo.cpp +++ b/src/osd/modules/debugger/win/debugviewinfo.cpp @@ -503,7 +503,8 @@ void debugview_info::draw_contents(HDC windc) COLORREF bgcolor = metrics().view_colors(DCA_NORMAL).second; HBRUSH bgbrush = nullptr; int last_attrib = -1; - TCHAR buffer[256]; + const int buffer_size = 512; + TCHAR buffer[buffer_size]; int count = 0; RECT bounds; @@ -551,7 +552,7 @@ void debugview_info::draw_contents(HDC windc) } else { - ExtTextOut(dc, bounds.left, bounds.top, 0, nullptr, buffer, count, nullptr); + ExtTextOut(dc, bounds.left, bounds.top, 0, nullptr, buffer, std::min(count, buffer_size), nullptr); } bounds.left = bounds.right; count = 0; @@ -571,7 +572,9 @@ void debugview_info::draw_contents(HDC windc) } // add this character to the buffer - buffer[count++] = viewdata[col].byte; + if (count < buffer_size) + buffer[count] = viewdata[col].byte; + count++; } // flush any remaining stuff @@ -597,7 +600,7 @@ void debugview_info::draw_contents(HDC windc) } else if (count > 0) { - ExtTextOut(dc, bounds.left, bounds.top, 0, nullptr, buffer, count, nullptr); + ExtTextOut(dc, bounds.left, bounds.top, 0, nullptr, buffer, std::min(count, buffer_size), nullptr); } } From 13a56ec4b382efb5d35025f2e8203eb8d8523174 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 9 Mar 2026 21:23:17 +0100 Subject: [PATCH 218/351] spaceg: 8-bit palette data can't come from 5-bit colorram, so implement it differently (no visible change), also added flipscreen, popper: lower cpu quantum, pooyan: add screen raw params --- src/mame/alliedleisure/killcom.cpp | 3 +- src/mame/konami/pooyan.cpp | 8 +- src/mame/omori/popper.cpp | 2 +- src/mame/omori/spaceg.cpp | 203 +++++++++++++++++------------ 4 files changed, 122 insertions(+), 94 deletions(-) diff --git a/src/mame/alliedleisure/killcom.cpp b/src/mame/alliedleisure/killcom.cpp index 3c9e8e79c3f..b0ff4d5ffc4 100644 --- a/src/mame/alliedleisure/killcom.cpp +++ b/src/mame/alliedleisure/killcom.cpp @@ -148,7 +148,8 @@ uint32_t killcom_state::screen_update(screen_device &screen, bitmap_ind16 &bitma { for (int x = cliprect.min_x; x <= cliprect.max_x; x++) { - bitmap.pix(y, x) = m_videoram[y << 8 | x] & 0x07; + const uint16_t offset = (y << 8 & 0xff00) | (x & 0xff); + bitmap.pix(y, x) = m_videoram[offset] & 0x07; } } diff --git a/src/mame/konami/pooyan.cpp b/src/mame/konami/pooyan.cpp index 13a9ffdc7ca..b8a2234fd21 100644 --- a/src/mame/konami/pooyan.cpp +++ b/src/mame/konami/pooyan.cpp @@ -420,10 +420,8 @@ void pooyan_state::machine_start() void pooyan_state::pooyan(machine_config &config) { - static constexpr XTAL MASTER_CLOCK = XTAL(18'432'000); - // basic machine hardware - Z80(config, m_maincpu, MASTER_CLOCK / 3 / 2); + Z80(config, m_maincpu, 18.432_MHz_XTAL / 3 / 2); m_maincpu->set_addrmap(AS_PROGRAM, &pooyan_state::main_map); ls259_device &mainlatch(LS259(config, "mainlatch")); // B2 @@ -439,9 +437,7 @@ void pooyan_state::pooyan(machine_config &config) // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_size(32*8, 32*8); - screen.set_visarea(0*8, 32*8-1, 2*8, 30*8-1); + screen.set_raw(18.432_MHz_XTAL / 3, 384, 0, 256, 264, 16, 240); // measured ~60.6Hz screen.set_screen_update(FUNC(pooyan_state::screen_update)); screen.set_palette(m_palette); screen.screen_vblank().set(FUNC(pooyan_state::vblank_irq)); diff --git a/src/mame/omori/popper.cpp b/src/mame/omori/popper.cpp index a505c900a9a..8a861593b0b 100644 --- a/src/mame/omori/popper.cpp +++ b/src/mame/omori/popper.cpp @@ -540,7 +540,7 @@ void popper_state::popper(machine_config &config) Z80(config, m_subcpu, XTAL(18'432'000)/3/2); m_subcpu->set_addrmap(AS_PROGRAM, &popper_state::sub_map); - config.set_perfect_quantum(m_maincpu); + config.set_maximum_quantum(attotime::from_hz(m_maincpu->clock() / 4)); ls259_device &outlatch(LS259(config, "outlatch")); outlatch.q_out_cb<0>().set(FUNC(popper_state::nmi_control_w)); diff --git a/src/mame/omori/spaceg.cpp b/src/mame/omori/spaceg.cpp index ab51c48cce1..be0a4fb3ef2 100644 --- a/src/mame/omori/spaceg.cpp +++ b/src/mame/omori/spaceg.cpp @@ -1,9 +1,23 @@ // license:GPL-2.0+ // copyright-holders:Jarek Burczynski, Tomasz Slanina -/************************************************************************************** +/******************************************************************************* -Space Guerrilla PCB Layout --------------------------- +Omori Space Guerrilla 『スペースゲリラ』, aka "Color Space Guerrilla" + +TODO: +- improve sound +- blitter sometimes leaves junk behind +- upright/cocktail flag is not from an input port, does the upright version have + wire mods to allow 2 players with a single joystick or is it a different romset? + +BTANB: +- attract mode peeing alien leaves behind light green footprints on the hill, + similar 'color clash' glitches happen when enemy bullets hit the red line at + the bottom of the screen + + +PCB Layout +---------- All PCBs slot into a metal frame. Each PCB is joined by the 14way/28way edge connectors on one side, and the 50 pin connectors via flat cables on the other side. @@ -93,7 +107,8 @@ CRTC1-A |-----------------------------| 50 pin 50 pin 50 pin Notes: - 4027 - MOSTEK MK4027-4 RAM (DIP16) + 82S09- Signetics 576-bit(64x9) Bipolar RAM + 4027 - MOSTEK MK4027-4 4Kx1 RAM (DIP16) DIP16- Unpopulated position for DIP16 IC @@ -125,7 +140,7 @@ CRTC2-A |-----------------------------| Notes: 74S288 - 32bytes x8 Bipolar PROM (DIP16, both PROMs contain identical contents) - 4027 - MOSTEK MK4027-4 RAM (DIP16) + 4027 - MOSTEK MK4027-4 4Kx1 RAM (DIP16) @@ -155,13 +170,13 @@ SBC-A |-----------------------------| 50 pin 50 pin Notes: - 4045 - TMS4045-45NL RAM (DIP18) - 8216 - Mitsubishi M5L8216 RAM (DIP16) + 4045 - TMS4045-45NL 1Kx4 RAM (DIP18) + 8216 - Mitsubishi M5L8216 4-bit bidirectional bus driver (DIP16) DIP18- Unpopulated position for DIP18 IC DIP24- Unpopulated position for DIP24 IC All ROMs type 2708 (DIP24) -**************************************************************************************/ +*******************************************************************************/ #include "emu.h" @@ -187,17 +202,13 @@ class spaceg_state : public driver_device public: spaceg_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_colorram(*this, "colorram"), - m_videoram(*this, "videoram"), - m_io9400(*this, "io9400"), - m_io9401(*this, "io9401"), m_maincpu(*this, "maincpu"), m_palette(*this, "palette"), m_samples(*this, "samples"), m_sn(*this, "snsnd"), - m_sound1(0), - m_sound2(0), - m_sound3(0) + m_videoram(*this, "videoram"), + m_colorram(*this, "colorram"), + m_lamps(*this, "lamp%u", 0U) { } void spaceg(machine_config &config); @@ -206,22 +217,31 @@ protected: virtual void machine_start() override; private: - required_shared_ptr m_colorram; - required_shared_ptr m_videoram; - required_shared_ptr m_io9400; - required_shared_ptr m_io9401; - required_device m_maincpu; required_device m_palette; required_device m_samples; required_device m_sn; - uint8_t m_sound1; - uint8_t m_sound2; - uint8_t m_sound3; + required_shared_ptr m_videoram; + required_shared_ptr m_colorram; + output_finder<2> m_lamps; + uint8_t m_clatch = 0; + uint8_t m_platch = 0; + uint8_t m_shift = 0; + uint8_t m_gfxctrl = 0; + uint8_t m_sound1 = 0; + uint8_t m_sound2 = 0; + uint8_t m_sound3 = 0; + + uint8_t palette_r(offs_t offset); + void palette_w(offs_t offset, uint8_t data) { m_platch = data; } + void clatch_w(uint8_t data) { m_clatch = data & 0x1f; } void zvideoram_w(offs_t offset, uint8_t data); - uint8_t colorram_r(offs_t offset); + + void shift_w(uint8_t data) { m_shift = data >> 5; } + void gfxctrl_w(uint8_t data) { m_gfxctrl = data; } + void output_w(uint8_t data); void sound1_w(uint8_t data); void sound2_w(uint8_t data); void sound3_w(uint8_t data); @@ -233,6 +253,12 @@ private: void spaceg_state::machine_start() { + m_lamps.resolve(); + + save_item(NAME(m_clatch)); + save_item(NAME(m_platch)); + save_item(NAME(m_shift)); + save_item(NAME(m_gfxctrl)); save_item(NAME(m_sound1)); save_item(NAME(m_sound2)); save_item(NAME(m_sound3)); @@ -247,27 +273,22 @@ void spaceg_state::machine_start() void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) { - int col = m_colorram[0x400]; - int xoff = *m_io9400 >> 5 & 7; - uint16_t offset2 = (offset + 0x100) & 0x1fff; - uint16_t sdata = data << (8 - xoff); + const uint16_t offset2 = (offset + 0x100) & 0x1fff; + const uint16_t sdata = data << (8 - m_shift); uint16_t vram_data = m_videoram[offset] << 8 | (m_videoram[offset2]); - if (col > 0x0f) logerror("color > 0x0f = %2d\n", col); - col &= 0x0f; - - switch (*m_io9401) + switch (m_gfxctrl & 0xf) { // draw case 0: - vram_data &= ~(0xff00 >> xoff); + vram_data &= ~(0xff00 >> m_shift); [[fallthrough]]; case 1: vram_data |= sdata; // update colorram - if (sdata & 0xff00) m_colorram[offset] = col; - if (sdata & 0x00ff) m_colorram[offset2] = col; + if (sdata & 0xff00) m_colorram[offset] = m_clatch; + if (sdata & 0x00ff) m_colorram[offset2] = m_clatch; break; // erase @@ -276,7 +297,7 @@ void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) break; default: - logerror("mode = %02x pc = %04x\n", *m_io9401, m_maincpu->pc()); + logerror("mode = %02x pc = %04x\n", m_gfxctrl & 0xf, m_maincpu->pc()); return; } @@ -285,44 +306,57 @@ void spaceg_state::zvideoram_w(offs_t offset, uint8_t data) } -uint8_t spaceg_state::colorram_r(offs_t offset) +uint8_t spaceg_state::palette_r(offs_t offset) { - if (!machine().side_effects_disabled()) + if (!machine().side_effects_disabled() && m_gfxctrl & 0x40) { - if (offset < 0x400) - { - if ((offset & 0xff) < 0x20) - { - const int rgbcolor = (m_colorram[offset] << 1) | ((offset & 0x100) >> 8); - const int index = (offset & 0x1f) | (~offset >> 4 & 0x20); - m_palette->set_pen_color(index, pal3bit(rgbcolor >> 0), pal3bit(rgbcolor >> 6), pal3bit(rgbcolor >> 3)); - } - else - logerror("palette? read from colorram offset = %04x\n", offset); - } - - if (*m_io9401 != 0x40) - logerror("colorram read in mode: 9401 = %02x (offset = %04x)\n", *m_io9401, offset); + // write to palette RAM + const int index = (offset & 0x1f) | (offset >> 4 & 0x20); + const int rgbcolor = (m_platch << 1) | ((offset & 0x100) >> 8); + m_palette->set_pen_color(index, pal3bit(rgbcolor >> 0), pal3bit(rgbcolor >> 6), pal3bit(rgbcolor >> 3)); } - return m_colorram[offset]; + return 0; +} + + +void spaceg_state::output_w(uint8_t data) +{ + // bits 0 and 1: start button lamps + m_lamps[0] = BIT(data, 0); + m_lamps[1] = BIT(data, 1); + + // bit 2: high score signal according to schematics, N/C or for bookkeeping? + // (see unknown SW7,8) + + // bit 3: flip screen + flip_screen_set(BIT(data, 3)); + + // bit 7: unknown, set at same time as flip screen, but not unset + // other: unused } uint32_t spaceg_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - for (offs_t offs = 0; offs < 0x2000; offs++) + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) { - uint8_t data = m_videoram[offs]; - int y = offs & 0xff; - int x = (offs >> 8) << 3; - - for (int i = 0; i < 8; i++) + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) { - bitmap.pix(y, x) = (data & 0x80) ? (m_colorram[offs] & 0x0f) : 0x20; + uint8_t sx = x; + uint8_t sy = y; - x++; - data <<= 1; + if (flip_screen()) + { + sx = ~sx; + sy = ~sy + 32; + } + + const uint16_t offset = (sx << 5 & 0x1f00) | sy; + const uint8_t pixel = BIT(m_videoram[offset], ~sx & 7); + const uint8_t color = (m_colorram[offset] & 0x1f) | pixel << 5; + + bitmap.pix(y, x) = color; } } @@ -406,18 +440,15 @@ void spaceg_state::spaceg_map(address_map &map) map(0x3000, 0x3fff).rom(); map(0x7000, 0x77ff).ram(); - map(0xa000, 0xbfff).ram().r(FUNC(spaceg_state::colorram_r)).share("colorram"); + map(0xa000, 0xbfff).writeonly().share("colorram"); + map(0xa000, 0xa000).mirror(0x1f1f).unmaprw(); + map(0xa000, 0xa01f).select(0x0300).rw(FUNC(spaceg_state::palette_r), FUNC(spaceg_state::palette_w)); + map(0xa400, 0xa400).w(FUNC(spaceg_state::clatch_w)); map(0xc000, 0xdfff).ram().w(FUNC(spaceg_state::zvideoram_w)).share("videoram"); - map(0x9400, 0x9400).writeonly().share("io9400"); /* gfx ctrl */ - map(0x9401, 0x9401).writeonly().share("io9401"); /* gfx ctrl */ - /* 9402 - - bits 0 and 1 probably control the lamps under the player 1 and player 2 start buttons - bit 2 - unknown - - bit 3 is probably a flip screen - bit 7 - unknown - set to 1 during the gameplay (coinlock ?) - */ - map(0x9402, 0x9402).nopw(); + map(0x9400, 0x9400).w(FUNC(spaceg_state::shift_w)); + map(0x9401, 0x9401).w(FUNC(spaceg_state::gfxctrl_w)); + map(0x9402, 0x9402).w(FUNC(spaceg_state::output_w)); map(0x9405, 0x9405).w(FUNC(spaceg_state::sound1_w)); map(0x9406, 0x9406).w(FUNC(spaceg_state::sound2_w)); map(0x9407, 0x9407).w(FUNC(spaceg_state::sound3_w)); @@ -454,29 +485,29 @@ static INPUT_PORTS_START( spaceg ) PORT_DIPSETTING( 0x20, "30000" ) PORT_DIPSETTING( 0x10, "40000" ) PORT_DIPSETTING( 0x30, "50000" ) - // SW7,8: Unlisted in manual, set bit 2 of 0x9402 depending on score - previously 2nd bonus life? + // SW7,8: Unlisted in manual, set bit 2 of 0x9402 depending on score PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW:7,8") PORT_DIPSETTING( 0x00, "10000" ) - PORT_DIPSETTING( 0x80, "30000" ) - PORT_DIPSETTING( 0x40, "40000" ) + PORT_DIPSETTING( 0x40, "30000" ) + PORT_DIPSETTING( 0x80, "40000" ) PORT_DIPSETTING( 0xc0, "50000" ) PORT_START("9801") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_START("9802") - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 ) PORT_START("9805") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(1) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(1) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_START("9806") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL INPUT_PORTS_END @@ -488,14 +519,14 @@ INPUT_PORTS_END void spaceg_state::spaceg(machine_config &config) { - /* basic machine hardware */ - Z80(config, m_maincpu, 2500000); /* 2.5 MHz */ + // basic machine hardware + Z80(config, m_maincpu, 20_MHz_XTAL / 8); // 2.5 MHz m_maincpu->set_addrmap(AS_PROGRAM, &spaceg_state::spaceg_map); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ + screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate screen.set_size(256, 256); screen.set_visarea(0, 255, 32, 255); screen.set_screen_update(FUNC(spaceg_state::screen_update)); @@ -504,7 +535,7 @@ void spaceg_state::spaceg(machine_config &config) PALETTE(config, m_palette, palette_device::BLACK, 0x40); - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); // HACK: SN76477 parameters copied from space invaders From 896d43ebc8aa19f28ba4495191804b931e1396c9 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Tue, 10 Mar 2026 10:45:55 +0200 Subject: [PATCH 219/351] luxor/abc1600: Refactor the MAC into a 68008 MMU. --- src/devices/cpu/m68000/m68008.cpp | 34 +- src/devices/cpu/m68000/m68008.h | 21 +- src/mame/luxor/abc1600.cpp | 94 ++-- src/mame/luxor/abc1600_mmu.cpp | 590 +++++++++++++++++++++++++ src/mame/luxor/abc1600_mmu.h | 149 +++++++ src/mame/luxor/abc1600mac.cpp | 708 ------------------------------ src/mame/luxor/abc1600mac.h | 143 ------ 7 files changed, 825 insertions(+), 914 deletions(-) create mode 100644 src/mame/luxor/abc1600_mmu.cpp create mode 100644 src/mame/luxor/abc1600_mmu.h delete mode 100644 src/mame/luxor/abc1600mac.cpp delete mode 100644 src/mame/luxor/abc1600mac.h diff --git a/src/devices/cpu/m68000/m68008.cpp b/src/devices/cpu/m68000/m68008.cpp index 7f71b048d47..f8aac91ddb2 100644 --- a/src/devices/cpu/m68000/m68008.cpp +++ b/src/devices/cpu/m68000/m68008.cpp @@ -41,15 +41,31 @@ m68008_device::m68008_device(const machine_config &mconfig, device_type type, co m_disable_specifics = true; } +void m68008_device::enable_mmu8(bool disable_spaces) +{ + m_mmu8 = &m_mmu8_disabled; + m_disable_spaces = disable_spaces; +} + +void m68008_device::set_current_mmu8(mmu8 *mmu) +{ + m_mmu8 = mmu; + + if(m_mmu8) + m_mmu8->set_super(m_sr & SR_S); +} + void m68008_device::device_start() { m68000_device::device_start(); - m_s_program->specific(m_r_program8); - m_s_opcodes->specific(m_r_opcodes8); - m_s_uprogram->specific(m_r_uprogram8); - m_s_uopcodes->specific(m_r_uopcodes8); - m_s_cpu_space->specific(m_cpu_space8); + if(!m_disable_spaces) { + m_s_program->specific(m_r_program8); + m_s_opcodes->specific(m_r_opcodes8); + m_s_uprogram->specific(m_r_uprogram8); + m_s_uopcodes->specific(m_r_uopcodes8); + m_s_cpu_space->specific(m_cpu_space8); + } // Theoretically UB, in practice works, the alternative (putting // everything in m68000_device) is annoying @@ -80,6 +96,14 @@ void m68008_device::update_user_super() } } +bool m68008_device::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) +{ + if(m_mmu8) + return m_mmu8->translate(spacenum, intention, address, target_space); + else + return device_memory_interface::memory_translate(spacenum, intention, address, target_space); +} + m68008fn_device::m68008fn_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : m68008_device(mconfig, M68008FN, tag, owner, clock) diff --git a/src/devices/cpu/m68000/m68008.h b/src/devices/cpu/m68000/m68008.h index 84c3cd91071..27d14bb9fd3 100644 --- a/src/devices/cpu/m68000/m68008.h +++ b/src/devices/cpu/m68000/m68008.h @@ -17,6 +17,8 @@ public: virtual void write_data(offs_t addr, u8 data) = 0; virtual u8 read_cpu(offs_t addr) = 0; virtual void set_super(bool super) = 0; + + virtual bool translate(int spacenum, int intention, offs_t &address, address_space *&target_space) = 0; }; // construction/destruction @@ -24,12 +26,26 @@ public: virtual std::unique_ptr create_disassembler() override; - void set_current_mmu(mmu8 *m); + void enable_mmu8(bool disable_spaces = true); + void set_current_mmu8(mmu8 *m); // device-level overrides virtual void device_start() override ATTR_COLD; + + virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override; protected: + struct mmu8_disabled : public mmu8 { + u8 read_program(offs_t addr) override { return 0; } + void write_program(offs_t addr, u8 data) override { } + u8 read_data(offs_t addr) override { return 0; } + void write_data(offs_t addr, u8 data) override { } + u8 read_cpu(offs_t addr) override { return 0; } + void set_super(bool super) override { } + + bool translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override { return false; } + }; + // Typed constructor m68008_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); @@ -48,7 +64,8 @@ protected: // Dynamic specifics, depending on supervisor state memory_access<24, 0, 0, ENDIANNESS_BIG>::specific m_program8, m_opcodes8; - // MMU, if one present + // MMU, if one present, plus the default one + mmu8_disabled m_mmu8_disabled; mmu8 *m_mmu8; virtual void update_user_super() override; diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index eef48a8273f..074ea4551eb 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -53,7 +53,7 @@ #include "emu.h" #include "abc1600_v.h" -#include "abc1600mac.h" +#include "abc1600_mmu.h" #include "bus/abcbus/abcbus.h" #include "bus/abckb/abckb.h" #include "bus/rs232/rs232.h" @@ -133,7 +133,7 @@ public: abc1600_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, MC68008P8_TAG), - m_mac(*this, ABC1600_MAC_TAG), + m_mac(*this, "mmu"), m_dma0(*this, Z8410AB1_0_TAG), m_dma1(*this, Z8410AB1_1_TAG), m_dma2(*this, Z8410AB1_2_TAG), @@ -158,7 +158,7 @@ public: private: required_device m_maincpu; - required_device m_mac; + required_device m_mac; required_device m_dma0; required_device m_dma1; required_device m_dma2; @@ -212,8 +212,6 @@ private: void nmi_w(int state); - void cpu_space_map(address_map &map) ATTR_COLD; - void update_br(); void update_pren0(int state); void update_pren1(int state); @@ -232,8 +230,8 @@ private: int m_dbrq1 = CLEAR_LINE; int m_dbrq2 = CLEAR_LINE; - void abc1600_mem(address_map &map) ATTR_COLD; void mac_mem(address_map &map) ATTR_COLD; + void cpu_space_map(address_map &map) ATTR_COLD; // peripherals int m_cs7 = 0; // card select address bit 7 @@ -645,20 +643,6 @@ void abc1600_state::sysfs_w(int state) // ADDRESS MAPS //************************************************************************** -//------------------------------------------------- -// ADDRESS_MAP( abc1600_mem ) -//------------------------------------------------- - -void abc1600_state::abc1600_mem(address_map &map) -{ - map(0x00000, 0xfffff).rw(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::read), FUNC(abc1600_mac_device::write)); -} - - -//------------------------------------------------- -// ADDRESS_MAP( mac_mem ) -//------------------------------------------------- - void abc1600_state::mac_mem(address_map &map) { map(0x000000, 0x0fffff).ram(); @@ -680,10 +664,18 @@ void abc1600_state::mac_mem(address_map &map) map(0x1ffa00, 0x1ffaff).m(ABC1600_MOVER_TAG, FUNC(abc1600_mover_device::iowr2_map)); map(0x1ffb00, 0x1ffb00).mirror(0x7e).w(FUNC(abc1600_state::fw0_w)); map(0x1ffb01, 0x1ffb01).mirror(0x7e).w(FUNC(abc1600_state::fw1_w)); - map(0x1ffd00, 0x1ffd07).mirror(0xf8).w(ABC1600_MAC_TAG, FUNC(abc1600_mac_device::dmamap_w)); + map(0x1ffd00, 0x1ffd07).mirror(0xf8).w("mmu", FUNC(abc1600_mmu_device::dmamap_w)); map(0x1ffe00, 0x1ffe00).mirror(0xff).w("spec_contr_reg", FUNC(ls259_device::write_nibble_d3)); } +void abc1600_state::cpu_space_map(address_map &map) +{ + map(0xffff0, 0xfffff).m(m_maincpu, FUNC(m68008_device::autovectors_map)); + map(0xffff5, 0xffff5).lr8(NAME([this]() -> u8 { return m_cio->intack_r(); })); + map(0xffffb, 0xffffb).lr8(NAME([this]() -> u8 { return m_dart->m1_r(); })); + map(0xfffff, 0xfffff).lr8(NAME([this]() -> u8 { m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE); return m68008_device::autovector(7); })); +} + //************************************************************************** @@ -1008,14 +1000,6 @@ void abc1600_state::nmi_w(int state) // MACHINE INITIALIZATION //************************************************************************** -void abc1600_state::cpu_space_map(address_map &map) -{ - map(0xffff0, 0xfffff).m(m_maincpu, FUNC(m68008_device::autovectors_map)); - map(0xffff5, 0xffff5).lr8(NAME([this]() -> u8 { return m_cio->intack_r(); })); - map(0xffffb, 0xffffb).lr8(NAME([this]() -> u8 { return m_dart->m1_r(); })); - map(0xfffff, 0xfffff).lr8(NAME([this]() -> u8 { m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE); return m68008_device::autovector(7); })); -} - void abc1600_state::machine_start() { // state saving @@ -1061,29 +1045,27 @@ void abc1600_state::abc1600(machine_config &config) { // basic machine hardware M68008(config, m_maincpu, 64_MHz_XTAL / 8); - m_maincpu->set_addrmap(AS_PROGRAM, &abc1600_state::abc1600_mem); - m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &abc1600_state::cpu_space_map); - //m_maincpu->out_bg_callback().set(FUNC(abc1600_state::bg_w)); + m_maincpu->enable_mmu8(); + + LUXOR_ABC1600_MMU(config, m_mac); + m_mac->set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); + m_mac->set_addrmap(m68000_base_device::AS_CPU_SPACE, &abc1600_state::cpu_space_map); + m_mac->set_cpu(m_maincpu); + m_mac->in_tren_cb<0>().set(FUNC(abc1600_state::read_tren0)); + m_mac->out_tren_cb<0>().set(FUNC(abc1600_state::write_tren0)); + m_mac->in_tren_cb<1>().set(m_bus1, FUNC(abcbus_slot_device::read_tren)); + m_mac->out_tren_cb<1>().set(m_bus1, FUNC(abcbus_slot_device::write_tren)); + m_mac->in_tren_cb<2>().set(m_bus2, FUNC(abcbus_slot_device::read_tren)); + m_mac->out_tren_cb<2>().set(m_bus2, FUNC(abcbus_slot_device::write_tren)); // video hardware ABC1600_MOVER(config, ABC1600_MOVER_TAG, 0); - // devices - ABC1600_MAC(config, m_mac, 0); - m_mac->set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); - m_mac->set_cpu(m_maincpu); - m_mac->in_tren0_cb().set(FUNC(abc1600_state::read_tren0)); - m_mac->out_tren0_cb().set(FUNC(abc1600_state::write_tren0)); - m_mac->in_tren1_cb().set(m_bus1, FUNC(abcbus_slot_device::read_tren)); - m_mac->out_tren1_cb().set(m_bus1, FUNC(abcbus_slot_device::write_tren)); - m_mac->in_tren2_cb().set(m_bus2, FUNC(abcbus_slot_device::read_tren)); - m_mac->out_tren2_cb().set(m_bus2, FUNC(abcbus_slot_device::write_tren)); - ls259_device &spec_contr_reg(LS259(config, "spec_contr_reg")); spec_contr_reg.q_out_cb<0>().set(FUNC(abc1600_state::cs7_w)); spec_contr_reg.q_out_cb<2>().set(FUNC(abc1600_state::btce_w)); spec_contr_reg.q_out_cb<3>().set(FUNC(abc1600_state::atce_w)); - spec_contr_reg.q_out_cb<4>().set(m_mac, FUNC(abc1600_mac_device::partst_w)); + spec_contr_reg.q_out_cb<4>().set(m_mac, FUNC(abc1600_mmu_device::partst_w)); spec_contr_reg.q_out_cb<5>().set(FUNC(abc1600_state::dmadis_w)); spec_contr_reg.q_out_cb<6>().set(FUNC(abc1600_state::sysscc_w)); spec_contr_reg.q_out_cb<7>().set(FUNC(abc1600_state::sysfs_w)); @@ -1091,28 +1073,28 @@ void abc1600_state::abc1600(machine_config &config) Z80DMA(config, m_dma0, 64_MHz_XTAL / 16); m_dma0->out_busreq_callback().set(FUNC(abc1600_state::dbrq0_w)); m_dma0->out_bao_callback().set(m_dma1, FUNC(z80dma_device::bai_w)); - m_dma0->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_mreq_r)); - m_dma0->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_mreq_w)); + m_dma0->in_mreq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma0_mreq_r)); + m_dma0->out_mreq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma0_mreq_w)); m_dma0->out_ieo_callback().set([this](int state) { m_bus0i->prac_w(state); m_bus0x->prac_w(state); }).exor(1); - m_dma0->in_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_iorq_r)); - m_dma0->out_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma0_iorq_w)); + m_dma0->in_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma0_iorq_r)); + m_dma0->out_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma0_iorq_w)); Z80DMA(config, m_dma1, 64_MHz_XTAL / 16); m_dma1->out_busreq_callback().set(FUNC(abc1600_state::dbrq1_w)); m_dma1->out_bao_callback().set(m_dma2, FUNC(z80dma_device::bai_w)); - m_dma1->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_mreq_r)); - m_dma1->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_mreq_w)); + m_dma1->in_mreq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma1_mreq_r)); + m_dma1->out_mreq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma1_mreq_w)); m_dma1->out_ieo_callback().set(m_bus1, FUNC(abcbus_slot_device::prac_w)).exor(1); - m_dma1->in_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_iorq_r)); - m_dma1->out_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma1_iorq_w)); + m_dma1->in_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma1_iorq_r)); + m_dma1->out_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma1_iorq_w)); Z80DMA(config, m_dma2, 64_MHz_XTAL / 16); m_dma2->out_busreq_callback().set(FUNC(abc1600_state::dbrq2_w)); - m_dma2->in_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_mreq_r)); - m_dma2->out_mreq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_mreq_w)); + m_dma2->in_mreq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma2_mreq_r)); + m_dma2->out_mreq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma2_mreq_w)); m_dma2->out_ieo_callback().set(m_bus2, FUNC(abcbus_slot_device::prac_w)).exor(1); - m_dma2->in_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_iorq_r)); - m_dma2->out_iorq_callback().set(m_mac, FUNC(abc1600_mac_device::dma2_iorq_w)); + m_dma2->in_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma2_iorq_r)); + m_dma2->out_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma2_iorq_w)); Z80DART(config, m_dart, 64_MHz_XTAL / 16); m_dart->out_int_callback().set(FUNC(abc1600_state::dart_irq_w)); diff --git a/src/mame/luxor/abc1600_mmu.cpp b/src/mame/luxor/abc1600_mmu.cpp new file mode 100644 index 00000000000..4cd4f521764 --- /dev/null +++ b/src/mame/luxor/abc1600_mmu.cpp @@ -0,0 +1,590 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Luxor ABC 1600 Memory Access Controller emulation + +**********************************************************************/ + +#include "emu.h" +#include "abc1600_mmu.h" + +#define LOG_MAC (1U << 1) +#define LOG_DMA (1U << 2) +#define LOG_TASKS (1U << 3) +#define LOG_ERRORS (1U << 4) + +#define VERBOSE (LOG_MAC|LOG_TASKS) +#include "logmacro.h" + +#define PAGE_WP BIT(page_data, 14) +#define PAGE_NONX BIT(page_data, 15) + +DEFINE_DEVICE_TYPE(LUXOR_ABC1600_MMU, abc1600_mmu_device, "abc1600mac", "Luxor ABC 1600 MAC") + +void abc1600_mmu_device::device_add_mconfig(machine_config &config) +{ + WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_msec(1600)); // XTAL(64'000'000)/8/10/20000/8/8 +} + +ROM_START( abc1600_mac ) + ROM_REGION( 0x4000, "boot", 0 ) + ROM_LOAD( "boot 6490356-04.1f", 0x0000, 0x4000, CRC(9372f6f2) SHA1(86f0681f7ef8dd190b49eda5e781881582e0c2a4) ) + + ROM_REGION( 0x104, "plds", 0 ) + ROM_LOAD( "1022 6490351-01.17e", 0x000, 0x104, CRC(5dd00d43) SHA1(a3871f0d796bea9df8f25d41b3169dd4b8ef65ab) ) // X36 SEGMENT-PAGE MAP R/W STROBE HANDLER +ROM_END + +const tiny_rom_entry *abc1600_mmu_device::device_rom_region() const +{ + return ROM_NAME( abc1600_mac ); +} + +void abc1600_mmu_device::boot_map(address_map &map) +{ + map(0x00000, 0x03fff).mirror(0x1c000).rom().region("boot", 0); +} + +void abc1600_mmu_device::mac_map(address_map &map) +{ + map(0x80000, 0x80000).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mmu_device::page_hi_r), FUNC(abc1600_mmu_device::page_hi_w)); + map(0x80001, 0x80001).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mmu_device::page_lo_r), FUNC(abc1600_mmu_device::page_lo_w)); + map(0x80002, 0x80002).mirror(0x7fff8).noprw(); + map(0x80003, 0x80003).mirror(0x07ef8).select(0x78100).rw(FUNC(abc1600_mmu_device::segment_r), FUNC(abc1600_mmu_device::segment_w)); + map(0x80004, 0x80004).mirror(0x7fff8).noprw(); + map(0x80005, 0x80005).mirror(0x7fff8).nopr().w(FUNC(abc1600_mmu_device::task_w)); + map(0x80006, 0x80006).mirror(0x7fff8).noprw(); + map(0x80007, 0x80007).mirror(0x7fff8).r(FUNC(abc1600_mmu_device::cause_r)).nopw(); +} + +abc1600_mmu_device::abc1600_mmu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : + device_t(mconfig, LUXOR_ABC1600_MMU, tag, owner, clock), + device_memory_interface(mconfig, *this), + device_state_interface(mconfig, *this), + m_read_tren(*this, 0xff), + m_write_tren(*this), + m_maincpu(*this, finder_base::DUMMY_TAG), + m_boot_config("boot", ENDIANNESS_BIG, 8, 17, 0, address_map_constructor(FUNC(abc1600_mmu_device::boot_map), this)), + m_program_config("program", ENDIANNESS_BIG, 8, 21), + m_cpu_space_config("cpu_space", ENDIANNESS_BIG, 8, 20), + m_s_program_config("mac", ENDIANNESS_BIG, 8, 20, 0, address_map_constructor(FUNC(abc1600_mmu_device::mac_map), this)), + m_watchdog(*this, "watchdog"), + m_segment_ram(*this, "segment_ram", 0x400, ENDIANNESS_LITTLE), + m_page_ram(*this, "page_ram", 0x400*2, ENDIANNESS_LITTLE) +{ +} + +abc1600_mmu_device::mmu::mmu(m68008_device *maincpu, address_space &boot, address_space &program, address_space &cpu_space, address_space &mac_space, u8 *segment_ram, u16 *page_ram) : + m_maincpu(maincpu), + m_segment_ram(segment_ram), + m_page_ram(page_ram), + m_a_boot(boot), + m_a_program(program), + m_a_cpu_space(cpu_space), + m_a_mac_space(mac_space), + m_super(false), + m_boote(0), + m_magic(0), + m_task(0) +{ + boot.specific(m_boot); + program.specific(m_program); + cpu_space.specific(m_cpu_space); + mac_space.specific(m_s_program); + + // HACK fill segment RAM or abcenix won't boot + memset(m_segment_ram, 0xff, 0x400); +} + +void abc1600_mmu_device::device_start() +{ + m_mmu = std::make_unique(m_maincpu.target(), space(AS_BOOT), space(AS_PROGRAM), space(m68000_base_device::AS_CPU_SPACE), space(AS_MAC), m_segment_ram.target(), m_page_ram.target()); + m_maincpu->set_current_mmu8(m_mmu.get()); + + state_add(0, "TASK", m_mmu->m_task).formatstr("%2u"); + state_add(1, "BOOTE", m_mmu->m_boote).formatstr("%1u"); + state_add(2, "MAGIC", m_mmu->m_magic).formatstr("%1u"); + + // state saving + save_item(NAME(m_rstbut)); + save_item(NAME(m_partst)); + save_item(NAME(m_dmamap)); + save_item(NAME(m_mmu->m_super)); + save_item(NAME(m_mmu->m_boote)); + save_item(NAME(m_mmu->m_magic)); + save_item(NAME(m_mmu->m_task)); + save_item(NAME(m_mmu->m_cause)); +} + +void abc1600_mmu_device::device_reset() +{ + m_mmu->reset(); +} + +device_memory_interface::space_config_vector abc1600_mmu_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_BOOT, &m_boot_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(m68000_base_device::AS_CPU_SPACE, &m_cpu_space_config), + std::make_pair(AS_MAC, &m_s_program_config) + }; +} + +void abc1600_mmu_device::mmu::reset() +{ + m_boote = 0; + m_magic = 0; + m_task = 0; +} + +offs_t abc1600_mmu_device::mmu::get_physical_address(offs_t logical, int task, bool &nonx, bool &wp) +{ + // segment + offs_t sega = (task << 5) | ((logical >> 15) & 0x1f); + uint8_t segd = m_segment_ram[sega]; + + // page + offs_t pga = ((segd & 0x3f) << 4) | ((logical >> 11) & 0x0f); + uint16_t page_data = m_page_ram[pga]; + + offs_t physical = ((page_data & 0x3ff) << 11) | (logical & 0x7ff); + + nonx = PAGE_NONX; + wp = PAGE_WP; + + m_cause = ((logical >> 13) & 0x1f) | DMAOK; + + return physical; +} + +bool abc1600_mmu_device::mmu::translate(int spacenum, int intention, offs_t &address, address_space *&target_space) +{ + if (spacenum == m68000_base_device::AS_CPU_SPACE) { + target_space = &m_a_cpu_space; + return true; + } + + if (spacenum != AS_PROGRAM) + return false; + + if (!m_boote && (intention != TR_WRITE) && (address < 0x20000)) { + target_space = &m_a_boot; + return true; + } + + if (m_super && (address & 0x80000)) { + target_space = &m_a_mac_space; + return true; + } + + int task = m_task; + if (m_super || (!m_magic && (intention == TR_FETCH))) + task = 0; + + bool nonx, wp; + address = get_physical_address(address, task, nonx, wp); + + if (nonx || ((intention == TR_WRITE) && !wp)) + return false; + + target_space = &m_a_program; + return true; +} + +u8 abc1600_mmu_device::mmu::mmu_read(offs_t logical, int intention) +{ + if (!m_boote && (logical < 0x20000)) + return m_boot.read_interruptible(logical); + + if (m_super && (logical & 0x80000)) + return m_s_program.read_interruptible(logical); + + int task = m_task; + if (m_super || (!m_magic && (intention == TR_FETCH))) + task = 0; + + bool nonx, wp; + offs_t physical = get_physical_address(logical, task, nonx, wp); + + if (nonx) { + m_maincpu->trigger_bus_error(); + return 0xff; + } + + return m_program.read_interruptible(physical); +} + +void abc1600_mmu_device::mmu::mmu_write(offs_t logical, u8 data) +{ + if (m_super && (logical & 0x80000)) { + m_s_program.write_interruptible(logical, data); + return; + } + + int task = m_task; + if (m_super) + task = 0; + + bool nonx, wp; + offs_t physical = get_physical_address(logical, task, nonx, wp); + + if (nonx || !wp) { + m_maincpu->trigger_bus_error(); + return; + } + + m_program.write_interruptible(physical, data); +} + +u8 abc1600_mmu_device::mmu::read_program(offs_t logical) +{ + return mmu_read(logical, TR_FETCH); +} + +void abc1600_mmu_device::mmu::write_program(offs_t logical, u8 data) +{ + mmu_write(logical, data); +} + +u8 abc1600_mmu_device::mmu::read_data(offs_t logical) +{ + return mmu_read(logical, TR_READ); +} + +void abc1600_mmu_device::mmu::write_data(offs_t logical, u8 data) +{ + mmu_write(logical, data); +} + +u8 abc1600_mmu_device::mmu::read_cpu(offs_t logical) +{ + return m_cpu_space.read_byte(logical); +} + +void abc1600_mmu_device::mmu::set_super(bool super) +{ + m_super = super; +} + +uint8_t abc1600_mmu_device::cause_r() +{ + /* + + bit description + + 0 RSTBUT + 1 1 + 2 DMAOK + 3 X16 + 4 X17 + 5 X18 + 6 X19 + 7 X20 + + */ + + uint8_t data = m_rstbut; + + if (!m_partst) + { + data = 0x02 | m_mmu->m_cause; + } + + if (!machine().side_effects_disabled()) + { + m_watchdog->watchdog_reset(); + } + + return data; +} + +void abc1600_mmu_device::task_w(offs_t offset, uint8_t data) +{ + /* + + bit description + + 0 TASKD0* (inverted SEGA5) + 1 TASKD1* (inverted SEGA6) + 2 TASKD2* (inverted SEGA7) + 3 TASKD3* (inverted SEGA8) + 4 + 5 + 6 BOOTE* + 7 MAGIC* + + */ + + m_mmu->m_task = data & 0x0f; + m_mmu->m_boote = !BIT(data, 6); + m_mmu->m_magic = !BIT(data, 7); + + LOGMASKED(LOG_TASKS, "%s TASK W %02x (TASK %u BOOTE %u MAGIC %u)\n", machine().describe_context(), data, m_mmu->m_task, m_mmu->m_boote, m_mmu->m_magic); +} + +uint8_t abc1600_mmu_device::segment_r(offs_t offset) +{ + /* + + bit description + + 0 SEGD0 + 1 SEGD1 + 2 SEGD2 + 3 SEGD3 + 4 SEGD4 + 5 SEGD5 + 6 SEGD6 + 7 READ_MAGIC + + */ + + offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + uint8_t segd = m_segment_ram[sega]; + + return (!m_mmu->m_magic << 7) | (segd & 0x7f); +} + +void abc1600_mmu_device::segment_w(offs_t offset, uint8_t data) +{ + /* + + bit description + + 0 SEGD0 + 1 SEGD1 + 2 SEGD2 + 3 SEGD3 + 4 SEGD4 + 5 SEGD5 + 6 SEGD6 + 7 0 + + */ + + offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + m_segment_ram[sega] = data & 0x7f; + + LOGMASKED(LOG_MAC, "%s SEG W %05x:%02x SEGA %03x SEGD %02x TASK %u\n", machine().describe_context(), offset, data, sega, m_segment_ram[sega], m_mmu->m_task); +} + +uint8_t abc1600_mmu_device::page_lo_r(offs_t offset) +{ + /* + + bit description + + 0 X11 + 1 X12 + 2 X13 + 3 X14 + 4 X15 + 5 X16 + 6 X17 + 7 X18 + + */ + + // segment + offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + uint8_t segd = m_segment_ram[sega]; + + // page + offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); + uint16_t pgd = m_page_ram[pga]; + + return pgd & 0xff; +} + +uint8_t abc1600_mmu_device::page_hi_r(offs_t offset) +{ + /* + + bit description + + 0 X19 + 1 X20 + 2 X20 + 3 X20 + 4 X20 + 5 X20 + 6 _WP + 7 NONX + + */ + + // segment + offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + uint8_t segd = m_segment_ram[sega]; + + // page + offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); + uint16_t pgd = m_page_ram[pga]; + + int x20 = BIT(pgd, 9); + + return (pgd >> 8) | (x20 << 2) | (x20 << 3) | (x20 << 4) | (x20 << 5); +} + +void abc1600_mmu_device::page_lo_w(offs_t offset, uint8_t data) +{ + /* + + bit description + + 0 X11 + 1 X12 + 2 X13 + 3 X14 + 4 X15 + 5 X16 + 6 X17 + 7 X18 + + */ + + // segment + offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + uint8_t segd = m_segment_ram[sega]; + + // page + offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); + m_page_ram[pga] = (m_page_ram[pga] & 0xff00) | data; + + LOGMASKED(LOG_MAC, "%s PAGE W %05x:%02x (SEGA %03x SEGD %02x PGA %03x PGD %04x TASK %u)\n", machine().describe_context(), offset, data, sega, segd, pga, m_page_ram[pga], m_mmu->m_task); +} + +void abc1600_mmu_device::page_hi_w(offs_t offset, uint8_t data) +{ + /* + + bit description + + 0 X19 + 1 X20 + 2 + 3 + 4 + 5 + 6 _WP + 7 NONX + + */ + + // segment + offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + uint8_t segd = m_segment_ram[sega]; + + // page + offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); + m_page_ram[pga] = ((data & 0xc3) << 8) | (m_page_ram[pga] & 0xff); +} + +offs_t abc1600_mmu_device::get_dma_address(int index, offs_t logical, bool &rw) +{ + /* + BA2 BA1 A15 + DMA0 1 1 x + DMA1 1 0 x + DMA2 0 0 x + */ + + uint8_t dmamap_addr = index | BIT(logical, 15); + uint8_t dmamap = m_dmamap[dmamap_addr]; + + m_mmu->m_cause = (dmamap & 0x1f) << 3; + + rw = BIT(dmamap, 7); + + return ((dmamap & 0x1f) << 16) | logical; +} + +uint8_t abc1600_mmu_device::dma_mreq_r(int index, int dmamap, offs_t logical) +{ + bool rw; + offs_t physical = get_dma_address(dmamap, logical, rw); + + uint8_t data = 0xff; + + if (rw) + { + data = space(AS_PROGRAM).read_byte(physical); + + m_write_tren[index](data); + } + else + { + data = m_read_tren[index](data); + + space(AS_PROGRAM).write_byte(physical, data); + } + + LOGMASKED(LOG_DMA, "%s DMRQ R:%c %04x:%06x=%02x\n", machine().describe_context(), rw ? 'R' : 'W', logical, physical, data); + + return data; +} + +void abc1600_mmu_device::dma_mreq_w(int index, int dmamap, offs_t logical, uint8_t data) +{ + bool rw; + offs_t physical = get_dma_address(dmamap, logical, rw); + + LOGMASKED(LOG_DMA, "%s DMRQ W:%c %04x:%06x=%02x\n", machine().describe_context(), rw ? 'R' : 'W', logical, physical, data); + + if (!rw) + { + space().write_byte(physical, data); + } +} + +uint8_t abc1600_mmu_device::dma_iorq_r(int dmamap, offs_t logical) +{ + uint8_t data = 0xff; + bool rw; + offs_t physical = 0x1fe000 | (get_dma_address(dmamap, logical, rw) & 0x1fff); + + LOGMASKED(LOG_DMA, "%s DIORQ R %04x:%06x\n", machine().describe_context(), logical, physical); + + if ((logical & 0x1800) == 0x1000) + { + data = space(AS_PROGRAM).read_byte(physical); + } + + return data; +} + +void abc1600_mmu_device::dma_iorq_w(int dmamap, offs_t logical, uint8_t data) +{ + bool rw; + offs_t physical = 0x1fe000 | (get_dma_address(dmamap, logical, rw) & 0x1fff); + + LOGMASKED(LOG_DMA, "%s DIORQ W %04x:%06x=%02x\n", machine().describe_context(), logical, physical, data); + + if ((logical & 0x1800) == 0x1000) + { + space(AS_PROGRAM).write_byte(physical, data); + } +} + +void abc1600_mmu_device::dmamap_w(offs_t offset, uint8_t data) +{ + /* + + bit description + + 0 X16 + 1 X17 + 2 X18 + 3 X19 + 4 X20 + 5 + 6 + 7 _R/W + + */ + + LOGMASKED(LOG_DMA, "%s DMAMAP %u:%02x\n", machine().describe_context(), offset & 7, data); + + m_dmamap[offset & 7] = data; +} diff --git a/src/mame/luxor/abc1600_mmu.h b/src/mame/luxor/abc1600_mmu.h new file mode 100644 index 00000000000..4d1bd1e2c68 --- /dev/null +++ b/src/mame/luxor/abc1600_mmu.h @@ -0,0 +1,149 @@ +// license:BSD-3-Clause +// copyright-holders:Curt Coder +/********************************************************************** + + Luxor ABC 1600 Memory Access Controller emulation + +**********************************************************************/ + +#ifndef MAME_LUXOR_ABC1600_MMU_H +#define MAME_LUXOR_ABC1600_MMU_H + +#pragma once + +#include "cpu/m68000/m68008.h" +#include "machine/watchdog.h" + +class abc1600_mmu_device : public device_t, public device_memory_interface, public device_state_interface +{ +public: + abc1600_mmu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0); + + template void set_cpu(T &&tag) { m_maincpu.set_tag(std::forward(tag)); } + template auto in_tren_cb() { return m_read_tren[N].bind(); } + template auto out_tren_cb() { return m_write_tren[N].bind(); } + + void partst_w(int state) { m_partst = state; } + void rstbut_w(int state) { m_rstbut = state; } + + void dmamap_w(offs_t offset, uint8_t data); + + uint8_t dma0_mreq_r(offs_t offset) { return dma_mreq_r(0, DMAMAP_R0_LO, offset); } + void dma0_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(0, DMAMAP_R0_LO, offset, data); } + uint8_t dma0_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R0_LO, offset); } + void dma0_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R0_LO, offset, data); } + + uint8_t dma1_mreq_r(offs_t offset) { return dma_mreq_r(1, DMAMAP_R1_LO, offset); } + void dma1_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(1, DMAMAP_R1_LO, offset, data); } + uint8_t dma1_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R1_LO, offset); } + void dma1_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R1_LO, offset, data); } + + uint8_t dma2_mreq_r(offs_t offset) { return dma_mreq_r(2, DMAMAP_R2_LO, offset); } + void dma2_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(2, DMAMAP_R2_LO, offset, data); } + uint8_t dma2_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R2_LO, offset); } + void dma2_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R2_LO, offset, data); } + +protected: + // device_t implementation + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + // device_memory_interface implementation + space_config_vector memory_space_config() const override ATTR_COLD; + + // optional information overrides + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + +private: + static constexpr int DMAOK = 0x04; + + enum { + AS_BOOT = 7, + AS_MAC = 8 + }; + + enum { + DMAMAP_R2_LO = 0, + DMAMAP_R2_HI, + DMAMAP_R1_LO = 4, + DMAMAP_R1_HI, + DMAMAP_R0_LO, + DMAMAP_R0_HI + }; + + class mmu : public m68008_device::mmu8 + { + friend class abc1600_mmu_device; + + public: + mmu(m68008_device *maincpu, address_space &boot, address_space &program, address_space &cpu_space, address_space &mac_space, u8 *segment_ram, u16 *page_ram); + virtual ~mmu() = default; + + virtual u8 read_program(offs_t addr) override; + virtual void write_program(offs_t addr, u8 data) override; + virtual u8 read_data(offs_t addr) override; + virtual void write_data(offs_t addr, u8 data) override; + virtual u8 read_cpu(offs_t addr) override; + virtual void set_super(bool super) override; + virtual bool translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override; + + private: + m68008_device *m_maincpu; + u8 *m_segment_ram; + u16 *m_page_ram; + address_space &m_a_boot, &m_a_program, &m_a_cpu_space, &m_a_mac_space; + memory_access<17, 0, 0, ENDIANNESS_BIG>::specific m_boot; + memory_access<21, 0, 0, ENDIANNESS_BIG>::specific m_program; + memory_access<20, 0, 0, ENDIANNESS_BIG>::specific m_cpu_space; + memory_access<20, 0, 0, ENDIANNESS_BIG>::specific m_s_program; + + void reset(); + offs_t get_physical_address(offs_t logical, int task, bool &nonx, bool &wp); + u8 mmu_read(offs_t logical, int intention); + void mmu_write(offs_t logical, u8 data); + + bool m_super = false; + bool m_boote = 0; + bool m_magic = 0; + int m_task = 0; + u8 m_cause = 0; + }; + + devcb_read8::array<3> m_read_tren; + devcb_write8::array<3> m_write_tren; + + required_device m_maincpu; + std::unique_ptr m_mmu; + address_space_config m_boot_config, m_program_config, m_cpu_space_config, m_s_program_config; + required_device m_watchdog; + memory_share_creator m_segment_ram; + memory_share_creator m_page_ram; + + void boot_map(address_map &map) ATTR_COLD; + void mac_map(address_map &map) ATTR_COLD; + + uint8_t cause_r(); + void task_w(offs_t offset, uint8_t data); + uint8_t segment_r(offs_t offset); + void segment_w(offs_t offset, uint8_t data); + uint8_t page_lo_r(offs_t offset); + void page_lo_w(offs_t offset, uint8_t data); + uint8_t page_hi_r(offs_t offset); + void page_hi_w(offs_t offset, uint8_t data); + + offs_t get_dma_address(int index, offs_t logical, bool &rw); + uint8_t dma_mreq_r(int index, int dmamap, offs_t offset); + void dma_mreq_w(int index, int dmamap, offs_t offset, uint8_t data); + uint8_t dma_iorq_r(int dmamap, offs_t offset); + void dma_iorq_w(int dmamap, offs_t offset, uint8_t data); + + bool m_rstbut = 0; + bool m_partst = 0; + + u8 m_dmamap[8]; +}; + +DECLARE_DEVICE_TYPE(LUXOR_ABC1600_MMU, abc1600_mmu_device) + +#endif // MAME_LUXOR_ABC1600_MMU_H diff --git a/src/mame/luxor/abc1600mac.cpp b/src/mame/luxor/abc1600mac.cpp deleted file mode 100644 index 4f519bf6953..00000000000 --- a/src/mame/luxor/abc1600mac.cpp +++ /dev/null @@ -1,708 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Curt Coder -/********************************************************************** - - Luxor ABC 1600 Memory Access Controller emulation - -**********************************************************************/ - -/* -[:mac] ':3f' (005BA) TASK W 03 (TASK 3 BOOTE 1 MAGIC 1) -[:mac] ':3f' (08058) BUS ERROR R fefe4:0007e4 (NONX 1 WP 0 TASK 3 FC 1 MAGIC 1) - -[:mac] TASK 3 SEGMENT 31 PAGE 13 MEM fe800-fefff 000000-0007ff X W[:mac] 000000-0007ff X W -[:mac] TASK 3 SEGMENT 31 PAGE 15 MEM ff800-fffff 07d800-07dfff [:mac] 07d800-07dfff -*/ - -#include "emu.h" -#include "abc1600mac.h" - -#define LOG_MAC (1U << 1) -#define LOG_DMA (1U << 2) -#define LOG_TASKS (1U << 3) -#define LOG_ERRORS (1U << 4) - -#define VERBOSE (LOG_ERRORS | LOG_TASKS) -#include "logmacro.h" - -//************************************************************************** -// MACROS / CONSTANTS -//************************************************************************** - -#define A8 BIT(offset, 8) - -#define FC2 BIT(fc, 2) - -#define PAGE_WP BIT(page_data, 14) -#define PAGE_NONX BIT(page_data, 15) - -#define DMAOK 0x04 - - - -//************************************************************************** -// DEVICE DEFINITIONS -//************************************************************************** - -DEFINE_DEVICE_TYPE(ABC1600_MAC, abc1600_mac_device, "abc1600mac", "ABC 1600 MAC") - - -void abc1600_mac_device::mac_map(address_map &map) -{ - map(0x80000, 0x80000).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mac_device::page_hi_r), FUNC(abc1600_mac_device::page_hi_w)); - map(0x80001, 0x80001).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mac_device::page_lo_r), FUNC(abc1600_mac_device::page_lo_w)); - map(0x80002, 0x80002).mirror(0x7fff8).noprw(); - map(0x80003, 0x80003).mirror(0x07ef8).select(0x78100).rw(FUNC(abc1600_mac_device::segment_r), FUNC(abc1600_mac_device::segment_w)); - map(0x80004, 0x80004).mirror(0x7fff8).noprw(); - map(0x80005, 0x80005).mirror(0x7fff8).nopr().w(FUNC(abc1600_mac_device::task_w)); - map(0x80006, 0x80006).mirror(0x7fff8).noprw(); - map(0x80007, 0x80007).mirror(0x7fff8).r(FUNC(abc1600_mac_device::cause_r)).nopw(); -} - - -void abc1600_mac_device::device_add_mconfig(machine_config &config) -{ - WATCHDOG_TIMER(config, m_watchdog).set_time(attotime::from_msec(1600)); // XTAL(64'000'000)/8/10/20000/8/8 -} - - -//------------------------------------------------- -// ROM( abc1600_mac ) -//------------------------------------------------- - -ROM_START( abc1600_mac ) - ROM_REGION( 0x4000, "boot", 0 ) - ROM_LOAD( "boot 6490356-04.1f", 0x0000, 0x4000, CRC(9372f6f2) SHA1(86f0681f7ef8dd190b49eda5e781881582e0c2a4) ) - - ROM_REGION( 0x104, "plds", 0 ) - ROM_LOAD( "1022 6490351-01.17e", 0x000, 0x104, CRC(5dd00d43) SHA1(a3871f0d796bea9df8f25d41b3169dd4b8ef65ab) ) // X36 SEGMENT-PAGE MAP R/W STROBE HANDLER -ROM_END - - -//------------------------------------------------- -// rom_region - device-specific ROM region -//------------------------------------------------- - -const tiny_rom_entry *abc1600_mac_device::device_rom_region() const -{ - return ROM_NAME( abc1600_mac ); -} - - - -//************************************************************************** -// LIVE DEVICE -//************************************************************************** - -//------------------------------------------------- -// abc1600_mac_device - constructor -//------------------------------------------------- - -abc1600_mac_device::abc1600_mac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, ABC1600_MAC, tag, owner, clock), - device_memory_interface(mconfig, *this), - m_program_config("program", ENDIANNESS_BIG, 8, 21, 0), - m_mac_config("mac", ENDIANNESS_BIG, 8, 20, 0, address_map_constructor(FUNC(abc1600_mac_device::mac_map), this)), - m_rom(*this, "boot"), - m_cpu(*this, finder_base::DUMMY_TAG), - m_segment_ram(*this, "segment_ram", 0x400, ENDIANNESS_LITTLE), - m_page_ram(*this, "page_ram", 0x400*2, ENDIANNESS_LITTLE), - m_watchdog(*this, "watchdog"), - m_read_tren(*this, 0xff), - m_write_tren(*this), - m_rstbut(0), - m_boote(0), - m_magic(0), - m_task(0), - m_cause(0), - m_partst(0) -{ -} - - -//------------------------------------------------- -// device_start - device-specific startup -//------------------------------------------------- - -void abc1600_mac_device::device_start() -{ - // state saving - save_item(NAME(m_rstbut)); - save_item(NAME(m_boote)); - save_item(NAME(m_magic)); - save_item(NAME(m_task)); - save_item(NAME(m_dmamap)); - save_item(NAME(m_cause)); - save_item(NAME(m_partst)); - - // HACK fill segment RAM or abcenix won't boot - memset(m_segment_ram, 0xff, 0x200); - memset(m_page_ram, 0xff, 0x800); -} - - -//------------------------------------------------- -// device_reset - device-specific reset -//------------------------------------------------- - -void abc1600_mac_device::device_reset() -{ - // clear task register - m_boote = 0; - m_magic = 0; - m_task = 0; -} - - -//------------------------------------------------- -// memory_space_config - return a description of -// any address spaces owned by this device -//------------------------------------------------- - -device_memory_interface::space_config_vector abc1600_mac_device::memory_space_config() const -{ - return space_config_vector { - std::make_pair(AS_PROGRAM, &m_program_config), - std::make_pair(AS_MAC, &m_mac_config) - }; -} - - -//------------------------------------------------- -// get_physical_offset - -//------------------------------------------------- - -inline offs_t abc1600_mac_device::get_physical_offset(offs_t offset, int task, bool &nonx, bool &wp) -{ - // segment - offs_t sega = (task << 5) | ((offset >> 15) & 0x1f); - uint8_t segd = m_segment_ram[sega]; - - // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0x0f); - uint16_t page_data = m_page_ram[pga]; - - offs_t virtual_offset = ((page_data & 0x3ff) << 11) | (offset & 0x7ff); - - nonx = PAGE_NONX; - wp = PAGE_WP; - - if (!machine().side_effects_disabled()) - { - m_cause = ((offset >> 13) & 0x1f) | DMAOK; - } - - if (offset != virtual_offset) LOG("%s MAC %05x:%06x (SEGA %03x SEGD %02x PGA %03x PGD %04x NONX %u WP %u TASK %u FC %u MAGIC %u)\n", - machine().describe_context(), offset, virtual_offset, sega, segd, pga, page_data, nonx, wp, task, m_cpu->get_fc(), m_magic); - - return virtual_offset; -} - - -//------------------------------------------------- -// read - -//------------------------------------------------- - -uint8_t abc1600_mac_device::read(offs_t offset) -{ - if (!m_boote && (offset < 0x20000)) - { - return m_rom->base()[offset & 0x3fff]; - } - - uint8_t fc = m_cpu->get_fc(); - int task = m_task; - - if (FC2) - { - if (offset & 0x80000) - { - if (offset != 0x80007) - LOGMASKED(LOG_MAC, "%s MAC R %05x\n",machine().describe_context(), offset); - - return space(AS_MAC).read_byte(offset); - } - else - { - task = 0; - } - } - - if (!m_magic && (fc == 2)) - { - task = 0; - } - - bool nonx, wp; - offs_t virtual_offset = get_physical_offset(offset, task, nonx, wp); - - if (!machine().side_effects_disabled() && nonx) - m_cpu->trigger_bus_error(); - - return space().read_byte(virtual_offset); -} - - -//------------------------------------------------- -// write - -//------------------------------------------------- - -void abc1600_mac_device::write(offs_t offset, uint8_t data) -{ - uint8_t fc = m_cpu->get_fc(); - int task = m_task; - - if (FC2) - { - if (offset & 0x80000) - { - LOGMASKED(LOG_MAC, "%s MAC W %05x:%02x\n", machine().describe_context(), offset, data); - - space(AS_MAC).write_byte(offset, data); - return; - } - else - { - task = 0; - } - } - - bool nonx, wp; - offs_t virtual_offset = get_physical_offset(offset, task, nonx, wp); - - if (!machine().side_effects_disabled() && (nonx || !wp)) - m_cpu->trigger_bus_error(); - - space().write_byte(virtual_offset, data); -} - - -//------------------------------------------------- -// cause_r - -//------------------------------------------------- - -uint8_t abc1600_mac_device::cause_r() -{ - /* - - bit description - - 0 RSTBUT - 1 1 - 2 DMAOK - 3 X16 - 4 X17 - 5 X18 - 6 X19 - 7 X20 - - */ - - uint8_t data = m_rstbut; - - if (!m_partst) - { - data = 0x02 | m_cause; - } - - if (!machine().side_effects_disabled()) - { - m_watchdog->watchdog_reset(); - } - - return data; -} - - -//------------------------------------------------- -// task_w - -//------------------------------------------------- - -void abc1600_mac_device::task_w(offs_t offset, uint8_t data) -{ - /* - - bit description - - 0 TASKD0* (inverted SEGA5) - 1 TASKD1* (inverted SEGA6) - 2 TASKD2* (inverted SEGA7) - 3 TASKD3* (inverted SEGA8) - 4 - 5 - 6 BOOTE* - 7 MAGIC* - - */ - - m_task = data & 0x0f; - m_boote = !BIT(data, 6); - m_magic = !BIT(data, 7); - - LOGMASKED(LOG_MAC, "%s TASK W %02x (TASK %u BOOTE %u MAGIC %u)\n", machine().describe_context(), data, m_task, m_boote, m_magic); -} - - -//------------------------------------------------- -// segment_r - -//------------------------------------------------- - -uint8_t abc1600_mac_device::segment_r(offs_t offset) -{ - /* - - bit description - - 0 SEGD0 - 1 SEGD1 - 2 SEGD2 - 3 SEGD3 - 4 SEGD4 - 5 SEGD5 - 6 SEGD6 - 7 READ_MAGIC - - */ - - offs_t sega = (m_task << 5) | A8 << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; - - return (!m_magic << 7) | (segd & 0x7f); -} - - -//------------------------------------------------- -// segment_w - -//------------------------------------------------- - -void abc1600_mac_device::segment_w(offs_t offset, uint8_t data) -{ - /* - - bit description - - 0 SEGD0 - 1 SEGD1 - 2 SEGD2 - 3 SEGD3 - 4 SEGD4 - 5 SEGD5 - 6 SEGD6 - 7 0 - - */ - - offs_t sega = (m_task << 5) | A8 << 4 | ((offset >> 15) & 0xf); - m_segment_ram[sega] = data & 0x7f; - - LOGMASKED(LOG_MAC, "%s SEG W %05x:%02x SEGA %03x SEGD %02x TASK %u\n", machine().describe_context(), offset, data, sega, m_segment_ram[sega], m_task); -} - - -//------------------------------------------------- -// page_lo_r - -//------------------------------------------------- - -uint8_t abc1600_mac_device::page_lo_r(offs_t offset) -{ - /* - - bit description - - 0 X11 - 1 X12 - 2 X13 - 3 X14 - 4 X15 - 5 X16 - 6 X17 - 7 X18 - - */ - - // segment - offs_t sega = (m_task << 5) | A8 << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; - - // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - uint16_t pgd = m_page_ram[pga]; - - return pgd & 0xff; -} - - -//------------------------------------------------- -// page_hi_r - -//------------------------------------------------- - -uint8_t abc1600_mac_device::page_hi_r(offs_t offset) -{ - /* - - bit description - - 0 X19 - 1 X20 - 2 X20 - 3 X20 - 4 X20 - 5 X20 - 6 _WP - 7 NONX - - */ - - // segment - offs_t sega = (m_task << 5) | A8 << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; - - // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - uint16_t pgd = m_page_ram[pga]; - - int x20 = BIT(pgd, 9); - - return (pgd >> 8) | (x20 << 2) | (x20 << 3) | (x20 << 4) | (x20 << 5); -} - - -//------------------------------------------------- -// page_lo_w - -//------------------------------------------------- - -void abc1600_mac_device::page_lo_w(offs_t offset, uint8_t data) -{ - /* - - bit description - - 0 X11 - 1 X12 - 2 X13 - 3 X14 - 4 X15 - 5 X16 - 6 X17 - 7 X18 - - */ - - // segment - offs_t sega = (m_task << 5) | A8 << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; - - // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - m_page_ram[pga] = (m_page_ram[pga] & 0xff00) | data; - - LOGMASKED(LOG_MAC, "%s PAGE W %05x:%02x (SEGA %03x SEGD %02x PGA %03x PGD %04x TASK %u)\n", machine().describe_context(), offset, data, sega, segd, pga, m_page_ram[pga], m_task); -} - - -//------------------------------------------------- -// page_hi_w - -//------------------------------------------------- - -void abc1600_mac_device::page_hi_w(offs_t offset, uint8_t data) -{ - /* - - bit description - - 0 X19 - 1 X20 - 2 - 3 - 4 - 5 - 6 _WP - 7 NONX - - */ - - // segment - offs_t sega = (m_task << 5) | A8 << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; - - // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - m_page_ram[pga] = ((data & 0xc3) << 8) | (m_page_ram[pga] & 0xff); -} - - -//------------------------------------------------- -// get_dma_address - -//------------------------------------------------- - -offs_t abc1600_mac_device::get_dma_address(int index, offs_t offset, bool &rw) -{ - /* - BA2 BA1 A15 - DMA0 1 1 x - DMA1 1 0 x - DMA2 0 0 x - */ - - uint8_t dmamap_addr = index | BIT(offset, 15); - uint8_t dmamap = m_dmamap[dmamap_addr]; - - m_cause = (dmamap & 0x1f) << 3; - - rw = BIT(dmamap, 7); - - return ((dmamap & 0x1f) << 16) | offset; -} - - -//------------------------------------------------- -// dma_mreq_r - DMA memory read -//------------------------------------------------- - -uint8_t abc1600_mac_device::dma_mreq_r(int index, int dmamap, offs_t offset) -{ - bool rw; - offs_t virtual_offset = get_dma_address(dmamap, offset, rw); - - uint8_t data = 0xff; - - if (rw) - { - data = space().read_byte(virtual_offset); - - m_write_tren[index](data); - } - else - { - data = m_read_tren[index](data); - - space().write_byte(virtual_offset, data); - } - - LOGMASKED(LOG_DMA, "%s DMRQ R:%c %04x:%06x=%02x\n", machine().describe_context(), rw ? 'R' : 'W', offset, virtual_offset, data); - - return data; -} - - -//------------------------------------------------- -// dma_mreq_w - DMA memory write -//------------------------------------------------- - -void abc1600_mac_device::dma_mreq_w(int index, int dmamap, offs_t offset, uint8_t data) -{ - bool rw; - offs_t virtual_offset = get_dma_address(dmamap, offset, rw); - - LOGMASKED(LOG_DMA, "%s DMRQ W:%c %04x:%06x=%02x\n", machine().describe_context(), rw ? 'R' : 'W', offset, virtual_offset, data); - - if (!rw) - { - space().write_byte(virtual_offset, data); - } -} - - -//------------------------------------------------- -// dma_iorq_r - DMA I/O read -//------------------------------------------------- - -uint8_t abc1600_mac_device::dma_iorq_r(int dmamap, offs_t offset) -{ - uint8_t data = 0xff; - bool rw; - offs_t virtual_offset = 0x1fe000 | (get_dma_address(dmamap, offset, rw) & 0x1fff); - - LOGMASKED(LOG_DMA, "%s DIORQ R %04x:%06x\n", machine().describe_context(), offset, virtual_offset); - - if ((offset & 0x1800) == 0x1000) - { - data = space().read_byte(virtual_offset); - } - - return data; -} - - -//------------------------------------------------- -// dma_iorq_w - DMA I/O write -//------------------------------------------------- - -void abc1600_mac_device::dma_iorq_w(int dmamap, offs_t offset, uint8_t data) -{ - bool rw; - offs_t virtual_offset = 0x1fe000 | (get_dma_address(dmamap, offset, rw) & 0x1fff); - - LOGMASKED(LOG_DMA, "%s DIORQ W %04x:%06x=%02x\n", machine().describe_context(), offset, virtual_offset, data); - - if ((offset & 0x1800) == 0x1000) - { - space().write_byte(virtual_offset, data); - } -} - - -//------------------------------------------------- -// dmamap_w - DMA map write -//------------------------------------------------- - -void abc1600_mac_device::dmamap_w(offs_t offset, uint8_t data) -{ - /* - - bit description - - 0 X16 - 1 X17 - 2 X18 - 3 X19 - 4 X20 - 5 - 6 - 7 _R/W - - */ - - LOGMASKED(LOG_DMA, "%s DMAMAP %u:%02x\n", machine().describe_context(), offset & 7, data); - - m_dmamap[offset & 7] = data; -} - - -//------------------------------------------------- -// partst_w - parity test -//------------------------------------------------- - -void abc1600_mac_device::partst_w(int state) -{ - m_partst = state; -} - - -//------------------------------------------------- -// dump - dump MAC mappings -//------------------------------------------------- - -void abc1600_mac_device::dump() -{ - for (int task = 0; task < 16; task++) { - for (int seg = 0; seg < 32; seg++) { - for (int page = 0; page < 16; page++) { - offs_t logical = (seg * 0x8000) | (page * 0x800); - - offs_t sega = (task << 5) | seg; - uint8_t segd = m_segment_ram[sega]; - - offs_t pga = ((segd & 0x3f) << 4) | page; - uint16_t page_data = m_page_ram[pga]; - - offs_t physical = (page_data & 0x3ff) << 11; - bool nonx = PAGE_NONX; - bool wp = PAGE_WP; - - LOGMASKED(LOG_TASKS, "TASK %.2u SEGMENT %.2u PAGE %.2u MEM %05x-%05x %06x-%06x %c %c\n", - task, seg, page, logical, logical + 0x7ff, physical, physical + 0x7ff, nonx ? 'X' : ' ', wp ? ' ' : 'W'); - } - } - } -} diff --git a/src/mame/luxor/abc1600mac.h b/src/mame/luxor/abc1600mac.h deleted file mode 100644 index 28e58acd930..00000000000 --- a/src/mame/luxor/abc1600mac.h +++ /dev/null @@ -1,143 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Curt Coder -/********************************************************************** - - Luxor ABC 1600 Memory Access Controller emulation - -**********************************************************************/ -#ifndef MAME_LUXOR_ABC1600MAC_H -#define MAME_LUXOR_ABC1600MAC_H - -#pragma once - - -#include "cpu/m68000/m68008.h" -#include "machine/watchdog.h" - - - -///************************************************************************* -// MACROS / CONSTANTS -///************************************************************************* - -#define ABC1600_MAC_TAG "mac" - - -///************************************************************************* -// TYPE DEFINITIONS -///************************************************************************* - -// ======================> abc1600_mac_device - -class abc1600_mac_device : public device_t, - public device_memory_interface -{ -public: - abc1600_mac_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - template void set_cpu(T &&tag) { m_cpu.set_tag(std::forward(tag)); } - auto in_tren0_cb() { return m_read_tren[0].bind(); } - auto out_tren0_cb() { return m_write_tren[0].bind(); } - auto in_tren1_cb() { return m_read_tren[1].bind(); } - auto out_tren1_cb() { return m_write_tren[1].bind(); } - auto in_tren2_cb() { return m_read_tren[2].bind(); } - auto out_tren2_cb() { return m_write_tren[2].bind(); } - - void rstbut_w(int state) { m_rstbut = state; } - - uint8_t read(offs_t offset); - void write(offs_t offset, uint8_t data); - - uint8_t cause_r(); - void task_w(offs_t offset, uint8_t data); - uint8_t segment_r(offs_t offset); - void segment_w(offs_t offset, uint8_t data); - uint8_t page_lo_r(offs_t offset); - void page_lo_w(offs_t offset, uint8_t data); - uint8_t page_hi_r(offs_t offset); - void page_hi_w(offs_t offset, uint8_t data); - void dmamap_w(offs_t offset, uint8_t data); - void partst_w(int state); - - uint8_t dma0_mreq_r(offs_t offset) { return dma_mreq_r(0, DMAMAP_R0_LO, offset); } - void dma0_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(0, DMAMAP_R0_LO, offset, data); } - uint8_t dma0_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R0_LO, offset); } - void dma0_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R0_LO, offset, data); } - - uint8_t dma1_mreq_r(offs_t offset) { return dma_mreq_r(1, DMAMAP_R1_LO, offset); } - void dma1_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(1, DMAMAP_R1_LO, offset, data); } - uint8_t dma1_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R1_LO, offset); } - void dma1_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R1_LO, offset, data); } - - uint8_t dma2_mreq_r(offs_t offset) { return dma_mreq_r(2, DMAMAP_R2_LO, offset); } - void dma2_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(2, DMAMAP_R2_LO, offset, data); } - uint8_t dma2_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R2_LO, offset); } - void dma2_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R2_LO, offset, data); } - - void dump(); - -protected: - // device-level overrides - virtual void device_start() override ATTR_COLD; - virtual void device_reset() override ATTR_COLD; - - // device_memory_interface overrides - virtual space_config_vector memory_space_config() const override; - - // optional information overrides - virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; - virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; - -private: - enum - { - DMAMAP_R2_LO = 0, - DMAMAP_R2_HI, - DMAMAP_R1_LO = 4, - DMAMAP_R1_HI, - DMAMAP_R0_LO, - DMAMAP_R0_HI - }; - - offs_t get_physical_offset(offs_t offset, int task, bool &nonx, bool &wp); - - offs_t get_dma_address(int index, offs_t offset, bool &rw); - uint8_t dma_mreq_r(int index, int dmamap, offs_t offset); - void dma_mreq_w(int index, int dmamap, offs_t offset, uint8_t data); - uint8_t dma_iorq_r(int dmamap, offs_t offset); - void dma_iorq_w(int dmamap, offs_t offset, uint8_t data); - - void mac_map(address_map &map) ATTR_COLD; - const address_space_config m_program_config; - const address_space_config m_mac_config; - - required_memory_region m_rom; - required_device m_cpu; - memory_share_creator m_segment_ram; - memory_share_creator m_page_ram; - - required_device m_watchdog; - - devcb_read8::array<3> m_read_tren; - devcb_write8::array<3> m_write_tren; - - bool m_rstbut = 0; - bool m_boote = 0; - bool m_magic = 0; - int m_task = 0; - - uint8_t m_dmamap[8]; - uint8_t m_cause; - bool m_partst = 0; -}; - - -constexpr int AS_MAC = 1; - - - -// device type definition -DECLARE_DEVICE_TYPE(ABC1600_MAC, abc1600_mac_device) - - -#endif // MAME_LUXOR_ABC1600MAC_H From 8462515b57b13fff27711c06123ee24acdc73cb9 Mon Sep 17 00:00:00 2001 From: Jesus Ramos Date: Tue, 10 Mar 2026 05:43:12 -0700 Subject: [PATCH 220/351] sh/sh7709s.cpp: Convert the cpu cycles to bus cycles properly (#15078) --- src/devices/cpu/sh/sh7709s.cpp | 117 ++++++++++++--------------------- src/devices/cpu/sh/sh7709s.h | 2 + 2 files changed, 45 insertions(+), 74 deletions(-) diff --git a/src/devices/cpu/sh/sh7709s.cpp b/src/devices/cpu/sh/sh7709s.cpp index 5d90b78bc6b..de8453c4073 100644 --- a/src/devices/cpu/sh/sh7709s.cpp +++ b/src/devices/cpu/sh/sh7709s.cpp @@ -110,10 +110,7 @@ bool sh7709s_device::cache_access(uint32_t address, bool write) if (entry->lru == 0) { if (entry->dirty) - { m_wb_address = entry->tag * SH7709S_CACHE_LINE_SIZE; - m_sh2_state->icount--; // Takes 1 cycle to move the cache line to the wb buffer - } entry->tag = cache_address; entry->lru = SH7709S_CACHE_ASSOCIATIVITY - 1; entry->dirty = write; @@ -154,12 +151,7 @@ bool can_use_burst(uint32_t address) return is_sdram_region(address); } -#define CACHE_LINE_BURST_READ_PENALTY (6) // 2 base + 4 to burst read 16 bytes for a cache line -#define CACHE_LINE_BURST_WRITE_PENALTY (4) // Only the 4 data cycles for the cache line -#define CACHE_MISS_STALL_PENALTY (4) // 3 base (tag lookup, compare, etc...) + 1 for BSC sync -#define BUS_ACCESS_PENALTY (2) - -static unsigned int get_wcr1_timing(uint32_t address, uint16_t wcr1) +unsigned int get_wcr1_timing(uint32_t address, uint16_t wcr1) { unsigned int area = get_area(address); @@ -174,7 +166,7 @@ static unsigned int get_wcr1_timing(uint32_t address, uint16_t wcr1) return area_val; } -static unsigned int get_wcr2_timing(uint32_t address, uint16_t wcr2) +unsigned int get_wcr2_timing(uint32_t address, uint16_t wcr2) { unsigned int area = get_area(address); bool burst_capable = can_use_burst(address); @@ -238,19 +230,7 @@ static unsigned int get_wcr2_timing(uint32_t address, uint16_t wcr2) unsigned int mcr_tpc(uint16_t mcr) { - unsigned int tpc_val((mcr >> 14) & 0x3); - - // self refresh mode timings, should check RMODE in - // MCR for non cv1k and use the other timings - switch (tpc_val) - { - case 0: return 2; - case 1: return 5; - case 2: return 8; - case 3: return 11; - } - - return 2; // Unreachable + return ((mcr >> 14) & 0x3) + 1; } unsigned int mcr_rcd(uint16_t mcr) @@ -285,72 +265,59 @@ unsigned int cache_line_fetch_count(uint32_t address, uint16_t bcr2) return SH7709S_CACHE_LINE_SIZE >> bcr2_val; } -// Some of the values used here are bus cycles that might need conversion but it's close enough for now -// It's possible for some instructions to overlap in the pipeline with the fetches but that's a good bit -// of extra tracking required +#define SDRAM_PAGE_SIZE (1024) // Hardcoded for cv1k + +// CPU cycles +#define CACHE_MISS_STALL (1) // Miss detection in 1 cycle, the rest of the ops (wb buffer movement, etc..) happen in the background +// Bus cycles +#define BUS_ACCESS_PENALTY (3) // Fixed bus cycle cost to access the bus +#define BURST_READ_WORD_PENALTY (3) // First word overlaps with one of the command clocks +#define BURST_WRITE_WORD_PENALTY (4) +#define BUS_CS_SWAP_PENALTY (1) // Penalty paid when swapping the bus from read->write for writeback eviction + +// cpu->bus cycle conversion hardcoded to 2x as cv1k sh3 runs the bus at 50mhz unsigned int sh7709s_device::access_penalty(uint32_t address, bool write) { - // cv1k doesn't use TLB so we can just use raw physical address - unsigned int penalty = 0; + // Ignore non SDRAM regions for now, there aren't too many accesses to those + // that would affect slowdown + // Area0 contains the code so we would just be slowing down the code copy + // to main memory even more + if (!is_sdram_region(address)) + return 0; + bool is_in_cache = cache_access(address, write); - bool is_wb = false; - bool burst_capable = false; - unsigned int area = 0; if (is_in_cache) - goto check_wb; + return 0; -wb_handle: - area = get_area(address); - burst_capable = can_use_burst(address); - // If we're swapping access area or read<->write pay the cost in WCR1 for the switch - if (area != m_last_area_accessed || (m_last_area_accessed_was_write && !is_wb) || (!m_last_area_accessed_was_write && is_wb)) - penalty += get_wcr1_timing(address, m_wcr1); + unsigned int bus_penalty = BUS_ACCESS_PENALTY + BURST_READ_WORD_PENALTY + mcr_rcd(m_mcr) + get_wcr2_timing(address, m_wcr2); + unsigned int cpu_penalty = CACHE_MISS_STALL; + unsigned int page_read = address / SDRAM_PAGE_SIZE; - m_last_area_accessed = area; - m_last_area_accessed_was_write = is_wb; - - // We don't really handle uncached access here but it doesn't seem to affect cv1k slowodwn - if (burst_capable && !is_wb) - penalty += CACHE_LINE_BURST_READ_PENALTY; - if (burst_capable && is_wb) - penalty += CACHE_LINE_BURST_WRITE_PENALTY - 1; // First 4 bytes of the transfer overlaps the column (write) command issue so we can remove 1 cycle - - // If we can't use burst timing it's gonna be pricey to access - // Each access will have to initiate bus access and wait to read 4 words for the cache line fill - if (!burst_capable) - penalty += (BUS_ACCESS_PENALTY + get_wcr2_timing(address, m_wcr2)) * cache_line_fetch_count(address, m_bcr2); - else if (!is_wb) // For cache line writeback we can ignore the stall as well as CAS latency - penalty += CACHE_MISS_STALL_PENALTY + get_wcr2_timing(address, m_wcr2); - - // On cv1k boards the SDRAM is in self refresh mode so every access is a page miss due to the page close after each fetch - if (is_sdram_region(address)) + // We hit another miss before a writeback eviction finished, stall until that's done + if (m_wb_active_cycles > 0) { - penalty += BUS_ACCESS_PENALTY + - 1 /* ACTV command issue */ + - mcr_rcd(m_mcr) + - 1 /* Column command issue (read/write), for writes this overlaps the first word write */ + - mcr_tpc(m_mcr) + mcr_tras(m_mcr); - // If trcd cycles is 2 or more for sdram a NOP command to SDRAM is inserted between tr and tc1 which is trcd - 1 cycles long - if (mcr_rcd(m_mcr) >= 2) - penalty += mcr_rcd(m_mcr) - 1; + if (m_last_sdram_page == page_read) + bus_penalty += mcr_tpc(m_mcr); + cpu_penalty += m_wb_active_cycles; + m_wb_active_cycles = 0; } -check_wb: - // The read fetch is always handled first before any wb buffer eviction - // so we always handle those first - // This would normally happen in the background but it's likely that - // you'll hit a subsequent cache miss and take the hit anyway + m_last_sdram_page = page_read; + + // We had a dirty writeback eviction, total up the background cost penalty we'll pay on subsequent cycles if (m_wb_address != 0) { - address = m_wb_address; - is_wb = true; + unsigned int page_write = m_wb_address / SDRAM_PAGE_SIZE; + // Bank collision in auto recharge mode, we have to wait for tpc + if (page_read == page_write) + m_wb_active_cycles += mcr_tpc(m_mcr) * 2; + m_wb_active_cycles += (BUS_ACCESS_PENALTY + BUS_CS_SWAP_PENALTY + BURST_WRITE_WORD_PENALTY + mcr_rcd(m_mcr) + mcr_trwl(m_mcr) + mcr_tpc(m_mcr)) * 2; m_wb_address = 0; - penalty += mcr_trwl(m_mcr); - goto wb_handle; + m_last_sdram_page = page_write; } - return penalty; + return cpu_penalty + (bus_penalty * 2); } void sh7709s_device::drc_memory_access_read() @@ -367,6 +334,8 @@ void sh7709s_device::drc_memory_access_write() void sh7709s_device::drc_update_icache() { + if (m_wb_active_cycles > 0) + m_wb_active_cycles--; // Assume the instruction prefetch is perfect for now // we'll still pay a bit of penalty for the access and // handle cache writeback when the icache fetch causes diff --git a/src/devices/cpu/sh/sh7709s.h b/src/devices/cpu/sh/sh7709s.h index 3feb58caf33..66cba772e46 100644 --- a/src/devices/cpu/sh/sh7709s.h +++ b/src/devices/cpu/sh/sh7709s.h @@ -46,6 +46,8 @@ private: uint32_t m_wb_address; // writeback buffer address if there's a dirty cache line to evict uint8_t m_last_area_accessed; // last memory area accessed for WCR1 timing purposes bool m_last_area_accessed_was_write; // last memory area accessed operation also for WCR1 timing purposes + unsigned int m_wb_active_cycles; // Track any background cycles for writeback and precharge waits on the same bank + unsigned int m_last_sdram_page; // Last accessed sdram page, used to track when to have to pay tpc(precharge) cost bool cache_access(uint32_t address, bool write); unsigned int access_penalty(uint32_t address, bool write); From b29461b42dcb5cc2169d7eeb99676d96e6b84b0e Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 10 Mar 2026 16:40:14 +0100 Subject: [PATCH 221/351] nemesis: change maincpu interrupts from hold to assert/clear --- src/mame/konami/nemesis.cpp | 176 +++++++++++++++++++--------------- src/mame/konami/nemesis.h | 40 ++++---- src/mame/konami/nemesis_v.cpp | 49 +--------- 3 files changed, 117 insertions(+), 148 deletions(-) diff --git a/src/mame/konami/nemesis.cpp b/src/mame/konami/nemesis.cpp index 4c14bb729c4..377cf544821 100644 --- a/src/mame/konami/nemesis.cpp +++ b/src/mame/konami/nemesis.cpp @@ -125,22 +125,16 @@ initials #include "konamigt.lh" -void gx400_base_state::nemesis_vblank_irq(int state) +void gx400_base_state::vblank_irq1(int state) { - if (state && m_irq_on) - m_maincpu->set_input_line(1, HOLD_LINE); + if (state && m_irq1_on) + m_maincpu->set_input_line(1, ASSERT_LINE); } -void salamand_state::blkpnthr_vblank_irq(int state) +void gx400_base_state::vblank_irq2(int state) { - if (state && m_irq_on) - m_maincpu->set_input_line(2, HOLD_LINE); -} - -void bubsys_state::bubsys_vblank_irq(int state) -{ - if (state && m_irq_on) - m_maincpu->set_input_line(4, HOLD_LINE); + if (state && m_irq2_on) + m_maincpu->set_input_line(2, ASSERT_LINE); } TIMER_DEVICE_CALLBACK_MEMBER(bubsys_state::bubsys_interrupt) @@ -154,7 +148,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(bubsys_state::bubsys_interrupt) // the int4 fires every 72 scanlines of a counter that is NOT reset by VBLANK, and acts as a sort of constant timer if (m_irq4_on) - m_maincpu->set_input_line(4, HOLD_LINE); + m_maincpu->set_input_line(4, ASSERT_LINE); } // based on tracing, the VBLANK int rising edge is 16 full scanlines before the rising edge of the VSYNC pulse on CSYNC, @@ -165,7 +159,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(bubsys_state::bubsys_interrupt) // particular frame. // TODO: actually implement this. The behavior may differ in the (unused(?) and untested) 288 scanline mode, as well. if (scanline == 0 && m_irq2_on) - m_maincpu->set_input_line(2, HOLD_LINE); + m_maincpu->set_input_line(2, ASSERT_LINE); if (scanline == 0 && m_irq1_on && (m_screen->frame_number() & 1) == 0) { @@ -173,20 +167,17 @@ TIMER_DEVICE_CALLBACK_MEMBER(bubsys_state::bubsys_interrupt) // Its behavior in 288 scanline mode is unknown/untested. m_maincpu->set_input_line(1, ASSERT_LINE); } - else if (scanline == 0 && m_irq1_on && (m_screen->frame_number() & 1) != 0) - m_maincpu->set_input_line(1, CLEAR_LINE); - } TIMER_DEVICE_CALLBACK_MEMBER(gx400_state::konamigt_interrupt) { int const scanline = param; - if (scanline == 240 && m_irq_on && (m_screen->frame_number() & 1) == 0) - m_maincpu->set_input_line(1, HOLD_LINE); + if (scanline == 240 && m_irq1_on && (m_screen->frame_number() & 1) == 0) + m_maincpu->set_input_line(1, ASSERT_LINE); if (scanline == 0 && m_irq2_on) - m_maincpu->set_input_line(2, HOLD_LINE); + m_maincpu->set_input_line(2, ASSERT_LINE); } // irq enables in reverse order than Salamander according to the irq routine contents @@ -194,11 +185,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(hcrash_state::hcrash_interrupt) { int const scanline = param; - if (scanline == 240 && m_irq2_on) //&& (m_screen->frame_number() & 1) == 0) - m_maincpu->set_input_line(1, HOLD_LINE); + if (scanline == 240 && m_irq1_on) //&& (m_screen->frame_number() & 1) == 0) + m_maincpu->set_input_line(1, ASSERT_LINE); - if (scanline == 0 && m_irq_on) - m_maincpu->set_input_line(2, HOLD_LINE); + if (scanline == 0 && m_irq2_on) + m_maincpu->set_input_line(2, ASSERT_LINE); } @@ -207,55 +198,59 @@ TIMER_DEVICE_CALLBACK_MEMBER(gx400_state::gx400_interrupt) int const scanline = param; if (scanline == 240 && m_irq1_on && (m_screen->frame_number() & 1) == 0) - m_maincpu->set_input_line(1, HOLD_LINE); + m_maincpu->set_input_line(1, ASSERT_LINE); if (scanline == 0 && m_irq2_on) - m_maincpu->set_input_line(2, HOLD_LINE); + m_maincpu->set_input_line(2, ASSERT_LINE); if (scanline == 120 && m_irq4_on) - m_maincpu->set_input_line(4, HOLD_LINE); + m_maincpu->set_input_line(4, ASSERT_LINE); } -void gx400_state::irq_enable_w(int state) -{ - m_irq_on = state; -} - -void gx400_state::irq1_enable_w(int state) +void gx400_base_state::irq1_enable_w(int state) { m_irq1_on = state; + if (!state) + m_maincpu->set_input_line(1, CLEAR_LINE); } void gx400_base_state::irq2_enable_w(int state) { m_irq2_on = state; + if (!state) + m_maincpu->set_input_line(2, CLEAR_LINE); } -void gx400_state::irq4_enable_w(int state) +void gx400_base_state::irq4_enable_w(int state) { m_irq4_on = state; + if (!state) + m_maincpu->set_input_line(4, CLEAR_LINE); } -void gx400_state::coin1_lockout_w(int state) +void gx400_base_state::coin1_lockout_w(int state) { machine().bookkeeping().coin_lockout_w(0, state); } -void gx400_state::coin2_lockout_w(int state) +void gx400_base_state::coin2_lockout_w(int state) { machine().bookkeeping().coin_lockout_w(1, state); } -void gx400_state::sound_irq_w(int state) +void gx400_base_state::sound_irq_w(int state) { - // This asserts the Z80 /irq pin by setting a 74ls74 latch; the Z80 pulses /IOREQ low during servicing of the interrupt, - // which clears the latch automatically, so HOLD_LINE is correct in this case - if (state) - m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80 + // 7474 to Z80 IRQ; Z80 /IOREQ auto acks the interrupt so HOLD_LINE is correct + if (state && !m_sound_irq_clk) + m_audiocpu->set_input_line(0, HOLD_LINE); + + // MAME's 74259 device assures that this is only triggered on rising/falling edge, + // but sound_irq_w is also called from elsewhere, so we must remember the pin state + m_sound_irq_clk = bool(state); } -void gx400_state::sound_nmi_w(int state) +void gx400_base_state::sound_nmi_w(int state) { // On Bubble System at least, this goes to an LS02 NOR before the Z80, whose other input is tied to ???, acting as an inverter. // Effectively, if the bit is 1, NMI is asserted, otherwise it is cleared. This is also cleared on reset. @@ -267,6 +262,35 @@ void gx400_state::sound_nmi_w(int state) m_audiocpu->set_input_line(INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); } +void salamand_state::salamand_intlatch_w(uint8_t data) +{ + // direct latch instead of 74259 + irq1_enable_w(BIT(data, 0)); + irq2_enable_w(BIT(data, 1)); + gfx_flipx_w(BIT(data, 2)); + gfx_flipy_w(BIT(data, 3)); +} + +void salamand_state::blkpnthr_intlatch_w(uint8_t data) +{ + // irq1/2 swapped + salamand_intlatch_w(bitswap<8>(data,7,6,5,4,3,2,0,1)); +} + +void salamand_state::outlatch_w(uint8_t data) +{ + // direct latch instead of 74259 + coin1_lockout_w(BIT(data, 1)); + coin2_lockout_w(BIT(data, 2)); + sound_irq_w(BIT(data, 3)); +} + +void hcrash_state::citybomb_outlatch_w(uint8_t data) +{ + outlatch_w(data); + m_selected_ip = BIT(~data, 4); // citybomb steering & accel +} + void bubsys_state::bubsys_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_bubsys_control_ram[offset]); @@ -349,13 +373,14 @@ uint16_t gx400_base_state::konamigt_input_word_r() void hcrash_state::selected_ip_w(uint8_t data) { - m_selected_ip = data; // latch the value + m_selected_ip = data; // latch the value } uint8_t hcrash_state::selected_ip_r() { + // From WEC Le Mans Schems: switch (m_selected_ip & 0xf) - { // From WEC Le Mans Schems: + { case 0xc: return m_io_accel->read(); // Accel - Schems: Accelevr case 0: return m_io_accel->read(); case 0xd: return m_io_wheel->read(); // Wheel - Schems: Handlevr @@ -656,7 +681,8 @@ void salamand_state::salamand_map(address_map &map) map(0x000000, 0x07ffff).rom(); map(0x080000, 0x087fff).ram(); map(0x090000, 0x091fff).rw(m_palette, FUNC(palette_device::read8), FUNC(palette_device::write8)).umask16(0x00ff).share("palette"); - map(0x0a0000, 0x0a0001).w(FUNC(salamand_state::control_port_word_w)); /* irq enable, flipscreen, etc. */ + map(0x0a0000, 0x0a0000).w(FUNC(salamand_state::outlatch_w)); + map(0x0a0001, 0x0a0001).w(FUNC(salamand_state::salamand_intlatch_w)); map(0x0c0001, 0x0c0001).w("soundlatch", FUNC(generic_latch_8_device::write)); map(0x0c0002, 0x0c0003).portr("DSW0"); map(0x0c0004, 0x0c0005).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); /* probably */ @@ -683,7 +709,8 @@ void salamand_state::blkpnthr_map(address_map &map) map(0x000000, 0x07ffff).rom(); map(0x080000, 0x081fff).rw(m_palette, FUNC(palette_device::read8), FUNC(palette_device::write8)).umask16(0x00ff).share("palette"); map(0x090000, 0x097fff).ram(); - map(0x0a0000, 0x0a0001).ram().w(FUNC(salamand_state::control_port_word_w)); /* irq enable, flipscreen, etc. */ + map(0x0a0000, 0x0a0000).w(FUNC(salamand_state::outlatch_w)); + map(0x0a0001, 0x0a0001).w(FUNC(salamand_state::blkpnthr_intlatch_w)); map(0x0c0001, 0x0c0001).w("soundlatch", FUNC(generic_latch_8_device::write)); map(0x0c0002, 0x0c0003).portr("DSW0"); map(0x0c0004, 0x0c0005).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); /* probably */ @@ -718,7 +745,8 @@ void hcrash_state::citybomb_map(address_map &map) map(0x0f0011, 0x0f0011).w("soundlatch", FUNC(generic_latch_8_device::write)); map(0x0f0018, 0x0f0019).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); /* probably */ map(0x0f0021, 0x0f0021).rw("adc", FUNC(adc0804_device::read), FUNC(adc0804_device::write)); - map(0x0f8000, 0x0f8001).w(FUNC(hcrash_state::citybomb_control_port_word_w)); /* irq enable, flipscreen, etc. */ + map(0x0f8000, 0x0f8000).w(FUNC(hcrash_state::citybomb_outlatch_w)); + map(0x0f8001, 0x0f8001).w(FUNC(hcrash_state::salamand_intlatch_w)); map(0x100000, 0x1bffff).rom(); map(0x200000, 0x20ffff).ram().w(FUNC(hcrash_state::charram_w)).share(m_charram); map(0x210000, 0x210fff).ram().w(FUNC(hcrash_state::videoram_w<0>)).share(m_videoram[0]); /* VRAM */ @@ -746,7 +774,8 @@ void salamand_state::nyanpani_map(address_map &map) map(0x070008, 0x070009).portr("DSW0"); map(0x070011, 0x070011).w("soundlatch", FUNC(generic_latch_8_device::write)); map(0x070018, 0x070019).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); /* probably */ - map(0x078000, 0x078001).w(FUNC(salamand_state::control_port_word_w)); /* irq enable, flipscreen, etc. */ + map(0x078000, 0x078000).w(FUNC(salamand_state::outlatch_w)); + map(0x078001, 0x078001).w(FUNC(salamand_state::salamand_intlatch_w)); map(0x100000, 0x13ffff).rom(); map(0x200000, 0x200fff).ram().w(FUNC(salamand_state::videoram_w<0>)).share(m_videoram[0]); /* VRAM */ map(0x201000, 0x201fff).ram().w(FUNC(salamand_state::videoram_w<1>)).share(m_videoram[1]); @@ -804,7 +833,8 @@ void hcrash_state::hcrash_map(address_map &map) map(0x040000, 0x05ffff).rom(); map(0x080000, 0x083fff).ram(); map(0x090000, 0x091fff).rw(m_palette, FUNC(palette_device::read8), FUNC(palette_device::write8)).umask16(0x00ff).share("palette"); - map(0x0a0000, 0x0a0001).w(FUNC(hcrash_state::citybomb_control_port_word_w)); /* irq enable, flipscreen, etc. */ + map(0x0a0000, 0x0a0000).w(FUNC(hcrash_state::outlatch_w)); + map(0x0a0001, 0x0a0001).w(FUNC(hcrash_state::blkpnthr_intlatch_w)); map(0x0c0001, 0x0c0001).w("soundlatch", FUNC(generic_latch_8_device::write)); map(0x0c0002, 0x0c0003).portr("DSW0"); map(0x0c0004, 0x0c0005).portr("DSW1"); @@ -812,7 +842,7 @@ void hcrash_state::hcrash_map(address_map &map) map(0x0c0008, 0x0c0009).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); /* watchdog probably */ map(0x0c000a, 0x0c000b).portr("IN0"); map(0x0c2000, 0x0c2001).r(FUNC(hcrash_state::konamigt_input_word_r)); /* Konami GT control */ - map(0x0c2800, 0x0c280f).w("intlatch", FUNC(ls259_device::write_d0)).umask16(0x00ff); // ??? + map(0x0c2800, 0x0c280f).w("unklatch", FUNC(ls259_device::write_d0)).umask16(0x00ff); // ??? map(0x0c4000, 0x0c4001).portr("IN1"); map(0x0c4001, 0x0c4001).w(FUNC(hcrash_state::selected_ip_w)); map(0x0c4003, 0x0c4003).rw("adc", FUNC(adc0804_device::read), FUNC(adc0804_device::write)); /* WEC Le Mans 24 control */ @@ -1760,18 +1790,15 @@ void salamand_state::volume_callback(uint8_t data) void gx400_base_state::machine_start() { - save_item(NAME(m_irq_on)); + save_item(NAME(m_irq1_on)); save_item(NAME(m_irq2_on)); + save_item(NAME(m_irq4_on)); + save_item(NAME(m_sound_irq_clk)); + save_item(NAME(m_tilemap_flip)); save_item(NAME(m_flipscreen)); } -void salamand_state::machine_start() -{ - gx400_base_state::machine_start(); - save_item(NAME(m_irq_port_last)); -} - void hcrash_state::machine_start() { salamand_state::machine_start(); @@ -1781,8 +1808,6 @@ void hcrash_state::machine_start() void gx400_state::machine_start() { gx400_base_state::machine_start(); - save_item(NAME(m_irq1_on)); - save_item(NAME(m_irq4_on)); //save_item(NAME(m_gx400_irq1_cnt)); save_item(NAME(m_speech_offset)); } @@ -1793,18 +1818,11 @@ void bubsys_state::machine_start() save_item(NAME(m_scanline_counter)); } -void gx400_base_state::machine_reset() -{ - m_irq_on = 0; - - m_flipscreen = 0; - m_tilemap_flip = 0; -} - void salamand_state::machine_reset() { gx400_base_state::machine_reset(); - m_irq_port_last = 0; + salamand_intlatch_w(0); + outlatch_w(0); } void hcrash_state::machine_reset() @@ -1848,7 +1866,7 @@ void gx400_state::nemesis(machine_config &config) outlatch.q_out_cb<2>().set(FUNC(gx400_state::sound_irq_w)); ls259_device &intlatch(LS259(config, "intlatch")); // 11K - intlatch.q_out_cb<0>().set(FUNC(gx400_state::irq_enable_w)); + intlatch.q_out_cb<0>().set(FUNC(gx400_state::irq1_enable_w)); intlatch.q_out_cb<2>().set(FUNC(gx400_state::gfx_flipx_w)); intlatch.q_out_cb<3>().set(FUNC(gx400_state::gfx_flipy_w)); @@ -1859,7 +1877,7 @@ void gx400_state::nemesis(machine_config &config) set_screen_raw_params(config); m_screen->set_screen_update(FUNC(gx400_state::screen_update)); m_screen->set_palette(m_palette); - m_screen->screen_vblank().set(FUNC(gx400_state::nemesis_vblank_irq)); + m_screen->screen_vblank().set(FUNC(gx400_state::vblank_irq1)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_nemesis); PALETTE(config, m_palette).set_entries(2048); @@ -1979,7 +1997,7 @@ void gx400_state::konamigt(machine_config &config) ls259_device &intlatch(LS259(config, "intlatch")); intlatch.q_out_cb<0>().set(FUNC(gx400_state::irq2_enable_w)); - intlatch.q_out_cb<1>().set(FUNC(gx400_state::irq_enable_w)); + intlatch.q_out_cb<1>().set(FUNC(gx400_state::irq1_enable_w)); intlatch.q_out_cb<2>().set(FUNC(gx400_state::gfx_flipx_w)); intlatch.q_out_cb<3>().set(FUNC(gx400_state::gfx_flipy_w)); @@ -2108,7 +2126,7 @@ void salamand_state::salamand(machine_config &config) set_screen_raw_params(config); m_screen->set_screen_update(FUNC(salamand_state::screen_update)); m_screen->set_palette(m_palette); - m_screen->screen_vblank().set(FUNC(salamand_state::nemesis_vblank_irq)); + m_screen->screen_vblank().set(FUNC(salamand_state::vblank_irq1)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_nemesis); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 2048); @@ -2151,7 +2169,7 @@ void salamand_state::blkpnthr(machine_config &config) set_screen_raw_params(config); m_screen->set_screen_update(FUNC(salamand_state::screen_update)); m_screen->set_palette(m_palette); - m_screen->screen_vblank().set(FUNC(salamand_state::blkpnthr_vblank_irq)); + m_screen->screen_vblank().set(FUNC(salamand_state::vblank_irq2)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_nemesis); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 2048); @@ -2192,7 +2210,7 @@ void hcrash_state::citybomb(machine_config &config) set_screen_raw_params(config); m_screen->set_screen_update(FUNC(hcrash_state::screen_update)); m_screen->set_palette(m_palette); - m_screen->screen_vblank().set(FUNC(hcrash_state::nemesis_vblank_irq)); + m_screen->screen_vblank().set(FUNC(hcrash_state::vblank_irq1)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_nemesis); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 2048); @@ -2231,7 +2249,7 @@ void salamand_state::nyanpani(machine_config &config) set_screen_raw_params(config); m_screen->set_screen_update(FUNC(salamand_state::screen_update)); m_screen->set_palette(m_palette); - m_screen->screen_vblank().set(FUNC(salamand_state::nemesis_vblank_irq)); + m_screen->screen_vblank().set(FUNC(salamand_state::vblank_irq1)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_nemesis); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 2048); @@ -2267,10 +2285,10 @@ void hcrash_state::hcrash(machine_config &config) adc0804_device &adc(ADC0804(config, "adc", 640000)); // unknown clock (doesn't seem to be R/C here) adc.vin_callback().set(FUNC(hcrash_state::selected_ip_r)); - ls259_device &intlatch(LS259(config, "intlatch")); - intlatch.q_out_cb<0>().set_nop(); // ? - intlatch.q_out_cb<1>().set(FUNC(hcrash_state::irq2_enable_w)); // or at 0x0c2804 ? - intlatch.q_out_cb<2>().set_nop(); // ? + ls259_device &unklatch(LS259(config, "unklatch")); + unklatch.q_out_cb<0>().set_nop(); // ? + unklatch.q_out_cb<1>().set_nop(); // ? + unklatch.q_out_cb<2>().set_nop(); // ? WATCHDOG_TIMER(config, "watchdog"); diff --git a/src/mame/konami/nemesis.h b/src/mame/konami/nemesis.h index 6c029dcd9f4..fb7bc0cf5b6 100644 --- a/src/mame/konami/nemesis.h +++ b/src/mame/konami/nemesis.h @@ -38,7 +38,6 @@ protected: { } virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; virtual void video_start() override ATTR_COLD; /* devices */ @@ -68,17 +67,29 @@ protected: uint8_t m_blank_tile[8*8]{}; /* misc */ - bool m_irq_on = false; + bool m_irq1_on = false; bool m_irq2_on = false; + bool m_irq4_on = false; + bool m_sound_irq_clk = false; + void irq1_enable_w(int state); void irq2_enable_w(int state); + void irq4_enable_w(int state); + void gfx_flipx_w(int state); + void gfx_flipy_w(int state); + void coin1_lockout_w(int state); + void coin2_lockout_w(int state); + void sound_irq_w(int state); + void sound_nmi_w(int state); + uint16_t konamigt_input_word_r(); template void videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); template void colorram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void charram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); template TILE_GET_INFO_MEMBER(get_tile_info); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void nemesis_vblank_irq(int state); + void vblank_irq1(int state); + void vblank_irq2(int state); void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void set_screen_raw_params(machine_config &config); @@ -98,20 +109,17 @@ public: void blkpnthr(machine_config &config) ATTR_COLD; protected: - virtual void machine_start() override ATTR_COLD; virtual void machine_reset() override ATTR_COLD; /* devices */ required_device m_k007232; - /* misc */ - uint8_t m_irq_port_last = 0; - - void control_port_word_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void salamand_intlatch_w(uint8_t data); + void blkpnthr_intlatch_w(uint8_t data); + void outlatch_w(uint8_t data); void speech_start_w(uint8_t data); uint8_t speech_busy_r(); void city_sound_bank_w(uint8_t data); - void blkpnthr_vblank_irq(int state); TIMER_DEVICE_CALLBACK_MEMBER(hcrash_interrupt); void volume_callback(uint8_t data); @@ -146,7 +154,7 @@ private: uint8_t m_selected_ip = 0; // needed for Hyper Crash - void citybomb_control_port_word_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void citybomb_outlatch_w(uint8_t data); void selected_ip_w(uint8_t data); uint8_t selected_ip_r(); @@ -190,22 +198,11 @@ protected: uint8_t m_palette_lookup[32]{}; /* misc */ - bool m_irq1_on = false; - bool m_irq4_on = false; //int32_t m_gx400_irq1_cnt = 0; uint32_t m_speech_offset = 0; - void irq_enable_w(int state); - void irq1_enable_w(int state); - void irq4_enable_w(int state); - void coin1_lockout_w(int state); - void coin2_lockout_w(int state); - void sound_irq_w(int state); - void sound_nmi_w(int state); uint16_t sound_sharedram_word_r(offs_t offset); void sound_sharedram_word_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void gfx_flipx_w(int state); - void gfx_flipy_w(int state); void palette_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void nemesis_filter_w(offs_t offset, uint8_t data); void speech_w(offs_t offset, uint8_t data); @@ -253,7 +250,6 @@ private: uint16_t m_scanline_counter = 0; void bubsys_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void bubsys_vblank_irq(int state); TIMER_DEVICE_CALLBACK_MEMBER(bubsys_interrupt); diff --git a/src/mame/konami/nemesis_v.cpp b/src/mame/konami/nemesis_v.cpp index d4df585e1e3..baf0fdf7dbf 100644 --- a/src/mame/konami/nemesis_v.cpp +++ b/src/mame/konami/nemesis_v.cpp @@ -58,7 +58,7 @@ TILE_GET_INFO_MEMBER(gx400_base_state::get_tile_info) } -void gx400_state::gfx_flipx_w(int state) +void gx400_base_state::gfx_flipx_w(int state) { m_flipscreen = state; @@ -70,7 +70,7 @@ void gx400_state::gfx_flipx_w(int state) machine().tilemap().set_flip_all(m_tilemap_flip); } -void gx400_state::gfx_flipy_w(int state) +void gx400_base_state::gfx_flipy_w(int state) { if (state) m_tilemap_flip |= TILEMAP_FLIPY; @@ -81,51 +81,6 @@ void gx400_state::gfx_flipy_w(int state) } -void salamand_state::control_port_word_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (ACCESSING_BITS_0_7) - { - uint8_t const accessing_bits = data ^ m_irq_port_last; - - m_irq_on = BIT(data, 0); - m_irq2_on = BIT(data, 1); - m_flipscreen = BIT(data, 2); - - if (BIT(data, 2)) - m_tilemap_flip |= TILEMAP_FLIPX; - else - m_tilemap_flip &= ~TILEMAP_FLIPX; - - if (BIT(data, 3)) - m_tilemap_flip |= TILEMAP_FLIPY; - else - m_tilemap_flip &= ~TILEMAP_FLIPY; - - if (accessing_bits & 0x0c) - machine().tilemap().set_flip_all(m_tilemap_flip); - - m_irq_port_last = data; - } - - if (ACCESSING_BITS_8_15) - { - machine().bookkeeping().coin_lockout_w(0, BIT(data, 9)); - machine().bookkeeping().coin_lockout_w(1, BIT(data, 10)); - - if (BIT(data, 11)) - m_audiocpu->set_input_line(0, HOLD_LINE); - } -} - -void hcrash_state::citybomb_control_port_word_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - control_port_word_w(offset, data, mem_mask); - if (ACCESSING_BITS_8_15) - { - m_selected_ip = BIT(~data, 12); /* citybomb steering & accel */ - } -} - void gx400_state::create_palette_lookups() { // driver is 74LS09 (AND gates with open collector) From 1ae8a2ad5cc01b11aae6164b9da8630dbedfd159 Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 10 Mar 2026 18:05:14 +0100 Subject: [PATCH 222/351] hcrash: fix steering in konamigt mode --- src/mame/konami/nemesis.cpp | 48 ++++++++++++++++--------------------- src/mame/konami/nemesis.h | 5 ++-- 2 files changed, 23 insertions(+), 30 deletions(-) diff --git a/src/mame/konami/nemesis.cpp b/src/mame/konami/nemesis.cpp index 377cf544821..129fadddb93 100644 --- a/src/mame/konami/nemesis.cpp +++ b/src/mame/konami/nemesis.cpp @@ -353,20 +353,20 @@ uint16_t gx400_base_state::konamigt_input_word_r() bit 12-15: accel */ - int const data = m_io_in3->read(); + int const data = m_io_in[3]->read(); int const data2 = m_io_wheel->read(); int ret = 0x0000; -// if (BIT(data, 4)) ret |= 0x0800; // turbo/gear? -// if (BIT(data, 7)) ret |= 0x0400; // turbo? +// if (BIT(data, 4)) ret |= 0x0800; // turbo/gear? +// if (BIT(data, 7)) ret |= 0x0400; // turbo? if (BIT(data, 5)) - ret |= 0x0300; // brake (0-3) + ret |= 0x0300; // brake (0-3) if (BIT(data, 6)) - ret |= 0xf000; // accel (0-f) + ret |= 0xf000; // accel (0-f) - ret |= data2 & 0x7f; // steering wheel, not exactly sure if DIAL works ok. + ret |= data2 & 0x7f; // steering wheel, not exactly sure if DIAL works ok. return ret; } @@ -381,9 +381,9 @@ uint8_t hcrash_state::selected_ip_r() // From WEC Le Mans Schems: switch (m_selected_ip & 0xf) { - case 0xc: return m_io_accel->read(); // Accel - Schems: Accelevr + case 0xc: return m_io_accel->read(); // Accel - Schems: Accelevr case 0: return m_io_accel->read(); - case 0xd: return m_io_wheel->read(); // Wheel - Schems: Handlevr + case 0xd: return m_io_wheel->read(); // Wheel - Schems: Handlevr case 1: return m_io_wheel->read(); default: return ~0; @@ -1509,16 +1509,22 @@ static INPUT_PORTS_START( hcrash ) PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02) // only in WEC Le Mans 24 cabinets + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02) // only in WEC Le Mans 24 cabinets PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x02) // player 2? PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON3 ) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) // must be 0 otherwise game freezes when using WEC Le Mans 24 cabinet + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) // must be 0 otherwise game freezes when using WEC Le Mans 24 cabinet PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("adc", FUNC(adc0804_device::intr_r)) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_START("IN2") PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_START("IN3") // Konami GT cabinet + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x01) // only in Konami GT cabinet with brake + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x01) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x02) +// PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON4 ) + PORT_START("DSW0") KONAMI_COINAGE_LOC(DEF_STR( Free_Play ), "Invalid", SW1) /* "Invalid" = both coin slots disabled */ @@ -1526,8 +1532,8 @@ static INPUT_PORTS_START( hcrash ) PORT_START("DSW1") PORT_DIPNAME( 0x03, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:1,2") PORT_DIPSETTING( 0x03, "Konami GT without brake" ) - PORT_DIPSETTING( 0x02, "WEC Le Mans 24 Upright" ) PORT_DIPSETTING( 0x01, "Konami GT with brake" ) + PORT_DIPSETTING( 0x02, "WEC Le Mans 24 Upright" ) // 0x00 WEC Le Mans 24 Upright again PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7") @@ -1552,22 +1558,12 @@ static INPUT_PORTS_START( hcrash ) PORT_DIPSETTING( 0x00, "M.P.H." ) PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) - /* Konami GT specific control */ - PORT_START("PADDLE") - PORT_BIT( 0x7f, 0x40, IPT_PADDLE ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x02) - - PORT_START("IN3") - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x01) // only in Konami GT cabinet with brake - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x01) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON1 ) -// PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON4 ) - - /* WEC Le Mans 24 specific control */ - PORT_START("ACCEL") /* Accelerator */ + PORT_START("ACCEL") // WEC Le Mans 24 cabinet PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_MINMAX(0,0x80) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02) - PORT_START("WHEEL") /* Steering Wheel */ - PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(50) PORT_KEYDELTA(5) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02) + PORT_START("WHEEL") + PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(50) PORT_KEYDELTA(5) PORT_CONDITION("DSW1", 0x03, EQUALS, 0x02) // WEC Le Mans 24 cabinet + PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(5) PORT_CONDITION("DSW1", 0x03, NOTEQUALS, 0x02) // Konami GT cabinet INPUT_PORTS_END static INPUT_PORTS_START( bubsys ) @@ -1808,7 +1804,6 @@ void hcrash_state::machine_start() void gx400_state::machine_start() { gx400_base_state::machine_start(); - //save_item(NAME(m_gx400_irq1_cnt)); save_item(NAME(m_speech_offset)); } @@ -1834,7 +1829,6 @@ void hcrash_state::machine_reset() void gx400_state::machine_reset() { gx400_base_state::machine_reset(); - //m_gx400_irq1_cnt = 0; m_speech_offset = 0; } diff --git a/src/mame/konami/nemesis.h b/src/mame/konami/nemesis.h index fb7bc0cf5b6..b485ab61643 100644 --- a/src/mame/konami/nemesis.h +++ b/src/mame/konami/nemesis.h @@ -33,7 +33,7 @@ protected: m_videoram(*this, "videoram%u", 1U), m_colorram(*this, "colorram%u", 1U), m_spriteram(*this, "spriteram"), - m_io_in3(*this, "IN3"), + m_io_in(*this, "IN%u", 0), m_io_wheel(*this, "WHEEL") { } @@ -56,7 +56,7 @@ protected: required_shared_ptr_array m_colorram; required_shared_ptr m_spriteram; - optional_ioport m_io_in3; + optional_ioport_array<4> m_io_in; optional_ioport m_io_wheel; /* video-related */ @@ -198,7 +198,6 @@ protected: uint8_t m_palette_lookup[32]{}; /* misc */ - //int32_t m_gx400_irq1_cnt = 0; uint32_t m_speech_offset = 0; uint16_t sound_sharedram_word_r(offs_t offset); From 00d99a4b8784552074f3884cb10369db697bac73 Mon Sep 17 00:00:00 2001 From: cam900 Date: Wed, 11 Mar 2026 07:24:45 +0900 Subject: [PATCH 223/351] video/ky3211_ky10510.cpp: Made TAXAN KY-3211 and KY-10510 into separate devices. (#15010) * sigma/sammymdl.cpp: Separated Sammy medal games from Sigma B-98 games in sigma/sigmab98.cpp. * sigma/sigmab98.cpp: Cleaned up code. * Use multibyte helpers for 16-bit parameters, use BIT helper to extract bits. * Reduced duplication, improved names. * Use abbreviated integer type names consistently. * Updated notes. -sigma/sigmab98.cpp: Marked dodghero as MACHINE_IMPERFECT_TIMING. * Its title screen runs faster than should, which causes desyncing title call. --- scripts/src/video.lua | 12 + src/devices/video/ky3211_ky10510.cpp | 397 +++++++ src/devices/video/ky3211_ky10510.h | 64 ++ src/mame/mame.lst | 26 +- src/mame/sigma/sammymdl.cpp | 1038 +++++++++++++++++ src/mame/sigma/sigmab98.cpp | 1564 +++----------------------- 6 files changed, 1661 insertions(+), 1440 deletions(-) create mode 100644 src/devices/video/ky3211_ky10510.cpp create mode 100644 src/devices/video/ky3211_ky10510.h create mode 100644 src/mame/sigma/sammymdl.cpp diff --git a/scripts/src/video.lua b/scripts/src/video.lua index 535113692f7..fa1407d1f89 100644 --- a/scripts/src/video.lua +++ b/scripts/src/video.lua @@ -787,6 +787,18 @@ if VIDEOS["K053936"] then } end +-------------------------------------------------- +-- +--@src/devices/video/ky3211_ky10510.h,VIDEOS["KY3211_KY10510"] = true +-------------------------------------------------- + +if VIDEOS["KY3211_KY10510"] then + files { + MAME_DIR .. "src/devices/video/ky3211_ky10510.cpp", + MAME_DIR .. "src/devices/video/ky3211_ky10510.h", + } +end + -------------------------------------------------- -- --@src/devices/video/lc7580.h,VIDEOS["LC7580"] = true diff --git a/src/devices/video/ky3211_ky10510.cpp b/src/devices/video/ky3211_ky10510.cpp new file mode 100644 index 00000000000..20b6a4406f0 --- /dev/null +++ b/src/devices/video/ky3211_ky10510.cpp @@ -0,0 +1,397 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia +/* + + TAXAN KY-3211 and KY-10510 Sprite generator + + These chips are sprite generator, with ROZ capability. + Tile size: 16x16, 4bpp or 8bpp, Can be composed to + 32 tiles for both horizontal and vertical independently. + + Later revision, KY-10510 has extended color and slightly + different sprite RAM format. + + used at: + - sigma/sigmab98.cpp + - sigma/sammymdl.cpp + + TODO: + - Verify vregs usage other than background color, + and vtable usage + + -- Original docs from sigma/sigmab98.cpp: + + Sprites (Older chip: TAXAN KY-3211. Newer chip: KY-10510) + + Offset: Bits: Value: + + 0 7654 ---- Color (High, newer chip only?) + ---- 3210 Color + 1 7--- ---- + -6-- ---- 256 Color Sprite (older chip) + --5- ---- + ---4 ---- Flip X (older chip) + ---- 3--- Flip Y (older chip) / 256 Color Sprite (newer chip) + ---- -2-- Draw Sprite + ---- --10 Priority (0 = Front .. 3 = Back) + 2 Tile Code (High) + 3 Tile Code (Low) + 4 7654 3--- Number of X Tiles - 1 + ---- -2-- Flip X (newer chip) + ---- --10 X (High) + 5 X (Low) + 6 7654 3--- Number of Y Tiles - 1 + ---- -2-- Flip Y (newer chip) + ---- --10 Y (High) + 7 Y (Low) + 8 Destination Delta X, Scaled by Shrink Factor << 8 (High) + 9 Destination Delta X, Scaled by Shrink Factor << 8 (Low) + a Destination Delta Y, Scaled by Shrink Factor << 8 (High) + b Destination Delta Y, Scaled by Shrink Factor << 8 (Low) + c 7654 3--- + ---- -210 Source X (High) + d Source X (Low) + e 7654 3--- + ---- -210 Source Y (High) + f Source Y (Low) + + Sprites rotation examples: + logo in dashhero, pepsiman https://youtu.be/p3cbZ67m4lo?t=1m24s, tdoboon https://youtu.be/loPP3jt0Ob0 + + + Video Regs + + Offset: Bits: Value: + + 01 Screen Width / 2 - 1 + 03 + 05 + 07 + 09 Screen Height - 1 + 0b + 0d + 0f + 11 + 13 76-- ---- + --5- ---- VBlank? + ---4 3--- + ---- -2-- Sprites Buffered? + ---- --10 + 15 + 17 + 19 + 1b Background Color (Low) + 1d Background Color (High) + 1f + 21 + +*/ + +#include "emu.h" +#include "ky3211_ky10510.h" + +#include "multibyte.h" + +#include "screen.h" + +constexpr int integer_part(int x) +{ + //return x >> 16; + return (x + 0x8000) >> 16; +} + +GFXDECODE_START( ky3211_device::gfx_ky3211 ) + GFXDECODE_DEVICE(DEVICE_SELF, 0, gfx_16x16x4_packed_lsb, 0, 0x100/16 ) + GFXDECODE_DEVICE(DEVICE_SELF, 0, gfx_16x16x8_raw, 0, 0x100/256 ) +GFXDECODE_END + +// Larger palette +GFXDECODE_START( ky10510_device::gfx_ky10510 ) + GFXDECODE_DEVICE(DEVICE_SELF, 0, gfx_16x16x4_packed_lsb, 0, 0x1000/16 ) + GFXDECODE_DEVICE(DEVICE_SELF, 0, gfx_16x16x8_raw, 0, 0x1000/16 ) +GFXDECODE_END + +DEFINE_DEVICE_TYPE(KY3211, ky3211_device, "ky3211", "TAXAN KY-3211 Sprites") +DEFINE_DEVICE_TYPE(KY10510, ky10510_device, "ky10510", "TAXAN KY-10510 Sprites") + +ky3211_device::ky3211_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, type, tag, owner, clock) + , device_gfx_interface(mconfig, *this) + , m_vregs(*this, "vregs", 0x22, ENDIANNESS_LITTLE) + , m_vtable(*this, "vtable", 0x80, ENDIANNESS_LITTLE) + , m_sprite_bitmap(512, 512) +{ +} + +ky3211_device::ky3211_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ky3211_device(mconfig, KY3211, tag, owner, clock) +{ +} + +ky10510_device::ky10510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : ky3211_device(mconfig, KY10510, tag, owner, clock) +{ +} + +void ky3211_device::save_states() +{ + save_item(NAME(m_sprite_bitmap)); +} + +void ky3211_device::device_start() +{ + decode_gfx(gfx_ky3211); + + save_states(); +} + +void ky10510_device::device_start() +{ + decode_gfx(gfx_ky10510); + gfx(1)->set_granularity(16); + + save_states(); +} + +bool ky3211_device::get_attr(const u8 *src, u32 &color, u8 &gfx, bool &flipx, bool &flipy) +{ + if (BIT(~src[0x01], 2)) + return false; + + color = src[0x00] & 0xf; + gfx = BIT(src[0x01], 6); + flipx = BIT(src[0x01], 4); + flipy = BIT(src[0x01], 3); + + return true; +} + +bool ky10510_device::get_attr(const u8 *src, u32 &color, u8 &gfx, bool &flipx, bool &flipy) +{ + if ((src[0x01] & 0x0c) == 0) + return false; + + color = src[0x00] & 0xff; + gfx = BIT(src[0x01], 3); + flipx = BIT(src[0x04], 2); + flipy = BIT(src[0x06], 2); + + return true; +} + +void ky3211_device::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, const u8 *spriteram, int pri_mask) +{ + const u8 *end = spriteram - 0x10; + const u8 *src = end + 0x1000; + + for (; src != end; src -= 0x10) + { + u32 color; + u8 gfx; + bool flipx, flipy; + if (!get_attr(src, color, gfx, flipx, flipy)) + continue; + + if (((1 << (src[0x01] & 0x03)) & pri_mask) == 0) + continue; + + int code = get_u16be(&src[0x02]); + + const int nx = ((src[0x04] & 0xf8) >> 3) + 1; + int dstx = get_u16be(&src[0x04]) & 0x3ff; + + const int ny = ((src[0x06] & 0xf8) >> 3) + 1; + int dsty = get_u16be(&src[0x06]) & 0x3ff; + + int dstdx = get_u16be(&src[0x08]); // 0x100 = no zoom, 0x200 = 50% zoom + int dstdy = get_u16be(&src[0x0a]); // "" + + int srcx = get_u16be(&src[0x0c]); + int srcy = get_u16be(&src[0x0e]); + + // Sign extend the position + dstx = util::sext(dstx, 10); // or 11? + dsty = util::sext(dsty, 10); + + // Flipping + int x0, x1, dx; + int y0, y1, dy; + + if (flipx) { x0 = nx - 1; x1 = -1; dx = -1; } + else { x0 = 0; x1 = nx; dx = +1; } + + if (flipy) { y0 = ny - 1; y1 = -1; dy = -1; } + else { y0 = 0; y1 = ny; dy = +1; } + + // Draw the sprite directly to screen if no zoom/rotation/offset is required + if (dstdx == 0x100 && !dstdy && !srcx && !srcy) + { + for (int y = y0; y != y1; y += dy) + { + for (int x = x0; x != x1; x += dx) + { + this->gfx(gfx)->transpen(bitmap, cliprect, + code++, color, + flipx, flipy, + dstx + x * 16, dsty + y * 16, 0); + } + } + + continue; + } + + // First draw the sprite in a buffer without zoom/rotation/offset, nor transparency + rectangle sprite_cliprect(0, nx * 16 - 1, 0, ny * 16 - 1); + for (int y = y0; y != y1; y += dy) + { + for (int x = x0; x != x1; x += dx) + { + this->gfx(gfx)->opaque(m_sprite_bitmap, sprite_cliprect, + code++, color, + flipx, flipy, + x * 16, y * 16); + } + } + + // Sign extend the transformation values + dstdx = util::sext(dstdx, 16); + dstdy = util::sext(dstdy, 16); + srcx = util::sext(srcx, 16); + srcy = util::sext(srcy, 16); + dstdy = -dstdy; + + // Use fixed point values (16.16), for accuracy + dstx <<= 16; + dsty <<= 16; + + // Source delta (equal for x and y) + int z = int(sqrt(dstdx * dstdx + dstdy * dstdy) + 0.5); // dest delta vector is scaled by the source delta!? + if (!z) + z = 0x100; + int srcdzz = z << 8; + + // Destination x and y deltas + int dstdxx = (dstdx << 16) / z; // dest x delta for source x increments + int dstdyx = (dstdy << 16) / z; // dest y delta for source x increments + + int dstdxy = -dstdyx; // dest x delta for source y increments (orthogonal to the above vector) + int dstdyy = dstdxx; // dest y delta for source y increments + + // Transform the source offset in a destination offset (negate, scale and rotate it) + srcx = (-srcx << 8) / z; + srcy = (-srcy << 8) / z; + + dstx += srcx * dstdxx; + dsty += srcx * dstdyx; + + dstx += srcy * dstdxy; + dsty += srcy * dstdyy; + + // Supersampling (2x2) to avoid gaps in the destination + srcdzz /= 2; + dstdxx /= 2; + dstdyx /= 2; + dstdxy /= 2; + dstdyy /= 2; + + // Transform the source image while drawing to the screen + u16 const *const src = &m_sprite_bitmap.pix(0); + u16 *const dst = &bitmap.pix(0); + + const int src_rowpixels = m_sprite_bitmap.rowpixels(); + const int dst_rowpixels = bitmap.rowpixels(); + + const u16 penmask = gfx ? 0xff : 0x0f; + + // Scan source image top to bottom + srcy = 0; + for (;;) + { + const int dstx_prev = dstx; + const int dsty_prev = dsty; + + const int fy = integer_part(srcy); + if (fy > sprite_cliprect.max_y) + break; + if (fy >= sprite_cliprect.min_y) + { + // left to right + srcx = 0; + for (;;) + { + int fx = integer_part(srcx); + if (fx > sprite_cliprect.max_x) + break; + if (fx >= sprite_cliprect.min_x) + { + const int px = integer_part(dstx); + const int py = integer_part(dsty); + + if (px >= cliprect.min_x && px <= cliprect.max_x && py >= cliprect.min_y && py <= cliprect.max_y) + { + const u16 pen = src[fy * src_rowpixels + fx]; + if (pen & penmask) + dst[py * dst_rowpixels + px] = pen; + } + } + + // increment source x and dest x,y + srcx += srcdzz; + + dstx += dstdxx; + dsty += dstdyx; + } + } + + // increment source y and dest x,y + srcy += srcdzz; + + dstx = dstx_prev; + dsty = dsty_prev; + dstx += dstdxy; + dsty += dstdyy; + } + } +} + +void ky3211_device::vregs_w(offs_t offset, u8 data) +{ + m_vregs[offset] = data; + + switch (offset) + { + case 0x1b: // background color + case 0x1d: + { + const int x = (m_vregs[0x1d] << 8) + m_vregs[0x1b]; + const int r = (x >> 10) & 0x1f; + const int g = (x >> 5) & 0x1f; + const int b = (x >> 0) & 0x1f; + palette().set_pen_color(0x1000, pal5bit(r), pal5bit(g), pal5bit(b)); + break; + } +// default: +// logerror("%s: unknown video reg written: %02x = %02x\n", machine().describe_context(), offset, data); + } +} + +u8 ky3211_device::vregs_r(offs_t offset) +{ + switch (offset) + { + default: + if (!machine().side_effects_disabled()) + logerror("%s: unknown video reg read: %02x\n", machine().describe_context(), offset); + return m_vregs[offset]; + } +} + +void ky3211_device::vtable_w(offs_t offset, u8 data) +{ + m_vtable[offset] = data; +} + +u8 ky3211_device::vtable_r(offs_t offset) +{ + return m_vtable[offset]; +} diff --git a/src/devices/video/ky3211_ky10510.h b/src/devices/video/ky3211_ky10510.h new file mode 100644 index 00000000000..f5b49f425ec --- /dev/null +++ b/src/devices/video/ky3211_ky10510.h @@ -0,0 +1,64 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia +#ifndef MAME_VIDEO_KY3211_KY10510_H +#define MAME_VIDEO_KY3211_KY10510_H + +#pragma once + +class ky3211_device : public device_t, public device_gfx_interface +{ +public: + ky3211_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template ky3211_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&palette_tag) + : ky3211_device(mconfig, tag, owner, clock) + { + set_palette(std::forward(palette_tag)); + } + + void vregs_w(offs_t offset, u8 data); + u8 vregs_r(offs_t offset); + void vtable_w(offs_t offset, u8 data); + u8 vtable_r(offs_t offset); + + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, const u8 *spriteram, int pri_mask); + +protected: + ky3211_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + + virtual bool get_attr(const u8 *src, u32 &color, u8 &gfx, bool &flipx, bool &flipy); + + void save_states(); + +private: + memory_share_creator m_vregs; + memory_share_creator m_vtable; + bitmap_ind16 m_sprite_bitmap; + + DECLARE_GFXDECODE_MEMBER(gfx_ky3211); +}; + +class ky10510_device : public ky3211_device +{ +public: + ky10510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template ky10510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&palette_tag) + : ky10510_device(mconfig, tag, owner, clock) + { + set_palette(std::forward(palette_tag)); + } + +protected: + virtual void device_start() override ATTR_COLD; + + virtual bool get_attr(const u8 *src, u32 &color, u8 &gfx, bool &flipx, bool &flipy) override; + +private: + DECLARE_GFXDECODE_MEMBER(gfx_ky10510); +}; + +DECLARE_DEVICE_TYPE(KY3211, ky3211_device) +DECLARE_DEVICE_TYPE(KY10510, ky10510_device) + +#endif // MAME_VIDEO_KY3211_KY10510_H diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 616a321df50..0697b4d58f1 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -43489,6 +43489,20 @@ warcadia @source:sigma/r2dtank.cpp r2dtank +@source:sigma/sammymdl.cpp +animalc +gocowboy +gunkids +haekaka +itazuram +kingyosu +kotekita +pyenaget +sammymdl +shatekds +tdoboon +wantouch + @source:sigma/sigma21.cpp sigma21 @@ -43506,28 +43520,16 @@ cool104 freedeal @source:sigma/sigmab98.cpp -animalc b3rinsya dashhero dodghero gegege -gocowboy -gunkids -haekaka -itazuram -kingyosu -kotekita lufykzku mnrockman pepsiman -pyenaget -sammymdl -shatekds sushimar tbeastw2 -tdoboon ucytokyu -wantouch @source:sigma/spiders.cpp spiders diff --git a/src/mame/sigma/sammymdl.cpp b/src/mame/sigma/sammymdl.cpp new file mode 100644 index 00000000000..758db9715e0 --- /dev/null +++ b/src/mame/sigma/sammymdl.cpp @@ -0,0 +1,1038 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia +/************************************************************************************************************* + + -= Sammy Medal Games =- + + driver by Luca Elia + +CPU : Kawasaki KL5C80A12CFP (Z80 Compatible High Speed Microcontroller) +Video : TAXAN KY-3211 +Sound : OKI M9810B +NVRAM : 93C46 and battery backed RAM + +Cartridge based system. Carts contain just some 16Mb flash eeproms. + +Info from Tatsuya Fujita: + +According to some news articles for the AOU show 2002 and 2003 the correct system name +is "Treasure Fall" (despite the cart label is "Treasure Hall"). + +Dumped games: + +1999 Dokidoki Kingyo Sukui https://youtu.be/Z0tOjG_tteU +1999 Shatekids https://youtu.be/aWzYlvm6uIs +2000 Animal Catch https://youtu.be/U4L5EwWbxqw +2000 Itazura Monkey https://youtu.be/GHxiqUQRpV8 +2000 Pye-nage Taikai https://youtu.be/oL2OIbrv-KI +2000 Taihou de Doboon https://youtu.be/loPP3jt0Ob0 +2001 Hae Hae Ka Ka Ka https://youtu.be/37IxYCg0tic +2001 Kotekitai Slot https://youtu.be/IohrnGIma4A +2002 Gun Kids +2003 Go Go Cowboy (EN, prize) https://youtu.be/rymtzmSXjuA +2003 Wantouchable https://youtu.be/aRcTCdZZLRo + +Games with the same cabinet, or in the Treasure Fall series, which might be on the same hardware: + +1999 Otakara Locomo https://youtu.be/J0NwMWO3SdY +2000 Otoshicha Ottotto https://youtu.be/AybhPHTFvMo +2001 Mushitori Meijin +2001 Morino Dodgeball Senshuken https://youtu.be/k98KIRjTYbY +2001 Waiwai Wanage https://youtu.be/4GmwPTk_Er4 +2001 Zarigani Tsuri https://youtu.be/NppRdebkUaQ +2002 Shateki Yokochou https://youtu.be/LPZLWP1x5o8 +2002 Ipponzuri Slot +2002 Karateman https://youtu.be/EIrVHEAv3Sc +2002 Perfect Goal (screenless) https://youtu.be/ilneyp-8dBI +2003 Go Go Cowboy (JP, medal) https://youtu.be/qYDw2sxNRqE +2003 Kurukuru Train https://youtu.be/Ef7TQX4C9fA +2003 Safari Kingdom (screenless) +2003 Zakuzaku Kaizokudan +2004 Animal Punch +2004 Dotabata Zaurus https://youtu.be/Gxt6klOYZ9A +2004 Excite Hockey (screenless) +2004 Fishing Battle (screenless) +2004 Home Run Derby (screenless) +2004 Ninchuu Densetsu https://youtu.be/_ifev_CJROs +2004 Outer Space (screenless) +2004 Pretty Witch Pointe https://youtu.be/lYAwfHyywfA + +Original list from: +http://www.tsc-acnet.com/index.php?sort=8&action=cataloglist&s=1&mode=3&genre_id=40&freeword=%25A5%25B5%25A5%25DF%25A1%25BC + +-------------------------------------------------------------------------------------- + +PCB: + + Sammy AM3AHF-01 SC MAIN PCB VER2 (Etched) + MAIN PCB VER2 VM12-6001-0 (Sticker) + +CPU: + + KAWASAKI KL5C80A12CFP (@U1) - Z80 Compatible High Speed Microcontroller + XTAL 20 MHz (@X1) + MX29F040TC-12 VM1211L01 (@U2) - 4M-bit [512kx8] CMOS Equal Sector Flash Memory + BSI BS62LV256SC-70 (@U4) - Very Low Power/Voltage CMOS SRAM 32K X 8 bit + (or Toshiba TC55257DFL-70L) + +Video: + + TAXAN KY-3211 (@U17) + OKI M548262-60 (@U18) - 262144-Word x 8-Bit Multiport DRAM + XTAL 27 MHz (@X3) + +Sound: + + OKI M9810B (@U11) + XTAL 4.09 MHz (@X2) + Trimmer (@VR1) + Toshiba TA7252AP (@U16) - 5.9W Audio Power Amplifier + +Other: + + Xilinx XC9536 VM1212F01 (@U5) - In-System Programmable CPLD + MX29F0?TC (@U3) - Empty 32 Pin DIP Socket + M5295A (@U8) - Watchdog Timer (Near CUT-DEBUG MODE Jumper) + M93C46MN6T (@U6) - Serial EEPROM + RTC8564 (@U7) - not populated + SN75C1168 (@U10) - Dual RS-422 Transceiver + Cell Battery (@BAT) + 25 Pin Edge Connector + 56 Pin Cartridge Connector + 6 Pin Connector - +5V (1), GND (2), TCLK (3), TDO (4), TDI (5), TMS (6) + +On Go Go Cowboy, U2 and U10 are unpopulated, but U3 is occupied by a +ST M27C4001-10F1 EPROM. + +-------------------------------------------------------------------------------------- + +To Do: + +- Consolidate the sammymdl games in one memory map and run the BIOS without ROM patches +- pyenaget intro: when the theater scrolls out to the left, the train should scroll in from the right, + with no visible gaps. It currently leaves a small gap. +- tdoboon: no smoke from hit planes as shown in the video? Tiles are present (f60-125f) and used in demo mode. + +Notes: + +- "BACKUP RAM NG" error: in test mode, choose "SET MODE" -> "RAM CLEAR" and keep the button pressed for long. + +*************************************************************************************************************/ + +#include "emu.h" + +#include "cpu/z80/kl5c80a12.h" +#include "machine/eepromser.h" +#include "machine/nvram.h" +#include "machine/ticket.h" +#include "machine/timer.h" +#include "machine/watchdog.h" +#include "sound/okim9810.h" +//#include "video/bufsprite.h" +#include "video/ky3211_ky10510.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" + + +namespace { + +class sammymdl_state : public driver_device +{ +public: + sammymdl_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_kp69(*this, "maincpu:kp69") + , m_eeprom(*this, "eeprom") + , m_spritegen(*this, "spritegen") + , m_screen(*this, "screen") + , m_palette(*this, "palette") + //, m_buffered_spriteram(*this, "spriteram") + , m_hopper(*this, "hopper") + , m_hopper_small(*this, "hopper_small") + , m_hopper_large(*this, "hopper_large") + , m_spriteram(*this, "spriteram") + , m_io_coin(*this, "COIN") + , m_leds(*this, "led%u", 0U) + , m_vblank(0) + { } + + void haekaka(machine_config &config) ATTR_COLD; + void gocowboy(machine_config &config) ATTR_COLD; + void tdoboon(machine_config &config) ATTR_COLD; + void animalc(machine_config &config) ATTR_COLD; + void sammymdl(machine_config &config) ATTR_COLD; + void itazuram(machine_config &config) ATTR_COLD; + void pyenaget(machine_config &config) ATTR_COLD; + + void init_itazuram() ATTR_COLD; + void init_animalc() ATTR_COLD; + void init_haekaka() ATTR_COLD; + +protected: + virtual void machine_start() override ATTR_COLD { m_leds.resolve(); } + +private: + TIMER_DEVICE_CALLBACK_MEMBER(gocowboy_int); + + void coin_counter_w(u8 data); + void leds_w(u8 data); + void hopper_w(u8 data); + u8 coin_hopper_r(); + + void gocowboy_leds_w(u8 data); + + void haekaka_leds_w(u8 data); + void haekaka_coin_counter_w(u8 data); + + void show_3_outputs(); + u8 eeprom_r(); + void eeprom_w(u8 data); + + void vblank_w(u8 data); + u8 vblank_r(); + u8 haekaka_vblank_r(); + + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + [[maybe_unused]] void screen_vblank(int state); + + void animalc_io(address_map &map) ATTR_COLD; + void animalc_map(address_map &map) ATTR_COLD; + void base_map(address_map &map) ATTR_COLD; + void gocowboy_io(address_map &map) ATTR_COLD; + void gocowboy_map(address_map &map) ATTR_COLD; + void haekaka_map(address_map &map) ATTR_COLD; + void itazuram_map(address_map &map) ATTR_COLD; + void tdoboon_map(address_map &map) ATTR_COLD; + void video_map(address_map &map) ATTR_COLD; + + // Required devices + required_device m_maincpu; + required_device m_kp69; + required_device m_eeprom; + required_device m_spritegen; + required_device m_screen; + required_device m_palette; + + // Optional devices + //optional_device m_buffered_spriteram; // not on sammymdl? + optional_device m_hopper; + optional_device m_hopper_small; + optional_device m_hopper_large; + + // Shared pointers + required_shared_ptr m_spriteram; + + optional_ioport m_io_coin; + + output_finder<8> m_leds; + + u8 m_out[3]{}; + u8 m_vblank; +}; + + +/*************************************************************************** + + Video + +***************************************************************************/ + +u32 sammymdl_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int layers_ctrl = -1; + +#ifdef MAME_DEBUG + if (machine().input().code_pressed(KEYCODE_Z)) + { + int msk = 0; + if (machine().input().code_pressed(KEYCODE_Q)) msk |= 1; + if (machine().input().code_pressed(KEYCODE_W)) msk |= 2; + if (machine().input().code_pressed(KEYCODE_E)) msk |= 4; + if (machine().input().code_pressed(KEYCODE_R)) msk |= 8; + if (msk != 0) layers_ctrl &= msk; + } +#endif + + bitmap.fill(m_palette->pens()[0x1000], cliprect); + + // Draw from priority 3 (bottom, converted to a bitmask) to priority 0 (top) + //u8* spriteram = (m_buffered_spriteram ? m_buffered_spriteram->buffer() : m_spriteram); + m_spritegen->draw_sprites(bitmap, cliprect, m_spriteram, layers_ctrl & 8); + m_spritegen->draw_sprites(bitmap, cliprect, m_spriteram, layers_ctrl & 4); + m_spritegen->draw_sprites(bitmap, cliprect, m_spriteram, layers_ctrl & 2); + m_spritegen->draw_sprites(bitmap, cliprect, m_spriteram, layers_ctrl & 1); + + return 0; +} + + +/*************************************************************************** + + Memory Maps + +***************************************************************************/ + +void sammymdl_state::video_map(address_map &map) +{ + map(0x70000, 0x70fff).ram().share("spriteram"); + map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); + map(0x72800, 0x7287f).rw(m_spritegen, FUNC(ky3211_device::vtable_r), FUNC(ky3211_device::vtable_w)); + map(0x73000, 0x73021).rw(m_spritegen, FUNC(ky3211_device::vregs_r), FUNC(ky3211_device::vregs_w)); +} + +void sammymdl_state::base_map(address_map &map) +{ + video_map(map); + map(0x00000, 0x0ffff).rom().region("mainbios", 0); + map(0x10000, 0x2ffff).rom().region("maincpu", 0x400); +} + +/*************************************************************************** + Animal Catch +***************************************************************************/ + +u8 sammymdl_state::eeprom_r() +{ + return m_eeprom->do_read() ? 0x80 : 0; +} + +void sammymdl_state::eeprom_w(u8 data) +{ + // latch the bit + m_eeprom->di_write(BIT(data, 6)); + + // reset line asserted: reset. + m_eeprom->cs_write(BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE); + + // clock line asserted: write latch or select next bit to read + m_eeprom->clk_write(BIT(data, 4) ? ASSERT_LINE : CLEAR_LINE); + + if (data & 0x8f) + logerror("%s: unknown eeeprom bits written %02x\n", machine().describe_context(), data); +} + +u8 sammymdl_state::vblank_r() +{ + // mask 0x04 must be set before writing sprite list + // mask 0x10 must be set or irq/00 hangs? + return (m_vblank & ~0x01) | 0x14; +} + +void sammymdl_state::vblank_w(u8 data) +{ + m_vblank = (m_vblank & ~0x03) | (data & 0x03); +} + +void sammymdl_state::screen_vblank(int state) +{ + // rising edge + if (state) + { + m_vblank &= ~0x01; + } +} + +void sammymdl_state::show_3_outputs() +{ +#ifdef MAME_DEBUG + popmessage("COIN: %02X LED: %02X HOP: %02X", m_out[0], m_out[1], m_out[2]); +#endif +} +// Port 31 +void sammymdl_state::coin_counter_w(u8 data) +{ + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); // coin1 in + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); // coin2 in + machine().bookkeeping().coin_counter_w(2, BIT(data, 2)); // medal in + +// machine().bookkeeping().coin_lockout_w(1, BIT(~data, 3)); // coin2 lockout? +// machine().bookkeeping().coin_lockout_w(0, BIT(~data, 4)); // coin1 lockout +// machine().bookkeeping().coin_lockout_w(2, BIT(~data, 5)); // medal lockout? + +// data & 0x80? (gocowboy) + + m_out[0] = data; + show_3_outputs(); +} + +// Port 32 +void sammymdl_state::leds_w(u8 data) +{ + m_leds[0] = BIT(data, 0); // button + + m_out[1] = data; + show_3_outputs(); +} + +// Port b0 +// 02 hopper enable? +// 01 hopper motor on (active low)? +void sammymdl_state::hopper_w(u8 data) +{ + m_hopper->motor_w((!(data & 0x01) && (data & 0x02)) ? 1 : 0); + + m_out[2] = data; + show_3_outputs(); +} + +u8 sammymdl_state::coin_hopper_r() +{ + u8 ret = m_io_coin->read(); + +// if (!m_hopper->read(0)) +// ret &= ~0x01; + + return ret; +} + +void sammymdl_state::animalc_map(address_map &map) +{ + base_map(map); + map(0x60000, 0x63fff).ram().share("nvram"); + map(0x6a000, 0x6ffff).ram(); + map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable? + map(0x73013, 0x73013).rw(FUNC(sammymdl_state::vblank_r), FUNC(sammymdl_state::vblank_w)); // IRQ Ack? +} + +void sammymdl_state::animalc_io(address_map &map) +{ + map.global_mask(0xff); + map(0x90, 0x90).w("oki", FUNC(okim9810_device::write)); + map(0x91, 0x91).w("oki", FUNC(okim9810_device::tmp_register_w)); + map(0x92, 0x92).r("oki", FUNC(okim9810_device::read)); + map(0xb0, 0xb0).w(FUNC(sammymdl_state::hopper_w)); + map(0xc0, 0xc0).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // 1 +} + +/*************************************************************************** + Go Go Cowboy +***************************************************************************/ + +void sammymdl_state::gocowboy_map(address_map &map) +{ + video_map(map); + map(0x00000, 0x5ffff).rom().region("mainbios", 0); + map(0x60000, 0x67fff).ram().share("nvram"); +} + + +void sammymdl_state::gocowboy_leds_w(u8 data) +{ + m_leds[0] = BIT(data, 0); // button + m_leds[1] = BIT(data, 1); // coin lockout? (after coining up, but not for service coin) + m_leds[2] = BIT(data, 2); // ? long after a prize is not collected + m_leds[3] = BIT(data, 3); // ? "don't forget the large prizes" + + // 10 hopper enable? + // 20 hopper motor on (active low)? + m_hopper_small->motor_w(BIT(~data, 5) && BIT(data, 4)); + m_hopper_large->motor_w(BIT(~data, 7) && BIT(data, 6)); + + m_out[1] = data; + show_3_outputs(); +} + +void sammymdl_state::gocowboy_io(address_map &map) +{ + map.global_mask(0xff); + map(0x90, 0x90).rw("oki", FUNC(okim9810_device::read), FUNC(okim9810_device::write)); + map(0x91, 0x91).w("oki", FUNC(okim9810_device::tmp_register_w)); + map(0x92, 0x92).r("oki", FUNC(okim9810_device::read)); + map(0xb0, 0xb0).nopw(); + map(0xc0, 0xc0).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // 1 +} + +/*************************************************************************** + Hae Hae Ka Ka Ka +***************************************************************************/ + +u8 sammymdl_state::haekaka_vblank_r() +{ + return m_screen->vblank() ? 0 : 0x1c; +} + +void sammymdl_state::haekaka_leds_w(u8 data) +{ + // All used + m_leds[0] = BIT(data, 0); + m_leds[1] = BIT(data, 1); + m_leds[2] = BIT(data, 2); + m_leds[3] = BIT(data, 3); + m_leds[4] = BIT(data, 4); + m_leds[5] = BIT(data, 5); + m_leds[6] = BIT(data, 6); + m_leds[7] = BIT(data, 7); + + m_out[1] = data; + show_3_outputs(); +} + +void sammymdl_state::haekaka_coin_counter_w(u8 data) +{ + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); // medal out +// data & 0x02 ? +// data & 0x04 ? +// data & 0x10 ? + + m_out[0] = data; + show_3_outputs(); +} + +void sammymdl_state::haekaka_map(address_map &map) +{ + base_map(map); + map(0x60000, 0x61fff).ram().share("nvram"); + map(0x73013, 0x73013).r(FUNC(sammymdl_state::haekaka_vblank_r)); +} + +/*************************************************************************** + Itazura Monkey +***************************************************************************/ + +void sammymdl_state::itazuram_map(address_map &map) +{ + base_map(map); + map(0x60000, 0x63fff).ram().share("nvram"); + map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable? + map(0x73013, 0x73013).r(FUNC(sammymdl_state::haekaka_vblank_r)).nopw(); // IRQ Ack? +} + +/*************************************************************************** + Taihou de Doboon +***************************************************************************/ + +void sammymdl_state::tdoboon_map(address_map &map) +{ + base_map(map); + map(0x60000, 0x61fff).ram().share("nvram"); + map(0x73013, 0x73013).r(FUNC(sammymdl_state::haekaka_vblank_r)); +} + + +/*************************************************************************** + + Input Ports + +***************************************************************************/ + +static INPUT_PORTS_START( sammymdl ) + PORT_START("BUTTON") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // shot + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // freeze (itazuram) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("COIN") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin1 in + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5) // coin2 in + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(5) PORT_NAME("Medal") // medal in + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // test sw + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + +static INPUT_PORTS_START( haekaka ) + PORT_START("BUTTON") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) PORT_NAME( "Medal" ) // medal in ("chacker") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("COIN") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // test sw + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) // button + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin / set in test mode + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + +static INPUT_PORTS_START( gocowboy ) + PORT_START("BUTTON") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // shoot + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(20) // coin + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper_small", FUNC(ticket_dispenser_device::line_r)) // 1/2' pay sensor (small) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper_large", FUNC(ticket_dispenser_device::line_r)) // 3/4' pay sensor (large) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Meter Switch") // capsule test (pressed while booting) / next in test mode + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset Switch") // reset backup ram (pressed while booting) / previous in test mode + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) // test mode (keep pressed in game) / select in test mode / service coin + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("COIN") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + +/*************************************************************************** + + Machine Drivers + +***************************************************************************/ + +TIMER_DEVICE_CALLBACK_MEMBER(sammymdl_state::gocowboy_int) +{ + const int scanline = param; + + // TODO: what really triggers these? + if (scanline == 240) + { + m_kp69->ir_w<0>(1); + m_kp69->ir_w<0>(0); + } + + if (scanline == 128) + { + m_kp69->ir_w<1>(1); + m_kp69->ir_w<1>(0); + } +} + +void sammymdl_state::sammymdl(machine_config &config) +{ + KL5C80A12(config, m_maincpu, XTAL(20'000'000)); // !! KL5C80A12CFP @ 10MHz? (actually 4 times faster than Z80) !! + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::animalc_map); + m_maincpu->set_addrmap(AS_IO, &sammymdl_state::animalc_io); + m_maincpu->in_p0_callback().set(FUNC(sammymdl_state::eeprom_r)); + m_maincpu->out_p0_callback().set(FUNC(sammymdl_state::eeprom_w)); + m_maincpu->in_p1_callback().set(FUNC(sammymdl_state::coin_hopper_r)); + m_maincpu->in_p2_callback().set_ioport("BUTTON"); + m_maincpu->out_p3_callback().set(FUNC(sammymdl_state::coin_counter_w)); + m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::leds_w)); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // battery backed RAM + EEPROM_93C46_8BIT(config, "eeprom"); + + TICKET_DISPENSER(config, m_hopper, attotime::from_msec(200)); + + WATCHDOG_TIMER(config, "watchdog"); + + // video hardware + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh_hz(60); // ? + m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */); // game reads vblank state + m_screen->set_size(0x140, 0x100); + m_screen->set_visarea(0, 0x140-1, 0, 0xf0-1); + m_screen->set_screen_update(FUNC(sammymdl_state::screen_update)); + m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<0>)); + m_screen->set_palette(m_palette); + + PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x1000 + 1); + m_palette->set_endianness(ENDIANNESS_BIG); + + //BUFFERED_SPRITERAM8(config, m_buffered_spriteram); // not on sammymdl? + KY3211(config, m_spritegen, 0, m_palette); + + // sound hardware + SPEAKER(config, "speaker", 2).front(); + + okim9810_device &oki(OKIM9810(config, "oki", XTAL(4'096'000))); + oki.add_route(0, "speaker", 0.80, 0); + oki.add_route(1, "speaker", 0.80, 1); +} + +void sammymdl_state::animalc(machine_config &config) +{ + sammymdl(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::animalc_map); +} + +void sammymdl_state::gocowboy(machine_config &config) +{ + sammymdl(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::gocowboy_map); + m_maincpu->set_addrmap(AS_IO, &sammymdl_state::gocowboy_io); + m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::gocowboy_leds_w)); + + TIMER(config, "scantimer").configure_scanline(FUNC(sammymdl_state::gocowboy_int), "screen", 0, 1); + + config.device_remove("hopper"); + TICKET_DISPENSER(config, m_hopper_small, attotime::from_msec(200)); + TICKET_DISPENSER(config, m_hopper_large, attotime::from_msec(200)); + + m_screen->screen_vblank().set_nop(); +} + +void sammymdl_state::haekaka(machine_config &config) +{ + sammymdl(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::haekaka_map); + m_maincpu->out_p3_callback().set(FUNC(sammymdl_state::haekaka_coin_counter_w)); + m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::haekaka_leds_w)); + + m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<2>)); +} + +void sammymdl_state::itazuram(machine_config &config) +{ + sammymdl(config); + + TIMER(config, "scantimer").configure_scanline(FUNC(sammymdl_state::gocowboy_int), "screen", 0, 1); + + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::itazuram_map); + + m_screen->screen_vblank().set_nop(); +} + +void sammymdl_state::pyenaget(machine_config &config) +{ + sammymdl(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::haekaka_map); + m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::haekaka_leds_w)); + + m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<2>)); +} + +void sammymdl_state::tdoboon(machine_config &config) +{ + sammymdl(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::tdoboon_map); + + m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<2>)); + m_screen->set_visarea(0,0x140-1, 0+4,0xf0+4-1); +} + + +/*************************************************************************** + + ROMs Loading + +***************************************************************************/ + +#define SAMMYMDL_BIOS \ + ROM_REGION( 0x80000, "mainbios", 0 ) \ + ROM_SYSTEM_BIOS( 0, "v5", "IPL Ver. 5.0" ) /* (c)2003 */ \ + ROMX_LOAD( "vm1211l01.u2", 0x000000, 0x080000, CRC(c3c74dc5) SHA1(07352e6dba7514214e778ba39e1ca773e4698858), ROM_BIOS(0) ) \ + ROM_SYSTEM_BIOS( 1, "v4", "IPL Ver. 4.0" ) /* (c)2000, ROM patches not correct for this BIOS */ \ + ROMX_LOAD( "mt201l04.u012", 0x000000, 0x080000, CRC(c8c6d25f) SHA1(5be39fa72b65f2e455ccc146dbab58d24ab46505), ROM_BIOS(1) ) \ + ROM_SYSTEM_BIOS( 2, "v1", "IPL Ver. 1.0" ) /* (c)1999, ROM patches not correct for this BIOS */ \ + ROMX_LOAD( "vm1201l01.u012", 0x000000, 0x080000, CRC(21b2ccbd) SHA1(c3ceea196e5c1c6a9e03cf3a22e9f25f0099a38e), ROM_BIOS(2) ) + +ROM_START( sammymdl ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + + ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASEFF ) + ROM_COPY( "mainbios", 0x00fc00, 0x0000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", ROMREGION_ERASEFF ) +ROM_END + +/*************************************************************************** + + Animal Catch ( VX2002L02 ANIMALCAT 200011211536 SAMMY CORP. AM ) + + Sammy AM3ADT-01 Memory Card Type 3: + 1 x MX29F1610ATC-12 (@U021) + 1 x MX29F1610TC-12 (@U016) + +***************************************************************************/ + +ROM_START( animalc ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(84cf123b) SHA1(d8b425c93ff1a560e3f92c70d7eb93a05c3581af) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(4ae14ff9) SHA1(1273d15ea642452fecacff572655cd3ab47a5884) ) // 1xxxxxxxxxxxxxxxxxxxx = 0x00 +ROM_END + +ROM_START( gunkids ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(3d989a45) SHA1(f4e1dc13bfe9ef8bf733735b6647946dda6962f2) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(5e356b68) SHA1(0e4e28b02dcb5ff7d2a7139c5cdf31cbd08167f4) ) +ROM_END + +ROM_START( wantouch ) // ワンタッチャブル + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(fe00ac87) SHA1(97c3defafd04f48984e5f2fe34528ada024355c5) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(cd8d4478) SHA1(224e8e0e9a49f10515e0ebf9a5e97d8adc7eed13) ) +ROM_END + +ROM_START( kotekita ) // こてき隊（たい）スロット + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(37faa4a9) SHA1(619135d74052fb2272ce78976c2aa59a65244f12) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(e471c1ef) SHA1(4ddf3261d8736888ebbdbd0d755aad75987b3b3d) ) +ROM_END + +void sammymdl_state::init_animalc() +{ + u8 *rom = memregion("mainbios")->base(); + + // video timing loops + rom[0x015d9] = 0x00; + rom[0x015da] = 0x00; + rom[0x01605] = 0x00; + rom[0x01606] = 0x00; + rom[0x01750] = 0x00; + rom[0x01751] = 0x00; + + // force jump out of BIOS loop + rom[0x005ac] = 0xc3; +} + +/*************************************************************************** + + Go Go Cowboy + + Cart: + + ガムボール <- gumball + with プライズ <- with prize + EM5701L01 + EM5701L01 + + PCB: + + Sammy AM3AHF-01 SC MAIN PCB VER2 (Etched) + SC MAIN PCB VER2(GUM) 5049-6001-0 (Sticker) + +***************************************************************************/ + +ROM_START( gocowboy ) + ROM_REGION( 0x80000, "mainbios", 0 ) + ROM_LOAD( "go_go_cowboy_gpt_2c9c.u3", 0x00000, 0x80000, CRC(ad9b1de6) SHA1(24809ec3a579d28189a98190db70a33217e4f8bc) ) // uses custom BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "em702l01.u021", 0x000000, 0x200000, CRC(4c4289fe) SHA1(517b5a1e9d91e7ed322b4792d863e7abda835d4a) ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "em701l01.u016", 0x000000, 0x200000, CRC(c1f07320) SHA1(734717140e66ddcf0bded1489156c51cdaf1b50c) ) + + ROM_REGION( 0x80, "eeprom", 0 ) + ROM_LOAD( "st93c46.u6", 0x00, 0x80, CRC(1af2d376) SHA1(afbe953f1a9ff0152fe1092a83482695dbe5e75d) ) + + ROM_REGION( 0x5cde, "pld", 0 ) + ROM_LOAD( "vm1212f01.u5.jed", 0x0000, 0x5cde, CRC(b86a1825) SHA1(cc2e633fb8a24cfc93291a778b0964089f6b8ac7) ) +ROM_END + +/*************************************************************************** + + Itazura Monkey ( VX1902L02 ITZRMONKY 200011211639 SAMMY CORP. AM ) + + Sammy AM3ADT-01 Memory Card Type 3: + 2 x MX29F1610ATC-12 + +***************************************************************************/ + +ROM_START( itazuram ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx2002l01.u021", 0x00000, 0x200000, CRC(ddbdd2f3) SHA1(91f67a938929be0261442e066e3d2c03b5e9f06a) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx2001l01.u016", 0x00000, 0x200000, CRC(9ee95222) SHA1(7154d43ef312a48a882207ca37e1c61e8b215a9b) ) +ROM_END + +void sammymdl_state::init_itazuram() +{ + u8 *rom = memregion("mainbios")->base(); + + // force jump out of BIOS loop + rom[0x005ac] = 0xc3; +} + +/*************************************************************************** + + Taihou de Doboon ( EM4210L01 PUSHERDBN 200203151028 SAMMY CORP. AM ) + + Sammy AM3ADT-01 Memory Card Type 3: + 2 x MX29F1610ATC-12 + + The flash roms found in the cart are labeled: + + vx1801l01.u016 + vx1802l01.u021 + + which correspond to "Pye-nage Taikai". But they were reflashed with the + software noted in the sticker on the back of the cart (rom names reflect that): + + System: Treasure Hall + Soft: Taihou de Doboon + 2003.02.14 + Char Rev: EM4209L01 + Pro Rev: EM4210L01 + +***************************************************************************/ + +ROM_START( tdoboon ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "em4210l01.u021", 0x00000, 0x200000, CRC(3523e314) SHA1(d07c5d17d3f285be4cde810547f427e84f98968f) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "em4209l01.u016", 0x00000, 0x200000, CRC(aca220fa) SHA1(7db441add16af554700e597fd9926b6ccd19d628) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF +ROM_END + +/*************************************************************************** + + Pye-nage Taikai ( VX1802L01 PAINAGETK 200011021216 SAMMY CORP. AM. ) + + Sammy AM3ADT-01 Memory Card Type 3: + 2 x MX29F1610ATC-12 + +***************************************************************************/ + +ROM_START( pyenaget ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx1802l01.u021", 0x00000, 0x200000, CRC(7a22a657) SHA1(2a98085862fd958209253c5401e41eae4f7c06ea) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx1801l01.u016", 0x00000, 0x200000, CRC(c4607403) SHA1(f4f4699442afccc5ed4354447f91b1bee36ae3e5) ) +ROM_END + +/*************************************************************************** + + Hae Hae Ka Ka Ka ( EM4208L01 PUSHERHAEHAE 200203151032 SAMMY CORP. AM ) + + Sammy AM3ADT-01 Memory Card Type 3: + 2 x MX29F1610ATC-12 + + The flash roms found in the cart are labeled: + + vx1801l01.u016 + vx1802l01.u021 + + which correspond to "Pye-nage Taikai". But they were reflashed with the + software noted in the sticker on the back of the cart (rom names reflect that): + + System: Treasure Hall + Soft: Hae Hae Ka Ka Ka + 2003.02.14 + Char Rev: EM4207L01 + Pro Rev: EM4208L01 + +***************************************************************************/ + +ROM_START( haekaka ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "em4208l01.u021", 0x00000, 0x200000, CRC(d23bb748) SHA1(38d5b6c4b2cd470b3a68574aeca3f9fa9032245e) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "em4207l01.u016", 0x00000, 0x200000, CRC(3876961c) SHA1(3d842c1f63ea5aa7e799967928b86c5fabb4e65e) ) +ROM_END + +void sammymdl_state::init_haekaka() +{ + u8 *rom = memregion("mainbios")->base(); + + // force jump out of BIOS loop + rom[0x005ac] = 0xc3; +} + +ROM_START( kingyosu ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "vx1302l02.u021", 0x00000, 0x200000, CRC(45e43e3c) SHA1(71ada38c1f65738ca75ca75d2272f310ba43c72c) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "vx1301l01.u016", 0x00000, 0x200000, CRC(25dfbf4c) SHA1(8f9552cf54bdf7490055ebdb23fa758f5cddafb5) ) +ROM_END + +ROM_START( shatekds ) + SAMMYMDL_BIOS + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) + ROM_LOAD( "29f016a.u015", 0x00000, 0x200000, CRC(7c779286) SHA1(db688ac2cad14c642e6da770212217a466e1bb64) ) + + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) + + ROM_REGION( 0x200000, "spritegen", 0 ) + ROM_LOAD( "mx29f1610tc.u016", 0x00000, 0x200000, CRC(6e7d2c7d) SHA1(747d54eee26631966a91fd26b8b4beb32b67ddb7) ) +ROM_END + +} // anonymous namespace + + +/*************************************************************************** + + Game Drivers + +***************************************************************************/ + +GAME( 1999, sammymdl, 0, sammymdl, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Sammy Medal Game System BIOS", MACHINE_IS_BIOS_ROOT ) +GAME( 1999, kingyosu, sammymdl, itazuram, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Dokidoki Kingyo Sukui", 0 ) +GAME( 1999, shatekds, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Shatekids", 0 ) +GAME( 2000, animalc, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Animal Catch", 0 ) +GAME( 2000, itazuram, sammymdl, itazuram, sammymdl, sammymdl_state, init_itazuram, ROT0, "Sammy", "Itazura Monkey", 0 ) +GAME( 2000, pyenaget, sammymdl, pyenaget, sammymdl, sammymdl_state, init_haekaka, ROT0, "Sammy", "Pye-nage Taikai", 0 ) +GAME( 2000, tdoboon, sammymdl, tdoboon, haekaka, sammymdl_state, init_haekaka, ROT0, "Sammy", "Taihou de Doboon", 0 ) +GAME( 2001, haekaka, sammymdl, haekaka, haekaka, sammymdl_state, init_haekaka, ROT0, "Sammy", "Hae Hae Ka Ka Ka", 0 ) +GAME( 2001, kotekita, sammymdl, haekaka, sammymdl, sammymdl_state, init_haekaka, ROT0, "Sammy", "Kotekitai Slot", 0 ) +GAME( 2002, gunkids, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Hayauchi Gun Kids", 0 ) +GAME( 2003, wantouch, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Wantouchable", 0 ) +GAME( 2003, gocowboy, 0, gocowboy, gocowboy, sammymdl_state, empty_init, ROT0, "Sammy", "Go Go Cowboy (English, prize)", 0 ) diff --git a/src/mame/sigma/sigmab98.cpp b/src/mame/sigma/sigmab98.cpp index 98b0b72bff9..16d638bc3b0 100644 --- a/src/mame/sigma/sigmab98.cpp +++ b/src/mame/sigma/sigmab98.cpp @@ -2,7 +2,7 @@ // copyright-holders:Luca Elia /************************************************************************************************************* - -= Sigma B-98 Hardware / Sammy Medal Games =- + -= Sigma B-98 Hardware =- driver by Luca Elia @@ -36,86 +36,19 @@ Dumped games: ROMs: Video: -------------------------------------------------------------------------------------- -Sammy Kids Medal Series - -CPU : Kawasaki KL5C80A12CFP (Z80 Compatible High Speed Microcontroller) -Video : TAXAN KY-3211 -Sound : OKI M9810B -NVRAM : 93C46 and battery backed RAM - -Cartridge based system. Carts contain just some 16Mb flash eeproms. - -Info from Tatsuya Fujita: - -According to some news articles for the AOU show 2002 and 2003 the correct system name -is "Treasure Fall" (despite the cart label is "Treasure Hall"). - -Dumped games: - -1999 Dokidoki Kingyo Sukui https://youtu.be/Z0tOjG_tteU -1999 Shatekids https://youtu.be/aWzYlvm6uIs -2000 Animal Catch https://youtu.be/U4L5EwWbxqw -2000 Itazura Monkey https://youtu.be/GHxiqUQRpV8 -2000 Pye-nage Taikai https://youtu.be/oL2OIbrv-KI -2000 Taihou de Doboon https://youtu.be/loPP3jt0Ob0 -2001 Hae Hae Ka Ka Ka https://youtu.be/37IxYCg0tic -2001 Kotekitai Slot https://youtu.be/IohrnGIma4A -2002 Gun Kids -2003 Go Go Cowboy (EN, prize) https://youtu.be/rymtzmSXjuA -2003 Wantouchable https://youtu.be/aRcTCdZZLRo - -Games with the same cabinet, or in the Treasure Fall series, which might be on the same hardware: - -1999 Otakara Locomo https://youtu.be/J0NwMWO3SdY -2000 Otoshicha Ottotto https://youtu.be/AybhPHTFvMo -2001 Mushitori Meijin -2001 Morino Dodgeball Senshuken https://youtu.be/k98KIRjTYbY -2001 Waiwai Wanage https://youtu.be/4GmwPTk_Er4 -2001 Zarigani Tsuri https://youtu.be/NppRdebkUaQ -2002 Shateki Yokochou https://youtu.be/LPZLWP1x5o8 -2002 Ipponzuri Slot -2002 Karateman https://youtu.be/EIrVHEAv3Sc -2002 Perfect Goal (screenless) https://youtu.be/ilneyp-8dBI -2003 Go Go Cowboy (JP, medal) https://youtu.be/qYDw2sxNRqE -2003 Kurukuru Train https://youtu.be/Ef7TQX4C9fA -2003 Safari Kingdom (screenless) -2003 Zakuzaku Kaizokudan -2004 Animal Punch -2004 Dotabata Zaurus https://youtu.be/Gxt6klOYZ9A -2004 Excite Hockey (screenless) -2004 Fishing Battle (screenless) -2004 Home Run Derby (screenless) -2004 Ninchuu Densetsu https://youtu.be/_ifev_CJROs -2004 Outer Space (screenless) -2004 Pretty Witch Pointe https://youtu.be/lYAwfHyywfA - -Original list from: -http://www.tsc-acnet.com/index.php?sort=8&action=cataloglist&s=1&mode=3&genre_id=40&freeword=%25A5%25B5%25A5%25DF%25A1%25BC - --------------------------------------------------------------------------------------- - To Do: -- Consolidate the sammymdl games in one memory map and run the BIOS without ROM patches - Remove ROM patches: gegege checks the EEPROM output after reset, and wants a timed 0->1 transition or locks up while saving setting in service mode. Using a reset_delay of 7 works, unless when "play style" is set to "coin" (it probably changes the number of reads from port $C0). - I guess the reset_delay mechanism should be implemented with a timer in eeprom.c. -- pyenaget intro: when the theater scrolls out to the left, the train should scroll in from the right, - with no visible gaps. It currently leaves a small gap. -- tdoboon: no smoke from hit planes as shown in the video? Tiles are present (f60-125f) and used in demo mode. + I guess the reset_delay mechanism should be implemented with a timer in eepromser.cpp. - dashhero does not acknowledge the button bashing correctly, it's very hard to win (a slower pace works better!) - dodghero and sushimar often write zeroes to 81XX1 and 00XX1 for some reason (maybe just sloppy coding?) -Notes: - -- "BACKUP RAM NG" error: in test mode, choose "SET MODE" -> "RAM CLEAR" and keep the button pressed for long. - *************************************************************************************************************/ #include "emu.h" -#include "cpu/z80/kl5c80a12.h" #include "cpu/z80/ky80.h" #include "machine/74165.h" #include "machine/eepromser.h" @@ -127,6 +60,7 @@ Notes: #include "sound/okim9810.h" #include "sound/ymz280b.h" #include "video/bufsprite.h" +#include "video/ky3211_ky10510.h" #include "emupal.h" #include "screen.h" @@ -135,110 +69,77 @@ Notes: namespace { -class sigmab98_base_state : public driver_device -{ -public: - sigmab98_base_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_screen(*this, "screen") - , m_palette(*this, "palette") - , m_gfxdecode(*this, "gfxdecode") - , m_buffered_spriteram(*this, "spriteram") - , m_spriteram(*this, "spriteram") - , m_vregs(*this, "vregs") - , m_vtable(*this, "vtable") - , m_new_sprite_chip(false) - , m_vblank(0) - { } - -protected: - virtual void video_start() override ATTR_COLD; - - // TODO: unify these handlers - void vregs_w(offs_t offset, uint8_t data); - uint8_t vregs_r(offs_t offset); - uint8_t d013_r(); - uint8_t d021_r(); - void vblank_w(uint8_t data); - uint8_t vblank_r(); - uint8_t haekaka_vblank_r(); - - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - - [[maybe_unused]] void screen_vblank_sammymdl(int state); - - // Required devices - required_device m_screen; - required_device m_palette; - required_device m_gfxdecode; - - // Optional devices - optional_device m_buffered_spriteram; // not on sammymdl? - - // Shared pointers - required_shared_ptr m_spriteram; - required_shared_ptr m_vregs; - required_shared_ptr m_vtable; - - std::unique_ptr m_sprite_bitmap; - - bool m_new_sprite_chip; // KY-10510 has a slightly different sprite format than KY-3211 - - uint8_t m_vblank; -}; - - -class sigmab98_state : public sigmab98_base_state +class sigmab98_state : public driver_device { public: sigmab98_state(const machine_config &mconfig, device_type type, const char *tag) - : sigmab98_base_state(mconfig, type, tag) + : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_hopper(*this, "hopper") + , m_spritegen(*this, "spritegen") + , m_screen(*this, "screen") + , m_palette(*this, "palette") , m_eeprom(*this, "eeprom") + , m_buffered_spriteram(*this, "spriteram") + , m_spriteram(*this, "spriteram") , m_leds(*this, "led%u", 0U) + , m_vblank(0) { } - void sigmab98(machine_config &config); - void dodghero(machine_config &config); + void sigmab98(machine_config &config) ATTR_COLD; + void dodghero(machine_config &config) ATTR_COLD; - void init_b3rinsya(); - void init_tbeastw2(); - void init_dashhero(); - void init_gegege(); - void init_pepsiman(); - void init_ucytokyu(); + void init_b3rinsya() ATTR_COLD; + void init_tbeastw2() ATTR_COLD; + void init_dashhero() ATTR_COLD; + void init_gegege() ATTR_COLD; + void init_pepsiman() ATTR_COLD; + void init_ucytokyu() ATTR_COLD; protected: - void c4_w(uint8_t data); - void c6_w(uint8_t data); - void c8_w(uint8_t data); + virtual void machine_start() override ATTR_COLD { m_leds.resolve(); } + + void c4_w(u8 data); + void c6_w(u8 data); + void c8_w(u8 data); void show_outputs(); - void eeprom_w(uint8_t data); + void eeprom_w(u8 data); + + // TODO: unify these handlers + u8 d013_r(); + u8 d021_r(); INTERRUPT_GEN_MEMBER(sigmab98_vblank_interrupt); + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void dodghero_mem_map(address_map &map) ATTR_COLD; void gegege_io_map(address_map &map) ATTR_COLD; void gegege_mem_map(address_map &map) ATTR_COLD; - - virtual void machine_start() override { m_leds.resolve(); } + void video_map(address_map &map) ATTR_COLD; // Required devices required_device m_maincpu; required_device m_hopper; + required_device m_spritegen; + required_device m_screen; + required_device m_palette; // Optional devices optional_device m_eeprom; + optional_device m_buffered_spriteram; // not on sammymdl? + + // Shared pointers + required_shared_ptr m_spriteram; output_finder<4> m_leds; - uint8_t m_c0 = 0; - uint8_t m_c4 = 0; - uint8_t m_c6 = 0; - uint8_t m_c8 = 0; + u8 m_c0 = 0; + u8 m_c4 = 0; + u8 m_c6 = 0; + u8 m_c8 = 0; + u8 m_vblank; }; @@ -251,106 +152,36 @@ public: , m_dsw_shifter(*this, "ttl165_%u", 1U) , m_dsw_bit(0) { - m_new_sprite_chip = true; } - void init_lufykzku(); - void init_rockman(); - void lufykzku(machine_config &config); - void rockman(machine_config& config); + void lufykzku(machine_config &config) ATTR_COLD; + void mnrockman(machine_config &config) ATTR_COLD; + + void init_lufykzku() ATTR_COLD; + void init_mnrockman() ATTR_COLD; private: required_device m_watchdog; required_device_array m_dsw_shifter; - int m_dsw_bit; void dsw_w(int state); - void lufykzku_c4_w(uint8_t data); - void lufykzku_c6_w(uint8_t data); - uint8_t lufykzku_c8_r(); - void lufykzku_c8_w(uint8_t data); - void lufykzku_watchdog_w(uint8_t data); + void lufykzku_c4_w(u8 data); + void lufykzku_c6_w(u8 data); + u8 lufykzku_c8_r(); + void lufykzku_c8_w(u8 data); + void lufykzku_watchdog_w(u8 data); TIMER_DEVICE_CALLBACK_MEMBER(lufykzku_irq); - TIMER_DEVICE_CALLBACK_MEMBER(rockman_timer_irq); + TIMER_DEVICE_CALLBACK_MEMBER(mnrockman_timer_irq); void lufykzku_io_map(address_map &map) ATTR_COLD; void lufykzku_mem_map(address_map &map) ATTR_COLD; - uint8_t m_vblank_vector = 0; - uint8_t m_timer0_vector = 0; - uint8_t m_timer1_vector = 0; -}; - - -class sammymdl_state : public sigmab98_base_state -{ -public: - sammymdl_state(const machine_config &mconfig, device_type type, const char *tag) - : sigmab98_base_state(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - , m_kp69(*this, "maincpu:kp69") - , m_eeprom(*this, "eeprom") - , m_hopper(*this, "hopper") - , m_hopper_small(*this, "hopper_small") - , m_hopper_large(*this, "hopper_large") - , m_leds(*this, "led%u", 0U) - { } - - void haekaka(machine_config &config); - void gocowboy(machine_config &config); - void tdoboon(machine_config &config); - void animalc(machine_config &config); - void sammymdl(machine_config &config); - void itazuram(machine_config &config); - void pyenaget(machine_config &config); - - void init_itazuram(); - void init_animalc(); - void init_haekaka(); - -protected: - virtual void machine_start() override { m_leds.resolve(); } - -private: - TIMER_DEVICE_CALLBACK_MEMBER(gocowboy_int); - - void coin_counter_w(uint8_t data); - void leds_w(uint8_t data); - void hopper_w(uint8_t data); - uint8_t coin_hopper_r(); - - void gocowboy_leds_w(uint8_t data); - - void haekaka_leds_w(uint8_t data); - void haekaka_coin_counter_w(uint8_t data); - - void show_3_outputs(); - uint8_t eeprom_r(); - void eeprom_w(uint8_t data); - - void animalc_io(address_map &map) ATTR_COLD; - void animalc_map(address_map &map) ATTR_COLD; - void gocowboy_io(address_map &map) ATTR_COLD; - void gocowboy_map(address_map &map) ATTR_COLD; - void haekaka_map(address_map &map) ATTR_COLD; - void itazuram_map(address_map &map) ATTR_COLD; - void tdoboon_map(address_map &map) ATTR_COLD; - - // Required devices - required_device m_maincpu; - required_device m_kp69; - required_device m_eeprom; - - // Optional devices - optional_device m_hopper; - optional_device m_hopper_small; - optional_device m_hopper_large; - - output_finder<8> m_leds; - - uint8_t m_out[3]; + u8 m_dsw_bit; + u8 m_vblank_vector = 0; + u8 m_timer0_vector = 0; + u8 m_timer1_vector = 0; }; @@ -360,234 +191,7 @@ private: ***************************************************************************/ -void sigmab98_base_state::video_start() -{ - m_sprite_bitmap = std::make_unique(512, 512); -} - -/*************************************************************************** - - Sprites (Older chip: TAXAN KY-3211. Newer chip: KY-10510) - - Offset: Bits: Value: - - 0 7654 ---- Color (High, newer chip only?) - ---- 3210 Color - 1 7--- ---- - -6-- ---- 256 Color Sprite (older chip) - --5- ---- - ---4 ---- Flip X (older chip) - ---- 3--- Flip Y (older chip) / 256 Color Sprite (newer chip) - ---- -2-- Draw Sprite - ---- --10 Priority (0 = Front .. 3 = Back) - 2 Tile Code (High) - 3 Tile Code (Low) - 4 7654 3--- Number of X Tiles - 1 - ---- -2-- Flip X (newer chip) - ---- --10 X (High) - 5 X (Low) - 6 7654 3--- Number of Y Tiles - 1 - ---- -2-- Flip Y (newer chip) - ---- --10 Y (High) - 7 Y (Low) - 8 Destination Delta X, Scaled by Shrink Factor << 8 (High) - 9 Destination Delta X, Scaled by Shrink Factor << 8 (Low) - a Destination Delta Y, Scaled by Shrink Factor << 8 (High) - b Destination Delta Y, Scaled by Shrink Factor << 8 (Low) - c 7654 3--- - ---- -210 Source X (High) - d Source X (Low) - e 7654 3--- - ---- -210 Source Y (High) - f Source Y (Low) - - Sprites rotation examples: - logo in dashhero, pepsiman https://youtu.be/p3cbZ67m4lo?t=1m24s, tdoboon https://youtu.be/loPP3jt0Ob0 - -***************************************************************************/ - -inline int integer_part(int x) -{ -// return x >> 16; - return (x + 0x8000) >> 16; -} - -void sigmab98_base_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int pri_mask) -{ - uint8_t *end = (m_buffered_spriteram ? m_buffered_spriteram->buffer() : m_spriteram) - 0x10; - uint8_t *s = end + 0x1000; - - for ( ; s != end; s -= 0x10 ) - { - if ( (s[ 0x01 ] & (m_new_sprite_chip ? 0x0c : 0x04)) == 0) - continue; - - if ( ((1 << (s[ 0x01 ] & 0x03)) & pri_mask) == 0 ) - continue; - - int color = s[ 0x00 ] & (m_new_sprite_chip ? 0xff : 0xf); - - int gfx = (s[ 0x01 ] & (m_new_sprite_chip ? 0x08 : 0x40)) ? 1 : 0; - int code = s[ 0x02 ] * 256 + s[ 0x03 ]; - - int nx = ((s[ 0x04 ] & 0xf8) >> 3) + 1; - int dstx = (s[ 0x04 ] & 0x03) * 256 + s[ 0x05 ]; - - int ny = ((s[ 0x06 ] & 0xf8) >> 3) + 1; - int dsty = (s[ 0x06 ] & 0x03) * 256 + s[ 0x07 ]; - - int dstdx = (s[ 0x08 ] & 0xff) * 256 + s[ 0x09 ]; // 0x100 = no zoom, 0x200 = 50% zoom - int dstdy = (s[ 0x0a ] & 0xff) * 256 + s[ 0x0b ]; // "" - - int srcx = (s[ 0x0c ] & 0xff) * 256 + s[ 0x0d ]; - int srcy = (s[ 0x0e ] & 0xff) * 256 + s[ 0x0f ]; - - // Sign extend the position - dstx = (dstx & 0x01ff) - (dstx & 0x0200); // or 0x3ff/0x400? - dsty = (dsty & 0x01ff) - (dsty & 0x0200); - - // Flipping - int x0, x1, dx, flipx = m_new_sprite_chip ? s[ 0x04 ] & 0x04 : s[ 0x01 ] & 0x10; - int y0, y1, dy, flipy = m_new_sprite_chip ? s[ 0x06 ] & 0x04 : s[ 0x01 ] & 0x08; - - if ( flipx ) { x0 = nx - 1; x1 = -1; dx = -1; } - else { x0 = 0; x1 = nx; dx = +1; } - - if ( flipy ) { y0 = ny - 1; y1 = -1; dy = -1; } - else { y0 = 0; y1 = ny; dy = +1; } - - // Draw the sprite directly to screen if no zoom/rotation/offset is required - if (dstdx == 0x100 && !dstdy && !srcx && !srcy) - { - for (int y = y0; y != y1; y += dy) - { - for (int x = x0; x != x1; x += dx) - { - m_gfxdecode->gfx(gfx)->transpen(bitmap, cliprect, - code++, color, - flipx, flipy, - dstx + x * 16, dsty + y * 16, 0); - } - } - - continue; - } - - // First draw the sprite in a buffer without zoom/rotation/offset, nor transparency - rectangle sprite_cliprect(0, nx * 16 - 1, 0, ny * 16 - 1); - for (int y = y0; y != y1; y += dy) - { - for (int x = x0; x != x1; x += dx) - { - m_gfxdecode->gfx(gfx)->opaque(*m_sprite_bitmap, sprite_cliprect, - code++, color, - flipx, flipy, - x * 16, y * 16); - } - } - - // Sign extend the transformation values - dstdx = (dstdx & 0x7fff) - (dstdx & 0x8000); - dstdy = (dstdy & 0x7fff) - (dstdy & 0x8000); - srcx = (srcx & 0x7fff) - (srcx & 0x8000); - srcy = (srcy & 0x7fff) - (srcy & 0x8000); - dstdy = -dstdy; - - // Use fixed point values (16.16), for accuracy - dstx <<= 16; - dsty <<= 16; - - // Source delta (equal for x and y) - int z = int( sqrt(dstdx * dstdx + dstdy * dstdy) + 0.5 ); // dest delta vector is scaled by the source delta!? - if (!z) - z = 0x100; - int srcdzz = z << 8; - - // Destination x and y deltas - int dstdxx = (dstdx << 16) / z; // dest x delta for source x increments - int dstdyx = (dstdy << 16) / z; // dest y delta for source x increments - - int dstdxy = -dstdyx; // dest x delta for source y increments (orthogonal to the above vector) - int dstdyy = dstdxx; // dest y delta for source y increments - - // Transform the source offset in a destination offset (negate, scale and rotate it) - srcx = (-srcx << 8) / z; - srcy = (-srcy << 8) / z; - - dstx += srcx * dstdxx; - dsty += srcx * dstdyx; - - dstx += srcy * dstdxy; - dsty += srcy * dstdyy; - - // Supersampling (2x2) to avoid gaps in the destination - srcdzz /= 2; - dstdxx /= 2; - dstdyx /= 2; - dstdxy /= 2; - dstdyy /= 2; - - // Transform the source image while drawing to the screen - uint16_t const *const src = &m_sprite_bitmap->pix(0); - uint16_t *const dst = &bitmap.pix(0); - - int src_rowpixels = m_sprite_bitmap->rowpixels(); - int dst_rowpixels = bitmap.rowpixels(); - - uint16_t penmask = gfx ? 0xff : 0x0f; - - // Scan source image top to bottom - srcy = 0; - for (;;) - { - int dstx_prev = dstx; - int dsty_prev = dsty; - - int fy = integer_part(srcy); - if (fy > sprite_cliprect.max_y) - break; - if (fy >= sprite_cliprect.min_y) - { - // left to right - srcx = 0; - for (;;) - { - int fx = integer_part(srcx); - if (fx > sprite_cliprect.max_x) - break; - if (fx >= sprite_cliprect.min_x) - { - int px = integer_part(dstx); - int py = integer_part(dsty); - - if (px >= cliprect.min_x && px <= cliprect.max_x && py >= cliprect.min_y && py <= cliprect.max_y) - { - uint16_t pen = src[fy * src_rowpixels + fx]; - if (pen & penmask) - dst[py * dst_rowpixels + px] = pen; - } - } - - // increment source x and dest x,y - srcx += srcdzz; - - dstx += dstdxx; - dsty += dstdyx; - } - } - - // increment source y and dest x,y - srcy += srcdzz; - - dstx = dstx_prev; - dsty = dsty_prev; - dstx += dstdxy; - dsty += dstdyy; - } - } -} - -uint32_t sigmab98_base_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +u32 sigmab98_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { int layers_ctrl = -1; @@ -606,77 +210,16 @@ uint32_t sigmab98_base_state::screen_update(screen_device &screen, bitmap_ind16 bitmap.fill(m_palette->pens()[0x1000], cliprect); // Draw from priority 3 (bottom, converted to a bitmask) to priority 0 (top) - draw_sprites(bitmap, cliprect, layers_ctrl & 8); - draw_sprites(bitmap, cliprect, layers_ctrl & 4); - draw_sprites(bitmap, cliprect, layers_ctrl & 2); - draw_sprites(bitmap, cliprect, layers_ctrl & 1); + u8* spriteram = (m_buffered_spriteram ? m_buffered_spriteram->buffer() : m_spriteram); + m_spritegen->draw_sprites(bitmap, cliprect, spriteram, layers_ctrl & 8); + m_spritegen->draw_sprites(bitmap, cliprect, spriteram, layers_ctrl & 4); + m_spritegen->draw_sprites(bitmap, cliprect, spriteram, layers_ctrl & 2); + m_spritegen->draw_sprites(bitmap, cliprect, spriteram, layers_ctrl & 1); return 0; } -/*************************************************************************** - - Video Regs - - Offset: Bits: Value: - - 01 Screen Width / 2 - 1 - 03 - 05 - 07 - 09 Screen Height - 1 - 0b - 0d - 0f - 11 - 13 76-- ---- - --5- ---- VBlank? - ---4 3--- - ---- -2-- Sprites Buffered? - ---- --10 - 15 - 17 - 19 - 1b Background Color (Low) - 1d Background Color (High) - 1f - 21 - -***************************************************************************/ - -void sigmab98_base_state::vregs_w(offs_t offset, uint8_t data) -{ - m_vregs[offset] = data; - - switch (offset) - { - case 0x1b: // background color - case 0x1d: - { - int x = (m_vregs[0x1d] << 8) + m_vregs[0x1b]; - int r = (x >> 10) & 0x1f; - int g = (x >> 5) & 0x1f; - int b = (x >> 0) & 0x1f; - m_palette->set_pen_color(0x1000, pal5bit(r), pal5bit(g), pal5bit(b)); - break; - } -// default: -// logerror("%s: unknown video reg written: %02x = %02x\n", machine().describe_context(), offset, data); - } -} - -uint8_t sigmab98_base_state::vregs_r(offs_t offset) -{ - switch (offset) - { - default: - if (!machine().side_effects_disabled()) - logerror("%s: unknown video reg read: %02x\n", machine().describe_context(), offset); - return m_vregs[offset]; - } -} - -uint8_t sigmab98_base_state::d013_r() +u8 sigmab98_state::d013_r() { // bit 5 must go 0->1 (vblank?) // bit 2 must be set (sprite buffered? triggered by pulsing bit 3 of port C6?) @@ -684,7 +227,7 @@ uint8_t sigmab98_base_state::d013_r() return (m_screen->vblank() ? 0x20 : 0x01) | 0x04; // return machine().rand(); } -uint8_t sigmab98_base_state::d021_r() +u8 sigmab98_state::d021_r() { // bit 5 must be 0? return 0; @@ -698,25 +241,31 @@ uint8_t sigmab98_base_state::d021_r() ***************************************************************************/ +void sigmab98_state::video_map(address_map &map) +{ + map(0x80000, 0x80fff).ram().share("spriteram"); + + map(0x82000, 0x821ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); + + map(0x82800, 0x8287f).rw(m_spritegen, FUNC(ky3211_device::vtable_r), FUNC(ky3211_device::vtable_w)); + + map(0x83000, 0x83021).rw(m_spritegen, FUNC(ky3211_device::vregs_r), FUNC(ky3211_device::vregs_w)); + map(0x83013, 0x83013).r(FUNC(sigmab98_state::d013_r)); + map(0x83021, 0x83021).r(FUNC(sigmab98_state::d021_r)); +} + /*************************************************************************** Minna Atsumare! Dodge Hero ***************************************************************************/ void sigmab98_state::dodghero_mem_map(address_map &map) { + video_map(map); map(0x00000, 0x1ffff).rom().nopw(); map(0x40000, 0x41fff).ram().share("nvram"); // battery backed RAM - map(0x80000, 0x80fff).ram().share("spriteram"); map(0x81000, 0x811ff).nopw(); - map(0x82000, 0x821ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - - map(0x82800, 0x8287f).ram().share("vtable"); - - map(0x83000, 0x83021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs"); - map(0x83013, 0x83013).r(FUNC(sigmab98_state::d013_r)); - map(0x83021, 0x83021).r(FUNC(sigmab98_state::d021_r)); } /*************************************************************************** @@ -733,17 +282,17 @@ void sigmab98_state::show_outputs() } // Port c0 -void sigmab98_state::eeprom_w(uint8_t data) +void sigmab98_state::eeprom_w(u8 data) { // latch the bit m_eeprom->di_write(BIT(data, 6)); // reset line asserted: reset. // if ((m_c0 ^ data) & 0x20) - m_eeprom->cs_write((data & 0x20) ? ASSERT_LINE : CLEAR_LINE); + m_eeprom->cs_write(BIT(data, 5) ? ASSERT_LINE : CLEAR_LINE); // clock line asserted: write latch or select next bit to read - m_eeprom->clk_write((data & 0x10) ? ASSERT_LINE : CLEAR_LINE); + m_eeprom->clk_write(BIT(data, 4) ? ASSERT_LINE : CLEAR_LINE); m_c0 = data; //show_outputs(state); @@ -751,7 +300,7 @@ void sigmab98_state::eeprom_w(uint8_t data) // Port c4 // 10 led? -void sigmab98_state::c4_w(uint8_t data) +void sigmab98_state::c4_w(u8 data) { m_leds[0] = BIT(data, 4); @@ -765,7 +314,7 @@ void sigmab98_state::c4_w(uint8_t data) // 08 buffer sprites? // 10 led? // 20 led? (starts blinking after coin in) -void sigmab98_state::c6_w(uint8_t data) +void sigmab98_state::c6_w(u8 data) { machine().bookkeeping().coin_lockout_w(0, BIT(~data, 1)); @@ -784,7 +333,7 @@ void sigmab98_state::c6_w(uint8_t data) // Port c8 // 01 hopper enable? // 02 hopper motor on (active low)? -void sigmab98_state::c8_w(uint8_t data) +void sigmab98_state::c8_w(u8 data) { m_hopper->motor_w((!(data & 0x02) && (data & 0x01)) ? 1 : 0); @@ -794,19 +343,10 @@ void sigmab98_state::c8_w(uint8_t data) void sigmab98_state::gegege_mem_map(address_map &map) { + video_map(map); map(0x00000, 0x1ffff).rom(); map(0x40000, 0x47fff).ram().share("nvram"); // battery backed RAM - - map(0x80000, 0x80fff).ram().share("spriteram"); - - map(0x82000, 0x821ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - - map(0x82800, 0x8287f).ram().share("vtable"); - - map(0x83000, 0x83021).rw(FUNC(sigmab98_state::vregs_r), FUNC(sigmab98_state::vregs_w)).share("vregs"); - map(0x83013, 0x83013).r(FUNC(sigmab98_state::d013_r)); - map(0x83021, 0x83021).r(FUNC(sigmab98_state::d021_r)); } void sigmab98_state::gegege_io_map(address_map &map) @@ -835,29 +375,29 @@ void lufykzku_state::dsw_w(int state) } // Port c0 -void lufykzku_state::lufykzku_watchdog_w(uint8_t data) +void lufykzku_state::lufykzku_watchdog_w(u8 data) { m_watchdog->write_line_ck(BIT(data, 7)); } // Port c4 -void lufykzku_state::lufykzku_c4_w(uint8_t data) +void lufykzku_state::lufykzku_c4_w(u8 data) { - machine().bookkeeping().coin_lockout_w(1, (~data) & 0x20); // 100 yen lockout -// machine().bookkeeping().coin_lockout_w(2, (~data) & 0x40); // (unused coin lockout) - machine().bookkeeping().coin_lockout_w(0, (~data) & 0x80); // medal lockout + machine().bookkeeping().coin_lockout_w(1, BIT(~data, 5)); // 100 yen lockout +// machine().bookkeeping().coin_lockout_w(2, BIT(~data, 6)); // (unused coin lockout) + machine().bookkeeping().coin_lockout_w(0, BIT(~data, 7)); // medal lockout m_c4 = data; show_outputs(); } // Port c6 -void lufykzku_state::lufykzku_c6_w(uint8_t data) +void lufykzku_state::lufykzku_c6_w(u8 data) { - machine().bookkeeping().coin_counter_w(1, data & 0x01); // 100 yen in -// machine().bookkeeping().coin_counter_w(2, data & 0x02); // (unused coin in) - machine().bookkeeping().coin_counter_w(0, data & 0x04); // medal in - machine().bookkeeping().coin_counter_w(3, data & 0x08); // medal out + machine().bookkeeping().coin_counter_w(1, BIT(data, 0)); // 100 yen in +// machine().bookkeeping().coin_counter_w(2, BIT(data, 1)); // (unused coin in) + machine().bookkeeping().coin_counter_w(0, BIT(data, 2)); // medal in + machine().bookkeeping().coin_counter_w(3, BIT(data, 3)); // medal out m_leds[0] = BIT(data, 4); // button led // m_leds[1] = BIT(data, 5); // (unused button led) // m_leds[2] = BIT(data, 6); // (unused button led) @@ -868,12 +408,12 @@ void lufykzku_state::lufykzku_c6_w(uint8_t data) } // Port c8 -uint8_t lufykzku_state::lufykzku_c8_r() +u8 lufykzku_state::lufykzku_c8_r() { return 0xbf | (m_dsw_bit ? 0x40 : 0); } -void lufykzku_state::lufykzku_c8_w(uint8_t data) +void lufykzku_state::lufykzku_c8_w(u8 data) { // bit 0? on payout button // bit 1? when ending payment @@ -895,11 +435,11 @@ void lufykzku_state::lufykzku_mem_map(address_map &map) map(0xc0000, 0xc0fff).ram().share("spriteram"); map(0xc1000, 0xc2fff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); // more palette entries - map(0xc3000, 0xc3021).rw(FUNC(lufykzku_state::vregs_r), FUNC(lufykzku_state::vregs_w)).share("vregs"); + map(0xc3000, 0xc3021).rw(m_spritegen, FUNC(ky10510_device::vregs_r), FUNC(ky10510_device::vregs_w)); map(0xc3013, 0xc3013).r(FUNC(lufykzku_state::d013_r)); map(0xc3021, 0xc3021).r(FUNC(lufykzku_state::d021_r)); - map(0xc3400, 0xc347f).ram().share("vtable"); + map(0xc3400, 0xc347f).rw(m_spritegen, FUNC(ky10510_device::vtable_r), FUNC(ky10510_device::vtable_w)); } void lufykzku_state::lufykzku_io_map(address_map &map) @@ -916,280 +456,6 @@ void lufykzku_state::lufykzku_io_map(address_map &map) } -/*************************************************************************** - Animal Catch -***************************************************************************/ - -uint8_t sammymdl_state::eeprom_r() -{ - return m_eeprom->do_read() ? 0x80 : 0; -} - -void sammymdl_state::eeprom_w(uint8_t data) -{ - // latch the bit - m_eeprom->di_write((data & 0x40) >> 6); - - // reset line asserted: reset. - m_eeprom->cs_write((data & 0x20) ? ASSERT_LINE : CLEAR_LINE); - - // clock line asserted: write latch or select next bit to read - m_eeprom->clk_write((data & 0x10) ? ASSERT_LINE : CLEAR_LINE); - - if (data & 0x8f) - logerror("%s: unknown eeeprom bits written %02x\n", machine().describe_context(), data); -} - -uint8_t sigmab98_base_state::vblank_r() -{ - // mask 0x04 must be set before writing sprite list - // mask 0x10 must be set or irq/00 hangs? - return (m_vblank & ~0x01) | 0x14; -} - -void sigmab98_base_state::vblank_w(uint8_t data) -{ - m_vblank = (m_vblank & ~0x03) | (data & 0x03); -} - -void sigmab98_base_state::screen_vblank_sammymdl(int state) -{ - // rising edge - if (state) - { - m_vblank &= ~0x01; - } -} - -void sammymdl_state::show_3_outputs() -{ -#ifdef MAME_DEBUG - popmessage("COIN: %02X LED: %02X HOP: %02X", m_out[0], m_out[1], m_out[2]); -#endif -} -// Port 31 -void sammymdl_state::coin_counter_w(uint8_t data) -{ - machine().bookkeeping().coin_counter_w(0, data & 0x01 ); // coin1 in - machine().bookkeeping().coin_counter_w(1, data & 0x02 ); // coin2 in - machine().bookkeeping().coin_counter_w(2, data & 0x04 ); // medal in - -// machine().bookkeeping().coin_lockout_w(1, (~data) & 0x08 ); // coin2 lockout? -// machine().bookkeeping().coin_lockout_w(0, (~data) & 0x10 ); // coin1 lockout -// machine().bookkeeping().coin_lockout_w(2, (~data) & 0x20 ); // medal lockout? - -// data & 0x80? (gocowboy) - - m_out[0] = data; - show_3_outputs(); -} - -// Port 32 -void sammymdl_state::leds_w(uint8_t data) -{ - m_leds[0] = BIT(data, 0); // button - - m_out[1] = data; - show_3_outputs(); -} - -// Port b0 -// 02 hopper enable? -// 01 hopper motor on (active low)? -void sammymdl_state::hopper_w(uint8_t data) -{ - m_hopper->motor_w((!(data & 0x01) && (data & 0x02)) ? 1 : 0); - - m_out[2] = data; - show_3_outputs(); -} - -uint8_t sammymdl_state::coin_hopper_r() -{ - uint8_t ret = ioport("COIN")->read(); - -// if ( !m_hopper->read(0) ) -// ret &= ~0x01; - - return ret; -} - -void sammymdl_state::animalc_map(address_map &map) -{ - map(0x00000, 0x0ffff).rom().region("mainbios", 0); - map(0x10000, 0x2ffff).rom().region("maincpu", 0x400); - map(0x60000, 0x63fff).ram().share("nvram"); - map(0x6a000, 0x6ffff).ram(); - map(0x70000, 0x70fff).ram().share("spriteram"); - map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - map(0x72800, 0x7287f).ram().share("vtable"); - map(0x73000, 0x73021).rw(FUNC(sammymdl_state::vregs_r), FUNC(sammymdl_state::vregs_w)).share("vregs"); - map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable? - map(0x73013, 0x73013).rw(FUNC(sammymdl_state::vblank_r), FUNC(sammymdl_state::vblank_w)); // IRQ Ack? -} - -void sammymdl_state::animalc_io(address_map &map) -{ - map.global_mask(0xff); - map(0x90, 0x90).w("oki", FUNC(okim9810_device::write)); - map(0x91, 0x91).w("oki", FUNC(okim9810_device::tmp_register_w)); - map(0x92, 0x92).r("oki", FUNC(okim9810_device::read)); - map(0xb0, 0xb0).w(FUNC(sammymdl_state::hopper_w)); - map(0xc0, 0xc0).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // 1 -} - -/*************************************************************************** - Go Go Cowboy -***************************************************************************/ - -void sammymdl_state::gocowboy_map(address_map &map) -{ - map(0x00000, 0x5ffff).rom().region("mainbios", 0); - map(0x60000, 0x67fff).ram().share("nvram"); - map(0x70000, 0x70fff).ram().share("spriteram"); - map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - map(0x72800, 0x7287f).ram().share("vtable"); - map(0x73000, 0x73021).rw(FUNC(sammymdl_state::vregs_r), FUNC(sammymdl_state::vregs_w)).share("vregs"); -} - - -void sammymdl_state::gocowboy_leds_w(uint8_t data) -{ - m_leds[0] = BIT(data, 0); // button - m_leds[1] = BIT(data, 1); // coin lockout? (after coining up, but not for service coin) - m_leds[2] = BIT(data, 2); // ? long after a prize is not collected - m_leds[3] = BIT(data, 3); // ? "don't forget the large prizes" - - // 10 hopper enable? - // 20 hopper motor on (active low)? - m_hopper_small->motor_w((!(data & 0x20) && (data & 0x10)) ? 1 : 0); - m_hopper_large->motor_w((!(data & 0x80) && (data & 0x40)) ? 1 : 0); - - m_out[1] = data; - show_3_outputs(); -} - -void sammymdl_state::gocowboy_io(address_map &map) -{ - map.global_mask(0xff); - map(0x90, 0x90).rw("oki", FUNC(okim9810_device::read), FUNC(okim9810_device::write)); - map(0x91, 0x91).w("oki", FUNC(okim9810_device::tmp_register_w)); - map(0x92, 0x92).r("oki", FUNC(okim9810_device::read)); - map(0xb0, 0xb0).nopw(); - map(0xc0, 0xc0).w("watchdog", FUNC(watchdog_timer_device::reset_w)); // 1 -} - -/*************************************************************************** - Hae Hae Ka Ka Ka -***************************************************************************/ - -uint8_t sigmab98_base_state::haekaka_vblank_r() -{ - return m_screen->vblank() ? 0 : 0x1c; -} - -void sammymdl_state::haekaka_leds_w(uint8_t data) -{ - // All used - m_leds[0] = BIT(data, 0); - m_leds[1] = BIT(data, 1); - m_leds[2] = BIT(data, 2); - m_leds[3] = BIT(data, 3); - m_leds[4] = BIT(data, 4); - m_leds[5] = BIT(data, 5); - m_leds[6] = BIT(data, 6); - m_leds[7] = BIT(data, 7); - - m_out[1] = data; - show_3_outputs(); -} - -void sammymdl_state::haekaka_coin_counter_w(uint8_t data) -{ - machine().bookkeeping().coin_counter_w(0, data & 0x01 ); // medal out -// data & 0x02 ? -// data & 0x04 ? -// data & 0x10 ? - - m_out[0] = data; - show_3_outputs(); -} - -void sammymdl_state::haekaka_map(address_map &map) -{ - map(0x00000, 0x0ffff).rom().region("mainbios", 0); - map(0x10000, 0x2ffff).rom().region("maincpu", 0x400); - map(0x60000, 0x61fff).ram().share("nvram"); - map(0x70000, 0x70fff).ram().share("spriteram"); - map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - map(0x72800, 0x7287f).ram().share("vtable"); - map(0x73000, 0x73021).rw(FUNC(sammymdl_state::vregs_r), FUNC(sammymdl_state::vregs_w)).share("vregs"); - map(0x73013, 0x73013).r(FUNC(sammymdl_state::haekaka_vblank_r)); -} - -/*************************************************************************** - Itazura Monkey -***************************************************************************/ - -void sammymdl_state::itazuram_map(address_map &map) -{ - map(0x00000, 0x0ffff).rom().region("mainbios", 0); - map(0x10000, 0x2ffff).rom().region("maincpu", 0x400); - map(0x60000, 0x63fff).ram().share("nvram"); - map(0x70000, 0x70fff).ram().share("spriteram"); - map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - map(0x72800, 0x7287f).ram().share("vtable"); - map(0x73000, 0x73021).rw(FUNC(sammymdl_state::vregs_r), FUNC(sammymdl_state::vregs_w)).share("vregs"); - map(0x73011, 0x73011).nopw(); // IRQ Enable? Screen disable? - map(0x73013, 0x73013).r(FUNC(sammymdl_state::haekaka_vblank_r)).nopw(); // IRQ Ack? -} - -/*************************************************************************** - Taihou de Doboon -***************************************************************************/ - -void sammymdl_state::tdoboon_map(address_map &map) -{ - map(0x00000, 0x0ffff).rom().region("mainbios", 0); - map(0x10000, 0x2ffff).rom().region("maincpu", 0x400); - map(0x60000, 0x61fff).ram().share("nvram"); - map(0x70000, 0x70fff).ram().share("spriteram"); - map(0x72000, 0x721ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); - map(0x72800, 0x7287f).ram().share("vtable"); - map(0x73000, 0x73021).rw(FUNC(sammymdl_state::vregs_r), FUNC(sammymdl_state::vregs_w)).share("vregs"); - map(0x73013, 0x73013).r(FUNC(sammymdl_state::haekaka_vblank_r)); -} - - -/*************************************************************************** - - Graphics Layout - -***************************************************************************/ - -static const gfx_layout sigmab98_16x16x8_layout = -{ - 16,16, - RGN_FRAC(1,1), - 8, - { STEP8(0,1) }, - { STEP16(0,8) }, - { STEP16(0,16*8) }, - 16*16*8 -}; - -static GFXDECODE_START( gfx_sigmab98 ) - GFXDECODE_ENTRY( "sprites", 0, gfx_16x16x4_packed_lsb, 0, 0x100/16 ) - GFXDECODE_ENTRY( "sprites", 0, sigmab98_16x16x8_layout, 0, 0x100/256 ) -GFXDECODE_END - -// Larger palette -static GFXDECODE_START( gfx_lufykzku ) - GFXDECODE_ENTRY( "sprites", 0, gfx_16x16x4_packed_lsb, 0, 0x1000/16 ) - GFXDECODE_ENTRY( "sprites", 0, sigmab98_16x16x8_layout, 0, 0x1000/16 ) -GFXDECODE_END - - /*************************************************************************** Input Ports @@ -1351,76 +617,6 @@ static INPUT_PORTS_START( lufykzku ) INPUT_PORTS_END -/*************************************************************************** - Sammy Medal Games -***************************************************************************/ - -static INPUT_PORTS_START( sammymdl ) - PORT_START("BUTTON") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // shot - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // freeze (itazuram) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("COIN") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin1 in - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5) // coin2 in - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(5) PORT_NAME("Medal") // medal in - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // test sw - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) -INPUT_PORTS_END - -static INPUT_PORTS_START( haekaka ) - PORT_START("BUTTON") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) PORT_NAME( "Medal" ) // medal in ("chacker") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("COIN") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) // test sw - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) // button - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin / set in test mode - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) -INPUT_PORTS_END - -static INPUT_PORTS_START( gocowboy ) - PORT_START("BUTTON") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // shoot - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(20) // coin - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper_small", FUNC(ticket_dispenser_device::line_r)) // 1/2' pay sensor (small) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper_large", FUNC(ticket_dispenser_device::line_r)) // 3/4' pay sensor (large) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Meter Switch") // capsule test (pressed while booting) / next in test mode - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset Switch") // reset backup ram (pressed while booting) / previous in test mode - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) // test mode (keep pressed in game) / select in test mode / service coin - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("COIN") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) -INPUT_PORTS_END - /*************************************************************************** Machine Drivers @@ -1457,12 +653,13 @@ void sigmab98_state::sigmab98(machine_config &config) m_screen->set_screen_update(FUNC(sigmab98_state::screen_update)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_sigmab98); PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x1000 + 1); m_palette->set_endianness(ENDIANNESS_BIG); BUFFERED_SPRITERAM8(config, m_buffered_spriteram); + KY3211(config, m_spritegen, 0, m_palette); + // sound hardware SPEAKER(config, "speaker", 2).front(); @@ -1485,7 +682,7 @@ void sigmab98_state::dodghero(machine_config &config) TIMER_DEVICE_CALLBACK_MEMBER(lufykzku_state::lufykzku_irq) { - int scanline = param; + const int scanline = param; if (scanline == 240) { @@ -1501,7 +698,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(lufykzku_state::lufykzku_irq) } } -TIMER_DEVICE_CALLBACK_MEMBER(lufykzku_state::rockman_timer_irq) +TIMER_DEVICE_CALLBACK_MEMBER(lufykzku_state::mnrockman_timer_irq) { m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xfc); } @@ -1537,11 +734,11 @@ void lufykzku_state::lufykzku(machine_config &config) m_screen->set_screen_update(FUNC(lufykzku_state::screen_update)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_lufykzku); PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x1000 + 1); m_palette->set_endianness(ENDIANNESS_BIG); //BUFFERED_SPRITERAM8(config, m_buffered_spriteram); // same as sammymdl? + KY10510(config, m_spritegen, 0, m_palette); // sound hardware SPEAKER(config, "speaker", 2).front(); @@ -1550,144 +747,12 @@ void lufykzku_state::lufykzku(machine_config &config) oki.add_route(1, "speaker", 0.80, 1); } -void lufykzku_state::rockman(machine_config& config) +void lufykzku_state::mnrockman(machine_config& config) { lufykzku(config); - TIMER(config, "unktimer").configure_periodic(FUNC(lufykzku_state::rockman_timer_irq), attotime::from_hz(100)); + TIMER(config, "unktimer").configure_periodic(FUNC(lufykzku_state::mnrockman_timer_irq), attotime::from_hz(100)); } -/*************************************************************************** - Sammy Medal Games -***************************************************************************/ - -TIMER_DEVICE_CALLBACK_MEMBER(sammymdl_state::gocowboy_int) -{ - int scanline = param; - - // TODO: what really triggers these? - if (scanline == 240) - { - m_kp69->ir_w<0>(1); - m_kp69->ir_w<0>(0); - } - - if (scanline == 128) - { - m_kp69->ir_w<1>(1); - m_kp69->ir_w<1>(0); - } -} - -void sammymdl_state::sammymdl(machine_config &config) -{ - KL5C80A12(config, m_maincpu, XTAL(20'000'000)); // !! KL5C80A12CFP @ 10MHz? (actually 4 times faster than Z80) !! - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::animalc_map); - m_maincpu->set_addrmap(AS_IO, &sammymdl_state::animalc_io); - m_maincpu->in_p0_callback().set(FUNC(sammymdl_state::eeprom_r)); - m_maincpu->out_p0_callback().set(FUNC(sammymdl_state::eeprom_w)); - m_maincpu->in_p1_callback().set(FUNC(sammymdl_state::coin_hopper_r)); - m_maincpu->in_p2_callback().set_ioport("BUTTON"); - m_maincpu->out_p3_callback().set(FUNC(sammymdl_state::coin_counter_w)); - m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::leds_w)); - - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // battery backed RAM - EEPROM_93C46_8BIT(config, "eeprom"); - - TICKET_DISPENSER(config, m_hopper, attotime::from_msec(200)); - - WATCHDOG_TIMER(config, "watchdog"); - - // video hardware - SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); // ? - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */); // game reads vblank state - m_screen->set_size(0x140, 0x100); - m_screen->set_visarea(0, 0x140-1, 0, 0xf0-1); - m_screen->set_screen_update(FUNC(sammymdl_state::screen_update)); - m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<0>)); - m_screen->set_palette(m_palette); - - GFXDECODE(config, m_gfxdecode, m_palette, gfx_sigmab98); - PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x1000 + 1); - m_palette->set_endianness(ENDIANNESS_BIG); - - //BUFFERED_SPRITERAM8(config, m_buffered_spriteram); // not on sammymdl? - - // sound hardware - SPEAKER(config, "speaker", 2).front(); - - okim9810_device &oki(OKIM9810(config, "oki", XTAL(4'096'000))); - oki.add_route(0, "speaker", 0.80, 0); - oki.add_route(1, "speaker", 0.80, 1); -} - -void sammymdl_state::animalc(machine_config &config) -{ - sammymdl(config); - - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::animalc_map); -} - -void sammymdl_state::gocowboy(machine_config &config) -{ - sammymdl(config); - - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::gocowboy_map); - m_maincpu->set_addrmap(AS_IO, &sammymdl_state::gocowboy_io); - m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::gocowboy_leds_w)); - - TIMER(config, "scantimer").configure_scanline(FUNC(sammymdl_state::gocowboy_int), "screen", 0, 1); - - config.device_remove("hopper"); - TICKET_DISPENSER(config, m_hopper_small, attotime::from_msec(200)); - TICKET_DISPENSER(config, m_hopper_large, attotime::from_msec(200)); - - m_screen->screen_vblank().set_nop(); -} - -void sammymdl_state::haekaka(machine_config &config) -{ - sammymdl(config); - - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::haekaka_map); - m_maincpu->out_p3_callback().set(FUNC(sammymdl_state::haekaka_coin_counter_w)); - m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::haekaka_leds_w)); - - m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<2>)); -} - -void sammymdl_state::itazuram(machine_config &config) -{ - sammymdl(config); - - TIMER(config, "scantimer").configure_scanline(FUNC(sammymdl_state::gocowboy_int), "screen", 0, 1); - - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::itazuram_map); - - m_screen->screen_vblank().set_nop(); -} - -void sammymdl_state::pyenaget(machine_config &config) -{ - sammymdl(config); - - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::haekaka_map); - m_maincpu->out_p4_callback().set(FUNC(sammymdl_state::haekaka_leds_w)); - - m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<2>)); -} - -void sammymdl_state::tdoboon(machine_config &config) -{ - sammymdl(config); - - m_maincpu->set_addrmap(AS_PROGRAM, &sammymdl_state::tdoboon_map); - - m_screen->screen_vblank().set(m_kp69, FUNC(kp69_device::ir_w<2>)); - m_screen->set_visarea(0,0x140-1, 0+4,0xf0+4-1); -} - - /*************************************************************************** ROMs Loading @@ -1704,7 +769,7 @@ ROM_START( dodghero ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9802-1d.ic7", 0x00000, 0x20000, CRC(093492e3) SHA1(d4dd104dc2410d97add532eea031cbc1ede3b0b1) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "spritegen", 0 ) ROM_LOAD( "b9802-2.ic12", 0x00000, 0x80000, CRC(bb810ab8) SHA1(02bb1bb9b6dd0d24401c8a8c579f5ebcba963d8f) ) ROM_LOAD( "b9802-3a.ic13", 0x80000, 0x80000, CRC(8792e487) SHA1(c5ed8059cd40a00656016b33762a04b9bedd7f06) ) @@ -1723,7 +788,7 @@ ROM_START( sushimar ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9803-1c.ic7", 0x00000, 0x20000, CRC(8ad3b7be) SHA1(14d8cec6723f230d4167de91b5b1103fe40755bc) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "spritegen", 0 ) ROM_LOAD( "b9803-2.ic12", 0x00000, 0x80000, CRC(cae710a4) SHA1(c0511412d8feaa032b8bcd72074522d1b90f22b2) ) ROM_LOAD( "b9803-03.ic13", 0x80000, 0x80000, CRC(f69f37f6) SHA1(546045b50dbc3ef45fc4dd1c7f2f6a23dfdc53d8) ) @@ -1771,7 +836,7 @@ ROM_START( gegege ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9804-1.ic7", 0x00000, 0x20000, CRC(f8b4f855) SHA1(598bd9f91123e9ab539ce3f33779bff2d072e731) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "spritegen", 0 ) ROM_LOAD( "b9804-2.ic12", 0x00000, 0x80000, CRC(4211079d) SHA1(d601c623fb909f1346fd02b8fb37b67956e2cd4e) ) ROM_LOAD( "b9804-3.ic13", 0x80000, 0x80000, CRC(54aeb2aa) SHA1(ccf939111f6288a889846d51bab47ff4e992c542) ) @@ -1781,7 +846,7 @@ ROM_END void sigmab98_state::init_gegege() { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); // Related to d013 // rom[0x0bdd] = 0xc9; @@ -1809,7 +874,7 @@ ROM_START( b3rinsya ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9805-1c.ic7", 0x00000, 0x20000, CRC(a8cde2f4) SHA1(74d1f3f1710084d788a71dec0366f2c3f756fdf8) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "spritegen", 0 ) ROM_LOAD( "b9805-2.ic12", 0x00000, 0x80000, CRC(7ec2e957) SHA1(1eb9095663d4f8f8f0c77f151918af1978332b3d) ) ROM_LOAD( "b9805-3.ic13", 0x80000, 0x80000, CRC(449d0848) SHA1(63e91e4be8b58a6ebf1777ed5a9c23416bacba48) ) @@ -1819,7 +884,7 @@ ROM_END void sigmab98_state::init_b3rinsya() { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); // EEPROM timing checks rom[0x8138] = 0x00; @@ -1839,7 +904,7 @@ ROM_START( pepsiman ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9806-1a.ic7", 0x00000, 0x20000, CRC(3152fe90) SHA1(98a8ae1bd3a4381cec11ba8b3e9cdad71c7bd05a) ) - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "spritegen", 0 ) ROM_LOAD( "b9806-2.ic12", 0x00000, 0x80000, CRC(82f650ea) SHA1(c0b214fdc39329e2136707bc195d470d4b613509) ) ROM_LOAD( "b9806-3.ic13", 0x80000, 0x80000, CRC(07dc548e) SHA1(9419c0cac289a9894cce1a10924f40e146e2ff8a) ) @@ -1849,7 +914,7 @@ ROM_END void sigmab98_state::init_pepsiman() { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); // Related to d013 // rom[0x058a] = 0xc9; @@ -1877,7 +942,7 @@ ROM_START( tbeastw2 ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9808-1b.ic7", 0x00000, 0x20000, CRC(65f7e079) SHA1(d421da3c99d62d3228e1b9c1cfb2de51f0fcc56e) ) - ROM_REGION( 0x180000, "sprites", 0 ) + ROM_REGION( 0x180000, "spritegen", 0 ) ROM_LOAD( "b9808-2.ic12", 0x000000, 0x80000, CRC(dda5c2d2) SHA1(1bb21e7251df93b0f502b716e958d81f4e4e46dd) ) ROM_LOAD( "b9808-3.ic13", 0x080000, 0x80000, CRC(80df49c6) SHA1(14342be3a176cdf015c0ac07a4f1c109862c67aa) ) ROM_LOAD( "b9808-4.ic17", 0x100000, 0x80000, CRC(d90961ea) SHA1(c2f226a528238eafc1ba37200da4ee6ce9b54325) ) @@ -1889,7 +954,7 @@ ROM_END void sigmab98_state::init_tbeastw2() { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); // EEPROM timing checks rom[0x8138] = 0x00; @@ -1909,7 +974,7 @@ ROM_START( ucytokyu ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b9809-1.ic7", 0x00000, 0x20000, CRC(5be6adff) SHA1(7248157111be2ae23df7d51f5d071cc3b9fd79b4) ) - ROM_REGION( 0x180000, "sprites", 0 ) + ROM_REGION( 0x180000, "spritegen", 0 ) ROM_LOAD( "b9809-2.ic12", 0x000000, 0x80000, CRC(18f342b3) SHA1(09d62bb3597259e0fbae2c0f4ed163685a4a9dd9) ) ROM_LOAD( "b9809-3.ic13", 0x080000, 0x80000, CRC(88a2a52a) SHA1(0dd10d4fa88d1a54150729026495a70dbe67bae0) ) ROM_LOAD( "b9809-4.ic17", 0x100000, 0x80000, CRC(ea74eacd) SHA1(279fa1d2bc7bfafbafecd0e0758a47345ca95140) ) @@ -1921,7 +986,7 @@ ROM_END void sigmab98_state::init_ucytokyu() { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); // Related to d013 // rom[0x0bfa] = 0xc9; @@ -1949,7 +1014,7 @@ ROM_START( dashhero ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "b098111-0101.ic7", 0x00000, 0x20000, CRC(46488393) SHA1(898bafbf5273b368cf963d863fb93e9fa0da816f) ) - ROM_REGION( 0x180000, "sprites", 0 ) + ROM_REGION( 0x180000, "spritegen", 0 ) ROM_LOAD( "b98114-0100.ic12", 0x000000, 0x80000, CRC(067625ea) SHA1(f9dccfc85adbb840da7512db0c88f554b453d2d2) ) ROM_LOAD( "b98115-0100.ic13", 0x080000, 0x80000, CRC(d6f0b89d) SHA1(33b5f2f6529fd9a145ccb1b4deffabf5fa0d46cb) ) ROM_LOAD( "b98116-0100.ic17", 0x100000, 0x80000, CRC(c0dbe953) SHA1(a75e202a0c1be988b8fd7d4ee23ebc82f6110e5f) ) @@ -1960,7 +1025,7 @@ ROM_END void sigmab98_state::init_dashhero() { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); // EEPROM timing checks rom[0x8138] = 0x00; @@ -2008,7 +1073,7 @@ ROM_START( lufykzku ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "ka-102_p1__ver1.02.ic1", 0x000000, 0x020000, CRC(5d4f3405) SHA1(e2d982465ba847e9883dbb1c9a95c24eeae4611d) ) // hand-written label, 1xxxxxxxxxxxxxxxx = 0xFF - ROM_REGION( 0x100000, "sprites", 0 ) + ROM_REGION( 0x100000, "spritegen", 0 ) ROM_LOAD( "ka-102_g1__ver1.00.ic3", 0x000000, 0x100000, CRC(abaca89d) SHA1(ad42eb8536373fb4fcff8f04ffe9b67dc62e0423) ) ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) @@ -2020,17 +1085,13 @@ void lufykzku_state::init_lufykzku() m_vblank_vector = 0xfa; // nop m_timer0_vector = 0xfc; // write coin counters/lockout, drive hopper m_timer1_vector = 0xfe; // read inputs and hopper sensor, handle coin in - - m_gfxdecode->gfx(1)->set_granularity(16); } -void lufykzku_state::init_rockman() +void lufykzku_state::init_mnrockman() { m_vblank_vector = 0xfa; // nop m_timer0_vector = 0; m_timer1_vector = 0xfe; - - m_gfxdecode->gfx(1)->set_granularity(16); } // Banpresto BPSC-2001M-A PCB, same as lufykzku @@ -2038,355 +1099,15 @@ ROM_START( mnrockman ) ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD( "ka-108_p1_ver1.02.ic1", 0x000000, 0x020000, CRC(727edf2f) SHA1(51a5f89a9ba64e16a1f46cc1145efa792ebb6401) ) - ROM_REGION( 0x200000, "sprites", 0 ) + ROM_REGION( 0x200000, "spritegen", 0 ) ROM_LOAD( "ka-108_g1_ver1.00.ic3", 0x000000, 0x200000, CRC(ef79a6de) SHA1(50cbe7665e80b58a6bb0b20bae2deeca2e29c9da) ) ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) ROM_LOAD( "ka-108_s1_ver1.00.ic2", 0x000000, 0x080000, CRC(828dd3bd) SHA1(9788a30199d81f6db54f5409fcb146098a29e6aa) ) ROM_END -/*************************************************************************** - - Sammy Medal Games - - PCB: - - Sammy AM3AHF-01 SC MAIN PCB VER2 (Etched) - MAIN PCB VER2 VM12-6001-0 (Sticker) - - CPU: - - KAWASAKI KL5C80A12CFP (@U1) - Z80 Compatible High Speed Microcontroller - XTAL 20 MHz (@X1) - MX29F040TC-12 VM1211L01 (@U2) - 4M-bit [512kx8] CMOS Equal Sector Flash Memory - BSI BS62LV256SC-70 (@U4) - Very Low Power/Voltage CMOS SRAM 32K X 8 bit - (or Toshiba TC55257DFL-70L) - - Video: - - TAXAN KY-3211 (@U17) - OKI M548262-60 (@U18) - 262144-Word x 8-Bit Multiport DRAM - XTAL 27 MHz (@X3) - - Sound: - - OKI M9810B (@U11) - XTAL 4.09 MHz (@X2) - Trimmer (@VR1) - Toshiba TA7252AP (@U16) - 5.9W Audio Power Amplifier - - Other: - - Xilinx XC9536 VM1212F01 (@U5) - In-System Programmable CPLD - MX29F0?TC (@U3) - Empty 32 Pin DIP Socket - M5295A (@U8) - Watchdog Timer (Near CUT-DEBUG MODE Jumper) - M93C46MN6T (@U6) - Serial EEPROM - RTC8564 (@U7) - not populated - SN75C1168 (@U10) - Dual RS-422 Transceiver - Cell Battery (@BAT) - 25 Pin Edge Connector - 56 Pin Cartridge Connector - 6 Pin Connector - +5V (1), GND (2), TCLK (3), TDO (4), TDI (5), TMS (6) - - On Go Go Cowboy, U2 and U10 are unpopulated, but U3 is occupied by a - ST M27C4001-10F1 EPROM. - -***************************************************************************/ - -#define SAMMYMDL_BIOS \ - ROM_REGION( 0x80000, "mainbios", 0 ) \ - ROM_SYSTEM_BIOS( 0, "v5", "IPL Ver. 5.0" ) /* (c)2003 */ \ - ROMX_LOAD( "vm1211l01.u2", 0x000000, 0x080000, CRC(c3c74dc5) SHA1(07352e6dba7514214e778ba39e1ca773e4698858), ROM_BIOS(0) ) \ - ROM_SYSTEM_BIOS( 1, "v4", "IPL Ver. 4.0" ) /* (c)2000, ROM patches not correct for this BIOS */ \ - ROMX_LOAD( "mt201l04.u012", 0x000000, 0x080000, CRC(c8c6d25f) SHA1(5be39fa72b65f2e455ccc146dbab58d24ab46505), ROM_BIOS(1) ) \ - ROM_SYSTEM_BIOS( 2, "v1", "IPL Ver. 1.0" ) /* (c)1999, ROM patches not correct for this BIOS */ \ - ROMX_LOAD( "vm1201l01.u012", 0x000000, 0x080000, CRC(21b2ccbd) SHA1(c3ceea196e5c1c6a9e03cf3a22e9f25f0099a38e), ROM_BIOS(2) ) - -ROM_START( sammymdl ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - - ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASEFF ) - ROM_COPY( "mainbios", 0x00fc00, 0x0000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", ROMREGION_ERASEFF ) -ROM_END - -/*************************************************************************** - - Animal Catch ( VX2002L02 ANIMALCAT 200011211536 SAMMY CORP. AM ) - - Sammy AM3ADT-01 Memory Card Type 3: - 1 x MX29F1610ATC-12 (@U021) - 1 x MX29F1610TC-12 (@U016) - -***************************************************************************/ - -ROM_START( animalc ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(84cf123b) SHA1(d8b425c93ff1a560e3f92c70d7eb93a05c3581af) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(4ae14ff9) SHA1(1273d15ea642452fecacff572655cd3ab47a5884) ) // 1xxxxxxxxxxxxxxxxxxxx = 0x00 -ROM_END - -ROM_START( gunkids ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(3d989a45) SHA1(f4e1dc13bfe9ef8bf733735b6647946dda6962f2) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(5e356b68) SHA1(0e4e28b02dcb5ff7d2a7139c5cdf31cbd08167f4) ) -ROM_END - -ROM_START( wantouch ) // ワンタッチャブル - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(fe00ac87) SHA1(97c3defafd04f48984e5f2fe34528ada024355c5) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(cd8d4478) SHA1(224e8e0e9a49f10515e0ebf9a5e97d8adc7eed13) ) -ROM_END - -ROM_START( kotekita ) // こてき隊（たい）スロット - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx2302l01.u021", 0x00000, 0x200000, CRC(37faa4a9) SHA1(619135d74052fb2272ce78976c2aa59a65244f12) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx2301l01.u016", 0x00000, 0x200000, CRC(e471c1ef) SHA1(4ddf3261d8736888ebbdbd0d755aad75987b3b3d) ) -ROM_END - -void sammymdl_state::init_animalc() -{ - uint8_t *rom = memregion("mainbios")->base(); - - // video timing loops - rom[0x015d9] = 0x00; - rom[0x015da] = 0x00; - rom[0x01605] = 0x00; - rom[0x01606] = 0x00; - rom[0x01750] = 0x00; - rom[0x01751] = 0x00; - - // force jump out of BIOS loop - rom[0x005ac] = 0xc3; } -/*************************************************************************** - - Go Go Cowboy - - Cart: - - ガムボール <- gumball - with プライズ <- with prize - EM5701L01 - EM5701L01 - - PCB: - - Sammy AM3AHF-01 SC MAIN PCB VER2 (Etched) - SC MAIN PCB VER2(GUM) 5049-6001-0 (Sticker) - -***************************************************************************/ - -ROM_START( gocowboy ) - ROM_REGION( 0x80000, "mainbios", 0 ) - ROM_LOAD( "go_go_cowboy_gpt_2c9c.u3", 0x00000, 0x80000, CRC(ad9b1de6) SHA1(24809ec3a579d28189a98190db70a33217e4f8bc) ) // uses custom BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "em702l01.u021", 0x000000, 0x200000, CRC(4c4289fe) SHA1(517b5a1e9d91e7ed322b4792d863e7abda835d4a) ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "em701l01.u016", 0x000000, 0x200000, CRC(c1f07320) SHA1(734717140e66ddcf0bded1489156c51cdaf1b50c) ) - - ROM_REGION( 0x80, "eeprom", 0 ) - ROM_LOAD( "st93c46.u6", 0x00, 0x80, CRC(1af2d376) SHA1(afbe953f1a9ff0152fe1092a83482695dbe5e75d) ) - - ROM_REGION( 0x5cde, "pld", 0 ) - ROM_LOAD( "vm1212f01.u5.jed", 0x0000, 0x5cde, CRC(b86a1825) SHA1(cc2e633fb8a24cfc93291a778b0964089f6b8ac7) ) -ROM_END - -/*************************************************************************** - - Itazura Monkey ( VX1902L02 ITZRMONKY 200011211639 SAMMY CORP. AM ) - - Sammy AM3ADT-01 Memory Card Type 3: - 2 x MX29F1610ATC-12 - -***************************************************************************/ - -ROM_START( itazuram ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx2002l01.u021", 0x00000, 0x200000, CRC(ddbdd2f3) SHA1(91f67a938929be0261442e066e3d2c03b5e9f06a) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx2001l01.u016", 0x00000, 0x200000, CRC(9ee95222) SHA1(7154d43ef312a48a882207ca37e1c61e8b215a9b) ) -ROM_END - -void sammymdl_state::init_itazuram() -{ - uint8_t *rom = memregion("mainbios")->base(); - - // force jump out of BIOS loop - rom[0x005ac] = 0xc3; -} - -/*************************************************************************** - - Taihou de Doboon ( EM4210L01 PUSHERDBN 200203151028 SAMMY CORP. AM ) - - Sammy AM3ADT-01 Memory Card Type 3: - 2 x MX29F1610ATC-12 - - The flash roms found in the cart are labeled: - - vx1801l01.u016 - vx1802l01.u021 - - which correspond to "Pye-nage Taikai". But they were reflashed with the - software noted in the sticker on the back of the cart (rom names reflect that): - - System: Treasure Hall - Soft: Taihou de Doboon - 2003.02.14 - Char Rev: EM4209L01 - Pro Rev: EM4210L01 - -***************************************************************************/ - -ROM_START( tdoboon ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "em4210l01.u021", 0x00000, 0x200000, CRC(3523e314) SHA1(d07c5d17d3f285be4cde810547f427e84f98968f) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "em4209l01.u016", 0x00000, 0x200000, CRC(aca220fa) SHA1(7db441add16af554700e597fd9926b6ccd19d628) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF -ROM_END - -/*************************************************************************** - - Pye-nage Taikai ( VX1802L01 PAINAGETK 200011021216 SAMMY CORP. AM. ) - - Sammy AM3ADT-01 Memory Card Type 3: - 2 x MX29F1610ATC-12 - -***************************************************************************/ - -ROM_START( pyenaget ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx1802l01.u021", 0x00000, 0x200000, CRC(7a22a657) SHA1(2a98085862fd958209253c5401e41eae4f7c06ea) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx1801l01.u016", 0x00000, 0x200000, CRC(c4607403) SHA1(f4f4699442afccc5ed4354447f91b1bee36ae3e5) ) -ROM_END - -/*************************************************************************** - - Hae Hae Ka Ka Ka ( EM4208L01 PUSHERHAEHAE 200203151032 SAMMY CORP. AM ) - - Sammy AM3ADT-01 Memory Card Type 3: - 2 x MX29F1610ATC-12 - - The flash roms found in the cart are labeled: - - vx1801l01.u016 - vx1802l01.u021 - - which correspond to "Pye-nage Taikai". But they were reflashed with the - software noted in the sticker on the back of the cart (rom names reflect that): - - System: Treasure Hall - Soft: Hae Hae Ka Ka Ka - 2003.02.14 - Char Rev: EM4207L01 - Pro Rev: EM4208L01 - -***************************************************************************/ - -ROM_START( haekaka ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "em4208l01.u021", 0x00000, 0x200000, CRC(d23bb748) SHA1(38d5b6c4b2cd470b3a68574aeca3f9fa9032245e) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "em4207l01.u016", 0x00000, 0x200000, CRC(3876961c) SHA1(3d842c1f63ea5aa7e799967928b86c5fabb4e65e) ) -ROM_END - -void sammymdl_state::init_haekaka() -{ - uint8_t *rom = memregion("mainbios")->base(); - - // force jump out of BIOS loop - rom[0x005ac] = 0xc3; -} - -ROM_START( kingyosu ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "vx1302l02.u021", 0x00000, 0x200000, CRC(45e43e3c) SHA1(71ada38c1f65738ca75ca75d2272f310ba43c72c) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "vx1301l01.u016", 0x00000, 0x200000, CRC(25dfbf4c) SHA1(8f9552cf54bdf7490055ebdb23fa758f5cddafb5) ) -ROM_END - -ROM_START( shatekds ) - SAMMYMDL_BIOS - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASEFF ) - ROM_LOAD( "29f016a.u015", 0x00000, 0x200000, CRC(7c779286) SHA1(db688ac2cad14c642e6da770212217a466e1bb64) ) - - ROM_REGION( 0x40000, "maincpu", 0 ) - ROM_COPY( "oki", 0x1c0000, 0x00000, 0x40000 ) - - ROM_REGION( 0x200000, "sprites", 0 ) - ROM_LOAD( "mx29f1610tc.u016", 0x00000, 0x200000, CRC(6e7d2c7d) SHA1(747d54eee26631966a91fd26b8b4beb32b67ddb7) ) -ROM_END - -} // anonymous namespace - - /*************************************************************************** Game Drivers @@ -2394,27 +1115,14 @@ ROM_END ***************************************************************************/ // Sigma Medal Games -GAME( 1997, dodghero, 0, dodghero, sigma_1b, sigmab98_state, empty_init, ROT0, "Sigma", "Minna Atsumare! Dodge Hero", 0 ) -GAME( 1997, sushimar, 0, dodghero, sigma_3b, sigmab98_state, empty_init, ROT0, "Sigma", "Itazura Daisuki! Sushimaru Kun", 0 ) -GAME( 1997, gegege, 0, sigmab98, sigma_1b, sigmab98_state, init_gegege, ROT0, "Sigma / Banpresto", "GeGeGe no Kitarou Youkai Slot", 0 ) -GAME( 1997, b3rinsya, 0, sigmab98, sigma_5b, sigmab98_state, init_b3rinsya, ROT0, "Sigma", "Burning Sanrinsya - Burning Tricycle", 0 ) // 1997 in the rom -GAME( 1997, pepsiman, 0, sigmab98, sigma_3b, sigmab98_state, init_pepsiman, ROT0, "Sigma", "PEPSI Man", 0 ) -GAME( 1998, tbeastw2, 0, sigmab98, sigma_3b, sigmab98_state, init_tbeastw2, ROT0, "Sigma / Transformer Production Company / Takara", "Transformers Beast Wars II", 0 ) // 1997 in the rom -GAME( 1997, ucytokyu, 0, sigmab98, sigma_js, sigmab98_state, init_ucytokyu, ROT0, "Sigma", "Uchuu Tokkyuu Medalian", 0 ) // Banpresto + others in the ROM -GAME( 2000, dashhero, 0, sigmab98, sigma_1b, sigmab98_state, init_dashhero, ROT0, "Sigma", "Minna Ganbare! Dash Hero", MACHINE_NOT_WORKING ) // 1999 in the rom +GAME( 1997, dodghero, 0, dodghero, sigma_1b, sigmab98_state, empty_init, ROT0, "Sigma", "Minna Atsumare! Dodge Hero", MACHINE_IMPERFECT_TIMING ) // Incorrect speed in title screen, etc. +GAME( 1997, sushimar, 0, dodghero, sigma_3b, sigmab98_state, empty_init, ROT0, "Sigma", "Itazura Daisuki! Sushimaru Kun", 0 ) +GAME( 1997, gegege, 0, sigmab98, sigma_1b, sigmab98_state, init_gegege, ROT0, "Sigma / Banpresto", "GeGeGe no Kitarou Youkai Slot", 0 ) +GAME( 1997, b3rinsya, 0, sigmab98, sigma_5b, sigmab98_state, init_b3rinsya, ROT0, "Sigma", "Burning Sanrinsya - Burning Tricycle", 0 ) // 1997 in the rom +GAME( 1997, pepsiman, 0, sigmab98, sigma_3b, sigmab98_state, init_pepsiman, ROT0, "Sigma", "PEPSI Man", 0 ) +GAME( 1998, tbeastw2, 0, sigmab98, sigma_3b, sigmab98_state, init_tbeastw2, ROT0, "Sigma / Transformer Production Company / Takara", "Transformers Beast Wars II", 0 ) // 1997 in the rom +GAME( 1997, ucytokyu, 0, sigmab98, sigma_js, sigmab98_state, init_ucytokyu, ROT0, "Sigma", "Uchuu Tokkyuu Medalian", 0 ) // Banpresto + others in the ROM +GAME( 2000, dashhero, 0, sigmab98, sigma_1b, sigmab98_state, init_dashhero, ROT0, "Sigma", "Minna Ganbare! Dash Hero", MACHINE_NOT_WORKING ) // 1999 in the rom // Banpresto Medal Games -GAME( 2001, lufykzku, 0, lufykzku, lufykzku, lufykzku_state, init_lufykzku, ROT0, "Banpresto / Eiichiro Oda / Shueisha - Fuji TV - Toho Animation", "Otakara Itadaki Luffy Kaizoku-Dan! (Japan, v1.02)", 0 ) -GAME( 2002, mnrockman,0, rockman, lufykzku, lufykzku_state, init_rockman, ROT0, "Banpresto / Capcom / Shogakukan / ShoPro / TV Tokyo", "Medal Network: Rockman EXE", 0 ) -// Sammy Medal Games: -GAME( 1999, sammymdl, 0, sammymdl, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Sammy Medal Game System BIOS", MACHINE_IS_BIOS_ROOT ) -GAME( 1999, kingyosu, sammymdl, itazuram, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Dokidoki Kingyo Sukui", 0 ) -GAME( 1999, shatekds, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Shatekids", 0 ) -GAME( 2000, animalc, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Animal Catch", 0 ) -GAME( 2000, itazuram, sammymdl, itazuram, sammymdl, sammymdl_state, init_itazuram, ROT0, "Sammy", "Itazura Monkey", 0 ) -GAME( 2000, pyenaget, sammymdl, pyenaget, sammymdl, sammymdl_state, init_haekaka, ROT0, "Sammy", "Pye-nage Taikai", 0 ) -GAME( 2000, tdoboon, sammymdl, tdoboon, haekaka, sammymdl_state, init_haekaka, ROT0, "Sammy", "Taihou de Doboon", 0 ) -GAME( 2001, haekaka, sammymdl, haekaka, haekaka, sammymdl_state, init_haekaka, ROT0, "Sammy", "Hae Hae Ka Ka Ka", 0 ) -GAME( 2001, kotekita, sammymdl, haekaka, sammymdl, sammymdl_state, init_haekaka, ROT0, "Sammy", "Kotekitai Slot", 0 ) -GAME( 2002, gunkids, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Hayauchi Gun Kids", 0 ) -GAME( 2003, wantouch, sammymdl, animalc, sammymdl, sammymdl_state, init_animalc, ROT0, "Sammy", "Wantouchable", 0 ) -GAME( 2003, gocowboy, 0, gocowboy, gocowboy, sammymdl_state, empty_init, ROT0, "Sammy", "Go Go Cowboy (English, prize)", 0 ) +GAME( 2001, lufykzku, 0, lufykzku, lufykzku, lufykzku_state, init_lufykzku, ROT0, "Banpresto / Eiichiro Oda / Shueisha - Fuji TV - Toho Animation", "Otakara Itadaki Luffy Kaizoku-Dan! (Japan, v1.02)", 0 ) +GAME( 2002, mnrockman,0, mnrockman, lufykzku, lufykzku_state, init_mnrockman, ROT0, "Banpresto / Capcom / Shogakukan / ShoPro / TV Tokyo", "Medal Network: Rockman EXE", 0 ) From 03fa21d73eadb3fd2527e870e86ab39ab5ddba09 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 11 Mar 2026 00:24:52 +0100 Subject: [PATCH 224/351] ui: include fastforward in unthrottle_mute, sound: don't send sound to osd if mute reason is ui related --- src/emu/sound.cpp | 51 ++++++------- src/frontend/mame/ui/moptions.cpp | 118 +++++++++++++++--------------- src/frontend/mame/ui/moptions.h | 1 - src/frontend/mame/ui/ui.cpp | 17 ++--- 4 files changed, 88 insertions(+), 99 deletions(-) diff --git a/src/emu/sound.cpp b/src/emu/sound.cpp index 77eb0ab6118..b796820772d 100644 --- a/src/emu/sound.cpp +++ b/src/emu/sound.cpp @@ -74,7 +74,7 @@ template void emu::detail::output_buffer_interleaved::prepare_spa if(!m_channels) return; - // Check if potential overflow, bring data back up front if needed + // Check if potential overflow, bring data back up front if needed u32 buffer_size = m_buffer.size() / m_channels; if(m_write_position + samples > buffer_size) { u32 source_start = (m_sync_position - m_history) * m_channels; @@ -84,7 +84,7 @@ template void emu::detail::output_buffer_interleaved::prepare_spa m_sync_position = m_history; } - // Clear the destination range + // Clear the destination range u32 fill_start = m_write_position * m_channels; u32 fill_end = (m_write_position + samples) * m_channels; std::fill(m_buffer.begin() + fill_start, m_buffer.begin() + fill_end, 0.0); @@ -155,7 +155,7 @@ template void emu::detail::output_buffer_flat::prepare_space(u32 if(!m_channels) return; - // Check if potential overflow, bring data back up front if needed + // Check if potential overflow, bring data back up front if needed u32 buffer_size = m_buffer[0].size(); if(m_write_position + samples > buffer_size) { u32 source_start = m_sync_position - m_history; @@ -166,7 +166,7 @@ template void emu::detail::output_buffer_flat::prepare_space(u32 m_sync_position = m_history; } - // Clear the destination range + // Clear the destination range u32 fill_start = m_write_position; u32 fill_end = m_write_position + samples; for(u32 channel = 0; channel != m_channels; channel++) @@ -259,7 +259,6 @@ template void emu::detail::output_buffer_flat::resample(u32 previ std::copy(m_buffer[channel].begin(), m_buffer[channel].begin() + m_write_position, copy.begin()); // Interpolate the buffer contents - for(u32 nindex = 0; nindex != nend; nindex++) { u32 pi0 = std::clamp(pindex, 0U, m_write_position - 1); u32 pi1 = std::clamp(pindex + 1, 0U, m_write_position - 1); @@ -707,7 +706,6 @@ void sound_stream::sync(attotime now) - attotime sound_stream::sample_to_time(u64 index) const { attotime res = attotime::zero; @@ -864,20 +862,20 @@ void sound_manager::after_devices_init() // Handle all the ready streams in a lifo matter (better for cache when generating sound) while(!ready_streams.empty()) { sound_stream *stream = ready_streams.back(); - // add the stream to the update order + // add the stream to the update order m_ordered_streams.emplace_back(stream); ready_streams.resize(ready_streams.size() - 1); - // reduce the depcount for all the streams that depend on the updated stream + // reduce the depcount for all the streams that depend on the updated stream for(sound_stream *target : stream->targets()) if(!--depcounts[target]) - // when the depcount is zero, a stream is ready to be updated + // when the depcount is zero, a stream is ready to be updated ready_streams.emplace_back(target); } // If not all streams ended up in the sorted list, we have a loop if(m_ordered_streams.size() != m_stream_list.size()) { - // Apply the same algorithm from the other side to the - // remaining streams to only keep the ones in the loop + // Apply the same algorithm from the other side to the + // remaining streams to only keep the ones in the loop std::map inverted_depcounts; for(auto &dpc : depcounts) @@ -960,7 +958,6 @@ void sound_manager::input_get(int id, sound_stream &stream) u64 dest_end_pos = dest_start_pos + dest_samples; u32 skip = stream.output_count(); - for(const auto &step : m_microphones[id].m_input_mixing_steps) { if(step.m_mode == mixing_step::CLEAR || step.m_mode == mixing_step::COPY) fatalerror("Impossible step encountered in input\n"); @@ -1034,8 +1031,7 @@ void sound_manager::run_effects() std::unique_lock lock(m_effects_mutex); #endif - // Copy the data to the effects threads, expanding as needed - // when -speed is in use + // Copy the data to the effects threads, expanding as needed when -speed is in use double sf = machine().video().speed_factor(); if(sf == 1000) { for(auto &si : m_speakers) { @@ -1162,14 +1158,16 @@ void sound_manager::run_effects() for(auto &si : m_speakers) si.m_effects.back().m_buffer.sync(); - machine().osd().sound_begin_update(); + if(!(m_muted & (MUTE_REASON_PAUSE | MUTE_REASON_UI | MUTE_REASON_DEBUGGER))) { + machine().osd().sound_begin_update(); - // Send the result to the osd - for(auto &stream : m_osd_output_streams) - if(stream.m_samples) - machine().osd().sound_stream_sink_update(stream.m_id, stream.m_buffer.data(), stream.m_samples); + // Send the result to the osd + for(auto &stream : m_osd_output_streams) + if(stream.m_samples) + machine().osd().sound_stream_sink_update(stream.m_id, stream.m_buffer.data(), stream.m_samples); - machine().osd().sound_end_update(); + machine().osd().sound_end_update(); + } #ifndef SOUND_DISABLE_THREADING dlock.lock(); @@ -1305,9 +1303,10 @@ void sound_manager::resume() void sound_manager::config_load(config_type cfg_type, config_level cfg_level, util::xml::data_node const *parentnode) { - if(cfg_type == config_type::FINAL) + if(cfg_type == config_type::FINAL) { // Note that the config is loaded m_osd_info.m_generation = 0xffff0001; + } // If no config file, ignore if(!parentnode) @@ -1389,7 +1388,6 @@ void sound_manager::config_load(config_type cfg_type, config_level cfg_level, ut intf->set_user_output_gain(channel, lv_node->get_attribute_float("gain", 1.0)); } - // Mapping configuration m_configs.clear(); for(util::xml::data_node const *node = parentnode->get_child("sound_map"); node != nullptr; node = node->get_next_sibling("sound_map")) { @@ -1791,7 +1789,6 @@ void sound_manager::startup_cleanups() } } - // If there's no default source replace all the default source config // entries into the first source available if(!osd_info.m_default_source) { @@ -2103,7 +2100,6 @@ void sound_manager::update_osd_streams() m_osd_output_streams.clear(); // Find the index of a sound_io_device in the speaker_info vector or the microphone_info vector - auto find_sound_io_index = [this](sound_io_device *dev) -> u32 { for(u32 si = 0; si != m_speakers.size(); si++) if(&m_speakers[si].m_dev == dev) @@ -2114,7 +2110,6 @@ void sound_manager::update_osd_streams() return 0; // Can't happen }; - // Find a pointer to a node_info from the node id auto find_node_info = [this](u32 node) -> const osd::audio_info::node_info * { for(const auto &ni : m_osd_info.m_nodes) { @@ -2202,7 +2197,6 @@ void sound_manager::update_osd_streams() return get_input_stream_for_node_and_device(node, dev, rate, is_system_default, true); }; - auto get_output_stream_for_node_and_channel = [this, &get_output_stream_for_node_and_device] (const osd::audio_info::node_info *node, u32 node_channel, sound_io_device *dev, u32 rate, bool is_system_default) -> u32 { // First check if there's an active stream with the correct channel not used yet for(u32 sid = 0; sid != m_osd_output_streams.size(); sid++) { @@ -2354,8 +2348,7 @@ void sound_manager::update_osd_streams() // Retrieve or create the one osd stream for a given // destination. First check if we already have it, then - // whether it was previously created, then otherwise create - // it. + // whether it was previously created, then otherwise create it. auto get_input_stream_for_node = [this, ¤t_input_streams, &input_stream_per_node] (const osd::audio_info::node_info *node, u32 rate, bool is_system_default) -> u32 { // Pick up the existing stream if there's one @@ -2671,7 +2664,6 @@ void sound_manager::mapping_update() - //**// Global sound system update u64 sound_manager::rate_and_time_to_index(attotime time, u32 sample_rate) const @@ -2711,7 +2703,6 @@ void sound_manager::streams_update() #endif } - // Send the hooked samples to lua { std::map>> sound_data; diff --git a/src/frontend/mame/ui/moptions.cpp b/src/frontend/mame/ui/moptions.cpp index d6eba821947..664cf2063b1 100644 --- a/src/frontend/mame/ui/moptions.cpp +++ b/src/frontend/mame/ui/moptions.cpp @@ -20,72 +20,72 @@ const options_entry ui_options::s_option_entries[] = { // search path options - { nullptr, nullptr, option_type::HEADER, "UI SEARCH PATH OPTIONS" }, - { OPTION_HISTORY_PATH, "history;dats;.", option_type::MULTIPATH, "path to system/software info files" }, - { OPTION_CATEGORYINI_PATH, "folders", option_type::MULTIPATH, "path to category ini files" }, - { OPTION_CABINETS_PATH, "cabinets;cabdevs", option_type::MULTIPATH, "path to cabinets / devices image" }, - { OPTION_CPANELS_PATH, "cpanel", option_type::MULTIPATH, "path to control panel image" }, - { OPTION_PCBS_PATH, "pcb", option_type::MULTIPATH, "path to pcbs image" }, - { OPTION_FLYERS_PATH, "flyers", option_type::MULTIPATH, "path to flyers image" }, - { OPTION_TITLES_PATH, "titles", option_type::MULTIPATH, "path to titles image" }, - { OPTION_ENDS_PATH, "ends", option_type::MULTIPATH, "path to ends image" }, - { OPTION_MARQUEES_PATH, "marquees", option_type::MULTIPATH, "path to marquees image" }, + { nullptr, nullptr, option_type::HEADER, "UI SEARCH PATH OPTIONS" }, + { OPTION_HISTORY_PATH, "history;dats;.", option_type::MULTIPATH, "path to system/software info files" }, + { OPTION_CATEGORYINI_PATH, "folders", option_type::MULTIPATH, "path to category ini files" }, + { OPTION_CABINETS_PATH, "cabinets;cabdevs", option_type::MULTIPATH, "path to cabinets / devices image" }, + { OPTION_CPANELS_PATH, "cpanel", option_type::MULTIPATH, "path to control panel image" }, + { OPTION_PCBS_PATH, "pcb", option_type::MULTIPATH, "path to pcbs image" }, + { OPTION_FLYERS_PATH, "flyers", option_type::MULTIPATH, "path to flyers image" }, + { OPTION_TITLES_PATH, "titles", option_type::MULTIPATH, "path to titles image" }, + { OPTION_ENDS_PATH, "ends", option_type::MULTIPATH, "path to ends image" }, + { OPTION_MARQUEES_PATH, "marquees", option_type::MULTIPATH, "path to marquees image" }, { OPTION_ARTPREV_PATH, "artwork preview;artpreview", option_type::MULTIPATH, "path to artwork preview image" }, - { OPTION_BOSSES_PATH, "bosses", option_type::MULTIPATH, "path to bosses image" }, - { OPTION_LOGOS_PATH, "logo", option_type::MULTIPATH, "path to logos image" }, - { OPTION_SCORES_PATH, "scores", option_type::MULTIPATH, "path to scores image" }, - { OPTION_VERSUS_PATH, "versus", option_type::MULTIPATH, "path to versus image" }, - { OPTION_GAMEOVER_PATH, "gameover", option_type::MULTIPATH, "path to gameover image" }, - { OPTION_HOWTO_PATH, "howto", option_type::MULTIPATH, "path to howto image" }, - { OPTION_SELECT_PATH, "select", option_type::MULTIPATH, "path to select image" }, - { OPTION_ICONS_PATH, "icons", option_type::MULTIPATH, "path to ICOns image" }, - { OPTION_COVER_PATH, "covers", option_type::MULTIPATH, "path to software cover image" }, - { OPTION_UI_PATH, "ui", option_type::MULTIPATH, "path to UI files" }, + { OPTION_BOSSES_PATH, "bosses", option_type::MULTIPATH, "path to bosses image" }, + { OPTION_LOGOS_PATH, "logo", option_type::MULTIPATH, "path to logos image" }, + { OPTION_SCORES_PATH, "scores", option_type::MULTIPATH, "path to scores image" }, + { OPTION_VERSUS_PATH, "versus", option_type::MULTIPATH, "path to versus image" }, + { OPTION_GAMEOVER_PATH, "gameover", option_type::MULTIPATH, "path to gameover image" }, + { OPTION_HOWTO_PATH, "howto", option_type::MULTIPATH, "path to howto image" }, + { OPTION_SELECT_PATH, "select", option_type::MULTIPATH, "path to select image" }, + { OPTION_ICONS_PATH, "icons", option_type::MULTIPATH, "path to ICOns image" }, + { OPTION_COVER_PATH, "covers", option_type::MULTIPATH, "path to software cover image" }, + { OPTION_UI_PATH, "ui", option_type::MULTIPATH, "path to UI files" }, // misc options - { nullptr, nullptr, option_type::HEADER, "UI MISC OPTIONS" }, - { OPTION_SYSTEM_NAMES, "", option_type::MULTIPATH, "translated system names file" }, - { OPTION_SKIP_WARNINGS, "0", option_type::BOOLEAN, "display fewer repeated warnings about imperfect emulation" }, - { OPTION_UNTHROTTLE_MUTE ";utm", "0", option_type::BOOLEAN, "mute audio when running unthrottled" }, + { nullptr, nullptr, option_type::HEADER, "UI MISC OPTIONS" }, + { OPTION_SYSTEM_NAMES, "", option_type::MULTIPATH, "translated system names file" }, + { OPTION_SKIP_WARNINGS, "0", option_type::BOOLEAN, "display fewer repeated warnings about imperfect emulation" }, + { OPTION_UNTHROTTLE_MUTE ";utm", "0", option_type::BOOLEAN, "mute audio when running unthrottled or when fast-forwarding" }, // UI options - { nullptr, nullptr, option_type::HEADER, "UI OPTIONS" }, - { OPTION_INFOS_SIZE "(0.20-1.00)", "0.75", option_type::FLOAT, "UI right panel infos text size (0.20 - 1.00)" }, - { OPTION_FONT_ROWS "(25-40)", "30", option_type::INTEGER, "UI font lines per screen (25 - 40)" }, - { OPTION_UI_BORDER_COLOR, "ffffffff", option_type::STRING, "UI border color (ARGB)" }, - { OPTION_UI_BACKGROUND_COLOR, "ef101030", option_type::STRING, "UI background color (ARGB)" }, - { OPTION_UI_CLONE_COLOR, "ff808080", option_type::STRING, "UI clone color (ARGB)" }, - { OPTION_UI_DIPSW_COLOR, "ffffff00", option_type::STRING, "UI dipswitch color (ARGB)" }, - { OPTION_UI_GFXVIEWER_BG_COLOR, "ef101030", option_type::STRING, "UI gfx viewer color (ARGB)" }, - { OPTION_UI_MOUSEDOWN_BG_COLOR, "b0606000", option_type::STRING, "UI mouse down bg color (ARGB)" }, - { OPTION_UI_MOUSEDOWN_COLOR, "ffffff80", option_type::STRING, "UI mouse down color (ARGB)" }, - { OPTION_UI_MOUSEOVER_BG_COLOR, "70404000", option_type::STRING, "UI mouse over bg color (ARGB)" }, - { OPTION_UI_MOUSEOVER_COLOR, "ffffff80", option_type::STRING, "UI mouse over color (ARGB)" }, - { OPTION_UI_SELECTED_BG_COLOR, "ef808000", option_type::STRING, "UI selected bg color (ARGB)" }, - { OPTION_UI_SELECTED_COLOR, "ffffff00", option_type::STRING, "UI selected color (ARGB)" }, - { OPTION_UI_SLIDER_COLOR, "ffffffff", option_type::STRING, "UI slider color (ARGB)" }, - { OPTION_UI_SUBITEM_COLOR, "ffffffff", option_type::STRING, "UI subitem color (ARGB)" }, - { OPTION_UI_TEXT_BG_COLOR, "ef000000", option_type::STRING, "UI text bg color (ARGB)" }, - { OPTION_UI_TEXT_COLOR, "ffffffff", option_type::STRING, "UI text color (ARGB)" }, - { OPTION_UI_UNAVAILABLE_COLOR, "ff404040", option_type::STRING, "UI unavailable color (ARGB)" }, + { nullptr, nullptr, option_type::HEADER, "UI OPTIONS" }, + { OPTION_INFOS_SIZE "(0.20-1.00)", "0.75", option_type::FLOAT, "UI right panel infos text size (0.20 - 1.00)" }, + { OPTION_FONT_ROWS "(25-40)", "30", option_type::INTEGER, "UI font lines per screen (25 - 40)" }, + { OPTION_UI_BORDER_COLOR, "ffffffff", option_type::STRING, "UI border color (ARGB)" }, + { OPTION_UI_BACKGROUND_COLOR, "ef101030", option_type::STRING, "UI background color (ARGB)" }, + { OPTION_UI_CLONE_COLOR, "ff808080", option_type::STRING, "UI clone color (ARGB)" }, + { OPTION_UI_DIPSW_COLOR, "ffffff00", option_type::STRING, "UI dipswitch color (ARGB)" }, + { OPTION_UI_GFXVIEWER_BG_COLOR, "ef101030", option_type::STRING, "UI gfx viewer color (ARGB)" }, + { OPTION_UI_MOUSEDOWN_BG_COLOR, "b0606000", option_type::STRING, "UI mouse down bg color (ARGB)" }, + { OPTION_UI_MOUSEDOWN_COLOR, "ffffff80", option_type::STRING, "UI mouse down color (ARGB)" }, + { OPTION_UI_MOUSEOVER_BG_COLOR, "70404000", option_type::STRING, "UI mouse over bg color (ARGB)" }, + { OPTION_UI_MOUSEOVER_COLOR, "ffffff80", option_type::STRING, "UI mouse over color (ARGB)" }, + { OPTION_UI_SELECTED_BG_COLOR, "ef808000", option_type::STRING, "UI selected bg color (ARGB)" }, + { OPTION_UI_SELECTED_COLOR, "ffffff00", option_type::STRING, "UI selected color (ARGB)" }, + { OPTION_UI_SLIDER_COLOR, "ffffffff", option_type::STRING, "UI slider color (ARGB)" }, + { OPTION_UI_SUBITEM_COLOR, "ffffffff", option_type::STRING, "UI subitem color (ARGB)" }, + { OPTION_UI_TEXT_BG_COLOR, "ef000000", option_type::STRING, "UI text bg color (ARGB)" }, + { OPTION_UI_TEXT_COLOR, "ffffffff", option_type::STRING, "UI text color (ARGB)" }, + { OPTION_UI_UNAVAILABLE_COLOR, "ff404040", option_type::STRING, "UI unavailable color (ARGB)" }, // system/software selection menu options - { nullptr, nullptr, option_type::HEADER, "SYSTEM/SOFTWARE SELECTION MENU OPTIONS" }, - { OPTION_HIDE_PANELS "(0-3)", "0", option_type::INTEGER, "UI hide left/right panel in main view (0 = Show all, 1 = hide left, 2 = hide right, 3 = hide both" }, - { OPTION_USE_BACKGROUND, "1", option_type::BOOLEAN, "enable background image in main view" }, - { OPTION_SKIP_BIOS_MENU, "0", option_type::BOOLEAN, "skip bios submenu, start with configured or default" }, - { OPTION_SKIP_PARTS_MENU, "0", option_type::BOOLEAN, "skip parts submenu, start with first part" }, - { OPTION_REMEMBER_LAST, "1", option_type::BOOLEAN, "initially select last used system in main menu" }, - { OPTION_LAST_USED_MACHINE, "", option_type::STRING, "last selected system" }, - { OPTION_LAST_USED_FILTER, "", option_type::STRING, "last used system filter" }, - { OPTION_SYSTEM_RIGHT_PANEL, "image", option_type::STRING, "selected system right panel tab" }, - { OPTION_SOFTWARE_RIGHT_PANEL, "image", option_type::STRING, "selected software right panel tab" }, - { OPTION_SYSTEM_RIGHT_IMAGE, "snap", option_type::STRING, "selected system right panel image" }, - { OPTION_SOFTWARE_RIGHT_IMAGE, "snap", option_type::STRING, "selected software right panel image" }, - { OPTION_ENLARGE_SNAPS, "1", option_type::BOOLEAN, "enlarge images in right panel (keeping aspect ratio)" }, - { OPTION_FORCED4X3, "1", option_type::BOOLEAN, "force 4:3 aspect ratio for snapshots in the software menu" }, - { OPTION_INFO_AUTO_AUDIT, "0", option_type::BOOLEAN, "automatically audit media for the general info panel" }, - { OPTION_HIDE_ROMLESS, "1", option_type::BOOLEAN, "hide systems that don't require ROMs in the available system filter" }, + { nullptr, nullptr, option_type::HEADER, "SYSTEM/SOFTWARE SELECTION MENU OPTIONS" }, + { OPTION_HIDE_PANELS "(0-3)", "0", option_type::INTEGER, "UI hide left/right panel in main view (0 = Show all, 1 = hide left, 2 = hide right, 3 = hide both" }, + { OPTION_USE_BACKGROUND, "1", option_type::BOOLEAN, "enable background image in main view" }, + { OPTION_SKIP_BIOS_MENU, "0", option_type::BOOLEAN, "skip bios submenu, start with configured or default" }, + { OPTION_SKIP_PARTS_MENU, "0", option_type::BOOLEAN, "skip parts submenu, start with first part" }, + { OPTION_REMEMBER_LAST, "1", option_type::BOOLEAN, "initially select last used system in main menu" }, + { OPTION_LAST_USED_MACHINE, "", option_type::STRING, "last selected system" }, + { OPTION_LAST_USED_FILTER, "", option_type::STRING, "last used system filter" }, + { OPTION_SYSTEM_RIGHT_PANEL, "image", option_type::STRING, "selected system right panel tab" }, + { OPTION_SOFTWARE_RIGHT_PANEL, "image", option_type::STRING, "selected software right panel tab" }, + { OPTION_SYSTEM_RIGHT_IMAGE, "snap", option_type::STRING, "selected system right panel image" }, + { OPTION_SOFTWARE_RIGHT_IMAGE, "snap", option_type::STRING, "selected software right panel image" }, + { OPTION_ENLARGE_SNAPS, "1", option_type::BOOLEAN, "enlarge images in right panel (keeping aspect ratio)" }, + { OPTION_FORCED4X3, "1", option_type::BOOLEAN, "force 4:3 aspect ratio for snapshots in the software menu" }, + { OPTION_INFO_AUTO_AUDIT, "0", option_type::BOOLEAN, "automatically audit media for the general info panel" }, + { OPTION_HIDE_ROMLESS, "1", option_type::BOOLEAN, "hide systems that don't require ROMs in the available system filter" }, // sentinel { nullptr } diff --git a/src/frontend/mame/ui/moptions.h b/src/frontend/mame/ui/moptions.h index ab854870f32..ed5867f9036 100644 --- a/src/frontend/mame/ui/moptions.h +++ b/src/frontend/mame/ui/moptions.h @@ -42,7 +42,6 @@ #define OPTION_SKIP_WARNINGS "skip_warnings" #define OPTION_UNTHROTTLE_MUTE "unthrottle_mute" - // core UI options #define OPTION_INFOS_SIZE "infos_text_size" #define OPTION_FONT_ROWS "font_rows" diff --git a/src/frontend/mame/ui/ui.cpp b/src/frontend/mame/ui/ui.cpp index f2c9b7d1608..892e4501315 100644 --- a/src/frontend/mame/ui/ui.cpp +++ b/src/frontend/mame/ui/ui.cpp @@ -1753,22 +1753,17 @@ uint32_t mame_ui_manager::handler_ingame(render_container &container) if (machine().ui_input().pressed(IPT_UI_SHOW_FPS)) set_show_fps(!show_fps()); - // increment frameskip? + // increment frameskip if (machine().ui_input().pressed(IPT_UI_FRAMESKIP_INC)) increase_frameskip(); - // decrement frameskip? + // decrement frameskip if (machine().ui_input().pressed(IPT_UI_FRAMESKIP_DEC)) decrease_frameskip(); - // toggle throttle? + // toggle throttle if (machine().ui_input().pressed(IPT_UI_THROTTLE)) - { - const bool new_throttle_state = !machine().video().throttled(); - machine().video().set_throttled(new_throttle_state); - if (m_unthrottle_mute) - machine().sound().ui_mute(!new_throttle_state); - } + machine().video().set_throttled(!machine().video().throttled()); // check for fast forward if (machine().ioport().type_pressed(IPT_UI_FAST_FORWARD)) @@ -1779,6 +1774,10 @@ uint32_t mame_ui_manager::handler_ingame(render_container &container) else machine().video().set_fastforward(false); + // update mute when unthrottled + if (m_unthrottle_mute) + machine().sound().ui_mute(machine().video().fastforward() || !machine().video().throttled()); + return 0; } From 967f3636c8190abb2519e5f4a7e02c494eb05381 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 11 Mar 2026 04:02:55 +0100 Subject: [PATCH 225/351] sound: change abuffer resync to more abrupt --- src/emu/sound.cpp | 14 +++---- src/osd/modules/sound/sound_module.cpp | 54 +++++++++++++++++--------- src/osd/modules/sound/sound_module.h | 6 ++- 3 files changed, 47 insertions(+), 27 deletions(-) diff --git a/src/emu/sound.cpp b/src/emu/sound.cpp index b796820772d..3016564d61e 100644 --- a/src/emu/sound.cpp +++ b/src/emu/sound.cpp @@ -1158,16 +1158,14 @@ void sound_manager::run_effects() for(auto &si : m_speakers) si.m_effects.back().m_buffer.sync(); - if(!(m_muted & (MUTE_REASON_PAUSE | MUTE_REASON_UI | MUTE_REASON_DEBUGGER))) { - machine().osd().sound_begin_update(); + machine().osd().sound_begin_update(); - // Send the result to the osd - for(auto &stream : m_osd_output_streams) - if(stream.m_samples) - machine().osd().sound_stream_sink_update(stream.m_id, stream.m_buffer.data(), stream.m_samples); + // Send the result to the osd + for(auto &stream : m_osd_output_streams) + if(stream.m_samples) + machine().osd().sound_stream_sink_update(stream.m_id, stream.m_buffer.data(), stream.m_samples); - machine().osd().sound_end_update(); - } + machine().osd().sound_end_update(); #ifndef SOUND_DISABLE_THREADING dlock.lock(); diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index c1e93a26b28..c86b906ba50 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -6,6 +6,7 @@ #include #include +#include #include @@ -14,8 +15,21 @@ sound_module::~sound_module() // implementing this here forces the vtable and inline virtual member functions to be instantiated } -sound_module::abuffer::abuffer(uint32_t channels) noexcept : m_channels(channels), m_used_buffers(0), m_last_sample(channels, 0) +sound_module::abuffer::abuffer(uint32_t channels) noexcept : + m_channels(channels), + m_hindex(0), + m_last_sample(channels, 0) { + clear(); +} + +void sound_module::abuffer::clear() +{ + m_used_buffers = 0; + m_used_buffers_prev = 0; + m_overflow = false; + std::fill(m_history.begin(), m_history.end(), 0); + m_delta = 0; m_delta2 = 0; } @@ -55,7 +69,7 @@ void sound_module::abuffer::get(int16_t *data, uint32_t samples) noexcept pos += avail; data += avail * m_channels; } - // printf("# %d %d\n", m_delta, m_delta2); + //printf("# %d %d\n", m_delta, m_delta2); } void sound_module::abuffer::push(const int16_t *data, uint32_t samples) @@ -68,23 +82,27 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) std::copy_n(data, samples * m_channels, buf.m_data.data()); std::copy_n(data + ((samples - 1) * m_channels), m_channels, m_last_sample.data()); - if(m_used_buffers > 10) { - for(uint32_t i=0; i != m_used_buffers-10; i++) - m_delta2 -= (m_buffers[i].m_data.size()/m_channels - m_buffers[i].m_cpos); - // If there are way too many buffers, drop some so only 10 are left (roughly 0.2s) - for(unsigned i = 0; 10 > i; ++i) { - using std::swap; - swap(m_buffers[i], m_buffers[m_used_buffers + i - 10]); - } - m_used_buffers = 10; - } else if(m_used_buffers >= 5) { - // If there are too many buffers, remove five samples per buffer - // to slowly resync to reduce latency (4 seconds to - // compensate one buffer, roughly) - m_delta2 -= std::max(samples / 200, 1); - buf.m_cpos = std::max(samples / 200, 1); + m_history[m_hindex] = m_used_buffers_prev - m_used_buffers; + m_hindex = (m_hindex + 1) % m_history.size(); + + if(m_overflow && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { + // Once it's stabilized after an overflow, clear the buffers + // to immediately reduce latency to the minimum. + clear(); } - // printf("# %d %d\n", m_delta, m_delta2); + else if(m_used_buffers > 8) { + for(uint32_t i = 0; i != m_used_buffers - 8; i++) + m_delta2 -= (m_buffers[i].m_data.size() / m_channels - m_buffers[i].m_cpos); + // If there are way too many buffers, drop some so only 8 are left (roughly 0.16s) + for(uint32_t i = 0; i < 8; i++) { + using std::swap; + swap(m_buffers[i], m_buffers[m_used_buffers + i - 8]); + } + m_used_buffers = 8; + m_overflow = true; + } + m_used_buffers_prev = m_used_buffers; + //printf("# %d %d\n", m_delta, m_delta2); } uint32_t sound_module::abuffer::available() const noexcept diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index 85d5b50c720..044ff143aec 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -42,9 +42,9 @@ protected: class abuffer { public: abuffer(uint32_t channels) noexcept; + void clear(); void get(int16_t *data, uint32_t samples) noexcept; void push(const int16_t *data, uint32_t samples); - void clear() noexcept { m_used_buffers = 0; } uint32_t channels() const noexcept { return m_channels; } uint32_t available() const noexcept; @@ -66,6 +66,10 @@ protected: int32_t m_delta, m_delta2; uint32_t m_channels; uint32_t m_used_buffers; + uint32_t m_used_buffers_prev; + std::array m_history; + uint8_t m_hindex; + bool m_overflow; std::vector m_last_sample; std::vector m_buffers; }; From c468a345e30c40d8f9fe774101f883fadc561095 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 11 Mar 2026 08:01:48 +0100 Subject: [PATCH 226/351] sound abuffer: after overflow, reduce buffers to 1 instead of clear --- src/emu/sound.cpp | 2 +- src/osd/modules/sound/sound_module.cpp | 32 ++++++++++++++++---------- src/osd/modules/sound/sound_module.h | 2 +- 3 files changed, 22 insertions(+), 14 deletions(-) diff --git a/src/emu/sound.cpp b/src/emu/sound.cpp index 3016564d61e..a8f7727bad8 100644 --- a/src/emu/sound.cpp +++ b/src/emu/sound.cpp @@ -2666,7 +2666,7 @@ void sound_manager::mapping_update() u64 sound_manager::rate_and_time_to_index(attotime time, u32 sample_rate) const { - return time.m_seconds * sample_rate + muldivu_64(time.m_attoseconds, sample_rate, ATTOSECONDS_PER_SECOND); + return time.m_seconds * sample_rate + muldivu_64(time.m_attoseconds, sample_rate, ATTOSECONDS_PER_SECOND); } void sound_manager::update(s32) diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index c86b906ba50..d8ba6362aa2 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -69,7 +69,7 @@ void sound_module::abuffer::get(int16_t *data, uint32_t samples) noexcept pos += avail; data += avail * m_channels; } - //printf("# %d %d\n", m_delta, m_delta2); + //printf("# %d %d %d\n", m_used_buffers, m_delta, m_delta2); } void sound_module::abuffer::push(const int16_t *data, uint32_t samples) @@ -85,24 +85,32 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) m_history[m_hindex] = m_used_buffers_prev - m_used_buffers; m_hindex = (m_hindex + 1) % m_history.size(); + auto reduce_buffers = [&](uint32_t n) { + for(uint32_t i = 0; i != m_used_buffers - n; i++) + m_delta2 -= (m_buffers[i].m_data.size() / m_channels - m_buffers[i].m_cpos); + for(uint32_t i = 0; i < n; i++) { + using std::swap; + swap(m_buffers[i], m_buffers[m_used_buffers + i - n]); + } + m_used_buffers = n; + }; + if(m_overflow && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { - // Once it's stabilized after an overflow, clear the buffers - // to immediately reduce latency to the minimum. - clear(); + if(m_used_buffers > 1) { + // Once it's stabilized after an overflow, reduce latency to the minimum + reduce_buffers(1); + std::fill(m_history.begin(), m_history.end(), 0); + } + m_overflow = false; } else if(m_used_buffers > 8) { - for(uint32_t i = 0; i != m_used_buffers - 8; i++) - m_delta2 -= (m_buffers[i].m_data.size() / m_channels - m_buffers[i].m_cpos); // If there are way too many buffers, drop some so only 8 are left (roughly 0.16s) - for(uint32_t i = 0; i < 8; i++) { - using std::swap; - swap(m_buffers[i], m_buffers[m_used_buffers + i - 8]); - } - m_used_buffers = 8; + reduce_buffers(8); m_overflow = true; } + m_used_buffers_prev = m_used_buffers; - //printf("# %d %d\n", m_delta, m_delta2); + //printf("# %d %d %d\n", m_used_buffers, m_delta, m_delta2); } uint32_t sound_module::abuffer::available() const noexcept diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index 044ff143aec..c47142ed135 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -67,7 +67,7 @@ protected: uint32_t m_channels; uint32_t m_used_buffers; uint32_t m_used_buffers_prev; - std::array m_history; + std::array m_history; uint8_t m_hindex; bool m_overflow; std::vector m_last_sample; From b117011a7bdead5af0ac3b8a117f1af9c66d75b0 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 11 Mar 2026 08:24:51 +0100 Subject: [PATCH 227/351] New systems marked not working ------------------------------ Huanqiu Dafuweng [little0] - ces/galgames.cpp: dumped version 1.71 [Brian Troha] --- src/mame/ces/galgames.cpp | 69 ++++++++++-------- src/mame/mame.lst | 5 +- src/mame/misc/haiwei.cpp | 147 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 192 insertions(+), 29 deletions(-) create mode 100644 src/mame/misc/haiwei.cpp diff --git a/src/mame/ces/galgames.cpp b/src/mame/ces/galgames.cpp index c436f5ef3af..c9e1f8d374d 100644 --- a/src/mame/ces/galgames.cpp +++ b/src/mame/ces/galgames.cpp @@ -20,6 +20,9 @@ To Do: Notes: +- v1.71 program ROMs were preproduction ROMs and there are known issue with memory management. Using v1.71 with StarPak carts + will produce freezing and possible stability issues. + - 4 known game carts where produced, these are: Star Pak 1: Seek the Peaks, 21 Thunder, Solar Solitaire, Prism Poker, Pharaoh's Tomb, Magic Black Jack, @@ -34,6 +37,8 @@ Notes: - Early flyers show "Star Pak 1" titled as Cardmania! - Early flyers show "Star Pak 2" titled as Galaxy Games Volume 2 - There is an early flyer showing a Cardmania! cartridge in front of a partialy blocked cartridge labeled Casino + According to a developer: "The casino cart was just a concept. We did a version that was in a small standup cabinet and + put it on test in bars as potential grey area gaming device with some of the card games but it never went anywhere" ***************************************************************************/ @@ -742,6 +747,27 @@ public: m_okiram(*this, "okiram") { } + void galgames_base(machine_config &config) ATTR_COLD; + void galgbase(machine_config &config) ATTR_COLD; + void galgame2(machine_config &config) ATTR_COLD; + void galgame3(machine_config &config) ATTR_COLD; + +protected: + virtual void video_start() override ATTR_COLD; + +private: + required_device m_maincpu; + required_device m_screen; + required_device m_palette; + required_device m_blitter; + required_device m_oki; + required_device m_slot; + required_shared_ptr m_okiram; + + u8 m_palette_offset = 0; + u8 m_palette_index = 0; + u8 m_palette_data[3]{}; + void blitter_irq_callback(int state); TIMER_DEVICE_CALLBACK_MEMBER(scanline_interrupt); @@ -756,28 +782,9 @@ public: u16 fpga_status_r(); void outputs_w(offs_t offset, u16 data, u16 mem_mask = ~0); - void galgames_base(machine_config &config); - void galgbios(machine_config &config); - void galgame2(machine_config &config); - void galgame3(machine_config &config); void blitter_map(address_map &map) ATTR_COLD; void galgames_map(address_map &map) ATTR_COLD; void oki_map(address_map &map) ATTR_COLD; - -protected: - virtual void video_start() override ATTR_COLD; - - required_device m_maincpu; - required_device m_screen; - required_device m_palette; - required_device m_blitter; - required_device m_oki; - required_device m_slot; - required_shared_ptr m_okiram; - - u8 m_palette_offset = 0; - u8 m_palette_index = 0; - u8 m_palette_data[3]{}; }; void galgames_state::blitter_irq_callback(int state) @@ -1027,7 +1034,7 @@ void galgames_state::galgames_base(machine_config &config) m_oki->add_route(ALL_OUTPUTS, "mono", 1.0); } -void galgames_state::galgbios(machine_config &config) +void galgames_state::galgbase(machine_config &config) { galgames_base(config); GALGAMES_CART(config, "cart1", 1); @@ -1079,10 +1086,12 @@ Board silkscreened 237-0211-00 Cartridge based mother board Holds up to 4 cartridges -Chips labeled +Most recent chips labeled GALAXY U1 V1.90 12/1/98 GALAXY U2 V1.90 12/1/98 +NOTE: PCB labels the program ROMs as CARTRIDGE0 + Motorola MC68HC000FN12 24 MHz oscillator Xilinx XC5206 @@ -1111,7 +1120,11 @@ Copyright notice in rom states: Creative Electronics & Software Written by Keith \ ROM_SYSTEM_BIOS( 1, "1.80", "v1.80 10/05/98" ) \ ROM_LOAD16_BYTE_BIOS( 1, "galaxy_u2__v1.80_10-15-98.u2", 0x000000, 0x100000, CRC(73cff284) SHA1(e6f7d92999cdb478c21c3b65a04eade84299ac12) ) \ - ROM_LOAD16_BYTE_BIOS( 1, "galaxy_u1__v1.80_10-15-98.u1", 0x000001, 0x100000, CRC(e3ae423c) SHA1(66d1964845a99a5ed4b19b4135b55cde6b5fe295) ) + ROM_LOAD16_BYTE_BIOS( 1, "galaxy_u1__v1.80_10-15-98.u1", 0x000001, 0x100000, CRC(e3ae423c) SHA1(66d1964845a99a5ed4b19b4135b55cde6b5fe295) ) \ + \ + ROM_SYSTEM_BIOS( 2, "1.71", "v1.71 07/08/98" ) \ + ROM_LOAD16_BYTE_BIOS( 2, "galaxy_u2__v1.71_7-8-98.u2", 0x000000, 0x100000, CRC(d1c3dbb3) SHA1(ebe74ed7f2d8c4abcd6743b9d9c77cc347efc444) ) \ + ROM_LOAD16_BYTE_BIOS( 2, "galaxy_u1__v1.71_7-8-98.u1", 0x000001, 0x100000, CRC(604415c8) SHA1(6c67c3be1aca03d009b6244e3bd911caaa2ca666) ) #define GALGAMES_MB_PALS \ ROM_REGION( 0xa00, "pals", 0 ) \ @@ -1121,7 +1134,7 @@ Copyright notice in rom states: Creative Electronics & Software Written by Keith ROM_LOAD( "16v8h-green.u27", 0x600, 0x117, NO_DUMP) \ ROM_LOAD( "16v8h-red.u45", 0x800, 0x117, NO_DUMP) -ROM_START( galgbios ) +ROM_START( galgames ) ROM_REGION16_BE( 0x200000, "cart0", 0 ) GALGAMES_BIOS_ROMS @@ -1285,8 +1298,8 @@ ROM_END } // anonymous namespace -GAME(1998, galgbios, 0, galgbios, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software", "Galaxy Games BIOS", MACHINE_IS_BIOS_ROOT) -GAME(1998, galgame2, galgbios, galgame2, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software / Namco", "Galaxy Games StarPak 2", 0) -GAME(1998, galgame3, galgbios, galgame3, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software / Atari", "Galaxy Games StarPak 3", 0) -GAME(1998, galgame4, galgbios, galgame3, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software", "Galaxy Games StarPak 4", 0) -GAME(1998, galgame4p, galgame4, galgame3, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software", "Galaxy Games StarPak 4 (prototype)", MACHINE_IMPERFECT_GRAPHICS) +GAME(1998, galgames, 0, galgbase, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software", "Galaxy Games", MACHINE_IS_BIOS_ROOT) +GAME(1998, galgame2, galgames, galgame2, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software / Namco", "Galaxy Games + StarPak 2 cartridge", 0) +GAME(1998, galgame3, galgames, galgame3, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software / Atari", "Galaxy Games + StarPak 3 cartridge", 0) +GAME(1998, galgame4, galgames, galgame3, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software", "Galaxy Games + StarPak 4 cartridge", 0) +GAME(1998, galgame4p, galgame4, galgame3, galgames, galgames_state, empty_init, ROT0, "Creative Electronics & Software", "Galaxy Games + prototype StarPak 4 cartridge", MACHINE_IMPERFECT_GRAPHICS) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 0697b4d58f1..fe1ac60768a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -16518,11 +16518,11 @@ hrclass tsclass @source:ces/galgames.cpp +galgames galgame2 galgame3 galgame4 galgame4p -galgbios @source:chess/ave_arb.cpp arb @@ -31763,6 +31763,9 @@ h01b nf500a h01jce +@source:misc/haiwei.cpp +hqdf + @source:misc/hapyfish.cpp hapyfsh2 diff --git a/src/mame/misc/haiwei.cpp b/src/mame/misc/haiwei.cpp new file mode 100644 index 00000000000..dbfe7193634 --- /dev/null +++ b/src/mame/misc/haiwei.cpp @@ -0,0 +1,147 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +Hai Wei +WITSVS + +Main components: +VRenderZERO+ MagicEyes EISC SoC +14.31818 MHz XTAL (Y1, near VR0+) +28.63636 MHz XTAL (OSC1, also near VR0+) +1.8432 MHz XTAL (X101, near MAX232) +3x Samsung K4S641632K-UC60 SDRAM +RTL8019AS Realtek Full-Duplex Ethernet Controller with Plug and Play Function +FB2022 Transmit / Receiver Filter +MAX232 Dual Driver / Receiver +battery +various jumpers +bank of 8 switches +reset push-button + +TODO: currently stops at the manufacturer logo +*/ + +#include "emu.h" + +#include "cpu/se3208/se3208.h" +#include "machine/vrender0.h" +#include "sound/vrender0.h" +#include "video/vrender0.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" + + +namespace { + +class haiwei_state : public driver_device +{ +public: + haiwei_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_vr0soc(*this, "vr0soc") + {} + + void hqdf(machine_config &config) ATTR_COLD; + + void init_hqdf() ATTR_COLD; + +private: + required_device m_maincpu; + required_device m_vr0soc; + + void program_map(address_map &map) ATTR_COLD; +}; + + +void haiwei_state::program_map(address_map &map) +{ + map(0x00000000, 0x005fffff).rom(); + +// map(0x01500000, 0x01500003).portr("IN0"); +// map(0x01500004, 0x01500007).portr("IN1"); +// map(0x01500008, 0x0150000b).portr("IN2"); + + map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map)); + + map(0x02000000, 0x027fffff).ram().share("workram"); + + map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map)); +} + + +static INPUT_PORTS_START( hqdf ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("DSW1") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "SW1:1") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "SW1:2") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "SW1:3") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "SW1:4") + PORT_DIPUNKNOWN_DIPLOC(0x10, 0x10, "SW1:5") + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "SW1:6") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "SW1:7") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "SW1:8") +INPUT_PORTS_END + + +void haiwei_state::hqdf(machine_config &config) +{ + SE3208(config, m_maincpu, 14.318181_MHz_XTAL * 3); // multiplier not verified + m_maincpu->set_addrmap(AS_PROGRAM, &haiwei_state::program_map); + m_maincpu->iackx_cb().set(m_vr0soc, FUNC(vrender0soc_device::irq_callback)); + + VRENDER0_SOC(config, m_vr0soc, 14.318181_MHz_XTAL * 6); // multiplier not verified + m_vr0soc->set_host_space_tag(m_maincpu, AS_PROGRAM); + m_vr0soc->int_callback().set_inputline(m_maincpu, se3208_device::SE3208_INT); + m_vr0soc->set_external_vclk(28.636363_MHz_XTAL); + + SPEAKER(config, "speaker", 2).front(); + m_vr0soc->add_route(0, "speaker", 1.0, 0); + m_vr0soc->add_route(1, "speaker", 1.0, 1); +} + + +// 环球大富翁 (Huánqiú Dàfùwēng) +ROM_START( hqdf ) + ROM_REGION32_LE( 0x600000, "maincpu", 0 ) // all ST27C160 + ROM_LOAD( "1", 0x000000, 0x200000, CRC(4ce1c5eb) SHA1(df69037a44ce9b8944ddb38d7c226d1acf57eaca) ) + ROM_LOAD( "2", 0x200000, 0x200000, CRC(9f5fbd56) SHA1(518937dafe754a575987913fa19c5c135930cecc) ) + ROM_LOAD( "3", 0x400000, 0x200000, CRC(4edea690) SHA1(ba919577418e9f245113160adbdca9d63c54822e) ) +ROM_END + + +void haiwei_state::init_hqdf() // TODO: verify if it is complete (shouldn't get this far if it weren't complete, though) +{ + uint8_t *rom = memregion("maincpu")->base(); + std::vector buffer(0x600000); + + memcpy(&buffer[0], rom, 0x600000); + + for (int i = 0; i < 0x600000; i++) + rom[i] = buffer[bitswap<24>(i, 23, 22, 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 7, 8, 6, 5, 4, 3, 2, 1, 0)]; + + for (int i = 0; i < 0x600000; i++) + { + if (i & 0x01) + rom[i] = bitswap<8>(rom[i], 6, 7, 5, 4, 0, 1, 2, 3); + else + rom[i] = bitswap<8>(rom[i], 6, 7, 5, 4, 3, 2, 1, 0); + } +} + +} // anonymous namespace + + +GAME( 2006, hqdf, 0, hqdf, hqdf, haiwei_state, init_hqdf, ROT0, "Hai Wei Technology", "Huanqiu Dafuweng", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) From 88cbf8df14255459470125a480c150d6ced1a105 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 11 Mar 2026 09:17:40 +0100 Subject: [PATCH 228/351] sound abuffer: it was still getting a buffer underrun sometimes after overflow when reduced to 1 --- src/osd/modules/sound/sound_module.cpp | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index d8ba6362aa2..c2c0ee718cf 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -96,14 +96,13 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) }; if(m_overflow && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { - if(m_used_buffers > 1) { - // Once it's stabilized after an overflow, reduce latency to the minimum - reduce_buffers(1); + if(m_used_buffers > 2) { + // Once it's stabilized after an overflow, reduce buffers to 2 + reduce_buffers(2); std::fill(m_history.begin(), m_history.end(), 0); } m_overflow = false; - } - else if(m_used_buffers > 8) { + } else if(m_used_buffers > 8) { // If there are way too many buffers, drop some so only 8 are left (roughly 0.16s) reduce_buffers(8); m_overflow = true; From 3e92f586b7da4f317f0449c48a261aa000dff205 Mon Sep 17 00:00:00 2001 From: Christian Brunschen <6741909+cbrunschen@users.noreply.github.com> Date: Wed, 11 Mar 2026 11:19:03 +0000 Subject: [PATCH 229/351] esq5505.cpp: Add support for the Ensoniq VFX OS version 2.30 ROMs (#15080) --- src/mame/ensoniq/esq5505.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mame/ensoniq/esq5505.cpp b/src/mame/ensoniq/esq5505.cpp index 2c00ef59e75..4a4fe5dd17c 100644 --- a/src/mame/ensoniq/esq5505.cpp +++ b/src/mame/ensoniq/esq5505.cpp @@ -1062,8 +1062,12 @@ INPUT_PORTS_END ROM_START( vfx ) ROM_REGION16_BE(0x40000, "osrom", 0) - ROM_LOAD16_BYTE( "vfx210b-low.bin", 0x000001, 0x010000, CRC(c51b19cd) SHA1(2a125b92ffa02ae9d7fb88118d525491d785e87e) ) - ROM_LOAD16_BYTE( "vfx210b-high.bin", 0x000000, 0x010000, CRC(59853be8) SHA1(8e07f69d53f80885d15f624e0b912aeaf3212ee4) ) + ROM_SYSTEM_BIOS( 0, "v230", "V230" ) + ROM_LOAD16_BYTE_BIOS( 0, "vfx230-low.bin", 0x000001, 0x010000, CRC(6a93f5b4) SHA1(dea208b182be71da973a2e4867944cf7e2958df6) ) + ROM_LOAD16_BYTE_BIOS( 0, "vfx230-high.bin", 0x000000, 0x010000, CRC(86994661) SHA1(2efb52f6d51625c9be545d5cd018dc7b24f25ac7) ) + ROM_SYSTEM_BIOS( 1, "v210b", "V210b" ) + ROM_LOAD16_BYTE_BIOS( 1, "vfx210b-low.bin", 0x000001, 0x010000, CRC(c51b19cd) SHA1(2a125b92ffa02ae9d7fb88118d525491d785e87e) ) + ROM_LOAD16_BYTE_BIOS( 1, "vfx210b-high.bin", 0x000000, 0x010000, CRC(59853be8) SHA1(8e07f69d53f80885d15f624e0b912aeaf3212ee4) ) ROM_REGION(0x200000, "waverom", ROMREGION_ERASE00) ROM_LOAD16_BYTE( "u14.bin", 0x000001, 0x080000, CRC(85592299) SHA1(1aa7cf612f91972baeba15991d9686ccde01599c) ) From 08f946ba70c8e38ed1839601dd1c109ef09d6d14 Mon Sep 17 00:00:00 2001 From: angelosa Date: Mon, 9 Mar 2026 16:58:46 +0100 Subject: [PATCH 230/351] bus/pci/sis6326.cpp: add support for DVD variant [VGA Legacy MKIII] --- src/devices/bus/pci/pci_slot.cpp | 1 + src/devices/bus/pci/sis6326.cpp | 43 +++++++++++++++++++++++++++++--- src/devices/bus/pci/sis6326.h | 14 +++++++++++ 3 files changed, 55 insertions(+), 3 deletions(-) diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp index 1efbbed055f..3f3dedb7e6d 100644 --- a/src/devices/bus/pci/pci_slot.cpp +++ b/src/devices/bus/pci/pci_slot.cpp @@ -193,4 +193,5 @@ void agp_cards(device_slot_interface &device) device.option_add("neon250", NEON250); // SiS device.option_add("sis6326_agp", SIS6326_AGP); + device.option_add("sis6326_dvd", SIS6326_DVD); } diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 76cc47fdf3d..2e0ff6bde99 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -23,7 +23,7 @@ SiS 6326 DEFINE_DEVICE_TYPE(SIS6326_PCI, sis6326_pci_device, "sis6326_pci", "SiS 6326 PCI card") DEFINE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device, "sis6326_agp", "SiS 6326 AGP card") - +DEFINE_DEVICE_TYPE(SIS6326_DVD, sis6326_dvd_device, "sis6326_dvd", "SiS 6326 DVD card") sis6326_pci_device::sis6326_pci_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) @@ -556,11 +556,17 @@ void sis6326_pci_device::trigger_2d_command() * AGP overrides */ -sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : sis6326_pci_device(mconfig, SIS6326_AGP, tag, owner, clock) +sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) + : sis6326_pci_device(mconfig, type, tag, owner, clock) { } +sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : sis6326_agp_device(mconfig, SIS6326_AGP, tag, owner, clock) +{ +} + + ROM_START( sis6326agp ) ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) // Default is AOpen for supporting OpenGL in its driver @@ -654,3 +660,34 @@ void sis6326_agp_device::config_map(address_map &map) map(0x5c, 0x5f).lr32(NAME([] () { return 0x00000000; } )); // NULL terminator } +/* + * DVD overrides + */ + +sis6326_dvd_device::sis6326_dvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : sis6326_agp_device(mconfig, SIS6326_DVD, tag, owner, clock) +{ + set_ids(0x10396326, 0xa0, 0x030000, 0x10924920); +} + +ROM_START( sis6326dvd ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) + ROM_DEFAULT_BIOS("diamond") + + ROM_SYSTEM_BIOS( 0, "diamond", "Diamond SpeedStar A70 (123A0A50)" ) + ROMX_LOAD( "diamondspeedstar_a70.vbi", 0x000000, 0x00c000, CRC(9501f6fc) SHA1(7566f1483c3e963762ef19b4deeb8fc24ccd217f), ROM_BIOS(0) ) +ROM_END + +const tiny_rom_entry *sis6326_dvd_device::device_rom_region() const +{ + return ROM_NAME(sis6326dvd); +} + +void sis6326_dvd_device::device_add_mconfig(machine_config &config) +{ + sis6326_agp_device::device_add_mconfig(config); + // TODO: allegedly a 8MB card but gets 4 even if properly mapped (something inside the VGA core?) + + // TODO: extra TV out (by definition) +} + diff --git a/src/devices/bus/pci/sis6326.h b/src/devices/bus/pci/sis6326.h index cbbbf1da449..bc3115e3914 100644 --- a/src/devices/bus/pci/sis6326.h +++ b/src/devices/bus/pci/sis6326.h @@ -82,6 +82,8 @@ public: sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); protected: + sis6326_agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + virtual void device_reset() override ATTR_COLD; virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; @@ -100,7 +102,19 @@ private: void agp_command_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); }; +class sis6326_dvd_device : public sis6326_agp_device +{ +public: + sis6326_dvd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; +}; + DECLARE_DEVICE_TYPE(SIS6326_PCI, sis6326_pci_device) DECLARE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device) +DECLARE_DEVICE_TYPE(SIS6326_DVD, sis6326_dvd_device) #endif // MAME_BUS_PCI_SIS6326_H From 793e88712fa1aa9feb7ab40717ac5f636adf8537 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 10 Mar 2026 14:15:19 +0100 Subject: [PATCH 231/351] video/pc_vga_sis.cpp: improve VCLK PLL handling --- src/devices/bus/pci/sis6326.cpp | 2 ++ src/devices/video/pc_vga_sis.cpp | 31 +++++++++++++++++++++++-------- src/mame/alpha/alpha68k.cpp | 2 +- src/mame/ice/calchase.cpp | 4 ++-- 4 files changed, 28 insertions(+), 11 deletions(-) diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 2e0ff6bde99..8d9925c7686 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -590,6 +590,7 @@ const tiny_rom_entry *sis6326_agp_device::device_rom_region() const void sis6326_agp_device::device_add_mconfig(machine_config &config) { sis6326_pci_device::device_add_mconfig(config); + // TODO: JP1 to MD18 (NTSC/PAL select), JP2 to MD27 (INTA# enable) m_vga->md20_cb().set_constant(1); m_vga->md21_cb().set_constant(1); m_vga->md23_cb().set_constant(1); @@ -686,6 +687,7 @@ const tiny_rom_entry *sis6326_dvd_device::device_rom_region() const void sis6326_dvd_device::device_add_mconfig(machine_config &config) { sis6326_agp_device::device_add_mconfig(config); + // Tip Top 6326AGP-E variant has feature connector, Diamond doesn't (solder pads in its place) // TODO: allegedly a 8MB card but gets 4 even if properly mapped (something inside the VGA core?) // TODO: extra TV out (by definition) diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index 868c4cb6c42..c424e38b0a2 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -37,7 +37,7 @@ TODO (sis630): #define LOG_SEQ (1U << 1) // extended sequencer register descriptions #define LOG_CRTC (1U << 2) // extended CRTC registers (overlay) - +#define LOG_PLL (1U << 3) // PLL calculation (verbose, needs dirty flag) #define LOG_LOCKED (1U << 4) // log lock/unlock sequences #define VERBOSE (LOG_GENERAL | LOG_CRTC) @@ -45,7 +45,7 @@ TODO (sis630): #define LOGSEQ(...) LOGMASKED(LOG_SEQ, __VA_ARGS__) #define LOGCRTC(...) LOGMASKED(LOG_CRTC, __VA_ARGS__) - +#define LOGPLL(...) LOGMASKED(LOG_PLL, __VA_ARGS__) #define LOGLOCKED(...) LOGMASKED(LOG_LOCKED, __VA_ARGS__) #include "logmacro.h" @@ -202,7 +202,7 @@ void sis6326_vga_device::device_reset() // irrelevant really m_crtc_hcounter_latch = m_crtc_vcounter_latch = 0xffff; - // everything else shouldn't matter for cursor + // everything else shouldn't matter for cursor (enable disabled with RAMDAC mode above) // initialize fixed part here: HW cannot set any other bit beyond 21 ~ 18. // On win98se this will map at bottom of VRAM i.e. at $3f'fc00 on 4MiB cards m_cursor.address_base = 0x03'fc00; @@ -1271,10 +1271,6 @@ void sis6326_vga_device::sequencer_map(address_map &map) }), NAME([this] (offs_t offset, u8 data) { LOG("SR38: Misc. Control 7 %02x\n", data); - //if ((m_ext_sr38 & 3) != (data & 3)) - //{ - // recompute_params(); - //} m_ext_sr38 = data; m_cursor.address_base &= ~0x3c'0000; m_cursor.address_base |= (data >> 4) << 18; @@ -1282,6 +1278,7 @@ void sis6326_vga_device::sequencer_map(address_map &map) // testable at 1600x1200, needs HW test vga.crtc.line_compare = (vga.crtc.line_compare & 0x3ff) | (BIT(data, 2) * 0xfc00); //vga.crtc.line_compare = (vga.crtc.line_compare & 0x3ff) | (BIT(data, 2) << 10); + recompute_params(); }) ); @@ -1444,8 +1441,26 @@ void sis6326_vga_device::recompute_params() // TODO: stub, barely enough to make BeOS 5 to set ~60 Hz for 640x480x16 case 2: default: - xtal = XTAL(25'174'800).value(); + { + // TODO: setting 2 is external (all available card pics shows a 14 MHz XTAL anyway) + // TODO: PLL calculation is not necessarily correct or even confirmed + // - shutms11 beos5 expects a 25 MHz base clock for getting ~60 Hz + // - SDD tests, particularly stuff that enables interlace (tbd) + const int clock_select[] = { 25'174'800, 28'636'363, 14'318'181, 14'318'181 }; + + float numerator = (m_vclk_int[0] & 0x7f) + 1; + float denominator = (m_vclk_int[1] & 0x1f) + 1; + const u8 postscale_types[] = { 1, 2, 3, 4, 1, 1, 6, 8 }; + // assume doc mistake for bit 6 (claims bit 7 that is MCLK related instead) + float postscale = postscale_types[((m_vclk_int[1] & 0x60) >> 5) | BIT(m_ext_sr13, 6) << 2]; + float div = BIT(m_vclk_int[0], 7) + 1; + float raw_xtal = ((XTAL(clock_select[m_ext_sr38 & 3]).value() / 2) * (numerator / denominator) * (div / postscale)); + xtal = (int)raw_xtal; + LOGPLL("SR13 %02x SR2A %02x SR2B %02x SR38[0:1] %01x\n", m_ext_sr13, m_vclk_int[0], m_vclk_int[1], m_ext_sr38 & 3); + LOGPLL("num %f dem %f postscale %f div %f ->\n", numerator, denominator, postscale, div); + LOGPLL("%f %d\n", raw_xtal, xtal); break; + } } recompute_params_clock(1, xtal); diff --git a/src/mame/alpha/alpha68k.cpp b/src/mame/alpha/alpha68k.cpp index 0c036799029..b13f8a5a0c7 100644 --- a/src/mame/alpha/alpha68k.cpp +++ b/src/mame/alpha/alpha68k.cpp @@ -1271,7 +1271,7 @@ static constexpr u32 ALPHA68K_HTOTAL = 384; void alpha68k_state::set_screen_raw_params(machine_config &config) { -// TODO: Same as snk/snk68.cpp, which in turn is awfully similar to NeoGeo CRTC parameters + // Same as snk/snk68.cpp, which in turn is awfully similar to NeoGeo CRTC parameters m_screen->set_raw(ALPHA68K_PIXEL_CLOCK,ALPHA68K_HTOTAL,0,256,264,16,240); } diff --git a/src/mame/ice/calchase.cpp b/src/mame/ice/calchase.cpp index 992b073414d..e7b48f01cce 100644 --- a/src/mame/ice/calchase.cpp +++ b/src/mame/ice/calchase.cpp @@ -10,8 +10,8 @@ driver by Angelo Salese & Grull Osgo Hardware is known as "AUSCOM System 1" hardware. -Other games known to be on this hardware (if ever finished): -- Agro (c) The Game Room +Other games that may be on this hardware (if ever finished): +- Agro (c) The Game Room (prototype v1 perhaps?) - Tiger Odds (c) The Game Room - one other unnamed/unfinished game From fa8b75657d232fff746b4e36d5c2dea1732eb0cf Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 11 Mar 2026 13:01:07 +0100 Subject: [PATCH 232/351] bus/pci/sis6326.cpp: preliminary line drawing --- src/devices/bus/isa/sb16.cpp | 4 +- src/devices/bus/pci/sis6326.cpp | 80 ++++++++++++++++++++++++++++++--- 2 files changed, 77 insertions(+), 7 deletions(-) diff --git a/src/devices/bus/isa/sb16.cpp b/src/devices/bus/isa/sb16.cpp index d10bd1d2e80..56d8b9b3978 100644 --- a/src/devices/bus/isa/sb16.cpp +++ b/src/devices/bus/isa/sb16.cpp @@ -369,7 +369,7 @@ uint8_t sb16_lle_device::adc_data_ready_r() uint8_t sb16_lle_device::dma8_cnt_lo_r() { - u8 res = m_dma8_cnt; + u16 res = m_dma8_cnt; if (!(BIT(m_mode, 6))) res <<= 1; res --; @@ -379,7 +379,7 @@ uint8_t sb16_lle_device::dma8_cnt_lo_r() uint8_t sb16_lle_device::dma8_cnt_hi_r() { - u8 res = m_dma8_cnt; + u16 res = m_dma8_cnt; if (!(BIT(m_mode, 6))) res <<= 1; res --; diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp index 8d9925c7686..376e3c545d6 100644 --- a/src/devices/bus/pci/sis6326.cpp +++ b/src/devices/bus/pci/sis6326.cpp @@ -202,7 +202,7 @@ void sis6326_pci_device::mmio_map(address_map &map) }) ); - // HACK: fake Turbo Queue so to not lockup windows + // HACK: fake Turbo Queue so to not lockup Windows map(0x82a8, 0x82a9).lr16( NAME([] (offs_t offset) { return 0x0100; }) ); @@ -524,10 +524,10 @@ void sis6326_pci_device::trigger_2d_command() const u8 src = (this->*get_src_table[src_select])(src_base, xi); const u8 dst = m_vga->read_memory(xi + dst_base); const u8 dot = (m_pattern_data[pattern_base] >> (7 - x) & 1); - // ROP and pattern depends on pattern + // ROP and pattern depends on dot output // - win98se start menu hovering const u8 res = GetROP(dot ? m_fg_rop : m_bg_rop, src, dst, dot ? m_fg_color : m_bg_color) & 0xff; - m_vga->write_memory(xi + dst_base, res & 0xff); + m_vga->write_memory(xi + dst_base, res); } } @@ -537,15 +537,84 @@ void sis6326_pci_device::trigger_2d_command() { const bool major_axis = !!BIT(m_draw_command, 10); const bool last_pixel = !!BIT(m_draw_command, 11); + const u16 pixel_count = m_rect_width - 1; + const u16 half_count = pixel_count / 2; const u16 k1_term = (m_mask[0] | (m_mask[1] << 8)) & 0x3fff; const u16 k2_term = (m_mask[2] | (m_mask[3] << 8)) & 0x3fff; const u16 error_term = (m_mask[4] | (m_mask[5] << 8)) & 0x3fff; const u16 line_style = (m_mask[6] | (m_mask[7] << 8)); + const u16 xs = m_src_start_addr & 0xfff; + const u16 ys = m_dst_start_addr & 0xfff; LOGBLIT("\tLine: major axis %s last pixel %d\n", major_axis ? "Y" : "X", !last_pixel); - LOGBLIT("\tSRC Addr %06x DST Addr %06x Sel %02x\n", m_src_start_addr, m_dst_start_addr, m_draw_sel); + LOGBLIT("\tX Start %d Y Start %d\n", xs, ys); LOGBLIT("\tMajor Axial Pixel Count %d K1 %d K2 %d error %d style %04x\n", m_rect_width, k1_term, k2_term, error_term, line_style); LOGBLIT("\tFG ROP %02x Color %06x | BG ROP %02x Color %06x\n", m_fg_rop, m_fg_color, m_bg_rop, m_bg_color); + // TODO: preliminary, enough for crosshair in Windows Gaming Options and not much else + // Standard Bresenham line drawing + // - win98se Curves and Colors screensaver requires this for curves; + if (major_axis) + { + const s32 xi = xs + half_count; + + if (clip_enable) + { + if ((xi == std::clamp(xi, m_clip_left, m_clip_right)) ^ clip_external) + return; + } + + for (s32 y = 0; y < pixel_count; y++) + { + const s32 yi = ys - half_count + y * y_dir; + + if (clip_enable) + { + if ((yi == std::clamp(yi, m_clip_top, m_clip_bottom)) ^ clip_external) + continue; + } + + const u32 src_base = (yi * m_src_pitch); + const u32 dst_base = (yi * m_dst_pitch); + + const u8 src = (this->*get_src_table[src_select])(src_base, xi); + const u8 dst = m_vga->read_memory(xi + dst_base); + const u16 dot = BIT(line_style, (15 - y) & 0xf); + const u8 res = GetROP(dot ? m_fg_rop : m_bg_rop, src, dst, dot ? m_fg_color : m_bg_color) & 0xff; + m_vga->write_memory(xi + dst_base, res); + } + } + else + { + const s32 yi = ys + half_count; + + if (clip_enable) + { + if ((yi == std::clamp(yi, m_clip_top, m_clip_bottom)) ^ clip_external) + return; + } + + for (s32 x = 0; x < pixel_count; x++) + { + const s32 xi = xs - half_count + x * x_dir; + + if (clip_enable) + { + if ((xi == std::clamp(xi, m_clip_left, m_clip_right)) ^ clip_external) + continue; + } + + const u32 src_base = (yi * m_src_pitch); + const u32 dst_base = (yi * m_dst_pitch); + + const u8 src = (this->*get_src_table[src_select])(src_base, xi); + const u8 dst = m_vga->read_memory(xi + dst_base); + const u16 dot = BIT(line_style, (15 - x) & 0xf); + const u8 res = GetROP(dot ? m_fg_rop : m_bg_rop, src, dst, dot ? m_fg_color : m_bg_color) & 0xff; + m_vga->write_memory(xi + dst_base, res); + } + } + + break; } } @@ -688,7 +757,8 @@ void sis6326_dvd_device::device_add_mconfig(machine_config &config) { sis6326_agp_device::device_add_mconfig(config); // Tip Top 6326AGP-E variant has feature connector, Diamond doesn't (solder pads in its place) - // TODO: allegedly a 8MB card but gets 4 even if properly mapped (something inside the VGA core?) + // TODO: allegedly a 8MB card but detects as 4 even if properly mapped + // (something inside the VGA core?) // TODO: extra TV out (by definition) } From 276fed083cfa06c37d26ff1221d315a388ada57d Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 11 Mar 2026 13:53:25 +0100 Subject: [PATCH 233/351] misc/haiwei.cpp: basic QA look --- src/mame/misc/haiwei.cpp | 123 +++++++++++++++++++++++++++++++++++---- 1 file changed, 111 insertions(+), 12 deletions(-) diff --git a/src/mame/misc/haiwei.cpp b/src/mame/misc/haiwei.cpp index dbfe7193634..b279ec39c72 100644 --- a/src/mame/misc/haiwei.cpp +++ b/src/mame/misc/haiwei.cpp @@ -19,7 +19,10 @@ various jumpers bank of 8 switches reset push-button -TODO: currently stops at the manufacturer logo +TODO: +- currently stops at the manufacturer logo (tight loops between two JMPs); +- transmits to SIO if above is skipped; + */ #include "emu.h" @@ -54,18 +57,46 @@ private: required_device m_vr0soc; void program_map(address_map &map) ATTR_COLD; + + u32 pioldat_r(); + void pioldat_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 pioedat_r(); + + u32 m_pio; }; +u32 haiwei_state::pioldat_r() +{ + return m_pio; +} + +// PIO Latched output DATa Register +// TODO: bits 4 and 29 sets as output (latter flips between 1 and 0) +void haiwei_state::pioldat_w(offs_t offset, u32 data, u32 mem_mask) +{ + COMBINE_DATA(&m_pio); +} + +// PIO External DATa Register +u32 haiwei_state::pioedat_r() +{ + return 0; +} + void haiwei_state::program_map(address_map &map) { map(0x00000000, 0x005fffff).rom(); -// map(0x01500000, 0x01500003).portr("IN0"); -// map(0x01500004, 0x01500007).portr("IN1"); -// map(0x01500008, 0x0150000b).portr("IN2"); + map(0x01500000, 0x01500003).portr("IN0"); + map(0x01500008, 0x0150000b).portr("IN1"); map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map)); + map(0x01802004, 0x01802007).rw(FUNC(haiwei_state::pioldat_r), FUNC(haiwei_state::pioldat_w)); + map(0x01802008, 0x0180200b).r(FUNC(haiwei_state::pioedat_r)); + // TODO: from SIO + map(0x01802804, 0x01802807).nopw(); + map(0x01802810, 0x01802813).lr32(NAME([] () { return 0x4; })); map(0x02000000, 0x027fffff).ram().share("workram"); @@ -75,14 +106,82 @@ void haiwei_state::program_map(address_map &map) static INPUT_PORTS_START( hqdf ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_DIPNAME( 0x00000001, 0x00000001, "IN0" ) + PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00010000, 0x00010000, "IN0-1" ) + PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0xff00ff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN1") + PORT_DIPNAME( 0x00010000, 0x00010000, "IN1" ) + PORT_DIPSETTING( 0x00010000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00020000, 0x00020000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00020000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00040000, 0x00040000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00040000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00080000, 0x00080000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00080000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00100000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00200000, 0x00200000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0xff00ffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("DSW1") PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "SW1:1") From ca44153d229cd8eb0f4a187232e491712216c2f9 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Wed, 11 Mar 2026 18:15:44 +0100 Subject: [PATCH 234/351] New working clones ------------------ Ms. Pac-Man (Playmark bootleg) [Hammy, Trol] --- src/mame/mame.lst | 1 + src/mame/pacman/pacman.cpp | 43 +++++++++++++++++++++++++++++++------- 2 files changed, 37 insertions(+), 7 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index fe1ac60768a..0d81276037b 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -36992,6 +36992,7 @@ mspacmanbhe mspacmanbi mspacmanblt mspacmanblt2 +mspacmanbpl mspacmancr mspacmane mspacmane2 diff --git a/src/mame/pacman/pacman.cpp b/src/mame/pacman/pacman.cpp index 87f7b1ec7b2..25f5b552712 100644 --- a/src/mame/pacman/pacman.cpp +++ b/src/mame/pacman/pacman.cpp @@ -4415,18 +4415,18 @@ ROM_START( pacmansp ) ROM_END /* -Ms.Pacman Bootleg Later Jamma Board +Ms.Pacman Bootleg Later JAMMA Board -The game looks like the original, but the board is smallest than the original and only use two bigger 27256 eproms. +The game looks like the original, but the board is smaller than the original and only uses two bigger 27256 EPROMs. -There are 4 proms in the board, one of them is a color prom that is different from the other sets, this cause a little different colors, but almost the same. +There are 4 PROMs on the board, one of them is a color PROM that is different from the other sets. This causes slightly different colors, but almost the same. 82s123 different from other sets -82s129-1.a9 == Ms. Pacman prom 82s126.1m -82s129-2.c9 == Ms. Pacman prom 82s126.3m -82s129-3.d1 == Ms. Pacman prom 82s126.4a +82s129-1.a9 == Ms. Pacman PROM 82s126.1m +82s129-2.c9 == Ms. Pacman PROM 82s126.3m +82s129-3.d1 == Ms. Pacman PROM 82s126.4a -If you need more info about the board please write contact ricky2001 at AUMAP +If you need more info about the board please contact ricky2001 at AUMAP */ ROM_START( mspacmanbg ) ROM_REGION( 0x10000, "maincpu", 0 ) @@ -4663,6 +4663,34 @@ ROM_START( mspacmanbgc ) ROM_LOAD( "82s129-2.c9", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) // Timing - not used // == 82s126.3m ROM_END +ROM_START( mspacmanbpl ) // on a PCB marked 28-09-93, with Playmark labels on ROMs + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "playmark.ic12", 0x0000, 0x8000, CRC(31e24ca4) SHA1(843bdbaa15786974d8c7b466f02bd579ada688ee) ) // 0xxxxxxxxxxxxxxx = 0xFF + ROM_CONTINUE( 0x0000, 0x4000 ) + ROM_CONTINUE( 0x8000, 0x4000 ) + + ROM_REGION( 0x2000, "gfx1", 0 ) + ROM_LOAD( "playmark.ic13", 0x0000, 0x2000, CRC(3944ea2d) SHA1(2e764cef63a0492bf9e1d0391bec402bc2930e83) ) // xx-xxxxxxxxxxxxx + ROM_CONTINUE( 0x0000, 0x2000 ) + ROM_CONTINUE( 0x0000, 0x2000 ) + ROM_CONTINUE( 0x0000, 0x2000 ) + ROM_CONTINUE( 0x0000, 0x2000 ) + ROM_CONTINUE( 0x0000, 0x2000 ) + ROM_CONTINUE( 0x0000, 0x0800 ) + ROM_CONTINUE( 0x1000, 0x0800 ) + ROM_CONTINUE( 0x0800, 0x0800 ) + ROM_CONTINUE( 0x1800, 0x0800 ) + ROM_IGNORE( 0x2000 ) + + ROM_REGION( 0x0120, "proms", 0 ) + ROM_LOAD( "82s123.h7", 0x0000, 0x0020, CRC(3545e7e9) SHA1(b866b02579438afb11296e5c53a32c6425bd044d) ) + ROM_LOAD( "82s129-3.d1", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) ) // == 82s126.4a + + ROM_REGION( 0x0200, "namco", 0 ) // Sound PROMs + ROM_LOAD( "82s126.1m", 0x0000, 0x0100, CRC(a9cc86bf) SHA1(bbcec0570aeceb582ff8238a4bc8546a23430081) ) + ROM_LOAD( "82s126.3m", 0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) ) // Timing - not used +ROM_END + /* Double Command Pac-Man game. @@ -9038,6 +9066,7 @@ GAME( 1991, mspacmanbhe, mspacman, woodpek, mspacman, pacman_state, empty_ GAME( 1992, mspacmanbco, mspacman, woodpek_rbg, mspacman, pacman_state, empty_init, ROT90, "bootleg (Cocamatic)", "Come-Cocos (Ms. Pac-Man) (Cocamatic bootleg)", MACHINE_SUPPORTS_SAVE ) // this PCB have swapped Blue and Green color lines (Ms.Pac-Man sprite should be pink), no "MADE IN GREECE" text at PCB GAME( 1993, mspacmanbi, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Impeuropex)", "Ms. Pac-Man (Impeuropex bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, mspacmanbgc, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Enavi)", "Ms. Pac-Man ('Made in Greece' Enavi bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, mspacmanbpl, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Playmark)", "Ms. Pac-Man (Playmark bootleg)", MACHINE_SUPPORTS_SAVE ) // probably a further conversion of the mspacmanbg bootleg, still has some MS Pacman code + extra features GAME( 198?, pacmansp, puckman, pacman, pacmansp, pacman_state, empty_init, ROT90, "bootleg (Video Game SA)", "Puck Man (Spanish, 'Made in Greece' bootleg)", MACHINE_SUPPORTS_SAVE ) // probably a further conversion of the mspacmanbg bootleg, still has some MS Pacman code + extra features GAME( 1992, mspactwin, 0, mspactwin, mspactwin, mspactwin_state, init_mspactwin, ROT90, "hack (Susilu)", "Ms Pac Man Twin (Argentina, set 1)", MACHINE_SUPPORTS_SAVE ) From a8934416a3aabfbb455e9524fbb1c233c93a99a0 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 11 Mar 2026 22:21:47 +0100 Subject: [PATCH 235/351] sound: forward audio latency setting to abuffer --- src/emu/sound.cpp | 20 +++++++-------- src/osd/modules/sound/pa_sound.cpp | 14 ++++++----- src/osd/modules/sound/sound_module.cpp | 33 +++++++++++++++++-------- src/osd/modules/sound/sound_module.h | 4 ++- src/osd/modules/sound/wasapi_sound.cpp | 1 + src/osd/modules/sound/xaudio2_sound.cpp | 2 ++ 6 files changed, 47 insertions(+), 27 deletions(-) diff --git a/src/emu/sound.cpp b/src/emu/sound.cpp index a8f7727bad8..24e0434f14c 100644 --- a/src/emu/sound.cpp +++ b/src/emu/sound.cpp @@ -1056,27 +1056,27 @@ void sound_manager::run_effects() eb.prepare_space(source_samples / sf + 1); int source_sample_index = 0; int dest_index = 0; - double m_phase = si.m_speed_phase; + double phase = si.m_speed_phase; for(int channel = 0; channel != channels; channel ++) { const sample_t *src = si.m_buffer.ptrs(channel, 0); - m_phase = si.m_speed_phase; - if(m_phase >= 1) { - source_sample_index = int(m_phase); - m_phase -= int(m_phase); + phase = si.m_speed_phase; + if(phase >= 1) { + source_sample_index = int(phase); + phase -= int(phase); } else source_sample_index = 0; sample_t *dest = eb.ptrw(channel, 0); dest_index = 0; while(source_sample_index < source_samples) { dest[dest_index++] = m_muted ? 0.0 : src[source_sample_index]; - m_phase += sf; - if(m_phase >= 1) { - source_sample_index += int(m_phase); - m_phase -= int(m_phase); + phase += sf; + if(phase >= 1) { + source_sample_index += int(phase); + phase -= int(phase); } } } - si.m_speed_phase = m_phase + (source_sample_index - source_samples); + si.m_speed_phase = phase + (source_sample_index - source_samples); eb.commit(dest_index); } } diff --git a/src/osd/modules/sound/pa_sound.cpp b/src/osd/modules/sound/pa_sound.cpp index 17a90d30ebc..a33a65f212a 100644 --- a/src/osd/modules/sound/pa_sound.cpp +++ b/src/osd/modules/sound/pa_sound.cpp @@ -209,9 +209,6 @@ uint32_t sound_pa::stream_sink_open(uint32_t node, std::string name, uint32_t ra if(node < 1 || node > m_info.m_nodes.size()) return 0; - uint32_t id = m_stream_id ++; - auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sinks, id, node)).first; - PaStreamParameters op; op.device = node - 1; op.channelCount = m_info.m_nodes[node-1].m_sinks; @@ -219,6 +216,10 @@ uint32_t sound_pa::stream_sink_open(uint32_t node, std::string name, uint32_t ra op.suggestedLatency = (m_audio_latency > 0.0f) ? m_audio_latency : Pa_GetDeviceInfo(node - 1)->defaultLowOutputLatency; op.hostApiSpecificStreamInfo = nullptr; + uint32_t id = m_stream_id ++; + auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sinks, id, node)).first; + si->second.m_buffer.set_latency(op.suggestedLatency / 20e-3); + PaError err = Pa_OpenStream(&si->second.m_stream, nullptr, &op, rate, paFramesPerBufferUnspecified, 0, s_stream_callback, &si->second); if(!err) err = Pa_SetStreamFinishedCallback(si->second.m_stream, s_stream_finished_callback); @@ -239,9 +240,6 @@ uint32_t sound_pa::stream_source_open(uint32_t node, std::string name, uint32_t if(node < 1 || node > m_info.m_nodes.size()) return 0; - uint32_t id = m_stream_id ++; - auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sources, id, node)).first; - PaStreamParameters ip; ip.device = node - 1; ip.channelCount = m_info.m_nodes[node-1].m_sources; @@ -249,6 +247,10 @@ uint32_t sound_pa::stream_source_open(uint32_t node, std::string name, uint32_t ip.suggestedLatency = (m_audio_latency > 0.0f) ? m_audio_latency : Pa_GetDeviceInfo(node - 1)->defaultLowInputLatency; ip.hostApiSpecificStreamInfo = nullptr; + uint32_t id = m_stream_id ++; + auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sources, id, node)).first; + si->second.m_buffer.set_latency(ip.suggestedLatency / 20e-3); + PaError err = Pa_OpenStream(&si->second.m_stream, &ip, nullptr, rate, paFramesPerBufferUnspecified, 0, s_stream_callback, &si->second); if(!err) err = Pa_SetStreamFinishedCallback(si->second.m_stream, s_stream_finished_callback); diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index c2c0ee718cf..801edb74df1 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -17,17 +17,25 @@ sound_module::~sound_module() sound_module::abuffer::abuffer(uint32_t channels) noexcept : m_channels(channels), + m_max_buffers(8), m_hindex(0), m_last_sample(channels, 0) { clear(); } +void sound_module::abuffer::set_latency(uint32_t latency) +{ + // set maximum buffers from latency in 20ms steps (the default of 8 is 0.16s) + m_max_buffers = std::max(latency + latency / 2, latency + 3); + m_max_buffers = std::clamp(m_max_buffers, 4U, 50U); +} + void sound_module::abuffer::clear() { m_used_buffers = 0; m_used_buffers_prev = 0; - m_overflow = false; + m_overrun = false; std::fill(m_history.begin(), m_history.end(), 0); m_delta = 0; @@ -85,7 +93,7 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) m_history[m_hindex] = m_used_buffers_prev - m_used_buffers; m_hindex = (m_hindex + 1) % m_history.size(); - auto reduce_buffers = [&](uint32_t n) { + auto flush_buffers = [&](uint32_t n) { for(uint32_t i = 0; i != m_used_buffers - n; i++) m_delta2 -= (m_buffers[i].m_data.size() / m_channels - m_buffers[i].m_cpos); for(uint32_t i = 0; i < n; i++) { @@ -95,17 +103,22 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) m_used_buffers = n; }; - if(m_overflow && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { + if(m_overrun && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { if(m_used_buffers > 2) { - // Once it's stabilized after an overflow, reduce buffers to 2 - reduce_buffers(2); + // Once it's stabilized after an overrun, reduce buffers to 2 + flush_buffers(2); std::fill(m_history.begin(), m_history.end(), 0); } - m_overflow = false; - } else if(m_used_buffers > 8) { - // If there are way too many buffers, drop some so only 8 are left (roughly 0.16s) - reduce_buffers(8); - m_overflow = true; + m_overrun = false; + } + + // maximum amount of buffers relative to samples + const uint32_t max_buffers = std::max(m_max_buffers * 48000 / samples / 50, 4U); + + if(m_used_buffers > max_buffers) { + // If there are too many buffers, drop some and mark this event as an overrun + flush_buffers(max_buffers); + m_overrun = true; } m_used_buffers_prev = m_used_buffers; diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index c47142ed135..5c90433ce55 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -42,6 +42,7 @@ protected: class abuffer { public: abuffer(uint32_t channels) noexcept; + void set_latency(uint32_t latency); void clear(); void get(int16_t *data, uint32_t samples) noexcept; void push(const int16_t *data, uint32_t samples); @@ -67,9 +68,10 @@ protected: uint32_t m_channels; uint32_t m_used_buffers; uint32_t m_used_buffers_prev; + uint32_t m_max_buffers; std::array m_history; uint8_t m_hindex; - bool m_overflow; + bool m_overrun; std::vector m_last_sample; std::vector m_buffers; }; diff --git a/src/osd/modules/sound/wasapi_sound.cpp b/src/osd/modules/sound/wasapi_sound.cpp index 6358dab8bc4..f17f7757a03 100644 --- a/src/osd/modules/sound/wasapi_sound.cpp +++ b/src/osd/modules/sound/wasapi_sound.cpp @@ -275,6 +275,7 @@ sound_wasapi::stream_info::stream_info( m_exiting(false) { info.m_node = node.m_id; + m_buffer.set_latency(host.m_audio_latency / 20e-3F); InitializeCriticalSection(&m_critical_section); } diff --git a/src/osd/modules/sound/xaudio2_sound.cpp b/src/osd/modules/sound/xaudio2_sound.cpp index 85b3fb82383..6d56b260361 100644 --- a/src/osd/modules/sound/xaudio2_sound.cpp +++ b/src/osd/modules/sound/xaudio2_sound.cpp @@ -943,6 +943,8 @@ sound_xaudio2::voice_info::voice_info(sound_xaudio2 &host, WAVEFORMATEX const &f m_need_update(false), m_underflowing(false) { + m_buffer.set_latency(host.m_audio_latency / 20e-3); + // set default volume matrix for (unsigned i = 0; format.nChannels > i; ++i) { From c8fc624293a1f84e00a5fe43665b32041898f683 Mon Sep 17 00:00:00 2001 From: Leo Tejada Date: Wed, 11 Mar 2026 22:26:18 +0100 Subject: [PATCH 236/351] =?UTF-8?q?sound/x1=5F010.cpp=E2=80=8E:=20Fixes=20?= =?UTF-8?q?comment=20so=20it=20matches=20the=20code=20(#15085)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/devices/sound/x1_010.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/sound/x1_010.cpp b/src/devices/sound/x1_010.cpp index 0c5a4accfaa..d7c396751b5 100644 --- a/src/devices/sound/x1_010.cpp +++ b/src/devices/sound/x1_010.cpp @@ -23,7 +23,7 @@ Registers: 0 7--- ---- Frequency divider flag (only downtown seems to set this) -654 3--- - ---- -2-- PCM/Waveform repeat flag (0:Once 1:Repeat) (*1) + ---- -2-- Waveform repeat flag (0:Repeat 1:Once) (*1) ---- --1- Sound out select (0:PCM 1:Waveform) ---- ---0 Key on / off From ba6db4a6c2f8d5f31598bb3d482daac0b6b9f7cc Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Thu, 12 Mar 2026 08:32:29 +0100 Subject: [PATCH 237/351] Add dumps for GRiD Compass 1101 rev 3, 1109 and 1129 (#15079) --- src/mame/gridcomp/gridcomp.cpp | 158 +++++++-------------------------- 1 file changed, 31 insertions(+), 127 deletions(-) diff --git a/src/mame/gridcomp/gridcomp.cpp b/src/mame/gridcomp/gridcomp.cpp index c73b535b32b..ebb16645e8f 100644 --- a/src/mame/gridcomp/gridcomp.cpp +++ b/src/mame/gridcomp/gridcomp.cpp @@ -46,16 +46,16 @@ - EAROM, RTC - serial port (incomplete), modem (incl. DTMF generator) - proper custom DMA logic timing - - implement units other than 1101 + - loading ROMs for Compass II missing dumps: - - BIOS from models other than 1139 and late 1101 revision (the latter one is detected as 1108 in VERIFYPROM utility) + - dumps from 1100, 1107, 1121, 1131 - GRiDROM's - keyboard MCU - external floppy and hard disk (2101, 2102) - to boot CCOS 3.0.1: + to boot GRID-OS: - convert GRIDOS.IMD to IMG format - create zero-filled 384K bubble memory image and attach it as -memcard - attach floppy with `-ieee_grid grid2102 -flop GRIDOS.IMG` @@ -455,149 +455,53 @@ void gridcomp_state::grid1139(machine_config &config) ROM_START( grid1101 ) ROM_REGION16_LE(0x10000, "user1", 0) - ROM_SYSTEM_BIOS(0, "ccos", "ccos bios") - ROMX_LOAD("bios1101_0_25.bin", 0x0000, 0x4000, CRC(625388cb) SHA1(4c52c62fa9bc2f9a9a0a1e7f3beddef6809b9eed), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(0, "1101.rev4", "CCPROM 1101 revision 4") + ROMX_LOAD("1101even.rev4.bin", 0x0000, 0x2000, CRC(051b11e5) SHA1(73fb510c114f7fcbe1e616bb20cd97cb2c062e62), ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD("1101odd.rev4.bin", 0x0001, 0x2000, CRC(898d7ce2) SHA1(3e2c0deff5234b0b69cc407cf9858648a3e687b9), ROM_SKIP(1) | ROM_BIOS(0)) + + ROM_SYSTEM_BIOS(1, "1101.rev3", "CCPROM 1101 revision 3") + ROMX_LOAD("1101even.rev3.bin", 0x0000, 0x2000, CRC(bd7a385a) SHA1(924d5a04e5a5f57cd86849a47de50cb00d0fef40), ROM_SKIP(1) | ROM_BIOS(1)) + ROMX_LOAD("1101odd.rev3.bin", 0x0001, 0x2000, CRC(751c893e) SHA1(28212f6180de0c8dabcea95f0580eaf9b1db48a3), ROM_SKIP(1) | ROM_BIOS(1)) ROM_END ROM_START( grid1109 ) ROM_REGION16_LE(0x10000, "user1", 0) - ROM_SYSTEM_BIOS(0, "ccos", "ccos bios") - ROMX_LOAD("1109even.bin", 0x0000, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) - ROMX_LOAD("1109odd.bin", 0x0001, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) + ROM_SYSTEM_BIOS(0, "1109", "CCPROM 1109") + ROMX_LOAD("1109even.ccprom.bin", 0x0000, 0x2000, CRC(2545092e) SHA1(bafa84b59d4bd010db296c41063ea6b50431722c), ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD("1109odd.ccprom.bin", 0x0001, 0x2000, CRC(315d90b6) SHA1(e9447d615200942319ddf955644b1209025be867), ROM_SKIP(1) | ROM_BIOS(0)) ROM_END ROM_START( grid1121 ) ROM_REGION16_LE(0x10000, "user1", 0) - ROM_SYSTEM_BIOS(0, "ccos", "ccos bios") - ROMX_LOAD("1121even.bin", 0x0000, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) - ROMX_LOAD("1121odd.bin", 0x0001, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) + ROM_SYSTEM_BIOS(0, "1121", "CCPROM 1121") + ROMX_LOAD("1121even.ccprom.bin", 0x0000, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD("1121odd.ccprom.bin", 0x0001, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) ROM_END ROM_START( grid1129 ) ROM_REGION16_LE(0x10000, "user1", 0) - ROM_DEFAULT_BIOS("ccos") - ROM_SYSTEM_BIOS(0, "ccos", "ccos bios") - ROMX_LOAD("1129even.bin", 0x0000, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) - ROMX_LOAD("1129odd.bin", 0x0001, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) - - ROM_SYSTEM_BIOS(1, "patched", "patched 1139 bios") - ROMX_LOAD("1139even.bin", 0x0000, 0x2000, CRC(67071849) SHA1(782239c155fa5821f8dbd2607cee9152d175e90e), ROM_SKIP(1) | ROM_BIOS(1)) - ROMX_LOAD("1139odd.bin", 0x0001, 0x2000, CRC(13ed4bf0) SHA1(f7087f86dbbc911bee985125bccd2417e0374e8e), ROM_SKIP(1) | ROM_BIOS(1)) - - // change bubble driver setup to read floppy images with 512-byte sectors - ROM_FILL(0x3114,1,0x00) - ROM_FILL(0x3115,1,0x02) - ROM_FILL(0x3116,1,0xf8) - ROM_FILL(0x3117,1,0x01) - - // move work area from 0440h:XXXX to 0298h:XXXX - ROM_FILL(0x23,1,0x98) - ROM_FILL(0x24,1,0x2) - ROM_FILL(0xbc,1,0x98) - ROM_FILL(0xbd,1,0x2) - ROM_FILL(0x14e,1,0xc1) // - ROM_FILL(0x14f,1,0x2) // - ROM_FILL(0x15a,1,0xc2) // - ROM_FILL(0x15b,1,0x2) // - ROM_FILL(0x17b,1,0x45) // - ROM_FILL(0x17c,1,0x3) // - ROM_FILL(0x28c,1,0x98) - ROM_FILL(0x28d,1,0x2) - ROM_FILL(0x28f,1,0x98) - ROM_FILL(0x290,1,0x2) - ROM_FILL(0x2b9,1,0x98) - ROM_FILL(0x2ba,1,0x2) - ROM_FILL(0x2d0,1,0x98) - ROM_FILL(0x2d1,1,0x2) - ROM_FILL(0x31a,1,0x98) - ROM_FILL(0x31b,1,0x2) - ROM_FILL(0x3a0,1,0x98) - ROM_FILL(0x3a1,1,0x2) - ROM_FILL(0x3a3,1,0x98) - ROM_FILL(0x3a4,1,0x2) - ROM_FILL(0x3e2,1,0x98) - ROM_FILL(0x3e3,1,0x2) - ROM_FILL(0x43e,1,0x98) - ROM_FILL(0x43f,1,0x2) - ROM_FILL(0x46d,1,0x98) - ROM_FILL(0x46e,1,0x2) - ROM_FILL(0x4fe,1,0x98) - ROM_FILL(0x4ff,1,0x2) - ROM_FILL(0x512,1,0x98) - ROM_FILL(0x513,1,0x2) - ROM_FILL(0x768,1,0x98) - ROM_FILL(0x769,1,0x2) - ROM_FILL(0x79e,1,0x98) - ROM_FILL(0x79f,1,0x2) - ROM_FILL(0x7f5,1,0x98) - ROM_FILL(0x7f6,1,0x2) - ROM_FILL(0x92a,1,0x98) - ROM_FILL(0x92b,1,0x2) - ROM_FILL(0xe50,1,0x98) - ROM_FILL(0xe51,1,0x2) - ROM_FILL(0xfa6,1,0x98) - ROM_FILL(0xfa7,1,0x2) - ROM_FILL(0x15fe,1,0xce) // - ROM_FILL(0x15ff,1,0x2) // - ROM_FILL(0x1628,1,0xd0) // - ROM_FILL(0x1629,1,0x2) // - ROM_FILL(0x1700,1,0x98) - ROM_FILL(0x1701,1,0x2) - ROM_FILL(0x1833,1,0xd6) // - ROM_FILL(0x1834,1,0x2) // - ROM_FILL(0x184a,1,0xd6) // - ROM_FILL(0x184b,1,0x2) // - ROM_FILL(0x1a2e,1,0xd6) // - ROM_FILL(0x1a2f,1,0x2) // - ROM_FILL(0x19c2,1,0x98) - ROM_FILL(0x19c3,1,0x2) - ROM_FILL(0x1ee0,1,0x98) - ROM_FILL(0x1ee1,1,0x2) - ROM_FILL(0x1f1d,1,0x98) - ROM_FILL(0x1f1e,1,0x2) - ROM_FILL(0x1f40,1,0x98) - ROM_FILL(0x1f41,1,0x2) - ROM_FILL(0x2253,1,0x98) - ROM_FILL(0x2254,1,0x2) - ROM_FILL(0x2437,1,0x98) - ROM_FILL(0x2438,1,0x2) - ROM_FILL(0x283a,1,0x98) - ROM_FILL(0x283b,1,0x2) - ROM_FILL(0x2868,1,0x98) - ROM_FILL(0x2869,1,0x2) - ROM_FILL(0x288f,1,0x98) - ROM_FILL(0x2890,1,0x2) - ROM_FILL(0x2942,1,0x98) - ROM_FILL(0x2943,1,0x2) - ROM_FILL(0x295c,1,0x98) - ROM_FILL(0x295d,1,0x2) - ROM_FILL(0x2a5e,1,0x98) - ROM_FILL(0x2a5f,1,0x2) - ROM_FILL(0x315c,1,0xc9) // - ROM_FILL(0x315d,1,0x2) // - ROM_FILL(0x3160,1,0xce) // - ROM_FILL(0x3161,1,0x2) // - ROM_FILL(0x3164,1,0xcf) // - ROM_FILL(0x3165,1,0x2) // + ROM_SYSTEM_BIOS(0, "1129", "CCPROM 1129") + ROMX_LOAD("1129even.ccprom.bin", 0x0000, 0x2000, CRC(0ede3636) SHA1(9bc2dadec3ee2b78cbe7d79e70d033c60527ba8d), ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD("1129odd.ccprom.bin", 0x0001, 0x2000, CRC(07b29b05) SHA1(e6b1726e39b6f83b082b1a86ee9b0491e95b45d0), ROM_SKIP(1) | ROM_BIOS(0)) ROM_END ROM_START( grid1131 ) ROM_REGION16_LE(0x10000, "user1", 0) - ROM_SYSTEM_BIOS(0, "ccos", "ccos bios") - ROMX_LOAD("1131even.bin", 0x0000, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) - ROMX_LOAD("1131odd.bin", 0x0001, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) + ROM_SYSTEM_BIOS(0, "1131", "CCPROM 1131") + ROMX_LOAD("1131even.ccprom.bin", 0x0000, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD("1131odd.ccprom.bin", 0x0001, 0x2000, NO_DUMP, ROM_SKIP(1) | ROM_BIOS(0)) ROM_END ROM_START( grid1139 ) ROM_REGION16_LE(0x10000, "user1", 0) - ROM_SYSTEM_BIOS(0, "normal", "normal bios") - ROMX_LOAD("1139even.bin", 0x0000, 0x2000, CRC(67071849) SHA1(782239c155fa5821f8dbd2607cee9152d175e90e), ROM_SKIP(1) | ROM_BIOS(0)) - ROMX_LOAD("1139odd.bin", 0x0001, 0x2000, CRC(13ed4bf0) SHA1(f7087f86dbbc911bee985125bccd2417e0374e8e), ROM_SKIP(1) | ROM_BIOS(0)) + ROM_SYSTEM_BIOS(0, "1139", "CCPROM 1139") + ROMX_LOAD("1139even.ccprom.bin", 0x0000, 0x2000, CRC(67071849) SHA1(782239c155fa5821f8dbd2607cee9152d175e90e), ROM_SKIP(1) | ROM_BIOS(0)) + ROMX_LOAD("1139odd.ccprom.bin", 0x0001, 0x2000, CRC(13ed4bf0) SHA1(f7087f86dbbc911bee985125bccd2417e0374e8e), ROM_SKIP(1) | ROM_BIOS(0)) ROM_END } // anonymous namespace @@ -610,9 +514,9 @@ ROM_END ***************************************************************************/ // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1982, grid1101, 0, 0, grid1101, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1101", MACHINE_NO_SOUND_HW | MACHINE_IMPERFECT_CONTROLS ) -COMP( 1982, grid1109, grid1101, 0, grid1109, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1109", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -COMP( 1984, grid1121, 0, 0, grid1121, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1121", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -COMP( 1984, grid1129, grid1121, 0, grid1129, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1129", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -COMP( 1984, grid1131, grid1121, 0, grid1131, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1131", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -COMP( 1984, grid1139, grid1121, 0, grid1139, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1139", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +COMP( 1982, grid1101, 0, 0, grid1101, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1101", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS ) +COMP( 1982, grid1109, grid1101, 0, grid1109, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1109", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) +COMP( 1984, grid1121, 0, 0, grid1121, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1121", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) +COMP( 1984, grid1129, grid1121, 0, grid1129, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1129", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS ) +COMP( 1984, grid1131, grid1121, 0, grid1131, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1131", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) +COMP( 1984, grid1139, grid1121, 0, grid1139, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1139", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS ) From 70d4b9bc5d488bf71e571c14eec46615319e2c2c Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 12:40:59 +0100 Subject: [PATCH 238/351] sound abuffer: derive min_buffers from max_buffers, add over/underrun stats --- src/osd/modules/sound/sound_module.cpp | 28 ++++++++++++++++---------- src/osd/modules/sound/sound_module.h | 5 ++++- 2 files changed, 21 insertions(+), 12 deletions(-) diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index 801edb74df1..20220cf2c77 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -40,6 +40,8 @@ void sound_module::abuffer::clear() m_delta = 0; m_delta2 = 0; + m_underruns = 0; + m_overruns = 0; } void sound_module::abuffer::get(int16_t *data, uint32_t samples) noexcept @@ -50,6 +52,7 @@ void sound_module::abuffer::get(int16_t *data, uint32_t samples) noexcept while(pos != samples) { if(!m_used_buffers) { m_delta2 += samples - pos; + m_underruns++; while(pos != samples) { std::copy_n(m_last_sample.data(), m_channels, data); data += m_channels; @@ -77,7 +80,7 @@ void sound_module::abuffer::get(int16_t *data, uint32_t samples) noexcept pos += avail; data += avail * m_channels; } - //printf("# %d %d %d\n", m_used_buffers, m_delta, m_delta2); + //printf("%d -%d +%d # %d %d\n", m_used_buffers, m_underruns, m_overruns, m_delta, m_delta2); } void sound_module::abuffer::push(const int16_t *data, uint32_t samples) @@ -90,6 +93,13 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) std::copy_n(data, samples * m_channels, buf.m_data.data()); std::copy_n(data + ((samples - 1) * m_channels), m_channels, m_last_sample.data()); + // maximum number of buffers relative to samples + const uint32_t max_buffers = std::max(m_max_buffers * 48000 / samples / 50, 4U); + + // minimum number of buffers after overrun + // (lower limit of 2 prevents buffer underruns with push(this), get, get, push) + const uint32_t min_buffers = std::max(max_buffers / 4, 2U); + m_history[m_hindex] = m_used_buffers_prev - m_used_buffers; m_hindex = (m_hindex + 1) % m_history.size(); @@ -104,25 +114,21 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) }; if(m_overrun && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { - if(m_used_buffers > 2) { - // Once it's stabilized after an overrun, reduce buffers to 2 - flush_buffers(2); + if(m_used_buffers > min_buffers) { + // Once it's stabilized after an overrun, reduce buffers to minimum latency + flush_buffers(min_buffers); std::fill(m_history.begin(), m_history.end(), 0); } m_overrun = false; - } - - // maximum amount of buffers relative to samples - const uint32_t max_buffers = std::max(m_max_buffers * 48000 / samples / 50, 4U); - - if(m_used_buffers > max_buffers) { + } else if(m_used_buffers > max_buffers) { // If there are too many buffers, drop some and mark this event as an overrun flush_buffers(max_buffers); m_overrun = true; + m_overruns++; } m_used_buffers_prev = m_used_buffers; - //printf("# %d %d %d\n", m_used_buffers, m_delta, m_delta2); + //printf("%d -%d +%d # %d %d\n", m_used_buffers, m_underruns, m_overruns, m_delta, m_delta2); } uint32_t sound_module::abuffer::available() const noexcept diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index 5c90433ce55..8d1697931dc 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -64,7 +64,6 @@ protected: void pop_buffer() noexcept; buffer &push_buffer(); - int32_t m_delta, m_delta2; uint32_t m_channels; uint32_t m_used_buffers; uint32_t m_used_buffers_prev; @@ -74,6 +73,10 @@ protected: bool m_overrun; std::vector m_last_sample; std::vector m_buffers; + + // statistics + int32_t m_delta, m_delta2; + uint32_t m_underruns, m_overruns; }; }; From 189b692e38d5d0b6542540956aea0c322f8247ca Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 12:58:43 +0100 Subject: [PATCH 239/351] sound_module: update notes --- src/osd/modules/sound/sound_module.cpp | 10 +++++----- src/osd/modules/sound/sound_module.h | 7 ++----- 2 files changed, 7 insertions(+), 10 deletions(-) diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index 20220cf2c77..486d4023d52 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -1,7 +1,6 @@ // license:BSD-3-Clause // copyright-holders:O. Galibert - #include "sound_module.h" #include @@ -94,11 +93,12 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) std::copy_n(data + ((samples - 1) * m_channels), m_channels, m_last_sample.data()); // maximum number of buffers relative to samples + // unless -speed or -refreshspeed is used, this is same as m_max_buffers const uint32_t max_buffers = std::max(m_max_buffers * 48000 / samples / 50, 4U); // minimum number of buffers after overrun - // (lower limit of 2 prevents buffer underruns with push(this), get, get, push) - const uint32_t min_buffers = std::max(max_buffers / 4, 2U); + // lower limit of 2 prevents buffer underruns with push(this), get, get, push + const uint32_t min_buffers = std::max(max_buffers / 3, 2U); m_history[m_hindex] = m_used_buffers_prev - m_used_buffers; m_hindex = (m_hindex + 1) % m_history.size(); @@ -115,13 +115,13 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) if(m_overrun && std::accumulate(m_history.begin(), m_history.end(), 0) >= -2) { if(m_used_buffers > min_buffers) { - // Once it's stabilized after an overrun, reduce buffers to minimum latency + // once it's stabilized after an overrun, reduce buffers to minimum latency flush_buffers(min_buffers); std::fill(m_history.begin(), m_history.end(), 0); } m_overrun = false; } else if(m_used_buffers > max_buffers) { - // If there are too many buffers, drop some and mark this event as an overrun + // if there are too many buffers, drop some and mark this event as an overrun flush_buffers(max_buffers); m_overrun = true; m_overruns++; diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index 8d1697931dc..dd24723ff1d 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -1,9 +1,6 @@ // license:BSD-3-Clause -// copyright-holders:Couriersud -/* - * sound_module.h - * - */ +// copyright-holders:O. Galibert + #ifndef MAME_OSD_SOUND_SOUND_MODULE_H #define MAME_OSD_SOUND_SOUND_MODULE_H From d0231349f75803cd787304968ab22dc5c60cfb9b Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 13:23:35 +0100 Subject: [PATCH 240/351] readme: re-add mameworld link --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index d998f7054e8..1ee2c4b3fbc 100644 --- a/README.md +++ b/README.md @@ -15,6 +15,7 @@ MAME's purpose is to preserve decades of software history. As electronic technol * [MAME Forums on bannister.org](https://forums.bannister.org/ubbthreads.php?ubb=cfrm&c=5) * [r/MAME](https://www.reddit.com/r/MAME/) on Reddit +* [MAMEWorld Forums](https://www.mameworld.info/ubbthreads/) ## Development From 95a86f9153315a4a280bc4b9b772f1a177fef034 Mon Sep 17 00:00:00 2001 From: arekkusu42 Date: Thu, 12 Mar 2026 05:38:08 -0700 Subject: [PATCH 241/351] g65816: XBA always takes 3 cycles (#15088) --- src/devices/cpu/g65816/g65816op.ipp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/cpu/g65816/g65816op.ipp b/src/devices/cpu/g65816/g65816op.ipp index 72dcfd51581..1043b5bb0d5 100644 --- a/src/devices/cpu/g65816/g65816op.ipp +++ b/src/devices/cpu/g65816/g65816op.ipp @@ -1437,7 +1437,7 @@ #undef OP_XBA #if FLAG_SET_M #define OP_XBA() \ - CLK(CLK_OP + CLK_IMPLIED); \ + CLK(CLK_OP + CLK_IMPLIED + 1); \ FLAG_Z = REGISTER_B>>8; \ REGISTER_B = REGISTER_A<<8; \ REGISTER_A = FLAG_Z; \ From 069e60e625d97336014a312f086611d0095c60ff Mon Sep 17 00:00:00 2001 From: Jesus Ramos Date: Thu, 12 Mar 2026 05:39:18 -0700 Subject: [PATCH 242/351] sh/sh7709s.cpp: Update bank conflict precharge penalty timing (#15087) Handle the precharge of the last active bank in the background and only pay the penalty on a bank conflict and only pay the remainder of the wait cycles that haven't elapsed since the last access Update the read->write wait penalty time for dirty writeback eviction since wcr1 should contain that value --- src/devices/cpu/sh/sh7709s.cpp | 39 +++++++++++++++++++++++----------- src/devices/cpu/sh/sh7709s.h | 1 + 2 files changed, 28 insertions(+), 12 deletions(-) diff --git a/src/devices/cpu/sh/sh7709s.cpp b/src/devices/cpu/sh/sh7709s.cpp index de8453c4073..36ae47039c4 100644 --- a/src/devices/cpu/sh/sh7709s.cpp +++ b/src/devices/cpu/sh/sh7709s.cpp @@ -13,10 +13,6 @@ // - Checks for certain area specifics : bank mode timing for sdram access, area check for sdram, area check for burst mode + burst size // - TLB simulation + timing and lookups // - Branch predicition/mispredict penalties - Needs a branch target buffer and some basic tracking, didn't make a huge difference for cv1k when I threw one together -// - Full pipeline simulation: -// Some penalties should overlap with following instructions that don't involve bus access -// Writeback timing for certain operations should also overlap in some cases -// If the CPU supports critical word first the instruction that takes the miss should be able to start as soon as that address is read in from memory even if there are further words to be read #include "emu.h" #include "sh7709s.h" @@ -39,6 +35,9 @@ void sh7709s_device::device_reset() m_wb_address = 0; m_last_area_accessed = 0; m_last_area_accessed_was_write = false; + m_wb_active_cycles = 0; + m_last_sdram_page = 0; + m_precharge_remaining_cycles = 0; } void sh7709s_device::device_start() @@ -49,6 +48,9 @@ void sh7709s_device::device_start() m_wb_address = 0; m_last_area_accessed = 0; m_last_area_accessed_was_write = false; + m_wb_active_cycles = 0; + m_last_sdram_page = 0; + m_precharge_remaining_cycles = 0; for (int i = 0; i < SH7709S_CACHE_BLOCKS; i++) for (int j = 0; j < SH7709S_CACHE_ASSOCIATIVITY; j++) @@ -61,6 +63,9 @@ void sh7709s_device::device_start() save_item(NAME(m_wb_address)); save_item(NAME(m_last_area_accessed)); save_item(NAME(m_last_area_accessed_was_write)); + save_item(NAME(m_wb_active_cycles)); + save_item(NAME(m_last_sdram_page)); + save_item(NAME(m_precharge_remaining_cycles)); } static bool is_cacheable(uint32_t address) @@ -127,12 +132,10 @@ bool sh7709s_device::cache_access(uint32_t address, bool write) return false; } -#define SH7709S_AREA_MASK (0x1FFFFFFF) - unsigned int get_area(uint32_t address) { // Mask to 29 bit physical space - uint32_t phys_mask = address & SH7709S_AREA_MASK; + uint32_t phys_mask = address & SH34_AM; return phys_mask >> 26; } @@ -273,7 +276,6 @@ unsigned int cache_line_fetch_count(uint32_t address, uint16_t bcr2) #define BUS_ACCESS_PENALTY (3) // Fixed bus cycle cost to access the bus #define BURST_READ_WORD_PENALTY (3) // First word overlaps with one of the command clocks #define BURST_WRITE_WORD_PENALTY (4) -#define BUS_CS_SWAP_PENALTY (1) // Penalty paid when swapping the bus from read->write for writeback eviction // cpu->bus cycle conversion hardcoded to 2x as cv1k sh3 runs the bus at 50mhz unsigned int sh7709s_device::access_penalty(uint32_t address, bool write) @@ -294,11 +296,15 @@ unsigned int sh7709s_device::access_penalty(uint32_t address, bool write) unsigned int cpu_penalty = CACHE_MISS_STALL; unsigned int page_read = address / SDRAM_PAGE_SIZE; + // CPU is in auto precharge mode, since we hit a bank conflict and the last precharge isn't done we stall + if (page_read == m_last_sdram_page && m_precharge_remaining_cycles > 0) + cpu_penalty += m_precharge_remaining_cycles; + m_precharge_remaining_cycles = 0; + // We hit another miss before a writeback eviction finished, stall until that's done + // We already account for the precharge bank conflict above if (m_wb_active_cycles > 0) { - if (m_last_sdram_page == page_read) - bus_penalty += mcr_tpc(m_mcr); cpu_penalty += m_wb_active_cycles; m_wb_active_cycles = 0; } @@ -309,13 +315,15 @@ unsigned int sh7709s_device::access_penalty(uint32_t address, bool write) if (m_wb_address != 0) { unsigned int page_write = m_wb_address / SDRAM_PAGE_SIZE; - // Bank collision in auto recharge mode, we have to wait for tpc + // Bank collision in auto precharge mode, we have to wait for precharge to finish before starting if (page_read == page_write) m_wb_active_cycles += mcr_tpc(m_mcr) * 2; - m_wb_active_cycles += (BUS_ACCESS_PENALTY + BUS_CS_SWAP_PENALTY + BURST_WRITE_WORD_PENALTY + mcr_rcd(m_mcr) + mcr_trwl(m_mcr) + mcr_tpc(m_mcr)) * 2; + m_wb_active_cycles += (BUS_ACCESS_PENALTY + get_wcr1_timing(address, m_wcr1) + BURST_WRITE_WORD_PENALTY + mcr_rcd(m_mcr) + mcr_trwl(m_mcr)) * 2; m_wb_address = 0; m_last_sdram_page = page_write; } + else // Account for the read close after burst read if we hit the same bank, writebacks include the cost in the background cycles if there is a conflict + m_precharge_remaining_cycles = mcr_tpc(m_mcr) * 2; return cpu_penalty + (bus_penalty * 2); } @@ -335,7 +343,14 @@ void sh7709s_device::drc_memory_access_write() void sh7709s_device::drc_update_icache() { if (m_wb_active_cycles > 0) + { m_wb_active_cycles--; + // If we had an active wb complete set the remaining precharge cycles in case of bank conflict + if (m_wb_active_cycles == 0) + m_precharge_remaining_cycles = mcr_tpc(m_mcr) * 2; + } + else if (m_precharge_remaining_cycles > 0) + m_precharge_remaining_cycles--; // Assume the instruction prefetch is perfect for now // we'll still pay a bit of penalty for the access and // handle cache writeback when the icache fetch causes diff --git a/src/devices/cpu/sh/sh7709s.h b/src/devices/cpu/sh/sh7709s.h index 66cba772e46..8e2364699ae 100644 --- a/src/devices/cpu/sh/sh7709s.h +++ b/src/devices/cpu/sh/sh7709s.h @@ -48,6 +48,7 @@ private: bool m_last_area_accessed_was_write; // last memory area accessed operation also for WCR1 timing purposes unsigned int m_wb_active_cycles; // Track any background cycles for writeback and precharge waits on the same bank unsigned int m_last_sdram_page; // Last accessed sdram page, used to track when to have to pay tpc(precharge) cost + unsigned int m_precharge_remaining_cycles; bool cache_access(uint32_t address, bool write); unsigned int access_penalty(uint32_t address, bool write); From e4047d3f7263c716cac39c01c4dfaa08aa642864 Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Thu, 12 Mar 2026 13:58:59 +0100 Subject: [PATCH 243/351] rewrite translation table for grid compass keyboard (#15051) --- src/mame/gridcomp/gridcomp.cpp | 7 +- src/mame/gridcomp/gridkeyb.cpp | 142 +++++++++++++++------------------ 2 files changed, 66 insertions(+), 83 deletions(-) diff --git a/src/mame/gridcomp/gridcomp.cpp b/src/mame/gridcomp/gridcomp.cpp index ebb16645e8f..3f7247db63f 100644 --- a/src/mame/gridcomp/gridcomp.cpp +++ b/src/mame/gridcomp/gridcomp.cpp @@ -40,11 +40,9 @@ to do: - - keyboard: decode and add the rest of keycodes - keycode table can be found here on page A-2: - http://deltacxx.insomnia247.nl/gridcompass/large_files/Yahoo%20group%20backup/RuGRiD-Laptop/files/6_GRiD-OS-Programming/3_GRiD-OS-Reference.pdf - - EAROM, RTC + - EAROM, RTC - serial port (incomplete), modem (incl. DTMF generator) + - keyboard MCU emulation - proper custom DMA logic timing - loading ROMs for Compass II @@ -52,7 +50,6 @@ - dumps from 1100, 1107, 1121, 1131 - GRiDROM's - - keyboard MCU - external floppy and hard disk (2101, 2102) to boot GRID-OS: diff --git a/src/mame/gridcomp/gridkeyb.cpp b/src/mame/gridcomp/gridkeyb.cpp index 5614ea011a8..b668a50e8ca 100644 --- a/src/mame/gridcomp/gridkeyb.cpp +++ b/src/mame/gridcomp/gridkeyb.cpp @@ -2,11 +2,9 @@ // copyright-holders:Vas Crabb, Sergey Svishchev /*************************************************************************** - GRiD Compass keyboard HLE, derived from generic_keyboard + GRiD Compass keyboard HLE - Keycodes from "6 - Interceptor, CCProm, Utils, OS - Sysgen/UTILS/DVLEXEC.PLM" - - Multiple shift key combos not simulated yet. + Keycodes from "GRiD-OS Reference Appendix A - Key scan codes" ***************************************************************************/ @@ -18,47 +16,34 @@ namespace { -u16 const TRANSLATION_TABLE[][4][16] = { - { // plain - { '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=', 0x08U, 0x7fU, 0x1bU }, - { 0x09U, 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\\', 0xffU, 0xffU }, - { 0xffU, 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'', 0x0dU, 0xc5U, 0xc4U, 0x0aU }, - { 0xffU, '\\', 'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/', 0xffU, 0xc6U, 0xc7U, ' ' } +// Regarding the document, the scan code for Escape when Code and Shift are pressed has been corrected. +// All values in the table have been verified against the values from the keyboard firmware. +u8 const TRANSLATION_TABLE[][4][16] = { + { // Plain + { '`', '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', '-', '=', 0x08U, 0x7fU, 0x1bU }, + { 0x09U, 'q', 'w', 'e', 'r', 't', 'y', 'u', 'i', 'o', 'p', '[', ']', '\\', 0xffU, 0xffU }, + { 0xffU, 'a', 's', 'd', 'f', 'g', 'h', 'j', 'k', 'l', ';', '\'', 0x0dU, 0xc5U, 0xc4U, 0xffU }, + { 0xffU, '\\', 'z', 'x', 'c', 'v', 'b', 'n', 'm', ',', '.', '/', 0xffU, 0xc6U, 0xc7U, ' ' }, }, { // SHIFT - { '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+', 0x08U, 0x7fU, 0x1bU }, - { 0x09U, 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '|', 0xffU, 0xffU }, - { 0xffU, 'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', 0x0dU, 0xffU, 0xffU, 0x0aU }, - { 0xffU, '_', 'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?', 0xffU, 0xffU, 0xffU, ' ' } + { '~', '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+', 0xc8U, 0x7fU, 0x1bU }, + { 0xc9U, 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}', '|', 0xffU, 0xffU }, + { 0xffU, 'A', 'S', 'D', 'F', 'G', 'H', 'J', 'K', 'L', ':', '"', 0xcdU, 0xcfU, 0xceU, 0xffU }, + { 0xffU, '|', 'Z', 'X', 'C', 'V', 'B', 'N', 'M', '<', '>', '?', 0xffU, 0xd0U, 0xd1U, ' ' }, }, - { // CODE -- partial - { 0xffU, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', 0xffU, 0xffU, 0x88U, 0xffU, 0x9bU }, - { 0x89U, 0xf1U, 0xf7U, 0xe5U, 0xf2U, 0xf4U, 0xf9U, 0xf5U, 0xe9U, 0xefU, 0xf0U, 0x9bU, 0xffU, 0xffU, 0xffU, 0xffU }, - { 0xffU, 0xe1U, 0xf3U, 0xe4U, 0xe6U, 0xe7U, 0xe8U, 0xeaU, 0xebU, 0xecU, ';', '\'', 0x8dU, 0xffU, 0xffU, 0xffU }, - { 0xffU, 0x1cU, 0xfaU, 0xf8U, 0xe3U, 0xf6U, 0xe2U, 0xeeU, 0xedU, ',', '.', 0xbfU, 0xffU, 0xd4U, 0xd5U, 0xffU } + { // CODE + { '`', 0xb1U, 0xb2U, 0xb3U, 0xb4U, 0xb5U, 0xb6U, 0xb7U, 0xb8U, 0xb9U, 0xb0U, 0xadU, 0xbdU, 0x88U, 0x7fU, 0x9bU }, + { 0x89U, 0xf1U, 0xf7U, 0xe5U, 0xf2U, 0xf4U, 0xf9U, 0xf5U, 0xe9U, 0xefU, 0xf0U, '[', ']', '\\', 0xffU, 0xffU }, + { 0xffU, 0xe1U, 0xf3U, 0xe4U, 0xe6U, 0xe7U, 0xe8U, 0xeaU, 0xebU, 0xecU, '~', '`', 0x8dU, 0xd3U, 0xd2U, 0xffU }, + { 0xffU, '\\', 0xfaU, 0xf8U, 0xe3U, 0xf6U, 0xe2U, 0xeeU, 0xedU, '[', ']', 0xbfU, 0xffU, 0xd4U, 0xd5U, ' ' }, }, - { // CTRL - { 0x00U, '1', '2', '3', '4', '5', '6', '7', '8', '9', '0', 0x1fU, 0x1eU, 0x88U, 0x7fU, 0x1bU }, - { 0x89U, 0x11U, 0x17U, 0x05U, 0x12U, 0x14U, 0x19U, 0x15U, 0x09U, 0x0fU, 0x10U, 0x9bU, 0x1dU, 0x1cU, 0xffU, 0xffU }, - { 0xffU, 0x01U, 0x13U, 0x04U, 0x06U, 0x07U, 0x08U, 0x0aU, 0x0bU, 0x0cU, ';', '\'', 0x8dU, 0xffU, 0xffU, 0x0aU }, - { 0xffU, 0x1cU, 0x1aU, 0x18U, 0x03U, 0x16U, 0x02U, 0x0eU, 0x0dU, ',', '.', 0xbfU, 0xffU, 0xffU, 0xffU, 0x00U } - }, - { // CODE-CTRL - { 0x00U, 0x91U, 0x92U, 0x93U, 0x94U, 0x95U, 0x96U, 0x97U, 0x98U, 0x99U, 0x90U, 0xBDU, 0x9DU, 0x88U, 0x7fU, 0x9bU }, - { 0x89U, 0x91U, 0x97U, 0x85U, 0x92U, 0x94U, 0x99U, 0x95U, 0x89U, 0x8fU, 0x90U, 0xffU, 0xffU, 0xffU, 0xffU, 0xffU }, - { 0xffU, 0x81U, 0x93U, 0x84U, 0x86U, 0x87U, 0x88U, 0x8aU, 0x8bU, 0x8cU, 0x1EU, 0x00U, 0x8dU, 0xffU, 0xffU, 0x0aU }, - { 0xffU, 0x9cU, 0x9aU, 0x98U, 0x83U, 0x96U, 0x82U, 0x8eU, 0x8dU, 0x1bU, 0x1DU, 0xbfU, 0xffU, 0xffU, 0xffU, 0x00U } + { // CODE + SHIFT + { '~', 0xa1U, 0xc0U, 0xa3U, 0xa4U, 0xa5U, 0xdeU, 0xa6U, 0xaaU, 0xa8U, 0xa9U, 0x7fU, 0xabU, 0x8aU, 0x7fU, 0xfeU }, + { 0x8bU, 0xf1U, 0xf7U, 0xe5U, 0xf2U, 0xf4U, 0xf9U, 0xf5U, 0xe9U, 0xefU, 0xf0U, '{', '}', '|', 0xffU, 0xffU }, + { 0xffU, 0xe1U, 0xf3U, 0xe4U, 0xe6U, 0xe7U, 0xe8U, 0xeaU, 0xebU, 0xecU, '|', '\\', 0x8cU, 0xd7U, 0xd6U, 0xffU }, + { 0xffU, '|', 0xfaU, 0xf8U, 0xe3U, 0xf6U, 0xe2U, 0xeeU, 0xedU, '{', '}', 0xbfU, 0xffU, 0xd8U, 0xd9U, ' ' }, }, }; - - -bool const CAPS_TABLE[4][16] = { - { false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false }, - { false, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false }, - { false, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false }, - { false, false, true, true, true, true, true, true, true, false, false, false, false, false, false, false } -}; - } // anonymous namespace @@ -116,11 +101,11 @@ INPUT_PORTS_START( grid_keyboard ) PORT_START("GRIDKBD_ROW0") PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') - PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') - PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') - PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') - PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') + PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') PORT_BIT( 0x0100U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') @@ -128,22 +113,22 @@ INPUT_PORTS_START( grid_keyboard ) PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') PORT_BIT( 0x1000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') - PORT_BIT( 0x2000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("Backspace") PORT_CHAR(0x08U) - PORT_BIT( 0x4000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DEL) PORT_NAME("Del") PORT_CHAR(UCHAR_MAMEKEY(DEL)) - PORT_BIT( 0x8000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC) PORT_NAME("Escape") PORT_CHAR(UCHAR_MAMEKEY(ESC)) + PORT_BIT( 0x2000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("Backspace") PORT_CHAR(0x08U) + PORT_BIT( 0x4000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DEL) PORT_NAME("Del") PORT_CHAR(UCHAR_MAMEKEY(DEL)) + PORT_BIT( 0x8000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ESC) PORT_NAME("Escape") PORT_CHAR(UCHAR_MAMEKEY(ESC)) PORT_START("GRIDKBD_ROW1") - PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') - PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') - PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') - PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') - PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') - PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') - PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') - PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') - PORT_BIT( 0x0100U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') - PORT_BIT( 0x0200U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') - PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') + PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT( 0x0100U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT( 0x0200U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') PORT_BIT( 0x1000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') PORT_BIT( 0x2000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') @@ -152,21 +137,21 @@ INPUT_PORTS_START( grid_keyboard ) PORT_START("GRIDKBD_ROW2") PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') - PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') - PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') - PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') - PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') - PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') - PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') - PORT_BIT( 0x0100U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') - PORT_BIT( 0x0200U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') - PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') - PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') + PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT( 0x0100U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT( 0x0200U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT( 0x0400U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') + PORT_BIT( 0x0800U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') PORT_BIT( 0x1000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Return") PORT_CHAR(0x0dU) PORT_BIT( 0x2000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_UP) PORT_NAME("UpArrow") PORT_BIT( 0x4000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_DOWN) PORT_NAME("DownArrow") - PORT_BIT( 0x8000U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_INSERT) PORT_NAME("Linefeed") PORT_CHAR(UCHAR_MAMEKEY(INSERT)) + PORT_BIT( 0x8000U, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("GRIDKBD_ROW3") PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -272,21 +257,22 @@ bool grid_keyboard_device::translate(u8 code, u16 &translated) const unsigned const col((code >> 0) & 0x0fU); u16 const modifiers(m_modifiers->read()); - bool const shift(bool(modifiers & 0x02U) != (bool(modifiers & 0x04U) && CAPS_TABLE[row][col])); + bool const shift(bool(modifiers & 0x02) || bool(modifiers & 0x04)); bool const ctrl(modifiers & 0x01U); bool const meta(modifiers & 0x08U); - unsigned const map(ctrl ? (meta ? 4U : 3U) : meta ? 2U : shift ? 1U : 0U); - u16 const result(TRANSLATION_TABLE[map][row][col]); - if (result == u8(~0U)) - { + int const map((int)meta << 1 | (int)shift); + + u8 const result(TRANSLATION_TABLE[map][row][col]); + if (result == 0xff) return false; - } + + if (ctrl && result >= 0x20) + translated = result - 0x20; else - { translated = result; - return true; - } + + return true; } From bfae7c674b91b7ac2a4489330a034607d81cc968 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 14:20:42 +0100 Subject: [PATCH 244/351] coreaudio: forward latency to abuffer --- src/osd/modules/sound/coreaudio_sound.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/osd/modules/sound/coreaudio_sound.cpp b/src/osd/modules/sound/coreaudio_sound.cpp index 0b031b89ae4..8e5fb2da93e 100644 --- a/src/osd/modules/sound/coreaudio_sound.cpp +++ b/src/osd/modules/sound/coreaudio_sound.cpp @@ -1703,6 +1703,7 @@ int sound_coreaudio::coreaudio_stream::create_sink_stream(struct coreaudio_devic // Allocate buffer m_headroom = m_sample_bytes * (m_audio_latency * m_sample_rate * 20e-3f); m_buffer_size = m_sample_bytes * std::max(m_sample_rate * (m_audio_latency + 3) * 20e-3f, 512U); + m_input_buffer.set_latency(m_audio_latency); osd_printf_verbose("CoreAudio: Allocating %d bytes of buffer space (%d bytes per frame)\n", m_buffer_size, m_sample_bytes); try { From 2ca08f87aca5c4d7b40a972e2bad04af128683c6 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 14:35:20 +0100 Subject: [PATCH 245/351] sound abuffer: audio latency is a float --- src/osd/modules/sound/sound_module.cpp | 4 ++-- src/osd/modules/sound/sound_module.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index 486d4023d52..80ec56f885e 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -23,10 +23,10 @@ sound_module::abuffer::abuffer(uint32_t channels) noexcept : clear(); } -void sound_module::abuffer::set_latency(uint32_t latency) +void sound_module::abuffer::set_latency(float latency) { // set maximum buffers from latency in 20ms steps (the default of 8 is 0.16s) - m_max_buffers = std::max(latency + latency / 2, latency + 3); + m_max_buffers = std::max(latency + latency / 2.0f, latency + 3); m_max_buffers = std::clamp(m_max_buffers, 4U, 50U); } diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index dd24723ff1d..69ef1732fde 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -39,7 +39,7 @@ protected: class abuffer { public: abuffer(uint32_t channels) noexcept; - void set_latency(uint32_t latency); + void set_latency(float latency); void clear(); void get(int16_t *data, uint32_t samples) noexcept; void push(const int16_t *data, uint32_t samples); From 561ad91b6be610ef050c3c57a40f2e280b8084d9 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 13 Mar 2026 02:21:34 +1100 Subject: [PATCH 246/351] cpu/sharc/compute.hxx: More detailed floating point mulitply and add/sub emulation for interpreter. Set MV, MU and MI flags and corresponding sticky flags for multiplication. Flush denormals to zero and set AV flag (and corresponding sticky flag) for dual add/subtract. More detailed NaN handling for both. --- src/devices/cpu/sharc/compute.hxx | 272 ++++++++++++++++------------- src/devices/cpu/sharc/sharc.h | 14 +- src/devices/cpu/sharc/sharcops.hxx | 26 +-- 3 files changed, 161 insertions(+), 151 deletions(-) diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx index 2271d2eec37..832d7eb37bc 100644 --- a/src/devices/cpu/sharc/compute.hxx +++ b/src/devices/cpu/sharc/compute.hxx @@ -46,6 +46,13 @@ inline bool IS_FLOAT_NAN_SUB(uint32_t a, uint32_t b) return (aemax && ((a & FLOAT_MANTISSA_MASK) != 0)) || (bemax && ((b & FLOAT_MANTISSA_MASK) != 0)) || (aemax && bemax && !((a ^ b) & FLOAT_SIGN_MASK)); } +inline bool IS_FLOAT_NAN_MUL(uint32_t a, uint32_t b) +{ + bool const aemax = (a & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + bool const bemax = (b & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + return (aemax && (((a & FLOAT_MANTISSA_MASK) != 0) || IS_FLOAT_ZERO(b))) || (bemax && (((b & FLOAT_MANTISSA_MASK) != 0) || IS_FLOAT_ZERO(a))); +} + constexpr uint32_t FLOAT_FLUSH_DENORMAL(uint32_t r) { return IS_FLOAT_DENORMAL_OR_ZERO(r) ? (r & FLOAT_SIGN_MASK) : r; } @@ -203,7 +210,7 @@ adsp21062_device::SHARC_REG adsp21062_device::FSUB(int fx, int fy) return r; } -// (Fx + Fy) / 2 +/* (Fx + Fy) / 2 */ adsp21062_device::SHARC_REG adsp21062_device::FAVG(int fx, int fy) { SHARC_REG r; @@ -241,7 +248,7 @@ adsp21062_device::SHARC_REG adsp21062_device::FAVG(int fx, int fy) return r; } -// ABS Fx +/* ABS Fx */ adsp21062_device::SHARC_REG adsp21062_device::FABS(int fx) { SHARC_REG r; @@ -269,7 +276,7 @@ adsp21062_device::SHARC_REG adsp21062_device::FABS(int fx) return r; } -// MIN(Fx, Fy) +/* MIN(Fx, Fy) */ adsp21062_device::SHARC_REG adsp21062_device::FMIN(int fx, int fy) { SHARC_REG r; @@ -292,7 +299,7 @@ adsp21062_device::SHARC_REG adsp21062_device::FMIN(int fx, int fy) return r; } -// MAX(Fx, Fy) +/* MAX(Fx, Fy) */ adsp21062_device::SHARC_REG adsp21062_device::FMAX(int fx, int fy) { SHARC_REG r; @@ -315,6 +322,85 @@ adsp21062_device::SHARC_REG adsp21062_device::FMAX(int fx, int fy) return r; } +/* Fx + Fy, Fx - Fy */ +std::pair adsp21062_device::FADD_FSUB(int fx, int fy) +{ + std::pair r; + bool const xemax = (REG(fx) & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + bool const yemax = (REG(fy) & FLOAT_EXPONENT_MASK) == FLOAT_EXPONENT_MASK; + + if ((xemax && ((REG(fx) & FLOAT_MANTISSA_MASK) != 0)) || (yemax && (REG(fy) & FLOAT_MANTISSA_MASK) != 0)) + { + // at least one NaN + r.first.r = FLOAT_CANONICAL_NAN; + r.second.r = FLOAT_CANONICAL_NAN; + m_core->astat |= AI; + m_core->stky |= AIS; + } + else if (!xemax || !yemax) + { + // neither NaN, at least one not infinity + SHARC_REG x, y; + x.r = FLOAT_FLUSH_DENORMAL(REG(fx)); + y.r = FLOAT_FLUSH_DENORMAL(REG(fy)); + r.first.f = x.f + y.f; + r.second.f = x.f - y.f; + + if (IS_FLOAT_INFINITY(r.first.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.first.r = (r.first.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.first.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.first.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.first.r &= FLOAT_SIGN_MASK; + } + + if (IS_FLOAT_INFINITY(r.second.r)) + { + m_core->astat |= AV; + m_core->stky |= AVS; + if (m_core->mode1 & MODE1_TRUNCATE) + r.second.r = (r.second.r & FLOAT_SIGN_MASK) | 0x7f7fffff; + } + else if (IS_FLOAT_DENORMAL_OR_ZERO(r.second.r)) + { + m_core->astat |= AZ; + m_core->stky |= ((r.second.r & FLOAT_MANTISSA_MASK) != 0) ? AUS : 0; + r.second.r &= FLOAT_SIGN_MASK; + } + + m_core->astat |= ((r.first.r | r.second.r) & FLOAT_SIGN_MASK) ? AN : 0; + } + else + { + // both infinity + if ((REG(fx) ^ REG(fy)) & FLOAT_SIGN_MASK) + { + // opposite signs - sum is NaN + r.first.r = FLOAT_CANONICAL_NAN; + r.second.f = (REG(fx) & FLOAT_SIGN_MASK) | ((m_core->mode1 & MODE1_TRUNCATE) ? 0x7f7fffff : FLOAT_INFINITY); + } + else + { + // same sign - difference is NaN + r.first.f = (REG(fx) & FLOAT_SIGN_MASK) | ((m_core->mode1 & MODE1_TRUNCATE) ? 0x7f7fffff : FLOAT_INFINITY); + r.second.r = FLOAT_CANONICAL_NAN; + } + + m_core->astat |= (REG(fx) & FLOAT_SIGN_MASK) ? AN : 0; + m_core->astat |= AV | AI; + m_core->stky |= AVS | AIS; + } + + m_core->astat |= AF; + return r; +} + uint32_t adsp21062_device::SCALB(SHARC_REG fx, int ry) { uint32_t const mantissa = fx.r & FLOAT_MANTISSA_MASK; @@ -342,6 +428,33 @@ uint32_t adsp21062_device::SCALB(SHARC_REG fx, int ry) } +/*****************************************************************************/ +/* Multiplier helpers */ + +/* Fn = Fx * Fy */ +adsp21062_device::SHARC_REG adsp21062_device::FMUL(int fx, int fy) +{ + SHARC_REG r; + if (IS_FLOAT_NAN_MUL(REG(fx), REG(fy))) + { + r.r = FLOAT_CANONICAL_NAN; + m_core->astat |= MI; + m_core->stky |= MIS; + } + else + { + r.f = FREG(fx) * FREG(fy); + + m_core->astat |= (r.r & FLOAT_SIGN_MASK) ? MN : 0; + m_core->astat |= IS_FLOAT_INFINITY(r.r) ? MV : 0; + m_core->astat |= IS_FLOAT_DENORMAL(r.r) ? MU : 0; + m_core->stky |= IS_FLOAT_INFINITY(r.r) ? MVS : 0; + m_core->stky |= IS_FLOAT_DENORMAL(r.r) ? MUS : 0; + } + return r; +} + + /*****************************************************************************/ /* Integer ALU operations */ @@ -1271,15 +1384,10 @@ uint32_t adsp21062_device::compute_mrb_plus_mul_ssin(int rx, int ry) } /* Fn = Fx * Fy */ -void adsp21062_device::compute_fmul(int rn, int rx, int ry) +void adsp21062_device::compute_fmul(int fn, int fx, int fy) { - FREG(rn) = FREG(rx) * FREG(ry); - CLEAR_MULTIPLIER_FLAGS(); - SET_FLAG_MN(REG(rn)); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ + FREG(fn) = FMUL(fx, fy).f; } /*****************************************************************************/ @@ -1401,31 +1509,16 @@ void adsp21062_device::compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, in } +/*****************************************************************************/ +/* Dual add/subtract */ + /* Fa = Fx + Fy, Fs = Fx - Fy */ -void adsp21062_device::compute_dual_fadd_fsub(int ra, int rs, int rx, int ry) +void adsp21062_device::compute_dual_fadd_fsub(int fa, int fs, int fx, int fy) { - SHARC_REG r_add, r_sub; - r_add.f = FREG(rx) + FREG(ry); - r_sub.f = FREG(rx) - FREG(ry); - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= ((r_add.f < 0.0f) || (r_sub.f < 0.0f)) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL_OR_ZERO(r_add.r) || - IS_FLOAT_DENORMAL_OR_ZERO(r_sub.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0; - /* TODO: AV flag */ - - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; - - FREG(ra) = r_add.f; - FREG(rs) = r_sub.f; - m_core->astat |= AF; + auto [r_add, r_sub] = FADD_FSUB(fx, fy); + FREG(fa) = r_add.f; + FREG(fs) = r_sub.f; } @@ -1438,14 +1531,7 @@ void adsp21062_device::compute_fmul_fadd(int fm, int fxm, int fym, int fa, int f CLEAR_MULTIPLIER_FLAGS(); CLEAR_ALU_FLAGS(); - SHARC_REG r_mul; - r_mul.f = FREG(fxm) * FREG(fym); - - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - + SHARC_REG r_mul = FMUL(fxm, fym); SHARC_REG r_alu = FADD(fxa, fya); FREG(fm) = r_mul.f; @@ -1458,14 +1544,7 @@ void adsp21062_device::compute_fmul_fsub(int fm, int fxm, int fym, int fa, int f CLEAR_MULTIPLIER_FLAGS(); CLEAR_ALU_FLAGS(); - SHARC_REG r_mul; - r_mul.f = FREG(fxm) * FREG(fym); - - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - + SHARC_REG r_mul = FMUL(fxm, fym); SHARC_REG r_alu = FSUB(fxa, fya); FREG(fm) = r_mul.f; @@ -1475,21 +1554,18 @@ void adsp21062_device::compute_fmul_fsub(int fm, int fxm, int fym, int fa, int f /* Fm = Fxm * Fym, Fa = FLOAT Rxa BY Rya */ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int rxa, int rya) { + CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul = FMUL(fxm, fym); + SHARC_REG x; - SHARC_REG r_mul, r_alu; - r_mul.f = FREG(fxm) * FREG(fym); + SHARC_REG r_alu; x.f = float(int32_t(REG(rxa))); r_alu.r = SCALB(x, rya); - CLEAR_MULTIPLIER_FLAGS(); - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - - CLEAR_ALU_FLAGS(); m_core->astat |= (r_alu.f < 0.0f) ? AN : 0; // AZ m_core->astat |= IS_FLOAT_DENORMAL_OR_ZERO(r_alu.r) ? AZ : 0; @@ -1505,9 +1581,13 @@ void adsp21062_device::compute_fmul_float_scaled(int fm, int fxm, int fym, int f /* Fm = Fxm * Fym, Ra = FIX Fxa BY Rya */ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int ra, int fxa, int rya) { + CLEAR_MULTIPLIER_FLAGS(); + CLEAR_ALU_FLAGS(); + + SHARC_REG r_mul = FMUL(fxm, fym); + int32_t alu_i; - SHARC_REG r_mul, r_alu; - r_mul.f = FREG(fxm) * FREG(fym); + SHARC_REG r_alu; r_alu.r = SCALB(m_core->r[fxa], rya); @@ -1520,13 +1600,6 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int ra, alu_i = int32_t(nearbyintf(r_alu.f)); // assume rounding mode is set to FE_TONEAREST } - CLEAR_MULTIPLIER_FLAGS(); - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - - CLEAR_ALU_FLAGS(); SET_FLAG_AN(alu_i); // AZ SET_FLAG_AZ(alu_i); @@ -1541,38 +1614,24 @@ void adsp21062_device::compute_fmul_fix_scaled(int fm, int fxm, int fym, int ra, m_core->astat |= AF; } -void adsp21062_device::compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya) +void adsp21062_device::compute_fmul_favg(int fm, int fxm, int fym, int fa, int fxa, int fya) { CLEAR_MULTIPLIER_FLAGS(); CLEAR_ALU_FLAGS(); - SHARC_REG r_mul; - r_mul.f = FREG(fxm) * FREG(fym); - - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - + SHARC_REG r_mul = FMUL(fxm, fym); SHARC_REG r_alu = FAVG(fxa, fya); FREG(fm) = r_mul.f; FREG(fa) = r_alu.f; } -void adsp21062_device::compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa) +void adsp21062_device::compute_fmul_fabs(int fm, int fxm, int fym, int fa, int fxa) { CLEAR_MULTIPLIER_FLAGS(); CLEAR_ALU_FLAGS(); - SHARC_REG r_mul; - r_mul.f = FREG(fxm) * FREG(fym); - - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - + SHARC_REG r_mul = FMUL(fxm, fym); SHARC_REG r_alu = FABS(fxa); FREG(fm) = r_mul.f; @@ -1585,14 +1644,7 @@ void adsp21062_device::compute_fmul_fmax(int fm, int fxm, int fym, int fa, int f CLEAR_MULTIPLIER_FLAGS(); CLEAR_ALU_FLAGS(); - SHARC_REG r_mul; - r_mul.f = FREG(fxm) * FREG(fym); - - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - + SHARC_REG r_mul = FMUL(fxm, fym); SHARC_REG r_alu = FMAX(fxa, fya); FREG(fm) = r_mul.f; @@ -1606,14 +1658,7 @@ void adsp21062_device::compute_fmul_fmin(int fm, int fxm, int fym, int fa, int f CLEAR_MULTIPLIER_FLAGS(); CLEAR_ALU_FLAGS(); - SHARC_REG r_mul; - r_mul.f = FREG(fxm) * FREG(fym); - - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - + SHARC_REG r_mul = FMUL(fxm, fym); SHARC_REG r_alu = FMIN(fxa, fya); FREG(fm) = r_mul.f; @@ -1627,34 +1672,13 @@ void adsp21062_device::compute_fmul_fmin(int fm, int fxm, int fym, int fa, int f /* Fm = Fxm * Fym, Fa = Fxa + Fya, Fs = Fxa - Fya */ void adsp21062_device::compute_fmul_dual_fadd_fsub(int fm, int fxm, int fym, int fa, int fs, int fxa, int fya) { - SHARC_REG r_mul, r_add, r_sub; - r_mul.f = FREG(fxm) * FREG(fym); - r_add.f = FREG(fxa) + FREG(fya); - r_sub.f = FREG(fxa) - FREG(fya); - CLEAR_MULTIPLIER_FLAGS(); - SET_FLAG_MN(r_mul.r); - /* TODO: MV flag */ - /* TODO: MU flag */ - /* TODO: MI flag */ - CLEAR_ALU_FLAGS(); - // AN - m_core->astat |= ((r_add.r < 0.0f) || (r_sub.r < 0.0f)) ? AN : 0; - // AZ - m_core->astat |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_ZERO(r_add.r) || - IS_FLOAT_DENORMAL(r_sub.r) || IS_FLOAT_ZERO(r_sub.r)) ? AZ : 0; - // AUS - m_core->stky |= (IS_FLOAT_DENORMAL(r_add.r) || IS_FLOAT_DENORMAL(r_sub.r)) ? AUS : 0; - // AI - m_core->astat |= (IS_FLOAT_NAN(REG(fxa)) || IS_FLOAT_NAN(REG(fya))) ? AI : 0; - /* TODO: AV flag */ - // AIS - if (m_core->astat & AI) m_core->stky |= AIS; + SHARC_REG r_mul = FMUL(fxm, fym); + auto [r_add, r_sub] = FADD_FSUB(fxa, fya); FREG(fm) = r_mul.f; FREG(fa) = r_add.f; FREG(fs) = r_sub.f; - m_core->astat |= AF; } diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h index 032e7edc671..6faf7ac3835 100644 --- a/src/devices/cpu/sharc/sharc.h +++ b/src/devices/cpu/sharc/sharc.h @@ -7,6 +7,8 @@ #include "cpu/drcuml.h" +#include + class sharc_disassembler; @@ -396,8 +398,12 @@ private: inline SHARC_REG FABS(int fx); inline SHARC_REG FMIN(int fx, int fy); inline SHARC_REG FMAX(int fx, int fy); + inline std::pair FADD_FSUB(int fx, int fy); inline uint32_t SCALB(SHARC_REG fx, int ry); + // Multiplier helpers + inline SHARC_REG FMUL(int fx, int fy); + // ALU fixed-point inline void compute_add(int rn, int rx, int ry); inline void compute_sub(int rn, int rx, int ry); @@ -447,11 +453,11 @@ private: inline void compute_mul_ssin(int rn, int rx, int ry); inline uint32_t compute_mrf_plus_mul_ssin(int rx, int ry); inline uint32_t compute_mrb_plus_mul_ssin(int rx, int ry); - inline void compute_fmul(int rn, int rx, int ry); + inline void compute_fmul(int fn, int fx, int fy); // Dual add/subtract inline void compute_dual_add_sub(int ra, int rs, int rx, int ry); - inline void compute_dual_fadd_fsub(int ra, int rs, int rx, int ry); + inline void compute_dual_fadd_fsub(int fa, int fs, int fx, int fy); // Fixed-Point multiply/accumulate and add, subtract or average inline void compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, int rxa, int rya); @@ -462,8 +468,8 @@ private: inline void compute_fmul_fsub(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_float_scaled(int fm, int fxm, int fym, int fa, int rxa, int rya); inline void compute_fmul_fix_scaled(int fm, int fxm, int fym, int ra, int fxa, int rya); - inline void compute_fmul_avg(int fm, int fxm, int fym, int fa, int fxa, int fya); - inline void compute_fmul_abs(int fm, int fxm, int fym, int fa, int fxa); + inline void compute_fmul_favg(int fm, int fxm, int fym, int fa, int fxa, int fya); + inline void compute_fmul_fabs(int fm, int fxm, int fym, int fa, int fxa); inline void compute_fmul_fmax(int fm, int fxm, int fym, int fa, int fxa, int fya); inline void compute_fmul_fmin(int fm, int fxm, int fym, int fa, int fxa, int fya); diff --git a/src/devices/cpu/sharc/sharcops.hxx b/src/devices/cpu/sharc/sharcops.hxx index 2cc071ccfe7..772e8488937 100644 --- a/src/devices/cpu/sharc/sharcops.hxx +++ b/src/devices/cpu/sharc/sharcops.hxx @@ -754,71 +754,51 @@ void adsp21062_device::COMPUTE(uint32_t opcode) case 0x01: compute_multi_reg_to_mr(op & 0xf, rn); break; case 0x04: /* Rm = Rxm * Rym (SSFR), Ra = Rxa + Rya */ - { compute_mul_ssfr_add(fm, fxm, fym, fa, fxa, fya); break; - } case 0x05: /* Rm = Rxm * Rym (SSFR), Ra = Rxa - Rya */ - { compute_mul_ssfr_sub(fm, fxm, fym, fa, fxa, fya); break; - } case 0x18: /* Fm = Fxm * Fym, Fa = Fxa + Fya */ - { compute_fmul_fadd(fm, fxm, fym, fa, fxa, fya); break; - } case 0x19: /* Fm = Fxm * Fym, Fa = Fxa - Fya */ - { compute_fmul_fsub(fm, fxm, fym, fa, fxa, fya); break; - } case 0x1a: /* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Rya */ - { compute_fmul_float_scaled(fm, fxm, fym, fa, fxa, fya); break; - } case 0x1b: /* Fm = Fxm * Fym, Ra = FIX Fxa BY Rya */ - { compute_fmul_fix_scaled(fm, fxm, fym, fa, fxa, fya); break; - } case 0x1c: /* Fm = Fxm * Fym, Fa = (Fxa + Fya) / 2 */ - { - compute_fmul_avg(fm, fxm, fym, fa, fxa, fya); + compute_fmul_favg(fm, fxm, fym, fa, fxa, fya); break; - } case 0x1d: /* Fm = Fxm * Fym, Fa = ABS Fxa */ - { - compute_fmul_abs(fm, fxm, fym, fa, fxa); + compute_fmul_fabs(fm, fxm, fym, fa, fxa); break; - } case 0x1e: /* Fm = Fxm * Fym, Fa = MAX(Fxa, Fya) */ - { compute_fmul_fmax(fm, fxm, fym, fa, fxa, fya); break; - } case 0x1f: /* Fm = Fxm * Fym, Fa = MIN(Fxa, Fya) */ - { compute_fmul_fmin(fm, fxm, fym, fa, fxa, fya); break; - } case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: { /* Parallel Multiplier & Dual Add/Subtract */ /* Floating-point */ - int fs = (opcode >> 16) & 0xf; + int const fs = (opcode >> 16) & 0xf; compute_fmul_dual_fadd_fsub(fm, fxm, fym, fa, fs, fxa, fya); break; } From c938f2eb4b88777e64c46170e43fb024ad90008f Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Thu, 12 Mar 2026 17:26:52 +0200 Subject: [PATCH 247/351] sega/dccons.cpp: fix devbox checker ROMs IC number [robcfg] --- src/mame/sega/dccons.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/sega/dccons.cpp b/src/mame/sega/dccons.cpp index 7c982bef270..f38d7eb0907 100644 --- a/src/mame/sega/dccons.cpp +++ b/src/mame/sega/dccons.cpp @@ -609,15 +609,15 @@ ROM_START( dcdev ) ROM_SYSTEM_BIOS(3, "0972", "Katana Set5 v0.972 (Japan)") // BOOT flash rom update from Katana SDK 1.00b2 ROM_LOAD_BIOS(3, "set5v0.972.ic507", 0x000000, 0x200000, CRC(1a2f2a91) SHA1(08df891f02cf959189bc9b7c4ac1a4e6a4475b50) ) - // 27C160 EPROM (DIP42) IC??? labeled + // 27C160 EPROM (DIP42) IC503 labeled // SET5 7676 // V0.71 98/11/13 ROM_SYSTEM_BIOS(4, "071", "Katana Set5 Checker v0.71") - ROM_LOAD_BIOS(4, "set5v0.71.bin", 0x000000, 0x200000, CRC(52d01969) SHA1(28aec4a01419d2d2a664c540bef30ea289ca0644) ) + ROM_LOAD_BIOS(4, "set5v0.71.ic503", 0x000000, 0x200000, CRC(52d01969) SHA1(28aec4a01419d2d2a664c540bef30ea289ca0644) ) // SET5 FC52 // V0.41 98/08/27 ROM_SYSTEM_BIOS(5, "041", "Katana Set5 Checker v0.41") - ROM_LOAD_BIOS(5, "set5v0.41.bin", 0x000000, 0x200000, CRC(485877bd) SHA1(dc1af1f1248ffa87d57bc5ef2ea41aac95ecfc5e) ) + ROM_LOAD_BIOS(5, "set5v0.41.ic503", 0x000000, 0x200000, CRC(485877bd) SHA1(dc1af1f1248ffa87d57bc5ef2ea41aac95ecfc5e) ) ROM_REGION64_LE(0x040000, "dcflash", ROMREGION_ERASEFF) // Dev.Boxes have empty (FF filled) flash ROM From 6c3f8f4b562a2a7bc3793c9fbb90ac4f74a2c32a Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Thu, 12 Mar 2026 16:34:38 +0100 Subject: [PATCH 248/351] connect speaker and DAC to GRiD Compass (#14814) --- src/mame/gridcomp/gridcomp.cpp | 42 ++++++++++++++++++++++++---------- 1 file changed, 30 insertions(+), 12 deletions(-) diff --git a/src/mame/gridcomp/gridcomp.cpp b/src/mame/gridcomp/gridcomp.cpp index 3f7247db63f..9ffad413e12 100644 --- a/src/mame/gridcomp/gridcomp.cpp +++ b/src/mame/gridcomp/gridcomp.cpp @@ -75,7 +75,8 @@ #include "machine/ram.h" #include "machine/tms9914.h" #include "machine/z80sio.h" -#include "sound/spkrdev.h" +#include "speaker.h" +#include "sound/dac.h" #include "emupal.h" #include "screen.h" @@ -107,7 +108,7 @@ public: , m_rtc(*this, "rtc") , m_modem(*this, "modem") , m_uart8274(*this, "uart8274") - , m_speaker(*this, "speaker") + , m_dac(*this, "dac0832") , m_ram(*this, RAM_TAG) , m_tms9914(*this, "hpib") { } @@ -131,7 +132,7 @@ private: required_device m_rtc; required_device m_modem; optional_device m_uart8274; - required_device m_speaker; + required_device m_dac; required_device m_ram; required_device m_tms9914; @@ -148,6 +149,8 @@ private: void grid_keyb_w(offs_t offset, uint16_t data); void grid_modem_w(offs_t offset, uint8_t data); + void grid_sound_w(offs_t offset, uint8_t data); + void grid_dma_w(offs_t offset, uint8_t data); uint8_t grid_dma_r(offs_t offset); @@ -228,6 +231,20 @@ void gridcomp_state::grid_modem_w(offs_t offset, uint8_t data) LOG("MDM %02x <- %02x\n", 0xdfec0 + (offset << 1), data); } +void gridcomp_state::grid_sound_w(offs_t offset, uint8_t data) +{ + if (offset & 0b01) { + LOG("VOLUME DAC <- %02x\n", data); + // Not supported. + } + + // GRiD makes sounds when writing to dfe4:2 or dfe4:4. + if (offset & 0b110) { + LOG("SOUND DAC <- %02x\n", data); + m_dac->write(data); + } +} + void gridcomp_state::grid_dma_w(offs_t offset, uint8_t data) { m_tms9914->write(7, data); @@ -287,6 +304,7 @@ IRQ_CALLBACK_MEMBER(gridcomp_state::irq_callback) void gridcomp_state::grid1101_map(address_map &map) { map.unmap_value_high(); + map(0xdfe40, 0xdfe4f).w(FUNC(gridcomp_state::grid_sound_w)); // modem controller?? map(0xdfe80, 0xdfe83).rw("i7220", FUNC(i7220_device::read), FUNC(i7220_device::write)).umask16(0x00ff); map(0xdfea0, 0xdfeaf).unmaprw(); // ?? map(0xdfec0, 0xdfecf).rw(FUNC(gridcomp_state::grid_modem_r), FUNC(gridcomp_state::grid_modem_w)).umask16(0x00ff); // incl. DTMF generator @@ -306,7 +324,7 @@ void gridcomp_state::grid1121_map(address_map &map) map(0xc0000, 0xcffff).unmaprw(); // ?? ROM slot -- signature expected: 0x4554, 0x5048 map(0xdfa00, 0xdfdff).rw(FUNC(gridcomp_state::grid_dma_r), FUNC(gridcomp_state::grid_dma_w)); // DMA map(0xdfe00, 0xdfe1f).unmaprw(); // .rw("uart8274", FUNC(i8274_device::ba_cd_r), FUNC(i8274_device::ba_cd_w)).umask16(0x00ff); - map(0xdfe40, 0xdfe4f).unmaprw(); // ?? diagnostic 8274 + map(0xdfe40, 0xdfe4f).w(FUNC(gridcomp_state::grid_sound_w)); // modem controller?? map(0xdfe80, 0xdfe83).rw("i7220", FUNC(i7220_device::read), FUNC(i7220_device::write)).umask16(0x00ff); map(0xdfea0, 0xdfeaf).unmaprw(); // ?? map(0xdfec0, 0xdfecf).rw(FUNC(gridcomp_state::grid_modem_r), FUNC(gridcomp_state::grid_modem_w)).umask16(0x00ff); // incl. DTMF generator @@ -352,8 +370,8 @@ void gridcomp_state::grid1101(machine_config &config) MM58174(config, m_rtc, 32.768_kHz_XTAL); - SPEAKER(config, "mono").front_center(); - SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 1.00); + SPEAKER(config, "speaker").front_center(); + DAC0832(config, m_dac, 0).add_route(ALL_OUTPUTS, "speaker", 1.0); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); // actually a kind of EL display screen.set_color(rgb_t::amber()); @@ -511,9 +529,9 @@ ROM_END ***************************************************************************/ // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1982, grid1101, 0, 0, grid1101, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1101", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS ) -COMP( 1982, grid1109, grid1101, 0, grid1109, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1109", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) -COMP( 1984, grid1121, 0, 0, grid1121, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1121", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) -COMP( 1984, grid1129, grid1121, 0, grid1129, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1129", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS ) -COMP( 1984, grid1131, grid1121, 0, grid1131, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1131", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) -COMP( 1984, grid1139, grid1121, 0, grid1139, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1139", MACHINE_NO_SOUND | MACHINE_IMPERFECT_CONTROLS ) +COMP( 1982, grid1101, 0, 0, grid1101, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1101", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_CONTROLS ) +COMP( 1982, grid1109, grid1101, 0, grid1109, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass 1109", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) +COMP( 1984, grid1121, 0, 0, grid1121, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1121", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) +COMP( 1984, grid1129, grid1121, 0, grid1129, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1129", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_CONTROLS ) +COMP( 1984, grid1131, grid1121, 0, grid1131, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1131", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_CONTROLS | MACHINE_NOT_WORKING ) +COMP( 1984, grid1139, grid1121, 0, grid1139, gridcomp, gridcomp_state, empty_init, "GRiD Computers", "Compass II 1139", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_CONTROLS ) From 0a903be7130186b85d5f77f11d2558c1aa20ab4d Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 16:54:05 +0100 Subject: [PATCH 249/351] lotoplay: rename sets back to lotoplay --- src/mame/gaelco/lotoplay.cpp | 30 +++++++++++++++--------------- src/mame/gridcomp/gridcomp.cpp | 1 - src/mame/mame.lst | 14 +++++++------- 3 files changed, 22 insertions(+), 23 deletions(-) diff --git a/src/mame/gaelco/lotoplay.cpp b/src/mame/gaelco/lotoplay.cpp index ac8bcf53164..fd9c9c02893 100644 --- a/src/mame/gaelco/lotoplay.cpp +++ b/src/mame/gaelco/lotoplay.cpp @@ -92,17 +92,17 @@ void lotoplay_state::lotoplay_z80(machine_config &config) // Sets with MC68705. -ROM_START(lotoply) +ROM_START(lotoplay) ROM_REGION(0x0800, "maincpu", 0) ROM_LOAD("lp_mostra_sp_ultima_68705p3s.bin", 0x0000, 0x0800, CRC(112645cd) SHA1(f2ad6b2fbec36d0bfe034d7bfb036ef6bf4ee395)) ROM_END -ROM_START(lotoplya) +ROM_START(lotoplaya) ROM_REGION(0x0800, "maincpu", 0) ROM_LOAD("lp_mostra_s_125d9_68705p3s.bin", 0x0000, 0x0800, CRC(9b77603c) SHA1(6799b930f9805332bf20c6146b044222fe49d243)) ROM_END -ROM_START(lotoplyb) +ROM_START(lotoplayb) ROM_REGION(0x0800, "maincpu", 0) ROM_LOAD("lp_vii_sch_mostra_11302_68705p3s.bin", 0x0000, 0x0800, CRC(61b426d3) SHA1(b66dc6c382a04d8cdbaee342f179ce80abfd3c71)) ROM_END @@ -110,7 +110,7 @@ ROM_END // Sets with PIC16C54. -ROM_START(lotoplyp) +ROM_START(lotoplayp) ROM_REGION(0x1fff, "maincpu", 0) ROM_LOAD("loto_play_ff46_pic16c54.bin", 0x0000, 0x1fff, CRC(8840349d) SHA1(e9dcc572c7b577618ddda06be1538be69eb15584)) ROM_END @@ -118,17 +118,17 @@ ROM_END // Sets with Z80. -ROM_START(lotoplyz) +ROM_START(lotoplayz) ROM_REGION(0x2000, "maincpu", 0) ROM_LOAD("grab._lp_sp_ultima_27c64.bin", 0x0000, 0x2000, CRC(980e14ac) SHA1(3f6dc75a8cb3fe38941b8a7900ecccdafabc14e9)) ROM_END -ROM_START(lotoplyza) +ROM_START(lotoplayza) ROM_REGION(0x2000, "maincpu", 0) ROM_LOAD("grab._lp_s_3b4c_27c64.bin", 0x0000, 0x2000, CRC(556e2c35) SHA1(612f160592fd122e5a91914618e19eade5b52c3e)) ROM_END -ROM_START(lotoplyzb) +ROM_START(lotoplayzb) ROM_REGION(0x2000, "maincpu", 0) ROM_LOAD("multn_0.0_27c64.bin", 0x0000, 0x2000, CRC(e74bce2a) SHA1(66a09f5df3a27b0c4bc964b19450734b736dc768)) ROM_END @@ -136,11 +136,11 @@ ROM_END } // anonymous namespace -// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS -GAME( 1988?, lotoply, 0, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1988?, lotoplya, lotoply, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1988?, lotoplyb, lotoply, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1990?, lotoplyp, lotoply, lotoplay_pic, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (PIC16C54)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1990?, lotoplyz, lotoply, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1990?, lotoplyza, lotoply, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) -GAME( 1990?, lotoplyzb, lotoply, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS +GAME( 1988?, lotoplay, 0, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1988?, lotoplaya, lotoplay, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1988?, lotoplayb, lotoplay, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplayp, lotoplay, lotoplay_pic, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (PIC16C54)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplayz, lotoplay, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplayza, lotoplay, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) +GAME( 1990?, lotoplayzb, lotoplay, lotoplay_z80, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (Z80, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) diff --git a/src/mame/gridcomp/gridcomp.cpp b/src/mame/gridcomp/gridcomp.cpp index 9ffad413e12..a287575a8c8 100644 --- a/src/mame/gridcomp/gridcomp.cpp +++ b/src/mame/gridcomp/gridcomp.cpp @@ -75,7 +75,6 @@ #include "machine/ram.h" #include "machine/tms9914.h" #include "machine/z80sio.h" -#include "speaker.h" #include "sound/dac.h" #include "emupal.h" diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 0d81276037b..e54ff583542 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -18933,13 +18933,13 @@ goldartpuk goldartuk @source:gaelco/lotoplay.cpp -lotoply -lotoplya -lotoplyb -lotoplyp -lotoplyz -lotoplyza -lotoplyzb +lotoplay +lotoplaya +lotoplayb +lotoplayp +lotoplayz +lotoplayza +lotoplayzb @source:gaelco/mastboy.cpp mastboy From d4d375b6a0ff618f295b18c7f489c163dd8a6d28 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Thu, 12 Mar 2026 18:15:19 +0100 Subject: [PATCH 250/351] New systems marked not working ------------------------------ Lucky Spin 1999 (Ver. A.1) [Ioannis Bampoulas] New clones marked not working ----------------------------- Bonus Spin Bonanza (V1.0G) [Ioannis Bampoulas] Tarzan (V201FA, alt encryption) [Ioannis Bampoulas] - taito/wgp.cpp: redumped bad ROM for wgp2 [Hammy] --- src/mame/astrocorp/astrcorp.cpp | 70 +++++++++++++++++++++++++++++++++ src/mame/igs/igs017.cpp | 18 +++++++++ src/mame/mame.lst | 3 ++ src/mame/misc/cb2001.cpp | 18 +++++++++ src/mame/misc/haiwei.cpp | 25 ++++++++++-- src/mame/pacman/pacman.cpp | 2 +- src/mame/taito/wgp.cpp | 4 +- 7 files changed, 133 insertions(+), 7 deletions(-) diff --git a/src/mame/astrocorp/astrcorp.cpp b/src/mame/astrocorp/astrcorp.cpp index 83e9a148890..280c06f4d1b 100644 --- a/src/mame/astrocorp/astrcorp.cpp +++ b/src/mame/astrocorp/astrcorp.cpp @@ -29,6 +29,7 @@ Happy Farm (IN.01.02B) 11 P1 ASTRO V102PX- Happy Farm (US.01.02B) 07 _P_ROHS ASTRO V102PX-008 ASTRO V07 ASTRO ROHS BA21C00009 M835KK01 Encrypted, also seen on ASTRO _P CS350P071 Keno 21 02? T-3802A ASTRO V102PX-001 ASTRO V05 ASTRO F02 2003-04-14 Encrypted Little Witch (EN.01A) 06 P1 ASTRO V102PX-016 ASTRO V07 ASTRO ROHS BA21C00009 JF13022 Encrypted +Lucky Spin 1999 99 B50-4001A MC68HC000FN16 ASTRO V01 pLSI1016-60LJ, ASTRO 0006B MCU? (28 pins) Magic Bomb (A3.0) None ASTRO V03 ASTRO V02 pLSI1016 Encrypted Magic Bomb (A3.1A) None ASTRO V03 ASTRO V02 pLSI1016 Encrypted Magic Bomb (A3.6A) None ASTRO V03 ASTRO V02 pLSI1016 Encrypted @@ -114,6 +115,7 @@ TODO: - keno21: doesn't manage to read the CPU code. bp 1160,1,{D5=0x2188;g} for now to go further. - crzcircus: needs verifying of inputs, outputs and layout. - foxyruby: needs verifying of inputs, outputs and layout. +- luckys99: needs verifying of inputs, outputs and layout creation. magibomb sets Q/A as of 18.07.2025: MAGIC BOMB\A3.0 (magibomb_a30 run protected) @@ -326,6 +328,7 @@ public: { } void luckycoin(machine_config &config) ATTR_COLD; + void luckys99(machine_config &config) ATTR_COLD; void showhandc(machine_config &config) ATTR_COLD; void showhand(machine_config &config) ATTR_COLD; void skilldrp(machine_config &config) ATTR_COLD; @@ -381,6 +384,7 @@ private: void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); void luckycoin_map(address_map &map) ATTR_COLD; + void luckys99_map(address_map &map) ATTR_COLD; void showhandc_map(address_map &map) ATTR_COLD; void showhand_map(address_map &map) ATTR_COLD; void skilldrp_map(address_map &map) ATTR_COLD; @@ -877,6 +881,23 @@ void astrocorp_state::luckycoin_map(address_map &map) map(0x600001, 0x600001).w(FUNC(astrocorp_state::oki_bank_w)); } +void astrocorp_state::luckys99_map(address_map &map) +{ + map(0x000000, 0x00ffff).rom(); + map(0x040000, 0x043fff).ram().share("nvram"); // battery + map(0x060000, 0x060fff).ram().share(m_spriteram); + map(0x062000, 0x062001).nopr().w(FUNC(astrocorp_state::draw_sprites_w)); + map(0x064000, 0x064001).portr("INPUTS"); + map(0x068001, 0x068001).w(FUNC(astrocorp_state::eeprom_w)); + map(0x06a000, 0x06a001).w(FUNC(astrocorp_state::showhandc_outputs_w)); + map(0x06e000, 0x06e001).portr("EEPROM_IN"); + map(0x070000, 0x070001).r(FUNC(astrocorp_state::unk_r)); + map(0x070000, 0x070000).w(m_oki, FUNC(okim6295_device::write)); + map(0x080000, 0x080000).w(FUNC(astrocorp_state::oki_bank_w)); // always writes 0x00 as ROM is only 0x40000 + map(0x090000, 0x090001).nopr().w(FUNC(astrocorp_state::screen_enable_w)).umask16(0x00ff); + map(0x0a0000, 0x0a01ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); +} + void astrocorp_state::speeddrp_map(address_map &map) { map(0x000000, 0x01ffff).rom(); @@ -1466,6 +1487,28 @@ static INPUT_PORTS_START( skilldrp ) PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) INPUT_PORTS_END +static INPUT_PORTS_START( luckys99 ) + PORT_INCLUDE( showhand ) + + PORT_MODIFY("INPUTS") // 64000 + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // press with memory_reset to reset settings + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All Reels / Take") + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4) + PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SLOT_STOP4 ) PORT_NAME("Stop Reel 4 / Start") + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4) + PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) + PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) PORT_NAME("Stop Reel 3 / Bet") + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) // press with keyout to reset settings + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(hopper_device::line_r)) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) +INPUT_PORTS_END + static INPUT_PORTS_START( magibomb ) PORT_INCLUDE( skilldrp ) @@ -1676,6 +1719,12 @@ void astrocorp_state::showhandc(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &astrocorp_state::showhandc_map); } +void astrocorp_state::luckys99(machine_config &config) +{ + showhand(config); + m_maincpu->set_addrmap(AS_PROGRAM, &astrocorp_state::luckys99_map); +} + TIMER_DEVICE_CALLBACK_MEMBER(astrocorp_state::irq_2_4_scanline_cb) { int scanline = param; @@ -1958,6 +2007,26 @@ void astoneag_state::astoneag(machine_config &config) ROMs Loading ***************************************************************************/ +// B50-4001A +// program ROM labels say A.3 but test mode shows A.1 +// similarly to other games, it's possible to enter a test mode with more choices by doing bpset 1230,1,{PC=1236;g} +// however none of the added choices seems to work +ROM_START( luckys99 ) + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "rom_1_lucky_a.3.even.u16", 0x00000, 0x10000, CRC(5a9a4c57) SHA1(51358f41056e59ee32b7f2e8afd58a968ff8a4ba) ) // 1xxxxxxxxxxxxxxx = 0xFF + ROM_LOAD16_BYTE( "rom_2_lucky_a.3.odd.u17", 0x00001, 0x10000, CRC(a339faae) SHA1(c4bd132f095856514cd1049acb5d69ef5e8862b7) ) // 1xxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x100000, "sprites", 0 ) + ROM_LOAD16_BYTE( "rom_4_lucky_3.1.even.u26", 0x00000, 0x80000, CRC(05547ef1) SHA1(4730fd4e5843f1eed53d64e24f04f720162ebf7f) ) + ROM_LOAD16_BYTE( "rom_3_lucky_3.1.odd.u27", 0x00001, 0x80000, CRC(87e1f125) SHA1(cd765c12a9945ddc11678cca765195c0eab464ee) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "rom_5_lucky1", 0x00000, 0x40000, CRC(2b3bece9) SHA1(421a8b9dc314a00304fc3c94f5428bde52c21531) ) + + ROM_REGION16_LE( 0x80, "eeprom", 0 ) + ROM_LOAD( "93c46.u9", 0x00, 0x80, CRC(91245bbd) SHA1(e2b677bfd45840a7bcfde6d057a396ad9fbf2d62) ) // factory default +ROM_END + /*************************************************************************** Show Hand (Italy) @@ -4550,6 +4619,7 @@ void astoneag_state::interleave_sprites_16x32() // YEAR NAME PARENT MACHINE INPUTS STATE INIT ROT COMPANY FULLNAME FLAGS LAYOUT // unencrypted +GAME( 1999, luckys99, 0, luckys99, luckys99, astrocorp_state, init_showhand, ROT0, "Astro Corp.", "Lucky Spin 1999 (Ver. A.1)", MACHINE_SUPPORTS_SAVE ) GAMEL( 2000, showhand, 0, showhand, showhand, astrocorp_state, init_showhand, ROT0, "Astro Corp.", "Show Hand (Italy)", MACHINE_SUPPORTS_SAVE, layout_showhand ) GAMEL( 2000, showhandc, showhand, showhandc, showhandc, astrocorp_state, init_showhandc, ROT0, "Astro Corp.", "Wangpai Duijue (China)", MACHINE_SUPPORTS_SAVE, layout_showhandc ) GAMEL( 2002, skilldrp, 0, skilldrp, skilldrp, astrocorp_state, empty_init, ROT0, "Astro Corp.", "Skill Drop Georgia (Ver. G1.01S, Oct 1 2002)", MACHINE_SUPPORTS_SAVE, layout_skilldrp ) // Oct 1 2002 09:42:32 diff --git a/src/mame/igs/igs017.cpp b/src/mame/igs/igs017.cpp index 847550c7033..c61bb3ea550 100644 --- a/src/mame/igs/igs017.cpp +++ b/src/mame/igs/igs017.cpp @@ -7207,6 +7207,23 @@ ROM_START( tarzan201fa ) ROM_LOAD( "tarzan201fa_string.key", 0x00, 0xec, CRC(b33f5050) SHA1(900d3c48944dbdd95d9e48d74c355e82e00ac012) ) ROM_END +ROM_START( tarzan201faa ) // IGS PCB NO-0230-1 (IGS025 stickered X7). This set uses alt encryption and the Amazonia sprite ROM. + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD( "tarzan_v-201fa.u9", 0x00000, 0x40000, CRC(f313df5a) SHA1(04883e388ee6722c3ceee74a21e6a79f73ea8b7d) ) + + ROM_REGION( 0x400000, "igs017_igs031:sprites", 0 ) + ROM_LOAD( "igs_a2107.u3", 0x000000, 0x400000, CRC(d8dadfd7) SHA1(b40a46d56ff46d91e3377be8616c3eed321f7db4) ) // FIXED BITS (xxxxxxx0xxxxxxxx) + // empty u2 socket + + ROM_REGION( 0x80000, "igs017_igs031:tilemaps", 0 ) + ROM_LOAD( "igs_t2105.u11", 0x00000, 0x80000, CRC(1d4be260) SHA1(6374c61735144b3ff54d5e490f26adac4a10b14d) ) + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "igs_s2102.u8", 0x00000, 0x80000, CRC(90dda82d) SHA1(67fbc1e8d76b85e124136e2f1df09c8b6c5a8f97) ) + + ROM_REGION( 0xec, "igs_string", 0 ) + ROM_LOAD( "tarzan201fa_string.key", 0x00, 0xec, CRC(b33f5050) SHA1(900d3c48944dbdd95d9e48d74c355e82e00ac012) ) +ROM_END ROM_START( tarzan202fa ) // IGS PCB NO-0230-1 (IGS025 stickered X7) ROM_REGION( 0x40000, "maincpu", 0 ) @@ -7492,6 +7509,7 @@ GAMEL( 1999, jking200pr, starzan, starzan, tarzan202fa, igs017_state, init GAMEL( 1999?, tarzan103m, tarzanc, starzan, tarzan103m, igs017_state, init_starzan, ROT0, "IGS", "Tarzan (V103M)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION, layout_tarzan103m ) // always gives ASIC31 error after double up game GAMEL( 1999?, tarzan106fa, tarzanc, starzan, tarzan202fa, igs017_state, init_jking103a, ROT0, "IGS", "Tarzan (V106FA)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION, layout_starzan ) GAMEL( 1999?, tarzan201fa, tarzanc, starzan, tarzan202fa, igs017_state, init_jking200pr, ROT0, "IGS", "Tarzan (V201FA)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION, layout_starzan ) +GAMEL( 1999?, tarzan201faa,tarzanc, starzan, tarzan202fa, igs017_state, init_jking103a, ROT0, "IGS", "Tarzan (V201FA, alt encryption)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION, layout_starzan ) GAMEL( 1999?, tarzan202fa, tarzanc, starzan, tarzan202fa, igs017_state, init_jking103a, ROT0, "IGS", "Tarzan (V202FA)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION, layout_starzan ) GAMEL( 2000?, happyskl, 0, happyskl, happyskl, igs017_state, init_happyskl, ROT0, "IGS", "Happy Skill (Italy, V611IT)", 0, layout_igspoker ) GAMEL( 2000?, cpoker2, 0, cpoker2, cpoker2, igs017_state, init_cpoker2, ROT0, "IGS", "Champion Poker 2 (V100A)", 0, layout_igspoker ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e54ff583542..846087ac9b5 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -1580,6 +1580,7 @@ hapfarm_in0101a hapfarm_in0102b keno21 luckycoin +luckys99 lwitch magibomb magibomb_a30 @@ -21102,6 +21103,7 @@ tarzan tarzan103m tarzan106fa tarzan201fa +tarzan201faa tarzan202fa tarzana tarzanb @@ -30240,6 +30242,7 @@ castrev @source:misc/cb2001.cpp bsbonanza +bsbonanza10 cb2001 cb4 cb4a diff --git a/src/mame/misc/cb2001.cpp b/src/mame/misc/cb2001.cpp index e0aa4f3f459..1dd769eb241 100644 --- a/src/mame/misc/cb2001.cpp +++ b/src/mame/misc/cb2001.cpp @@ -1805,6 +1805,23 @@ ROM_END ROM_START( bsbonanza ) // DYNA D9902 PCB; DYNA DYNA BSB V1.1G in bookkeeping screen. Has no DIPs and no PROMs. ROM_REGION16_LE( 0x40000, "boot_prg", ROMREGION_ERASE00 ) ROM_LOAD16_WORD( "bsb_11g.4c", 0x00000, 0x40000, CRC(6d58b5db) SHA1(ed4f44ecdd66efc433d956f4c571492affa77ff3) ) + // also seen with "DYNA CASINO HALL HIRANO OSAKA JAPAN" disclaimer text with following hash + // CRC(0ceae7c6) SHA1(2a5d216761c2057ad4c17248e872973eec765784) + // this second PCB also had 2 banks of 8 switches present + + ROM_REGION( 0x80000, "gfx", 0 ) + ROM_LOAD16_BYTE( "bsb_1d.12e", 0x00000, 0x40000, CRC(bb74f46c) SHA1(7a969df9adf28c1fa747e553b6cda99cc866ee0c) ) + // 11e not populated + ROM_LOAD16_BYTE( "bsb_3g.9e", 0x00001, 0x40000, CRC(30e2065e) SHA1(6ada4b4c2ff84f1213ced0ce3603c90d7b17c43e) ) + // 7e not populated + + ROM_REGION( 0x400, "proms", ROMREGION_ERASE00 ) + // no PROMs on PCB +ROM_END + +ROM_START( bsbonanza10 ) // DYNA D9902 PCB; DYNA DYNA BSB V1.0G in bookkeeping screen. Has no PROMs. + ROM_REGION16_LE( 0x40000, "boot_prg", ROMREGION_ERASE00 ) + ROM_LOAD16_WORD( "bsb_10g.4c", 0x00000, 0x40000, CRC(1f48ad0d) SHA1(aae8229bce307b9f3ead3f6481da11bcb914566f) ) ROM_REGION( 0x80000, "gfx", 0 ) ROM_LOAD16_BYTE( "bsb_1d.12e", 0x00000, 0x40000, CRC(bb74f46c) SHA1(7a969df9adf28c1fa747e553b6cda99cc866ee0c) ) @@ -1858,3 +1875,4 @@ GAME( 1995, crzybell, 0, scherrym, cb2001, cb2001_state, init_sm GAME( 1998, nmondop, 0, cb2001, cb2001, cb2001_state, init_smaller_proms, ROT0, "Dyna", "New Mondo Plus (V0.6I)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1996, pdouble8 , 0, scherrym, cb2001, cb2001_state, init_smaller_proms, ROT0, "Dyna & MK Electronics", "Premium Double Eight (V5.3FA)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 2001, bsbonanza, 0, scherrym, cb2001, cb2001_state, empty_init, ROT0, "Dyna", "Bonus Spin Bonanza (V1.1G)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 2001, bsbonanza10, bsbonanza, scherrym, cb2001, cb2001_state, empty_init, ROT0, "Dyna", "Bonus Spin Bonanza (V1.0G)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/misc/haiwei.cpp b/src/mame/misc/haiwei.cpp index b279ec39c72..c560b60fa4c 100644 --- a/src/mame/misc/haiwei.cpp +++ b/src/mame/misc/haiwei.cpp @@ -19,6 +19,14 @@ various jumpers bank of 8 switches reset push-button +System's promotional flyer claims: +- Supports touchscreen, mouse, keyboard and other input driver +- Supports IEEE802.2, RS232, RS485 +- Supports coin in / out, bill acceptor, printer +- Supports CF card and other storage +- Supports VGA and LCD (high-resolution) and video-games (low-resolution) + and TV (video) + TODO: - currently stops at the manufacturer logo (tight loops between two JMPs); - transmits to SIO if above is skipped; @@ -52,19 +60,28 @@ public: void init_hqdf() ATTR_COLD; +protected: + virtual void machine_start() override ATTR_COLD; + private: required_device m_maincpu; required_device m_vr0soc; + u32 m_pio = 0; + void program_map(address_map &map) ATTR_COLD; u32 pioldat_r(); void pioldat_w(offs_t offset, u32 data, u32 mem_mask = ~0); u32 pioedat_r(); - - u32 m_pio; }; + +void haiwei_state::machine_start() +{ + save_item(NAME(m_pio)); +} + u32 haiwei_state::pioldat_r() { return m_pio; @@ -223,8 +240,8 @@ ROM_END void haiwei_state::init_hqdf() // TODO: verify if it is complete (shouldn't get this far if it weren't complete, though) { - uint8_t *rom = memregion("maincpu")->base(); - std::vector buffer(0x600000); + u8 *rom = memregion("maincpu")->base(); + std::vector buffer(0x600000); memcpy(&buffer[0], rom, 0x600000); diff --git a/src/mame/pacman/pacman.cpp b/src/mame/pacman/pacman.cpp index 25f5b552712..39df34ba560 100644 --- a/src/mame/pacman/pacman.cpp +++ b/src/mame/pacman/pacman.cpp @@ -9066,7 +9066,7 @@ GAME( 1991, mspacmanbhe, mspacman, woodpek, mspacman, pacman_state, empty_ GAME( 1992, mspacmanbco, mspacman, woodpek_rbg, mspacman, pacman_state, empty_init, ROT90, "bootleg (Cocamatic)", "Come-Cocos (Ms. Pac-Man) (Cocamatic bootleg)", MACHINE_SUPPORTS_SAVE ) // this PCB have swapped Blue and Green color lines (Ms.Pac-Man sprite should be pink), no "MADE IN GREECE" text at PCB GAME( 1993, mspacmanbi, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Impeuropex)", "Ms. Pac-Man (Impeuropex bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, mspacmanbgc, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Enavi)", "Ms. Pac-Man ('Made in Greece' Enavi bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1993, mspacmanbpl, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Playmark)", "Ms. Pac-Man (Playmark bootleg)", MACHINE_SUPPORTS_SAVE ) // probably a further conversion of the mspacmanbg bootleg, still has some MS Pacman code + extra features +GAME( 1993, mspacmanbpl, mspacman, woodpek, mspacman, pacman_state, empty_init, ROT90, "bootleg (Playmark)", "Ms. Pac-Man (Playmark bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 198?, pacmansp, puckman, pacman, pacmansp, pacman_state, empty_init, ROT90, "bootleg (Video Game SA)", "Puck Man (Spanish, 'Made in Greece' bootleg)", MACHINE_SUPPORTS_SAVE ) // probably a further conversion of the mspacmanbg bootleg, still has some MS Pacman code + extra features GAME( 1992, mspactwin, 0, mspactwin, mspactwin, mspactwin_state, init_mspactwin, ROT90, "hack (Susilu)", "Ms Pac Man Twin (Argentina, set 1)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/taito/wgp.cpp b/src/mame/taito/wgp.cpp index 066a53b8402..3e93b5ab2c1 100644 --- a/src/mame/taito/wgp.cpp +++ b/src/mame/taito/wgp.cpp @@ -1919,10 +1919,10 @@ ROM_START( wgp2 ) // original Taito PCB with original Taito mask ROMs. EPROMs al ROM_REGION( 0x100000, "maincpu", 0 ) // 68000 ROM_LOAD16_BYTE( "12.12", 0x00000, 0x20000, CRC(41d0b614) SHA1(b52e397ff36c89e4e5fb15b36f744da2b840abda) ) // hand-written label ROM_LOAD16_BYTE( "13.13", 0x00001, 0x20000, CRC(131018d8) SHA1(417d46829e4443abb9a6fcde386506b0942ba71a) ) // hand-written label - ROM_LOAD16_WORD_SWAP( "c32-10.9", 0x80000, 0x80000, CRC(a44c66e9) SHA1(b5fa978e43303003969033b8096fd68885cfc202) ) /* data rom */ + ROM_LOAD16_WORD_SWAP( "c32-10.9", 0x80000, 0x80000, CRC(a44c66e9) SHA1(b5fa978e43303003969033b8096fd68885cfc202) ) // data ROM ROM_REGION( 0x40000, "sub", 0 ) // 68000 - ROM_LOAD16_BYTE( "64.64", 0x00000, 0x20000, CRC(ad3eafda) SHA1(5d500b4bee4e31f520205d02a4f7becca2ef2d3e) BAD_DUMP ) // hand-written label, this one was a bit flaky so marking as bad as precaution + ROM_LOAD16_BYTE( "64.64", 0x00000, 0x20000, CRC(1ced4a61) SHA1(89cf307b4799b46521552b0c6a15ddf4fea84b5f) ) // hand-written label ROM_LOAD16_BYTE( "63.63", 0x00001, 0x20000, CRC(73606a1e) SHA1(5a649c8909e999dd9b6bc832422f9011bcbfbe68) ) // hand-written label ROM_REGION( 0x10000, "audiocpu", 0 ) // Z80 From 66c2b94364419f27a1b2a87f794445297523c91f Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 12 Mar 2026 21:04:01 +0100 Subject: [PATCH 251/351] bbustersu: correct dipswitches, bbustersja: remove player 3 --- src/mame/mame.lst | 6 +-- src/mame/snk/bbusters.cpp | 84 ++++++++++++++++++++++++++------------- 2 files changed, 59 insertions(+), 31 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 846087ac9b5..0d0fc3bff4a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -13,9 +13,9 @@ virusa virusb virusc +viruscl virusrck virusrckxl -viruscl @source:acorn/aa310.cpp aa500 @@ -656,7 +656,6 @@ champbasja champbasjb champbb2 champbb2j -tbasebal exctscc2 exctsccr exctsccra @@ -665,6 +664,7 @@ exctsccrj exctsccrjo exctsccru talbot +tbasebal @source:alpha/equites.cpp bngotime @@ -18985,6 +18985,7 @@ nsplashkra paintlad puckpepl rebus +ringball roldfrog roldfroga splash @@ -18993,7 +18994,6 @@ splash11 splash12 splashkr splashna -ringball @source:gaelco/splash_ms.cpp splashms diff --git a/src/mame/snk/bbusters.cpp b/src/mame/snk/bbusters.cpp index 114fab322f6..a56faf236f7 100644 --- a/src/mame/snk/bbusters.cpp +++ b/src/mame/snk/bbusters.cpp @@ -54,10 +54,6 @@ . COIN6 : adds coin(s)/credit(s) for player 3 depending on "Coin B" Dip Switch . SERVICE1 : adds coin(s)/credit(s) for all players depending on "Coin A" Dip Switch - Note that I had to map COIN5 and COIN6 to SERVICE2 and SERVICE3 to be - able to use the default parametrable keys. Let me know if there is a - another (better ?) way to do so. - ---------------------------------------------------------------------------------------- RansAckeR's notes: @@ -100,9 +96,8 @@ #include "emu.h" -// src/mame #include "snk_bbusters_spr.h" -// src/devices + #include "cpu/m68000/m68000.h" #include "cpu/z80/z80.h" #include "machine/gen_latch.h" @@ -110,7 +105,7 @@ #include "machine/upd7004.h" #include "sound/ymopn.h" #include "video/bufsprite.h" -// src/emu + #include "emupal.h" #include "screen.h" #include "speaker.h" @@ -245,7 +240,6 @@ void bbusters_state::tx_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask) /******************************************************************************/ - void bbusters_state::video_start() { m_fix_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(bbusters_state::get_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); @@ -265,8 +259,6 @@ void bbusters_state::video_start() /******************************************************************************/ -/******************************************************************************/ - template void bbusters_state::mix_sprites(bitmap_ind16 &bitmap, bitmap_ind16 &srcbitmap, const rectangle &cliprect, Proc MIX) { @@ -396,19 +388,6 @@ static INPUT_PORTS_START( bbusters ) PORT_DIPSETTING( 0x06, "7 / 3" ) PORT_DIPSETTING( 0x02, "9 / 4" ) PORT_DIPSETTING( 0x00, "12 / 5" ) - /* Manual (from a different revision/region?) says: - SW1:4 SW1:5 SW1:6 - 1C_1C 1 To continue OFF OFF OFF - 2C_1C 1 To continue ON OFF OFF - 1C_2C 1 To continue OFF ON OFF - 2C_1C 2 To continue ON ON OFF - 3C_1C 1 To continue OFF OFF ON - 3C_1C 2 To continue ON OFF ON - 4C_3C 1 To continue OFF ON ON - Free Play Mode OFF OFF OFF - - SW1:7 Unused - SW1:8 Blood color: ON=green OFF=red */ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:4,5") PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) ) @@ -458,6 +437,55 @@ static INPUT_PORTS_START( bbusters ) PORT_BIT(0x3ff, 0x212, IPT_LIGHTGUN_X) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_MINMAX(0x14e, 0x33e) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(3) INPUT_PORTS_END +static INPUT_PORTS_START( bbustersu ) + PORT_INCLUDE( bbusters ) + + PORT_MODIFY("COINS") + PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("DSW1") + PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,5,6") + PORT_DIPSETTING( 0x10, "3 Coins/1 Credit 2/1" ) + PORT_DIPSETTING( 0x18, "3 Coins/1 Credit 1/1" ) + PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x30, "2 Coins/1 Credit 1/1" ) + PORT_DIPSETTING( 0x08, "4 Coins/3 Credits 1/1" ) + PORT_DIPSETTING( 0x38, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x28, "1 Coin/2 Credits 1/1" ) + PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) + PORT_DIPNAME( 0x40, 0x40, "Blood Color" ) PORT_DIPLOCATION("SW1:7") + PORT_DIPSETTING( 0x00, "Green" ) + PORT_DIPSETTING( 0x40, "Red" ) + PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) + + PORT_MODIFY("DSW2") + PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2") + PORT_DIPSETTING( 0x01, DEF_STR( Easy ) ) + PORT_DIPSETTING( 0x00, DEF_STR( Normal ) ) + PORT_DIPSETTING( 0x03, DEF_STR( Hard ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Hardest ) ) +INPUT_PORTS_END + +static INPUT_PORTS_START( bbustersja ) + PORT_INCLUDE( bbusters ) + + PORT_MODIFY("DSW1") + PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) + + // remove player 3 + PORT_MODIFY("IN1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("COINS") + PORT_BIT( 0x3c, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_MODIFY("GUNY3") + PORT_BIT(0x3ff, 0x000, IPT_UNUSED) + + PORT_MODIFY("GUNX3") + PORT_BIT(0x3ff, 0x000, IPT_UNUSED) +INPUT_PORTS_END + /******************************************************************************/ static GFXDECODE_START( gfx_bbusters ) @@ -766,8 +794,8 @@ ROM_END /******************************************************************************/ -GAME( 1989, bbusters, 0, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (World)", MACHINE_SUPPORTS_SAVE ) -GAME( 1989, bbustersu, bbusters, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (US, Version 3)", MACHINE_SUPPORTS_SAVE ) -GAME( 1989, bbustersua, bbusters, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (US, Version 2)", MACHINE_SUPPORTS_SAVE ) -GAME( 1989, bbustersj, bbusters, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (Japan, Version 2, 3 Player)", MACHINE_SUPPORTS_SAVE ) -GAME( 1989, bbustersja, bbusters, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (Japan, Version 2, 2 Player)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, bbusters, 0, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (World)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, bbustersu, bbusters, bbusters, bbustersu, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (US, Version 3)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, bbustersua, bbusters, bbusters, bbustersu, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (US, Version 2)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, bbustersj, bbusters, bbusters, bbusters, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (Japan, Version 2, 3 Player)", MACHINE_SUPPORTS_SAVE ) +GAME( 1989, bbustersja, bbusters, bbusters, bbustersja, bbusters_state, empty_init, ROT0, "SNK", "Beast Busters (Japan, Version 2, 2 Player)", MACHINE_SUPPORTS_SAVE ) From 45bb673d6c3103e0c8a173ebe3f4a9ab940fbb30 Mon Sep 17 00:00:00 2001 From: Ryan Holtz Date: Fri, 13 Mar 2026 01:52:07 +0100 Subject: [PATCH 252/351] -namcos23.cpp: Fix incorrect shift in color mode. Fixes several incorrectly-textured things. [Ryan Holtz] MAME Testers bugs fixed ----------------------- - 09403: [Color/Palette] (namco/namcos23.cpp) motoxgo: Shinzo Pilot looks wrong on newer MAME versions. (Ryan Holtz) --- src/mame/namco/namcos23.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp index e75f3f388e2..6426e7e048d 100644 --- a/src/mame/namco/namcos23.cpp +++ b/src/mame/namco/namcos23.cpp @@ -4048,7 +4048,7 @@ void namcos23_state::render_model(const namcos23_render_entry *re) u32 type = data[offs++]; u32 h = data[offs++]; - u32 cmode = (type & 0x70000000) >> 29; + u32 cmode = (type & 0x70000000) >> 28; u32 tbase = (((type & 0x0f000000) >> 24) << 12) | (BIT(type, 31) << 16); u8 color = (h >> 24) & 0x7f; int lmode = (type >> 19) & 3; From 3ed76b8eda30134c4076ef9827562a1545ecac15 Mon Sep 17 00:00:00 2001 From: cam900 Date: Fri, 13 Mar 2026 23:53:09 +0900 Subject: [PATCH 253/351] video/x1_020_dx_101.cpp: Refactored Allumer X1-020/NEC DX-101 as a device. (#15093) * video/x1_020_dx_101.cpp (former seta/seta2_v.cpp): Minor optimisation, reduced duplication, expanded notes. * namco/funcube.cpp, namco/funcube_touchscreen.cpp: Moved Funcube hardware emulation out of seta/seta2.cpp. * namco/namcoeva.cpp: Moved to the namco project from the seta project, removed dependency on seta/seta2.cpp. * seta/seta2.cpp: Consolidated into a single file, reduced literal tags, and cleaned up code, updated notes. --- scripts/src/video.lua | 12 + .../video/x1_020_dx_101.cpp} | 332 ++--- src/devices/video/x1_020_dx_101.h | 67 + src/mame/mame.lst | 18 +- src/mame/namco/funcube.cpp | 675 ++++++++++ src/mame/namco/funcube_touchscreen.cpp | 92 ++ src/mame/namco/funcube_touchscreen.h | 47 + src/mame/{seta => namco}/namcoeva.cpp | 67 +- src/mame/seta/seta2.cpp | 1081 +++++------------ src/mame/seta/seta2.h | 260 ---- 10 files changed, 1414 insertions(+), 1237 deletions(-) rename src/{mame/seta/seta2_v.cpp => devices/video/x1_020_dx_101.cpp} (78%) create mode 100644 src/devices/video/x1_020_dx_101.h create mode 100644 src/mame/namco/funcube.cpp create mode 100644 src/mame/namco/funcube_touchscreen.cpp create mode 100644 src/mame/namco/funcube_touchscreen.h rename src/mame/{seta => namco}/namcoeva.cpp (93%) delete mode 100644 src/mame/seta/seta2.h diff --git a/scripts/src/video.lua b/scripts/src/video.lua index fa1407d1f89..95df66ae38e 100644 --- a/scripts/src/video.lua +++ b/scripts/src/video.lua @@ -1830,6 +1830,18 @@ if VIDEOS["X1_001"] then } end +-------------------------------------------------- +-- +--@src/devices/video/x1_020_dx_101.h,VIDEOS["X1_020_DX_101"] = true +-------------------------------------------------- + +if VIDEOS["X1_020_DX_101"] then + files { + MAME_DIR .. "src/devices/video/x1_020_dx_101.cpp", + MAME_DIR .. "src/devices/video/x1_020_dx_101.h", + } +end + -------------------------------------------------- -- --@src/devices/video/zeus2.h,VIDEOS["ZEUS2"] = true diff --git a/src/mame/seta/seta2_v.cpp b/src/devices/video/x1_020_dx_101.cpp similarity index 78% rename from src/mame/seta/seta2_v.cpp rename to src/devices/video/x1_020_dx_101.cpp index 59c5927adb0..098efda5046 100644 --- a/src/mame/seta/seta2_v.cpp +++ b/src/devices/video/x1_020_dx_101.cpp @@ -2,10 +2,30 @@ // copyright-holders:Luca Elia, David Haywood /*************************************************************************** - -= Newer Seta Hardware =- + Allumer X1-020/NEC DX-101 Video controller - driver by Luca Elia (l.elia@tin.it) + Video controller hardware with sprite generator + features: + - "floating tilemap" feature + - full screen zoom/shrink support + - raster interrupt + - Shadow support + - Shift/masking pixel data for support variable bpp + + used by: + - namco/namcoeva.cpp + - namco/funcube.cpp + - seta/seta2.cpp + + TODO: + - improvements to Flip screen / Zooming support. (Flip Screen is often done with 'negative zoom value') + - Fix some graphics imperfections (e.g. color depth selection, "tilemap" sprites) [all done? - NS] + - I added a kludge involving a -0x10 yoffset, this fixes the lifeline in myangel. + I didn't find a better way to do it without breaking pzlbowl's title screen. + - Background color is not verified + +-- Original docs from seta/seta2_v.cpp: This hardware only generates sprites. But they're of various types, including some large "floating tilemap" ones. @@ -70,7 +90,19 @@ ---- ---8 7654 3210 "Tilemap" scroll Y - Shadows (same principle as ssv.cpp): + Each tile in "Tilemap": + + 0.w fedc ba98 765- ---- Color code (16 color steps) + ---- ---- ---4 ---- Flip X + ---- ---- ---- 3--- Flip Y + ---- ---- ---- -210 Code (high bits) + + 2.w Code (low bits)* + + * lowest 2 bits are ignored when tile size is 16x16 + + + Shadows (same principle as seta/ssv.cpp): The low bits of the pens from a "shadowing" tile (regardless of color code) substitute the top bits of the color index (0-7fff) in the frame buffer. @@ -87,7 +119,7 @@ ***************************************************************************/ #include "emu.h" -#include "seta2.h" +#include "x1_020_dx_101.h" #define LOG_VREG (1U << 1) #define LOG_VIDEO (1U << 2) @@ -105,14 +137,68 @@ #define LOGOFFSET(...) LOGMASKED(LOG_OFFSET, __VA_ARGS__) +static const gfx_layout tile_layout = +{ + 8,8, + RGN_FRAC(1,1), + 8, + { STEP8(7*8, -8) }, + { STEP8(0, 1) }, + { STEP8(0, 8*8) }, + 8*8*8 +}; + + +/* Tiles are 8bpp, but the hardware is additionally able to discard + some bitplanes and use the low 4 bits only, or the high 4 bits only */ +GFXDECODE_START( x1_020_dx_101_device::gfxinfo ) + GFXDECODE_DEVICE( DEVICE_SELF, 0, tile_layout, 0, 0x8000/16 ) // 8bpp, but 4bpp color granularity +GFXDECODE_END + +DEFINE_DEVICE_TYPE(X1_020_DX_101, x1_020_dx_101_device, "x1_020_dx_101", "Allumer X1-020/NEC DX-101 Video") + +x1_020_dx_101_device::x1_020_dx_101_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, X1_020_DX_101, tag, owner, clock) + , device_gfx_interface(mconfig, *this) + , device_video_interface(mconfig, *this) + , m_raster_irq_cb(*this) + , m_flip_screen_cb(*this) + , m_flip_screen_x_cb(*this) + , m_flip_screen_y_cb(*this) + , m_spriteram(*this, "spriteram", 0x40000, ENDIANNESS_BIG) + , m_vregs(*this, "vregs", 0x40, ENDIANNESS_BIG) +{ +} + +void x1_020_dx_101_device::device_start() +{ + decode_gfx(gfxinfo); + gfx(0)->set_granularity(16); + + m_private_spriteram = make_unique_clear(0x1000 / 2); + + m_realtilenumber = std::make_unique(0x80000); + + for (int i = 0; i < 0x80000; i++) + m_realtilenumber[i] = i % gfx(0)->elements(); + + m_raster_timer = timer_alloc(FUNC(x1_020_dx_101_device::raster_timer_done), this); + + save_pointer(NAME(m_private_spriteram), 0x1000 / 2); +} + +void x1_020_dx_101_device::device_reset() +{ +} + /*************************************************************************** Video Registers Offset: Bits: Value: - 0/2/4/6 Horizontal: Sync, Blank, DSPdot, Cycle (same as ssv.cpp?) - 8/a/c/e Vertical : Sync, Blank, DSPdot, Cycle (same as ssv.cpp?) + 0/2/4/6 Horizontal: Sync, Blank, DSPdot, Cycle (same as seta/ssv.cpp?) + 8/a/c/e Vertical : Sync, Blank, DSPdot, Cycle (same as seta/ssv.cpp?) 10 Offxet X low bits (sub pixels) 12 Offset X high bits (pixels) @@ -165,12 +251,12 @@ ***************************************************************************/ -uint16_t seta2_state::vregs_r(offs_t offset) +uint16_t x1_020_dx_101_device::vregs_r(offs_t offset) { return m_vregs[offset]; } -void seta2_state::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void x1_020_dx_101_device::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) { /* 02/04 = horizontal display start/end mj4simai = 0065/01E5 (0180 visible area) @@ -191,7 +277,7 @@ void seta2_state::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) COMBINE_DATA(&m_vregs[offset]); if (m_vregs[offset] != olddata) - LOGVREG("CPU #0 PC %06X: Video Reg %02X <- %04X\n", m_maincpu->pc(), offset * 2, data); + LOGVREG("%s: Video Reg %02X <- %04X\n", machine().describe_context(), offset * 2, data); switch (offset * 2) { @@ -200,20 +286,20 @@ void seta2_state::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) break; case 0x1c: // FLIP SCREEN (myangel) <- this is actually zoom - flip_screen_set(BIT(data, 0)); - if (data & ~1) LOGVREG("CPU #0 PC %06X: flip screen unknown bits %04X\n", m_maincpu->pc(), data); + m_flip_screen_cb(BIT(data, 0)); + if (data & ~1) LOGVREG("%s: flip screen unknown bits %04X\n", machine().describe_context(), data); break; case 0x2a: // FLIP X (pzlbowl) - flip_screen_x_set(BIT(data, 0)); - if (data & ~1) LOGVREG("CPU #0 PC %06X: flipx unknown bits %04X\n", m_maincpu->pc(), data); + m_flip_screen_x_cb(BIT(data, 0)); + if (data & ~1) LOGVREG("%s: flipx unknown bits %04X\n", machine().describe_context(), data); break; case 0x2c: // FLIP Y (pzlbowl) - flip_screen_y_set(BIT(data, 0)); - if (data & ~1) LOGVREG("CPU #0 PC %06X: flipy unknown bits %04X\n", m_maincpu->pc(), data); + m_flip_screen_y_cb(BIT(data, 0)); + if (data & ~1) LOGVREG("%s: flipy unknown bits %04X\n", machine().describe_context(), data); break; case 0x30: // BLANK SCREEN (pzlbowl, myangel) - if (data & ~1) LOGVREG("CPU #0 PC %06X: blank unknown bits %04X\n", m_maincpu->pc(), data); + if (data & ~1) LOGVREG("%s: blank unknown bits %04X\n", machine().describe_context(), data); break; case 0x24: // funcube3 and staraudi write here instead, why? mirror or different meaning? @@ -267,7 +353,7 @@ void seta2_state::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) break; case 0x3c: // Raster IRQ related - //LOGVREG("%s: Register 3c write (raster enable?) current vpos is %d : %04X (%04x)\n",machine().describe_context(),m_screen->vpos(), data, mem_mask); + //LOGVREG("%s: Register 3c write (raster enable?) current vpos is %d : %04X (%04x)\n",machine().describe_context(),screen().vpos(), data, mem_mask); COMBINE_DATA(&m_rasterenabled); //if (BIT(m_rasterenabled, 0)) @@ -277,9 +363,9 @@ void seta2_state::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) // in the vblank it specifies line 0, the first raster interrupt then specifies line 0 again before the subsequent ones use the real line numbers? // It seems more likely that the raster IRQ stays asserted for the entire line, thus triggering a second interrupt unless the line number is changed? - if (m_rasterposition == m_screen->vpos()) hpos = m_screen->hpos() + 0x100; + if (m_rasterposition == screen().vpos()) hpos = screen().hpos() + 0x100; //LOGVREG("setting raster to %d %d\n", vpos, hpos); - m_raster_timer->adjust(m_screen->time_until_pos(vpos, hpos), 0); + m_raster_timer->adjust(screen().time_until_pos(vpos, hpos), 0); } break; @@ -290,12 +376,12 @@ void seta2_state::vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) } } -uint16_t seta2_state::spriteram_r(offs_t offset) +uint16_t x1_020_dx_101_device::spriteram_r(offs_t offset) { return m_spriteram[offset]; } -void seta2_state::spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void x1_020_dx_101_device::spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_spriteram[offset]); } @@ -308,7 +394,38 @@ void seta2_state::spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask) ***************************************************************************/ -inline void seta2_state::drawgfx_line( +static inline void draw_pixel( + uint16_t *const dest, + const uint8_t *const source, + uint32_t realcolor, + int sx, + int minx, + int maxx, + int column, + int shadow, + int gfx_mask, + int gfx_shift, + bool opaque) +{ + if (sx >= minx && sx < maxx) + { + const int realsx = sx >> 16; + const uint8_t pen = (source[column] & gfx_mask) >> gfx_shift; + if (pen || opaque) + { + if (!shadow) + dest[realsx] = (realcolor + pen) & 0x7fff; + else + { + const int pen_shift = 15 - shadow; + const int pen_mask = (1 << pen_shift) - 1; + dest[realsx] = ((dest[realsx] & pen_mask) | (pen << pen_shift)) & 0x7fff; + } + } + } +} + +inline void x1_020_dx_101_device::drawgfx_line( bitmap_ind16 &bitmap, const rectangle &cliprect, int which_gfx, @@ -330,7 +447,7 @@ inline void seta2_state::drawgfx_line( int shadow; }; - // this is the same logic as ssv.cpp, although this has more known cases, but also some bugs with the handling + // this is the same logic as seta/ssv.cpp, although this has more known cases, but also some bugs with the handling static constexpr drawmodes BPP_MASK_TABLE[8] = { { 0xff, 0, 4 }, // 0: ultrax, twineag2 text - is there a local / global mixup somewhere, or is this an 'invalid' setting that just enables all planes? { 0x30, 4, 2 }, // 1: unverified case, mimic old driver behavior of only using lowest bit (myangel2 question bubble, myangel endgame) @@ -342,9 +459,9 @@ inline void seta2_state::drawgfx_line( { 0xff, 0, 8 }, // 7: common 8bpp case }; - int shadow = BPP_MASK_TABLE[(which_gfx & 0x0700) >> 8].shadow; - const int gfx_mask = BPP_MASK_TABLE[(which_gfx & 0x0700) >> 8].gfx_mask; - const int gfx_shift = BPP_MASK_TABLE[(which_gfx & 0x0700) >> 8].gfx_shift; + int shadow = BPP_MASK_TABLE[which_gfx].shadow; + const int gfx_mask = BPP_MASK_TABLE[which_gfx].gfx_mask; + const int gfx_shift = BPP_MASK_TABLE[which_gfx].gfx_shift; if (!use_shadow) shadow = 0; @@ -354,82 +471,47 @@ inline void seta2_state::drawgfx_line( const int minx = cliprect.min_x << 16; const int maxx = (cliprect.max_x + 1) << 16; + if (flipy) + line = 7 - line; + + const uint8_t* const source = addr + line * 8; + if (xzoom < 0x10000) // shrink { const int x0 = flipx ? (base_sx + (8 * xzoom) - xzoom) : (base_sx); const int x1 = flipx ? (base_sx - xzoom) : (x0 + (8 * xzoom)); const int dx = flipx ? (-xzoom) : (xzoom); - const uint8_t* const source = flipy ? addr + (7 - line) * 8 : addr + line * 8; - int column = 0; - - for (int sx = x0; sx != x1; sx += dx) + for (int sx = x0, column = 0; sx != x1; sx += dx, column++) { - const uint8_t pen = (source[column++] & gfx_mask) >> gfx_shift; - - if (sx >= minx && sx < maxx) - { - const int realsx = sx >> 16; - - if (pen || opaque) - { - if (!shadow) - dest[realsx] = (realcolor + pen) & 0x7fff; - else - { - const int pen_shift = 15 - shadow; - const int pen_mask = (1 << pen_shift) - 1; - dest[realsx] = ((dest[realsx] & pen_mask) | (pen << pen_shift)) & 0x7fff; - } - } - } + draw_pixel(dest, source, realcolor, sx, minx, maxx, column, shadow, gfx_mask, gfx_shift, opaque); } } else // enlarge or no zoom { - const uint8_t* const source = flipy ? addr + (7 - line) * 8 : addr + line * 8; - const int x0 = (base_sx); const int x1 = (x0 + (8 * xzoom)); - int column; + int column, column_inc; if (!flipx) + { column = 0; + column_inc = 1; + } else + { column = 7; + column_inc = -1; + } uint32_t countx = 0; for (int sx = x0; sx < x1; sx += 0x10000) { - const uint8_t pen = (source[column] & gfx_mask) >> gfx_shift; - - if (sx >= minx && sx < maxx) - { - const int realsx = sx >> 16; - - if (pen || opaque) - { - if (!shadow) - { - dest[realsx] = (realcolor + pen) & 0x7fff; - } - else - { - const int pen_shift = 15 - shadow; - const int pen_mask = (1 << pen_shift) - 1; - dest[realsx] = ((dest[realsx] & pen_mask) | (pen << pen_shift)) & 0x7fff; - } - } - } - + draw_pixel(dest, source, realcolor, sx, minx, maxx, column, shadow, gfx_mask, gfx_shift, opaque); countx += 0x10000; if (countx >= xzoom) { - if (!flipx) - column++; - else - column--; - + column += column_inc; countx -= xzoom; } } @@ -438,7 +520,7 @@ inline void seta2_state::drawgfx_line( // takes an x/y pixel position in the virtual tilemap and returns the code + attributes etc. for it -inline void seta2_state::get_tile( +inline void x1_020_dx_101_device::get_tile( uint16_t const *const spriteram, bool is_16x16, int x, @@ -490,7 +572,7 @@ inline void seta2_state::get_tile( } } -int seta2_state::calculate_global_xoffset(bool nozoom_fixedpalette_fixedposition) +int x1_020_dx_101_device::calculate_global_xoffset(bool nozoom_fixedpalette_fixedposition) { /* int global_xoffset = (m_vregs[0x12/2] & 0x7ff); // and 0x10/2 for low bits @@ -518,7 +600,7 @@ int seta2_state::calculate_global_xoffset(bool nozoom_fixedpalette_fixedposition return global_xoffset; } -int seta2_state::calculate_global_yoffset(bool nozoom_fixedpalette_fixedposition) +int x1_020_dx_101_device::calculate_global_yoffset(bool nozoom_fixedpalette_fixedposition) { // Sprites list //int global_yoffset = (m_vregs[0x1a / 2] & 0x7ff); // and 0x18/2 for low bits @@ -535,7 +617,7 @@ int seta2_state::calculate_global_yoffset(bool nozoom_fixedpalette_fixedposition } -void seta2_state::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int scanline, int realscanline, int xoffset, uint32_t xzoom, bool xzoominverted) +void x1_020_dx_101_device::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int scanline, int realscanline, int xoffset, uint32_t xzoom, bool xzoominverted) { const uint16_t *s1 = m_private_spriteram.get(); @@ -561,7 +643,7 @@ void seta2_state::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &clipr const bool opaque = BIT(num, 13); const bool use_global_size = BIT(num, 12); bool use_shadow = BIT(num, 11); - const int which_gfx = num & 0x0700; + const int which_gfx = (num & 0x0700) >> 8; xoffs &= 0x3ff; yoffs &= 0x3ff; @@ -694,7 +776,7 @@ void seta2_state::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &clipr drawgfx_line( bitmap, cliprect, which_gfx, - m_spritegfx->get_data(m_realtilenumber[code]), + gfx(0)->get_data(m_realtilenumber[code]), color << 4, flipx, flipy, realsx, @@ -764,8 +846,6 @@ void seta2_state::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &clipr sx = (sx & 0x1ff) - (sx & 0x200); sx -= global_xoffset; - const int basecode = code &= ~((sizex + 1) * (sizey + 1) - 1); // see myangel, myangel2 and grdians - int line = usedscanline - firstline; const int y = (line >> 3); line &= 0x7; @@ -776,24 +856,29 @@ void seta2_state::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &clipr color = 0x7ff; } + // see myangel, myangel2 and grdians + int basecode = (code &= ~((sizex + 1) * (sizey + 1) - 1)) + + ((flipy ? sizey - y : y) * (sizex + 1)) + (flipx ? sizex : 0); + + const int code_inc = flipx ? -1 : 1; + for (int x = 0; x <= sizex; x++) { - const int realcode = (basecode + (flipy ? sizey - y : y)*(sizex + 1)) + (flipx ? sizex - x : x); uint32_t realsx = (sx + x * 8); realsx -= usedxoffset >> 16; // need to refactor, this causes loss of lower 16 bits of offset which are important in zoomed cases for precision realsx = realsx * usedxzoom; drawgfx_line( bitmap, cliprect, which_gfx, - m_spritegfx->get_data(m_realtilenumber[realcode]), + gfx(0)->get_data(m_realtilenumber[basecode]), color << 4, flipx, flipy, realsx, usedxzoom, use_shadow, realscanline, line, opaque); + basecode += code_inc; } - } } } @@ -802,22 +887,21 @@ void seta2_state::draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &clipr } -TIMER_CALLBACK_MEMBER(seta2_state::raster_timer_done) +TIMER_CALLBACK_MEMBER(x1_020_dx_101_device::raster_timer_done) { - auto *tmp68301 = dynamic_cast(m_maincpu.target()); - if (tmp68301) + if (!m_raster_irq_cb.isunset()) { if (BIT(m_rasterenabled, 0)) { - tmp68301->set_input_line(1, HOLD_LINE); - LOGVIDEO("external int (vpos is %d)\n", m_screen->vpos()); - m_screen->update_partial(m_screen->vpos() - 1); + LOGVIDEO("external int (vpos is %d)\n", screen().vpos()); + screen().update_partial(screen().vpos() - 1); + m_raster_irq_cb(ASSERT_LINE); } } } -void seta2_state::draw_sprites(bitmap_ind16& bitmap, const rectangle& cliprect) +void x1_020_dx_101_device::draw_sprites(bitmap_ind16& bitmap, const rectangle& cliprect) { //LOGOFFSET("yoffset: %04x%04x yzoom: %04x%04x | xoffset: %04x%04x xzoom: %04x%04x \n", m_vregs[0x1a/2], m_vregs[0x18/2], m_vregs[0x1e/2], m_vregs[0x1c/2] , m_vregs[0x12/2], m_vregs[0x10/2], m_vregs[0x16/2], m_vregs[0x14/2]); @@ -889,36 +973,10 @@ void seta2_state::draw_sprites(bitmap_ind16& bitmap, const rectangle& cliprect) } -/*************************************************************************** - - - Screen Drawing - - -***************************************************************************/ - -void seta2_state::video_start() -{ - for (int i = 0; m_gfxdecode->gfx(i); ++i) - m_gfxdecode->gfx(i)->set_granularity(16); - - m_private_spriteram = make_unique_clear(0x1000 / 2); - - m_realtilenumber = std::make_unique(0x80000); - - m_spritegfx = m_gfxdecode->gfx(0); - for (int i = 0; i < 0x80000; i++) - m_realtilenumber[i] = i % m_spritegfx->elements(); - - m_raster_timer = timer_alloc(FUNC(seta2_state::raster_timer_done), this); - - save_pointer(NAME(m_private_spriteram), 0x1000 / 2); -} - -uint32_t seta2_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +uint32_t x1_020_dx_101_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { // Black or pen 0? - bitmap.fill(m_palette->pen(0), cliprect); + bitmap.fill(palette().pen(0), cliprect); if (BIT(~m_vregs[0x30/2], 0)) // 1 = BLANK SCREEN draw_sprites(bitmap, cliprect); @@ -926,33 +984,7 @@ uint32_t seta2_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, return 0; } -void seta2_state::screen_vblank(int state) +void x1_020_dx_101_device::screen_vblank(int state) { //LOGVIDEO("yoffset: %04x%04x yzoom: %04x%04x | xoffset: %04x%04x xzoom: %04x%04x \n", m_vregs[0x1a/2], m_vregs[0x18/2], m_vregs[0x1e/2], m_vregs[0x1c/2], m_vregs[0x12/2], m_vregs[0x10/2], m_vregs[0x16/2], m_vregs[0x14/2]); } - -// staraudi -void staraudi_state::draw_rgbram(bitmap_ind16 &bitmap) -{ - if (!(m_cam & 0x0008)) - return; - - for (int y = 0x100; y < 0x200; ++y) - { - for (int x = 0; x < 0x200; ++x) - { - const int offs = x * 2/2 + y * 0x400/2; - const uint32_t data = ((m_rgbram[offs + 0x40000/2] & 0xff) << 16) | m_rgbram[offs]; - bitmap.pix(y, x) = (data & 0x7fff); - } - } -} - -uint32_t staraudi_state::staraudi_screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) -{ - screen_update(screen, bitmap, cliprect); - if (false) - draw_rgbram(bitmap); - - return 0; -} diff --git a/src/devices/video/x1_020_dx_101.h b/src/devices/video/x1_020_dx_101.h new file mode 100644 index 00000000000..67d533a231a --- /dev/null +++ b/src/devices/video/x1_020_dx_101.h @@ -0,0 +1,67 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia, David Haywood +#ifndef MAME_VIDEO_X1_020_DX_101_H +#define MAME_VIDEO_X1_020_DX_101_H + +#pragma once + +#include "screen.h" + +class x1_020_dx_101_device : public device_t, public device_gfx_interface, public device_video_interface +{ +public: + x1_020_dx_101_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + // configurations + auto raster_irq_callback() { return m_raster_irq_cb.bind(); } + auto flip_screen_callback() { return m_flip_screen_cb.bind(); } + auto flip_screen_x_callback() { return m_flip_screen_x_cb.bind(); } + auto flip_screen_y_callback() { return m_flip_screen_y_cb.bind(); } + + void vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + uint16_t vregs_r(offs_t offset); + uint16_t spriteram_r(offs_t offset); + void spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void screen_vblank(int state); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + +private: + int calculate_global_xoffset(bool nozoom_fixedpalette_fixedposition); + int calculate_global_yoffset(bool nozoom_fixedpalette_fixedposition); + void draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int scanline, int realscanline, int xoffset, uint32_t xzoom, bool xzoominverted); + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); + + void drawgfx_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int gfx, uint8_t const *const addr, uint32_t realcolor, bool flipx, bool flipy, int base_sx, uint32_t xzoom, bool shadow, int screenline, int line, bool opaque); + inline void get_tile(uint16_t const *spriteram, bool is_16x16, int x, int y, int page, int &code, int &attr, bool &flipx, bool &flipy, int &color); + + TIMER_CALLBACK_MEMBER(raster_timer_done); + + DECLARE_GFXDECODE_MEMBER(gfxinfo); + + // configuration + devcb_write_line m_raster_irq_cb; + devcb_write_line m_flip_screen_cb; + devcb_write_line m_flip_screen_x_cb; + devcb_write_line m_flip_screen_y_cb; + + // memory pointers + memory_share_creator m_spriteram; + memory_share_creator m_vregs; + + // live state + std::unique_ptr m_private_spriteram; + std::unique_ptr m_realtilenumber; + + uint16_t m_rasterposition = 0; + uint16_t m_rasterenabled = 0; + emu_timer *m_raster_timer = nullptr; +}; + +DECLARE_DEVICE_TYPE(X1_020_DX_101, x1_020_dx_101_device) + +#endif // MAME_VIDEO_X1_020_DX_101_H diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 0d0fc3bff4a..5201f7b8028 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -34176,6 +34176,13 @@ ds5000 @source:namco/ds6000.cpp ds6000 +@source:namco/funcube.cpp +funcube +funcube2 +funcube3 +funcube4 +funcube5 + @source:namco/gal3.cpp gal3 @@ -34246,6 +34253,9 @@ todruaga todruagao todruagas +@source:namco/namcoeva.cpp +hammerch + @source:namco/namcofl.cpp finalapr finalapr1 @@ -43115,9 +43125,6 @@ macsbios yujan yuka -@source:seta/namcoeva.cpp -hammerch - @source:seta/rmhaihai.cpp rmhaihai rmhaihai2 @@ -43210,11 +43217,6 @@ deerhuntj endrichs endrichsa endrichsb -funcube -funcube2 -funcube3 -funcube4 -funcube5 grdians grdiansa grdiansbl diff --git a/src/mame/namco/funcube.cpp b/src/mame/namco/funcube.cpp new file mode 100644 index 00000000000..e72933af04e --- /dev/null +++ b/src/mame/namco/funcube.cpp @@ -0,0 +1,675 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia, David Haywood +/*************************************************************************** + + -= Funcube series Hardware =- + + driver by Luca Elia (l.elia@tin.it) + + +CPU : TMP68301* or ColdFire + H8/3007 + PIC12C508 + +Video : DX-101 + +Sound : OKI M9810 + +OSC : 50.00000MHz + 14.74560MHz + 25.44700MHz (for Funcube 2 onward) + +* The Toshiba TMP68301 is a 68HC000 + serial I/O, parallel I/O, + 3 timers, address decoder, wait generator, interrupt controller, + all integrated in a single chip. + +------------------------------------------------------------------------------------------- +Ordered by Board Year Game By +------------------------------------------------------------------------------------------- +P0-140B 2000 Funcube Namco +B0-006B 2001-2 Funcube 2 - 5 Namco +------------------------------------------------------------------------------------------- + +TODO: + +- Proper emulation of the Touchscreen device. +- Hacked to run, as they use a ColdFire CPU. +- Pay-out key causes "unknown error" after coin count reaches 0. + +***************************************************************************/ + +#include "emu.h" + +#include "funcube_touchscreen.h" + +#include "cpu/m68000/mcf5206e.h" +#include "cpu/m68000/tmp68301.h" +#include "cpu/h8/h83006.h" +#include "machine/nvram.h" +#include "machine/ticket.h" +#include "machine/watchdog.h" +#include "sound/okim9810.h" +#include "video/x1_020_dx_101.h" + +#include "emupal.h" +#include "speaker.h" + +#define LOG_DEBUG (1U << 1) + +#define LOG_ALL (LOG_DEBUG) + +#define VERBOSE (0) +#include "logmacro.h" + +#define LOGDEBUG(...) LOGMASKED(LOG_DEBUG, __VA_ARGS__) + + +class funcube_state : public driver_device +{ +public: + funcube_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_sub(*this, "sub"), + m_video(*this, "video"), + m_screen(*this, "screen"), + m_palette(*this, "palette"), + m_oki(*this, "oki"), + m_nvram(*this, "nvram", 0x180, ENDIANNESS_BIG), + m_in_debug(*this, "DEBUG"), + m_in_switch(*this, "SWITCH"), + m_in_battery(*this, "BATTERY"), + m_leds(*this, "led%u", 0U) + { } + + void funcube(machine_config &config) ATTR_COLD; + void funcube2(machine_config &config) ATTR_COLD; + + void init_funcube() ATTR_COLD; + void init_funcube2() ATTR_COLD; + void init_funcube3() ATTR_COLD; + +private: + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + + uint8_t nvram_r(offs_t offset) { return m_nvram[offset]; } + void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset] = data; } + + uint16_t debug_r(); + uint8_t coins_r(); + void leds_w(uint8_t data); + uint8_t outputs_r(); + void outputs_w(uint8_t data); + uint8_t battery_r(); + + void funcube2_map(address_map &map) ATTR_COLD; + void funcube_map(address_map &map) ATTR_COLD; + void funcube_sub_map(address_map &map) ATTR_COLD; + + void funcube_debug_outputs(); + + required_device m_maincpu; + required_device m_sub; + required_device m_video; + required_device m_screen; + required_device m_palette; + + required_device m_oki; + + memory_share_creator m_nvram; + + required_ioport m_in_debug; + required_ioport m_in_switch; + required_ioport m_in_battery; + + output_finder<7> m_leds; + + uint8_t m_outputs = 0, m_funcube_leds = 0; + uint64_t m_coin_start_cycles = 0; + uint8_t m_hopper_motor = 0; +}; + + +/*************************************************************************** + + + Memory Maps + + +***************************************************************************/ + +uint16_t funcube_state::debug_r() +{ + uint16_t ret = m_in_debug->read(); + + // This bits let you move the crosshair in the inputs / touch panel test with a joystick + if (!(m_screen->frame_number() % 3)) + ret |= 0x3f; + + return ret; +} + +void funcube_state::funcube_map(address_map &map) +{ + map(0x000000, 0x07ffff).rom(); + map(0x200000, 0x20ffff).ram(); + + map(0x400002, 0x400003).r(FUNC(funcube_state::debug_r)); + map(0x400006, 0x400007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)).nopw(); + + map(0x500001, 0x500001).rw(m_oki, FUNC(okim9810_device::read_status), FUNC(okim9810_device::write_command)); + map(0x500003, 0x500003).w(m_oki, FUNC(okim9810_device::write_tmp_register)); + + map(0x800000, 0x83ffff).rw(m_video, FUNC(x1_020_dx_101_device::spriteram_r), FUNC(x1_020_dx_101_device::spriteram_w)); + map(0x840000, 0x84ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette + map(0x860000, 0x86003f).rw(m_video, FUNC(x1_020_dx_101_device::vregs_r), FUNC(x1_020_dx_101_device::vregs_w)); + + map(0xc00000, 0xc002ff).rw(FUNC(funcube_state::nvram_r), FUNC(funcube_state::nvram_w)).umask32(0x00ff00ff); +} + +void funcube_state::funcube2_map(address_map &map) +{ + map(0x00000000, 0x0007ffff).rom(); + map(0x00200000, 0x0020ffff).ram(); + + map(0x00500002, 0x00500003).r(FUNC(funcube_state::debug_r)); + map(0x00500004, 0x00500007).r("watchdog", FUNC(watchdog_timer_device::reset32_r)).nopw(); + + map(0x00600001, 0x00600001).rw(m_oki, FUNC(okim9810_device::read_status), FUNC(okim9810_device::write_command)); + map(0x00600003, 0x00600003).w(m_oki, FUNC(okim9810_device::write_tmp_register)); + + map(0x00800000, 0x0083ffff).rw(m_video, FUNC(x1_020_dx_101_device::spriteram_r), FUNC(x1_020_dx_101_device::spriteram_w)); + map(0x00840000, 0x0084ffff).ram().w(m_palette, FUNC(palette_device::write32)).share("palette"); + map(0x00860000, 0x0086003f).rw(m_video, FUNC(x1_020_dx_101_device::vregs_r), FUNC(x1_020_dx_101_device::vregs_w)); + + map(0x00c00000, 0x00c002ff).rw(FUNC(funcube_state::nvram_r), FUNC(funcube_state::nvram_w)).umask32(0x00ff00ff); + +// map(0xf0000000, 0xf00001ff).rw("maincpu_onboard", FUNC(mcf5206e_peripheral_device::seta2_coldfire_regs_r), FUNC(mcf5206e_peripheral_device::seta2_coldfire_regs_w)); // technically this can be moved with MBAR + map(0xffffe000, 0xffffffff).ram(); // SRAM +} + +// Sub CPU + +void funcube_state::funcube_sub_map(address_map &map) +{ + map(0x000000, 0x01ffff).rom(); + map(0x200000, 0x20017f).rw(FUNC(funcube_state::nvram_r), FUNC(funcube_state::nvram_w)).umask16(0xffff); +} + + +// Simulate coin drop through two sensors + +static constexpr XTAL FUNCUBE_SUB_CPU_CLOCK = XTAL(14'745'600); + +uint8_t funcube_state::coins_r() +{ + uint8_t ret = m_in_switch->read(); + uint8_t coin_bit0 = 1; // active low + uint8_t coin_bit1 = 1; + + const uint8_t hopper_bit = (m_hopper_motor && !(m_screen->frame_number() % 20)) ? 1 : 0; + + const uint64_t coin_total_cycles = FUNCUBE_SUB_CPU_CLOCK.value() / (1000/10); + + if (m_coin_start_cycles) + { + const uint64_t elapsed = m_sub->total_cycles() - m_coin_start_cycles; + + if (elapsed < coin_total_cycles/2) + coin_bit0 = 0; + else if (elapsed < coin_total_cycles) + coin_bit1 = 0; + else + { + if (!machine().side_effects_disabled()) + m_coin_start_cycles = 0; + } + } + else + { + if (!machine().side_effects_disabled()) + { + if (!(ret & 1)) + m_coin_start_cycles = m_sub->total_cycles(); + } + } + + return (ret & ~7) | (hopper_bit << 2) | (coin_bit1 << 1) | coin_bit0; +} + +void funcube_state::funcube_debug_outputs() +{ + //LOGDEBUG("LED: %02x OUT: %02x\n", m_funcube_leds, m_outputs); +} + +void funcube_state::leds_w(uint8_t data) +{ + m_funcube_leds = data; + + m_leds[0] = BIT(~data, 0); // win lamp (red) + m_leds[1] = BIT(~data, 1); // win lamp (green) + + // Set in a moving pattern: 0111 -> 1011 -> 1101 -> 1110 + m_leds[2] = BIT(~data, 4); + m_leds[3] = BIT(~data, 5); + m_leds[4] = BIT(~data, 6); + m_leds[5] = BIT(~data, 7); + + funcube_debug_outputs(); +} + +uint8_t funcube_state::outputs_r() +{ + // Bits 1,2,3 read + return m_outputs; +} + +void funcube_state::outputs_w(uint8_t data) +{ + m_outputs = data; + + // Bits 0,1,3 written + + // Bit 0: hopper motor + m_hopper_motor = BIT(~data, 0); + + // Bit 1: high on pay out + + // Bit 3: low after coining up, blinks on pay out + m_leds[6] = BIT(~data, 3); + + funcube_debug_outputs(); +} + +uint8_t funcube_state::battery_r() +{ + return m_in_battery->read() ? 0x40 : 0x00; +} + + +/*************************************************************************** + + Input Ports + +***************************************************************************/ + +static INPUT_PORTS_START( funcube ) + PORT_START("SWITCH") // c00030.l + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin solenoid 1 + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) // coin solenoid 2 + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) // hopper sensor + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // game select + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME( "Reset Key" ) + PORT_SERVICE( 0x40, IP_ACTIVE_LOW ) + PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) + + PORT_START("BATTERY") + PORT_DIPNAME( 0x10, 0x10, "Battery" ) + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x10, DEF_STR( On ) ) + + PORT_START("DEBUG") + // 500002.w + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2) + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) + + // 500000.w + PORT_DIPNAME( 0x00010000, 0x00000000, "Debug 0" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00010000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00020000, 0x00000000, "Debug 1" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00020000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00040000, 0x00000000, "Debug 2" ) // Touch-Screen + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00040000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00080000, 0x00000000, "Debug 3" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00080000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00100000, 0x00000000, "Debug 4" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00100000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00200000, 0x00000000, "Debug 5" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00200000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00400000, 0x00000000, "Debug 6" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00400000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00800000, 0x00000000, "Debug 7" ) + PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00800000, DEF_STR( On ) ) +INPUT_PORTS_END + +/*************************************************************************** + + Machine Drivers + +***************************************************************************/ + +void funcube_state::machine_start() +{ + m_leds.resolve(); + + save_item(NAME(m_coin_start_cycles)); + save_item(NAME(m_hopper_motor)); + save_item(NAME(m_outputs)); + save_item(NAME(m_funcube_leds)); +} + +void funcube_state::machine_reset() +{ + m_coin_start_cycles = 0; + m_hopper_motor = 0; + m_outputs = 0; + m_funcube_leds = 0; +} + +// original on EVA board, no Coldfire +void funcube_state::funcube(machine_config &config) +{ + // TODO: check exact type and clock + TMP68301(config, m_maincpu, XTAL(50'000'000)/3); + m_maincpu->set_addrmap(AS_PROGRAM, &funcube_state::funcube_map); + + H83007(config, m_sub, FUNCUBE_SUB_CPU_CLOCK); + m_sub->set_addrmap(AS_PROGRAM, &funcube_state::funcube_sub_map); + m_sub->read_port4().set(FUNC(funcube_state::battery_r)); + m_sub->read_port7().set(FUNC(funcube_state::coins_r)); + m_sub->read_porta().set(FUNC(funcube_state::outputs_r)); + m_sub->write_porta().set(FUNC(funcube_state::outputs_w)); + m_sub->write_portb().set(FUNC(funcube_state::leds_w)); + + FUNCUBE_TOUCHSCREEN(config, "touchscreen", 200).tx_cb().set(m_sub, FUNC(h8_device::sci_rx_w<1>)); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + WATCHDOG_TIMER(config, "watchdog"); + + // video hardware + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_refresh_hz(60); + m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate + m_screen->set_size(0x200, 0x200); + m_screen->set_visarea(0x0+1, 0x140-1+1, 0x00, 0xf0-1); + m_screen->set_screen_update(m_video, FUNC(x1_020_dx_101_device::screen_update)); + m_screen->screen_vblank().set(m_video, FUNC(x1_020_dx_101_device::screen_vblank)); + m_screen->screen_vblank().append_inputline(m_maincpu, 0); + m_screen->set_palette(m_palette); + + PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x8000+0xf0); // extra 0xf0 because we might draw 256-color object with 16-color granularity + + X1_020_DX_101(config, m_video, XTAL(50'000'000)); + m_video->set_palette(m_palette); + m_video->set_screen(m_screen); + m_video->raster_irq_callback().set_inputline(m_maincpu, 1, HOLD_LINE); + m_video->flip_screen_callback().set(FUNC(funcube_state::flip_screen_set)); + m_video->flip_screen_x_callback().set(FUNC(funcube_state::flip_screen_x_set)); + m_video->flip_screen_y_callback().set(FUNC(funcube_state::flip_screen_y_set)); + + // sound hardware + SPEAKER(config, "speaker", 2).front(); + + OKIM9810(config, m_oki, XTAL(4'096'000)); + m_oki->add_route(0, "speaker", 0.80, 0); + m_oki->add_route(1, "speaker", 0.80, 1); +} + + +void funcube_state::funcube2(machine_config &config) +{ + funcube(config); + MCF5206E(config.replace(), m_maincpu, XTAL(25'447'000)); + m_maincpu->set_addrmap(AS_PROGRAM, &funcube_state::funcube2_map); + downcast(*m_maincpu).gpio_r_cb().set_ioport("BATTERY"); + + m_sub->read_port4().set([]() -> u8 { return 0; }); // unused + + // video hardware + m_screen->set_visarea(0x0, 0x140-1, 0x00, 0xf0-1); + m_screen->screen_vblank().set(m_video, FUNC(x1_020_dx_101_device::screen_vblank)); + m_screen->screen_vblank().append_inputline(m_maincpu, 1); + + m_video->raster_irq_callback().set_nop(); // used? +} + + +/*************************************************************************** + + ROMs Loading + +***************************************************************************/ + +/*************************************************************************** + +FUNCUBE +EVA2E PCB + +It's the same PCB as Namco Stars (P0-140B). It's a lot more complicated to dump +than the others because there are several surface mounted flash ROMs spread across +multiple daughterboards instead of simple socketed 32M DIP42 mask roms all on one PCB. + +***************************************************************************/ + +ROM_START( funcube ) + ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code + ROM_LOAD( "fcu1_prg0-f.u08", 0x00000, 0x80000, CRC(57f4f340) SHA1(436fc66409b254aba68ae33fc994bc270ce803a6) ) + + ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code + ROM_LOAD( "fcu_0_iopr-0b.1b", 0x00000, 0x20000, CRC(87e3690f) SHA1(1b9dc573de31543884678df2dba2d6a74d6a2496) ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD32_BYTE( "fcu1_obj-0a.u12", 0x000000, 0x200000, CRC(908b6baf) SHA1(cb5aa8c9b16abb17d8cc16d0d3b2f690a48ee503) ) + ROM_LOAD32_BYTE( "fcu1_obj-0a.u13", 0x000001, 0x200000, CRC(8c31ca21) SHA1(e497ab1d7d30b41928a0c3db1ea7c3420376ad8c) ) + ROM_LOAD32_BYTE( "fcu1_obj-0a.u14", 0x000002, 0x200000, CRC(4298d599) SHA1(d245206bc78de5f17da85ae6063b662cf9cf67aa) ) + ROM_LOAD32_BYTE( "fcu1_obj-0a.u15", 0x000003, 0x200000, CRC(0669c78e) SHA1(0158fc4f90efa12d795b97873b8646c352864c69) ) + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) + ROM_LOAD( "fcu1_snd-0a.u40", 0x000000, 0x200000, CRC(448539bc) SHA1(9e53bd5e29d1a88bf634e58bfeebccd3a1c2d866) ) +ROM_END + +/*************************************************************************** + + FUNCUBE (BET) Series PCB for chapters 2 through 5 + +PCB Number: B0-006B (also known as EVA3_A system and is non-JAMMA) ++------------------------------------------------+ +|+--+ S +---+ +---+ CN5 | +|| | W | | | | CN6?| +|| | 4 | U | | U | | +|| | | 4 | | 4 | +---+ CN2?| +|| | | 2 | | 3 | |DX | | +|| | | | | | |102| | +||C | | | | | +---+ | +||N | +---+ +---+ | +||4 | | +|| | +----------+ M1 | +|| | M3 | | C | +|| | | NEC | M1 N | +|| | M3 | DX-101 | 3 | +|| | | | | +|| | | | 50MHz | +|+--+ +----------+ | +| PIC 25.447MHz +-----------+ | +| CN7 | U47 | | +| +-----------+ | +| +-----------+ +---+ +---+ D | +| | U3 | |OKI| |DX | S | +| M2 +-----------+ | | |102| W | +| +---+ +---+ 1 | +| ispLSI2032 | +| M1 +---+ | +| +----------+ |IDT| +--+| +| | | C | | | || +| C | ColdFire | N +---+ | || +| N M2 | XCF5206E | 8 | || +| 1 | | +---+ |C || +| | | |H8 | |N || +| M1 +----------+ +---+ D |9 || +| 14.7456MHz S | || +| +-----------+W | || +| SW1 BAT1 | U49 |2 +--+| +| +-----------+ | ++------------------------------------------------+ + + CPU: ColdFire XCF5206EFT54 (160 Pin PQFP) + Hitachi H8/3007 (64130007F20) used for touch screen I/O + Video: NEC DX-101 (240 Pin PQFP) + NEC DX-102 (52 Pin PQFP x2) + Sound: OKI MSM9810B 8-Channel Mixing ADPCM Type Voice Synthesis LSI + OSC: 50MHz, 25.447MHz & 14.7456MHz + Other: Lattice ispLSI2032 - stamped "EVA3A" + BAT1 - CR2032 3Volt + +ColdFire XCF5206EFT54: + 68K/ColdFire V2 core family + 8K internal SRAM + 54MHz (max) Bus Frequency + 32bit External Bus Width + 2 UART Serial Interfaces + 2 Timer Channels + +PIC - PIC12C508 MCU used for security + Labeled FC21A for Funcube 2 + Labeled FC41A for Funcube 4 + +Ram M1 are Toshiba TC55257DFL-70L +Ram M2 are NEC D43001GU-70L +Ram M3 are ISSI IS62C1024L-70Q +IDT - IDT 7130 64-pin TQFP High-speed 1K x 8 Dual-Port Static RAM + +CN1 - Unused 64 pin double row connecter +CN2? 2x2 connecter +CN3 - Unused 50 pin double row connecter +CN4 - 96 pin triple row connecter +CN5 - 2x3 pin connecter +CN6? 3x3 connecter +CN7 - Unused 20 pin connecter +CN8 - 8 pin single row connecter +CN9 - 40 pin double row connecter + +DSW1 - 8 position dipswitch +DSW2 - 2 position dipswitch +SW1 - Pushbutton +SW4 - Single position slider switch + +U3 - Is a 27C4002 EPROM +U49 - Is a 27C1001 EPROM +U42, U43 & U47 are mask ROMs read as 27C322 + +The same H8/3007 code "FC21 IOPR-0" at U49 is used for FUNCUBE 2,3,4 & 5 + +"15.5846kHz hsync, vsync between 60-61Hz (can't split the csync)" + +***************************************************************************/ + +ROM_START( funcube2 ) + ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code + ROM_LOAD( "fc21_prg-0b.u3", 0x00000, 0x80000, CRC(add1c8a6) SHA1(bf91518da659098a4bad4e756533525fcc910570) ) + + ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code + ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) + + ROM_REGION( 0x300, "pic", 0 ) // PIC12C508? Code + ROM_LOAD( "fc21a.u57", 0x000, 0x300, NO_DUMP ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD32_WORD( "fc21_obj-0.u43", 0x000000, 0x400000, CRC(08cfe6d9) SHA1(d10f362dcde01f7a9855d8f76af3084b5dd1573a) ) + ROM_LOAD32_WORD( "fc21_obj-1.u42", 0x000002, 0x400000, CRC(4c1fbc20) SHA1(ff83691c19ce3600b31c494eaec26d2ac79e0028) ) + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) + ROM_LOAD( "fc21_voi0.u47", 0x000000, 0x200000, CRC(4a49370a) SHA1(ac10e2c25626965b49475767ef5a0ec3ba9a2d01) ) +ROM_END + +ROM_START( funcube3 ) + ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code + ROM_LOAD( "fc31_prg-0a.u4", 0x00000, 0x80000, CRC(ed7d70dd) SHA1(4ebfca9e60ab5e8de22821f0475abf515c83ce53) ) + + ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code + ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) + + ROM_REGION( 0x400, "pic", 0 ) // PIC12C508? Code + ROM_LOAD( "fc31a.u57", 0x000, 0x400, NO_DUMP ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD32_WORD( "fc31_obj-0.u43", 0x000000, 0x400000, CRC(08c5eb6f) SHA1(016d8f3067db487ccd47188142743897c9722b1f) ) + ROM_LOAD32_WORD( "fc31_obj-1.u42", 0x000002, 0x400000, CRC(4dadc76e) SHA1(cf82296b38dc22a618fd178816316af05f2459b3) ) + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) + ROM_LOAD( "fc31_snd-0.u47", 0x000000, 0x200000, CRC(36b03769) SHA1(20e583359421e0933c781a487fe5f7220052a6d4) ) +ROM_END + +ROM_START( funcube4 ) + ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code + ROM_LOAD( "fc41_prg-0.u3", 0x00000, 0x80000, CRC(ef870874) SHA1(dcb8dc3f780ca135df55e4b4f3c95620597ad28f) ) + + ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code + ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) + + ROM_REGION( 0x300, "pic", 0 ) // PIC12C508? Code + ROM_LOAD( "fc41a", 0x000, 0x300, NO_DUMP ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD32_WORD( "fc41_obj-0.u43", 0x000000, 0x400000, CRC(9ff029d5) SHA1(e057f4929aa745ecaf9d4ff7e39974c82e440146) ) + ROM_LOAD32_WORD( "fc41_obj-1.u42", 0x000002, 0x400000, CRC(5ab7b087) SHA1(c600158b2358cdf947357170044dda2deacd4f37) ) + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) + ROM_LOAD( "fc41_snd0.u47", 0x000000, 0x200000, CRC(e6f7d2bc) SHA1(638c73d439eaaff8097cb0aa2684f9f7111bcade) ) +ROM_END + +ROM_START( funcube5 ) + ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code + ROM_LOAD( "fc51_prg-0.u4", 0x00000, 0x80000, CRC(4e34c2d8) SHA1(1ace4f6edab291e69e5c36b15193fba62f4a6773) ) + + ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code + ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) + + ROM_REGION( 0x300, "pic", 0 ) // PIC12C508? Code + ROM_LOAD( "fc51a.u57", 0x000, 0x300, NO_DUMP ) + + ROM_REGION( 0x800000, "video", 0 ) + ROM_LOAD32_WORD( "fc51_obj-0.u43", 0x000000, 0x400000, CRC(116624b3) SHA1(c0b3dbe0ea4a0808222616c3ef77b2d1194a970a) ) + ROM_LOAD32_WORD( "fc51_obj-1.u42", 0x000002, 0x400000, CRC(35c6ec61) SHA1(424c9b66a2cdd5217d8a577d0179d1228112ee5b) ) + + ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) + ROM_LOAD( "fc51_snd-0.u47", 0x000000, 0x200000, CRC(2a504fe1) SHA1(911ad650bf48aa78d9cb3c64284aa526ceb519ba) ) +ROM_END + +void funcube_state::init_funcube() +{ +// uint16_t *main_cpu = (uint16_t *) memregion("maincpu")->base(); +// +// main_cpu[0x064/2] = 0x0000; +// main_cpu[0x066/2] = 0x042a; // PIC protection? + +} + +void funcube_state::init_funcube2() +{ + uint32_t *main_cpu = (uint32_t *) memregion("maincpu")->base(); + + main_cpu[0xa5c/4] = 0x4e713e3c; // PIC protection? + main_cpu[0xa74/4] = 0x4e713e3c; + main_cpu[0xa8c/4] = 0x4e7141f9; + +} + +void funcube_state::init_funcube3() +{ + uint32_t *main_cpu = (uint32_t *) memregion("maincpu")->base(); + + main_cpu[0x008bc/4] = 0x4a804e71; + main_cpu[0x19f0c/4] = 0x4e714e71; + main_cpu[0x19fb8/4] = 0x4e714e71; + +} + +// title logo is clipped +GAME( 2000, funcube, 0, funcube, funcube, funcube_state, init_funcube, ROT0, "Namco", "Funcube (v1.5)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_COCKTAIL ) +GAME( 2001, funcube2, 0, funcube2, funcube, funcube_state, init_funcube2, ROT0, "Namco", "Funcube 2 (v1.1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_COCKTAIL ) +GAME( 2001, funcube3, 0, funcube2, funcube, funcube_state, init_funcube3, ROT0, "Namco", "Funcube 3 (v1.1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_COCKTAIL ) +GAME( 2001, funcube4, 0, funcube2, funcube, funcube_state, init_funcube2, ROT0, "Namco", "Funcube 4 (v1.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_COCKTAIL ) +GAME( 2002, funcube5, 0, funcube2, funcube, funcube_state, init_funcube2, ROT0, "Namco", "Funcube 5 (v1.0)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_COCKTAIL ) diff --git a/src/mame/namco/funcube_touchscreen.cpp b/src/mame/namco/funcube_touchscreen.cpp new file mode 100644 index 00000000000..08c35b4e887 --- /dev/null +++ b/src/mame/namco/funcube_touchscreen.cpp @@ -0,0 +1,92 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia,Olivier Galibert +/*************************************************************************** + + Namco Touchscreen device for Funcube series + +***************************************************************************/ + +#include "emu.h" +#include "funcube_touchscreen.h" + +#define VERBOSE ( 0 ) +#include "logmacro.h" + + +static INPUT_PORTS_START( funcube_touchscreen ) + PORT_START("TOUCH_BTN") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME( "Touch Screen" ) + + PORT_START("TOUCH_X") + PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_X ) PORT_MINMAX(0,0x5c+1) PORT_CROSSHAIR(X, -(1.0 * 0x05d/0x5c), -1.0/0x5c, 0) PORT_SENSITIVITY(45) PORT_KEYDELTA(5) PORT_REVERSE + + PORT_START("TOUCH_Y") + PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_Y ) PORT_MINMAX(0,0x46+1) PORT_CROSSHAIR(Y, -(0xf0-8.0)/0xf0*0x047/0x46, -1.0/0x46, 0) PORT_SENSITIVITY(45) PORT_KEYDELTA(5) PORT_REVERSE +INPUT_PORTS_END + + +DEFINE_DEVICE_TYPE(FUNCUBE_TOUCHSCREEN, funcube_touchscreen_device, "funcube_touchscreen", "Funcube Touchscreen") + +funcube_touchscreen_device::funcube_touchscreen_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, FUNCUBE_TOUCHSCREEN, tag, owner, clock), + device_serial_interface(mconfig, *this), + m_tx_cb(*this), + m_x(*this, "TOUCH_X"), + m_y(*this, "TOUCH_Y"), + m_btn(*this, "TOUCH_BTN"), + m_button_state(0), + m_serial_pos(0), + m_serial{0} +{ +} + +ioport_constructor funcube_touchscreen_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(funcube_touchscreen); +} + +void funcube_touchscreen_device::device_start() +{ + set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1); + set_tra_rate(9600); + m_button_state = 0x00; + emu_timer *tm = timer_alloc(FUNC(funcube_touchscreen_device::read_buttons), this); + tm->adjust(attotime::from_ticks(1, clock()), 0, attotime::from_ticks(1, clock())); + + save_item(NAME(m_button_state)); + save_item(NAME(m_serial_pos)); + save_item(NAME(m_serial)); +} + +void funcube_touchscreen_device::device_reset() +{ + m_serial_pos = 0; + memset(m_serial, 0, sizeof(m_serial)); + m_tx_cb(1); +} + +TIMER_CALLBACK_MEMBER(funcube_touchscreen_device::read_buttons) +{ + const uint8_t button_state = m_btn->read(); + if (m_button_state != button_state) + { + m_button_state = button_state; + m_serial[0] = button_state ? 0xfe : 0xfd; + m_serial[1] = m_x->read(); + m_serial[2] = m_y->read(); + m_serial[3] = 0xff; + m_serial_pos = 0; + transmit_register_setup(m_serial[m_serial_pos++]); + } +} + +void funcube_touchscreen_device::tra_complete() +{ + if (m_serial_pos != 4) + transmit_register_setup(m_serial[m_serial_pos++]); +} + +void funcube_touchscreen_device::tra_callback() +{ + m_tx_cb(transmit_register_get_data_bit()); +} diff --git a/src/mame/namco/funcube_touchscreen.h b/src/mame/namco/funcube_touchscreen.h new file mode 100644 index 00000000000..739d909314f --- /dev/null +++ b/src/mame/namco/funcube_touchscreen.h @@ -0,0 +1,47 @@ +// license:BSD-3-Clause +// copyright-holders:Luca Elia,Olivier Galibert +/*************************************************************************** + + Namco Touchscreen device for Funcube series + +***************************************************************************/ + +#ifndef MAME_NAMCO_FUNCUBE_TOUCHSCREEN_H +#define MAME_NAMCO_FUNCUBE_TOUCHSCREEN_H + +#pragma once + +#include "diserial.h" + +class funcube_touchscreen_device : public device_t, + public device_serial_interface +{ +public: + funcube_touchscreen_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + auto tx_cb() { return m_tx_cb.bind(); } + +protected: + virtual ioport_constructor device_input_ports() const override ATTR_COLD; + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void tra_complete() override; + virtual void tra_callback() override; + + TIMER_CALLBACK_MEMBER(read_buttons); + +private: + devcb_write_line m_tx_cb; + required_ioport m_x; + required_ioport m_y; + required_ioport m_btn; + + uint8_t m_button_state; + int32_t m_serial_pos; + uint8_t m_serial[4]; +}; + +DECLARE_DEVICE_TYPE(FUNCUBE_TOUCHSCREEN, funcube_touchscreen_device) + +#endif // MAME_NAMCO_FUNCUBE_TOUCHSCREEN_H diff --git a/src/mame/seta/namcoeva.cpp b/src/mame/namco/namcoeva.cpp similarity index 93% rename from src/mame/seta/namcoeva.cpp rename to src/mame/namco/namcoeva.cpp index 226784c7021..24ee519351b 100644 --- a/src/mame/seta/namcoeva.cpp +++ b/src/mame/namco/namcoeva.cpp @@ -36,21 +36,20 @@ TODO: - sound system is the same as namco/namcond1.cpp (puts "Quattro Ver.1.2.H8" in H8 RAM). It interacts with the keycus. Handling is copied over from said driver, but could probably be improved; - after coining up there's a GFX bug that maybe points to some unimplemented feature in seta2_v.cpp; -- once the video emulation in seta/seta2_v.cpp has been devicified, remove derivation from - seta/seta2.h and possibly move to namco/ folder. */ #include "emu.h" -#include "seta2.h" - +#include "cpu/m68000/tmp68301.h" #include "cpu/mc68hc11/mc68hc11.h" #include "cpu/h8/h83002.h" #include "machine/mb8421.h" #include "machine/watchdog.h" #include "sound/c352.h" +#include "video/x1_020_dx_101.h" +#include "emupal.h" #include "speaker.h" @@ -70,13 +69,17 @@ TODO: namespace { -class namcoeva_state : public seta2_state +class namcoeva_state : public driver_device { public: namcoeva_state(const machine_config &mconfig, device_type type, const char *tag) : - seta2_state(mconfig, type, tag), + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), m_subcpu(*this, "subcpu"), - m_iocpu(*this, "iocpu") + m_iocpu(*this, "iocpu"), + m_video(*this, "video"), + m_screen(*this, "screen"), + m_palette(*this, "palette") { } void hammerch(machine_config &config) ATTR_COLD; @@ -86,18 +89,22 @@ protected: virtual void machine_reset() override ATTR_COLD; private: + required_device m_maincpu; required_device m_subcpu; required_device m_iocpu; - - void maincpu_map(address_map &map) ATTR_COLD; - void subcpu_map(address_map &map) ATTR_COLD; - void iocpu_map(address_map &map) ATTR_COLD; + required_device m_video; + required_device m_screen; + required_device m_palette; uint8_t m_h8_irq5_enabled = 0; uint16_t keycus_r(offs_t offset); void keycus_w(offs_t offset, uint16_t data); INTERRUPT_GEN_MEMBER(mcu_interrupt); + + void maincpu_map(address_map &map) ATTR_COLD; + void subcpu_map(address_map &map) ATTR_COLD; + void iocpu_map(address_map &map) ATTR_COLD; }; @@ -172,9 +179,9 @@ void namcoeva_state::maincpu_map(address_map &map) map(0x600300, 0x600301).portr("DSW1"); map(0x600302, 0x600303).portr("DSW2"); map(0x800000, 0x800fff).rw("dpram", FUNC(mb8421_device::left_r), FUNC(mb8421_device::left_w)).umask16(0x00ff); // EXT IO CHECK: NG if unmapped - map(0xa00000, 0xa3ffff).ram().share(m_spriteram); + map(0xa00000, 0xa3ffff).rw(m_video, FUNC(x1_020_dx_101_device::spriteram_r), FUNC(x1_020_dx_101_device::spriteram_w)); map(0xa40000, 0xa4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); - map(0xa60000, 0xa6003f).ram().w(FUNC(namcoeva_state::vregs_w)).share(m_vregs); + map(0xa60000, 0xa6003f).rw(m_video, FUNC(x1_020_dx_101_device::vregs_r), FUNC(x1_020_dx_101_device::vregs_w)); map(0xc3ff00, 0xc3ffff).rw(FUNC(namcoeva_state::keycus_r), FUNC(namcoeva_state::keycus_w)); } @@ -311,25 +318,6 @@ static INPUT_PORTS_START( hammerch ) INPUT_PORTS_END -static const gfx_layout tile_layout = -{ - 8,8, - RGN_FRAC(1,1), - 8, - { STEP8(7*8, -8) }, - { STEP8(0, 1) }, - { STEP8(0, 8*8) }, - 8*8*8 -}; - - -/* Tiles are 8bpp, but the hardware is additionally able to discard - some bitplanes and use the low 4 bits only, or the high 4 bits only */ -static GFXDECODE_START( gfx_dx_10x ) - GFXDECODE_ENTRY( "sprites", 0, tile_layout, 0, 0x8000 / 16 ) // 8bpp, but 4bpp color granularity -GFXDECODE_END - - void namcoeva_state::hammerch(machine_config &config) { tmp68301_device &maincpu(TMP68301(config, m_maincpu, 50_MHz_XTAL / 4)); // TODO: clock and divider not verified @@ -399,15 +387,22 @@ void namcoeva_state::hammerch(machine_config &config) m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); m_screen->set_size(0x200, 0x100); m_screen->set_visarea(0x00, 0x140-1, 0x00, 0xe0-1); - m_screen->set_screen_update(FUNC(namcoeva_state::screen_update)); - m_screen->screen_vblank().set(FUNC(namcoeva_state::screen_vblank)); + m_screen->set_screen_update(m_video, FUNC(x1_020_dx_101_device::screen_update)); + m_screen->screen_vblank().set(m_video, FUNC(x1_020_dx_101_device::screen_vblank)); m_screen->screen_vblank().append_inputline(m_maincpu, 0); m_screen->set_palette(m_palette); //m_screen->set_video_attributes(VIDEO_UPDATE_SCANLINE); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_dx_10x); PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x8000+0xf0); // extra 0xf0 because we might draw 256-color object with 16-color granularity + X1_020_DX_101(config, m_video, 50_MHz_XTAL); // clock and divider not verified + m_video->set_palette(m_palette); + m_video->set_screen(m_screen); + m_video->raster_irq_callback().set_inputline(m_maincpu, 1, HOLD_LINE); + m_video->flip_screen_callback().set(FUNC(namcoeva_state::flip_screen_set)); + m_video->flip_screen_x_callback().set(FUNC(namcoeva_state::flip_screen_x_set)); + m_video->flip_screen_y_callback().set(FUNC(namcoeva_state::flip_screen_y_set)); + // sound hardware SPEAKER(config, "speaker", 2).front(); @@ -429,7 +424,7 @@ ROM_START( hammerch ) ROM_REGION( 0x10000, "iocpu", 0 ) // MC68HC11K1 ROM_LOAD( "hc1prg0_ioboard.ic2", 0x00000, 0x10000, CRC(606fad7e) SHA1(cf975e09038f84eb75d30130bfaf31f4c74986b2) ) - ROM_REGION( 0x1000000, "sprites", 0 ) + ROM_REGION( 0x1000000, "video", 0 ) ROM_LOAD64_WORD( "hc1_cg3.u29", 0x000000, 0x400000, CRC(d9cc519b) SHA1(43670b357fadc5faf5ee229176ae97e8c29b6874) ) ROM_LOAD64_WORD( "hc1_cg1.u28", 0x000002, 0x400000, CRC(386c129e) SHA1(21325b44d96b184df09118cd0c68733afde6db03) ) ROM_LOAD64_WORD( "hc1_cg2.u31", 0x000004, 0x400000, CRC(3aea6bf0) SHA1(a8e7a7fae0ab83b08b80ff28461c9e97afe85cf7) ) diff --git a/src/mame/seta/seta2.cpp b/src/mame/seta/seta2.cpp index 7eaa6f4a39b..094d7ee006c 100644 --- a/src/mame/seta/seta2.cpp +++ b/src/mame/seta/seta2.cpp @@ -8,10 +8,8 @@ CPU : TMP68301* - or ColdFire + H8/3007 + PIC12C508 (for EVA2 & EVA3 PCBs) Video : DX-101 or X1-020 (for P0-113A & P0-121A PCBs, compatible?) - DX-102 x3 Sound : X1-010 or OKI M9810 (for EVA2 & EVA3 PCBs) @@ -35,13 +33,11 @@ P0-130B ; M-133 (Namco) 1997 Star Audition Namco P0-136A ; KL (Namco) 1997 Kosodate Quiz My Angel 2 Namco P-FG-02 1997 Reel'N Quake P-FG-03 ???? Endless Riches E.N.Tiger -P0-140B 2000 Funcube Namco P0-140B 2000 Namco Stars Namco P0-142A 1999 Puzzle De Bowling MOSS / Nihon System P0-142A + extra parts 2000 Penguin Brothers / A-Blast Subsino B0-003A (or B0-003B) 2000 Deer Hunting USA Sammy B0-003A (or B0-003B) 2001 Turkey Hunting USA Sammy -B0-006B 2001-2 Funcube 2 - 5 Namco B0-010A 2001 Wing Shooting Championship Sammy B0-010A 2002 Trophy Hunting - Bear & Moose Sammy P0-145-1 2002 Trophy Hunting - Bear & Moose (test) Sammy @@ -49,13 +45,7 @@ P0-145-1 2002 Trophy Hunting - Bear & Moose (test) Sammy TODO: -- Proper emulation of the ColdFire CPU, in a core file. -- improvements to Flip screen / Zooming support. (Flip Screen is often done with 'negative zoom value') -- Fix some graphics imperfections (e.g. color depth selection, "tilemap" sprites) [all done? - NS] -- I added a kludge involving a -0x10 yoffset, this fixes the lifeline in myangel. - I didn't find a better way to do it without breaking pzlbowl's title screen. -- Background color is not verified -- Device-fy video chip and split according to hardware (i.e. NamcoEVA2 and 3). +- see video/x1_020_dx_101.cpp for video related notes gundamex: - slowdowns, music tempo is incorrect @@ -84,24 +74,28 @@ wschampb: original release? Is that why the next bug fix release is v1.01? IE: such a a minor increase in the version number. -funcube series: -- Hacked to run, as they use a ColdFire CPU. -- Pay-out key causes "unknown error" after coin count reaches 0. - blnctry: - hook up sub CPU, inputs, sound ***************************************************************************/ #include "emu.h" -#include "seta2.h" #include "cpu/m68000/mcf5206e.h" +#include "cpu/m68000/tmp68301.h" +#include "machine/eepromser.h" +#include "machine/intelfsh.h" #include "machine/nvram.h" #include "machine/ticket.h" +#include "machine/timer.h" +#include "machine/upd4992.h" #include "machine/watchdog.h" +#include "sound/okim9810.h" +#include "sound/x1_010.h" +#include "video/x1_020_dx_101.h" -#include "diserial.h" +#include "emupal.h" +#include "screen.h" #include "speaker.h" #define LOG_IO (1U << 1) @@ -115,6 +109,196 @@ blnctry: #define LOGIO(...) LOGMASKED(LOG_IO, __VA_ARGS__) #define LOGDEBUG(...) LOGMASKED(LOG_DEBUG, __VA_ARGS__) +namespace { + +class seta2_state : public driver_device +{ +public: + seta2_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_video(*this, "video"), + m_screen(*this, "screen"), + m_palette(*this, "palette"), + + m_oki(*this, "oki"), + m_eeprom(*this, "eeprom"), + m_dispenser(*this, "dispenser"), + + m_maincpu_region(*this, "maincpu"), + + m_x1_bank(*this, "x1_bank_%u", 1U), + + m_in_system(*this, "SYSTEM"), + m_leds(*this, "led%u", 0U), + m_lamps(*this, "lamp%u", 0U) + { } + + void grdians(machine_config &config) ATTR_COLD; + void grdiansa(machine_config &config) ATTR_COLD; + void myangel(machine_config &config) ATTR_COLD; + void penbros(machine_config &config) ATTR_COLD; + void pzlbowl(machine_config &config) ATTR_COLD; + void myangel2(machine_config &config) ATTR_COLD; + void reelquak(machine_config &config) ATTR_COLD; + void ablastb(machine_config &config) ATTR_COLD; + void gundamex(machine_config &config) ATTR_COLD; + void telpacfl(machine_config &config) ATTR_COLD; + void samshoot(machine_config &config) ATTR_COLD; + void namcostr(machine_config &config) ATTR_COLD; + + void init_namcostr() ATTR_COLD; + +protected: + virtual void machine_start() override ATTR_COLD; + + void grdians_lockout_w(uint8_t data); + + uint16_t pzlbowl_protection_r(address_space &space); + uint8_t pzlbowl_coins_r(); + void pzlbowl_coin_counter_w(uint8_t data); + + void reelquak_leds_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void reelquak_coin_w(uint8_t data); + + void samshoot_coin_w(uint8_t data); + + void telpacfl_lamp1_w(uint8_t data); + void telpacfl_lamp2_w(uint8_t data); + void telpacfl_lockout_w(uint8_t data); + + uint16_t gundamex_eeprom_r(); + void gundamex_eeprom_w(uint16_t data); + + void sound_bank_w(offs_t offset, uint8_t data); + + void ablastb_map(address_map &map) ATTR_COLD; + void grdians_map(address_map &map) ATTR_COLD; + void gundamex_map(address_map &map) ATTR_COLD; + void myangel2_map(address_map &map) ATTR_COLD; + void myangel_map(address_map &map) ATTR_COLD; + void namcostr_map(address_map &map) ATTR_COLD; + void penbros_base_map(address_map &map) ATTR_COLD; + void penbros_map(address_map &map) ATTR_COLD; + void pzlbowl_map(address_map &map) ATTR_COLD; + void reelquak_map(address_map &map) ATTR_COLD; + void samshoot_map(address_map &map) ATTR_COLD; + void telpacfl_map(address_map &map) ATTR_COLD; + void video_map(address_map &map) ATTR_COLD; + void x1_map(address_map &map) ATTR_COLD; + + void seta2(machine_config &config) ATTR_COLD; + void seta2_32m(machine_config &config) ATTR_COLD; + + required_device m_maincpu; + required_device m_video; + required_device m_screen; + required_device m_palette; + + optional_device m_oki; + optional_device m_eeprom; + optional_device m_dispenser; + + required_memory_region m_maincpu_region; + + optional_memory_bank_array<8> m_x1_bank; + optional_ioport m_in_system; + output_finder<7> m_leds; + output_finder<11> m_lamps; +}; + + +class mj4simai_state : public seta2_state +{ +public: + mj4simai_state(const machine_config &mconfig, device_type type, const char *tag) : + seta2_state(mconfig, type, tag), + m_keys{ { *this, "P1_KEY%u", 0U }, { *this, "P2_KEY%u", 0U } } + { } + + void mj4simai(machine_config &config) ATTR_COLD; + +protected: + virtual void machine_start() override ATTR_COLD; + +private: + template uint16_t mj4simai_key_r(); + + void mj4simai_map(address_map &map) ATTR_COLD; + + required_ioport_array<5> m_keys[2]; + + uint8_t m_keyboard_row = 0; +}; + + +class staraudi_state : public seta2_state +{ +public: + static constexpr feature_type unemulated_features() { return feature::CAMERA | feature::PRINTER; } + + staraudi_state(const machine_config &mconfig, device_type type, const char *tag) : + seta2_state(mconfig, type, tag), + m_rtc(*this, "rtc"), + m_flash(*this, "flash"), + m_rgbram(*this, "rgbram"), + m_video_region(*this, "video") + { + } + + void staraudi(machine_config &config) ATTR_COLD; + +protected: + virtual void driver_start() override ATTR_COLD; + +private: + void camera_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + void lamps1_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + void lamps2_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); + uint16_t tileram_r(offs_t offset); + void tileram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + void staraudi_map(address_map &map) ATTR_COLD; + + void staraudi_debug_outputs(); + + void draw_rgbram(bitmap_ind16 &bitmap); + + required_device m_rtc; + required_device m_flash; + required_shared_ptr m_rgbram; + required_memory_region m_video_region; + + uint8_t m_lamps1 = 0, m_lamps2 = 0, m_cam = 0; +}; + +// staraudi +void staraudi_state::draw_rgbram(bitmap_ind16 &bitmap) +{ + if (!(m_cam & 0x0008)) + return; + + for (int y = 0x100; y < 0x200; ++y) + { + for (int x = 0; x < 0x200; ++x) + { + const int offs = x * 2/2 + y * 0x400/2; + const uint32_t data = ((m_rgbram[offs + 0x40000/2] & 0xff) << 16) | m_rgbram[offs]; + bitmap.pix(y, x) = (data & 0x7fff); + } + } +} + +uint32_t staraudi_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + m_video->screen_update(screen, bitmap, cliprect); + if (false) + draw_rgbram(bitmap); + + return 0; +} /*************************************************************************** @@ -154,16 +338,17 @@ void seta2_state::sound_bank_w(offs_t offset, uint8_t data) void seta2_state::x1_map(address_map &map) { - map(0x00000, 0x1ffff).bankr(m_x1_bank[0]); - map(0x20000, 0x3ffff).bankr(m_x1_bank[1]); - map(0x40000, 0x5ffff).bankr(m_x1_bank[2]); - map(0x60000, 0x7ffff).bankr(m_x1_bank[3]); - map(0x80000, 0x9ffff).bankr(m_x1_bank[4]); - map(0xa0000, 0xbffff).bankr(m_x1_bank[5]); - map(0xc0000, 0xdffff).bankr(m_x1_bank[6]); - map(0xe0000, 0xfffff).bankr(m_x1_bank[7]); + for (int i = 0; i < 8; i++) + map((i << 17) | 0x00000, (i << 17) | 0x1ffff).bankr(m_x1_bank[i]); } +void seta2_state::video_map(address_map &map) +{ + map(0x00000, 0x3ffff).rw(m_video, FUNC(x1_020_dx_101_device::spriteram_r), FUNC(x1_020_dx_101_device::spriteram_w)); // Sprites + map(0x40000, 0x4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette + map(0x50000, 0x5ffff).ram(); // cleared, Additional palette area? + map(0x60000, 0x6003f).rw(m_video, FUNC(x1_020_dx_101_device::vregs_r), FUNC(x1_020_dx_101_device::vregs_w)); // Video Registers +} /*************************************************************************** Guardians @@ -190,10 +375,7 @@ void seta2_state::grdians_map(address_map &map) map(0x70000c, 0x70000d).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); map(0x800001, 0x800001).w(FUNC(seta2_state::grdians_lockout_w)); map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xc00000, 0xc3ffff).ram().w(FUNC(seta2_state::spriteram_w)).share(m_spriteram); // Sprites - map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xc50000, 0xc5ffff).ram(); // cleared - map(0xc60000, 0xc6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0xc00000, 0xc7ffff).m(*this, FUNC(seta2_state::video_map)); map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks } @@ -228,10 +410,7 @@ void seta2_state::gundamex_map(address_map &map) map(0x70000c, 0x70000d).w("watchdog", FUNC(watchdog_timer_device::reset16_w)); map(0x800000, 0x800001).w(FUNC(seta2_state::grdians_lockout_w)); map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xc00000, 0xc3ffff).ram().share(m_spriteram); // Sprites - map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xc50000, 0xc5ffff).ram(); // cleared - map(0xc60000, 0xc6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0xc00000, 0xc7ffff).m(*this, FUNC(seta2_state::video_map)); map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks } @@ -250,11 +429,11 @@ template uint16_t mj4simai_state::mj4simai_key_r() { uint16_t result = 0xffff; - if (BIT(m_keyboard_row, 0)) result &= m_keys[Which][0]->read(); - if (BIT(m_keyboard_row, 1)) result &= m_keys[Which][1]->read(); - if (BIT(m_keyboard_row, 2)) result &= m_keys[Which][2]->read(); - if (BIT(m_keyboard_row, 3)) result &= m_keys[Which][3]->read(); - if (BIT(m_keyboard_row, 4)) result &= m_keys[Which][4]->read(); + for (int i = 0; i < 5; i++) + { + if (BIT(m_keyboard_row, i)) + result &= m_keys[Which][i]->read(); + } return result; } @@ -272,9 +451,7 @@ void mj4simai_state::mj4simai_map(address_map &map) map(0x600302, 0x600303).portr("DSW2"); // DSW 2 map(0x600300, 0x60030f).w(FUNC(mj4simai_state::sound_bank_w)).umask16(0x00ff); // Samples Banks map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xc00000, 0xc3ffff).ram().share(m_spriteram); // Sprites - map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xc60000, 0xc6003f).ram().w(FUNC(mj4simai_state::vregs_w)).share(m_vregs); // Video Registers + map(0xc00000, 0xc7ffff).m(*this, FUNC(mj4simai_state::video_map)); } @@ -295,9 +472,7 @@ void seta2_state::myangel_map(address_map &map) map(0x700302, 0x700303).portr("DSW2"); // DSW 2 map(0x700310, 0x70031f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xc00000, 0xc3ffff).ram().share(m_spriteram); // Sprites - map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xc60000, 0xc6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0xc00000, 0xc7ffff).m(*this, FUNC(seta2_state::video_map)); } @@ -318,9 +493,7 @@ void seta2_state::myangel2_map(address_map &map) map(0x600302, 0x600303).portr("DSW2"); // DSW 2 map(0x600300, 0x60030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xd00000, 0xd3ffff).ram().share(m_spriteram); // Sprites - map(0xd40000, 0xd4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xd60000, 0xd6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0xd00000, 0xd7ffff).m(*this, FUNC(seta2_state::video_map)); } @@ -333,7 +506,7 @@ void seta2_state::myangel2_map(address_map &map) uint16_t seta2_state::pzlbowl_protection_r(address_space &space) { const uint32_t address = (space.read_word(0x20ba16) << 16) | space.read_word(0x20ba18); - return memregion("maincpu")->base()[address - 2]; + return m_maincpu_region->base()[address - 2]; } uint8_t seta2_state::pzlbowl_coins_r() @@ -359,9 +532,7 @@ void seta2_state::pzlbowl_map(address_map &map) map(0x500005, 0x500005).rw(FUNC(seta2_state::pzlbowl_coins_r), FUNC(seta2_state::pzlbowl_coin_counter_w)); // Coins + Protection? map(0x500006, 0x500007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); map(0x700000, 0x700001).r(FUNC(seta2_state::pzlbowl_protection_r)); // Protection - map(0x800000, 0x83ffff).ram().share(m_spriteram); // Sprites - map(0x840000, 0x84ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0x860000, 0x86003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0x800000, 0x87ffff).m(*this, FUNC(seta2_state::video_map)); map(0x900000, 0x903fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound } @@ -383,7 +554,7 @@ void seta2_state::penbros_base_map(address_map &map) map(0x600005, 0x600005).w(FUNC(seta2_state::pzlbowl_coin_counter_w)); map(0x600006, 0x600007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); map(0xa00000, 0xa03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); - map(0xb00000, 0xb3ffff).ram().share("spriteram"); + map(0xb00000, 0xb3ffff).rw(m_video, FUNC(x1_020_dx_101_device::spriteram_r), FUNC(x1_020_dx_101_device::spriteram_w)); map(0xb40000, 0xb4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); } @@ -394,7 +565,7 @@ void seta2_state::penbros_map(address_map &map) map(0x500300, 0x500301).portr("DSW1"); map(0x500302, 0x500303).portr("DSW2"); map(0x500300, 0x50030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); - map(0xb60000, 0xb6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); + map(0xb60000, 0xb6003f).rw(m_video, FUNC(x1_020_dx_101_device::vregs_r), FUNC(x1_020_dx_101_device::vregs_w)); } void seta2_state::ablastb_map(address_map &map) @@ -457,9 +628,7 @@ void seta2_state::reelquak_map(address_map &map) map(0x400302, 0x400303).portr("DSW2"); // DSW 2 map(0x400300, 0x40030f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xc00000, 0xc3ffff).ram().share(m_spriteram); // Sprites - map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xc60000, 0xc6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0xc00000, 0xc7ffff).m(*this, FUNC(seta2_state::video_map)); } @@ -478,9 +647,7 @@ void seta2_state::namcostr_map(address_map &map) map(0x400006, 0x400007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)).nopw(); map(0x500001, 0x500001).rw(m_oki, FUNC(okim9810_device::read_status), FUNC(okim9810_device::write_command)); map(0x500003, 0x500003).w(m_oki, FUNC(okim9810_device::write_tmp_register)); - map(0x800000, 0x83ffff).ram().share(m_spriteram); // Sprites - map(0x840000, 0x84ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0x860000, 0x86003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0x800000, 0x87ffff).m(*this, FUNC(seta2_state::video_map)); } @@ -519,9 +686,7 @@ void seta2_state::samshoot_map(address_map &map) map(0x700005, 0x700005).w(FUNC(seta2_state::samshoot_coin_w)); // Coins map(0x700006, 0x700007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); // Watchdog? - map(0x800000, 0x83ffff).ram().share(m_spriteram); // Sprites - map(0x840000, 0x84ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0x860000, 0x86003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0x800000, 0x87ffff).m(*this, FUNC(seta2_state::video_map)); map(0x900000, 0x903fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound } @@ -569,8 +734,8 @@ void staraudi_state::camera_w(offs_t offset, uint8_t data, uint8_t mem_mask) // Tile RAM -#define TILE0 (0x7c000) -#define TILERAM(offset) ((uint16_t*)(memregion("sprites")->base() + TILE0 * 8*8 + (offset * 2 / 0x20000) * 2 + ((offset * 2) % 0x20000) / 2 * 8)) +static constexpr offs_t TILE0 = 0x7c000; +#define TILERAM(offset) ((uint16_t*)(m_video_region->base() + TILE0 * 8*8 + (offset * 2 / 0x20000) * 2 + ((offset * 2) & 0x1ffff) / 2 * 8)) uint16_t staraudi_state::tileram_r(offs_t offset) { @@ -580,9 +745,8 @@ uint16_t staraudi_state::tileram_r(offs_t offset) void staraudi_state::tileram_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(TILERAM(offset)); - int tile = TILE0 + ((offset * 2) % 0x20000) / (8*2); - for (int i = 0; m_gfxdecode->gfx(i); ++i) - m_gfxdecode->gfx(i)->mark_dirty(tile); + const int tile = TILE0 + ((offset * 2) & 0x1ffff) / (8*2); + m_video->gfx(0)->mark_dirty(tile); } void staraudi_state::staraudi_map(address_map &map) @@ -613,10 +777,7 @@ void staraudi_state::staraudi_map(address_map &map) map(0x800000, 0x9fffff).rw(m_flash, FUNC(intelfsh16_device::read), FUNC(intelfsh16_device::write)); map(0xb00000, 0xb03fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xc00000, 0xc3ffff).ram().share("spriteram"); // Sprites - map(0xc40000, 0xc4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xc50000, 0xc5ffff).ram(); // cleared - map(0xc60000, 0xc6003f).ram().w(FUNC(staraudi_state::vregs_w)).share(m_vregs); // Video Registers + map(0xc00000, 0xc7ffff).m(*this, FUNC(staraudi_state::video_map)); } @@ -669,278 +830,13 @@ void seta2_state::telpacfl_map(address_map &map) map(0x70000d, 0x70000d).w(FUNC(seta2_state::telpacfl_lamp2_w)); // "" map(0x800001, 0x800001).w(FUNC(seta2_state::telpacfl_lockout_w)); // Coin Blockers map(0x900000, 0x903fff).rw("x1snd", FUNC(x1_010_device::word_r), FUNC(x1_010_device::word_w)); // Sound - map(0xb00000, 0xb3ffff).ram().share(m_spriteram); // Sprites - map(0xb40000, 0xb4ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0xb60000, 0xb6003f).ram().w(FUNC(seta2_state::vregs_w)).share(m_vregs); // Video Registers + map(0xb00000, 0xb7ffff).m(*this, FUNC(seta2_state::video_map)); map(0xd00006, 0xd00007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)); // map(0xe00000, 0xe00001).w(FUNC(seta2_state::)); map(0xe00010, 0xe0001f).w(FUNC(seta2_state::sound_bank_w)).umask16(0x00ff); // Samples Banks } -/*************************************************************************** - Funcube series -***************************************************************************/ - -// Touchscreen - -class funcube_touchscreen_device : public device_t, - public device_serial_interface -{ -public: - funcube_touchscreen_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - virtual ioport_constructor device_input_ports() const override ATTR_COLD; - auto tx_cb() { return m_tx_cb.bind(); } - -protected: - virtual void device_start() override ATTR_COLD; - virtual void device_reset() override ATTR_COLD; - - virtual void tra_complete() override; - virtual void tra_callback() override; - - TIMER_CALLBACK_MEMBER(read_buttons); - -private: - devcb_write_line m_tx_cb; - required_ioport m_x; - required_ioport m_y; - required_ioport m_btn; - - uint8_t m_button_state; - int m_serial_pos; - uint8_t m_serial[4]; -}; - -DEFINE_DEVICE_TYPE(FUNCUBE_TOUCHSCREEN, funcube_touchscreen_device, "funcube_touchscreen", "Funcube Touchscreen") - -static INPUT_PORTS_START( funcube_touchscreen ) - PORT_START("touch_btn") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME( "Touch Screen" ) - - PORT_START("touch_x") - PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_X ) PORT_MINMAX(0,0x5c+1) PORT_CROSSHAIR(X, -(1.0 * 0x05d/0x5c), -1.0/0x5c, 0) PORT_SENSITIVITY(45) PORT_KEYDELTA(5) PORT_REVERSE - - PORT_START("touch_y") - PORT_BIT( 0xff, 0x00, IPT_LIGHTGUN_Y ) PORT_MINMAX(0,0x46+1) PORT_CROSSHAIR(Y, -(0xf0-8.0)/0xf0*0x047/0x46, -1.0/0x46, 0) PORT_SENSITIVITY(45) PORT_KEYDELTA(5) PORT_REVERSE -INPUT_PORTS_END - -funcube_touchscreen_device::funcube_touchscreen_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : - device_t(mconfig, FUNCUBE_TOUCHSCREEN, tag, owner, clock), - device_serial_interface(mconfig, *this), - m_tx_cb(*this), - m_x(*this, "touch_x"), - m_y(*this, "touch_y"), - m_btn(*this, "touch_btn") -{ -} - -ioport_constructor funcube_touchscreen_device::device_input_ports() const -{ - return INPUT_PORTS_NAME(funcube_touchscreen); -} - -void funcube_touchscreen_device::device_start() -{ - set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1); - set_tra_rate(9600); - m_button_state = 0x00; - emu_timer *tm = timer_alloc(FUNC(funcube_touchscreen_device::read_buttons), this); - tm->adjust(attotime::from_ticks(1, clock()), 0, attotime::from_ticks(1, clock())); - - save_item(NAME(m_button_state)); - save_item(NAME(m_serial_pos)); - save_item(NAME(m_serial)); -} - -void funcube_touchscreen_device::device_reset() -{ - m_serial_pos = 0; - memset(m_serial, 0, sizeof(m_serial)); - m_tx_cb(1); -} - -TIMER_CALLBACK_MEMBER(funcube_touchscreen_device::read_buttons) -{ - const uint8_t button_state = m_btn->read(); - if (m_button_state != button_state) - { - m_button_state = button_state; - m_serial[0] = button_state ? 0xfe : 0xfd; - m_serial[1] = m_x->read(); - m_serial[2] = m_y->read(); - m_serial[3] = 0xff; - m_serial_pos = 0; - transmit_register_setup(m_serial[m_serial_pos++]); - } -} - -void funcube_touchscreen_device::tra_complete() -{ - if (m_serial_pos != 4) - transmit_register_setup(m_serial[m_serial_pos++]); -} - -void funcube_touchscreen_device::tra_callback() -{ - m_tx_cb(transmit_register_get_data_bit()); -} - - -// Main CPU - -uint16_t funcube_state::debug_r() -{ - uint16_t ret = m_in_debug->read(); - - // This bits let you move the crosshair in the inputs / touch panel test with a joystick - if (!(m_screen->frame_number() % 3)) - ret |= 0x3f; - - return ret; -} - -void funcube_state::funcube_map(address_map &map) -{ - map(0x00000000, 0x0007ffff).rom(); - map(0x00200000, 0x0020ffff).ram(); - - map(0x00400002, 0x00400003).r(FUNC(funcube_state::debug_r)); - map(0x00400006, 0x00400007).r("watchdog", FUNC(watchdog_timer_device::reset16_r)).nopw(); - - map(0x00500001, 0x00500001).rw(m_oki, FUNC(okim9810_device::read_status), FUNC(okim9810_device::write_command)); - map(0x00500003, 0x00500003).w(m_oki, FUNC(okim9810_device::write_tmp_register)); - - map(0x00800000, 0x0083ffff).rw(FUNC(funcube_state::spriteram_r), FUNC(funcube_state::spriteram_w)); - map(0x00840000, 0x0084ffff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // Palette - map(0x00860000, 0x0086003f).rw(FUNC(funcube_state::vregs_r), FUNC(funcube_state::vregs_w)); - - map(0x00c00000, 0x00c002ff).rw(FUNC(funcube_state::nvram_r), FUNC(funcube_state::nvram_w)).umask32(0x00ff00ff); -} - -void funcube_state::funcube2_map(address_map &map) -{ - map(0x00000000, 0x0007ffff).rom(); - map(0x00200000, 0x0020ffff).ram(); - - map(0x00500002, 0x00500003).r(FUNC(funcube_state::debug_r)); - map(0x00500004, 0x00500007).r("watchdog", FUNC(watchdog_timer_device::reset32_r)).nopw(); - - map(0x00600001, 0x00600001).rw(m_oki, FUNC(okim9810_device::read_status), FUNC(okim9810_device::write_command)); - map(0x00600003, 0x00600003).w(m_oki, FUNC(okim9810_device::write_tmp_register)); - - map(0x00800000, 0x0083ffff).rw(FUNC(funcube_state::spriteram_r), FUNC(funcube_state::spriteram_w)); - map(0x00840000, 0x0084ffff).ram().w(m_palette, FUNC(palette_device::write32)).share("palette"); - map(0x00860000, 0x0086003f).rw(FUNC(funcube_state::vregs_r), FUNC(funcube_state::vregs_w)); - - map(0x00c00000, 0x00c002ff).rw(FUNC(funcube_state::nvram_r), FUNC(funcube_state::nvram_w)).umask32(0x00ff00ff); - -// map(0xf0000000, 0xf00001ff).rw("maincpu_onboard", FUNC(mcf5206e_peripheral_device::seta2_coldfire_regs_r), FUNC(mcf5206e_peripheral_device::seta2_coldfire_regs_w)); // technically this can be moved with MBAR - map(0xffffe000, 0xffffffff).ram(); // SRAM -} - -// Sub CPU - -void funcube_state::funcube_sub_map(address_map &map) -{ - map(0x000000, 0x01ffff).rom(); - map(0x200000, 0x20017f).rw(FUNC(funcube_state::nvram_r), FUNC(funcube_state::nvram_w)).umask16(0xffff); -} - - - - -// Simulate coin drop through two sensors - -static constexpr XTAL FUNCUBE_SUB_CPU_CLOCK = XTAL(14'745'600); - -uint8_t funcube_state::coins_r() -{ - uint8_t ret = m_in_switch->read(); - uint8_t coin_bit0 = 1; // active low - uint8_t coin_bit1 = 1; - - const uint8_t hopper_bit = (m_hopper_motor && !(m_screen->frame_number() % 20)) ? 1 : 0; - - const uint64_t coin_total_cycles = FUNCUBE_SUB_CPU_CLOCK.value() / (1000/10); - - if (m_coin_start_cycles) - { - const uint64_t elapsed = m_sub->total_cycles() - m_coin_start_cycles; - - if (elapsed < coin_total_cycles/2) - coin_bit0 = 0; - else if (elapsed < coin_total_cycles) - coin_bit1 = 0; - else - { - if (!machine().side_effects_disabled()) - m_coin_start_cycles = 0; - } - } - else - { - if (!machine().side_effects_disabled()) - { - if (!(ret & 1)) - m_coin_start_cycles = m_sub->total_cycles(); - } - } - - return (ret & ~7) | (hopper_bit << 2) | (coin_bit1 << 1) | coin_bit0; -} - -void funcube_state::funcube_debug_outputs() -{ - //LOGDEBUG("LED: %02x OUT: %02x\n", m_funcube_leds, m_outputs); -} - -void funcube_state::leds_w(uint8_t data) -{ - m_funcube_leds = data; - - m_leds[0] = BIT(~data, 0); // win lamp (red) - m_leds[1] = BIT(~data, 1); // win lamp (green) - - // Set in a moving pattern: 0111 -> 1011 -> 1101 -> 1110 - m_leds[2] = BIT(~data, 4); - m_leds[3] = BIT(~data, 5); - m_leds[4] = BIT(~data, 6); - m_leds[5] = BIT(~data, 7); - - funcube_debug_outputs(); -} - -uint8_t funcube_state::outputs_r() -{ - // Bits 1,2,3 read - return m_outputs; -} - -void funcube_state::outputs_w(uint8_t data) -{ - m_outputs = data; - - // Bits 0,1,3 written - - // Bit 0: hopper motor - m_hopper_motor = BIT(~data, 0); - - // Bit 1: high on pay out - - // Bit 3: low after coining up, blinks on pay out - m_leds[6] = BIT(~data, 3); - - funcube_debug_outputs(); -} - -uint8_t funcube_state::battery_r() -{ - return m_in_battery->read() ? 0x40 : 0x00; -} - - /*************************************************************************** Input Ports @@ -2148,62 +2044,6 @@ static INPUT_PORTS_START( telpacfl ) INPUT_PORTS_END -/*************************************************************************** - Funcube series -***************************************************************************/ - -static INPUT_PORTS_START( funcube ) - PORT_START("SWITCH") // c00030.l - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin solenoid 1 - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_CUSTOM ) // coin solenoid 2 - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) // hopper sensor - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // game select - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME( "Reset Key" ) - PORT_SERVICE( 0x40, IP_ACTIVE_LOW ) - PORT_SERVICE( 0x80, IP_ACTIVE_LOW ) - - PORT_START("BATTERY") - PORT_DIPNAME( 0x10, 0x10, "Battery" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - - PORT_START("DEBUG") - // 500002.w - PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2) - PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) - PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) - PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) - PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) - - // 500000.w - PORT_DIPNAME( 0x00010000, 0x00000000, "Debug 0" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00010000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00020000, 0x00000000, "Debug 1" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00020000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00040000, 0x00000000, "Debug 2" ) // Touch-Screen - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00040000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00080000, 0x00000000, "Debug 3" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00080000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00100000, 0x00000000, "Debug 4" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00100000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00200000, 0x00000000, "Debug 5" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00200000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00400000, 0x00000000, "Debug 6" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00400000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00800000, 0x00000000, "Debug 7" ) - PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00800000, DEF_STR( On ) ) -INPUT_PORTS_END - static INPUT_PORTS_START( blnctry ) PORT_START("DSW") PORT_SERVICE( 0x01, IP_ACTIVE_LOW) @@ -2242,32 +2082,6 @@ INPUT_PORTS_END -/*************************************************************************** - - - Graphics Layouts - - -***************************************************************************/ - -static const gfx_layout tile_layout = -{ - 8,8, - RGN_FRAC(1,1), - 8, - { STEP8(7*8, -8) }, - { STEP8(0, 1) }, - { STEP8(0, 8*8) }, - 8*8*8 -}; - - -/* Tiles are 8bpp, but the hardware is additionally able to discard - some bitplanes and use the low 4 bits only, or the high 4 bits only */ -static GFXDECODE_START( gfx_seta2 ) - GFXDECODE_ENTRY( "sprites", 0, tile_layout, 0, 0x8000/16 ) // 8bpp, but 4bpp color granularity -GFXDECODE_END - /*************************************************************************** Machine Drivers @@ -2286,15 +2100,22 @@ void seta2_state::seta2(machine_config &config) m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); m_screen->set_size(0x200, 0x100); m_screen->set_visarea(0x00, 0x180-1, 0x00, 0xf0-1); - m_screen->set_screen_update(FUNC(seta2_state::screen_update)); - m_screen->screen_vblank().set(FUNC(seta2_state::screen_vblank)); + m_screen->set_screen_update(m_video, FUNC(x1_020_dx_101_device::screen_update)); + m_screen->screen_vblank().set(m_video, FUNC(x1_020_dx_101_device::screen_vblank)); m_screen->screen_vblank().append_inputline(m_maincpu, 0); m_screen->set_palette(m_palette); //m_screen->set_video_attributes(VIDEO_UPDATE_SCANLINE); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_seta2); PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x8000+0xf0); // extra 0xf0 because we might draw 256-color object with 16-color granularity + X1_020_DX_101(config, m_video, XTAL(50'000'000)); + m_video->set_palette(m_palette); + m_video->set_screen(m_screen); + m_video->raster_irq_callback().set_inputline(m_maincpu, 1, HOLD_LINE); + m_video->flip_screen_callback().set(FUNC(seta2_state::flip_screen_set)); + m_video->flip_screen_x_callback().set(FUNC(seta2_state::flip_screen_x_set)); + m_video->flip_screen_y_callback().set(FUNC(seta2_state::flip_screen_y_set)); + // sound hardware SPEAKER(config, "mono").front_center(); @@ -2404,6 +2225,8 @@ void seta2_state::ablastb(machine_config &config) M68000(config.replace(), m_maincpu, XTAL(16'000'000)); // TMP68HC000P-16 m_maincpu->set_addrmap(AS_PROGRAM, &seta2_state::ablastb_map); m_maincpu->set_vblank_int("screen", FUNC(seta2_state::irq2_line_hold)); + + m_video->raster_irq_callback().set_nop(); // used? } void seta2_state::reelquak(machine_config &config) @@ -2445,8 +2268,7 @@ void staraudi_state::staraudi(machine_config &config) // video hardware m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate m_screen->set_visarea(0x00, 0x140-1, 0x000, 0x0f0-1); - - m_gfxdecode->set_info(gfx_seta2); + m_screen->set_screen_update(FUNC(staraudi_state::screen_update)); } @@ -2467,88 +2289,6 @@ void seta2_state::telpacfl(machine_config &config) } -/*************************************************************************** - Funcube series -***************************************************************************/ - -void funcube_state::machine_start() -{ - seta2_state::machine_start(); - save_item(NAME(m_coin_start_cycles)); - save_item(NAME(m_hopper_motor)); - save_item(NAME(m_outputs)); - save_item(NAME(m_funcube_leds)); - -} - -void funcube_state::machine_reset() -{ - m_coin_start_cycles = 0; - m_hopper_motor = 0; - m_outputs = 0; - m_funcube_leds = 0; -} - -// original on EVA board, no Coldfire -void funcube_state::funcube(machine_config &config) -{ - // TODO: check exact type and clock - TMP68301(config, m_maincpu, XTAL(50'000'000)/3); - m_maincpu->set_addrmap(AS_PROGRAM, &funcube_state::funcube_map); - - H83007(config, m_sub, FUNCUBE_SUB_CPU_CLOCK); - m_sub->set_addrmap(AS_PROGRAM, &funcube_state::funcube_sub_map); - m_sub->read_port4().set(FUNC(funcube_state::battery_r)); - m_sub->read_port7().set(FUNC(funcube_state::coins_r)); - m_sub->read_porta().set(FUNC(funcube_state::outputs_r)); - m_sub->write_porta().set(FUNC(funcube_state::outputs_w)); - m_sub->write_portb().set(FUNC(funcube_state::leds_w)); - - FUNCUBE_TOUCHSCREEN(config, "touchscreen", 200).tx_cb().set(m_sub, FUNC(h8_device::sci_rx_w<1>)); - - NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - - WATCHDOG_TIMER(config, "watchdog"); - - // video hardware - SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate - m_screen->set_size(0x200, 0x200); - m_screen->set_visarea(0x0+1, 0x140-1+1, 0x00, 0xf0-1); - m_screen->set_screen_update(FUNC(funcube_state::screen_update)); - m_screen->screen_vblank().set(FUNC(funcube_state::screen_vblank)); - m_screen->screen_vblank().append_inputline(m_maincpu, 0); - m_screen->set_palette(m_palette); - - GFXDECODE(config, m_gfxdecode, m_palette, gfx_seta2); - PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x8000+0xf0); // extra 0xf0 because we might draw 256-color object with 16-color granularity - - // sound hardware - SPEAKER(config, "speaker", 2).front(); - - OKIM9810(config, m_oki, XTAL(4'096'000)); - m_oki->add_route(0, "speaker", 0.80, 0); - m_oki->add_route(1, "speaker", 0.80, 1); -} - - -void funcube_state::funcube2(machine_config &config) -{ - funcube(config); - MCF5206E(config.replace(), m_maincpu, XTAL(25'447'000)); - m_maincpu->set_addrmap(AS_PROGRAM, &funcube_state::funcube2_map); - downcast(*m_maincpu).gpio_r_cb().set_ioport("BATTERY"); - - m_sub->read_port4().set([]() -> u8 { return 0; }); // unused - - // video hardware - m_screen->set_visarea(0x0, 0x140-1, 0x00, 0xf0-1); - m_screen->screen_vblank().set(FUNC(funcube_state::screen_vblank)); - m_screen->screen_vblank().append_inputline(m_maincpu, 1); -} - - void seta2_state::namcostr(machine_config &config) { TMP68301(config, m_maincpu, XTAL(50'000'000)/3); @@ -2565,14 +2305,21 @@ void seta2_state::namcostr(machine_config &config) m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(0)); m_screen->set_size(0x200, 0x200); m_screen->set_visarea(0x01, 0x140, 0x00, 0xf0-1); - m_screen->set_screen_update(FUNC(seta2_state::screen_update)); - m_screen->screen_vblank().set(FUNC(seta2_state::screen_vblank)); + m_screen->set_screen_update(m_video, FUNC(x1_020_dx_101_device::screen_update)); + m_screen->screen_vblank().set(m_video, FUNC(x1_020_dx_101_device::screen_vblank)); m_screen->screen_vblank().append_inputline(m_maincpu, 0); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_seta2); PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x8000+0xf0); // extra 0xf0 because we might draw 256-color object with 16-color granularity + X1_020_DX_101(config, m_video, XTAL(50'000'000)); + m_video->set_palette(m_palette); + m_video->set_screen(m_screen); + m_video->raster_irq_callback().set_inputline(m_maincpu, 1, HOLD_LINE); + m_video->flip_screen_callback().set(FUNC(seta2_state::flip_screen_set)); + m_video->flip_screen_x_callback().set(FUNC(seta2_state::flip_screen_x_set)); + m_video->flip_screen_y_callback().set(FUNC(seta2_state::flip_screen_y_set)); + // sound hardware SPEAKER(config, "speaker", 2).front(); @@ -2590,240 +2337,16 @@ void seta2_state::namcostr(machine_config &config) /*************************************************************************** -FUNCUBE -EVA2E PCB - -It's the same PCB as Namco Stars (P0-140B). It's a lot more complicated to dump -than the others because there are several surface mounted flash ROMs spread across -multiple daughterboards instead of simple socketed 32M DIP42 mask roms all on one PCB. - -***************************************************************************/ - -ROM_START( funcube ) - ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code - ROM_LOAD( "fcu1_prg0-f.u08", 0x00000, 0x80000, CRC(57f4f340) SHA1(436fc66409b254aba68ae33fc994bc270ce803a6) ) - - ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code - ROM_LOAD( "fcu_0_iopr-0b.1b", 0x00000, 0x20000, CRC(87e3690f) SHA1(1b9dc573de31543884678df2dba2d6a74d6a2496) ) - - ROM_REGION( 0x800000, "sprites", 0 ) - ROM_LOAD32_BYTE( "fcu1_obj-0a.u12", 0x000000, 0x200000, CRC(908b6baf) SHA1(cb5aa8c9b16abb17d8cc16d0d3b2f690a48ee503) ) - ROM_LOAD32_BYTE( "fcu1_obj-0a.u13", 0x000001, 0x200000, CRC(8c31ca21) SHA1(e497ab1d7d30b41928a0c3db1ea7c3420376ad8c) ) - ROM_LOAD32_BYTE( "fcu1_obj-0a.u14", 0x000002, 0x200000, CRC(4298d599) SHA1(d245206bc78de5f17da85ae6063b662cf9cf67aa) ) - ROM_LOAD32_BYTE( "fcu1_obj-0a.u15", 0x000003, 0x200000, CRC(0669c78e) SHA1(0158fc4f90efa12d795b97873b8646c352864c69) ) - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) - ROM_LOAD( "fcu1_snd-0a.u40", 0x000000, 0x200000, CRC(448539bc) SHA1(9e53bd5e29d1a88bf634e58bfeebccd3a1c2d866) ) -ROM_END - -/*************************************************************************** - - FUNCUBE (BET) Series PCB for chapters 2 through 5 - -PCB Number: B0-006B (also known as EVA3_A system and is non-JAMMA) -+------------------------------------------------+ -|+--+ S +---+ +---+ CN5 | -|| | W | | | | CN6?| -|| | 4 | U | | U | | -|| | | 4 | | 4 | +---+ CN2?| -|| | | 2 | | 3 | |DX | | -|| | | | | | |102| | -||C | | | | | +---+ | -||N | +---+ +---+ | -||4 | | -|| | +----------+ M1 | -|| | M3 | | C | -|| | | NEC | M1 N | -|| | M3 | DX-101 | 3 | -|| | | | | -|| | | | 50MHz | -|+--+ +----------+ | -| PIC 25.447MHz +-----------+ | -| CN7 | U47 | | -| +-----------+ | -| +-----------+ +---+ +---+ D | -| | U3 | |OKI| |DX | S | -| M2 +-----------+ | | |102| W | -| +---+ +---+ 1 | -| ispLSI2032 | -| M1 +---+ | -| +----------+ |IDT| +--+| -| | | C | | | || -| C | ColdFire | N +---+ | || -| N M2 | XCF5206E | 8 | || -| 1 | | +---+ |C || -| | | |H8 | |N || -| M1 +----------+ +---+ D |9 || -| 14.7456MHz S | || -| +-----------+W | || -| SW1 BAT1 | U49 |2 +--+| -| +-----------+ | -+------------------------------------------------+ - - CPU: ColdFire XCF5206EFT54 (160 Pin PQFP) - Hitachi H8/3007 (64130007F20) used for touch screen I/O - Video: NEC DX-101 (240 Pin PQFP) - NEC DX-102 (52 Pin PQFP x2) - Sound: OKI MSM9810B 8-Channel Mixing ADPCM Type Voice Synthesis LSI - OSC: 50MHz, 25.447MHz & 14.7456MHz - Other: Lattice ispLSI2032 - stamped "EVA3A" - BAT1 - CR2032 3Volt - -ColdFire XCF5206EFT54: - 68K/ColdFire V2 core family - 8K internal SRAM - 54MHz (max) Bus Frequency - 32bit External Bus Width - 2 UART Serial Interfaces - 2 Timer Channels - -PIC - PIC12C508 MCU used for security - Labeled FC21A for Funcube 2 - Labeled FC41A for Funcube 4 - -Ram M1 are Toshiba TC55257DFL-70L -Ram M2 are NEC D43001GU-70L -Ram M3 are ISSI IS62C1024L-70Q -IDT - IDT 7130 64-pin TQFP High-speed 1K x 8 Dual-Port Static RAM - -CN1 - Unused 64 pin double row connecter -CN2? 2x2 connecter -CN3 - Unused 50 pin double row connecter -CN4 - 96 pin triple row connecter -CN5 - 2x3 pin connecter -CN6? 3x3 connecter -CN7 - Unused 20 pin connecter -CN8 - 8 pin single row connecter -CN9 - 40 pin double row connecter - -DSW1 - 8 position dipswitch -DSW2 - 2 position dipswitch -SW1 - Pushbutton -SW4 - Single position slider switch - -U3 - Is a 27C4002 EPROM -U49 - Is a 27C1001 EPROM -U42, U43 & U47 are mask ROMs read as 27C322 - -The same H8/3007 code "FC21 IOPR-0" at U49 is used for FUNCUBE 2,3,4 & 5 - -"15.5846kHz hsync, vsync between 60-61Hz (can't split the csync)" - -***************************************************************************/ - -ROM_START( funcube2 ) - ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code - ROM_LOAD( "fc21_prg-0b.u3", 0x00000, 0x80000, CRC(add1c8a6) SHA1(bf91518da659098a4bad4e756533525fcc910570) ) - - ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code - ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) - - ROM_REGION( 0x300, "pic", 0 ) // PIC12C508? Code - ROM_LOAD( "fc21a.u57", 0x000, 0x300, NO_DUMP ) - - ROM_REGION( 0x800000, "sprites", 0 ) - ROM_LOAD32_WORD( "fc21_obj-0.u43", 0x000000, 0x400000, CRC(08cfe6d9) SHA1(d10f362dcde01f7a9855d8f76af3084b5dd1573a) ) - ROM_LOAD32_WORD( "fc21_obj-1.u42", 0x000002, 0x400000, CRC(4c1fbc20) SHA1(ff83691c19ce3600b31c494eaec26d2ac79e0028) ) - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) - ROM_LOAD( "fc21_voi0.u47", 0x000000, 0x200000, CRC(4a49370a) SHA1(ac10e2c25626965b49475767ef5a0ec3ba9a2d01) ) -ROM_END - -ROM_START( funcube3 ) - ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code - ROM_LOAD( "fc31_prg-0a.u4", 0x00000, 0x80000, CRC(ed7d70dd) SHA1(4ebfca9e60ab5e8de22821f0475abf515c83ce53) ) - - ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code - ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) - - ROM_REGION( 0x400, "pic", 0 ) // PIC12C508? Code - ROM_LOAD( "fc31a.u57", 0x000, 0x400, NO_DUMP ) - - ROM_REGION( 0x800000, "sprites", 0 ) - ROM_LOAD32_WORD( "fc31_obj-0.u43", 0x000000, 0x400000, CRC(08c5eb6f) SHA1(016d8f3067db487ccd47188142743897c9722b1f) ) - ROM_LOAD32_WORD( "fc31_obj-1.u42", 0x000002, 0x400000, CRC(4dadc76e) SHA1(cf82296b38dc22a618fd178816316af05f2459b3) ) - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) - ROM_LOAD( "fc31_snd-0.u47", 0x000000, 0x200000, CRC(36b03769) SHA1(20e583359421e0933c781a487fe5f7220052a6d4) ) -ROM_END - -ROM_START( funcube4 ) - ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code - ROM_LOAD( "fc41_prg-0.u3", 0x00000, 0x80000, CRC(ef870874) SHA1(dcb8dc3f780ca135df55e4b4f3c95620597ad28f) ) - - ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code - ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) - - ROM_REGION( 0x300, "pic", 0 ) // PIC12C508? Code - ROM_LOAD( "fc41a", 0x000, 0x300, NO_DUMP ) - - ROM_REGION( 0x800000, "sprites", 0 ) - ROM_LOAD32_WORD( "fc41_obj-0.u43", 0x000000, 0x400000, CRC(9ff029d5) SHA1(e057f4929aa745ecaf9d4ff7e39974c82e440146) ) - ROM_LOAD32_WORD( "fc41_obj-1.u42", 0x000002, 0x400000, CRC(5ab7b087) SHA1(c600158b2358cdf947357170044dda2deacd4f37) ) - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) - ROM_LOAD( "fc41_snd0.u47", 0x000000, 0x200000, CRC(e6f7d2bc) SHA1(638c73d439eaaff8097cb0aa2684f9f7111bcade) ) -ROM_END - -ROM_START( funcube5 ) - ROM_REGION( 0x80000, "maincpu", 0 ) // XCF5206 Code - ROM_LOAD( "fc51_prg-0.u4", 0x00000, 0x80000, CRC(4e34c2d8) SHA1(1ace4f6edab291e69e5c36b15193fba62f4a6773) ) - - ROM_REGION( 0x20000, "sub", 0 ) // H8/3007 Code - ROM_LOAD( "fc21_iopr-0.u49", 0x00000, 0x20000, CRC(314555ef) SHA1(b17e3926c8ef7f599856c198c330d2051aae13ad) ) - - ROM_REGION( 0x300, "pic", 0 ) // PIC12C508? Code - ROM_LOAD( "fc51a.u57", 0x000, 0x300, NO_DUMP ) - - ROM_REGION( 0x800000, "sprites", 0 ) - ROM_LOAD32_WORD( "fc51_obj-0.u43", 0x000000, 0x400000, CRC(116624b3) SHA1(c0b3dbe0ea4a0808222616c3ef77b2d1194a970a) ) - ROM_LOAD32_WORD( "fc51_obj-1.u42", 0x000002, 0x400000, CRC(35c6ec61) SHA1(424c9b66a2cdd5217d8a577d0179d1228112ee5b) ) - - ROM_REGION( 0x1000000, "oki", ROMREGION_ERASE00 ) - ROM_LOAD( "fc51_snd-0.u47", 0x000000, 0x200000, CRC(2a504fe1) SHA1(911ad650bf48aa78d9cb3c64284aa526ceb519ba) ) -ROM_END - -void funcube_state::init_funcube() -{ -// uint16_t *main_cpu = (uint16_t *) memregion("maincpu")->base(); -// -// main_cpu[0x064/2] = 0x0000; -// main_cpu[0x066/2] = 0x042a; // PIC protection? - -} - -void funcube_state::init_funcube2() -{ - uint32_t *main_cpu = (uint32_t *) memregion("maincpu")->base(); - - main_cpu[0xa5c/4] = 0x4e713e3c; // PIC protection? - main_cpu[0xa74/4] = 0x4e713e3c; - main_cpu[0xa8c/4] = 0x4e7141f9; - -} - -void funcube_state::init_funcube3() -{ - uint32_t *main_cpu = (uint32_t *) memregion("maincpu")->base(); - - main_cpu[0x008bc/4] = 0x4a804e71; - main_cpu[0x19f0c/4] = 0x4e714e71; - main_cpu[0x19fb8/4] = 0x4e714e71; - -} - -/*************************************************************************** - Guardians Banpresto, 1995 CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP, @ U10) - NEC DX-102 (52 Pin PQFP x2, @ U28 & U45) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz Other: 8 Position Dipswitch x 2 GAL 16V8 at U38 + NEC DX-102 (52 Pin PQFP x2, @ U28 & U45) Memory: M1 are HM628128LFP-10L at U42 & U43 @@ -2996,7 +2519,7 @@ ROM_START( grdians ) // P-FG01-1 PCB ROM_LOAD16_BYTE( "u4.bin", 0x100000, 0x080000, CRC(bb52447b) SHA1(61433f683210ab2bc2cf1cc4b5b7a39cc5b6493d) ) ROM_LOAD16_BYTE( "u5.bin", 0x100001, 0x080000, CRC(9c164a3b) SHA1(6d688c7af9e7e8e8d54b2e4dfbf41f59c79242eb) ) - ROM_REGION( 0x2000000, "sprites", ROMREGION_ERASE) // Sprites + ROM_REGION( 0x2000000, "video", ROMREGION_ERASE) // Sprites ROM_LOAD64_WORD( "u16.bin", 0x0000000, 0x400000, CRC(6a65f265) SHA1(6cad11f718f8bbcff464d41eb4717460769237ed) ) ROM_LOAD64_WORD( "u15.bin", 0x0000002, 0x400000, CRC(01672dcd) SHA1(f61f60e3343cc5b6ccee391ee529966a141566db) ) ROM_LOAD64_WORD( "u18.bin", 0x0000004, 0x400000, CRC(967babf4) SHA1(42a6311576417c44aeaceb8ba6bb3cd7794e4882) ) @@ -3021,7 +2544,7 @@ ROM_START( grdiansa ) // P0-113A PCB ROM_LOAD16_BYTE( "ka2_001_002.u4", 0x100000, 0x080000, CRC(bb52447b) SHA1(61433f683210ab2bc2cf1cc4b5b7a39cc5b6493d) ) ROM_LOAD16_BYTE( "ka2_001_003.u5", 0x100001, 0x080000, CRC(9c164a3b) SHA1(6d688c7af9e7e8e8d54b2e4dfbf41f59c79242eb) ) - ROM_REGION( 0x2000000, "sprites", ROMREGION_ERASE) // Sprites + ROM_REGION( 0x2000000, "video", ROMREGION_ERASE) // Sprites ROM_LOAD64_WORD( "ka2-001-010.u18", 0x0800000, 0x200000, CRC(b3e6e95f) SHA1(c61d3def136f4bb6c5857740b0fbea64a98dd1dc) ) ROM_LOAD64_WORD( "ka2-001-013.u17", 0x0800002, 0x200000, CRC(9f7feb13) SHA1(0b3010faf87fb5bfe55101e5eabecec6107bf42f) ) ROM_LOAD64_WORD( "ka2-001-007.u22", 0x0800004, 0x200000, CRC(d1035051) SHA1(0bc8871b91e777009002e340e1cef92487234271) ) @@ -3039,7 +2562,7 @@ ROM_START( grdiansbl ) // bootleg PCB based on the P-FG01-1 PCB, still has the X ROM_REGION( 0x200000, "maincpu", 0 ) // TMP68301 Code ROM_LOAD16_WORD_SWAP( "p1.u4", 0x000000, 0x200000, CRC(4ba24d02) SHA1(97a7f36de772f005c8f377b1fb72fe4a57204158) ) // read as 27C160 - ROM_REGION( 0x2000000, "sprites", ROMREGION_ERASE) + ROM_REGION( 0x2000000, "video", ROMREGION_ERASE) ROM_LOAD64_WORD( "u16.u16", 0x1000000, 0x200000, CRC(d24e007f) SHA1(fff8ca16f682a16094eb1e019f69025ce1992b44) ) ROM_CONTINUE( 0x0800000, 0x200000 ) ROM_LOAD64_WORD( "u15.u15", 0x1000002, 0x200000, CRC(2a92b8de) SHA1(ec723bf5c25cea57d146386d3d04a67bfd1e67d2) ) @@ -3127,7 +2650,7 @@ ROM_START( gundamex ) ROM_LOAD16_BYTE( "ka_002_003.u5", 0x100001, 0x080000, CRC(946185aa) SHA1(524911c4c510d6c3e17a7ab42c7077c2fffbf06b) ) ROM_LOAD16_WORD_SWAP( "ka-001-005.u77", 0x500000, 0x080000, CRC(f01d3d00) SHA1(ff12834e99a76261d619f10d186f4b329fb9cb7a) ) - ROM_REGION( 0x2000000, "sprites", ROMREGION_ERASE00) // Sprites + ROM_REGION( 0x2000000, "video", ROMREGION_ERASE00) // Sprites ROM_LOAD64_WORD( "ka-001-009.u16", 0x0000000, 0x200000, CRC(997d8d93) SHA1(4cb4cdb7e8208af4b14483610d9d6aa5e13acd89) ) ROM_LOAD64_WORD( "ka-001-012.u15", 0x0000002, 0x200000, CRC(b789e4a8) SHA1(400b773f24d677a9d47466fdbbe68cb6efc1ad37) ) ROM_LOAD64_WORD( "ka-001-006.u21", 0x0000004, 0x200000, CRC(6aac2f2f) SHA1(fac5478ca2941a93c57f670a058ff626e537bcde) ) @@ -3167,7 +2690,7 @@ ROM_START( mj4simai ) ROM_LOAD16_BYTE( "hl.u4", 0x100000, 0x080000, CRC(226063b7) SHA1(1737baffc16ff7261f887911187ece96925fa6ff) ) ROM_LOAD16_BYTE( "hh.u5", 0x100001, 0x080000, CRC(23aaf8df) SHA1(b3d678afce4ddef32e48d690c6d07b723dd0c28f) ) - ROM_REGION( 0x2000000, "sprites", ROMREGION_ERASE00 ) // Sprites + ROM_REGION( 0x2000000, "video", ROMREGION_ERASE00 ) // Sprites ROM_LOAD64_WORD( "cha-03.u16", 0x0000000, 0x400000, CRC(d367429a) SHA1(b32c215ef85c3d0a4c5550cef4f5c4c0e7030b7c) ) ROM_LOAD64_WORD( "cha-05.u15", 0x0000002, 0x400000, CRC(e94ec40a) SHA1(2685dbc5680b5f76688c6b4fbe40ae682c525bfe) ) ROM_LOAD64_WORD( "cha-01.u21", 0x0000004, 0x400000, CRC(35f47b37) SHA1(4a8eb088890272f2a069e2c3f00fadf6421f7b0e) ) @@ -3186,12 +2709,12 @@ Kosodate Quiz My Angel (JPN Ver.) CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP, @ U10) - NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz Other: 8 Position Dipswitch x 2 Reset Push Button at SW1 GAL 16V8 at U38 + NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) Memory: M1 are HM628128LFP-10L at U42 & U43 @@ -3258,7 +2781,7 @@ ROM_START( myangel ) ROM_LOAD16_BYTE( "kq1-tble.u4", 0x100000, 0x080000, CRC(e332a514) SHA1(dfd255239c80c48c9865e70681b9ddd175b8bf55) ) ROM_LOAD16_BYTE( "kq1-tblo.u5", 0x100001, 0x080000, CRC(760cab15) SHA1(fa7ea85ec2ebfaab3111b8631ea6ea3d794d449c) ) - ROM_REGION( 0x1000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x1000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kq1-cg2.u20", 0x000000, 0x200000, CRC(80b4e8de) SHA1(c8685c4f4e3c0415ce0ec88e0288835e504cab00) ) ROM_LOAD64_WORD( "kq1-cg3.u19", 0x000002, 0x200000, CRC(9bdc35c9) SHA1(fd0a1eb3dd10705bce5462263667353632558b58) ) ROM_LOAD64_WORD( "kq1-cg6.u22", 0x000004, 0x200000, CRC(b25acf12) SHA1(5cca35921f3b376c3cc36f5b009eb845db2e1897) ) @@ -3294,7 +2817,7 @@ ROM_START( myangel2 ) ROM_LOAD16_BYTE( "kqs1e-tb.u4", 0x100000, 0x080000, CRC(e759b4cc) SHA1(4f806a144a47935b2710f8af800ec0d771f12a18) ) ROM_LOAD16_BYTE( "kqs1o-tb.u5", 0x100001, 0x080000, CRC(b6168737) SHA1(4c3de877c0c1dca1c43ac737a0bf231335237d3a) ) - ROM_REGION( 0x1800000, "sprites", 0 ) // Sprites + ROM_REGION( 0x1800000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kqs1-cg4.u20", 0x0000000, 0x200000, CRC(d1802241) SHA1(52c45a13d46f7ee8043e85b99d07b1765ca93dcc) ) ROM_LOAD64_WORD( "kqs1-cg5.u19", 0x0000002, 0x200000, CRC(d86cf19c) SHA1(da5a5b576ce107433605b24d8b9dcd0abd46bcde) ) ROM_LOAD64_WORD( "kqs1-cg6.u22", 0x0000004, 0x200000, CRC(3f08886b) SHA1(054546ae44ffa5d0973f4ead080fe720a340e144) ) @@ -3332,7 +2855,7 @@ ROM_START( namcostr ) ROM_REGION( 0x80000, "maincpu", 0 ) // TMP68301 Code ROM_LOAD( "ns1mpr0.u08", 0x00000, 0x80000, BAD_DUMP CRC(008d23fe) SHA1(8c77a34dd0285c06809e99d20b9d8b31b81bfc68) ) // FIXED BITS (xxxxx1xxxxxxxxxx) - ROM_REGION( 0x800000, "sprites", 0 ) + ROM_REGION( 0x800000, "video", 0 ) ROM_LOAD32_WORD( "ns1cha0.u39", 0x000000, 0x400000, BAD_DUMP CRC(372d1651) SHA1(355553992e5a474ae1e45bcdeb88804d5b75f802) ) // FIXED BITS (xxxxx1xxxxxxxxxx) ROM_LOAD32_WORD( "ns1cha1.u38", 0x000002, 0x400000, BAD_DUMP CRC(82e67809) SHA1(6b25726cd3683e1691e4d4e1628c13998f20933d) ) // FIXED BITS (xxxxx1xxxxxxxxxx) @@ -3374,7 +2897,7 @@ ROM_START( blnctry ) // same exact PCB as Namco Stars + M144 EMI-DRIVE daughter ROM_REGION( 0x10000, "sub", 0 ) // H8/3007 Code ROM_LOAD( "blt1spr-0.ic3", 0x00000, 0x10000, CRC(cec19b16) SHA1(bc8a95942c6990030cfc11c7ce9f649a7e9b226f) ) // 111xxxxxxxxxxxxx = 0xFF - ROM_REGION( 0x800000, "sprites", 0 ) + ROM_REGION( 0x800000, "video", 0 ) ROM_LOAD32_WORD( "blt1cg0.u39", 0x000000, 0x400000, CRC(d24e223e) SHA1(0c49bb4d3219036029a43fd3a08cd409d93b316f) ) ROM_LOAD32_WORD( "blt1cg1.u38", 0x000002, 0x400000, CRC(cd594a58) SHA1(ede40089183b15a1439777170763a21648ef0e2e) ) @@ -3390,11 +2913,11 @@ ROM_END CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP) - NEC DX-102 (52 Pin PQFP x3) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP) OSC: 50MHz & 32.53047MHz Other: 8 Position Dipswitch x 2 Reset Push Button at SW1 + NEC DX-102 (52 Pin PQFP x3) Lattice ispLSI2032 - stamped "KUDEC" PCB Number: P0-142A @@ -3462,7 +2985,7 @@ ROM_START( pzlbowl ) ROM_LOAD16_BYTE( "kup_u06_i03.u6", 0x000000, 0x080000, CRC(314e03ac) SHA1(999398e55161dd75570d418f4c9899e3bf311cc8) ) ROM_LOAD16_BYTE( "kup_u07_i03.u7", 0x000001, 0x080000, CRC(a0423a04) SHA1(9539023c5c2f2bf72ee3fb6105443ffd3d61e2f8) ) - ROM_REGION( 0x1000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x1000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kuc-u38-i00.u38", 0x000000, 0x400000, CRC(3db24172) SHA1(89c39963e15c53b799994185d0c8b2e795478939) ) ROM_LOAD64_WORD( "kuc-u39-i00.u39", 0x000002, 0x400000, CRC(9b26619b) SHA1(ea7a0bf46641d15353217b01e761d1a148bee4e7) ) ROM_LOAD64_WORD( "kuc-u40-i00.u40", 0x000004, 0x400000, CRC(7e49a2cf) SHA1(d24683addbc54515c33fb620ac500e6702bd9e17) ) @@ -3479,11 +3002,11 @@ Penguin Brothers / 轟天雷 (A-Blast) CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP) - NEC DX-102 (52 Pin PQFP x3) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP) OSC: 50MHz, 32.53047MHz & 28MHz Other: 8 Position Dipswitch x 2 Reset Push Button at SW1 + NEC DX-102 (52 Pin PQFP x3) Lattice ispLSI2032 PCB Number: P0-142A @@ -3549,7 +3072,7 @@ ROM_START( penbros ) // Genuine P0-142A PCB & original ROM labels ROM_LOAD16_BYTE( "a-blast_jpn_u06.u06", 0x000000, 0x080000, CRC(7bbdffac) SHA1(d5766cb171b8d2e4c04a6bae37181fa5ada9d797) ) ROM_LOAD16_BYTE( "a-blast_jpn_u07.u07", 0x000001, 0x080000, CRC(d50cda5f) SHA1(fc66f55f2070b447c5db85c948ce40adc37512f7) ) - ROM_REGION( 0x1000000, "sprites", ROMREGION_ERASE00 ) // Sprites + ROM_REGION( 0x1000000, "video", ROMREGION_ERASE00 ) // Sprites ROM_LOAD64_WORD( "a-blast_jpn_u38.u38", 0x000000, 0x400000, CRC(4247b39e) SHA1(f273931293beced312e02c870bf35e9cf0c91a8b) ) ROM_LOAD64_WORD( "a-blast_jpn_u39.u39", 0x000002, 0x400000, CRC(f9f07faf) SHA1(66fc4a9ad422fb384d2c775e43619137226898fc) ) ROM_LOAD64_WORD( "a-blast_jpn_u40.u40", 0x000004, 0x400000, CRC(dc9e0a96) SHA1(c2c8ccf9039ee0e179b08fdd2d37f29899349cda) ) @@ -3564,7 +3087,7 @@ ROM_START( ablast ) // Genuine P0-142A PCB & original ROM labels ROM_LOAD16_BYTE( "a-blast_twn_u06.u06", 0x000000, 0x080000, CRC(e62156d7) SHA1(509fd41a0109dc5c00d83250383d578fd75502f3) ) ROM_LOAD16_BYTE( "a-blast_twn_u07.u07", 0x000001, 0x080000, CRC(d4ddc16b) SHA1(63312ce9ec6dffb47aa6aed505f077f20713e5ac) ) - ROM_REGION( 0x1000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x1000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "a-blast_twn_u38.u38", 0x000000, 0x400000, CRC(090923da) SHA1(c1eaa8847fe183819af040d97d0e6d1cd9928991) ) ROM_LOAD64_WORD( "a-blast_twn_u39.u39", 0x000002, 0x400000, CRC(6bb17d83) SHA1(b53d8cfc3833df937b92993f9eca17c805c5f58d) ) ROM_LOAD64_WORD( "a-blast_twn_u40.u40", 0x000004, 0x400000, CRC(db94847d) SHA1(fd2e29a45bb0acbd9e709256c7fc27bdd64a6634) ) @@ -3578,7 +3101,7 @@ ROM_START( ablastb ) // bootleg PCB with standard 68000 instead of TMP68301 and ROM_REGION( 0x100000, "maincpu", 0 ) ROM_LOAD16_WORD_SWAP( "1.bin", 0x000000, 0x100000, CRC(4adbd826) SHA1(004e3d0d5cb44c00283bc02f6d727e023690226d) ) - ROM_REGION( 0x1000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x1000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "2.bin", 0x000000, 0x400000, CRC(090923da) SHA1(c1eaa8847fe183819af040d97d0e6d1cd9928991) ) ROM_LOAD64_WORD( "3.bin", 0x000002, 0x400000, CRC(6bb17d83) SHA1(b53d8cfc3833df937b92993f9eca17c805c5f58d) ) ROM_LOAD64_WORD( "4.bin", 0x000004, 0x400000, CRC(db94847d) SHA1(fd2e29a45bb0acbd9e709256c7fc27bdd64a6634) ) @@ -3594,12 +3117,12 @@ Reel'N Quake! CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP, @ U10) - NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz & 28MHz Other: 8 Position Dipswitch x 2 Reset Push Button at SW1 3.6V Battery at BT1 + NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) GAL 16V8 - labeled "KF-001" at U38 Memory: @@ -3683,7 +3206,7 @@ ROM_START( reelquak ) ROM_LOAD16_BYTE( "rq_ver1.05.u2", 0x00000, 0x80000, CRC(7740d7a4) SHA1(21c28db5d4d7eea5a2506cb51b58533eba28c2cb) ) // Should be KF00x002, x = revision ROM_LOAD16_BYTE( "rq_ver1.05.u3", 0x00001, 0x80000, CRC(8c78889e) SHA1(584ba123e9caafdbddc96a4d9b2b6f6994fa84b0) ) // Should be KF00x004, x = revision - ROM_REGION( 0x800000, "sprites", 0 ) // Sprites + ROM_REGION( 0x800000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kf-001-005_t42.u16", 0x000000, 0x200000, CRC(25e07d5c) SHA1(dd0818611f39be25dc6f0c737da4e79c6c0f9659) ) ROM_LOAD64_WORD( "kf-001-006_t43.u15", 0x000002, 0x200000, CRC(67e2ecc4) SHA1(35cdaf7fcd29e0229da104baced41fa7620dba3d) ) ROM_LOAD64_WORD( "kf-001-007_t44.u18", 0x000004, 0x200000, CRC(9daec83d) SHA1(07de144898deac5058d05466f29682d7840323b7) ) @@ -3703,12 +3226,12 @@ Endless Riches CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP, @ U10) - NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) OSC: 50MHz & 28MHz Other: 8 Position Dipswitch x 2 Reset Push Button at SW1 3.6V Battery at BT1 + NEC DX-102 (52 Pin PQFP x3, @ U28, U30 & U45) GAL 16V8 - labeled "KF-001" at U38 Memory: @@ -3779,7 +3302,7 @@ ROM_START( endrichs ) // Memory Test doesn't show version like the set below ROM_LOAD16_BYTE( "endless_riches_u2_prg_even_v1.21_9-1-99.u2", 0x00000, 0x80000, CRC(bae6456c) SHA1(edbf4dc01095b9882243acf2bc8aecab8d9a1414) ) // handwritten label: Endless Riches U2 PRG EVEN V1.21 9/1/99 ROM_LOAD16_BYTE( "endless_riches_u3_prg_odd_v1.21_9-1-99.u3", 0x00001, 0x80000, CRC(2b0529d6) SHA1(b85fc5d598081bc96ecdecb5663de698c4b95e27) ) // handwritten label: Endless Riches U3 PRG ODD V1.21 9/1/99 - ROM_REGION( 0x800000, "sprites", 0 ) // Sprites + ROM_REGION( 0x800000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kfc-u16-c00.u16", 0x000000, 0x200000, CRC(cbfe5e0f) SHA1(6c7c8088c43231997ac47ce05cf43c78c1fdad47) ) ROM_LOAD64_WORD( "kfc-u15-c00.u15", 0x000002, 0x200000, CRC(98e4c36c) SHA1(651be122b78f225d38878ae90776f66989440590) ) ROM_LOAD64_WORD( "kfc-u18-c00.u18", 0x000004, 0x200000, CRC(561ac136) SHA1(96da493157405a5d3d72b8cc3004abd3fa3eadfa) ) @@ -3797,7 +3320,7 @@ ROM_START( endrichsa ) ROM_LOAD16_BYTE( "kfp_u02_c12.u2", 0x00000, 0x80000, CRC(462341d2) SHA1(a88215d74469513f4239853f62d4dbbffe2aa83a) ) ROM_LOAD16_BYTE( "kfp_u03_c12.u3", 0x00001, 0x80000, CRC(2baee8d1) SHA1(f86920382c54a259adb1dee253859561746d215a) ) - ROM_REGION( 0x800000, "sprites", 0 ) // Sprites + ROM_REGION( 0x800000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kfc-u16-c00.u16", 0x000000, 0x200000, CRC(cbfe5e0f) SHA1(6c7c8088c43231997ac47ce05cf43c78c1fdad47) ) ROM_LOAD64_WORD( "kfc-u15-c00.u15", 0x000002, 0x200000, CRC(98e4c36c) SHA1(651be122b78f225d38878ae90776f66989440590) ) ROM_LOAD64_WORD( "kfc-u18-c00.u18", 0x000004, 0x200000, CRC(561ac136) SHA1(96da493157405a5d3d72b8cc3004abd3fa3eadfa) ) @@ -3815,7 +3338,7 @@ ROM_START( endrichsb ) ROM_LOAD16_BYTE( "kfp_u02_c11.u2", 0x00000, 0x80000, CRC(12613215) SHA1(b39526b13fdf6ce7d7ece664356a075f61fea368) ) ROM_LOAD16_BYTE( "kfp_u03_c11.u3", 0x00001, 0x80000, CRC(e32152eb) SHA1(2dbe413fc1fb84a88b3033ad567b743ca70e0d74) ) - ROM_REGION( 0x800000, "sprites", 0 ) // Sprites + ROM_REGION( 0x800000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "kfc-u16-c00.u16", 0x000000, 0x200000, CRC(cbfe5e0f) SHA1(6c7c8088c43231997ac47ce05cf43c78c1fdad47) ) ROM_LOAD64_WORD( "kfc-u15-c00.u15", 0x000002, 0x200000, CRC(98e4c36c) SHA1(651be122b78f225d38878ae90776f66989440590) ) ROM_LOAD64_WORD( "kfc-u18-c00.u18", 0x000004, 0x200000, CRC(561ac136) SHA1(96da493157405a5d3d72b8cc3004abd3fa3eadfa) ) @@ -3861,7 +3384,7 @@ ROM_START( staraudi ) ROM_LOAD16_BYTE( "su1_mpr3.u04", 0x100000, 0x80000, CRC(74e07efd) SHA1(6400983c90a28c7d8e091557b0a4102b21035ac8) ) ROM_LOAD16_BYTE( "su1_mpr1.u05", 0x100001, 0x80000, CRC(3feb93ec) SHA1(0900d9fb37c884c472b9858002713a2b8ba4e519) ) - ROM_REGION( 0x2000000, "sprites", ROMREGION_ERASE ) // Sprites + ROM_REGION( 0x2000000, "video", ROMREGION_ERASE ) // Sprites ROM_LOAD64_WORD( "su1_cg0.u16", 0x000000, 0x200000, CRC(64281c22) SHA1(3e2b00bd623915a8be7e21812ff96280d071d08f) ) ROM_LOAD64_WORD( "su1_cg1.u15", 0x000002, 0x200000, CRC(cd95be41) SHA1(c19c7e6212dab69b575c0e4ce1f7bc390abba67b) ) ROM_LOAD64_WORD( "su1_cg2.u18", 0x000004, 0x200000, CRC(63eeee49) SHA1(14a6d358f8a0e4572065c715507d730cf2b77571) ) @@ -3977,7 +3500,6 @@ PCB Number: B0-010A - This PCB is slightly revised for 2 player play CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: NEC DX-101 (240 Pin PQFP) - NEC DX-102 (52 Pin PQFP x3) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP) EEPROM: 93LC46BX (1K Low-power 64 x 16-bit organization serial EEPROM) OSC: 50MHz, 28MHz & 32.768kHz @@ -3986,6 +3508,7 @@ EEPROM: 93LC46BX (1K Low-power 64 x 16-bit organization serial EEPROM) Lattice isp1016E - stamped "GUN" (2 for PCB B0-010A, used for light gun input) NEC D4992 CMOS 8-Bit Parallel I/O Calendar Clock BAT1 - CR2032 3Volt + NEC DX-102 (52 Pin PQFP x3) Ram M1 are Toshiba TC55257DFL-70L Ram M2 are NEC D43001GU-70L @@ -4163,7 +3686,7 @@ ROM_START( deerhunt ) // Deer Hunting USA V4.3 (11/1/2000) - The "E05" breaks ve ROM_LOAD16_BYTE( "as0906_e05_u6_694e.u06", 0x000000, 0x100000, CRC(20c81f17) SHA1(d41d93d6ee88738cec55f7bf3ce6be1dbec68e09) ) // checksum 694E printed on label ROM_LOAD16_BYTE( "as0907_e05_u7_5d89.u07", 0x000001, 0x100000, CRC(1731aa2a) SHA1(cffae7a99a7f960a62ef0c4454884df17a93c1a6) ) // checksum 5D89 printed on label - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4178,7 +3701,7 @@ ROM_START( deerhunta ) // Deer Hunting USA V4.2 (xx/x/2000) ROM_LOAD16_BYTE( "as0906_e04_u6_6640.u06", 0x000000, 0x100000, CRC(bb3af36f) SHA1(f04071347e8ad361bf666fcb6c0136e522f19d47) ) // checksum 6640 printed on label ROM_LOAD16_BYTE( "as0907_e04_u7_595a.u07", 0x000001, 0x100000, CRC(83f02117) SHA1(70fc2291bc93af3902aae88688be6a8078f7a07e) ) // checksum 595A printed on label - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4193,7 +3716,7 @@ ROM_START( deerhuntb ) // Deer Hunting USA V4.0 (6/15/2000) ROM_LOAD16_BYTE( "as_0906_e04.u06", 0x000000, 0x100000, CRC(07d9b64a) SHA1(f9aac644aab920bbac84b14836ee589ccd51f6db) ) // also commonly labeled as: Deer Hunting USA U6 Ver 4.0 2000.6.15 - SUM16 = 7BBB ROM_LOAD16_BYTE( "as_0907_e04.u07", 0x000001, 0x100000, CRC(19973d08) SHA1(da1cc02ce480a62ccaf94d0af1246a340f054b43) ) // also commonly labeled as: Deer Hunting USA U7 Ver 4.0 2000.6.15 - SUM16 = 4C78 - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4210,7 +3733,7 @@ ROM_START( deerhuntc ) // These rom labels break label conventions but is correc ROM_LOAD16_BYTE( "as_0937_e01.u06", 0x000000, 0x100000, CRC(8d74088e) SHA1(cb11ffaf4c0267cc8cbe01accc3daeed910a3af3) ) // SUM16 = C2CD - same as version dated 2000.5.31? ROM_LOAD16_BYTE( "as_0938_e01.u07", 0x000001, 0x100000, CRC(c7657889) SHA1(4cc707c8abbc0862457375a9a910d3c338859193) ) // SUM16 = 27D7 - same as version dated 2000.5.31? - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4225,7 +3748,7 @@ ROM_START( deerhuntd ) // Deer Hunting USA V2.x - No version number is printed t ROM_LOAD16_BYTE( "as_0906_e02.u06", 0x000000, 0x100000, CRC(190cca42) SHA1(aef63f5e8c71ed0156b8b0104c5d23872c119167) ) // Version in program code is listed as 0.00 ROM_LOAD16_BYTE( "as_0907_e02.u07", 0x000001, 0x100000, CRC(9de2b901) SHA1(d271bc54c41e30c0d9962eedd22f3ef2b7b8c9e5) ) // Verified with two different sets of chips - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4240,7 +3763,7 @@ ROM_START( deerhunte ) // Deer Hunting USA V1.x - No version number is printed t ROM_LOAD16_BYTE( "as_0906_e01.u06", 0x000000, 0x100000, CRC(103e3ba3) SHA1(677d912ea9ed2ee1f26cdcac1687ce8ef416a96f) ) // Version in program code is listed as 0.00 ROM_LOAD16_BYTE( "as_0907_e01.u07", 0x000001, 0x100000, CRC(ddeb0f97) SHA1(a2578071f3506d69057d2256685b969adc50d275) ) // Verified with two different sets of chips - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4255,7 +3778,7 @@ ROM_START( deerhuntj ) // Higher ROM labels indicate a specific version / region ROM_LOAD16_BYTE( "as0_908e01_u6_jdh.u06", 0x000000, 0x100000, CRC(52f037da) SHA1(72afb4461be059655a2fe9b138e9feef19ecaa84) ) // Version shows as VER .4.4.1 ROM_LOAD16_BYTE( "as0_909e01_u7_jdh.u07", 0x000001, 0x100000, CRC(b391bc87) SHA1(eb62e18b6ac9b0198911ec6684de73102c1d6df0) ) - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) ) ROM_LOAD64_WORD( "as0902m01.u39", 0x0000002, 0x800000, CRC(c7ca2128) SHA1(86be3a3ec2f86f61acfa3d4d261faea3c27dc378) ) ROM_LOAD64_WORD( "as0903m01.u40", 0x0000004, 0x800000, CRC(e8ef81b3) SHA1(97666942ca6cca5b8ea6451314a2aaabad9e06ba) ) @@ -4270,7 +3793,7 @@ ROM_START( turkhunt ) // V1.0 is currently the only known version ROM_LOAD16_BYTE( "asx_906e01_th.u06", 0x000000, 0x100000, CRC(c96266e1) SHA1(0ca462b3b0f27198e36384eee6ea5c5d4e7e1293) ) // also commonly labeled as: Turkey U6 Ver 1.00 E510 ROM_LOAD16_BYTE( "asx_907e01_th.u07", 0x000001, 0x100000, CRC(7c67b502) SHA1(6a0e8883a115dac4095d86897e7eca2a007a1c71) ) // also commonly labeled as: Turkey U7 Ver 1.00 AB40 - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "asx901m01.u38", 0x0000000, 0x800000, CRC(eabd3f44) SHA1(5a1ac986d11a8b019e18761cf4ea0a6f49fbdbfc) ) ROM_LOAD64_WORD( "asx902m01.u39", 0x0000002, 0x800000, CRC(c32130c8) SHA1(70d56ebed1f51657aaee02f95ac51589733e6eb7) ) ROM_LOAD64_WORD( "asx903m01.u40", 0x0000004, 0x800000, CRC(5f86c322) SHA1(5a72adb99eea176199f172384cb051e2b045ab94) ) @@ -4285,7 +3808,7 @@ ROM_START( wschamp ) // Wing Shooting Championship V2.00 (01/23/2002) - The "E03 ROM_LOAD16_BYTE( "as_1006_e03.u06", 0x000000, 0x100000, CRC(0ad01677) SHA1(63e09b9f7cc8b781af1756f86caa0cc0962ae584) ) // also commonly labeled as: WSC U6 Ver 2.00 421E ROM_LOAD16_BYTE( "as_1007_e03.u07", 0x000001, 0x100000, CRC(572624f0) SHA1(0c2f67daa22f4edd66a2be990dc6cd999faff0fa) ) // also commonly labeled as: WSC U7 Ver 2.00 A48F - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as1001m01.u38", 0x0000000, 0x800000, CRC(92595579) SHA1(75a7131aedb18b7103677340c3cca7c91aaca2bf) ) ROM_LOAD64_WORD( "as1002m01.u39", 0x0000002, 0x800000, CRC(16c2bb08) SHA1(63926464c8bd8db7d05905a953765e645942beb4) ) ROM_LOAD64_WORD( "as1003m01.u40", 0x0000004, 0x800000, CRC(89618858) SHA1(a8bd07f233482e8f5a256af7ff9577648eb58ef4) ) @@ -4300,7 +3823,7 @@ ROM_START( wschampa ) // Wing Shooting Championship V1.01 ROM_LOAD16_BYTE( "as_1006_e02.u06", 0x000000, 0x100000, CRC(d3d3b2b5) SHA1(2d036d795b40a4ed78bb9f7751f875cfc76276a9) ) // SUM16 = 31EF ROM_LOAD16_BYTE( "as_1007_e02.u07", 0x000001, 0x100000, CRC(78ede6d9) SHA1(e6d10f52cd4c6bf97288df44911f23bb64fc012c) ) // SUM16 = 615E - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as1001m01.u38", 0x0000000, 0x800000, CRC(92595579) SHA1(75a7131aedb18b7103677340c3cca7c91aaca2bf) ) ROM_LOAD64_WORD( "as1002m01.u39", 0x0000002, 0x800000, CRC(16c2bb08) SHA1(63926464c8bd8db7d05905a953765e645942beb4) ) ROM_LOAD64_WORD( "as1003m01.u40", 0x0000004, 0x800000, CRC(89618858) SHA1(a8bd07f233482e8f5a256af7ff9577648eb58ef4) ) @@ -4315,7 +3838,7 @@ ROM_START( wschampb ) // Wing Shooting Championship V1.00, dumps match listed ch ROM_LOAD16_BYTE( "as10u6.u06", 0x000000, 0x100000, CRC(70a18bef) SHA1(3fb2e8a4db790dd732115d7d3d991b2d6c54feb9) ) // checksum 3F38 & 10/26 16:00 hand written on label ROM_LOAD16_BYTE( "as10u7.u07", 0x000001, 0x100000, CRC(cf23be7d) SHA1(b9130757466ff0d41d261b1c2435d36d2452df54) ) // checksum 1537 & 10/26 16:00 hand written on label - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as1001m01.u38", 0x0000000, 0x800000, CRC(92595579) SHA1(75a7131aedb18b7103677340c3cca7c91aaca2bf) ) ROM_LOAD64_WORD( "as1002m01.u39", 0x0000002, 0x800000, CRC(16c2bb08) SHA1(63926464c8bd8db7d05905a953765e645942beb4) ) ROM_LOAD64_WORD( "as1003m01.u40", 0x0000004, 0x800000, CRC(89618858) SHA1(a8bd07f233482e8f5a256af7ff9577648eb58ef4) ) @@ -4330,7 +3853,7 @@ ROM_START( trophyh ) // Version 1.00 - v: Thu Mar 28 12:35:50 2002 JST-9 - on a ROM_LOAD16_BYTE( "as_1106_e01.u06", 0x000000, 0x100000, CRC(b4950882) SHA1(2749f7ffc5b543c9f39815f0913a1d1e385b63f4) ) // also commonly labeled as: Trophy U6 Ver 1.00 D8DA ROM_LOAD16_BYTE( "as_1107_e01.u07", 0x000001, 0x100000, CRC(19ee67cb) SHA1(e75ce66d3ff5aad46ba997c09d6514260e617f55) ) // also commonly labeled as: Trophy U7 Ver 1.00 CEEF - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD64_WORD( "as1101m01.u38", 0x0000000, 0x800000, CRC(855ed675) SHA1(84ce229a9feb6331413253a5aed10b362e8102e5) ) ROM_LOAD64_WORD( "as1102m01.u39", 0x0000002, 0x800000, CRC(d186d271) SHA1(3c54438b35adfab8be91df0a633270d6db49beef) ) ROM_LOAD64_WORD( "as1103m01.u40", 0x0000004, 0x800000, CRC(adf8a54e) SHA1(bb28bf219d18082246f7964851a5c49b9c0ba7f5) ) @@ -4345,7 +3868,7 @@ ROM_START( trophyht ) // V1.00 Location Test - v: Tue Feb 26 18:18:43 2002 JST-9 ROM_LOAD16_BYTE( "trophy_2-26_u6_2e9c.u06", 0x000000, 0x100000, CRC(74496d65) SHA1(8af7bce528557efe68e0ed8be8b60d0ba4409c35) ) // hand written label: Trophy 2/26 U6 2E9C ROM_LOAD16_BYTE( "trophy_2-26_u6_de45.u07", 0x000001, 0x100000, CRC(9ae364f6) SHA1(9df8352345e59f1e0a5cb66a8b43d5ad7785ca29) ) // hand written label: Trophy 2/26 U7 DE45 - ROM_REGION( 0x2000000, "sprites", 0 ) // Sprites + ROM_REGION( 0x2000000, "video", 0 ) // Sprites ROM_LOAD( "lh28f016sat.u20", 0x0000000, 0x200000, NO_DUMP ) // None of the 28F016 flash ROMs are dumped ROM_LOAD( "lh28f016sat.u21", 0x0200000, 0x200000, NO_DUMP ) // The correct loading order is unknown ROM_LOAD( "lh28f016sat.u22", 0x0400000, 0x200000, NO_DUMP ) @@ -4378,7 +3901,6 @@ ROM_END CPU: Toshiba TMP68301AF-16 (100 Pin PQFP) Video: Allumer X1-020 9426HK003 (@ U9) - NEC DX-102 (52 Pin PQFP @ U8) Allumer X1-007 505100 (SDIP42 @ U110 - Feeds RGB DACs) Sound: X1-010 (Mitsubishi M60016 Gate Array, 80 Pin PQFP @ U26) Inputs: Allumer X1-004 546100 (SDIP52) @@ -4388,6 +3910,7 @@ Inputs: Allumer X1-004 546100 (SDIP52) 3.6v Battery (@ BT1) 93C46 EEPROM (@ U101) SW1 Push Button Reset + NEC DX-102 (52 Pin PQFP @ U8) Memory: M1 are TC551001BFL-70L at U56 & U57 @@ -4455,7 +3978,7 @@ ROM_START( telpacfl ) ROM_LOAD16_BYTE( "mp3_prgeven__u2_v1.0.u2", 0x000000, 0x080000, CRC(9ab450c5) SHA1(57d9118df8a444e295cbda453a7c3238bd672ddd) ) ROM_LOAD16_BYTE( "mp3_prgodd__u3_v1.0.u3", 0x000001, 0x080000, CRC(2a324139) SHA1(1812a7a8a2c4e222a1e5c7cb6d39cf7bf7f037db) ) - ROM_REGION( 0x800000, "sprites", ROMREGION_ERASE00 ) // Sprites + ROM_REGION( 0x800000, "video", ROMREGION_ERASE00 ) // Sprites ROM_LOAD64_WORD( "mp3_cg-0__u16_v1.0.u16", 0x000000, 0x200000, CRC(9d8453ba) SHA1(d97240ce68d6e64527930e919710764a7b669cdf) ) ROM_LOAD64_WORD( "mp3_cg-1__u15_v1.0.u15", 0x000002, 0x200000, CRC(8ab83f38) SHA1(5ebc682b80d0d97025a97824a899946712e7acd4) ) @@ -4472,6 +3995,8 @@ ROM_START( telpacfl ) ROM_LOAD( "kc-002c.u52", 0x117, 0x117, NO_DUMP ) ROM_END +} // anonymous namespace + GAME( 1994, gundamex, 0, gundamex, gundamex, seta2_state, empty_init, ROT0, "Banpresto", "Mobile Suit Gundam EX Revue", 0 ) GAME( 1995, grdians, 0, grdians, grdians, seta2_state, empty_init, ROT0, "Winkysoft (Banpresto license)", "Guardians / Denjin Makai II (P-FG01-1 PCB)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) @@ -4520,13 +4045,3 @@ GAME( 2001, wschampb, wschamp, samshoot, wschamp, seta2_state, empty_init, GAME( 2002, trophyh, 0, samshoot, trophyh, seta2_state, empty_init, ROT0, "Sammy USA Corporation", "Trophy Hunting - Bear & Moose V1.00", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) GAME( 2002, trophyht, trophyh, samshoot, trophyht, seta2_state, empty_init, ROT0, "Sammy USA Corporation", "Trophy Hunting - Bear & Moose V1.00 (location test)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) - -GAME( 2000, funcube, 0, funcube, funcube, funcube_state, init_funcube, ROT0, "Namco", "Funcube (v1.5)", MACHINE_NO_COCKTAIL ) - -GAME( 2001, funcube2, 0, funcube2, funcube, funcube_state, init_funcube2, ROT0, "Namco", "Funcube 2 (v1.1)", MACHINE_NO_COCKTAIL ) - -GAME( 2001, funcube3, 0, funcube2, funcube, funcube_state, init_funcube3, ROT0, "Namco", "Funcube 3 (v1.1)", MACHINE_NO_COCKTAIL ) - -GAME( 2001, funcube4, 0, funcube2, funcube, funcube_state, init_funcube2, ROT0, "Namco", "Funcube 4 (v1.0)", MACHINE_NO_COCKTAIL ) - -GAME( 2002, funcube5, 0, funcube2, funcube, funcube_state, init_funcube2, ROT0, "Namco", "Funcube 5 (v1.0)", MACHINE_NO_COCKTAIL ) diff --git a/src/mame/seta/seta2.h b/src/mame/seta/seta2.h deleted file mode 100644 index 270d5ccbb3f..00000000000 --- a/src/mame/seta/seta2.h +++ /dev/null @@ -1,260 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Luca Elia, David Haywood -#ifndef MAME_SETA_SETA2_H -#define MAME_SETA_SETA2_H - -#pragma once - - -#include "cpu/m68000/tmp68301.h" -#include "cpu/h8/h83006.h" -#include "machine/eepromser.h" -#include "machine/intelfsh.h" -#include "machine/ticket.h" -#include "machine/timer.h" -#include "machine/upd4992.h" -#include "sound/okim9810.h" -#include "sound/x1_010.h" -#include "emupal.h" -#include "screen.h" - -class seta2_state : public driver_device -{ -public: - seta2_state(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag), - m_maincpu(*this, "maincpu"), - m_sub(*this, "sub"), - m_gfxdecode(*this, "gfxdecode"), - m_screen(*this, "screen"), - m_palette(*this, "palette"), - - m_oki(*this, "oki"), - m_eeprom(*this, "eeprom"), - m_flash(*this, "flash"), - m_dispenser(*this, "dispenser"), - - m_x1_bank(*this, "x1_bank_%u", 1U), - m_spriteram(*this, "spriteram", 0x40000, ENDIANNESS_BIG), - m_vregs(*this, "vregs", 0x40, ENDIANNESS_BIG), - - m_in_system(*this, "SYSTEM"), - m_leds(*this, "led%u", 0U), - m_lamps(*this, "lamp%u", 0U) - { } - - void grdians(machine_config &config); - void grdiansa(machine_config &config); - void myangel(machine_config &config); - void penbros(machine_config &config); - void pzlbowl(machine_config &config); - void myangel2(machine_config &config); - void reelquak(machine_config &config); - void ablastb(machine_config &config); - void gundamex(machine_config &config); - void telpacfl(machine_config &config); - void samshoot(machine_config &config); - void namcostr(machine_config &config); - - void init_namcostr(); - -protected: - virtual void machine_start() override ATTR_COLD; - virtual void video_start() override ATTR_COLD; - - void grdians_lockout_w(uint8_t data); - - uint16_t pzlbowl_protection_r(address_space &space); - uint8_t pzlbowl_coins_r(); - void pzlbowl_coin_counter_w(uint8_t data); - - void reelquak_leds_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void reelquak_coin_w(uint8_t data); - - void samshoot_coin_w(uint8_t data); - - void telpacfl_lamp1_w(uint8_t data); - void telpacfl_lamp2_w(uint8_t data); - void telpacfl_lockout_w(uint8_t data); - - uint16_t gundamex_eeprom_r(); - void gundamex_eeprom_w(uint16_t data); - - void vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - uint16_t vregs_r(offs_t offset); - uint16_t spriteram_r(offs_t offset); - void spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - - int calculate_global_xoffset(bool nozoom_fixedpalette_fixedposition); - int calculate_global_yoffset(bool nozoom_fixedpalette_fixedposition); - void draw_sprites_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int scanline, int realscanline, int xoffset, uint32_t xzoom, bool xzoominverted); - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void screen_vblank(int state); - - void sound_bank_w(offs_t offset, uint8_t data); - - void ablastb_map(address_map &map) ATTR_COLD; - void grdians_map(address_map &map) ATTR_COLD; - void gundamex_map(address_map &map) ATTR_COLD; - void myangel2_map(address_map &map) ATTR_COLD; - void myangel_map(address_map &map) ATTR_COLD; - void namcostr_map(address_map &map) ATTR_COLD; - void penbros_base_map(address_map &map) ATTR_COLD; - void penbros_map(address_map &map) ATTR_COLD; - void pzlbowl_map(address_map &map) ATTR_COLD; - void reelquak_map(address_map &map) ATTR_COLD; - void samshoot_map(address_map &map) ATTR_COLD; - void telpacfl_map(address_map &map) ATTR_COLD; - void x1_map(address_map &map) ATTR_COLD; - - void seta2(machine_config &config); - void seta2_32m(machine_config &config); - - required_device m_maincpu; - optional_device m_sub; - required_device m_gfxdecode; - required_device m_screen; - required_device m_palette; - - optional_device m_oki; - optional_device m_eeprom; - optional_device m_flash; - optional_device m_dispenser; - - optional_memory_bank_array<8> m_x1_bank; - memory_share_creator m_spriteram; - memory_share_creator m_vregs; - optional_ioport m_in_system; - output_finder<7> m_leds; - output_finder<11> m_lamps; - - std::unique_ptr m_private_spriteram; - -private: - void drawgfx_line(bitmap_ind16 &bitmap, const rectangle &cliprect, int gfx, uint8_t const *const addr, uint32_t realcolor, bool flipx, bool flipy, int base_sx, uint32_t xzoom, bool shadow, int screenline, int line, bool opaque); - inline void get_tile(uint16_t const *spriteram, bool is_16x16, int x, int y, int page, int &code, int &attr, bool &flipx, bool &flipy, int &color); - - TIMER_CALLBACK_MEMBER(raster_timer_done); - - std::unique_ptr m_realtilenumber; - gfx_element *m_spritegfx; - - uint16_t m_rasterposition = 0; - uint16_t m_rasterenabled = 0; - emu_timer *m_raster_timer = nullptr; -}; - - -class mj4simai_state : public seta2_state -{ -public: - mj4simai_state(const machine_config &mconfig, device_type type, const char *tag) : - seta2_state(mconfig, type, tag), - m_keys{ { *this, "P1_KEY%u", 0U }, { *this, "P2_KEY%u", 0U } } - { } - - void mj4simai(machine_config &config); - -protected: - virtual void machine_start() override ATTR_COLD; - -private: - template uint16_t mj4simai_key_r(); - - void mj4simai_map(address_map &map) ATTR_COLD; - - required_ioport_array<5> m_keys[2]; - - uint8_t m_keyboard_row = 0; -}; - - -class funcube_state : public seta2_state -{ -public: - funcube_state(const machine_config &mconfig, device_type type, const char *tag) : - seta2_state(mconfig, type, tag), - m_nvram(*this, "nvram", 0x180, ENDIANNESS_BIG), - m_in_debug(*this, "DEBUG"), - m_in_switch(*this, "SWITCH"), - m_in_battery(*this, "BATTERY") - { } - - void funcube(machine_config &config); - void funcube2(machine_config &config); - - void init_funcube(); - void init_funcube2(); - void init_funcube3(); - -private: - virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; - - uint8_t nvram_r(offs_t offset) { return m_nvram[offset]; } - void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset] = data; } - - uint16_t debug_r(); - uint8_t coins_r(); - void leds_w(uint8_t data); - uint8_t outputs_r(); - void outputs_w(uint8_t data); - uint8_t battery_r(); - - void funcube2_map(address_map &map) ATTR_COLD; - void funcube_map(address_map &map) ATTR_COLD; - void funcube_sub_map(address_map &map) ATTR_COLD; - - void funcube_debug_outputs(); - - memory_share_creator m_nvram; - - required_ioport m_in_debug; - required_ioport m_in_switch; - required_ioport m_in_battery; - - uint8_t m_outputs = 0, m_funcube_leds = 0; - uint64_t m_coin_start_cycles = 0; - uint8_t m_hopper_motor = 0; -}; - - -class staraudi_state : public seta2_state -{ -public: - staraudi_state(const machine_config &mconfig, device_type type, const char *tag) : - seta2_state(mconfig, type, tag), - m_rtc(*this, "rtc"), - m_rgbram(*this, "rgbram") - { - } - static constexpr feature_type unemulated_features() { return feature::CAMERA | feature::PRINTER; } - - void staraudi(machine_config &config); - -private: - void camera_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); - void lamps1_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); - void lamps2_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); - uint16_t tileram_r(offs_t offset); - void tileram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - - uint32_t staraudi_screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - - void staraudi_map(address_map &map) ATTR_COLD; - - virtual void driver_start() override; - - void staraudi_debug_outputs(); - - void draw_rgbram(bitmap_ind16 &bitmap); - - required_device m_rtc; - required_shared_ptr m_rgbram; - - uint8_t m_lamps1 = 0, m_lamps2 = 0, m_cam = 0; -}; - -#endif // MAME_SETA_SETA2_H From 69d7a60cb19c09986627416827cc669307b3219c Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 13 Mar 2026 15:58:55 +0100 Subject: [PATCH 254/351] snk6502: add screen raw params --- src/mame/cave/cv1k.cpp | 77 +++++++++++++++++-------------- src/mame/gaelco/lotoplay.cpp | 2 +- src/mame/snk/snk6502.cpp | 89 ++++++++++++++---------------------- src/mame/snk/snk6502.h | 13 +++--- src/mame/snk/snk6502_v.cpp | 2 +- 5 files changed, 86 insertions(+), 97 deletions(-) diff --git a/src/mame/cave/cv1k.cpp b/src/mame/cave/cv1k.cpp index d3989d268ae..8cce1a252f2 100644 --- a/src/mame/cave/cv1k.cpp +++ b/src/mame/cave/cv1k.cpp @@ -158,15 +158,17 @@ To enter service mode in most cases hold down Service (F2) for a few seconds Some games also use the test dipswitch as an alternative method. Common game codes: - - During boot hold P1 Right+A+B+C and P2 Left+A+B+C - Forcibly initialise non-volatile data (EEPROM or NAND settings area) - - During boot hold P1 A and P2 A - Reset random numbers generator at each game start. Probably was used during testing or/and competition events. + - During boot hold P1 Right+A+B+C and P2 Left+A+B+C - Forcibly initialise non-volatile data + (EEPROM or NAND settings area) + - During boot hold P1 A and P2 A - Reset random numbers generator at each game start. + Probably was used during testing or/and competition events. TODO: Improve Blending precision? - - I'm not sure what precision the original HW mixes with, source data is 555 RGB with 1 bit transparency (16-bits) - and the real VRAM is also clearly in this format. The Alpha values supplied however are 8bpp, and the 'Tint' - values use 0x20 for 'normal' (not 0x1f) + - I'm not sure what precision the original HW mixes with, source data is 555 RGB with 1 bit + transparency (16-bits) and the real VRAM is also clearly in this format. The Alpha values + supplied however are 8bpp, and the 'Tint' values use 0x20 for 'normal' (not 0x1f) Overall screen brightness / contrast (see test mode) - Could convert ram back to 16-bit and use a palette lookup at the final blit.. probably easiest / quickest. @@ -175,17 +177,20 @@ Touchscreen - Used for mmmbanc, needs SH3 serial support. Remaining Video issues - - mmpork startup screen flicker - the FOR USE IN JAPAN screen doesn't appear on the real PCB until after the graphics are fully loaded, it still displays 'please wait' until that point. - - Sometimes the 'sprites' in mushisam lag by a frame vs the 'backgrounds' is this a timing problem, does the real game do it? - - End of Blit should send IRQ1. (one game has a valid irq routine that looks like it was used for profiling, but nothing depends on it) + - mmpork startup screen flicker - the FOR USE IN JAPAN screen doesn't appear on the real PCB + until after the graphics are fully loaded, it still displays 'please wait' until that point. + - Sometimes the 'sprites' in mushisam lag by a frame vs the 'backgrounds' is this a timing problem, + does the real game do it? + - End of Blit should send IRQ1. (one game has a valid irq routine that looks like it was used + for profiling, but nothing depends on it) Timing - Experimental SH7709S cache/memory timing - Requires to measure screen raw params for correct video timing? -31/12/2021: - Akai Katana and Dodonpachi Saidaioujou removed at the request of the - current rightholder, exA-Arcadia (legal@exa.ac). +Removed games + - 31/12/2021, Akai Katana and Dodonpachi Saidaioujou were removed at the request of the current + rightholder, exA-Arcadia (legal@exa.ac). */ @@ -897,32 +902,34 @@ ROM_START( dfkbl ) ROM_LOAD16_WORD_SWAP( "u24", 0x400000, 0x400000, CRC(31f9eb0a) SHA1(322158779e969bb321241065dd49c1167b91ff6c) ) ROM_END -// ROM_START( akatana ) -// ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF) -// ROM_LOAD16_WORD_SWAP( "u4", 0x000000, 0x400000, CRC(613fd380) SHA1(6e28480eef3b483d00b42d811a9d2c7fa1097924) ) // (2010/ 8/13 MASTER VER.) +#if 0 // not included in MAME, see driver notes +ROM_START( akatana ) + ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF) + ROM_LOAD16_WORD_SWAP( "u4", 0x000000, 0x400000, CRC(613fd380) SHA1(6e28480eef3b483d00b42d811a9d2c7fa1097924) ) // (2010/ 8/13 MASTER VER.) -// ROM_REGION( 0x8400000, "nand", ROMREGION_ERASEFF) -// ROM_LOAD( "u2", 0x000000, 0x8400000, CRC(89a2e1a5) SHA1(e6f4ec974406283665697fdd52bd606d0337dd11) ) + ROM_REGION( 0x8400000, "nand", ROMREGION_ERASEFF) + ROM_LOAD( "u2", 0x000000, 0x8400000, CRC(89a2e1a5) SHA1(e6f4ec974406283665697fdd52bd606d0337dd11) ) -// ROM_REGION( 0x800000, "ymz770", ROMREGION_ERASEFF) -// ROM_LOAD16_WORD_SWAP( "u23", 0x000000, 0x400000, CRC(34a67e24) SHA1(78a7e82123b86311f1116a80c39f147b8b695549) ) -// ROM_LOAD16_WORD_SWAP( "u24", 0x400000, 0x400000, CRC(10760fed) SHA1(b70f4506c00f3901ff38f5efd4b897af1afc7a0c) ) -// ROM_END + ROM_REGION( 0x800000, "ymz770", ROMREGION_ERASEFF) + ROM_LOAD16_WORD_SWAP( "u23", 0x000000, 0x400000, CRC(34a67e24) SHA1(78a7e82123b86311f1116a80c39f147b8b695549) ) + ROM_LOAD16_WORD_SWAP( "u24", 0x400000, 0x400000, CRC(10760fed) SHA1(b70f4506c00f3901ff38f5efd4b897af1afc7a0c) ) +ROM_END -// ROM_START( ddpsdoj ) -// ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF) -// ROM_LOAD16_WORD_SWAP("u4", 0x000000, 0x400000, CRC(e2a4411c) SHA1(f8b2b6326dd8eeae99b8b1ab2bd5a3f0b9c7f027) ) -// ROM_IGNORE( 0x000100 ) // Flash extra bytes +ROM_START( ddpsdoj ) + ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF) + ROM_LOAD16_WORD_SWAP("u4", 0x000000, 0x400000, CRC(e2a4411c) SHA1(f8b2b6326dd8eeae99b8b1ab2bd5a3f0b9c7f027) ) + ROM_IGNORE( 0x000100 ) // Flash extra bytes -// ROM_REGION( 0x8400000, "nand", ROMREGION_ERASEFF) -// ROM_LOAD("u2", 0x000000, 0x8400000, CRC(668e4cd6) SHA1(da0b10865df3a3e46cf8a109ca88a551faba4483) ) + ROM_REGION( 0x8400000, "nand", ROMREGION_ERASEFF) + ROM_LOAD("u2", 0x000000, 0x8400000, CRC(668e4cd6) SHA1(da0b10865df3a3e46cf8a109ca88a551faba4483) ) -// ROM_REGION( 0x800000, "ymz770", ROMREGION_ERASEFF) -// ROM_LOAD16_WORD_SWAP("u23", 0x000000, 0x400000, CRC(ac94801c) SHA1(cbcc6d5d89860bc961967e1d3b7c329adaf200c5) ) -// ROM_IGNORE( 0x000100 ) // Flash extra bytes -// ROM_LOAD16_WORD_SWAP("u24", 0x400000, 0x400000, CRC(f593045b) SHA1(91b92870d0dd2a7817cb0059cc750e2393686f4c) ) -// ROM_IGNORE( 0x000100 ) // Flash extra bytes -// ROM_END + ROM_REGION( 0x800000, "ymz770", ROMREGION_ERASEFF) + ROM_LOAD16_WORD_SWAP("u23", 0x000000, 0x400000, CRC(ac94801c) SHA1(cbcc6d5d89860bc961967e1d3b7c329adaf200c5) ) + ROM_IGNORE( 0x000100 ) // Flash extra bytes + ROM_LOAD16_WORD_SWAP("u24", 0x400000, 0x400000, CRC(f593045b) SHA1(91b92870d0dd2a7817cb0059cc750e2393686f4c) ) + ROM_IGNORE( 0x000100 ) // Flash extra bytes +ROM_END +#endif u64 cv1k_state::speedup_r() { @@ -1020,7 +1027,7 @@ GAME( 2006, pinkswts, 0, cv1k, cv1ks,cv1k_state, init_pinkswts, ROT27 GAME( 2006, pinkswtsa, pinkswts, cv1k, cv1ks,cv1k_state, init_pinkswts, ROT270, "Cave (AMI license)", "Pink Sweets: Ibara Sorekara (Japan, 2006/04/06 MASTER VER...)", MACHINE_IMPERFECT_TIMING ) GAME( 2006, pinkswtsb, pinkswts, cv1k, cv1ks,cv1k_state, init_pinkswts, ROT270, "Cave (AMI license)", "Pink Sweets: Ibara Sorekara (Japan, 2006/04/06 MASTER VER.)", MACHINE_IMPERFECT_TIMING ) GAME( 2006, pinkswtsx, pinkswts, cv1k, cv1ks,cv1k_state, init_pinkswts, ROT270, "Cave (AMI license)", "Pink Sweets: Ibara Sorekara (Japan, 2006/xx/xx MASTER VER.)", MACHINE_IMPERFECT_TIMING ) // defaults to freeplay, possibly bootlegged from show/dev version? -GAME( 2017, pinkswtssc, pinkswts, cv1k, cv1ks,cv1k_state, init_pinkswts, ROT270, "bootleg (Four Horsemen)", "Pink Sweets: Suicide Club (2017/10/31 SUICIDECLUB VER., bootleg)", MACHINE_IMPERFECT_TIMING ) // dumped from bootleg with pre-patched hack +GAME( 2017, pinkswtssc, pinkswts, cv1k, cv1ks,cv1k_state, init_pinkswts, ROT270, "bootleg (Four Horsemen)", "Pink Sweets: Suicide Club (2017/10/31 SUICIDECLUB VER., bootleg)", MACHINE_IMPERFECT_TIMING ) // dumped from bootleg with pre-patched hack // CA015 Mushihime-Sama Futari GAME( 2006, futari15, 0, cv1k, cv1k, cv1k_state, init_pinkswts, ROT270, "Cave (AMI license)", "Mushihime-Sama Futari Ver 1.5 (Japan, 2006/12/8.MASTER VER. 1.54.)", MACHINE_IMPERFECT_TIMING ) @@ -1048,10 +1055,10 @@ GAME( 2008, ddpdfk10, ddpdfk, cv1k_d, cv1k, cv1k_state, init_ddpdfk, ROT27 GAME( 2010, dfkbl, 0, cv1k_d, cv1k, cv1k_state, init_ddpdfk, ROT270, "Cave", "DoDonPachi Dai-Fukkatsu Black Label (Japan, 2010/1/18 BLACK LABEL)", MACHINE_IMPERFECT_TIMING ) // CA021 Akai Katana -//GAME( 2010, akatana, 0, cv1k_d, cv1k, cv1k_state, init_ddpdfk, ROT0, "Cave", "Akai Katana (Japan, 2010/ 8/13 MASTER VER.)", MACHINE_IMPERFECT_TIMING ) +//GAME( 2010, akatana, 0, cv1k_d, cv1k, cv1k_state, init_ddpdfk, ROT0, "Cave", "Akai Katana (Japan, 2010/ 8/13 MASTER VER.)", MACHINE_IMPERFECT_TIMING ) // CA??? DoDonPachi SaiDaiOuJou -//GAME( 2012, ddpsdoj, 0, cv1k_d, cv1k, cv1k_state, init_ddpdfk, ROT270, "Cave", "DoDonPachi SaiDaiOuJou (Japan, 2012/ 4/20)", MACHINE_IMPERFECT_TIMING ) +//GAME( 2012, ddpsdoj, 0, cv1k_d, cv1k, cv1k_state, init_ddpdfk, ROT270, "Cave", "DoDonPachi SaiDaiOuJou (Japan, 2012/ 4/20)", MACHINE_IMPERFECT_TIMING ) // CMDL01 Medal Mahjong Moukari Bancho GAME( 2007, mmmbanc, 0, cv1k, cv1k, cv1k_state, init_pinkswts, ROT0, "Cave (AMI license)", "Medal Mahjong Moukari Bancho (Japan, 2007/06/05 MASTER VER.)", MACHINE_NOT_WORKING ) diff --git a/src/mame/gaelco/lotoplay.cpp b/src/mame/gaelco/lotoplay.cpp index fd9c9c02893..7d5a3371c7f 100644 --- a/src/mame/gaelco/lotoplay.cpp +++ b/src/mame/gaelco/lotoplay.cpp @@ -136,7 +136,7 @@ ROM_END } // anonymous namespace -// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS +// YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS GAME( 1988?, lotoplay, 0, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 1)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) GAME( 1988?, lotoplaya, lotoplay, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 2)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) GAME( 1988?, lotoplayb, lotoplay, lotoplay_p3, lotoplay, lotoplay_state, empty_init, ROT0, "Gaelco / Covielsa", "Loto-Play (MC68705, set 3)", MACHINE_NO_SOUND_HW | MACHINE_NOT_WORKING ) diff --git a/src/mame/snk/snk6502.cpp b/src/mame/snk/snk6502.cpp index 0175ab2a584..6f7bee79c1f 100644 --- a/src/mame/snk/snk6502.cpp +++ b/src/mame/snk/snk6502.cpp @@ -2,24 +2,21 @@ // copyright-holders:Nicola Salmoria, Dan Boris /*************************************************************************** - Sasuke vs. Commander - SNK +SNK Sasuke vs. Commander - driver by ? +Games supported: + * Sasuke vs. Commander + * Satan of Saturn [2 sets] + * Zarzon (clone of 'satansat') + * Vanguard [3 sets] + * Fantasy [3 sets] G-202 + * Pioneer Balloon G-204 + * Nibbler [4 sets] G-208 - Games supported: - * Sasuke vs. Commander - * Satan of Saturn [2 sets] - * Zarzon (clone of 'satansat') - * Vanguard [3 sets] - * Fantasy [3 sets] G-202 - * Pioneer Balloon G-204 - * Nibbler [4 sets] G-208 - - DIP locations verified from manual for: - * Zarzon (Satan of Saturn uses the same code, so I guess locations are the same) - * Vanguard - * Nibbler +DIP locations verified from manual for: + * Zarzon (Satan of Saturn uses the same code, so I guess locations are the same) + * Vanguard + * Nibbler **************************************************************************** @@ -287,12 +284,16 @@ Stephh's notes (based on the games M6502 code and some tests) : #include "sound/samples.h" #include "sound/sn76477.h" #include "video/mc6845.h" + #include "screen.h" #include "speaker.h" -#define MASTER_CLOCK XTAL(11'289'000) - +/************************************* + * + * Machine initialisation + * + *************************************/ void snk6502_state::machine_start() { @@ -304,13 +305,7 @@ void snk6502_state::machine_start() save_item(NAME(m_irq_mask)); // satansat only } -/* binary counter (1.4MHz update) */ -TIMER_DEVICE_CALLBACK_MEMBER(snk6502_state::sasuke_update_counter) -{ - m_sasuke_counter += 0x10; -} - -void snk6502_state::sasuke_start_counter() +void snk6502_state::machine_reset() { m_sasuke_counter = 0; } @@ -322,9 +317,15 @@ void snk6502_state::sasuke_start_counter() * *************************************/ +/* binary counter (1.4MHz update) */ +TIMER_DEVICE_CALLBACK_MEMBER(snk6502_state::sasuke_update_counter) +{ + m_sasuke_counter = (m_sasuke_counter + 1) & 0xf; +} + ioport_value snk6502_state::sasuke_count_r() { - return (m_sasuke_counter >> 4); + return m_sasuke_counter; } @@ -812,18 +813,6 @@ INTERRUPT_GEN_MEMBER(snk6502_state::snk6502_interrupt) } -/************************************* - * - * Machine initialisation - * - *************************************/ - -MACHINE_RESET_MEMBER(snk6502_state,sasuke) -{ - sasuke_start_counter(); -} - - /************************************* * * Machine drivers @@ -833,30 +822,25 @@ MACHINE_RESET_MEMBER(snk6502_state,sasuke) void snk6502_state::sasuke(machine_config &config) { // basic machine hardware - M6502(config, m_maincpu, MASTER_CLOCK / 16); // 700 kHz + M6502(config, m_maincpu, 11.289_MHz_XTAL / 16); // 700 kHz m_maincpu->set_addrmap(AS_PROGRAM, &snk6502_state::sasuke_map); m_maincpu->set_vblank_int("screen", FUNC(snk6502_state::satansat_interrupt)); - MCFG_MACHINE_RESET_OVERRIDE(snk6502_state,sasuke) - // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz((MASTER_CLOCK / 16) / (45 * 32 * 8)); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size(32*8, 32*8); - screen.set_visarea(0*8, 32*8-1, 0*8, 28*8-1); + screen.set_raw(11.289_MHz_XTAL / 2, 360, 256, 0, 262, 0, 224); // from crtc screen.set_screen_update(FUNC(snk6502_state::screen_update)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_sasuke); PALETTE(config, m_palette, FUNC(snk6502_state::satansat_palette), 32); MCFG_VIDEO_START_OVERRIDE(snk6502_state,satansat) - mc6845_device &crtc(MC6845(config, "crtc", MASTER_CLOCK / 16)); + mc6845_device &crtc(MC6845(config, "crtc", 11.289_MHz_XTAL / 16)); crtc.set_screen("screen"); crtc.set_show_border_area(false); crtc.set_char_width(8); - TIMER(config, "sasuke_timer").configure_periodic(FUNC(snk6502_state::sasuke_update_counter), attotime::from_hz(MASTER_CLOCK / 8)); + TIMER(config, "sasuke_timer").configure_periodic(FUNC(snk6502_state::sasuke_update_counter), attotime::from_hz(11.289_MHz_XTAL / 8)); // sound hardware SASUKE_SOUND(config, "snk6502", 0); @@ -879,7 +863,7 @@ void snk6502_state::satansat(machine_config &config) void vanguard_state::vanguard(machine_config &config) { // basic machine hardware - M6502(config, m_maincpu, MASTER_CLOCK / 8); // runs twice as fast as CRTC + M6502(config, m_maincpu, 11.289_MHz_XTAL / 8); // runs twice as fast as CRTC m_maincpu->set_addrmap(AS_PROGRAM, &vanguard_state::vanguard_map); m_maincpu->set_vblank_int("screen", FUNC(vanguard_state::snk6502_interrupt)); @@ -890,17 +874,14 @@ void vanguard_state::vanguard(machine_config &config) // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz((MASTER_CLOCK / 16) / (45 * 32 * 8)); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size(32*8, 32*8); - screen.set_visarea(0*8, 32*8-1, 0*8, 28*8-1); + screen.set_raw(11.289_MHz_XTAL / 2, 360, 256, 0, 262, 0, 224); // from crtc screen.set_screen_update(FUNC(vanguard_state::screen_update)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_vanguard); PALETTE(config, m_palette, FUNC(vanguard_state::snk6502_palette), 64); MCFG_VIDEO_START_OVERRIDE(vanguard_state,snk6502) - mc6845_device &crtc(MC6845(config, "crtc", MASTER_CLOCK / 16)); + mc6845_device &crtc(MC6845(config, "crtc", 11.289_MHz_XTAL / 16)); crtc.set_screen("screen"); crtc.set_show_border_area(false); crtc.set_char_width(8); @@ -936,7 +917,7 @@ void fantasy_state::pballoon(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &fantasy_state::pballoon_map); m_highmem->set_addrmap(AS_PROGRAM, &fantasy_state::pballoon_upper_map); - MCFG_VIDEO_START_OVERRIDE(snk6502_state, pballoon) + MCFG_VIDEO_START_OVERRIDE(fantasy_state, pballoon) // sound hardware PBALLOON_SOUND(config.replace(), "snk6502", 0); diff --git a/src/mame/snk/snk6502.h b/src/mame/snk/snk6502.h index 839672f1219..76d21e4a806 100644 --- a/src/mame/snk/snk6502.h +++ b/src/mame/snk/snk6502.h @@ -2,7 +2,7 @@ // copyright-holders:Nicola Salmoria, Dan Boris /************************************************************************* - rokola hardware + SNK Sasuke vs. Commander *************************************************************************/ #ifndef MAME_SNK_SNK6502_H @@ -39,8 +39,6 @@ public: ioport_value sasuke_count_r(); DECLARE_INPUT_CHANGED_MEMBER(coin_inserted); - DECLARE_VIDEO_START(pballoon); - protected: required_device m_maincpu; required_device m_gfxdecode; @@ -77,10 +75,11 @@ protected: TILE_GET_INFO_MEMBER(satansat_get_fg_tile_info); virtual void machine_start() override ATTR_COLD; - DECLARE_MACHINE_RESET(sasuke); - DECLARE_VIDEO_START(satansat); - void satansat_palette(palette_device &palette); + virtual void machine_reset() override ATTR_COLD; DECLARE_VIDEO_START(snk6502); + DECLARE_VIDEO_START(satansat); + + void satansat_palette(palette_device &palette); void snk6502_palette(palette_device &palette); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -137,6 +136,8 @@ private: void pballoon_map(address_map &map) ATTR_COLD; void pballoon_upper_map(address_map &map) ATTR_COLD; + DECLARE_VIDEO_START(pballoon); + required_device m_sound; }; diff --git a/src/mame/snk/snk6502_v.cpp b/src/mame/snk/snk6502_v.cpp index 599f4719f5b..9deca8baecf 100644 --- a/src/mame/snk/snk6502_v.cpp +++ b/src/mame/snk/snk6502_v.cpp @@ -168,7 +168,7 @@ VIDEO_START_MEMBER(snk6502_state,snk6502) m_gfxdecode->gfx(0)->set_source(m_charram); } -VIDEO_START_MEMBER(snk6502_state,pballoon) +VIDEO_START_MEMBER(fantasy_state,pballoon) { VIDEO_START_CALL_MEMBER( snk6502 ); From a4eea457b099dbde2d98b20bbf03d55ede96b74f Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 11 Mar 2026 18:32:16 +0100 Subject: [PATCH 255/351] bus/pci/trident_4dwavedx.cpp: implement sample interpolation --- src/devices/bus/pci/trident_4dwavedx.cpp | 145 ++++++++++++++++------- src/devices/bus/pci/trident_4dwavedx.h | 20 +++- 2 files changed, 123 insertions(+), 42 deletions(-) diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 098635bc6cf..570bd0633c0 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -7,16 +7,17 @@ Trident 4DWAVE-DX / 4DWAVE-NX AC'97 v1.x (fixed 48 kHz) TODO: -- Add delta sample rate; - Add mono, 8-bit and unsigned modes; - Missing features in Bank A (testable in dxdiag -> Music -> Trident PCI WaveTable MIDI); - Move DMA reading out of sound_stream_update; -- winamp has encoding issues with negative numbers (CPU core bug?); -- Mix-in wave engine output to AC'97 input, upsample to 48 kHz there; +- Mix-in wave engine output to AC'97 input; - wavetsr.com can't find a free IRQ for SB emulation under DOS; - Soundblaster, FM and MPU-401 are emulated by the 4dwave sound engine; - Support for 4DWAVE-NX (minor upgrade with extra TLB, scatter-gather and SPDIF interface) +Notes: +- 66 MHz CPU is too slow for winamp, will hiccup a ton on "serious" playback; + **************************************************************************************************/ #include "emu.h" @@ -270,7 +271,7 @@ void trident_4dwavedx_device::io_map(address_map &map) map(0xa4, 0xa7).rw(m_pcm, FUNC(t4dwave_pcm_device::aintena_r), FUNC(t4dwave_pcm_device::aintena_w)); map(0xa8, 0xab).rw(m_pcm, FUNC(t4dwave_pcm_device::wavevol_r), FUNC(t4dwave_pcm_device::wavevol_w)); // map(0xac, 0xaf) DELTAR - map(0xb0, 0xb3).r(m_pcm, FUNC(t4dwave_pcm_device::miscint_r)); + map(0xb0, 0xb3).rw(m_pcm, FUNC(t4dwave_pcm_device::miscint_r), FUNC(t4dwave_pcm_device::miscint_w)); map(0xb4, 0xb7).rw(m_pcm, FUNC(t4dwave_pcm_device::bankb_status_r), FUNC(t4dwave_pcm_device::startb_w)); map(0xb8, 0xbb).rw(m_pcm, FUNC(t4dwave_pcm_device::bankb_status_r), FUNC(t4dwave_pcm_device::stopb_w)); // map(0xbc, 0xbf) CSPFB @@ -358,7 +359,7 @@ t4dwave_pcm_device::t4dwave_pcm_device(const machine_config &mconfig, const char void t4dwave_pcm_device::device_start() { - m_stream = stream_alloc(0, 2, 44100 / 2); + m_stream = stream_alloc(0, 2, 48000); save_item(NAME(m_global_control)); save_item(NAME(m_cir)); @@ -371,6 +372,8 @@ void t4dwave_pcm_device::device_start() save_item(NAME(m_aintenb)); save_item(NAME(m_bankB_keyon)); + save_item(NAME(m_miscint)); + save_item(NAME(m_vol_cache)); save_item(NAME(m_volL)); save_item(NAME(m_volR)); @@ -391,6 +394,10 @@ void t4dwave_pcm_device::device_start() save_item(STRUCT_MEMBER(m_channel, loop_enable)); save_item(STRUCT_MEMBER(m_channel, ec_envelope)); save_item(STRUCT_MEMBER(m_channel, pci_buf)); + + save_item(STRUCT_MEMBER(m_channel, ticks)); + save_item(STRUCT_MEMBER(m_channel, sample_data)); + save_item(STRUCT_MEMBER(m_channel, dma_fetch)); } void t4dwave_pcm_device::device_reset() @@ -398,6 +405,7 @@ void t4dwave_pcm_device::device_reset() m_global_control = 0; m_cir = 0; + m_miscint = 0; m_aina = m_aintena = m_ainb = m_aintenb = 0; m_bankA_keyon = m_bankB_keyon = 0; } @@ -473,14 +481,43 @@ void t4dwave_pcm_device::global_control_w(offs_t offset, u32 data, u32 mem_mask) m_cir = data & 0x3f; } +// ---- ---- ---- --x- ---- ---- ---- ---- opltimer_ie +// ---- ---- ---- ---x ---- ---- ---- ---- pb_24k_mode +// ---- ---- ---- ---- ---x ---- ---- ---- SB Record Interrupt Control +// ---- ---- ---- ---- ---- x--- ---- ---- mixer overflow flag (wc) +// ---- ---- ---- ---- ---- -x-- ---- ---- mixer underflow flag (wc) +// ---- ---- ---- ---- ---- --x- ---- ---- rec overrun status (wc) +// ---- ---- ---- ---- ---- ---x ---- ---- playback underrun (wc) +// ---- ---- ---- ---- ---- ---- -x-- ---- envelope irq (ro) +// ---- ---- ---- ---- ---- ---- --x- ---- address irq (ro) +// ---- ---- ---- ---- ---- ---- ---x ---- opl3 irq (ro) +// ---- ---- ---- ---- ---- ---- ---- x--- mpu401 irq (ro) +// ---- ---- ---- ---- ---- ---- ---- -x-- sb irq (ro) +// ---- ---- ---- ---- ---- ---- ---- --x- rec overrun irq (ro) +// ---- ---- ---- ---- ---- ---- ---- ---x playback overrun irq (ro) u32 t4dwave_pcm_device::miscint_r(offs_t offset) { - u32 res = 0; - if ((m_aina & m_aintena) || (m_ainb & m_aintenb)) - res |= (1 << 5); + u32 res = m_miscint & 0x0003'1f7f; return res; } +void t4dwave_pcm_device::miscint_w(offs_t offset, u32 data, u32 mem_mask) +{ + if (ACCESSING_BITS_16_23) + { + m_miscint &= 0xff00'ffff; + m_miscint |= (data & 0x0003'0000); + } + + if (ACCESSING_BITS_8_15) + { + m_miscint &= ~(1 << 12); + m_miscint |= BIT(data, 12) << 12; + // apply write clear flags + m_miscint &= ~(data & 0x0f00); + } +} + // START_B / STOP_B u32 t4dwave_pcm_device::bankb_status_r(offs_t offset) { @@ -566,7 +603,13 @@ void t4dwave_pcm_device::eso_w(offs_t offset, u32 data, u32 mem_mask) channel.hso = channel.eso >> 1; } if (ACCESSING_BITS_0_15) + { channel.delta = data & 0xffff; + // internal variables init-ed here for convenience + channel.ticks = 0; + channel.sample_data = 0; + channel.dma_fetch = true; + } m_stream->update(); } @@ -599,7 +642,16 @@ void t4dwave_pcm_device::gvsel_w(offs_t offset, u32 data, u32 mem_mask) void t4dwave_pcm_device::update_irq_state() { - m_irq_cb(((m_aina & m_aintena) || (m_ainb & m_aintenb)) ? 1 : 0); + const u32 irq_state = (m_aina & m_aintena) || (m_ainb & m_aintenb); + m_miscint &= ~(1 << ADDRESS_IRQ); + + if (irq_state) + { + m_miscint |= 1 << ADDRESS_IRQ; + m_irq_cb(1); + } + else + m_irq_cb(0); } /* @@ -622,50 +674,61 @@ void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) s16 left = 0, right = 0; - //popmessage("%d: %08x -> %04x %04x delta %04x |16-bit %d sign %d stereo %d| control: %08x %d", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo, m_global_control, stream.samples()); + //popmessage("%d: %08x -> %04x %04x delta %04x |16-bit %d sign %d stereo %d| control: %08x %d | miscint %08x", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo, m_global_control, stream.samples(), m_miscint); for (int sampindex = 0; sampindex < stream.samples(); sampindex++) { - u32 sample_data = m_datain_cb(channel.lba + channel.cso); + if (channel.dma_fetch) + { + channel.sample_data = m_datain_cb(channel.lba + channel.cso); + channel.dma_fetch = false; + } - left = (s16)(sample_data >> 16); - right = (s16)(sample_data & 0xffff); + left = (s16)(channel.sample_data >> 16); + right = (s16)(channel.sample_data & 0xffff); stream.add_int(0, sampindex, left * m_volL[channel.gvsel], 32768 << 6); stream.add_int(1, sampindex, right * m_volR[channel.gvsel], 32768 << 6); - channel.cso += 4; - if (channel.cso >= channel.hso) + channel.ticks += channel.delta; + if (channel.ticks & 0x1000) { - // MIDLP_IE - if (BIT(m_global_control, 13)) + channel.dma_fetch = true; + channel.ticks -= 0x1000; + + channel.cso += 4; + if (channel.cso >= channel.hso) { - if (is_bankB) - m_ainb |= 1 << chB; - else - m_aina |= 1 << ch; - update_irq_state(); + // MIDLP_IE + if (BIT(m_global_control, 13)) + { + if (is_bankB) + m_ainb |= 1 << chB; + else + m_aina |= 1 << ch; + update_irq_state(); + } } - } - if (channel.cso >= channel.eso) - { - channel.cso = 0; - // ENDLP_IE - if (BIT(m_global_control, 12)) + if (channel.cso >= channel.eso) { - if (is_bankB) - m_ainb |= 1 << chB; - else - m_aina |= 1 << ch; - update_irq_state(); - } - if (!channel.loop_enable) - { - if (is_bankB) - m_bankB_keyon &= ~(1 << chB); - else - m_bankA_keyon &= ~(1 << ch); - continue; + channel.cso = 0; + // ENDLP_IE + if (BIT(m_global_control, 12)) + { + if (is_bankB) + m_ainb |= 1 << chB; + else + m_aina |= 1 << ch; + update_irq_state(); + } + if (!channel.loop_enable) + { + if (is_bankB) + m_bankB_keyon &= ~(1 << chB); + else + m_bankA_keyon &= ~(1 << ch); + continue; + } } } } diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index a7a076df3e2..4dc11c83db4 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -80,6 +80,7 @@ public: void global_control_w(offs_t offset, u32 data, u32 mem_mask = ~0); u32 miscint_r(offs_t offset); + void miscint_w(offs_t offset, u32 data, u32 mem_mask = ~0); u32 bankb_status_r(offs_t offset); void startb_w(offs_t offset, u32 data, u32 mem_mask = ~0); @@ -119,7 +120,7 @@ private: u32 cso; // current sample pointer u32 hso; // half trigger irq u32 eso; // end trigger irq - s16 delta; + u16 delta; // 4.12 format / 48 kHz u32 gvsel_cache; bool gvsel; @@ -132,6 +133,11 @@ private: bool loop_enable; u16 ec_envelope; u8 pci_buf; + + // internal variables for interpolation + u32 ticks; + u32 sample_data; + bool dma_fetch; }; u32 m_global_control; @@ -143,6 +149,18 @@ private: u32 m_ainb, m_aintenb; u32 m_bankB_keyon; + enum { + PB_UNDERUN_IRQ = 0, + REC_OVERUN_IRQ, + SB_IRQ, + MPU401_IRQ, + OPL3_IRQ, + ADDRESS_IRQ, + ENVELOPE_IRQ + }; + + u32 m_miscint; + enum { MUSICVOL = 0, WAVEVOL = 1 From 45671cceae9f94b3ee0e49c47ca9a13ecab2f768 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 11 Mar 2026 19:38:15 +0100 Subject: [PATCH 256/351] bus/pci/trident_4dwavedx.cpp: add LIVE_AUDIO_VIEW debugging --- src/devices/bus/pci/trident_4dwavedx.cpp | 40 +++++++++++++++++++----- src/devices/bus/pci/trident_4dwavedx.h | 2 ++ 2 files changed, 34 insertions(+), 8 deletions(-) diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index 570bd0633c0..ccc133c9f3e 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -30,6 +30,8 @@ Notes: #include "logmacro.h" +#define LIVE_AUDIO_VIEW 0 + DEFINE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device, "trident_4dwavedx", "Trident 4D Wave-DX sound card") DEFINE_DEVICE_TYPE(T4DWAVE_PCM, t4dwave_pcm_device, "t4dwave_pcm", "Trident 4D Wave-DX PCM sound engine") @@ -658,23 +660,45 @@ void t4dwave_pcm_device::update_irq_state() * Sound Stream */ -void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) +std::string t4dwave_pcm_device::print_audio_state(u64 keyon) { - if (!m_bankA_keyon && !m_bankB_keyon) - return; + std::ostringstream outbuffer; + + util::stream_format(outbuffer, "LFO_A & GC & CIR %08x | MISCINT %08x\n", m_global_control, m_miscint); for (int ch = 0; ch < 64; ch ++) { channel_t &channel = m_channel[ch]; - const bool is_bankB = !!BIT(ch, 5); - const u8 chB = ch - 32; - if ((!is_bankB && !BIT(m_bankA_keyon, ch)) || (is_bankB && !BIT(m_bankB_keyon, chB)) || channel.cso >= channel.eso) + if (!BIT(keyon, ch) || channel.cso >= channel.eso) + continue; + util::stream_format(outbuffer, "%d: LBA %08x -> CSO %05x ESO %05x DELTA %04x |16-bit %d sign %d stereo %d\n", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo); + } + + return outbuffer.str(); +} + +void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) +{ + const u64 keyon = m_bankA_keyon | ((u64)m_bankB_keyon << 32); + + if (!keyon) + return; + + if (LIVE_AUDIO_VIEW) + popmessage(print_audio_state(keyon)); + + for (int ch = 0; ch < 64; ch ++) + { + channel_t &channel = m_channel[ch]; + + if (!BIT(keyon, ch) || channel.cso >= channel.eso) continue; - s16 left = 0, right = 0; + const bool is_bankB = !!BIT(ch, 5); + const u8 chB = ch - 32; - //popmessage("%d: %08x -> %04x %04x delta %04x |16-bit %d sign %d stereo %d| control: %08x %d | miscint %08x", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo, m_global_control, stream.samples(), m_miscint); + s16 left = 0, right = 0; for (int sampindex = 0; sampindex < stream.samples(); sampindex++) { diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index 4dc11c83db4..c04905218c1 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -172,6 +172,8 @@ private: channel_t m_channel[64]; void update_irq_state(); + + std::string print_audio_state(u64 keyon); }; DECLARE_DEVICE_TYPE(TRIDENT_4DWAVEDX, trident_4dwavedx_device) From 9e700d51d2afbcbb5856535a9f20edc8df18059a Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 13 Mar 2026 16:10:54 +0100 Subject: [PATCH 257/351] bus/pci/trident_4dwavedx.cpp: implement sample playback modes --- src/devices/bus/pci/trident_4dwavedx.cpp | 202 +++++++++++++++++------ src/devices/bus/pci/trident_4dwavedx.h | 26 ++- src/devices/machine/vt82c586b_acpi.cpp | 6 +- src/mame/be/bebox_m.cpp | 2 + src/mame/pc/pcipc_via.cpp | 2 +- 5 files changed, 181 insertions(+), 57 deletions(-) diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index ccc133c9f3e..b4043748415 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -7,7 +7,8 @@ Trident 4DWAVE-DX / 4DWAVE-NX AC'97 v1.x (fixed 48 kHz) TODO: -- Add mono, 8-bit and unsigned modes; +- dxdiag: sound test don't playback on lower modes; +- diablo: ambient BGM doesn't work, SFXs don't playback from time to time; - Missing features in Bank A (testable in dxdiag -> Music -> Trident PCI WaveTable MIDI); - Move DMA reading out of sound_stream_update; - Mix-in wave engine output to AC'97 input; @@ -384,15 +385,17 @@ void t4dwave_pcm_device::device_start() save_item(STRUCT_MEMBER(m_channel, cso)); save_item(STRUCT_MEMBER(m_channel, hso)); save_item(STRUCT_MEMBER(m_channel, eso)); + save_item(STRUCT_MEMBER(m_channel, eso_cache)); save_item(STRUCT_MEMBER(m_channel, delta)); save_item(STRUCT_MEMBER(m_channel, gvsel_cache)); save_item(STRUCT_MEMBER(m_channel, gvsel)); save_item(STRUCT_MEMBER(m_channel, pan_control)); save_item(STRUCT_MEMBER(m_channel, pan_vol)); save_item(STRUCT_MEMBER(m_channel, vol)); - save_item(STRUCT_MEMBER(m_channel, is_16bit)); - save_item(STRUCT_MEMBER(m_channel, is_stereo)); - save_item(STRUCT_MEMBER(m_channel, is_signed)); + save_item(STRUCT_MEMBER(m_channel, play_mode)); +// save_item(STRUCT_MEMBER(m_channel, is_16bit)); +// save_item(STRUCT_MEMBER(m_channel, is_stereo)); +// save_item(STRUCT_MEMBER(m_channel, is_signed)); save_item(STRUCT_MEMBER(m_channel, loop_enable)); save_item(STRUCT_MEMBER(m_channel, ec_envelope)); save_item(STRUCT_MEMBER(m_channel, pci_buf)); @@ -477,7 +480,8 @@ void t4dwave_pcm_device::global_control_w(offs_t offset, u32 data, u32 mem_mask) { COMBINE_DATA(&m_global_control); - LOG("WAVE A0: Global Control %08x & %08x\n", data, mem_mask); + if (mem_mask & 0xffff'ff00) + LOG("WAVE A0: Global Control %08x & %08x\n", data, mem_mask); if (ACCESSING_BITS_0_7) m_cir = data & 0x3f; @@ -566,7 +570,7 @@ u32 t4dwave_pcm_device::cso_r(offs_t offset) if (!machine().side_effects_disabled()) m_stream->update(); - return (channel.cso >> 2) << 16; + return (channel.cso) << 16; } void t4dwave_pcm_device::cso_w(offs_t offset, u32 data, u32 mem_mask) @@ -574,7 +578,7 @@ void t4dwave_pcm_device::cso_w(offs_t offset, u32 data, u32 mem_mask) channel_t &channel = m_channel[m_cir]; if (ACCESSING_BITS_16_31) - channel.cso = (data >> 16) << 2; + channel.cso = (data >> 16); } void t4dwave_pcm_device::lba_w(offs_t offset, u32 data, u32 mem_mask) @@ -592,7 +596,7 @@ u32 t4dwave_pcm_device::eso_r(offs_t offset) { channel_t &channel = m_channel[m_cir]; - return ((channel.eso >> 2) << 16) | (channel.delta & 0xffff); + return (channel.eso_cache << 16) | (channel.delta & 0xffff); } void t4dwave_pcm_device::eso_w(offs_t offset, u32 data, u32 mem_mask) @@ -601,8 +605,20 @@ void t4dwave_pcm_device::eso_w(offs_t offset, u32 data, u32 mem_mask) if (ACCESSING_BITS_16_31) { - channel.eso = ((data >> 16) + 1) << 2; - channel.hso = channel.eso >> 1; + channel.eso_cache = (data >> 16); + const u32 eso_shift_table[4] = { 2, 1, 1, 0 }; + + // prepare ESO/HSO table here, actual range depends on mode used + for (int i = 0; i < 8; i += 2) + { + const u32 eso_shift = eso_shift_table[i >> 1]; + // TODO: on 16-bit stereo loops clearly ends at +1, others apparently don't + channel.eso[i + 0] = (channel.eso_cache + 1) >> eso_shift; + channel.eso[i + 1] = channel.eso[i + 0]; + + channel.hso[i + 0] = channel.eso[i + 0] >> 1; + channel.hso[i + 1] = channel.hso[i + 0]; + } } if (ACCESSING_BITS_0_15) { @@ -629,9 +645,10 @@ void t4dwave_pcm_device::gvsel_w(offs_t offset, u32 data, u32 mem_mask) channel.pan_control = !!BIT(channel.gvsel_cache, 30); channel.pan_vol = (channel.gvsel_cache >> 24) & 0x3f; channel.vol = (channel.gvsel_cache >> 16) & 0xff; - channel.is_16bit = !!BIT(channel.gvsel_cache, 15); - channel.is_stereo = !!BIT(channel.gvsel_cache, 14); - channel.is_signed = !!BIT(channel.gvsel_cache, 13); + channel.play_mode = (channel.gvsel_cache >> 13) & 7; +// channel.is_16bit = !!BIT(channel.gvsel_cache, 15); +// channel.is_stereo = !!BIT(channel.gvsel_cache, 14); +// channel.is_signed = !!BIT(channel.gvsel_cache, 13); channel.loop_enable = !!BIT(channel.gvsel_cache, 12); channel.ec_envelope = channel.gvsel_cache & 0xfff; @@ -662,6 +679,17 @@ void t4dwave_pcm_device::update_irq_state() std::string t4dwave_pcm_device::print_audio_state(u64 keyon) { + std::map sample_modes = { + { 0, "u8 mono " }, + { 1, "s8 mono " }, + { 2, "u8 stereo" }, + { 3, "s8 stereo" }, + { 4, "u16 mono " }, + { 5, "s16 mono " }, + { 6, "u16 stereo" }, + { 7, "s16 stereo" } + }; + std::ostringstream outbuffer; util::stream_format(outbuffer, "LFO_A & GC & CIR %08x | MISCINT %08x\n", m_global_control, m_miscint); @@ -670,16 +698,86 @@ std::string t4dwave_pcm_device::print_audio_state(u64 keyon) { channel_t &channel = m_channel[ch]; - if (!BIT(keyon, ch) || channel.cso >= channel.eso) + if (!BIT(keyon, ch) || channel.cso >= channel.eso[channel.play_mode]) continue; - util::stream_format(outbuffer, "%d: LBA %08x -> CSO %05x ESO %05x DELTA %04x |16-bit %d sign %d stereo %d\n", ch, channel.lba, channel.cso, channel.eso, channel.delta, channel.is_16bit, channel.is_signed, channel.is_stereo); + + util::stream_format(outbuffer, "%d: LBA %08x -> CSO %05x ESO %05x DELTA %04x |%s loop %d\n", + ch, channel.lba, channel.cso, channel.eso[channel.play_mode], channel.delta, + sample_modes.at(channel.play_mode), channel.loop_enable); } return outbuffer.str(); } +const t4dwave_pcm_device::get_sample_func t4dwave_pcm_device::get_sample_table[8] = +{ + &t4dwave_pcm_device::get_sample_u8_mono, + &t4dwave_pcm_device::get_sample_s8_mono, + &t4dwave_pcm_device::get_sample_u8_stereo, + &t4dwave_pcm_device::get_sample_s8_stereo, + &t4dwave_pcm_device::get_sample_u16_mono, + &t4dwave_pcm_device::get_sample_s16_mono, + &t4dwave_pcm_device::get_sample_u16_stereo, + &t4dwave_pcm_device::get_sample_s16_stereo +}; + +std::tuple t4dwave_pcm_device::get_sample_u8_mono(u32 sample_data) +{ + u16 sample = (sample_data & 0xff) ^ 0x80; + s16 out = (s16)(sample << 8); + return std::make_tuple(out, out); +} + +std::tuple t4dwave_pcm_device::get_sample_s8_mono(u32 sample_data) +{ + u16 sample = (sample_data & 0xff); + s16 out = (s16)(sample << 8); + return std::make_tuple(out, out); +} + +std::tuple t4dwave_pcm_device::get_sample_u8_stereo(u32 sample_data) +{ + u16 sample = (sample_data & 0xffff) ^ 0x8080; + return std::make_tuple((s16)(sample & 0xff00), (s16)((sample & 0x00ff) << 8)); +} + +std::tuple t4dwave_pcm_device::get_sample_s8_stereo(u32 sample_data) +{ + u16 sample = (sample_data & 0xffff); + return std::make_tuple((s16)(sample & 0xff00), (s16)((sample & 0x00ff) << 8)); +} + +std::tuple t4dwave_pcm_device::get_sample_u16_mono(u32 sample_data) +{ + u16 sample = (sample_data & 0xffff) ^ 0x8000; + s16 out = (s16)sample; + return std::make_tuple(out, out); +} + +std::tuple t4dwave_pcm_device::get_sample_s16_mono(u32 sample_data) +{ + u16 sample = (sample_data & 0xffff); + s16 out = (s16)sample; + return std::make_tuple(out, out); +} + +std::tuple t4dwave_pcm_device::get_sample_u16_stereo(u32 sample_data) +{ + u16 lsample = (sample_data >> 16) ^ 0x8000; + u16 rsample = (sample_data & 0xffff) ^ 0x8000; + return std::make_tuple((s16)lsample, (s16)rsample); +} + +std::tuple t4dwave_pcm_device::get_sample_s16_stereo(u32 sample_data) +{ + return std::make_tuple((s16)(sample_data >> 16), (s16)(sample_data & 0xffff)); +} + void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) { + const u32 cso_increment_table[8] = { 1, 1, 2, 2, 2, 2, 4, 4 }; + const u32 sample_shift[8] = { 8, 8, 16, 16, 16, 16, 32, 32 }; + const u64 keyon = m_bankA_keyon | ((u64)m_bankB_keyon << 32); if (!keyon) @@ -691,25 +789,26 @@ void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) for (int ch = 0; ch < 64; ch ++) { channel_t &channel = m_channel[ch]; + const u8 play_mode = channel.play_mode; - if (!BIT(keyon, ch) || channel.cso >= channel.eso) + if (!BIT(keyon, ch) || channel.cso >= channel.eso[play_mode]) continue; const bool is_bankB = !!BIT(ch, 5); const u8 chB = ch - 32; - s16 left = 0, right = 0; - for (int sampindex = 0; sampindex < stream.samples(); sampindex++) { if (channel.dma_fetch) { - channel.sample_data = m_datain_cb(channel.lba + channel.cso); + if (channel.pci_buf) + channel.sample_data >>= sample_shift[channel.play_mode]; + else + channel.sample_data = m_datain_cb(channel.lba + (channel.cso << 2)); channel.dma_fetch = false; } - left = (s16)(channel.sample_data >> 16); - right = (s16)(channel.sample_data & 0xffff); + auto [left, right] = (this->*get_sample_table[channel.play_mode])(channel.sample_data); stream.add_int(0, sampindex, left * m_volL[channel.gvsel], 32768 << 6); stream.add_int(1, sampindex, right * m_volR[channel.gvsel], 32768 << 6); @@ -720,38 +819,43 @@ void t4dwave_pcm_device::sound_stream_update(sound_stream &stream) channel.dma_fetch = true; channel.ticks -= 0x1000; - channel.cso += 4; - if (channel.cso >= channel.hso) + channel.pci_buf += cso_increment_table[channel.play_mode]; + channel.pci_buf &= 3; + if (channel.pci_buf == 0) { - // MIDLP_IE - if (BIT(m_global_control, 13)) + channel.cso ++; + if (channel.cso >= channel.hso[play_mode]) { - if (is_bankB) - m_ainb |= 1 << chB; - else - m_aina |= 1 << ch; - update_irq_state(); + // MIDLP_IE + if (BIT(m_global_control, 13)) + { + if (is_bankB) + m_ainb |= 1 << chB; + else + m_aina |= 1 << ch; + update_irq_state(); + } } - } - if (channel.cso >= channel.eso) - { - channel.cso = 0; - // ENDLP_IE - if (BIT(m_global_control, 12)) + if (channel.cso >= channel.eso[play_mode]) { - if (is_bankB) - m_ainb |= 1 << chB; - else - m_aina |= 1 << ch; - update_irq_state(); - } - if (!channel.loop_enable) - { - if (is_bankB) - m_bankB_keyon &= ~(1 << chB); - else - m_bankA_keyon &= ~(1 << ch); - continue; + channel.cso = 0; + // ENDLP_IE + if (BIT(m_global_control, 12)) + { + if (is_bankB) + m_ainb |= 1 << chB; + else + m_aina |= 1 << ch; + update_irq_state(); + } + if (!channel.loop_enable) + { + if (is_bankB) + m_bankB_keyon &= ~(1 << chB); + else + m_bankA_keyon &= ~(1 << ch); + continue; + } } } } diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index c04905218c1..e39f1df05a5 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -19,6 +19,7 @@ public: trident_4dwavedx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); static constexpr feature_type imperfect_features() { return feature::SOUND; } + static constexpr feature_type unemulated_features() { return feature::MICROPHONE; } protected: trident_4dwavedx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); @@ -118,8 +119,9 @@ private: struct channel_t { u32 lba; u32 cso; // current sample pointer - u32 hso; // half trigger irq - u32 eso; // end trigger irq + u32 eso_cache; + u32 hso[8]; // half trigger irq + u32 eso[8]; // end trigger irq u16 delta; // 4.12 format / 48 kHz u32 gvsel_cache; @@ -127,9 +129,10 @@ private: bool pan_control; u8 pan_vol; u8 vol; - bool is_16bit; - bool is_stereo; - bool is_signed; + u8 play_mode; + //bool is_16bit; + //bool is_stereo; + //bool is_signed; bool loop_enable; u16 ec_envelope; u8 pci_buf; @@ -173,6 +176,19 @@ private: void update_irq_state(); + typedef std::tuple (t4dwave_pcm_device::*get_sample_func)(u32 sample_data); + static const get_sample_func get_sample_table[8]; + + std::tuple get_sample_u8_mono(u32 sample_data); + std::tuple get_sample_s8_mono(u32 sample_data); + std::tuple get_sample_u8_stereo(u32 sample_data); + std::tuple get_sample_s8_stereo(u32 sample_data); + std::tuple get_sample_u16_mono(u32 sample_data); + std::tuple get_sample_s16_mono(u32 sample_data); + std::tuple get_sample_u16_stereo(u32 sample_data); + std::tuple get_sample_s16_stereo(u32 sample_data); + + std::string print_audio_state(u64 keyon); }; diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index c50c6798ba4..3556c7c159b 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -45,6 +45,7 @@ vt82c586b_acpi_device::vt82c586b_acpi_device(const machine_config &mconfig, cons : pci_device(mconfig, VT82C586B_ACPI, tag, owner, clock) , m_acpi(*this, "acpi") , m_sci_pin_cb(*this) + , m_general_config(0) { // xxxx ---- Silicon Version Code // ---- xxxx Silicon Revision Code @@ -59,6 +60,9 @@ void vt82c586b_acpi_device::device_start() { pci_device::device_start(); + // undefined, use ls5ampv3 default + m_iobase = 0x5000; + save_item(NAME(m_pin_config)); save_item(NAME(m_general_config)); save_item(NAME(m_sci_irq_config)); @@ -80,8 +84,6 @@ void vt82c586b_acpi_device::device_reset() m_pin_config = 0xc0; m_general_config = 0; m_sci_irq_config = 0; - // undefined, use ls5ampv3 default - m_iobase = 0x5000; std::fill(std::begin(m_irq_channel), std::end(m_irq_channel), 0); remap_cb(); } diff --git a/src/mame/be/bebox_m.cpp b/src/mame/be/bebox_m.cpp index 62a7266de81..38eb4797d27 100644 --- a/src/mame/be/bebox_m.cpp +++ b/src/mame/be/bebox_m.cpp @@ -85,6 +85,8 @@ #11 Intel 82378 PCI/ISA bridge #12 NCR 53C810 SCSI + Super I/O is an Intel 82091AA AIP + More hardware information at http://www.netbsd.org/Ports/bebox/hardware.html ***************************************************************************/ diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index 05d7c195a26..eff788b2e67 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -187,4 +187,4 @@ ROM_END } // anonymous namespace -COMP(1998, ls5amvp3, 0, 0, mvp3, 0, mvp3_state, empty_init, "Lucky Star", "5AMVP3 (VIA MVP3 chipset)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP(1998, ls5amvp3, 0, 0, mvp3, 0, mvp3_state, empty_init, "Lucky Star", "5AMVP3 (VIA MVP3 chipset)", MACHINE_NOT_WORKING ) From 467cb6be8610a12a0cbc74cdda60314f83aa475c Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sat, 14 Mar 2026 02:19:06 +1100 Subject: [PATCH 258/351] seta/seta2.cpp: Use standard mahjong matrix. --- src/devices/video/x1_020_dx_101.cpp | 34 ++++------- src/mame/seta/seta2.cpp | 94 ++--------------------------- 2 files changed, 18 insertions(+), 110 deletions(-) diff --git a/src/devices/video/x1_020_dx_101.cpp b/src/devices/video/x1_020_dx_101.cpp index 098efda5046..1ea98610836 100644 --- a/src/devices/video/x1_020_dx_101.cpp +++ b/src/devices/video/x1_020_dx_101.cpp @@ -474,13 +474,13 @@ inline void x1_020_dx_101_device::drawgfx_line( if (flipy) line = 7 - line; - const uint8_t* const source = addr + line * 8; + const uint8_t *const source = addr + line * 8; if (xzoom < 0x10000) // shrink { - const int x0 = flipx ? (base_sx + (8 * xzoom) - xzoom) : (base_sx); + const int x0 = flipx ? (base_sx + (8 * xzoom) - xzoom) : base_sx; const int x1 = flipx ? (base_sx - xzoom) : (x0 + (8 * xzoom)); - const int dx = flipx ? (-xzoom) : (xzoom); + const int dx = flipx ? -xzoom : xzoom; for (int sx = x0, column = 0; sx != x1; sx += dx, column++) { @@ -489,21 +489,11 @@ inline void x1_020_dx_101_device::drawgfx_line( } else // enlarge or no zoom { - const int x0 = (base_sx); - const int x1 = (x0 + (8 * xzoom)); - - int column, column_inc; - if (!flipx) - { - column = 0; - column_inc = 1; - } - else - { - column = 7; - column_inc = -1; - } + const int x0 = base_sx; + const int x1 = x0 + (8 * xzoom); + const int column_inc = flipx ? -1 : 1; + int column = flipx ? 7 : 0; uint32_t countx = 0; for (int sx = x0; sx < x1; sx += 0x10000) { @@ -574,10 +564,10 @@ inline void x1_020_dx_101_device::get_tile( int x1_020_dx_101_device::calculate_global_xoffset(bool nozoom_fixedpalette_fixedposition) { - /* +#if 0 int global_xoffset = (m_vregs[0x12/2] & 0x7ff); // and 0x10/2 for low bits if (global_xoffset & 0x400) - global_xoffset -= 0x800; + global_xoffset -= 0x800; // funcube3 sets a global xoffset of -1 causing a single pixel shift, does something else compensate for it? // note, it also writes a different address for the sprite buffering (related?) but doesn't also have the global zoom set to negative like Star Audition which also writes there. @@ -588,9 +578,9 @@ int x1_020_dx_101_device::calculate_global_xoffset(bool nozoom_fixedpalette_fixe // TODO: properly render negative zoom sprites if (global_xzoom & 0x400) { - global_xoffset -= 0x14f; + global_xoffset -= 0x14f; } - */ +#endif int global_xoffset = 0; @@ -858,7 +848,7 @@ void x1_020_dx_101_device::draw_sprites_line(bitmap_ind16 &bitmap, const rectang // see myangel, myangel2 and grdians int basecode = (code &= ~((sizex + 1) * (sizey + 1) - 1)) + - ((flipy ? sizey - y : y) * (sizex + 1)) + (flipx ? sizex : 0); + ((flipy ? (sizey - y) : y) * (sizex + 1)) + (flipx ? sizex : 0); const int code_inc = flipx ? -1 : 1; diff --git a/src/mame/seta/seta2.cpp b/src/mame/seta/seta2.cpp index 094d7ee006c..67451bfa780 100644 --- a/src/mame/seta/seta2.cpp +++ b/src/mame/seta/seta2.cpp @@ -81,6 +81,8 @@ blnctry: #include "emu.h" +#include "mahjong.h" + #include "cpu/m68000/mcf5206e.h" #include "cpu/m68000/tmp68301.h" #include "machine/eepromser.h" @@ -213,7 +215,7 @@ class mj4simai_state : public seta2_state public: mj4simai_state(const machine_config &mconfig, device_type type, const char *tag) : seta2_state(mconfig, type, tag), - m_keys{ { *this, "P1_KEY%u", 0U }, { *this, "P2_KEY%u", 0U } } + m_keys{ { *this, "KEY%u", 0U }, { *this, "KEY%u", 5U } } { } void mj4simai(machine_config &config) ATTR_COLD; @@ -428,13 +430,13 @@ void mj4simai_state::machine_start() template uint16_t mj4simai_state::mj4simai_key_r() { - uint16_t result = 0xffff; + uint16_t result = 0x3f; for (int i = 0; i < 5; i++) { if (BIT(m_keyboard_row, i)) result &= m_keys[Which][i]->read(); } - return result; + return 0xffc0 | result; } void mj4simai_state::mj4simai_map(address_map &map) @@ -1123,91 +1125,7 @@ static INPUT_PORTS_START( mj4simai ) PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("P1_KEY0") // $600000(0) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_A ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_E ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_I ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_M ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START1 ) - PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P1_KEY1") // $600000(1) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_B ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_F ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_J ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_N ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) - PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN) - - PORT_START("P1_KEY2") // $600000(2) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_C ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_G ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_K ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) - PORT_BIT( 0xffe0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P1_KEY3") // $600000(3) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_D ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_H ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_L ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) - PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P1_KEY4") // $600000(4) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) - PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P2_KEY0") // $600000(0) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START2 ) - PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P2_KEY1") // $600000(1) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(2) - PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN) - - PORT_START("P2_KEY2") // $600000(2) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2) - PORT_BIT( 0xffe0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P2_KEY3") // $600000(3) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2) - PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN ) - - PORT_START("P2_KEY4") // $600000(4) - PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(2) - PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(2) - PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(2) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(2) - PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(2) - PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2) - PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_INCLUDE(mahjong_matrix_2p_bet_wup); // $600000, $600002 INPUT_PORTS_END From 825f7de5e3a7e4fcfef9ff745efd4aeca5148bdc Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 13 Mar 2026 17:05:08 +0100 Subject: [PATCH 259/351] screen: fix configure issue if main-mcfg doesn't use set_raw and sub-mcfg does --- src/emu/screen.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/emu/screen.h b/src/emu/screen.h index ddc7510d8f7..31451d9b6a4 100644 --- a/src/emu/screen.h +++ b/src/emu/screen.h @@ -228,6 +228,7 @@ public: set_clock(pixclock); m_refresh = HZ_TO_ATTOSECONDS(pixclock) * htotal * vtotal; m_vblank = m_refresh / vtotal * (vtotal - (vbstart - vbend)); + m_oldstyle_vblank_supplied = false; m_width = htotal; m_height = vtotal; m_visarea.set(hbend, hbstart ? hbstart - 1 : htotal - 1, vbend, vbstart - 1); From 789798a5021b979e44527aedc880fbb68305494e Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Fri, 13 Mar 2026 17:11:20 +0100 Subject: [PATCH 260/351] New systems marked not working ------------------------------ Circus 2 [Ioannis Bampoulas] --- src/mame/mame.lst | 1 + src/mame/skeleton/lgtz80.cpp | 65 ++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 5201f7b8028..a9b0528ee67 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -44193,6 +44193,7 @@ lggp40 @source:skeleton/lgtz80.cpp arthurkn arthurkn100 +circus2 fruitcat pharmyst diff --git a/src/mame/skeleton/lgtz80.cpp b/src/mame/skeleton/lgtz80.cpp index 0da37115ea4..5766c230175 100644 --- a/src/mame/skeleton/lgtz80.cpp +++ b/src/mame/skeleton/lgtz80.cpp @@ -53,6 +53,7 @@ TODO: - doesn't agree at all with the current reel implementation - locks when soft-reset - inputs, outputs +- circus2 has the same problems as pharmyst, bat the stopping at system RAM check */ @@ -94,6 +95,7 @@ public: void init_arthurkn() ATTR_COLD; void init_arthurkn100() ATTR_COLD; + void init_circus2() ATTR_COLD; void init_fruitcat() ATTR_COLD; void init_pharmyst() ATTR_COLD; @@ -581,6 +583,23 @@ ROM_START( pharmyst ) // no stickers on ROMs ROM_LOAD( "atf16v8b-15pc.u21", 0x000, 0x117, NO_DUMP ) ROM_END +ROM_START( circus2 ) // no stickers on ROMs + ROM_REGION( 0x20000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD( "mx26c1000b.u21", 0x00000, 0x20000, CRC(d573d9d5) SHA1(43d72a53be06b1b4cdf5e0273ad338760b2fad62) ) + + ROM_REGION( 0x200000, "tiles", 0 ) + ROM_LOAD16_WORD_SWAP( "m27c160.u42", 0x000000, 0x200000, CRC(048afd3d) SHA1(6f969c78c4d6242df4ec41d84d2b41d6705d19df) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x200000, "reels", 0 ) + ROM_LOAD16_WORD_SWAP( "m27c160.u43", 0x000000, 0x200000, CRC(7b6ef226) SHA1(d86bb0b54094971df34403f1cc0cc426b647cc6e) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "am29f040.u18", 0x00000, 0x80000, CRC(71c42437) SHA1(70c63ea468aecf573edebb357f1b877490d65b24) ) + + ROM_REGION( 0x200, "plds", ROMREGION_ERASE00 ) + ROM_LOAD( "atf16v8b-15pc.u3", 0x000, 0x117, NO_DUMP ) +ROM_END + void lgtz80_state::init_fruitcat() { @@ -971,6 +990,51 @@ void lgtz80_state::init_pharmyst() } } +void lgtz80_state::init_circus2() +{ + // Encryption involves a permutation of odd-numbered data lines, conditional on address lines + u8 *rom = memregion("maincpu")->base(); + + for (int i = 0; i < 0x20000; i++) + { + switch (i & 0x7c0) + { + case 0x000: rom[i] = bitswap<8>(rom[i], 7, 6, 3, 4, 1, 2, 5, 0); break; + case 0x040: rom[i] = bitswap<8>(rom[i], 7, 6, 1, 4, 3, 2, 5, 0); break; + case 0x080: rom[i] = bitswap<8>(rom[i], 7, 6, 1, 4, 3, 2, 5, 0); break; + case 0x0c0: rom[i] = bitswap<8>(rom[i], 1, 6, 3, 4, 7, 2, 5, 0); break; + case 0x100: rom[i] = bitswap<8>(rom[i], 3, 6, 7, 4, 1, 2, 5, 0); break; + case 0x140: rom[i] = bitswap<8>(rom[i], 5, 6, 1, 4, 7, 2, 3, 0); break; + case 0x180: rom[i] = bitswap<8>(rom[i], 3, 6, 1, 4, 7, 2, 5, 0); break; + case 0x1c0: rom[i] = bitswap<8>(rom[i], 5, 6, 1, 4, 3, 2, 7, 0); break; + case 0x200: rom[i] = bitswap<8>(rom[i], 1, 6, 5, 4, 3, 2, 7, 0); break; + case 0x240: rom[i] = bitswap<8>(rom[i], 7, 6, 3, 4, 5, 2, 1, 0); break; + case 0x280: rom[i] = bitswap<8>(rom[i], 5, 6, 1, 4, 3, 2, 7, 0); break; + case 0x2c0: rom[i] = bitswap<8>(rom[i], 1, 6, 5, 4, 7, 2, 3, 0); break; + case 0x300: rom[i] = bitswap<8>(rom[i], 7, 6, 3, 4, 1, 2, 5, 0); break; + case 0x340: rom[i] = bitswap<8>(rom[i], 7, 6, 5, 4, 1, 2, 3, 0); break; + case 0x380: rom[i] = bitswap<8>(rom[i], 1, 6, 7, 4, 5, 2, 3, 0); break; + case 0x3c0: rom[i] = bitswap<8>(rom[i], 3, 6, 7, 4, 5, 2, 1, 0); break; + case 0x400: rom[i] = bitswap<8>(rom[i], 3, 6, 1, 4, 5, 2, 7, 0); break; + case 0x440: rom[i] = bitswap<8>(rom[i], 3, 6, 5, 4, 1, 2, 7, 0); break; + case 0x480: rom[i] = bitswap<8>(rom[i], 7, 6, 1, 4, 5, 2, 3, 0); break; + case 0x4c0: rom[i] = bitswap<8>(rom[i], 5, 6, 1, 4, 7, 2, 3, 0); break; + case 0x500: rom[i] = bitswap<8>(rom[i], 5, 6, 3, 4, 7, 2, 1, 0); break; + case 0x540: rom[i] = bitswap<8>(rom[i], 3, 6, 5, 4, 7, 2, 1, 0); break; + case 0x580: rom[i] = bitswap<8>(rom[i], 3, 6, 7, 4, 5, 2, 1, 0); break; + case 0x5c0: rom[i] = bitswap<8>(rom[i], 5, 6, 7, 4, 1, 2, 3, 0); break; + case 0x600: rom[i] = bitswap<8>(rom[i], 7, 6, 3, 4, 1, 2, 5, 0); break; + case 0x640: rom[i] = bitswap<8>(rom[i], 3, 6, 5, 4, 1, 2, 7, 0); break; + case 0x680: rom[i] = bitswap<8>(rom[i], 7, 6, 1, 4, 5, 2, 3, 0); break; + case 0x6c0: rom[i] = bitswap<8>(rom[i], 1, 6, 7, 4, 5, 2, 3, 0); break; + case 0x700: rom[i] = bitswap<8>(rom[i], 5, 6, 3, 4, 1, 2, 7, 0); break; + case 0x740: rom[i] = bitswap<8>(rom[i], 1, 6, 7, 4, 3, 2, 5, 0); break; + case 0x780: rom[i] = bitswap<8>(rom[i], 7, 6, 5, 4, 3, 2, 1, 0); break; + case 0x7c0: rom[i] = bitswap<8>(rom[i], 5, 6, 7, 4, 3, 2, 1, 0); break; + } + } +} + } // anonymous namespace @@ -978,3 +1042,4 @@ GAME( 2003?, fruitcat, 0, fruitcat, arthurkn, lgtz80_state, init GAME( 200?, arthurkn, 0, arthurkn, arthurkn, lgtz80_state, init_arthurkn, ROT0, "LGT", "Arthur's Knights", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) GAME( 200?, arthurkn100, arthurkn, arthurkn100, arthurkn100, lgtz80_state, init_arthurkn100, ROT0, "LGT (LSE license)", "Arthur's Knights (v1.00)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) GAME( 2007, pharmyst, 0, fruitcat, pharmyst, lgtz80_state, init_pharmyst, ROT0, "LGT", "Pharaoh's Mystery (USA v3.00)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) +GAME( 200?, circus2, 0, arthurkn, arthurkn, lgtz80_state, init_circus2, ROT0, "LGT", "Circus 2", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) From c3b1a0b56b9e83ee9a6fc4c2a1398eaa40faa658 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 13 Mar 2026 17:47:32 +0100 Subject: [PATCH 261/351] snk6502: remove unneeded high freq timer --- src/mame/snk/snk6502.cpp | 40 +++++++++++----------------------------- src/mame/snk/snk6502.h | 4 ---- 2 files changed, 11 insertions(+), 33 deletions(-) diff --git a/src/mame/snk/snk6502.cpp b/src/mame/snk/snk6502.cpp index 6f7bee79c1f..d281dcccfd4 100644 --- a/src/mame/snk/snk6502.cpp +++ b/src/mame/snk/snk6502.cpp @@ -18,6 +18,13 @@ DIP locations verified from manual for: * Vanguard * Nibbler +TODO: + * sasuke/satansat/vanguard discrete sound + * vanguard/fantasy speech (hd38880/hd38882 emulation) + * music freq (Satan of Saturn and clone) + * correct music waveform/volume control + * correct ROM names + **************************************************************************** Vanguard memory map (preliminary) @@ -264,18 +271,6 @@ Stephh's notes (based on the games M6502 code and some tests) : ***************************************************************************/ -/* - - TODO: - - - sasuke/satansat/vanguard discrete sound - - vanguard/fantasy speech (hd38880/hd38882 emulation) - - music freq (Satan of Saturn and clone) - - correct music waveform/volume control - - correct ROM names - -*/ - #include "emu.h" #include "snk6502.h" #include "snk6502_a.h" @@ -299,17 +294,11 @@ void snk6502_state::machine_start() { // these could be split in different MACHINE_STARTs to save only // what's actually needed, but is the extra complexity really worth it? - save_item(NAME(m_sasuke_counter)); // sasuke only save_item(NAME(m_charbank)); save_item(NAME(m_backcolor)); save_item(NAME(m_irq_mask)); // satansat only } -void snk6502_state::machine_reset() -{ - m_sasuke_counter = 0; -} - /************************************* * @@ -317,15 +306,15 @@ void snk6502_state::machine_reset() * *************************************/ -/* binary counter (1.4MHz update) */ -TIMER_DEVICE_CALLBACK_MEMBER(snk6502_state::sasuke_update_counter) +INPUT_CHANGED_MEMBER(snk6502_state::coin_inserted) { - m_sasuke_counter = (m_sasuke_counter + 1) & 0xf; + m_maincpu->set_input_line(INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE); } ioport_value snk6502_state::sasuke_count_r() { - return m_sasuke_counter; + // binary counter (1.4MHz update) + return (machine().time().as_ticks(m_maincpu->clock() * 2)) & 0xf; } @@ -473,11 +462,6 @@ void fantasy_state::pballoon_upper_map(address_map &map) * *************************************/ -INPUT_CHANGED_MEMBER(snk6502_state::coin_inserted) -{ - m_maincpu->set_input_line(INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE); -} - static INPUT_PORTS_START( snk6502_generic_joy8way ) PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN ) @@ -840,8 +824,6 @@ void snk6502_state::sasuke(machine_config &config) crtc.set_show_border_area(false); crtc.set_char_width(8); - TIMER(config, "sasuke_timer").configure_periodic(FUNC(snk6502_state::sasuke_update_counter), attotime::from_hz(11.289_MHz_XTAL / 8)); - // sound hardware SASUKE_SOUND(config, "snk6502", 0); } diff --git a/src/mame/snk/snk6502.h b/src/mame/snk/snk6502.h index 76d21e4a806..f00b88b64cc 100644 --- a/src/mame/snk/snk6502.h +++ b/src/mame/snk/snk6502.h @@ -11,7 +11,6 @@ #pragma once #include "machine/bankdev.h" -#include "machine/timer.h" #include "emupal.h" #include "tilemap.h" @@ -49,7 +48,6 @@ protected: required_shared_ptr m_colorram; required_shared_ptr m_charram; - uint8_t m_sasuke_counter = 0; int m_charbank = 0; int m_backcolor = 0; tilemap_t *m_bg_tilemap = nullptr; @@ -75,7 +73,6 @@ protected: TILE_GET_INFO_MEMBER(satansat_get_fg_tile_info); virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; DECLARE_VIDEO_START(snk6502); DECLARE_VIDEO_START(satansat); @@ -86,7 +83,6 @@ protected: INTERRUPT_GEN_MEMBER(satansat_interrupt); INTERRUPT_GEN_MEMBER(snk6502_interrupt); - TIMER_DEVICE_CALLBACK_MEMBER(sasuke_update_counter); void sasuke_start_counter(); From 29d49e8ac6dedd2ad021ba1598420c76bbb655a0 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 13 Mar 2026 19:25:44 +0100 Subject: [PATCH 262/351] fscc9ps: redumped rom e (had 1 bad bit) [Berger] --- src/mame/fidelity/sc9.cpp | 4 ++-- src/mame/sega/model2.cpp | 4 +--- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/src/mame/fidelity/sc9.cpp b/src/mame/fidelity/sc9.cpp index f949e769e91..ba4e2a5d259 100644 --- a/src/mame/fidelity/sc9.cpp +++ b/src/mame/fidelity/sc9.cpp @@ -303,8 +303,8 @@ ROM_END ROM_START( fscc9ps ) ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD("play64c1.bin", 0xc000, 0x2000, CRC(e96aa95d) SHA1(16d90cf0ef166aef579d442671290a2c43e24dfe) ) - ROM_LOAD("play64en.bin", 0xe000, 0x2000, CRC(6fa188d2) SHA1(1b9b0209c496c89ecb7f9ec07bfd9429ff9b275e) ) + ROM_LOAD("c_green", 0xc000, 0x2000, CRC(e96aa95d) SHA1(16d90cf0ef166aef579d442671290a2c43e24dfe) ) + ROM_LOAD("e_green", 0xe000, 0x2000, CRC(d7a95999) SHA1(27c19bc56a15f1ac78177683441e04f27c6e48ef) ) ROM_END } // anonymous namespace diff --git a/src/mame/sega/model2.cpp b/src/mame/sega/model2.cpp index 566a5c4eb06..39cbcb4fddf 100644 --- a/src/mame/sega/model2.cpp +++ b/src/mame/sega/model2.cpp @@ -2513,8 +2513,6 @@ void model2_state::scsp_irq(offs_t offset, u8 data) /*****************************************************************************/ -#define VIDEO_CLOCK XTAL(32'000'000) - void model2_state::model2_timers(machine_config &config) { timer_device &timer0(TIMER(config, "timer0")); @@ -2537,7 +2535,7 @@ void model2_state::model2_screen(machine_config &config) SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_video_attributes(VIDEO_UPDATE_AFTER_VBLANK); // TODO: from System 24, might not be accurate for Model 2 - m_screen->set_raw(VIDEO_CLOCK/2, 656, 0/*+69*/, 496/*+69*/, 424, 0/*+25*/, 384/*+25*/); + m_screen->set_raw(32_MHz_XTAL/2, 656, 0/*+69*/, 496/*+69*/, 424, 0/*+25*/, 384/*+25*/); m_screen->set_screen_update(FUNC(model2_state::screen_update)); m_screen->screen_vblank().set(FUNC(model2_state::screen_vblank)); From 27134d7e8751906824714857df63edcb0078073e Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 13 Mar 2026 23:17:51 +0100 Subject: [PATCH 263/351] xmen: remove local irq3 handler, correction to xmen6p frame toggle --- src/mame/konami/xmen.cpp | 47 ++++++++++++---------------------------- 1 file changed, 14 insertions(+), 33 deletions(-) diff --git a/src/mame/konami/xmen.cpp b/src/mame/konami/xmen.cpp index 38f98c5fb1f..18ae23f860d 100644 --- a/src/mame/konami/xmen.cpp +++ b/src/mame/konami/xmen.cpp @@ -93,7 +93,8 @@ protected: uint8_t m_layer_colorbase[3]{}; uint8_t m_sprite_colorbase = 0; int32_t m_layerpri[3]{}; - bool m_tilemap_select; + bool m_tilemap_select = false; + bool m_irq5_enable = false; // devices required_device m_maincpu; @@ -104,7 +105,6 @@ protected: required_device m_screen; void eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - void _18fa00_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void base(machine_config &config); void sound_hardware(machine_config &config); @@ -115,10 +115,6 @@ private: required_ioport m_eeprom_out; - // misc - bool m_irq3_enable = false; - bool m_irq5_enable = false; - void sound_bankswitch_w(uint8_t data); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -277,13 +273,19 @@ uint32_t xmen6p_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap return 0; } +int xmen6p_state::frame_r() +{ + // toggles at scanline 0 + return (m_screen->frame_number() & 1) ^ (m_screen->vpos() < m_screen->visible_area().top()); +} + // my lefts and rights are mixed up in several places.. void xmen6p_state::screen_vblank(int state) { // rising edge if (state) { - int index = m_screen->frame_number() & 1; + int index = frame_r(); bitmap_ind16 &renderbitmap = m_screen_bitmap[index]; rectangle cliprect = m_screen->cliprect(); @@ -297,7 +299,7 @@ void xmen6p_state::screen_vblank(int state) index += m_tilemap_select ? 2 : 0; for (int offset = 0; offset < (0xc000 / 2); offset++) { - if (index == 0 || (offset != 0x1c00 && offset != 0x1c80 && offset != 0x1e80)) + if ((index == 0 || (offset != 0x1c00 && offset != 0x1c80 && offset != 0x1e80)) && offset != 0x1d00) m_k052109->write(offset, m_tilemap[index][offset] & 0x00ff); } @@ -358,7 +360,7 @@ void xmen_state::eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask) // bit 4 is cs (active low) m_eeprom_out->write(data, 0xff); - // bit 5 is enabled in IRQ3, disabled in IRQ5 (sprite DMA start?) + // bit 5 is enabled in IRQ3, disabled in IRQ5 (sprite DMA end) m_irq5_enable = bool(BIT(data, 5)); if (!m_irq5_enable) m_maincpu->set_input_line(5, CLEAR_LINE); @@ -382,17 +384,6 @@ void xmen_state::eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask) } } -void xmen_state::_18fa00_w(offs_t offset, uint16_t data, uint16_t mem_mask) -{ - if (ACCESSING_BITS_0_7) - { - // bit 2 is irq3 interrupt enable - m_irq3_enable = bool(BIT(data, 2)); - if (!m_irq3_enable) - m_maincpu->set_input_line(3, CLEAR_LINE); - } -} - void xmen_state::sound_bankswitch_w(uint8_t data) { m_z80bank->set_entry(data & 0x07); @@ -414,7 +405,6 @@ void xmen_state::base_main_map(address_map &map) map(0x10a00c, 0x10a00d).r(m_k053246, FUNC(k053247_device::k053246_r)); map(0x110000, 0x113fff).ram(); map(0x18c000, 0x197fff).rw(m_k052109, FUNC(k052109_device::read), FUNC(k052109_device::write)).umask16(0x00ff); - map(0x18fa00, 0x18fa01).w(FUNC(xmen_state::_18fa00_w)); } void xmen_state::main_map(address_map &map) @@ -471,7 +461,7 @@ void xmen6p_state::main_map(address_map &map) map(0x110000, 0x113fff).ram(); // main RAM // map(0x18c000, 0x197fff).w("k052109", FUNC(k052109_device:write)).umask16(0x00ff).share("tilemapleft"); map(0x18c000, 0x197fff).ram().share(m_tilemap[0]); // left screen - map(0x18fa00, 0x18fa01).w(FUNC(xmen6p_state::_18fa00_w)); + map(0x18fa01, 0x18fa01).lw8(NAME([this] (uint8_t data) { m_k052109->write(0x1d00, data); })); // irq enable /* map(0x1ac000, 0x1af7ff).readonly(); map(0x1ac000, 0x1af7ff).writeonly(); @@ -567,11 +557,6 @@ static INPUT_PORTS_START( xmen2p ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::cs_write)) INPUT_PORTS_END -int xmen6p_state::frame_r() -{ - return m_screen->frame_number() & 1; -} - static INPUT_PORTS_START( xmen6p ) PORT_START("P1_P3") KONAMI16_LSB_UDLR(1, IPT_BUTTON3, IPT_COIN1 ) @@ -622,7 +607,6 @@ void xmen_state::machine_start() save_item(NAME(m_sprite_colorbase)); save_item(NAME(m_layer_colorbase)); save_item(NAME(m_layerpri)); - save_item(NAME(m_irq3_enable)); save_item(NAME(m_irq5_enable)); save_item(NAME(m_tilemap_select)); } @@ -636,7 +620,6 @@ void xmen_state::machine_reset() } m_sprite_colorbase = 0; - m_irq3_enable = false; m_irq5_enable = false; } @@ -644,10 +627,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(xmen_state::scanline) { int const scanline = param; - if (scanline == 240 && m_irq3_enable) // vblank-out irq - m_maincpu->set_input_line(3, ASSERT_LINE); - - if (scanline == 0 && m_irq5_enable && m_k053246->k053246_is_irq_enabled()) // sprite DMA irq? + if (scanline == 0 && m_irq5_enable && m_k053246->k053246_is_irq_enabled()) // sprite DMA end irq m_maincpu->set_input_line(5, ASSERT_LINE); } @@ -704,6 +684,7 @@ void xmen_state::base(machine_config &config) m_k052109->set_palette("palette"); m_k052109->set_screen(m_screen); m_k052109->set_tile_callback(FUNC(xmen_state::tile_callback)); + m_k052109->irq_handler().set_inputline(m_maincpu, M68K_IRQ_3); K053246(config, m_k053246, 24_MHz_XTAL); m_k053246->set_sprite_callback(FUNC(xmen_state::sprite_callback)); From 2a4bf26ce3a158691718cd09b742ffda950f65a6 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 14 Mar 2026 11:09:05 +0100 Subject: [PATCH 264/351] hp2640: correct memory_view offsets --- src/mame/hp/hp2640.cpp | 20 ++++++++++---------- src/mame/konami/xmen.cpp | 2 +- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/mame/hp/hp2640.cpp b/src/mame/hp/hp2640.cpp index 1110371843e..198aa29707c 100644 --- a/src/mame/hp/hp2640.cpp +++ b/src/mame/hp/hp2640.cpp @@ -1063,34 +1063,34 @@ void hp2640_base_state::cpu_mem_map(address_map &map) // View 0 is for normal I/O // View 1 is for poll read // Writing is independent of poll state - m_io_view[ 0 ](0x0100, 0x0100).r(m_uart, FUNC(ay51013_device::receive)); - m_io_view[ 0 ](0x0120, 0x0120).r(FUNC(hp2640_base_state::async_status_r)); + m_io_view[0](0x8100, 0x8100).r(m_uart, FUNC(ay51013_device::receive)); + m_io_view[0](0x8120, 0x8120).r(FUNC(hp2640_base_state::async_status_r)); map(0x8140, 0x8140).w(FUNC(hp2640_base_state::async_control_w)); map(0x8160, 0x8160).w(m_uart, FUNC(ay51013_device::transmit)); map(0x8300, 0x8300).w(FUNC(hp2640_base_state::kb_led_w)); - m_io_view[ 0 ](0x0300, 0x030d).r(FUNC(hp2640_base_state::kb_r)); - m_io_view[ 0 ](0x030e, 0x030e).r(FUNC(hp2640_base_state::switches_ah_r)); - m_io_view[ 0 ](0x030f, 0x030f).r(FUNC(hp2640_base_state::datacomm_sw_r)); + m_io_view[0](0x8300, 0x830d).r(FUNC(hp2640_base_state::kb_r)); + m_io_view[0](0x830e, 0x830e).r(FUNC(hp2640_base_state::switches_ah_r)); + m_io_view[0](0x830f, 0x830f).r(FUNC(hp2640_base_state::datacomm_sw_r)); map(0x8320, 0x8320).w(FUNC(hp2640_base_state::kb_prev_w)); map(0x8380, 0x8380).w(FUNC(hp2640_base_state::kb_reset_w)); - m_io_view[ 0 ](0x0380, 0x0380).r(FUNC(hp2640_base_state::switches_jr_r)); - m_io_view[ 0 ](0x03a0, 0x03a0).r(FUNC(hp2640_base_state::switches_sz_r)); + m_io_view[0](0x8380, 0x8380).r(FUNC(hp2640_base_state::switches_jr_r)); + m_io_view[0](0x83a0, 0x83a0).r(FUNC(hp2640_base_state::switches_sz_r)); map(0x8700, 0x8700).w(FUNC(hp2640_base_state::cx_w)); map(0x8720, 0x8720).w(FUNC(hp2640_base_state::cy_w)); map(0x8b00, 0x8b00).w(m_tapes, FUNC(hp2640_tape_device::command_w)); - m_io_view[ 0 ](0x0b00, 0x0b00).r(m_tapes, FUNC(hp2640_tape_device::status_r)); + m_io_view[0](0x8b00, 0x8b00).r(m_tapes, FUNC(hp2640_tape_device::status_r)); map(0x8b20, 0x8b20).w(m_tapes, FUNC(hp2640_tape_device::data_w)); - m_io_view[ 0 ](0x0b20, 0x0b20).r(m_tapes, FUNC(hp2640_tape_device::data_r)); + m_io_view[0](0x8b20, 0x8b20).r(m_tapes, FUNC(hp2640_tape_device::data_r)); - m_io_view[ 1 ](0x0000, 0x0fff).r(FUNC(hp2640_base_state::poll_r)); + m_io_view[1](0x8000, 0x8fff).r(FUNC(hp2640_base_state::poll_r)); map(0x9100, 0x91ff).ram(); map(0xc000, 0xffff).ram(); diff --git a/src/mame/konami/xmen.cpp b/src/mame/konami/xmen.cpp index 18ae23f860d..1082be44f39 100644 --- a/src/mame/konami/xmen.cpp +++ b/src/mame/konami/xmen.cpp @@ -276,7 +276,7 @@ uint32_t xmen6p_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap int xmen6p_state::frame_r() { // toggles at scanline 0 - return (m_screen->frame_number() & 1) ^ (m_screen->vpos() < m_screen->visible_area().top()); + return (m_screen->frame_number() & 1) ^ (m_screen->vpos() < m_screen->visible_area().top()) ? 1 : 0; } // my lefts and rights are mixed up in several places.. From 2c7171cffeb4bafd55d2f0941ca54c4632060dde Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 13 Mar 2026 21:21:28 +0100 Subject: [PATCH 265/351] bus/pc98_cbus/lha201.cpp: fix SCSI crash regression --- src/devices/bus/pc98_cbus/lha201.cpp | 2 +- src/mame/misc/funkball.cpp | 5 +---- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/src/devices/bus/pc98_cbus/lha201.cpp b/src/devices/bus/pc98_cbus/lha201.cpp index bfab22c733c..ab84a39c710 100644 --- a/src/devices/bus/pc98_cbus/lha201.cpp +++ b/src/devices/bus/pc98_cbus/lha201.cpp @@ -49,7 +49,7 @@ void lha201_device::device_add_mconfig(machine_config &config) // two xtals, 28 MHz (MX2) and 20 MHz (MX1) // FIXME: check frequency select in wd core - WD33C93B(config, m_wdc, 20'000'000 / 4); + WD33C93B(config.replace(), m_wdc, 20'000'000 / 4); m_scsi_bus->set_external_device(7, m_wdc); m_wdc->irq_cb().set(DEVICE_SELF, FUNC(lha201_device::scsi_irq_w)); m_wdc->drq_cb().set(DEVICE_SELF, FUNC(lha201_device::scsi_drq_w)); diff --git a/src/mame/misc/funkball.cpp b/src/mame/misc/funkball.cpp index 4d9b793edbd..85aca13c5ba 100644 --- a/src/mame/misc/funkball.cpp +++ b/src/mame/misc/funkball.cpp @@ -7,8 +7,6 @@ MEDIAGX CPU + 3dFX VooDoo chipset TODO: - convert to new PCI; -- Uneven animations in places (dgPIX logo animation, flags in Kang stage); (*) -- Player 1 side serve logic looks broken; (*) - Actual timer source; - I/Os, and actual test mode (if exists); - Hangs when trying to save settings in options menu, or alternatively throws "Erase TIME OUT". @@ -16,14 +14,13 @@ TODO: - Can lockup on soft resets; - One H pixel display off in Voodoo screen setup; -(*) https://www.youtube.com/watch?v=VbTskI8E7EY those are regressions, weren't like that in 2021 - Notes: - dgPIX logo looks odd, but that's a btanb. cfr. https://www.youtube.com/watch?v=T99K9dESszw&t=4658s - Branch at PC=CE8A: sets "Timer Divisor 0" in debug strings; - UART seems also to be used from terminal to host (with pic[0] ir4_w enabled), is there a verbose/debug mode flag disabled somewhere? - None of the other irqs seems used, NMI just causes a debug exception (that stops running machine); +- Reference 2021 MAME video https://www.youtube.com/watch?v=VbTskI8E7EY =================================================================================================== From 0dcf95949e6c2c3d3ebe536dc901950486b200af Mon Sep 17 00:00:00 2001 From: angelosa Date: Sat, 14 Mar 2026 13:41:07 +0100 Subject: [PATCH 266/351] intel/i420ex.cpp: hookup skeleton for Intel 420ex based chipset New systems marked not working ------------------------------ Classic/PCI LP "Entrada" [The Retro Web] --- src/mame/intel/i420ex.cpp | 114 ++++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 3 + src/mame/pc/pcipc_via.cpp | 1 - 3 files changed, 117 insertions(+), 1 deletion(-) create mode 100644 src/mame/intel/i420ex.cpp diff --git a/src/mame/intel/i420ex.cpp b/src/mame/intel/i420ex.cpp new file mode 100644 index 00000000000..a6c519cd7ce --- /dev/null +++ b/src/mame/intel/i420ex.cpp @@ -0,0 +1,114 @@ +// license:BSD-3-Clause +// copyright-holders: +/************************************************************************************************** + +Intel 420EX PCIset EX "Aries" x86 based HW + +- northbridge 82425EX "PSC" +- southbridge 82426EX "IB" +- Intel UPI-C42 keyboard MCU +- Dallas DS12887 +- Super I/O 82091AA "AIP" (same as BeBox) +- Onboard Cirrus Logic CL-GD5434 +- max RAM 64MB; +- Proprietary PISA riser slot for 1x ISA + 2 PCI slots; + +TODO: +- skeleton; + +**************************************************************************************************/ + +#include "emu.h" + +#include "bus/isa/isa_cards.h" +#include "bus/pci/pci_slot.h" +//#include "bus/rs232/hlemouse.h" +//#include "bus/rs232/null_modem.h" +//#include "bus/rs232/rs232.h" +//#include "bus/rs232/sun_kbd.h" +//#include "bus/rs232/terminal.h" +#include "cpu/i386/i386.h" +#include "machine/pci.h" + +#include "softlist.h" +#include "softlist_dev.h" + +namespace { + +class i420ex_state : public driver_device +{ +public: + i420ex_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void i420ex(machine_config &config) ATTR_COLD; + +protected: + required_device m_maincpu; + +private: + void main_io(address_map &map) ATTR_COLD; + void main_map(address_map &map) ATTR_COLD; +}; + + +void i420ex_state::main_map(address_map &map) +{ + map.unmap_value_high(); + map(0x0000'0000, 0x0009'ffff).ram(); + map(0x000f'0000, 0x000f'ffff).rom().region("bios", 0); + map(0xffff'0000, 0xffff'ffff).rom().region("bios", 0); +} + +void i420ex_state::main_io(address_map &map) +{ + map.unmap_value_high(); +} + +void i420ex_state::i420ex(machine_config &config) +{ + // Socket 3 / PGA237 + // FSB 25/33 MHz + I486DX4(config, m_maincpu, 33'000'000); + m_maincpu->set_addrmap(AS_PROGRAM, &i420ex_state::main_map); + m_maincpu->set_addrmap(AS_IO, &i420ex_state::main_io); +// m_maincpu->set_irq_acknowledge_callback("pci:07.0:pic0", FUNC(pic8259_device::inta_cb)); +// m_maincpu->smiact().set("pci:00.0", FUNC(vt82c598mvp_host_device::smi_act_w)); + + // TODO: config space not known + PCI_ROOT(config, "pci", 0); + + // TODO: on proprietary riser +// PCI_SLOT(config, "pci:1", pci_cards, 8, 0, 1, 2, 3, nullptr); +// PCI_SLOT(config, "pci:2", pci_cards, 9, 1, 2, 3, 0, nullptr); + +// ISA16_SLOT(config, "board1", 0, "pci:07.0:isabus", isa_internal_devices, "i82091aa", true).set_option_machine_config("i82091aa", intel_superio_config); +// ISA16_SLOT(config, "board2", 0, "pci:07.0:isabus", isa_internal_devices, "rtc", true).set_option_machine_config("rtc", rtc_config); +// ISA16_SLOT(config, "board3", 0, "pci:07.0:isabus", isa_internal_devices, "kbd", true).set_option_machine_config("kbd", kbd_config); + // most likely PCI version really (gd5434 can be ISA16, VL-Bus or PCI) +// ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "vga", true); +// ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); +} + + +// dump comes from flash updater, each has $80 bytes of header at top (ignoreable) then the actual dump +ROM_START( entrada ) + ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) + // AZ3 version + ROM_LOAD( "03_az0.bio", 0x00000, 0x00080, CRC(e0d3ac40) SHA1(a315be210a6233bf5cd863fb4a6313cdcea26442) ) + ROM_CONTINUE( 0x00000, 0x10000 ) + + // unknown, maybe a bank for the onboard UPI-C42 keyboard MCU? + // doesn't decode as x86 code + ROM_REGION( 0x10000, "mcu", ROMREGION_ERASEFF ) + ROM_LOAD( "03_az0.bi1", 0x00000, 0x00080, CRC(3976fb38) SHA1(17159457ff8b7fa7ab0a97ccf71e5e5c8df0fe3e) ) + ROM_CONTINUE( 0x00000, 0x0c000 ) +ROM_END + +} // anonymous namespace + + +COMP( 1994, entrada, 0, 0, i420ex, 0, i420ex_state, empty_init, "Intel", "Classic/PCI LP \"Entrada\" (Intel I420EX Aries chipset)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index a9b0528ee67..2de33d830a2 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -22215,6 +22215,9 @@ in213ae basic31 basic52 +@source:intel/i420ex.cpp +entrada + @source:intel/imds2.cpp imds2 diff --git a/src/mame/pc/pcipc_via.cpp b/src/mame/pc/pcipc_via.cpp index eff788b2e67..0962fcc9f17 100644 --- a/src/mame/pc/pcipc_via.cpp +++ b/src/mame/pc/pcipc_via.cpp @@ -38,7 +38,6 @@ #include "machine/vt82c586b_isa.h" #include "machine/vt82c586b_usb.h" #include "machine/vt82c598mvp.h" -//#include "video/voodoo_pci.h" #include "softlist.h" #include "softlist_dev.h" From 307cb26a4b15b3e659128503b1665e532e921098 Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Sat, 14 Mar 2026 14:53:50 +0100 Subject: [PATCH 267/351] sdl3: Fix black screen when launching with -video soft on MacOS (#15100) --- src/osd/modules/render/drawsdl3soft.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/osd/modules/render/drawsdl3soft.cpp b/src/osd/modules/render/drawsdl3soft.cpp index 8601f8315ef..9fbee8584ca 100644 --- a/src/osd/modules/render/drawsdl3soft.cpp +++ b/src/osd/modules/render/drawsdl3soft.cpp @@ -144,6 +144,19 @@ void renderer_sdl1::setup_texture(const osd_dim &size) fmt = (m_scale_mode.pixel_format ? m_scale_mode.pixel_format : mode->format); + // The software renderer does not write the alpha channel, leaving it as zero. + // On macOS this causes all color channels to be multiplied to zero, producing a black screen. + // Map alpha formats to their opaque equivalents so SDL treats the alpha byte as + // padding and fills it with 0xFF when blitting to the window surface. + switch (SDL_PixelFormat(fmt)) + { + case SDL_PIXELFORMAT_ARGB8888: fmt = SDL_PIXELFORMAT_XRGB8888; break; + case SDL_PIXELFORMAT_ABGR8888: fmt = SDL_PIXELFORMAT_XBGR8888; break; + case SDL_PIXELFORMAT_RGBA8888: fmt = SDL_PIXELFORMAT_RGBX8888; break; + case SDL_PIXELFORMAT_BGRA8888: fmt = SDL_PIXELFORMAT_BGRX8888; break; + default: break; + } + if (m_scale_mode.is_scale) { int m_hw_scale_width = 0; From e7f813b2c93213c343453ddb5be3d8a5f9e20f92 Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Sat, 14 Mar 2026 15:49:33 +0100 Subject: [PATCH 268/351] sdl3: Render OSD at native resolution on scaled high DPI displays (#15102) --- src/osd/modules/osdwindow.h | 1 + src/osd/modules/render/drawbgfx.cpp | 8 ++++---- src/osd/modules/render/drawogl.cpp | 4 ++-- src/osd/modules/render/drawsdl3accel.cpp | 4 ++-- src/osd/modules/render/drawsdl3soft.cpp | 4 ++-- src/osd/sdl3/window.cpp | 19 +++++++++++++++++++ src/osd/sdl3/window.h | 1 + 7 files changed, 31 insertions(+), 10 deletions(-) diff --git a/src/osd/modules/osdwindow.h b/src/osd/modules/osdwindow.h index 9167a775682..340261bb12b 100644 --- a/src/osd/modules/osdwindow.h +++ b/src/osd/modules/osdwindow.h @@ -76,6 +76,7 @@ public: bool keepaspect() const; virtual osd_dim get_size() = 0; + virtual osd_dim get_size_pixels() { return get_size(); } osd_monitor_info *monitor() const { return m_monitor.get(); } std::shared_ptr monitor_from_rect(const osd_rect *proposed) const; diff --git a/src/osd/modules/render/drawbgfx.cpp b/src/osd/modules/render/drawbgfx.cpp index d3afeca046b..17a627d63c9 100644 --- a/src/osd/modules/render/drawbgfx.cpp +++ b/src/osd/modules/render/drawbgfx.cpp @@ -328,7 +328,7 @@ void video_bgfx::save_config(config_type cfg_type, util::xml::data_node *parentn bool video_bgfx::init_bgfx_library(osd_window &window) { - osd_dim const wdim = window.get_size(); + osd_dim const wdim = window.get_size_pixels(); bgfx::Init init; init.type = bgfx::RendererType::Count; @@ -696,7 +696,7 @@ renderer_bgfx::~renderer_bgfx() int renderer_bgfx::create() { - const osd_dim wdim = window().get_size(); + const osd_dim wdim = window().get_size_pixels(); s_width[window().index()] = wdim.width(); s_height[window().index()] = wdim.height(); m_dimensions = wdim; @@ -1238,7 +1238,7 @@ int renderer_bgfx::draw(int update) if (m_ortho_view) m_ortho_view->set_index(UINT_MAX); - osd_dim wdim = window().get_size(); + osd_dim wdim = window().get_size_pixels(); s_width[window_index] = wdim.width(); s_height[window_index] = wdim.height(); @@ -1458,7 +1458,7 @@ render_primitive_list *renderer_bgfx::get_primitives() chain_transform = chain->transform(); } - osd_dim wdim = window().get_size(); + osd_dim wdim = window().get_size_pixels(); if (wdim.width() > 0 && wdim.height() > 0) window().target()->set_bounds(wdim.width(), wdim.height(), window().pixel_aspect()); diff --git a/src/osd/modules/render/drawogl.cpp b/src/osd/modules/render/drawogl.cpp index b9229ed46f3..f2cdd5e0fa1 100644 --- a/src/osd/modules/render/drawogl.cpp +++ b/src/osd/modules/render/drawogl.cpp @@ -301,7 +301,7 @@ public: #endif virtual render_primitive_list *get_primitives() override { - osd_dim nd = window().get_size(); + osd_dim nd = window().get_size_pixels(); if (nd != m_blit_dim) { m_blit_dim = nd; @@ -1163,7 +1163,7 @@ int renderer_ogl::draw(const int update) float vofs, hofs; int pendingPrimitive=GL_NO_PRIMITIVE, curPrimitive=GL_NO_PRIMITIVE; - osd_dim wdim = window().get_size(); + osd_dim wdim = window().get_size_pixels(); if (has_flags(FI_CHANGED) || (wdim.width() != m_width) || (wdim.height() != m_height)) { diff --git a/src/osd/modules/render/drawsdl3accel.cpp b/src/osd/modules/render/drawsdl3accel.cpp index 62f31f545fe..c8223078c39 100644 --- a/src/osd/modules/render/drawsdl3accel.cpp +++ b/src/osd/modules/render/drawsdl3accel.cpp @@ -490,7 +490,7 @@ int renderer_sdl2::draw(int update) float vofs, hofs; int blit_pixels = 0; - osd_dim wdim = window().get_size(); + osd_dim wdim = window().get_size_pixels(); if (has_flags(FI_CHANGED) || (wdim.width() != m_width) || (wdim.height() != m_height)) { @@ -918,7 +918,7 @@ texture_info * renderer_sdl2::texture_update(const render_primitive &prim) render_primitive_list *renderer_sdl2::get_primitives() { - osd_dim nd = window().get_size(); + osd_dim nd = window().get_size_pixels(); if (nd != m_blit_dim) { m_blit_dim = nd; diff --git a/src/osd/modules/render/drawsdl3soft.cpp b/src/osd/modules/render/drawsdl3soft.cpp index 9fbee8584ca..53d594e8a09 100644 --- a/src/osd/modules/render/drawsdl3soft.cpp +++ b/src/osd/modules/render/drawsdl3soft.cpp @@ -264,7 +264,7 @@ int renderer_sdl1::draw(int update) int32_t vofs, hofs, blitwidth, blitheight, ch, cw; int bpp; - osd_dim wdim = window().get_size(); + osd_dim wdim = window().get_size_pixels(); if (has_flags(FI_CHANGED) || (wdim != m_last_dim)) { destroy_all_textures(); @@ -617,7 +617,7 @@ static void yuv_RGB_to_YUY2X2(const uint16_t *bitmap, uint8_t *ptr, const int pi render_primitive_list *renderer_sdl1::get_primitives() { - osd_dim nd = window().get_size(); + osd_dim nd = window().get_size_pixels(); if (nd != m_blit_dim) { m_blit_dim = nd; diff --git a/src/osd/sdl3/window.cpp b/src/osd/sdl3/window.cpp index 541528902ad..cc48c349fbd 100644 --- a/src/osd/sdl3/window.cpp +++ b/src/osd/sdl3/window.cpp @@ -304,6 +304,12 @@ void sdl_window_info::update_cursor_state() int sdl_window_info::xy_to_render_target(int x, int y, int *xt, int *yt) { + osd_dim const logical = get_size(); + osd_dim const pixel = get_size_pixels(); + float const x_scale = pixel.width() / logical.width(); + float const y_scale = pixel.height() / logical.height(); + x = std::lround(x * x_scale); + y = std::lround(y * y_scale); return renderer().xy_to_render_target(x, y, xt, yt); } @@ -866,6 +872,7 @@ int sdl_window_info::complete_create() SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_WIDTH_NUMBER, temp.width()); SDL_SetNumberProperty(props, SDL_PROP_WINDOW_CREATE_HEIGHT_NUMBER, temp.height()); SDL_SetBooleanProperty(props, SDL_PROP_WINDOW_CREATE_RESIZABLE_BOOLEAN, true); + SDL_SetBooleanProperty(props, SDL_PROP_WINDOW_CREATE_HIGH_PIXEL_DENSITY_BOOLEAN, true); } if (fullscreen()) @@ -1251,6 +1258,18 @@ osd_dim sdl_window_info::get_size() } +//============================================================ +// get_size_pixels +//============================================================ + +osd_dim sdl_window_info::get_size_pixels() +{ + int w = 0, h = 0; + SDL_GetWindowSizeInPixels(platform_window(), &w, &h); + return osd_dim(w, h); +} + + //============================================================ // get_max_bounds // (window thread) diff --git a/src/osd/sdl3/window.h b/src/osd/sdl3/window.h index 1d812c48f8e..2f8a744690b 100644 --- a/src/osd/sdl3/window.h +++ b/src/osd/sdl3/window.h @@ -60,6 +60,7 @@ public: void notify_changed(); osd_dim get_size() override; + osd_dim get_size_pixels() override; int xy_to_render_target(int x, int y, int *xt, int *yt); From 6915127b7adab8fc79d42ad060da32934cd2b8cb Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sat, 14 Mar 2026 16:50:26 +0100 Subject: [PATCH 269/351] New working clones ------------------ Golden Star (Blue version, newer) [anonymous] --- src/mame/igs/goldstar.cpp | 18 +++++++++++++++++- src/mame/mame.lst | 1 + 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/src/mame/igs/goldstar.cpp b/src/mame/igs/goldstar.cpp index 237010380fd..b7f59eec93c 100644 --- a/src/mame/igs/goldstar.cpp +++ b/src/mame/igs/goldstar.cpp @@ -15698,7 +15698,7 @@ void goldstar_state::goldstbl(machine_config &config) aysnd.port_b_read_callback().set_ioport("DSW3"); aysnd.add_route(ALL_OUTPUTS, "mono", 0.50); - OKIM6295(config, "oki", OKI_CLOCK, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 1.0); // clock frequency & pin 7 not verified + OKIM6295(config, "oki", 1_MHz_XTAL, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 1.0); // 1000J blue resonator. Pin 7 not verified // payout hardware TICKET_DISPENSER(config, m_ticket_dispenser, attotime::from_msec(50)); @@ -17120,6 +17120,21 @@ ROM_START( goldstbl ) ROM_LOAD( "gs1-snd.bin", 0x0000, 0x20000, CRC(9d58960f) SHA1(c68edf95743e146398aabf6b9617d18e1f9bf25b) ) ROM_END +ROM_START( goldstbla ) // program similar to goldstbl, with some spelling fixes and other minor changes + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "14", 0x00000, 0x10000, CRC(1bf55f1e) SHA1(dff12d357fc4ce1fd07140e53e983a24a7b7c3f7) ) // 0xxxxxxxxxxxxxxxx = 0xFF + ROM_CONTINUE( 0x00000, 0x10000 ) + + ROM_REGION( 0x20000, "gfx1", 0 ) + ROM_LOAD( "12", 0x00000, 0x20000, CRC(a2d5b898) SHA1(84cca22c91628cfefb67013652b151f034a06159) ) + + ROM_REGION( 0x20000, "gfx2", 0 ) + ROM_LOAD( "13", 0x00000, 0x20000, CRC(8a5f274d) SHA1(0f2ad61b00e220fc509c01c11c1a8f4e47b54f2a) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "11", 0x00000, 0x20000, CRC(9d58960f) SHA1(c68edf95743e146398aabf6b9617d18e1f9bf25b) ) +ROM_END + /* Star 100, by Sang Ho. @@ -33722,6 +33737,7 @@ void cmaster_state::init_cm99() // YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS LAYOUT GAMEL( 199?, goldstar, 0, goldstar, goldstar, goldstar_state, init_goldstar, ROT0, "IGS", "Golden Star", 0, layout_goldstar ) GAMEL( 199?, goldstbl, goldstar, goldstbl, goldstar, goldstar_state, empty_init, ROT0, "IGS", "Golden Star (Blue version)", 0, layout_goldstar ) +GAMEL( 199?, goldstbla, goldstar, moonlght, goldstar, goldstar_state, empty_init, ROT0, "bootleg", "Golden Star (Blue version, newer)", 0, layout_goldstar ) GAME( 199?, moonlght, goldstar, moonlght, goldstar, goldstar_state, empty_init, ROT0, "bootleg", "Moon Light (v.0629, low program)", 0 ) GAME( 199?, moonlghta, goldstar, moonlght, goldstar, goldstar_state, empty_init, ROT0, "bootleg", "Moon Light (v.0629, high program)", 0 ) GAME( 199?, moonlghtb, goldstar, moonlght, goldstar, goldstar_state, init_moonlghtb, ROT0, "bootleg", "Moon Light (v.02L0A, low program)", 0 ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 2de33d830a2..0c7c6a38f5f 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -20863,6 +20863,7 @@ fl7_twa goldfrui goldstar goldstbl +goldstbla gregular halltsk hamhouse From 96b046e737ff956ab5031d72ad2177e8abf08c92 Mon Sep 17 00:00:00 2001 From: Miso Kim Date: Sun, 15 Mar 2026 00:58:07 +0900 Subject: [PATCH 270/351] samsung/spc1000.cpp: Corrected AY-3-8910 clock to 2MHz. (#15103) The PSG on this system is clocked at half the CPU frequency (4MHz / 2 = 2MHz), which is necessary for the sound to be played at the correct pitch and speed. --- src/mame/samsung/spc1000.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/samsung/spc1000.cpp b/src/mame/samsung/spc1000.cpp index 58e2b907225..b28216b06c2 100644 --- a/src/mame/samsung/spc1000.cpp +++ b/src/mame/samsung/spc1000.cpp @@ -494,7 +494,7 @@ void spc1000_state::spc1000(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); - ay8910_device &ay8910(AY8910(config, "ay8910", XTAL(4'000'000) / 1)); + ay8910_device &ay8910(AY8910(config, "ay8910", XTAL(4'000'000) / 2)); ay8910.port_a_read_callback().set(FUNC(spc1000_state::porta_r)); ay8910.port_b_write_callback().set("cent_data_out", FUNC(output_latch_device::write)); ay8910.add_route(ALL_OUTPUTS, "mono", 1.00); From 8d70bcab0c249fd91d75c1288efea17328caae17 Mon Sep 17 00:00:00 2001 From: holub Date: Sat, 14 Mar 2026 11:58:46 -0400 Subject: [PATCH 271/351] sinclair/specnext_uart.cpp: Emulated The Spectrum Next UART (#15058) --- src/mame/sinclair/specnext.cpp | 97 ++++++++++++++- src/mame/sinclair/specnext_uart.cpp | 179 ++++++++++++++++++++++++++++ src/mame/sinclair/specnext_uart.h | 55 +++++++++ 3 files changed, 329 insertions(+), 2 deletions(-) create mode 100644 src/mame/sinclair/specnext_uart.cpp create mode 100644 src/mame/sinclair/specnext_uart.h diff --git a/src/mame/sinclair/specnext.cpp b/src/mame/sinclair/specnext.cpp index 3f98e3c1c39..12495417457 100644 --- a/src/mame/sinclair/specnext.cpp +++ b/src/mame/sinclair/specnext.cpp @@ -31,7 +31,11 @@ #include "specnext_lores.h" #include "specnext_sprites.h" #include "specnext_tiles.h" +#include "specnext_uart.h" +#include "bus/rs232/rs232.h" +#include "bus/rs232/null_modem.h" +#include "bus/rs232/pty.h" #include "bus/spectrum/zxbus/bus.h" #include "cpu/z80/z80n.h" #include "machine/ds1307.h" @@ -115,11 +119,16 @@ public: , m_view6(*this, "mem_view6") , m_view7(*this, "mem_view7") , m_im2_line(*this, "im2_line") + , m_im2_uart0_rx(*this, "im2_uart0_rx") + , m_im2_uart1_rx(*this, "im2_uart1_rx") , m_im2_ula(*this, "im2_ula") + , m_im2_uart0_tx(*this, "im2_uart0_tx") + , m_im2_uart1_tx(*this, "im2_uart1_tx") , m_copper(*this, "copper") , m_ctc(*this, "ctc") , m_dma(*this, "dma") , m_i2c(*this, "i2c") + , m_uart(*this, "uart%u", 0U) , m_sdcards(*this, "sdcard%u", 0U) , m_ay(*this, "ay%u", 0U) , m_dac(*this, "dac%u", 0U) @@ -177,6 +186,8 @@ protected: void spi_data_w(u8 data); void spi_miso_w(u8 data); void i2c_scl_w(u8 data); + template u8 uart_reg_r(); + template void uart_reg_w(u8 data); void palette_val_w(u8 nr_palette_priority, u16 nr_palette_value); u8 port_ff_r(); void port_ff_w(u8 data); @@ -346,11 +357,16 @@ private: memory_bank_array_creator<8> m_bank_ram; memory_view m_view0, m_view1, m_view2, m_view3, m_view4, m_view5, m_view6, m_view7; required_device m_im2_line; + optional_device m_im2_uart0_rx; + optional_device m_im2_uart1_rx; required_device m_im2_ula; + optional_device m_im2_uart0_tx; + optional_device m_im2_uart1_tx; required_device m_copper; required_device m_ctc; required_device m_dma; optional_device m_i2c; + optional_device_array m_uart; required_device_array m_sdcards; required_device_array m_ay; required_device_array m_dac; @@ -601,6 +617,7 @@ private: bool m_port_ff3b_ulap_en; u8 m_ay_select; // u2 + bool m_uart_select; emu_timer *m_irq_line_timer; emu_timer *m_spi_clock; @@ -1185,6 +1202,25 @@ void specnext_state::i2c_scl_w(u8 data) } } +template u8 specnext_state::uart_reg_r() +{ + if (!port_uart_io_en()) + return 0x00; + + return m_uart[m_uart_select]->reg_r(Reg); +} + +template void specnext_state::uart_reg_w(u8 data) +{ + if (!port_uart_io_en()) + return; + + if (Reg == 0b01) + m_uart_select = BIT(data, 6); + + m_uart[m_uart_select]->reg_w(Reg, data); +} + void specnext_state::turbosound_address_w(u8 data) { if ((data & 0x9c) == 0x9c) @@ -2596,17 +2632,23 @@ void specnext_state::nr_c0_im2_vector_w(bool mode_im2, u8 vector) const u8 vector_base = mode_im2 ? m_nr_c0_im2_vector << 5 : 0xff; m_im2_line->vector_w(vector_base | (INT_PRIORITY_LINE << 1)); + m_im2_uart0_rx->vector_w(vector_base | (INT_PRIORITY_UART0_RX << 1)); + m_im2_uart1_rx->vector_w(vector_base | (INT_PRIORITY_UART1_RX << 1)); m_ctc->vector_w(vector_base); m_im2_ula->vector_w(vector_base | (INT_PRIORITY_ULA << 1)); + m_im2_uart0_tx->vector_w(vector_base | (INT_PRIORITY_UART0_TX << 1)); + m_im2_uart1_tx->vector_w(vector_base | (INT_PRIORITY_UART1_TX << 1)); } static const z80_daisy_config z80_daisy_chain[] = { { "im2_line" }, - // { "uart_rx" }, + { "im2_uart0_rx" }, + { "im2_uart1_rx" }, { "ctc" }, { "im2_ula" }, - // { "uart_tx" }, + { "im2_uart0_tx" }, + { "im2_uart1_tx" }, { nullptr } }; @@ -2640,11 +2682,15 @@ void specnext_state::irq_w(int state) const int tmp = m_im2_int_status; m_im2_int_status &= 1 << INT_PRIORITY_NMI; + m_im2_int_status |= ((m_im2_uart0_tx->z80daisy_irq_state() & Z80_DAISY_IEO) != 0) << INT_PRIORITY_UART0_TX; + m_im2_int_status |= ((m_im2_uart1_tx->z80daisy_irq_state() & Z80_DAISY_IEO) != 0) << INT_PRIORITY_UART1_TX; m_im2_int_status |= ((m_im2_ula->z80daisy_irq_state() & Z80_DAISY_IEO) != 0) << INT_PRIORITY_ULA; m_im2_int_status |= ((m_ctc->z80daisy_chanel_irq_state(3) & Z80_DAISY_IEO) != 0) << (INT_PRIORITY_CTC + 3); m_im2_int_status |= ((m_ctc->z80daisy_chanel_irq_state(2) & Z80_DAISY_IEO) != 0) << (INT_PRIORITY_CTC + 2); m_im2_int_status |= ((m_ctc->z80daisy_chanel_irq_state(1) & Z80_DAISY_IEO) != 0) << (INT_PRIORITY_CTC + 1); m_im2_int_status |= ((m_ctc->z80daisy_chanel_irq_state(0) & Z80_DAISY_IEO) != 0) << (INT_PRIORITY_CTC + 0); + m_im2_int_status |= ((m_im2_uart0_rx->z80daisy_irq_state() & Z80_DAISY_IEO) != 0) << INT_PRIORITY_UART0_RX; + m_im2_int_status |= ((m_im2_uart1_rx->z80daisy_irq_state() & Z80_DAISY_IEO) != 0) << INT_PRIORITY_UART1_RX; m_im2_int_status |= ((m_im2_line->z80daisy_irq_state() & Z80_DAISY_IEO) != 0) << INT_PRIORITY_LINE; LOGINTVVV("IRQ%s: %04x -> %04x\n", state ? "+" : "-", tmp, m_im2_int_status); @@ -3016,6 +3062,10 @@ void specnext_state::map_io(address_map &map) bank_update(0, 6); })); + map(0x133b, 0x133b).rw(FUNC(specnext_state::uart_reg_r<3>), FUNC(specnext_state::uart_reg_w<3>)); + map(0x143b, 0x143b).rw(FUNC(specnext_state::uart_reg_r<0>), FUNC(specnext_state::uart_reg_w<0>)); + map(0x153b, 0x153b).w(FUNC(specnext_state::uart_reg_w<1>)); + map(0x163b, 0x163b).w(FUNC(specnext_state::uart_reg_w<2>)); map(0x243b, 0x243b).lrw8(NAME([this]() { return m_nr_register; }) , NAME([this](u8 data) { m_nr_register = data; })); map(0x253b, 0x253b).lrw8(NAME([this]() { return m_next_regs.read_byte(m_nr_register); }) @@ -3466,6 +3516,7 @@ void specnext_state::machine_start() save_item(NAME(m_port_bf3b_ulap_index)); save_item(NAME(m_port_ff3b_ulap_en)); save_item(NAME(m_ay_select)); + save_item(NAME(m_uart_select)); save_item(NAME(m_spi_clock_cycles)); save_item(NAME(m_spi_clock_state)); save_item(NAME(m_spi_mosi_dat)); @@ -3862,6 +3913,7 @@ void specnext_state::machine_reset() mmu_x2_w(6, 0x00); m_ay_select = 0; + m_uart_select = 0; m_video_output_hdmi = -1; } @@ -3904,6 +3956,17 @@ void specnext_state::video_start() }); } +static DEVICE_INPUT_DEFAULTS_START(rs232_baud) + DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_115200 ) + DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_115200 ) +DEVICE_INPUT_DEFAULTS_END + +static void rs232_devices(device_slot_interface &device) +{ + device.option_add("null_modem", NULL_MODEM); + device.option_add("pty", PSEUDO_TERMINAL); +} + void specnext_state::tbblue(machine_config &config) { spectrum_128(config); @@ -3946,6 +4009,36 @@ void specnext_state::tbblue(machine_config &config) I2C_DS1307(config, m_i2c); m_i2c->sda_callback().set([this](int state) { m_i2c_sda_data = state & 1; }); + SPECNEXT_IM2(config, m_im2_uart0_rx); + m_im2_uart0_rx->irq_callback().set(FUNC(specnext_state::irq_w)); + + SPECNEXT_IM2(config, m_im2_uart0_tx); + m_im2_uart0_tx->irq_callback().set(FUNC(specnext_state::irq_w)); + + SPECNEXT_UART(config, m_uart[0], 28_MHz_XTAL); + m_uart[0]->out_txd_callback().set("rs232_esp", FUNC(rs232_port_device::write_txd)); + m_uart[0]->out_rx_full_near_callback().set(m_im2_uart0_rx, FUNC(specnext_im2_device::irq_w)); + m_uart[0]->out_tx_empty_callback().set(m_im2_uart0_tx, FUNC(specnext_im2_device::irq_w)); + rs232_port_device &rs232_esp(RS232_PORT(config, "rs232_esp", rs232_devices, nullptr)); + rs232_esp.rxd_handler().set(m_uart[0], FUNC(specnext_uart_device::rx_w)); + rs232_esp.set_option_device_input_defaults("null_modem", DEVICE_INPUT_DEFAULTS_NAME(rs232_baud)); + rs232_esp.set_option_device_input_defaults("pty", DEVICE_INPUT_DEFAULTS_NAME(rs232_baud)); + + SPECNEXT_IM2(config, m_im2_uart1_rx); + m_im2_uart1_rx->irq_callback().set(FUNC(specnext_state::irq_w)); + + SPECNEXT_IM2(config, m_im2_uart1_tx); + m_im2_uart1_tx->irq_callback().set(FUNC(specnext_state::irq_w)); + + SPECNEXT_UART(config, m_uart[1], 28_MHz_XTAL); + m_uart[1]->out_txd_callback().set("rs232_rpi", FUNC(rs232_port_device::write_txd)); + m_uart[1]->out_rx_full_near_callback().set(m_im2_uart1_rx, FUNC(specnext_im2_device::irq_w)); + m_uart[1]->out_tx_empty_callback().set(m_im2_uart1_tx, FUNC(specnext_im2_device::irq_w)); + rs232_port_device &rs232_rpi(RS232_PORT(config, "rs232_rpi", rs232_devices, nullptr)); + rs232_rpi.rxd_handler().set(m_uart[1], FUNC(specnext_uart_device::rx_w)); + rs232_rpi.set_option_device_input_defaults("null_modem", DEVICE_INPUT_DEFAULTS_NAME(rs232_baud)); + rs232_rpi.set_option_device_input_defaults("pty", DEVICE_INPUT_DEFAULTS_NAME(rs232_baud)); + SPI_SDCARD(config, m_sdcards[0], 0); m_sdcards[0]->set_prefer_sdhc(); m_sdcards[0]->spi_miso_callback().set(FUNC(specnext_state::spi_miso_w)); diff --git a/src/mame/sinclair/specnext_uart.cpp b/src/mame/sinclair/specnext_uart.cpp new file mode 100644 index 00000000000..29213b58b0d --- /dev/null +++ b/src/mame/sinclair/specnext_uart.cpp @@ -0,0 +1,179 @@ +// license:BSD-3-Clause +// copyright-holders:Andrei I. Holub +/********************************************************************** + Spectrum Next UART +**********************************************************************/ + +#include "emu.h" +#include "specnext_uart.h" + + +#define LOG_DAT_OUT (1U << 1) +#define LOG_DAT_IN (1U << 2) + +//#define VERBOSE ( LOG_DAT_OUT | LOG_DAT_IN | LOG_GENERAL ) +#include "logmacro.h" + +#define LOGDOUT(...) LOGMASKED(LOG_DAT_OUT, __VA_ARGS__) +#define LOGDIN(...) LOGMASKED(LOG_DAT_IN, __VA_ARGS__) + + +DEFINE_DEVICE_TYPE(SPECNEXT_UART, specnext_uart_device, "specnext_uart", "Spectrum Next UART") + +specnext_uart_device::specnext_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, SPECNEXT_UART, tag, owner, clock) + , device_buffered_serial_interface(mconfig, *this) + , m_out_txd_cb(*this) + , m_out_rx_full_near_cb(*this) + , m_out_tx_empty_cb(*this) +{ +} + + +void specnext_uart_device::tra_callback() +{ + const int txd = transmit_register_get_data_bit(); + m_out_txd_cb(txd); +} + +void specnext_uart_device::received_byte(u8 byte) +{ + m_rx_fifo[m_rx_tail] = byte; + m_rx_tail = (m_rx_tail + 1) % RX_FIFO_SIZE; + m_rx_empty = false; + + if (!m_rx_full_near) + { + m_rx_full_near = ((m_rx_tail + RX_FIFO_SIZE - m_rx_head) % RX_FIFO_SIZE) >= (RX_FIFO_SIZE * 3 / 4); + if (m_rx_full_near) + m_out_rx_full_near_cb(1); + } +} + +u8 specnext_uart_device::dat_r() +{ + u8 data = 0x00; + + if (!m_rx_empty) + { + data = m_rx_fifo[m_rx_head]; + if (!machine().side_effects_disabled()) + { + m_rx_head = (m_rx_head + 1) % RX_FIFO_SIZE; + m_rx_empty = (m_rx_head == m_rx_tail) ? true : false; + m_rx_full_near = ((m_rx_tail + RX_FIFO_SIZE - m_rx_head) % RX_FIFO_SIZE) >= (RX_FIFO_SIZE * 3 / 4); + } + LOGDIN("DR = %02x(%c)\n", data, data >= 0x20 ? data : '?'); + } + + return data; +} + +u8 specnext_uart_device::status_reg_r() +{ + // TODO: + //o_cpu_d <= uart0_status_rx_err_break & uart0_status_rx_err_framing & (uart0_rx_o(8) and uart0_status_rx_avail) & uart0_status_tx_empty & + // uart0_status_rx_near_full & uart0_status_rx_err_overflow & uart0_status_tx_full & uart0_status_rx_avail; + + const bool rx_overflow = !m_rx_empty && (m_rx_head == m_rx_tail); + const u8 status = (fifo_empty() << 4) + | (m_rx_full_near << 3) + | (rx_overflow << 2) + | (fifo_full() << 1) + | (!m_rx_empty << 0); + + return status; +} + +u8 specnext_uart_device::reg_r(offs_t reg) +{ + switch (reg) + { + case 0b00: return dat_r(); + case 0b01: return m_prescalar_msb; + case 0b10: return m_framing; + case 0b11: default: + return status_reg_r(); + } +} + +void specnext_uart_device::reg_w(offs_t reg, u8 data) +{ + switch (reg) + { + case 0b00: + m_prescalar_lsb = BIT(data, 7) + ? ((m_prescalar_lsb & 0x007f) | ((data & 0x7f) << 7)) + : ((m_prescalar_lsb & 0x3f80) | (data & 0x7f)); + update_serial(); + break; + + case 0b01: + if (BIT(data, 4)) + { + m_prescalar_msb = data & 0x07; + update_serial(); + } + break; + + case 0b10: + if (BIT(data, 7)) + { + clear_fifo(); + clear_rx_fifo(); + } + m_framing = data; + update_serial(); + break; + + case 0b11: + default: + transmit_byte(data); + LOGDOUT("DW: %02x(%c)\n", data, data >= 0x20 ? data : '?'); + break; + } + +} + +void specnext_uart_device::clear_rx_fifo() +{ + m_rx_head = m_rx_tail = 0; + m_rx_empty = true; + m_rx_full_near = false; +} + +void specnext_uart_device::update_serial() +{ + const u8 bits = 0b100 | BIT(m_framing, 3, 2); + const parity_t parity = BIT(m_framing, 2) ? (BIT(m_framing, 1) ? PARITY_ODD : PARITY_EVEN) : PARITY_NONE; + set_data_frame(1, bits + 1, parity, STOP_BITS_1); + + const int rate = clock() / ((m_prescalar_msb << 14) | m_prescalar_lsb); + set_tra_rate(rate); + set_rcv_rate(rate); +} + + +void specnext_uart_device::device_start() +{ + receive_register_reset(); + transmit_register_reset(); + + m_prescalar_msb = 0b000; + m_prescalar_lsb = 0b00000011110011; + m_framing = 0x18; + clear_fifo(); + clear_rx_fifo(); + + update_serial(); + m_out_txd_cb(1); + + save_item(NAME(m_prescalar_msb)); + save_item(NAME(m_prescalar_lsb)); + save_item(NAME(m_framing)); + save_item(NAME(m_rx_fifo)); + save_item(NAME(m_rx_head)); + save_item(NAME(m_rx_tail)); + save_item(NAME(m_rx_empty)); + save_item(NAME(m_rx_full_near)); +} diff --git a/src/mame/sinclair/specnext_uart.h b/src/mame/sinclair/specnext_uart.h new file mode 100644 index 00000000000..a8206eab9b5 --- /dev/null +++ b/src/mame/sinclair/specnext_uart.h @@ -0,0 +1,55 @@ +// license:BSD-3-Clause +// copyright-holders:Andrei I. Holub +#ifndef MAME_SINCLAIR_SPECNEXT_UART_H +#define MAME_SINCLAIR_SPECNEXT_UART_H + +#pragma once + +#include "diserial.h" + + +static constexpr unsigned TX_FIFO_SIZE = 64; +static constexpr unsigned RX_FIFO_SIZE = 512; + + +class specnext_uart_device : public device_t, public device_buffered_serial_interface +{ +public: + specnext_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + auto out_txd_callback() { return m_out_txd_cb.bind(); } + auto out_rx_full_near_callback() { return m_out_rx_full_near_cb.bind(); } + auto out_tx_empty_callback() { return m_out_tx_empty_cb.bind(); } + + u8 reg_r(offs_t reg); + void reg_w(offs_t reg, u8 data); + +protected: + virtual void device_start() override ATTR_COLD; + + virtual void tra_callback() override; + virtual void received_byte(u8 byte) override; + +private: + devcb_write_line m_out_txd_cb; + devcb_write_line m_out_rx_full_near_cb; + devcb_write_line m_out_tx_empty_cb; + + u8 m_framing; + u8 m_prescalar_msb; // u3 + u16 m_prescalar_lsb; // u14 + u8 m_rx_fifo[RX_FIFO_SIZE]; + u16 m_rx_head = 0, m_rx_tail = 0; + bool m_rx_empty = true; + bool m_rx_full_near = false; // 3/4+ + + u8 dat_r(); + u8 status_reg_r(); + void clear_rx_fifo(); + void update_serial(); +}; + + +DECLARE_DEVICE_TYPE(SPECNEXT_UART, specnext_uart_device) + +#endif // MAME_SINCLAIR_SPECNEXT_UART_H From f14aebeec48a82c5eb4190a32be93b5d1bb4501d Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 14 Mar 2026 16:58:32 +0100 Subject: [PATCH 272/351] z80,6502,i86: don't accept nmi at reset time --- src/devices/cpu/i86/i86.cpp | 11 +++----- src/devices/cpu/i86/i86.h | 1 + src/devices/cpu/m6502/m6502.cpp | 8 ++++-- src/devices/cpu/m6502/m6502.h | 43 ++++++++++++++++---------------- src/devices/cpu/z80/z80.cpp | 7 ++++-- src/devices/cpu/z80/z80.h | 1 + src/mame/gottlieb/gottlieb.cpp | 8 ------ src/mame/konami/asterix.cpp | 1 - src/mame/konami/parodius.cpp | 1 - src/mame/konami/rollerg.cpp | 1 - src/mame/konami/simpsons.cpp | 1 - src/mame/konami/tmnt2.cpp | 5 +--- src/mame/konami/vendetta.cpp | 1 - src/mame/nichibutsu/cclimber.cpp | 1 - 14 files changed, 40 insertions(+), 50 deletions(-) diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index 7f08e08dbbd..fce7e7bd6cf 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -515,6 +515,7 @@ void i8086_common_cpu_device::device_start() save_item(NAME(m_seg_prefix)); save_item(NAME(m_seg_prefix_next)); save_item(NAME(m_prefix_seg)); + save_item(NAME(m_reset_time)); save_item(NAME(m_halt)); // Register state for debugger @@ -575,6 +576,7 @@ void i8086_common_cpu_device::device_reset() m_modrm = 0; m_dst = 0; m_src = 0; + m_reset_time = machine().time(); m_halt = false; m_lock = false; m_easeg = DS; @@ -606,10 +608,9 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state ) { if (inptnum == INPUT_LINE_NMI) { - if (!m_nmi_state && state) - { + // don't accept NMI edge at exactly the same time RESET is cleared + if (!m_nmi_state && state && machine().time() > m_reset_time) m_pending_irq |= NMI_IRQ; - } m_nmi_state = state; } else if (inptnum == INPUT_LINE_TEST) @@ -619,13 +620,9 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state ) else { if (state == CLEAR_LINE) - { m_pending_irq &= ~INT_IRQ; - } else - { m_pending_irq |= INT_IRQ; - } } } diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h index ab2129ccdf7..87ef65daffe 100644 --- a/src/devices/cpu/i86/i86.h +++ b/src/devices/cpu/i86/i86.h @@ -329,6 +329,7 @@ protected: } RM; } m_Mod_RM; + attotime m_reset_time; uint8_t m_timing[200]; uint8_t m_ea_timing[200]; bool m_halt; diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index 1fce493dc43..0a379087925 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -88,6 +88,7 @@ void m6502_device::init() save_item(NAME(m_inst_substate)); save_item(NAME(m_inst_state_base)); save_item(NAME(m_inhibit_interrupts)); + save_item(NAME(m_reset_time)); set_icountptr(m_icount); @@ -127,6 +128,7 @@ void m6502_device::device_reset() m_sync = false; m_sync_w(CLEAR_LINE); m_inhibit_interrupts = false; + m_reset_time = machine().time(); } @@ -407,12 +409,14 @@ void m6502_device::execute_set_input(int inputnum, int state) case IRQ_LINE: m_irq_state = state == ASSERT_LINE; break; case APU_IRQ_LINE: m_apu_irq_state = state == ASSERT_LINE; break; case NMI_LINE: - if(machine().time() > attotime::zero && !m_nmi_state && state == ASSERT_LINE) + // don't accept NMI edge at exactly the same time RESET is cleared + if(!m_nmi_state && state == ASSERT_LINE && machine().time() > m_reset_time) m_nmi_pending = true; m_nmi_state = state == ASSERT_LINE; break; case V_LINE: - if(machine().time() > attotime::zero && !m_v_state && state == ASSERT_LINE) + // don't accept SO edge at exactly the same time RESET is cleared + if(!m_v_state && state == ASSERT_LINE && machine().time() > m_reset_time) m_P |= F_V; m_v_state = state == ASSERT_LINE; break; diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h index 5ac1d0dc47b..86f73c1d2f2 100644 --- a/src/devices/cpu/m6502/m6502.h +++ b/src/devices/cpu/m6502/m6502.h @@ -118,18 +118,18 @@ protected: address_space_config m_program_config, m_sprogram_config; - uint16_t m_PPC; /* previous program counter */ - uint16_t m_NPC; /* next start-of-instruction program counter */ - uint16_t m_PC; /* program counter */ - uint16_t m_SP; /* stack pointer (always 100 - 1FF) */ - uint16_t m_TMP; /* temporary internal values */ - uint8_t m_TMP2; /* another temporary internal value, 8 bits this time */ - uint8_t m_A; /* Accumulator */ - uint8_t m_X; /* X index register */ - uint8_t m_Y; /* Y index register */ - uint8_t m_P; /* Processor status */ - uint8_t m_IR; /* Prefetched instruction register */ - int m_inst_state_base; /* Current instruction bank */ + uint16_t m_PPC; // previous program counter + uint16_t m_NPC; // next start-of-instruction program counter + uint16_t m_PC; // program counter + uint16_t m_SP; // stack pointer (always 100 - 1FF) + uint16_t m_TMP; // temporary internal values + uint8_t m_TMP2; // another temporary internal value, 8 bits this time + uint8_t m_A; // Accumulator + uint8_t m_X; // X index register + uint8_t m_Y; // Y index register + uint8_t m_P; // Processor status + uint8_t m_IR; // Prefetched instruction register + int m_inst_state_base; // Current instruction bank std::unique_ptr m_mintf; int m_inst_state, m_inst_substate; @@ -137,6 +137,7 @@ protected: bool m_nmi_state, m_irq_state, m_apu_irq_state, m_v_state; bool m_nmi_pending, m_irq_taken, m_sync, m_inhibit_interrupts; bool m_uses_custom_memory_interface; + attotime m_reset_time; uint8_t read(uint16_t adr) { return m_mintf->read(adr); } uint8_t read_9(uint16_t adr) { return m_mintf->read_9(adr); } @@ -183,7 +184,7 @@ protected: #define O(o) void o ## _full(); void o ## _partial() // NMOS 6502 opcodes - // documented opcodes + // documented opcodes O(adc_aba); O(adc_abx); O(adc_aby); O(adc_idx); O(adc_idy); O(adc_imm); O(adc_zpg); O(adc_zpx); O(and_aba); O(and_abx); O(and_aby); O(and_imm); O(and_idx); O(and_idy); O(and_zpg); O(and_zpx); O(asl_aba); O(asl_abx); O(asl_acc); O(asl_zpg); O(asl_zpx); @@ -241,10 +242,10 @@ protected: O(txs_imp); O(tya_imp); - // exceptions + // exceptions O(reset); - // undocumented reliable instructions + // undocumented reliable instructions O(dcp_aba); O(dcp_abx); O(dcp_aby); O(dcp_idx); O(dcp_idy); O(dcp_zpg); O(dcp_zpx); O(isb_aba); O(isb_abx); O(isb_aby); O(isb_idx); O(isb_idy); O(isb_zpg); O(isb_zpx); O(lax_aba); O(lax_aby); O(lax_idx); O(lax_idy); O(lax_zpg); O(lax_zpy); @@ -259,10 +260,10 @@ protected: O(slo_aba); O(slo_abx); O(slo_aby); O(slo_idx); O(slo_idy); O(slo_zpg); O(slo_zpx); O(sre_aba); O(sre_abx); O(sre_aby); O(sre_idx); O(sre_idy); O(sre_zpg); O(sre_zpx); - // undocumented unreliable instructions - // behaviour differs between visual6502 and online docs, which - // is a clear sign reliability is not to be expected - // implemented version follows visual6502 + // undocumented unreliable instructions + // behaviour differs between visual6502 and online docs, which + // is a clear sign reliability is not to be expected + // implemented version follows visual6502 O(anc_imm); O(ane_imm); O(arr_imm); @@ -270,10 +271,10 @@ protected: O(las_aby); O(lxa_imm); - // nop variants + // nop variants O(nop_imm); O(nop_aba); O(nop_abx); O(nop_zpg); O(nop_zpx); - // system killers + // system killers O(kil_non); #undef O diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp index 6e5ad854fd1..a128ce4965a 100644 --- a/src/devices/cpu/z80/z80.cpp +++ b/src/devices/cpu/z80/z80.cpp @@ -676,6 +676,7 @@ void z80_device::device_start() save_item(NAME(m_shared_data.w)); save_item(NAME(m_shared_data2.w)); save_item(NAME(m_rtemp)); + save_item(NAME(m_reset_time)); save_item(NAME(m_ref)); // Reset registers to their initial values @@ -771,6 +772,8 @@ void z80_device::device_reset() m_iff1 = 0; m_iff2 = 0; + m_reset_time = machine().time(); + set_service_attention(); set_service_attention(); set_service_attention(); @@ -795,8 +798,8 @@ void z80_device::execute_set_input(int inputnum, int state) break; case INPUT_LINE_NMI: - // mark an NMI pending on the rising edge - if (m_nmi_state == CLEAR_LINE && state != CLEAR_LINE) + // mark an NMI pending on the rising edge (not when it's at the same time RESET is cleared) + if (m_nmi_state == CLEAR_LINE && state != CLEAR_LINE && machine().time() > m_reset_time) set_service_attention(); m_nmi_state = state; break; diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h index 9d3dfd7977c..453c6f85ec7 100644 --- a/src/devices/cpu/z80/z80.h +++ b/src/devices/cpu/z80/z80.h @@ -209,6 +209,7 @@ protected: PAIR16 m_shared_data; PAIR16 m_shared_data2; u8 m_rtemp; + attotime m_reset_time; u32 m_ref; u8 m_m1_cycles; diff --git a/src/mame/gottlieb/gottlieb.cpp b/src/mame/gottlieb/gottlieb.cpp index 61f7167bed9..ebbca144da1 100644 --- a/src/mame/gottlieb/gottlieb.cpp +++ b/src/mame/gottlieb/gottlieb.cpp @@ -272,7 +272,6 @@ protected: static inline constexpr unsigned GOTTLIEB_VIDEO_VBLANK = 240; virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; virtual void video_start() override ATTR_COLD; void analog_reset_w(u8 data); @@ -448,13 +447,6 @@ void gottlieb_ld_state::machine_start() } -void gottlieb_state::machine_reset() -{ - // HACK: prevent NMI immediately after soft reset - m_maincpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); -} - - void gottlieb_ld_state::machine_reset() { // if we have a laserdisc, reset our Philips code callback for the next line 17 diff --git a/src/mame/konami/asterix.cpp b/src/mame/konami/asterix.cpp index 85b1422cc2b..88b27bac7ec 100644 --- a/src/mame/konami/asterix.cpp +++ b/src/mame/konami/asterix.cpp @@ -383,7 +383,6 @@ void asterix_state::machine_reset() // Z80 _NMI goes low at same time as reset m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); } void asterix_state::asterix(machine_config &config) diff --git a/src/mame/konami/parodius.cpp b/src/mame/konami/parodius.cpp index 1e080c5cd2b..3a0f62ebd4a 100644 --- a/src/mame/konami/parodius.cpp +++ b/src/mame/konami/parodius.cpp @@ -342,7 +342,6 @@ void parodius_state::machine_reset() // Z80 _NMI goes low at same time as reset m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); } void parodius_state::banking_callback(uint8_t data) diff --git a/src/mame/konami/rollerg.cpp b/src/mame/konami/rollerg.cpp index b24ba95dfa9..df869143c4e 100644 --- a/src/mame/konami/rollerg.cpp +++ b/src/mame/konami/rollerg.cpp @@ -334,7 +334,6 @@ void rollerg_state::machine_reset() { // Z80 _NMI goes low at same time as reset m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); } diff --git a/src/mame/konami/simpsons.cpp b/src/mame/konami/simpsons.cpp index 61fb866f948..f7ac2f2e03f 100644 --- a/src/mame/konami/simpsons.cpp +++ b/src/mame/konami/simpsons.cpp @@ -428,7 +428,6 @@ void simpsons_state::machine_reset() // Z80 _NMI goes low at same time as reset m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); } diff --git a/src/mame/konami/tmnt2.cpp b/src/mame/konami/tmnt2.cpp index cb074ceba53..0f69b5dde75 100644 --- a/src/mame/konami/tmnt2.cpp +++ b/src/mame/konami/tmnt2.cpp @@ -2398,12 +2398,9 @@ void tmnt2_base_state::machine_reset() { m_lastirq = 0; + // Z80 _NMI goes low at same time as reset if (m_audiocpu && m_k053260) - { - // Z80 _NMI goes low at same time as reset m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); - } } void punkshot_state::punkshot(machine_config &config) diff --git a/src/mame/konami/vendetta.cpp b/src/mame/konami/vendetta.cpp index 38ac69edfdf..5174cdb4fd7 100644 --- a/src/mame/konami/vendetta.cpp +++ b/src/mame/konami/vendetta.cpp @@ -607,7 +607,6 @@ void vendetta_state::machine_reset() // Z80 _NMI goes low at same time as reset m_audiocpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); - m_audiocpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); } void vendetta_state::banking_callback(uint8_t data) diff --git a/src/mame/nichibutsu/cclimber.cpp b/src/mame/nichibutsu/cclimber.cpp index f5a6ba056f7..086160baad0 100644 --- a/src/mame/nichibutsu/cclimber.cpp +++ b/src/mame/nichibutsu/cclimber.cpp @@ -419,7 +419,6 @@ public: protected: virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override { m_maincpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero); } virtual void video_start() override ATTR_COLD; required_device m_maincpu; From 0c6185951f9d548c70ece24661ed6a1be9c96319 Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Sat, 14 Mar 2026 18:15:56 +0100 Subject: [PATCH 273/351] fix register saving and restoring for i8087 (#15104) --- src/devices/machine/i8087.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/machine/i8087.cpp b/src/devices/machine/i8087.cpp index 17613b1edbe..9dd80ee6e3d 100644 --- a/src/devices/machine/i8087.cpp +++ b/src/devices/machine/i8087.cpp @@ -4208,7 +4208,7 @@ void i8087_device::fsave(u8 modrm) WRITE16(ea + 12, (m_ea & 0x0f0000) >> 4); for (int i = 0; i < 8; ++i) - WRITE80(ea + i*10, ST(i)); + WRITE80(ea + 14 + i*10, ST(i)); reset(); CYCLES(67); @@ -4229,7 +4229,7 @@ void i8087_device::frstor(u8 modrm) m_ea = READ16(ea + 10) | ((READ16(ea + 12) & 0xf000) << 4); for (int i = 0; i < 8; ++i) - write_stack(i, READ80(ea + i*10), false); + write_stack(i, READ80(ea + 14 + i*10), false); CYCLES(44); } From 5fa89c9f0c48fad11c07483488daf3c1ab802d04 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Sat, 14 Mar 2026 18:58:31 +0100 Subject: [PATCH 274/351] New systems marked not working ------------------------------ Wu Lu Fuxing [little0] --- src/mame/mame.lst | 1 + src/mame/skeleton/huangyeh_m68k.cpp | 24 ++++++++++++++++++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 0c7c6a38f5f..e71af8d7112 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -44097,6 +44097,7 @@ hprotr8a ht68k @source:skeleton/huangyeh_m68k.cpp +wlfx wlzb @source:skeleton/hudson_poems.cpp diff --git a/src/mame/skeleton/huangyeh_m68k.cpp b/src/mame/skeleton/huangyeh_m68k.cpp index 3e4cfd583a2..3e59b9e9d62 100644 --- a/src/mame/skeleton/huangyeh_m68k.cpp +++ b/src/mame/skeleton/huangyeh_m68k.cpp @@ -249,16 +249,36 @@ ROM_START( wlzb ) ROM_LOAD( "w7.u34", 0x0000, 0x8000, CRC(c00786b3) SHA1(a8b3ddf3dd1b702d8719eace1b65f42c727b9473) ) ROM_REGION16_BE( 0x200000, "tiles", 0 ) - ROM_LOAD16_BYTE( "w3.u41", 0x000001, 0x080000, CRC(58e57d87) SHA1(f870d0729528b2fda495da059f110e466ea58de5) ) ROM_LOAD16_BYTE( "w5.u42", 0x000000, 0x080000, CRC(e728751d) SHA1(00bc65793a65ede318e5412d06eb85259015a5c1) ) - ROM_LOAD16_BYTE( "w4.u45", 0x100001, 0x080000, CRC(5e993a35) SHA1(ed39dbc89cafebc8348f05a6327efa1ea26ff466) ) + ROM_LOAD16_BYTE( "w3.u41", 0x000001, 0x080000, CRC(58e57d87) SHA1(f870d0729528b2fda495da059f110e466ea58de5) ) ROM_LOAD16_BYTE( "w6.u46", 0x100000, 0x080000, CRC(a0ea7f31) SHA1(ef985de34485cb65ac59f7938583a0607213c81a) ) + ROM_LOAD16_BYTE( "w4.u45", 0x100001, 0x080000, CRC(5e993a35) SHA1(ed39dbc89cafebc8348f05a6327efa1ea26ff466) ) ROM_REGION( 0x80000, "oki", 0 ) ROM_LOAD( "w8.u28", 0x00000, 0x80000, CRC(aad9367b) SHA1(e0b20087a8eab9d16e5cb1ed6415ca5373a43da7) ) ROM_END +// 五路福星 (Wǔ Lù Fúxīng) +ROM_START( wlfx ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASE00 ) + ROM_LOAD16_BYTE( "51.u9", 0x00000, 0x20000, CRC(e73e63d5) SHA1(b6028d1c5fce074969973a70f9004c0c095fadd2) ) // 1xxxxxxxxxxxxxxxx = 0xFF + ROM_LOAD16_BYTE( "52.u8", 0x00001, 0x20000, CRC(09821949) SHA1(45dbe3bab15ca70f7fabd05929dd42700c92786d) ) // 1xxxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "57a.u34", 0x00000, 0x10000, CRC(42bf1638) SHA1(4d5466ea828021211df4dd72f11f4202e4360fe2) ) // 1xxxxxxxxxxxxxxx = 0xFF + + ROM_REGION16_BE( 0x200000, "tiles", 0 ) + ROM_LOAD16_BYTE( "55.u42", 0x000000, 0x080000, CRC(84026256) SHA1(51fd14f92cc27f2e6cae8123a2e3f861117c6b68) ) + ROM_LOAD16_BYTE( "53.u41", 0x000001, 0x080000, CRC(4e8646fa) SHA1(1615e1a4f4d2cc95e589d4bb1ec10f1194dc6f1b) ) + ROM_LOAD16_BYTE( "56.u46", 0x100000, 0x080000, CRC(79092880) SHA1(9642e5f803346d3187679a72d23fbee3d9b6e326) ) + ROM_LOAD16_BYTE( "54.u45", 0x100001, 0x080000, CRC(d1b8f7e9) SHA1(2473241c83f2e5875ae01ccf60140bb912e46c16) ) + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "58a.u28", 0x00000, 0x80000, CRC(7d3b6522) SHA1(737b4d4028b7eb1752c20269b6465c1493458e51) ) +ROM_END + } // anonymous namespace GAME( 1999, wlzb, 0, wlzb, wlzb, huangyeh_m68k_state, empty_init, ROT0, "Huang Yeh", "Wu Lin Zhengba", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 199?, wlfx, 0, wlzb, wlzb, huangyeh_m68k_state, empty_init, ROT0, "Huang Yeh", "Wu Lu Fuxing", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) From f808f9a7f8fa1d13ad9f7aa372d89d33bd57ff50 Mon Sep 17 00:00:00 2001 From: Jesus Ramos Date: Sat, 14 Mar 2026 13:59:00 -0700 Subject: [PATCH 275/351] sh/sh7709s.cpp: Fix LRU cache replacement updates (#15098) Only update LRU values greater than the current LRU value on cache hit --- src/devices/cpu/sh/sh7709s.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/cpu/sh/sh7709s.cpp b/src/devices/cpu/sh/sh7709s.cpp index 36ae47039c4..746b10c68e4 100644 --- a/src/devices/cpu/sh/sh7709s.cpp +++ b/src/devices/cpu/sh/sh7709s.cpp @@ -96,13 +96,13 @@ bool sh7709s_device::cache_access(uint32_t address, bool write) // If the entry is already the latest in the LRU no need to update anything else if (entry->lru != SH7709S_CACHE_ASSOCIATIVITY - 1) { - entry->lru = SH7709S_CACHE_ASSOCIATIVITY - 1; for (int j = 0; j < SH7709S_CACHE_ASSOCIATIVITY; j++) { struct sh7709s_cache_entry* update_entry = &m_cache[cache_block][j]; - if (i != j && update_entry->lru != 0) + if (update_entry->lru > entry->lru) update_entry->lru--; } + entry->lru = SH7709S_CACHE_ASSOCIATIVITY - 1; } return true; } From 44502a227292917da690af6fc9049c26cf920e17 Mon Sep 17 00:00:00 2001 From: JOTEGO Date: Sat, 14 Mar 2026 22:00:01 +0100 Subject: [PATCH 276/351] fix(sh7604): fix three register access bugs (#15101) - vcrd_w: read m_vcrd instead of m_vcrc for FOV interrupt vector - dmaor_w: use (old & data & 6) so AE/NMIF flags can actually be cleared - vcrb_r: mask reserved bits 15 and 7 with 0x7f7f, matching vcra/vcrc/vcrwdt Co-authored-by: Jose Tejada --- src/devices/cpu/sh/sh7604.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/devices/cpu/sh/sh7604.cpp b/src/devices/cpu/sh/sh7604.cpp index 7841c578c07..e3e17470ebf 100644 --- a/src/devices/cpu/sh/sh7604.cpp +++ b/src/devices/cpu/sh/sh7604.cpp @@ -1036,7 +1036,7 @@ void sh7604_device::vcra_w(offs_t offset, uint16_t data, uint16_t mem_mask) uint16_t sh7604_device::vcrb_r() { - return m_vcrb; + return m_vcrb & 0x7f7f; } void sh7604_device::vcrb_w(offs_t offset, uint16_t data, uint16_t mem_mask) @@ -1067,7 +1067,7 @@ uint16_t sh7604_device::vcrd_r() void sh7604_device::vcrd_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_vcrd); - m_irq_vector.fov = (m_vcrc >> 8) & 0x7f; + m_irq_vector.fov = (m_vcrd >> 8) & 0x7f; sh2_recalc_irq(); } @@ -1629,7 +1629,7 @@ void sh7604_device::dmaor_w(offs_t offset, uint32_t data, uint32_t mem_mask) if (ACCESSING_BITS_0_7) { uint8_t old = m_dmaor & 0xf; - m_dmaor = (data & ~6) | (old & m_dmaor & 6); // TODO: should this be old & data & 6? bug? + m_dmaor = (data & ~6) | (old & data & 6); sh2_dmac_check(0); sh2_dmac_check(1); } From d8a3f39c801be1375258456405fea0d74f2377e2 Mon Sep 17 00:00:00 2001 From: cam900 Date: Sun, 15 Mar 2026 07:32:14 +0900 Subject: [PATCH 277/351] namco/namcos2_sprite.cpp: Fix sprite masking (#15097) --- src/mame/namco/namcos2.cpp | 3 + src/mame/namco/namcos2_sprite.cpp | 122 ++++++++++++++++++++---------- src/mame/namco/namcos2_sprite.h | 27 +++++-- src/mame/namco/namcos2_v.cpp | 9 ++- 4 files changed, 113 insertions(+), 48 deletions(-) diff --git a/src/mame/namco/namcos2.cpp b/src/mame/namco/namcos2.cpp index d9aba9195c6..109bbcc0f5f 100644 --- a/src/mame/namco/namcos2.cpp +++ b/src/mame/namco/namcos2.cpp @@ -1788,6 +1788,7 @@ void namcos2_base_state::configure_c45road_standard(machine_config &config) void finallap_state::configure_namcos2_sprite_standard(machine_config &config) { NAMCOS2_SPRITE(config, m_ns2sprite, 0, m_c116, gfx_namcos2_spr); + m_ns2sprite->set_screen(m_screen); m_ns2sprite->set_spriteram_tag("spriteram"); m_ns2sprite->set_priority_callback(FUNC(finallap_state::sprite_pri_callback_ns2)); m_ns2sprite->set_mix_callback(FUNC(finallap_state::sprite_mix_callback_ns2)); @@ -1905,6 +1906,7 @@ void finallap_state::finallap(machine_config &config) base_fl(config); NAMCOS2_SPRITE_FINALLAP(config.replace(), m_ns2sprite, 0, m_c116, gfx_namcos2_spr); + m_ns2sprite->set_screen(m_screen); m_ns2sprite->set_spriteram_tag("spriteram"); m_ns2sprite->set_priority_callback(FUNC(finallap_state::sprite_pri_callback_ns2)); m_ns2sprite->set_mix_callback(FUNC(finallap_state::sprite_mix_callback_ns2)); @@ -2050,6 +2052,7 @@ void metlhawk_state::metlhawk(machine_config &config) m_screen->set_screen_update(FUNC(metlhawk_state::screen_update_metlhawk)); NAMCOS2_SPRITE_METALHAWK(config, m_ns2sprite, 0, m_c116, gfx_metlhawk_spr); + m_ns2sprite->set_screen(m_screen); m_ns2sprite->set_spriteram_tag("spriteram"); m_ns2sprite->set_priority_callback(FUNC(metlhawk_state::sprite_pri_callback_ns2)); m_ns2sprite->set_mix_callback(FUNC(metlhawk_state::sprite_mix_callback_ns2)); diff --git a/src/mame/namco/namcos2_sprite.cpp b/src/mame/namco/namcos2_sprite.cpp index c772dc4a685..a216c66d915 100644 --- a/src/mame/namco/namcos2_sprite.cpp +++ b/src/mame/namco/namcos2_sprite.cpp @@ -39,6 +39,7 @@ namcos2_sprite_device::namcos2_sprite_device(const machine_config &mconfig, cons namcos2_sprite_device::namcos2_sprite_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, type, tag, owner, clock), device_gfx_interface(mconfig, *this), + device_video_interface(mconfig, *this), m_spriteram(*this, finder_base::DUMMY_TAG), m_pri_cb(*this), m_mix_cb(*this) @@ -60,6 +61,9 @@ void namcos2_sprite_device::device_start() { m_pri_cb.resolve_safe(0); m_mix_cb.resolve_safe(false); + + screen().register_screen_bitmap(m_renderbitmap); + screen().register_screen_bitmap(m_screenbitmap); } /**************************************************************************************/ @@ -67,10 +71,9 @@ void namcos2_sprite_device::device_start() /**************************************************************************************/ void namcos2_sprite_device::zdrawgfxzoom( - screen_device &screen, bitmap_ind16 &dest_bmp,const rectangle &clip,gfx_element *gfx, u32 code,u32 color,bool flipx,bool flipy,int sx,int sy, - int scalex, int scaley, int primask) + int scalex, int scaley, u32 prival) { if (!scalex || !scaley) return; if (dest_bmp.bpp() == 16) @@ -144,27 +147,19 @@ void namcos2_sprite_device::zdrawgfxzoom( // skip if inner loop doesn't draw anything if (ex > sx) { - bitmap_ind8 &priority_bitmap = screen.priority(); - if (priority_bitmap.valid()) + for (int y = sy; y < ey; y++) { - for (int y = sy; y < ey; y++) + u8 const *const source = source_base + (y_index >> 16) * gfx->rowbytes(); + u16 *const dest = &dest_bmp.pix(y); + int x_index = x_index_base; + for (int x = sx; x < ex; x++) { - u8 const *const source = source_base + (y_index >> 16) * gfx->rowbytes(); - u16 *const dest = &dest_bmp.pix(y); - u8 *const pri = &priority_bitmap.pix(y); - int x_index = x_index_base; - for (int x = sx; x < ex; x++) - { - const u8 c = source[x_index >> 16]; - if (pri[x] != 0xff) - { - if (m_mix_cb(dest[x], pri[x], gfx->colorbase(), c + pal, primask)) - pri[x] = 0xff; - } - x_index += dx; - } - y_index += dy; + const u8 c = source[x_index >> 16]; + if (c != 0xff) + dest[x] = ((prival & 0xf) << 12) | ((pal + c) & 0xfff); + x_index += dx; } + y_index += dy; } } } @@ -172,13 +167,48 @@ void namcos2_sprite_device::zdrawgfxzoom( } } /* zdrawgfxzoom */ -void namcos2_sprite_device::zdrawgfxzoom( - screen_device &screen, - bitmap_rgb32 &dest_bmp,const rectangle &clip,gfx_element *gfx, - u32 code,u32 color,bool flipx,bool flipy,int sx,int sy, - int scalex, int scaley, int primask) +void namcos2_sprite_device::copybitmap(screen_device &screen, bitmap_ind16 &dest_bmp, const rectangle &clip) { - /* nop */ + for (int y = clip.min_y; y <= clip.max_y; y++) + { + u16 *const src = &m_renderbitmap.pix(y); + u16 *const dest = &dest_bmp.pix(y); + u8 *const destpri = &screen.priority().pix(y); + for (int x = clip.min_x; x <= clip.max_x; x++) + { + if (src[x] != 0xffff) + { + const u8 srcpri = (src[x] >> 12) & 0xf; + const u16 c = src[x] & 0xfff; + m_mix_cb(dest[x], destpri[x], gfx(0)->colorbase(), c, srcpri); + } + } + } +} + +void namcos2_sprite_device::copybitmap(screen_device &screen, bitmap_rgb32 &dest_bmp, const rectangle &clip) +{ + device_palette_interface &palette = gfx(0)->palette(); + const pen_t *pal = palette.pens(); + for (int y = clip.min_y; y <= clip.max_y; y++) + { + u16 *const src = &m_renderbitmap.pix(y); + u16 *const srcrender = &m_screenbitmap.pix(y); + u32 *const dest = &dest_bmp.pix(y); + u8 *const destpri = &screen.priority().pix(y); + for (int x = clip.min_x; x <= clip.max_x; x++) + { + if (src[x] != 0xffff) + { + const u8 srcpri = (src[x] >> 12) & 0xf; + const u16 c = src[x] & 0xfff; + if (m_mix_cb(srcrender[x], destpri[x], gfx(0)->colorbase(), c, srcpri)) + dest[x] = pal[srcrender[x]]; + } + else if (srcrender[x] != 0xffff) + dest[x] = pal[gfx(0)->colorbase() + srcrender[x]]; + } + } } void namcos2_sprite_device::get_tilenum_and_size(const u16 word0, const u16 word1, u32 &sprn, bool &is_32) @@ -197,12 +227,30 @@ void namcos2_sprite_finallap_device::get_tilenum_and_size(const u16 word0, const is_32 = BIT(word1, 13); } -void namcos2_sprite_device::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int control) +template +void namcos2_sprite_device::draw_common(screen_device &screen, BitmapClass &bitmap, const rectangle &cliprect, int control) +{ + m_renderbitmap.fill(0xffff, cliprect); + draw_sprites(cliprect, control); + copybitmap(screen, bitmap, cliprect); +} + +void namcos2_sprite_device::draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int control) +{ + draw_common(screen, bitmap, cliprect, control); +} + +void namcos2_sprite_device::draw(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int control) +{ + draw_common(screen, bitmap, cliprect, control); +} + +void namcos2_sprite_device::draw_sprites(const rectangle &cliprect, int control) { gfx_element *const sgfx = gfx(0); const int offset = (control & 0x000f) * (128 * 4); - for (int loop = 127; loop >= 0; loop--) + for (int loop = 0; loop < 128; loop++) { /**************************************** * word#0 @@ -243,7 +291,7 @@ void namcos2_sprite_device::draw_sprites(screen_device &screen, bitmap_ind16 &bi const int scaley = (sizey << 16) / (is_32 ? 0x20 : 0x10); if (scalex && scaley) { - const u32 primask = m_pri_cb(word3 & 0xf); + const u32 prival = m_pri_cb(word3 & 0xf); const u16 offset4 = m_spriteram[offset + (loop * 4) + 2]; const u32 color = (word3 >> 4) & 0x000f; const int ypos = (0x1ff - (word0 & 0x01ff)) - 0x50 + 0x02; @@ -257,21 +305,20 @@ void namcos2_sprite_device::draw_sprites(screen_device &screen, bitmap_ind16 &bi sgfx->set_source_clip(0, 32, 0, 32); zdrawgfxzoom( - screen, - bitmap, + m_renderbitmap, cliprect, sgfx, sprn, color, flipx, flipy, xpos, ypos, scalex, scaley, - primask); + prival); } } } } /* draw_sprites */ -void namcos2_sprite_metalhawk_device::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int control) +void namcos2_sprite_metalhawk_device::draw_sprites(const rectangle &cliprect, int control) { /** * word#0 @@ -302,7 +349,7 @@ void namcos2_sprite_metalhawk_device::draw_sprites(screen_device &screen, bitmap * --------xxxx---- color * x--------------- unknown */ - for (int loop = 127; loop >= 0; loop--) + for (int loop = 0; loop < 128; loop++) { const u16 ypos = m_spriteram[(loop * 8) + 0]; const u16 xpos = m_spriteram[(loop * 8) + 3]; @@ -313,7 +360,7 @@ void namcos2_sprite_metalhawk_device::draw_sprites(screen_device &screen, bitmap { const u16 attrs = m_spriteram[(loop * 8) + 7]; - const u32 primask = m_pri_cb((attrs & 0xf)); + const u32 prival = m_pri_cb((attrs & 0xf)); const u16 tile = m_spriteram[(loop * 8) + 1]; const u16 flags = m_spriteram[(loop * 8) + 6]; const u32 sprn = (tile >> 2) & 0x0fff; @@ -348,15 +395,14 @@ void namcos2_sprite_metalhawk_device::draw_sprites(screen_device &screen, bitmap sgfx->set_source_clip(BIT(tile, 0) ? 16 : 0, 16, BIT(tile, 1) ? 16 : 0, 16); zdrawgfxzoom( - screen, - bitmap, + m_renderbitmap, cliprect, sgfx, sprn, color, flipx, flipy, sx, sy, scalex, scaley, - primask); + prival); } } } /* draw_sprites_metalhawk */ diff --git a/src/mame/namco/namcos2_sprite.h b/src/mame/namco/namcos2_sprite.h index da0bc31e460..bf61c67545d 100644 --- a/src/mame/namco/namcos2_sprite.h +++ b/src/mame/namco/namcos2_sprite.h @@ -9,11 +9,11 @@ #include "screen.h" #include "emupal.h" -class namcos2_sprite_device : public device_t, public device_gfx_interface +class namcos2_sprite_device : public device_t, public device_gfx_interface, public device_video_interface { public: using ns2_priority_delegate = device_delegate; - using ns2_mix_delegate = device_delegate; + using ns2_mix_delegate = device_delegate; // construction/destruction namcos2_sprite_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); @@ -29,7 +29,12 @@ public: template void set_priority_callback(T &&... args) { m_pri_cb.set(std::forward(args)...); } template void set_mix_callback(T &&... args) { m_mix_cb.set(std::forward(args)...); } - virtual void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int control); + void draw(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int control); + void draw(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, int control); + + void clear_screen_bitmap() { m_screenbitmap.fill(0xffff); } + void clear_screen_bitmap(const rectangle cliprect) { m_screenbitmap.fill(0xffff, cliprect); } + bitmap_ind16 &screen_bitmap() { return m_screenbitmap; } protected: namcos2_sprite_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); @@ -38,15 +43,24 @@ protected: virtual void device_start() override ATTR_COLD; // general - void zdrawgfxzoom(screen_device &screen, bitmap_ind16 &dest_bmp, const rectangle &clip, gfx_element *gfx, u32 code, u32 color, bool flipx, bool flipy, int sx, int sy, int scalex, int scaley, int primask); - void zdrawgfxzoom(screen_device &screen, bitmap_rgb32 &dest_bmp, const rectangle &clip, gfx_element *gfx, u32 code, u32 color, bool flipx, bool flipy, int sx, int sy, int scalex, int scaley, int primask); + virtual void draw_sprites(const rectangle &cliprect, int control); virtual void get_tilenum_and_size(const u16 word0, const u16 word1, u32 &sprn, bool &is_32); + void copybitmap(screen_device &screen, bitmap_ind16 &dest_bmp, const rectangle &clip); + void copybitmap(screen_device &screen, bitmap_rgb32 &dest_bmp, const rectangle &clip); + + template void draw_common(screen_device &screen, BitmapClass &bitmap, const rectangle &cliprect, int control); + + void zdrawgfxzoom(bitmap_ind16 &dest_bmp, const rectangle &clip, gfx_element *gfx, u32 code, u32 color, bool flipx, bool flipy, int sx, int sy, int scalex, int scaley, u32 prival); + required_shared_ptr m_spriteram; ns2_priority_delegate m_pri_cb; ns2_mix_delegate m_mix_cb; + + bitmap_ind16 m_renderbitmap; + bitmap_ind16 m_screenbitmap; }; class namcos2_sprite_finallap_device : public namcos2_sprite_device @@ -78,7 +92,8 @@ public: set_palette(std::forward(palette_tag)); } - virtual void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int control) override; +protected: + virtual void draw_sprites(const rectangle &cliprect, int control) override; }; diff --git a/src/mame/namco/namcos2_v.cpp b/src/mame/namco/namcos2_v.cpp index 3688a8e6f14..546b965cc2f 100644 --- a/src/mame/namco/namcos2_v.cpp +++ b/src/mame/namco/namcos2_v.cpp @@ -93,6 +93,7 @@ bool metlhawk_state::sprite_mix_callback_ns2(u16 &dest, u8 &destpri, u16 colbase { dest = colbase + src; } + destpri = primask; return true; } } @@ -101,7 +102,7 @@ bool metlhawk_state::sprite_mix_callback_ns2(u16 &dest, u8 &destpri, u16 colbase bool sgunner_state::sprite_mix_callback_c355(u16 &dest, u8 &destpri, u16 colbase, u16 src, int srcpri, int pri) { - if (srcpri >= destpri) + if (destpri <= srcpri) { if ((src & 0xff) != 0xff) { @@ -166,7 +167,7 @@ u32 namcos2_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, co } } } - m_ns2sprite->draw_sprites(screen, bitmap, clip, m_gfx_ctrl); + m_ns2sprite->draw(screen, bitmap, clip, m_gfx_ctrl); return 0; } @@ -188,7 +189,7 @@ u32 finallap_state::screen_update_finallap(screen_device &screen, bitmap_ind16 & } m_c45_road->draw(screen, bitmap, clip, pri, pri, 0); } - m_ns2sprite->draw_sprites(screen, bitmap, clip, m_gfx_ctrl); + m_ns2sprite->draw(screen, bitmap, clip, m_gfx_ctrl); return 0; } @@ -275,6 +276,6 @@ u32 metlhawk_state::screen_update_metlhawk(screen_device &screen, bitmap_ind16 & } m_c169roz->draw(screen, bitmap, clip, pri, pri, 0); } - m_ns2sprite->draw_sprites(screen, bitmap, clip, 0); + m_ns2sprite->draw(screen, bitmap, clip, 0); return 0; } From d176f592e1dc9db5ed038e1decaa05c29bc4672b Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 14 Mar 2026 23:33:13 +0100 Subject: [PATCH 278/351] xmen: small update after prev commit --- src/mame/konami/xmen.cpp | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/src/mame/konami/xmen.cpp b/src/mame/konami/xmen.cpp index 1082be44f39..f82207fd92d 100644 --- a/src/mame/konami/xmen.cpp +++ b/src/mame/konami/xmen.cpp @@ -3,8 +3,7 @@ /*************************************************************************** -X-Men - +Konami X-Men driver by Nicola Salmoria notes: @@ -142,7 +141,7 @@ public: void xmen6p(machine_config &config); - int frame_r(); + int field_r() { return (m_screen->frame_number() & 1) ^ m_screen->vblank(); } protected: virtual void video_start() override ATTR_COLD; @@ -273,19 +272,13 @@ uint32_t xmen6p_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap return 0; } -int xmen6p_state::frame_r() -{ - // toggles at scanline 0 - return (m_screen->frame_number() & 1) ^ (m_screen->vpos() < m_screen->visible_area().top()) ? 1 : 0; -} - // my lefts and rights are mixed up in several places.. void xmen6p_state::screen_vblank(int state) { // rising edge if (state) { - int index = frame_r(); + int index = field_r(); bitmap_ind16 &renderbitmap = m_screen_bitmap[index]; rectangle cliprect = m_screen->cliprect(); @@ -581,7 +574,7 @@ static INPUT_PORTS_START( xmen6p ) PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_START5 ) // not verified PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_START6 ) // not verified PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW ) - PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(xmen6p_state::frame_r)) // screen indicator? + PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(xmen6p_state::field_r)) // screen indicator? PORT_START( "EEPROMOUT" ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::di_write)) @@ -627,8 +620,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(xmen_state::scanline) { int const scanline = param; - if (scanline == 0 && m_irq5_enable && m_k053246->k053246_is_irq_enabled()) // sprite DMA end irq - m_maincpu->set_input_line(5, ASSERT_LINE); + if (scanline == 0) + { + // sprite DMA end irq + if (m_irq5_enable && m_k053246->k053246_is_irq_enabled()) + m_maincpu->set_input_line(5, ASSERT_LINE); + } } void xmen_state::sound_hardware(machine_config &config) @@ -722,11 +719,11 @@ void xmen6p_state::xmen6p(machine_config &config) m_screen->set_raw(24_MHz_XTAL / 4, 384, 0, 320-32, 264, 16, 240); m_screen->set_screen_update(FUNC(xmen6p_state::screen_update<0>)); + m_screen->screen_vblank().set(FUNC(xmen6p_state::screen_vblank)); screen_device &screen2(SCREEN(config, "screen2", SCREEN_TYPE_RASTER)); screen2.set_raw(24_MHz_XTAL / 4, 384, 0+32, 320, 264, 16, 240); screen2.set_screen_update(FUNC(xmen6p_state::screen_update<1>)); - screen2.screen_vblank().set(FUNC(xmen6p_state::screen_vblank)); screen2.set_palette("palette"); m_k053246->set_screen(m_screen); From eed78486114dffb90d3f3de10a422c7221aefe93 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 15 Mar 2026 01:40:31 +0100 Subject: [PATCH 279/351] z80,6502,i86: no need for that m_reset_time local variable --- src/devices/cpu/i86/i86.cpp | 4 +--- src/devices/cpu/i86/i86.h | 1 - src/devices/cpu/m6502/m6502.cpp | 6 ++---- src/devices/cpu/m6502/m6502.h | 1 - src/devices/cpu/z80/z80.cpp | 7 ++----- src/devices/cpu/z80/z80.h | 1 - src/emu/device.cpp | 6 +++--- 7 files changed, 8 insertions(+), 18 deletions(-) diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp index fce7e7bd6cf..c30eecd6199 100644 --- a/src/devices/cpu/i86/i86.cpp +++ b/src/devices/cpu/i86/i86.cpp @@ -515,7 +515,6 @@ void i8086_common_cpu_device::device_start() save_item(NAME(m_seg_prefix)); save_item(NAME(m_seg_prefix_next)); save_item(NAME(m_prefix_seg)); - save_item(NAME(m_reset_time)); save_item(NAME(m_halt)); // Register state for debugger @@ -576,7 +575,6 @@ void i8086_common_cpu_device::device_reset() m_modrm = 0; m_dst = 0; m_src = 0; - m_reset_time = machine().time(); m_halt = false; m_lock = false; m_easeg = DS; @@ -609,7 +607,7 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state ) if (inptnum == INPUT_LINE_NMI) { // don't accept NMI edge at exactly the same time RESET is cleared - if (!m_nmi_state && state && machine().time() > m_reset_time) + if (!m_nmi_state && state && total_cycles()) m_pending_irq |= NMI_IRQ; m_nmi_state = state; } diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h index 87ef65daffe..ab2129ccdf7 100644 --- a/src/devices/cpu/i86/i86.h +++ b/src/devices/cpu/i86/i86.h @@ -329,7 +329,6 @@ protected: } RM; } m_Mod_RM; - attotime m_reset_time; uint8_t m_timing[200]; uint8_t m_ea_timing[200]; bool m_halt; diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index 0a379087925..8e97fe008c3 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -88,7 +88,6 @@ void m6502_device::init() save_item(NAME(m_inst_substate)); save_item(NAME(m_inst_state_base)); save_item(NAME(m_inhibit_interrupts)); - save_item(NAME(m_reset_time)); set_icountptr(m_icount); @@ -128,7 +127,6 @@ void m6502_device::device_reset() m_sync = false; m_sync_w(CLEAR_LINE); m_inhibit_interrupts = false; - m_reset_time = machine().time(); } @@ -410,13 +408,13 @@ void m6502_device::execute_set_input(int inputnum, int state) case APU_IRQ_LINE: m_apu_irq_state = state == ASSERT_LINE; break; case NMI_LINE: // don't accept NMI edge at exactly the same time RESET is cleared - if(!m_nmi_state && state == ASSERT_LINE && machine().time() > m_reset_time) + if(!m_nmi_state && state == ASSERT_LINE && total_cycles()) m_nmi_pending = true; m_nmi_state = state == ASSERT_LINE; break; case V_LINE: // don't accept SO edge at exactly the same time RESET is cleared - if(!m_v_state && state == ASSERT_LINE && machine().time() > m_reset_time) + if(!m_v_state && state == ASSERT_LINE && total_cycles()) m_P |= F_V; m_v_state = state == ASSERT_LINE; break; diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h index 86f73c1d2f2..55b95f6ed08 100644 --- a/src/devices/cpu/m6502/m6502.h +++ b/src/devices/cpu/m6502/m6502.h @@ -137,7 +137,6 @@ protected: bool m_nmi_state, m_irq_state, m_apu_irq_state, m_v_state; bool m_nmi_pending, m_irq_taken, m_sync, m_inhibit_interrupts; bool m_uses_custom_memory_interface; - attotime m_reset_time; uint8_t read(uint16_t adr) { return m_mintf->read(adr); } uint8_t read_9(uint16_t adr) { return m_mintf->read_9(adr); } diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp index a128ce4965a..bb5e05c5d0b 100644 --- a/src/devices/cpu/z80/z80.cpp +++ b/src/devices/cpu/z80/z80.cpp @@ -676,7 +676,6 @@ void z80_device::device_start() save_item(NAME(m_shared_data.w)); save_item(NAME(m_shared_data2.w)); save_item(NAME(m_rtemp)); - save_item(NAME(m_reset_time)); save_item(NAME(m_ref)); // Reset registers to their initial values @@ -772,8 +771,6 @@ void z80_device::device_reset() m_iff1 = 0; m_iff2 = 0; - m_reset_time = machine().time(); - set_service_attention(); set_service_attention(); set_service_attention(); @@ -798,8 +795,8 @@ void z80_device::execute_set_input(int inputnum, int state) break; case INPUT_LINE_NMI: - // mark an NMI pending on the rising edge (not when it's at the same time RESET is cleared) - if (m_nmi_state == CLEAR_LINE && state != CLEAR_LINE && machine().time() > m_reset_time) + // mark an NMI pending on the rising edge (not at the same time RESET is cleared) + if (m_nmi_state == CLEAR_LINE && state != CLEAR_LINE && total_cycles()) set_service_attention(); m_nmi_state = state; break; diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h index 453c6f85ec7..9d3dfd7977c 100644 --- a/src/devices/cpu/z80/z80.h +++ b/src/devices/cpu/z80/z80.h @@ -209,7 +209,6 @@ protected: PAIR16 m_shared_data; PAIR16 m_shared_data2; u8 m_rtemp; - attotime m_reset_time; u32 m_ref; u8 m_m1_cycles; diff --git a/src/emu/device.cpp b/src/emu/device.cpp index 272df837cd4..4eaf9b2b0ee 100644 --- a/src/emu/device.cpp +++ b/src/emu/device.cpp @@ -1000,9 +1000,9 @@ device_resolver_base *device_t::register_auto_finder(device_resolver_base &autod //------------------------------------------------- device_interface::device_interface(device_t &device, const char *type) - : m_interface_next(nullptr), - m_device(device), - m_type(type) + : m_interface_next(nullptr) + , m_device(device) + , m_type(type) { device_interface **tailptr; for (tailptr = &device.interfaces().m_head; *tailptr != nullptr; tailptr = &(*tailptr)->m_interface_next) { } From d4638f3ee6d5423b5fc6a1bdef5b317132892c1c Mon Sep 17 00:00:00 2001 From: AJR Date: Sat, 14 Mar 2026 22:10:10 -0400 Subject: [PATCH 280/351] snk/snk6502.cpp: Fix screen raw parameters --- src/mame/snk/snk6502.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/snk/snk6502.cpp b/src/mame/snk/snk6502.cpp index d281dcccfd4..cf0669f7a61 100644 --- a/src/mame/snk/snk6502.cpp +++ b/src/mame/snk/snk6502.cpp @@ -812,7 +812,7 @@ void snk6502_state::sasuke(machine_config &config) // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(11.289_MHz_XTAL / 2, 360, 256, 0, 262, 0, 224); // from crtc + screen.set_raw(11.289_MHz_XTAL / 2, 360, 0, 256, 262, 0, 224); // from crtc screen.set_screen_update(FUNC(snk6502_state::screen_update)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_sasuke); @@ -856,7 +856,7 @@ void vanguard_state::vanguard(machine_config &config) // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(11.289_MHz_XTAL / 2, 360, 256, 0, 262, 0, 224); // from crtc + screen.set_raw(11.289_MHz_XTAL / 2, 360, 0, 256, 262, 0, 224); // from crtc screen.set_screen_update(FUNC(vanguard_state::screen_update)); GFXDECODE(config, m_gfxdecode, m_palette, gfx_vanguard); From 38f803dcc6eea27796838278697c0ee707c94a6d Mon Sep 17 00:00:00 2001 From: Valera Klachkov Date: Sun, 15 Mar 2026 03:16:55 +0100 Subject: [PATCH 281/351] gridcomp/gridkeyb.cpp: Handle Ctrl key the same way as in the Compass keyboard firmware (#15099) --- src/mame/gridcomp/gridkeyb.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/gridcomp/gridkeyb.cpp b/src/mame/gridcomp/gridkeyb.cpp index b668a50e8ca..b17879e74ff 100644 --- a/src/mame/gridcomp/gridkeyb.cpp +++ b/src/mame/gridcomp/gridkeyb.cpp @@ -267,8 +267,8 @@ bool grid_keyboard_device::translate(u8 code, u16 &translated) const if (result == 0xff) return false; - if (ctrl && result >= 0x20) - translated = result - 0x20; + if (ctrl) + translated = result & 0x9f; else translated = result; From 32dad4722ae9bf76d85e825aad0419ab10ee8ed5 Mon Sep 17 00:00:00 2001 From: ArcadeShadow Date: Sun, 15 Mar 2026 20:32:02 +0000 Subject: [PATCH 282/351] spectrum_cass.xml: Added 11 working items + 1 redumped (#15109) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit New working software list additions -------------------------------------------- Black Horse [Spectrum Computing] Diseñador de Juegos II (Investronica) [Spectrum Computing] Multi-Sports 2: Opera vs. Dinamic [Spectrum Computing] Nonocross (cracked) [Spectrum Computing] Oddi the Viking (alt) [Spectrum Computing] Rescate en el Golfo [Spectrum Computing] Sooty & Sweep 2 [Dean Hickingbottom, Andy Barker, Darren Melbourne, Steven Brown, Games That Weren't] The Pharaoh's Shadow [Spectrum Computing] The Shatered World (incomplete version) [Planeta Sinclair] Thomas the Tank Engine II: The Race [The Games That Weren't] Thomas the Tank Engine II: The Race (demo) [The Games That Weren't] Redumped set -------------------------------------------- Murder (1983, Rabbit Software) [Spectrum Computing] Merged sets -------------------------------------------- Rabbit in Wonderland (48K, English) + Rabbit in Wonderland (48K, Spanish) The Rocky Horror Show (Alternative, 48K) + The Rocky Horror Show (Alternative, 128K) * Cleanups and fixes: parent/clone relationships, descriptions, publishers, years and languages info. * Added "required_ram" property (replacing the usage property in several cases) --- hash/spectrum_cass.xml | 1544 ++++++++++++++++++++++------------------ 1 file changed, 870 insertions(+), 674 deletions(-) diff --git a/hash/spectrum_cass.xml b/hash/spectrum_cass.xml index 35d48164630..41c12b04ca1 100644 --- a/hash/spectrum_cass.xml +++ b/hash/spectrum_cass.xml @@ -248,7 +248,7 @@ license:CC0-1.0 Aerial 2021 Inufuto - + @@ -339,7 +339,7 @@ license:CC0-1.0 AntiAir 2024 Inufuto - + @@ -402,7 +402,7 @@ license:CC0-1.0 Ascend 2022 Inufuto - + @@ -415,7 +415,7 @@ license:CC0-1.0 1985 Astor Software - + @@ -428,7 +428,7 @@ license:CC0-1.0 1985 Astor Software - + @@ -441,7 +441,7 @@ license:CC0-1.0 1985 Astor Software - + @@ -454,7 +454,7 @@ license:CC0-1.0 1986 Astor Software - + @@ -1115,7 +1115,7 @@ license:CC0-1.0 Aliens 1986 Electric Dreams Software - + @@ -1127,7 +1127,7 @@ license:CC0-1.0 Aliens (Proein) 1986 Proein Soft Line - + @@ -1139,7 +1139,7 @@ license:CC0-1.0 Aliens (Ricochet) 1987 Ricochet - + @@ -1226,7 +1226,7 @@ license:CC0-1.0 - + @@ -1243,7 +1243,7 @@ license:CC0-1.0 - + @@ -1260,7 +1260,7 @@ license:CC0-1.0 - + @@ -1277,7 +1277,7 @@ license:CC0-1.0 - + @@ -1294,7 +1294,7 @@ license:CC0-1.0 - + @@ -1312,7 +1312,7 @@ license:CC0-1.0 - + @@ -1692,7 +1692,7 @@ license:CC0-1.0 Arkanoid (set 1) 1987 Imagine Software - + @@ -1704,7 +1704,7 @@ license:CC0-1.0 Arkanoid (set 2, Erbe) 1987 Erbe Software - + @@ -1716,7 +1716,7 @@ license:CC0-1.0 Arkanoid (set 3, Erbe) 1988 Erbe Software - + @@ -1728,7 +1728,7 @@ license:CC0-1.0 Arkanoid (set 4, The Hit Squad) 1990 The Hit Squad - + @@ -1740,7 +1740,7 @@ license:CC0-1.0 Arkanoid (set 5) 1987 Imagine Software - + @@ -1753,7 +1753,7 @@ license:CC0-1.0 1987 Luís Esteves / Paulo Sousa - + @@ -1767,7 +1767,7 @@ license:CC0-1.0 Luís Esteves / Paulo Sousa Run on TC 2048 or ZX Spectrum - + @@ -1930,7 +1930,7 @@ license:CC0-1.0 - + @@ -2410,7 +2410,7 @@ license:CC0-1.0 Battlot 2021 Inufuto - + @@ -2423,7 +2423,7 @@ license:CC0-1.0 1985 Astor Software - + @@ -2852,7 +2852,7 @@ no loading screen, no custom loader Box Reloaded 2010 Beyker Soft - + @@ -6974,7 +6974,7 @@ no loading screen, no custom loader - Chase HQ (set 1) + Chase H.Q. 1989 Ocean @@ -6990,7 +6990,7 @@ no loading screen, no custom loader - Chase HQ (set 2, Erbe - Serie 5 Estrellas) + Chase H.Q. (Erbe - Serie 5 Estrellas) 1989 Erbe Software @@ -7006,7 +7006,7 @@ no loading screen, no custom loader - Chase HQ (set 3, The Hit Squad) + Chase H.Q. (The Hit Squad) 1989 The Hit Squad @@ -7022,7 +7022,7 @@ no loading screen, no custom loader - Chase HQ (set 4, Portugal) + Chase H.Q. (Portugal) 1989 Ocean @@ -7038,7 +7038,7 @@ no loading screen, no custom loader - Chase HQ (set 5) + Chase H.Q. (alt) 1989 Ocean @@ -7090,7 +7090,7 @@ no loading screen, no custom loader Chaos 1985 Games Workshop - + @@ -7102,7 +7102,7 @@ no loading screen, no custom loader Chaos (Firebird) 1985 Firebird Software - + @@ -7114,7 +7114,7 @@ no loading screen, no custom loader Chaos (Aackosoft) 1985 Aackosoft - + @@ -8163,7 +8163,7 @@ no loading screen, no custom loader Andrei Titov (Dr. Titus) - + @@ -8177,7 +8177,7 @@ no loading screen, no custom loader Andrei Titov (Dr. Titus) - + @@ -8191,7 +8191,7 @@ no loading screen, no custom loader Andrei Titov (Dr. Titus) - + @@ -8205,7 +8205,7 @@ no loading screen, no custom loader Andrei Titov (Dr. Titus) - + @@ -8294,7 +8294,7 @@ no loading screen, no custom loader 2023 Andrei Titov (Dr. Titus) - + @@ -8307,7 +8307,7 @@ no loading screen, no custom loader 2023 Andrei Titov (Dr. Titus) - + @@ -8320,7 +8320,7 @@ no loading screen, no custom loader 2023 Andrei Titov (Dr. Titus) - + @@ -8333,7 +8333,7 @@ no loading screen, no custom loader 2023 Andrei Titov (Dr. Titus) - + @@ -8608,6 +8608,7 @@ no loading screen, no custom loader + @@ -15991,7 +15992,7 @@ Side B: Laser Shoot (original release) Jonah Barrington's Squash 1985 New Generation Software - + @@ -16304,7 +16305,7 @@ Side B: Laser Shoot (original release) 1983 Eyrolles - + @@ -17169,7 +17170,7 @@ Side B: Laser Shoot (original release) - + @@ -17184,7 +17185,7 @@ Side B: Laser Shoot (original release) - + @@ -17786,7 +17787,7 @@ Side B: Laser Shoot (original release) Lemmings 1991 Psygnosis - + @@ -17805,7 +17806,7 @@ Side B: Laser Shoot (original release) Lemmings (demo) 1991 Psygnosis - + @@ -17817,7 +17818,7 @@ Side B: Laser Shoot (original release) Lemmings 2 1995 Mecosoft - + @@ -17829,7 +17830,7 @@ Side B: Laser Shoot (original release) Lemmings 3 - Last Space Crusade 1996 Mecosoft - + @@ -18021,7 +18022,7 @@ Side B: Laser Shoot (original release) 2014 The Mojon Twins / eightbiter - + @@ -18049,7 +18050,7 @@ Side B: Laser Shoot (original release) 2014 The Mojon Twins / eightbiter - + @@ -19360,7 +19361,7 @@ Side B: Laser Shoot (original release) 2020 Bitmap Soft - + @@ -19373,7 +19374,7 @@ Side B: Laser Shoot (original release) 2020 Bitmap Soft - + @@ -20510,7 +20511,7 @@ Side B: Laser Shoot (original release) - The Never Ending Story (128k release) + The Never Ending Story (128K release) 1985 Ocean @@ -20521,7 +20522,7 @@ Side B: Laser Shoot (original release) - The Never Ending Story (48k release) + The Never Ending Story (48K release) 1985 Ocean @@ -20549,7 +20550,7 @@ Side B: Laser Shoot (original release) Nodes of Yesod (128K release) - 1985 + 1986 Odin Computer Graphics Ltd @@ -22022,7 +22023,7 @@ Side B: Laser Shoot (original release) Astor Software - + @@ -22725,7 +22726,7 @@ Side B: Laser Shoot (original release) - + Predator 2 (MCM) 1991 MCM Software @@ -24098,8 +24099,6 @@ Side B: Laser Shoot (original release) - - Rally Simulator 1989 @@ -24124,8 +24123,8 @@ Side B: Laser Shoot (original release) Rally Simulator (master tape) - 19?? - <unknown> + 1989 + Zeppelin Games @@ -24622,7 +24621,7 @@ Side B: Laser Shoot (original release) - Rescue On Fractalus (set 1) + Rescue On Fractalus 1986 Activision @@ -24633,7 +24632,7 @@ Side B: Laser Shoot (original release) - Rescue On Fractalus (set 2, Mastertronic) + Rescue On Fractalus (Mastertronic) 1986 Mastertronic @@ -24644,7 +24643,7 @@ Side B: Laser Shoot (original release) - Rescue On Fractalus (set 3) + Rescue On Fractalus (alt) 1986 Activision @@ -25094,6 +25093,7 @@ Side B: Laser Shoot (original release) Rescate Atlántida (set 1, IB-S-006) 1989 Dinamic Software + @@ -25110,6 +25110,7 @@ Side B: Laser Shoot (original release) Rescate Atlántida (set 2) 1989 Dinamic Software + @@ -25126,6 +25127,7 @@ Side B: Laser Shoot (original release) Rescate Atlántida (set 3) 1989 Dinamic Software + @@ -25141,7 +25143,8 @@ Side B: Laser Shoot (original release) Rescue From Atlantis 1989 - Dinamic Software / Summit Software + Summit Software + @@ -25254,7 +25257,7 @@ Side B: Laser Shoot (original release) - Raid Over Moscow (set 1) + Raid Over Moscow 1985 U.S. Gold @@ -25265,7 +25268,7 @@ Side B: Laser Shoot (original release) - Raid Over Moscow (set 2, Americana) + Raid Over Moscow (Americana) 1985 Americana Software @@ -25276,9 +25279,9 @@ Side B: Laser Shoot (original release) - Raid Over Moscow (set 3, alt) - 19?? - <unknown> + Raid Over Moscow (alt) + 1985 + U.S. Gold @@ -25287,9 +25290,9 @@ Side B: Laser Shoot (original release) - Raid Over Moscow (set 4, Dro Soft, alt) - 19?? - <unknown> + Raid Over Moscow (Dro Soft, alt) + 1988 + Dro Soft @@ -25298,9 +25301,9 @@ Side B: Laser Shoot (original release) - Raid Over Moscow (set 5, Americana, alt) - 19?? - <unknown> + Raid Over Moscow (Americana, alt) + 1985 + Americana Software @@ -25309,7 +25312,7 @@ Side B: Laser Shoot (original release) - Raid Over Moscow (set 6, Dro Soft) + Raid Over Moscow (Dro Soft) 1988 Dro Soft @@ -25655,28 +25658,22 @@ Side B: Laser Shoot (original release) - - Rabbit in Wonderland (48K, Spanish) - 2015 - Javier Fopiani - - - - - - - - - - Rabbit in Wonderland (48K, English) + + Rabbit in Wonderland (48K, English/Spanish) 2015 Javier Fopiani - + + + + + + + @@ -26216,7 +26213,7 @@ Side B: Laser Shoot (original release) Supertrux 1988 Elite Systems - + @@ -26236,7 +26233,7 @@ Side B: Laser Shoot (original release) Supertrux (Encore) 1990 Encore - + @@ -26255,7 +26252,7 @@ Side B: Laser Shoot (original release) Supertrux (Portugal) 19?? <unknown> - + @@ -26930,7 +26927,7 @@ Side B: Laser Shoot (original release) Sabre Wulf (version 2) 1984 Ultimate Play The Game - + @@ -26942,7 +26939,7 @@ Side B: Laser Shoot (original release) Sabre Wulf (version 1) 1984 Ultimate Play The Game - + @@ -26954,7 +26951,7 @@ Side B: Laser Shoot (original release) Sabre Wulf 1984 Ultimate Play The Game - + @@ -26966,7 +26963,7 @@ Side B: Laser Shoot (original release) Sabre Wulf (loading screen hack) 19?? hack - + @@ -26979,7 +26976,7 @@ Side B: Laser Shoot (original release) 1989 Iber Software - + @@ -27218,7 +27215,7 @@ Side B: Laser Shoot (original release) Super Sprint 1987 Electric Dreams Software - + @@ -27230,7 +27227,7 @@ Side B: Laser Shoot (original release) Super Sprint (Proein) 1987 Proein Soft Line - + @@ -27242,7 +27239,7 @@ Side B: Laser Shoot (original release) Super Sprint (The Hit Squad) 1990 The Hit Squad - + @@ -28030,7 +28027,7 @@ Side B: Laser Shoot (original release) Saboteur 1985 Durell Software - + @@ -28047,7 +28044,7 @@ Side B: Laser Shoot (original release) Saboteur (Erbe - Serie Leyenda) 1985 IBSA - + @@ -28064,7 +28061,7 @@ Side B: Laser Shoot (original release) Saboteur (Encore) 1985 Encore - + @@ -28076,7 +28073,7 @@ Side B: Laser Shoot (original release) Saboteur (Encore, alt) 1985 Encore - + @@ -28088,7 +28085,7 @@ Side B: Laser Shoot (original release) Saboteur (Erbe) 1985 Erbe Software - + @@ -28112,7 +28109,7 @@ Side B: Laser Shoot (original release) 1987 Durell Software - + @@ -28130,7 +28127,7 @@ Side B: Laser Shoot (original release) 1987 Erbe Software - + @@ -28143,7 +28140,7 @@ Side B: Laser Shoot (original release) 1987 Encore - + @@ -28156,7 +28153,7 @@ Side B: Laser Shoot (original release) 198? PIM Software - + @@ -28474,7 +28471,7 @@ Side B: Laser Shoot (original release) Super Soccer 1986 Imagine Software - + @@ -28486,7 +28483,7 @@ Side B: Laser Shoot (original release) Super Soccer (alt) 1986 Imagine Software - + @@ -28498,7 +28495,7 @@ Side B: Laser Shoot (original release) Super Soccer (Erbe) 1987 Erbe Software - + @@ -28510,7 +28507,7 @@ Side B: Laser Shoot (original release) Super Soccer (alt 2) 1986 Imagine Software - + @@ -28522,7 +28519,7 @@ Side B: Laser Shoot (original release) Super Soho 198? M.R. Charman - + @@ -29371,7 +29368,7 @@ Side B: Laser Shoot (original release) Svellas 2025 Inufuto - + @@ -30196,6 +30193,7 @@ Side B: Laser Shoot (original release) Trashman 1984 New Generation Software + @@ -30203,6 +30201,18 @@ Side B: Laser Shoot (original release) + + Basurero (Microbyte - Clasicos Spectrum) + 1987 + Microbyte + + + + + + + + Travel Through Time - Volume 1: Northern Lights 2021 @@ -30826,7 +30836,7 @@ Side B: Laser Shoot (original release) 2025 YRGB - + @@ -31833,7 +31843,7 @@ Side B: Laser Shoot (original release) 1991 Infogrames - + @@ -32397,7 +32407,7 @@ Side B: Laser Shoot (original release) Yokai Monk (v1.8) 2022 Poe Games - + @@ -32410,7 +32420,7 @@ Side B: Laser Shoot (original release) Yokai Monk (v1.7) 2022 Poe Games - + @@ -32615,7 +32625,7 @@ Side B: Laser Shoot (original release) Zorro 1986 U.S. Gold - + @@ -32627,7 +32637,7 @@ Side B: Laser Shoot (original release) Zorro (Americana) 1986 Americana Software - + @@ -32639,7 +32649,7 @@ Side B: Laser Shoot (original release) Zorro (Erbe) 1986 Erbe Software - + @@ -32651,7 +32661,7 @@ Side B: Laser Shoot (original release) Zorro (Erbe, medium case) 1986 Erbe Software - + @@ -32663,7 +32673,7 @@ Side B: Laser Shoot (original release) Zorro (alt) 1986 U.S. Gold - + @@ -32675,7 +32685,7 @@ Side B: Laser Shoot (original release) Zorro (loading screen hack) 2013 hack - + @@ -32938,7 +32948,7 @@ Tape 2 - Side A - Night Gunner (Digital Integration) Tape 2 - Side B - TT Racer (Digital Integration) ]]> - + @@ -37392,7 +37402,7 @@ Side B - 4 - Graphic (original release) Side B - 5 - EdiElectronic (original release) ]]> - + @@ -37415,7 +37425,7 @@ Side B - 2 - Battaglia d'Inghilterra [Battle of Britain] (Microgame Simulations) Side B - 3 - Super Video (original release) ]]> - + @@ -37440,7 +37450,7 @@ Side B - 4 - Doge City [Gun Law] (Vortex Software) Side B - 5 - Campagna Abbonamenti (original release) ]]> - + @@ -37465,7 +37475,7 @@ Side B - 4 - Pesce d'aprile Side B - 5 - Prossimamente ]]> - + @@ -37489,7 +37499,7 @@ Side B - 4 - Magazzino (original release) Side B - 5 - Prossimamente ]]> - + @@ -37515,7 +37525,7 @@ Side B - 5 - Pubblicità: Nuova Newel Side B - 6 - Prossimamente ]]> - + @@ -37544,7 +37554,7 @@ Side B - 7 - Pubblicità: Nuova Newel Side B - 8 - Prossimamente ]]> - + @@ -37578,7 +37588,7 @@ Side B - 8 - Roberto [Pi-Balled] (Automata) Side B - 9 - Confusion (original release) ]]> - + @@ -43912,7 +43922,7 @@ Side B: Once Upon a Lily Pad 1987 STOP Informática - + @@ -44167,7 +44177,7 @@ Side B: Once Upon a Lily Pad - + @@ -46189,7 +46199,7 @@ Side B: Once Upon a Lily Pad 1990 Proxima Software - + @@ -46202,7 +46212,7 @@ Side B: Once Upon a Lily Pad 2011 Softhouse - + @@ -46225,7 +46235,7 @@ Side B: Once Upon a Lily Pad Albert The Wolf 2014 Gabriele Amore - + @@ -46360,7 +46370,7 @@ Side B: Once Upon a Lily Pad 1984 Profisoft - + @@ -49840,7 +49850,7 @@ Side B: Once Upon a Lily Pad Automated Cave Explorer 2019 Alexei Borisov - + @@ -51430,17 +51440,6 @@ Side B: Once Upon a Lily Pad - - Basurero (Microbyte) - 1987 - Microbyte - - - - - - - BASYS-ZX 19?? @@ -52562,7 +52561,7 @@ Side B: Once Upon a Lily Pad 1986 Suzy Soft - + @@ -52968,7 +52967,7 @@ Side B: Once Upon a Lily Pad Black Crystal 1982 Carnell Software - + @@ -52980,7 +52979,7 @@ Side B: Once Upon a Lily Pad Black Crystal (Mastervision) 1984 Mastervision - + @@ -53015,6 +53014,20 @@ Side B: Once Upon a Lily Pad + + Black Horse + 2009 + Digital Brains + + + + + + + + + + The Black Hole 1983 @@ -53199,7 +53212,7 @@ Side B: Once Upon a Lily Pad 19?? Microhobby - + @@ -53518,7 +53531,7 @@ Side B: Once Upon a Lily Pad 1985 Astor Software - + @@ -53530,7 +53543,7 @@ Side B: Once Upon a Lily Pad Blok Load (128K) 1988 Z80 Pros - + @@ -53542,7 +53555,7 @@ Side B: Once Upon a Lily Pad Blok Load (48K) 1988 Z80 Pros - + @@ -55035,7 +55048,7 @@ Side B: Once Upon a Lily Pad Brick Rick: Graveyard Shift 2021 usebox.net - + @@ -55284,7 +55297,7 @@ Side B: Once Upon a Lily Pad 1984 Astor Software - + @@ -55297,7 +55310,7 @@ Side B: Once Upon a Lily Pad 1984 Astor Software - + @@ -55738,7 +55751,7 @@ Side B: Once Upon a Lily Pad Bulbo and the Blue Dragon 2019 Pension Productions - + @@ -55788,7 +55801,7 @@ Side B: Once Upon a Lily Pad Bulbo's Intrepid Adventure 2019 Pension Productions - + @@ -57219,7 +57232,7 @@ Side B: Once Upon a Lily Pad 1988 Dinamic Software - + @@ -57424,7 +57437,7 @@ Side B: Once Upon a Lily Pad 1989 Winner - + @@ -57577,7 +57590,7 @@ Side B: Once Upon a Lily Pad 1987 Luís Esteves / Paulo Sousa - + @@ -57590,7 +57603,7 @@ Side B: Once Upon a Lily Pad 1987 Luís Esteves / Paulo Sousa - + @@ -57980,7 +57993,7 @@ Side B: Once Upon a Lily Pad Castle of Dreams 1984 Widgit Software - + @@ -57992,7 +58005,7 @@ Side B: Once Upon a Lily Pad The Castle of Lost Souls 1984 Games Workshop - + @@ -58004,7 +58017,7 @@ Side B: Once Upon a Lily Pad The Castle of Lost Souls (evaluation copy) 1984 Games Workshop - + @@ -58016,7 +58029,7 @@ Side B: Once Upon a Lily Pad Castle of the Skull Lord 1984 Samurai Software - + @@ -58028,7 +58041,7 @@ Side B: Once Upon a Lily Pad Castle of the Skull Lord (set 2) 1984 Samurai Software - + @@ -58040,7 +58053,7 @@ Side B: Once Upon a Lily Pad Castle of the Skull Lord (amended version) 1984 Samurai Software - + @@ -59168,7 +59181,7 @@ Side B: Once Upon a Lily Pad Starring Charlie Chaplin 1987 U.S. Gold - + @@ -59180,7 +59193,7 @@ Side B: Once Upon a Lily Pad Starring Charlie Chaplin (Erbe, alternate cover) 1987 Erbe Software - + @@ -59192,7 +59205,7 @@ Side B: Once Upon a Lily Pad Starring Charlie Chaplin (Erbe) 1987 Erbe Software - + @@ -59204,7 +59217,7 @@ Side B: Once Upon a Lily Pad Starring Charlie Chaplin (Erbe - Serie Leyenda) 1987 IBSA - + @@ -64380,7 +64393,7 @@ Side B: Once Upon a Lily Pad Crusoe (bugfix) 1984 Automata U.K. - + @@ -64392,7 +64405,7 @@ Side B: Once Upon a Lily Pad Crusoe 1984 Automata U.K. - + @@ -64609,7 +64622,7 @@ Side B: Once Upon a Lily Pad 2025 YRGB - + @@ -65105,7 +65118,7 @@ Side B: Once Upon a Lily Pad 1983 Medidata Software - + @@ -66198,7 +66211,7 @@ Side B: Once Upon a Lily Pad Dallas (release 1) 1983 CCS - + @@ -66210,7 +66223,7 @@ Side B: Once Upon a Lily Pad Dallas (release 2) 1983 CCS - + @@ -66222,7 +66235,7 @@ Side B: Once Upon a Lily Pad Dallas (release 3) 1983 CCS - + @@ -66235,7 +66248,7 @@ Side B: Once Upon a Lily Pad 1983 VTR - + @@ -66248,7 +66261,7 @@ Side B: Once Upon a Lily Pad 1983 A.G.C. - + @@ -66261,7 +66274,7 @@ Side B: Once Upon a Lily Pad 1983 Microbyte - + @@ -66612,7 +66625,7 @@ Side B: Once Upon a Lily Pad The Dark Side of Galaxy 1995 Mecosoft - + @@ -68339,7 +68352,7 @@ Side B: Once Upon a Lily Pad - + @@ -69337,7 +69350,7 @@ Side B: Once Upon a Lily Pad Dirty Dozer 2019 Miguetelo - + @@ -70164,7 +70177,7 @@ Side B: Once Upon a Lily Pad Donkey Kong 1986 Ocean - + @@ -70176,7 +70189,7 @@ Side B: Once Upon a Lily Pad Donkey Kong (Erbe) 1986 Erbe Software - + @@ -70188,7 +70201,7 @@ Side B: Once Upon a Lily Pad Donkey Kong (Spectrum +2 release) 1986 Ocean - + @@ -70200,7 +70213,7 @@ Side B: Once Upon a Lily Pad Donkey Kong (loading screen hack) 1986 hack - + @@ -70234,7 +70247,7 @@ Side B: Once Upon a Lily Pad Doom (pre-release) 1997 Digital Reality - + @@ -71294,7 +71307,7 @@ Side B: Once Upon a Lily Pad Drift! (final release) 2019 ZOSYA entertainment - + @@ -71306,7 +71319,7 @@ Side B: Once Upon a Lily Pad Drift! (Yandex Retro Games Battle 2019 competition version) 2019 ZOSYA entertainment - + @@ -71318,7 +71331,7 @@ Side B: Once Upon a Lily Pad Drift! (final release, fast loader) 2019 ZOSYA entertainment - + @@ -71330,7 +71343,7 @@ Side B: Once Upon a Lily Pad Drift! 2K22 2022 ZOSYA entertainment - + @@ -71611,7 +71624,7 @@ Side B: Once Upon a Lily Pad Dundley and the Sliding Plates 1993 Mecosoft - + @@ -71623,7 +71636,7 @@ Side B: Once Upon a Lily Pad Dundley 2 - The Story of a Family 1994 Mecosoft - + @@ -72852,7 +72865,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earth Defence II 1994 Mecosoft - + @@ -72864,7 +72877,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earth Shock 1986 8th Day Software - + @@ -72881,7 +72894,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earth Shock (alt) 1986 8th Day Software - + @@ -72893,7 +72906,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earth Shock (G.I. Games) 1991 G.I. Games - + @@ -72905,7 +72918,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earthbound (set 2) 1986 Steven Allen, Alistair Lock - + @@ -72917,7 +72930,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earthbound 1986 Steven Allen, Alistair Lock - + @@ -72929,7 +72942,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earthlight 1988 Firebird Software - + @@ -72946,7 +72959,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Earthlight (MCM) 1988 MCM Software - + @@ -75691,7 +75704,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Evil Realm + Bugout 1985 Turtle Software - + @@ -75711,7 +75724,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) 1985 Turtle Software - + @@ -77221,7 +77234,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Astor Software - + @@ -77235,7 +77248,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Astor Software - + @@ -77515,7 +77528,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Fire Desire 2007 Rui Tunes - + @@ -79090,7 +79103,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Formula One (1984, Spirit Software) 1984 Spirit Software - + @@ -79102,7 +79115,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Formula 1 Simulator (Mastertronic) 1986 Mastertronic - + @@ -79114,7 +79127,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Formula 1 Simulator (Dro Soft) 1987 Dro Soft - + @@ -81525,7 +81538,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) 2025 YRGB - + @@ -82504,7 +82517,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) YRGB - + @@ -82736,7 +82749,7 @@ Side B - Game 1: The Dragonstar Trilogy Part III (Delta 4 Software) Get Out of Mars 2021 Noentiendo - + @@ -85420,7 +85433,7 @@ Tape 1 - Side B: 1988 Dinamic Software - + @@ -86361,7 +86374,7 @@ Tape 1 - Side B: 1988 Iber Software - + @@ -86374,7 +86387,7 @@ Tape 1 - Side B: 1988 Iber Software - + @@ -86528,7 +86541,7 @@ Tape 1 - Side B: 2019 Lee Stevenson - + @@ -89648,11 +89661,13 @@ Tape 2: Hero Quest: Return of the Witch Lord 1984 Melbourne House + + @@ -89660,9 +89675,10 @@ Tape 2: Hero Quest: Return of the Witch Lord - Disenador De Juegos II (Microbyte) - 1984 - Melbourne House / Microbyte + Diseñador de Juegos II (Microbyte) + 1987 + Microbyte + @@ -89670,6 +89686,23 @@ Tape 2: Hero Quest: Return of the Witch Lord + + Diseñador de Juegos II (Investronica) + 1984 + Investronica + + + + + + + + + + + + + Husband Chores 2016 @@ -91260,7 +91293,7 @@ Game 7: What's Your Name? Simulator (S.H. Eye-Tea Productions, 1994) 1993 Proxima Software - + @@ -91273,7 +91306,7 @@ Game 7: What's Your Name? Simulator (S.H. Eye-Tea Productions, 1994) 1993 Sintech - + @@ -95685,7 +95718,7 @@ Created by Mark Jeffries Jokers Wild 1983 Phoenix Software - + @@ -98412,7 +98445,7 @@ Created by Mark Jeffries 1985 Software Center - + @@ -99475,7 +99508,7 @@ Created by Mark Jeffries 2017 Dave Hughes - + @@ -100102,7 +100135,7 @@ Lacks game introduction, bad dump or alternate version? 1987 River Software / Chic Computer Club - + @@ -102321,7 +102354,7 @@ Lacks game introduction, bad dump or alternate version? Loriciels - + @@ -102335,7 +102368,7 @@ Lacks game introduction, bad dump or alternate version? Indissoft - + @@ -102354,7 +102387,7 @@ Lacks game introduction, bad dump or alternate version? Loriciels - + @@ -102664,7 +102697,7 @@ Lacks game introduction, bad dump or alternate version? The Life and Adventures of Crusoe 1984 Automata U.K. - + @@ -103259,7 +103292,7 @@ Lacks game introduction, bad dump or alternate version? Mad Arrows 19?? Wompa Software - + @@ -103273,7 +103306,7 @@ Lacks game introduction, bad dump or alternate version? Ventamatic - + @@ -103760,7 +103793,7 @@ Lacks game introduction, bad dump or alternate version? Magic Words 1993 Mecosoft - + @@ -103772,7 +103805,7 @@ Lacks game introduction, bad dump or alternate version? Magic Worm (mod) 1983 Lyndenhurst - + @@ -103784,7 +103817,7 @@ Lacks game introduction, bad dump or alternate version? Magic Worm (mod, alt) 1983 Lyndenhurst - + @@ -104222,7 +104255,7 @@ Lacks game introduction, bad dump or alternate version? 1984 ERE Informatique - + @@ -104242,7 +104275,7 @@ Lacks game introduction, bad dump or alternate version? 1984 ERE Informatique - + @@ -104260,7 +104293,7 @@ Lacks game introduction, bad dump or alternate version? 1984 Software Center - + @@ -104280,7 +104313,7 @@ Lacks game introduction, bad dump or alternate version? 1984 ERE Informatique - + @@ -104764,7 +104797,7 @@ Lacks game introduction, bad dump or alternate version? Manollo: El Cavernicola (set 1) 1988 Iber Software - + @@ -104776,7 +104809,7 @@ Lacks game introduction, bad dump or alternate version? Manollo: El Cavernicola (set 2) 1988 Iber Software - + @@ -104900,7 +104933,7 @@ Lacks game introduction, bad dump or alternate version? 19?? Edizioni JCE - + @@ -105782,7 +105815,7 @@ Lacks game introduction, bad dump or alternate version? 1984 Sinclair Research - + @@ -105800,7 +105833,7 @@ Lacks game introduction, bad dump or alternate version? 1984 Sinclair Research - + @@ -105818,7 +105851,7 @@ Lacks game introduction, bad dump or alternate version? 1984 Psion Software - + @@ -105831,7 +105864,7 @@ Lacks game introduction, bad dump or alternate version? 1984 IBSA - + @@ -107128,7 +107161,7 @@ Nothing happens after loading the cassette - + @@ -107143,7 +107176,7 @@ Nothing happens after loading the cassette - + @@ -107158,7 +107191,7 @@ Nothing happens after loading the cassette - + @@ -107173,7 +107206,7 @@ Nothing happens after loading the cassette - + @@ -107188,7 +107221,7 @@ Nothing happens after loading the cassette - + @@ -107203,7 +107236,7 @@ Nothing happens after loading the cassette - + @@ -107216,7 +107249,7 @@ Nothing happens after loading the cassette 2015 Oleg Origin - + @@ -110881,7 +110914,7 @@ Nothing happens after loading the cassette - Murder At Hamilton Halls (set 1) + Murder at Hamilton Halls 19?? The Fly On The Wall @@ -110892,7 +110925,7 @@ Nothing happens after loading the cassette - Murder At Hamilton Halls (set 2) + Murder at Hamilton Halls (alt) 19?? The Fly On The Wall @@ -110947,13 +110980,15 @@ Nothing happens after loading the cassette - + Murder (1983, Rabbit Software) 1983 Rabbit Software + + - + @@ -111048,7 +111083,7 @@ Nothing happens after loading the cassette - Murder In The Rue Morgue + Murder in the Rue Morgue 1987 Bluff Relay @@ -112127,7 +112162,7 @@ Nothing happens after loading the cassette The Million Dollar Great Jewel Heist 1992 The Guild - + @@ -112139,7 +112174,7 @@ Nothing happens after loading the cassette The Million Dollar Great Jewel Heist (Adventure Probe) 1992 Adventure Probe Software - + @@ -112151,7 +112186,7 @@ Nothing happens after loading the cassette The Million Dollar Great Jewel Heist (Adventure Workshop) 19?? The Adventure Workshop - + @@ -112163,7 +112198,7 @@ Nothing happens after loading the cassette The Million Dollar Great Jewel Heist (Adventure Probe, alt) 1992 Adventure Probe Software - + @@ -112175,7 +112210,7 @@ Nothing happens after loading the cassette The Million Dollar Great Jewel Heist (Adventure Probe, alt 2) 1992 Adventure Probe Software - + @@ -112187,7 +112222,7 @@ Nothing happens after loading the cassette The Mines of Lithiad (Zenobi, release 1) 1992 Zenobi Software - + @@ -112199,7 +112234,7 @@ Nothing happens after loading the cassette The Mines of Lithiad (Zenobi, release 2) 1992 Zenobi Software - + @@ -112211,7 +112246,7 @@ Nothing happens after loading the cassette The Mines of Lithiad 19?? <unknown> - + @@ -113424,7 +113459,7 @@ Nothing happens after loading the cassette 2025 YRGB - + @@ -113823,6 +113858,8 @@ Nothing happens after loading the cassette Nonocross 2008 Digital Brains + + @@ -113830,6 +113867,19 @@ Nothing happens after loading the cassette + + Nonocross (cracked) + 2008 + Digital Brains + + + + + + + + + Nonterraqueous 1985 @@ -114679,7 +114729,8 @@ Nothing happens after loading the cassette Obroty i Symetrie 19?? - <unknown> + Polmer + @@ -114698,7 +114749,7 @@ Nothing happens after loading the cassette - + Ocean Racer (Alternative) 1987 Alternative Software @@ -114709,7 +114760,7 @@ Nothing happens after loading the cassette - + Ocean Racer (System 4) 1987 System 4 @@ -114720,10 +114771,10 @@ Nothing happens after loading the cassette - - Ocean Racer - 19?? - <unknown> + + Ocean Racer (Hill MacGibbon) + 1987 + Hill MacGibbon @@ -114789,7 +114840,9 @@ Nothing happens after loading the cassette Odbicie Swiatla 19?? - <unknown> + Polmer + + @@ -114800,7 +114853,9 @@ Nothing happens after loading the cassette Odczytywanie Skali Miernika 19?? - <unknown> + Polmer + + @@ -114842,21 +114897,45 @@ Nothing happens after loading the cassette - Oddi The Viking - 19?? - <unknown> + Oddi the Viking + 2010 + Digital Brains + + + + + + Oddi the Viking (alt) + 2010 + Digital Brains + + + + + + + + + + + + + + + + Odyssey 1 1983 @@ -114961,13 +115040,12 @@ Nothing happens after loading the cassette - - - Olga I - 19?? - <unknown> + 1985 + Christoph Lütge + + @@ -115271,23 +115349,23 @@ Nothing happens after loading the cassette - On The Bench (EDOS) - 19?? - <unknown> + On The Bench + 1988 + Cult Games - - + + - On The Bench + On The Bench (EDOS) 19?? - <unknown> + EDOS - - + + @@ -115304,6 +115382,17 @@ Nothing happens after loading the cassette + On The Oche + 1984 + Artic Computing + + + + + + + + On The Oche (Paxman) 1984 Paxman Promotions @@ -115314,17 +115403,6 @@ Nothing happens after loading the cassette - - On The Oche - 19?? - <unknown> - - - - - - - On The Ropes II 1987 @@ -115343,8 +115421,8 @@ Nothing happens after loading the cassette On The Run (Alfo Software) - 19?? - <unknown> + 1989 + Alfo Software @@ -115352,21 +115430,21 @@ Nothing happens after loading the cassette - - On The Run (MCM) - 19?? - <unknown> + + On The Run (Design Design) + 1985 + Design Design Software - - + + - + On The Run (Silverbird) - 19?? - <unknown> + 1985 + Silverbird Software @@ -115374,13 +115452,13 @@ Nothing happens after loading the cassette - - On The Run - 19?? - <unknown> + + On The Run (MCM) + 1988 + MCM Software - - + + @@ -115397,23 +115475,23 @@ Nothing happens after loading the cassette - One Dark Night (set 2) + One Dark Night 1988 Paul Brunyee - - + + - One Dark Night - 19?? - <unknown> + One Dark Night (alt) + 1988 + Paul Brunyee - - + + @@ -115537,7 +115615,7 @@ Nothing happens after loading the cassette Ooze (v1.5) 2017 Bubblesoft - + @@ -115549,7 +115627,7 @@ Nothing happens after loading the cassette Ooze (v1.4) 2017 Bubblesoft - + @@ -116480,7 +116558,7 @@ Nothing happens after loading the cassette 1984 Astor Software - + @@ -116494,7 +116572,7 @@ Nothing happens after loading the cassette Astor Software - + @@ -116508,7 +116586,7 @@ Nothing happens after loading the cassette Astor Software - + @@ -116982,7 +117060,7 @@ Nothing happens after loading the cassette 19?? Profisoft - + @@ -117145,7 +117223,7 @@ Nothing happens after loading the cassette 1991 Pepsi Soft - + @@ -118111,32 +118189,10 @@ Nothing happens after loading the cassette - - Personal Banking System (Micromega) + + Personal Banking System (version 1 - release 1) 1982 - Micromega - - - - - - - - - Personal Banking System - Master Modified Copy - 19?? - <unknown> - - - - - - - - - Personal Banking System - Version 1 - Release 1 - 19?? - <unknown> + Hilton Computer Services @@ -118144,10 +118200,10 @@ Nothing happens after loading the cassette - - Personal Banking System - Version 1 - Release 2 - 19?? - <unknown> + + Personal Banking System (version 1 - release 2) + 1982 + Hilton Computer Services @@ -118160,10 +118216,10 @@ Nothing happens after loading the cassette - - Personal Banking System - Version 4 - 19?? - <unknown> + + Personal Banking System (version 4) + 1982 + Hilton Computer Services @@ -118176,10 +118232,32 @@ Nothing happens after loading the cassette - + + Personal Banking System (Micromega) + 1983 + Micromega + + + + + + + + + Personal Banking System - Master Modified Copy + 1982 + Micromega + + + + + + + + Personal Best - 19?? - <unknown> + 1984 + Earlgate Computers @@ -118187,32 +118265,10 @@ Nothing happens after loading the cassette - - Personal Computer Whirled! (Electric Storm) - 19?? - <unknown> - - - - - - - - - Personal Computer Whirled! (Zenobi) - 19?? - <unknown> - - - - - - - - + Personal Computer Whirled! - 19?? - <unknown> + 1992 + Delbert the Hamster Software @@ -118220,10 +118276,32 @@ Nothing happens after loading the cassette - + + Personal Computer Whirled! (Electric Storm) + 1993 + Electric Storm Productions + + + + + + + + + Personal Computer Whirled! (Zenobi) + 1993 + Zenobi Software + + + + + + + + Personal Finance - 19?? - <unknown> + 1983 + DK'Tronics @@ -118231,10 +118309,11 @@ Nothing happens after loading the cassette - + Personal Investor - 19?? - <unknown> + 1983 + D.R.F. Thomas + @@ -118247,10 +118326,10 @@ Nothing happens after loading the cassette - + Personality Check - 19?? - <unknown> + 1985 + Mikro-Mike @@ -118455,6 +118534,20 @@ Nothing happens after loading the cassette + + The Pharaoh's Shadow + 2009 + Digital Brains + + + + + + + + + + Pharaoh's Tomb (Phipps Associates) 1983 @@ -118568,8 +118661,8 @@ Nothing happens after loading the cassette Photon - 19?? - <unknown> + 1984 + Eigen Software @@ -118675,7 +118768,7 @@ After loading the tape, the screen freezes 1983 Homestudy - + @@ -118943,7 +119036,7 @@ After loading the tape, the screen freezes 1984 Addison-Wesley Productions - + @@ -119540,7 +119633,7 @@ After loading the tape, the screen freezes Top Games - + @@ -119618,7 +119711,7 @@ After loading the tape, the screen freezes 19?? <unknown> - + @@ -119862,7 +119955,7 @@ After loading the tape, the screen freezes 1985 Astor Software - + @@ -119875,7 +119968,7 @@ After loading the tape, the screen freezes 1985 Astor Software - + @@ -120807,7 +120900,7 @@ Game 4 - Char-Wallah Zigurat Software - + @@ -120826,7 +120919,7 @@ Game 4 - Char-Wallah Zigurat Software - + @@ -121182,7 +121275,7 @@ Game 4 - Char-Wallah Pro Golf II 1986 Atlantis Software - + @@ -121194,7 +121287,7 @@ Game 4 - Char-Wallah Pro Golf II (System 4) 1986 System 4 - + @@ -121206,7 +121299,7 @@ Game 4 - Char-Wallah Pro Golf II (System 4, alt) 1986 System 4 - + @@ -122387,7 +122480,7 @@ Game 4 - Char-Wallah 1988 Iber Software - + @@ -123193,7 +123286,7 @@ Game 4 - Char-Wallah QRA - Maidenhead Locator Program - 19?? + 1984 <unknown> @@ -123378,8 +123471,8 @@ Game 4 - Char-Wallah Quarterback (Nab Software) - 19?? - <unknown> + 1985 + Nab Software @@ -123387,10 +123480,10 @@ Game 4 - Char-Wallah - - Quarterback - 19?? - <unknown> + + Quarterback (Virgin Games) + 1990 + Virgin Games @@ -123761,8 +123854,8 @@ Game 4 - Char-Wallah Quick Draw McGraw - 19?? - <unknown> + 1991 + Hi-Tec Software @@ -124258,7 +124351,7 @@ Game 4 - Char-Wallah Radio World 19?? - <unknown> + Micronet 800 Telesoftware @@ -124272,23 +124365,23 @@ Game 4 - Char-Wallah - Radio-Hams (set 2) + Radio-Hams 19?? - <unknown> + ON5KN - - + + - Radio-Hams + Radio-Hams (alt) 19?? - <unknown> + ON5KN - - + + @@ -124453,7 +124546,7 @@ Game 4 - Char-Wallah - Rail Traffic Control Crewe (set 1, Dee-Kay Systems) + Rail Traffic Control Crewe (Dee-Kay Systems) 1987 Dee-Kay Systems @@ -124464,7 +124557,7 @@ Game 4 - Char-Wallah - Rail Traffic Control Crewe (set 2, Ashley Greenup) + Rail Traffic Control Crewe (Ashley Greenup) 1989 Ashley Greenup @@ -124475,9 +124568,9 @@ Game 4 - Char-Wallah - Rail Traffic Control Crewe (set 3, Ashley Greenup) - 19?? - <unknown> + Rail Traffic Control Crewe (Ashley Greenup, alt) + 1989 + Ashley Greenup @@ -125153,8 +125246,9 @@ Game 4 - Char-Wallah Re-Evolucion - 19?? - <unknown> + 1992 + Software Atlantico + @@ -125455,7 +125549,23 @@ Game 4 - Char-Wallah - Red Alert (set 2) + Red Alert + 1991 + Zenobi Software + + + + + + + + + + + + + + Red Alert (alt) 1991 Zenobi Software @@ -125470,22 +125580,6 @@ Game 4 - Char-Wallah - - Red Alert - 19?? - <unknown> - - - - - - - - - - - - Red Arrows 1985 @@ -125574,17 +125668,6 @@ Game 4 - Char-Wallah - - Red Hawk Demo - 19?? - <unknown> - - - - - - - Red Hawk 1986 @@ -125596,6 +125679,17 @@ Game 4 - Char-Wallah + + Red Hawk (demo) + 1986 + Melbourne House + + + + + + + Red Led 1987 @@ -125635,20 +125729,9 @@ Game 4 - Char-Wallah - Red Scorpion (Bug-Byte) - 1987 - Bug-Byte Software - - - - - - - - Red Scorpion - 19?? - <unknown> + 1987 + Quicksilva @@ -125661,6 +125744,17 @@ Game 4 - Char-Wallah + + Red Scorpion (Bug-Byte) + 1987 + Bug-Byte Software + + + + + + + Red Weed 1983 @@ -125814,10 +125908,28 @@ Game 4 - Char-Wallah - - Rescate en el Golfo (Serie Leyenda) + + Rescate en el Golfo 1990 Opera Soft + + + + + + + + + + + + + + + Rescate en el Golfo (IBSA - Serie Leyenda) + 1990 + IBSA + @@ -125875,7 +125987,7 @@ Game 4 - Char-Wallah - Rescue From Doom (set 1) + Rescue From Doom 1986 David Edgar @@ -125886,9 +125998,9 @@ Game 4 - Char-Wallah - Rescue From Doom (set 2, The Guild) + Rescue From Doom (The Guild) 1986 - David Edgar / The Guild + The Guild @@ -127144,7 +127256,7 @@ Game 4 - Char-Wallah 2019 Simon M. Ferre - + @@ -127157,7 +127269,7 @@ Game 4 - Char-Wallah 2019 Simon M. Ferre - + @@ -127170,7 +127282,7 @@ Game 4 - Char-Wallah 2017 Psytronik Software - + @@ -127183,7 +127295,7 @@ Game 4 - Char-Wallah 2017 Psytronik Software - + @@ -127196,7 +127308,7 @@ Game 4 - Char-Wallah 2017 Psytronik Software - + @@ -127209,7 +127321,7 @@ Game 4 - Char-Wallah 2017 Psytronik Software - + @@ -127222,7 +127334,7 @@ Game 4 - Char-Wallah 2017 Psytronik Software - + @@ -127620,7 +127732,7 @@ Game 4 - Char-Wallah Rod-Land 1991 Storm Software - + @@ -127632,7 +127744,7 @@ Game 4 - Char-Wallah Rod-Land (Dro Soft) 1991 Dro Soft - + @@ -127644,7 +127756,7 @@ Game 4 - Char-Wallah Rod-Land (Kixx) 1991 Kixx - + @@ -127667,7 +127779,7 @@ Game 4 - Char-Wallah Rodmän 2018 The Future Was 8 Bit - + @@ -127679,7 +127791,7 @@ Game 4 - Char-Wallah Rodmän (demo) 2018 The Future Was 8 Bit - + @@ -127713,7 +127825,7 @@ Game 4 - Char-Wallah Rogue Trooper 1986 Piranha - + @@ -127725,7 +127837,7 @@ Game 4 - Char-Wallah Rogue Trooper (System 4) 1988 System 4 - + @@ -127737,7 +127849,7 @@ Game 4 - Char-Wallah Rogue Trooper (Alternative) 1987 Alternative Software - + @@ -127760,7 +127872,7 @@ Game 4 - Char-Wallah Roland's Rat Race (set 1) 1985 Ocean - + @@ -127777,7 +127889,7 @@ Game 4 - Char-Wallah Roland's Rat Race (set 2) 1985 Ocean - + @@ -128277,7 +128389,7 @@ Game 4 - Char-Wallah Rubinho Cucaracha 2022 ZOSYA entertainment - + @@ -128400,7 +128512,7 @@ Game 4 - Char-Wallah 1985 Creativos Editoriales - + @@ -129099,7 +129211,7 @@ Game 4 - Char-Wallah - + The Rocky Horror Show (System 4) 1988 System 4 @@ -129110,18 +129222,25 @@ Game 4 - Char-Wallah - - The Rocky Horror Show (Alternative, 128K) + + The Rocky Horror Show (Alternative) 1987 Alternative Software - + + + + + + + + - + The Rocky Horror Show (128K, alt) 1986 CRL Group @@ -129132,7 +129251,7 @@ Game 4 - Char-Wallah - + The Rocky Horror Show (EDOS) 19?? EDOS @@ -129143,18 +129262,7 @@ Game 4 - Char-Wallah - - The Rocky Horror Show (Alternative, 48K) - 1987 - Alternative Software - - - - - - - - + The Rocky Horror Show (48K) 1985 CRL Group @@ -129165,7 +129273,7 @@ Game 4 - Char-Wallah - + The Rocky Horror Show (Sound on Sound) 19?? Sound on Sound @@ -129177,7 +129285,7 @@ Game 4 - Char-Wallah - + The Rocky Horror Show (Zafiro) 19?? Zafiro @@ -129682,7 +129790,7 @@ Game 4 - Char-Wallah Samurai Warrior 1988 Firebird Software - + @@ -129694,7 +129802,7 @@ Game 4 - Char-Wallah Samurai Warrior (MCM) 1988 MCM Software - + @@ -131977,6 +132085,17 @@ Game 4 - Char-Wallah + + The Shatered World (incomplete version) + 1990 + Luís Peres + + + + + + + Shedmaster Bounds Green 1987 @@ -132294,7 +132413,6 @@ Game 4 - Char-Wallah - Shootout 1989 @@ -132732,7 +132850,7 @@ Game 4 - Char-Wallah Simon el Extraterrestre 1990 Emilio Jose Grao Benedi - + @@ -133305,8 +133423,6 @@ Game 4 - Char-Wallah - - Skull (set 1, version 2) 1984 @@ -134923,7 +135039,7 @@ Game 4 - Char-Wallah 1997 Zack - + @@ -134937,7 +135053,7 @@ Game 4 - Char-Wallah Zack Derived version of a .z80 file - + @@ -134949,7 +135065,7 @@ Game 4 - Char-Wallah Soko-Ban Perfect 1991 New Frontier - + @@ -134962,7 +135078,7 @@ Game 4 - Char-Wallah 2006 Compiler Software - + @@ -134975,7 +135091,7 @@ Game 4 - Char-Wallah 2006 Compiler Software - + @@ -135365,24 +135481,36 @@ Game 4 - Char-Wallah - - Sooty's Fun With Numbers (EDOS) - 19?? - <unknown> + + Sooty & Sweep 2 + 1992 + Alternative Software + - - + + + + + + + + Sooty's Fun With Numbers + 1990 + Friendly Learning + + + - Sooty's Fun With Numbers - 19?? - <unknown> + Sooty's Fun With Numbers (EDOS) + 199? + EDOS - - + + @@ -137996,7 +138124,7 @@ Game 4 - Char-Wallah 1987 Mastertronic - + @@ -138009,7 +138137,7 @@ Game 4 - Char-Wallah 1987 Dro Soft - + @@ -138197,7 +138325,7 @@ Game 4 - Char-Wallah 1984 Swescot - + @@ -138291,7 +138419,7 @@ Game 4 - Char-Wallah Spidoid 1988 Tiny Bug - + @@ -138309,7 +138437,7 @@ Game 4 - Char-Wallah 1984 Individual Software Service - + @@ -138616,7 +138744,7 @@ Game 4 - Char-Wallah Spooky Castle 1991 Atlantis Software - + @@ -138628,7 +138756,7 @@ Game 4 - Char-Wallah Spooky Castle (EDOS) 1991 EDOS - + @@ -138684,7 +138812,7 @@ Game 4 - Char-Wallah Sports Hero 1984 Melbourne House - + @@ -138696,7 +138824,7 @@ Game 4 - Char-Wallah Sports Hero (Firebird) 1984 Firebird Software - + @@ -138708,7 +138836,7 @@ Game 4 - Char-Wallah Sports Hero (ABC Soft) 1985 ABC Soft - + @@ -138825,7 +138953,7 @@ Game 4 - Char-Wallah 2018 Psytronik Software - + @@ -138881,7 +139009,7 @@ Game 4 - Char-Wallah SSTV 1987 Pearsons Computing - + @@ -138898,7 +139026,7 @@ Game 4 - Char-Wallah SSTV (sample pictures) 1987 Pearsons Computing - + @@ -138915,7 +139043,7 @@ Game 4 - Char-Wallah SSTV (alt) 1987 Pearsons Computing - + @@ -138960,7 +139088,7 @@ Game 4 - Char-Wallah St. Dragon 1990 Storm Software - + @@ -138977,7 +139105,7 @@ Game 4 - Char-Wallah St. Dragon (Kixx) 1990 Kixx - + @@ -138994,7 +139122,7 @@ Game 4 - Char-Wallah St. Dragon (Dro Soft) 1990 Dro Soft - + @@ -139093,7 +139221,7 @@ Game 4 - Char-Wallah Stainless Steel 1986 Mikro-Gen - + @@ -139110,7 +139238,7 @@ Game 4 - Char-Wallah Stainless Steel (Erbe, medium case) 1986 Erbe Software - + @@ -139122,7 +139250,7 @@ Game 4 - Char-Wallah Stainless Steel (Erbe - Serie Leyenda) 1986 IBSA - + @@ -139178,7 +139306,7 @@ Game 4 - Char-Wallah Star Chess 19?? Empire Software - + @@ -139190,7 +139318,7 @@ Game 4 - Char-Wallah Star Control 1991 Accolade - + @@ -139202,7 +139330,7 @@ Game 4 - Char-Wallah Star Control (Dro Soft) 1991 Dro Soft - + @@ -139291,7 +139419,7 @@ Game 4 - Char-Wallah Star Paws 1988 Software Projects - + @@ -139303,7 +139431,7 @@ Game 4 - Char-Wallah Star Paws (Alternative) 1988 Alternative Software - + @@ -140692,7 +140820,7 @@ Game 4 - Char-Wallah Strike Attack 1984 Micro-Mart Software - + @@ -140704,7 +140832,7 @@ Game 4 - Char-Wallah Strike Attack (alt) 1984 Micro-Mart Software - + @@ -140776,7 +140904,7 @@ Game 4 - Char-Wallah Strike Force Cobra (System 4) 1988 Z Cobra - + @@ -141871,7 +141999,7 @@ Game 4 - Char-Wallah Super Quiz 1 1984 The Scripture Union - + @@ -141883,7 +142011,7 @@ Game 4 - Char-Wallah Super Quiz 2 1984 The Scripture Union - + @@ -141895,7 +142023,7 @@ Game 4 - Char-Wallah Super Quiz 3 1984 The Scripture Union - + @@ -142171,7 +142299,7 @@ Game 4 - Char-Wallah Super Ted: The Search for Spot (set 2) 1990 Alternative Software - + @@ -142183,7 +142311,7 @@ Game 4 - Char-Wallah Super Ted: The Search for Spot 1990 Alternative Software - + @@ -142195,7 +142323,7 @@ Game 4 - Char-Wallah Super Ted 1984 Longman Software - + @@ -142223,7 +142351,7 @@ Game 4 - Char-Wallah Super Trolley 1988 Mastertronic - + @@ -142235,7 +142363,7 @@ Game 4 - Char-Wallah Super Trolley (Dro Soft) 1988 Dro Soft - + @@ -142247,7 +142375,7 @@ Game 4 - Char-Wallah Super Trolley (Flippy Flippy, dual system) 1988 Mastertronic - + @@ -147079,7 +147207,7 @@ Game 4 - Char-Wallah Theseus and the Minotaur 1986 Anthony Collins - + @@ -147096,7 +147224,7 @@ Game 4 - Char-Wallah Theseus and the Minotaur (The Guild) 1990 The Guild - + @@ -147113,7 +147241,7 @@ Game 4 - Char-Wallah Theseus And The Minotaur (Zenobi) 1990 Zenobi Software - + @@ -147286,7 +147414,7 @@ Game 4 - Char-Wallah - Thomas The Tank Engine (set 1) + Thomas the Tank Engine 1991 Alternative Software @@ -147297,7 +147425,7 @@ Game 4 - Char-Wallah - Thomas The Tank Engine (set 2, EDOS) + Thomas the Tank Engine (EDOS) 1991 EDOS @@ -147307,8 +147435,32 @@ Game 4 - Char-Wallah + + Thomas the Tank Engine II: The Race + 19?? + Alternative Software + + + + + + + + + + Thomas the Tank Engine II: The Race (demo) + 19?? + Alternative Software + + + + + + + + - Thomas The Tank Engine's Fun With Words + Thomas the Tank Engine's Fun With Words 1990 Friendly Learning @@ -148518,7 +148670,7 @@ Game 4 - Char-Wallah Tizpan, Lord of the Jungle 1990 The Adventure Workshop - + @@ -148530,7 +148682,7 @@ Game 4 - Char-Wallah Tizpan, Lord of the Jungle (The Guild) 1990 The Guild - + @@ -148957,7 +149109,7 @@ Game 4 - Char-Wallah Total Recall 1991 Ocean - + @@ -148969,7 +149121,7 @@ Game 4 - Char-Wallah Total Recall (The Hit Squad) 1991 The Hit Squad - + @@ -148982,7 +149134,7 @@ Game 4 - Char-Wallah 1991 Erbe Software - + @@ -153639,7 +153791,7 @@ Version without loading screen, maybe a pre-release Volcanic Planet (Compulogical) 1984 Compulogical - + @@ -154271,7 +154423,7 @@ Version without loading screen, maybe a pre-release The Winged Avenger 1982 Work Force - + @@ -154283,7 +154435,7 @@ Version without loading screen, maybe a pre-release The Winged Avenger (Mk II) 1983 Work Force - + @@ -154295,7 +154447,7 @@ Version without loading screen, maybe a pre-release The Winged Avenger (Profisoft, Mk II) 1983 Profisoft - + @@ -154308,7 +154460,7 @@ Version without loading screen, maybe a pre-release 1983 Work Force This version has a kind of loading screen - + @@ -154534,7 +154686,7 @@ Version without loading screen, maybe a pre-release The Worm 1983 Magazine Sinclair - + @@ -154578,7 +154730,7 @@ Version without loading screen, maybe a pre-release The Writer (128K) 1985 Softechnics - + @@ -154595,7 +154747,7 @@ Version without loading screen, maybe a pre-release The Writer (48K) 1985 Softechnics - + @@ -156316,7 +156468,7 @@ Version without loading screen, maybe a pre-release Wiz (two sides) 1987 Melbourne House - + @@ -156334,7 +156486,7 @@ Version without loading screen, maybe a pre-release 1987 Melbourne House Loading screen different from the parent set - + @@ -156346,7 +156498,7 @@ Version without loading screen, maybe a pre-release Wiz-Biz 1987 Alternative Software - + @@ -156358,7 +156510,7 @@ Version without loading screen, maybe a pre-release Wiz-Biz (set 2) 1987 Alternative Software - + @@ -156370,7 +156522,7 @@ Version without loading screen, maybe a pre-release Wizard Box 1984 Scisoft - + @@ -156387,7 +156539,7 @@ Version without loading screen, maybe a pre-release Wizard Box (alt) 1984 Scisoft - + @@ -156464,7 +156616,7 @@ Version without loading screen, maybe a pre-release Wizard Warz 1988 Go! - + @@ -156476,7 +156628,7 @@ Version without loading screen, maybe a pre-release Wizard Warz (Erbe) 1988 Erbe Software - + @@ -156599,7 +156751,7 @@ Version without loading screen, maybe a pre-release Wolfman (set 2) 1988 CRL Group - + @@ -156616,7 +156768,7 @@ Version without loading screen, maybe a pre-release Wolfman 1988 CRL Group - + @@ -156931,7 +157083,7 @@ Version without loading screen, maybe a pre-release World Champions (release 1) 1986 E&J Software - + @@ -156943,7 +157095,7 @@ Version without loading screen, maybe a pre-release World Champions (release 2) 1986 E&J Software - + @@ -156955,7 +157107,7 @@ Version without loading screen, maybe a pre-release World Championship Boxing Manager 1990 Goliath Games - + @@ -156967,7 +157119,7 @@ Version without loading screen, maybe a pre-release World Championship Boxing Manager (GBH) 1990 GBH - + @@ -156980,7 +157132,7 @@ Version without loading screen, maybe a pre-release 1990 System 4 - + @@ -156992,7 +157144,7 @@ Version without loading screen, maybe a pre-release World Championship Soccer 1991 Elite Systems - + @@ -157004,7 +157156,7 @@ Version without loading screen, maybe a pre-release World Championship Soccer (Dro Soft) 1991 Dro Soft - + @@ -157016,7 +157168,7 @@ Version without loading screen, maybe a pre-release World Class Darts 1983 Alphasoft - + @@ -157028,7 +157180,7 @@ Version without loading screen, maybe a pre-release World Class Leaderboard 1987 U.S. Gold - + @@ -157059,7 +157211,7 @@ Version without loading screen, maybe a pre-release World Class Leaderboard (Kixx) 1987 Kixx - + @@ -157076,7 +157228,7 @@ Version without loading screen, maybe a pre-release World Class Rugby 1991 Audiogenic Software - + @@ -157093,7 +157245,7 @@ Version without loading screen, maybe a pre-release World Class Rugby (System 4) 1991 System 4 - + @@ -157143,7 +157295,7 @@ Version without loading screen, maybe a pre-release World Cup Carnival (set 1) 1986 U.S. Gold - + @@ -157155,7 +157307,7 @@ Version without loading screen, maybe a pre-release World Cup Carnival (set 2) 1986 U.S. Gold - + @@ -157757,7 +157909,7 @@ Version without loading screen, maybe a pre-release World XXI Soft - + @@ -157771,7 +157923,7 @@ Version without loading screen, maybe a pre-release World XXI Soft - + @@ -157785,7 +157937,7 @@ Version without loading screen, maybe a pre-release World XXI Soft - + @@ -158627,7 +158779,7 @@ Version without loading screen, maybe a pre-release Yacht Race (Hill MacGibbon) - 1985 + 1984 Hill MacGibbon @@ -159672,7 +159824,7 @@ Version without loading screen, maybe a pre-release ZX Berserk (release 1) 1982 Jega Software - + @@ -159684,7 +159836,7 @@ Version without loading screen, maybe a pre-release ZX Berserk (release 2) 1982 Jega Software - + @@ -159696,7 +159848,7 @@ Version without loading screen, maybe a pre-release ZX Berserk (release 3) 1982 Jega Software - + @@ -162918,29 +163070,26 @@ Side B - Game 2: Superkid in Space (Atlantis Software) A Toda Maquina 1989 Erbe Software - - + + + + @@ -162948,42 +163097,41 @@ Tape 2 - Side B: After Burner - A Toda Maquina 2 + A Toda Maquina II 1990 Erbe Software - - + + + + + + @@ -163983,7 +164131,7 @@ Tape 1 - Side B - Game 3: Bullseye Automata 10 Pack Volume 1 1985 Automata U.K. - + @@ -163995,7 +164143,7 @@ Tape 1 - Side B - Game 3: Bullseye Automata 10 Pack Volume 2 1985 Automata U.K. - + @@ -164007,7 +164155,7 @@ Tape 1 - Side B - Game 3: Bullseye Automata 10 Pack Volume 3 1985 Automata U.K. - + @@ -165411,7 +165559,7 @@ Tape 1 - Side B - Game 3: Bullseye 1984 A. Pritchard / Buffer Micro - + @@ -171285,6 +171433,50 @@ Side B - Game 3: Capricornio 1 [Galaxians] (Artic Computing Ltd) + + Multi-Sports 2: Opera vs. Dinamic + 1992 + Opera Soft / Dinamic Software + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Multimixx 1 1991 @@ -171565,21 +171757,25 @@ Side B - Game 3: Capricornio 1 [Galaxians] (Artic Computing Ltd) 1986 Ocean + + + + @@ -177377,7 +177573,7 @@ Tape 2 - Side B - Game 2: Backgammon (CDS Microsystems) 1988 River Software - + @@ -178771,7 +178967,7 @@ Tape 3: The Price of Magik (Level 9 Computing) Tiny Dungeons 2022 RetroSouls - + From 349605ee4c27a105a250acd0fffd419005ef5a92 Mon Sep 17 00:00:00 2001 From: cam900 Date: Mon, 16 Mar 2026 06:31:33 +0900 Subject: [PATCH 283/351] igs/pgm.cpp: Add notes for Debug feature (same purpose as pgm2 Debug DIP) and DIP switch positions (#15107) --- src/mame/igs/pgm.cpp | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/src/mame/igs/pgm.cpp b/src/mame/igs/pgm.cpp index f106f735433..6572d6cdb55 100644 --- a/src/mame/igs/pgm.cpp +++ b/src/mame/igs/pgm.cpp @@ -50,6 +50,10 @@ Known Games on this Platform (add more) +Debug features (require DIP SW1:8 On): +- QC TEST mode: hold P1 A+B during boot +- Debug/Cheat mode: hold P1 B+C during boot + TODO: - IRQ4 generation - Puzzli 2 doesn't like this, many other games require it for coins / inputs to work. @@ -422,26 +426,26 @@ INPUT_PORTS_START( pgm ) PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused? PORT_START("DSW") - PORT_SERVICE( 0x0001, IP_ACTIVE_LOW ) - PORT_DIPNAME( 0x0002, 0x0002, "Music" ) + PORT_SERVICE( 0x0001, IP_ACTIVE_LOW ) PORT_DIPLOCATION("SW1:1") + PORT_DIPNAME( 0x0002, 0x0002, "Music" ) PORT_DIPLOCATION("SW1:2") PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0002, DEF_STR( On ) ) - PORT_DIPNAME( 0x0004, 0x0004, "Voice" ) + PORT_DIPNAME( 0x0004, 0x0004, "Voice" ) PORT_DIPLOCATION("SW1:3") PORT_DIPSETTING( 0x0000, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0004, DEF_STR( On ) ) - PORT_DIPNAME( 0x0008, 0x0008, "Free" ) + PORT_DIPNAME( 0x0008, 0x0008, "Free" ) PORT_DIPLOCATION("SW1:4") PORT_DIPSETTING( 0x0008, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0010, 0x0010, "Stop" ) + PORT_DIPNAME( 0x0010, 0x0010, "Stop" ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x0010, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unused ) ) + PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:6") PORT_DIPSETTING( 0x0020, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unused ) ) + PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x0040, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) - PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unused ) ) + PORT_DIPNAME( 0x0080, 0x0080, "Debug" ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) From 71967d61dde78f35ae88b54c0e2aa34beb537576 Mon Sep 17 00:00:00 2001 From: ArcadeShadow Date: Sun, 15 Mar 2026 21:47:04 +0000 Subject: [PATCH 284/351] isa/ncr53c400.cpp: Removal of the leading space from the description (#15111) --- src/devices/bus/isa/ncr53c400.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/devices/bus/isa/ncr53c400.cpp b/src/devices/bus/isa/ncr53c400.cpp index 22395ec3f72..eb1bef65866 100644 --- a/src/devices/bus/isa/ncr53c400.cpp +++ b/src/devices/bus/isa/ncr53c400.cpp @@ -19,7 +19,7 @@ TODO: #include "bus/nscsi/devices.h" #include "machine/nscsi_bus.h" -DEFINE_DEVICE_TYPE(ISA8_RT1000B, isa8_rt1000b_device, "rt1000b", " Rancho Technology RT1000B SCSI controller") +DEFINE_DEVICE_TYPE(ISA8_RT1000B, isa8_rt1000b_device, "rt1000b", "Rancho Technology RT1000B SCSI controller") isa8_rt1000b_device::isa8_rt1000b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, ISA8_RT1000B, tag, owner, clock) From 22e2bed60808e213716fc728d1ba6b943e56907d Mon Sep 17 00:00:00 2001 From: ClawGrip Date: Sun, 15 Mar 2026 23:05:40 +0100 Subject: [PATCH 285/351] Add Gaelco / Cresmatic Futbol (pinball) and its clones (#15090) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit New systems marked not working ------------------------------ Futbol (set 1) [Javier Valero, Josep Quingles, Recreativas.org] New clones marked not working ----------------------------- Futbol (set 2) [Javier Valero, Josep Quingles, Recreativas.org] Futbol (test ROMs) [Javier Valero, Josep Quingles, Recreativas.org] --------- Co-authored-by: Tomás García-Merás --- src/mame/gaelco/gaelcof3.cpp | 59 +++++++++++++++++++++++++----------- src/mame/mame.lst | 3 ++ 2 files changed, 45 insertions(+), 17 deletions(-) diff --git a/src/mame/gaelco/gaelcof3.cpp b/src/mame/gaelco/gaelcof3.cpp index 5e1c30a0f1b..74127902b88 100644 --- a/src/mame/gaelco/gaelcof3.cpp +++ b/src/mame/gaelco/gaelcof3.cpp @@ -1,7 +1,7 @@ // license:BSD-3-Clause // copyright-holders: /* - Gaelco 'Futbol-3' hardware for kiddie rides + Gaelco 'Futbol-3' hardware for kiddie rides, pinballs, and electromechanicals. The PCB is very compact and has few components. The main ones are: @@ -34,19 +34,9 @@ The PCBs were inside two "Coche de Bomberos" kiddie rides from CMC Cresmatic (https://www.recreativas.org/coche-de-bomberos-6022-cresmatic). Anyway, the hardware is generic enough to serve any basic kiddie ride. - There are five different versions dumped (from different machines): - -"Susanita" - Based on the song composed by Rafael Pérez Botija. - -"El auto de papá" - Based on the song "El auto feo", composed by Enrique Fischer 'Pipo Pescador'. - -"Don Pepito" - Based on the song "Hola Don Pepito", composed by Ramón del Rivero. - -"Ob-La-Di" - Based on the song by the Beatles. - -"Mueve" - Based on the Spanish cover version of the song "I Like To Move It" by Reel 2 Real, named "Te Gusta el Mueve Mueve". - There is a newer version of the PCB with the same components (Gaelco REF.920505, from 1992). It adds a fuse, a LED for PCB control, and better connectors. - - The PIC16C56 from Hola Don Pepito has been decapped. - TODO: inputs; Oki hook up is possibly more complex. @@ -118,7 +108,35 @@ void gaelcof3_state::gaelcof3(machine_config &config) OKIM6295(config, "oki", 1000000, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 1.0); // clock and pin not confirmed } +// Pinballs +ROM_START( futbol ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "p4n_pic16c56.bin", 0x0000, 0x2000, CRC(a4d69b51) SHA1(aa0f20b45aa92912ab235c9dc30b3532ff7103eb) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "pinball_futbol_p4_97e7_p4n_26-6-98_27c020.bin", 0x00000, 0x40000, CRC(448d244b) SHA1(51c3d6309b487d17085aac161016190249e2900b) ) +ROM_END + +ROM_START( futbola ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "p4n_pic16c56.bin", 0x0000, 0x2000, CRC(a4d69b51) SHA1(aa0f20b45aa92912ab235c9dc30b3532ff7103eb) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "pinball_futbol_p3_20f6_p4n_21-10-97_27c020.bin", 0x00000, 0x40000, CRC(05a3595d) SHA1(226fd63ea23d06022bbad9eb5a60fe04707a8fca) ) +ROM_END + +ROM_START( futbolt ) + ROM_REGION( 0x2000, "maincpu", 0 ) + ROM_LOAD( "test_pic16c54a.bin", 0x0000, 0x2000, CRC(ad819aaa) SHA1(f10500e9147c703e24a26b4d48305c16996b7c0a) ) + + ROM_REGION( 0x40000, "oki", 0 ) + ROM_LOAD( "test_futbol_27c010a.bin", 0x00000, 0x20000, CRC(57cf1ca4) SHA1(8d7f027bf7809194035c5b4671919d3b3dce2f1b) ) +ROM_END + +// Kiddie rides + +// Based on the song "El auto feo", composed by Enrique Fischer 'Pipo Pescador'. ROM_START( autopapa ) ROM_REGION( 0x2000, "maincpu", 0 ) ROM_LOAD( "m.irn_pic16c56.u3", 0x0000, 0x2000, CRC(089699f5) SHA1(2cc470a97936887804363c8783bad4db4cad4f64) ) @@ -127,14 +145,16 @@ ROM_START( autopapa ) ROM_LOAD( "autopapa.u1", 0x00000, 0x40000, CRC(a3e5607e) SHA1(24a9c79edec7b2f7f64b622240f2ad8f3ffa29ca) ) ROM_END +// Based on the song "Hola Don Pepito", composed by Ramón del Rivero. ROM_START( donpepito ) ROM_REGION( 0x2000, "maincpu", 0 ) - ROM_LOAD( "ir_pic16c56.u3", 0x0000, 0x1fff, CRC(a2c24ec3) SHA1(e87520c6de714b1638c9b156411522e0209fb06e) ) + ROM_LOAD( "ir_pic16c56.u3", 0x0000, 0x1fff, CRC(a2c24ec3) SHA1(e87520c6de714b1638c9b156411522e0209fb06e) ) // Decapped ROM_REGION( 0x40000, "oki", 0 ) ROM_LOAD( "don_pepito.u1", 0x00000, 0x40000, CRC(574fcd14) SHA1(a23f1eb6d2cef5aa07df3a553fe1d33803648f43) ) ROM_END +// Based on the Spanish cover version of the song "I Like To Move It" by Reel 2 Real, named "Te Gusta el Mueve Mueve". ROM_START( mueve ) ROM_REGION( 0x2000, "maincpu", 0 ) ROM_LOAD( "m.irn_pic16c56.u3", 0x0000, 0x2000, CRC(089699f5) SHA1(2cc470a97936887804363c8783bad4db4cad4f64) ) @@ -143,6 +163,7 @@ ROM_START( mueve ) ROM_LOAD( "mueve_reclam_ea76_pic_irn_27c020.u1", 0x00000, 0x40000, CRC(f3cc6936) SHA1(35334aeb85f3524f2afdf20f49005d7573ec5494) ) ROM_END +// Based on the song by the Beatles. ROM_START( obladi ) ROM_REGION( 0x2000, "maincpu", 0 ) ROM_LOAD( "m.irn_pic16c56.u3", 0x0000, 0x2000, CRC(089699f5) SHA1(2cc470a97936887804363c8783bad4db4cad4f64) ) @@ -151,6 +172,7 @@ ROM_START( obladi ) ROM_LOAD( "obladi_reclam_5a5c_pic_irn_27c020.u1", 0x00000, 0x40000, CRC(a156f749) SHA1(f2bcbe5857e8ea6d96c2abe3051a5d02308dc963) ) ROM_END +// Based on the song composed by Rafael Pérez Botija. ROM_START( susanita ) ROM_REGION( 0x2000, "maincpu", 0 ) ROM_LOAD( "m.irn_pic16c56.u3", 0x0000, 0x2000, CRC(089699f5) SHA1(2cc470a97936887804363c8783bad4db4cad4f64) ) @@ -161,9 +183,12 @@ ROM_END } // anonymous namespace +GAME( 1998, futbol, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Futbol (set 1)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 1997, futbola, futbol, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Futbol (set 2)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 1997, futbolt, futbol, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Futbol (test ROMs)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) -GAME( 199?, autopapa, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", u8"El auto de papá", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) -GAME( 199?, donpepito, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Don Pepito", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) -GAME( 199?, mueve, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Mueve", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) -GAME( 199?, obladi, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Ob-La-Di", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) -GAME( 199?, susanita, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Susanita", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 199?, autopapa, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", u8"El auto de papá", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 199?, donpepito, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Don Pepito", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 199?, mueve, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Mueve", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 199?, obladi, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Ob-La-Di", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) +GAME( 199?, susanita, 0, gaelcof3, gaelcof3, gaelcof3_state, empty_init, ROT0, "Gaelco / Cresmatic", "Susanita", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e71af8d7112..0606c6e1980 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -18894,6 +18894,9 @@ surfplnt40 @source:gaelco/gaelcof3.cpp autopapa donpepito +futbol +futbola +futbolt mueve obladi susanita From bdfb08dec575d2c070fb726ab51c95cc16549feb Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 01:17:01 +0100 Subject: [PATCH 286/351] xmen: correct bootleg oki banking, add sound mute (to rungun too), small cleanup --- src/mame/konami/k052109.cpp | 20 +++--- src/mame/konami/rungun.cpp | 1 + src/mame/konami/xmen.cpp | 120 +++++++++++++++--------------------- 3 files changed, 60 insertions(+), 81 deletions(-) diff --git a/src/mame/konami/k052109.cpp b/src/mame/konami/k052109.cpp index 8337733f0d0..24c3aebc8ec 100644 --- a/src/mame/konami/k052109.cpp +++ b/src/mame/konami/k052109.cpp @@ -79,16 +79,16 @@ probably applies to tilemap writes. 180c-1833: A y scroll 1a00-1bff: A x scroll 1c00 : Maps the three 8kB RAM chips to memory addresses. - ------xx select the configuration from this table - RAM0 RAM1 RAM2 - 00 A~B 6~7 8~9 Reset state - 01 8~9 4~5 6~7 - 10 6~7 2~3 4~5 - 11 4~5 0~1 2~3 TMNT setting - ---xxx-- affects how RAMs are accessed - -x------ - 0 = replace bits 5:4 of color attribute by bits 1:0 - 1 = do not alter color attribute (gradius3,xmen) + ------xx select the configuration from this table + RAM0 RAM1 RAM2 + 00 A~B 6~7 8~9 Reset state + 01 8~9 4~5 6~7 + 10 6~7 2~3 4~5 + 11 4~5 0~1 2~3 TMNT setting + ---xxx-- affects how RAMs are accessed + -x------ + 0 = replace bits 5:4 of color attribute by bits 1:0 + 1 = do not alter color attribute (gradius3,xmen) 1c80 : row/column scroll control ------xx layer A row scroll 00 = disabled diff --git a/src/mame/konami/rungun.cpp b/src/mame/konami/rungun.cpp index c1166f116b3..79051b42cd9 100644 --- a/src/mame/konami/rungun.cpp +++ b/src/mame/konami/rungun.cpp @@ -246,6 +246,7 @@ void rungun_state::sysregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) bit 7-4: base address for 53936 ROM readback. */ m_k055673->k053246_set_objcha_line(BIT(data, 2) ? ASSERT_LINE : CLEAR_LINE); + machine().sound().system_mute(!BIT(data, 3)); m_roz_rombase = (data & 0xf0) >> 4; break; } diff --git a/src/mame/konami/xmen.cpp b/src/mame/konami/xmen.cpp index f82207fd92d..0a1104a3de8 100644 --- a/src/mame/konami/xmen.cpp +++ b/src/mame/konami/xmen.cpp @@ -49,20 +49,6 @@ Reverse-engineered schematics: https://github.com/jotego/jtbin/blob/master/sch/x #include "layout/generic.h" -// configurable logging -#define LOG_EEPROMW (1U << 1) -#define LOG_SOUNDIRQ (1U << 2) -#define LOG_OKI (1U << 3) - -//#define VERBOSE (LOG_GENERAL | LOG_EEPROMW | LOG_SOUNDIRQ | LOG_OKI) - -#include "logmacro.h" - -#define LOGEEPROMW(...) LOGMASKED(LOG_EEPROMW, __VA_ARGS__) -#define LOGSOUNDIRQ(...) LOGMASKED(LOG_SOUNDIRQ, __VA_ARGS__) -#define LOGOKI(...) LOGMASKED(LOG_OKI, __VA_ARGS__) - - namespace { class xmen_state : public driver_device @@ -94,6 +80,7 @@ protected: int32_t m_layerpri[3]{}; bool m_tilemap_select = false; bool m_irq5_enable = false; + bool m_sound_irq = false; // devices required_device m_maincpu; @@ -103,10 +90,9 @@ protected: required_device m_k053251; required_device m_screen; - void eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void base(machine_config &config); - void sound_hardware(machine_config &config); private: optional_memory_bank m_z80bank; @@ -126,8 +112,6 @@ private: void main_map(address_map &map) ATTR_COLD; void oki_map(address_map &map) ATTR_COLD; void sound_map(address_map &map) ATTR_COLD; - - void bootleg_sound_hardware(machine_config &config); }; class xmen6p_state : public xmen_state @@ -336,21 +320,22 @@ void xmen6p_state::screen_vblank(int state) /*************************************************************************** - EEPROM + Control ***************************************************************************/ -void xmen_state::eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void xmen_state::control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - LOGEEPROMW("%06x: write %04x to 108000\n", m_maincpu->pc(), data); + //logerror("%06x: write %04x mask %04x to 108000\n", m_maincpu->pc(), data, mem_mask); if (ACCESSING_BITS_0_7) { - // bit 0 = coin counter - machine().bookkeeping().coin_counter_w(0, data & 0x01); + // bits 0/1 = coin counters + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(0, BIT(data, 1)); // only for 2p version - // bit 2 is data - // bit 3 is clock (active high) - // bit 4 is cs (active low) + // bit 2 = EEPROM data + // bit 3 = EEPROM clock (active high) + // bit 4 = EEPROM cs (active low) m_eeprom_out->write(data, 0xff); // bit 5 is enabled in IRQ3, disabled in IRQ5 (sprite DMA end) @@ -364,16 +349,18 @@ void xmen_state::eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask) if (ACCESSING_BITS_8_15) { // bit 8 = enable sprite ROM reading - m_k053246->k053246_set_objcha_line((data & 0x0100) ? ASSERT_LINE : CLEAR_LINE); + m_k053246->k053246_set_objcha_line(BIT(data, 8) ? ASSERT_LINE : CLEAR_LINE); + // bit 9 = enable char ROM reading through the video RAM - // bit 10 = sound irq, but with some kind of hold - m_k052109->set_rmrd_line((data & 0x0200) ? ASSERT_LINE : CLEAR_LINE); - if (data & 0x400) - { - LOGSOUNDIRQ("tick!\n"); - if (m_audiocpu) - m_audiocpu->set_input_line(0, HOLD_LINE); - } + m_k052109->set_rmrd_line(BIT(data, 9) ? ASSERT_LINE : CLEAR_LINE); + + // bit 10 = sound irq flip flop (actually through 054321) + if (m_audiocpu && !m_sound_irq && BIT(data, 10)) + m_audiocpu->set_input_line(0, HOLD_LINE); + m_sound_irq = BIT(data, 10); + + // bit 11 = mute + machine().sound().system_mute(!BIT(data, 11)); } } @@ -389,7 +376,7 @@ void xmen_state::base_main_map(address_map &map) map(0x100000, 0x100fff).rw(m_k053246, FUNC(k053247_device::k053247_word_r), FUNC(k053247_device::k053247_word_w)); map(0x101000, 0x101fff).ram(); map(0x104000, 0x104fff).ram().w("palette", FUNC(palette_device::write16)).share("palette"); - map(0x108000, 0x108001).w(FUNC(xmen_state::eeprom_w)); + map(0x108000, 0x108001).w(FUNC(xmen_state::control_w)); map(0x108020, 0x108027).w(m_k053246, FUNC(k053247_device::k053246_w)); map(0x108060, 0x10807f).w(m_k053251, FUNC(k053251_device::write)).umask16(0x00ff); map(0x10a000, 0x10a001).portr("P2_P4").w("watchdog", FUNC(watchdog_timer_device::reset16_w)); @@ -412,7 +399,7 @@ void xmen_state::bootleg_main_map(address_map &map) base_main_map(map); // map(0x103ffe, 0x103fff) // sound related, too? - map(0x10804d, 0x10804d).lw8(NAME([this] (uint8_t data) { m_okibank->set_entry(data & 0x0f); LOGOKI("oki bank :%02x\n", data); })); // TODO: verify once oki ROM 1 is redumped / confirmed + map(0x10804d, 0x10804d).lw8(NAME([this] (uint8_t data) { m_okibank->set_entry((data + 3) & 0x0f); })); map(0x10804f, 0x10804f).rw("oki", FUNC(okim6295_device::read), FUNC(okim6295_device::write)); } @@ -442,7 +429,7 @@ void xmen6p_state::main_map(address_map &map) map(0x102000, 0x102fff).ram().share(m_spriteram[1]); // right screen map(0x103000, 0x103fff).ram(); // 6p - a buffer? map(0x104000, 0x104fff).ram().w("palette", FUNC(palette_device::write16)).share("palette"); - map(0x108000, 0x108001).w(FUNC(xmen6p_state::eeprom_w)); + map(0x108000, 0x108001).w(FUNC(xmen6p_state::control_w)); map(0x108020, 0x108027).w(m_k053246, FUNC(k053247_device::k053246_w)); // sprites map(0x108040, 0x10805f).m("k054321", FUNC(k054321_device::main_map)).umask16(0x00ff); map(0x108060, 0x10807f).w(m_k053251, FUNC(k053251_device::write)).umask16(0x00ff); @@ -600,8 +587,9 @@ void xmen_state::machine_start() save_item(NAME(m_sprite_colorbase)); save_item(NAME(m_layer_colorbase)); save_item(NAME(m_layerpri)); - save_item(NAME(m_irq5_enable)); save_item(NAME(m_tilemap_select)); + save_item(NAME(m_irq5_enable)); + save_item(NAME(m_sound_irq)); } void xmen_state::machine_reset() @@ -628,35 +616,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(xmen_state::scanline) } } -void xmen_state::sound_hardware(machine_config &config) -{ - Z80(config, m_audiocpu, 16_MHz_XTAL / 2); // verified on PCB - m_audiocpu->set_addrmap(AS_PROGRAM, &xmen_state::sound_map); - - // sound hardware - SPEAKER(config, "speaker", 2).front(); - - K054321(config, "k054321", "speaker"); - - ym2151_device &ymsnd(YM2151(config, "ymsnd", 16_MHz_XTAL / 4)); // verified on PCB - ymsnd.add_route(0, "speaker", 0.20, 1); - ymsnd.add_route(1, "speaker", 0.20, 0); - - k054539_device &k054539(K054539(config, "k054539", 18.432_MHz_XTAL)); - k054539.add_route(0, "speaker", 1.00, 1); - k054539.add_route(1, "speaker", 1.00, 0); -} - -void xmen_state::bootleg_sound_hardware(machine_config &config) -{ - // sound hardware - SPEAKER(config, "mono").front_center(); - - okim6295_device &oki(OKIM6295(config, "oki", 1'000'000, okim6295_device::PIN7_HIGH)); // clock and pin7 not verified - oki.set_addrmap(0, &xmen_state::oki_map); - oki.add_route(ALL_OUTPUTS, "mono", 1.0); -} - void xmen_state::base(machine_config &config) { // basic machine hardware @@ -695,7 +654,21 @@ void xmen_state::xmen(machine_config &config) { base(config); - sound_hardware(config); + Z80(config, m_audiocpu, 16_MHz_XTAL / 2); // verified on PCB + m_audiocpu->set_addrmap(AS_PROGRAM, &xmen_state::sound_map); + + // sound hardware + SPEAKER(config, "speaker", 2).front(); + + K054321(config, "k054321", "speaker"); + + ym2151_device &ymsnd(YM2151(config, "ymsnd", 16_MHz_XTAL / 4)); // verified on PCB + ymsnd.add_route(0, "speaker", 0.20, 1); + ymsnd.add_route(1, "speaker", 0.20, 0); + + k054539_device &k054539(K054539(config, "k054539", 18.432_MHz_XTAL)); + k054539.add_route(0, "speaker", 1.00, 1); + k054539.add_route(1, "speaker", 1.00, 0); } void xmen_state::xmenabl(machine_config &config) @@ -704,7 +677,12 @@ void xmen_state::xmenabl(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &xmen_state::bootleg_main_map); - bootleg_sound_hardware(config); + // sound hardware + SPEAKER(config, "mono").front_center(); + + okim6295_device &oki(OKIM6295(config, "oki", 1'000'000, okim6295_device::PIN7_LOW)); // clock and pin7 not verified + oki.set_addrmap(0, &xmen_state::oki_map); + oki.add_route(ALL_OUTPUTS, "mono", 1.0); } void xmen6p_state::xmen6p(machine_config &config) @@ -1241,7 +1219,7 @@ GAME( 1992, xmenj, xmen, xmen, xmen, xmen_state, empty_init, ROT0, "Kon GAME( 1992, xmenja, xmen, xmen, xmen, xmen_state, empty_init, ROT0, "Konami", "X-Men (4 Players ver JEA)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, xmena, xmen, xmen, xmen, xmen_state, empty_init, ROT0, "Konami", "X-Men (4 Players ver AEA)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, xmenaa, xmen, xmen, xmen, xmen_state, empty_init, ROT0, "Konami", "X-Men (4 Players ver ADA)", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, xmenabl, xmen, xmenabl, xmen, xmen_state, empty_init, ROT0, "bootleg", "X-Men (4 Players ver AEA, bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // sprites are wrong, Oki banking not correct (doubtful it can be this bad, even being a bootleg) +GAME( 1992, xmenabl, xmen, xmenabl, xmen, xmen_state, empty_init, ROT0, "bootleg", "X-Men (4 Players ver AEA, bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // sprites are wrong GAME( 1992, xmen2pe, xmen, xmen, xmen2p, xmen_state, empty_init, ROT0, "Konami", "X-Men (2 Players ver EAA)", MACHINE_SUPPORTS_SAVE ) GAME( 1992, xmen2pu, xmen, xmen, xmen2p, xmen_state, empty_init, ROT0, "Konami", "X-Men (2 Players ver UAB)", MACHINE_SUPPORTS_SAVE ) From 61b7b8289c9e8c767611409c69dfd697efc0701e Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 12:57:50 +0100 Subject: [PATCH 287/351] montecar: small correction to car colors --- src/mame/atari/firetrk.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/atari/firetrk.cpp b/src/mame/atari/firetrk.cpp index 8ce349881f8..fac3189e7ef 100644 --- a/src/mame/atari/firetrk.cpp +++ b/src/mame/atari/firetrk.cpp @@ -1385,7 +1385,7 @@ static const gfx_layout montecar_car_layout = 8, // total 2, // planes // plane offsets - { 1, 0 }, + { 0, 1 }, { 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e, From f92794c3171be3cc7351214487371eadb933d3b1 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 14:28:00 +0100 Subject: [PATCH 288/351] rungun,xmen: remove EEPROMOUT port --- src/mame/konami/rungun.cpp | 30 ++++++++++++++---------------- src/mame/konami/xmen.cpp | 34 ++++++++++------------------------ 2 files changed, 24 insertions(+), 40 deletions(-) diff --git a/src/mame/konami/rungun.cpp b/src/mame/konami/rungun.cpp index 79051b42cd9..140376ebdd0 100644 --- a/src/mame/konami/rungun.cpp +++ b/src/mame/konami/rungun.cpp @@ -66,13 +66,13 @@ public: m_palette2(*this, "palette2"), m_screen(*this, "screen"), m_k054321(*this, "k054321"), + m_eeprom(*this, "eeprom"), m_sysreg(*this, "sysreg"), m_bank2(*this, "bank2"), m_spriteram_bank(*this, "spriteram_bank"), m_p_inputs(*this, "P%u", 1U), m_dsw(*this, "DSW"), - m_system(*this, "SYSTEM"), - m_eepromout(*this, "EEPROMOUT") + m_system(*this, "SYSTEM") { } void rng(machine_config &config); @@ -96,6 +96,7 @@ private: optional_device m_palette2; required_device m_screen; required_device m_k054321; + required_device m_eeprom; /* memory pointers */ required_shared_ptr m_sysreg; @@ -106,7 +107,6 @@ private: required_ioport_array<4> m_p_inputs; required_ioport m_dsw; required_ioport m_system; - required_ioport m_eepromout; /* video-related */ tilemap_t *m_ttl_tilemap[2]{}; @@ -219,12 +219,15 @@ void rungun_state::sysregs_w(offs_t offset, uint16_t data, uint16_t mem_mask) */ if (ACCESSING_BITS_0_7) { - m_spriteram_bank->set_entry(BIT(data, 7)); - m_video_mux_bank = BIT(data, 7) ^ 1; - m_eepromout->write(data, 0xff); + m_eeprom->di_write(BIT(data, 0)); + m_eeprom->cs_write(BIT(data, 1)); + m_eeprom->clk_write(BIT(data, 2)); machine().bookkeeping().coin_counter_w(0, BIT(data, 3)); machine().bookkeeping().coin_counter_w(1, BIT(data, 4)); + + m_spriteram_bank->set_entry(BIT(data, 7)); + m_video_mux_bank = BIT(data, 7) ^ 1; } if (ACCESSING_BITS_8_15) { @@ -410,7 +413,6 @@ void rungun_state::video_start() m_936_tilemap[screen_num] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(rungun_state::get_936_tile_info)), TILEMAP_SCAN_ROWS, 16, 16, 128, 128); m_936_tilemap[screen_num]->set_user_data((void *)(uintptr_t)(screen_num * 0x80000)); m_936_tilemap[screen_num]->set_transparent_pen(0); - } m_sprite_colorbase = 0x20; @@ -566,11 +568,6 @@ static INPUT_PORTS_START( rng ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START( "EEPROMOUT" ) - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::di_write)) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::cs_write)) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::clk_write)) - PORT_START("P1") KONAMI8_B123_START(1) @@ -637,9 +634,10 @@ void rungun_state::machine_start() void rungun_state::machine_reset() { - memset(m_sysreg, 0, 0x20); - m_sound_ctrl = 0; - m_irq5_enable = false; + for (int i = 0; i < 0x10; i++) + sysregs_w(0, 0); + + sound_ctrl_w(0); } void rungun_state::rng(machine_config &config) @@ -656,7 +654,7 @@ void rungun_state::rng(machine_config &config) GFXDECODE(config, m_gfxdecode, m_palette, gfx_rungun); - EEPROM_ER5911_8BIT(config, "eeprom"); + EEPROM_ER5911_8BIT(config, m_eeprom); /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); diff --git a/src/mame/konami/xmen.cpp b/src/mame/konami/xmen.cpp index 0a1104a3de8..d56aa88201b 100644 --- a/src/mame/konami/xmen.cpp +++ b/src/mame/konami/xmen.cpp @@ -62,9 +62,9 @@ public: m_k053246(*this, "k053246"), m_k053251(*this, "k053251"), m_screen(*this, "screen"), + m_eeprom(*this, "eeprom"), m_z80bank(*this, "z80bank"), - m_okibank(*this, "okibank"), - m_eeprom_out(*this, "EEPROMOUT") + m_okibank(*this, "okibank") { } void xmen(machine_config &config); @@ -89,6 +89,7 @@ protected: required_device m_k053246; required_device m_k053251; required_device m_screen; + required_device m_eeprom; void control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); @@ -98,8 +99,6 @@ private: optional_memory_bank m_z80bank; optional_memory_bank m_okibank; - required_ioport m_eeprom_out; - void sound_bankswitch_w(uint8_t data); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -336,7 +335,9 @@ void xmen_state::control_w(offs_t offset, uint16_t data, uint16_t mem_mask) // bit 2 = EEPROM data // bit 3 = EEPROM clock (active high) // bit 4 = EEPROM cs (active low) - m_eeprom_out->write(data, 0xff); + m_eeprom->di_write(BIT(data, 2)); + m_eeprom->cs_write(BIT(data, 4)); + m_eeprom->clk_write(BIT(data, 3)); // bit 5 is enabled in IRQ3, disabled in IRQ5 (sprite DMA end) m_irq5_enable = bool(BIT(data, 5)); @@ -416,7 +417,7 @@ void xmen_state::sound_map(address_map &map) void xmen_state::oki_map(address_map &map) { - map(0x00000, 0x2ffff).rom(); + map(0x00000, 0x2ffff).rom().region("oki", 0); map(0x30000, 0x3ffff).bankr(m_okibank); } @@ -501,11 +502,6 @@ static INPUT_PORTS_START( xmen ) PORT_BIT( 0x3000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused? PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW ) PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused? - - PORT_START( "EEPROMOUT" ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::di_write)) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::clk_write)) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::cs_write)) INPUT_PORTS_END static INPUT_PORTS_START( xmen2p ) @@ -530,11 +526,6 @@ static INPUT_PORTS_START( xmen2p ) PORT_BIT( 0x3000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused? PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW ) PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused? - - PORT_START( "EEPROMOUT" ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::di_write)) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::clk_write)) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::cs_write)) INPUT_PORTS_END static INPUT_PORTS_START( xmen6p ) @@ -562,11 +553,6 @@ static INPUT_PORTS_START( xmen6p ) PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_START6 ) // not verified PORT_SERVICE_NO_TOGGLE( 0x4000, IP_ACTIVE_LOW ) PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(FUNC(xmen6p_state::field_r)) // screen indicator? - - PORT_START( "EEPROMOUT" ) - PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::di_write)) - PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::clk_write)) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", FUNC(eeprom_serial_er5911_device::cs_write)) INPUT_PORTS_END @@ -581,7 +567,7 @@ void xmen_state::machine_start() if (m_okibank) { m_okibank->configure_entries(0, 16, memregion("oki")->base(), 0x10000); - m_okibank->set_entry(0); + m_okibank->set_entry(3); } save_item(NAME(m_sprite_colorbase)); @@ -601,7 +587,7 @@ void xmen_state::machine_reset() } m_sprite_colorbase = 0; - m_irq5_enable = false; + control_w(0, 0); } TIMER_DEVICE_CALLBACK_MEMBER(xmen_state::scanline) @@ -624,7 +610,7 @@ void xmen_state::base(machine_config &config) TIMER(config, "scantimer").configure_scanline(FUNC(xmen_state::scanline), "screen", 0, 1); - EEPROM_ER5911_8BIT(config, "eeprom"); + EEPROM_ER5911_8BIT(config, m_eeprom); WATCHDOG_TIMER(config, "watchdog"); From 9b5f31353c2191a493b4d0fd90fbc3f0fabe84ef Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 14:28:33 +0100 Subject: [PATCH 289/351] swa: pilot stick y was wrong way around --- src/mame/sega/model1.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/sega/model1.cpp b/src/mame/sega/model1.cpp index d8bd4b5646f..85dce9c098e 100644 --- a/src/mame/sega/model1.cpp +++ b/src/mame/sega/model1.cpp @@ -1077,7 +1077,7 @@ static INPUT_PORTS_START( swa ) PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(27,227) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE PORT_START("STICK1Y") - PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(27,227) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_REVERSE + PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(27,227) PORT_SENSITIVITY(100) PORT_KEYDELTA(4) PORT_START("THROTTLE") PORT_BIT( 0xff, 0x7f, IPT_PEDAL ) PORT_MINMAX(28,200) PORT_SENSITIVITY(100) PORT_KEYDELTA(16) PORT_REVERSE From 52bc3d4f39b478d91e967f18092fe320dfb45537 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 14:52:57 +0100 Subject: [PATCH 290/351] rungun: correct sysreg reset after prev commit --- src/mame/konami/rungun.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mame/konami/rungun.cpp b/src/mame/konami/rungun.cpp index 140376ebdd0..4962233c45f 100644 --- a/src/mame/konami/rungun.cpp +++ b/src/mame/konami/rungun.cpp @@ -635,7 +635,7 @@ void rungun_state::machine_start() void rungun_state::machine_reset() { for (int i = 0; i < 0x10; i++) - sysregs_w(0, 0); + sysregs_w(i, 0); sound_ctrl_w(0); } From bb83f35d7406a4496c38024f6c1a266b55750c2e Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Mon, 16 Mar 2026 18:18:47 +0100 Subject: [PATCH 291/351] New systems marked not working ------------------------------ Xingyun Caishen [little0] - midway/midxunit.cpp: added DIP locations [Guru] --- src/mame/huangyeh/hy-268a.cpp | 173 ++++++++++++++++++ .../hy-9802.cpp} | 61 ++++-- src/mame/mame.lst | 11 +- src/mame/midway/midxunit.cpp | 61 +++--- src/mame/skeleton/lgtz80.cpp | 2 +- 5 files changed, 256 insertions(+), 52 deletions(-) create mode 100644 src/mame/huangyeh/hy-268a.cpp rename src/mame/{skeleton/huangyeh_m68k.cpp => huangyeh/hy-9802.cpp} (81%) diff --git a/src/mame/huangyeh/hy-268a.cpp b/src/mame/huangyeh/hy-268a.cpp new file mode 100644 index 00000000000..28dd8574feb --- /dev/null +++ b/src/mame/huangyeh/hy-268a.cpp @@ -0,0 +1,173 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +Huang Yeh HY-268A PCB + +seems a more compact / cost reduced version of the HY-9802 PCB in huangyeh/hy-9802.cpp + +Main components are: +JX-1689HP CPU (M68000 clone) +HD63484P8 ACRTC +22.000 MHx XTAL +4x M5M482128AJ SDRAM +2x GM76C88ALK-15 SRAM +HM86171-80 RAMDAC +HUANG YEH HY9826 160-pin custom (GFX related?) +2x Altera EPM70325LC44-10 FPGA +U6295 ADPCM (Oki M6295 clone) +UM3567 OPL (YM2413 clone) +ATMEL 93C45 EEPROM + + +TODO: +- crashes strong with ACRTC, plenty of unsupported features (starting with COMMAND_DWT); +- EEPROM; +- sound; +- I/Os; +*/ + + +#include "emu.h" + +#include "cpu/m68000/m68000.h" +#include "machine/eepromser.h" +#include "sound/okim6295.h" +#include "sound/ymopl.h" +#include "video/hd63484.h" +#include "video/ramdac.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" +#include "tilemap.h" + + +namespace { + +class hy268a_state : public driver_device +{ +public: + hy268a_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") + { } + + void xycs(machine_config &config) ATTR_COLD; + +private: + required_device m_maincpu; + + void program_map(address_map &map) ATTR_COLD; + void ramdac_map(address_map &map) ATTR_COLD; + void hd63484_map(address_map &map) ATTR_COLD; +}; + + +void hy268a_state::program_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x000000, 0x07ffff).rom(); + map(0x110020, 0x110021).portr("IN0"); + map(0x170000, 0x170003).rw("acrtc", FUNC(hd63484_device::read16), FUNC(hd63484_device::write16)); + map(0x170009, 0x170009).w("ramdac", FUNC(ramdac_device::index_w)); + map(0x17000b, 0x17000b).w("ramdac", FUNC(ramdac_device::pal_w)); + map(0x17000d, 0x17000d).w("ramdac", FUNC(ramdac_device::mask_w)); + map(0x1f0000, 0x1f7fff).ram(); +} + +void hy268a_state::ramdac_map(address_map &map) +{ + map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); +} + +void hy268a_state::hd63484_map(address_map &map) +{ + // TODO: likely banked, also writes + map(0x00000, 0xfffff).rom().region("tiles", 0); +} + + +static INPUT_PORTS_START( xycs ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + // PCB has no DIP switches +INPUT_PORTS_END + + +// TODO +static GFXDECODE_START( gfx ) +GFXDECODE_END + + +void hy268a_state::xycs(machine_config &config) +{ + // basic machine hardware + M68000(config, m_maincpu, 22_MHz_XTAL / 2); // divider not verified + m_maincpu->set_addrmap(AS_PROGRAM, &hy268a_state::program_map); + m_maincpu->set_vblank_int("screen", FUNC(hy268a_state::irq3_line_hold)); + + EEPROM_93C46_16BIT(config, "eeprom"); // 93C45 + + // video hardware + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO: verify everything once emulation works + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); + screen.set_size(64*8, 32*8); + screen.set_visarea(0*8, 64*8-1, 2*8, 30*8-1); + screen.set_screen_update("acrtc", FUNC(hd63484_device::update_screen)); + screen.set_palette("palette"); + + GFXDECODE(config, "gfxdecode", "palette", gfx); + + PALETTE(config, "palette").set_entries(0x100); // TODO + + RAMDAC(config, "ramdac", 0, "palette").set_addrmap(0, &hy268a_state::ramdac_map); + + HD63484(config, "acrtc", 22_MHz_XTAL / 4).set_addrmap(0, &hy268a_state::hd63484_map); // divider not verified + + // sound hardware + SPEAKER(config, "mono").front_center(); + + YM2413(config, "ymsnd", 22_MHz_XTAL / 8).add_route(ALL_OUTPUTS, "mono", 1.00); // divider not verified + + OKIM6295(config, "oki", 22_MHz_XTAL / 22, okim6295_device::PIN7_LOW).add_route(ALL_OUTPUTS, "mono", 1.0); // divider and pin 7 not verified +} + + +// 幸运财神 (Xìngyùn Cáishén) +ROM_START( xycs ) + ROM_REGION( 0x80000, "maincpu", 0 ) + ROM_LOAD16_WORD_SWAP( "hy_566.u1", 0x00000, 0x80000, CRC(22a3b218) SHA1(fc0e4e41b77c53ad95b6344f24da767f03bc6ed3) ) + + ROM_REGION16_BE( 0x400000, "tiles", 0 ) + ROM_LOAD16_WORD_SWAP( "p_2a.u26", 0x000000, 0x200000, CRC(d6bdc1b6) SHA1(abca4ecaa8abe2d632df901822abdfb5c24e79f3) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF + ROM_LOAD16_WORD_SWAP( "p_3b.u27", 0x200000, 0x200000, CRC(ea1259a8) SHA1(e258258b0a40f8dc399ac6c8cfa78ca150d59b23) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "p_4.u35", 0x00000, 0x80000, CRC(86ee70de) SHA1(29fb637a88a22542d453890bad675b5e8bfef623) ) +ROM_END + +} // anonymous namespace + + +GAME( 2001, xycs, 0, xycs, xycs, hy268a_state, empty_init, ROT0, "Huang Yeh", "Xingyun Caishen", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/skeleton/huangyeh_m68k.cpp b/src/mame/huangyeh/hy-9802.cpp similarity index 81% rename from src/mame/skeleton/huangyeh_m68k.cpp rename to src/mame/huangyeh/hy-9802.cpp index 3e59b9e9d62..9b77e778447 100644 --- a/src/mame/skeleton/huangyeh_m68k.cpp +++ b/src/mame/huangyeh/hy-9802.cpp @@ -3,7 +3,8 @@ /************************************************************************************************** TODO: -- Crashes strong with ACRTC, plenty of unsupported features (starting with COMMAND_DWT); +- wlzb crashes strong with ACRTC, plenty of unsupported features (starting with COMMAND_DWT); +- wlfx hangs strong with ACRTC, plenty of unsupported features (starting with area detection); - OKI bank (standard 0/0x40000 layout); - I/Os; @@ -86,10 +87,10 @@ Notes: namespace { -class huangyeh_m68k_state : public driver_device +class hy9802_state : public driver_device { public: - huangyeh_m68k_state(const machine_config &mconfig, device_type type, const char *tag) + hy9802_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_acrtc(*this, "acrtc") @@ -97,6 +98,7 @@ public: { } void wlzb(machine_config &config) ATTR_COLD; + void wlfx(machine_config &config) ATTR_COLD; private: @@ -104,14 +106,15 @@ private: required_device m_acrtc; required_device m_soundlatch; - void main_program_map(address_map &map) ATTR_COLD; + void wlzb_main_program_map(address_map &map) ATTR_COLD; + void wlfx_main_program_map(address_map &map) ATTR_COLD; void audio_program_map(address_map &map) ATTR_COLD; void ramdac_map(address_map &map) ATTR_COLD; void hd63484_map(address_map &map) ATTR_COLD; }; -void huangyeh_m68k_state::main_program_map(address_map &map) +void hy9802_state::wlzb_main_program_map(address_map &map) { map.unmap_value_high(); map(0x000000, 0x0fffff).rom(); @@ -127,7 +130,23 @@ void huangyeh_m68k_state::main_program_map(address_map &map) map(0x1f0000, 0x1f3fff).ram(); } -void huangyeh_m68k_state::audio_program_map(address_map &map) +void hy9802_state::wlfx_main_program_map(address_map &map) +{ + map.unmap_value_high(); + map(0x000000, 0x03ffff).rom(); + map(0x120000, 0x120001).portr("DSW1"); + map(0x120020, 0x120021).portr("IN0"); + map(0x120051, 0x120051).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0x120060, 0x120061).nopw(); // key matrix at $100061 + map(0x130000, 0x130001).portr("DSW2"); + map(0x1a0000, 0x1a0003).rw("acrtc", FUNC(hd63484_device::read16), FUNC(hd63484_device::write16)); + map(0x1a0009, 0x1a0009).w("ramdac", FUNC(ramdac_device::index_w)); + map(0x1a000b, 0x1a000b).w("ramdac", FUNC(ramdac_device::pal_w)); + map(0x1a000d, 0x1a000d).w("ramdac", FUNC(ramdac_device::mask_w)); + map(0x1f0000, 0x1f3fff).ram(); +} + +void hy9802_state::audio_program_map(address_map &map) { map(0x0000, 0x7fff).rom(); map(0xf000, 0xf7ff).ram(); @@ -138,15 +157,16 @@ void huangyeh_m68k_state::audio_program_map(address_map &map) map(0xf8e0, 0xf8e0).lw8(NAME([this] (offs_t offset, u8 data) { m_soundlatch->acknowledge_w(); })); } -void huangyeh_m68k_state::ramdac_map(address_map &map) +void hy9802_state::ramdac_map(address_map &map) { map(0x000, 0x3ff).rw("ramdac", FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); } -void huangyeh_m68k_state::hd63484_map(address_map &map) +void hy9802_state::hd63484_map(address_map &map) { // TODO: likely banked, also writes map(0x00000, 0xfffff).rom().region("tiles", 0); + map(0x00000, 0xfffff).ram().writeonly(); // TODO: just here to avoid spamming the log } @@ -198,16 +218,16 @@ static GFXDECODE_START( gfx ) GFXDECODE_END -void huangyeh_m68k_state::wlzb(machine_config &config) +void hy9802_state::wlzb(machine_config &config) { // basic machine hardware M68000(config, m_maincpu, 8.448_MHz_XTAL); - m_maincpu->set_addrmap(AS_PROGRAM, &huangyeh_m68k_state::main_program_map); + m_maincpu->set_addrmap(AS_PROGRAM, &hy9802_state::wlzb_main_program_map); // delay loops at $1f1712 - m_maincpu->set_vblank_int("screen", FUNC(huangyeh_m68k_state::irq3_line_hold)); + m_maincpu->set_vblank_int("screen", FUNC(hy9802_state::irq3_line_hold)); z80_device &audiocpu(Z80(config, "audiocpu", 8.448_MHz_XTAL / 2)); - audiocpu.set_addrmap(AS_PROGRAM, &huangyeh_m68k_state::audio_program_map); + audiocpu.set_addrmap(AS_PROGRAM, &hy9802_state::audio_program_map); // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO: verify everything once emulation works @@ -222,9 +242,9 @@ void huangyeh_m68k_state::wlzb(machine_config &config) PALETTE(config, "palette").set_entries(0x100); // TODO - RAMDAC(config, "ramdac", 0, "palette").set_addrmap(0, &huangyeh_m68k_state::ramdac_map); + RAMDAC(config, "ramdac", 0, "palette").set_addrmap(0, &hy9802_state::ramdac_map); - HD63484(config, m_acrtc, 22_MHz_XTAL / 4).set_addrmap(0, &huangyeh_m68k_state::hd63484_map); + HD63484(config, m_acrtc, 22_MHz_XTAL / 4).set_addrmap(0, &hy9802_state::hd63484_map); GENERIC_LATCH_8(config, m_soundlatch); m_soundlatch->data_pending_callback().set_inputline("audiocpu", INPUT_LINE_NMI); @@ -239,6 +259,13 @@ void huangyeh_m68k_state::wlzb(machine_config &config) OKIM6295(config, "oki", 8.448_MHz_XTAL / 4, okim6295_device::PIN7_LOW).add_route(ALL_OUTPUTS, "mono", 1.0); } +void hy9802_state::wlfx(machine_config &config) +{ + wlzb(config); + + m_maincpu->set_addrmap(AS_PROGRAM, &hy9802_state::wlfx_main_program_map); +} + ROM_START( wlzb ) ROM_REGION( 0x100000, "maincpu", 0 ) @@ -260,7 +287,7 @@ ROM_END // 五路福星 (Wǔ Lù Fúxīng) ROM_START( wlfx ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASE00 ) + ROM_REGION( 0x40000, "maincpu", 0 ) ROM_LOAD16_BYTE( "51.u9", 0x00000, 0x20000, CRC(e73e63d5) SHA1(b6028d1c5fce074969973a70f9004c0c095fadd2) ) // 1xxxxxxxxxxxxxxxx = 0xFF ROM_LOAD16_BYTE( "52.u8", 0x00001, 0x20000, CRC(09821949) SHA1(45dbe3bab15ca70f7fabd05929dd42700c92786d) ) // 1xxxxxxxxxxxxxxxx = 0xFF @@ -280,5 +307,5 @@ ROM_END } // anonymous namespace -GAME( 1999, wlzb, 0, wlzb, wlzb, huangyeh_m68k_state, empty_init, ROT0, "Huang Yeh", "Wu Lin Zhengba", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 199?, wlfx, 0, wlzb, wlzb, huangyeh_m68k_state, empty_init, ROT0, "Huang Yeh", "Wu Lu Fuxing", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 1999, wlzb, 0, wlzb, wlzb, hy9802_state, empty_init, ROT0, "Huang Yeh", "Wu Lin Zhengba", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 1998, wlfx, 0, wlfx, wlzb, hy9802_state, empty_init, ROT0, "Huang Yeh", "Wu Lu Fuxing", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 0606c6e1980..c35d1aba9b7 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -20565,6 +20565,13 @@ hpz80unk @source:hp/jornada.cpp jorn720 +@source:huangyeh/hy-268a.cpp +xycs + +@source:huangyeh/hy-9802.cpp +wlfx +wlzb + @source:husky/hawk.cpp hawk @@ -44099,10 +44106,6 @@ hprotr8a @source:skeleton/ht68k.cpp ht68k -@source:skeleton/huangyeh_m68k.cpp -wlfx -wlzb - @source:skeleton/hudson_poems.cpp ewalk2tv marimba diff --git a/src/mame/midway/midxunit.cpp b/src/mame/midway/midxunit.cpp index f46129e7ad1..be539b94ab3 100644 --- a/src/mame/midway/midxunit.cpp +++ b/src/mame/midway/midxunit.cpp @@ -574,47 +574,48 @@ static INPUT_PORTS_START( revx ) PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_BILL1 ) // bill validator PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_START("DSW") - PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Flip_Screen )) - PORT_DIPSETTING( 0x0000, DEF_STR( Off )) - PORT_DIPSETTING( 0x0001, DEF_STR( On )) - PORT_DIPNAME( 0x0002, 0x0000, "Dipswitch Coinage" ) - PORT_DIPSETTING( 0x0000, DEF_STR( Off )) - PORT_DIPSETTING( 0x0002, DEF_STR( On )) - PORT_DIPNAME( 0x001c, 0x001c, DEF_STR( Coinage )) - PORT_DIPSETTING( 0x001c, "1" ) - PORT_DIPSETTING( 0x0018, "2" ) - PORT_DIPSETTING( 0x0014, "3" ) - PORT_DIPSETTING( 0x000c, "ECA" ) + PORT_START("DSW") // Two DIP switches at U105 and U108 + PORT_DIPNAME( 0x0001, 0x0000, "Display" ) PORT_DIPLOCATION("SW1@U105:1") + PORT_DIPSETTING( 0x0000, "Normal" ) + PORT_DIPSETTING( 0x0001, "Mirror" ) + PORT_DIPNAME( 0x0002, 0x0002, "Set Coinage With" ) PORT_DIPLOCATION("SW1@U105:2") + PORT_DIPSETTING( 0x0002, "DIP Switch" ) + PORT_DIPSETTING( 0x0000, "CMOS" ) + PORT_DIPNAME( 0x001c, 0x001c, DEF_STR( Coinage )) PORT_DIPLOCATION("SW1@U105:3,4,5") + PORT_DIPSETTING( 0x001c, "USA1/GER1/FR1" ) + PORT_DIPSETTING( 0x0018, "USA2/GER2/FR2" ) + PORT_DIPSETTING( 0x0014, "USA3/GER3/FR3" ) + PORT_DIPSETTING( 0x0012, "USA4/GER4/FR4" ) + PORT_DIPSETTING( 0x000c, "USAECA/GERECA/FRECA" ) PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play )) - PORT_DIPNAME( 0x00e0, 0x0060, "Credits" ) - PORT_DIPSETTING( 0x0020, "3 Start/1 Continue" ) + PORT_DIPNAME( 0x00e0, 0x00a0, "Credits" ) PORT_DIPLOCATION("SW1@U105:6,7,8") + PORT_DIPSETTING( 0x0020, "4 Start/2 Continue" ) PORT_DIPSETTING( 0x00e0, "2 Start/2 Continue" ) - PORT_DIPSETTING( 0x00a0, "2 Start/1 Continue" ) - PORT_DIPSETTING( 0x0000, "1 Start/4 Continue" ) - PORT_DIPSETTING( 0x0040, "1 Start/3 Continue" ) - PORT_DIPSETTING( 0x0060, "1 Start/1 Continue" ) - PORT_DIPNAME( 0x0300, 0x0300, "Country" ) + PORT_DIPSETTING( 0x00a0, "1 Start/1 Continue" ) + PORT_DIPSETTING( 0x0000, "3 Start/3 Continue" ) + PORT_DIPSETTING( 0x0040, "3 Start/2 Continue" ) + PORT_DIPSETTING( 0x0060, "4 Start/1 Continue" ) + PORT_DIPNAME( 0x0300, 0x0300, "Country" ) PORT_DIPLOCATION("SW2@U108:1,2") PORT_DIPSETTING( 0x0300, DEF_STR( USA ) ) PORT_DIPSETTING( 0x0100, DEF_STR( French ) ) PORT_DIPSETTING( 0x0200, DEF_STR( German ) ) PORT_DIPSETTING( 0x0000, DEF_STR( Unused )) - PORT_DIPNAME( 0x0400, 0x0400, "Bill Validator" ) - PORT_DIPSETTING( 0x0400, DEF_STR( Off )) - PORT_DIPSETTING( 0x0000, DEF_STR( On )) - PORT_DIPNAME( 0x0800, 0x0000, "Two Counters" ) - PORT_DIPSETTING( 0x0800, DEF_STR( Off )) - PORT_DIPSETTING( 0x0000, DEF_STR( On )) - PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Players ) ) + PORT_DIPNAME( 0x0400, 0x0400, "Bill Validator" ) PORT_DIPLOCATION("SW2@U108:3") + PORT_DIPSETTING( 0x0400, "Not Used") + PORT_DIPSETTING( 0x0000, "Used") + PORT_DIPNAME( 0x0800, 0x0000, "Counters" ) PORT_DIPLOCATION("SW2@U108:4") + PORT_DIPSETTING( 0x0800, "1" ) + PORT_DIPSETTING( 0x0000, "2" ) + PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Players ) ) PORT_DIPLOCATION("SW2@U108:5") PORT_DIPSETTING( 0x1000, "3 Players" ) PORT_DIPSETTING( 0x0000, "2 Players" ) - PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Cabinet )) + PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Cabinet )) PORT_DIPLOCATION("SW2@U108:6") PORT_DIPSETTING( 0x2000, "Rev X" ) - PORT_DIPSETTING( 0x0000, "Terminator 2" ) - PORT_DIPNAME( 0x4000, 0x4000, "Video Freeze" ) + PORT_DIPSETTING( 0x0000, "T2 Retrofit" ) + PORT_DIPNAME( 0x4000, 0x4000, "Video Freeze" ) PORT_DIPLOCATION("SW2@U108:7") PORT_DIPSETTING( 0x4000, DEF_STR( Off )) PORT_DIPSETTING( 0x0000, DEF_STR( On )) - PORT_DIPNAME( 0x8000, 0x8000, "Test Switch" ) + PORT_DIPNAME( 0x8000, 0x8000, "Test Switch" ) PORT_DIPLOCATION("SW2@U108:8") PORT_DIPSETTING( 0x8000, DEF_STR( Off )) PORT_DIPSETTING( 0x0000, DEF_STR( On )) PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNUSED ) diff --git a/src/mame/skeleton/lgtz80.cpp b/src/mame/skeleton/lgtz80.cpp index 5766c230175..0345586272d 100644 --- a/src/mame/skeleton/lgtz80.cpp +++ b/src/mame/skeleton/lgtz80.cpp @@ -53,7 +53,7 @@ TODO: - doesn't agree at all with the current reel implementation - locks when soft-reset - inputs, outputs -- circus2 has the same problems as pharmyst, bat the stopping at system RAM check +- circus2 has the same problems as pharmyst, bar the stopping at system RAM check */ From 7f9ebd2ee59bf03ff1b7c2281931cd0017aa46df Mon Sep 17 00:00:00 2001 From: Mats Engstrom Date: Mon, 16 Mar 2026 21:01:30 +0100 Subject: [PATCH 292/351] build: autodetect Homebrew SDL3 on macOS (#15108) --- scripts/src/osd/sdl3.lua | 32 ++++++++++++++++++++++++++++++-- 1 file changed, 30 insertions(+), 2 deletions(-) diff --git a/scripts/src/osd/sdl3.lua b/scripts/src/osd/sdl3.lua index f6ce6db8221..b68ee0c2771 100644 --- a/scripts/src/osd/sdl3.lua +++ b/scripts/src/osd/sdl3.lua @@ -114,6 +114,24 @@ function sdlconfigcmd() end end +local function sdlpkgconfigcmd() + if _OPTIONS["SDL_PKGCONFIG_PATH"] then + return path.join(_OPTIONS["SDL_PKGCONFIG_PATH"],"pkg-config") + else + return pkgconfigcmd() + end +end + +local function macosx_uses_libsdl_by_default() + if _OPTIONS["targetos"]~="macosx" then + return false + elseif _OPTIONS["SDL_INSTALL_ROOT"] then + return true + else + return os.execute(sdlpkgconfigcmd() .. " --exists sdl3") + end +end + newoption { trigger = "MESA_INSTALL_ROOT", @@ -179,7 +197,7 @@ newoption { newoption { trigger = "SDL_PKGCONFIG_PATH", - description = "Location of pkg-config command that knows about SDL. Useful for non-root Homebrew installs on Linux.", + description = "Location of pkg-config command that knows about SDL. Useful for non-default Homebrew installs.", } newoption { @@ -187,6 +205,8 @@ newoption { description = "Location of SDL framework for custom OS X installations", } +local framework_path_default = (_OPTIONS["SDL_FRAMEWORK_PATH"] == nil) + -- SDL 3's framework now contains all Apple platforms in a single framework, so we need to -- specifically ask for the macOS version. if not _OPTIONS["SDL_FRAMEWORK_PATH"] then @@ -202,10 +222,18 @@ newoption { }, } +local use_libsdl_default = (_OPTIONS["USE_LIBSDL"] == nil) + if not _OPTIONS["USE_LIBSDL"] then _OPTIONS["USE_LIBSDL"] = "0" end +-- Prefer pkg-config/library installs on macOS when available, as that is the +-- common Homebrew layout. Preserve explicit framework and USE_LIBSDL choices. +if use_libsdl_default and framework_path_default and macosx_uses_libsdl_by_default() then + _OPTIONS["USE_LIBSDL"] = "1" +end + BASE_TARGETOS = "unix" SDLOS_TARGETOS = "unix" @@ -227,7 +255,6 @@ if BASE_TARGETOS=="unix" then "-framework QuartzCore", "-framework OpenGL", "-framework IOKit", - "-rpath " .. _OPTIONS["SDL_FRAMEWORK_PATH"], } @@ -238,6 +265,7 @@ if BASE_TARGETOS=="unix" then end if _OPTIONS["USE_LIBSDL"]~="1" then linkoptions { + "-rpath " .. _OPTIONS["SDL_FRAMEWORK_PATH"], "-F" .. _OPTIONS["SDL_FRAMEWORK_PATH"], } links { From 3056647e01ecc10b5ec1c432fc54d01a7f58c272 Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 22:37:34 +0100 Subject: [PATCH 293/351] misc: normalize blue palette --- src/emu/save.cpp | 2 +- src/emu/sound.cpp | 8 ++++---- src/mame/cinematronics/jack.cpp | 22 ++++++++++++---------- src/mame/dataeast/btime.cpp | 19 +++++++------------ src/mame/dataeast/liberate_v.cpp | 7 +++---- src/mame/dataeast/shootout.cpp | 17 ++++++++++------- src/mame/konami/gberet.cpp | 7 +++---- src/mame/konami/yiear.cpp | 10 ++++------ src/mame/sanritsu/appoooh.cpp | 14 ++++++-------- src/mame/sanritsu/bankp.cpp | 12 ++++++++---- src/mame/sanritsu/drmicro.cpp | 7 +++---- src/mame/sanritsu/mrjong.cpp | 7 +++---- src/mame/sanritsu/sprcros2.cpp | 2 +- src/mame/snk/snk6502_v.cpp | 20 ++++++-------------- src/mame/taito/chaknpop.cpp | 7 +++---- src/mame/tecfri/ambush.cpp | 14 ++++++-------- 16 files changed, 80 insertions(+), 95 deletions(-) diff --git a/src/emu/save.cpp b/src/emu/save.cpp index e07dd930e44..08a1cfc50b4 100644 --- a/src/emu/save.cpp +++ b/src/emu/save.cpp @@ -471,7 +471,7 @@ inline save_error save_manager::do_read(T check_length, U read_block, V start_he // verify the header and report an error if it doesn't match u32 sig = signature(); - if (validate_header(header, machine().system().name, sig, nullptr, "Error: ") != STATERR_NONE) + if (validate_header(header, machine().system().name, sig, nullptr, "Error: ") != STATERR_NONE) return STATERR_INVALID_HEADER; // determine whether or not to flip the data when done diff --git a/src/emu/sound.cpp b/src/emu/sound.cpp index 24e0434f14c..8f3130b0279 100644 --- a/src/emu/sound.cpp +++ b/src/emu/sound.cpp @@ -135,7 +135,7 @@ template void emu::detail::output_buffer_flat::register_save_stat { auto &save = device.machine().save(); - for(unsigned int i=0; i != m_buffer.size(); i++) + for(unsigned int i = 0; i != m_buffer.size(); i++) save.save_item(&device, id1, id2, i, NAME(m_buffer[i])); save.save_item(&device, id1, id2, 0, NAME(m_sync_sample)); @@ -403,7 +403,7 @@ void sound_stream::register_state() m_output_buffer.register_save_state(m_device, "stream.sound_stream.output_buffer", m_state_tag.c_str()); - for(unsigned int i=0; i != m_bw_routes.size(); i++) + for(unsigned int i = 0; i != m_bw_routes.size(); i++) save.save_item(&m_device, "stream.sound_stream", m_state_tag.c_str(), i, m_bw_routes[i].m_gain, "route_gain"); } @@ -1086,7 +1086,7 @@ void sound_manager::run_effects() // Apply the effects for(auto &si : m_speakers) - for(u32 i=0; i != si.m_effects.size(); i++) { + for(u32 i = 0; i != si.m_effects.size(); i++) { auto &source = i ? si.m_effects[i-1].m_buffer : si.m_effects_buffer; si.m_effects[i].m_effect->apply(source, si.m_effects[i].m_buffer); source.sync(); @@ -1261,7 +1261,7 @@ sound_manager::speaker_info::speaker_info(speaker_device &dev, u32 rate, u32 fir { m_channels = dev.inputs(); m_stream = dev.stream(); - for(u32 i=0; i != audio_effect::COUNT; i++) + for(u32 i = 0; i != audio_effect::COUNT; i++) m_effects.emplace_back(rate, dev.inputs()); } diff --git a/src/mame/cinematronics/jack.cpp b/src/mame/cinematronics/jack.cpp index 47ec18ac935..88c72142296 100644 --- a/src/mame/cinematronics/jack.cpp +++ b/src/mame/cinematronics/jack.cpp @@ -355,18 +355,20 @@ void joinem_state::palette_init(palette_device &palette) const for (int i = 0; i < palette.entries(); i++) { int bit0, bit1, bit2; - bit0 = (color_prom[i] >> 0) & 0x01; - bit1 = (color_prom[i] >> 1) & 0x01; - bit2 = (color_prom[i] >> 2) & 0x01; + + bit0 = BIT(color_prom[i], 0); + bit1 = BIT(color_prom[i], 1); + bit2 = BIT(color_prom[i], 2); int const r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; - bit0 = (color_prom[i] >> 3) & 0x01; - bit1 = (color_prom[i] >> 4) & 0x01; - bit2 = (color_prom[i] >> 5) & 0x01; + + bit0 = BIT(color_prom[i], 3); + bit1 = BIT(color_prom[i], 4); + bit2 = BIT(color_prom[i], 5); int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; - bit0 = 0; - bit1 = (color_prom[i] >> 6) & 0x01; - bit2 = (color_prom[i] >> 7) & 0x01; - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/dataeast/btime.cpp b/src/mame/dataeast/btime.cpp index d83a0715c01..f38c4f5e43b 100644 --- a/src/mame/dataeast/btime.cpp +++ b/src/mame/dataeast/btime.cpp @@ -450,10 +450,9 @@ void btime_state::btime_palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = (color_prom[i] >> 6) & 0x01; - bit2 = (color_prom[i] >> 7) & 0x01; - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = (color_prom[i] >> 6) & 0x01; + bit1 = (color_prom[i] >> 7) & 0x01; + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } @@ -495,10 +494,9 @@ void btime_state::lnc_palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = (color_prom[i] >> 1) & 0x01; - bit2 = (color_prom[i] >> 0) & 0x01; - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = (color_prom[i] >> 1) & 0x01; + bit1 = (color_prom[i] >> 0) & 0x01; + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } @@ -688,10 +686,7 @@ void btime_state::draw_sprites( uint8_t sprite_y_adjust, uint8_t sprite_y_adjust_flip_screen, uint8_t const *sprite_ram, offs_t interleave) { - int i; - offs_t offs; - - for (i = 0, offs = 0; i < 8; i++, offs += 4 * interleave) + for (int i = 0, offs = 0; i < 8; i++, offs += 4 * interleave) { if (!(sprite_ram[offs + 0] & 0x01)) continue; diff --git a/src/mame/dataeast/liberate_v.cpp b/src/mame/dataeast/liberate_v.cpp index 8807072f060..44021f5c5b0 100644 --- a/src/mame/dataeast/liberate_v.cpp +++ b/src/mame/dataeast/liberate_v.cpp @@ -263,10 +263,9 @@ void liberate_state::liberate_palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = (*color_prom >> 6) & 0x01; - bit2 = (*color_prom >> 7) & 0x01; - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = (*color_prom >> 6) & 0x01; + bit1 = (*color_prom >> 7) & 0x01; + int const b = 0x52 * bit0 + 0xad * bit1; color_prom++; palette.set_pen_color(i, rgb_t(r, g, b)); diff --git a/src/mame/dataeast/shootout.cpp b/src/mame/dataeast/shootout.cpp index caa53f4af30..03b20576f3d 100644 --- a/src/mame/dataeast/shootout.cpp +++ b/src/mame/dataeast/shootout.cpp @@ -146,21 +146,24 @@ void shootoutj_state::palette(palette_device &palette) const for (int i = 0; i < palette.entries(); i++) { + int bit0, bit1, bit2; + // red component - int bit0 = BIT(color_prom[i], 0); - int bit1 = BIT(color_prom[i], 1); - int bit2 = BIT(color_prom[i], 2); + bit0 = BIT(color_prom[i], 0); + bit1 = BIT(color_prom[i], 1); + bit2 = BIT(color_prom[i], 2); int const r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + // green component bit0 = BIT(color_prom[i], 3); bit1 = BIT(color_prom[i], 4); bit2 = BIT(color_prom[i], 5); int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/konami/gberet.cpp b/src/mame/konami/gberet.cpp index 1405b7606ef..72f1e2ec138 100644 --- a/src/mame/konami/gberet.cpp +++ b/src/mame/konami/gberet.cpp @@ -352,10 +352,9 @@ void gberet_base_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_indirect_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/konami/yiear.cpp b/src/mame/konami/yiear.cpp index 23f28be0ae6..17bcc334cbd 100644 --- a/src/mame/konami/yiear.cpp +++ b/src/mame/konami/yiear.cpp @@ -218,10 +218,9 @@ void yiear_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(*color_prom, 6); - bit2 = BIT(*color_prom, 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(*color_prom, 6); + bit1 = BIT(*color_prom, 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r,g,b)); color_prom++; @@ -297,8 +296,7 @@ void yiear_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect) sy++; // fix title screen & garbage at the bottom of the screen } - - m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, + m_gfxdecode->gfx(1)->transpen(bitmap, cliprect, code, color, flipx, flipy, sx, sy, 0); diff --git a/src/mame/sanritsu/appoooh.cpp b/src/mame/sanritsu/appoooh.cpp index 2466a865391..92354ab8ca2 100644 --- a/src/mame/sanritsu/appoooh.cpp +++ b/src/mame/sanritsu/appoooh.cpp @@ -314,10 +314,9 @@ void appoooh_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[pen], 6); - bit2 = BIT(color_prom[pen], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[pen], 6); + bit1 = BIT(color_prom[pen], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } @@ -344,10 +343,9 @@ void robowres_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[pen], 6); - bit2 = BIT(color_prom[pen], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[pen], 6); + bit1 = BIT(color_prom[pen], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/sanritsu/bankp.cpp b/src/mame/sanritsu/bankp.cpp index 4bb45b21309..a7238fadd78 100644 --- a/src/mame/sanritsu/bankp.cpp +++ b/src/mame/sanritsu/bankp.cpp @@ -8,6 +8,9 @@ driver by Nicola Salmoria + BTANB: + - dark red opaque background behind text labels + PCB Layout (Combat Hawk) ----------------------- @@ -197,16 +200,17 @@ void bankp_state::palette(palette_device &palette) const bit1 = BIT(*color_prom, 1); bit2 = BIT(*color_prom, 2); int const r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + // green component bit0 = BIT(*color_prom, 3); bit1 = BIT(*color_prom, 4); bit2 = BIT(*color_prom, 5); int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + // blue component - bit0 = 0; - bit1 = BIT(*color_prom, 6); - bit2 = BIT(*color_prom, 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(*color_prom, 6); + bit1 = BIT(*color_prom, 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_indirect_color(i, rgb_t(r, g, b)); diff --git a/src/mame/sanritsu/drmicro.cpp b/src/mame/sanritsu/drmicro.cpp index 32836cf77ab..78cf0648760 100644 --- a/src/mame/sanritsu/drmicro.cpp +++ b/src/mame/sanritsu/drmicro.cpp @@ -128,10 +128,9 @@ void drmicro_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_indirect_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/sanritsu/mrjong.cpp b/src/mame/sanritsu/mrjong.cpp index 0546e1d0781..20c1bc159cf 100644 --- a/src/mame/sanritsu/mrjong.cpp +++ b/src/mame/sanritsu/mrjong.cpp @@ -129,10 +129,9 @@ void mrjong_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_indirect_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/sanritsu/sprcros2.cpp b/src/mame/sanritsu/sprcros2.cpp index 7193de2e562..03243a9e101 100644 --- a/src/mame/sanritsu/sprcros2.cpp +++ b/src/mame/sanritsu/sprcros2.cpp @@ -215,7 +215,7 @@ void sprcros2_state::palette(palette_device &palette) const // blue component bit0 = BIT(color_prom[i], 6); bit1 = BIT(color_prom[i], 7); - int const b = 0x47 * bit0 + 0xb8 * bit1; + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); palette.set_indirect_color(i, rgb_t(r, g, b)); diff --git a/src/mame/snk/snk6502_v.cpp b/src/mame/snk/snk6502_v.cpp index 9deca8baecf..776b7ac8cfb 100644 --- a/src/mame/snk/snk6502_v.cpp +++ b/src/mame/snk/snk6502_v.cpp @@ -34,22 +34,18 @@ void snk6502_state::snk6502_palette(palette_device &palette) bit0 = BIT(color_prom[i], 0); bit1 = BIT(color_prom[i], 1); bit2 = BIT(color_prom[i], 2); - int const r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // green component bit0 = BIT(color_prom[i], 3); bit1 = BIT(color_prom[i], 4); bit2 = BIT(color_prom[i], 5); - int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; m_palette_val[i] = rgb_t(r, g, b); } @@ -197,22 +193,18 @@ void snk6502_state::satansat_palette(palette_device &palette) bit0 = BIT(color_prom[i], 0); bit1 = BIT(color_prom[i], 1); bit2 = BIT(color_prom[i], 2); - int const r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // green component bit0 = BIT(color_prom[i], 3); bit1 = BIT(color_prom[i], 4); bit2 = BIT(color_prom[i], 5); - int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; m_palette_val[i] = rgb_t(r, g, b); } diff --git a/src/mame/taito/chaknpop.cpp b/src/mame/taito/chaknpop.cpp index 2d62e45ecda..1983873f45a 100644 --- a/src/mame/taito/chaknpop.cpp +++ b/src/mame/taito/chaknpop.cpp @@ -247,10 +247,9 @@ void chaknpop_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(col, 6); - bit2 = BIT(col, 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(col, 6); + bit1 = BIT(col, 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } diff --git a/src/mame/tecfri/ambush.cpp b/src/mame/tecfri/ambush.cpp index af533148c59..56a971c2718 100644 --- a/src/mame/tecfri/ambush.cpp +++ b/src/mame/tecfri/ambush.cpp @@ -327,10 +327,9 @@ void ambush_state::ambush_palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(i, rgb_t(r, g, b)); } @@ -358,10 +357,9 @@ void ambush_state::mariobl_palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(c, rgb_t(r, g, b)); } From fd542d66d756acb58b3751fa5588be78189c208c Mon Sep 17 00:00:00 2001 From: hap Date: Mon, 16 Mar 2026 23:24:10 +0100 Subject: [PATCH 294/351] sc9: remove cpu freq config, update notes --- src/mame/fidelity/sc9.cpp | 55 +++++++++++++++------------------------ 1 file changed, 21 insertions(+), 34 deletions(-) diff --git a/src/mame/fidelity/sc9.cpp b/src/mame/fidelity/sc9.cpp index ba4e2a5d259..c7839e60971 100644 --- a/src/mame/fidelity/sc9.cpp +++ b/src/mame/fidelity/sc9.cpp @@ -5,27 +5,33 @@ Fidelity SC9, Fidelity Playmatic "S" +3 versions were available, the newest "B" version was ~2MHz and included the +Budapest program. The Playmatic S was only released in Germany, it's basically +a 'deluxe' version of SC9 with magnet sensors and came with CB9 and CB16. + TODO: -- fscc9ps module switch and led -- verify fscc9ps XTAL (checked against sound recording, 99.97% similarity) +- fscc9ps module switch and led (the switch simply disconnects voltage) Hardware notes: -Fidelity Sensory Chess Challenger "9" (SC9) overview: +Fidelity Sensory Chess Challenger "9" rev. C: - PCB label: 510-1046C01 2-1-82 -- R6502-13, 1.4MHz from resonator, another pcb with the same resonator was measured 1.49MHz* +- R6502-13, ~1.5MHz (no XTAL, clock from RC circuit) - 2KB RAM(TMM2016P), 2*8KB ROM(HN48364P) - 36-pin edge connector, assume same as SC12 - 8*(8+1) buttons, 8*8+1 LEDs -*: 2 other boards were measured 1.60MHz and 1.88MHz(newest serial). Online references -suggest 3 versions of SC9(C01) total: 1.5MHz, 1.6MHz, and 1.9MHz. +CPU frequency measurements from 4 SC9s were 1.4MHz, 1.49MHz, 1.6MHz, and 1.88MHz. +The first three have the same R/C circuit. The higher speed one may have been a +fluke, or it was overclock (it was not a rev. D PCB). -I/O is via TTL, not further documented here +Playmatic S is on the same PCB with some wire mods. The R/C circuit is similar, +two 680pf capacitors where SC9 has one (340pf, effectively twice as fast). Also +seen with what looks like a 3MHz resonator. Measurements from 3 separate Playmatics +were 2.82MHz, 2.89MHz, and 2.93Mhz, the latter one has the resonator. -3 versions were available, the newest "B" version was 2MHz and included the Budapest -program. The Playmatic S was only released in Germany, it's basically a 'deluxe' -version of SC9 with magnet sensors and came with CB9 and CB16. +The newest SC9 on the 510-1046D01 PCB has a 3.9MHz resonator. Older SC9 versions +won't work on this PCB. ================================================================================ @@ -41,7 +47,7 @@ Known modules (*denotes undumped): - *TDF: Tarrasch Defence to the Queen's Gambit The edge connector has D0-D7, A0-A13, 2 chip select lines, read/write lines, IRQ -line. IRQ and write strobe are unused. Maximum known size is 16KB. +line. IRQ and write strobe aren't used by modules. Maximum known size is 16KB. *******************************************************************************/ @@ -83,8 +89,6 @@ public: void sc9d(machine_config &config); void playmatic(machine_config &config); - DECLARE_INPUT_CHANGED_MEMBER(sc9c_change_cpu_freq); - protected: virtual void machine_start() override ATTR_COLD; @@ -116,13 +120,6 @@ void sc9_state::machine_start() save_item(NAME(m_led_data)); } -INPUT_CHANGED_MEMBER(sc9_state::sc9c_change_cpu_freq) -{ - // SC9(C01) was released with 1.5MHz, 1.6MHz, or 1.9MHz CPU - static const u32 freq[3] = { 1'500'000, 1'600'000, 1'900'000 }; - m_maincpu->set_unscaled_clock(freq[newval % 3]); -} - /******************************************************************************* @@ -214,16 +211,6 @@ static INPUT_PORTS_START( sc9 ) PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) PORT_CODE(KEYCODE_N) PORT_NAME("RE") INPUT_PORTS_END -static INPUT_PORTS_START( sc9c ) - PORT_INCLUDE( sc9 ) - - PORT_START("CPU") - PORT_CONFNAME( 0x03, 0x00, "CPU Frequency" ) PORT_CHANGED_MEMBER(DEVICE_SELF, FUNC(sc9_state::sc9c_change_cpu_freq), 0) // factory set - PORT_CONFSETTING( 0x00, "1.5MHz" ) - PORT_CONFSETTING( 0x01, "1.6MHz" ) - PORT_CONFSETTING( 0x02, "1.9MHz" ) -INPUT_PORTS_END - /******************************************************************************* @@ -262,7 +249,7 @@ void sc9_state::sc9b(machine_config &config) sc9d(config); // basic machine hardware - m_maincpu->set_clock(1'500'000); // from ceramic resonator "681 JSA", measured + m_maincpu->set_clock(1'500'000); // no XTAL m_maincpu->set_addrmap(AS_PROGRAM, &sc9_state::sc9_map); } @@ -271,7 +258,7 @@ void sc9_state::playmatic(machine_config &config) sc9b(config); // basic machine hardware - m_maincpu->set_clock(5.626_MHz_XTAL / 2); // advertised as double the speed of SC9 + m_maincpu->set_clock(3_MHz_XTAL); // advertised as double the speed of SC9 m_board->set_type(sensorboard_device::MAGNETS); config.set_default_layout(layout_fidel_playmatic); @@ -301,7 +288,7 @@ ROM_START( fscc9c ) // PCB label 510-1046C01 ROM_LOAD("101-1034b02", 0xe000, 0x2000, CRC(cbaf97d7) SHA1(7ed8e68bb74713d9e2ff1d9c037012320b7bfcbf) ) // " ROM_END -ROM_START( fscc9ps ) +ROM_START( fscc9ps ) // PCB label 510-1046C01 ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("c_green", 0xc000, 0x2000, CRC(e96aa95d) SHA1(16d90cf0ef166aef579d442671290a2c43e24dfe) ) ROM_LOAD("e_green", 0xe000, 0x2000, CRC(d7a95999) SHA1(27c19bc56a15f1ac78177683441e04f27c6e48ef) ) @@ -318,5 +305,5 @@ ROM_END // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS SYST( 1982, fscc9, 0, 0, sc9d, sc9, sc9_state, empty_init, "Fidelity Electronics", "Sensory Chess Challenger \"9\" (rev. D)", MACHINE_SUPPORTS_SAVE ) // aka version "B" SYST( 1982, fscc9b, fscc9, 0, sc9b, sc9, sc9_state, empty_init, "Fidelity Electronics", "Sensory Chess Challenger \"9\" (rev. B)", MACHINE_SUPPORTS_SAVE ) -SYST( 1982, fscc9c, fscc9, 0, sc9b, sc9c, sc9_state, empty_init, "Fidelity Electronics", "Sensory Chess Challenger \"9\" (rev. C)", MACHINE_SUPPORTS_SAVE ) +SYST( 1982, fscc9c, fscc9, 0, sc9b, sc9, sc9_state, empty_init, "Fidelity Electronics", "Sensory Chess Challenger \"9\" (rev. C)", MACHINE_SUPPORTS_SAVE ) SYST( 1983, fscc9ps, fscc9, 0, playmatic, sc9, sc9_state, empty_init, "Fidelity Deutschland", "Sensory 9 Playmatic S", MACHINE_SUPPORTS_SAVE ) // 9 is not between quotation marks here From 9792424ea17f870c4fed8d497dc5e942c8b3ca1f Mon Sep 17 00:00:00 2001 From: ClawGrip Date: Tue, 17 Mar 2026 11:42:38 +0100 Subject: [PATCH 295/351] misc/gamtor.cpp: Add some system base ROMs [ClawGrip] (#14732) * misc/gamtor.cpp: Add some system base ROMs [ClawGrip] * misc/gamtor.cpp: Create a new device with a hopper inside --- src/mame/misc/gamtor.cpp | 408 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 388 insertions(+), 20 deletions(-) diff --git a/src/mame/misc/gamtor.cpp b/src/mame/misc/gamtor.cpp index 0832b7f1a77..290c18700f9 100644 --- a/src/mame/misc/gamtor.cpp +++ b/src/mame/misc/gamtor.cpp @@ -51,6 +51,7 @@ #include "emu.h" #include "cpu/m68000/mcf5206e.h" #include "machine/msm6242.h" +#include "machine/ticket.h" #include "video/pc_vga.h" #include "speaker.h" @@ -76,6 +77,7 @@ protected: virtual void io_3bx_3dx_map(address_map &map) override ATTR_COLD; virtual uint16_t offset() override; + virtual const tiny_rom_entry *device_rom_region() const override; }; DEFINE_DEVICE_TYPE(GAMTOR_VGA, gamtor_vga_device, "gamtor_vga", "CT-65550 SVGA") @@ -132,6 +134,68 @@ uint16_t gamtor_vga_device::offset() return vga_device::offset() << 1; } +ROM_START(gamtor_vga) + ROM_REGION(0x117, "pld", 0) + ROM_LOAD("ngc_vga_1a_atf16v8c.bin", 0x000, 0x117, BAD_DUMP CRC(e91d94db) SHA1(d24b873c9deb02f048a57b5b44290d361f500e5c)) // Bruteforced and untested +ROM_END + +const tiny_rom_entry *gamtor_vga_device::device_rom_region() const +{ + return ROM_NAME(gamtor_vga); +} + + +// Money Controls Universal Hopper model MK4, standard on the Gaminator cabinet. +// TODO: Needs to be moved to own file +class mc_mk4_hopper_device : public device_t +{ +public: + mc_mk4_hopper_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + void mc_mk4_hopper(machine_config &mconfig) ATTR_COLD; + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &mconfig) override ATTR_COLD; + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + +private: + required_device m_hopper; +}; + +DEFINE_DEVICE_TYPE(MC_MK4_HOPPER, mc_mk4_hopper_device, "mc_mk4_hopper", "Money Controls Universal Hopper model MK4") + +mc_mk4_hopper_device::mc_mk4_hopper_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, MC_MK4_HOPPER, tag, owner, clock), + m_hopper(*this, "hopper") +{ +} + +void mc_mk4_hopper_device::device_start() +{ +} + +void mc_mk4_hopper_device::device_add_mconfig(machine_config &config) +{ + HOPPER(config, m_hopper, 0); +} + +ROM_START(mc_mk4_hopper) + + // LEDs PCB + ROM_REGION( 0x4000, "ledscpu", ROMREGION_ERASEFF ) + ROM_LOAD( "hop_leds_pic12c671.bin", 0x0000, 0x4000, CRC(61e31970) SHA1(70ed27a9df57bc2bf9b6cd94ca86469fe6f9d5b4) ) // Config Word: 0x3FFC. User ID: ID0=0x007F, ID1=0x007F, ID2=0x007F, ID3=0x007F + + // Main PCB + ROM_REGION( 0x0400, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD( "hop_pic16c620a.bin", 0x0000, 0x0400, NO_DUMP ) +ROM_END + +const tiny_rom_entry *mc_mk4_hopper_device::device_rom_region() const +{ + return ROM_NAME(mc_mk4_hopper); +} + + namespace { class gaminator_state : public driver_device @@ -184,7 +248,6 @@ static INPUT_PORTS_START( gaminator ) INPUT_PORTS_END - void gaminator_state::gaminator(machine_config &config) { MCF5206E(config, m_maincpu, 33.333_MHz_XTAL); // ColdFire MCF5406ECAB40 @@ -202,47 +265,76 @@ void gaminator_state::gaminator(machine_config &config) // unknown sound RTC72423(config, "rtc", XTAL(32'768)); // Fake crystal value, the 72423 uses its own internal crystal + + MC_MK4_HOPPER(config, "hopper", 0); } - +// Base ROMs for genuine Novomatic CoolFire PCB. Bootleg sets may use a different Russian bootleg hardware. +#define COOLFIRE_BASE_ROMS \ + /* PLDs */ \ + ROM_REGION( 0x000117, "plds", ROMREGION_ERASEFF ) \ + ROM_LOAD( "mem3a_atf16v8c.bin", 0x000000, 0x000117, BAD_DUMP CRC(7672124a) SHA1(88b9afdf2180227d46dc0f079810ce18b85aef4e) ) /* Bruteforced and untested */ \ + ROM_LOAD( "mem3b_atf16v8c.bin", 0x000000, 0x000117, BAD_DUMP CRC(661cdd5b) SHA1(7a1b45e47fc39fc61a3b1cf95fd36f8cd7ddea97) ) /* Bruteforced and untested. mem3b is fairly complex so it might be registered */ \ + /* SEEPROM */ \ + ROM_REGION( 0x000200, "seeprom", ROMREGION_ERASEFF ) \ + ROM_LOAD( "m24c04.bin", 0x000000, 0x000200, CRC(2755ce6d) SHA1(96de86fe8bf26ca52a6b31fd0018650ff453c903) ) \ + /* TPM */ \ + ROM_REGION( 0x280000, "tpm", ROMREGION_ERASEFF ) \ + ROM_LOAD( "89c5131a_ul.bin", 0x000000, 0x008000, NO_DUMP ) /* USB MCU, 3-Kbyte Flash EEPROM for Bootloader + 1-Kbyte EEPROM Data */ \ + ROM_LOAD( "sc144144ct.bin", 0x000000, 0x280000, NO_DUMP ) /* Secure MCU, 144K Bytes of FLASH Program Memory + 144K Bytes of EEPROM + 32K Bytes of ROM Dedicated to Atmel's Crypto-library */ \ + ROM_LOAD( "tpm_fm24c04a.bin", 0x000000, 0x000200, CRC(5978d908) SHA1(0d7b29f0f2ee4cd7beb043edd7d81a9b6c231e64) ) /* Mostly empty */ ROM_START( g4u5 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "games4y_594v5.6-5@1.bin", 0x0000000, 0x4000000, CRC(3eb0a6fe) SHA1(2c8a1f3850a1377c2e2430d527787d2586d7dbea) ) // GAMES4Y5 V5.6-5 May 16 2007 ROM_LOAD( "games4y_594v5.6-5@2.bin", 0x4000000, 0x4000000, CRC(b26afd49) SHA1(28ae48467581517be12922c7920afc0f54e4fe4f) ) ROM_END ROM_START( g4u6 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "games4y_694v5.6-5@1.bin", 0x0000000, 0x4000000, CRC(b353bb0f) SHA1(6f9895ec42601ee82b31274c9f8cc54c3929717f) ) // GAMES4Y6 V5.6-5 Apr 02 2007 ROM_LOAD( "games4y_694v5.6-5@2.bin", 0x4000000, 0x4000000, CRC(fcfe8b6f) SHA1(0b77557f95c1fd315434dfafeb4d13f71a0198e1) ) ROM_END ROM_START( g4u7 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "games4y_794v5.6-5a@1.bin", 0x0000000, 0x4000000, CRC(ea05445d) SHA1(b667a7c2529304354ccce86e9ccdfc9e8235fea0) ) // GAMES4Y7 V5.6-5A May 16 2007 ROM_LOAD( "games4y_794v5.6-5a@2.bin", 0x4000000, 0x4000000, CRC(b6f9be81) SHA1(ba296d8e9adf8bcbb783a581b39e645da9a7f0b0) ) ROM_END ROM_START( g4u2 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "games4y_294@1_v5.6-0.rom", 0x0000000, 0x4000000, CRC(36fed1f6) SHA1(fbe7e8b99c90336075831ceb47f345c82068f719) ) // GAMES4Y2 V5.6-0 Aug 08 2006 ROM_LOAD( "games4y_294@2_v5.6-0.rom", 0x4000000, 0x4000000, CRC(7c29b788) SHA1(bc6fbcc5a36e464d10d4061a7ba83b29703d4839) ) ROM_END ROM_START( g4u3 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "games4y_394@1_v5.6-4.rom", 0x0000000, 0x4000000, CRC(2228b20a) SHA1(a01eb039e0102145af4bc0ed4714d20799da6a0c) ) // GAMES4Y3 V5.6-4 Jan 09 2007 ROM_LOAD( "games4y_394@2_v5.6-4.rom", 0x4000000, 0x4000000, CRC(68cd6b12) SHA1(75b83c0fcde36bc250546b519783c3470bf2044b) ) ROM_END ROM_START( g4u3a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "4y3@1 v5.6-5.rom", 0x0000000, 0x4000000, CRC(3915aeb9) SHA1(7e3fae019cefd55a1645f547017ab28f6c884b86) ) // GAMES4Y3 V5.6-5 Apr 02 2007 ROM_LOAD( "4y3@2 v5.6-5.rom", 0x4000000, 0x4000000, CRC(29faae20) SHA1(00929d5b600f5461bf1ca53888b23db1d52dc320) ) ROM_END ROM_START( g4u4 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "games4y_494v5.6-5@1.bin", 0x0000000, 0x4000000, CRC(ece8734d) SHA1(706459cd275b74f888930f08ac167dbb85b85385) ) // GAMES4Y4 V5.6-5 Apr 02 2007 ROM_LOAD( "games4y_494v5.6-5@2.bin", 0x4000000, 0x4000000, CRC(f690e6a5) SHA1(4286ccaad92cbad28480323ae8bd072a4629685c) ) @@ -251,18 +343,24 @@ ROM_END // Gaminator 4 ROM_START( gamt1 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "1_94_5418_1", 0x0000000, 0x4000000, CRC(b81f6395) SHA1(36df76fcae23097cc3f45685636e6328e2cabed1) ) // V5.4-18 May 04 2004 ROM_LOAD( "1_94_5418_2", 0x4000000, 0x4000000, CRC(86267501) SHA1(2d90708f34818a2b6949f62fda6d6e66471dea79) ) ROM_END ROM_START( gamt1a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator194___1_v 5.4-23.rom", 0x0000000, 0x4000000, CRC(ec211fed) SHA1(b1aa7fa5974008d239cc5500a72033c38fa5fff2) ) // V5.4-23 Oct 21 2004 ROM_LOAD( "gaminator194___2_v 5.4-23.rom", 0x4000000, 0x4000000, CRC(f19e43a9) SHA1(418f1c3d98cf615f2941be0cf87b3eced9a601c2) ) ROM_END ROM_START( gamt1b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator194 @1 v5.6-0.rom", 0x0000000, 0x4000000, CRC(fb3e9209) SHA1(4a68db08b37880913041434a82ee3721052c9713) ) // V5.6-0 Aug 09 2006 ROM_LOAD( "gaminator194 @2 v5.6-0.rom", 0x4000000, 0x4000000, CRC(201b9510) SHA1(acaf13c76d3e78b6dc967a1c2300ef30dc863694) ) @@ -271,30 +369,40 @@ ROM_END // Gaminator 4 ROM_START( gamt4 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator496___1_v 5.4-19.rom", 0x0000000, 0x4000000, CRC(dc5aea1b) SHA1(4c4ec1d92357141eafdf5586dc3b9c638b6d586d) ) // V5.4-19 May 25 2004 ROM_LOAD( "gaminator496___2_v 5.4-19.rom", 0x4000000, 0x4000000, CRC(cfb77ee8) SHA1(ccec49dbc5e369e3253cb526e438bae8b8a90be8) ) ROM_END ROM_START( gamt4a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator494___1_v 5.4-19.rom", 0x0000000, 0x4000000, CRC(0d8a4096) SHA1(d633c4dd4204c36b39701e5cc1b4be1f640e946e) ) // V5.4-19 May 25 2004 ROM_LOAD( "gaminator494___2_v 5.4-19.rom", 0x4000000, 0x4000000, CRC(cfb77ee8) SHA1(ccec49dbc5e369e3253cb526e438bae8b8a90be8) ) ROM_END ROM_START( gamt4b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator494___1_v5.4-27.rom", 0x0000000, 0x4000000, CRC(714b0964) SHA1(93b5f9c56f593b66f1a092d510eb333eb6c85ad4) ) // V5.4-27 Mar 07 2005 ROM_LOAD( "gaminator494___2_v5.4-27.rom", 0x4000000, 0x4000000, CRC(af46a281) SHA1(5bd99c1e136aa7d9075dae0d943ced316aa62479) ) ROM_END ROM_START( gamt4c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "4_94-5.5-5_1", 0x0000000, 0x4000000, CRC(c6edbaab) SHA1(b8e4beeccc311650168248a88032420393cae64e) ) // V5.5-5 Jul 26 2005 ROM_LOAD( "4_94-5.5-5_2", 0x4000000, 0x4000000, CRC(bec89778) SHA1(a91c05ca0d75eaed7cd5be3a2a91a2b93209ff86) ) ROM_END ROM_START( gamt4d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator494___1_v 5.5-6.rom", 0x0000000, 0x4000000, CRC(67bd128a) SHA1(4452891fe58ec3df0610c02b24d26e48f41c97ee) ) // V5.5-6 Sep 27 2005 ROM_LOAD( "gaminator494___2_v 5.5-6.rom", 0x4000000, 0x4000000, CRC(452d4f41) SHA1(db45af7399eff8bbbf32199705abc56a78134a1b) ) @@ -307,12 +415,16 @@ ROM_START( gamt4dbag ) ROM_END ROM_START( gamt4e ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "4_94-5.5-8_1", 0x0000000, 0x4000000, CRC(3a8d890e) SHA1(9883d55201ce1f7f5c1d1298e7dd2b487c13d976) ) // V5.5-8 Dec 07 2005 ROM_LOAD( "4_94-5.5-8_2", 0x4000000, 0x4000000, CRC(79ba6d61) SHA1(17a92020b18ea6292f82a0810f02ebe9afee322e) ) ROM_END ROM_START( gamt4f ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "4_94_5-5-9_1", 0x0000000, 0x4000000, CRC(3a365dbe) SHA1(974ff7b4090f90e219b47d48b3e3a516c678ed7d) ) // V5.5-9 Feb 02 2006 ROM_LOAD( "4_94-5.5-9_2", 0x4000000, 0x4000000, CRC(11b698e7) SHA1(d2fe7e15fdc0e9bd7498f65200224addc434cba7) ) @@ -325,12 +437,16 @@ ROM_START( gamt4fbag ) ROM_END ROM_START( gamt4g ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator494___1_v 5.5-10a.rom", 0x0000000, 0x4000000, CRC(61cae731) SHA1(4324a30f9b04efd6b48e21070e31eb8bda0c607f) ) // V5.5-10A Jul 19 2006 ROM_LOAD( "gaminator494___2_v 5.5-10a.rom", 0x4000000, 0x4000000, CRC(3878a4f2) SHA1(c7f63f19e99368fd9b47abcfd17526dc360ddecd) ) ROM_END ROM_START( gamt4h ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "4_94-5.6-0_1", 0x0000000, 0x4000000, CRC(f3f4b553) SHA1(9d3108c7a5e702d8b336744835aeb308ec36057e) ) // V5.6-0 Aug 07 2006 ROM_LOAD( "4_94-5.6-0_2", 0x4000000, 0x4000000, CRC(0f278eff) SHA1(1ff4a6c7b2b6d68c8e5dacb7268b79228ead9c01) ) @@ -349,6 +465,8 @@ ROM_START( gamt4hbag ) ROM_END ROM_START( gamt4i ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator494_v5.6-5@1.rom", 0x0000000, 0x4000000, CRC(652cbd62) SHA1(a420bc61434ff56b38fa088becf4cbf43a998f9b) ) // V5.6-5 Feb 26 2007 ROM_LOAD( "gaminator494_v5.6-5@2.rom", 0x4000000, 0x4000000, CRC(7be81ea9) SHA1(a166312c69d5084d96f7f92f0a0bfd73322a1084) ) @@ -361,6 +479,8 @@ ROM_START( gamt4ibag ) ROM_END ROM_START( gamt4j ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt4j_read@1.bin", 0x0000000, 0x4000000, CRC(9203dfd0) SHA1(02ba813ca3c77e57d8a2622da57b5f4b0c3d80fd) ) // V5.6-11 Jan 09 2008 ROM_LOAD( "gamt4j_read@2.bin", 0x4000000, 0x4000000, CRC(7fb46ab0) SHA1(b2c8be0874072a1fb0788741e406f334173dec4c) ) @@ -369,6 +489,8 @@ ROM_END // Gaminator 5 ROM_START( gamt5 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator-5-94=1 v5-6-0", 0x0000000, 0x4000000, CRC(b4f67432) SHA1(094e044b82bd7ae0d0a8c3d4d9b66304939670dc) ) // V5.6-0 Oct 09 2006 ROM_LOAD( "gaminator-5-94=2 v5-6-0", 0x4000000, 0x4000000, CRC(825c8994) SHA1(2b63181a3da9b07b89483b0d48a595b3827972b3) ) @@ -377,42 +499,56 @@ ROM_END // Gaminator 6 ROM_START( gamt6 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator694___1_v5.4-29.rom", 0x0000000, 0x4000000, CRC(19cadd12) SHA1(f13884bd601c7c17e99bf14dfd26d81b26208dec) ) // V5.4-29 May 10 2005 ROM_LOAD( "gaminator694___2_v5.4-29.rom", 0x4000000, 0x4000000, CRC(5a2b558f) SHA1(b58b85a8d10a57977fbd58ff6223e76c5a5eeeeb) ) ROM_END ROM_START( gamt6a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamin_6_96_@1,5.4-29.rom", 0x0000000, 0x4000000, CRC(c81a779f) SHA1(a4ac66bc099fa9a1321bcd97cf1f0026dd02fb12) ) // V5.4.29 May 10 2005 ROM_LOAD( "gamin_6_96_@2,5.4-29.rom", 0x4000000, 0x4000000, CRC(5a2b558f) SHA1(b58b85a8d10a57977fbd58ff6223e76c5a5eeeeb) ) ROM_END ROM_START( gamt6b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator6_94_v5.5-9_1.rom", 0x0000000, 0x4000000, CRC(7a7030b9) SHA1(e6901d0ec6001895e229de87ec062977c6e959c1) ) // V5.5-9 Feb 02 2006 ROM_LOAD( "gaminator6_94_v5.5-9_2.rom", 0x4000000, 0x4000000, CRC(befac2d4) SHA1(7ac1c24e4d13155c4f4624ed86fb11999c01020a) ) ROM_END ROM_START( gamt6c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator6_96_1.rom", 0x0000000, 0x4000000, CRC(75f2381b) SHA1(c4bc4ecdb04596599e03c5aa0cc93725d6581d60) ) // V5.5-9 Feb 02 2006 ROM_LOAD( "gaminator6_96_2.rom", 0x4000000, 0x4000000, CRC(befac2d4) SHA1(7ac1c24e4d13155c4f4624ed86fb11999c01020a) ) ROM_END ROM_START( gamt6d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator694___1_v5.5-10.rom", 0x0000000, 0x4000000, CRC(b602fda8) SHA1(a180370c03b817261f7d4464965fb9c23daeb685) ) // V5.5-10 May 11 2006 ROM_LOAD( "gaminator694___2_v5.5-10.rom", 0x4000000, 0x4000000, CRC(9e66fac8) SHA1(9f851fc29fea50d9d1a8f63a8abdf48a7a6f0fc7) ) ROM_END ROM_START( gamt6e ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator6-94=1 v5-6-0", 0x0000000, 0x4000000, CRC(c72076e3) SHA1(84f60a0418685732ac72d39272bfa8c493b92a13) ) // V5.6-0 Sep 06 2006 ROM_LOAD( "gaminator6-94=2 v5-6-0", 0x4000000, 0x4000000, CRC(253a4806) SHA1(61b89f18851152b031bd589bec1cfb5f9767b6f7) ) ROM_END ROM_START( gamt6f ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "565-1.bin", 0x0000000, 0x4000000, CRC(ff5d2799) SHA1(c006aa55beccb07dde970c382353ba9e3a9f534c) ) // V5.6-5 Feb 27 2007 ROM_LOAD( "565-2.bin", 0x4000000, 0x4000000, CRC(6d34cddd) SHA1(b39a0fff39efc8b5cc03912a239955656984e947) ) @@ -421,54 +557,72 @@ ROM_END // Gaminator 7 ROM_START( gamt7 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "7_92-5.5-0_1", 0x0000000, 0x4000000, CRC(a01f5e01) SHA1(358b715bbd59f7520a0e63c988a24a478ce1e629) ) // V5.5-0 Apr 13 2005 ROM_LOAD( "7_92-5.5-0_2", 0x4000000, 0x4000000, CRC(079cb130) SHA1(71c26de127676ae512851c4c5436cad81819e4ec) ) ROM_END ROM_START( gamt7a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "7_92-5.5-8_1", 0x0000000, 0x4000000, CRC(f88e2586) SHA1(6920988dcc199ab9bf9a04d52c19290e18b94898) ) // V5.5-6 Sep 21 2005 ROM_LOAD( "7_92-5.5-8_2", 0x4000000, 0x4000000, CRC(969bcff5) SHA1(fc7fafe0177237998b93f03a528053c2f626d3df) ) ROM_END ROM_START( gamt7b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator 7,423d,94________1.rom.rom", 0x0000000, 0x4000000, CRC(a03484f0) SHA1(019fcb410768b981b939d0ce4b2bfeea3c8d85c9) ) // V5.5-8 Nov 30 2005 ROM_LOAD( "gaminator 7,423d,94________2.rom.rom", 0x4000000, 0x4000000, CRC(c2cf8fd2) SHA1(544b6dfb7f184bb818cedb9600f43915094ad7e1) ) ROM_END ROM_START( gamt7c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator794@1-v5.5-10.rom", 0x0000000, 0x4000000, CRC(4b7f3a3b) SHA1(40cdb1d94c087efadcb672339dfde722b8e3e4bc) ) // V5.5-10A Jul 24 2006 ROM_LOAD( "gaminator794@2-v5.5-10.rom", 0x4000000, 0x4000000, CRC(4936b216) SHA1(7a929260f52d94a0445380fcfee05d3e2e2d5abf) ) ROM_END ROM_START( gamt7d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator792@1_v5.6-4.rom", 0x0000000, 0x4000000, CRC(b436b4e0) SHA1(085c6000f44c609ff3aa2ebcbbe56eb6c40fdfdf) ) // V5.6-4 Dec 04 2006 ROM_LOAD( "gaminator792@2_v5.6-4.rom", 0x4000000, 0x4000000, CRC(5cff1dee) SHA1(12958e587253ce8bb9f04ee5289a0c77b4c74c10) ) ROM_END ROM_START( gamt7e ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator792@1-v5.6-5.rom", 0x0000000, 0x4000000, CRC(5dfa30ae) SHA1(778a80de202944be4635cae484f2084bb35e5a95) ) // V5.6-5 Mar 15 2007 ROM_LOAD( "gaminator792@2-v5.6-5.rom", 0x4000000, 0x4000000, CRC(2c005f45) SHA1(91b8e53ac85665247bdd0164da5d5dbc0d2c903d) ) ROM_END ROM_START( gamt7f ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator794@1-v5.6-5.rom", 0x0000000, 0x4000000, CRC(b589b09c) SHA1(66a7c04d4d727f8c89adfdd2203920fac9913051) ) // V5.6-5 Mar 15 2007 ROM_LOAD( "gaminator794@2-v5.6-5.rom", 0x4000000, 0x4000000, CRC(2c005f45) SHA1(91b8e53ac85665247bdd0164da5d5dbc0d2c903d) ) ROM_END ROM_START( gamt7g ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator7 92_1,v.5.6-10.bin", 0x0000000, 0x4000000, CRC(66dbb196) SHA1(af2f660a16c2b2a2690a532a727af98e19e14520) ) // V5.6-10 Nov 06 2007 ROM_LOAD( "gaminator7 92_2,v.5.6-10.bin", 0x4000000, 0x4000000, CRC(1492cabc) SHA1(c556a3be375fd83fd1ef3c642a83090c433c3f5c) ) ROM_END ROM_START( gamt7h ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator7 94_1,v.5.6-10.bin", 0x0000000, 0x4000000, CRC(8ea831a4) SHA1(84d162da2142f0426db55bbf2e2d6c54889c7bef) ) // V5.6-10 Nov 06 2007 ROM_LOAD( "gaminator7 94_2,v.5.6-10.bin", 0x4000000, 0x4000000, CRC(1492cabc) SHA1(c556a3be375fd83fd1ef3c642a83090c433c3f5c) ) @@ -477,30 +631,40 @@ ROM_END // Gaminator 8 ROM_START( gamt8 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator894___1_v5.5-0.rom", 0x0000000, 0x4000000, CRC(68ee1de5) SHA1(f43efb4562a35daff49acb7a48bba398c868f65b) ) // V5.5-0 Apr 05 2005 ROM_LOAD( "gaminator894___2_v5.5-0.rom", 0x4000000, 0x4000000, CRC(845c8c7e) SHA1(e7922b8458b6c42f0b5f2357c28091467faf98a2) ) ROM_END ROM_START( gamt8a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "8_94-5.5-2_1", 0x0000000, 0x4000000, CRC(ed1ea273) SHA1(7b2d3df79468b17e99149f0031b1a257b9292d0d) ) // V5.5-2 May 30 2005 ROM_LOAD( "8_94-5.5-2_2", 0x4000000, 0x4000000, CRC(ef9169da) SHA1(23a95ad9627eec5a27726dc15d6aa5d027ddd158) ) ROM_END ROM_START( gamt8b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator8_94_1.rom", 0x0000000, 0x4000000, CRC(feee74b5) SHA1(2ef9fb28a62bde32fc13f5ecbac87bcbcb225af3) ) // V5.5-9 Dec 13 2005 ROM_LOAD( "gaminator8_94_2.rom", 0x4000000, 0x4000000, CRC(168d616e) SHA1(cd9506c75c225eb67fa5468f2aea73372f339edf) ) ROM_END ROM_START( gamt8c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator894___1_v5.5-10.rom", 0x0000000, 0x4000000, CRC(adaba76d) SHA1(83a95444c96f8b34b257a05d346f6308d72c9cc4) ) // V5.5-10 May 11 2006 ROM_LOAD( "gaminator894___2_v5.5-10.rom", 0x4000000, 0x4000000, CRC(be5ff4ae) SHA1(7cd4b5559ad423f2d21d9d98ef03ac24b4311288) ) ROM_END ROM_START( gamt8d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator892v5.6_5@1.bin", 0x0000000, 0x4000000, CRC(72c28e3f) SHA1(495e5a673776125697d0e6f07a40c9953c19b92c) ) // V5.6-5 Feb 27 2007 ROM_LOAD( "gaminator892v5.6_5@2.bin", 0x4000000, 0x4000000, CRC(9fc3467b) SHA1(a3dc484de82f9094d9c77d569e6673df8a54f1c8) ) @@ -509,12 +673,16 @@ ROM_END // Gaminator 9 ROM_START( gamt9 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator994v5.5-1_@1.bin", 0x0000000, 0x4000000, CRC(8bba5902) SHA1(f96885815b9de955a5f9b3ffd36ec5f8bd606836) ) // V5.5-1 May 10 2005 ROM_LOAD( "gaminator994v5.5-1_@2.bin", 0x4000000, 0x4000000, CRC(445d67d1) SHA1(081f10f519f5fa0a71e3b0395dbf969b930677ef) ) ROM_END ROM_START( gamt9a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gaminator994@1_5.6-0.rom", 0x0000000, 0x4000000, CRC(74556573) SHA1(ddf2bd7f9845a2b3174b40f3ab82a03b28b467e8) ) // V5.6-0 Aug 03 2006 ROM_LOAD( "gaminator994@2_5.6-0.rom", 0x4000000, 0x4000000, CRC(5af4be44) SHA1(61933b2948bb55403e2e90bc1d34245bc1930670) ) @@ -523,6 +691,8 @@ ROM_END // Gaminator 10 ROM_START( gamt10 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-94-5.5-5.rom1", 0x0000000, 0x4000000, CRC(4c2286cb) SHA1(226e729b348d02fdcb2e8db2ef11c903d0659cba) ) // V5.5-5 Aug 24 2005 ROM_LOAD( "gamt10-9x-5.5-5.rom2", 0x4000000, 0x4000000, CRC(ae1acaf2) SHA1(1cf40608e19f2e94e9c49c6a046940e74023c43c) ) @@ -535,42 +705,56 @@ ROM_START( gamt10bag ) ROM_END ROM_START( gamt10a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-94-5.5-9.rom1", 0x0000000, 0x4000000, CRC(7c8588ab) SHA1(c69b2218893fb09bb13ecfdfc2a45a1fa67e10d0) ) // V5.5-9 Dec 13 2005 ROM_LOAD( "gamt10-9x-5.5-9.rom2", 0x4000000, 0x4000000, CRC(479ef3e3) SHA1(082841f0af8eca3728a940cd284b00e77b7b7546) ) ROM_END ROM_START( gamt10b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-96-5.5-10.rom1", 0x0000000, 0x4000000, CRC(f5eec6c2) SHA1(49069055fdcbeef9e43f71a42eba0ef8f3a4c4e6) ) // V5.5-10 Mar 29 2006 ROM_LOAD( "gamt10-9x-5.5-10.rom2", 0x4000000, 0x4000000, CRC(2712f24e) SHA1(776c422d8a08edb2e9cfc30a69d3cc87eae50e7d) ) ROM_END ROM_START( gamt10c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-94-5.5-10a.rom1", 0x0000000, 0x4000000, CRC(5281d489) SHA1(971d8fed420a0750212ac216c6724b4b4d76c391) ) // V5.5-10A Jul 19 2006 ROM_LOAD( "gamt10-9x-5.5-10a.rom2", 0x4000000, 0x4000000, CRC(d78101fd) SHA1(b6ebbb52766296f76a7ef47db11d553a1922ba3d) ) ROM_END ROM_START( gamt10d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-92-5.6-1.rom1", 0x0000000, 0x4000000, CRC(33095a74) SHA1(a6e760627ec9ba83799fe01ac0d3102a0e76e8e1) ) // V5.6-1 Nov 20 2006 ROM_LOAD( "gamt10-9x-5.6-1.rom2", 0x4000000, 0x4000000, CRC(b249c8d4) SHA1(1f8de4d1504de7897dc0240f47ac398f03749004) ) ROM_END ROM_START( gamt10e ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-90-5.6-4.rom1", 0x0000000, 0x4000000, CRC(e5a2723a) SHA1(25d0a1d14ec2cf68c1927b7ebfac58aced74fdb7) ) // V5.6-4 Dec 04 2006 ROM_LOAD( "gamt10-9x-5.6-4.rom2", 0x4000000, 0x4000000, CRC(62adda8d) SHA1(e4fa94b2aa321f7d27666f6a55aaa871c8a0ed85) ) ROM_END ROM_START( gamt10f ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-92-5.6-4.rom1", 0x0000000, 0x4000000, CRC(6079b346) SHA1(9fc90c47c394cc86771bce365c9abe98bc1b70d9) ) // V5.6-4 Dec 04 2006 ROM_LOAD( "gamt10-9x-5.6-4.rom2", 0x4000000, 0x4000000, CRC(62adda8d) SHA1(e4fa94b2aa321f7d27666f6a55aaa871c8a0ed85) ) ROM_END ROM_START( gamt10g ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-94-5.6-4.rom1", 0x0000000, 0x4000000, CRC(880a3374) SHA1(defbd9273b3b84cc2a6a4b784dada582b9d8a399) ) // V5.6-4 Dec 04 2006 ROM_LOAD( "gamt10-9x-5.6-4.rom2", 0x4000000, 0x4000000, CRC(62adda8d) SHA1(e4fa94b2aa321f7d27666f6a55aaa871c8a0ed85) ) @@ -583,48 +767,64 @@ ROM_START( gamt10gmult ) ROM_END ROM_START( gamt10h ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-90-5.6-5.rom1", 0x0000000, 0x4000000, CRC(d76c962e) SHA1(d2441e447ff3a723692a9ddc2d40feaa45138581) ) // V5.6-5 Feb 27 2007 ROM_LOAD( "gamt10-9x-5.6-5.rom2", 0x4000000, 0x4000000, CRC(85c674ae) SHA1(b60253b881ad043c15f60d1f309172ec85a974e7) ) ROM_END ROM_START( gamt10i ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-xx-5.6-5.rom1", 0x0000000, 0x4000000, CRC(52b75752) SHA1(96291da84650c91b5d08a4c18e8ff5a3c12723fa) ) // V5.6-5 Feb 27 2007 ROM_LOAD( "gamt10-9x-5.6-5.rom2", 0x4000000, 0x4000000, CRC(85c674ae) SHA1(b60253b881ad043c15f60d1f309172ec85a974e7) ) ROM_END ROM_START( gamt10j ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-90-5.6-8.rom1", 0x0000000, 0x4000000, CRC(ed65a443) SHA1(786154b0e62432e8e3b5394cef57d983588e6632) ) // V5.6-8 Jul 04 2007 ROM_LOAD( "gamt10-9x-5.6-8.rom2", 0x4000000, 0x4000000, CRC(63943c1b) SHA1(649f1b2da380c996d2aa2f04fca4ad17b686e79f) ) ROM_END ROM_START( gamt10k ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-92-5.6-8.rom1", 0x0000000, 0x4000000, CRC(68be653f) SHA1(a850fb7913bd5b60e4f4742edc43530a5f9835fc) ) // V5.6-8 Jul 04 2007 ROM_LOAD( "gamt10-9x-5.6-8.rom2", 0x4000000, 0x4000000, CRC(63943c1b) SHA1(649f1b2da380c996d2aa2f04fca4ad17b686e79f) ) ROM_END ROM_START( gamt10l ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-94-5.6-8.rom1", 0x0000000, 0x4000000, CRC(80cde50d) SHA1(a582f3d1e2a187492a131f84ddd8cc8b79a54973) ) // V5.6-8 Jul 04 2007 ROM_LOAD( "gamt10-9x-5.6-8.rom2", 0x4000000, 0x4000000, CRC(63943c1b) SHA1(649f1b2da380c996d2aa2f04fca4ad17b686e79f) ) ROM_END ROM_START( gamt10m ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-90-5.6-10.rom1", 0x0000000, 0x4000000, CRC(4a3b02ed) SHA1(70d30221b44d5a24f415fb5c12cd0cf43d479127) ) // V5.6-10 Oct 25 2007 ROM_LOAD( "gamt10-9x-5.6-10.rom2", 0x4000000, 0x4000000, CRC(caad5ae9) SHA1(2812c3c3e73a7d82c77030e6c327e56f8f934891) ) ROM_END ROM_START( gamt10n ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-92-5.6-10.rom1", 0x0000000, 0x4000000, CRC(cfe0c391) SHA1(898d3f657c755e9ab574f1b31593e9a7173c4026) ) // V5.6-10 Oct 25 2007 ROM_LOAD( "gamt10-9x-5.6-10.rom2", 0x4000000, 0x4000000, CRC(caad5ae9) SHA1(2812c3c3e73a7d82c77030e6c327e56f8f934891) ) ROM_END ROM_START( gamt10o ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt10-94-5.6-10.rom1", 0x0000000, 0x4000000, CRC(279343a3) SHA1(2fe7116317051d48ed95485ca210cc3a4e60a639) ) // V5.6-10 Oct 25 2007 ROM_LOAD( "gamt10-9x-5.6-10.rom2", 0x4000000, 0x4000000, CRC(caad5ae9) SHA1(2812c3c3e73a7d82c77030e6c327e56f8f934891) ) @@ -633,18 +833,24 @@ ROM_END // Gaminator 11 ROM_START( gamt11 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt11-94-5.5-8.rom1", 0x0000000, 0x4000000, CRC(aecd4412) SHA1(758c46fc8fcdb491e5f3746d54d0c3fd07eb5205) ) // V5.5-8 Nov 17 2005 ROM_LOAD( "gamt11-9x-5.5-8.rom2", 0x4000000, 0x4000000, CRC(8df8c5d2) SHA1(edd004f0c1b8403187e370cae901cf6c9a7e4e30) ) ROM_END ROM_START( gamt11a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt11-96-5.5-8.rom1", 0x0000000, 0x4000000, CRC(f9949aed) SHA1(8b589747e5ed3d27292ab57e9c052c58523b73fb) ) // V5.5-8 Nov 17 2005 ROM_LOAD( "gamt11-9x-5.5-8.rom2", 0x4000000, 0x4000000, CRC(8df8c5d2) SHA1(edd004f0c1b8403187e370cae901cf6c9a7e4e30) ) ROM_END ROM_START( gamt11b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt11-94-5.6-0.rom1", 0x0000000, 0x4000000, CRC(d591cde6) SHA1(5769962209e7364426d2c24149229e45e5531e73) ) // V5.6-0 Sep 11 2006 ROM_LOAD( "gamt11-9x-5.6-0.rom2", 0x4000000, 0x4000000, CRC(98889261) SHA1(aad17a810a47b254023301740ca9d05c1060e4b4) ) @@ -657,6 +863,8 @@ ROM_START( gamt11bmult ) ROM_END ROM_START( gamt11c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt11-xx-5.6-5.rom1", 0x0000000, 0x4000000, CRC(e1ae549f) SHA1(2bf4aa23dd67de526676d4a56da1fed2f4316047) ) // V5.6-5 Mar 21 2007 ROM_LOAD( "gamt11-9x-5.6-5.rom2", 0x4000000, 0x4000000, CRC(c69ada8e) SHA1(7519ccf4279dae6a2e661fa2dee874e48f3c7b42) ) @@ -665,18 +873,24 @@ ROM_END // Gaminator 12 ROM_START( gamt12 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt12-96-5.5-6.rom1", 0x0000000, 0x4000000, CRC(875d9879) SHA1(467c8f3ea6bbfb2527cfac00b73991ff185eccf7) ) // V5.5-6 Oct 17 2005 ROM_LOAD( "gamt12-9x-5.5-6.rom2", 0x4000000, 0x4000000, CRC(a5a08cb1) SHA1(73de85869c7762c34658b8619120879e29eeed8c) ) ROM_END ROM_START( gamt12a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt12-96-5.6-0.rom1", 0x0000000, 0x4000000, CRC(286dd471) SHA1(6f8cdb9efa488450d41348887403c5100fd9a70e) ) // V5.6-0 Sep 07 2006 ROM_LOAD( "gamt12-9x-5.6-0.rom2", 0x4000000, 0x4000000, CRC(4d9a8dc4) SHA1(5605bd3dc10bccecb4ec17641a8b63dc3bf4c07e) ) ROM_END ROM_START( gamt12b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt12-96-5.6-5.rom1", 0x0000000, 0x4000000, CRC(641458af) SHA1(a96ea356996b0c7e41e420655d602bf1122dcac4) ) // V5.6-5 Apr 12 2007 ROM_LOAD( "gamt12-9x-5.6-5.rom2", 0x4000000, 0x4000000, CRC(078aba43) SHA1(f23a119bea5d97b9e478fe05af2da3328db064ac) ) @@ -685,42 +899,56 @@ ROM_END // Gaminator 16 ROM_START( gamt16 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt16-94-5.5-10.rom1", 0x0000000, 0x4000000, CRC(36dc53ae) SHA1(014a2605f465fc8b073d04343dddb5a665a9f9bc) ) // V5.5-10 Apr 19 2006 ROM_LOAD( "gamt16-9x-5.5-10.rom2", 0x4000000, 0x4000000, CRC(86ecdc45) SHA1(f14c1c8914bd881cb095d5667685f00b8fd28743) ) ROM_END ROM_START( gamt16a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt16-92-5.5-10.rom1", 0x0000000, 0x4000000, CRC(70f304a3) SHA1(d4161a72e24f29c53d5f89abf5b68ad3348c09b2) ) // V5.5-10 Apr 19 2006 ROM_LOAD( "gamt16-9x-5.5-10.rom2", 0x4000000, 0x4000000, CRC(86ecdc45) SHA1(f14c1c8914bd881cb095d5667685f00b8fd28743) ) ROM_END ROM_START( gamt16b ) // not sure of the version number, was marked 5.5-10 but rom 2 doesn't match above either, could be completely mislabeled + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamt16-96-5.5-10x.rom1", 0x0000000, 0x4000000, NO_DUMP ) // was identical to file below! ROM_LOAD( "gamt16-9x-5.5-10x.rom2", 0x4000000, 0x4000000, CRC(00e5d642) SHA1(c52e5e3b8c6e132e1b06c2ddffc8538ea9e53822) ) ROM_END ROM_START( gamt16c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1692_@1_5.6-1.rom", 0x0000000, 0x4000000, CRC(b56420dc) SHA1(389c717eaf51a21f286c526c36fbc3f39929e00f) ) // V5.6-1 Sep 20 2006 ROM_LOAD( "gamt16-9x-5.6-1.rom2", 0x4000000, 0x4000000, CRC(b20d5d5d) SHA1(8ae296f846488bf334f7785bc584a4b88a0bc504) ) ROM_END ROM_START( gamt16d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1696_@1_5.6-1.rom", 0x0000000, 0x4000000, CRC(a412a92e) SHA1(748e6a2bb33d8d32004d95c9075630a24859d2b8) ) // V5.6-1 Sep 20 2006 ROM_LOAD( "gamt16-9x-5.6-1.rom2", 0x4000000, 0x4000000, CRC(b20d5d5d) SHA1(8ae296f846488bf334f7785bc584a4b88a0bc504) ) ROM_END ROM_START( gamt16e ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "16_94-5.6-1_1", 0x0000000, 0x4000000, CRC(f34b77d1) SHA1(4aad3285b294e522875db62b046eaa37f90652c7) ) // V5.6-1 Sep 20 2006 ROM_LOAD( "gamt16-9x-5.6-1.rom2", 0x4000000, 0x4000000, CRC(b20d5d5d) SHA1(8ae296f846488bf334f7785bc584a4b88a0bc504) ) ROM_END ROM_START( gamt16f ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1692v5.6-5_@1.bin", 0x0000000, 0x4000000, CRC(3530bdc1) SHA1(82a72fe38100fb88b679fe50dab14c1035501579) ) // V5.6-5 Feb 28 2007 ROM_LOAD( "gamt16-9x-5.6-5.rom2", 0x4000000, 0x4000000, CRC(9484ddec) SHA1(03a21d231496d364f48173064027d6871a3f3fc0) ) @@ -733,30 +961,40 @@ ROM_START( gamt16fmult ) ROM_END ROM_START( gamt16g ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1694_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(dd433df3) SHA1(b4a89cf4e190c1d32900fa5425a6b1326c722e6d) ) // V5.6-5 Feb 28 2007 ROM_LOAD( "gamt16-9x-5.6-5.rom2", 0x4000000, 0x4000000, CRC(9484ddec) SHA1(03a21d231496d364f48173064027d6871a3f3fc0) ) ROM_END ROM_START( gamt16h ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g16_92_5.6-8_@1", 0x0000000, 0x4000000, CRC(9ad16d5e) SHA1(373e5c49553cb4a4c2f9a9ab2dd15fa45df11ebe) ) // V5.6-8 Jul 04 2007 ROM_LOAD( "gamt16-9x-5.6-8.rom2", 0x4000000, 0x4000000, CRC(53079651) SHA1(4f4a5332dd7a144bcb3b96540f2f124876f03abc) ) ROM_END ROM_START( gamt16i ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g16_94_5.6-8_@1", 0x0000000, 0x4000000, CRC(72a2ed6c) SHA1(16969260e960f3a62dccc9a1e3763abcdaa1fa99) ) // V5.6-8 Jul 04 2007 ROM_LOAD( "gamt16-9x-5.6-8.rom2", 0x4000000, 0x4000000, CRC(53079651) SHA1(4f4a5332dd7a144bcb3b96540f2f124876f03abc) ) ROM_END ROM_START( gamt16j ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g16_92_5.6-10_@1", 0x0000000, 0x4000000, CRC(ca4bf3da) SHA1(5fdef7b46c5d51bf16228c9541b18603bce72b51) ) // V5.6-10 Oct 25 2007 ROM_LOAD( "gamt16-9x-5.6-10.rom2", 0x4000000, 0x4000000, CRC(e6fc0478) SHA1(2bf998471ef86bccc45332551738b5fc3f70d188) ) ROM_END ROM_START( gamt16k ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g16_94_5.6-10_@1", 0x0000000, 0x4000000, CRC(223873e8) SHA1(f57c80ba710529f011ee505fa8e1e6a0af70bc4e) ) // V5.6-10 Oct 25 2007 ROM_LOAD( "gamt16-9x-5.6-10.rom2", 0x4000000, 0x4000000, CRC(e6fc0478) SHA1(2bf998471ef86bccc45332551738b5fc3f70d188) ) @@ -765,18 +1003,24 @@ ROM_END // Gaminator 17 ROM_START( gamt17 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1792_@1_5.5-10.rom", 0x0000000, 0x4000000, CRC(8da74797) SHA1(f7a654682e870169d1ce2901ac61d2f60ae2d568) ) // V5.5-10 May 29 2006 ROM_LOAD( "gamtor1792_@2_5.5-10.rom", 0x4000000, 0x4000000, CRC(9348cb69) SHA1(604060ad6fb2d37cf3d449390e5cfb685d74b11d) ) ROM_END ROM_START( gamt17a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1794_@1_5.5-10.rom", 0x0000000, 0x4000000, CRC(cb88109a) SHA1(c059553c7ce19766007a669b21994b7c81cf320d) ) // V5.5-10 May 29 2006 ROM_LOAD( "gamtor1794_@2_5.5-10.rom", 0x4000000, 0x4000000, CRC(9348cb69) SHA1(604060ad6fb2d37cf3d449390e5cfb685d74b11d) ) ROM_END ROM_START( gamt17b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1794_@1_5.6-0", 0x0000000, 0x4000000, CRC(ce6bc732) SHA1(b745938bbcb2dcb6a8ac3d7f46f9919124d9e7ed) ) // V5.6-0 Sep 04 2006 ROM_LOAD( "gamtor1794_@2_5.6-0", 0x4000000, 0x4000000, CRC(120f4c40) SHA1(f2450dd1ed2127a4005510baedf5781100556e26) ) @@ -785,18 +1029,24 @@ ROM_END // Gaminator 18 ROM_START( gamt18 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "18_94_5-5-10_1", 0x0000000, 0x4000000, CRC(c054009f) SHA1(b75b339ae06b005fcd0c78302aceaf64069a6345) ) // V5.5-10 Jun 19 2006 ROM_LOAD( "18_94_5-5-10_2", 0x4000000, 0x4000000, CRC(2d798567) SHA1(8e6d36d1d5ae04d7c1bb48d816a865fa074fc24e) ) ROM_END ROM_START( gamt18a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g18_96_5.6-0_1.bin", 0x0000000, 0x4000000, CRC(ba25423d) SHA1(455e187c9da7d9c38517794069aa43841af39b96) ) // V5.6.0 Sep 20 2006 ROM_LOAD( "g18_96_5.6-0_2.bin", 0x4000000, 0x4000000, CRC(e82c1bd5) SHA1(1dfde1185fc9a4a717529fcbd841f6a9bed3e8cc) ) ROM_END ROM_START( gamt18b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g18_94_5-6-0_1", 0x0000000, 0x4000000, CRC(ed7c9cc2) SHA1(558385c03f575b217ca8ba7cbc37603bd7b70fb5) ) // V5.6-0 Sep 20 2006 ROM_LOAD( "g18_94_5-6-0_2", 0x4000000, 0x4000000, CRC(e82c1bd5) SHA1(1dfde1185fc9a4a717529fcbd841f6a9bed3e8cc) ) @@ -809,12 +1059,16 @@ ROM_START( gamt18bmult ) ROM_END ROM_START( gamt18c ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor18_94_5.6-5@1.rom", 0x0000000, 0x4000000, CRC(2095957f) SHA1(a0ae6275875cd77999e105a88c0a8334efc2dd53) ) // 5.6-5 Mar 16 2007 ROM_LOAD( "gamtor18_94_5.6-5@2.rom", 0x4000000, 0x4000000, CRC(892bbcb3) SHA1(7dd6a37ce1cb4371c00915ef5a61eef96385ccd1) ) ROM_END ROM_START( gamt18d ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor18_92_5.6-5@1.rom", 0x0000000, 0x4000000, CRC(c8e6154d) SHA1(60c46196f0f9192717a01acab87304af3600e37c) ) // V5.6-5 Mar 16 2007 ROM_LOAD( "gamtor18_92_5.6-5@2.rom", 0x4000000, 0x4000000, CRC(892bbcb3) SHA1(7dd6a37ce1cb4371c00915ef5a61eef96385ccd1) ) @@ -823,6 +1077,8 @@ ROM_END // Gaminator 19 ROM_START( gamt19 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor1994_5.6-0@1.rom", 0x0000000, 0x4000000, CRC(a3bc17c4) SHA1(ce1e0efb578c5de9e4f27f60a30cd291071568aa) ) // V5.6-0 Aug 02 2006 ROM_LOAD( "gamtor1994_5.6-0@2.rom", 0x4000000, 0x4000000, CRC(91093b37) SHA1(2fa01f2a88534afd55dcc96357ab388e58dd297e) ) @@ -835,6 +1091,8 @@ ROM_START( gamt19mult ) ROM_END ROM_START( gamt19a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor19_94_5.6-5@1.rom", 0x0000000, 0x4000000, CRC(84f480ad) SHA1(aafd1264bed9f97ccc359343a202c6a9783dca27) ) // V5.6-5 Mar 19 2007 ROM_LOAD( "gamtor19_94_5.6-5@2.rom", 0x4000000, 0x4000000, CRC(33ca96d6) SHA1(a2129be5a352a92e2ee38ca535616506a07dd73b) ) @@ -843,18 +1101,24 @@ ROM_END // Gaminator 20 ROM_START( gamt20 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g20-560-1", 0x0000000, 0x4000000, CRC(c9108625) SHA1(169282339216408930f6c43e9e0002e3a26f27b9) ) // V5.6-0 Oct 09 2006 ROM_LOAD( "g20-560-2", 0x4000000, 0x4000000, CRC(bc5ba9aa) SHA1(ef37163192dcf26b03469d0f2579c817c2a3bc54) ) ROM_END ROM_START( gamt20a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g20_94_5.6-5_@1", 0x0000000, 0x4000000, CRC(efb1d6ad) SHA1(0dbbed1f4561c85fa6388dde5e7cc8dcaad80e2b) ) // V5.6-5 Apr 02 2007 ROM_LOAD( "g20_94_5.6-5_@2", 0x4000000, 0x4000000, CRC(560fe75b) SHA1(721d677140eec884571f629aa07538cd3183cb40) ) ROM_END ROM_START( gamt20b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2092v5.6-5_@1.bin", 0x0000000, 0x4000000, CRC(07c2569f) SHA1(b335f6b7ff89ebfdee0cbb21fffedfa04336a85f) ) // v5.6-5 Apr 02 2007 ROM_LOAD( "gamtor2092v5.6-5_@2.bin", 0x4000000, 0x4000000, CRC(560fe75b) SHA1(721d677140eec884571f629aa07538cd3183cb40) ) @@ -863,12 +1127,16 @@ ROM_END // Gaminator 21 ROM_START( gamt21 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor21_92_5.6-5.rom1", 0x0000000, 0x4000000, CRC(e0de022f) SHA1(a29107ee906883cabe0a31be843c20b29541846a) ) // V5.6-5 Feb 26 2007 ROM_LOAD( "gamtor21_9x_5.6-5.rom2", 0x4000000, 0x4000000, CRC(c8e6674f) SHA1(0d7fd9489d32faf831f16da79151c7ad0a123287) ) ROM_END ROM_START( gamt21a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor21_94_5.6-5.rom1", 0x0000000, 0x4000000, CRC(08ad821d) SHA1(23907398ea83f1ce5c705582f2138e6e8e08f011) ) // V5.6-5 Feb 26 2007 ROM_LOAD( "gamtor21_9x_5.6-5.rom2", 0x4000000, 0x4000000, CRC(c8e6674f) SHA1(0d7fd9489d32faf831f16da79151c7ad0a123287) ) @@ -883,12 +1151,16 @@ ROM_END // Gaminator 22 ROM_START( gamt22 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2290_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(3b1a6e9d) SHA1(f7c5225195427acd350c5c281708f60a7f0e20cb) ) // V5.6-5 Mar 06 2007 ROM_LOAD( "gamtor2290_@2_5.6-5.rom", 0x4000000, 0x4000000, CRC(d64140fc) SHA1(13324082b13beb5f72485fdf5f66ed4323ce94aa) ) ROM_END ROM_START( gamt22a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2292_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(bec1afe1) SHA1(2304aac2aacd78358c12ed3a797c7cda36990324) ) // V5.6-5 Mar 06 2007 ROM_LOAD( "gamtor2292_@2_5.6-5.rom", 0x4000000, 0x4000000, CRC(d64140fc) SHA1(13324082b13beb5f72485fdf5f66ed4323ce94aa) ) @@ -901,6 +1173,8 @@ ROM_START( gamt22amult ) ROM_END ROM_START( gamt22b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2294_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(56b22fd3) SHA1(aac67a6d20889ad69a567aa7f0ea71a89e2b5591) ) // V5.6-5 Mar 06 2007 ROM_LOAD( "gamtor2294_@2_5.6-5.rom", 0x4000000, 0x4000000, CRC(d64140fc) SHA1(13324082b13beb5f72485fdf5f66ed4323ce94aa) ) @@ -909,18 +1183,24 @@ ROM_END // Gaminator 23 ROM_START( gamt23 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2390_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(45008770) SHA1(67e49d4055c1b79adef052d97fa0e59cc1031330) ) // V5.6-5 Apr 24 2007 ROM_LOAD( "gamtor2390_@2_5.6-5.rom", 0x4000000, 0x4000000, CRC(be9c9b96) SHA1(9e6b2d97b14fa5bf94cacf2b658b5d85f6a3dd5f) ) ROM_END ROM_START( gamt23a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2392_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(c0db460c) SHA1(8835f7fb7397a2712481ee1701283a97e3a785e6) ) // V5.6-5 Apr 24 2007 ROM_LOAD( "gamtor2392_@2_5.6-5.rom", 0x4000000, 0x4000000, CRC(be9c9b96) SHA1(9e6b2d97b14fa5bf94cacf2b658b5d85f6a3dd5f) ) ROM_END ROM_START( gamt23b ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "gamtor2394_@1_5.6-5.rom", 0x0000000, 0x4000000, CRC(28a8c63e) SHA1(1970ac0bf6f63c495c77d758e2ca9fb919b5b80e) ) // V5.6-5 Apr 24 2007 ROM_LOAD( "gamtor2394_@2_5.6-5.rom", 0x4000000, 0x4000000, CRC(be9c9b96) SHA1(9e6b2d97b14fa5bf94cacf2b658b5d85f6a3dd5f) ) @@ -929,12 +1209,16 @@ ROM_END // Gaminator 29 ROM_START( gamt29 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g29-5-6-8-92-1", 0x0000000, 0x4000000, CRC(d64043ce) SHA1(ea00e85206b49842436453d323384f6b42981c96) ) // V5.6-8 Jun 29 2007 ROM_LOAD( "g29-5-6-8-92-2", 0x4000000, 0x4000000, CRC(6a441fb3) SHA1(a986873b378e51b698812e3f5a6c23075e061d49) ) ROM_END ROM_START( gamt29a ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g29-5-6-8-94-1", 0x0000000, 0x4000000, CRC(3e33c3fc) SHA1(c536b3df0e673ed7eacaf9ac57dbaa54af22257e) ) // V5.6-8 Jun 29 2007 ROM_LOAD( "g29-5-6-8-94-2", 0x4000000, 0x4000000, CRC(6a441fb3) SHA1(a986873b378e51b698812e3f5a6c23075e061d49) ) @@ -943,6 +1227,8 @@ ROM_END // Gaminator 30 ROM_START( gamt30 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g30v5.6-10@1.rom", 0x0000000, 0x4000000, CRC(e4d5dcce) SHA1(417169de53c7d9110968d087cfe5d611f6875fcc) ) // V5.6-10 Dec 14 2007 ROM_LOAD( "g30v5.6-10@2.rom", 0x4000000, 0x4000000, CRC(f5d15593) SHA1(4268115dbbbb710dcfb511d4ed4eccc6b382a9c8) ) @@ -951,6 +1237,8 @@ ROM_END // Gaminator 31 ROM_START( gamt31 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "g31v5.6-10@1.rom", 0x0000000, 0x4000000, CRC(770a3c19) SHA1(082a5e4d4d11803cde1981c3201a6b174b4d86ea) ) // V5.6-10 Dec 13 2007 ROM_LOAD( "g31v5.6-10@2.rom", 0x4000000, 0x4000000, CRC(88107247) SHA1(d9c2eabc0d92b7e8b93923fe053c7b0a93c28e76) ) @@ -965,6 +1253,8 @@ ROM_END // Hot Spot 2 ROM_START( hspot2 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "hotspot494v5.6-5@1", 0x0000000, 0x4000000, CRC(04f482a5) SHA1(84ab552cd7c776b70889249a9809008584c6de6c) ) ROM_LOAD( "hotspot494v5.6-5@2", 0x4000000, 0x4000000, CRC(99e58027) SHA1(c78f019b843d39f45c58c77295e19d07ff6f251d) ) @@ -973,6 +1263,8 @@ ROM_END // Hot Spot 3 ROM_START( hspot3 ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "hs3_5425_94_1", 0x0000000, 0x4000000, CRC(5265a518) SHA1(fc60aa91716c583a63984f7f68fe9a1c1834834e) ) ROM_LOAD( "hs3_5425_94_2", 0x4000000, 0x4000000, CRC(b499c667) SHA1(58dd6cf2a4564cf7867ac72308c84310f918ca88) ) @@ -981,6 +1273,8 @@ ROM_END // Mega Katok 2 ROM_START( megakat ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "megakatok2_94_5.6-0_@1.rom", 0x0000000, 0x4000000, CRC(39ef31ec) SHA1(7a04c15d37b2921a475294dd9e474be4c2a1a0db) ) ROM_LOAD( "megakatok2_94_5.6-0_@2.rom", 0x4000000, 0x4000000, CRC(d2024952) SHA1(fcc1c7574eeef0ae26ba80d30fac3e74b8a9dbf2) ) @@ -1115,26 +1409,36 @@ ROM_END // Ancient Atlantis ROM_START( ancienta ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "atlantis92_5.3-15", 0x0000, 0x2000000, CRC(f26a6465) SHA1(6586b5f2c5c36369371963259bd60abb6867fe2f) ) ROM_END ROM_START( ancientaa ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "atlantis92_v5.4-25.rom", 0x0000, 0x2000000, CRC(c42388f5) SHA1(631e7d1498dc92a54e2979f3fdac936b4f9dc5b4) ) ROM_END ROM_START( ancientab ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "atlantis94_v5.3-17.rom", 0x0000, 0x2000000, CRC(dd602a91) SHA1(8c33aa21336464b9192a680b0e6fb71bcc434a74) ) ROM_END ROM_START( ancientac ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "atlantis96_5.3-17.rom", 0x0000, 0x2000000, CRC(b40e6228) SHA1(884f2b589da1091a5036fe82b884afbb2d1e1e21) ) ROM_END ROM_START( ancientad ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "atlantis96-v5.4-16.rom", 0x0000, 0x2000000, CRC(cd9d4e3c) SHA1(8304fce99bc0787f0596cb8d4a80f9e737d37379) ) ROM_END @@ -1142,11 +1446,15 @@ ROM_END // Bananas Go Bahamas ROM_START( bananas ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "banana92.rom", 0x0000, 0x2000000, CRC(52d3a923) SHA1(0aa0a2d3cafaa19a4672ac2d34d5442ce238e179) ) ROM_END ROM_START( bananasa ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "banana94.rom", 0x0000, 0x2000000, CRC(ecdac445) SHA1(a50225a4d3208b622847ec22daaaff392c064f4f) ) ROM_END @@ -1154,31 +1462,43 @@ ROM_END // Bee Bop ROM_START( beebop ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bbop92_5-3-15.rom", 0x0000, 0x2000000, CRC(6f631553) SHA1(77198b400c05cdb935243dc5efa9258f4bd84bea) ) ROM_END ROM_START( beebopa ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bbop92_v5.3-17.rom", 0x0000, 0x2000000, CRC(e9dd757d) SHA1(c360fa091675e0381d811d29d4437a31bd427341) ) ROM_END ROM_START( beebopb ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bbop92_5.4-17.rom", 0x0000, 0x2000000, CRC(cf664e8c) SHA1(679ce902be99776b6a82fb40d7e3ea27d9fb576c) ) ROM_END ROM_START( beebopc ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bbop94_5.3-17.rom", 0x0000, 0x2000000, CRC(989441e5) SHA1(b4a5cd4ff7daba87f94c0a22730ad84540d64678) ) ROM_END ROM_START( beebopd ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bbop96_5.3-17.rom", 0x0000, 0x2000000, CRC(f1fa095c) SHA1(fcc0be64a9b2258c8ee7f6521c49dcc75a9cbf63) ) ROM_END ROM_START( beebope ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bbop96-v5.4-20.rom", 0x0000, 0x2000000, CRC(cef0508a) SHA1(61603cd9ed4ef3196d8558a4c9b0af837b6e2f78) ) ROM_END @@ -1186,26 +1506,36 @@ ROM_END // Beetlemania ROM_START( beetlem ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "beetle90_5_0_21.rom", 0x0000, 0x1000000, CRC(fe6e8595) SHA1(ec590fd981ae8cb59a65cbfdf53dff6387abde94) ) ROM_END ROM_START( beetlema ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "beetle92_5.3-17.rom", 0x0000, 0x1000000, CRC(a446abb0) SHA1(f57be7716df8af073de2b1e92278be7b3ee58141) ) ROM_END ROM_START( beetlemb ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "beetle94_5.3-17.rom", 0x0000, 0x1000000, CRC(bf6df189) SHA1(a60becf235bf0f0dc5336cfc616e1f684e597a7e) ) ROM_END ROM_START( beetlemc ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "beetle96_5.2-12.rom", 0x0000, 0x1000000, CRC(201eb20d) SHA1(d65db2bbad2546b6a15cb950bbc55bba9ed02688) ) ROM_END ROM_START( beetlemd ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "beetle96_5.3-17.rom", 0x0000, 0x1000000, CRC(5f9433e0) SHA1(0b6d53a6feb31a28f30029cad3626a71c2d46c1f) ) ROM_END @@ -1213,12 +1543,16 @@ ROM_END // Bungee Monkey ROM_START( bungeem ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bm92_1", 0x000000, 0x2000000, CRC(b7beae4d) SHA1(42f93a50daf8cf0e4a31ba5e72732d8c0fd611c9) ) ROM_LOAD( "bm92_2", 0x2000000, 0x1000000, CRC(3598cdc8) SHA1(5cf8e8d6df031dac0f3894d2a9964640d65612e8) ) ROM_END ROM_START( bungeema ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bmonkey96@1_5.4-18.rom", 0x000000, 0x2000000, CRC(db3aeef4) SHA1(3edf6d46c92631e87922b7d8b36ffb7dd66b7068) ) ROM_LOAD( "bmonkey96@2_5.4-18.rom", 0x2000000, 0x1000000, CRC(3598cdc8) SHA1(5cf8e8d6df031dac0f3894d2a9964640d65612e8) ) @@ -1227,6 +1561,8 @@ ROM_END // Book of Ra ROM_START( bookra ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bookra94_v5.5-6_@1.bin", 0x0000000, 0x4000000, CRC(a1576b33) SHA1(6820759f11e1946cb2b3d89f3d7c72835e487ad1) ) ROM_END @@ -1234,6 +1570,8 @@ ROM_END // Banana Splash ROM_START( bsplash ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "bsplash92.rom", 0x0000, 0x2000000, CRC(5111ab61) SHA1(22b44c92ab7239c1f7c18b47aea2d832c1282b1b) ) ROM_END @@ -1241,6 +1579,8 @@ ROM_END // Chilli Con Cash ROM_START( chillicc ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "chilli94_5.4-25.rom", 0x0000, 0x2000000, CRC(888bfc9f) SHA1(e5549229c5d324980bfb1970b67763a705793763) ) ROM_END @@ -1249,36 +1589,50 @@ ROM_END // Columbus ROM_START( columbus ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus90_5_3_15.rom", 0x0000, 0x2000000, CRC(05cfb9d7) SHA1(1702bdce819f577925a51e9427753142d4a1eaa1) ) ROM_END ROM_START( columbusa ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus92_5.3-17.rom", 0x0000, 0x2000000, CRC(ee67e20b) SHA1(5e86f475497321f43757d54bcbec744221163cbd) ) ROM_END ROM_START( columbusb ) // bad or scrambled + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus92_5.4-16bad.rom", 0x0000, 0x2000000, CRC(9bda2044) SHA1(c6d974dba387a9a50b51b51942179276b807cc03) ) ROM_END ROM_START( columbusc ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus94_5.3-17.rom", 0x0000, 0x2000000, CRC(9f2ed693) SHA1(ecc3e9ad207fc883efeb40e87f7de81a5d8db390) ) ROM_END ROM_START( columbusd ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus94_5.5.-9.rom", 0x0000, 0x2000000, CRC(e05dff9c) SHA1(260eaf580786d6186668bdf2267d3bc253158dbe) ) ROM_END ROM_START( columbuse ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus96_5.3-17.rom", 0x0000, 0x2000000, CRC(f6409e2a) SHA1(1766b8cc2662929e0af3781a6ec8571e628be7cd) ) ROM_END ROM_START( columbusf ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "columbus96-v5.4-18.demo.rom", 0x0000, 0x2000000, CRC(cf3b305d) SHA1(3f9816dde3857fa6f8f50644b17ec2b45cbb878c) ) ROM_END @@ -1286,6 +1640,8 @@ ROM_END // Diamond Trio ROM_START( ditrio ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "dtrio_96_5.5-10.rom", 0x0000, 0x2000000, CRC(689b5220) SHA1(1daefb9b7d597d6e35afd598fe3e5737afc53639) ) ROM_END @@ -1293,6 +1649,8 @@ ROM_END // Dolphin's Pearl ROM_START( dolphinp ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "dpearl96_v5.4-16.rom", 0x0000, 0x1000000, CRC(93a015ec) SHA1(6bbf87c8762e04d20710337c1b3a4378360c1d68) ) ROM_END @@ -1300,11 +1658,15 @@ ROM_END // The Euro Game ROM_START( eurogame ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "euro96v5.5-10.rom", 0x0000, 0x2000000, CRC(f08cb518) SHA1(b3f2f454c993a04aedf563cbf75fd96df68318ba) ) ROM_END ROM_START( eurogamea ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "32mb_eurogame94_", 0x0000, 0x2000000, CRC(f55bcd7f) SHA1(04171cfbd2e2557436ed1485ff389e4b359b1161) ) ROM_END @@ -1312,6 +1674,8 @@ ROM_END // First Class Traveller ROM_START( firstcl ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "fclass_96_5.5-10.rom", 0x0000, 0x2000000, CRC(7729061e) SHA1(1e0e3e7c4478edc5cdbf0d13a974e5b6eeef2d67) ) ROM_END @@ -1319,11 +1683,15 @@ ROM_END // Lucky Lady's Charm ROM_START( llcharm ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "llady94,v5.4-23 7733.bin", 0x0000, 0x2000000, CRC(45fbeb06) SHA1(7ff1df04620bd9e9afd965736c3eff60ac11f409) ) ROM_END ROM_START( llcharma ) + COOLFIRE_BASE_ROMS + ROM_REGION( 0x8000000, "maincpu", ROMREGION_ERASEFF ) ROM_LOAD( "llc_92_5.6-0", 0x0000, 0x2000000, CRC(c8c2a5d3) SHA1(ec23eff63871cc515ec58a894446d4d639d864e4) ) ROM_END @@ -1357,15 +1725,15 @@ GAME( 2002?, gamt1b, gamt1, gaminator, gaminator, gaminator_state, init_ GAME( 2002?, gamt1lotc, gamt1, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "bootleg", "Gaminator 1 (bootleg, C-Loto)", GAME_FLAGS ) GAME( 2002?, gamt1ent, gamt1, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "bootleg", "Gaminator 1 (bootleg, Ent)", GAME_FLAGS ) -GAME( 2002?, gamt4, 0, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 1)", GAME_FLAGS ) -GAME( 2002?, gamt4a, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 2)", GAME_FLAGS ) -GAME( 2002?, gamt4b, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 3)", GAME_FLAGS ) -GAME( 2002?, gamt4c, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 4)", GAME_FLAGS ) -GAME( 2002?, gamt4d, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 5)", GAME_FLAGS ) -GAME( 2002?, gamt4e, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 6)", GAME_FLAGS ) -GAME( 2002?, gamt4f, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 7)", GAME_FLAGS ) -GAME( 2002?, gamt4g, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 8)", GAME_FLAGS ) -GAME( 2002?, gamt4h, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 9)", GAME_FLAGS ) +GAME( 2002?, gamt4, 0, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 1)", GAME_FLAGS ) +GAME( 2002?, gamt4a, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 2)", GAME_FLAGS ) +GAME( 2002?, gamt4b, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 3)", GAME_FLAGS ) +GAME( 2002?, gamt4c, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 4)", GAME_FLAGS ) +GAME( 2002?, gamt4d, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 5)", GAME_FLAGS ) +GAME( 2002?, gamt4e, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 6)", GAME_FLAGS ) +GAME( 2002?, gamt4f, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 7)", GAME_FLAGS ) +GAME( 2002?, gamt4g, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 8)", GAME_FLAGS ) +GAME( 2002?, gamt4h, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 9)", GAME_FLAGS ) GAME( 2002?, gamt4i, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 10)", GAME_FLAGS ) GAME( 2002?, gamt4j, gamt4, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 4 (set 11)", GAME_FLAGS ) @@ -1415,15 +1783,15 @@ GAME( 2002?, gamt9a, gamt9, gaminator, gaminator, gaminator_state, init_ GAME( 2002?, gamt9lotc, gamt9, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "bootleg", "Gaminator 9 (bootleg, C-Loto)", GAME_FLAGS ) -GAME( 2002?, gamt10, 0, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 1)", GAME_FLAGS ) -GAME( 2002?, gamt10a, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 2)", GAME_FLAGS ) -GAME( 2002?, gamt10b, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 3)", GAME_FLAGS ) -GAME( 2002?, gamt10c, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 4)", GAME_FLAGS ) -GAME( 2002?, gamt10d, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 5)", GAME_FLAGS ) -GAME( 2002?, gamt10e, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 6)", GAME_FLAGS ) -GAME( 2002?, gamt10f, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 7)", GAME_FLAGS ) -GAME( 2002?, gamt10g, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 8)", GAME_FLAGS ) -GAME( 2002?, gamt10h, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 9)", GAME_FLAGS ) +GAME( 2002?, gamt10, 0, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 1)", GAME_FLAGS ) +GAME( 2002?, gamt10a, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 2)", GAME_FLAGS ) +GAME( 2002?, gamt10b, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 3)", GAME_FLAGS ) +GAME( 2002?, gamt10c, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 4)", GAME_FLAGS ) +GAME( 2002?, gamt10d, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 5)", GAME_FLAGS ) +GAME( 2002?, gamt10e, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 6)", GAME_FLAGS ) +GAME( 2002?, gamt10f, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 7)", GAME_FLAGS ) +GAME( 2002?, gamt10g, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 8)", GAME_FLAGS ) +GAME( 2002?, gamt10h, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 9)", GAME_FLAGS ) GAME( 2002?, gamt10i, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 10)", GAME_FLAGS ) GAME( 2002?, gamt10j, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 11)", GAME_FLAGS ) GAME( 2002?, gamt10k, gamt10, gaminator, gaminator, gaminator_state, init_gaminator, ROT0, "Novotech", "Gaminator 10 (set 12)", GAME_FLAGS ) From 95b09e28284af77e0e60631171a49f2097e22345 Mon Sep 17 00:00:00 2001 From: Angelo Salese Date: Tue, 17 Mar 2026 14:13:19 +0100 Subject: [PATCH 296/351] intel/i420ex.cpp: initial Aries chipset check-in (#15110) * Initial check-in of CL-GD5434 "Alpine" based PCI cards; * Initial check-in of Intel 82091AA AIP Super I/O; --- scripts/src/bus.lua | 2 + scripts/src/machine.lua | 16 + src/devices/bus/pci/clgd543x_alpine.cpp | 180 ++++++++++ src/devices/bus/pci/clgd543x_alpine.h | 43 +++ src/devices/bus/pci/clgd5446.h | 2 +- src/devices/bus/pci/clgd546x_laguna.cpp | 59 --- src/devices/bus/pci/pci_slot.cpp | 2 + src/devices/machine/i82091aa.cpp | 458 ++++++++++++++++++++++++ src/devices/machine/i82091aa.h | 95 +++++ src/devices/machine/i82425ex_psc.cpp | 440 +++++++++++++++++++++++ src/devices/machine/i82425ex_psc.h | 94 +++++ src/devices/machine/i82426ex_ib.cpp | 333 +++++++++++++++++ src/devices/machine/i82426ex_ib.h | 96 +++++ src/mame/ibm/ptpc110.cpp | 2 +- src/mame/intel/i420ex.cpp | 176 +++++++-- src/mame/pc/README.md | 1 + 16 files changed, 1907 insertions(+), 92 deletions(-) create mode 100644 src/devices/bus/pci/clgd543x_alpine.cpp create mode 100644 src/devices/bus/pci/clgd543x_alpine.h create mode 100644 src/devices/machine/i82091aa.cpp create mode 100644 src/devices/machine/i82091aa.h create mode 100644 src/devices/machine/i82425ex_psc.cpp create mode 100644 src/devices/machine/i82425ex_psc.h create mode 100644 src/devices/machine/i82426ex_ib.cpp create mode 100644 src/devices/machine/i82426ex_ib.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index 14e5122e1a8..cfa46f34c0a 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -4436,6 +4436,8 @@ if BUSES["PCI"] then MAME_DIR .. "src/devices/bus/pci/aha2940au.h", MAME_DIR .. "src/devices/bus/pci/audiowerk2.cpp", MAME_DIR .. "src/devices/bus/pci/audiowerk2.h", + MAME_DIR .. "src/devices/bus/pci/clgd543x_alpine.cpp", + MAME_DIR .. "src/devices/bus/pci/clgd543x_alpine.h", MAME_DIR .. "src/devices/bus/pci/clgd5446.cpp", MAME_DIR .. "src/devices/bus/pci/clgd5446.h", MAME_DIR .. "src/devices/bus/pci/clgd546x_laguna.cpp", diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index b3a9eeefc3b..acf008b9c2b 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2898,6 +2898,10 @@ if MACHINES["PCI"] then MAME_DIR .. "src/devices/machine/i82875p.h", MAME_DIR .. "src/devices/machine/i6300esb.cpp", MAME_DIR .. "src/devices/machine/i6300esb.h", + MAME_DIR .. "src/devices/machine/i82425ex_psc.cpp", + MAME_DIR .. "src/devices/machine/i82425ex_psc.h", + MAME_DIR .. "src/devices/machine/i82426ex_ib.cpp", + MAME_DIR .. "src/devices/machine/i82426ex_ib.h", MAME_DIR .. "src/devices/machine/i82439hx.cpp", MAME_DIR .. "src/devices/machine/i82439hx.h", MAME_DIR .. "src/devices/machine/i82439tx.cpp", @@ -4622,6 +4626,18 @@ if MACHINES["FDC37C93X"] then } end +--------------------------------------------------- +-- +--@src/devices/machine/i82091aa.h,MACHINES["I82091AA"] = true +--------------------------------------------------- + +if MACHINES["I82091AA"] then + files { + MAME_DIR .. "src/devices/machine/i82091aa.cpp", + MAME_DIR .. "src/devices/machine/i82091aa.h", + } +end + --------------------------------------------------- -- --@src/devices/machine/it8671f.h,MACHINES["IT8671F"] = true diff --git a/src/devices/bus/pci/clgd543x_alpine.cpp b/src/devices/bus/pci/clgd543x_alpine.cpp new file mode 100644 index 00000000000..4376bfb873a --- /dev/null +++ b/src/devices/bus/pci/clgd543x_alpine.cpp @@ -0,0 +1,180 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +/************************************************************************************************** + +Cirrus Logic CL-GD5430/-34/-36/-40 "Alpine" + +**************************************************************************************************/ + +#include "emu.h" +#include "clgd543x_alpine.h" + +#include "screen.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(GD5434_PCI, cirrus_gd5434_pci_device, "clgd5434_pci", "Cirrus Logic GD5434 card") + +cirrus_gd5434_pci_device::cirrus_gd5434_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : pci_card_device(mconfig, GD5434_PCI, tag, owner, clock) + , m_vga(*this, "vga") + , m_bios(*this, "bios") +{ + // device IDs: + // (*) denotes stuff not from manual but from pciids + // - 00a0 for '30 + // * 00a2 for '32 + // * 00a4 for '34-4 + // - 00a8 for '34-[8] + // - 00ac for '36 + // - 00a0 for '40 (for Alpine version?) + // * 00b0 for '40 (non-Alpine?) + set_ids(0x101300a8, 0x00, 0x030000, 0x00000000); +} + +ROM_START( gd5434 ) + // PCI card CL543XPCI Ver 4.0 - ROM: CL-GD543x PCI VGA BIOS Version 1.10B - RAM: 1MB, 2MB or 4MB - Chip: CL-GD5430-0C-C - OSC: 14.318 MHz - Connector: DB15 + // VESA feature connector - Jumpers: IRQ9 enable/disable, Green control + ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) + ROM_DEFAULT_BIOS("122") + ROM_SYSTEM_BIOS(0, "110b", "PCI VGA BIOS Version 1.10B") + ROMX_LOAD("cl543x_pci_rev4.bin", 0x00000, 0x8000, CRC(553171a3) SHA1(b72edc318710c46c9cb280e9b1b3c9f8a34844f2), ROM_BIOS(0) ) + ROM_IGNORE( 0x8000 ) + ROM_SYSTEM_BIOS(1, "100e", "PCI VGA BIOS Version 1.00e") + ROMX_LOAD("cirrus5434.bin", 0x00000, 0x8000, CRC(bc271648) SHA1(08afd4468c4c1a1630a200de1007b1671f109b3c), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS(2, "122", "PCI VGA BIOS Version 1.22") + ROMX_LOAD("gd5434pci.bin", 0x00000, 0x8000, CRC(fa76dabf) SHA1(0310ef02df941e7d35e1d832400e2e4dd07d6309), ROM_BIOS(2) ) + ROM_SYSTEM_BIOS(3, "110b_jap", "PCI VGA BIOS Version 1.10B Japan chip") + ROMX_LOAD("japan.bin", 0x00000, 0x8000, CRC(46fe9efa) SHA1(58712b00faf102509c4129c0babeb98df2b6e042), ROM_BIOS(3) ) +// ROM_SYSTEM_BIOS(4, "124", "CL-GD543x PCI VGA BIOS Version 1.24") +// ROMX_LOAD("1.24.bin", 0x00000,0x8000, CRC(174fa427) SHA1(3e490f3cc3af33dbfac6ff3ddac5e90bdc895646), ROM_BIOS(4) ) +ROM_END + +const tiny_rom_entry *cirrus_gd5434_pci_device::device_rom_region() const +{ + return ROM_NAME(gd5434); +} + +void cirrus_gd5434_pci_device::device_add_mconfig(machine_config &config) +{ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480); + screen.set_screen_update(m_vga, FUNC(cirrus_gd5430_vga_device::screen_update)); + + // TODO: '34 + CIRRUS_GD5430_VGA(config, m_vga, 0); + m_vga->set_screen("screen"); + // 1MB or 2MB, max 4MB + m_vga->set_vram_size(2*1024*1024); +} + +void cirrus_gd5434_pci_device::device_start() +{ + pci_device::device_start(); + + // TODO: can be M_PREF in '30/'40 + add_map( 4*1024*1024, M_MEM, FUNC(cirrus_gd5434_pci_device::vram_aperture_map)); + // TODO: BAR1 available on '30/'40 with pull-down option in MD51 +// add_map( 512, M_MEM, FUNC(cirrus_gd5434_pci_device::mmio_map)); + + add_rom((u8 *)m_bios->base(), 0x8000); + expansion_rom_base = 0xc0000; + + // INTA# + // TODO: MD62 pull-down option + intr_pin = 1; +} + +void cirrus_gd5434_pci_device::device_reset() +{ + pci_device::device_reset(); + + command = 0x0000; + command_mask = 0x0023; + // fast DEVSEL# + status = 0x0000; + + remap_cb(); +} + +void cirrus_gd5434_pci_device::config_map(address_map &map) +{ + pci_device::config_map(map); +} + +void cirrus_gd5434_pci_device::vram_aperture_map(address_map &map) +{ + map(0x000000, 0x3fffff).rw(m_vga, FUNC(cirrus_gd5430_vga_device::mem_linear_r), FUNC(cirrus_gd5430_vga_device::mem_linear_w)); +} + +// TODO: this should really be a subclass of VGA +void cirrus_gd5434_pci_device::legacy_memory_map(address_map &map) +{ + map(0xa0000, 0xbffff).rw(FUNC(cirrus_gd5434_pci_device::vram_r), FUNC(cirrus_gd5434_pci_device::vram_w)); +} + +void cirrus_gd5434_pci_device::legacy_io_map(address_map &map) +{ + map(0x03b0, 0x03df).m(m_vga, FUNC(cirrus_gd5430_vga_device::io_map)); +} + +uint8_t cirrus_gd5434_pci_device::vram_r(offs_t offset) +{ + return downcast(m_vga.target())->mem_r(offset); +} + +void cirrus_gd5434_pci_device::vram_w(offs_t offset, uint8_t data) +{ + downcast(m_vga.target())->mem_w(offset, data); +} + +void cirrus_gd5434_pci_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) +{ + if (BIT(command, 1)) + memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(cirrus_gd5434_pci_device::vram_r)), write8sm_delegate(*this, FUNC(cirrus_gd5434_pci_device::vram_w))); + + if (BIT(command, 0)) + io_space->install_device(0x0000, 0xffff, *this, &cirrus_gd5434_pci_device::legacy_io_map); +} + +/* + Cirrus Logic CL-GD54M30 - PCI +ROM_START( clgd54m30 ) + ROM_REGION(0x10000, "clgd54m30", 0) + // Chip: CL-GD54M30-I-QC-A, ROM: 32KB, RAM: 1MB, 2MB, Connector: DB15, VESA veature connector + ROM_SYSTEM_BIOS(0, "version_1.00d", "VGA BIOS Version 1.00d") + ROMX_LOAD("korea.bin", 0x00000, 0x10000, CRC(0870507b) SHA1(b3873cb8834767250fcb7043918a35b1b895b0b1), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS(1, "stlab_ver_1.00d", "STlab Version 1.00d") + ROMX_LOAD("gd54m30stlab.bin", 0x08000, 0x8000, CRC(72116f4e) SHA1(4618640aa0f07586ebab02260fc58aa3035114fb), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS(2, "clgd54m30_ver1.00d", "CL-GD54M30 Ver.1.00d") + ROMX("gd54m30.bin", 0x08000, 0x000, CRC(45a1d9d0) SHA1(0e8a88ff354699bfb75a1de807f2187ff9910c67), ROM_BIOS(2) ) +ROM_END + +*/ + + +/* + Cirrus Logic VL-GD5436 - PCI cards + +//Chip: CL-GD5436-I-QC-A - ROM: CL-GD5436 VL/PCI VGA BIOS Version 1.00b - RAM: 1MB, up to 4MB - Connector: DB15 - VESA connector - OSC: 14.31818MHz +// Jumpers: JG1 Green Control, IRQ9 enable/disable +ROM_START( clgd5436 ) + ROM_REGION(0x08000, "clgd5436", 0) + ROM_LOAD("5436.vbi", 0x00000, 0x08000, CRC(7737d03e) SHA1(e4d0b4e7262887dc5a6473ea8909fdc13a6a02c1) ) +ROM_END + +*/ + +/* + Cirrus Logic CL-GD5440 - PCI cards + +// Chip: Cirrus Logic CL-GD5440-J-QC-B - ROM: CL-GD5440 VGA BIOS Version 1.07 - RAM: 1MB, max. 2MB - OSC:14.31818MHz - Connector: DB15 - VESA connector +ROM_START( clgd5440 ) + ROM_REGION(0x10000, "clgd5440", 0) + ROM_LOAD("bios.bin", 0x00000, 0x10000, CRC(f0d3d0b4) SHA1(620b0727a20b127f5f32576ec54fbc6f9f437ad3) ) +ROM_END +*/ + diff --git a/src/devices/bus/pci/clgd543x_alpine.h b/src/devices/bus/pci/clgd543x_alpine.h new file mode 100644 index 00000000000..6245442c5dc --- /dev/null +++ b/src/devices/bus/pci/clgd543x_alpine.h @@ -0,0 +1,43 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +#ifndef MAME_BUS_PCI_CLGD543X_ALPINE_H +#define MAME_BUS_PCI_CLGD543X_ALPINE_H + +#pragma once + +#include "pci_slot.h" +#include "video/pc_vga_cirrus.h" + +class cirrus_gd5434_pci_device : public pci_card_device +{ +public: + cirrus_gd5434_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + void legacy_memory_map(address_map &map) ATTR_COLD; + void legacy_io_map(address_map &map) ATTR_COLD; + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + + virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; + + virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + + virtual void config_map(address_map &map) override ATTR_COLD; + +// virtual void mmio_map(address_map &map) ATTR_COLD; + void vram_aperture_map(address_map &map) ATTR_COLD; +private: + required_device m_vga; + required_memory_region m_bios; + + u8 vram_r(offs_t offset); + void vram_w(offs_t offset, uint8_t data); +}; + +DECLARE_DEVICE_TYPE(GD5434_PCI, cirrus_gd5434_pci_device) + +#endif // MAME_BUS_PCI_CLGD543X_ALPINE_H diff --git a/src/devices/bus/pci/clgd5446.h b/src/devices/bus/pci/clgd5446.h index 332ff441fbb..b473a26b32b 100644 --- a/src/devices/bus/pci/clgd5446.h +++ b/src/devices/bus/pci/clgd5446.h @@ -44,4 +44,4 @@ private: DECLARE_DEVICE_TYPE(GD5446_PCI, cirrus_gd5446_pci_device) -#endif // MAME_BUS_PCI_CLGD546X_LAGUNA_H +#endif // MAME_BUS_PCI_CLGD5446_H diff --git a/src/devices/bus/pci/clgd546x_laguna.cpp b/src/devices/bus/pci/clgd546x_laguna.cpp index 2e20a559249..779351a33dd 100644 --- a/src/devices/bus/pci/clgd546x_laguna.cpp +++ b/src/devices/bus/pci/clgd546x_laguna.cpp @@ -146,62 +146,3 @@ void cirrus_gd5465_laguna3d_device::map_extra(uint64_t memory_window_start, uint io_space->install_device(0x0000, 0xffff, *this, &cirrus_gd5465_laguna3d_device::legacy_io_map); } } - -/* - Cirrus Logic CL-GD54M30 - PCI -ROM_START( clgd54m30 ) - ROM_REGION(0x10000, "clgd54m30", 0) - // Chip: CL-GD54M30-I-QC-A, ROM: 32KB, RAM: 1MB, 2MB, Connector: DB15, VESA veature connector - ROM_SYSTEM_BIOS(0, "version_1.00d", "VGA BIOS Version 1.00d") - ROMX_LOAD("korea.bin", 0x00000, 0x10000, CRC(0870507b) SHA1(b3873cb8834767250fcb7043918a35b1b895b0b1), ROM_BIOS(0) ) - ROM_SYSTEM_BIOS(1, "stlab_ver_1.00d", "STlab Version 1.00d") - ROMX_LOAD("gd54m30stlab.bin", 0x08000, 0x8000, CRC(72116f4e) SHA1(4618640aa0f07586ebab02260fc58aa3035114fb), ROM_BIOS(1) ) - ROM_SYSTEM_BIOS(2, "clgd54m30_ver1.00d", "CL-GD54M30 Ver.1.00d") - ROMX("gd54m30.bin", 0x08000, 0x000, CRC(45a1d9d0) SHA1(0e8a88ff354699bfb75a1de807f2187ff9910c67), ROM_BIOS(2) ) -ROM_END - -*/ - -/* - Cirrus Logic CL-GD543x - PCI cards - -// PCI card CL543XPCI Ver 4.0 - ROM: CL-GD543x PCI VGA BIOS Version 1.10B - RAM: 1MB, 2MB or 4MB - Chip: CL-GD5430-0C-C - OSC: 14.318 MHz - Connector: DB15 -// VESA feature connector - Jumpers: IRQ9 enable/disable, Green control -ROM_START( clgd543x_pci ) - ROM_REGION(0x08000, "clgd543x_pci", 0) - ROM_SYSTEM_BIOS(0, "pci_version_1.10b", "PCI VGA BIOS Version 1.10B") - ROMX_LOAD("cl543x_pci_rev4.bin", 0x00000, 0x8000, CRC(553171a3) SHA1(b72edc318710c46c9cb280e9b1b3c9f8a34844f2), ROM_BIOS(0) ) - ROM_IGNORE( 0x8000 ) - ROM_SYSTEM_BIOS(1, "pci_version_1.00e", "PCI VGA BIOS Version 1.00e") - ROMX_LOAD("cirrus5434.bin", 0x00000, 0x8000, CRC(bc271648) SHA1(08afd4468c4c1a1630a200de1007b1671f109b3c), ROM_BIOS(1) ) - ROM_SYSTEM_BIOS(2, "pci_version_1.22", "PCI VGA BIOS Version 1.22") - ROMX_LOAD("gd5434pci.bin", 0x00000, 0x8000, CRC(fa76dabf) SHA1(0310ef02df941e7d35e1d832400e2e4dd07d6309), ROM_BIOS(2) ) - ROM_SYSTEM_BIOS(3, "pci_ver_1.10b_jap", "PCI VGA BIOS Version 1.10B Japan chip") - ROMX_LOAD("japan.bin", 0x00000, 0x8000, CRC(46fe9efa) SHA1(58712b00faf102509c4129c0babeb98df2b6e042), ROM_BIOS(3) ) - ROM_SYSTEM_BIOS(4, "gd5434pciv124", "CL-GD543x PCI VGA BIOS Version 1.24") - ROMX_LOAD("1.24.bin", 0x00000,0x8000, CRC(174fa427) SHA1(3e490f3cc3af33dbfac6ff3ddac5e90bdc895646), ROM_BIOS(4) ) -ROM_END - -*/ - -/* - Cirrus Logic VL-GD5436 - PCI cards - -//Chip: CL-GD5436-I-QC-A - ROM: CL-GD5436 VL/PCI VGA BIOS Version 1.00b - RAM: 1MB, up to 4MB - Connector: DB15 - VESA connector - OSC: 14.31818MHz -// Jumpers: JG1 Green Control, IRQ9 enable/disable -ROM_START( clgd5436 ) - ROM_REGION(0x08000, "clgd5436", 0) - ROM_LOAD("5436.vbi", 0x00000, 0x08000, CRC(7737d03e) SHA1(e4d0b4e7262887dc5a6473ea8909fdc13a6a02c1) ) -ROM_END - -*/ - -/* - Cirrus Logic CL-GD5440 - PCI cards - -// Chip: Cirrus Logic CL-GD5440-J-QC-B - ROM: CL-GD5440 VGA BIOS Version 1.07 - RAM: 1MB, max. 2MB - OSC:14.31818MHz - Connector: DB15 - VESA connector -ROM_START( clgd5440 ) - ROM_REGION(0x10000, "clgd5440", 0) - ROM_LOAD("bios.bin", 0x00000, 0x10000, CRC(f0d3d0b4) SHA1(620b0727a20b127f5f32576ec54fbc6f9f437ad3) ) -ROM_END -*/ diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp index 3f3dedb7e6d..884c9f712eb 100644 --- a/src/devices/bus/pci/pci_slot.cpp +++ b/src/devices/bus/pci/pci_slot.cpp @@ -8,6 +8,7 @@ #include "aha2940au.h" #include "audiowerk2.h" +#include "clgd543x_alpine.h" #include "clgd5446.h" #include "clgd546x_laguna.h" #include "ds2416.h" @@ -137,6 +138,7 @@ void pci_cards(device_slot_interface &device) device.option_add("virgevx", VIRGEVX_PCI); device.option_add("mga2064w", MGA2064W); device.option_add("promotion3210", PROMOTION3210); + device.option_add("gd5434", GD5434_PCI); device.option_add("gd5446", GD5446_PCI); device.option_add("oti64111", OTI64111_PCI); device.option_add("sis6326_pci", SIS6326_PCI); diff --git a/src/devices/machine/i82091aa.cpp b/src/devices/machine/i82091aa.cpp new file mode 100644 index 00000000000..9c147fc16ad --- /dev/null +++ b/src/devices/machine/i82091aa.cpp @@ -0,0 +1,458 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#include "emu.h" +#include "i82091aa.h" + +#include "formats/naslite_dsk.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(I82091AA, i82091aa_device, "i82091aa", "Intel 82091AA Advanced Integrated Peripheral") + +i82091aa_device::i82091aa_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, I82091AA, tag, owner, clock) + , device_isa16_card_interface(mconfig, *this) + , device_memory_interface(mconfig, *this) + , m_space_config("superio_config_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(i82091aa_device::config_map), this)) + , m_fdc(*this, "fdc") + , m_com(*this, "uart%d", 0U) + , m_lpt(*this, "lpt") + , m_txd1_callback(*this) + , m_ndtr1_callback(*this) + , m_nrts1_callback(*this) + , m_txd2_callback(*this) + , m_ndtr2_callback(*this) + , m_nrts2_callback(*this) +{ +} + +static void pc_hd_floppies(device_slot_interface &device) +{ + device.option_add("35ed", FLOPPY_35_ED); + device.option_add("525hd", FLOPPY_525_HD); + device.option_add("35hd", FLOPPY_35_HD); + device.option_add("525dd", FLOPPY_525_DD); + device.option_add("35dd", FLOPPY_35_DD); +} + +void i82091aa_device::floppy_formats(format_registration &fr) +{ + fr.add_pc_formats(); + fr.add(FLOPPY_NASLITE_FORMAT); +} + +void i82091aa_device::device_add_mconfig(machine_config &config) +{ + // TODO: actually 82078 + N82077AA(config, m_fdc, XTAL(24'000'000), upd765_family_device::mode_t::AT); + m_fdc->intrq_wr_callback().set(FUNC(i82091aa_device::irq_floppy_w)); + m_fdc->drq_wr_callback().set(FUNC(i82091aa_device::drq_floppy_w)); + FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", i82091aa_device::floppy_formats).enable_sound(true); + FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", i82091aa_device::floppy_formats); + + NS16550(config, m_com[0], XTAL(24'000'000) / 13); + m_com[0]->out_int_callback().set(FUNC(i82091aa_device::irq_serial1_w)); + m_com[0]->out_tx_callback().set(FUNC(i82091aa_device::txd_serial1_w)); + m_com[0]->out_dtr_callback().set(FUNC(i82091aa_device::dtr_serial1_w)); + m_com[0]->out_rts_callback().set(FUNC(i82091aa_device::rts_serial1_w)); + + NS16550(config, m_com[1], XTAL(24'000'000) / 13); + m_com[1]->out_int_callback().set(FUNC(i82091aa_device::irq_serial2_w)); + m_com[1]->out_tx_callback().set(FUNC(i82091aa_device::txd_serial2_w)); + m_com[1]->out_dtr_callback().set(FUNC(i82091aa_device::dtr_serial2_w)); + m_com[1]->out_rts_callback().set(FUNC(i82091aa_device::rts_serial2_w)); + + PC_LPT(config, m_lpt); + m_lpt->irq_handler().set(FUNC(i82091aa_device::irq_parallel_w)); +} + +i82091aa_device::~i82091aa_device() +{ +} + +void i82091aa_device::device_start() +{ + set_isa_device(); + //m_last_dma_line = -1; + + m_isa->set_dma_channel(0, this, true); + m_isa->set_dma_channel(1, this, true); + m_isa->set_dma_channel(2, this, true); + m_isa->set_dma_channel(3, this, true); +} + +void i82091aa_device::device_reset() +{ + // TODO: can be strapped + m_fcfg1 = 1; + m_pcfg1 = 0; + m_sacfg1 = 0x10; + m_sbcfg1 = 0; + m_idecfg = 1; + + m_fdc->set_mode(upd765_family_device::mode_t::AT); + m_fdc->set_rate(500000); + + remap(AS_IO, 0, 0xfff); +} + +device_memory_interface::space_config_vector i82091aa_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(0, &m_space_config) + }; +} + +void i82091aa_device::remap(int space_id, offs_t start, offs_t end) +{ + if (space_id == AS_IO) + { + // TODO: selectable, cfr. section 4.2.1 + const u16 superio_base = 0x0022; + m_isa->install_device(superio_base, superio_base + 1, read8sm_delegate(*this, FUNC(i82091aa_device::read)), write8sm_delegate(*this, FUNC(i82091aa_device::write))); + + if (BIT(m_fcfg1, 0)) + { + const u16 fdc_address = BIT(m_fcfg1, 1) ? 0x0370 : 0x03f0; + m_isa->install_device(fdc_address, fdc_address + 7, *m_fdc, &n82077aa_device::map); + } + + const u16 com_address_table[8] = { 0x3f8, 0x2f8, 0x220, 0x228, 0x238, 0x2e8, 0x338, 0x3e8 }; + if (BIT(m_sacfg1, 0)) + { + const u16 uart_addr = com_address_table[(m_sacfg1 >> 1) & 7]; + m_isa->install_device(uart_addr, uart_addr + 7, read8sm_delegate(*m_com[0], FUNC(ns16450_device::ins8250_r)), write8sm_delegate(*m_com[0], FUNC(ns16450_device::ins8250_w))); + } + if (BIT(m_sbcfg1, 0)) + { + const u16 uart_addr = com_address_table[(m_sbcfg1 >> 1) & 7]; + m_isa->install_device(uart_addr, uart_addr + 7, read8sm_delegate(*m_com[1], FUNC(ns16450_device::ins8250_r)), write8sm_delegate(*m_com[1], FUNC(ns16450_device::ins8250_w))); + } + + + // setting 3 is + const u8 lpt_address_select = (m_pcfg1 >> 1) & 3; + if (BIT(m_pcfg1, 0) && lpt_address_select != 3) + { + const u16 lpt_address_table[3] = { 0x378, 0x278, 0x3bc }; + const u16 lpt_address = lpt_address_table[lpt_address_select]; + m_isa->install_device(lpt_address, lpt_address + 3, *m_lpt, &pc_lpt_device::isa_map); + } + } +} + +u8 i82091aa_device::read(offs_t offset) +{ + return (offset == 0) ? m_index : space().read_byte(m_index); +} + +void i82091aa_device::write(offs_t offset, u8 data) +{ + if (offset == 0) + { + m_index = data; + } + else + { + space().write_byte(m_index, data); + } +} + +void i82091aa_device::config_map(address_map &map) +{ + map(0x00, 0x00).lr8( + NAME([this] () { + if (!machine().side_effects_disabled()) + LOG("00h: AIPID Product Identification\n"); + return 0xa0; + }) + ); + map(0x01, 0x01).lr8( + NAME([this] () { + if (!machine().side_effects_disabled()) + LOG("01h: AIPREV Revision Identification\n"); + return 0x00; + }) + ); +// map(0x02, 0x02) AIPCFG1 AIP Configuration 1 +// map(0x03, 0x03) AIPCFG2 AIP Configuration 2 + map(0x10, 0x10).lrw8( + NAME([this] (offs_t offset) { + return m_fcfg1; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("10h: FCFG1 FDC Configuration %02x\n", data); + m_fcfg1 = data & 0x83; + remap(AS_IO, 0, 0xfff); + }) + ); + map(0x11, 0x11).lrw8( + NAME([this] (offs_t offset) { + // TODO: bit 1 is FDC idle status (r/o) + return m_fcfg2 | 2; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("11h: FCFG2 FDC Power Management and Status %02x\n", data); + m_fcfg2 = data & 0xd; + }) + ); + map(0x20, 0x20).lrw8( + NAME([this] (offs_t offset) { + return m_pcfg1; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("20h: PCFG1 Parallel Port Configuration %02x\n", data); + m_pcfg1 = data & 0xef; + remap(AS_IO, 0, 0xfff); + }) + ); + map(0x21, 0x21).lrw8( + NAME([this] (offs_t offset) { + return m_pcfg2; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("21h: PCFG2 Parallel Port Power Management and Status %02x\n", data); + m_pcfg2 = data & 0x2f; + }) + ); + map(0x30, 0x30).lrw8( + NAME([this] (offs_t offset) { + return m_sacfg1; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("30h: SACFG1 Serial Port A Configuration %02x\n", data); + m_sacfg1 = data & 0x9f; + remap(AS_IO, 0, 0xfff); + }) + ); + map(0x31, 0x31).lrw8( + NAME([this] (offs_t offset) { + return m_sacfg2; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("31h: SACFG2 Serial Port A Power Management and Status %02x\n", data); + m_sacfg2 = data & 0x1f; + }) + ); + map(0x40, 0x40).lrw8( + NAME([this] (offs_t offset) { + return m_sbcfg1; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("40h: SBCFG1 Serial Port B Configuration %02x\n", data); + m_sbcfg1 = data & 0x9f; + remap(AS_IO, 0, 0xfff); + }) + ); + map(0x41, 0x41).lrw8( + NAME([this] (offs_t offset) { + return m_sbcfg2; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("41h: SBCFG2 Serial Port B Power Management and Status %02x\n", data); + m_sbcfg2 = data & 0x1f; + }) + ); + map(0x50, 0x50).lrw8( + NAME([this] (offs_t offset) { + return m_idecfg; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("50h: IDECFG IDE Configuration %02x\n", data); + m_idecfg = data & 7; + remap(AS_IO, 0, 0xfff); + }) + ); +} + +void i82091aa_device::request_irq(int irq, int state) +{ + switch (irq) + { + // serial port at $2f8 or $2e8 + case 3: + m_isa->irq3_w(state); + break; + // serial port at $3f8 or $3e8 + case 4: + m_isa->irq4_w(state); + break; + // parallel port at $278 + case 5: + m_isa->irq5_w(state); + break; + // FDC + case 6: + m_isa->irq6_w(state); + break; + // parallel port at $3bc or $378 + case 7: + m_isa->irq7_w(state); + break; + } +} + +void i82091aa_device::request_dma(int dreq, int state) +{ + switch (dreq) + { + case 0: + m_isa->drq0_w(state); + break; + case 1: + m_isa->drq1_w(state); + break; + case 2: + m_isa->drq2_w(state); + break; + case 3: + m_isa->drq3_w(state); + break; + } +} + +/* + * FDC + */ + +void i82091aa_device::irq_floppy_w(int state) +{ + if (!BIT(m_fcfg1, 0)) + return; + + request_irq(6, state); +} + +void i82091aa_device::drq_floppy_w(int state) +{ + if (!BIT(m_fcfg1, 0)) + return; + + request_dma(2, state); +} + +/* + * COM1/2 Serial ports + */ + +void i82091aa_device::irq_serial1_w(int state) +{ + if (!BIT(m_sacfg1, 0)) + return; + request_irq(BIT(m_sacfg1, 4) ? 4 : 3, state ? ASSERT_LINE : CLEAR_LINE); +} + +void i82091aa_device::irq_serial2_w(int state) +{ + if (!BIT(m_sbcfg1, 0)) + return; + request_irq(BIT(m_sbcfg1, 4) ? 4 : 3, state ? ASSERT_LINE : CLEAR_LINE); +} + +void i82091aa_device::txd_serial1_w(int state) +{ + if (!BIT(m_sacfg1, 0)) + return; + m_txd1_callback(state); +} + +void i82091aa_device::txd_serial2_w(int state) +{ + if (!BIT(m_sbcfg1, 0)) + return; + m_txd2_callback(state); +} + +void i82091aa_device::dtr_serial1_w(int state) +{ + if (!BIT(m_sacfg1, 0)) + return; + m_ndtr1_callback(state); +} + +void i82091aa_device::dtr_serial2_w(int state) +{ + if (!BIT(m_sbcfg1, 0)) + return; + m_ndtr2_callback(state); +} + +void i82091aa_device::rts_serial1_w(int state) +{ + if (!BIT(m_sacfg1, 0)) + return; + m_nrts1_callback(state); +} + +void i82091aa_device::rts_serial2_w(int state) +{ + if (!BIT(m_sbcfg1, 0)) + return; + m_nrts2_callback(state); +} + +void i82091aa_device::rxd1_w(int state) +{ + m_com[0]->rx_w(state); +} + +void i82091aa_device::ndcd1_w(int state) +{ + m_com[0]->dcd_w(state); +} + +void i82091aa_device::ndsr1_w(int state) +{ + m_com[0]->dsr_w(state); +} + +void i82091aa_device::nri1_w(int state) +{ + m_com[0]->ri_w(state); +} + +void i82091aa_device::ncts1_w(int state) +{ + m_com[0]->cts_w(state); +} + +void i82091aa_device::rxd2_w(int state) +{ + m_com[1]->rx_w(state); +} + +void i82091aa_device::ndcd2_w(int state) +{ + m_com[1]->dcd_w(state); +} + +void i82091aa_device::ndsr2_w(int state) +{ + m_com[1]->dsr_w(state); +} + +void i82091aa_device::nri2_w(int state) +{ + m_com[1]->ri_w(state); +} + +void i82091aa_device::ncts2_w(int state) +{ + m_com[1]->cts_w(state); +} + +/* + * LPT Parallel Port + */ + +void i82091aa_device::irq_parallel_w(int state) +{ + if (!BIT(m_pcfg1, 0)) + return; + + request_irq(BIT(m_pcfg1, 3) ? 7 : 5, state); +} diff --git a/src/devices/machine/i82091aa.h b/src/devices/machine/i82091aa.h new file mode 100644 index 00000000000..ff30fb175bf --- /dev/null +++ b/src/devices/machine/i82091aa.h @@ -0,0 +1,95 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#ifndef MAME_MACHINE_I82091AA_H +#define MAME_MACHINE_I82091AA_H + +#pragma once + +#include "bus/isa/isa.h" +#include "imagedev/floppy.h" +#include "machine/ins8250.h" +#include "machine/pc_lpt.h" +#include "machine/upd765.h" + +class i82091aa_device : public device_t, + public device_isa16_card_interface, + public device_memory_interface +{ +public: + i82091aa_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + virtual ~i82091aa_device(); + + void remap(int space_id, offs_t start, offs_t end) override; + + auto txd1() { return m_txd1_callback.bind(); } + auto ndtr1() { return m_ndtr1_callback.bind(); } + auto nrts1() { return m_nrts1_callback.bind(); } + auto txd2() { return m_txd2_callback.bind(); } + auto ndtr2() { return m_ndtr2_callback.bind(); } + auto nrts2() { return m_nrts2_callback.bind(); } + + void rxd1_w(int state); + void ndcd1_w(int state); + void ndsr1_w(int state); + void nri1_w(int state); + void ncts1_w(int state); + void rxd2_w(int state); + void ndcd2_w(int state); + void ndsr2_w(int state); + void nri2_w(int state); + void ncts2_w(int state); + + static void floppy_formats(format_registration &fr); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual space_config_vector memory_space_config() const override; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; +private: + address_space_config m_space_config; + required_device m_fdc; + required_device_array m_com; + required_device m_lpt; + + devcb_write_line m_txd1_callback; + devcb_write_line m_ndtr1_callback; + devcb_write_line m_nrts1_callback; + devcb_write_line m_txd2_callback; + devcb_write_line m_ndtr2_callback; + devcb_write_line m_nrts2_callback; + + u8 read(offs_t offset); + void write(offs_t offset, u8 data); + + void config_map(address_map &map) ATTR_COLD; + void request_irq(int irq, int state); + void request_dma(int dreq, int state); + + u8 m_index; + u8 m_fcfg1, m_fcfg2; + u8 m_pcfg1, m_pcfg2; + u8 m_sacfg1, m_sacfg2; + u8 m_sbcfg1, m_sbcfg2; + u8 m_idecfg; + + void irq_floppy_w(int state); + void drq_floppy_w(int state); + + void irq_serial1_w(int state); + void txd_serial1_w(int state); + void dtr_serial1_w(int state); + void rts_serial1_w(int state); + void irq_serial2_w(int state); + void txd_serial2_w(int state); + void dtr_serial2_w(int state); + void rts_serial2_w(int state); + + void irq_parallel_w(int state); +}; + +DECLARE_DEVICE_TYPE(I82091AA, i82091aa_device); + +#endif // MAME_MACHINE_I82091AA_H diff --git a/src/devices/machine/i82425ex_psc.cpp b/src/devices/machine/i82425ex_psc.cpp new file mode 100644 index 00000000000..487e4d2ee96 --- /dev/null +++ b/src/devices/machine/i82425ex_psc.cpp @@ -0,0 +1,440 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#include "emu.h" +#include "i82425ex_psc.h" + +#define LOG_MAP (1U << 1) + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_warning + +#define LOGMAP(...) LOGMASKED(LOG_MAP, __VA_ARGS__) + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(I82425EX_PSC, i82425ex_psc_device, "i82425ex_psc", "Intel 82425EX PCI System Controller") + +i82425ex_psc_device::i82425ex_psc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : pci_host_device(mconfig, I82425EX_PSC, tag, owner, clock) + , m_host_cpu(*this, finder_base::DUMMY_TAG) + , m_ib(*this, finder_base::DUMMY_TAG) + , m_ide(*this, "ide%u", 1U) + , m_ide1_irq(*this) + , m_ide2_irq(*this) +{ +} + +void i82425ex_psc_device::device_add_mconfig(machine_config &config) +{ + IDE_CONTROLLER_32(config, m_ide[0]).options(ata_devices, "hdd", nullptr, false); + m_ide[0]->irq_handler().set([this] (int state) { m_ide1_irq(state); }); + + IDE_CONTROLLER_32(config, m_ide[1]).options(ata_devices, "cdrom", nullptr, false); + m_ide[1]->irq_handler().set([this] (int state) { m_ide2_irq(state); }); +} + +void i82425ex_psc_device::device_start() +{ + pci_host_device::device_start(); + set_spaces(&m_host_cpu->space(AS_PROGRAM), &m_host_cpu->space(AS_IO)); + + memory_window_start = 0; + memory_window_end = 0xffffffff; + memory_offset = 0; + io_window_start = 0; + io_window_end = 0xffff; + io_offset = 0; + + m_ram.resize(m_ram_size/4); + + save_item(NAME(m_pcicon)); + save_item(NAME(m_xbcsa)); + save_item(NAME(m_hostdev)); + save_item(NAME(m_lbide)); + save_item(NAME(m_iort)); + save_item(NAME(m_prev)); + save_item(NAME(m_hostsel)); + save_item(NAME(m_dfc)); + save_item(NAME(m_scc)); + save_item(NAME(m_dramc)); + save_item(NAME(m_pam)); + save_item(NAME(m_drb)); + save_item(NAME(m_pirqrc)); + save_item(NAME(m_dmh)); + save_item(NAME(m_tom)); + save_item(NAME(m_smramcon)); + save_item(NAME(m_smicntl)); + save_item(NAME(m_smien)); + save_item(NAME(m_see)); + save_item(NAME(m_ftmr)); + save_item(NAME(m_smireq)); + save_item(NAME(m_ctltmrl)); + save_item(NAME(m_ctltmrh)); + +} + +void i82425ex_psc_device::device_reset() +{ + pci_host_device::device_reset(); + + command = 0x0007; + // has SERR# support only, cannot clear command 0x07 + command_mask = 0x0100; + // Medium DEVSEL# + status = 0x0200; + + m_pcicon = 0; + m_hostdev = 0; + m_lbide = 0x0000; + m_xbcsa = 0x03; + m_iort = 0x4d; + m_prev = false; + m_hostsel = 0; + m_dfc = 0x80; + m_scc = 0; + m_dramc = 0; + std::fill(std::begin(m_pam), std::end(m_pam), 0U); + std::fill(std::begin(m_drb), std::end(m_drb), 1U); + m_pirqrc[0] = m_pirqrc[1] = 0x80; + m_dmh = 0; + m_tom = 0x02; + m_smramcon = 0; + m_smicntl = 0x08; + m_smien = 0; + m_see = 0; + m_ftmr = 0x0f; + m_smireq = 0; + m_ctltmrl = 0; + m_ctltmrh = 0; + + remap_cb(); +} + +void i82425ex_psc_device::reset_all_mappings() +{ + pci_host_device::reset_all_mappings(); +} + +void i82425ex_psc_device::config_map(address_map &map) +{ + pci_host_device::config_map(map); + map(0x09, 0x3f).lr8(NAME([] () { return 0; })); + map(0x40, 0x40).lrw8( + NAME([this] (offs_t offset) { + return m_pcicon; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("40h: PCICON PCI Control %02x\n", data); + m_pcicon = data & 0x7f; + }) + ); + map(0x44, 0x44).lrw8( + NAME([this] (offs_t offset) { + return m_hostdev; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("44h: HOSTDEV Host Device Control %02x\n", data); + m_hostdev = data & 7; + }) + ); + map(0x48, 0x49).lrw16( + NAME([this] (offs_t offset) { + return m_lbide; + }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + LOG("48h: LBIDE PCI Local Bus IDE Control %04x & %04x\n", data, mem_mask); + COMBINE_DATA(&m_lbide); + m_lbide &= 0x1f3f; + remap_cb(); + }) + ); + map(0x4c, 0x4c).lrw8( + NAME([this] (offs_t offset) { + return m_iort; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("4Ch: IORT ISA I/O Recovery timer %02x\n", data); + m_iort = data; + }) + ); + map(0x4d, 0x4d).lrw8( + NAME([this] (offs_t offset) { + // xxx- ---- IB Fabrication House ID + // ---- xxxx Revision ID + return m_prev << 4; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("4Dh: PREV Part Revision %02x\n", data); + m_prev = !!BIT(data, 4); + }) + ); + map(0x4e, 0x4e).lrw8( + NAME([this] (offs_t offset) { + return m_xbcsa; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("4Eh: XBCSA X-Bus Chip Select A %02x\n", data); + m_xbcsa = data; + remap_cb(); + }) + ); + map(0x50, 0x50).lrw8( + NAME([this] (offs_t offset) { + // TODO: bits 2-1 are r/o, determined by strapping on SIDLE# and CMDV# + return m_hostsel | (1 << 1); + }), + NAME([this] (offs_t offset, u8 data) { + LOG("50h: HOSTSEL Host Select %02x\n", data); + m_hostsel = data & 9; + }) + ); + map(0x51, 0x51).lrw8( + NAME([this] (offs_t offset) { + return m_dfc; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("51h: DFC Deturbo Frequency Control %02x\n", data); + m_dfc = data; + }) + ); + map(0x52, 0x53).lrw16( + NAME([this] (offs_t offset) { + return m_scc; + }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + LOG("51h: SCC Secondary L2 Cache Control %04x & %04x\n", data, mem_mask); + COMBINE_DATA(&m_scc); + m_scc &= 0x1f7f; + }) + ); + map(0x56, 0x57).lrw16( + NAME([this] (offs_t offset) { + return m_dramc; + }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + LOG("56h: DRAMC DRAM Control %04x & %04x\n", data, mem_mask); + COMBINE_DATA(&m_dramc); + m_dramc &= 0xff3e; + }) + ); + map(0x59, 0x5f).lrw8( + NAME([this] (offs_t offset) { + return m_pam[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + m_pam[offset] = data; + remap_cb(); + }) + ); + map(0x60, 0x64).lrw8( + NAME([this] (offs_t offset) { + return m_drb[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + m_drb[offset] = data; + //remap_cb(); + }) + ); + map(0x66, 0x67).lrw8( + NAME([this] (offs_t offset) { + return m_pirqrc[offset]; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("%02X: PIRQ%dRC %02x\n", offset + 0x66, offset, data); + m_pirqrc[offset] = data; + }) + ); + map(0x68, 0x68).lrw8( + NAME([this] (offs_t offset) { + return m_dmh; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("68h: DMH DRAM Memory Hole %02x\n", data); + m_dmh = data; + remap_cb(); + }) + ); + map(0x69, 0x69).lrw8( + NAME([this] (offs_t offset) { + return m_tom; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("69h: TOM Top of Memory %02x\n", data); + m_tom = data; + }) + ); + map(0x70, 0x70).lrw8( + NAME([this] (offs_t offset) { + return m_smramcon; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("70h: SMRAMCON SMRAM Control %02x\n", data); + m_smramcon = data & 0x77; + remap_cb(); + }) + ); + map(0xa0, 0xa0).lrw8( + NAME([this] (offs_t offset) { + return m_smicntl; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("A0h: SMICNTL SMI Control %02x\n", data); + m_smicntl = data & 0x1f; + }) + ); + map(0xa2, 0xa3).lrw16( + NAME([this] (offs_t offset) { + return m_smien; + }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + LOG("A2h: SMIEN SMI Enable %04x & %04x\n", data, mem_mask); + COMBINE_DATA(&m_smien); + m_smien &= 0xff; + }) + ); + map(0xa4, 0xa7).lrw32( + NAME([this] (offs_t offset) { + return m_see; + }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + LOG("A4h: SEE System Event Enable %08x & %08x\n", data, mem_mask); + COMBINE_DATA(&m_see); + m_see &= 0xe000'0000; + }) + ); + map(0xa8, 0xa8).lrw8( + NAME([this] (offs_t offset) { + return m_ftmr; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("A8h: FTMR Fast Off Timer %02x\n", data); + m_ftmr = data; + }) + ); + map(0xaa, 0xab).lrw16( + NAME([this] (offs_t offset) { + return m_smireq; + }), + NAME([this] (offs_t offset, u16 data, u16 mem_mask) { + LOG("AAh: SMIREQ SMI Request %04x & %04x\n", data, mem_mask); + COMBINE_DATA(&m_smireq); + m_smireq &= 0xff; + }) + ); + map(0xac, 0xac).lrw8( + NAME([this] (offs_t offset) { + return m_ctltmrl; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("ACh: CTLTMRL Clock Throttle STPCLK# Low Timer %02x\n", data); + m_ctltmrl = data; + }) + ); + map(0xae, 0xae).lrw8( + NAME([this] (offs_t offset) { + return m_ctltmrh; + }), + NAME([this] (offs_t offset, u8 data) { + LOG("AEh: CTLTMRH Clock Throttle STPCLK# High Timer %02x\n", data); + m_ctltmrh = data; + }) + ); + +} + +void i82425ex_psc_device::map_bios(address_space *memory_space, uint32_t start, uint32_t end) +{ + uint32_t mask = m_region->bytes() - 1; + memory_space->install_rom(start, end, m_region->base() + (start & mask)); +} + +// For each PAM register: +// x--- PE PCI Enable +// -x-- CE Cache Enable (from L2) +// --x- WE Write Enable +// ---x RE Read Enable +void i82425ex_psc_device::map_shadowram(address_space *memory_space, offs_t start_offs, offs_t end_offs, u8 setting) +{ + LOGMAP("- 0x%08x-0x%08x ", start_offs, end_offs); + + switch(setting) + { + case 0: + LOGMAP("shadow RAM off\n"); + break; + case 1: + LOGMAP("shadow RAM r/o\n"); + memory_space->install_rom(start_offs, end_offs, &m_ram[start_offs/4]); + break; + case 2: + LOGMAP("shadow RAM w/o\n"); + memory_space->install_writeonly(start_offs, end_offs, &m_ram[start_offs/4]); + break; + case 3: + LOGMAP("shadow RAM r/w\n"); + memory_space->install_ram(start_offs, end_offs, &m_ram[start_offs/4]); + break; + } +} + +void i82425ex_psc_device::map_extra( + uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space +) { + // TODO: $cf9 for TRC register + io_space->install_device(0, 0xffff, *static_cast(this), &pci_host_device::io_configuration_access_map); + + regenerate_config_mapping(); + + m_ib->remap_bridge(); + io_space->install_device(0x0000, 0x07ff, *m_ib, &i82426ex_ib_device::io_map); + + memory_space->install_ram(0x00000000, 0x0009ffff, &m_ram[0x00000000/4]); + + // TODO: dictated by XBCSA + map_bios(memory_space, 0xffffffff - m_region->bytes() + 1, 0xffffffff); + map_bios(memory_space, 0x000e0000, 0x000fffff); + + int i; + + // handle 0xc0000-0xdffff + for (i = 0; i < 8; i++) + { + const offs_t start_offs = 0xc0000 + (i * 0x4000); + const offs_t end_offs = start_offs + 0x3fff; + const u8 reg = i >> 1; + const u8 shift = BIT(i, 0) * 4; + map_shadowram(memory_space, start_offs, end_offs, (m_pam[1 + reg] >> shift) & 3); + } + + // handle 0xe0000-0xeffff + for (i = 0; i < 4; i++) + { + const offs_t start_offs = 0xe0000 + (i * 0x4000); + const offs_t end_offs = start_offs + 0x3fff; + const u8 reg = BIT(i, 1); + const u8 shift = BIT(i, 0) * 4; + map_shadowram(memory_space, start_offs, end_offs, (m_pam[5 + reg] >> shift) & 3); + } + + // bits 3-0 are reserved on PAM0 + map_shadowram(memory_space, 0xf0000, 0xfffff, (m_pam[0] >> 4) & 3); + + memory_space->install_ram(0x00100000, m_ram_size - 1, &m_ram[0x00100000/4]); + + const u8 idee = m_lbide & 3; + + // TODO: should be IDEE = 1 primary only, IDEE = 2 secondary only + // But in doing so freedos13 never enable cdrom drive, + // is this chipset/BIOS believing that IDEs are for HDDs only? + if (idee == 1 || idee == 2) + { + io_space->install_readwrite_handler(0x1f0, 0x1f7, read32s_delegate(*m_ide[0], FUNC(ide_controller_32_device::cs0_r)), write32s_delegate(*m_ide[0], FUNC(ide_controller_32_device::cs0_w))); + io_space->install_readwrite_handler(0x3f0, 0x3f7, read32s_delegate(*m_ide[0], FUNC(ide_controller_32_device::cs1_r)), write32s_delegate(*m_ide[0], FUNC(ide_controller_32_device::cs1_w))); + + io_space->install_readwrite_handler(0x170, 0x177, read32s_delegate(*m_ide[1], FUNC(ide_controller_32_device::cs0_r)), write32s_delegate(*m_ide[1], FUNC(ide_controller_32_device::cs0_w))); + io_space->install_readwrite_handler(0x370, 0x377, read32s_delegate(*m_ide[1], FUNC(ide_controller_32_device::cs1_r)), write32s_delegate(*m_ide[1], FUNC(ide_controller_32_device::cs1_w))); + } +} + diff --git a/src/devices/machine/i82425ex_psc.h b/src/devices/machine/i82425ex_psc.h new file mode 100644 index 00000000000..883c1b9c8d0 --- /dev/null +++ b/src/devices/machine/i82425ex_psc.h @@ -0,0 +1,94 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#ifndef MAME_MACHINE_I82425EX_PSC_H +#define MAME_MACHINE_I82425EX_PSC_H + +#pragma once + +#include "pci.h" +#include "i82426ex_ib.h" + +#include "bus/ata/ataintf.h" +#include "machine/idectrl.h" + +class i82425ex_psc_device : public pci_host_device +{ +public: + template + i82425ex_psc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&ib_tag, int ram_size) + : i82425ex_psc_device(mconfig, tag, owner, clock) + { + // blanked class code + set_ids(0x80860486, 0x00, 0x000000, 0x00); + + set_cpu_tag(std::forward(cpu_tag)); + set_ib_tag(std::forward(ib_tag)); + set_ram_size(ram_size); + } + i82425ex_psc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + template void set_cpu_tag(T &&tag) { m_host_cpu.set_tag(std::forward(tag)); } + template void set_ib_tag(T &&tag) { m_ib.set_tag(std::forward(tag)); } + void set_ram_size(int ram_size) { m_ram_size = ram_size; } + auto ide1_irq_w() { return m_ide1_irq.bind(); } + auto ide2_irq_w() { return m_ide2_irq.bind(); } + +// void smi_act_w(int state); + +protected: + i82425ex_psc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); + + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + + virtual void reset_all_mappings() override; + + virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space, + uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override; + + virtual void config_map(address_map &map) override ATTR_COLD; + +private: + required_device m_host_cpu; + required_device m_ib; + required_device_array m_ide; + devcb_write_line m_ide1_irq; + devcb_write_line m_ide2_irq; + std::vector m_ram; + + u32 m_ram_size = 0; + + u8 m_pcicon; + u8 m_xbcsa; + u8 m_hostdev; + u16 m_lbide; + u8 m_iort; + bool m_prev; + u8 m_hostsel; + u8 m_dfc; + u16 m_scc; + u16 m_dramc; + u8 m_pam[7]; + u8 m_drb[5]; + u8 m_pirqrc[2]; + u8 m_dmh; + u8 m_tom; + u8 m_smramcon; + u8 m_smicntl; + u16 m_smien; + u32 m_see; + u8 m_ftmr; + u16 m_smireq; + u8 m_ctltmrl; + u8 m_ctltmrh; + + void map_bios(address_space *memory_space, uint32_t start, uint32_t end); + void map_shadowram(address_space *memory_space, offs_t start_offs, offs_t end_offs, u8 setting); +}; + +DECLARE_DEVICE_TYPE(I82425EX_PSC, i82425ex_psc_device) + + +#endif // MAME_MACHINE_I82425EX_PSC_H diff --git a/src/devices/machine/i82426ex_ib.cpp b/src/devices/machine/i82426ex_ib.cpp new file mode 100644 index 00000000000..054fab90c6d --- /dev/null +++ b/src/devices/machine/i82426ex_ib.cpp @@ -0,0 +1,333 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#include "emu.h" +#include "i82426ex_ib.h" + +DEFINE_DEVICE_TYPE(I82426EX_IB, i82426ex_ib_device, "i82426ex_ib", "Intel 82425EX ISA Bridge") + +i82426ex_ib_device::i82426ex_ib_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, I82426EX_IB, tag, owner, clock) + , m_host_cpu(*this, finder_base::DUMMY_TAG) + , m_keybc(*this, finder_base::DUMMY_TAG) + , m_dma(*this, "dma%u", 1U) + , m_intc(*this, "intc%u", 1U) + , m_pit(*this, "pit") + , m_isabus(*this, "isabus") + , m_write_intr(*this) + , m_write_spkr(*this) + , m_rtcale(*this) + , m_rtccs_read(*this, 0xff) + , m_rtccs_write(*this) +{ +} + +void i82426ex_ib_device::device_add_mconfig(machine_config &config) +{ + AM9517A(config, m_dma[0], this->clock() / 3); + m_dma[0]->out_hreq_callback().set(m_dma[1], FUNC(am9517a_device::dreq0_w)); + m_dma[0]->out_eop_callback().set(FUNC(i82426ex_ib_device::dma1_eop_w)); + m_dma[0]->in_memr_callback().set(FUNC(i82426ex_ib_device::dma_read_byte)); + m_dma[0]->out_memw_callback().set(FUNC(i82426ex_ib_device::dma_write_byte)); + m_dma[0]->in_ior_callback<0>().set([this] () { return m_isabus->dack_r(0); }); + m_dma[0]->in_ior_callback<1>().set([this] () { return m_isabus->dack_r(1); }); + m_dma[0]->in_ior_callback<2>().set([this] () { return m_isabus->dack_r(2); }); + m_dma[0]->in_ior_callback<3>().set([this] () { return m_isabus->dack_r(3); }); + m_dma[0]->out_iow_callback<0>().set([this] (u8 data) { m_isabus->dack_w(0, data); }); + m_dma[0]->out_iow_callback<1>().set([this] (u8 data) { m_isabus->dack_w(1, data); }); + m_dma[0]->out_iow_callback<2>().set([this] (u8 data) { m_isabus->dack_w(2, data); }); + m_dma[0]->out_iow_callback<3>().set([this] (u8 data) { m_isabus->dack_w(3, data); }); + m_dma[0]->out_dack_callback<0>().set([this] (int state) { set_dma_channel(0, state); }); + m_dma[0]->out_dack_callback<1>().set([this] (int state) { set_dma_channel(1, state); }); + m_dma[0]->out_dack_callback<2>().set([this] (int state) { set_dma_channel(2, state); }); + m_dma[0]->out_dack_callback<3>().set([this] (int state) { set_dma_channel(3, state); }); + + AM9517A(config, m_dma[1], this->clock() / 3); + m_dma[1]->out_hreq_callback().set(FUNC(i82426ex_ib_device::dma2_hreq_w)); + m_dma[1]->in_memr_callback().set(FUNC(i82426ex_ib_device::dma_read_word)); + m_dma[1]->out_memw_callback().set(FUNC(i82426ex_ib_device::dma_write_word)); + m_dma[1]->in_ior_callback<1>().set([this] () { return m_isabus->dack_r(5); }); + m_dma[1]->in_ior_callback<2>().set([this] () { return m_isabus->dack_r(6); }); + m_dma[1]->in_ior_callback<3>().set([this] () { return m_isabus->dack_r(7); }); + m_dma[1]->out_iow_callback<1>().set([this] (u8 data) { m_isabus->dack_w(5, data); }); + m_dma[1]->out_iow_callback<2>().set([this] (u8 data) { m_isabus->dack_w(6, data); }); + m_dma[1]->out_iow_callback<3>().set([this] (u8 data) { m_isabus->dack_w(7, data); }); + m_dma[1]->out_dack_callback<0>().set([this] (int state) { m_dma[0]->hack_w(state ? 0 : 1); }); + m_dma[1]->out_dack_callback<1>().set([this] (int state) { set_dma_channel(5, state); }); + m_dma[1]->out_dack_callback<2>().set([this] (int state) { set_dma_channel(6, state); }); + m_dma[1]->out_dack_callback<3>().set([this] (int state) { set_dma_channel(7, state); }); + + PIC8259(config, m_intc[0], 0); + m_intc[0]->out_int_callback().set([this] (int state) { m_write_intr(state); }); + m_intc[0]->in_sp_callback().set_constant(1); + m_intc[0]->read_slave_ack_callback().set([this] (offs_t offset) -> u8 { + if (offset == 2) + return m_intc[1]->acknowledge(); + return 0; + }); + + PIC8259(config, m_intc[1], 0); + m_intc[1]->out_int_callback().set(m_intc[0], FUNC(pic8259_device::ir2_w)); + m_intc[1]->in_sp_callback().set_constant(0); + + // 82C54 + PIT8254(config, m_pit, 0); + m_pit->set_clk<0>(this->clock() / 12); + m_pit->out_handler<0>().set(m_intc[0], FUNC(pic8259_device::ir0_w)); + m_pit->set_clk<1>(this->clock() / 12); + m_pit->out_handler<1>().set([this] (int state) { + m_refresh_toggle ^= state; + m_portb = (m_portb & 0xef) | (m_refresh_toggle << 4); + }); + m_pit->set_clk<2>(this->clock() / 12); + m_pit->out_handler<2>().set([this] (int state) { + m_write_spkr((state & BIT(m_portb, 1))); + m_portb = (m_portb & 0xdf) | (state << 5); + }); + + ISA16(config, m_isabus, 0); + m_isabus->irq3_callback().set([this] (int state) { m_intc[0]->ir3_w(state); }); + m_isabus->irq4_callback().set([this] (int state) { m_intc[0]->ir4_w(state); }); + m_isabus->irq5_callback().set([this] (int state) { m_intc[0]->ir5_w(state); }); + m_isabus->irq6_callback().set([this] (int state) { m_intc[0]->ir6_w(state); }); + m_isabus->irq7_callback().set([this] (int state) { m_intc[0]->ir7_w(state); }); + m_isabus->irq2_callback().set([this] (int state) { m_intc[1]->ir1_w(state); }); + m_isabus->irq10_callback().set([this] (int state) { m_intc[1]->ir2_w(state); }); + m_isabus->irq11_callback().set([this] (int state) { m_intc[1]->ir3_w(state); }); + m_isabus->irq12_callback().set([this] (int state) { m_intc[1]->ir4_w(state); }); + m_isabus->irq14_callback().set([this] (int state) { m_intc[1]->ir6_w(state); }); + m_isabus->irq15_callback().set([this] (int state) { m_intc[1]->ir7_w(state); }); + m_isabus->drq0_callback().set(m_dma[0], FUNC(am9517a_device::dreq0_w)); + m_isabus->drq1_callback().set(m_dma[0], FUNC(am9517a_device::dreq1_w)); + m_isabus->drq2_callback().set(m_dma[0], FUNC(am9517a_device::dreq2_w)); + m_isabus->drq3_callback().set(m_dma[0], FUNC(am9517a_device::dreq3_w)); + m_isabus->drq5_callback().set(m_dma[1], FUNC(am9517a_device::dreq1_w)); + m_isabus->drq6_callback().set(m_dma[1], FUNC(am9517a_device::dreq2_w)); + m_isabus->drq7_callback().set(m_dma[1], FUNC(am9517a_device::dreq3_w)); + m_isabus->iochck_callback().set(FUNC(i82426ex_ib_device::iochck_w)); +} + +void i82426ex_ib_device::device_start() +{ + save_item(NAME(m_portb)); + save_item(NAME(m_refresh_toggle)); + save_item(NAME(m_iochck)); + save_item(NAME(m_nmi_mask)); + + save_item(NAME(m_dma_eop)); + save_item(NAME(m_dma_page)); + save_item(NAME(m_dma_high_byte)); + save_item(NAME(m_dma_channel)); +} + +void i82426ex_ib_device::device_reset() +{ + m_dma_channel = -1; + + m_nmi_mask = 1; +// m_dma[0]->set_unscaled_clock(2'500'000); +// m_dma[1]->set_unscaled_clock(2'500'000); +} + +void i82426ex_ib_device::device_reset_after_children() +{ + // timer 2 default state + m_pit->write_gate2(1); +} + +void i82426ex_ib_device::device_config_complete() +{ + auto isabus = m_isabus.finder_target(); + isabus.first.subdevice(isabus.second)->set_memspace(m_host_cpu, AS_PROGRAM); + isabus.first.subdevice(isabus.second)->set_iospace(m_host_cpu, AS_IO); +} + +void i82426ex_ib_device::io_map(address_map &map) +{ + map(0x0000, 0x000f).rw(m_dma[0], FUNC(am9517a_device::read), FUNC(am9517a_device::write)); + map(0x0020, 0x0021).rw(m_intc[0], FUNC(pic8259_device::read), FUNC(pic8259_device::write)); + map(0x0040, 0x0043).rw(m_pit, FUNC(pit8254_device::read), FUNC(pit8254_device::write)); + map(0x0060, 0x0060).rw(m_keybc, FUNC(at_kbc_device_base::data_r), FUNC(at_kbc_device_base::data_w)); + map(0x0061, 0x0061).rw(FUNC(i82426ex_ib_device::portb_r), FUNC(i82426ex_ib_device::portb_w)); + map(0x0064, 0x0064).rw(m_keybc, FUNC(at_kbc_device_base::status_r), FUNC(at_kbc_device_base::command_w)); + map(0x0070, 0x0070).lw8( + NAME([this] (u8 data) { + m_nmi_mask = BIT(data, 7); + m_rtcale(data); + }) + ); + map(0x0071, 0x0071).lrw8( + NAME([this] () { + return m_rtccs_read(); + }), + NAME([this] (u8 data) { + m_rtccs_write(data); + }) + ); + // ??? + map(0x0078, 0x0078).lr8(NAME([] () { return 0; })); + + map(0x0080, 0x008f).lrw8( + NAME([this] (offs_t offset) { return m_dma_page[offset]; }), + NAME([this] (offs_t offset, u8 data) { m_dma_page[offset] = data; }) + ); + map(0x00a0, 0x00a1).rw(m_intc[1], FUNC(pic8259_device::read), FUNC(pic8259_device::write)); +// map(0x00b2, 0x00b2) APMC +// map(0x00b3, 0x00b3) APMS + map(0x00c0, 0x00df).lrw8( + NAME([this] (offs_t offset) { return m_dma[1]->read(offset >> 1); }), + NAME([this] (offs_t offset, u8 data) { m_dma[1]->write(offset >> 1, data); }) + ); +// map(0x00f0, 0x00f0) Coprocessor Error +// map(0x0480, 0x048f) DMA high page (not all of it) +// map(0x04d0, 0x04d0) INT-1 Edge/Level Control +// map(0x04d1, 0x04d1) INT-2 Edge/Level Control +} + +u8 i82426ex_ib_device::portb_r() +{ + return m_portb; +} + +// x--- ---- SERR# NMI Source Status (r/o) +// -x-- ---- IOCHK# NMI Source Status (r/o) +// --x- ---- Timer Counter 2 Out Status (r/o) +// ---x ---- Refresh Cycle Toggle (r/o) +// ---- x--- IOCHK# NMI Enable +// ---- -x-- PCI SERR# Enable +// ---- --x- Speaker Data Enable +// ---- ---x Timer Counter 2 Enable +void i82426ex_ib_device::portb_w(u8 data) +{ + m_portb = (m_portb & 0xf0) | (data & 0x0f); + + // bit 5 forced to 1 if timer disabled + if (!BIT(m_portb, 0)) + m_portb |= 1 << 5; + + m_pit->write_gate2(BIT(m_portb, 0)); + + // Other way around wrt other chipsets + if (!BIT(m_portb, 1)) + m_write_spkr(0); + +// m_write_spkr(BIT(m_portb, 1)); + + // clear channel check latch? + if (BIT(m_portb, 3)) + { + m_portb &= 0xbf; + m_host_cpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); + } +} + +/* + * DMA Controller + */ + +void i82426ex_ib_device::dma2_hreq_w(int state) +{ + m_host_cpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); + + /* Assert HLDA */ + m_dma[1]->hack_w(state); +} + +offs_t i82426ex_ib_device::page_offset() +{ + switch (m_dma_channel) + { + case 0: return (offs_t) m_dma_page[0x07] << 16; + case 1: return (offs_t) m_dma_page[0x03] << 16; + case 2: return (offs_t) m_dma_page[0x01] << 16; + case 3: return (offs_t) m_dma_page[0x02] << 16; + case 5: return (offs_t) m_dma_page[0x0b] << 16; + case 6: return (offs_t) m_dma_page[0x09] << 16; + case 7: return (offs_t) m_dma_page[0x0a] << 16; + } + + // should never get here + return 0xff0000; +} + + +uint8_t i82426ex_ib_device::dma_read_byte(offs_t offset) +{ + address_space &prog_space = m_host_cpu->space(AS_PROGRAM); + if (m_dma_channel == -1) + return 0xff; + uint8_t result; + result = prog_space.read_byte((page_offset() << 16) + offset); + return result; +} + +void i82426ex_ib_device::dma_write_byte(offs_t offset, uint8_t data) +{ + address_space &prog_space = m_host_cpu->space(AS_PROGRAM); + if (m_dma_channel == -1) + return; + + prog_space.write_byte((page_offset() << 16) + offset, data); +} + +uint8_t i82426ex_ib_device::dma_read_word(offs_t offset) +{ + address_space &prog_space = m_host_cpu->space(AS_PROGRAM); + if (m_dma_channel == -1) + return 0xff; + uint16_t result; + + result = prog_space.read_word(((page_offset() << 16) & 0xfe0000) | (offset << 1)); + m_dma_high_byte = result >> 8; + + return result & 0xFF; +} + +void i82426ex_ib_device::dma_write_word(offs_t offset, uint8_t data) +{ + address_space &prog_space = m_host_cpu->space(AS_PROGRAM); + if (m_dma_channel == -1) + return; + + prog_space.write_word(((page_offset() << 16) & 0xfe0000) | (offset << 1), m_dma_high_byte | data); +} + +void i82426ex_ib_device::dma1_eop_w(int state) +{ + m_dma_eop = state == ASSERT_LINE; + if (m_dma_channel != -1) + m_isabus->eop_w(m_dma_channel, m_dma_eop ? ASSERT_LINE : CLEAR_LINE); +} + +void i82426ex_ib_device::set_dma_channel(int channel, bool state) +{ + m_isabus->dack_line_w(channel, state); + + if (!state) + { + m_dma_channel = channel; + if (m_dma_eop) + m_isabus->eop_w(channel, ASSERT_LINE); + } + else + { + if (m_dma_channel == channel) + { + m_dma_channel = -1; + if (m_dma_eop) + m_isabus->eop_w(channel, CLEAR_LINE); + } + } +} + +void i82426ex_ib_device::iochck_w(int state) +{ + if (!state && !BIT(m_portb, 3) && !m_nmi_mask) + m_host_cpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); +} + +void i82426ex_ib_device::remap_bridge() +{ + m_isabus->remap(AS_PROGRAM, 0, 1 << 24); + m_isabus->remap(AS_IO, 0, 0xffff); +} diff --git a/src/devices/machine/i82426ex_ib.h b/src/devices/machine/i82426ex_ib.h new file mode 100644 index 00000000000..bc767fbc403 --- /dev/null +++ b/src/devices/machine/i82426ex_ib.h @@ -0,0 +1,96 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#ifndef MAME_MACHINE_I82426EX_IB_H +#define MAME_MACHINE_I82426EX_IB_H + +#pragma once + +#include "pci.h" + +#include "bus/isa/isa.h" +#include "cpu/i386/i386.h" +#include "machine/am9517a.h" +#include "machine/pic8259.h" +#include "machine/pit8253.h" +#include "machine/at_keybc.h" +#include "sound/spkrdev.h" + +class i82426ex_ib_device : public device_t +{ +public: + template + i82426ex_ib_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cputag, U &&keybctag) + : i82426ex_ib_device(mconfig, tag, owner, clock) + { + set_hostcputag(std::forward(cputag)); + set_keybctag(std::forward(keybctag)); + } + + i82426ex_ib_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = XTAL(14'318'181).value()); + + void io_map(address_map &map); + void remap_bridge(); + + auto intr() { return m_write_intr.bind(); } + auto spkr() { return m_write_spkr.bind(); } + + auto rtcale() { return m_rtcale.bind(); } + auto rtccs_read() { return m_rtccs_read.bind(); } + auto rtccs_write() { return m_rtccs_write.bind(); } + + template void set_hostcputag(T &&tag) { m_host_cpu.set_tag(std::forward(tag)); } + template void set_keybctag(T &&tag) { m_keybc.set_tag(std::forward(tag)); } + +protected: + virtual void device_start() override; + virtual void device_reset() override; + virtual void device_reset_after_children() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + virtual void device_config_complete() override; + +private: + required_device m_host_cpu; + required_device m_keybc; + + required_device_array m_dma; + required_device_array m_intc; + required_device m_pit; + required_device m_isabus; + + devcb_write_line m_write_intr; + devcb_write_line m_write_spkr; + + devcb_write8 m_rtcale; + devcb_read8 m_rtccs_read; + devcb_write8 m_rtccs_write; + + u8 portb_r(); + void portb_w(u8 data); + void iochck_w(int state); + + int m_dma_eop; + u8 m_dma_page[0x10]; + u8 m_dma_high_byte; + int m_dma_channel; + + u8 m_portb; + int m_refresh_toggle; + int m_iochck; + u8 m_nmi_mask; + + offs_t page_offset(); + void set_dma_channel(int channel, bool state); + + u8 dma_read_byte(offs_t offset); + void dma_write_byte(offs_t offset, u8 data); + u8 dma_read_word(offs_t offset); + void dma_write_word(offs_t offset, u8 data); + void dma1_eop_w(int state); + void dma2_hreq_w(int state); +}; + +DECLARE_DEVICE_TYPE(I82426EX_IB, i82426ex_ib_device) + + +#endif // MAME_MACHINE_I82426EX_IB_H diff --git a/src/mame/ibm/ptpc110.cpp b/src/mame/ibm/ptpc110.cpp index 0f30febf147..5ee641e4963 100644 --- a/src/mame/ibm/ptpc110.cpp +++ b/src/mame/ibm/ptpc110.cpp @@ -302,7 +302,7 @@ void ptpc110_state::ptpc110(machine_config &config) keybc.kbd_irq().set(m_chipset, FUNC(vl82c420_device::irq01_w)); keybc.kbd_clk().set("kbd", FUNC(pc_kbdc_device::clock_write_from_mb)); keybc.kbd_data().set("kbd", FUNC(pc_kbdc_device::data_write_from_mb)); - keybc.aux_irq().set(m_chipset, FUNC(vl82c420_device::irq04_w)); + keybc.aux_irq().set(m_chipset, FUNC(vl82c420_device::irq12_w)); keybc.aux_clk().set("aux", FUNC(pc_kbdc_device::clock_write_from_mb)); keybc.aux_data().set("aux", FUNC(pc_kbdc_device::data_write_from_mb)); diff --git a/src/mame/intel/i420ex.cpp b/src/mame/intel/i420ex.cpp index a6c519cd7ce..06d335804ea 100644 --- a/src/mame/intel/i420ex.cpp +++ b/src/mame/intel/i420ex.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders: +// copyright-holders: Angelo Salese /************************************************************************************************** Intel 420EX PCIset EX "Aries" x86 based HW @@ -14,24 +14,41 @@ Intel 420EX PCIset EX "Aries" x86 based HW - Proprietary PISA riser slot for 1x ISA + 2 PCI slots; TODO: -- skeleton; +- Remaining bits in chipset (SMI, pin mapper & pirqrc); +- Keyboard fails working in places (same as ls5amvp3, forgets to read at $60 for irq ack); +- CMOS memory sets System Time with illegal hour + (workaround: fix it manually then "Exit Saving Changes"); +- AZ08 / AZ07 BIOSes: goes "Auto Configuration Error" with PCI bus, propagate that if cards are + hooked up; +- isa1:sb16_lle: DMA crashes with testsb16.exe +- serport0:logitech_mouse: fails freedos13 init on every odd boot; **************************************************************************************************/ #include "emu.h" #include "bus/isa/isa_cards.h" +#include "bus/pc_kbd/keyboards.h" +#include "bus/pc_kbd/pc_kbdc.h" +#include "bus/pci/clgd543x_alpine.h" #include "bus/pci/pci_slot.h" -//#include "bus/rs232/hlemouse.h" -//#include "bus/rs232/null_modem.h" -//#include "bus/rs232/rs232.h" -//#include "bus/rs232/sun_kbd.h" -//#include "bus/rs232/terminal.h" +#include "bus/rs232/hlemouse.h" +#include "bus/rs232/null_modem.h" +#include "bus/rs232/rs232.h" +#include "bus/rs232/sun_kbd.h" +#include "bus/rs232/terminal.h" #include "cpu/i386/i386.h" +#include "machine/at_keybc.h" +#include "machine/ds128x.h" +#include "machine/i82091aa.h" +#include "machine/i82425ex_psc.h" +#include "machine/i82426ex_ib.h" #include "machine/pci.h" +#include "sound/spkrdev.h" #include "softlist.h" #include "softlist_dev.h" +#include "speaker.h" namespace { @@ -41,25 +58,28 @@ public: i420ex_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_rtc(*this, "rtc") + , m_speaker(*this, "speaker") { } void i420ex(machine_config &config) ATTR_COLD; protected: required_device m_maincpu; + required_device m_rtc; + required_device m_speaker; private: void main_io(address_map &map) ATTR_COLD; void main_map(address_map &map) ATTR_COLD; + + static void intel_superio_config(device_t *device); }; void i420ex_state::main_map(address_map &map) { map.unmap_value_high(); - map(0x0000'0000, 0x0009'ffff).ram(); - map(0x000f'0000, 0x000f'ffff).rom().region("bios", 0); - map(0xffff'0000, 0xffff'ffff).rom().region("bios", 0); } void i420ex_state::main_io(address_map &map) @@ -67,6 +87,35 @@ void i420ex_state::main_io(address_map &map) map.unmap_value_high(); } +static void pc_isa_onboard(device_slot_interface &device) +{ + device.option_add_internal("superio", I82091AA); +} + +static void isa_com(device_slot_interface &device) +{ + device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE); + device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE); + device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE); + device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE); + device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE); + device.option_add("terminal", SERIAL_TERMINAL); + device.option_add("null_modem", NULL_MODEM); + device.option_add("sun_kbd", SUN_KBD_ADAPTOR); +} + +void i420ex_state::intel_superio_config(device_t *device) +{ + i82091aa_device &aip = *downcast(device); + + aip.txd1().set(":serport0", FUNC(rs232_port_device::write_txd)); + aip.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr)); + aip.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts)); + aip.txd2().set(":serport1", FUNC(rs232_port_device::write_txd)); + aip.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr)); + aip.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts)); +} + void i420ex_state::i420ex(machine_config &config) { // Socket 3 / PGA237 @@ -74,41 +123,106 @@ void i420ex_state::i420ex(machine_config &config) I486DX4(config, m_maincpu, 33'000'000); m_maincpu->set_addrmap(AS_PROGRAM, &i420ex_state::main_map); m_maincpu->set_addrmap(AS_IO, &i420ex_state::main_io); -// m_maincpu->set_irq_acknowledge_callback("pci:07.0:pic0", FUNC(pic8259_device::inta_cb)); -// m_maincpu->smiact().set("pci:00.0", FUNC(vt82c598mvp_host_device::smi_act_w)); + m_maincpu->set_irq_acknowledge_callback("ib:intc1", FUNC(pic8259_device::inta_cb)); +// m_maincpu->smiact().set("pci:05.0", FUNC(i82425ex_psc_device::smi_act_w)); + + i82426ex_ib_device &ib(I82426EX_IB(config, "ib", XTAL(14'318'181), "maincpu", "keybc")); + ib.intr().set_inputline("maincpu", INPUT_LINE_IRQ0); + ib.spkr().set([this] (int state) { m_speaker->level_w(state); }); + ib.rtcale().set([this](u8 data) { m_rtc->address_w(data); }); + ib.rtccs_read().set([this]() { return m_rtc->data_r(); }); + ib.rtccs_write().set([this](u8 data) { m_rtc->data_w(data); }); // TODO: config space not known + // 05.0 is clearly host: it's what the BIOS addresses at startup PCI_ROOT(config, "pci", 0); + i82425ex_psc_device &psc(I82425EX_PSC(config, "pci:05.0", 0, "maincpu", "ib", 64*1024*1024)); + psc.ide1_irq_w().set("ib:intc2", FUNC(pic8259_device::ir6_w)); + psc.ide2_irq_w().set("ib:intc2", FUNC(pic8259_device::ir7_w)); + + GD5434_PCI(config, "pci:06.0", 0); // TODO: on proprietary riser -// PCI_SLOT(config, "pci:1", pci_cards, 8, 0, 1, 2, 3, nullptr); -// PCI_SLOT(config, "pci:2", pci_cards, 9, 1, 2, 3, 0, nullptr); + PCI_SLOT(config, "pci:1", pci_cards, 7, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:2", pci_cards, 8, 1, 2, 3, 0, nullptr); -// ISA16_SLOT(config, "board1", 0, "pci:07.0:isabus", isa_internal_devices, "i82091aa", true).set_option_machine_config("i82091aa", intel_superio_config); -// ISA16_SLOT(config, "board2", 0, "pci:07.0:isabus", isa_internal_devices, "rtc", true).set_option_machine_config("rtc", rtc_config); -// ISA16_SLOT(config, "board3", 0, "pci:07.0:isabus", isa_internal_devices, "kbd", true).set_option_machine_config("kbd", kbd_config); - // most likely PCI version really (gd5434 can be ISA16, VL-Bus or PCI) -// ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "vga", true); -// ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false); + ISA16_SLOT(config, "board1", 0, "ib:isabus", pc_isa_onboard, "superio", true).set_option_machine_config("superio", intel_superio_config); + ISA16_SLOT(config, "isa1", 0, "ib:isabus", pc_isa16_cards, nullptr, false); + + // TODO: really DS12887 + DS12885(config, m_rtc); + m_rtc->irq().set("ib:intc2", FUNC(pic8259_device::ir0_w)); + m_rtc->set_century_index(0x32); + + ps2_keyboard_controller_device &keybc(PS2_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); + // TODO: use its own BIOS + // Detection fails with Compaq +// keybc.set_default_bios_tag("compaq"); + keybc.hot_res().set_inputline("maincpu", INPUT_LINE_RESET); + keybc.gate_a20().set_inputline("maincpu", INPUT_LINE_A20); + keybc.kbd_irq().set("ib:intc1", FUNC(pic8259_device::ir1_w)); + keybc.kbd_clk().set("kbd", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.kbd_data().set("kbd", FUNC(pc_kbdc_device::data_write_from_mb)); + keybc.aux_irq().set("ib:intc2", FUNC(pic8259_device::ir4_w)); + keybc.aux_clk().set("aux", FUNC(pc_kbdc_device::clock_write_from_mb)); + keybc.aux_data().set("aux", FUNC(pc_kbdc_device::data_write_from_mb)); + + pc_kbdc_device &pc_kbdc(PC_KBDC(config, "kbd", pc_at_keyboards, "ms_naturl")); + pc_kbdc.out_clock_cb().set(keybc, FUNC(at_kbc_device_base::kbd_clk_w)); + pc_kbdc.out_data_cb().set(keybc, FUNC(at_kbc_device_base::kbd_data_w)); + + pc_kbdc_device &aux_kbdc(PC_KBDC(config, "aux", ps2_mice, nullptr)); + aux_kbdc.out_clock_cb().set(keybc, FUNC(at_kbc_device_base::kbd_clk_w)); + aux_kbdc.out_data_cb().set(keybc, FUNC(at_kbc_device_base::kbd_data_w)); + + rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, "logitech_mouse")); + serport0.rxd_handler().set("board1:superio", FUNC(i82091aa_device::rxd1_w)); + serport0.dcd_handler().set("board1:superio", FUNC(i82091aa_device::ndcd1_w)); + serport0.dsr_handler().set("board1:superio", FUNC(i82091aa_device::ndsr1_w)); + serport0.ri_handler().set("board1:superio", FUNC(i82091aa_device::nri1_w)); + serport0.cts_handler().set("board1:superio", FUNC(i82091aa_device::ncts1_w)); + + rs232_port_device &serport1(RS232_PORT(config, "serport1", isa_com, nullptr)); + serport1.rxd_handler().set("board1:superio", FUNC(i82091aa_device::rxd2_w)); + serport1.dcd_handler().set("board1:superio", FUNC(i82091aa_device::ndcd2_w)); + serport1.dsr_handler().set("board1:superio", FUNC(i82091aa_device::ndsr2_w)); + serport1.ri_handler().set("board1:superio", FUNC(i82091aa_device::nri2_w)); + serport1.cts_handler().set("board1:superio", FUNC(i82091aa_device::ncts2_w)); + + SPEAKER(config, "mono").front_center(); + SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50); } // dump comes from flash updater, each has $80 bytes of header at top (ignoreable) then the actual dump +// .bi1 is eventually copied by BIOS at ISA state $ed (compressed x86 code?) ROM_START( entrada ) - ROM_REGION32_LE( 0x10000, "bios", ROMREGION_ERASEFF ) - // AZ3 version - ROM_LOAD( "03_az0.bio", 0x00000, 0x00080, CRC(e0d3ac40) SHA1(a315be210a6233bf5cd863fb4a6313cdcea26442) ) - ROM_CONTINUE( 0x00000, 0x10000 ) - - // unknown, maybe a bank for the onboard UPI-C42 keyboard MCU? - // doesn't decode as x86 code - ROM_REGION( 0x10000, "mcu", ROMREGION_ERASEFF ) - ROM_LOAD( "03_az0.bi1", 0x00000, 0x00080, CRC(3976fb38) SHA1(17159457ff8b7fa7ab0a97ccf71e5e5c8df0fe3e) ) - ROM_CONTINUE( 0x00000, 0x0c000 ) + ROM_REGION32_LE( 0x20000, "pci:05.0", ROMREGION_ERASEFF ) + ROM_SYSTEM_BIOS(0, "az08", "1.00.08.AZ0") + ROMX_LOAD( "1008az0_.bi1", 0x00000, 0x00080, CRC(c8d22934) SHA1(bd8e9387130d493246dac4bb89bd9aa502721033), ROM_BIOS(0) ) + ROM_CONTINUE( 0x00000, 0x0c000 ) + ROMX_LOAD( "1008az0_.bio", 0x10000, 0x00080, CRC(23fdaa9c) SHA1(0d2c9eeb52d300b5e39cb47d0b498c902b896ed7), ROM_BIOS(0) ) + ROM_CONTINUE( 0x10000, 0x10000 ) + ROM_SYSTEM_BIOS(1, "az07", "1.00.07.AZ0") + ROMX_LOAD( "1007az0_.bi1", 0x00000, 0x00080, CRC(d692eac6) SHA1(3d65ac556a3b86461abcc29579d038f2b1e864e0), ROM_BIOS(1) ) + ROM_CONTINUE( 0x00000, 0x0c000 ) + ROMX_LOAD( "1007az0_.bio", 0x10000, 0x00080, CRC(41ff4579) SHA1(f6c40d8fa6ddf57a3efe9c77a75fa4076bf0e0e8), ROM_BIOS(1) ) + ROM_CONTINUE( 0x10000, 0x10000 ) + ROM_SYSTEM_BIOS(2, "az05", "1.00.05.AZ0") + ROMX_LOAD( "1005az0_.bi1", 0x00000, 0x00080, CRC(91287697) SHA1(682712ff12a8ddb1172b879cfdfe79ec466430ca), ROM_BIOS(2) ) + ROM_CONTINUE( 0x00000, 0x0c000 ) + ROMX_LOAD( "1005az0_.bio", 0x10000, 0x00080, CRC(3212d818) SHA1(7b2aacf76263f4aa2e14d20a44c10cf5dcb198cd), ROM_BIOS(2) ) + ROM_CONTINUE( 0x10000, 0x10000 ) + ROM_SYSTEM_BIOS(3, "az03", "1.00.02.AZ0") + ROMX_LOAD( "03_az0.bi1", 0x00000, 0x00080, CRC(3976fb38) SHA1(17159457ff8b7fa7ab0a97ccf71e5e5c8df0fe3e), ROM_BIOS(3) ) + ROM_CONTINUE( 0x00000, 0x0c000 ) + ROMX_LOAD( "03_az0.bio", 0x10000, 0x00080, CRC(e0d3ac40) SHA1(a315be210a6233bf5cd863fb4a6313cdcea26442), ROM_BIOS(3) ) + ROM_CONTINUE( 0x10000, 0x10000 ) + // AZ02 known to exist ROM_END } // anonymous namespace -COMP( 1994, entrada, 0, 0, i420ex, 0, i420ex_state, empty_init, "Intel", "Classic/PCI LP \"Entrada\" (Intel I420EX Aries chipset)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +COMP( 1994, entrada, 0, 0, i420ex, 0, i420ex_state, empty_init, "Intel", "Classic/PCI LP \"Entrada\" (Intel I420EX Aries chipset)", MACHINE_NOT_WORKING ) diff --git a/src/mame/pc/README.md b/src/mame/pc/README.md index c3aa8f596f7..c7a9ecdc3b0 100644 --- a/src/mame/pc/README.md +++ b/src/mame/pc/README.md @@ -49,3 +49,4 @@ ISA debug port $80, `wpiset 0x80,1,w,1,{printf "%02x",wpdata;g}`. - "Unknown" CPU: r/w the info thru CMOS (Phoenix BIOSes do something similar); - DOS (up to Win98) startup stuck while looping around on clearly incorrect conventional memory opcodes: fix A20, chipset possibly has fast A20 mechanism at I/O $92; - Award System Config shows N/A for PCI card IRQs: check PCI config space numbering, use cards with confirmed good line/pin setup. +- Running awfully slow with moderate CPU clocks: don't use `DERIVED_CLOCK` with PIT; From 4b73e05ba266ed43d38d3f931242c9ff8cfb5abb Mon Sep 17 00:00:00 2001 From: m1macrophage <168948267+m1macrophage@users.noreply.github.com> Date: Tue, 17 Mar 2026 06:47:52 -0700 Subject: [PATCH 297/351] sound/va_eg.cpp: Added OTA-based envelope generator. (#15112) sequential/prophet5.cpp: Used it for the Glide circuit. --- src/devices/sound/va_eg.cpp | 189 +++++++++++++++++++++++++++++++ src/devices/sound/va_eg.h | 87 ++++++++++++++ src/mame/sequential/prophet5.cpp | 80 ++++++++++--- 3 files changed, 343 insertions(+), 13 deletions(-) diff --git a/src/devices/sound/va_eg.cpp b/src/devices/sound/va_eg.cpp index cb10cb2c394..e3619446be3 100644 --- a/src/devices/sound/va_eg.cpp +++ b/src/devices/sound/va_eg.cpp @@ -5,9 +5,19 @@ #include "va_eg.h" #include "machine/rescap.h" +#define LOG_PARAMS (1U << 1) +#define LOG_CONVERGENCE (1U << 2) + +#define VERBOSE (0) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + + // The envelope is considered completed after this many time constants. static constexpr const float TIME_CONSTANTS_TO_END = 10; + va_rc_eg_device::va_rc_eg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, VA_RC_EG, tag, owner, clock) , device_sound_interface(mconfig, *this) @@ -157,4 +167,183 @@ void va_rc_eg_device::snapshot() m_t_end_approx = m_t_start + attotime::from_double(TIME_CONSTANTS_TO_END * m_r * m_c); } + +va_ota_eg_device::va_ota_eg_device(const machine_config &mconfig, const char *tag, device_t *owner, ota_type ota, float c) + : device_t(mconfig, VA_OTA_EG, tag, owner, 0) + , device_sound_interface(mconfig, *this) + , m_c(c) + , m_max_iout_scale(1) + , m_stream(nullptr) + , m_converged(true) + , m_g(0) + , m_max_step(0) + , m_target_v(0) + , m_iabc(1E-3F) + , m_v(0) +{ + // Based on the "Peak Output Current" specs in the datasheets. + switch (ota) + { + case ota_type::LM13600: + case ota_type::LM13700: + case ota_type::CA3080: + m_max_iout_scale = 1.0F; + break; + case ota_type::CA3280: + m_max_iout_scale = 4.1F / 5.0F; + break; + default: + fatalerror("%s: Unrecognized ota_type.\n", tag); + } +} + +va_ota_eg_device::va_ota_eg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : va_ota_eg_device(mconfig, tag, owner, ota_type::CA3280, CAP_U(1)) +{ +} + +void va_ota_eg_device::set_target_v(float v) +{ + if (v == m_target_v) + return; + m_stream->update(); + m_target_v = v; + m_converged = false; + LOGMASKED(LOG_PARAMS, "%s: Target V: %f\n", tag(), m_target_v); +} + +void va_ota_eg_device::set_iabc(float iabc) +{ + if (iabc == m_iabc) + return; + m_stream->update(); + m_iabc = iabc; + recalc(); + LOGMASKED(LOG_PARAMS, "%s: Iabc: %e\n", tag(), m_iabc); +} + +void va_ota_eg_device::device_start() +{ + m_stream = stream_alloc(0, 1, SAMPLE_RATE_OUTPUT_ADAPTIVE); + save_item(NAME(m_converged)); + save_item(NAME(m_g)); + save_item(NAME(m_max_step)); + save_item(NAME(m_target_v)); + save_item(NAME(m_iabc)); + save_item(NAME(m_v)); +} + +void va_ota_eg_device::device_reset() +{ + recalc(); +} + +void va_ota_eg_device::recalc() +{ + const float h = 1.0F / float(m_stream->sample_rate()); + m_g = (h / 2.0F) * m_iabc * m_max_iout_scale / m_c; + m_max_step = 2.0F * m_g; +} + +void va_ota_eg_device::sound_stream_update(sound_stream &stream) +{ + /* + For an OTA: Iout = s * Iabc * tanh((vp - vm) / (2 * VT)) + Where: + s ~ A device-specific scaling factor. Typically 1. + Iabc ~ Control current. + vp ~ Voltage at the '+' input. + vm ~ Voltage at the '-' input. + VT ~ Thermal voltage. A temperature-dependent constant. + + In this EG application, the target voltage (Vtarget) is applied to 'vp', and + the EG output (v(t)) is fed back to 'vm'. + Let x(t) = (Vtarget - v(t)) / (2 * VT) + Therefore: Iout(t) = s * Iabc * tanh(x(t)) + + Simulate using the trapezoidal rule: + v(t+1) = v(t) + (h/2) * (v'(t) + v'(t+1)), where 'h' is the timestep. + + In this EG application, the OTA's output current is (dis)charging a + capacitor. Therefore: + v'(t) = Iout(t) / C = (s * Iabc / C) * tanh(x(t)) + + Let G = (s * Iabc / C) * (h / 2). Now: + v(t+1) = v(t) + G * tanh(x(t)) + G * tanh(x(t+1)) + + Solving for v(t+1) is only possible with iterative methods, since it also + appears inside a tanh (recall that x(t+1) is a function of v(t+1)). Instead, + use the "linearization at operating point" approximation: + tanh(x(t+1)) = tanh(x(t)) + (x(t+1) - x(t)) * tanh'(x(t)) + + Substitute on the simulation equation to get: + v(t+1) = v(t) + G * tanh(x(t)) + G * (tanh(x(t)) + (x(t+1) - x(t)) * tanh'(x(t))) + + Substitute the `x()`s that are outside the `tanh()`s and simplify to get: + v(t+1) = v(t) + 2 * G * tanh(x(t)) + (G / (2 * VT)) * (-v(t+1) + v(t)) * tanh'(x(t)) + + Now it is possible to solve for v(t+1). After some algebra: + v(t+1) = v(t) + (2 * G * tanh(x(t))) / (1 + (G / (2 * VT)) * tanh'(x(t))) + + + Note that tanh((Vtarget - v(t)) / (2 * VT)) will saturate when + abs(Vtarget - v(t)) > ~10 * VT. When that happens: + tan(x(t)) = tan(x(t+1)) = +/- 1 (+ or - depending on whether Vtarget is + larger or smaller than v(t) respectively). + + During saturation, the simulation equation simplifies to a linear ramp: + v(t+1) = v(t) + G * tanh(x(t)) + G * tanh(x(t+1)) ==> + v(t+1) = v(t) +/- 2 * G + */ + + constexpr float VT = 25.7E-3F; // Thermal voltage at 25 degrees C. + constexpr float INV_2VT = 1.0F / (2.0F * VT); + constexpr float V_OTA_SAT = 10 * VT; + + if (m_converged) + { + stream.fill(0, m_target_v); + return; + } + + float v_step = 0; + const float last_v = m_v; + const int n = stream.samples(); + + for (int i = 0; i < n; ++i) + { + const float dv = m_target_v - m_v; + if (dv > V_OTA_SAT) + { + v_step = m_max_step; + } + else if (dv < -V_OTA_SAT) + { + v_step = -m_max_step; + } + else + { + const float tanhv = tanhf(INV_2VT * dv); + const float dtanhv = 1.0F - tanhv * tanhv; // tanh'(v) = sech(v) ^ 2 = 1 - tanh(v) ^ 2 + v_step = (2.0F * m_g * tanhv) / (1.0F + m_g * INV_2VT * dtanhv); + } + m_v += v_step; + stream.put(0, i, m_v); + } + + if (fabsf(m_v - last_v) < 1E-15 || fabsf(m_target_v - m_v) < 1E-6) + { + m_converged = true; + LOGMASKED(LOG_CONVERGENCE, "%s: converged: %e %e %e - %e %e\n", + tag(), m_target_v, m_target_v - m_v, m_v - last_v, v_step, m_max_step); + } + else + { + LOGMASKED(LOG_CONVERGENCE, "%s: NOT converged: %e %e %e - %e %e\n", + tag(), m_target_v, m_target_v - m_v, m_v - last_v, v_step, m_max_step); + } +} + + DEFINE_DEVICE_TYPE(VA_RC_EG, va_rc_eg_device, "va_rc_eg", "RC-based Envelope Generator") +DEFINE_DEVICE_TYPE(VA_OTA_EG, va_ota_eg_device, "va_ota_eg", "OTA-based Envelope Generator") diff --git a/src/devices/sound/va_eg.h b/src/devices/sound/va_eg.h index 65f2d968d50..53e170bd9c9 100644 --- a/src/devices/sound/va_eg.h +++ b/src/devices/sound/va_eg.h @@ -7,6 +7,8 @@ #pragma once DECLARE_DEVICE_TYPE(VA_RC_EG, va_rc_eg_device) +DECLARE_DEVICE_TYPE(VA_OTA_EG, va_ota_eg_device) + // Building block for emulating envelope generators (EGs) based on a single RC // circuit. The controlling source sets a target voltage and the device @@ -77,4 +79,89 @@ private: attotime m_t_end_approx; }; +// An envelope generator (EG) built around an operational transconductance +// amplifier (OTA). +// +// When the EG output is far from the target (e.g. > ~0.2V), the EG will ramp +// towards the target linearly. As the output approaches the target, the EG ramp +// will start curving. When the difference is < ~0.02V, the ramp will closely +// approximate an "RC" curve with R ~= s * Iabc / (2 * VT). Where 's' is a +// device-specific constant (typically ~1) and VT is the thermal voltage. +// +// x Iabc +// ___|__ | +// | | \ | +// Target V ---------- |+ Id \ | +// | \ | +// | \ | +// | OTA OO ---+---- BUFFER --- EG output V +// | / | | +// | / C | +// +------- |- / | | +// | |______/ GND | +// | | +// +------------------------------------------+ +// +// Note that this configuration does not make use of the linearizing diodes (Id +// input). The emulation here assumes the Id input is disconnected or connected +// to the negative supply, for OTAs that have it. +// +// A variant of the above uses anti-parallel diodes to connect the inputs (e.g. +// prophet 5 glide EG). That variant behaves pretty much identically. +// +// x Iabc +// ___|__ | +// | | \ | +// Target V --- R ---+---+--- |+ Id \ | +// | | | \ | +// D ^ | \ | +// v D | OTA OO ---+---- BUFFER --- EG output V +// | | | / | | +// | | | / C | +// +---+--- |- / | | +// | |______/ GND | +// | | +// +-------------------- R -------------------+ +// +// TODO: Implement and document the scaled input variant (e.g. moog source EGs). +// +class va_ota_eg_device : public device_t, public device_sound_interface +{ +public: + enum class ota_type : s8 + { + LM13600 = 0, + LM13700, + CA3080, + CA3280, + }; + + va_ota_eg_device(const machine_config &mconfig, const char *tag, device_t *owner, ota_type ota, float c) ATTR_COLD; + va_ota_eg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) ATTR_COLD; + + void set_target_v(float v); + void set_iabc(float iabc); // Iabc control current in Amperes. + +protected: + void device_start() override ATTR_COLD; + void device_reset() override ATTR_COLD; + void sound_stream_update(sound_stream &stream) override; + +private: + void recalc(); + + // configuration + const float m_c; + float m_max_iout_scale; + sound_stream *m_stream; + + // state + bool m_converged; + float m_g; // Caches the product of multiple factors. See recalc(). + float m_max_step; + float m_target_v; + float m_iabc; + float m_v; +}; + #endif // MAME_SOUND_VA_EG_H diff --git a/src/mame/sequential/prophet5.cpp b/src/mame/sequential/prophet5.cpp index 975a3534ff4..11a2075fc88 100644 --- a/src/mame/sequential/prophet5.cpp +++ b/src/mame/sequential/prophet5.cpp @@ -64,6 +64,7 @@ the current knob positions, press the "preset" button ('P') to exit preset mode #include "sound/flt_rc.h" #include "sound/mixer.h" #include "sound/mm5837.h" +#include "sound/va_eg.h" #include "sound/va_ops.h" #include "sound/va_vca.h" #include "video/pwm.h" @@ -94,6 +95,7 @@ constexpr double VCC = 5.0; constexpr double VPLUS = 15.0; constexpr double VMINUS = -15.0; constexpr double MAX_CV_IN = 10.0; // Maximun voltage for CV inputs on back panel. +constexpr double VD = 0.6; // Diode voltage drop / PNP emitter-base voltage drop. double normalized(const required_ioport &input) { @@ -115,7 +117,6 @@ double cv2cc(double cv, double r) // These values were chosen to work for the Rs found on the Prophet 5. constexpr double CV_ZERO = 0.3; constexpr double CV_LINEAR = 0.8; - constexpr double QVBE = 0.6; if (cv <= CV_ZERO) { @@ -125,7 +126,7 @@ double cv2cc(double cv, double r) else if (cv >= CV_LINEAR) { // Large control voltage. Current is essentially linear wrt voltage. - return (cv - QVBE) / r; + return (cv - VD) / r; } else { @@ -139,7 +140,7 @@ double cv2cc(double cv, double r) constexpr double P0[2] = { 0.3, 0.0 }; constexpr double P1[2] = { 0.6, 0.0 }; - const double P2[2] = { 0.8, (0.8 - QVBE) / r }; + const double P2[2] = { 0.8, (0.8 - VD) / r }; const double t = (cv - P0[0]) / (P2[0] - P0[0]); const double t1 = 1.0 - t; @@ -241,7 +242,7 @@ private: device_sound_interface *const m_filt_sum_cv; device_sound_interface *const m_noise; - sound_stream *m_stream = nullptr; + sound_stream *m_stream; required_device m_vca_eg; // U412 required_device m_vca; // U477A @@ -298,6 +299,7 @@ prophet5_voice_device::prophet5_voice_device( , m_filt_offset_name(util::string_format("%s TRIMMER: FILT OFFSET", strmakeupper(basetag()))) , m_filt_sum_cv(filt_sum_cv) , m_noise(noise) + , m_stream(nullptr) , m_vca_eg(*this, "vca_eg") , m_vca(*this, "vca") , m_filt_eg(*this, "filt_eg") @@ -488,13 +490,16 @@ protected: private: static double eg_rate_cv(double cv); static double eg_sustain_cv(double cv); + static double glide_rate_cc(double cv); void update_wmod_amount(); void update_wmod_routing(); + void update_glide_out_routing(); void update_filter_fixed_cvs(); void update_voice_volume(); void update_master_volume(); + required_device m_glide_eg; // U381A (CA3280) + surrounding components. required_device m_mod_noise_vca; // U378B required_device m_wmod; // R2, U374D (LM348) - W-MOD BUFFER required_device m_filt_fixed_cvs; @@ -548,6 +553,7 @@ DEFINE_DEVICE_TYPE(PROPHET5_AUDIO, prophet5_audio_device, "prophet5_audio", "Pro prophet5_audio_device::prophet5_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, PROPHET5_AUDIO, tag, owner, clock) + , m_glide_eg(*this, "glide_eg") , m_mod_noise_vca(*this, "mod_noise_vca") , m_wmod(*this, "wmod") , m_filt_fixed_cvs(*this, "filt_fixed_cvs") @@ -573,6 +579,16 @@ void prophet5_audio_device::device_add_mconfig(machine_config &config) { // *** Modulation *** + // Unison / Glide CV generator. + // An OTA-based envelope generator produces the "GLIDE OUT CV". It slews + // towards UNISON CV with a rate controlled by GLIDE CV. The EG ramp starts + // as linear, and transitions to an "RC" curve when very close to the target + // voltage. The EG consists of U381A (CA3280), U380A (TL082) and surrounding + // passives. The GLIDE OUT CV is distributed to the "sum CVs" of the filter + // and two oscillators (see update_glide_out_routing()). + VA_OTA_EG(config, m_glide_eg, va_ota_eg_device::ota_type::CA3280, CAP_U(0.1)) // C376 + .add_route(0, m_filt_cv_mixer, 1.0); + // Pink noise modulation source. // The output of the noise IC is offset, scaled, inverted and low-pass- // filtered by U374B (LM348 op-amp) and surrounding passives. The @@ -716,6 +732,7 @@ void prophet5_audio_device::device_reset() update_wmod_amount(); update_wmod_routing(); + update_glide_out_routing(); update_filter_fixed_cvs(); update_voice_volume(); update_master_volume(); @@ -739,7 +756,7 @@ void prophet5_audio_device::filt_kbd_s_w(int state) { m_filt_kbd_s = bool(state); LOGMASKED(LOG_PROG_LATCH, "filt_kbd_s = %d\n", m_filt_kbd_s); - update_filter_fixed_cvs(); + update_glide_out_routing(); } void prophet5_audio_device::wmod_filt_s_w(int state) @@ -781,10 +798,8 @@ void prophet5_audio_device::cv_w(offs_t cv_index, double cv) m_noise_vca->set_fixed_gain_cv(cv2cc(cv, RES_K(75))); // Q305, R327 break; - case CV_UNISON: - if (m_filt_kbd_s) - update_filter_fixed_cvs(); - break; + case CV_GLIDE: m_glide_eg->set_iabc(glide_rate_cc(cv)); break; + case CV_UNISON: m_glide_eg->set_target_v(cv); break; case CV_FILT_CUTOFF: update_filter_fixed_cvs(); break; case CV_FILT_1_SH: m_voices[0]->filt_sh_w(cv); break; @@ -890,6 +905,42 @@ double prophet5_audio_device::eg_sustain_cv(double cv) return cv * RES_VOLTAGE_DIVIDER(RES_K(4.75), RES_K(4.75)); // both 1% } +double prophet5_audio_device::glide_rate_cc(double cv) +{ + // The glide control current (CC) generator is a voltage-to-exponential-current + // converter built around a matched PNP transistor pair (Q309). + // + // This setup is a typical PNP-based BJT differential pair, with one side + // tied to GND. + // + // +15V----R(30K) R3126 + // | + // +--------+ + // | | + // R3124 v v + // GLIDE CV---R(100K)---+---------------PNP PNP--+--GND + // | | | | + // R(2.7K) R(100K) +---+ + // R3125 | R3123 | + // GND +-------------CA3280 Iabc + + assert(cv >= 0.0); + + constexpr double VCE_MIN = 0.1; // Minimum collector-emitter voltage drop. + constexpr double VT = 25.7E-3F; // Thermal voltage constant at 25 deg C. + + constexpr double I_EE = (VPLUS - VD) / RES_K(30); // Approximate total current to both PNP emitters. + const double v_b = cv * RES_VOLTAGE_DIVIDER(RES_K(100), RES_K(2.7)); + const double i_c = I_EE / (1 + exp(v_b / VT)); // Theoretical collector current. + + // The collector resistor limits the collector current. + constexpr double VC_MAX = /*GND*/0 + VD - VCE_MIN; // Max possible collector voltage. + constexpr double VIABC = VMINUS + 2 * VD; // CA3280 Iabc input is ~2 diode drops above the negative supply. + constexpr double IC_MAX = (VC_MAX - VIABC) / RES_K(100); // Max possible collector current. + + return std::min(i_c, IC_MAX); +} + void prophet5_audio_device::update_wmod_amount() { // The two VCAs are current sources. @@ -920,16 +971,19 @@ void prophet5_audio_device::update_wmod_routing() LOGMASKED(LOG_WHEEL, "Mod wheel routing - filter: %f\n", filt_gain); } +void prophet5_audio_device::update_glide_out_routing() +{ + const double filt_route_gain = m_filt_kbd_s ? (1.0 / RES_K(100)) : 0.0; // R372 (1%) + m_glide_eg->set_route_gain(0, m_filt_cv_mixer, 0, filt_route_gain); +} + void prophet5_audio_device::update_filter_fixed_cvs() { // Multiple cutoff frequency sources are summed and inverted by U367A ( // LM348, configured as an inverting mixer) and surrounding resistors. - // TODO: Glide amount is not yet emulated. The "glide out" CV tracks the - // "unison" CV for now, regardless of glide amount. const double i_cv_in = MAX_CV_IN * normalized(m_filter_cv_in) / RES_K(100); // R374 (1%) const double i_ctf_cv = m_cv[CV_FILT_CUTOFF] / RES_K(100); // R352 (1%) - const double i_glide_out_cv = m_filt_kbd_s ? (m_cv[CV_UNISON] / RES_K(100)) : 0.0; // R372 (1%) - m_filt_fixed_cvs->set_value(i_cv_in + i_ctf_cv + i_glide_out_cv); + m_filt_fixed_cvs->set_value(i_cv_in + i_ctf_cv); } void prophet5_audio_device::update_voice_volume() From f23087d395f323a64bd9f6f799bdca0bd55319c5 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Wed, 18 Mar 2026 01:33:31 +1100 Subject: [PATCH 298/351] Some prep work for extending offs_t to 64 bits. [Vas Crabb, Ryan Holtz] This covers some of stuff highlighted in #14689 where the approach to apply is reasonably obvious and the changes are harmless when offs_t doesn't change size. Most of this is being more strict with offs_t vs uint32_t and switching to type-safe formatting functions. Also renamed gaelco/gaelcof3.cpp to gaelco/futbol3.cpp since the company name is in the project name anyway. --- src/devices/bus/coco/coco_dwsock.cpp | 19 +++-- src/devices/bus/coco/cococart.cpp | 2 +- src/devices/bus/isa/ex1280.cpp | 4 +- src/devices/bus/pet/superpet.cpp | 7 +- src/devices/cpu/arm7/arm7.cpp | 24 +++--- src/devices/cpu/arm7/arm7.h | 24 +++--- src/devices/cpu/dspp/dspp.cpp | 58 ++++++------- src/devices/cpu/dspp/dspp.h | 2 +- src/devices/cpu/f2mc16/f2mc16d.cpp | 2 +- src/devices/cpu/f2mc16/f2mc16d.h | 2 +- src/devices/cpu/h8500/h8500dasm.cpp | 2 +- src/devices/cpu/h8500/h8500dasm.h | 2 +- src/devices/cpu/i386/athlon.cpp | 25 ++++-- src/devices/cpu/i386/i386.cpp | 81 ++++++++++++------- src/devices/cpu/i386/i386.h | 4 +- src/devices/cpu/i386/i386op16.hxx | 2 +- src/devices/cpu/i386/i386op32.hxx | 2 +- src/devices/cpu/i386/i386segs.hxx | 4 +- src/devices/cpu/mips/mips1.cpp | 11 ++- src/devices/cpu/mips/mips1.h | 6 +- src/devices/cpu/olms66k/nx8dasm.cpp | 2 +- src/devices/cpu/olms66k/nx8dasm.h | 2 +- src/devices/cpu/powerpc/ppccom.cpp | 21 ++--- src/devices/machine/68340ser.cpp | 2 +- src/devices/machine/68340sim.cpp | 4 +- .../machine/generalplus_gpl162xx_soc.cpp | 12 +-- .../machine/generalplus_gpl162xx_soc.h | 4 +- src/devices/machine/gt64xxx.cpp | 2 +- src/devices/machine/gt64xxx.h | 2 +- src/devices/machine/sis630_host.cpp | 4 +- src/devices/sound/discrete.cpp | 38 +++++---- src/devices/sound/discrete.h | 11 ++- src/devices/sound/qs1000.cpp | 14 ++-- src/devices/video/ym7101.cpp | 2 +- src/mame/gaelco/{gaelcof3.cpp => futbol3.cpp} | 4 +- src/mame/konami/konamim2.cpp | 12 ++- src/mame/konami/xmen.cpp | 35 ++++---- src/mame/mame.lst | 20 ++--- src/mame/skeleton/molecular.cpp | 6 +- src/mame/taito/gladiatr.cpp | 5 +- src/mame/taito/taitoair.cpp | 4 +- src/mame/televideo/ts803.cpp | 42 +++++----- 42 files changed, 292 insertions(+), 239 deletions(-) rename src/mame/gaelco/{gaelcof3.cpp => futbol3.cpp} (99%) diff --git a/src/devices/bus/coco/coco_dwsock.cpp b/src/devices/bus/coco/coco_dwsock.cpp index b11172ec8a2..f716dc14b41 100644 --- a/src/devices/bus/coco/coco_dwsock.cpp +++ b/src/devices/bus/coco/coco_dwsock.cpp @@ -3,14 +3,17 @@ #include "emu.h" #include "coco_dwsock.h" -#include #include + #ifdef __GNUC__ #include #endif #include #include +//#define VERBOSE 1 +#include "logmacro.h" + //************************************************************************** // DEVICE DEFINITIONS @@ -110,7 +113,7 @@ void beckerport_device::device_stop() { if (m_pSocket) { - printf("%s: Closing connection to Drivewire server\n", tag()); + osd_printf_verbose("%s: Closing connection to Drivewire server\n", tag()); m_pSocket.reset(); } } @@ -144,11 +147,11 @@ u8 beckerport_device::read(offs_t offset) // Try to read from dws std::error_condition filerr = m_pSocket->read(m_buf, 0, sizeof(m_buf), m_rx_pending); if (filerr && (std::errc::operation_would_block != filerr)) - osd_printf_error("%s: coco_dwsock.c: beckerport_device::read() socket read operation failed with error %s:%d %s\n", tag(), filerr.category().name(), filerr.value(), filerr.message()); + osd_printf_error("%s: beckerport_device::read() socket read operation failed with error %s:%d %s\n", tag(), filerr.category().name(), filerr.value(), filerr.message()); else m_head = 0; } - //logerror("beckerport_device: status read. %i bytes remaining.\n", m_rx_pending); + LOG("status read. %d bytes remaining.\n", m_rx_pending); data = (m_rx_pending > 0) ? 2 : 0; break; case DWS_DATA: @@ -162,7 +165,7 @@ u8 beckerport_device::read(offs_t offset) //logerror("beckerport_device: data read 1 byte (0x%02x). %i bytes remaining.\n", data&0xff, m_rx_pending); break; default: - fprintf(stderr, "%s: read from bad offset %d\n", __FILE__, offset); + logerror("read from bad offset %u\n", offset); } return data; @@ -184,16 +187,16 @@ void beckerport_device::write(offs_t offset, u8 data) switch (offset) { case DWS_STATUS: - //logerror("beckerport_write: error: write (0x%02x) to status register\n", d); + LOG("beckerport_write: error: write (0x%02x) to status register\n", data); break; case DWS_DATA: filerr = m_pSocket->write(&d, 0, 1, written); if (filerr) osd_printf_error("%s: coco_dwsock.c: beckerport_device::write() socket write operation failed with error %s:%d %s\n", tag(), filerr.category().name(), filerr.value(), filerr.message()); - //logerror("beckerport_write: data write one byte (0x%02x)\n", d & 0xff); + LOG("beckerport_write: data write one byte (0x%02x)\n", data); break; default: - fprintf(stderr, "%s: write to bad offset %d\n", __FILE__, offset); + logerror("write to bad offset %u\n", offset); } } diff --git a/src/devices/bus/coco/cococart.cpp b/src/devices/bus/coco/cococart.cpp index 59ebce1852d..0e15bc9b3c1 100644 --- a/src/devices/bus/coco/cococart.cpp +++ b/src/devices/bus/coco/cococart.cpp @@ -556,7 +556,7 @@ static std::error_condition read_coco_rpk(std::unique_ptr &&s return err; // copy the bytes - offs_t size = (offs_t) std::min(contents.size(), (size_t)cart_length - pos); + size_t const size = std::min(contents.size(), cart_length - pos); memcpy(&mem[pos], &contents[0], size); pos += size; } diff --git a/src/devices/bus/isa/ex1280.cpp b/src/devices/bus/isa/ex1280.cpp index d96b9d74d53..4a11bbce58f 100644 --- a/src/devices/bus/isa/ex1280.cpp +++ b/src/devices/bus/isa/ex1280.cpp @@ -167,7 +167,7 @@ TMS340X0_SCANLINE_RGB32_CB_MEMBER(isa16_ex1280_device::scanline_update) TMS340X0_TO_SHIFTREG_CB_MEMBER(isa16_ex1280_device::to_shiftreg) { - printf("address to shiftreg: %08x\n", address); + logerror("address to shiftreg: %08x\n", address); if (address < 0xa00000) { memcpy(shiftreg, &m_vram[address >> 4], 0x400); @@ -181,7 +181,7 @@ TMS340X0_TO_SHIFTREG_CB_MEMBER(isa16_ex1280_device::to_shiftreg) TMS340X0_FROM_SHIFTREG_CB_MEMBER(isa16_ex1280_device::from_shiftreg) { - printf("address from shiftreg: %08x\n", address); + logerror("address from shiftreg: %08x\n", address); if (address < 0xa00000) { memcpy(&m_vram[address >> 4], shiftreg, 0x400); diff --git a/src/devices/bus/pet/superpet.cpp b/src/devices/bus/pet/superpet.cpp index 1b6bb9e80df..5c54638f749 100644 --- a/src/devices/bus/pet/superpet.cpp +++ b/src/devices/bus/pet/superpet.cpp @@ -8,6 +8,7 @@ #include "emu.h" #include "superpet.h" + #include "bus/rs232/rs232.h" #include "cpu/m6809/m6809.h" @@ -312,7 +313,7 @@ void superpet_device::pet_bd_w(offs_t offset, uint8_t data, int &sel) case 0xefe2: case 0xefe3: m_dongle->write(offset & 0x03, data); - printf("6702 %u %02x\n", offset & 0x03, data); + logerror("6702 %u %02x\n", offset & 0x03, data); break; case 0xeff0: @@ -343,7 +344,7 @@ void superpet_device::pet_bd_w(offs_t offset, uint8_t data, int &sel) m_system = data; update_cpu(); - printf("SYSTEM %02x\n", data); + logerror("SYSTEM %02x\n", data); } break; @@ -365,7 +366,7 @@ void superpet_device::pet_bd_w(offs_t offset, uint8_t data, int &sel) */ m_bank = data; - printf("BANK %02x\n", data); + logerror("BANK %02x\n", data); break; } } diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp index 89c89afada5..0fbd29062dd 100644 --- a/src/devices/cpu/arm7/arm7.cpp +++ b/src/devices/cpu/arm7/arm7.cpp @@ -2104,7 +2104,7 @@ void arm946es_cpu_device::RefreshITCM() } } -void arm946es_cpu_device::arm7_cpu_write32(uint32_t addr, uint32_t data) +void arm946es_cpu_device::arm7_cpu_write32(offs_t addr, uint32_t data) { addr &= ~3; @@ -2125,7 +2125,7 @@ void arm946es_cpu_device::arm7_cpu_write32(uint32_t addr, uint32_t data) } -void arm946es_cpu_device::arm7_cpu_write16(uint32_t addr, uint16_t data) +void arm946es_cpu_device::arm7_cpu_write16(offs_t addr, uint16_t data) { addr &= ~1; if ((addr >= cp15_itcm_base) && (addr <= cp15_itcm_end)) @@ -2144,7 +2144,7 @@ void arm946es_cpu_device::arm7_cpu_write16(uint32_t addr, uint16_t data) m_program->write_word(addr, data); } -void arm946es_cpu_device::arm7_cpu_write8(uint32_t addr, uint8_t data) +void arm946es_cpu_device::arm7_cpu_write8(offs_t addr, uint8_t data) { if ((addr >= cp15_itcm_base) && (addr <= cp15_itcm_end)) { @@ -2160,7 +2160,7 @@ void arm946es_cpu_device::arm7_cpu_write8(uint32_t addr, uint8_t data) m_program->write_byte(addr, data); } -uint32_t arm946es_cpu_device::arm7_cpu_read32(uint32_t addr) +uint32_t arm946es_cpu_device::arm7_cpu_read32(offs_t addr) { uint32_t result; @@ -2204,7 +2204,7 @@ uint32_t arm946es_cpu_device::arm7_cpu_read32(uint32_t addr) return result; } -uint32_t arm946es_cpu_device::arm7_cpu_read16(uint32_t addr) +uint32_t arm946es_cpu_device::arm7_cpu_read16(offs_t addr) { addr &= ~1; @@ -2222,7 +2222,7 @@ uint32_t arm946es_cpu_device::arm7_cpu_read16(uint32_t addr) return m_program->read_word(addr); } -uint8_t arm946es_cpu_device::arm7_cpu_read8(uint32_t addr) +uint8_t arm946es_cpu_device::arm7_cpu_read8(offs_t addr) { if ((addr >= cp15_itcm_base) && (addr <= cp15_itcm_end)) { @@ -2308,7 +2308,7 @@ void arm1176jzf_s_cpu_device::arm7_rt_w_callback(offs_t offset, uint32_t data) /*************************************************************************** * Default Memory Handlers ***************************************************************************/ -void arm7_cpu_device::arm7_cpu_write32(uint32_t addr, uint32_t data) +void arm7_cpu_device::arm7_cpu_write32(offs_t addr, uint32_t data) { if( COPRO_CTRL & COPRO_CTRL_MMU_EN ) { @@ -2323,7 +2323,7 @@ void arm7_cpu_device::arm7_cpu_write32(uint32_t addr, uint32_t data) } -void arm7_cpu_device::arm7_cpu_write16(uint32_t addr, uint16_t data) +void arm7_cpu_device::arm7_cpu_write16(offs_t addr, uint16_t data) { if( COPRO_CTRL & COPRO_CTRL_MMU_EN ) { @@ -2337,7 +2337,7 @@ void arm7_cpu_device::arm7_cpu_write16(uint32_t addr, uint16_t data) m_program->write_word(addr, data); } -void arm7_cpu_device::arm7_cpu_write8(uint32_t addr, uint8_t data) +void arm7_cpu_device::arm7_cpu_write8(offs_t addr, uint8_t data) { if( COPRO_CTRL & COPRO_CTRL_MMU_EN ) { @@ -2350,7 +2350,7 @@ void arm7_cpu_device::arm7_cpu_write8(uint32_t addr, uint8_t data) m_program->write_byte(addr, data); } -uint32_t arm7_cpu_device::arm7_cpu_read32(uint32_t addr) +uint32_t arm7_cpu_device::arm7_cpu_read32(offs_t addr) { uint32_t result; @@ -2374,7 +2374,7 @@ uint32_t arm7_cpu_device::arm7_cpu_read32(uint32_t addr) return result; } -uint32_t arm7_cpu_device::arm7_cpu_read16(uint32_t addr) +uint32_t arm7_cpu_device::arm7_cpu_read16(offs_t addr) { uint32_t result; @@ -2396,7 +2396,7 @@ uint32_t arm7_cpu_device::arm7_cpu_read16(uint32_t addr) return result; } -uint8_t arm7_cpu_device::arm7_cpu_read8(uint32_t addr) +uint8_t arm7_cpu_device::arm7_cpu_read8(offs_t addr) { if( COPRO_CTRL & COPRO_CTRL_MMU_EN ) { diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h index 15931cadb44..bffd51fbe05 100644 --- a/src/devices/cpu/arm7/arm7.h +++ b/src/devices/cpu/arm7/arm7.h @@ -233,12 +233,12 @@ protected: int detect_fault(int desc_lvl1, int ap, int flags); void arm7_check_irq_state(); void update_irq_state(); - virtual void arm7_cpu_write32(uint32_t addr, uint32_t data); - virtual void arm7_cpu_write16(uint32_t addr, uint16_t data); - virtual void arm7_cpu_write8(uint32_t addr, uint8_t data); - virtual uint32_t arm7_cpu_read32(uint32_t addr); - virtual uint32_t arm7_cpu_read16(uint32_t addr); - virtual uint8_t arm7_cpu_read8(uint32_t addr); + virtual void arm7_cpu_write32(offs_t addr, uint32_t data); + virtual void arm7_cpu_write16(offs_t addr, uint16_t data); + virtual void arm7_cpu_write8(offs_t addr, uint8_t data); + virtual uint32_t arm7_cpu_read32(offs_t addr); + virtual uint32_t arm7_cpu_read16(offs_t addr); + virtual uint8_t arm7_cpu_read8(offs_t addr); // Coprocessor support void arm7_do_callback(uint32_t data); @@ -417,12 +417,12 @@ public: virtual uint32_t arm7_rt_r_callback(offs_t offset) override; virtual void arm7_rt_w_callback(offs_t offset, uint32_t data) override; - virtual void arm7_cpu_write32(uint32_t addr, uint32_t data) override; - virtual void arm7_cpu_write16(uint32_t addr, uint16_t data) override; - virtual void arm7_cpu_write8(uint32_t addr, uint8_t data) override; - virtual uint32_t arm7_cpu_read32(uint32_t addr) override; - virtual uint32_t arm7_cpu_read16(uint32_t addr) override; - virtual uint8_t arm7_cpu_read8(uint32_t addr) override; + virtual void arm7_cpu_write32(offs_t addr, uint32_t data) override; + virtual void arm7_cpu_write16(offs_t addr, uint16_t data) override; + virtual void arm7_cpu_write8(offs_t addr, uint8_t data) override; + virtual uint32_t arm7_cpu_read32(offs_t addr) override; + virtual uint32_t arm7_cpu_read16(offs_t addr) override; + virtual uint8_t arm7_cpu_read8(offs_t addr) override; protected: arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/cpu/dspp/dspp.cpp b/src/devices/cpu/dspp/dspp.cpp index 9d7ed45d37b..492cd90a3e3 100644 --- a/src/devices/cpu/dspp/dspp.cpp +++ b/src/devices/cpu/dspp/dspp.cpp @@ -599,12 +599,12 @@ void dspp_device::parse_operands(uint32_t numops) uint16_t dspp_device::read_next_operand() { int32_t value = m_core->m_operands[m_core->m_opidx].value; - //if (m_core->m_op == 0x46a0) printf("Value is %08x\n", value); + //if (m_core->m_op == 0x46a0) logerror("Value is %08x\n", value); if (value < 0) { value = read_data(m_core->m_operands[m_core->m_opidx].addr); - //if (m_core->m_op == 0x46a0) printf("New value is %08x from %08x\n", value, m_core->m_operands[m_core->m_opidx].addr); + //if (m_core->m_op == 0x46a0) logerror("New value is %08x from %08x\n", value, m_core->m_operands[m_core->m_opidx].addr); } // Next operand @@ -760,7 +760,7 @@ void dspp_device::execute_run() debugger_instruction_hook(m_core->m_pc); m_core->m_op = read_op(m_core->m_pc); - //printf("%04x: %04x\n", (uint16_t)m_core->m_pc, (uint16_t)m_core->m_op); + //logerror("%04x: %04x\n", (uint16_t)m_core->m_pc, (uint16_t)m_core->m_op); update_pc(); // Decode and execute @@ -922,7 +922,7 @@ void dspp_device::exec_branch() if (mode == 2) branch = !branch; - //printf("Branch: %d %d %d %d %d\n", branch ? 1 : 0, flag0 ? 1 : 0, mask0 ? 1 : 0, flag1 ? 1 : 0, mask1 ? 1 : 0); + //logerror("Branch: %d %d %d %d %d\n", branch ? 1 : 0, flag0 ? 1 : 0, mask0 ? 1 : 0, flag1 ? 1 : 0, mask1 ? 1 : 0); if (branch) m_core->m_pc = m_core->m_op & 0x3ff; @@ -1057,7 +1057,7 @@ inline void dspp_device::exec_arithmetic() int32_t alu_a, alu_b; //if (m_core->m_op == 0x46a0) - //printf("Arithmetic: numops:%d, muxa:%d, muxb:%d, alu_op:%d, barrel_code:%d\n", numops, muxa, muxb, alu_op, barrel_code); + //logerror("Arithmetic: numops:%d, muxa:%d, muxb:%d, alu_op:%d, barrel_code:%d\n", numops, muxa, muxb, alu_op, barrel_code); switch (muxa) { @@ -1070,7 +1070,7 @@ inline void dspp_device::exec_arithmetic() { alu_a = read_next_operand() << 4; //if (m_core->m_op == 0x46a0) - //printf("Arithmetic: Next operand: %04x\n", alu_a >> 4); + //logerror("Arithmetic: Next operand: %04x\n", alu_a >> 4); break; } case 3: @@ -1573,7 +1573,7 @@ void dspp_device::service_input_dma(int32_t channel) if (isSQXD) { - printf("SQXD NOT TESTED!"); + logerror("SQXD NOT TESTED!"); sample = decode_sqxd(curbyte, dma.m_prev_value); dma.m_prev_value = sample; @@ -2146,7 +2146,7 @@ uint32_t dspp_device::read_ext_control(offs_t offset) } default: { - printf("DSPP: Unhandled external control read (%.4x)\n", offset << 2); + logerror("DSPP: Unhandled external control read (%.4x)\n", offset << 2); break; } } @@ -2381,7 +2381,7 @@ void dspp_device::write_ext_control(offs_t offset, uint32_t data) } default: { - printf("DSPP: Unhandled external control write (%.4x with %.8x)\n", offset << 2, data); + logerror("DSPP: Unhandled external control write (%.4x with %.8x)\n", offset << 2, data); break; } } @@ -2607,7 +2607,7 @@ uint16_t dspp_device::read_output_fifo() // DEBUG! -char * GetBinary(char * buffer, uint32_t val, uint32_t bits) +inline char *GetBinary(char *buffer, uint32_t val, uint32_t bits) { uint32_t i; @@ -2619,33 +2619,33 @@ char * GetBinary(char * buffer, uint32_t val, uint32_t bits) return buffer; } -void dspp_device::dump_state() +void dspp_device::dump_state(std::ostream &str) { // DMA for (uint32_t i = 0; i < NUM_DMA_CHANNELS; ++i) { - printf("\n=== CHANNEL %02X ===\n", i); - printf("CURR_ADDRESS: %08X\n", m_fifo_dma[i].m_current_addr); - printf("CURR_COUNT: %08X\n", m_fifo_dma[i].m_current_count); - printf("NEXT_ADDR: %08X\n", m_fifo_dma[i].m_next_addr); - printf("NEXT_COUNT: %08X\n", m_fifo_dma[i].m_next_count); - printf("PREV_VALUE: %08X\n", m_fifo_dma[i].m_prev_value); - printf("PREV_CURRENT: %08X\n", m_fifo_dma[i].m_prev_current); - printf("GO_FOREVER: %X\n", m_fifo_dma[i].m_go_forever); - printf("NEXT_VALID: %X\n", m_fifo_dma[i].m_next_valid); + util::stream_format(str, "\n=== CHANNEL %02X ===\n", i); + util::stream_format(str, "CURR_ADDRESS: %08X\n", m_fifo_dma[i].m_current_addr); + util::stream_format(str, "CURR_COUNT: %08X\n", m_fifo_dma[i].m_current_count); + util::stream_format(str, "NEXT_ADDR: %08X\n", m_fifo_dma[i].m_next_addr); + util::stream_format(str, "NEXT_COUNT: %08X\n", m_fifo_dma[i].m_next_count); + util::stream_format(str, "PREV_VALUE: %08X\n", m_fifo_dma[i].m_prev_value); + util::stream_format(str, "PREV_CURRENT: %08X\n", m_fifo_dma[i].m_prev_current); + util::stream_format(str, "GO_FOREVER: %X\n", m_fifo_dma[i].m_go_forever); + util::stream_format(str, "NEXT_VALID: %X\n", m_fifo_dma[i].m_next_valid); } char buffer[64]; - printf("\n=== GLOBAL REGISTER===\n"); - printf("DSPX_CONTROL: %08X\n", m_core->m_dspx_control); - printf("DSPX_RESET: %08X\n", m_dspx_reset); - printf("DSPX_INT_ENABLE: %08X\n", m_dspx_int_enable); - printf("DSPX_CHANNEL_ENABLE: %08X %s\n", m_dspx_channel_enable, GetBinary(buffer, m_dspx_channel_enable, 32)); - printf("DSPX_CHANNEL_COMPLETE: %08X %s\n", m_dspx_channel_complete, GetBinary(buffer, m_dspx_channel_complete, 32)); - printf("DSPX_CHANNEL_DIRECTION: %08X %s\n", m_dspx_channel_direction, GetBinary(buffer, m_dspx_channel_direction, 32)); - printf("DSPX_CHANNEL_8BIT: %08X %s\n", m_dspx_channel_8bit, GetBinary(buffer, m_dspx_channel_8bit, 32)); - printf("DSPX_CHANNEL_SQXD: %08X %s\n", m_dspx_channel_sqxd, GetBinary(buffer, m_dspx_channel_sqxd, 32)); + util::stream_format(str, "\n=== GLOBAL REGISTER===\n"); + util::stream_format(str, "DSPX_CONTROL: %08X\n", m_core->m_dspx_control); + util::stream_format(str, "DSPX_RESET: %08X\n", m_dspx_reset); + util::stream_format(str, "DSPX_INT_ENABLE: %08X\n", m_dspx_int_enable); + util::stream_format(str, "DSPX_CHANNEL_ENABLE: %08X %s\n", m_dspx_channel_enable, GetBinary(buffer, m_dspx_channel_enable, 32)); + util::stream_format(str, "DSPX_CHANNEL_COMPLETE: %08X %s\n", m_dspx_channel_complete, GetBinary(buffer, m_dspx_channel_complete, 32)); + util::stream_format(str, "DSPX_CHANNEL_DIRECTION: %08X %s\n", m_dspx_channel_direction, GetBinary(buffer, m_dspx_channel_direction, 32)); + util::stream_format(str, "DSPX_CHANNEL_8BIT: %08X %s\n", m_dspx_channel_8bit, GetBinary(buffer, m_dspx_channel_8bit, 32)); + util::stream_format(str, "DSPX_CHANNEL_SQXD: %08X %s\n", m_dspx_channel_sqxd, GetBinary(buffer, m_dspx_channel_sqxd, 32)); #if 0 uint32_t m_dspx_shadow_current_addr; diff --git a/src/devices/cpu/dspp/dspp.h b/src/devices/cpu/dspp/dspp.h index f5a2bd770b7..310b9ab2996 100644 --- a/src/devices/cpu/dspp/dspp.h +++ b/src/devices/cpu/dspp/dspp.h @@ -36,7 +36,7 @@ public: uint16_t read_output_fifo(); - void dump_state(); // TODO: DEBUG REMOVE ME + void dump_state(std::ostream &str); // TODO: DEBUG REMOVE ME // Internal registers uint16_t input_r(); diff --git a/src/devices/cpu/f2mc16/f2mc16d.cpp b/src/devices/cpu/f2mc16/f2mc16d.cpp index 90aaf712ca5..c0f7612dd67 100644 --- a/src/devices/cpu/f2mc16/f2mc16d.cpp +++ b/src/devices/cpu/f2mc16/f2mc16d.cpp @@ -66,7 +66,7 @@ const std::string_view f2mc16_disassembler::s_bcc_ops[16] = "BLS", "BHI" }; -offs_t f2mc16_disassembler::opcode_alignment() const +u32 f2mc16_disassembler::opcode_alignment() const { return 1; } diff --git a/src/devices/cpu/f2mc16/f2mc16d.h b/src/devices/cpu/f2mc16/f2mc16d.h index 10aa6595235..d8a86006652 100644 --- a/src/devices/cpu/f2mc16/f2mc16d.h +++ b/src/devices/cpu/f2mc16/f2mc16d.h @@ -13,7 +13,7 @@ public: protected: // disasm_interface overrides - virtual offs_t opcode_alignment() const override; + virtual u32 opcode_alignment() const override; virtual u32 interface_flags() const override; virtual u32 page_address_bits() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; diff --git a/src/devices/cpu/h8500/h8500dasm.cpp b/src/devices/cpu/h8500/h8500dasm.cpp index 5bea8496b50..178bd52845f 100644 --- a/src/devices/cpu/h8500/h8500dasm.cpp +++ b/src/devices/cpu/h8500/h8500dasm.cpp @@ -63,7 +63,7 @@ const char *const h8500_disassembler::s_branches[0x10] = "BGT", "BLE" }; -offs_t h8500_disassembler::opcode_alignment() const +u32 h8500_disassembler::opcode_alignment() const { return 1; } diff --git a/src/devices/cpu/h8500/h8500dasm.h b/src/devices/cpu/h8500/h8500dasm.h index 698d27db764..14218f94f44 100644 --- a/src/devices/cpu/h8500/h8500dasm.h +++ b/src/devices/cpu/h8500/h8500dasm.h @@ -13,7 +13,7 @@ public: protected: // disasm_interface overrides - virtual offs_t opcode_alignment() const override; + virtual u32 opcode_alignment() const override; virtual u32 interface_flags() const override; virtual u32 page_address_bits() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; diff --git a/src/devices/cpu/i386/athlon.cpp b/src/devices/cpu/i386/athlon.cpp index d4a582d6756..0c3e65aea6b 100644 --- a/src/devices/cpu/i386/athlon.cpp +++ b/src/devices/cpu/i386/athlon.cpp @@ -407,7 +407,8 @@ void athlonxp_device::cache_clean() uint8_t athlonxp_device::READ8PL(uint32_t ea, uint8_t privilege) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; if(!translate_address(privilege,TR_READ,&address,&error)) PF_THROW(error); @@ -421,7 +422,8 @@ uint8_t athlonxp_device::READ8PL(uint32_t ea, uint8_t privilege) uint16_t athlonxp_device::READ16PL(uint32_t ea, uint8_t privilege) { uint16_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch (ea & 3) { @@ -462,7 +464,8 @@ uint16_t athlonxp_device::READ16PL(uint32_t ea, uint8_t privilege) uint32_t athlonxp_device::READ32PL(uint32_t ea, uint8_t privilege) { uint32_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch (ea & 3) { @@ -507,7 +510,8 @@ uint32_t athlonxp_device::READ32PL(uint32_t ea, uint8_t privilege) uint64_t athlonxp_device::READ64PL(uint32_t ea, uint8_t privilege) { uint64_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch (ea & 3) { @@ -551,7 +555,9 @@ uint64_t athlonxp_device::READ64PL(uint32_t ea, uint8_t privilege) void athlonxp_device::WRITE8PL(uint32_t ea, uint8_t privilege, uint8_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; + if(!translate_address(privilege,TR_WRITE,&address,&error)) PF_THROW(error); @@ -563,7 +569,8 @@ void athlonxp_device::WRITE8PL(uint32_t ea, uint8_t privilege, uint8_t value) void athlonxp_device::WRITE16PL(uint32_t ea, uint8_t privilege, uint16_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch(ea & 3) { @@ -600,7 +607,8 @@ void athlonxp_device::WRITE16PL(uint32_t ea, uint8_t privilege, uint16_t value) void athlonxp_device::WRITE32PL(uint32_t ea, uint8_t privilege, uint32_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch(ea & 3) { @@ -641,7 +649,8 @@ void athlonxp_device::WRITE32PL(uint32_t ea, uint8_t privilege, uint32_t value) void athlonxp_device::WRITE64PL(uint32_t ea, uint8_t privilege, uint64_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch(ea & 3) { diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp index 9daec3ec4e0..80af52f6baa 100644 --- a/src/devices/cpu/i386/i386.cpp +++ b/src/devices/cpu/i386/i386.cpp @@ -194,10 +194,10 @@ device_vtlb_interface::vtlb_entry i386_device::get_permissions(uint32_t pte, int bool i386_device::i386_translate_address(int intention, bool debug, offs_t *address, vtlb_entry *entry) { - uint32_t a = *address; - uint32_t pdbr = m_cr[3] & 0xfffff000; - uint32_t directory = (a >> 22) & 0x3ff; - uint32_t table = (a >> 12) & 0x3ff; + offs_t a = *address; + offs_t pdbr = m_cr[3] & 0xfffff000; + offs_t directory = (a >> 22) & 0x3ff; + offs_t table = (a >> 12) & 0x3ff; vtlb_entry perm = 0; bool ret; bool user = (intention & TR_USER) ? true : false; @@ -281,20 +281,20 @@ bool i386_device::i386_translate_address(int intention, bool debug, offs_t *addr //#define TEST_TLB -bool i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t *error) +bool i386_device::translate_address(int pl, int type, offs_t *address, uint32_t *error) { if (!(m_cr[0] & CR0_PG)) // Some (very few) old OS's won't work with this return true; const vtlb_entry *table = vtlb_table(); - uint32_t index = *address >> 12; + offs_t index = *address >> 12; vtlb_entry entry = table[index]; if (type == TR_FETCH) type = TR_READ; if (pl == 3) type |= TR_USER; #ifdef TEST_TLB - uint32_t test_addr = *address; + offs_t test_addr = *address; #endif if (!(entry & FLAG_VALID) || ((type & TR_WRITE) && !(entry & FLAG_DIRTY))) @@ -340,7 +340,8 @@ void i386_device::NEAR_BRANCH(int32_t offs) uint8_t i386_device::FETCH() { uint8_t value; - uint32_t address = m_pc, error; + offs_t address = m_pc; + uint32_t error; if(!translate_address(m_CPL,TR_FETCH,&address,&error)) PF_THROW(error); @@ -357,7 +358,8 @@ uint8_t i386_device::FETCH() uint16_t i386_device::FETCH16() { uint16_t value; - uint32_t address = m_pc, error; + offs_t address = m_pc; + uint32_t error; if( !WORD_ALIGNED(address) ) { /* Unaligned read */ value = (FETCH() << 0); @@ -375,7 +377,8 @@ uint16_t i386_device::FETCH16() uint32_t i386_device::FETCH32() { uint32_t value; - uint32_t address = m_pc, error; + offs_t address = m_pc; + uint32_t error; if( !DWORD_ALIGNED(m_pc) ) { /* Unaligned read */ value = (FETCH() << 0); @@ -396,7 +399,8 @@ uint32_t i386_device::FETCH32() uint8_t i386_device::READ8PL(uint32_t ea, uint8_t privilege) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; if(!translate_address(privilege,TR_READ,&address,&error)) PF_THROW(error); @@ -408,7 +412,8 @@ uint8_t i386_device::READ8PL(uint32_t ea, uint8_t privilege) uint16_t i386_device::READ16PL(uint32_t ea, uint8_t privilege) { uint16_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch (ea & 3) { @@ -442,7 +447,8 @@ uint16_t i386_device::READ16PL(uint32_t ea, uint8_t privilege) uint32_t i386_device::READ32PL(uint32_t ea, uint8_t privilege) { uint32_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch (ea & 3) { @@ -487,7 +493,8 @@ uint32_t i386_device::READ32PL(uint32_t ea, uint8_t privilege) uint64_t i386_device::READ64PL(uint32_t ea, uint8_t privilege) { uint64_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch (ea & 3) { @@ -532,7 +539,8 @@ uint64_t i386_device::READ64PL(uint32_t ea, uint8_t privilege) uint16_t i386sx_device::READ16PL(uint32_t ea, uint8_t privilege) { uint16_t value; - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; if (WORD_ALIGNED(ea)) { @@ -595,14 +603,18 @@ uint64_t i386sx_device::READ64PL(uint32_t ea, uint8_t privilege) void i386_device::WRITE_TEST(uint32_t ea) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; + if(!translate_address(m_CPL,TR_WRITE,&address,&error)) PF_THROW(error); } void i386_device::WRITE8PL(uint32_t ea, uint8_t privilege, uint8_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; + if(!translate_address(privilege,TR_WRITE,&address,&error)) PF_THROW(error); @@ -612,7 +624,8 @@ void i386_device::WRITE8PL(uint32_t ea, uint8_t privilege, uint8_t value) void i386_device::WRITE16PL(uint32_t ea, uint8_t privilege, uint16_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch(ea & 3) { @@ -642,7 +655,8 @@ void i386_device::WRITE16PL(uint32_t ea, uint8_t privilege, uint16_t value) void i386_device::WRITE32PL(uint32_t ea, uint8_t privilege, uint32_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch(ea & 3) { @@ -683,7 +697,8 @@ void i386_device::WRITE32PL(uint32_t ea, uint8_t privilege, uint32_t value) void i386_device::WRITE64PL(uint32_t ea, uint8_t privilege, uint64_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; switch(ea & 3) { @@ -724,7 +739,8 @@ void i386_device::WRITE64PL(uint32_t ea, uint8_t privilege, uint64_t value) void i386sx_device::WRITE16PL(uint32_t ea, uint8_t privilege, uint16_t value) { - uint32_t address = ea, error; + offs_t address = ea; + uint32_t error; if (WORD_ALIGNED(ea)) { @@ -1740,9 +1756,9 @@ void i386_device::i386_decode_four_byte38f3() uint8_t i386_device::read8_debug(uint32_t ea, uint8_t *data) { - uint32_t address = ea; + offs_t address = ea; - if(!i386_translate_address(TR_READ, true, &address,nullptr)) + if(!i386_translate_address(TR_READ, true, &address, nullptr)) return 0; address &= m_a20_mask; @@ -1875,9 +1891,9 @@ uint64_t i386_device::debug_segofftovirt(int params, const uint64_t *param) uint64_t i386_device::debug_virttophys(int params, const uint64_t *param) { - uint32_t result = param[0]; + offs_t result = param[0]; - if(!i386_translate_address(TR_READ,true,&result,nullptr)) + if(!i386_translate_address(TR_READ, true, &result, nullptr)) return 0; return result; } @@ -2761,11 +2777,11 @@ void i386_device::i386_set_a20_line(int state) { if (state) { - m_a20_mask = ~0; + m_a20_mask = ~offs_t(0); } else { - m_a20_mask = ~(1 << 20); + m_a20_mask = ~(offs_t(1) << 20); } // TODO: how does A20M and the tlb interact vtlb_flush_dynamic(); @@ -2802,7 +2818,16 @@ void i386_device::execute_run() { uint32_t phys_addr = 0; uint32_t error; - phys_addr = (m_cr[0] & CR0_PG) ? translate_address(m_CPL, TR_FETCH, &m_dr[i], &error) : m_dr[i]; + if(m_cr[0] & CR0_PG) + { + offs_t addr = m_dr[i]; + phys_addr = translate_address(m_CPL, TR_FETCH, &addr, &error); + m_dr[i] = uint32_t(addr); + } + else + { + phys_addr = m_dr[i]; + } if(breakpoint_length != 0) // Not one byte in length? logerror it, I have no idea how this works on real processors. { LOGMASKED(LOG_INVALID_OPCODE, "i386: Breakpoint length not 1 byte on an instruction breakpoint\n"); diff --git a/src/devices/cpu/i386/i386.h b/src/devices/cpu/i386/i386.h index c32db6a29a0..7a0ac627429 100644 --- a/src/devices/cpu/i386/i386.h +++ b/src/devices/cpu/i386/i386.h @@ -347,7 +347,7 @@ protected: uint8_t m_irq_state; address_space *m_program; address_space *m_io; - uint32_t m_a20_mask; + offs_t m_a20_mask; memory_access<32, 1, 0, ENDIANNESS_LITTLE>::cache macache16; memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache macache32; @@ -438,7 +438,7 @@ protected: uint32_t i386_translate(int segment, uint32_t ip, int rwn, int size = 1); inline vtlb_entry get_permissions(uint32_t pte, int wp); bool i386_translate_address(int intention, bool debug, offs_t *address, vtlb_entry *entry); - bool translate_address(int pl, int type, uint32_t *address, uint32_t *error); + bool translate_address(int pl, int type, offs_t *address, uint32_t *error); void CHANGE_PC(uint32_t pc); inline void NEAR_BRANCH(int32_t offs); inline uint8_t FETCH(); diff --git a/src/devices/cpu/i386/i386op16.hxx b/src/devices/cpu/i386/i386op16.hxx index 695ee2a6877..c5aed97bf7e 100644 --- a/src/devices/cpu/i386/i386op16.hxx +++ b/src/devices/cpu/i386/i386op16.hxx @@ -3215,7 +3215,7 @@ void i386_device::i386_group0F00_16() // Opcode 0x0f 00 seg.selector = m_task.segment; i386_load_protected_mode_segment(&seg,nullptr); - uint32_t addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5; + offs_t addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5; i386_translate_address(TR_READ, false, &addr, nullptr); m_program->write_byte(addr, (seg.flags & 0xff) | 2); diff --git a/src/devices/cpu/i386/i386op32.hxx b/src/devices/cpu/i386/i386op32.hxx index 9ba00fbc4e5..5f1eba89b69 100644 --- a/src/devices/cpu/i386/i386op32.hxx +++ b/src/devices/cpu/i386/i386op32.hxx @@ -3017,7 +3017,7 @@ void i386_device::i386_group0F00_32() // Opcode 0x0f 00 seg.selector = m_task.segment; i386_load_protected_mode_segment(&seg,nullptr); - uint32_t addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5; + offs_t addr = ((seg.selector & 4) ? m_ldtr.base : m_gdtr.base) + (seg.selector & ~7) + 5; i386_translate_address(TR_READ, false, &addr, nullptr); m_program->write_byte(addr, (seg.flags & 0xff) | 2); diff --git a/src/devices/cpu/i386/i386segs.hxx b/src/devices/cpu/i386/i386segs.hxx index 20b456c81b8..e2445d5df75 100644 --- a/src/devices/cpu/i386/i386segs.hxx +++ b/src/devices/cpu/i386/i386segs.hxx @@ -80,7 +80,7 @@ void i386_device::i386_load_call_gate(I386_CALL_GATE *gate) void i386_device::i386_set_descriptor_accessed(uint16_t selector) { // assume the selector is valid, we don't need to check it again - uint32_t base, addr; + offs_t base, addr; uint8_t rights; if(!(selector & ~3)) return; @@ -2500,7 +2500,7 @@ inline void i386_device::dri_changed() { int breakpoint_type = (m_dr[7] >> ((dr << 2) + 16)) & 3; int breakpoint_length = (m_dr[7] >> ((dr << 2) + 16 + 2)) & 3; - uint32_t phys_addr = m_dr[dr]; + offs_t phys_addr = m_dr[dr]; uint32_t error; if(translate_address(m_CPL, TR_READ, &phys_addr, &error)) { diff --git a/src/devices/cpu/mips/mips1.cpp b/src/devices/cpu/mips/mips1.cpp index 2316da4b25d..f61abd3cad6 100644 --- a/src/devices/cpu/mips/mips1.cpp +++ b/src/devices/cpu/mips/mips1.cpp @@ -1117,7 +1117,8 @@ std::tuple mips1core_device_b } // compute bit position of sub-unit within a word given endianness and address -template unsigned mips1core_device_base::shift_factor(u32 address) const +template +unsigned mips1core_device_base::shift_factor(u32 address) const { if constexpr (sizeof(T) == 1) return ((m_endianness == ENDIANNESS_BIG) ? (address & 3) ^ 3 : (address & 3)) * 8; @@ -1127,7 +1128,8 @@ template unsigned mips1core_device_base::shift_factor(u32 address) return 0; } -template std::enable_if_t>::value, void> mips1core_device_base::load(u32 address, U &&apply) +template +std::enable_if_t>::value, void> mips1core_device_base::load(offs_t address, U &&apply) { // alignment error if (Aligned && (address & (sizeof(T) - 1))) @@ -1204,7 +1206,8 @@ template std::enable_if_t void mips1core_device_base::store(u32 address, T data, T mem_mask) +template +void mips1core_device_base::store(offs_t address, T data, T mem_mask) { // alignment error if (Aligned && (address & (sizeof(T) - 1))) @@ -1274,7 +1277,7 @@ template void mips1core_device_base::store(u32 addres } } -void mips1core_device_base::fetch(u32 address, std::function &&apply) +void mips1core_device_base::fetch(offs_t address, std::function &&apply) { // alignment error if (address & 3) diff --git a/src/devices/cpu/mips/mips1.h b/src/devices/cpu/mips/mips1.h index 5de7238281c..ddc10d618f9 100644 --- a/src/devices/cpu/mips/mips1.h +++ b/src/devices/cpu/mips/mips1.h @@ -59,9 +59,9 @@ protected: // memory enum translate_result : unsigned { ERROR, UNCACHED, CACHED }; virtual translate_result translate(int intention, offs_t &address, bool debug); - template std::enable_if_t>::value, void> load(u32 address, U &&apply); - template void store(u32 address, T data, T mem_mask = ~T(0)); - void fetch(u32 address, std::function &&apply); + template std::enable_if_t>::value, void> load(offs_t address, U &&apply); + template void store(offs_t address, T data, T mem_mask = ~T(0)); + void fetch(offs_t address, std::function &&apply); // cache template unsigned shift_factor(u32 address) const; diff --git a/src/devices/cpu/olms66k/nx8dasm.cpp b/src/devices/cpu/olms66k/nx8dasm.cpp index 2b56815369d..ac85bb1a122 100644 --- a/src/devices/cpu/olms66k/nx8dasm.cpp +++ b/src/devices/cpu/olms66k/nx8dasm.cpp @@ -190,7 +190,7 @@ nx8_500s_disassembler::nx8_500s_disassembler(const u16 &psw) { } -offs_t nx8_500s_disassembler::opcode_alignment() const +u32 nx8_500s_disassembler::opcode_alignment() const { return 1; } diff --git a/src/devices/cpu/olms66k/nx8dasm.h b/src/devices/cpu/olms66k/nx8dasm.h index 2d3a4fba02e..bb79c6b3a29 100644 --- a/src/devices/cpu/olms66k/nx8dasm.h +++ b/src/devices/cpu/olms66k/nx8dasm.h @@ -14,7 +14,7 @@ public: protected: // disasm_interface overrides - virtual offs_t opcode_alignment() const override; + virtual u32 opcode_alignment() const override; virtual u32 interface_flags() const override; virtual u32 page_address_bits() const override; virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override; diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp index 79e591e197a..210936d7c73 100644 --- a/src/devices/cpu/powerpc/ppccom.cpp +++ b/src/devices/cpu/powerpc/ppccom.cpp @@ -1575,18 +1575,11 @@ void ppc_device::ppccom_tlb_flush() void ppc_device::ppccom_get_dsisr() { - int intent = 0; + int intent = (m_core->param1 & 1) ? TR_WRITE : TR_READ; - if (m_core->param1 & 1) - { - intent = TR_WRITE; - } - else - { - intent = TR_READ; - } - - m_core->param1 = ppccom_translate_address_internal(intent, false, m_core->param0); + offs_t address = m_core->param0; + m_core->param1 = ppccom_translate_address_internal(intent, false, address); + m_core->param0 = address; } /*------------------------------------------------- @@ -2825,7 +2818,7 @@ void ppc_device::ppc4xx_spu_timer_reset() attotime charperiod = clockperiod * (divisor * 16 * bpc); m_spu.timer->adjust(charperiod, 0, charperiod); if (PRINTF_SPU) - printf("ppc4xx_spu_timer_reset: baud rate = %.0f\n", charperiod.as_hz() * bpc); + osd_printf_debug("ppc4xx_spu_timer_reset: baud rate = %.0f\n", charperiod.as_hz() * bpc); } /* otherwise, disable the timer */ @@ -2924,7 +2917,7 @@ uint8_t ppc4xx_device::ppc4xx_spu_r(offs_t offset) break; } if (PRINTF_SPU) - printf("spu_r(%d) = %02X\n", offset, result); + osd_printf_debug("spu_r(%d) = %02X\n", offset, result); return result; } @@ -2938,7 +2931,7 @@ void ppc4xx_device::ppc4xx_spu_w(offs_t offset, uint8_t data) uint8_t oldstate, newstate; if (PRINTF_SPU) - printf("spu_w(%d) = %02X\n", offset, data); + osd_printf_debug("spu_w(%d) = %02X\n", offset, data); switch (offset) { /* clear error bits */ diff --git a/src/devices/machine/68340ser.cpp b/src/devices/machine/68340ser.cpp index c74fc375f04..574c3ee99ce 100644 --- a/src/devices/machine/68340ser.cpp +++ b/src/devices/machine/68340ser.cpp @@ -15,7 +15,7 @@ #define LOG_INT (1U << 4) //#define VERBOSE (LOG_SETUP|LOG_READ|LOG_SERIAL|LOG_INT) -#define LOG_OUTPUT_FUNC printf // Needs always to be enabled as the default value 'logerror' is not available here +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp index 4ef9a9c28a0..7e287c93e93 100644 --- a/src/devices/machine/68340sim.cpp +++ b/src/devices/machine/68340sim.cpp @@ -20,7 +20,7 @@ #define LOG_CS (1U << 9) #define VERBOSE (LOG_PIT) -#define LOG_OUTPUT_FUNC printf // Needs always to be enabled as the default value 'logerror' is not available here +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" @@ -498,8 +498,6 @@ void m68340_cpu_device::start_68340_sim() void m68340_sim::reset() { - LOG("%s\n", FUNCNAME); - // Ports - only setup those that are affected by reset m_ddra = 0x00; m_ppara1 = 0xff; diff --git a/src/devices/machine/generalplus_gpl162xx_soc.cpp b/src/devices/machine/generalplus_gpl162xx_soc.cpp index 5aa93f1b156..2dcfd255bd6 100644 --- a/src/devices/machine/generalplus_gpl162xx_soc.cpp +++ b/src/devices/machine/generalplus_gpl162xx_soc.cpp @@ -1710,9 +1710,9 @@ void sunplus_gcm394_base_device::videoirq_w(int state) set_state_unsynced(UNSP_IRQ5_LINE, state); } -uint16_t sunplus_gcm394_base_device::read_space(uint32_t offset) +uint16_t sunplus_gcm394_base_device::read_space(offs_t offset) { - address_space& space = this->space(AS_PROGRAM); + address_space &space = this->space(AS_PROGRAM); uint16_t val; if (offset < m_csbase) { @@ -1720,7 +1720,7 @@ uint16_t sunplus_gcm394_base_device::read_space(uint32_t offset) } else { - val = m_cs_space->read_word(offset-m_csbase); + val = m_cs_space->read_word(offset - m_csbase); } return val; @@ -1728,16 +1728,16 @@ uint16_t sunplus_gcm394_base_device::read_space(uint32_t offset) -void sunplus_gcm394_base_device::write_space(uint32_t offset, uint16_t data) +void sunplus_gcm394_base_device::write_space(offs_t offset, uint16_t data) { - address_space& space = this->space(AS_PROGRAM); + address_space &space = this->space(AS_PROGRAM); if (offset < m_csbase) { space.write_word(offset, data); } else { - m_cs_space->write_word(offset-m_csbase, data); + m_cs_space->write_word(offset - m_csbase, data); } } diff --git a/src/devices/machine/generalplus_gpl162xx_soc.h b/src/devices/machine/generalplus_gpl162xx_soc.h index b8d9e9940cc..5426fe2c6c9 100644 --- a/src/devices/machine/generalplus_gpl162xx_soc.h +++ b/src/devices/machine/generalplus_gpl162xx_soc.h @@ -339,8 +339,8 @@ private: TIMER_CALLBACK_MEMBER(unknown_tick); - inline uint16_t read_space(uint32_t offset); - inline void write_space(uint32_t offset, uint16_t data); + inline uint16_t read_space(offs_t offset); + inline void write_space(offs_t offset, uint16_t data); bool m_alt_periodic_irq; // might be multiple timers, might be a register to configure, currently a config option. diff --git a/src/devices/machine/gt64xxx.cpp b/src/devices/machine/gt64xxx.cpp index 3f3ea408022..b24bf45418f 100644 --- a/src/devices/machine/gt64xxx.cpp +++ b/src/devices/machine/gt64xxx.cpp @@ -945,7 +945,7 @@ TIMER_CALLBACK_MEMBER(gt64xxx_device::timer_callback) * Galileo DMA handler * *************************************/ -address_space* gt64xxx_device::dma_decode_address(uint32_t &addr) +address_space* gt64xxx_device::dma_decode_address(offs_t &addr) { for (size_t index = 0; index < proc_addr_bank::ADDR_NUM; ++index) { diff --git a/src/devices/machine/gt64xxx.h b/src/devices/machine/gt64xxx.h index c82a54061ca..4a4dd11513e 100644 --- a/src/devices/machine/gt64xxx.h +++ b/src/devices/machine/gt64xxx.h @@ -148,7 +148,7 @@ private: galileo_addr_map dma_addr_map[proc_addr_bank::ADDR_NUM]; int dma_fetch_next(address_space &space, int which); TIMER_CALLBACK_MEMBER(perform_dma); - address_space* dma_decode_address(uint32_t &addr); + address_space* dma_decode_address(offs_t &addr); }; // Supports R4600/4650/4700/R5000 CPUs diff --git a/src/devices/machine/sis630_host.cpp b/src/devices/machine/sis630_host.cpp index dca6fdad62f..165dc168092 100644 --- a/src/devices/machine/sis630_host.cpp +++ b/src/devices/machine/sis630_host.cpp @@ -25,7 +25,7 @@ TODO: #define LOG_AGP (1U << 4) // log AGP #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_AGP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" @@ -160,7 +160,7 @@ void sis630_host_device::memory_map(address_map &map) { } -void sis630_host_device::map_shadowram(address_space *memory_space, uint32_t start_offs, uint32_t end_offs, bool read_enable, bool write_enable) +void sis630_host_device::map_shadowram(address_space *memory_space, offs_t start_offs, offs_t end_offs, bool read_enable, bool write_enable) { LOGMAP("- 0x%08x-0x%08x ", start_offs, end_offs); diff --git a/src/devices/sound/discrete.cpp b/src/devices/sound/discrete.cpp index 3e97bff89da..2d60244b5bc 100644 --- a/src/devices/sound/discrete.cpp +++ b/src/devices/sound/discrete.cpp @@ -41,8 +41,9 @@ #include "wavwrite.h" #include -#include +#include #include +#include // device type definition @@ -471,21 +472,15 @@ const double *discrete_device::node_output_ptr(int onode) // discrete_log: Debug logging //------------------------------------------------- -void CLIB_DECL discrete_device::discrete_log(const char *text, ...) const +void discrete_device::discrete_vlog(util::format_argument_pack &&args) { if (DISCRETE_DEBUGLOG) { - va_list arg; - va_start(arg, text); - - if(m_disclogfile) + if (m_disclogfile) { - vfprintf(m_disclogfile, text, arg); - fprintf(m_disclogfile, "\n"); - fflush(m_disclogfile); + util::stream_format(*m_disclogfile, std::move(args)); + *m_disclogfile << std::endl; } - - va_end(arg); } } @@ -825,7 +820,6 @@ discrete_device::discrete_device(const machine_config &mconfig, device_type type m_sample_time(0), m_neg_sample_time(0), m_indexed_node(nullptr), - m_disclogfile(nullptr), m_queue(nullptr), m_profiling(0), m_total_samples(0), @@ -865,7 +859,16 @@ void discrete_device::device_start() /* create the logfile */ if (DISCRETE_DEBUGLOG) - m_disclogfile = fopen(util::string_format("discrete%s.log", this->tag()).c_str(), "w"); + { + std::string fname = util::string_format("discrete%s.log", tag()); + for (char &ch : fname) + { + if (ch == ':') + ch = '_'; + } + m_disclogfile = std::make_unique(fname.c_str()); + m_disclogfile->imbue(std::locale::classic()); + } /* enable profiling */ m_profiling = 0; @@ -933,13 +936,8 @@ void discrete_device::device_stop() node->stop(); } - if (DISCRETE_DEBUGLOG) - { - /* close the debug log */ - if (m_disclogfile) - fclose(m_disclogfile); - m_disclogfile = nullptr; - } + /* close the debug log */ + m_disclogfile.reset(); } //------------------------------------------------- diff --git a/src/devices/sound/discrete.h b/src/devices/sound/discrete.h index 2a5b34dfef6..9570a258b25 100644 --- a/src/devices/sound/discrete.h +++ b/src/devices/sound/discrete.h @@ -7,7 +7,9 @@ #include "machine/rescap.h" +#include #include +#include #include @@ -4208,7 +4210,12 @@ public: void process(int samples); /* access to the discrete_logging facility */ - void CLIB_DECL discrete_log(const char *text, ...) const ATTR_PRINTF(2,3); + void discrete_vlog(util::format_argument_pack &&args); + template + void discrete_log(Format &&fmt, Params &&... args) + { + discrete_vlog(util::make_format_argument_pack(std::forward(fmt), std::forward(args)...)); + } /* get pointer to a info struct node ref */ const double *node_output_ptr(int onode); @@ -4262,7 +4269,7 @@ private: task_list_t task_list; /* discrete_task_context * */ /* debugging statistics */ - FILE * m_disclogfile; + std::unique_ptr m_disclogfile; /* parallel tasks */ osd_work_queue * m_queue; diff --git a/src/devices/sound/qs1000.cpp b/src/devices/sound/qs1000.cpp index c5b99a167f4..02dadff01fa 100644 --- a/src/devices/sound/qs1000.cpp +++ b/src/devices/sound/qs1000.cpp @@ -127,7 +127,9 @@ #include "qs1000.h" -#define LOGGING_ENABLED 0 +//#define VERBOSE 1 +//#define LOG_OUTPUT_FUNC osd_printf_info +#include "logmacro.h" // device type definition @@ -357,8 +359,7 @@ void qs1000_device::wave_w(offs_t offset, uint8_t data) { m_stream->update(); - if (LOGGING_ENABLED) - printf("QS1000 W[%x] %x\n", 0x200 + offset, data); + LOG("QS1000 W[%x] %x\n", 0x200 + offset, data); switch (offset) { @@ -527,8 +528,7 @@ void qs1000_device::start_voice(int ch) uint16_t word1 = (read_byte(table_addr + 2) << 8) | read_byte(table_addr + 3); uint16_t base = (read_byte(table_addr + 4) << 8) | read_byte(table_addr + 5); - if (LOGGING_ENABLED) - printf("[%.6x] Freq:%.4x ????:%.4x Addr:%.4x\n", table_addr, freq, word1, base); + LOG("[%.6x] Freq:%.4x ????:%.4x Addr:%.4x\n", table_addr, freq, word1, base); // See Raccoon World and Wyvern Wings nullptr sound if (freq == 0) @@ -562,7 +562,7 @@ void qs1000_device::start_voice(int ch) uint8_t byte8 = read_byte(base + 8); - if (LOGGING_ENABLED) + if (VERBOSE & LOG_GENERAL) { uint8_t byte9 = read_byte(base + 9); uint8_t byte10 = read_byte(base + 10); @@ -572,7 +572,7 @@ void qs1000_device::start_voice(int ch) uint8_t byte14 = read_byte(base + 14); uint8_t byte15 = read_byte(base + 15); - printf("[%.6x] Sample Start:%.6x Loop Start:%.6x Loop End:%.6x Params: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", base, start_addr, loop_start, loop_end, byte8, byte9, byte10, byte11, byte12, byte13, byte14, byte15); + LOG("[%.6x] Sample Start:%.6x Loop Start:%.6x Loop End:%.6x Params: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", base, start_addr, loop_start, loop_end, byte8, byte9, byte10, byte11, byte12, byte13, byte14, byte15); } m_channels[ch].m_acc = 0; diff --git a/src/devices/video/ym7101.cpp b/src/devices/video/ym7101.cpp index 6a3578dfda3..be3a95536e7 100644 --- a/src/devices/video/ym7101.cpp +++ b/src/devices/video/ym7101.cpp @@ -439,7 +439,7 @@ void ym7101_device::vram_w(offs_t offset, u16 data, u16 mem_mask) COMBINE_DATA(&m_vram[offset]); gfx(0)->mark_dirty(offset >> 4); - const u32 sprite_table = m_sprite_attribute_table >> 1; + const offs_t sprite_table = m_sprite_attribute_table >> 1; // TODO: check akumajo Stage 6-3 // TODO: check segacd:snatcheru (H32, puts sprite_table at $fe00) diff --git a/src/mame/gaelco/gaelcof3.cpp b/src/mame/gaelco/futbol3.cpp similarity index 99% rename from src/mame/gaelco/gaelcof3.cpp rename to src/mame/gaelco/futbol3.cpp index 74127902b88..7e9cafa4481 100644 --- a/src/mame/gaelco/gaelcof3.cpp +++ b/src/mame/gaelco/futbol3.cpp @@ -43,8 +43,10 @@ */ #include "emu.h" + #include "cpu/pic16c5x/pic16c5x.h" #include "sound/okim6295.h" + #include "speaker.h" @@ -58,7 +60,7 @@ public: m_maincpu(*this, "maincpu") { } - void gaelcof3(machine_config &config); + void gaelcof3(machine_config &config) ATTR_COLD; private: required_device m_maincpu; diff --git a/src/mame/konami/konamim2.cpp b/src/mame/konami/konamim2.cpp index 72958b5ea6d..015db543617 100644 --- a/src/mame/konami/konamim2.cpp +++ b/src/mame/konami/konamim2.cpp @@ -233,6 +233,8 @@ Notes: #include "cdrom.h" +#include + namespace { @@ -1500,11 +1502,19 @@ void konamim2_state::debug_commands(const std::vector ¶ms) return; if (params[0] == "help") + { debug_help_command(params); + } else if (params[0] == "dump_task") + { dump_task_command(params); + } else if (params[0] == "dump_dspp") - subdevice("bda:dspp")->dump_state(); + { + std::ostringstream str; + subdevice("bda:dspp")->dump_state(str); + machine().debugger().console().printf("%s", std::move(str).str()); + } } void konamim2_state::dump_task_command(const std::vector ¶ms) diff --git a/src/mame/konami/xmen.cpp b/src/mame/konami/xmen.cpp index d56aa88201b..fab5a540e38 100644 --- a/src/mame/konami/xmen.cpp +++ b/src/mame/konami/xmen.cpp @@ -48,6 +48,9 @@ Reverse-engineered schematics: https://github.com/jotego/jtbin/blob/master/sch/x #include "layout/generic.h" +//#define VERBOSE 1 +#include "logmacro.h" + namespace { @@ -67,13 +70,17 @@ public: m_okibank(*this, "okibank") { } - void xmen(machine_config &config); - void xmenabl(machine_config &config); + void xmen(machine_config &config) ATTR_COLD; + void xmenabl(machine_config &config) ATTR_COLD; protected: virtual void machine_start() override ATTR_COLD; virtual void machine_reset() override ATTR_COLD; + void control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + + void base(machine_config &config) ATTR_COLD; + // video-related uint8_t m_layer_colorbase[3]{}; uint8_t m_sprite_colorbase = 0; @@ -91,14 +98,7 @@ protected: required_device m_screen; required_device m_eeprom; - void control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); - - void base(machine_config &config); - private: - optional_memory_bank m_z80bank; - optional_memory_bank m_okibank; - void sound_bankswitch_w(uint8_t data); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -111,6 +111,9 @@ private: void main_map(address_map &map) ATTR_COLD; void oki_map(address_map &map) ATTR_COLD; void sound_map(address_map &map) ATTR_COLD; + + optional_memory_bank m_z80bank; + optional_memory_bank m_okibank; }; class xmen6p_state : public xmen_state @@ -122,7 +125,7 @@ public: m_tilemap(*this, "tilemap%u", 0) { } - void xmen6p(machine_config &config); + void xmen6p(machine_config &config) ATTR_COLD; int field_r() { return (m_screen->frame_number() & 1) ^ m_screen->vblank(); } @@ -130,15 +133,15 @@ protected: virtual void video_start() override ATTR_COLD; private: - bitmap_ind16 m_screen_bitmap[2]; // 0 left screen, 1 right screen - required_shared_ptr_array m_spriteram; - required_shared_ptr_array m_tilemap; - uint16_t *m_k053247_ram; - template uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void screen_vblank(int state); void main_map(address_map &map) ATTR_COLD; + + bitmap_ind16 m_screen_bitmap[2]; // 0 left screen, 1 right screen + required_shared_ptr_array m_spriteram; + required_shared_ptr_array m_tilemap; + uint16_t *m_k053247_ram; }; @@ -325,7 +328,7 @@ void xmen6p_state::screen_vblank(int state) void xmen_state::control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - //logerror("%06x: write %04x mask %04x to 108000\n", m_maincpu->pc(), data, mem_mask); + LOG("%06x: write %04x mask %04x to 108000\n", m_maincpu->pc(), data, mem_mask); if (ACCESSING_BITS_0_7) { // bits 0/1 = coin counters diff --git a/src/mame/mame.lst b/src/mame/mame.lst index c35d1aba9b7..67968a8c784 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -18794,6 +18794,16 @@ watrball @source:gaelco/ds5002fp_programmer.cpp gaelcods +@source:gaelco/futbol3.cpp +autopapa +donpepito +futbol +futbola +futbolt +mueve +obladi +susanita + @source:gaelco/gaelco.cpp bigkarnk bigkarnka @@ -18891,16 +18901,6 @@ surfplnt30 surfplnt31 surfplnt40 -@source:gaelco/gaelcof3.cpp -autopapa -donpepito -futbol -futbola -futbolt -mueve -obladi -susanita - @source:gaelco/gaelcopc.cpp rriders tokyocop diff --git a/src/mame/skeleton/molecular.cpp b/src/mame/skeleton/molecular.cpp index f8c04137353..0342c85b6c5 100644 --- a/src/mame/skeleton/molecular.cpp +++ b/src/mame/skeleton/molecular.cpp @@ -155,7 +155,7 @@ void molecula_state::file_output_w(offs_t offset, uint8_t data) file_ram_enable = (data & 0x80) >> 7; if(data & 0x7f || offset) - printf("FILE output -> %02x %02x\n",data,offset); + logerror("FILE output -> %02x %02x\n", data, offset); } @@ -164,7 +164,7 @@ void molecula_state::app_output_w(uint8_t data) app_ram_enable = (data & 0x80) >> 7; if(data & 0x7f) - printf("APP 0x10 -> %02x\n",data); + logerror("APP 0x10 -> %02x\n", data); } uint8_t molecula_state::sio_r(offs_t offset) @@ -178,7 +178,7 @@ uint8_t molecula_state::sio_r(offs_t offset) void molecula_state::sio_w(offs_t offset, uint8_t data) { if(offset == 0) - printf("%c\n",data); + logerror("%c\n", data); } void molecula_state::molecula_file_map(address_map &map) diff --git a/src/mame/taito/gladiatr.cpp b/src/mame/taito/gladiatr.cpp index ad868849514..f55481d50db 100644 --- a/src/mame/taito/gladiatr.cpp +++ b/src/mame/taito/gladiatr.cpp @@ -496,7 +496,7 @@ u8 ppking_state::ppking_qx0_r(offs_t offset) m_mcu[0].rxd |= 0x40; } - //printf("%04x rst %d\n",m_maincpu->pc(),m_mcu[0].rst); + //logerror("%04x rst %d\n", m_maincpu->pc(),m_mcu[0].rst); return m_mcu[0].rxd; } @@ -536,8 +536,7 @@ void ppking_state::ppking_qx0_w(offs_t offset, u8 data) break; default: - printf("%02x %02x\n",offset,data); - break; + logerror("ppking_qx0_w: %02x %02x\n", offset, data); } } else diff --git a/src/mame/taito/taitoair.cpp b/src/mame/taito/taitoair.cpp index 26a9de6b5f2..58a9e14124e 100644 --- a/src/mame/taito/taitoair.cpp +++ b/src/mame/taito/taitoair.cpp @@ -233,7 +233,7 @@ void taitoair_state::lineram_w(offs_t offset, u16 data, u16 mem_mask) m_line_ram[offset] = data; //if (offset == 0x3fff) - // printf("LineRAM go %d\n",(int)m_screen->frame_number()); + // logerror("LineRAM go %d\n", m_screen->frame_number()); } u16 taitoair_state::dspram_r(offs_t offset) @@ -346,7 +346,7 @@ void taitoair_state::sound_bankswitch_w(u8 data) */ void taitoair_state::dma_regs_w(offs_t offset, u16 data, u16 mem_mask) { - printf("%08x %04x\n",offset,data); + logerror("dma_regs_w: %08x %04x\n", offset, data); if (offset == 0 && ACCESSING_BITS_8_15) { diff --git a/src/mame/televideo/ts803.cpp b/src/mame/televideo/ts803.cpp index 83f83b6be53..290f6089782 100644 --- a/src/mame/televideo/ts803.cpp +++ b/src/mame/televideo/ts803.cpp @@ -45,17 +45,19 @@ PAGE SEL bit in PORT0 set to 1: **************************************************************************************************/ #include "emu.h" -#include "machine/clock.h" + #include "bus/rs232/rs232.h" #include "cpu/z80/z80.h" #include "imagedev/floppy.h" -#include "machine/z80daisy.h" +#include "machine/clock.h" #include "machine/keyboard.h" #include "machine/timer.h" -#include "machine/z80sio.h" #include "machine/wd_fdc.h" +#include "machine/z80daisy.h" +#include "machine/z80sio.h" #include "machine/z80sti.h" #include "video/mc6845.h" + #include "emupal.h" #include "screen.h" @@ -76,9 +78,9 @@ public: , m_io_dsw(*this, "DSW") { } - void ts803(machine_config &config); + void ts803(machine_config &config) ATTR_COLD; - void init_ts803(); + void init_ts803() ATTR_COLD; private: uint8_t port10_r(offs_t offset); @@ -227,7 +229,7 @@ d7 Drive select 3 (active low) uint8_t ts803_state::disk_0_control_r() { - printf("Disk0 control register read\n"); + logerror("Disk0 control register read\n"); return 0xff; } @@ -237,23 +239,23 @@ uint8_t ts803_state::porta0_r(offs_t offset) switch(offset) { case 0xb2: - printf("B2 WDC read\n"); + logerror("B2 WDC read\n"); return 0x11; case 0xb3: - printf("B3 WDC read\n"); + logerror("B3 WDC read\n"); return 0x15; case 0xb4: - printf("B4 WDC read\n"); + logerror("B4 WDC read\n"); return 0x55; case 0xb5: - printf("B5 WDC read\n"); + logerror("B5 WDC read\n"); return 0x01; case 0xb6: - printf("B6 WDC read\n"); + logerror("B6 WDC read\n"); return 0x25; } @@ -267,7 +269,7 @@ void ts803_state::porta0_w(offs_t offset, uint8_t data) switch (offset) { case 0xc4: - //printf("Control Register for Alpha or Graphics Mode Selection\n"); + //logerror("Control Register for Alpha or Graphics Mode Selection\n"); break; default: @@ -278,7 +280,7 @@ void ts803_state::porta0_w(offs_t offset, uint8_t data) uint8_t ts803_state::port10_r(offs_t offset) { offset += 0x10; - printf("Port read [%x]\n",offset); + logerror("Port read [%x]\n", offset); return 0xff; } @@ -290,17 +292,17 @@ void ts803_state::port10_w(offs_t offset, uint8_t data) { case 0x10: data &= 3; - printf("Writing to diagnostic indicators 1 & 2: %X\n", data); + logerror("Writing to diagnostic indicators 1 & 2: %X\n", data); break; case 0x11: data &= 3; - printf("Writing to diagnostic indicators 3 & 4: %X\n", data); + logerror("Writing to diagnostic indicators 3 & 4: %X\n", data); break; case 0x12: data &= 3; - printf("RS-422 control: %X\n", data); + logerror("RS-422 control: %X\n", data); break; case 0x13: @@ -311,19 +313,19 @@ void ts803_state::port10_w(offs_t offset, uint8_t data) membank("bank4")->set_entry(BIT(data, 0)); } else - printf("Error: unknown memory config: %X.\n", data); + logerror("Error: unknown memory config: %X.\n", data); break; default: - printf("unknown port [%2.2x] write of [%2.2x]\n",offset,data); + logerror("unknown port [%2.2x] write of [%2.2x]\n",offset,data); break; } } MC6845_ON_UPDATE_ADDR_CHANGED( ts803_state::crtc_update_addr ) { - //printf("CRTC::address update [%x]\n",address); + //logerror("CRTC::address update [%x]\n",address); } MC6845_UPDATE_ROW( ts803_state::crtc_update_row ) @@ -372,7 +374,7 @@ Bit 2 = 0 alpha memory access (round off) 1 graphics memory access (normal CPU address) */ - //printf("CRTC::c4 write [%2x]\n",data); + //logerror("CRTC::c4 write [%2x]\n",data); m_graphics_mode = BIT(data, 0); } From c4b55b749f4087d2d57c26686173fcb53e244afd Mon Sep 17 00:00:00 2001 From: m1macrophage <168948267+m1macrophage@users.noreply.github.com> Date: Tue, 17 Mar 2026 09:12:25 -0700 Subject: [PATCH 299/351] sound/va_eg.h: Corrected comment about equivalent resistance. (#15115) --- src/devices/sound/va_eg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/devices/sound/va_eg.h b/src/devices/sound/va_eg.h index 53e170bd9c9..05c21013cdf 100644 --- a/src/devices/sound/va_eg.h +++ b/src/devices/sound/va_eg.h @@ -85,8 +85,8 @@ private: // When the EG output is far from the target (e.g. > ~0.2V), the EG will ramp // towards the target linearly. As the output approaches the target, the EG ramp // will start curving. When the difference is < ~0.02V, the ramp will closely -// approximate an "RC" curve with R ~= s * Iabc / (2 * VT). Where 's' is a -// device-specific constant (typically ~1) and VT is the thermal voltage. +// approximate an "RC" curve with R = (2 * VT) / (s * Iabc). Where 's' is a +// device-specific constant (typically 1) and VT is the thermal voltage. // // x Iabc // ___|__ | From 15d7137afe56a3cdaa064b6db8d55d02ba29dcd4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Felipe=20Corr=C3=AAa=20da=20Silva=20Sanches?= Date: Tue, 17 Mar 2026 17:08:47 +0000 Subject: [PATCH 300/351] tmp94c241: Add serial port sub-device with I/O interface mode (#15015) * tmp94c241: Add serial port sub-device with I/O interface mode Replace the inline serial stubs (which just instantly set TX-complete) with a proper sub-device implementation supporting: - I/O interface mode (mode 0): Synchronous clocked serial using SCLK pin. Supports both internal (baud rate generator) and external (IOC=1) clock sources. TX double buffering with auto-load from buffer to shift register. Pre-outputs bit 0 on TXD before first clock edge so receiver can sample it on the rising edge. - Baud rate generator: Configurable via BRxCR register with divisor and clock source selection. Timer drives SCLK at the configured rate. Clock frequency derived from CPU clock. - TX/RX data callbacks: txd(), rxd(), sclk_out(), sclk_in() for connecting external devices to the serial ports. - tx_start callback: Signals the start of each byte transmission with the current PFFC pin function state, allowing connected devices to distinguish real transmissions from phantom ones. The serial registers (SC0BUF/SC1BUF, SC0CR/SC1CR, SC0MOD/SC1MOD, BR0CR/BR1CR) are now delegated to the sub-devices in the internal memory map. TX-complete flags (INTES0/INTES1 bit 7) are set at device_reset to indicate empty TX buffers at power-on. UART modes (7/8/9-bit) are recognized but not yet implemented. Also moves interrupt register indices from a file-scope enum to public static constexpr members of tmp94c241_device. * tmp94c241: move irq vector map to static const class member Per galibert's review suggestion: defining the IRQ vector table as a static const member of tmp94c241_device and providing the out-of-class definition in class scope allows the INTE* constants to be referenced without tmp94c241_device:: qualifiers in the initializer. The nested struct is named irq_vector_entry. NUM_MASKABLE_IRQS is replaced by std::size(irq_vector_map) directly at each use site inside member functions. * tmp94c241: use enum for public interrupt index constants * tmp94c241: use required_device for serial sub-device parent access Replace dynamic_cast with required_device using DEVICE_SELF_OWNER to access the parent CPU from the serial sub-device. This provides automatic type checking during MAME's -valid pass. Break the circular header dependency by replacing the #include of tmp94c241_serial.h in tmp94c241.h with a forward declaration, and having tmp94c241_serial.h include tmp94c241.h instead. The .cpp files include what they need directly. Addresses review feedback from galibert on PR #15015. --- scripts/src/cpu.lua | 2 + src/devices/cpu/tlcs900/tmp94c241.cpp | 166 +++------ src/devices/cpu/tlcs900/tmp94c241.h | 49 ++- src/devices/cpu/tlcs900/tmp94c241_serial.cpp | 361 +++++++++++++++++++ src/devices/cpu/tlcs900/tmp94c241_serial.h | 82 +++++ 5 files changed, 524 insertions(+), 136 deletions(-) create mode 100644 src/devices/cpu/tlcs900/tmp94c241_serial.cpp create mode 100644 src/devices/cpu/tlcs900/tmp94c241_serial.h diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index 967f01e75ee..f6922a00a9f 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -3018,6 +3018,8 @@ if CPUS["TLCS900"] then MAME_DIR .. "src/devices/cpu/tlcs900/900htbl.hxx", MAME_DIR .. "src/devices/cpu/tlcs900/tmp94c241.cpp", MAME_DIR .. "src/devices/cpu/tlcs900/tmp94c241.h", + MAME_DIR .. "src/devices/cpu/tlcs900/tmp94c241_serial.cpp", + MAME_DIR .. "src/devices/cpu/tlcs900/tmp94c241_serial.h", MAME_DIR .. "src/devices/cpu/tlcs900/tmp95c061.cpp", MAME_DIR .. "src/devices/cpu/tlcs900/tmp95c061.h", MAME_DIR .. "src/devices/cpu/tlcs900/tmp95c063.cpp", diff --git a/src/devices/cpu/tlcs900/tmp94c241.cpp b/src/devices/cpu/tlcs900/tmp94c241.cpp index 06e2ded25ca..af12dd06000 100644 --- a/src/devices/cpu/tlcs900/tmp94c241.cpp +++ b/src/devices/cpu/tlcs900/tmp94c241.cpp @@ -8,6 +8,7 @@ #include "emu.h" #include "tmp94c241.h" +#include "tmp94c241_serial.h" #include "dasm900.h" #define LOG_DMA (1U << 1) @@ -24,41 +25,14 @@ // device type definition DEFINE_DEVICE_TYPE(TMP94C241, tmp94c241_device, "tmp94c241", "Toshiba TMP94C241") -enum -{ - INTE45, - INTE67, - INTE89, - INTEAB, - INTET01, - INTET23, - INTET45, - INTET67, - INTET89, - INTETAB, - INTES0, - INTES1, - INTETC01, - INTETC23, - INTETC45, - INTETC67, - INTE0AD, - INTNMWDT -}; - -static const struct { - uint8_t reg; - uint8_t iff; - uint8_t vector; - uint8_t dma_start_vector; -} tmp94c241_irq_vector_map[] = +const tmp94c241_device::irq_vector_entry tmp94c241_device::irq_vector_map[] = { { INTE0AD, 0x08, 0x28, 0x0a}, // INT0 Pin { INTE45, 0x08, 0x2c, 0x0b}, // INT4 Pin { INTE45, 0x80, 0x30, 0x0c}, // INT5 Pin { INTE67, 0x08, 0x34, 0x0d}, // INT6 Pin { INTE67, 0x80, 0x38, 0x0e}, // INT7 Pin - // 0x3c - reserved + // 0x3c - reserved { INTE89, 0x08, 0x40, 0x10}, // INT8 Pin { INTE89, 0x80, 0x44, 0x11}, // INT9 Pin { INTEAB, 0x08, 0x48, 0x12}, // INTA Pin @@ -88,9 +62,8 @@ static const struct { { INTETC45, 0x80, 0xa8, 0x2a}, // INTTC5: micro-DMA completion Ch.5 { INTETC67, 0x08, 0xac, 0x2b}, // INTTC6: micro-DMA completion Ch.6 { INTETC67, 0x80, 0xb0, 0x2c}, // INTTC7: micro-DMA completion Ch.7 - /* 0xb4 ... 0xfc (Reserved) */ + /* 0xb4 ... 0xfc (Reserved) */ }; -static constexpr u8 NUM_MASKABLE_IRQS = sizeof(tmp94c241_irq_vector_map) / 4; //************************************************************************** @@ -129,9 +102,6 @@ tmp94c241_device::tmp94c241_device(const machine_config &mconfig, const char *ta m_t16_cap{ 0, 0, 0, 0, 0, 0, 0, 0 }, m_timer_16{ 0, 0, 0, 0 }, m_watchdog_mode(0), - m_serial_control{ 0, 0 }, - m_serial_mode{ 0, 0 }, - m_baud_rate{ 0, 0 }, m_od_enable(0), m_ad_mode1(0), m_ad_mode2(0), @@ -145,7 +115,8 @@ tmp94c241_device::tmp94c241_device(const machine_config &mconfig, const char *ta m_mamr{ 0, 0, 0, 0, 0, 0 }, m_dram_refresh{ 0, 0 }, m_dram_access{ 0, 0 }, - m_da_drive(0) + m_da_drive(0), + m_serial(*this, "serial%u", 0U) { } @@ -201,9 +172,6 @@ void tmp94c241_device::device_start() save_item(NAME(m_taffcr)); save_item(NAME(m_t16run)); save_item(NAME(m_watchdog_mode)); - save_item(NAME(m_serial_control)); - save_item(NAME(m_serial_mode)); - save_item(NAME(m_baud_rate)); save_item(NAME(m_od_enable)); save_item(NAME(m_ad_mode1)); save_item(NAME(m_ad_mode2)); @@ -286,12 +254,6 @@ void tmp94c241_device::device_reset() std::fill_n(&m_timer_8[0], 4, 0x00); std::fill_n(&m_timer_16[0], 4, 0x00); m_watchdog_mode = 0x80; - for (int i = 0; i < 2; i++) - { - m_serial_control[i] &= 0x80; - m_serial_mode[i] &= 0x80; - m_baud_rate[i] = 0x00; - } m_od_enable = 0x00; m_ad_mode1 = 0x00; m_ad_mode2 = 0x00; @@ -310,6 +272,10 @@ void tmp94c241_device::device_reset() std::fill_n(&m_dram_refresh[0], 2, 0x00); std::fill_n(&m_dram_access[0], 2, 0x80); m_da_drive = 0x00; + + m_int_reg[INTES0] |= 0x80; + m_int_reg[INTES1] |= 0x80; + m_check_irqs = 1; } uint8_t tmp94c241_device::inte_r(offs_t offset) @@ -352,12 +318,12 @@ void tmp94c241_device::iimc_w(uint8_t data) void tmp94c241_device::intclr_w(uint8_t data) { - for (int i = 0; i < NUM_MASKABLE_IRQS; i++) + for (int i = 0; i < std::size(irq_vector_map); i++) { - if (data == tmp94c241_irq_vector_map[i].dma_start_vector) + if (data == irq_vector_map[i].dma_start_vector) { // clear interrupt request - m_int_reg[tmp94c241_irq_vector_map[i].reg] &= ~ tmp94c241_irq_vector_map[i].iff; + m_int_reg[irq_vector_map[i].reg] &= ~ irq_vector_map[i].iff; return; } } @@ -718,61 +684,6 @@ void tmp94c241_device::wdcr_w(uint8_t data) { } -template -uint8_t tmp94c241_device::scNbuf_r() -{ - return 0; -} - -template -void tmp94c241_device::scNbuf_w(uint8_t data) -{ - // Fake finish sending data - m_int_reg[(Channel == 0) ? INTES0 : INTES1] |= 0x80; - m_check_irqs = 1; - LOGMASKED(LOG_SERIAL, "sc%dbuf write: %02X\n", Channel, data); - //machine().debugger().debug_break(); -} - -template -uint8_t tmp94c241_device::scNcr_r() -{ - uint8_t reg = m_serial_control[Channel]; - if (!machine().side_effects_disabled()) - m_serial_control[Channel] &= 0xe3; - return reg; -} - -template -void tmp94c241_device::scNcr_w(uint8_t data) -{ - m_serial_control[Channel] = data; -} - -template -uint8_t tmp94c241_device::scNmod_r() -{ - return m_serial_mode[Channel]; -} - -template -void tmp94c241_device::scNmod_w(uint8_t data) -{ - m_serial_mode[Channel] = data; -} - -template -uint8_t tmp94c241_device::brNcr_r() -{ - return m_baud_rate[Channel]; -} - -template -void tmp94c241_device::brNcr_w(uint8_t data) -{ - m_baud_rate[Channel] = data; -} - uint8_t tmp94c241_device::ode_r() { return m_od_enable; @@ -873,6 +784,13 @@ void tmp94c241_device::port_fc_w(uint8_t data) m_port_function[P] = data; } +void tmp94c241_device::device_add_mconfig(machine_config &mconfig) +{ + TMP94C241_SERIAL(mconfig, m_serial[0], 0, DERIVED_CLOCK(1, 1)); + TMP94C241_SERIAL(mconfig, m_serial[1], 1, DERIVED_CLOCK(1, 1)); +} + + //************************************************************************** // INTERNAL REGISTERS //************************************************************************** @@ -967,14 +885,14 @@ void tmp94c241_device::internal_mem(address_map &map) map(0x0000c6, 0x0000c7).r(FUNC(tmp94c241_device::cap_r)); map(0x0000c8, 0x0000c8).rw(FUNC(tmp94c241_device::tamod_r), FUNC(tmp94c241_device::tamod_w)); map(0x0000c9, 0x0000c9).rw(FUNC(tmp94c241_device::taffcr_r), FUNC(tmp94c241_device::taffcr_w)); - map(0x0000d0, 0x0000d0).rw(FUNC(tmp94c241_device::scNbuf_r<0>), FUNC(tmp94c241_device::scNbuf_w<0>)); - map(0x0000d1, 0x0000d1).rw(FUNC(tmp94c241_device::scNcr_r<0>), FUNC(tmp94c241_device::scNcr_w<0>)); - map(0x0000d2, 0x0000d2).rw(FUNC(tmp94c241_device::scNmod_r<0>), FUNC(tmp94c241_device::scNmod_w<0>)); - map(0x0000d3, 0x0000d3).rw(FUNC(tmp94c241_device::brNcr_r<0>), FUNC(tmp94c241_device::brNcr_w<0>)); - map(0x0000d4, 0x0000d4).rw(FUNC(tmp94c241_device::scNbuf_r<1>), FUNC(tmp94c241_device::scNbuf_w<1>)); - map(0x0000d5, 0x0000d5).rw(FUNC(tmp94c241_device::scNcr_r<1>), FUNC(tmp94c241_device::scNcr_w<1>)); - map(0x0000d6, 0x0000d6).rw(FUNC(tmp94c241_device::scNmod_r<1>), FUNC(tmp94c241_device::scNmod_w<1>)); - map(0x0000d7, 0x0000d7).rw(FUNC(tmp94c241_device::brNcr_r<1>), FUNC(tmp94c241_device::brNcr_w<1>)); + map(0x0000d0, 0x0000d0).rw(m_serial[0], FUNC(tmp94c241_serial_device::scNbuf_r), FUNC(tmp94c241_serial_device::scNbuf_w)); + map(0x0000d1, 0x0000d1).rw(m_serial[0], FUNC(tmp94c241_serial_device::scNcr_r), FUNC(tmp94c241_serial_device::scNcr_w)); + map(0x0000d2, 0x0000d2).rw(m_serial[0], FUNC(tmp94c241_serial_device::scNmod_r), FUNC(tmp94c241_serial_device::scNmod_w)); + map(0x0000d3, 0x0000d3).rw(m_serial[0], FUNC(tmp94c241_serial_device::brNcr_r), FUNC(tmp94c241_serial_device::brNcr_w)); + map(0x0000d4, 0x0000d4).rw(m_serial[1], FUNC(tmp94c241_serial_device::scNbuf_r), FUNC(tmp94c241_serial_device::scNbuf_w)); + map(0x0000d5, 0x0000d5).rw(m_serial[1], FUNC(tmp94c241_serial_device::scNcr_r), FUNC(tmp94c241_serial_device::scNcr_w)); + map(0x0000d6, 0x0000d6).rw(m_serial[1], FUNC(tmp94c241_serial_device::scNmod_r), FUNC(tmp94c241_serial_device::scNmod_w)); + map(0x0000d7, 0x0000d7).rw(m_serial[1], FUNC(tmp94c241_serial_device::brNcr_r), FUNC(tmp94c241_serial_device::brNcr_w)); map(0x0000e0, 0x0000f0).rw(FUNC(tmp94c241_device::inte_r), FUNC(tmp94c241_device::inte_w)); map(0x0000f6, 0x0000f6).w(FUNC(tmp94c241_device::iimc_w)); map(0x0000f7, 0x0000f7).rw(FUNC(tmp94c241_device::intnmwdt_r), FUNC(tmp94c241_device::intnmwdt_w)); @@ -1027,9 +945,9 @@ int tmp94c241_device::tlcs900_process_hdma(int channel) // Find which interrupt this start vector corresponds to int irq = -1; - for (int i = 0; i < NUM_MASKABLE_IRQS; i++) + for (int i = 0; i < std::size(irq_vector_map); i++) { - if (tmp94c241_irq_vector_map[i].dma_start_vector == start_vector) + if (irq_vector_map[i].dma_start_vector == start_vector) { irq = i; break; @@ -1040,7 +958,7 @@ int tmp94c241_device::tlcs900_process_hdma(int channel) return 0; // No matching interrupt found // Check if the interrupt flag is set (DMA trigger condition) - if (!(m_int_reg[tmp94c241_irq_vector_map[irq].reg] & tmp94c241_irq_vector_map[irq].iff)) + if (!(m_int_reg[irq_vector_map[irq].reg] & irq_vector_map[irq].iff)) return 0; // Interrupt not pending // Decode DMAM mode register @@ -1164,7 +1082,7 @@ int tmp94c241_device::tlcs900_process_hdma(int channel) } // Clear the triggering interrupt flag - m_int_reg[tmp94c241_irq_vector_map[irq].reg] &= ~tmp94c241_irq_vector_map[irq].iff; + m_int_reg[irq_vector_map[irq].reg] &= ~irq_vector_map[irq].iff; return 1; // Transfer performed } @@ -1307,9 +1225,9 @@ void tmp94c241_device::tlcs900_check_irqs() /* Check regular IRQs The smaller the vector value, the higher the priority. */ int irq_vectors[8] = { -1, -1, -1, -1, -1, -1, -1, -1 }; - for (int i = NUM_MASKABLE_IRQS - 1; i >= 0; i--) + for (int i = std::size(irq_vector_map) - 1; i >= 0; i--) { - if (m_int_reg[tmp94c241_irq_vector_map[i].reg] & tmp94c241_irq_vector_map[i].iff) + if (m_int_reg[irq_vector_map[i].reg] & irq_vector_map[i].iff) { // HDMA priority: skip interrupts targeted by active HDMA channels. // On real hardware, HDMA consumes the interrupt trigger instead of @@ -1317,7 +1235,7 @@ void tmp94c241_device::tlcs900_check_irqs() bool hdma_targeted = false; for (int ch = 0; ch < 4; ch++) { - if (m_dma_vector[ch] == tmp94c241_irq_vector_map[i].dma_start_vector) + if (m_dma_vector[ch] == irq_vector_map[i].dma_start_vector) { hdma_targeted = true; break; @@ -1326,13 +1244,13 @@ void tmp94c241_device::tlcs900_check_irqs() if (hdma_targeted) continue; - switch (tmp94c241_irq_vector_map[i].iff) + switch (irq_vector_map[i].iff) { case 0x80: - irq_vectors[(m_int_reg[tmp94c241_irq_vector_map[i].reg] >> 4) & 0x07] = i; + irq_vectors[(m_int_reg[irq_vector_map[i].reg] >> 4) & 0x07] = i; break; case 0x08: - irq_vectors[m_int_reg[tmp94c241_irq_vector_map[i].reg] & 0x07] = i; + irq_vectors[m_int_reg[irq_vector_map[i].reg] & 0x07] = i; break; } } @@ -1353,7 +1271,7 @@ void tmp94c241_device::tlcs900_check_irqs() // Take IRQ if (irq >= 0) { - uint8_t vector = tmp94c241_irq_vector_map[irq].vector; + uint8_t vector = irq_vector_map[irq].vector; // Log only DMA completion interrupts (INTTC0/INTTC2) — key milestones if (vector == 0x94) @@ -1377,14 +1295,14 @@ void tmp94c241_device::tlcs900_check_irqs() m_halted = 0; // Clear taken IRQ - m_int_reg[tmp94c241_irq_vector_map[irq].reg] &= ~ tmp94c241_irq_vector_map[irq].iff; + m_int_reg[irq_vector_map[irq].reg] &= ~ irq_vector_map[irq].iff; // Level-detect re-assertion: Level-triggered interrupt // flags are continuously driven by the input level. Clearing the flag // during dispatch has no lasting effect if the input is still asserted. // Re-assert INT0 flag if input is still active in level-detect mode. - if (tmp94c241_irq_vector_map[irq].reg == INTE0AD && - tmp94c241_irq_vector_map[irq].iff == 0x08 && + if (irq_vector_map[irq].reg == INTE0AD && + irq_vector_map[irq].iff == 0x08 && !(m_iimc & 0x02) && m_level[TLCS900_INT0] == ASSERT_LINE) { diff --git a/src/devices/cpu/tlcs900/tmp94c241.h b/src/devices/cpu/tlcs900/tmp94c241.h index bba00b4e7a5..9accb02715d 100644 --- a/src/devices/cpu/tlcs900/tmp94c241.h +++ b/src/devices/cpu/tlcs900/tmp94c241.h @@ -13,6 +13,8 @@ #include "tlcs900.h" +class tmp94c241_serial_device; + //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -21,6 +23,7 @@ class tmp94c241_device : public tlcs900h_device { + friend class tmp94c241_serial_device; static constexpr uint8_t PORT_0 = 0; // 8 bit I/O. Shared with d0-d7 static constexpr uint8_t PORT_1 = 1; // 8 bit I/O. Shared with d8-d15 static constexpr uint8_t PORT_2 = 2; // 8 bit I/O. Shared with d16-d23 @@ -64,6 +67,27 @@ class tmp94c241_device : public tlcs900h_device static constexpr uint8_t CAPB = 7; public: + enum : uint8_t { + INTE45 = 0, + INTE67 = 1, + INTE89 = 2, + INTEAB = 3, + INTET01 = 4, + INTET23 = 5, + INTET45 = 6, + INTET67 = 7, + INTET89 = 8, + INTETAB = 9, + INTES0 = 10, + INTES1 = 11, + INTETC01 = 12, + INTETC23 = 13, + INTETC45 = 14, + INTETC67 = 15, + INTE0AD = 16, + INTNMWDT = 17, + }; + // device type constructor tmp94c241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); @@ -110,6 +134,7 @@ protected: virtual void device_resolve_objects() override ATTR_COLD; virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; // device_execute_interface overrides virtual void execute_set_input(int inputnum, int state) override; @@ -124,6 +149,14 @@ protected: virtual std::unique_ptr create_disassembler() override; private: + struct irq_vector_entry { + uint8_t reg; + uint8_t iff; + uint8_t vector; + uint8_t dma_start_vector; + }; + static const irq_vector_entry irq_vector_map[]; + int tlcs900_process_hdma(int channel); void tlcs900_process_software_dma(int channel); void change_timer_flipflop(uint8_t flipflop, uint8_t operation); @@ -143,14 +176,6 @@ private: template void msar_w(uint8_t data); template void treg_8_w(uint8_t data); template void treg_16_w(uint16_t data); - template uint8_t scNbuf_r(); - template void scNbuf_w(uint8_t data); - template uint8_t scNcr_r(); - template void scNcr_w(uint8_t data); - template uint8_t scNmod_r(); - template void scNmod_w(uint8_t data); - template uint8_t brNcr_r(); - template void brNcr_w(uint8_t data); uint8_t t8run_r(); void t8run_w(uint8_t data); uint8_t t01mod_r(); @@ -245,10 +270,7 @@ private: // Watchdog Timer uint8_t m_watchdog_mode; - // Serial Channel - uint8_t m_serial_control[2]; - uint8_t m_serial_mode[2]; - uint8_t m_baud_rate[2]; + // I/O Control uint8_t m_od_enable; // A/D Converter Control @@ -273,6 +295,9 @@ private: // D/A Converter Control uint8_t m_da_drive; + +public: + required_device_array m_serial; }; // device type declaration diff --git a/src/devices/cpu/tlcs900/tmp94c241_serial.cpp b/src/devices/cpu/tlcs900/tmp94c241_serial.cpp new file mode 100644 index 00000000000..d5b35fd31b8 --- /dev/null +++ b/src/devices/cpu/tlcs900/tmp94c241_serial.cpp @@ -0,0 +1,361 @@ +// license:BSD-3-Clause +// copyright-holders:Felipe Sanches +/*************************************************************************** + + TOSHIBA TLCS900 - TMP94C241 SERIAL + +***************************************************************************/ + +#include "emu.h" +#include "tmp94c241.h" +#include "tmp94c241_serial.h" + +#define LOG_SERIAL (1U << 1) + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(TMP94C241_SERIAL, tmp94c241_serial_device, "tmp94c241_serial", "TMP94C241 Serial Channel") + +tmp94c241_serial_device::tmp94c241_serial_device(const machine_config &mconfig, const char *tag, device_t *owner, uint8_t channel, uint32_t clock) : + device_t(mconfig, TMP94C241_SERIAL, tag, owner, clock), + m_channel(channel), + m_serial_control(0), + m_serial_mode(0), + m_baud_rate(0), + m_hz(0), + m_rx_clock_count(8), + m_rx_shift_register(0), + m_rx_buffer(0), + m_rxd(0), + m_rxd_prev(0), + m_sioclk_state(0), + m_tx_clock_count(0), + m_tx_shift_register(0), + m_txd(1), // Idle state is HIGH for serial lines + m_sclk_out(0), + m_tx_skip_first_falling(false), + m_tx_needs_trailing_edge(false), + m_tx_buffer(0), + m_tx_buffer_full(false), + m_txd_cb(*this), + m_sclk_in_cb(*this), + m_sclk_out_cb(*this), + m_tx_start_cb(*this), + m_cpu(*this, DEVICE_SELF_OWNER) +{ +} + +void tmp94c241_serial_device::device_start() +{ + m_timer = timer_alloc(FUNC(tmp94c241_serial_device::timer_callback), this); + + save_item(NAME(m_serial_control)); + save_item(NAME(m_serial_mode)); + save_item(NAME(m_baud_rate)); + save_item(NAME(m_hz)); + save_item(NAME(m_rx_clock_count)); + save_item(NAME(m_rx_shift_register)); + save_item(NAME(m_rx_buffer)); + save_item(NAME(m_rxd)); + save_item(NAME(m_rxd_prev)); + save_item(NAME(m_sioclk_state)); + save_item(NAME(m_tx_clock_count)); + save_item(NAME(m_tx_shift_register)); + save_item(NAME(m_txd)); + save_item(NAME(m_sclk_out)); + save_item(NAME(m_tx_skip_first_falling)); + save_item(NAME(m_tx_needs_trailing_edge)); + save_item(NAME(m_tx_buffer)); + save_item(NAME(m_tx_buffer_full)); + + m_sclk_out_cb(m_sclk_out); + m_txd_cb(m_txd); +} + +void tmp94c241_serial_device::device_reset() +{ + m_serial_control &= 0x80; + m_serial_mode &= 0x80; + m_baud_rate = 0x00; + m_tx_skip_first_falling = false; + m_tx_needs_trailing_edge = false; + m_tx_buffer_full = false; +} + +void tmp94c241_serial_device::sioclk(int state) +{ + if (m_sioclk_state == state) + return; + + m_sioclk_state = state; + + // Always forward SCLK to the connected device. We cannot gate on PFFC + // or TX activity here because that causes clock state desync: the + // internal m_sioclk_state keeps toggling during gated-off phases, so + // the slave's state becomes stale and it misses edges when forwarding + // resumes (same-state → no transition detected). Instead, "orphan" + // edges (driven by the timer for CPU RX completion after TX finishes) + // are filtered at the cpanel level: the cpanel only counts RX bits + // between tx_start signals, ignoring edges that arrive between bytes. + + if (state) + { + // Rising edge: Sample RXD BEFORE forwarding clock to slave. + // The slave's rising-edge handler may complete an RX byte and call + // send_byte(), which pre-outputs bit 0 via m_txd_cb — changing our + // m_rxd before we can sample it. Capture the value first. + uint8_t rxd_sample = m_rxd; + + m_sclk_out_cb(state); + + // Handle deferred INTTX from the last falling edge. The receiver + // (cpanel) just sampled bit 7 on this rising edge via sclk_out_cb. + // Now it's safe to fire INTTX — the ISR may write SC1BUF which + // pre-outputs bit 0 of the next byte, but bit 7 has already been + // sampled. On TMP94C241 hardware, the 8th rising edge occurs + // 4µs after the last falling edge (at 250 kHz SCLK), well before + // the ISR can write SC1BUF. In MAME's event-driven scheduler, + // CPU instructions run between timer ticks, so without this deferral + // the ISR would write SC1BUF (pre-outputting bit 0) BEFORE the + // trailing rising edge — corrupting bit 7 of every byte. + if (m_tx_needs_trailing_edge) + { + m_tx_needs_trailing_edge = false; + m_cpu->m_int_reg[(m_channel == 0) ? tmp94c241_device::INTES0 : tmp94c241_device::INTES1] |= 0x80; + m_cpu->m_check_irqs = 1; + + // Auto-load from TX buffer if data is pending (TX double buffering). + // On TMP94C241, when the shift register finishes and the buffer + // has data, the buffer auto-transfers to the shift register. + if (m_tx_buffer_full) + { + m_tx_buffer_full = false; + m_tx_shift_register = m_tx_buffer; + m_tx_clock_count = 7; + + // Signal start of new byte transmission with current PFFC state + bool pffc_sclk = BIT(m_cpu->m_port_function[PORT_F], m_channel == 0 ? 2 : 6); + m_tx_start_cb(pffc_sclk ? 1 : 0); + + // Pre-output bit 0 — receiver will sample it on the next rising edge + m_txd_cb(m_tx_shift_register & 1); + + // Skip next falling edge — bit 0 is on TXD and must stay until + // the receiver samples it on the following rising edge + m_tx_skip_first_falling = true; + } + } + + if (m_rx_clock_count){ + m_rx_clock_count--; + + m_rx_shift_register >>= 1; + m_rx_shift_register |= (rxd_sample << 7); + + if (m_rx_clock_count == 0) + { + m_rx_clock_count = 8; + m_rx_buffer = m_rx_shift_register; + uint8_t int_reg_idx = (m_channel == 0) ? tmp94c241_device::INTES0 : tmp94c241_device::INTES1; + m_cpu->m_int_reg[int_reg_idx] |= 0x08; + m_cpu->m_check_irqs = 1; + } + } + } + else + { + // Falling edge: Forward clock to slave, then output our TXD. + m_sclk_out_cb(state); + + if (m_tx_clock_count){ + if (m_tx_skip_first_falling) { + // Skip this falling edge - bit 0 was pre-output in scNbuf_w + // and we need to give the receiver a rising edge to sample it + m_tx_skip_first_falling = false; + } else { + // Normal operation: shift out the next bit + m_tx_shift_register >>= 1; + m_txd_cb(m_tx_shift_register & 1); + if (--m_tx_clock_count == 0) { + // Byte shift-out complete. Defer INTTX to the next + // rising edge so the receiver can sample bit 7 before + // the ISR writes the next byte (which pre-outputs bit 0). + m_tx_needs_trailing_edge = true; + } + } + } + } +} + +void tmp94c241_serial_device::rxd(int state) +{ + if (m_rxd != state) + { + m_rxd = state; + } +} + +uint8_t tmp94c241_serial_device::scNbuf_r() +{ + return m_rx_buffer; +} + +void tmp94c241_serial_device::scNbuf_w(uint8_t data) +{ + // TX double buffering: TMP94C241 has a TX buffer register and + // a TX shift register. CPU writes always go to the buffer. If the + // shift register is idle, the buffer auto-transfers immediately. + // If the shift register is busy, the buffer holds the data until + // the current byte finishes, then auto-loads (see sioclk() trailing + // rising edge handler). + bool was_idle = (m_tx_clock_count == 0 && !m_tx_needs_trailing_edge && !m_tx_skip_first_falling); + if (!was_idle) + { + // TX is busy — store in buffer (overwrites any previous buffered byte) + m_tx_buffer = data; + m_tx_buffer_full = true; + return; + } + + // TX is idle — load shift register directly + m_tx_shift_register = data; + m_tx_clock_count = 7; // 7 more bits to send (bits 1-7) after pre-outputting bit 0 + + // Signal start of new transmission. + // Pass the PFFC state so the slave knows whether this byte is "real" + // (PFFC enabled, SCLK pin driven → data reaches panel on real hardware) + // or "phantom" (PFFC disabled, pin is high-impedance → data never + // reaches the panel on real hardware, but MAME still forwards SCLK). + bool pffc_sclk = BIT(m_cpu->m_port_function[PORT_F], m_channel == 0 ? 2 : 6); + m_tx_start_cb(pffc_sclk ? 1 : 0); + + // Pre-output first bit immediately so slave can sample it on the first rising edge + m_txd_cb(m_tx_shift_register & 1); + + // Only skip the first falling edge if clock is currently HIGH. + // If clock is HIGH: next edge = falling (skip it to avoid outputting bit 1 before receiver samples bit 0) + // If clock is LOW: next edge = rising (receiver samples bit 0), then falling outputs bit 1 (no skip needed) + m_tx_skip_first_falling = (m_sioclk_state == 1); +} + +uint8_t tmp94c241_serial_device::scNcr_r() +{ + return m_serial_control; +} + +void tmp94c241_serial_device::scNcr_w(uint8_t data) +{ + // Do NOT reset m_rx_clock_count here. On TMP94C241 hardware, + // writing SCxCR configures the serial control register (IOC, SCLKS, + // parity, error flags) but does NOT abort an in-progress RX byte + // reception. The RX shift register has its own bit counter that + // completes independently of SCxCR writes. + // + // The firmware writes SC1CR in the INTRX1 ISR (CPanel_SM_RXByte1, + // CPanel_SM_RXByteN) to maintain IOC=1 / SCLKS=0 between received + // bytes. If this ISR fires between rising edges of the NEXT byte + // (which happens nondeterministically when the CPU processes the + // interrupt between self-clock timer callbacks), resetting + // rx_clock_count=8 causes data loss: the current byte completes + // 1 bit short, and the residual bits produce a corrupted "phantom + // byte" at the next INTA session boundary, causing segment header + // misinterpretation and button identity swapping. + m_serial_control = data; +} + +uint8_t tmp94c241_serial_device::scNmod_r() +{ + return m_serial_mode; +} + +void tmp94c241_serial_device::scNmod_w(uint8_t data) +{ + switch((data >> 2) & 3) + { + case 0: LOGMASKED(LOG_SERIAL,"I/O interface mode\n"); break; + case 1: LOGMASKED(LOG_SERIAL,"7-bit uart mode (Not implemented yet)\n"); break; + case 2: LOGMASKED(LOG_SERIAL,"8-bit uart mode (Not implemented yet)\n"); break; + case 3: LOGMASKED(LOG_SERIAL,"9-bit uart mode (Not implemented yet)\n"); break; + } + switch(data & 3) + { + case 0: LOGMASKED(LOG_SERIAL,"clk source: TO2 trigger (Not implemented yet)\n"); break; + case 1: LOGMASKED(LOG_SERIAL,"clk source: Baud rate generator (Not implemented yet)\n"); break; + case 2: LOGMASKED(LOG_SERIAL,"clk source: Internal clock at ϕ1 (Not implemented yet)\n"); break; + case 3: LOGMASKED(LOG_SERIAL,"clk source: external clock (SCLK%d) (Not implemented yet)\n", m_channel); break; + } + m_serial_mode = data; + + // Do NOT fire INTTX here. On TMP94C241 hardware, writing SC1MOD + // configures the serial mode — it does not trigger a transmit-complete + // interrupt. The firmware writes SC1MOD at the start of every TX + // sequence (SM_StartTX). A spurious INTTX would cause the TX state + // machine to advance prematurely (thinking byte 1 finished before it + // started), corrupting specific command bytes and causing wrong LED + // states. +} + +uint8_t tmp94c241_serial_device::brNcr_r() +{ + return m_baud_rate; +} + +void tmp94c241_serial_device::brNcr_w(uint8_t data) +{ + m_baud_rate = data; + uint8_t divisor = data & 0x0f; + uint8_t input_clocks[] = {0, 2, 8, 32}; + uint8_t shift_amount = (((data >> 4) & 3) + 1) * 2; + LOGMASKED(LOG_SERIAL,"baud rate: Divisor=%d Internal Clock T%d\n", divisor, input_clocks[(data >> 4) & 3]); + if (divisor) + { + uint32_t fc = m_cpu->clock(); + m_hz = (fc >> shift_amount) / divisor; + m_timer->adjust(attotime::from_hz(m_hz), 0, attotime::from_hz(m_hz)); + LOGMASKED(LOG_SERIAL,"timer set to %d Hz.\n", m_hz); + } else { + m_timer->reset(attotime::never); + m_hz = 0; + LOGMASKED(LOG_SERIAL,"timer disabled.\n"); + } +} + +TIMER_CALLBACK_MEMBER(tmp94c241_serial_device::timer_callback) +{ + // In TO2 trigger mode (mode 0), IOC=1 means the clock comes from an + // external device (cpanel's self-clock via SCLK pin after INTA). + // Don't drive from the baud rate timer — that would inject extra + // edges and corrupt data during INTA-driven reception. + // + // In baud rate generator mode (mode 1), the baud rate timer is the + // clock source regardless of IOC, so only gate on mode 0. + if ((m_serial_mode & 3) == 0 && BIT(m_serial_control, 0)) + return; + + // Keep clocking while TX is in progress, RX hasn't completed its byte, + // or we need a trailing rising edge for the receiver to sample bit 7. + // + // The trailing edge is critical: without it, the baud rate timer stops + // after TX's last falling edge (tx_clock_count=0). Between timer ticks, + // the CPU processes the INTTX1 interrupt and writes the next byte to + // SC1BUF, pre-outputting bit 0 on TXD. The next rising edge (from the + // new byte's timer) would then sample bit 0 of the NEW byte as bit 7 + // of the OLD byte — corrupting every byte's MSB. The trailing edge + // ensures bit 7 is sampled correctly before INTTX1 fires. + // + // Note: we do NOT gate on PFFC here. On TMP94C241 hardware, + // PFFC controls whether the SCLK pin is driven externally, but the + // internal serial clock (baud rate generator) always runs. The shift + // register must complete even during "phantom" bytes (PFFC off) so + // that INTTX1 fires and the firmware's TX state machine advances. + // Phantom bytes are filtered at the cpanel level via tx_start_cb: + // tx_start(0) sets accept_next_byte=false, so the cpanel assembles + // but rejects phantom bytes. See sioclk() comments for why we also + // don't gate sclk_out_cb on PFFC (clock desync issues). + bool need_clock = (m_tx_clock_count > 0) || m_tx_skip_first_falling || (m_rx_clock_count != 8) || m_tx_needs_trailing_edge; + if (m_hz && need_clock) + { + sioclk(m_sioclk_state ^ 1); + } +} + diff --git a/src/devices/cpu/tlcs900/tmp94c241_serial.h b/src/devices/cpu/tlcs900/tmp94c241_serial.h new file mode 100644 index 00000000000..555869e462a --- /dev/null +++ b/src/devices/cpu/tlcs900/tmp94c241_serial.h @@ -0,0 +1,82 @@ +// license:BSD-3-Clause +// copyright-holders:Felipe Sanches +/*************************************************************************** + + TOSHIBA TLCS900 - TMP94C241 SERIAL + +***************************************************************************/ + +#ifndef MAME_CPU_TLCS900_TMP94C241_SERIAL_H +#define MAME_CPU_TLCS900_TMP94C241_SERIAL_H + +#pragma once + +#include "tmp94c241.h" + +class tmp94c241_serial_device : + public device_t +{ + static constexpr uint8_t PORT_F = 14; // 6 bit I/O. Shared with I/O functions of serial interface + +public: + tmp94c241_serial_device(const machine_config &mconfig, const char *tag, device_t *owner, uint8_t channel, uint32_t clock = 0); + + void rxd(int state); + auto txd() { return m_txd_cb.bind(); } + auto sclk_in() { return m_sclk_in_cb.bind(); } + auto sclk_out() { return m_sclk_out_cb.bind(); } + auto tx_start() { return m_tx_start_cb.bind(); } // Signals start of new byte transmission + void sioclk(int state); + + uint8_t brNcr_r(); + void brNcr_w(uint8_t data); + void scNmod_w(uint8_t data); + uint8_t scNmod_r(); + void scNcr_w(uint8_t data); + uint8_t scNcr_r(); + void scNbuf_w(uint8_t data); + uint8_t scNbuf_r(); + +protected: + // device_t + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + TIMER_CALLBACK_MEMBER(timer_callback); + + emu_timer *m_timer; + + uint8_t m_channel; + uint8_t m_serial_control; + uint8_t m_serial_mode; + uint8_t m_baud_rate; + uint32_t m_hz; + + uint8_t m_rx_clock_count; + uint8_t m_rx_shift_register; + uint8_t m_rx_buffer; + uint8_t m_rxd; + uint8_t m_rxd_prev; + uint8_t m_sioclk_state; + + uint8_t m_tx_clock_count; + uint8_t m_tx_shift_register; + uint8_t m_txd; + uint8_t m_sclk_out; + bool m_tx_skip_first_falling; // Skip first falling edge after buf write to let receiver sample bit 0 + bool m_tx_needs_trailing_edge; // Defer INTTX to trailing rising edge so receiver samples bit 7 first + + uint8_t m_tx_buffer; // TX double buffer (holds next byte while shift register is busy) + bool m_tx_buffer_full; // True when m_tx_buffer contains data waiting to be loaded + + devcb_write_line m_txd_cb; + devcb_write_line m_sclk_in_cb; + devcb_write_line m_sclk_out_cb; + devcb_write_line m_tx_start_cb; // Signals start of new byte transmission + + required_device m_cpu; +}; + +DECLARE_DEVICE_TYPE(TMP94C241_SERIAL, tmp94c241_serial_device) + +#endif // MAME_CPU_TLCS900_TMP94C241_SERIAL_H From c208862dfaa42efc25e9da66814dab2861eeaf09 Mon Sep 17 00:00:00 2001 From: Christian Brunschen <6741909+cbrunschen@users.noreply.github.com> Date: Tue, 17 Mar 2026 17:10:01 +0000 Subject: [PATCH 301/351] esq5505.cpp: UART is an mc68681_device, not an scn2681_device. (#15114) --- src/mame/ensoniq/esq5505.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mame/ensoniq/esq5505.cpp b/src/mame/ensoniq/esq5505.cpp index 4a4fe5dd17c..e6579b457f4 100644 --- a/src/mame/ensoniq/esq5505.cpp +++ b/src/mame/ensoniq/esq5505.cpp @@ -775,7 +775,7 @@ void esq5505_state::common(machine_config &config) auto &mdin(MIDI_PORT(config, "mdin")); midiin_slot(mdin); - mdin.rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx + mdin.rxd_handler().set(m_duart, FUNC(mc68681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx midiout_slot(MIDI_PORT(config, "mdout")); @@ -906,7 +906,7 @@ void esq5505_state::common32(machine_config &config) auto &mdin(MIDI_PORT(config, "mdin")); midiin_slot(mdin); - mdin.rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx + mdin.rxd_handler().set(m_duart, FUNC(mc68681_device::rx_a_w)); // route MIDI Tx send directly to 68681 channel A Rx midiout_slot(MIDI_PORT(config, "mdout")); From cb20c342fc8ca99f8cb3e4304d723f3ed9f5bb4b Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Tue, 17 Mar 2026 18:41:39 +0100 Subject: [PATCH 302/351] - dataeast/dfruit2.cpp: fleshed out driver [David Haywood] - atari/firetrk.cpp: added DIP locations [Guru] - sunelectronics/shangha3.cpp: added PCB info and ROM locations for blocken [Brian Troha] --- src/mame/atari/firetrk.cpp | 72 ++++----- src/mame/dataeast/dassault.cpp | 2 +- src/mame/dataeast/dfruit2.cpp | 213 +++++++++++++++++++-------- src/mame/sunelectronics/shangha3.cpp | 50 ++++++- 4 files changed, 237 insertions(+), 100 deletions(-) diff --git a/src/mame/atari/firetrk.cpp b/src/mame/atari/firetrk.cpp index fac3189e7ef..6cb21747659 100644 --- a/src/mame/atari/firetrk.cpp +++ b/src/mame/atari/firetrk.cpp @@ -55,7 +55,7 @@ public: , m_p1gear(*this, "P1gear") { } - void firetrk(machine_config &config); + void firetrk(machine_config &config) ATTR_COLD; template int steer_dir_r(); template int steer_flag_r(); @@ -132,7 +132,7 @@ private: void draw_car(bitmap_ind16 &bitmap, const rectangle &cliprect, int which, int flash); void set_service_mode(int enable); - void palette(palette_device &palette); + void palette(palette_device &palette) ATTR_COLD; TILE_GET_INFO_MEMBER(get_tile_info1); TILE_GET_INFO_MEMBER(get_tile_info2); @@ -144,7 +144,7 @@ class montecar_state : public firetrk_state public: using firetrk_state::firetrk_state; - void montecar(machine_config &config); + void montecar(machine_config &config) ATTR_COLD; protected: virtual void video_start() override ATTR_COLD; @@ -160,8 +160,8 @@ private: uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_car(bitmap_ind16 &bitmap, const rectangle &cliprect, int which, int is_collision_detection); - void prom_to_palette(int number, uint8_t val); - void palette(palette_device &palette); + void prom_to_palette(int number, uint8_t val) ATTR_COLD; + void palette(palette_device &palette) ATTR_COLD; TILE_GET_INFO_MEMBER(get_tile_info1); TILE_GET_INFO_MEMBER(get_tile_info2); @@ -173,7 +173,7 @@ class superbug_state : public firetrk_state public: using firetrk_state::firetrk_state; - void superbug(machine_config &config); + void superbug(machine_config &config) ATTR_COLD; protected: virtual void video_start() override ATTR_COLD; @@ -810,8 +810,8 @@ void firetrk_state::machine_reset() uint8_t firetrk_state::dip_r(offs_t offset) { - uint8_t val0 = m_dips[0]->read(); - uint8_t const val1 = m_dips[1]->read(); + uint8_t val0 = m_dips[1]->read(); + uint8_t const val1 = m_dips[0]->read(); if (val1 & (1 << (2 * offset + 0))) val0 |= 1; if (val1 & (1 << (2 * offset + 1))) val0 |= 2; @@ -822,8 +822,8 @@ uint8_t firetrk_state::dip_r(offs_t offset) uint8_t montecar_state::dip_r(offs_t offset) { - uint8_t val0 = m_dips[0]->read(); - uint8_t const val1 = m_dips[1]->read(); + uint8_t val0 = m_dips[1]->read(); + uint8_t const val1 = m_dips[0]->read(); if (val1 & (1 << (3 - offset))) val0 |= 1; if (val1 & (1 << (7 - offset))) val0 |= 2; @@ -1039,37 +1039,43 @@ static INPUT_PORTS_START( firetrk ) PORT_START("STEER_2") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_PLAYER(2) - PORT_START("DIP_0") + PORT_START("DIP_1") // 4-position DIP Switch SW3 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) // other DIPs connect here PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) // other DIPs connect here - PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Coinage )) + PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Coinage )) PORT_DIPLOCATION("SW3:3,4") PORT_DIPSETTING( 0x0c, DEF_STR( 2C_1C )) PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C )) PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C )) PORT_DIPSETTING( 0x00, DEF_STR( Free_Play )) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unused )) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused )) PORT_DIPLOCATION("SW3:1") PORT_DIPSETTING( 0x10, DEF_STR( Off )) PORT_DIPSETTING( 0x00, DEF_STR( On )) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unused )) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused )) PORT_DIPLOCATION("SW3:2") PORT_DIPSETTING( 0x20, DEF_STR( Off )) PORT_DIPSETTING( 0x00, DEF_STR( On )) - PORT_START("DIP_1") - PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) + PORT_START("DIP_0") // 8-position DIP Switch SW2 + PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:7,8") PORT_DIPSETTING( 0x00, DEF_STR( English ) ) PORT_DIPSETTING( 0x01, DEF_STR( French ) ) PORT_DIPSETTING( 0x02, DEF_STR( Spanish ) ) PORT_DIPSETTING( 0x03, DEF_STR( German ) ) - PORT_DIPNAME( 0x0c, 0x04, "Play Time" ) + PORT_DIPNAME( 0x0c, 0x04, "Play Time" ) PORT_DIPLOCATION("SW2:5,6") PORT_DIPSETTING( 0x00, "60 Seconds" ) PORT_DIPSETTING( 0x04, "90 Seconds" ) PORT_DIPSETTING( 0x08, "120 Seconds" ) PORT_DIPSETTING( 0x0c, "150 Seconds" ) - PORT_DIPNAME( 0x30, 0x20, "Extended Play" ) + PORT_DIPNAME( 0x30, 0x20, "Extended Play" ) PORT_DIPLOCATION("SW2:3,4") PORT_DIPSETTING( 0x10, "Liberal" ) PORT_DIPSETTING( 0x20, DEF_STR( Medium ) ) PORT_DIPSETTING( 0x30, "Conservative" ) PORT_DIPSETTING( 0x00, "Never" ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused )) PORT_DIPLOCATION("SW2:2") + PORT_DIPSETTING( 0x40, DEF_STR( Off )) + PORT_DIPSETTING( 0x00, DEF_STR( On )) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused )) PORT_DIPLOCATION("SW2:1") + PORT_DIPSETTING( 0x80, DEF_STR( Off )) + PORT_DIPSETTING( 0x00, DEF_STR( On )) PORT_START("BIT_0") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -1115,27 +1121,27 @@ static INPUT_PORTS_START( superbug ) PORT_START("STEER_1") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) - PORT_START("DIP_0") + PORT_START("DIP_1") // not present on PCB PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) // other DIPs connect here PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) // other DIPs connect here - PORT_START("DIP_1") - PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) + PORT_START("DIP_0") // 8-position DIP Switch + PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("SW2:7,8") PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C )) PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C )) PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C )) PORT_DIPSETTING( 0x00, DEF_STR( Free_Play )) - PORT_DIPNAME( 0x0c, 0x04, "Play Time" ) + PORT_DIPNAME( 0x0c, 0x04, "Play Time" ) PORT_DIPLOCATION("SW2:5,6") PORT_DIPSETTING( 0x00, "60 seconds" ) PORT_DIPSETTING( 0x04, "90 seconds" ) PORT_DIPSETTING( 0x08, "120 seconds" ) PORT_DIPSETTING( 0x0c, "150 seconds" ) - PORT_DIPNAME( 0x30, 0x20, "Extended Play" ) + PORT_DIPNAME( 0x30, 0x20, "Extended Play" ) PORT_DIPLOCATION("SW2:3,4") PORT_DIPSETTING( 0x10, "Liberal" ) PORT_DIPSETTING( 0x20, DEF_STR( Medium ) ) PORT_DIPSETTING( 0x30, "Conservative" ) PORT_DIPSETTING( 0x00, "Never" ) - PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Language ) ) + PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:1,2") PORT_DIPSETTING( 0x00, DEF_STR( English ) ) PORT_DIPSETTING( 0x40, DEF_STR( French ) ) PORT_DIPSETTING( 0x80, DEF_STR( Spanish ) ) @@ -1176,38 +1182,38 @@ static INPUT_PORTS_START( montecar ) PORT_START("STEER_1") PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_PLAYER(1) - PORT_START("DIP_0") + PORT_START("DIP_1") // 4-position DIP Switch SW3 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) // other DIPs connect here PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) // other DIPs connect here - PORT_DIPNAME( 0x0c, 0x0c, "Coin 3 Multiplier" ) + PORT_DIPNAME( 0x0c, 0x0c, "Coin 3 Multiplier" ) PORT_DIPLOCATION("SW3:1,2") PORT_DIPSETTING( 0x0c, "1" ) PORT_DIPSETTING( 0x08, "4" ) PORT_DIPSETTING( 0x04, "5" ) PORT_DIPSETTING( 0x00, "6" ) - PORT_DIPNAME( 0x10, 0x10, "Coin 2 Multiplier" ) + PORT_DIPNAME( 0x10, 0x10, "Coin 2 Multiplier" ) PORT_DIPLOCATION("SW3:3") PORT_DIPSETTING( 0x10, "1" ) PORT_DIPSETTING( 0x00, "2" ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unused )) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused )) PORT_DIPLOCATION("SW3:4") PORT_DIPSETTING( 0x20, DEF_STR( Off )) PORT_DIPSETTING( 0x00, DEF_STR( On )) - PORT_START("DIP_1") - PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) + PORT_START("DIP_0") // 8-position DIP Switch SW2 + PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("SW2:1,2") PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C )) PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C )) PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C )) PORT_DIPSETTING( 0x03, DEF_STR( Free_Play )) - PORT_DIPNAME( 0x0c, 0x08, "Extended Play" ) + PORT_DIPNAME( 0x0c, 0x08, "Extended Play" ) PORT_DIPLOCATION("SW2:3,4") PORT_DIPSETTING( 0x04, "Liberal" ) PORT_DIPSETTING( 0x08, DEF_STR( Medium ) ) PORT_DIPSETTING( 0x00, "Conservative" ) PORT_DIPSETTING( 0x0c, "Never" ) - PORT_DIPNAME( 0x30, 0x20, "Play Time" ) + PORT_DIPNAME( 0x30, 0x20, "Play Time" ) PORT_DIPLOCATION("SW2:5,6") PORT_DIPSETTING( 0x30, "60 Seconds" ) PORT_DIPSETTING( 0x10, "90 Seconds" ) PORT_DIPSETTING( 0x20, "120 Seconds" ) PORT_DIPSETTING( 0x00, "150 Seconds" ) - PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Language ) ) + PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:7,8") PORT_DIPSETTING( 0xc0, DEF_STR( English ) ) PORT_DIPSETTING( 0x80, DEF_STR( Spanish ) ) PORT_DIPSETTING( 0x40, DEF_STR( French ) ) diff --git a/src/mame/dataeast/dassault.cpp b/src/mame/dataeast/dassault.cpp index bb49769f77e..6b6c3a3f245 100644 --- a/src/mame/dataeast/dassault.cpp +++ b/src/mame/dataeast/dassault.cpp @@ -474,7 +474,7 @@ void dassault_state::control_w(uint16_t data) { machine().bookkeeping().coin_counter_w(0, data & 1); if (data & 0xfffe) - logerror("Coin cointrol %04x\n", data); + logerror("Coin control %04x\n", data); } /**********************************************************************************/ diff --git a/src/mame/dataeast/dfruit2.cpp b/src/mame/dataeast/dfruit2.cpp index 968a78755bc..04d7f84a25c 100644 --- a/src/mame/dataeast/dfruit2.cpp +++ b/src/mame/dataeast/dfruit2.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders: +// copyright-holders: David Haywood /* Fruit Dream 2 @@ -18,6 +18,16 @@ MAX695CPE Microprocessor Supervisory IC YM2203C sound chip 28.0000 MHz XTAL bank of 8 switches + +NOTES: + +appears to be ported from the version on tc009xlvc hardware, with some of the features +of that SoC reproduced here + +TODO: +- complete I/O +- IRQ handling may be incomplete +- various unknown reads / writes */ #include "emu.h" @@ -28,6 +38,7 @@ bank of 8 switches #include "cpu/z80/z80.h" #include "machine/i8255.h" +#include "machine/timer.h" #include "sound/ymopn.h" #include "emupal.h" @@ -44,25 +55,32 @@ public: dfruit2_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), + m_palette(*this, "palette"), m_deco_tilegen(*this, "tilegen"), m_sprgen(*this, "sprgen"), - m_spriteram(*this, "spriteram", 0x1000, ENDIANNESS_BIG) + m_spriteram(*this, "spriteram", 0xe00, ENDIANNESS_BIG), + m_mainbank(*this, "mainbank") { } void dfruit2(machine_config &config) ATTR_COLD; void init_dfruit2() ATTR_COLD; +protected: + virtual void machine_start() override ATTR_COLD; + private: required_device m_maincpu; + required_device m_palette; required_device m_deco_tilegen; required_device m_sprgen; memory_share_creator m_spriteram; + required_memory_bank m_mainbank; - uint16_t m_pf_control = 0; - uint16_t m_pf1_data = 0; - uint16_t m_pf2_data = 0; + uint8_t m_rombank = 0; + uint8_t m_b109 = 0; + uint8_t m_irq_source = 0; uint8_t spriteram_r(offs_t offset); void spriteram_w(offs_t offset, uint8_t data); @@ -73,18 +91,25 @@ private: void tilegen_control_w(offs_t offset, uint8_t data); DECO16IC_BANK_CB_MEMBER(bank_callback); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - + TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb); + uint8_t bank_r(); + void bank_w(uint8_t data); + void b109_w(uint8_t data); void program_map(address_map &map) ATTR_COLD; }; uint32_t dfruit2_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { + bitmap.fill(0, cliprect); + screen.priority().fill(0, cliprect); + m_sprgen->set_flip_screen(true); // sprites are flipped relative to tilemaps + m_deco_tilegen->pf_update(nullptr, nullptr); m_deco_tilegen->tilemap_2_draw(screen, bitmap, cliprect, 0, 0); + m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0xe00 / 2); m_deco_tilegen->tilemap_1_draw(screen, bitmap, cliprect, 0, 0); - m_sprgen->draw_sprites(bitmap, cliprect, m_spriteram, 0x1000); return 0; } @@ -124,11 +149,9 @@ void dfruit2_state::tilegen_pf1_data_w(offs_t offset, uint8_t data) int const offs = offset >> 1; if (!BIT(offset, 0)) - m_pf1_data = (m_pf1_data & 0xff00) | data; + m_deco_tilegen->pf1_data_w(offs, data, 0x00ff); else - m_pf1_data = (m_pf1_data & 0x00ff) | (data << 8); - - m_deco_tilegen->pf1_data_w(offs, m_pf1_data, 0xffff); + m_deco_tilegen->pf1_data_w(offs, data << 8, 0xff00); } uint8_t dfruit2_state::tilegen_pf2_data_r(offs_t offset) @@ -146,11 +169,9 @@ void dfruit2_state::tilegen_pf2_data_w(offs_t offset, uint8_t data) int const offs = offset >> 1; if (!BIT(offset, 0)) - m_pf2_data = (m_pf2_data & 0xff00) | data; + m_deco_tilegen->pf2_data_w(offs, data, 0x00ff); else - m_pf2_data = (m_pf2_data & 0x00ff) | (data << 8); - - m_deco_tilegen->pf2_data_w(offs, m_pf2_data, 0xffff); + m_deco_tilegen->pf2_data_w(offs, data << 8, 0xff00); } void dfruit2_state::tilegen_control_w(offs_t offset, uint8_t data) @@ -158,16 +179,45 @@ void dfruit2_state::tilegen_control_w(offs_t offset, uint8_t data) int const offs = offset >> 1; if (!BIT(offset, 0)) - m_pf_control = (m_pf_control & 0xff00) | data; + m_deco_tilegen->pf_control_w(offs, data, 0x00ff); else - m_pf_control = (m_pf_control & 0x00ff) | (data << 8); + m_deco_tilegen->pf_control_w(offs, data << 8, 0xff00); - m_deco_tilegen->pf_control_w(offs, m_pf_control, 0xffff); } DECO16IC_BANK_CB_MEMBER(dfruit2_state::bank_callback) { - return (bank & 0xf0) << 8; // TODO: not verified + return (bank & 0xf0) << 8; +} + + +uint8_t dfruit2_state::bank_r() +{ + return m_rombank; +} + +void dfruit2_state::bank_w(uint8_t data) +{ + m_rombank = data; + m_mainbank->set_entry(m_rombank & 0x1f); +} + +void dfruit2_state::b109_w(uint8_t data) +{ + m_b109 = data; +} + +void dfruit2_state::machine_start() +{ + uint8_t *rom = memregion("maincpu")->base(); + m_mainbank->configure_entries(0, 32, &rom[0x00000], 0x2000); + + m_rombank = 0x1f; + m_mainbank->set_entry(m_rombank); + + save_item(NAME(m_rombank)); + save_item(NAME(m_b109)); + save_item(NAME(m_irq_source)); } @@ -175,32 +225,36 @@ void dfruit2_state::program_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0x7fff).rom(); + map(0x0000, 0x5fff).rom(); + map(0x6000, 0x7fff).bankr(m_mainbank); map(0x8000, 0x9fff).ram(); // WORK RAM CHECK NG if this range isn't mapped. TODO: probably battery backed by the MAX695CPE - map(0xa000, 0xa003).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); // probably - map(0xa004, 0xa005).rw("ym", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); // probably + map(0xa000, 0xa003).rw("ppi", FUNC(i8255_device::read), FUNC(i8255_device::write)); + map(0xa004, 0xa005).rw("ym", FUNC(ym2203_device::read), FUNC(ym2203_device::write)); // map(0xa008, 0xa008).r(); // watchdog? // map(0xa028, 0xa028).w(); // MAX695CPE?? // map(0xa029, 0xa029).w(); // MAX695CPE?? - map(0xa02b, 0xa02b).lr8(NAME([]( ) -> uint8_t { return 0x00; })); // MAX695CPE?? VBLANK / IRQ? - map(0xb000, 0xb00f).w(FUNC(dfruit2_state::tilegen_control_w)); // probably + map(0xa02a, 0xa02a).lr8(NAME([this]() -> uint8_t { logerror("%s: a02a read\n", machine().describe_context()); return 0x00; })); + map(0xa02b, 0xa02b).lr8(NAME([this]() -> uint8_t { logerror("%s: a02b read\n", machine().describe_context()); return m_irq_source; })); // MAX695CPE?? VBLANK / IRQ? (checked in IRQ) + map(0xb000, 0xb00f).w(FUNC(dfruit2_state::tilegen_control_w)); // map(0xb100, 0xb100).w(); // map(0xb101, 0xb101).w(); - // map(0xb109, 0xb109).w(); - map(0xc000, 0xc1ff).ram(); // COLOR RAM CHECK NG if this range isn't mapped - map(0xd000, 0xdfff).rw(FUNC(dfruit2_state::tilegen_pf1_data_r), FUNC(dfruit2_state::tilegen_pf1_data_w)); // SCREEN RAM CHECK NG if this range isn't mapped - map(0xe000, 0xefff).rw(FUNC(dfruit2_state::tilegen_pf2_data_r), FUNC(dfruit2_state::tilegen_pf2_data_w)); - map(0xf000, 0xffff).rw(FUNC(dfruit2_state::spriteram_r), FUNC(dfruit2_state::spriteram_w)); // maybe not the whole range + map(0xb109, 0xb109).w(FUNC(dfruit2_state::b109_w)); + map(0xc000, 0xc1ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); + map(0xd000, 0xdfff).rw(FUNC(dfruit2_state::tilegen_pf2_data_r), FUNC(dfruit2_state::tilegen_pf2_data_w)); // SCREEN RAM CHECK NG if this range isn't mapped + map(0xe000, 0xefff).rw(FUNC(dfruit2_state::tilegen_pf1_data_r), FUNC(dfruit2_state::tilegen_pf1_data_w)); + map(0xf000, 0xfdff).rw(FUNC(dfruit2_state::spriteram_r), FUNC(dfruit2_state::spriteram_w)); + map(0xff08, 0xff08).rw(FUNC(dfruit2_state::bank_r), FUNC(dfruit2_state::bank_w)); + map(0xfff0, 0xffff).ram(); } static INPUT_PORTS_START( dfruit2 ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW ) // or book-keeping? + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -215,15 +269,41 @@ static INPUT_PORTS_START( dfruit2 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_START("IN2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop Reel 1 / Double Up") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) PORT_NAME("Stop Reel 3 / Black") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Stop All Reels") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop Reel 2 / Red") + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_START("DSW") - PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW:1" ) - PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW:2" ) - PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW:3" ) - PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW:4" ) - PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW:5" ) - PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW:6" ) - PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW:7" ) - PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW:8" ) + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:1") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:3") + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW:4") + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:6") + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW:8") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END @@ -238,55 +318,69 @@ static const gfx_layout tile_8x8_layout = 16*8 }; -// TODO: wrong? see missing parts of the disclaimer text at 0x700-0x752 in the GFX viewer static const gfx_layout _16x16_layout = { 16,16, RGN_FRAC(1,2), 4, - { RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 }, + { RGN_FRAC(1,2)+8, RGN_FRAC(1,2)+0, 8, 0 }, { STEP8(16*8*2,1), STEP8(0,1) }, { STEP16(0,8*2) }, 64*8 }; -static GFXDECODE_START( gfx_dfruit2 ) // TODO - GFXDECODE_ENTRY( "tiles", 0, tile_8x8_layout, 0, 32 ) - GFXDECODE_ENTRY( "tiles", 0, _16x16_layout, 0, 32 ) +static GFXDECODE_START( gfx_dfruit2 ) + GFXDECODE_ENTRY( "tiles", 0, tile_8x8_layout, 0, 16 ) + GFXDECODE_ENTRY( "tiles", 0, _16x16_layout, 0, 16 ) GFXDECODE_END -static GFXDECODE_START( gfx_dfruit2_spr ) // TODO - GFXDECODE_ENTRY( "sprites", 0, _16x16_layout, 0, 32 ) +static GFXDECODE_START( gfx_dfruit2_spr ) + GFXDECODE_ENTRY( "sprites", 0, _16x16_layout, 0, 16 ) GFXDECODE_END +TIMER_DEVICE_CALLBACK_MEMBER(dfruit2_state::scanline_cb) +{ + int const scanline = param; + + if (m_b109 & 1) + m_irq_source = 0x10; + else + m_irq_source = 0x00; + + if (scanline == 240) + m_maincpu->set_input_line(0, HOLD_LINE); +} + + void dfruit2_state::dfruit2(machine_config &config) { Z80(config, m_maincpu, 28_MHz_XTAL / 4); // divider not verified m_maincpu->set_addrmap(AS_PROGRAM, &dfruit2_state::program_map); - m_maincpu->set_vblank_int("screen", FUNC(dfruit2_state::irq0_line_hold)); - i8255_device &ppi(I8255A(config, "ppi")); // initialized with 0x9b (mode 0 all reads). TODO: ports are just guessed + TIMER(config, "scantimer").configure_scanline(FUNC(dfruit2_state::scanline_cb), "screen", 0, 1); + + i8255_device &ppi(I8255A(config, "ppi")); // initialized with 0x9b (mode 0 all reads) ppi.in_pa_callback().set_ioport("IN0"); ppi.in_pb_callback().set_ioport("IN1"); - ppi.in_pc_callback().set_ioport("DSW"); + ppi.in_pc_callback().set_ioport("IN2"); - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(58); screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); screen.set_size(64*8, 32*8); screen.set_visarea(0*8, 40*8-1, 1*8, 31*8-1); screen.set_screen_update(FUNC(dfruit2_state::screen_update)); - PALETTE(config, "palette").set_format(palette_device::xBGR_555, 0x200 / 2); // TODO + PALETTE(config, m_palette).set_format(palette_device::xBGRBBBBGGGGRRRR_bit0, 0x200 / 2); GFXDECODE(config, "gfxdecode", "palette", gfx_dfruit2); - DECO16IC(config, m_deco_tilegen, 0); // TODO: everything + DECO16IC(config, m_deco_tilegen, 0); m_deco_tilegen->set_pf1_size(DECO_64x32); m_deco_tilegen->set_pf2_size(DECO_64x32); m_deco_tilegen->set_pf1_col_bank(0x00); - m_deco_tilegen->set_pf2_col_bank(0x10); + m_deco_tilegen->set_pf2_col_bank(0x00); m_deco_tilegen->set_pf1_col_mask(0x0f); m_deco_tilegen->set_pf2_col_mask(0x0f); m_deco_tilegen->set_bank1_callback(FUNC(dfruit2_state::bank_callback)); @@ -300,6 +394,7 @@ void dfruit2_state::dfruit2(machine_config &config) SPEAKER(config, "mono").front_center(); ym2203_device &ym(YM2203(config, "ym", 28_MHz_XTAL / 8)); + ym.port_b_read_callback().set_ioport("DSW"); ym.add_route(ALL_OUTPUTS, "mono", 1.00); // divider not verified } @@ -309,8 +404,8 @@ ROM_START( dfruit2 ) ROM_LOAD( "nn_002.b4", 0x00000, 0x40000, CRC(bab4fa47) SHA1(d9b4ecaf72ced54a1a7f1de7036efe3d939306cf) ) ROM_REGION( 0x80000, "sprites", 0 ) - ROM_LOAD( "nn_010.b10", 0x00000, 0x40000, CRC(1ae3c63f) SHA1(c9940c50bfdacf9bbaf823e48abe249b992f74d9) ) - ROM_LOAD( "nn_020.b11", 0x40000, 0x40000, CRC(8e5ebdb8) SHA1(a44c055cd33921561f4b2e1906186d16bfc64783) ) + ROM_LOAD( "nn_020.b11", 0x00000, 0x40000, CRC(8e5ebdb8) SHA1(a44c055cd33921561f4b2e1906186d16bfc64783) ) + ROM_LOAD( "nn_010.b10", 0x40000, 0x40000, CRC(1ae3c63f) SHA1(c9940c50bfdacf9bbaf823e48abe249b992f74d9) ) ROM_REGION( 0x80000, "tiles", 0 ) ROM_LOAD( "nn_030.h2", 0x00000, 0x80000, CRC(8f9183af) SHA1(e756306755aed15f40cffcdeedea030c5da9ffb3) ) @@ -325,4 +420,4 @@ void dfruit2_state::init_dfruit2() } // anonymous namespace -GAME( 1994, dfruit2, 0, dfruit2, dfruit2, dfruit2_state, init_dfruit2, ROT0, "Nippon Data Kiki / Star Fish", "Fruit Dream II", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 1994, dfruit2, 0, dfruit2, dfruit2, dfruit2_state, init_dfruit2, ROT0, "Nippon Data Kiki / Star Fish", "Fruit Dream II", MACHINE_NOT_WORKING ) diff --git a/src/mame/sunelectronics/shangha3.cpp b/src/mame/sunelectronics/shangha3.cpp index ca63b808b5d..38bb8f4d74f 100644 --- a/src/mame/sunelectronics/shangha3.cpp +++ b/src/mame/sunelectronics/shangha3.cpp @@ -1025,23 +1025,59 @@ ROM_START( heberpop ) // PCB labeled SUN-06 ROM_LOAD( "hbp_ic53_v1.0.ic53", 0x00000, 0x80000, CRC(a4483aa0) SHA1(be301d8ac6d69f5c3fdbcb85bd557090e46da1ff) ) ROM_END +/* + +Blocken (c) 1994 Visco / KID + +KID-07 ++-------------------------------------+ +| VOL IC34 Z80 | +| YM3438 M6295 IC53 | +| 1.056MHz | +| | +| M2 +------+ | +| M2 |GA9201| | +|J | KA01 | | +|A | 0249 | | +|M +------+ | +|M M3 | +|A M3 | +| M3 | +| M1 M3 | +| M1 M3 | +| SW2 IC31 IC98 | +| IC32 IC99 | +| SW1 68000 48MHz IC100| ++-------------------------------------+ + + CPU: TMP68HC000-16, Z80B + Sound: YM3438, OKI M6295 + Video: GA9201 KA01-0249 (QFP120) + OSC: 48MHz, 1.056MHz (resonator) +Memory: M1 = TMM2018AP-45 (2K x 8 SRAM) + M2 = LH52B256D-70LL (32K x 8 SRAM) + M3 = 514256A7L-70 ZIP-20 (256K x 4 DRAM) + Other: SW1 & SW2 - 8-position dipswitch + VOL - Volume pot +*/ + ROM_START( blocken ) // PCB labeled KID-07 ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "ic31j.bin", 0x00000, 0x20000, CRC(ec8de2a3) SHA1(09a6b8c1b656b17ab3d1fc057902487e4f94cf02) ) - ROM_LOAD16_BYTE( "ic32j.bin", 0x00001, 0x20000, CRC(79b96240) SHA1(c1246bd4b91fa45c581a8fdf90cc6beb85adf8ec) ) + ROM_LOAD16_BYTE( "ic31j.ic31", 0x00000, 0x20000, CRC(ec8de2a3) SHA1(09a6b8c1b656b17ab3d1fc057902487e4f94cf02) ) + ROM_LOAD16_BYTE( "ic32j.ic32", 0x00001, 0x20000, CRC(79b96240) SHA1(c1246bd4b91fa45c581a8fdf90cc6beb85adf8ec) ) ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "ic34.bin", 0x00000, 0x10000, CRC(23e446ff) SHA1(82c03b45b337696b0f8293c446544d7ee080d415) ) + ROM_LOAD( "ic34.ic34", 0x00000, 0x10000, CRC(23e446ff) SHA1(82c03b45b337696b0f8293c446544d7ee080d415) ) ROM_REGION16_BE( 0x380000, "blitter", ROMREGION_ERASEFF ) - ROM_LOAD( "ic98j.bin", 0x000000, 0x80000, CRC(35dda273) SHA1(95850d12ca1557c14bc471ddf925aaf423313ff0) ) - ROM_LOAD( "ic99j.bin", 0x080000, 0x80000, CRC(ce43762b) SHA1(e1c51ea0b54b5febdee127619e15f1cda650cb4c) ) + ROM_LOAD( "ic98j.ic98", 0x000000, 0x80000, CRC(35dda273) SHA1(95850d12ca1557c14bc471ddf925aaf423313ff0) ) + ROM_LOAD( "ic99j.ic99", 0x080000, 0x80000, CRC(ce43762b) SHA1(e1c51ea0b54b5febdee127619e15f1cda650cb4c) ) // 100000-1fffff empty - ROM_LOAD( "ic100j.bin", 0x200000, 0x80000, CRC(a34786fd) SHA1(7d4879cbaa055c2ddbe6d20dd946bf0e3e069d4d) ) + ROM_LOAD( "ic100j.ic100", 0x200000, 0x80000, CRC(a34786fd) SHA1(7d4879cbaa055c2ddbe6d20dd946bf0e3e069d4d) ) // 280000-37ffff empty ROM_REGION( 0x80000, "oki", 0 ) - ROM_LOAD( "ic53.bin", 0x00000, 0x80000, CRC(86108c56) SHA1(aa405fa2eec5cc178ef6226f229a12dac09504f0) ) + ROM_LOAD( "ic53.ic53", 0x00000, 0x80000, CRC(86108c56) SHA1(aa405fa2eec5cc178ef6226f229a12dac09504f0) ) ROM_END From 9e29e826d78033b7e8734046e520d9da05e2d0b0 Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 17 Mar 2026 19:12:11 +0100 Subject: [PATCH 303/351] kontest,mogura: small cleanup/improvements --- src/mame/konami/kontest.cpp | 136 +++++++++++++++------------------ src/mame/konami/mogura.cpp | 39 ++++++++-- src/mame/midway/williams_v.cpp | 1 - 3 files changed, 92 insertions(+), 84 deletions(-) diff --git a/src/mame/konami/kontest.cpp b/src/mame/konami/kontest.cpp index abf9f749b40..cd012b6faf2 100644 --- a/src/mame/konami/kontest.cpp +++ b/src/mame/konami/kontest.cpp @@ -21,8 +21,10 @@ ***************************************************************************/ #include "emu.h" + #include "cpu/z80/z80.h" #include "sound/sn76496.h" + #include "emupal.h" #include "screen.h" #include "speaker.h" @@ -30,8 +32,6 @@ namespace { -#define MAIN_CLOCK XTAL(24'000'000) - class kontest_state : public driver_device { public: @@ -44,32 +44,31 @@ public: void kontest(machine_config &config); +protected: + // driver_device overrides + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + private: // devices required_device m_maincpu; required_shared_ptr m_ram; required_device m_palette; - // screen updates - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - // driver state uint8_t m_control = 0; + // screen updates + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + // member functions void control_w(uint8_t data); + void vblank(int state); void kontest_io(address_map &map) ATTR_COLD; void kontest_map(address_map &map) ATTR_COLD; - // driver_device overrides - virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; - - virtual void video_start() override ATTR_COLD; - void kontest_palette(palette_device &palette) const; - INTERRUPT_GEN_MEMBER(kontest_interrupt); }; @@ -86,59 +85,45 @@ void kontest_state::kontest_palette(palette_device &palette) const { int bit0, bit1, bit2; - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; - bit0 = BIT(color_prom[i], 3); - bit1 = BIT(color_prom[i], 4); - bit2 = BIT(color_prom[i], 5); - int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; bit0 = BIT(color_prom[i], 0); bit1 = BIT(color_prom[i], 1); bit2 = BIT(color_prom[i], 2); int const r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 3); + bit1 = BIT(color_prom[i], 4); + bit2 = BIT(color_prom[i], 5); + int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; + palette.set_pen_color(i, rgb_t(r, g, b)); } } -void kontest_state::video_start() -{ -} - uint32_t kontest_state::screen_update( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect ) { - for(int y=0;y<32;y++) + for (int y = 0; y < 32; y++) { - for(int x=0;x<64;x++) + for (int x = 0; x < 64; x++) { - uint16_t const tile = (m_ram[(x+y*64)|0x800] * 0x10) + 0x1000; - uint8_t const attr = m_ram[(x+((y >> 1)*64))|0x000] & 7; + uint8_t const tile = m_ram[(x + y * 64) | 0x800]; + uint8_t const attr = m_ram[(x + ((y >> 1) * 64))] & 7; - for(int yi=0;yi<8;yi++) + for (int yi = 0; yi < 8; yi++) { - for(int xi=0;xi<8;xi++) + for (int xi = 0; xi < 8; xi++) { - uint8_t color,pen[2]; + uint8_t const pen = m_ram[(yi << 1) | (xi >> 2) | (tile << 4) | 0x1000]; + uint8_t const color = BIT(pen >> 4, ~xi & 3) << 1 | BIT(pen, ~xi & 3); - uint8_t const x_step = xi >> 2; - - pen[0] = m_ram[(x_step+yi*2)|(tile)]; - pen[0] >>= 3-((xi & 3)); - pen[0] &= 1; - pen[1] = m_ram[(x_step+yi*2)|(tile)]; - pen[1] >>= 7-((xi & 3)); - pen[1] &= 1; - - color = pen[0]; - color|= pen[1]<<1; - - int const res_x = x*8+xi-256; - int const res_y = y*8+yi; + int const res_x = x * 8 + xi - 256; + int const res_y = y * 8 + yi; if (cliprect.contains(res_x, res_y)) - bitmap.pix(res_y, res_x) = m_palette->pen(color|attr*4); + bitmap.pix(res_y, res_x) = m_palette->pen(color | attr * 4); } } } @@ -154,14 +139,24 @@ uint32_t kontest_state::screen_update( screen_device &screen, bitmap_rgb32 &bitm ***************************************************************************/ +void kontest_state::vblank(int state) +{ + if (state && BIT(m_control, 3)) + m_maincpu->set_input_line(0, ASSERT_LINE); +} + void kontest_state::control_w(uint8_t data) { - // d3: irq mask + // d0: coin counter + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + + // d3: irq enable + if (!BIT(data, 3)) + m_maincpu->set_input_line(0, CLEAR_LINE); + // d2: ? (reset during 1st grid test and color test) // other bits: ? m_control = data; - - m_maincpu->set_input_line(0, CLEAR_LINE); } void kontest_state::kontest_map(address_map &map) @@ -212,9 +207,9 @@ static INPUT_PORTS_START( kontest ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_DIPNAME( 0x80, 0x80, "Orientation" ) - PORT_DIPSETTING( 0x80, "Horizontal" ) - PORT_DIPSETTING( 0x00, "Vertical" ) + PORT_DIPNAME( 0x80, 0x80, "Orientation" ) + PORT_DIPSETTING( 0x80, "Horizontal" ) + PORT_DIPSETTING( 0x00, "Vertical" ) PORT_START("IN3") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) @@ -231,47 +226,36 @@ INPUT_PORTS_END ***************************************************************************/ -INTERRUPT_GEN_MEMBER(kontest_state::kontest_interrupt) -{ - if (m_control & 8) - device.execute().set_input_line(0, ASSERT_LINE); -} - void kontest_state::machine_start() { - // save state save_item(NAME(m_control)); } void kontest_state::machine_reset() { - m_control = 0; + control_w(0); } void kontest_state::kontest(machine_config &config) { - /* basic machine hardware */ - Z80(config, m_maincpu, MAIN_CLOCK/8); + // basic machine hardware + Z80(config, m_maincpu, 24_MHz_XTAL / 8); m_maincpu->set_addrmap(AS_PROGRAM, &kontest_state::kontest_map); m_maincpu->set_addrmap(AS_IO, &kontest_state::kontest_io); - m_maincpu->set_vblank_int("screen", FUNC(kontest_state::kontest_interrupt)); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); + screen.set_raw(24_MHz_XTAL / 4, 384, 0, 256, 264, 16, 240); // guessed screen.set_screen_update(FUNC(kontest_state::screen_update)); - screen.set_size(32*8, 32*8); - screen.set_visarea(0*8, 32*8-1, 2*8, 30*8-1); + screen.screen_vblank().set(FUNC(kontest_state::vblank)); PALETTE(config, m_palette, FUNC(kontest_state::kontest_palette), 32); - /* sound hardware */ + // sound hardware SPEAKER(config, "speaker", 2).front(); - SN76489A(config, "sn1", MAIN_CLOCK/16).add_route(ALL_OUTPUTS, "speaker", 0.50, 1); - - SN76489A(config, "sn2", MAIN_CLOCK/16).add_route(ALL_OUTPUTS, "speaker", 0.50, 0); + SN76489A(config, "sn1", 24_MHz_XTAL / 16).add_route(ALL_OUTPUTS, "speaker", 0.50, 1); + SN76489A(config, "sn2", 24_MHz_XTAL / 16).add_route(ALL_OUTPUTS, "speaker", 0.50, 0); } @@ -282,14 +266,14 @@ void kontest_state::kontest(machine_config &config) ***************************************************************************/ ROM_START( kontest ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "800b01.10d", 0x000000, 0x008000, CRC(520f83dc) SHA1(abc23c586864c2ecbc5b16614e27faafc93287de) ) + ROM_REGION( 0x8000, "maincpu", 0 ) + ROM_LOAD( "800b01.10d", 0x0000, 0x8000, CRC(520f83dc) SHA1(abc23c586864c2ecbc5b16614e27faafc93287de) ) ROM_REGION( 0x20, "proms", 0 ) - ROM_LOAD( "800a02.4f", 0x000000, 0x000020, CRC(6d604171) SHA1(6b1366fb53cecbde6fb651142a77917dd16daf69) ) + ROM_LOAD( "800a02.4f", 0x0000, 0x0020, CRC(6d604171) SHA1(6b1366fb53cecbde6fb651142a77917dd16daf69) ) ROM_END } // anonymous namespace -GAME( 1987?, kontest, 0, kontest, kontest, kontest_state, empty_init, ROT0, "Konami", "Konami Test Board (GX800, Japan)", MACHINE_SUPPORTS_SAVE ) // late 1987 or early 1988 +GAME( 1987?, kontest, 0, kontest, kontest, kontest_state, empty_init, ROT0, "Konami", "Konami Test Board (GX800, Japan)", MACHINE_SUPPORTS_SAVE ) // late 1987 or early 1988 diff --git a/src/mame/konami/mogura.cpp b/src/mame/konami/mogura.cpp index 9eb46ee8320..bf2be871f5f 100644 --- a/src/mame/konami/mogura.cpp +++ b/src/mame/konami/mogura.cpp @@ -2,7 +2,9 @@ // copyright-holders:David Haywood /***************************************************************************** -Mogura Desse, Konami 1991 + +Mogura Desse (GX141), Konami 1991 + Hardware info by Guru --------------------- @@ -97,6 +99,8 @@ public: void mogura(machine_config &config); protected: + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; virtual void video_start() override ATTR_COLD; private: @@ -108,7 +112,9 @@ private: required_shared_ptr m_tileram; tilemap_t *m_tilemap = nullptr; + uint8_t m_control = false; + void vblank(int state); void tileram_w(offs_t offset, uint8_t data); void control_w(uint8_t data); void dac_w(uint8_t data); @@ -143,10 +149,9 @@ void mogura_state::palette(palette_device &palette) const int const g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; // blue component - bit0 = 0; - bit1 = BIT(color_prom[i], 6); - bit2 = BIT(color_prom[i], 7); - int const b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2; + bit0 = BIT(color_prom[i], 6); + bit1 = BIT(color_prom[i], 7); + int const b = 0x52 * bit0 + 0xad * bit1; palette.set_pen_color(bitswap<5>(i, 2, 1, 0, 4, 3), rgb_t(r, g, b)); } @@ -186,6 +191,12 @@ void mogura_state::tileram_w(offs_t offset, uint8_t data) m_tilemap->mark_tile_dirty(offset & 0x7ff); } +void mogura_state::vblank(int state) +{ + if (state && BIT(m_control, 3)) + m_maincpu->set_input_line(0, ASSERT_LINE); +} + void mogura_state::control_w(uint8_t data) { // bits 0 & 1: coin counters @@ -193,7 +204,11 @@ void mogura_state::control_w(uint8_t data) machine().bookkeeping().coin_counter_w(1, BIT(data, 0)); // bit 2: sound related? - // bit 3: always toggles? + // bit 3: irq enable + if (!BIT(data, 3)) + m_maincpu->set_input_line(0, CLEAR_LINE); + + m_control = data; } void mogura_state::dac_w(uint8_t data) @@ -278,18 +293,28 @@ static GFXDECODE_START( gfx_mogura ) GFXDECODE_END +void mogura_state::machine_start() +{ + save_item(NAME(m_control)); +} + +void mogura_state::machine_reset() +{ + control_w(0); +} + void mogura_state::mogura(machine_config &config) { // basic machine hardware Z80(config, m_maincpu, 24_MHz_XTAL / 8); // 3 MHz m_maincpu->set_addrmap(AS_PROGRAM, &mogura_state::prg_map); m_maincpu->set_addrmap(AS_IO, &mogura_state::io_map); - m_maincpu->set_vblank_int("screen", FUNC(mogura_state::irq0_line_hold)); // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(24_MHz_XTAL / 4, 384, 0, 320, 264, 16, 240); // measured 59.1881 screen.set_screen_update(FUNC(mogura_state::screen_update)); + screen.screen_vblank().set(FUNC(mogura_state::vblank)); screen.set_palette("palette"); GFXDECODE(config, m_gfxdecode, "palette", gfx_mogura); diff --git a/src/mame/midway/williams_v.cpp b/src/mame/midway/williams_v.cpp index e49503d426b..6e0acee279f 100644 --- a/src/mame/midway/williams_v.cpp +++ b/src/mame/midway/williams_v.cpp @@ -567,7 +567,6 @@ TILE_GET_INFO_MEMBER(mysticm_state::get_tile_info) //gfx_element *gfx = tileinfo.decoder->gfx(0); //printf("%d %d %d %d\n", gfx->elements(), gfx->colorbase(), gfx->granularity(), gfx->colors()); - } TILE_GET_INFO_MEMBER(joust2_state::get_tile_info) From 4c9b048c34dc659ca581db3a97fa261ee73669e8 Mon Sep 17 00:00:00 2001 From: hap Date: Tue, 17 Mar 2026 19:24:13 +0100 Subject: [PATCH 304/351] kangaroob: fix lockup regression --- src/mame/sunelectronics/kangaroo.cpp | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/src/mame/sunelectronics/kangaroo.cpp b/src/mame/sunelectronics/kangaroo.cpp index 0f8897e20b0..4812b17db92 100644 --- a/src/mame/sunelectronics/kangaroo.cpp +++ b/src/mame/sunelectronics/kangaroo.cpp @@ -189,9 +189,9 @@ public: protected: virtual void machine_start() override ATTR_COLD; - DECLARE_MACHINE_RESET(kangaroob); virtual void main_map(address_map &map) ATTR_COLD; + void kangaroob_map(address_map &map) ATTR_COLD; // devices required_device m_maincpu; @@ -206,6 +206,7 @@ protected: // misc void coin_counter_w(uint8_t data); + void kangaroob_nmi_w(uint8_t data); void videoram_w(offs_t offset, uint8_t data); void video_control_w(offs_t offset, uint8_t data); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -437,13 +438,6 @@ void kangaroo_mcu_state::machine_start() save_item(NAME(m_mcu_port_r)); } -MACHINE_RESET_MEMBER(kangaroo_base_state, kangaroob) -{ - // The MCU triggers an NMI to make the game boot. The bootleg does not have an MCU, - // but still expects an NMI somehow, otherwise it gets stuck at the RAM check. - m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); -} - /************************************* @@ -504,6 +498,14 @@ void kangaroo_mcu_state::mcu_port_r_w(uint8_t data) } +void kangaroo_base_state::kangaroob_nmi_w(uint8_t data) +{ + // The MCU triggers an NMI to make the game boot. The bootleg does not have an MCU, + // but still expects an NMI somehow, otherwise it gets stuck at the RAM check. + m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); +} + + /************************************* * @@ -538,6 +540,12 @@ void kangaroo_base_state::main_map(address_map &map) map(0xee00, 0xee00).mirror(0x00ff).portr("IN2"); } +void kangaroo_base_state::kangaroob_map(address_map &map) +{ + main_map(map); + map(0xc000, 0xc000).mirror(0x1fff).w(FUNC(kangaroo_base_state::kangaroob_nmi_w)); +} + void kangaroo_mcu_state::main_map(address_map &map) { kangaroo_base_state::main_map(map); @@ -748,7 +756,7 @@ void kangaroo_mcu_state::kangaroo(machine_config &config) void kangaroo_base_state::kangaroob(machine_config &config) { fnkyfish(config); - MCFG_MACHINE_RESET_OVERRIDE(kangaroo_base_state, kangaroob) + m_maincpu->set_addrmap(AS_PROGRAM, &kangaroo_base_state::kangaroob_map); } From 622241a5278bc2e95ed3410021d78f8e00551066 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 17 Mar 2026 19:40:16 +0100 Subject: [PATCH 305/351] machine/i82426ex_ib.cpp: fix DMA page_offset --- src/devices/machine/i82426ex_ib.cpp | 23 +++++++++++------------ src/devices/machine/um8498f.cpp | 2 +- src/mame/be/bebox_m.cpp | 2 +- src/mame/intel/i420ex.cpp | 2 +- 4 files changed, 14 insertions(+), 15 deletions(-) diff --git a/src/devices/machine/i82426ex_ib.cpp b/src/devices/machine/i82426ex_ib.cpp index 054fab90c6d..e119180ae9c 100644 --- a/src/devices/machine/i82426ex_ib.cpp +++ b/src/devices/machine/i82426ex_ib.cpp @@ -251,45 +251,44 @@ offs_t i82426ex_ib_device::page_offset() } -uint8_t i82426ex_ib_device::dma_read_byte(offs_t offset) +u8 i82426ex_ib_device::dma_read_byte(offs_t offset) { address_space &prog_space = m_host_cpu->space(AS_PROGRAM); if (m_dma_channel == -1) return 0xff; - uint8_t result; - result = prog_space.read_byte((page_offset() << 16) + offset); + u8 result = prog_space.read_byte(page_offset() + offset); return result; } -void i82426ex_ib_device::dma_write_byte(offs_t offset, uint8_t data) +void i82426ex_ib_device::dma_write_byte(offs_t offset, u8 data) { address_space &prog_space = m_host_cpu->space(AS_PROGRAM); if (m_dma_channel == -1) return; - prog_space.write_byte((page_offset() << 16) + offset, data); + prog_space.write_byte(page_offset() + offset, data); } -uint8_t i82426ex_ib_device::dma_read_word(offs_t offset) +u8 i82426ex_ib_device::dma_read_word(offs_t offset) { address_space &prog_space = m_host_cpu->space(AS_PROGRAM); + if (m_dma_channel == -1) return 0xff; - uint16_t result; - result = prog_space.read_word(((page_offset() << 16) & 0xfe0000) | (offset << 1)); + u16 result = prog_space.read_word((page_offset() & 0xfe0000) | (offset << 1)); m_dma_high_byte = result >> 8; - return result & 0xFF; + return result; } -void i82426ex_ib_device::dma_write_word(offs_t offset, uint8_t data) +void i82426ex_ib_device::dma_write_word(offs_t offset, u8 data) { - address_space &prog_space = m_host_cpu->space(AS_PROGRAM); if (m_dma_channel == -1) return; + address_space &prog_space = m_host_cpu->space(AS_PROGRAM); - prog_space.write_word(((page_offset() << 16) & 0xfe0000) | (offset << 1), m_dma_high_byte | data); + prog_space.write_word((page_offset() & 0xfe0000) | (offset << 1), m_dma_high_byte | data); } void i82426ex_ib_device::dma1_eop_w(int state) diff --git a/src/devices/machine/um8498f.cpp b/src/devices/machine/um8498f.cpp index 054051dc52c..578a1a0702e 100644 --- a/src/devices/machine/um8498f.cpp +++ b/src/devices/machine/um8498f.cpp @@ -448,7 +448,7 @@ u8 um8498f_device::dma_read_word(offs_t offset) if (m_dma_channel == -1) return 0xff; - uint16_t result = m_space_mem->read_word((page_offset() & 0xfe0000) | (offset << 1)); + u16 result = m_space_mem->read_word((page_offset() & 0xfe0000) | (offset << 1)); m_dma_high_byte = result >> 8; return result; diff --git a/src/mame/be/bebox_m.cpp b/src/mame/be/bebox_m.cpp index 38eb4797d27..10a734a946d 100644 --- a/src/mame/be/bebox_m.cpp +++ b/src/mame/be/bebox_m.cpp @@ -82,7 +82,7 @@ PCI Devices: #0 Motorola MPC105 - #11 Intel 82378 PCI/ISA bridge + #11 Intel 82378ZB PCI/ISA bridge #12 NCR 53C810 SCSI Super I/O is an Intel 82091AA AIP diff --git a/src/mame/intel/i420ex.cpp b/src/mame/intel/i420ex.cpp index 06d335804ea..821ec1329ac 100644 --- a/src/mame/intel/i420ex.cpp +++ b/src/mame/intel/i420ex.cpp @@ -20,7 +20,7 @@ TODO: (workaround: fix it manually then "Exit Saving Changes"); - AZ08 / AZ07 BIOSes: goes "Auto Configuration Error" with PCI bus, propagate that if cards are hooked up; -- isa1:sb16_lle: DMA crashes with testsb16.exe +- isa1:sb16_lle: DMA crashes with high DMA (unsupported?) - serport0:logitech_mouse: fails freedos13 init on every odd boot; **************************************************************************************************/ From bdcf3e451f085e9a517bebc9b0b76321e10173c0 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 17 Mar 2026 20:16:38 +0100 Subject: [PATCH 306/351] machine/i82426ex_ib.cpp: add TRC register hookup, fix BIOS hanging after saving options in setup mode --- src/devices/machine/i82425ex_psc.cpp | 9 ++++++++- src/devices/machine/i82425ex_psc.h | 2 ++ src/devices/machine/i82426ex_ib.cpp | 17 +++++++++++++++++ src/devices/machine/i82426ex_ib.h | 5 +++++ src/devices/machine/mv6436x.h | 2 +- src/devices/machine/pci.h | 2 +- src/mame/intel/i420ex.cpp | 4 ++++ 7 files changed, 38 insertions(+), 3 deletions(-) diff --git a/src/devices/machine/i82425ex_psc.cpp b/src/devices/machine/i82425ex_psc.cpp index 487e4d2ee96..4a9108ea1f5 100644 --- a/src/devices/machine/i82425ex_psc.cpp +++ b/src/devices/machine/i82425ex_psc.cpp @@ -7,7 +7,7 @@ #define LOG_MAP (1U << 1) #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #define LOGMAP(...) LOGMASKED(LOG_MAP, __VA_ARGS__) @@ -340,7 +340,14 @@ void i82425ex_psc_device::config_map(address_map &map) m_ctltmrh = data; }) ); +} +void i82425ex_psc_device::config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask) +{ + if (mem_mask == 0x0000'ff00) + m_ib->trc_w(offset, data >> 8); + else + pci_host_device::config_address_w(offset, data, mem_mask); } void i82425ex_psc_device::map_bios(address_space *memory_space, uint32_t start, uint32_t end) diff --git a/src/devices/machine/i82425ex_psc.h b/src/devices/machine/i82425ex_psc.h index 883c1b9c8d0..6946e7c2941 100644 --- a/src/devices/machine/i82425ex_psc.h +++ b/src/devices/machine/i82425ex_psc.h @@ -50,6 +50,8 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; + virtual void config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override; + private: required_device m_host_cpu; required_device m_ib; diff --git a/src/devices/machine/i82426ex_ib.cpp b/src/devices/machine/i82426ex_ib.cpp index e119180ae9c..e64e8b548ed 100644 --- a/src/devices/machine/i82426ex_ib.cpp +++ b/src/devices/machine/i82426ex_ib.cpp @@ -4,6 +4,11 @@ #include "emu.h" #include "i82426ex_ib.h" +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + DEFINE_DEVICE_TYPE(I82426EX_IB, i82426ex_ib_device, "i82426ex_ib", "Intel 82425EX ISA Bridge") i82426ex_ib_device::i82426ex_ib_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -16,6 +21,7 @@ i82426ex_ib_device::i82426ex_ib_device(const machine_config &mconfig, const char , m_isabus(*this, "isabus") , m_write_intr(*this) , m_write_spkr(*this) + , m_write_cpurst(*this) , m_rtcale(*this) , m_rtccs_read(*this, 0xff) , m_rtccs_write(*this) @@ -221,6 +227,17 @@ void i82426ex_ib_device::portb_w(u8 data) } } +// NOTE: $cf9 actually belongs to IB, cfr. CPURST/PCIRST# definitions at page 34 +void i82426ex_ib_device::trc_w(offs_t offset, u8 data) +{ + LOG("CF9h: TRC Turbo/Reset Control %02x\n", data); + // TODO: bit 1 actually controls if reset type is soft (0) or hard (1) + // (former just resets the CPU?) + if (BIT(data, 2)) + m_write_cpurst(1); + // TODO: bit 0 for deturbo mode, and whatever is bit 5 actually used by entrada +} + /* * DMA Controller */ diff --git a/src/devices/machine/i82426ex_ib.h b/src/devices/machine/i82426ex_ib.h index bc767fbc403..1d3974d124e 100644 --- a/src/devices/machine/i82426ex_ib.h +++ b/src/devices/machine/i82426ex_ib.h @@ -39,9 +39,13 @@ public: auto rtccs_read() { return m_rtccs_read.bind(); } auto rtccs_write() { return m_rtccs_write.bind(); } + auto cpurst() { return m_write_cpurst.bind(); } + template void set_hostcputag(T &&tag) { m_host_cpu.set_tag(std::forward(tag)); } template void set_keybctag(T &&tag) { m_keybc.set_tag(std::forward(tag)); } + void trc_w(offs_t offset, u8 data); + protected: virtual void device_start() override; virtual void device_reset() override; @@ -60,6 +64,7 @@ private: devcb_write_line m_write_intr; devcb_write_line m_write_spkr; + devcb_write_line m_write_cpurst; devcb_write8 m_rtcale; devcb_read8 m_rtccs_read; diff --git a/src/devices/machine/mv6436x.h b/src/devices/machine/mv6436x.h index af0d92502e2..4e4a172101d 100644 --- a/src/devices/machine/mv6436x.h +++ b/src/devices/machine/mv6436x.h @@ -245,7 +245,7 @@ public: mv64361_pci_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); uint32_t config_address_r(offs_t offset, uint32_t mem_mask = ~0); - void config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + virtual void config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override; uint32_t config_data_r(offs_t offset, uint32_t mem_mask = ~0); void config_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); diff --git a/src/devices/machine/pci.h b/src/devices/machine/pci.h index 28cbef8df45..2ba6a5dadd1 100644 --- a/src/devices/machine/pci.h +++ b/src/devices/machine/pci.h @@ -254,7 +254,7 @@ protected: pci_host_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); uint32_t config_address_r(); - void config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + virtual void config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint32_t config_data_r(offs_t offset, uint32_t mem_mask = ~0); void config_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); uint32_t config_data_ex_r(offs_t offset, uint32_t mem_mask = ~0); diff --git a/src/mame/intel/i420ex.cpp b/src/mame/intel/i420ex.cpp index 821ec1329ac..b68a30b432f 100644 --- a/src/mame/intel/i420ex.cpp +++ b/src/mame/intel/i420ex.cpp @@ -132,6 +132,10 @@ void i420ex_state::i420ex(machine_config &config) ib.rtcale().set([this](u8 data) { m_rtc->address_w(data); }); ib.rtccs_read().set([this]() { return m_rtc->data_r(); }); ib.rtccs_write().set([this](u8 data) { m_rtc->data_w(data); }); + ib.cpurst().set([this] (int state) { + if (state) + machine().schedule_soft_reset(); + }); // TODO: config space not known // 05.0 is clearly host: it's what the BIOS addresses at startup From e0945be022481e6e7c7bf25b357ef8384c984cb3 Mon Sep 17 00:00:00 2001 From: angelosa Date: Tue, 17 Mar 2026 20:19:36 +0100 Subject: [PATCH 307/351] src: bulk change osd_printf_warning -> osd_printf_info for LOG_OUTPUT_FUNC --- src/devices/bus/nscsi/dtc510.cpp | 2 +- src/devices/bus/pc98_cbus/pc9801_27.cpp | 2 +- src/devices/machine/cr560b.cpp | 2 +- src/devices/machine/i82371eb_acpi.cpp | 2 +- src/devices/machine/i82371eb_ide.cpp | 2 +- src/devices/machine/i82371eb_isa.cpp | 2 +- src/devices/machine/i82371eb_usb.cpp | 2 +- src/devices/machine/i82443bx_host.cpp | 2 +- src/devices/machine/mediagx_cs5530_bridge.cpp | 2 +- src/devices/machine/mediagx_cs5530_ide.cpp | 2 +- src/devices/machine/mediagx_host.cpp | 2 +- src/devices/machine/pci-usb.cpp | 2 +- src/devices/machine/sis5513_ide.cpp | 2 +- src/devices/machine/sis7001_usb.cpp | 2 +- src/devices/machine/sis7018_audio.cpp | 2 +- src/devices/machine/sis900_eth.cpp | 2 +- src/devices/machine/sis950_acpi.cpp | 2 +- src/devices/machine/sis950_lpc.cpp | 2 +- src/devices/machine/sis950_smbus.cpp | 2 +- src/devices/machine/vt82c586b_acpi.cpp | 2 +- src/devices/machine/vt82c586b_ide.cpp | 2 +- src/devices/machine/vt82c586b_isa.cpp | 2 +- src/devices/machine/vt82c586b_usb.cpp | 2 +- src/devices/machine/vt82c598mvp.cpp | 2 +- src/devices/machine/zfmicro_usb.cpp | 2 +- src/mame/atari/jaguar_v.cpp | 2 +- src/mame/misc/3do_amy.cpp | 2 +- src/mame/misc/3do_clio.cpp | 2 +- src/mame/misc/3do_madam.cpp | 2 +- src/mame/misc/xtom3d.cpp | 2 +- 30 files changed, 30 insertions(+), 30 deletions(-) diff --git a/src/devices/bus/nscsi/dtc510.cpp b/src/devices/bus/nscsi/dtc510.cpp index ad8002d7ac4..80623b15285 100644 --- a/src/devices/bus/nscsi/dtc510.cpp +++ b/src/devices/bus/nscsi/dtc510.cpp @@ -28,7 +28,7 @@ References: #define LOG_C2 (1U << 3) // log assign parameter data #define VERBOSE (LOG_GENERAL | LOG_COMMAND) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/bus/pc98_cbus/pc9801_27.cpp b/src/devices/bus/pc98_cbus/pc9801_27.cpp index a6c0323c9ad..4915200f315 100644 --- a/src/devices/bus/pc98_cbus/pc9801_27.cpp +++ b/src/devices/bus/pc98_cbus/pc9801_27.cpp @@ -35,7 +35,7 @@ NOTES: #define LOG_STATE (1U << 1) // SASI state flags #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/cr560b.cpp b/src/devices/machine/cr560b.cpp index 78ab7e34ea2..3fee76e67f1 100644 --- a/src/devices/machine/cr560b.cpp +++ b/src/devices/machine/cr560b.cpp @@ -31,7 +31,7 @@ TODO: #define VERBOSE (LOG_GENERAL | LOG_TOC | LOG_CMD | LOG_PARAM) //#define VERBOSE (LOG_TOC) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #define LOGPARAM LOGMASKED(LOG_PARAM, "-> Param: %02x %02x %02x %02x %02x %02x\n", \ m_input_fifo[1], m_input_fifo[2], m_input_fifo[3], \ diff --git a/src/devices/machine/i82371eb_acpi.cpp b/src/devices/machine/i82371eb_acpi.cpp index afc5ac69400..c22c19c048a 100644 --- a/src/devices/machine/i82371eb_acpi.cpp +++ b/src/devices/machine/i82371eb_acpi.cpp @@ -19,7 +19,7 @@ #define LOG_ACPIEX (1U << 5) // verbose ACPI internals #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_ACPI | LOG_ACPIEX) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/i82371eb_ide.cpp b/src/devices/machine/i82371eb_ide.cpp index 387bcd8ea23..235b056da1e 100644 --- a/src/devices/machine/i82371eb_ide.cpp +++ b/src/devices/machine/i82371eb_ide.cpp @@ -17,7 +17,7 @@ #define LOG_MAP (1U << 3) // log full remaps #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_MAP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/i82371eb_isa.cpp b/src/devices/machine/i82371eb_isa.cpp index e75adce2846..3b5fefab1a8 100644 --- a/src/devices/machine/i82371eb_isa.cpp +++ b/src/devices/machine/i82371eb_isa.cpp @@ -18,7 +18,7 @@ #define LOG_MAP (1U << 3) // log full remaps #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_MAP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/i82371eb_usb.cpp b/src/devices/machine/i82371eb_usb.cpp index 287fcf1858f..ce8a688cc7e 100644 --- a/src/devices/machine/i82371eb_usb.cpp +++ b/src/devices/machine/i82371eb_usb.cpp @@ -15,7 +15,7 @@ TODO: #include "i82371eb_usb.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/i82443bx_host.cpp b/src/devices/machine/i82443bx_host.cpp index 0ea7b522e1b..ea0bda19dc5 100644 --- a/src/devices/machine/i82443bx_host.cpp +++ b/src/devices/machine/i82443bx_host.cpp @@ -17,7 +17,7 @@ #define LOG_MAP (1U << 3) // log full remaps #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_MAP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/mediagx_cs5530_bridge.cpp b/src/devices/machine/mediagx_cs5530_bridge.cpp index 8fc90f2bedd..e445f45466a 100644 --- a/src/devices/machine/mediagx_cs5530_bridge.cpp +++ b/src/devices/machine/mediagx_cs5530_bridge.cpp @@ -14,7 +14,7 @@ #define LOG_MAP (1U << 1) // log full remaps #define VERBOSE (LOG_GENERAL | LOG_MAP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/mediagx_cs5530_ide.cpp b/src/devices/machine/mediagx_cs5530_ide.cpp index a48b35821db..f09ea667c26 100644 --- a/src/devices/machine/mediagx_cs5530_ide.cpp +++ b/src/devices/machine/mediagx_cs5530_ide.cpp @@ -13,7 +13,7 @@ TODO: #include "mediagx_cs5530_ide.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/mediagx_host.cpp b/src/devices/machine/mediagx_host.cpp index a3da478af96..f5dd40ae72d 100644 --- a/src/devices/machine/mediagx_host.cpp +++ b/src/devices/machine/mediagx_host.cpp @@ -12,7 +12,7 @@ MediaGX host implementation (northbridge) #define LOG_MAP (1U << 1) // log full remaps #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/pci-usb.cpp b/src/devices/machine/pci-usb.cpp index b12bdce681d..02d3942b296 100644 --- a/src/devices/machine/pci-usb.cpp +++ b/src/devices/machine/pci-usb.cpp @@ -4,7 +4,7 @@ #include "pci-usb.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis5513_ide.cpp b/src/devices/machine/sis5513_ide.cpp index d91a5856ae4..42d118fed63 100644 --- a/src/devices/machine/sis5513_ide.cpp +++ b/src/devices/machine/sis5513_ide.cpp @@ -18,7 +18,7 @@ #define LOG_MAP (1U << 3) // log full remaps #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_MAP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis7001_usb.cpp b/src/devices/machine/sis7001_usb.cpp index 257c0e99593..54e0550e8ca 100644 --- a/src/devices/machine/sis7001_usb.cpp +++ b/src/devices/machine/sis7001_usb.cpp @@ -14,7 +14,7 @@ TODO: #include "sis7001_usb.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis7018_audio.cpp b/src/devices/machine/sis7018_audio.cpp index ea8450c4793..27859245150 100644 --- a/src/devices/machine/sis7018_audio.cpp +++ b/src/devices/machine/sis7018_audio.cpp @@ -19,7 +19,7 @@ TODO: #define LOG_PMC (1U << 4) // log PMC access #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_MAP | LOG_PMC) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis900_eth.cpp b/src/devices/machine/sis900_eth.cpp index d960c4b0293..111664ba0cc 100644 --- a/src/devices/machine/sis900_eth.cpp +++ b/src/devices/machine/sis900_eth.cpp @@ -19,7 +19,7 @@ #define LOG_PMC (1U << 4) // log PMC access #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_MAP | LOG_PMC) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis950_acpi.cpp b/src/devices/machine/sis950_acpi.cpp index 915d832f6da..f05cc1bfc54 100644 --- a/src/devices/machine/sis950_acpi.cpp +++ b/src/devices/machine/sis950_acpi.cpp @@ -17,7 +17,7 @@ TODO: #include "sis950_acpi.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis950_lpc.cpp b/src/devices/machine/sis950_lpc.cpp index 00e5656355a..b097ac90c89 100644 --- a/src/devices/machine/sis950_lpc.cpp +++ b/src/devices/machine/sis950_lpc.cpp @@ -43,7 +43,7 @@ TODO: #define LOG_IRQ (1U << 5) // log IRQ remaps #define VERBOSE (LOG_GENERAL | LOG_IO | LOG_TODO | LOG_IRQ) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/sis950_smbus.cpp b/src/devices/machine/sis950_smbus.cpp index 67a9f8331ac..3be48036121 100644 --- a/src/devices/machine/sis950_smbus.cpp +++ b/src/devices/machine/sis950_smbus.cpp @@ -14,7 +14,7 @@ TODO: #define LOG_CMD (1U << 1) // log commands #define VERBOSE (LOG_GENERAL | LOG_CMD) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index 3556c7c159b..e9aaba6a48a 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -29,7 +29,7 @@ TODO: #define LOG_PMTMR (1U << 4) // verbose timer reads and processor levels #define VERBOSE (LOG_GENERAL | LOG_ACPI | LOG_ACPIEX | LOG_GPIO) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/vt82c586b_ide.cpp b/src/devices/machine/vt82c586b_ide.cpp index 3532209c29a..63ee50c328f 100644 --- a/src/devices/machine/vt82c586b_ide.cpp +++ b/src/devices/machine/vt82c586b_ide.cpp @@ -12,7 +12,7 @@ SFF8038i v1.0 compliant #include "vt82c586b_ide.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/vt82c586b_isa.cpp b/src/devices/machine/vt82c586b_isa.cpp index 59e6aca6f57..8872294b5ef 100644 --- a/src/devices/machine/vt82c586b_isa.cpp +++ b/src/devices/machine/vt82c586b_isa.cpp @@ -13,7 +13,7 @@ VT82C586B PCIC ISA section #include "speaker.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/vt82c586b_usb.cpp b/src/devices/machine/vt82c586b_usb.cpp index a84e977076d..6b0ff6c4f1e 100644 --- a/src/devices/machine/vt82c586b_usb.cpp +++ b/src/devices/machine/vt82c586b_usb.cpp @@ -15,7 +15,7 @@ TODO: #include "vt82c586b_usb.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/devices/machine/vt82c598mvp.cpp b/src/devices/machine/vt82c598mvp.cpp index 2c078d2466a..e41ea1157db 100644 --- a/src/devices/machine/vt82c598mvp.cpp +++ b/src/devices/machine/vt82c598mvp.cpp @@ -7,7 +7,7 @@ #define LOG_MAP (1U << 1) #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #define LOGMAP(...) LOGMASKED(LOG_MAP, __VA_ARGS__) diff --git a/src/devices/machine/zfmicro_usb.cpp b/src/devices/machine/zfmicro_usb.cpp index 37f2c78bcf2..8585192e41f 100644 --- a/src/devices/machine/zfmicro_usb.cpp +++ b/src/devices/machine/zfmicro_usb.cpp @@ -14,7 +14,7 @@ TODO: #include "zfmicro_usb.h" #define VERBOSE (LOG_GENERAL) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/mame/atari/jaguar_v.cpp b/src/mame/atari/jaguar_v.cpp index 6406e7e80a6..6015e89e0be 100644 --- a/src/mame/atari/jaguar_v.cpp +++ b/src/mame/atari/jaguar_v.cpp @@ -157,7 +157,7 @@ #define LOG_OBJECT_BRANCH (1U << 7) // log branch taken (verbose) #define VERBOSE (LOG_UNHANDLED_BLITS) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/mame/misc/3do_amy.cpp b/src/mame/misc/3do_amy.cpp index 87eedb05643..8c24b779e53 100644 --- a/src/mame/misc/3do_amy.cpp +++ b/src/mame/misc/3do_amy.cpp @@ -21,7 +21,7 @@ TODO: #include "3do_amy.h" #define VERBOSE (0) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/mame/misc/3do_clio.cpp b/src/mame/misc/3do_clio.cpp index 9d9c7d6e477..83c1bcec8c1 100644 --- a/src/mame/misc/3do_clio.cpp +++ b/src/mame/misc/3do_clio.cpp @@ -11,7 +11,7 @@ #define LOG_DSPP (1U << 5) #define VERBOSE (LOG_GENERAL | LOG_XBUS | LOG_DSPP) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/mame/misc/3do_madam.cpp b/src/mame/misc/3do_madam.cpp index 525b8f1f15d..1dda3042534 100644 --- a/src/mame/misc/3do_madam.cpp +++ b/src/mame/misc/3do_madam.cpp @@ -15,7 +15,7 @@ #define VERBOSE (LOG_GENERAL | LOG_MMU | LOG_MULT) //#define VERBOSE (LOG_VDLP) //#define VERBOSE (LOG_CEL | LOG_REGIS) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" diff --git a/src/mame/misc/xtom3d.cpp b/src/mame/misc/xtom3d.cpp index faac4d7d79e..15f599d5b44 100644 --- a/src/mame/misc/xtom3d.cpp +++ b/src/mame/misc/xtom3d.cpp @@ -153,7 +153,7 @@ HS3PIN Unpopulated header near A40MX04 #define LOG_FLASH (1U << 1) #define VERBOSE (LOG_GENERAL | LOG_FLASH) -//#define LOG_OUTPUT_FUNC osd_printf_warning +//#define LOG_OUTPUT_FUNC osd_printf_info #include "logmacro.h" From 0ef59749fbb36b67c74b0e0da6bb9767d4ec52de Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 18 Mar 2026 00:48:27 +0100 Subject: [PATCH 308/351] bus/pc98_cbus: add PC-FXGA placeholder --- scripts/src/bus.lua | 2 + src/devices/bus/pc98_cbus/options.cpp | 4 ++ src/devices/bus/pc98_cbus/pc9801_118.h | 9 ----- src/devices/bus/pc98_cbus/pcfxga.cpp | 56 ++++++++++++++++++++++++++ src/devices/bus/pc98_cbus/pcfxga.h | 32 +++++++++++++++ 5 files changed, 94 insertions(+), 9 deletions(-) create mode 100644 src/devices/bus/pc98_cbus/pcfxga.cpp create mode 100644 src/devices/bus/pc98_cbus/pcfxga.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index cfa46f34c0a..c1e0d0c1c1f 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -4342,6 +4342,8 @@ if BUSES["PC98_CBUS"] then MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_86.h", MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_118.cpp", MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_118.h", + MAME_DIR .. "src/devices/bus/pc98_cbus/pcfxga.cpp", + MAME_DIR .. "src/devices/bus/pc98_cbus/pcfxga.h", MAME_DIR .. "src/devices/bus/pc98_cbus/sb16_ct2720.cpp", MAME_DIR .. "src/devices/bus/pc98_cbus/sb16_ct2720.h", MAME_DIR .. "src/devices/bus/pc98_cbus/slot.cpp", diff --git a/src/devices/bus/pc98_cbus/options.cpp b/src/devices/bus/pc98_cbus/options.cpp index 08e017f312d..7acc953bf1f 100644 --- a/src/devices/bus/pc98_cbus/options.cpp +++ b/src/devices/bus/pc98_cbus/options.cpp @@ -16,6 +16,7 @@ #include "pc9801_55.h" #include "pc9801_86.h" #include "pc9801_118.h" +#include "pcfxga.h" #include "mif201.h" #include "mpu_pc98.h" #include "sb16_ct2720.h" @@ -74,6 +75,9 @@ void pc98_cbus_devices(device_slot_interface &device) // Ethernet device.option_add("lgy98", LGY98); + // Systems on card + device.option_add("pcfxga", PCFXGA_CBUS); + // internal sound options device.option_add_internal("sound_pc9821ce", SOUND_PC9821CE); device.option_add_internal("sound_pc9821cx3", SOUND_PC9821CX3); diff --git a/src/devices/bus/pc98_cbus/pc9801_118.h b/src/devices/bus/pc98_cbus/pc9801_118.h index af13a3e3932..c5ae8b7b107 100644 --- a/src/devices/bus/pc98_cbus/pc9801_118.h +++ b/src/devices/bus/pc98_cbus/pc9801_118.h @@ -53,16 +53,7 @@ private: u8 m_ext_reg; }; - // device type definition DECLARE_DEVICE_TYPE(PC9801_118, pc9801_118_device) - - -//************************************************************************** -// GLOBAL VARIABLES -//************************************************************************** - - - #endif // MAME_BUS_PC98_CBUS_PC9801_118_H diff --git a/src/devices/bus/pc98_cbus/pcfxga.cpp b/src/devices/bus/pc98_cbus/pcfxga.cpp new file mode 100644 index 00000000000..9fea9585e9b --- /dev/null +++ b/src/devices/bus/pc98_cbus/pcfxga.cpp @@ -0,0 +1,56 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +/************************************************************************************************** + +PC-FXGA C-Bus + +Notes: +- Pressing ESC on host system will quit the loader (and reset FXGA at same time); +- $9b4 bit 2 is checked twice after "floppy error", probably as an handshake mechanism; + +TODO: +- placeholder; +- Brainstorm a way to communicate with a pcfxga driver; +- Understand how to format floppies in a way that fxga.exe is happy with (from guest system + in backup menu?); + +**************************************************************************************************/ + +#include "emu.h" +#include "pcfxga.h" + +DEFINE_DEVICE_TYPE(PCFXGA_CBUS, pcfxga_cbus_device, "pcfxga_cbus", "NEC PC-FXGA C-Bus i/f") + +pcfxga_cbus_device::pcfxga_cbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PCFXGA_CBUS, tag, owner, clock) + , device_pc98_cbus_slot_interface(mconfig, *this) +{ +} + +void pcfxga_cbus_device::device_start() +{ + save_item(NAME(m_comms)); +} + +void pcfxga_cbus_device::device_reset() +{ + std::fill(std::begin(m_comms), std::end(m_comms), 0U); +} + +void pcfxga_cbus_device::remap(int space_id, offs_t start, offs_t end) +{ + if (space_id == AS_IO) + { + m_bus->install_device(0x0000, 0xffff, *this, &pcfxga_cbus_device::io_map); + } +} + + +void pcfxga_cbus_device::io_map(address_map &map) +{ + map(0x09b0, 0x09bf).lrw8( + NAME([this](offs_t offset) { return m_comms[offset]; }), + NAME([this](offs_t offset, u8 data) { m_comms[offset] = data; }) + ); +} + diff --git a/src/devices/bus/pc98_cbus/pcfxga.h b/src/devices/bus/pc98_cbus/pcfxga.h new file mode 100644 index 00000000000..c067c381dd9 --- /dev/null +++ b/src/devices/bus/pc98_cbus/pcfxga.h @@ -0,0 +1,32 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_CBUS_PCFXGA_H +#define MAME_BUS_PC98_CBUS_PCFXGA_H + +#pragma once + +#include "slot.h" + +class pcfxga_cbus_device : public device_t + , public device_pc98_cbus_slot_interface +{ +public: + pcfxga_cbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + static constexpr flags_type emulation_flags() { return flags::NOT_WORKING; } + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void remap(int space_id, offs_t start, offs_t end) override; +private: + virtual void io_map(address_map &map) ATTR_COLD; + + u8 m_comms[0x10]; +}; + +DECLARE_DEVICE_TYPE(PCFXGA_CBUS, pcfxga_cbus_device) + +#endif // MAME_BUS_PC98_CBUS_PCFXGA_H From ef591ec588507fc01cc24a3db764fccc7242f571 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 18 Mar 2026 13:17:24 +0100 Subject: [PATCH 309/351] bus/pc98_cbus/pcfxga.cpp: hookup software list * PC-98 host system needs to be able to read disks thru MSCDEX and (eventually) send data over PIO. This makes sure that SW list games will attach to available cdrom dev if the card is there. New software list items marked not working ------------------------------------------ pcfx: Amateur Teikyou CD-ROM (ISA DOS/V-you), N-nyuu: PC-FXGA Game ga Asoberu Tsukureru Hon, Same Game FX [redump.org] --- hash/pcfx.xml | 83 ++++++++++++++++++++++++---- src/devices/bus/pc98_cbus/pcfxga.cpp | 7 +++ src/devices/bus/pc98_cbus/pcfxga.h | 1 + 3 files changed, 80 insertions(+), 11 deletions(-) diff --git a/hash/pcfx.xml b/hash/pcfx.xml index f0086d64ed4..9d0c027bbea 100644 --- a/hash/pcfx.xml +++ b/hash/pcfx.xml @@ -11,18 +11,9 @@ TODO: --> - + - - Amateur Teikyou CD-ROM - 1994 - NEC - - - - - - + Battle Heat @@ -145,4 +136,74 @@ TODO: + + + + Amateur Teikyou CD-ROM (PC-98 C-Bus) + 1995 + NEC / Hudson Soft + + + + + + + + + + Amateur Teikyou CD-ROM (ISA DOS/V-you) + 1996 + NEC / Hudson Soft + + + + + + + + + + + N-nyuu: PC-FXGA Game ga Asoberu Tsukureru Hon + 1996 + NEC Home Electronics + + + + + + + + + + + + + + + + + + + Same Game FX + 1995 + Hudson Soft + + + + + + + + + + diff --git a/src/devices/bus/pc98_cbus/pcfxga.cpp b/src/devices/bus/pc98_cbus/pcfxga.cpp index 9fea9585e9b..748788b8edc 100644 --- a/src/devices/bus/pc98_cbus/pcfxga.cpp +++ b/src/devices/bus/pc98_cbus/pcfxga.cpp @@ -19,6 +19,8 @@ TODO: #include "emu.h" #include "pcfxga.h" +#include "softlist_dev.h" + DEFINE_DEVICE_TYPE(PCFXGA_CBUS, pcfxga_cbus_device, "pcfxga_cbus", "NEC PC-FXGA C-Bus i/f") pcfxga_cbus_device::pcfxga_cbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) @@ -27,6 +29,11 @@ pcfxga_cbus_device::pcfxga_cbus_device(const machine_config &mconfig, const char { } +void pcfxga_cbus_device::device_add_mconfig(machine_config &config) +{ + SOFTWARE_LIST(config, "cdfx_list").set_original("pcfx"); +} + void pcfxga_cbus_device::device_start() { save_item(NAME(m_comms)); diff --git a/src/devices/bus/pc98_cbus/pcfxga.h b/src/devices/bus/pc98_cbus/pcfxga.h index c067c381dd9..dce13f83deb 100644 --- a/src/devices/bus/pc98_cbus/pcfxga.h +++ b/src/devices/bus/pc98_cbus/pcfxga.h @@ -19,6 +19,7 @@ public: protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; virtual void remap(int space_id, offs_t start, offs_t end) override; private: From 3f402fa55bbce021ad63f5c0ab2bf9d4a946b39a Mon Sep 17 00:00:00 2001 From: cam900 Date: Wed, 18 Mar 2026 22:38:12 +0900 Subject: [PATCH 310/351] sound/ics2115.cpp: Suppress side effects for debugger reads, and cleaned up code. (#15116) Use logmacro.h for configurable logging, reduced duplication, made some local variables const. --- src/devices/sound/ics2115.cpp | 196 +++++++++++++++------------------- src/devices/sound/ics2115.h | 15 +-- 2 files changed, 95 insertions(+), 116 deletions(-) diff --git a/src/devices/sound/ics2115.cpp b/src/devices/sound/ics2115.cpp index bf52eb2a7a3..c6041187255 100644 --- a/src/devices/sound/ics2115.cpp +++ b/src/devices/sound/ics2115.cpp @@ -22,10 +22,19 @@ #include #include - -//#define ICS2115_DEBUG //#define ICS2115_ISOLATE 6 +#define LOG_UNK (1 << 1) +#define LOG_VOICE (1 << 2) +#define LOG_TIMER (1 << 3) + +#define VERBOSE (0) + +#include "logmacro.h" + +#define LOGUNK(...) LOGMASKED(LOG_UNK, __VA_ARGS__) +#define LOGVOICE(...) LOGMASKED(LOG_VOICE, __VA_ARGS__) +#define LOGTIMER(...) LOGMASKED(LOG_TIMER, __VA_ARGS__) // device type definition DEFINE_DEVICE_TYPE(ICS2115, ics2115_device, "ics2115", "ICS2115 WaveFront Synthesizer") @@ -59,8 +68,8 @@ void ics2115_device::device_start() space(0).cache(m_cache); - m_timer[0].timer = timer_alloc(FUNC(ics2115_device::timer_cb_0), this); - m_timer[1].timer = timer_alloc(FUNC(ics2115_device::timer_cb_1), this); + m_timer[0].timer = timer_alloc(FUNC(ics2115_device::timer_cb), this); + m_timer[1].timer = timer_alloc(FUNC(ics2115_device::timer_cb), this); m_stream = stream_alloc(0, 2, clock() / (32 * 32)); //Exact formula as per patent 5809466 @@ -88,20 +97,17 @@ void ics2115_device::device_start() for (int i = 0; i < 256; i++) { - u8 exponent = (~i >> 4) & 0x07; - u8 mantissa = ~i & 0x0f; - s16 value = lut[exponent] + (mantissa << (exponent + 3)); + const u8 exponent = (~i >> 4) & 0x07; + const u8 mantissa = ~i & 0x0f; + const s16 value = lut[exponent] + (mantissa << (exponent + 3)); m_ulaw[i] = (i & 0x80) ? -value : value; m_panlaw[i] = PAN_LEVEL - (31 - count_leading_zeros_32(i)); //m_panlaw[i] = PAN_LEVEL - log2(i) } m_panlaw[0] = 0xfff; //all bits to one when no pan - save_item(NAME(m_timer[0].period)); - save_item(NAME(m_timer[0].scale)); - save_item(NAME(m_timer[0].preset)); - save_item(NAME(m_timer[1].period)); - save_item(NAME(m_timer[1].scale)); - save_item(NAME(m_timer[1].preset)); + save_item(STRUCT_MEMBER(m_timer, period)); + save_item(STRUCT_MEMBER(m_timer, scale)); + save_item(STRUCT_MEMBER(m_timer, preset)); save_item(NAME(m_reg_select)); save_item(NAME(m_osc_select)); save_item(NAME(m_irq_enabled)); @@ -153,12 +159,13 @@ void ics2115_device::device_reset() m_vmode = 0; m_irq_on = false; memset(m_voice, 0, sizeof(m_voice)); - for (auto & elem : m_timer) + for (int i = 0; i < 2; i++) { - elem.timer->adjust(attotime::never); - elem.period = 0; - elem.scale = 0; - elem.preset = 0; + ics2115_timer &timer = m_timer[i]; + timer.timer->adjust(attotime::never, i); + timer.period = 0; + timer.scale = 0; + timer.preset = 0; } for (auto & elem : m_voice) { @@ -209,7 +216,7 @@ device_memory_interface::space_config_vector ics2115_device::memory_space_config VOL(L) = vol.acc VINC = vol.inc DIR = invert - BC = boundary cross (start or end ) + BC = boundary cross (start or end) BLEN = bi directional loop enable LEN loop enable UVOL LEN BLEN DIR BC Next VOL(L) @@ -218,10 +225,10 @@ device_memory_interface::space_config_vector ics2115_device::memory_space_config 1 x x 1 0 VOL(L) - VINC // invert no bc 1 0 x x 1 VOL(L) // no env len no vol envelope ---------------------------------------------------------------------------- - 1 1 0 0 1 start - ( end - (VOL(L) + VINC) ) - 1 1 0 1 1 end + ( (VOL(L) - VINC) - start) - 1 1 1 0 1 end + (end - (VOL(L) + VINC) ) // here - 1 1 1 1 1 start - ( (VOL(L) - VINC)- start) + 1 1 0 0 1 start - (end - (VOL(L) + VINC)) + 1 1 0 1 1 end + ((VOL(L) - VINC) - start) + 1 1 1 0 1 end + (end - (VOL(L) + VINC)) // here + 1 1 1 1 1 start - ((VOL(L) - VINC)- start) */ int ics2115_device::ics2115_voice::update_volume_envelope() { @@ -264,16 +271,16 @@ int ics2115_device::ics2115_voice::update_volume_envelope() if (!vol_ctrl.bitflags.loop_bidir) { if (!vol_ctrl.bitflags.invert) - vol.acc = vol.start - (vol.end - (vol.acc + vol.incr)); // uvol = 1* len = 1* blen = 0 dir = 0 bc = 1* start - ( end - (VOL(L) + VINC) ) + vol.acc = vol.start - (vol.end - (vol.acc + vol.incr)); // uvol = 1* len = 1* blen = 0 dir = 0 bc = 1* start - (end - (VOL(L) + VINC)) else - vol.acc = vol.end + ((vol.acc - vol.incr) - vol.start); // 1 1 blen = 0 dir = 1 1 end + ( (VOL(L) - VINC) - start) + vol.acc = vol.end + ((vol.acc - vol.incr) - vol.start); // 1 1 blen = 0 dir = 1 1 end + ((VOL(L) - VINC) - start) } else { if (!vol_ctrl.bitflags.invert) - vol.acc = vol.end + (vol.end - (vol.acc + vol.incr)); // 1 1 blen = 1 dir = 0 1 end + (end - (VOL(L) + VINC) ) + vol.acc = vol.end + (vol.end - (vol.acc + vol.incr)); // 1 1 blen = 1 dir = 0 1 end + (end - (VOL(L) + VINC)) else - vol.acc = vol.start - ((vol.acc - vol.incr) - vol.start); // 1 1 beln = 1 dir = 1 1 start - ( (VOL(L) - VINC)- start) + vol.acc = vol.start - ((vol.acc - vol.incr) - vol.start); // 1 1 beln = 1 dir = 1 1 start - ((VOL(L) - VINC)- start) } } } @@ -326,7 +333,7 @@ int ics2115_device::ics2115_voice::update_oscillator() if (osc_conf.bitflags.loop_bidir) osc_conf.bitflags.invert = !osc_conf.bitflags.invert; //else - // logerror("click!\n"); + // LOGVOICE("click!\n"); if (osc_conf.bitflags.invert) { @@ -360,7 +367,7 @@ s32 ics2115_device::get_sample(ics2115_voice& voice) if (voice.state.on && voice.osc_conf.bitflags.loop && !voice.osc_conf.bitflags.loop_bidir && (voice.osc.left < (voice.osc.fc << 2))) { - //logerror("C?[%x:%x]", voice.osc.left, voice.osc.acc); + //LOGVOICE("C?[%x:%x]", voice.osc.left, voice.osc.acc); nextaddr = voice.osc.start >> 12; } else @@ -374,26 +381,26 @@ s32 ics2115_device::get_sample(ics2115_voice& voice) } else if (voice.osc_conf.bitflags.eightbit) { - sample1 = ((s8)read_sample(voice, curaddr)) << 8; - sample2 = ((s8)read_sample(voice, curaddr + 1)) << 8; + sample1 = (s8(read_sample(voice, curaddr))) << 8; + sample2 = (s8(read_sample(voice, curaddr + 1))) << 8; } else { - sample1 = read_sample(voice, curaddr + 0) | (((s8)read_sample(voice, curaddr + 1)) << 8); - sample2 = read_sample(voice, nextaddr+ 0) | (((s8)read_sample(voice, nextaddr+ 1)) << 8); - //sample2 = read_sample(voice, curaddr + 2) | (((s8)read_sample(voice, curaddr + 3)) << 8); + sample1 = read_sample(voice, curaddr + 0) | ((s8(read_sample(voice, curaddr + 1))) << 8); + sample2 = read_sample(voice, nextaddr+ 0) | ((s8(read_sample(voice, nextaddr+ 1))) << 8); + //sample2 = read_sample(voice, curaddr + 2) | ((s8(read_sample(voice, curaddr + 3))) << 8); } //linear interpolation as in US patent 6,246,774 B1, column 2 row 59 //LEN=1, BLEN=0, DIR=0, start+end interpolation const s32 diff = sample2 - sample1; - const u16 fract = (voice.osc.acc >> 3) & 0x1ff; + const s32 fract = (voice.osc.acc & 0xff8) >> 3; //no need for interpolation since it's around 1 note a cycle? //if (!fract) // return sample1; - const s32 sample = (((s32)sample1 << 9) + diff * fract) >> 9; + const s32 sample = ((s32(sample1) << 9) + (diff * fract)) >> 9; //sample = sample1; return sample; } @@ -424,8 +431,8 @@ void ics2115_device::ics2115_voice::update_ramp() int ics2115_device::fill_output(ics2115_voice& voice, sound_stream &stream) { bool irq_invalid = false; - const u16 fine = 1 << (3*(voice.vol.incr >> 6)); - voice.vol.add = (voice.vol.incr & 0x3f)<< (10 - fine); + const u16 fine = 1 << (3 * (voice.vol.incr >> 6)); + voice.vol.add = (voice.vol.incr & 0x3f) << (10 - fine); for (int i = 0; i < stream.samples(); i++) { @@ -442,7 +449,7 @@ int ics2115_device::fill_output(ics2115_voice& voice, sound_stream &stream) //final output, even if they are not running. This means that whatever data value //that the voice is pointing at is contributing to the summation. //(austere note: this will of course fix some of the glitches due to multiple transition) - s32 sample = get_sample(voice); + const s32 sample = get_sample(voice); //15-bit volume + (5-bit worth of 32 channel sum) + 16-bit samples = 4-bit extra //if (voice.playing()) @@ -476,24 +483,21 @@ void ics2115_device::sound_stream_update(sound_stream &stream) continue; #endif /* -#ifdef ICS2115_DEBUG u32 curaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.acc >> 12); s32 sample = get_sample(voice); - logerror("[%06x=%04x]", curaddr, (s16)sample); -#endif + LOGVOICE("[%06x=%04x]", curaddr, (s16)sample); */ if (fill_output(voice, stream)) irq_invalid = true; -#ifdef ICS2115_DEBUG if (voice.playing()) { - logerror("%d", osc); + LOGVOICE("%d", osc); if (voice.osc_conf.bitflags.invert) - logerror("+"); + LOGVOICE("+"); else if ((voice.osc.fc >> 1) > 0x1ff) - logerror("*"); - logerror(" "); + LOGVOICE("*"); + LOGVOICE(" "); /*int min = 0x7fffffff, max = 0x80000000; double average = 0; @@ -505,14 +509,11 @@ void ics2115_device::sound_stream_update(sound_stream &stream) } average /= samples; average /= 1 << 16; - logerror("", min >> 16, max >> 16, average);*/ + LOGVOICE("", min >> 16, max >> 16, average);*/ } -#endif } -#ifdef ICS2115_DEBUG - logerror("|"); -#endif + LOGVOICE("|"); if (irq_invalid) recalc_irq(); @@ -578,7 +579,7 @@ u16 ics2115_device::reg_read() case 0x09: // [osc] Volume accumulator //ret = v->Vol.Acc; - ret = voice.vol.acc >> (10); + ret = voice.vol.acc >> 10; break; case 0x0a: // [osc] Wavesample address @@ -589,7 +590,6 @@ u16 ics2115_device::reg_read() ret = (voice.osc.acc >> 0) & 0xfff8; break; - case 0x0c: // [osc] Pan ret = voice.vol.pan << 8; break; @@ -631,15 +631,18 @@ u16 ics2115_device::reg_read() ret = i | 0xe0; if (v.osc_conf.bitflags.irq_pending) { - v.osc_conf.bitflags.irq_pending = 0; + if (!machine().side_effects_disabled()) + v.osc_conf.bitflags.irq_pending = 0; ret &= ~0x80; } if (v.vol_ctrl.bitflags.irq_pending) { - v.vol_ctrl.bitflags.irq_pending = 0; + if (!machine().side_effects_disabled()) + v.vol_ctrl.bitflags.irq_pending = 0; ret &= ~0x40; } - recalc_irq(); + if (!machine().side_effects_disabled()) + recalc_irq(); break; } } @@ -659,8 +662,11 @@ u16 ics2115_device::reg_read() case 0x41: // Timer 1 clear irq //TODO: examine this suspect code ret = m_timer[m_reg_select & 0x1].preset; - m_irq_pending &= ~(1 << (m_reg_select & 0x1)); - recalc_irq(); + if (!machine().side_effects_disabled()) + { + m_irq_pending &= ~(1 << (m_reg_select & 0x1)); + recalc_irq(); + } break; case 0x43: // Timer status @@ -694,9 +700,8 @@ u16 ics2115_device::reg_read() // case 0x57: // Emulation Mode default: -#ifdef ICS2115_DEBUG - logerror("ICS2115: Unhandled read %x\n", m_reg_select); -#endif + if (!machine().side_effects_disabled()) + LOGUNK("%s: ICS2115: Unhandled read %x\n", machine().describe_context(), m_reg_select); ret = 0; break; } @@ -785,12 +790,10 @@ void ics2115_device::reg_write(u16 data, u16 mem_mask) break; case 0x0a: // [osc] Wavesample address high -#ifdef ICS2115_DEBUG #ifdef ICS2115_ISOLATE if (m_osc_select == ICS2115_ISOLATE) #endif - logerror("<%d:oa:H=%x>", m_osc_select, data); -#endif + LOGVOICE("%s: <%d:oa:H=%x>", machine().describe_context(), m_osc_select, data); if (ACCESSING_BITS_8_15) voice.osc.acc = (voice.osc.acc & 0x00ffffff) | ((data & 0xff00) << 16); if (ACCESSING_BITS_0_7) @@ -798,12 +801,10 @@ void ics2115_device::reg_write(u16 data, u16 mem_mask) break; case 0x0b: // [osc] Wavesample address low -#ifdef ICS2115_DEBUG #ifdef ICS2115_ISOLATE if (m_osc_select == ICS2115_ISOLATE) #endif - logerror("<%d:oa:L=%x>", m_osc_select, data); -#endif + LOGVOICE("%s: <%d:oa:L=%x>", machine().describe_context(), m_osc_select, data); if (ACCESSING_BITS_8_15) voice.osc.acc = (voice.osc.acc & 0xffff00ff) | (data & 0xff00); if (ACCESSING_BITS_0_7) @@ -847,13 +848,11 @@ void ics2115_device::reg_write(u16 data, u16 mem_mask) //guessing here else if (data == 0xf) { -#ifdef ICS2115_DEBUG #ifdef ICS2115_ISOLATE if (m_osc_select == ICS2115_ISOLATE) #endif if (!voice.osc_conf.bitflags.stop || !voice.vol_ctrl.bitflags.stop) - logerror("[%02d STOP]\n", m_osc_select); -#endif + LOGVOICE("%s: [%02d STOP]\n", machine().describe_context(), m_osc_select); if (!m_vmode) { //try to key it off as well! @@ -861,10 +860,8 @@ void ics2115_device::reg_write(u16 data, u16 mem_mask) voice.vol_ctrl.bitflags.stop = true; } } -#ifdef ICS2115_DEBUG else - logerror("ICS2115: Unhandled* data write %d onto 0x10.\n", data); -#endif + LOGUNK("%s: ICS2115: Unhandled* data write %d onto 0x10.\n", machine().describe_context(), data); } break; @@ -926,9 +923,7 @@ void ics2115_device::reg_write(u16 data, u16 mem_mask) // case 0x57: // Emulation Mode default: -#ifdef ICS2115_DEBUG - logerror("ICS2115: Unhandled write %x onto %x [voice = %d]\n", data, m_reg_select, m_osc_select); -#endif + LOGUNK("%s: ICS2115: Unhandled write %x onto %x [voice = %d]\n", machine().describe_context(), data, m_reg_select, m_osc_select); break; } } @@ -963,15 +958,13 @@ u8 ics2115_device::read(offs_t offset) ret = m_reg_select; break; case 2: - ret = (u8)(reg_read()); + ret = u8(reg_read()); break; case 3: ret = reg_read() >> 8; break; default: -#ifdef ICS2115_DEBUG - logerror("ICS2115: Unhandled memory read at %x\n", offset); -#endif + LOGUNK("%s: ICS2115: Unhandled memory read at %x\n", machine().describe_context(), offset); break; } return ret; @@ -991,9 +984,7 @@ void ics2115_device::write(offs_t offset, u8 data) reg_write(data << 8, 0xff00); break; default: -#ifdef ICS2115_DEBUG - logerror("ICS2115: Unhandled memory write %02x to %x\n", data, offset); -#endif + LOGUNK("%s: ICS2115: Unhandled memory write %02x to %x\n", machine().describe_context(), data, offset); break; } } @@ -1018,9 +1009,7 @@ u16 ics2115_device::word_r(offs_t offset, u16 mem_mask) break; */ default: -#ifdef ICS2115_DEBUG - logerror("ICS2115: Unhandled memory read at %x\n", offset); -#endif + LOGUNK("%s: ICS2115: Unhandled memory read at %x\n", machine().describe_context(), offset); break; } return ret; @@ -1044,9 +1033,7 @@ void ics2115_device::word_w(offs_t offset, u16 data, u16 mem_mask) break; */ default: -#ifdef ICS2115_DEBUG - logerror("ICS2115: Unhandled memory write %02x to %x\n", data, offset); -#endif + LOGUNK("%s: ICS2115: Unhandled memory write %02x to %x\n", machine().describe_context(), data, offset); break; } } @@ -1061,8 +1048,8 @@ void ics2115_device::keyon() //no ramp up... m_voice[m_osc_select].state.ramp = 0x40; -#ifdef ICS2115_DEBUG - logerror("[%02d vs:%04x ve:%04x va:%04x vi:%02x vc:%02x os:%06x oe:%06x oa:%06x of:%04x SA:%02x oc:%02x][%04x]\n", m_osc_select, + LOGVOICE("%s: [%02d vs:%04x ve:%04x va:%04x vi:%02x vc:%02x os:%06x oe:%06x oa:%06x of:%04x SA:%02x oc:%02x][%04x]\n", machine().describe_context(), + m_osc_select, m_voice[m_osc_select].vol.start >> 10, m_voice[m_osc_select].vol.end >> 10, m_voice[m_osc_select].vol.acc >> 10, @@ -1076,9 +1063,8 @@ void ics2115_device::keyon() m_voice[m_osc_select].osc_conf.value, m_volume[(m_voice[m_osc_select].vol.acc >> 14)] ); -#endif //testing memory corruption issue with mame stream - //logerror("m_volume[0x%x]=0x%x\n", mastervolume, m_volume[mastervolume]); + //LOGVOICE("m_volume[0x%x]=0x%x\n", mastervolume, m_volume[mastervolume]); } void ics2115_device::recalc_irq() @@ -1094,34 +1080,26 @@ void ics2115_device::recalc_irq() m_irq_cb(irq ? ASSERT_LINE : CLEAR_LINE); } -TIMER_CALLBACK_MEMBER( ics2115_device::timer_cb_0 ) +TIMER_CALLBACK_MEMBER(ics2115_device::timer_cb) { - if (!(m_irq_pending & (1 << 0))) + const int timer_bit = param & 1; + if (!BIT(m_irq_pending, timer_bit)) { - m_irq_pending |= 1 << 0; - recalc_irq(); - } -} - -TIMER_CALLBACK_MEMBER( ics2115_device::timer_cb_1 ) -{ - if (!(m_irq_pending & (1 << 1))) - { - m_irq_pending |= 1 << 1; + m_irq_pending |= 1 << timer_bit; recalc_irq(); } } void ics2115_device::recalc_timer(int timer) { - u64 period = ((m_timer[timer].scale & 0x1f) + 1) * (m_timer[timer].preset + 1); + u64 period = ((m_timer[timer].scale & 0x1f) + 1) * (m_timer[timer].preset + 1); period = period << (4 + (m_timer[timer].scale >> 5)); if (m_timer[timer].period != period) { attotime tp = attotime::from_ticks(period, clock()); - logerror("Timer %d period %dns (%dHz)\n", timer, int(tp.as_double()*1e9), int(1/tp.as_double())); + LOGTIMER("Timer %d period %dns (%dHz)\n", timer, int(tp.as_double() * 1e9), int(1 / tp.as_double())); m_timer[timer].period = period; - m_timer[timer].timer->adjust(tp, 0, tp); + m_timer[timer].timer->adjust(tp, timer, tp); } } diff --git a/src/devices/sound/ics2115.h b/src/devices/sound/ics2115.h index 8e99180ca53..361c72a4d97 100644 --- a/src/devices/sound/ics2115.h +++ b/src/devices/sound/ics2115.h @@ -29,8 +29,7 @@ public: // 16-bit read / write handlers (when /IOCS16 is low) u16 word_r(offs_t offset, u16 mem_mask); void word_w(offs_t offset, u16 data, u16 mem_mask); - TIMER_CALLBACK_MEMBER(timer_cb_0); - TIMER_CALLBACK_MEMBER(timer_cb_1); + TIMER_CALLBACK_MEMBER(timer_cb); protected: // device-level overrides @@ -111,6 +110,12 @@ private: void update_ramp(); }; + struct ics2115_timer { + u8 scale, preset; + emu_timer *timer; + u64 period; /* in nsec */ + }; + // internal register helper functions u16 reg_read(); void reg_write(u16 data, u16 mem_mask); @@ -136,11 +141,7 @@ private: static const int volume_bits = 15; ics2115_voice m_voice[32]; - struct { - u8 scale, preset; - emu_timer *timer; - u64 period; /* in nsec */ - } m_timer[2]; + ics2115_timer m_timer[2]; u8 m_active_osc; u8 m_osc_select; From 3ceb5aaeaad1f4207baa70e2461ce64fdb90b236 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 18 Mar 2026 10:40:16 -0400 Subject: [PATCH 311/351] cpu/m6502: Modify SBC decimal adjust algorithm for 65C02, which differs from NMOS 6502 in edge cases. Allows 6502test.ssd (from mungre/beeb6502test repository) to pass test BCD-FC on bbcm. --- src/devices/cpu/m6502/m6502.h | 2 +- src/devices/cpu/m6502/w65c02.cpp | 19 +++++++++++++++++++ src/devices/cpu/m6502/w65c02.h | 2 ++ 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h index 55b95f6ed08..b38066a4327 100644 --- a/src/devices/cpu/m6502/m6502.h +++ b/src/devices/cpu/m6502/m6502.h @@ -164,7 +164,7 @@ protected: void do_adc_d(uint8_t val); void do_adc_nd(uint8_t val); - void do_sbc_d(uint8_t val); + virtual void do_sbc_d(uint8_t val); void do_sbc_nd(uint8_t val); void do_arr_d(); void do_arr_nd(); diff --git a/src/devices/cpu/m6502/w65c02.cpp b/src/devices/cpu/m6502/w65c02.cpp index c482b31d449..145faf79f60 100644 --- a/src/devices/cpu/m6502/w65c02.cpp +++ b/src/devices/cpu/m6502/w65c02.cpp @@ -25,6 +25,25 @@ w65c02_device::w65c02_device(const machine_config &mconfig, device_type type, co { } +void w65c02_device::do_sbc_d(uint8_t val) +{ + // SBC allows interdigit carry from decimal adjustment on 65C02 + uint8_t c = m_P & F_C ? 0 : 1; + m_P &= ~(F_N|F_V|F_Z|F_C); + uint16_t diff = m_A - val - c; + uint8_t al = (m_A & 15) - (val & 15) - c; + uint8_t ah = (m_A >> 4) - (val >> 4) - (int8_t(al) < 0); + if(!uint8_t(diff)) + m_P |= F_Z; + else if(diff & 0x80) + m_P |= F_N; + if((m_A^val) & (m_A^diff) & 0x80) + m_P |= F_V; + if(!(diff & 0xff00)) + m_P |= F_C; + m_A = ((ah << 4) | (al & 15)) - ((int8_t(ah) < 0 ? 0x60 : 0) | (int8_t(al) < 0 ? 6 : 0)); +} + std::unique_ptr w65c02_device::create_disassembler() { return std::make_unique(); diff --git a/src/devices/cpu/m6502/w65c02.h b/src/devices/cpu/m6502/w65c02.h index 552565d4203..d920dfa8d95 100644 --- a/src/devices/cpu/m6502/w65c02.h +++ b/src/devices/cpu/m6502/w65c02.h @@ -23,6 +23,8 @@ public: virtual void do_exec_full() override; virtual void do_exec_partial() override; + virtual void do_sbc_d(uint8_t val) override; + protected: w65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); From 8657b6b0a804e839358d91b4e2cf7d043808229d Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 18 Mar 2026 18:55:11 +0100 Subject: [PATCH 312/351] labyrunr: fix titlescreen offset --- src/mame/konami/bladestl.cpp | 6 +- src/mame/konami/chqflag.cpp | 4 +- src/mame/konami/fastlane.cpp | 4 +- src/mame/konami/labyrunr.cpp | 123 +++++++++++++++-------------------- src/mame/konami/mainevt.cpp | 6 +- 5 files changed, 62 insertions(+), 81 deletions(-) diff --git a/src/mame/konami/bladestl.cpp b/src/mame/konami/bladestl.cpp index 657d7674b49..5a04b745370 100644 --- a/src/mame/konami/bladestl.cpp +++ b/src/mame/konami/bladestl.cpp @@ -421,6 +421,9 @@ void bladestl_state::bladestl(machine_config &config) WATCHDOG_TIMER(config, "watchdog"); + k051733_device &k051733(K051733(config, "k051733", 24_MHz_XTAL / 2)); + k051733.set_nmi_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(24_MHz_XTAL / 4, 384, 0, 256, 264, 16, 240); @@ -440,9 +443,6 @@ void bladestl_state::bladestl(machine_config &config) m_k007420->set_bank_limit(0x3ff); m_k007420->set_sprite_callback(FUNC(bladestl_state::sprite_callback)); - k051733_device &k051733(K051733(config, "k051733", 24_MHz_XTAL / 2)); - k051733.set_nmi_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); - // sound hardware SPEAKER(config, "mono").front_center(); diff --git a/src/mame/konami/chqflag.cpp b/src/mame/konami/chqflag.cpp index f1dcea71c3f..c8b13a09055 100644 --- a/src/mame/konami/chqflag.cpp +++ b/src/mame/konami/chqflag.cpp @@ -421,6 +421,8 @@ void chqflag_state::chqflag(machine_config &config) WATCHDOG_TIMER(config, "watchdog"); + K051733(config, "k051733", 24_MHz_XTAL / 2); + ADC0804(config, "adc", RES_K(10), CAP_P(150)).vin_callback().set(FUNC(chqflag_state::analog_read_r)); // video hardware @@ -455,8 +457,6 @@ void chqflag_state::chqflag(machine_config &config) m_k051316[1]->set_wrap(1); m_k051316[1]->set_zoom_callback(FUNC(chqflag_state::zoom_callback_2)); - K051733(config, "k051733", 24_MHz_XTAL / 2); - // sound hardware SPEAKER(config, "speaker", 2).front(); diff --git a/src/mame/konami/fastlane.cpp b/src/mame/konami/fastlane.cpp index c5fa846ca58..66a32f19a7d 100644 --- a/src/mame/konami/fastlane.cpp +++ b/src/mame/konami/fastlane.cpp @@ -349,6 +349,8 @@ void fastlane_state::fastlane(machine_config &config) WATCHDOG_TIMER(config, "watchdog"); + K051733(config, "k051733", 24_MHz_XTAL / 2); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_raw(24_MHz_XTAL / 4, 384, 0, 280, 264, 16, 240); @@ -363,8 +365,6 @@ void fastlane_state::fastlane(machine_config &config) m_k007121->set_nmi_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); m_k007121->set_flipscreen_cb().set(FUNC(fastlane_state::flipscreen_w)); - K051733(config, "k051733", 24_MHz_XTAL / 2); - // sound hardware SPEAKER(config, "mono").front_center(); diff --git a/src/mame/konami/labyrunr.cpp b/src/mame/konami/labyrunr.cpp index f64243f7dd4..59c99313a6d 100644 --- a/src/mame/konami/labyrunr.cpp +++ b/src/mame/konami/labyrunr.cpp @@ -95,7 +95,6 @@ void labyrunr_state::palette(palette_device &palette) const for (int i = 0; i < 0x100; i++) { uint8_t const ctabentry = !color_prom[i] ? 0 : ((pal << 4) | (color_prom[i] & 0x0f)); - palette.set_pen_indirect((pal << 8) | i, ctabentry); } } @@ -188,13 +187,12 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm screen.priority().fill(0, cliprect); const rectangle &visarea = screen.visible_area(); + rectangle clip[3]; + clip[0] = clip[1] = clip[2] = visarea; - if (~m_k007121->ctrl_r(3) & 0x20) + if (m_k007121->ctrl_r(3) & 0x10) { // compute clipping - rectangle clip[2]; - clip[0] = clip[1] = visarea; - if (m_k007121->flipscreen()) { clip[0].max_x -= 40; @@ -212,6 +210,7 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm // set scroll registers m_tilemap[0]->set_scrollx(0, ctrl_0 - 40); m_tilemap[1]->set_scrollx(0, 0); + m_k007121->set_sprite_offsets(40, 16); for (int i = 0; i < 32; i++) { @@ -230,39 +229,31 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm } else { - rectangle clip[3]; - int use_clip2[2] = { 0, 0 }; - - // custom cliprects needed for the weird effect used in the ending sequence to hide and show the needed part of text - clip[0] = clip[1] = clip[2] = visarea; - + // custom clipping needed for the weird effect used in the ending sequence to hide and show the needed part of text if (m_k007121->ctrl_r(1) & 1) { - if (ctrl_0 < 40) - { - use_clip2[0] = 1; - clip[1].min_x = 40 - ctrl_0; - } - - clip[0].min_x = clip[0].max_x - ctrl_0 + 8; - clip[1].max_x = clip[1].max_x - ctrl_0 + 8; + clip[0].min_x = clip[0].max_x - ctrl_0 - 8; + clip[1].max_x = clip[1].max_x - ctrl_0 - 8; } else { - if (ctrl_0 < 40) - { - use_clip2[1] = 1; - clip[0].min_x = 40 - ctrl_0; - } - - clip[0].max_x = clip[0].max_x - ctrl_0 + 8; - clip[1].min_x = clip[1].max_x - ctrl_0 + 8; + clip[0].max_x = clip[0].max_x - ctrl_0 - 8; + clip[1].min_x = clip[1].max_x - ctrl_0 - 8; } - if (use_clip2[0] || use_clip2[1]) - clip[2].max_x = 40 - ctrl_0 - 8; + // width of 240 or 256 + if (m_k007121->ctrl_r(3) & 0x40) + { + clip[2].min_x += 24; + clip[2].max_x -= 16; + } + else + { + clip[2].min_x += 16; + clip[2].max_x -= 8; + } - for (int i = 0; i < 3; i++) + for (int i = 2; i >= 0; i--) { // flip the cliprects if (m_k007121->flipscreen()) @@ -273,26 +264,19 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm clip[i].min_x = min_x; } - clip[i] &= cliprect; + clip[i] &= (i == 2) ? cliprect : clip[2]; } - m_tilemap[0]->set_scrollx(0, ctrl_0 - 40); - m_tilemap[1]->set_scrollx(0, ctrl_0 - 40); + // set scroll registers + m_tilemap[0]->set_scrollx(0, ctrl_0 - 16); + m_tilemap[1]->set_scrollx(0, ctrl_0 - 16); + m_k007121->set_sprite_offsets(16, -8); // draw the graphics m_tilemap[0]->draw(screen, bitmap, clip[0], TILEMAP_DRAW_CATEGORY(0), 0); - if (use_clip2[0]) - m_tilemap[0]->draw(screen, bitmap, clip[2], TILEMAP_DRAW_CATEGORY(0), 0); - - draw_sprites(bitmap, cliprect, screen.priority()); - + draw_sprites(bitmap, clip[2], screen.priority()); m_tilemap[0]->draw(screen, bitmap, clip[0], TILEMAP_DRAW_CATEGORY(1), 0); - if (use_clip2[0]) - m_tilemap[0]->draw(screen, bitmap, clip[2], TILEMAP_DRAW_CATEGORY(1), 0); - m_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); - if (use_clip2[1]) - m_tilemap[1]->draw(screen, bitmap, clip[2], 0, 0); } return 0; @@ -304,7 +288,7 @@ void labyrunr_state::bankswitch_w(uint8_t data) if (data & 0xe0) logerror("bankswitch %02x", data); // bits 0-2 = bank number - m_mainbank->set_entry(data & 0x07); // shall we check if data & 7 > #banks? + m_mainbank->set_entry(data & 0x07); // bits 3 and 4 are coin counters machine().bookkeeping().coin_counter_w(0, data & 0x08); @@ -338,7 +322,7 @@ void labyrunr_state::prg_map(address_map &map) map(0x3000, 0x37ff).ram().w(FUNC(labyrunr_state::vram_w<0>)).share(m_videoram[0]); map(0x3800, 0x3fff).ram().w(FUNC(labyrunr_state::vram_w<1>)).share(m_videoram[1]); map(0x4000, 0x7fff).bankr(m_mainbank); - map(0x8000, 0xffff).rom(); + map(0x8000, 0xffff).rom().region("maincpu", 0x18000); } @@ -421,9 +405,7 @@ GFXDECODE_END void labyrunr_state::machine_start() { - uint8_t *ROM = memregion("maincpu")->base(); - - m_mainbank->configure_entries(0, 6, &ROM[0x10000], 0x4000); + m_mainbank->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000); } void labyrunr_state::labyrunr(machine_config &config) @@ -434,24 +416,23 @@ void labyrunr_state::labyrunr(machine_config &config) WATCHDOG_TIMER(config, "watchdog"); + K051733(config, "k051733", 24_MHz_XTAL / 2); + // video hardware - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_raw(24_MHz_XTAL / 4, 384, 0, 280, 264, 16, 240); - screen.set_screen_update(FUNC(labyrunr_state::screen_update)); - screen.set_palette(m_palette); + SCREEN(config, m_screen, SCREEN_TYPE_RASTER); + m_screen->set_raw(24_MHz_XTAL / 4, 384, 0, 280, 264, 16, 240); + m_screen->set_screen_update(FUNC(labyrunr_state::screen_update)); + m_screen->set_palette(m_palette); PALETTE(config, m_palette, FUNC(labyrunr_state::palette)); m_palette->set_format(palette_device::xBGR_555, 8*16*16, 128); K007121(config, m_k007121, 0, gfx_labyrunr, m_palette, "screen"); - m_k007121->set_sprite_offsets(40, 16); m_k007121->set_irq_cb().set_inputline(m_maincpu, HD6309_IRQ_LINE); m_k007121->set_nmi_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); m_k007121->set_flipscreen_cb().set(FUNC(labyrunr_state::flipscreen_w)); m_k007121->set_sprite_callback(FUNC(labyrunr_state::sprite_callback)); - K051733(config, "k051733", 24_MHz_XTAL / 2); - // sound hardware SPEAKER(config, "mono").front_center(); @@ -479,10 +460,10 @@ void labyrunr_state::labyrunr(machine_config &config) ***************************************************************************/ ROM_START( tricktrp ) - ROM_REGION( 0x28000, "maincpu", 0 ) // code + banked ROMs - ROM_LOAD( "771e04", 0x10000, 0x08000, CRC(ba2c7e20) SHA1(713dcc0e65bf9431f2c0df9db1210346a9476a52) ) - ROM_CONTINUE( 0x08000, 0x08000 ) - ROM_LOAD( "771e03", 0x18000, 0x10000, CRC(d0d68036) SHA1(8589ee07e229259341a4cc22bc64de8f06536472) ) + ROM_REGION( 0x20000, "maincpu", 0 ) // code + banked ROMs + ROM_LOAD( "771e04", 0x00000, 0x08000, CRC(ba2c7e20) SHA1(713dcc0e65bf9431f2c0df9db1210346a9476a52) ) + ROM_CONTINUE( 0x18000, 0x08000 ) + ROM_LOAD( "771e03", 0x08000, 0x10000, CRC(d0d68036) SHA1(8589ee07e229259341a4cc22bc64de8f06536472) ) ROM_REGION( 0x40000, "gfx", 0 ) ROM_LOAD16_BYTE( "771e01a", 0x00001, 0x10000, CRC(103ffa0d) SHA1(1949c49ca3b243e4cfb5fb19ecd3a1e1492cfddd) ) // tiles + sprites @@ -496,10 +477,10 @@ ROM_START( tricktrp ) ROM_END ROM_START( labyrunr ) - ROM_REGION( 0x28000, "maincpu", 0 ) // code + banked ROMs - ROM_LOAD( "771j04.10f", 0x10000, 0x08000, CRC(354a41d0) SHA1(302e8f5c469ad3f615aeca8005ebde6b6051aaae) ) - ROM_CONTINUE( 0x08000, 0x08000 ) - ROM_LOAD( "771j03.08f", 0x18000, 0x10000, CRC(12b49044) SHA1(e9b22fb093cfb746a9767e94ef5deef98bed5b7a) ) + ROM_REGION( 0x20000, "maincpu", 0 ) // code + banked ROMs + ROM_LOAD( "771j04.10f", 0x00000, 0x08000, CRC(354a41d0) SHA1(302e8f5c469ad3f615aeca8005ebde6b6051aaae) ) + ROM_CONTINUE( 0x18000, 0x08000 ) + ROM_LOAD( "771j03.08f", 0x08000, 0x10000, CRC(12b49044) SHA1(e9b22fb093cfb746a9767e94ef5deef98bed5b7a) ) ROM_REGION( 0x40000, "gfx", 0 ) ROM_LOAD16_WORD_SWAP( "771d01.14a", 0x00000, 0x40000, CRC(15c8f5f9) SHA1(e4235e1315d0331f3ce5047834a68764ed43aa4b) ) // tiles + sprites @@ -510,10 +491,10 @@ ROM_START( labyrunr ) ROM_END ROM_START( labyrunrk ) - ROM_REGION( 0x28000, "maincpu", 0 ) // code + banked ROMs - ROM_LOAD( "771k04.10f", 0x10000, 0x08000, CRC(9816ab35) SHA1(6efb0332f4a62f20889f212682ee7225e4a182a9) ) - ROM_CONTINUE( 0x08000, 0x08000 ) - ROM_LOAD( "771k03.8f", 0x18000, 0x10000, CRC(48d732ae) SHA1(8bc7917397f32cf5f995b3763ae921725e27de05) ) + ROM_REGION( 0x20000, "maincpu", 0 ) // code + banked ROMs + ROM_LOAD( "771k04.10f", 0x00000, 0x08000, CRC(9816ab35) SHA1(6efb0332f4a62f20889f212682ee7225e4a182a9) ) + ROM_CONTINUE( 0x18000, 0x08000 ) + ROM_LOAD( "771k03.8f", 0x08000, 0x10000, CRC(48d732ae) SHA1(8bc7917397f32cf5f995b3763ae921725e27de05) ) ROM_REGION( 0x40000, "gfx", 0 ) ROM_LOAD16_BYTE( "771d01a.13a", 0x00001, 0x10000, CRC(0cd1ed1a) SHA1(eac6c106de28acc54535ae1fb99f778c1ed4013e) ) // tiles + sprites @@ -527,10 +508,10 @@ ROM_START( labyrunrk ) ROM_END ROM_START( labyrunrf ) - ROM_REGION( 0x28000, "maincpu", 0 ) // code + banked ROMs - ROM_LOAD( "771k04.10f", 0x10000, 0x08000, CRC(86a36806) SHA1(d1c916a24117290e890b5e14d6e1932d65943bc6) ) - ROM_CONTINUE( 0x08000, 0x08000 ) - ROM_LOAD( "771k03.8f", 0x18000, 0x10000, CRC(6c073295) SHA1(67be17ad0c3bfd5ff8cd6ed31b217e438733ed1c) ) + ROM_REGION( 0x20000, "maincpu", 0 ) // code + banked ROMs + ROM_LOAD( "771k04.10f", 0x00000, 0x08000, CRC(86a36806) SHA1(d1c916a24117290e890b5e14d6e1932d65943bc6) ) + ROM_CONTINUE( 0x18000, 0x08000 ) + ROM_LOAD( "771k03.8f", 0x08000, 0x10000, CRC(6c073295) SHA1(67be17ad0c3bfd5ff8cd6ed31b217e438733ed1c) ) ROM_REGION( 0x40000, "gfx", 0 ) ROM_LOAD16_BYTE( "771d01a.13a", 0x00001, 0x10000, CRC(0cd1ed1a) SHA1(eac6c106de28acc54535ae1fb99f778c1ed4013e) ) // tiles + sprites diff --git a/src/mame/konami/mainevt.cpp b/src/mame/konami/mainevt.cpp index d15a196c605..0b472cbdeca 100644 --- a/src/mame/konami/mainevt.cpp +++ b/src/mame/konami/mainevt.cpp @@ -646,6 +646,9 @@ void devstors_state::devstors(machine_config &config) WATCHDOG_TIMER(config, "watchdog"); + k051733_device &k051733(K051733(config, "k051733", 24_MHz_XTAL / 2)); + k051733.set_nmi_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(24_MHz_XTAL / 4, 384, 0+24, 320-8, 264, 16, 240); // measured 59.17 @@ -666,9 +669,6 @@ void devstors_state::devstors(machine_config &config) m_k051960->set_screen("screen"); m_k051960->set_sprite_callback(FUNC(devstors_state::sprite_callback)); - k051733_device &k051733(K051733(config, "k051733", 24_MHz_XTAL / 2)); - k051733.set_nmi_cb().set_inputline(m_maincpu, INPUT_LINE_NMI); - // sound hardware SPEAKER(config, "mono").front_center(); From 7a552c92e7175dffee473f84fbb8e4a79263adf0 Mon Sep 17 00:00:00 2001 From: hap Date: Wed, 18 Mar 2026 19:14:19 +0100 Subject: [PATCH 313/351] m6502: small refactor to do_sbc_d to make it easier to see the difference between nmos/cmos --- src/devices/cpu/m6502/m6502.cpp | 4 ++-- src/devices/cpu/m6502/w65c02.cpp | 6 +++++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index 8e97fe008c3..c8480540120 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -258,8 +258,6 @@ void m6502_device::do_sbc_d(uint8_t val) m_P &= ~(F_N|F_V|F_Z|F_C); uint16_t diff = m_A - val - c; uint8_t al = (m_A & 15) - (val & 15) - c; - if(int8_t(al) < 0) - al -= 6; uint8_t ah = (m_A >> 4) - (val >> 4) - (int8_t(al) < 0); if(!uint8_t(diff)) m_P |= F_Z; @@ -269,6 +267,8 @@ void m6502_device::do_sbc_d(uint8_t val) m_P |= F_V; if(!(diff & 0xff00)) m_P |= F_C; + if(int8_t(al) < 0) + al -= 6; if(int8_t(ah) < 0) ah -= 6; m_A = (ah << 4) | (al & 15); diff --git a/src/devices/cpu/m6502/w65c02.cpp b/src/devices/cpu/m6502/w65c02.cpp index 145faf79f60..6875a20b72d 100644 --- a/src/devices/cpu/m6502/w65c02.cpp +++ b/src/devices/cpu/m6502/w65c02.cpp @@ -41,7 +41,11 @@ void w65c02_device::do_sbc_d(uint8_t val) m_P |= F_V; if(!(diff & 0xff00)) m_P |= F_C; - m_A = ((ah << 4) | (al & 15)) - ((int8_t(ah) < 0 ? 0x60 : 0) | (int8_t(al) < 0 ? 6 : 0)); + m_A = (ah << 4) | (al & 15); + if(int8_t(al) < 0) + m_A -= 6; + if(int8_t(ah) < 0) + m_A -= 0x60; } std::unique_ptr w65c02_device::create_disassembler() From 81111e08e63bcfd6f2e95b5fd0bf031ff7e2d321 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 18 Mar 2026 17:51:21 +0100 Subject: [PATCH 314/351] intel/i420ex.cpp: inherit a486ap4 romset from pc/at.cpp --- src/mame/intel/i420ex.cpp | 71 ++++++++++++++++++++++++++++++++------- src/mame/mame.lst | 2 +- src/mame/pc/at.cpp | 19 ----------- 3 files changed, 59 insertions(+), 33 deletions(-) diff --git a/src/mame/intel/i420ex.cpp b/src/mame/intel/i420ex.cpp index b68a30b432f..a0b5be0dfb8 100644 --- a/src/mame/intel/i420ex.cpp +++ b/src/mame/intel/i420ex.cpp @@ -62,9 +62,12 @@ public: , m_speaker(*this, "speaker") { } - void i420ex(machine_config &config) ATTR_COLD; + void entrada(machine_config &config) ATTR_COLD; + void a486ap4(machine_config &config) ATTR_COLD; protected: + void i420ex(machine_config &config) ATTR_COLD; + required_device m_maincpu; required_device m_rtc; required_device m_speaker; @@ -144,15 +147,6 @@ void i420ex_state::i420ex(machine_config &config) psc.ide1_irq_w().set("ib:intc2", FUNC(pic8259_device::ir6_w)); psc.ide2_irq_w().set("ib:intc2", FUNC(pic8259_device::ir7_w)); - GD5434_PCI(config, "pci:06.0", 0); - - // TODO: on proprietary riser - PCI_SLOT(config, "pci:1", pci_cards, 7, 0, 1, 2, 3, nullptr); - PCI_SLOT(config, "pci:2", pci_cards, 8, 1, 2, 3, 0, nullptr); - - ISA16_SLOT(config, "board1", 0, "ib:isabus", pc_isa_onboard, "superio", true).set_option_machine_config("superio", intel_superio_config); - ISA16_SLOT(config, "isa1", 0, "ib:isabus", pc_isa16_cards, nullptr, false); - // TODO: really DS12887 DS12885(config, m_rtc); m_rtc->irq().set("ib:intc2", FUNC(pic8259_device::ir0_w)); @@ -179,6 +173,23 @@ void i420ex_state::i420ex(machine_config &config) aux_kbdc.out_clock_cb().set(keybc, FUNC(at_kbc_device_base::kbd_clk_w)); aux_kbdc.out_data_cb().set(keybc, FUNC(at_kbc_device_base::kbd_data_w)); + SPEAKER(config, "mono").front_center(); + SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50); +} + +void i420ex_state::entrada(machine_config &config) +{ + i420ex(config); + + GD5434_PCI(config, "pci:06.0", 0); + + // TODO: on proprietary PISA riser + PCI_SLOT(config, "pci:1", pci_cards, 7, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:2", pci_cards, 8, 1, 2, 3, 0, nullptr); + + ISA16_SLOT(config, "board1", 0, "ib:isabus", pc_isa_onboard, "superio", true).set_option_machine_config("superio", intel_superio_config); + ISA16_SLOT(config, "isa1", 0, "ib:isabus", pc_isa16_cards, nullptr, false); + rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, "logitech_mouse")); serport0.rxd_handler().set("board1:superio", FUNC(i82091aa_device::rxd1_w)); serport0.dcd_handler().set("board1:superio", FUNC(i82091aa_device::ndcd1_w)); @@ -192,9 +203,23 @@ void i420ex_state::i420ex(machine_config &config) serport1.dsr_handler().set("board1:superio", FUNC(i82091aa_device::ndsr2_w)); serport1.ri_handler().set("board1:superio", FUNC(i82091aa_device::nri2_w)); serport1.cts_handler().set("board1:superio", FUNC(i82091aa_device::ncts2_w)); +} - SPEAKER(config, "mono").front_center(); - SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50); +void i420ex_state::a486ap4(machine_config &config) +{ + i420ex(config); + + PCI_SLOT(config, "pci:1", pci_cards, 7, 0, 1, 2, 3, nullptr); + PCI_SLOT(config, "pci:2", pci_cards, 8, 1, 2, 3, 0, nullptr); + PCI_SLOT(config, "pci:3", pci_cards, 9, 2, 3, 0, 1, nullptr); + PCI_SLOT(config, "pci:4", pci_cards, 10, 3, 0, 1, 2, nullptr); + + ISA16_SLOT(config, "isa1", 0, "ib:isabus", pc_isa16_cards, "fdc_smc", false); + ISA16_SLOT(config, "isa2", 0, "ib:isabus", pc_isa16_cards, "comat", false); + ISA16_SLOT(config, "isa3", 0, "ib:isabus", pc_isa16_cards, "lpt", false); + ISA16_SLOT(config, "isa4", 0, "ib:isabus", pc_isa16_cards, nullptr, false); + // TODO: VLB really + ISA16_SLOT(config, "isa5", 0, "ib:isabus", pc_isa16_cards, "svga_et4k", false); } @@ -225,8 +250,28 @@ ROM_START( entrada ) // AZ02 known to exist ROM_END +// ASUS PVI-486AP4 (Socket 3, 4xSIMM72, Cache: 128/256/512KB, 4 PCI, 4 ISA, 1 VLB) +// Intel Aries PCIset S82425EX + S82426EX; DS12887 RTC; VIA VT82C42N - BIOS: 32pin +ROM_START( a486ap4 ) + ROM_REGION32_LE(0x20000, "pci:05.0", 0) + // 0: BIOS-String: 07/20/94-ARIES-P/I-AP4G-00 / #401A0-0104 + ROM_SYSTEM_BIOS(0, "486ap4v104", "ASUS PVI-486AP4 V1.04") + ROMX_LOAD( "awai0104.bin", 0x00000, 0x20000, CRC(52ea7123) SHA1(3d242ea6d1bcdddd41e32e40708133c72f2bd060), ROM_BIOS(0)) + // 1: BIOS-String: 10/21/94-ARIES-P/I-AP4G-00 / #401A0-0203 + ROM_SYSTEM_BIOS(1, "486ap4v203", "ASUS PVI-486AP4 V2.03") + ROMX_LOAD( "awai0203.bin", 0x00000, 0x20000, CRC(68d3a3f4) SHA1(6eee0c9aed2ede028eb170f8dd7921563293b99f), ROM_BIOS(1)) + // 2: BIOS-String: 11/08/94-ARIES-P/I-AP4G-00 / #401A0-0204 + ROM_SYSTEM_BIOS(2, "486ap4v204", "ASUS PVI-486AP4 V2.04") + ROMX_LOAD( "awai0204.bin", 0x00000, 0x20000, CRC(b62b35bb) SHA1(b6fa3d7b1c88da37ce74aca329a31d2587652d97), ROM_BIOS(2)) + // 3: BIOS-String: 11/25/97/ARIES-P/I-AP4G-00 / #401A0-0205-2 + ROM_SYSTEM_BIOS(3, "486ap4v205-2", "ASUS PVI-486AP4 V2.05-2") + ROMX_LOAD( "0205.002", 0x00000, 0x20000, CRC(632e8ee6) SHA1(3cf57b2654b0365e41ef5f5c82f68eeadf0e7a21), ROM_BIOS(3)) +ROM_END + + } // anonymous namespace -COMP( 1994, entrada, 0, 0, i420ex, 0, i420ex_state, empty_init, "Intel", "Classic/PCI LP \"Entrada\" (Intel I420EX Aries chipset)", MACHINE_NOT_WORKING ) +COMP( 1994, entrada, 0, 0, entrada, 0, i420ex_state, empty_init, "Intel", "Classic/PCI LP \"Entrada\" (Intel I420EX Aries chipset)", MACHINE_NOT_WORKING ) +COMP( 1994, a486ap4, 0, 0, a486ap4, 0, i420ex_state, empty_init, "Asus", "PVI-486AP4 (Intel I420EX Aries chipset)", MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 67968a8c784..115df5fcbe7 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -22227,6 +22227,7 @@ basic31 basic52 @source:intel/i420ex.cpp +a486ap4 entrada @source:intel/imds2.cpp @@ -37157,7 +37158,6 @@ asst128 486igb21 486wb6a3 a433cc -a486ap4 a486isa a486sio a486sp3g diff --git a/src/mame/pc/at.cpp b/src/mame/pc/at.cpp index 52f20226e94..f19e22a4d0b 100644 --- a/src/mame/pc/at.cpp +++ b/src/mame/pc/at.cpp @@ -4448,24 +4448,6 @@ ROM_START( a433cc ) ROM_LOAD( "ami_j-bond_a433c-c.bin", 0x10000, 0x10000, CRC(66031e98) SHA1(d2d1a26837d3ca943a6ef09ec3e6fbfaaa62cc46)) ROM_END -// ASUS PVI-486AP4 (Socket 3, 4xSIMM72, Cache: 128/256/512KB, 4 PCI, 4 ISA, 1 VLB) -// Intel Aries PCIset S82425EX + S82426EX; DS12887 RTC; VIA VT82C42N - BIOS: 32pin -ROM_START( a486ap4 ) - ROM_REGION32_LE(0x20000, "bios", 0) - // 0: BIOS-String: 07/20/94-ARIES-P/I-AP4G-00 / #401A0-0104 - ROM_SYSTEM_BIOS(0, "486ap4v104", "ASUS PVI-486AP4 V1.04") - ROMX_LOAD( "awai0104.bin", 0x00000, 0x20000, CRC(52ea7123) SHA1(3d242ea6d1bcdddd41e32e40708133c72f2bd060), ROM_BIOS(0)) - // 1: BIOS-String: 10/21/94-ARIES-P/I-AP4G-00 / #401A0-0203 - ROM_SYSTEM_BIOS(1, "486ap4v203", "ASUS PVI-486AP4 V2.03") - ROMX_LOAD( "awai0203.bin", 0x00000, 0x20000, CRC(68d3a3f4) SHA1(6eee0c9aed2ede028eb170f8dd7921563293b99f), ROM_BIOS(1)) - // 2: BIOS-String: 11/08/94-ARIES-P/I-AP4G-00 / #401A0-0204 - ROM_SYSTEM_BIOS(2, "486ap4v204", "ASUS PVI-486AP4 V2.04") - ROMX_LOAD( "awai0204.bin", 0x00000, 0x20000, CRC(b62b35bb) SHA1(b6fa3d7b1c88da37ce74aca329a31d2587652d97), ROM_BIOS(2)) - // 3: BIOS-String: 11/25/97/ARIES-P/I-AP4G-00 / #401A0-0205-2 - ROM_SYSTEM_BIOS(3, "486ap4v205-2", "ASUS PVI-486AP4 V2.05-2") - ROMX_LOAD( "0205.002", 0x00000, 0x20000, CRC(632e8ee6) SHA1(3cf57b2654b0365e41ef5f5c82f68eeadf0e7a21), ROM_BIOS(3)) -ROM_END - // ASUS PCI/I-486SP3G V3.02 (Socket 3, RAM: 4xSIMM72, Cache: 128/256/512K, 1 IDE, 1 SCSI, 3 PCI, 4 ISA) - BIOS: 32pin // Intel Saturn II chipset: 82424ZX CDC + 82423TX DPU + 82378ZB SIO; NCR 53C820; National PC87332; DS12887 RTC; VIA VT82C42N ROM_START( a486sp3g ) @@ -5798,7 +5780,6 @@ COMP( 199?, 486wb6a3, ibm5170, 0, at486, 0, at_state, init_at COMP( 199?, 4dmshl3g, ibm5170, 0, at486, 0, at_state, init_at, "EFA", "4DMS HL3G-L4-VI", MACHINE_NOT_WORKING ) COMP( 199?, 4dmuhl3s, ibm5170, 0, at486, 0, at_state, init_at, "EFA", "4DMU HL3S", MACHINE_NOT_WORKING ) COMP( 1992, a433cc, ibm5170, 0, at486, 0, at_state, init_at, "J-Bond", "A433C-C/A450C-C", MACHINE_NOT_WORKING ) -COMP( 1994, a486ap4, ibm5170, 0, at486, 0, at_state, init_at, "Asus", "PVI-486AP4", MACHINE_NOT_WORKING ) COMP( 199?, a486isa, ibm5170, 0, at486, 0, at_state, init_at, "Asus", "ISA-486", MACHINE_NOT_WORKING ) COMP( 199?, a486sio, ibm5170, 0, at486, 0, at_state, init_at, "Asus", "ISA-486SIO rev. 1.2", MACHINE_NOT_WORKING ) COMP( 1994, a486sp3g, ibm5170, 0, at486, 0, at_state, init_at, "Asus", "PCI/I-486SP3G", MACHINE_NOT_WORKING ) From 47c6d2de498dd5f897101309189783307ee628d8 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 18 Mar 2026 18:33:25 +0100 Subject: [PATCH 315/351] bus/pci/clgd543x_alpine.cpp: fix ROM defs --- src/devices/bus/pci/clgd543x_alpine.cpp | 27 ++++++++++++++++--------- src/devices/machine/i82426ex_ib.cpp | 22 ++++++++++---------- 2 files changed, 28 insertions(+), 21 deletions(-) diff --git a/src/devices/bus/pci/clgd543x_alpine.cpp b/src/devices/bus/pci/clgd543x_alpine.cpp index 4376bfb873a..0b591ce6dd5 100644 --- a/src/devices/bus/pci/clgd543x_alpine.cpp +++ b/src/devices/bus/pci/clgd543x_alpine.cpp @@ -39,17 +39,24 @@ ROM_START( gd5434 ) // VESA feature connector - Jumpers: IRQ9 enable/disable, Green control ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_DEFAULT_BIOS("122") - ROM_SYSTEM_BIOS(0, "110b", "PCI VGA BIOS Version 1.10B") - ROMX_LOAD("cl543x_pci_rev4.bin", 0x00000, 0x8000, CRC(553171a3) SHA1(b72edc318710c46c9cb280e9b1b3c9f8a34844f2), ROM_BIOS(0) ) + // doesn't boot, bad? + ROM_SYSTEM_BIOS(0, "100e", "PCI VGA BIOS Version 1.00e") + ROMX_LOAD("cirrus5434.bin", 0x00000, 0x8000, CRC(bc271648) SHA1(08afd4468c4c1a1630a200de1007b1671f109b3c), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS(1, "122", "PCI VGA BIOS Version 1.22 (01/18/95)") + ROMX_LOAD("gd5434pci.bin", 0x00000, 0x8000, CRC(fa76dabf) SHA1(0310ef02df941e7d35e1d832400e2e4dd07d6309), ROM_BIOS(1) ) + // 1ST AND 2ND HALF IDENTICAL crc="1d8d54e3" sha1="3e3b67dee603f8afaf17d3ccdf9439e742983bab" + ROM_SYSTEM_BIOS(2, "110b", "PCI VGA BIOS Version 1.10B (06/28/94)") + ROMX_LOAD("gd5434.bin", 0x00000, 0x8000, CRC(403020a4) SHA1(1ee70f6cc3c7b9a9afb402a1bc939f9f2e0cc739), ROM_BIOS(2) ) ROM_IGNORE( 0x8000 ) - ROM_SYSTEM_BIOS(1, "100e", "PCI VGA BIOS Version 1.00e") - ROMX_LOAD("cirrus5434.bin", 0x00000, 0x8000, CRC(bc271648) SHA1(08afd4468c4c1a1630a200de1007b1671f109b3c), ROM_BIOS(1) ) - ROM_SYSTEM_BIOS(2, "122", "PCI VGA BIOS Version 1.22") - ROMX_LOAD("gd5434pci.bin", 0x00000, 0x8000, CRC(fa76dabf) SHA1(0310ef02df941e7d35e1d832400e2e4dd07d6309), ROM_BIOS(2) ) - ROM_SYSTEM_BIOS(3, "110b_jap", "PCI VGA BIOS Version 1.10B Japan chip") - ROMX_LOAD("japan.bin", 0x00000, 0x8000, CRC(46fe9efa) SHA1(58712b00faf102509c4129c0babeb98df2b6e042), ROM_BIOS(3) ) -// ROM_SYSTEM_BIOS(4, "124", "CL-GD543x PCI VGA BIOS Version 1.24") -// ROMX_LOAD("1.24.bin", 0x00000,0x8000, CRC(174fa427) SHA1(3e490f3cc3af33dbfac6ff3ddac5e90bdc895646), ROM_BIOS(4) ) + // same as above with 1xxxxxxxxxxxxxxx = 0xFF instead +// ROM_SYSTEM_BIOS(3, "110b_jap", "PCI VGA BIOS Version 1.10B Japan chip (06/28/94)") +// ROMX_LOAD("japan.bin", 0x00000, 0x8000, CRC(46fe9efa) SHA1(58712b00faf102509c4129c0babeb98df2b6e042), ROM_BIOS(3) ) +// ROM_IGNORE( 0x8000 ) +// ROM_SYSTEM_BIOS(4, "110b_alt", "PCI VGA BIOS Version 1.10B") +// ROMX_LOAD("cl543x_pci_rev4.bin", 0x00000, 0x8000, CRC(553171a3) SHA1(b72edc318710c46c9cb280e9b1b3c9f8a34844f2), ROM_BIOS(4) ) +// ROM_IGNORE( 0x8000 ) +// ROM_SYSTEM_BIOS(5, "124", "CL-GD543x PCI VGA BIOS Version 1.24") +// ROMX_LOAD("1.24.bin", 0x00000,0x8000, CRC(174fa427) SHA1(3e490f3cc3af33dbfac6ff3ddac5e90bdc895646), ROM_BIOS(5) ) ROM_END const tiny_rom_entry *cirrus_gd5434_pci_device::device_rom_region() const diff --git a/src/devices/machine/i82426ex_ib.cpp b/src/devices/machine/i82426ex_ib.cpp index e64e8b548ed..b37c183dd75 100644 --- a/src/devices/machine/i82426ex_ib.cpp +++ b/src/devices/machine/i82426ex_ib.cpp @@ -92,17 +92,17 @@ void i82426ex_ib_device::device_add_mconfig(machine_config &config) }); ISA16(config, m_isabus, 0); - m_isabus->irq3_callback().set([this] (int state) { m_intc[0]->ir3_w(state); }); - m_isabus->irq4_callback().set([this] (int state) { m_intc[0]->ir4_w(state); }); - m_isabus->irq5_callback().set([this] (int state) { m_intc[0]->ir5_w(state); }); - m_isabus->irq6_callback().set([this] (int state) { m_intc[0]->ir6_w(state); }); - m_isabus->irq7_callback().set([this] (int state) { m_intc[0]->ir7_w(state); }); - m_isabus->irq2_callback().set([this] (int state) { m_intc[1]->ir1_w(state); }); - m_isabus->irq10_callback().set([this] (int state) { m_intc[1]->ir2_w(state); }); - m_isabus->irq11_callback().set([this] (int state) { m_intc[1]->ir3_w(state); }); - m_isabus->irq12_callback().set([this] (int state) { m_intc[1]->ir4_w(state); }); - m_isabus->irq14_callback().set([this] (int state) { m_intc[1]->ir6_w(state); }); - m_isabus->irq15_callback().set([this] (int state) { m_intc[1]->ir7_w(state); }); + m_isabus->irq3_callback().set( m_intc[0], FUNC(pic8259_device::ir3_w)); + m_isabus->irq4_callback().set( m_intc[0], FUNC(pic8259_device::ir4_w)); + m_isabus->irq5_callback().set( m_intc[0], FUNC(pic8259_device::ir5_w)); + m_isabus->irq6_callback().set( m_intc[0], FUNC(pic8259_device::ir6_w)); + m_isabus->irq7_callback().set( m_intc[0], FUNC(pic8259_device::ir7_w)); + m_isabus->irq2_callback().set( m_intc[1], FUNC(pic8259_device::ir1_w)); + m_isabus->irq10_callback().set(m_intc[1], FUNC(pic8259_device::ir2_w)); + m_isabus->irq11_callback().set(m_intc[1], FUNC(pic8259_device::ir3_w)); + m_isabus->irq12_callback().set(m_intc[1], FUNC(pic8259_device::ir4_w)); + m_isabus->irq14_callback().set(m_intc[1], FUNC(pic8259_device::ir6_w)); + m_isabus->irq15_callback().set(m_intc[1], FUNC(pic8259_device::ir7_w)); m_isabus->drq0_callback().set(m_dma[0], FUNC(am9517a_device::dreq0_w)); m_isabus->drq1_callback().set(m_dma[0], FUNC(am9517a_device::dreq1_w)); m_isabus->drq2_callback().set(m_dma[0], FUNC(am9517a_device::dreq2_w)); From bfded6e6e862e472b6bd3b81aa9f1cc372e062b7 Mon Sep 17 00:00:00 2001 From: angelosa Date: Wed, 18 Mar 2026 19:11:13 +0100 Subject: [PATCH 316/351] pc/fruitpc.cpp: MNW demote * even before the current boot regression it wasn't really working well (video with half height) --- src/devices/bus/isa/wd1002a_wx1.h | 2 +- src/mame/pc/fruitpc.cpp | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/devices/bus/isa/wd1002a_wx1.h b/src/devices/bus/isa/wd1002a_wx1.h index 168152c6039..5ed3a730b4d 100644 --- a/src/devices/bus/isa/wd1002a_wx1.h +++ b/src/devices/bus/isa/wd1002a_wx1.h @@ -19,7 +19,7 @@ // TYPE DEFINITIONS //************************************************************************** -// ======================> isa16_ide_device +// ======================> isa8_wd1002a_wx1_device class isa8_wd1002a_wx1_device : public device_t, public device_isa8_card_interface diff --git a/src/mame/pc/fruitpc.cpp b/src/mame/pc/fruitpc.cpp index 2763131e33d..fc931cc2070 100644 --- a/src/mame/pc/fruitpc.cpp +++ b/src/mame/pc/fruitpc.cpp @@ -12,6 +12,8 @@ PCI shadow RAM handling (which causes BIOS to boot in legacy mode); - Handle STPCD0166BTC3 SoC properly, including PCI devices connected and SVGA mods (wrongly draws only top screen with 640x200 with at486 -isa1 svga_s3); + - Pinpoint what VGA core this really uses (some STPC boards uses Chips & Technologies + 2nd gen family, may be same here) Hardware: - ST STPCD0166BTC3 486/66 + PC + VGA all on one chip @@ -152,6 +154,7 @@ void fruitpc_state::fruitpc(machine_config &config) PCI_ROOT(config, m_pciroot, 0); // TODO: STPCD0166BTC3 host PCI + // TODO: should really be ISA16 ISA8(config, m_isabus, 0); m_isabus->set_memspace("maincpu", AS_PROGRAM); m_isabus->set_iospace("maincpu", AS_IO); @@ -182,4 +185,4 @@ ROM_END } // anonymous namespace -GAME( 2006, fruitpc, 0, fruitpc, fruitpc, fruitpc_state, empty_init, ROT0, "", "Fruit Land", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2006, fruitpc, 0, fruitpc, fruitpc, fruitpc_state, empty_init, ROT0, "", "Fruit Land", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) From 370d8dffb72286274f96504a8c7d0854854f4751 Mon Sep 17 00:00:00 2001 From: AJR Date: Wed, 18 Mar 2026 23:35:25 -0400 Subject: [PATCH 317/351] w65c02, w65c02s, etc.: De-virtualize SBC implementation --- src/devices/cpu/m6502/m6502.h | 2 +- src/devices/cpu/m6502/om65ce02.lst | 18 +++++++++--------- src/devices/cpu/m6502/or65c19.lst | 2 +- src/devices/cpu/m6502/ow65c02.lst | 18 +++++++++--------- src/devices/cpu/m6502/ow65c02s.lst | 10 +++++----- src/devices/cpu/m6502/w65c02.cpp | 15 ++++++++++----- src/devices/cpu/m6502/w65c02.h | 3 ++- 7 files changed, 37 insertions(+), 31 deletions(-) diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h index b38066a4327..55b95f6ed08 100644 --- a/src/devices/cpu/m6502/m6502.h +++ b/src/devices/cpu/m6502/m6502.h @@ -164,7 +164,7 @@ protected: void do_adc_d(uint8_t val); void do_adc_nd(uint8_t val); - virtual void do_sbc_d(uint8_t val); + void do_sbc_d(uint8_t val); void do_sbc_nd(uint8_t val); void do_arr_d(); void do_arr_nd(); diff --git a/src/devices/cpu/m6502/om65ce02.lst b/src/devices/cpu/m6502/om65ce02.lst index 8d10c6bd991..bf7fe0798f5 100644 --- a/src/devices/cpu/m6502/om65ce02.lst +++ b/src/devices/cpu/m6502/om65ce02.lst @@ -1424,7 +1424,7 @@ sbc_ce_aba m_TMP = set_h(m_TMP, read_pc()); m_PC++; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1436,7 +1436,7 @@ sbc_ce_abx m_PC++; m_TMP += m_X; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1448,7 +1448,7 @@ sbc_ce_aby m_PC++; m_TMP += m_Y; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1461,7 +1461,7 @@ sbc_ce_idx m_TMP2++; m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1473,7 +1473,7 @@ sbc_ce_idy m_TMP2++; m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); m_TMP2 = read(m_TMP+m_Y); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1485,7 +1485,7 @@ sbc_idz m_TMP2++; m_TMP = set_h(m_TMP, read(m_B|m_TMP2)); m_TMP2 = read(m_TMP+m_Z); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1493,7 +1493,7 @@ sbc_idz sbc_ce_imm m_TMP = read_pc(); m_PC++; - do_sbc(m_TMP); + do_sbc_c(m_TMP); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1502,7 +1502,7 @@ sbc_ce_zpg m_TMP = read_pc(); m_PC++; m_TMP2 = read(m_B|m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); @@ -1512,7 +1512,7 @@ sbc_ce_zpx m_PC++; read(m_TMP); m_TMP2 = read(m_B|uint8_t(m_TMP+m_X)); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) set_nz(m_A); prefetch(); diff --git a/src/devices/cpu/m6502/or65c19.lst b/src/devices/cpu/m6502/or65c19.lst index f4763d6307d..0c823e2a564 100644 --- a/src/devices/cpu/m6502/or65c19.lst +++ b/src/devices/cpu/m6502/or65c19.lst @@ -429,7 +429,7 @@ sbc_ipx read(set_l(m_TMP, m_TMP+m_X)); } m_TMP2 = read(m_TMP+m_X); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); diff --git a/src/devices/cpu/m6502/ow65c02.lst b/src/devices/cpu/m6502/ow65c02.lst index 37a05fef464..9f36e5baaeb 100644 --- a/src/devices/cpu/m6502/ow65c02.lst +++ b/src/devices/cpu/m6502/ow65c02.lst @@ -646,7 +646,7 @@ sbc_c_aba m_TMP = set_h(m_TMP, read_pc()); m_PC++; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -663,7 +663,7 @@ sbc_c_abx } m_TMP += m_X; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -680,7 +680,7 @@ sbc_c_aby } m_TMP += m_Y; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -695,7 +695,7 @@ sbc_c_idx m_TMP = read(m_TMP2 & 0xff); m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -711,7 +711,7 @@ sbc_c_idy read(set_l(m_TMP, m_TMP+m_Y)); } m_TMP2 = read(m_TMP+m_Y); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -721,7 +721,7 @@ sbc_c_idy sbc_c_imm m_TMP = read_pc(); m_PC++; - do_sbc(m_TMP); + do_sbc_c(m_TMP); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -732,7 +732,7 @@ sbc_c_zpg m_TMP = read_pc(); m_PC++; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -745,7 +745,7 @@ sbc_c_zpi m_TMP = read(m_TMP2 & 0xff); m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -757,7 +757,7 @@ sbc_c_zpx m_PC++; read(m_TMP); m_TMP2 = read(uint8_t(m_TMP+m_X)); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); diff --git a/src/devices/cpu/m6502/ow65c02s.lst b/src/devices/cpu/m6502/ow65c02s.lst index 9ca97b3f8a5..ca0e0d38191 100644 --- a/src/devices/cpu/m6502/ow65c02s.lst +++ b/src/devices/cpu/m6502/ow65c02s.lst @@ -783,7 +783,7 @@ sbc_s_abx } m_TMP += m_X; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -800,7 +800,7 @@ sbc_s_aby } m_TMP += m_Y; m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -815,7 +815,7 @@ sbc_s_idx m_TMP = read(m_TMP2 & 0xff); m_TMP = set_h(m_TMP, read((m_TMP2+1) & 0xff)); m_TMP2 = read(m_TMP); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -831,7 +831,7 @@ sbc_s_idy read_pc(); } m_TMP2 = read(m_TMP+m_Y); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); @@ -843,7 +843,7 @@ sbc_s_zpx m_TMP = read_pc(); read_pc(); m_TMP2 = read(uint8_t(m_TMP+m_X)); - do_sbc(m_TMP2); + do_sbc_c(m_TMP2); if(m_P & F_D) { read_pc(); set_nz(m_A); diff --git a/src/devices/cpu/m6502/w65c02.cpp b/src/devices/cpu/m6502/w65c02.cpp index 6875a20b72d..9908e9569a2 100644 --- a/src/devices/cpu/m6502/w65c02.cpp +++ b/src/devices/cpu/m6502/w65c02.cpp @@ -25,7 +25,7 @@ w65c02_device::w65c02_device(const machine_config &mconfig, device_type type, co { } -void w65c02_device::do_sbc_d(uint8_t val) +void w65c02_device::do_sbc_cd(uint8_t val) { // SBC allows interdigit carry from decimal adjustment on 65C02 uint8_t c = m_P & F_C ? 0 : 1; @@ -33,10 +33,7 @@ void w65c02_device::do_sbc_d(uint8_t val) uint16_t diff = m_A - val - c; uint8_t al = (m_A & 15) - (val & 15) - c; uint8_t ah = (m_A >> 4) - (val >> 4) - (int8_t(al) < 0); - if(!uint8_t(diff)) - m_P |= F_Z; - else if(diff & 0x80) - m_P |= F_N; + // N and Z flags will be set in the next cycle if((m_A^val) & (m_A^diff) & 0x80) m_P |= F_V; if(!(diff & 0xff00)) @@ -48,6 +45,14 @@ void w65c02_device::do_sbc_d(uint8_t val) m_A -= 0x60; } +void w65c02_device::do_sbc_c(uint8_t val) +{ + if(m_P & F_D) + do_sbc_cd(val); + else + do_sbc_nd(val); +} + std::unique_ptr w65c02_device::create_disassembler() { return std::make_unique(); diff --git a/src/devices/cpu/m6502/w65c02.h b/src/devices/cpu/m6502/w65c02.h index d920dfa8d95..48906acf0ae 100644 --- a/src/devices/cpu/m6502/w65c02.h +++ b/src/devices/cpu/m6502/w65c02.h @@ -23,7 +23,8 @@ public: virtual void do_exec_full() override; virtual void do_exec_partial() override; - virtual void do_sbc_d(uint8_t val) override; + void do_sbc_cd(uint8_t val); + void do_sbc_c(uint8_t val); protected: w65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); From 93bd2b6efd6ffeea1c7dc568ff6a9f0cd58abc49 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Thu, 19 Mar 2026 12:27:40 +0200 Subject: [PATCH 318/351] z8536: Further improve port bit matching. [Curt Coder] --- src/devices/machine/z8536.cpp | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) diff --git a/src/devices/machine/z8536.cpp b/src/devices/machine/z8536.cpp index d85455f2585..caa77cf8edf 100644 --- a/src/devices/machine/z8536.cpp +++ b/src/devices/machine/z8536.cpp @@ -860,14 +860,36 @@ void cio_base_device::gate(int id, int state) void cio_base_device::match_pattern(int port) { u8 pms = m_register[PORT_A_MODE_SPECIFICATION + (port << 3)]; - u8 pm = m_register[PORT_A_PATTERN_MASK + (port << 3)]; u8 ddr = m_register[PORT_A_DATA_DIRECTION + (port << 3)]; - u8 pol = m_register[PORT_A_PATTERN_POLARITY + (port << 3)]; + + u8 pm = m_register[PORT_A_PATTERN_MASK + (port << 3)]; + u8 pt = m_register[PORT_A_PATTERN_TRANSITION + (port << 3)]; + u8 pp = m_register[PORT_A_PATTERN_POLARITY + (port << 3)]; + + if (pt) { + logerror("%s: Z8536 Port %c Pattern Transition mode not implemented\n", machine().describe_context(), 'A' + port); + return; + } + + u8 data = (m_input[port] & ddr) | (m_output[port] & ~ddr); + u8 match = 0; + + for (int bit = 0; bit < 8; bit++) { + if (!BIT(pm, bit)) + continue; + + if (BIT(pp, bit) == BIT(data, bit)) + match |= 1 << bit; + } switch ((pms & PMS_PMS_MASK) >> 1) { + case PMS_DISABLE: + m_match[port] = 0; + return; + case PMS_OR_PEV: - m_match[port] = (m_input[port] ^ ~pol) & ddr & pm; + m_match[port] = match; if (m_match[port]) { @@ -876,6 +898,10 @@ void cio_base_device::match_pattern(int port) check_interrupt(); } break; + + default: + logerror("%s: Z8536 Port %c Pattern Mode %u not implemented\n", machine().describe_context(), 'A' + port, (pms & PMS_PMS_MASK) >> 1); + break; } } From fc5efd5c664acf6ba7dab7b9efb2188623a53142 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Thu, 19 Mar 2026 12:28:39 +0200 Subject: [PATCH 319/351] luxor/abc1600: WIP. --- src/mame/luxor/abc1600.cpp | 30 +++--- src/mame/luxor/abc1600_mmu.cpp | 176 +++++++++++++++++++++------------ src/mame/luxor/abc1600_mmu.h | 7 ++ 3 files changed, 132 insertions(+), 81 deletions(-) diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 074ea4551eb..1ce1f953a70 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -43,7 +43,6 @@ - DMA (expects to read 0xff from 0x18000..) - loadsys1 core dump (/etc/mkfs -b 1024 -v 69000 /dev/sa40) - crashes after reset - - connect RS-232 printer port - Z80 SCC/DART interrupt chain - [:2a:chb] - TX FIFO is full, discarding data [:] SCC write 000003 @@ -62,6 +61,7 @@ #include "imagedev/floppy.h" #include "machine/74259.h" #include "machine/e0516.h" +#include "machine/input_merger.h" #include "machine/nmc9306.h" #include "machine/ram.h" #include "machine/wd_fdc.h" @@ -76,7 +76,7 @@ // CONSTANTS / MACROS //************************************************************************** -#define VERBOSE 0 +//#define VERBOSE 0 #include "logmacro.h" #define MC68008P8_TAG "3f" @@ -133,7 +133,7 @@ public: abc1600_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, MC68008P8_TAG), - m_mac(*this, "mmu"), + m_mac(*this, "mac"), m_dma0(*this, Z8410AB1_0_TAG), m_dma1(*this, Z8410AB1_1_TAG), m_dma2(*this, Z8410AB1_2_TAG), @@ -219,8 +219,6 @@ private: void update_drdy1(int state); void sccrq_a_w(int state) { m_sccrq_a = state; update_drdy1(0); } void sccrq_b_w(int state) { m_sccrq_b = state; update_drdy1(0); } - void dart_irq_w(int state) { m_dart_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } - void scc_irq_w(int state) { m_scc_irq = state; m_maincpu->set_input_line(M68K_IRQ_5, (m_dart_irq || m_scc_irq) ? ASSERT_LINE : CLEAR_LINE); } // DMA int m_dmadis = 0; @@ -241,8 +239,6 @@ private: int m_btce = 0; // V.24 channel B external clock enable bool m_sccrq_a = 0; bool m_sccrq_b = 0; - int m_scc_irq = 0; - int m_dart_irq = 0; }; @@ -664,7 +660,7 @@ void abc1600_state::mac_mem(address_map &map) map(0x1ffa00, 0x1ffaff).m(ABC1600_MOVER_TAG, FUNC(abc1600_mover_device::iowr2_map)); map(0x1ffb00, 0x1ffb00).mirror(0x7e).w(FUNC(abc1600_state::fw0_w)); map(0x1ffb01, 0x1ffb01).mirror(0x7e).w(FUNC(abc1600_state::fw1_w)); - map(0x1ffd00, 0x1ffd07).mirror(0xf8).w("mmu", FUNC(abc1600_mmu_device::dmamap_w)); + map(0x1ffd00, 0x1ffd07).mirror(0xf8).w("mac", FUNC(abc1600_mmu_device::dmamap_w)); map(0x1ffe00, 0x1ffe00).mirror(0xff).w("spec_contr_reg", FUNC(ls259_device::write_nibble_d3)); } @@ -1016,8 +1012,6 @@ void abc1600_state::machine_start() save_item(NAME(m_btce)); save_item(NAME(m_sccrq_a)); save_item(NAME(m_sccrq_b)); - save_item(NAME(m_scc_irq)); - save_item(NAME(m_dart_irq)); } @@ -1044,9 +1038,11 @@ void abc1600_state::machine_reset() void abc1600_state::abc1600(machine_config &config) { // basic machine hardware - M68008(config, m_maincpu, 64_MHz_XTAL / 8); + M68008(config, m_maincpu, 16000000);//64_MHz_XTAL / 8); m_maincpu->enable_mmu8(); + INPUT_MERGER_ANY_HIGH(config, "irq5").output_handler().set_inputline(m_maincpu, M68K_IRQ_5); + LUXOR_ABC1600_MMU(config, m_mac); m_mac->set_addrmap(AS_PROGRAM, &abc1600_state::mac_mem); m_mac->set_addrmap(m68000_base_device::AS_CPU_SPACE, &abc1600_state::cpu_space_map); @@ -1097,10 +1093,10 @@ void abc1600_state::abc1600(machine_config &config) m_dma2->out_iorq_callback().set(m_mac, FUNC(abc1600_mmu_device::dma2_iorq_w)); Z80DART(config, m_dart, 64_MHz_XTAL / 16); - m_dart->out_int_callback().set(FUNC(abc1600_state::dart_irq_w)); + m_dart->out_int_callback().set("irq5", FUNC(input_merger_device::in_w<0>)); m_dart->out_txda_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_txd)); - //m_dart->out_dtra_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_dcd)); - //m_dart->out_rtsa_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_cts)); + m_dart->out_dtra_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_dtr)); + m_dart->out_rtsa_callback().set(RS232_PR_TAG, FUNC(rs232_port_device::write_rts)); m_dart->out_txdb_callback().set(ABC_KEYBOARD_PORT_TAG, FUNC(abc_keyboard_port_device::txd_w)); abc_keyboard_port_device &kb(ABC_KEYBOARD_PORT(config, ABC_KEYBOARD_PORT_TAG, abc_keyboard_devices, "abc99")); @@ -1110,11 +1106,11 @@ void abc1600_state::abc1600(machine_config &config) rs232_port_device &rs232pr(RS232_PORT(config, RS232_PR_TAG, default_rs232_devices, nullptr)); rs232pr.rxd_handler().set(m_dart, FUNC(z80dart_device::rxa_w)); - //rs232pr.rts_handler().set(m_dart, FUNC(z80dart_device::ctsa_w)); - //rs232pr.dtr_handler().set(m_dart, FUNC(z80dart_device::dcda_w)); + rs232pr.dcd_handler().set(m_dart, FUNC(z80dart_device::dcda_w)); + rs232pr.cts_handler().set(m_dart, FUNC(z80dart_device::ctsa_w)); SCC8530(config, m_scc, 64_MHz_XTAL / 16); - m_scc->out_int_callback().set(FUNC(abc1600_state::scc_irq_w)); + m_scc->out_int_callback().set("irq5", FUNC(input_merger_device::in_w<1>)); m_scc->out_wreqa_callback().set(FUNC(abc1600_state::sccrq_a_w)); m_scc->out_wreqb_callback().set(FUNC(abc1600_state::sccrq_b_w)); m_scc->out_txda_callback().set(RS232_A_TAG, FUNC(rs232_port_device::write_txd)); diff --git a/src/mame/luxor/abc1600_mmu.cpp b/src/mame/luxor/abc1600_mmu.cpp index 4cd4f521764..15c0d8530cb 100644 --- a/src/mame/luxor/abc1600_mmu.cpp +++ b/src/mame/luxor/abc1600_mmu.cpp @@ -14,7 +14,7 @@ #define LOG_TASKS (1U << 3) #define LOG_ERRORS (1U << 4) -#define VERBOSE (LOG_MAC|LOG_TASKS) +//#define VERBOSE (LOG_MAC | LOG_DMA | LOG_TASKS | LOG_ERRORS) #include "logmacro.h" #define PAGE_WP BIT(page_data, 14) @@ -47,14 +47,31 @@ void abc1600_mmu_device::boot_map(address_map &map) void abc1600_mmu_device::mac_map(address_map &map) { - map(0x80000, 0x80000).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mmu_device::page_hi_r), FUNC(abc1600_mmu_device::page_hi_w)); - map(0x80001, 0x80001).mirror(0x006f8).select(0x7f900).rw(FUNC(abc1600_mmu_device::page_lo_r), FUNC(abc1600_mmu_device::page_lo_w)); - map(0x80002, 0x80002).mirror(0x7fff8).noprw(); - map(0x80003, 0x80003).mirror(0x07ef8).select(0x78100).rw(FUNC(abc1600_mmu_device::segment_r), FUNC(abc1600_mmu_device::segment_w)); - map(0x80004, 0x80004).mirror(0x7fff8).noprw(); - map(0x80005, 0x80005).mirror(0x7fff8).nopr().w(FUNC(abc1600_mmu_device::task_w)); - map(0x80006, 0x80006).mirror(0x7fff8).noprw(); - map(0x80007, 0x80007).mirror(0x7fff8).r(FUNC(abc1600_mmu_device::cause_r)).nopw(); + map(0x80000, 0xfffff).rw(FUNC(abc1600_mmu_device::mac_r), FUNC(abc1600_mmu_device::mac_w)); +} + +uint8_t abc1600_mmu_device::mac_r(offs_t offset) +{ + switch (offset & 0x7) + { + case 0x0: return page_hi_r(offset); + case 0x1: return page_lo_r(offset); + case 0x3: return segment_r(offset); + case 0x7: return cause_r(); + default: return 0; + } +} + +void abc1600_mmu_device::mac_w(offs_t offset, uint8_t data) +{ + switch (offset & 0x7) + { + case 0x0: page_hi_w(offset, data); break; + case 0x1: page_lo_w(offset, data); break; + case 0x3: segment_w(offset, data); break; + case 0x5: task_w(offset, data); break; + default: break; + } } abc1600_mmu_device::abc1600_mmu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : @@ -91,9 +108,6 @@ abc1600_mmu_device::mmu::mmu(m68008_device *maincpu, address_space &boot, addres program.specific(m_program); cpu_space.specific(m_cpu_space); mac_space.specific(m_s_program); - - // HACK fill segment RAM or abcenix won't boot - memset(m_segment_ram, 0xff, 0x400); } void abc1600_mmu_device::device_start() @@ -101,6 +115,12 @@ void abc1600_mmu_device::device_start() m_mmu = std::make_unique(m_maincpu.target(), space(AS_BOOT), space(AS_PROGRAM), space(m68000_base_device::AS_CPU_SPACE), space(AS_MAC), m_segment_ram.target(), m_page_ram.target()); m_maincpu->set_current_mmu8(m_mmu.get()); + for (auto & s : m_segment_ram) + s = 0xff; + + for (auto & s : m_page_ram) + s = 0xffff; + state_add(0, "TASK", m_mmu->m_task).formatstr("%2u"); state_add(1, "BOOTE", m_mmu->m_boote).formatstr("%1u"); state_add(2, "MAGIC", m_mmu->m_magic).formatstr("%1u"); @@ -138,15 +158,41 @@ void abc1600_mmu_device::mmu::reset() m_task = 0; } -offs_t abc1600_mmu_device::mmu::get_physical_address(offs_t logical, int task, bool &nonx, bool &wp) +bool abc1600_mmu_device::mmu::ifc2(int intention) const +{ + return (m_magic || intention != TR_FETCH) && !m_super; +} + +bool abc1600_mmu_device::mmu::force_task0(offs_t logical, int intention) const +{ + const bool a19 = BIT(logical, 19); + + return !(a19 || ifc2(intention)); +} + +int abc1600_mmu_device::mmu::get_task(offs_t logical, int intention) const +{ + if (force_task0(logical, intention)) + return 0; + + return m_task; +} + +offs_t abc1600_mmu_device::mmu::get_segment_address(offs_t logical, int intention) const +{ + bool sega19 = BIT(logical, 19) && (ifc2(intention) || BIT(logical, 8)); + return (get_task(logical, intention) << 5) | (sega19 << 4) | ((logical >> 15) & 0xf); +} + +offs_t abc1600_mmu_device::mmu::get_physical_address(offs_t logical, int intention, bool &nonx, bool &wp) { // segment - offs_t sega = (task << 5) | ((logical >> 15) & 0x1f); - uint8_t segd = m_segment_ram[sega]; + offs_t sega = get_segment_address(logical, intention); + u8 segd = m_segment_ram[sega] & 0x3f; // page - offs_t pga = ((segd & 0x3f) << 4) | ((logical >> 11) & 0x0f); - uint16_t page_data = m_page_ram[pga]; + offs_t pga = (segd << 4) | ((logical >> 11) & 0x0f); + u16 page_data = m_page_ram[pga]; offs_t physical = ((page_data & 0x3ff) << 11) | (logical & 0x7ff); @@ -173,17 +219,13 @@ bool abc1600_mmu_device::mmu::translate(int spacenum, int intention, offs_t &add return true; } - if (m_super && (address & 0x80000)) { + if (!ifc2(intention) && (intention != TR_FETCH) && BIT(address, 19)) { target_space = &m_a_mac_space; return true; } - - int task = m_task; - if (m_super || (!m_magic && (intention == TR_FETCH))) - task = 0; - + bool nonx, wp; - address = get_physical_address(address, task, nonx, wp); + address = get_physical_address(address, intention, nonx, wp); if (nonx || ((intention == TR_WRITE) && !wp)) return false; @@ -197,15 +239,11 @@ u8 abc1600_mmu_device::mmu::mmu_read(offs_t logical, int intention) if (!m_boote && (logical < 0x20000)) return m_boot.read_interruptible(logical); - if (m_super && (logical & 0x80000)) + if (!ifc2(intention) && BIT(logical, 19)) return m_s_program.read_interruptible(logical); - int task = m_task; - if (m_super || (!m_magic && (intention == TR_FETCH))) - task = 0; - bool nonx, wp; - offs_t physical = get_physical_address(logical, task, nonx, wp); + offs_t physical = get_physical_address(logical, intention, nonx, wp); if (nonx) { m_maincpu->trigger_bus_error(); @@ -217,17 +255,13 @@ u8 abc1600_mmu_device::mmu::mmu_read(offs_t logical, int intention) void abc1600_mmu_device::mmu::mmu_write(offs_t logical, u8 data) { - if (m_super && (logical & 0x80000)) { + if (!ifc2(TR_WRITE) && BIT(logical, 19)) { m_s_program.write_interruptible(logical, data); return; } - int task = m_task; - if (m_super) - task = 0; - bool nonx, wp; - offs_t physical = get_physical_address(logical, task, nonx, wp); + offs_t physical = get_physical_address(logical, TR_WRITE, nonx, wp); if (nonx || !wp) { m_maincpu->trigger_bus_error(); @@ -242,7 +276,7 @@ u8 abc1600_mmu_device::mmu::read_program(offs_t logical) return mmu_read(logical, TR_FETCH); } -void abc1600_mmu_device::mmu::write_program(offs_t logical, u8 data) +void abc1600_mmu_device::mmu::write_program(offs_t logical, u8 data) { mmu_write(logical, data); } @@ -284,11 +318,11 @@ uint8_t abc1600_mmu_device::cause_r() */ - uint8_t data = m_rstbut; + uint8_t data = m_rstbut | 0x02; if (!m_partst) { - data = 0x02 | m_mmu->m_cause; + data |= m_mmu->m_cause; } if (!machine().side_effects_disabled()) @@ -340,10 +374,12 @@ uint8_t abc1600_mmu_device::segment_r(offs_t offset) */ - offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; + offs_t sega = m_mmu->get_segment_address(0x80000 | offset, TR_READ); + u8 segd = m_segment_ram[sega]; - return (!m_mmu->m_magic << 7) | (segd & 0x7f); + u8 data = (!m_mmu->m_magic << 7) | (segd & 0x7f); + LOGMASKED(LOG_MAC, "%s %05x SEG R %03x:%02x\n", machine().describe_context(), offset, sega, data); + return data; } void abc1600_mmu_device::segment_w(offs_t offset, uint8_t data) @@ -358,15 +394,17 @@ void abc1600_mmu_device::segment_w(offs_t offset, uint8_t data) 3 SEGD3 4 SEGD4 5 SEGD5 - 6 SEGD6 + 6 SEGD6 (unused) 7 0 */ - offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); + int task = m_mmu->get_task(0x80000 | offset, TR_WRITE); + offs_t sega = m_mmu->get_segment_address(0x80000 | offset, TR_WRITE); m_segment_ram[sega] = data & 0x7f; - LOGMASKED(LOG_MAC, "%s SEG W %05x:%02x SEGA %03x SEGD %02x TASK %u\n", machine().describe_context(), offset, data, sega, m_segment_ram[sega], m_mmu->m_task); + offs_t physical = (sega & 0x1f) << 15; + LOGMASKED(LOG_MAC, "%s %05x SEG W %03x:%02x [T%02u:%05x]\n", machine().describe_context(), offset, sega, data & 0x7f, task, physical); } uint8_t abc1600_mmu_device::page_lo_r(offs_t offset) @@ -387,13 +425,14 @@ uint8_t abc1600_mmu_device::page_lo_r(offs_t offset) */ // segment - offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; + offs_t sega = m_mmu->get_segment_address(0x80000 | offset, TR_READ); + u8 segd = m_segment_ram[sega] & 0x3f; // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - uint16_t pgd = m_page_ram[pga]; + offs_t pga = (segd << 4) | ((offset >> 11) & 0xf); + u16 pgd = m_page_ram[pga]; + LOGMASKED(LOG_MAC, "%s %05x PAGE LO R %03x:%02x\n", machine().describe_context(), offset, pga, pgd & 0xff); return pgd & 0xff; } @@ -415,16 +454,18 @@ uint8_t abc1600_mmu_device::page_hi_r(offs_t offset) */ // segment - offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; + offs_t sega = m_mmu->get_segment_address(0x80000 | offset, TR_READ); + u8 segd = m_segment_ram[sega] & 0x3f; // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - uint16_t pgd = m_page_ram[pga]; + offs_t pga = (segd << 4) | ((offset >> 11) & 0xf); + u16 pgd = m_page_ram[pga]; int x20 = BIT(pgd, 9); + u8 data = (pgd >> 8) | (x20 << 2) | (x20 << 3) | (x20 << 4) | (x20 << 5); - return (pgd >> 8) | (x20 << 2) | (x20 << 3) | (x20 << 4) | (x20 << 5); + LOGMASKED(LOG_MAC, "%s %05x PAGE HI R %03x:%02x\n", machine().describe_context(), offset, pga, data); + return data; } void abc1600_mmu_device::page_lo_w(offs_t offset, uint8_t data) @@ -445,14 +486,18 @@ void abc1600_mmu_device::page_lo_w(offs_t offset, uint8_t data) */ // segment - offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; + int task = m_mmu->get_task(0x80000 | offset, TR_WRITE); + offs_t sega = m_mmu->get_segment_address(0x80000 | offset, TR_WRITE); + u8 segd = m_segment_ram[sega] & 0x3f; // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - m_page_ram[pga] = (m_page_ram[pga] & 0xff00) | data; + offs_t pga = (segd << 4) | ((offset >> 11) & 0xf); + u16 pgd = (m_page_ram[pga] & 0xff00) | data; + m_page_ram[pga] = pgd; - LOGMASKED(LOG_MAC, "%s PAGE W %05x:%02x (SEGA %03x SEGD %02x PGA %03x PGD %04x TASK %u)\n", machine().describe_context(), offset, data, sega, segd, pga, m_page_ram[pga], m_mmu->m_task); + offs_t logical = (BIT(offset, 8) << 19) | (offset & 0x7f800); + offs_t physical = (pgd & 0x3ff) << 11; + LOGMASKED(LOG_MAC, "%s %05x PAGE LO W %03x:..%02x [T%02u:%05x:%06x]\n", machine().describe_context(), offset, pga, data, task, logical, physical); } void abc1600_mmu_device::page_hi_w(offs_t offset, uint8_t data) @@ -473,12 +518,15 @@ void abc1600_mmu_device::page_hi_w(offs_t offset, uint8_t data) */ // segment - offs_t sega = (m_mmu->m_task << 5) | BIT(offset, 8) << 4 | ((offset >> 15) & 0xf); - uint8_t segd = m_segment_ram[sega]; + offs_t sega = m_mmu->get_segment_address(0x80000 | offset, TR_WRITE); + u8 segd = m_segment_ram[sega] & 0x3f; // page - offs_t pga = ((segd & 0x3f) << 4) | ((offset >> 11) & 0xf); - m_page_ram[pga] = ((data & 0xc3) << 8) | (m_page_ram[pga] & 0xff); + offs_t pga = (segd << 4) | ((offset >> 11) & 0xf); + u16 pgd = ((data & 0xc3) << 8) | (m_page_ram[pga] & 0xff); + m_page_ram[pga] = pgd; + + LOGMASKED(LOG_MAC, "%s %05x PAGE HI W %03x:%02x..\n", machine().describe_context(), offset, pga, data); } offs_t abc1600_mmu_device::get_dma_address(int index, offs_t logical, bool &rw) @@ -534,7 +582,7 @@ void abc1600_mmu_device::dma_mreq_w(int index, int dmamap, offs_t logical, uint8 if (!rw) { - space().write_byte(physical, data); + space(AS_PROGRAM).write_byte(physical, data); } } diff --git a/src/mame/luxor/abc1600_mmu.h b/src/mame/luxor/abc1600_mmu.h index 4d1bd1e2c68..f04870d4bb9 100644 --- a/src/mame/luxor/abc1600_mmu.h +++ b/src/mame/luxor/abc1600_mmu.h @@ -99,6 +99,10 @@ private: memory_access<20, 0, 0, ENDIANNESS_BIG>::specific m_s_program; void reset(); + bool ifc2(int intention) const; + offs_t get_segment_address(offs_t logical, int intention) const; + bool force_task0(offs_t logical, int intention) const; + int get_task(offs_t logical, int intention) const; offs_t get_physical_address(offs_t logical, int task, bool &nonx, bool &wp); u8 mmu_read(offs_t logical, int intention); void mmu_write(offs_t logical, u8 data); @@ -123,6 +127,9 @@ private: void boot_map(address_map &map) ATTR_COLD; void mac_map(address_map &map) ATTR_COLD; + uint8_t mac_r(offs_t offset); + void mac_w(offs_t offset, uint8_t data); + uint8_t cause_r(); void task_w(offs_t offset, uint8_t data); uint8_t segment_r(offs_t offset); From 1a427e8e8dc986b486189f3e086356f4dff229fb Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Thu, 19 Mar 2026 15:26:02 +0200 Subject: [PATCH 320/351] m68008: Update SR only after popping both stack bytes on RTE. (#11288) [Olivier Galibert, Curt Coder] --- src/devices/cpu/m68000/m68000gen.py | 2 +- src/devices/cpu/m68000/m68008-sdf8.cpp | 11985 +++++++++++------------ src/devices/cpu/m68000/m68008-sdp8.cpp | 11985 +++++++++++------------ src/devices/cpu/m68000/m68008-sif8.cpp | 11985 +++++++++++------------ src/devices/cpu/m68000/m68008-sip8.cpp | 11985 +++++++++++------------ 5 files changed, 23965 insertions(+), 23977 deletions(-) diff --git a/src/devices/cpu/m68000/m68000gen.py b/src/devices/cpu/m68000/m68000gen.py index 35412cb2db1..647f091fe3b 100755 --- a/src/devices/cpu/m68000/m68000gen.py +++ b/src/devices/cpu/m68000/m68000gen.py @@ -2228,7 +2228,7 @@ def generate_source_from_code(code, gen_mode): source.append("\t}") if not (gen_mode & GEN.full): source.append("\t[[fallthrough]]; case %d:" % (cid+1)) - if ci[10]: + if ci[10] and (access_steps == 1 or access_step == 1): source.append("\tm_sr = m_new_sr;") source.append("\tupdate_user_super();") source.append("\tupdate_interrupt();") diff --git a/src/devices/cpu/m68000/m68008-sdf8.cpp b/src/devices/cpu/m68000/m68008-sdf8.cpp index a00df6b36ec..77cee94b0e0 100644 --- a/src/devices/cpu/m68000/m68008-sdf8.cpp +++ b/src/devices/cpu/m68000/m68008-sdf8.cpp @@ -245,7 +245,7 @@ void m68008_device::state_bus_error_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -255,7 +255,7 @@ void m68008_device::state_bus_error_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -288,7 +288,7 @@ void m68008_device::state_bus_error_df8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -320,7 +320,7 @@ void m68008_device::state_bus_error_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -356,7 +356,7 @@ void m68008_device::state_bus_error_df8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -388,7 +388,7 @@ void m68008_device::state_bus_error_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -423,7 +423,7 @@ void m68008_device::state_bus_error_df8() m_da[16] = m_au; m_ftu = 0x0008; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -456,7 +456,7 @@ void m68008_device::state_bus_error_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -634,7 +634,7 @@ void m68008_device::state_address_error_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -644,7 +644,7 @@ void m68008_device::state_address_error_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -677,7 +677,7 @@ void m68008_device::state_address_error_df8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -709,7 +709,7 @@ void m68008_device::state_address_error_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -745,7 +745,7 @@ void m68008_device::state_address_error_df8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -777,7 +777,7 @@ void m68008_device::state_address_error_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -812,7 +812,7 @@ void m68008_device::state_address_error_df8() m_da[16] = m_au; m_ftu = 0x000c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -845,7 +845,7 @@ void m68008_device::state_address_error_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1030,7 +1030,7 @@ void m68008_device::state_interrupt_df8() m_pc = m_au; m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I); update_interrupt(); - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_icount -= 2; // 235 itlx3 @@ -1042,7 +1042,7 @@ void m68008_device::state_interrupt_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1103,7 +1103,7 @@ void m68008_device::state_interrupt_df8() m_da[16] = m_au; m_ftu = m_int_vector; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1136,7 +1136,7 @@ void m68008_device::state_interrupt_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1312,7 +1312,7 @@ void m68008_device::state_trace_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1322,7 +1322,7 @@ void m68008_device::state_trace_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1357,7 +1357,7 @@ void m68008_device::state_trace_df8() m_da[16] = m_au; m_ftu = 0x0024; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1390,7 +1390,7 @@ void m68008_device::state_trace_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1566,7 +1566,7 @@ void m68008_device::state_illegal_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1576,7 +1576,7 @@ void m68008_device::state_illegal_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1611,7 +1611,7 @@ void m68008_device::state_illegal_df8() m_da[16] = m_au; m_ftu = 0x0010; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1644,7 +1644,7 @@ void m68008_device::state_illegal_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1820,7 +1820,7 @@ void m68008_device::state_priviledge_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1830,7 +1830,7 @@ void m68008_device::state_priviledge_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1865,7 +1865,7 @@ void m68008_device::state_priviledge_df8() m_da[16] = m_au; m_ftu = 0x0020; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -1898,7 +1898,7 @@ void m68008_device::state_priviledge_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2074,7 +2074,7 @@ void m68008_device::state_linea_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2084,7 +2084,7 @@ void m68008_device::state_linea_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2119,7 +2119,7 @@ void m68008_device::state_linea_df8() m_da[16] = m_au; m_ftu = 0x0028; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2152,7 +2152,7 @@ void m68008_device::state_linea_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2328,7 +2328,7 @@ void m68008_device::state_linef_df8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2338,7 +2338,7 @@ void m68008_device::state_linef_df8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2373,7 +2373,7 @@ void m68008_device::state_linef_df8() m_da[16] = m_au; m_ftu = 0x002c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2406,7 +2406,7 @@ void m68008_device::state_linef_df8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -2579,7 +2579,7 @@ void m68008_device::ori_b_imm8_ds_df8() // 0000 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -2612,7 +2612,7 @@ void m68008_device::ori_b_imm8_ds_df8() // 0000 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -2620,7 +2620,7 @@ void m68008_device::ori_b_imm8_ds_df8() // 0000 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -2664,7 +2664,7 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -2696,11 +2696,11 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -2718,7 +2718,7 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -2755,7 +2755,7 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -2782,7 +2782,7 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -2817,12 +2817,12 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -2841,7 +2841,7 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -2878,7 +2878,7 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -2905,7 +2905,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -2939,7 +2939,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -2947,7 +2947,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -2966,7 +2966,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3003,7 +3003,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -3030,7 +3030,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3062,7 +3062,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3095,11 +3095,11 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -3117,7 +3117,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3154,7 +3154,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -3181,7 +3181,7 @@ void m68008_device::ori_b_imm8_dais_df8() // 0030 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3211,14 +3211,14 @@ void m68008_device::ori_b_imm8_dais_df8() // 0030 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -3226,7 +3226,7 @@ void m68008_device::ori_b_imm8_dais_df8() // 0030 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3260,7 +3260,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3296,11 +3296,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -3318,7 +3318,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3355,7 +3355,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -3381,7 +3381,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3449,7 +3449,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -3468,7 +3468,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3505,7 +3505,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -3531,7 +3531,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3564,7 +3564,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3598,7 +3598,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3631,7 +3631,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -3650,7 +3650,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3687,7 +3687,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -3713,7 +3713,7 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3745,21 +3745,21 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt alu_or8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -3767,7 +3767,7 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3801,11 +3801,11 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3849,7 +3849,7 @@ void m68008_device::ori_w_imm16_ds_df8() // 0040 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3882,7 +3882,7 @@ void m68008_device::ori_w_imm16_ds_df8() // 0040 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -3890,7 +3890,7 @@ void m68008_device::ori_w_imm16_ds_df8() // 0040 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3934,7 +3934,7 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -3966,11 +3966,11 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4003,7 +4003,7 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4040,7 +4040,7 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4082,7 +4082,7 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4117,12 +4117,12 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -4156,7 +4156,7 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4193,7 +4193,7 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4235,7 +4235,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4269,7 +4269,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -4277,7 +4277,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -4311,7 +4311,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4348,7 +4348,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4390,7 +4390,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4422,7 +4422,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4455,11 +4455,11 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4492,7 +4492,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4529,7 +4529,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4571,7 +4571,7 @@ void m68008_device::ori_w_imm16_dais_df8() // 0070 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4601,14 +4601,14 @@ void m68008_device::ori_w_imm16_dais_df8() // 0070 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -4616,7 +4616,7 @@ void m68008_device::ori_w_imm16_dais_df8() // 0070 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4650,7 +4650,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4686,11 +4686,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4723,7 +4723,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4760,7 +4760,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4801,7 +4801,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -4836,7 +4836,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4869,7 +4869,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -4903,7 +4903,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4940,7 +4940,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4981,7 +4981,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5014,7 +5014,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5048,7 +5048,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5081,7 +5081,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -5115,7 +5115,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5152,7 +5152,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -5197,7 +5197,7 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5229,23 +5229,23 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt alu_or(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -5253,7 +5253,7 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5287,11 +5287,11 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5334,7 +5334,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5367,7 +5367,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5400,12 +5400,12 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5435,7 +5435,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry] alu_or(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -5444,7 +5444,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -5460,7 +5460,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5493,7 +5493,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5525,7 +5525,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -5560,7 +5560,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5593,7 +5593,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5628,7 +5628,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -5663,7 +5663,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -5704,7 +5704,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5737,7 +5737,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5769,7 +5769,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -5804,11 +5804,11 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5841,7 +5841,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5876,7 +5876,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -5911,7 +5911,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -5952,7 +5952,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -5985,7 +5985,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6016,14 +6016,14 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6057,7 +6057,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6090,7 +6090,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6125,7 +6125,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6160,7 +6160,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -6201,7 +6201,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6234,7 +6234,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6266,7 +6266,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6298,7 +6298,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -6333,7 +6333,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6366,7 +6366,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6401,7 +6401,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6436,7 +6436,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -6477,7 +6477,7 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6510,7 +6510,7 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6540,14 +6540,14 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -6555,7 +6555,7 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6589,7 +6589,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6624,7 +6624,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -6659,7 +6659,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6692,7 +6692,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6727,7 +6727,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6762,7 +6762,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -6802,7 +6802,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6835,7 +6835,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6870,7 +6870,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6903,7 +6903,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -6938,7 +6938,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -6971,7 +6971,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7006,7 +7006,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7041,7 +7041,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -7081,7 +7081,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7114,7 +7114,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7147,7 +7147,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7181,7 +7181,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7214,7 +7214,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -7249,7 +7249,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7282,7 +7282,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7317,7 +7317,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7352,7 +7352,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -7397,13 +7397,13 @@ void m68008_device::btst_dd_ds_df8() // 0100 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7442,7 +7442,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -7455,7 +7455,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -7473,7 +7473,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8 // 1d2 mpiw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7505,7 +7505,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8 // 29a mpiw2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -7522,7 +7522,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -7542,7 +7542,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7585,11 +7585,11 @@ void m68008_device::btst_dd_ais_df8() // 0110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -7607,13 +7607,13 @@ void m68008_device::btst_dd_ais_df8() // 0110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7659,12 +7659,12 @@ void m68008_device::btst_dd_aips_df8() // 0118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -7683,13 +7683,13 @@ void m68008_device::btst_dd_aips_df8() // 0118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7734,7 +7734,7 @@ void m68008_device::btst_dd_pais_df8() // 0120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -7742,7 +7742,7 @@ void m68008_device::btst_dd_pais_df8() // 0120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -7761,13 +7761,13 @@ void m68008_device::btst_dd_pais_df8() // 0120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7810,7 +7810,7 @@ void m68008_device::btst_dd_das_df8() // 0128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7843,11 +7843,11 @@ void m68008_device::btst_dd_das_df8() // 0128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -7865,13 +7865,13 @@ void m68008_device::btst_dd_das_df8() // 0128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7912,14 +7912,14 @@ void m68008_device::btst_dd_dais_df8() // 0130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -7927,7 +7927,7 @@ void m68008_device::btst_dd_dais_df8() // 0130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7961,7 +7961,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -7997,11 +7997,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -8019,13 +8019,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8070,7 +8070,7 @@ void m68008_device::btst_dd_adr16_df8() // 0138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8103,7 +8103,7 @@ void m68008_device::btst_dd_adr16_df8() // 0138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -8122,13 +8122,13 @@ void m68008_device::btst_dd_adr16_df8() // 0138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8171,7 +8171,7 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8205,7 +8205,7 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8238,7 +8238,7 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -8257,13 +8257,13 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8305,7 +8305,7 @@ void m68008_device::btst_dd_dpc_df8() // 013a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8338,11 +8338,11 @@ void m68008_device::btst_dd_dpc_df8() // 013a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -8360,13 +8360,13 @@ void m68008_device::btst_dd_dpc_df8() // 013a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8406,14 +8406,14 @@ void m68008_device::btst_dd_dpci_df8() // 013b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -8421,7 +8421,7 @@ void m68008_device::btst_dd_dpci_df8() // 013b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8455,7 +8455,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8491,11 +8491,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -8513,13 +8513,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8564,7 +8564,7 @@ void m68008_device::btst_dd_imm_df8() // 013c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8599,12 +8599,12 @@ void m68008_device::btst_dd_imm_df8() // 013c f1ff m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_dt; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8643,7 +8643,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -8656,7 +8656,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -8678,13 +8678,13 @@ void m68008_device::bchg_dd_ds_df8() // 0140 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8723,7 +8723,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8735,14 +8735,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8760,7 +8760,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8 // 1d6 mpil1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8792,7 +8792,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8 // 29e mpil2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -8808,7 +8808,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8 // 34e mpil3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -8825,7 +8825,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8 m_aob = m_au; set_16h(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -8842,7 +8842,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -8862,7 +8862,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -8905,11 +8905,11 @@ void m68008_device::bchg_dd_ais_df8() // 0150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -8928,7 +8928,7 @@ void m68008_device::bchg_dd_ais_df8() // 0150 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8963,7 +8963,7 @@ void m68008_device::bchg_dd_ais_df8() // 0150 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -8994,12 +8994,12 @@ void m68008_device::bchg_dd_aips_df8() // 0158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -9019,7 +9019,7 @@ void m68008_device::bchg_dd_aips_df8() // 0158 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9054,7 +9054,7 @@ void m68008_device::bchg_dd_aips_df8() // 0158 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9084,7 +9084,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -9092,7 +9092,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -9112,7 +9112,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9147,7 +9147,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9175,7 +9175,7 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -9208,11 +9208,11 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -9231,7 +9231,7 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9266,7 +9266,7 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9292,14 +9292,14 @@ void m68008_device::bchg_dd_dais_df8() // 0170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -9307,7 +9307,7 @@ void m68008_device::bchg_dd_dais_df8() // 0170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -9341,7 +9341,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -9377,11 +9377,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -9400,7 +9400,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9435,7 +9435,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9465,7 +9465,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9498,7 +9498,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -9518,7 +9518,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9553,7 +9553,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9581,7 +9581,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -9615,7 +9615,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9648,7 +9648,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -9668,7 +9668,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9703,7 +9703,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9735,13 +9735,13 @@ void m68008_device::bclr_dd_ds_df8() // 0180 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9777,14 +9777,14 @@ void m68008_device::bclr_dd_ds_df8() // 0180 f1f8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -9796,18 +9796,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -9825,7 +9825,7 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8 // 1ca mpow1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -9859,7 +9859,7 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -9875,7 +9875,7 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -9892,11 +9892,11 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -9939,11 +9939,11 @@ void m68008_device::bclr_dd_ais_df8() // 0190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -9961,12 +9961,12 @@ void m68008_device::bclr_dd_ais_df8() // 0190 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10001,7 +10001,7 @@ void m68008_device::bclr_dd_ais_df8() // 0190 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10032,12 +10032,12 @@ void m68008_device::bclr_dd_aips_df8() // 0198 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -10056,12 +10056,12 @@ void m68008_device::bclr_dd_aips_df8() // 0198 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10096,7 +10096,7 @@ void m68008_device::bclr_dd_aips_df8() // 0198 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10126,7 +10126,7 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -10134,7 +10134,7 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -10153,12 +10153,12 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10193,7 +10193,7 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10221,7 +10221,7 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -10254,11 +10254,11 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -10276,12 +10276,12 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10316,7 +10316,7 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10342,14 +10342,14 @@ void m68008_device::bclr_dd_dais_df8() // 01b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -10357,7 +10357,7 @@ void m68008_device::bclr_dd_dais_df8() // 01b0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -10391,7 +10391,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -10427,11 +10427,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -10449,12 +10449,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10489,7 +10489,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10519,7 +10519,7 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10552,7 +10552,7 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -10571,12 +10571,12 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10611,7 +10611,7 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10639,7 +10639,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -10673,7 +10673,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10706,7 +10706,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -10725,12 +10725,12 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10765,7 +10765,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10797,13 +10797,13 @@ void m68008_device::bset_dd_ds_df8() // 01c0 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10842,7 +10842,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10854,14 +10854,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10879,7 +10879,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8 // 1ce mpol1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -10912,7 +10912,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8 m_aob = m_au; set_8xh(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -10928,7 +10928,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -10945,7 +10945,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -10961,7 +10961,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -10978,11 +10978,11 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11025,11 +11025,11 @@ void m68008_device::bset_dd_ais_df8() // 01d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -11048,7 +11048,7 @@ void m68008_device::bset_dd_ais_df8() // 01d0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11083,7 +11083,7 @@ void m68008_device::bset_dd_ais_df8() // 01d0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11114,12 +11114,12 @@ void m68008_device::bset_dd_aips_df8() // 01d8 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -11139,7 +11139,7 @@ void m68008_device::bset_dd_aips_df8() // 01d8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11174,7 +11174,7 @@ void m68008_device::bset_dd_aips_df8() // 01d8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11204,7 +11204,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -11212,7 +11212,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -11232,7 +11232,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11267,7 +11267,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11295,7 +11295,7 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11328,11 +11328,11 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -11351,7 +11351,7 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11386,7 +11386,7 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11412,14 +11412,14 @@ void m68008_device::bset_dd_dais_df8() // 01f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -11427,7 +11427,7 @@ void m68008_device::bset_dd_dais_df8() // 01f0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11461,7 +11461,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11497,11 +11497,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -11520,7 +11520,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11555,7 +11555,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11585,7 +11585,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11618,7 +11618,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -11638,7 +11638,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11673,7 +11673,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11701,7 +11701,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11735,7 +11735,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11768,7 +11768,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -11788,7 +11788,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11823,7 +11823,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11852,7 +11852,7 @@ void m68008_device::andi_b_imm8_ds_df8() // 0200 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11885,7 +11885,7 @@ void m68008_device::andi_b_imm8_ds_df8() // 0200 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -11893,7 +11893,7 @@ void m68008_device::andi_b_imm8_ds_df8() // 0200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11937,7 +11937,7 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -11969,11 +11969,11 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -11991,7 +11991,7 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12028,7 +12028,7 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12055,7 +12055,7 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12090,12 +12090,12 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -12114,7 +12114,7 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12151,7 +12151,7 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12178,7 +12178,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12212,7 +12212,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -12220,7 +12220,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -12239,7 +12239,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12276,7 +12276,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12303,7 +12303,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12335,7 +12335,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12368,11 +12368,11 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -12390,7 +12390,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12427,7 +12427,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12454,7 +12454,7 @@ void m68008_device::andi_b_imm8_dais_df8() // 0230 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12484,14 +12484,14 @@ void m68008_device::andi_b_imm8_dais_df8() // 0230 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -12499,7 +12499,7 @@ void m68008_device::andi_b_imm8_dais_df8() // 0230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12533,7 +12533,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12569,11 +12569,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -12591,7 +12591,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12628,7 +12628,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12654,7 +12654,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12689,7 +12689,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -12722,7 +12722,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -12741,7 +12741,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12778,7 +12778,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12804,7 +12804,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12837,7 +12837,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -12871,7 +12871,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -12904,7 +12904,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -12923,7 +12923,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12960,7 +12960,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -12986,7 +12986,7 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13018,21 +13018,21 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt alu_and8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -13040,7 +13040,7 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13074,11 +13074,11 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13122,7 +13122,7 @@ void m68008_device::andi_w_imm16_ds_df8() // 0240 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13155,7 +13155,7 @@ void m68008_device::andi_w_imm16_ds_df8() // 0240 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -13163,7 +13163,7 @@ void m68008_device::andi_w_imm16_ds_df8() // 0240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13207,7 +13207,7 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13239,11 +13239,11 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13276,7 +13276,7 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13313,7 +13313,7 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13355,7 +13355,7 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13390,12 +13390,12 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -13429,7 +13429,7 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13466,7 +13466,7 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13508,7 +13508,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13542,7 +13542,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -13550,7 +13550,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -13584,7 +13584,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13621,7 +13621,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13663,7 +13663,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13695,7 +13695,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13728,11 +13728,11 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13765,7 +13765,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13802,7 +13802,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13844,7 +13844,7 @@ void m68008_device::andi_w_imm16_dais_df8() // 0270 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13874,14 +13874,14 @@ void m68008_device::andi_w_imm16_dais_df8() // 0270 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -13889,7 +13889,7 @@ void m68008_device::andi_w_imm16_dais_df8() // 0270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13923,7 +13923,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13959,11 +13959,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -13996,7 +13996,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14033,7 +14033,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14074,7 +14074,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14109,7 +14109,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14142,7 +14142,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -14176,7 +14176,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14213,7 +14213,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14254,7 +14254,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14287,7 +14287,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14321,7 +14321,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14354,7 +14354,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -14388,7 +14388,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14425,7 +14425,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14470,7 +14470,7 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14502,23 +14502,23 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt alu_and(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -14526,7 +14526,7 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14560,11 +14560,11 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14607,7 +14607,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14640,7 +14640,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14673,12 +14673,12 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14708,7 +14708,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry] alu_and(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -14717,7 +14717,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -14733,7 +14733,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14766,7 +14766,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14798,7 +14798,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -14833,7 +14833,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -14866,7 +14866,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14901,7 +14901,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -14936,7 +14936,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14977,7 +14977,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15010,7 +15010,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15042,7 +15042,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -15077,11 +15077,11 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15114,7 +15114,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15149,7 +15149,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -15184,7 +15184,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -15225,7 +15225,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15258,7 +15258,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15289,14 +15289,14 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15330,7 +15330,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15363,7 +15363,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15398,7 +15398,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -15433,7 +15433,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -15474,7 +15474,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15507,7 +15507,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15539,7 +15539,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15571,7 +15571,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -15606,7 +15606,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15639,7 +15639,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15674,7 +15674,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -15709,7 +15709,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -15750,7 +15750,7 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15783,7 +15783,7 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15813,14 +15813,14 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -15828,7 +15828,7 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15862,7 +15862,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15897,7 +15897,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -15932,7 +15932,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -15965,7 +15965,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16000,7 +16000,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -16035,7 +16035,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -16075,7 +16075,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16108,7 +16108,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16143,7 +16143,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16176,7 +16176,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -16211,7 +16211,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16244,7 +16244,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16279,7 +16279,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -16314,7 +16314,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -16354,7 +16354,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16387,7 +16387,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16420,7 +16420,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16454,7 +16454,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16487,7 +16487,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -16522,7 +16522,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -16555,7 +16555,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16590,7 +16590,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -16625,7 +16625,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -16699,7 +16699,7 @@ void m68008_device::subi_b_imm8_ds_df8() // 0400 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -16781,7 +16781,7 @@ void m68008_device::subi_b_imm8_ais_df8() // 0410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -16802,7 +16802,7 @@ void m68008_device::subi_b_imm8_ais_df8() // 0410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16902,7 +16902,7 @@ void m68008_device::subi_b_imm8_aips_df8() // 0418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -16921,7 +16921,7 @@ void m68008_device::subi_b_imm8_aips_df8() // 0418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17023,7 +17023,7 @@ void m68008_device::subi_b_imm8_pais_df8() // 0420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -17042,7 +17042,7 @@ void m68008_device::subi_b_imm8_pais_df8() // 0420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17168,7 +17168,7 @@ void m68008_device::subi_b_imm8_das_df8() // 0428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -17189,7 +17189,7 @@ void m68008_device::subi_b_imm8_das_df8() // 0428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17281,7 +17281,7 @@ void m68008_device::subi_b_imm8_dais_df8() // 0430 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -17363,7 +17363,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -17384,7 +17384,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17511,7 +17511,7 @@ void m68008_device::subi_b_imm8_adr16_df8() // 0438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -17530,7 +17530,7 @@ void m68008_device::subi_b_imm8_adr16_df8() // 0438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17688,7 +17688,7 @@ void m68008_device::subi_b_imm8_adr32_df8() // 0439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -17707,7 +17707,7 @@ void m68008_device::subi_b_imm8_adr32_df8() // 0439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17802,7 +17802,7 @@ void m68008_device::subi_w_imm16_ds_df8() // 0440 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -17884,7 +17884,7 @@ void m68008_device::subi_w_imm16_ais_df8() // 0450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -17920,7 +17920,7 @@ void m68008_device::subi_w_imm16_ais_df8() // 0450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18035,7 +18035,7 @@ void m68008_device::subi_w_imm16_aips_df8() // 0458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -18069,7 +18069,7 @@ void m68008_device::subi_w_imm16_aips_df8() // 0458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18186,7 +18186,7 @@ void m68008_device::subi_w_imm16_pais_df8() // 0460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -18220,7 +18220,7 @@ void m68008_device::subi_w_imm16_pais_df8() // 0460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18361,7 +18361,7 @@ void m68008_device::subi_w_imm16_das_df8() // 0468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -18397,7 +18397,7 @@ void m68008_device::subi_w_imm16_das_df8() // 0468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18504,7 +18504,7 @@ void m68008_device::subi_w_imm16_dais_df8() // 0470 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -18586,7 +18586,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -18622,7 +18622,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18764,7 +18764,7 @@ void m68008_device::subi_w_imm16_adr16_df8() // 0478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -18798,7 +18798,7 @@ void m68008_device::subi_w_imm16_adr16_df8() // 0478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18971,7 +18971,7 @@ void m68008_device::subi_w_imm16_adr32_df8() // 0479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -19005,7 +19005,7 @@ void m68008_device::subi_w_imm16_adr32_df8() // 0479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19146,7 +19146,7 @@ void m68008_device::subi_l_imm32_ds_df8() // 0480 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -19180,7 +19180,7 @@ void m68008_device::subi_l_imm32_ds_df8() // 0480 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -19267,7 +19267,7 @@ void m68008_device::subi_l_imm32_ais_df8() // 0490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -19334,7 +19334,7 @@ void m68008_device::subi_l_imm32_ais_df8() // 0490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19369,7 +19369,7 @@ void m68008_device::subi_l_imm32_ais_df8() // 0490 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -19507,7 +19507,7 @@ void m68008_device::subi_l_imm32_aips_df8() // 0498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -19577,7 +19577,7 @@ void m68008_device::subi_l_imm32_aips_df8() // 0498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19612,7 +19612,7 @@ void m68008_device::subi_l_imm32_aips_df8() // 0498 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -19749,7 +19749,7 @@ void m68008_device::subi_l_imm32_pais_df8() // 04a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -19821,7 +19821,7 @@ void m68008_device::subi_l_imm32_pais_df8() // 04a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19856,7 +19856,7 @@ void m68008_device::subi_l_imm32_pais_df8() // 04a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20025,7 +20025,7 @@ void m68008_device::subi_l_imm32_das_df8() // 04a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -20092,7 +20092,7 @@ void m68008_device::subi_l_imm32_das_df8() // 04a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20127,7 +20127,7 @@ void m68008_device::subi_l_imm32_das_df8() // 04a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20263,7 +20263,7 @@ void m68008_device::subi_l_imm32_dais_df8() // 04b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -20344,7 +20344,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -20411,7 +20411,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20446,7 +20446,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20617,7 +20617,7 @@ void m68008_device::subi_l_imm32_adr16_df8() // 04b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -20684,7 +20684,7 @@ void m68008_device::subi_l_imm32_adr16_df8() // 04b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20719,7 +20719,7 @@ void m68008_device::subi_l_imm32_adr16_df8() // 04b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20921,7 +20921,7 @@ void m68008_device::subi_l_imm32_adr32_df8() // 04b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -20988,7 +20988,7 @@ void m68008_device::subi_l_imm32_adr32_df8() // 04b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21023,7 +21023,7 @@ void m68008_device::subi_l_imm32_adr32_df8() // 04b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -21131,7 +21131,7 @@ void m68008_device::addi_b_imm8_ds_df8() // 0600 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -21213,7 +21213,7 @@ void m68008_device::addi_b_imm8_ais_df8() // 0610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21234,7 +21234,7 @@ void m68008_device::addi_b_imm8_ais_df8() // 0610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21334,7 +21334,7 @@ void m68008_device::addi_b_imm8_aips_df8() // 0618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -21353,7 +21353,7 @@ void m68008_device::addi_b_imm8_aips_df8() // 0618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21455,7 +21455,7 @@ void m68008_device::addi_b_imm8_pais_df8() // 0620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -21474,7 +21474,7 @@ void m68008_device::addi_b_imm8_pais_df8() // 0620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21600,7 +21600,7 @@ void m68008_device::addi_b_imm8_das_df8() // 0628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21621,7 +21621,7 @@ void m68008_device::addi_b_imm8_das_df8() // 0628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21713,7 +21713,7 @@ void m68008_device::addi_b_imm8_dais_df8() // 0630 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -21795,7 +21795,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21816,7 +21816,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21943,7 +21943,7 @@ void m68008_device::addi_b_imm8_adr16_df8() // 0638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -21962,7 +21962,7 @@ void m68008_device::addi_b_imm8_adr16_df8() // 0638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22120,7 +22120,7 @@ void m68008_device::addi_b_imm8_adr32_df8() // 0639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -22139,7 +22139,7 @@ void m68008_device::addi_b_imm8_adr32_df8() // 0639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22234,7 +22234,7 @@ void m68008_device::addi_w_imm16_ds_df8() // 0640 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -22316,7 +22316,7 @@ void m68008_device::addi_w_imm16_ais_df8() // 0650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -22352,7 +22352,7 @@ void m68008_device::addi_w_imm16_ais_df8() // 0650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22467,7 +22467,7 @@ void m68008_device::addi_w_imm16_aips_df8() // 0658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -22501,7 +22501,7 @@ void m68008_device::addi_w_imm16_aips_df8() // 0658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22618,7 +22618,7 @@ void m68008_device::addi_w_imm16_pais_df8() // 0660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -22652,7 +22652,7 @@ void m68008_device::addi_w_imm16_pais_df8() // 0660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22793,7 +22793,7 @@ void m68008_device::addi_w_imm16_das_df8() // 0668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -22829,7 +22829,7 @@ void m68008_device::addi_w_imm16_das_df8() // 0668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22936,7 +22936,7 @@ void m68008_device::addi_w_imm16_dais_df8() // 0670 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -23018,7 +23018,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -23054,7 +23054,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23196,7 +23196,7 @@ void m68008_device::addi_w_imm16_adr16_df8() // 0678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -23230,7 +23230,7 @@ void m68008_device::addi_w_imm16_adr16_df8() // 0678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23403,7 +23403,7 @@ void m68008_device::addi_w_imm16_adr32_df8() // 0679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -23437,7 +23437,7 @@ void m68008_device::addi_w_imm16_adr32_df8() // 0679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23578,7 +23578,7 @@ void m68008_device::addi_l_imm32_ds_df8() // 0680 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -23612,7 +23612,7 @@ void m68008_device::addi_l_imm32_ds_df8() // 0680 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -23699,7 +23699,7 @@ void m68008_device::addi_l_imm32_ais_df8() // 0690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -23766,7 +23766,7 @@ void m68008_device::addi_l_imm32_ais_df8() // 0690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23801,7 +23801,7 @@ void m68008_device::addi_l_imm32_ais_df8() // 0690 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23939,7 +23939,7 @@ void m68008_device::addi_l_imm32_aips_df8() // 0698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -24009,7 +24009,7 @@ void m68008_device::addi_l_imm32_aips_df8() // 0698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24044,7 +24044,7 @@ void m68008_device::addi_l_imm32_aips_df8() // 0698 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24181,7 +24181,7 @@ void m68008_device::addi_l_imm32_pais_df8() // 06a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -24253,7 +24253,7 @@ void m68008_device::addi_l_imm32_pais_df8() // 06a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24288,7 +24288,7 @@ void m68008_device::addi_l_imm32_pais_df8() // 06a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24457,7 +24457,7 @@ void m68008_device::addi_l_imm32_das_df8() // 06a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -24524,7 +24524,7 @@ void m68008_device::addi_l_imm32_das_df8() // 06a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24559,7 +24559,7 @@ void m68008_device::addi_l_imm32_das_df8() // 06a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24695,7 +24695,7 @@ void m68008_device::addi_l_imm32_dais_df8() // 06b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -24776,7 +24776,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -24843,7 +24843,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24878,7 +24878,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -25049,7 +25049,7 @@ void m68008_device::addi_l_imm32_adr16_df8() // 06b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -25116,7 +25116,7 @@ void m68008_device::addi_l_imm32_adr16_df8() // 06b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25151,7 +25151,7 @@ void m68008_device::addi_l_imm32_adr16_df8() // 06b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -25353,7 +25353,7 @@ void m68008_device::addi_l_imm32_adr32_df8() // 06b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -25420,7 +25420,7 @@ void m68008_device::addi_l_imm32_adr32_df8() // 06b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25455,7 +25455,7 @@ void m68008_device::addi_l_imm32_adr32_df8() // 06b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -25531,7 +25531,7 @@ void m68008_device::btst_imm8_ds_df8() // 0800 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25567,13 +25567,13 @@ void m68008_device::btst_imm8_ds_df8() // 0800 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -25612,7 +25612,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -25625,7 +25625,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -25644,7 +25644,7 @@ void m68008_device::btst_imm8_ais_df8() // 0810 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25676,11 +25676,11 @@ void m68008_device::btst_imm8_ais_df8() // 0810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -25698,13 +25698,13 @@ void m68008_device::btst_imm8_ais_df8() // 0810 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25748,7 +25748,7 @@ void m68008_device::btst_imm8_aips_df8() // 0818 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25783,12 +25783,12 @@ void m68008_device::btst_imm8_aips_df8() // 0818 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -25807,13 +25807,13 @@ void m68008_device::btst_imm8_aips_df8() // 0818 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25857,7 +25857,7 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25891,7 +25891,7 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -25899,7 +25899,7 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -25918,13 +25918,13 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -25968,7 +25968,7 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26000,7 +26000,7 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26033,11 +26033,11 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -26055,13 +26055,13 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26105,7 +26105,7 @@ void m68008_device::btst_imm8_dais_df8() // 0830 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26135,14 +26135,14 @@ void m68008_device::btst_imm8_dais_df8() // 0830 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -26150,7 +26150,7 @@ void m68008_device::btst_imm8_dais_df8() // 0830 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26184,7 +26184,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26220,11 +26220,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -26242,13 +26242,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26291,7 +26291,7 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26326,7 +26326,7 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -26359,7 +26359,7 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -26378,13 +26378,13 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26427,7 +26427,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26460,7 +26460,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26494,7 +26494,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -26527,7 +26527,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -26546,13 +26546,13 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26595,7 +26595,7 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26627,7 +26627,7 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26660,11 +26660,11 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -26682,13 +26682,13 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26731,7 +26731,7 @@ void m68008_device::btst_imm8_dpci_df8() // 083b ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26761,14 +26761,14 @@ void m68008_device::btst_imm8_dpci_df8() // 083b ffff m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -26776,7 +26776,7 @@ void m68008_device::btst_imm8_dpci_df8() // 083b ffff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26810,7 +26810,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26846,11 +26846,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -26868,13 +26868,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26918,7 +26918,7 @@ void m68008_device::bchg_imm8_ds_df8() // 0840 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -26954,13 +26954,13 @@ void m68008_device::bchg_imm8_ds_df8() // 0840 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -26999,7 +26999,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -27011,14 +27011,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -27037,7 +27037,7 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27069,11 +27069,11 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -27092,7 +27092,7 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27127,7 +27127,7 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27156,7 +27156,7 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27191,12 +27191,12 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -27216,7 +27216,7 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27251,7 +27251,7 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27280,7 +27280,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27314,7 +27314,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -27322,7 +27322,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -27342,7 +27342,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27377,7 +27377,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27406,7 +27406,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27438,7 +27438,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27471,11 +27471,11 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -27494,7 +27494,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27529,7 +27529,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27558,7 +27558,7 @@ void m68008_device::bchg_imm8_dais_df8() // 0870 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27588,14 +27588,14 @@ void m68008_device::bchg_imm8_dais_df8() // 0870 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -27603,7 +27603,7 @@ void m68008_device::bchg_imm8_dais_df8() // 0870 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27637,7 +27637,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27673,11 +27673,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -27696,7 +27696,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27731,7 +27731,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27759,7 +27759,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27794,7 +27794,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27827,7 +27827,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -27847,7 +27847,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -27882,7 +27882,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27910,7 +27910,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27943,7 +27943,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -27977,7 +27977,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28010,7 +28010,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -28030,7 +28030,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28065,7 +28065,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28094,7 +28094,7 @@ void m68008_device::bclr_imm8_ds_df8() // 0880 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28130,13 +28130,13 @@ void m68008_device::bclr_imm8_ds_df8() // 0880 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28172,14 +28172,14 @@ void m68008_device::bclr_imm8_ds_df8() // 0880 fff8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -28191,18 +28191,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -28221,7 +28221,7 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28253,11 +28253,11 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -28275,12 +28275,12 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28315,7 +28315,7 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28344,7 +28344,7 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28379,12 +28379,12 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -28403,12 +28403,12 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28443,7 +28443,7 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28472,7 +28472,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28506,7 +28506,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -28514,7 +28514,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -28533,12 +28533,12 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28573,7 +28573,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28602,7 +28602,7 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28634,7 +28634,7 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28667,11 +28667,11 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -28689,12 +28689,12 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28729,7 +28729,7 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28758,7 +28758,7 @@ void m68008_device::bclr_imm8_dais_df8() // 08b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28788,14 +28788,14 @@ void m68008_device::bclr_imm8_dais_df8() // 08b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -28803,7 +28803,7 @@ void m68008_device::bclr_imm8_dais_df8() // 08b0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28837,7 +28837,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28873,11 +28873,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -28895,12 +28895,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -28935,7 +28935,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28963,7 +28963,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -28998,7 +28998,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29031,7 +29031,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -29050,12 +29050,12 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29090,7 +29090,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29118,7 +29118,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29151,7 +29151,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29185,7 +29185,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29218,7 +29218,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -29237,12 +29237,12 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29277,7 +29277,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29306,7 +29306,7 @@ void m68008_device::bset_imm8_ds_df8() // 08c0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29342,13 +29342,13 @@ void m68008_device::bset_imm8_ds_df8() // 08c0 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29387,7 +29387,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29399,14 +29399,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29425,7 +29425,7 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29457,11 +29457,11 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -29480,7 +29480,7 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29515,7 +29515,7 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29544,7 +29544,7 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29579,12 +29579,12 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -29604,7 +29604,7 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29639,7 +29639,7 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29668,7 +29668,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29702,7 +29702,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -29710,7 +29710,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -29730,7 +29730,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29765,7 +29765,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29794,7 +29794,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29826,7 +29826,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29859,11 +29859,11 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -29882,7 +29882,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29917,7 +29917,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29946,7 +29946,7 @@ void m68008_device::bset_imm8_dais_df8() // 08f0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -29976,14 +29976,14 @@ void m68008_device::bset_imm8_dais_df8() // 08f0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -29991,7 +29991,7 @@ void m68008_device::bset_imm8_dais_df8() // 08f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30025,7 +30025,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30061,11 +30061,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -30084,7 +30084,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30119,7 +30119,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -30147,7 +30147,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30182,7 +30182,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30215,7 +30215,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -30235,7 +30235,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30270,7 +30270,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -30298,7 +30298,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30331,7 +30331,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30365,7 +30365,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30398,7 +30398,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -30418,7 +30418,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30453,7 +30453,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -30482,7 +30482,7 @@ void m68008_device::eori_b_imm8_ds_df8() // 0a00 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30515,7 +30515,7 @@ void m68008_device::eori_b_imm8_ds_df8() // 0a00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -30523,7 +30523,7 @@ void m68008_device::eori_b_imm8_ds_df8() // 0a00 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30567,7 +30567,7 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30599,11 +30599,11 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -30621,7 +30621,7 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -30658,7 +30658,7 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -30685,7 +30685,7 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30720,12 +30720,12 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -30744,7 +30744,7 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -30781,7 +30781,7 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -30808,7 +30808,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30842,7 +30842,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -30850,7 +30850,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -30869,7 +30869,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -30906,7 +30906,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -30933,7 +30933,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30965,7 +30965,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -30998,11 +30998,11 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -31020,7 +31020,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31057,7 +31057,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -31084,7 +31084,7 @@ void m68008_device::eori_b_imm8_dais_df8() // 0a30 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31114,14 +31114,14 @@ void m68008_device::eori_b_imm8_dais_df8() // 0a30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -31129,7 +31129,7 @@ void m68008_device::eori_b_imm8_dais_df8() // 0a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31163,7 +31163,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31199,11 +31199,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -31221,7 +31221,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31258,7 +31258,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -31284,7 +31284,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31319,7 +31319,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31352,7 +31352,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -31371,7 +31371,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31408,7 +31408,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -31434,7 +31434,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31467,7 +31467,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31501,7 +31501,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31534,7 +31534,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -31553,7 +31553,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31590,7 +31590,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -31616,7 +31616,7 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31648,21 +31648,21 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt alu_eor8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -31670,7 +31670,7 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31704,11 +31704,11 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31752,7 +31752,7 @@ void m68008_device::eori_w_imm16_ds_df8() // 0a40 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31785,7 +31785,7 @@ void m68008_device::eori_w_imm16_ds_df8() // 0a40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -31793,7 +31793,7 @@ void m68008_device::eori_w_imm16_ds_df8() // 0a40 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31837,7 +31837,7 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31869,11 +31869,11 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -31906,7 +31906,7 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31943,7 +31943,7 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -31985,7 +31985,7 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32020,12 +32020,12 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -32059,7 +32059,7 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32096,7 +32096,7 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32138,7 +32138,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32172,7 +32172,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -32180,7 +32180,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -32214,7 +32214,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32251,7 +32251,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32293,7 +32293,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32325,7 +32325,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32358,11 +32358,11 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32395,7 +32395,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32432,7 +32432,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32474,7 +32474,7 @@ void m68008_device::eori_w_imm16_dais_df8() // 0a70 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32504,14 +32504,14 @@ void m68008_device::eori_w_imm16_dais_df8() // 0a70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -32519,7 +32519,7 @@ void m68008_device::eori_w_imm16_dais_df8() // 0a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32553,7 +32553,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32589,11 +32589,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32626,7 +32626,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32663,7 +32663,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32704,7 +32704,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32739,7 +32739,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32772,7 +32772,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -32806,7 +32806,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32843,7 +32843,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32884,7 +32884,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32917,7 +32917,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -32951,7 +32951,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32984,7 +32984,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -33018,7 +33018,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -33055,7 +33055,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -33100,7 +33100,7 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33132,23 +33132,23 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt alu_eor(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -33156,7 +33156,7 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33190,11 +33190,11 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33237,7 +33237,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33270,7 +33270,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33303,12 +33303,12 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33338,7 +33338,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry] alu_eor(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -33347,7 +33347,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -33363,7 +33363,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33396,7 +33396,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33428,7 +33428,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -33463,7 +33463,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33496,7 +33496,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -33531,7 +33531,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -33566,7 +33566,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -33607,7 +33607,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33640,7 +33640,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33672,7 +33672,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -33707,11 +33707,11 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33744,7 +33744,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -33779,7 +33779,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -33814,7 +33814,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -33855,7 +33855,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33888,7 +33888,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33919,14 +33919,14 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33960,7 +33960,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -33993,7 +33993,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34028,7 +34028,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34063,7 +34063,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34104,7 +34104,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34137,7 +34137,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34169,7 +34169,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34201,7 +34201,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -34236,7 +34236,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34269,7 +34269,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34304,7 +34304,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34339,7 +34339,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34380,7 +34380,7 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34413,7 +34413,7 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34443,14 +34443,14 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -34458,7 +34458,7 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34492,7 +34492,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34527,7 +34527,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -34562,7 +34562,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34595,7 +34595,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34630,7 +34630,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34665,7 +34665,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34705,7 +34705,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34738,7 +34738,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34773,7 +34773,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34806,7 +34806,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -34841,7 +34841,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -34874,7 +34874,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34909,7 +34909,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34944,7 +34944,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34984,7 +34984,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -35017,7 +35017,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -35050,7 +35050,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -35084,7 +35084,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35117,7 +35117,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -35152,7 +35152,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -35185,7 +35185,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35220,7 +35220,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -35255,7 +35255,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -35329,7 +35329,7 @@ void m68008_device::cmpi_b_imm8_ds_df8() // 0c00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -35410,7 +35410,7 @@ void m68008_device::cmpi_b_imm8_ais_df8() // 0c10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -35431,7 +35431,7 @@ void m68008_device::cmpi_b_imm8_ais_df8() // 0c10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35517,7 +35517,7 @@ void m68008_device::cmpi_b_imm8_aips_df8() // 0c18 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -35536,7 +35536,7 @@ void m68008_device::cmpi_b_imm8_aips_df8() // 0c18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35624,7 +35624,7 @@ void m68008_device::cmpi_b_imm8_pais_df8() // 0c20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -35643,7 +35643,7 @@ void m68008_device::cmpi_b_imm8_pais_df8() // 0c20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35755,7 +35755,7 @@ void m68008_device::cmpi_b_imm8_das_df8() // 0c28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -35776,7 +35776,7 @@ void m68008_device::cmpi_b_imm8_das_df8() // 0c28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35854,7 +35854,7 @@ void m68008_device::cmpi_b_imm8_dais_df8() // 0c30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -35936,7 +35936,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -35957,7 +35957,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36070,7 +36070,7 @@ void m68008_device::cmpi_b_imm8_adr16_df8() // 0c38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -36089,7 +36089,7 @@ void m68008_device::cmpi_b_imm8_adr16_df8() // 0c38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36233,7 +36233,7 @@ void m68008_device::cmpi_b_imm8_adr32_df8() // 0c39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -36252,7 +36252,7 @@ void m68008_device::cmpi_b_imm8_adr32_df8() // 0c39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36333,7 +36333,7 @@ void m68008_device::cmpi_w_imm16_ds_df8() // 0c40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -36414,7 +36414,7 @@ void m68008_device::cmpi_w_imm16_ais_df8() // 0c50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -36450,7 +36450,7 @@ void m68008_device::cmpi_w_imm16_ais_df8() // 0c50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36536,7 +36536,7 @@ void m68008_device::cmpi_w_imm16_aips_df8() // 0c58 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -36570,7 +36570,7 @@ void m68008_device::cmpi_w_imm16_aips_df8() // 0c58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36658,7 +36658,7 @@ void m68008_device::cmpi_w_imm16_pais_df8() // 0c60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -36692,7 +36692,7 @@ void m68008_device::cmpi_w_imm16_pais_df8() // 0c60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36804,7 +36804,7 @@ void m68008_device::cmpi_w_imm16_das_df8() // 0c68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -36840,7 +36840,7 @@ void m68008_device::cmpi_w_imm16_das_df8() // 0c68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36918,7 +36918,7 @@ void m68008_device::cmpi_w_imm16_dais_df8() // 0c70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -37000,7 +37000,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -37036,7 +37036,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -37149,7 +37149,7 @@ void m68008_device::cmpi_w_imm16_adr16_df8() // 0c78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -37183,7 +37183,7 @@ void m68008_device::cmpi_w_imm16_adr16_df8() // 0c78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -37327,7 +37327,7 @@ void m68008_device::cmpi_w_imm16_adr32_df8() // 0c79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -37361,7 +37361,7 @@ void m68008_device::cmpi_w_imm16_adr32_df8() // 0c79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -37474,11 +37474,11 @@ void m68008_device::cmpi_l_imm32_ds_df8() // 0c80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 239 rcal2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37591,7 +37591,7 @@ void m68008_device::cmpi_l_imm32_ais_df8() // 0c90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -37658,13 +37658,13 @@ void m68008_device::cmpi_l_imm32_ais_df8() // 0c90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37772,7 +37772,7 @@ void m68008_device::cmpi_l_imm32_aips_df8() // 0c98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -37842,13 +37842,13 @@ void m68008_device::cmpi_l_imm32_aips_df8() // 0c98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37955,7 +37955,7 @@ void m68008_device::cmpi_l_imm32_pais_df8() // 0ca0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -38027,13 +38027,13 @@ void m68008_device::cmpi_l_imm32_pais_df8() // 0ca0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38172,7 +38172,7 @@ void m68008_device::cmpi_l_imm32_das_df8() // 0ca8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -38239,13 +38239,13 @@ void m68008_device::cmpi_l_imm32_das_df8() // 0ca8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38351,7 +38351,7 @@ void m68008_device::cmpi_l_imm32_dais_df8() // 0cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -38432,7 +38432,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -38499,13 +38499,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38646,7 +38646,7 @@ void m68008_device::cmpi_l_imm32_adr16_df8() // 0cb8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -38713,13 +38713,13 @@ void m68008_device::cmpi_l_imm32_adr16_df8() // 0cb8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38891,7 +38891,7 @@ void m68008_device::cmpi_l_imm32_adr32_df8() // 0cb9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -38958,13 +38958,13 @@ void m68008_device::cmpi_l_imm32_adr32_df8() // 0cb9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39012,7 +39012,7 @@ void m68008_device::move_b_ds_dd_df8() // 1000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -39062,7 +39062,7 @@ void m68008_device::move_b_ais_dd_df8() // 1010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39084,7 +39084,7 @@ void m68008_device::move_b_ais_dd_df8() // 1010 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39138,7 +39138,7 @@ void m68008_device::move_b_aips_dd_df8() // 1018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -39158,7 +39158,7 @@ void m68008_device::move_b_aips_dd_df8() // 1018 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39214,7 +39214,7 @@ void m68008_device::move_b_pais_dd_df8() // 1020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -39234,7 +39234,7 @@ void m68008_device::move_b_pais_dd_df8() // 1020 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39314,7 +39314,7 @@ void m68008_device::move_b_das_dd_df8() // 1028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39336,7 +39336,7 @@ void m68008_device::move_b_das_dd_df8() // 1028 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39382,7 +39382,7 @@ void m68008_device::move_b_dais_dd_df8() // 1030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -39464,7 +39464,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39486,7 +39486,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39567,7 +39567,7 @@ void m68008_device::move_b_adr16_dd_df8() // 1038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -39587,7 +39587,7 @@ void m68008_device::move_b_adr16_dd_df8() // 1038 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39699,7 +39699,7 @@ void m68008_device::move_b_adr32_dd_df8() // 1039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -39719,7 +39719,7 @@ void m68008_device::move_b_adr32_dd_df8() // 1039 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39798,7 +39798,7 @@ void m68008_device::move_b_dpc_dd_df8() // 103a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39820,7 +39820,7 @@ void m68008_device::move_b_dpc_dd_df8() // 103a f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39865,7 +39865,7 @@ void m68008_device::move_b_dpci_dd_df8() // 103b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -39947,7 +39947,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39969,7 +39969,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -40053,7 +40053,7 @@ void m68008_device::move_b_imm8_dd_df8() // 103c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -40106,7 +40106,7 @@ void m68008_device::move_b_ds_aid_df8() // 1080 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40169,7 +40169,7 @@ void m68008_device::move_b_ais_aid_df8() // 1090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -40190,7 +40190,7 @@ void m68008_device::move_b_ais_aid_df8() // 1090 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40259,7 +40259,7 @@ void m68008_device::move_b_aips_aid_df8() // 1098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -40278,7 +40278,7 @@ void m68008_device::move_b_aips_aid_df8() // 1098 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40349,7 +40349,7 @@ void m68008_device::move_b_pais_aid_df8() // 10a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -40368,7 +40368,7 @@ void m68008_device::move_b_pais_aid_df8() // 10a0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40463,7 +40463,7 @@ void m68008_device::move_b_das_aid_df8() // 10a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -40484,7 +40484,7 @@ void m68008_device::move_b_das_aid_df8() // 10a8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40545,7 +40545,7 @@ void m68008_device::move_b_dais_aid_df8() // 10b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -40627,7 +40627,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -40648,7 +40648,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40744,7 +40744,7 @@ void m68008_device::move_b_adr16_aid_df8() // 10b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -40763,7 +40763,7 @@ void m68008_device::move_b_adr16_aid_df8() // 10b8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40890,7 +40890,7 @@ void m68008_device::move_b_adr32_aid_df8() // 10b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -40909,7 +40909,7 @@ void m68008_device::move_b_adr32_aid_df8() // 10b9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41003,7 +41003,7 @@ void m68008_device::move_b_dpc_aid_df8() // 10ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41024,7 +41024,7 @@ void m68008_device::move_b_dpc_aid_df8() // 10ba f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41084,7 +41084,7 @@ void m68008_device::move_b_dpci_aid_df8() // 10bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -41166,7 +41166,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41187,7 +41187,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41286,7 +41286,7 @@ void m68008_device::move_b_imm8_aid_df8() // 10bc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41352,7 +41352,7 @@ void m68008_device::move_b_ds_aipd_df8() // 10c0 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41414,7 +41414,7 @@ void m68008_device::move_b_ais_aipd_df8() // 10d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41436,7 +41436,7 @@ void m68008_device::move_b_ais_aipd_df8() // 10d0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41504,7 +41504,7 @@ void m68008_device::move_b_aips_aipd_df8() // 10d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -41524,7 +41524,7 @@ void m68008_device::move_b_aips_aipd_df8() // 10d8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41594,7 +41594,7 @@ void m68008_device::move_b_pais_aipd_df8() // 10e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -41614,7 +41614,7 @@ void m68008_device::move_b_pais_aipd_df8() // 10e0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41708,7 +41708,7 @@ void m68008_device::move_b_das_aipd_df8() // 10e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41730,7 +41730,7 @@ void m68008_device::move_b_das_aipd_df8() // 10e8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41790,7 +41790,7 @@ void m68008_device::move_b_dais_aipd_df8() // 10f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -41872,7 +41872,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41894,7 +41894,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41989,7 +41989,7 @@ void m68008_device::move_b_adr16_aipd_df8() // 10f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -42009,7 +42009,7 @@ void m68008_device::move_b_adr16_aipd_df8() // 10f8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42135,7 +42135,7 @@ void m68008_device::move_b_adr32_aipd_df8() // 10f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -42155,7 +42155,7 @@ void m68008_device::move_b_adr32_aipd_df8() // 10f9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42248,7 +42248,7 @@ void m68008_device::move_b_dpc_aipd_df8() // 10fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42270,7 +42270,7 @@ void m68008_device::move_b_dpc_aipd_df8() // 10fa f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42329,7 +42329,7 @@ void m68008_device::move_b_dpci_aipd_df8() // 10fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -42411,7 +42411,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42433,7 +42433,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42531,7 +42531,7 @@ void m68008_device::move_b_imm8_aipd_df8() // 10fc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42595,7 +42595,7 @@ void m68008_device::move_b_ds_paid_df8() // 1100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42658,7 +42658,7 @@ void m68008_device::move_b_ais_paid_df8() // 1110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42679,7 +42679,7 @@ void m68008_device::move_b_ais_paid_df8() // 1110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42748,7 +42748,7 @@ void m68008_device::move_b_aips_paid_df8() // 1118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -42767,7 +42767,7 @@ void m68008_device::move_b_aips_paid_df8() // 1118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42838,7 +42838,7 @@ void m68008_device::move_b_pais_paid_df8() // 1120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -42857,7 +42857,7 @@ void m68008_device::move_b_pais_paid_df8() // 1120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42952,7 +42952,7 @@ void m68008_device::move_b_das_paid_df8() // 1128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42973,7 +42973,7 @@ void m68008_device::move_b_das_paid_df8() // 1128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43034,7 +43034,7 @@ void m68008_device::move_b_dais_paid_df8() // 1130 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -43116,7 +43116,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43137,7 +43137,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43233,7 +43233,7 @@ void m68008_device::move_b_adr16_paid_df8() // 1138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -43252,7 +43252,7 @@ void m68008_device::move_b_adr16_paid_df8() // 1138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43379,7 +43379,7 @@ void m68008_device::move_b_adr32_paid_df8() // 1139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -43398,7 +43398,7 @@ void m68008_device::move_b_adr32_paid_df8() // 1139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43492,7 +43492,7 @@ void m68008_device::move_b_dpc_paid_df8() // 113a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43513,7 +43513,7 @@ void m68008_device::move_b_dpc_paid_df8() // 113a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43573,7 +43573,7 @@ void m68008_device::move_b_dpci_paid_df8() // 113b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -43655,7 +43655,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43676,7 +43676,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43774,7 +43774,7 @@ void m68008_device::move_b_imm8_paid_df8() // 113c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43870,7 +43870,7 @@ void m68008_device::move_b_ds_dad_df8() // 1140 f1f8 m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -43934,7 +43934,7 @@ void m68008_device::move_b_ais_dad_df8() // 1150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43954,7 +43954,7 @@ void m68008_device::move_b_ais_dad_df8() // 1150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44060,7 +44060,7 @@ void m68008_device::move_b_aips_dad_df8() // 1158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -44078,7 +44078,7 @@ void m68008_device::move_b_aips_dad_df8() // 1158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44186,7 +44186,7 @@ void m68008_device::move_b_pais_dad_df8() // 1160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -44204,7 +44204,7 @@ void m68008_device::move_b_pais_dad_df8() // 1160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44336,7 +44336,7 @@ void m68008_device::move_b_das_dad_df8() // 1168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -44356,7 +44356,7 @@ void m68008_device::move_b_das_dad_df8() // 1168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44454,7 +44454,7 @@ void m68008_device::move_b_dais_dad_df8() // 1170 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -44536,7 +44536,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -44556,7 +44556,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44689,7 +44689,7 @@ void m68008_device::move_b_adr16_dad_df8() // 1178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -44707,7 +44707,7 @@ void m68008_device::move_b_adr16_dad_df8() // 1178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44871,7 +44871,7 @@ void m68008_device::move_b_adr32_dad_df8() // 1179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -44889,7 +44889,7 @@ void m68008_device::move_b_adr32_dad_df8() // 1179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45020,7 +45020,7 @@ void m68008_device::move_b_dpc_dad_df8() // 117a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -45040,7 +45040,7 @@ void m68008_device::move_b_dpc_dad_df8() // 117a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45137,7 +45137,7 @@ void m68008_device::move_b_dpci_dad_df8() // 117b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -45219,7 +45219,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -45239,7 +45239,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45405,7 +45405,7 @@ void m68008_device::move_b_imm8_dad_df8() // 117c f1ff m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -45467,7 +45467,7 @@ void m68008_device::move_b_ds_daid_df8() // 1180 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = m_irdi & 7; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -45551,7 +45551,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -45615,7 +45615,7 @@ void m68008_device::move_b_ais_daid_df8() // 1190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -45632,7 +45632,7 @@ void m68008_device::move_b_ais_daid_df8() // 1190 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -45647,7 +45647,7 @@ void m68008_device::move_b_ais_daid_df8() // 1190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45681,7 +45681,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45789,7 +45789,7 @@ void m68008_device::move_b_aips_daid_df8() // 1198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -45804,7 +45804,7 @@ void m68008_device::move_b_aips_daid_df8() // 1198 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -45819,7 +45819,7 @@ void m68008_device::move_b_aips_daid_df8() // 1198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45853,7 +45853,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45963,7 +45963,7 @@ void m68008_device::move_b_pais_daid_df8() // 11a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -45978,7 +45978,7 @@ void m68008_device::move_b_pais_daid_df8() // 11a0 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -45993,7 +45993,7 @@ void m68008_device::move_b_pais_daid_df8() // 11a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46027,7 +46027,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46161,7 +46161,7 @@ void m68008_device::move_b_das_daid_df8() // 11a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46178,7 +46178,7 @@ void m68008_device::move_b_das_daid_df8() // 11a8 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46193,7 +46193,7 @@ void m68008_device::move_b_das_daid_df8() // 11a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46227,7 +46227,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46327,7 +46327,7 @@ void m68008_device::move_b_dais_daid_df8() // 11b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -46409,7 +46409,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46426,7 +46426,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46441,7 +46441,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46475,7 +46475,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46610,7 +46610,7 @@ void m68008_device::move_b_adr16_daid_df8() // 11b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -46625,7 +46625,7 @@ void m68008_device::move_b_adr16_daid_df8() // 11b8 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46640,7 +46640,7 @@ void m68008_device::move_b_adr16_daid_df8() // 11b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46674,7 +46674,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46840,7 +46840,7 @@ void m68008_device::move_b_adr32_daid_df8() // 11b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -46855,7 +46855,7 @@ void m68008_device::move_b_adr32_daid_df8() // 11b9 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46870,7 +46870,7 @@ void m68008_device::move_b_adr32_daid_df8() // 11b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46904,7 +46904,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47037,7 +47037,7 @@ void m68008_device::move_b_dpc_daid_df8() // 11ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47054,7 +47054,7 @@ void m68008_device::move_b_dpc_daid_df8() // 11ba f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -47069,7 +47069,7 @@ void m68008_device::move_b_dpc_daid_df8() // 11ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47103,7 +47103,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47202,7 +47202,7 @@ void m68008_device::move_b_dpci_daid_df8() // 11bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -47284,7 +47284,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47301,7 +47301,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -47316,7 +47316,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47350,7 +47350,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47483,7 +47483,7 @@ void m68008_device::move_b_imm8_daid_df8() // 11bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -47567,7 +47567,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47632,7 +47632,7 @@ void m68008_device::move_b_ds_adr16_df8() // 11c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47731,7 +47731,7 @@ void m68008_device::move_b_ais_adr16_df8() // 11d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47751,7 +47751,7 @@ void m68008_device::move_b_ais_adr16_df8() // 11d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47856,7 +47856,7 @@ void m68008_device::move_b_aips_adr16_df8() // 11d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -47874,7 +47874,7 @@ void m68008_device::move_b_aips_adr16_df8() // 11d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47981,7 +47981,7 @@ void m68008_device::move_b_pais_adr16_df8() // 11e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -47999,7 +47999,7 @@ void m68008_device::move_b_pais_adr16_df8() // 11e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48130,7 +48130,7 @@ void m68008_device::move_b_das_adr16_df8() // 11e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48150,7 +48150,7 @@ void m68008_device::move_b_das_adr16_df8() // 11e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48247,7 +48247,7 @@ void m68008_device::move_b_dais_adr16_df8() // 11f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -48329,7 +48329,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48349,7 +48349,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48481,7 +48481,7 @@ void m68008_device::move_b_adr16_adr16_df8() // 11f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -48499,7 +48499,7 @@ void m68008_device::move_b_adr16_adr16_df8() // 11f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48662,7 +48662,7 @@ void m68008_device::move_b_adr32_adr16_df8() // 11f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -48680,7 +48680,7 @@ void m68008_device::move_b_adr32_adr16_df8() // 11f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48810,7 +48810,7 @@ void m68008_device::move_b_dpc_adr16_df8() // 11fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48830,7 +48830,7 @@ void m68008_device::move_b_dpc_adr16_df8() // 11fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48926,7 +48926,7 @@ void m68008_device::move_b_dpc_adr16_df8() // 11fa ffff void m68008_device::move_b_dpci_adr16_df8() // 11fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -49008,7 +49008,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49028,7 +49028,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49162,7 +49162,7 @@ void m68008_device::move_b_imm8_adr16_df8() // 11fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49294,7 +49294,7 @@ void m68008_device::move_b_ds_adr32_df8() // 13c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49393,7 +49393,7 @@ void m68008_device::move_b_ais_adr32_df8() // 13d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49413,7 +49413,7 @@ void m68008_device::move_b_ais_adr32_df8() // 13d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49548,7 +49548,7 @@ void m68008_device::move_b_aips_adr32_df8() // 13d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -49566,7 +49566,7 @@ void m68008_device::move_b_aips_adr32_df8() // 13d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49703,7 +49703,7 @@ void m68008_device::move_b_pais_adr32_df8() // 13e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -49721,7 +49721,7 @@ void m68008_device::move_b_pais_adr32_df8() // 13e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49882,7 +49882,7 @@ void m68008_device::move_b_das_adr32_df8() // 13e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49902,7 +49902,7 @@ void m68008_device::move_b_das_adr32_df8() // 13e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50029,7 +50029,7 @@ void m68008_device::move_b_dais_adr32_df8() // 13f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -50111,7 +50111,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50131,7 +50131,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50293,7 +50293,7 @@ void m68008_device::move_b_adr16_adr32_df8() // 13f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -50311,7 +50311,7 @@ void m68008_device::move_b_adr16_adr32_df8() // 13f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50504,7 +50504,7 @@ void m68008_device::move_b_adr32_adr32_df8() // 13f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -50522,7 +50522,7 @@ void m68008_device::move_b_adr32_adr32_df8() // 13f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50682,7 +50682,7 @@ void m68008_device::move_b_dpc_adr32_df8() // 13fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50702,7 +50702,7 @@ void m68008_device::move_b_dpc_adr32_df8() // 13fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50828,7 +50828,7 @@ void m68008_device::move_b_dpc_adr32_df8() // 13fa ffff void m68008_device::move_b_dpci_adr32_df8() // 13fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -50910,7 +50910,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50930,7 +50930,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51125,7 +51125,7 @@ void m68008_device::move_b_imm8_adr32_df8() // 13fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51228,13 +51228,13 @@ void m68008_device::move_l_ds_dd_df8() // 2000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_da[rx] = m_at; @@ -51283,14 +51283,14 @@ void m68008_device::move_l_as_dd_df8() // 2008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51335,7 +51335,7 @@ void m68008_device::move_l_ais_dd_df8() // 2010 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -51403,14 +51403,14 @@ void m68008_device::move_l_ais_dd_df8() // 2010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51455,7 +51455,7 @@ void m68008_device::move_l_aips_dd_df8() // 2018 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -51526,14 +51526,14 @@ void m68008_device::move_l_aips_dd_df8() // 2018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51577,7 +51577,7 @@ void m68008_device::move_l_pais_dd_df8() // 2020 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -51650,14 +51650,14 @@ void m68008_device::move_l_pais_dd_df8() // 2020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51733,7 +51733,7 @@ void m68008_device::move_l_das_dd_df8() // 2028 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -51801,14 +51801,14 @@ void m68008_device::move_l_das_dd_df8() // 2028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51851,7 +51851,7 @@ void m68008_device::move_l_dais_dd_df8() // 2030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -51932,7 +51932,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -52000,14 +52000,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52085,7 +52085,7 @@ void m68008_device::move_l_adr16_dd_df8() // 2038 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -52153,14 +52153,14 @@ void m68008_device::move_l_adr16_dd_df8() // 2038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52269,7 +52269,7 @@ void m68008_device::move_l_adr32_dd_df8() // 2039 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -52337,14 +52337,14 @@ void m68008_device::move_l_adr32_dd_df8() // 2039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52419,7 +52419,7 @@ void m68008_device::move_l_dpc_dd_df8() // 203a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -52487,14 +52487,14 @@ void m68008_device::move_l_dpc_dd_df8() // 203a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52536,7 +52536,7 @@ void m68008_device::move_l_dpci_dd_df8() // 203b f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -52617,7 +52617,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -52685,14 +52685,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52804,14 +52804,14 @@ void m68008_device::move_l_imm32_dd_df8() // 203c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52859,13 +52859,13 @@ void m68008_device::movea_l_ds_ad_df8() // 2040 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -52912,12 +52912,12 @@ void m68008_device::movea_l_as_ad_df8() // 2048 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52962,7 +52962,7 @@ void m68008_device::movea_l_ais_ad_df8() // 2050 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -53030,13 +53030,13 @@ void m68008_device::movea_l_ais_ad_df8() // 2050 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -53080,7 +53080,7 @@ void m68008_device::movea_l_aips_ad_df8() // 2058 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -53151,13 +53151,13 @@ void m68008_device::movea_l_aips_ad_df8() // 2058 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -53200,7 +53200,7 @@ void m68008_device::movea_l_pais_ad_df8() // 2060 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -53273,13 +53273,13 @@ void m68008_device::movea_l_pais_ad_df8() // 2060 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -53354,7 +53354,7 @@ void m68008_device::movea_l_das_ad_df8() // 2068 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -53422,13 +53422,13 @@ void m68008_device::movea_l_das_ad_df8() // 2068 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -53470,7 +53470,7 @@ void m68008_device::movea_l_dais_ad_df8() // 2070 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -53551,7 +53551,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -53619,13 +53619,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -53702,7 +53702,7 @@ void m68008_device::movea_l_adr16_ad_df8() // 2078 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -53770,13 +53770,13 @@ void m68008_device::movea_l_adr16_ad_df8() // 2078 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -53884,7 +53884,7 @@ void m68008_device::movea_l_adr32_ad_df8() // 2079 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -53952,13 +53952,13 @@ void m68008_device::movea_l_adr32_ad_df8() // 2079 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -54032,7 +54032,7 @@ void m68008_device::movea_l_dpc_ad_df8() // 207a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -54100,13 +54100,13 @@ void m68008_device::movea_l_dpc_ad_df8() // 207a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -54147,7 +54147,7 @@ void m68008_device::movea_l_dpci_ad_df8() // 207b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -54228,7 +54228,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -54296,13 +54296,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -54413,13 +54413,13 @@ void m68008_device::movea_l_imm32_ad_df8() // 207c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -54497,7 +54497,7 @@ void m68008_device::move_l_ds_aid_df8() // 2080 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54532,7 +54532,7 @@ void m68008_device::move_l_ds_aid_df8() // 2080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54611,7 +54611,7 @@ void m68008_device::move_l_as_aid_df8() // 2088 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54646,7 +54646,7 @@ void m68008_device::move_l_as_aid_df8() // 2088 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54691,7 +54691,7 @@ void m68008_device::move_l_ais_aid_df8() // 2090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -54758,7 +54758,7 @@ void m68008_device::move_l_ais_aid_df8() // 2090 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54792,7 +54792,7 @@ void m68008_device::move_l_ais_aid_df8() // 2090 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -54870,7 +54870,7 @@ void m68008_device::move_l_aips_aid_df8() // 2098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -54940,7 +54940,7 @@ void m68008_device::move_l_aips_aid_df8() // 2098 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54974,7 +54974,7 @@ void m68008_device::move_l_aips_aid_df8() // 2098 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55051,7 +55051,7 @@ void m68008_device::move_l_pais_aid_df8() // 20a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -55123,7 +55123,7 @@ void m68008_device::move_l_pais_aid_df8() // 20a0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55157,7 +55157,7 @@ void m68008_device::move_l_pais_aid_df8() // 20a0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55266,7 +55266,7 @@ void m68008_device::move_l_das_aid_df8() // 20a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -55333,7 +55333,7 @@ void m68008_device::move_l_das_aid_df8() // 20a8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55367,7 +55367,7 @@ void m68008_device::move_l_das_aid_df8() // 20a8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55443,7 +55443,7 @@ void m68008_device::move_l_dais_aid_df8() // 20b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -55524,7 +55524,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -55591,7 +55591,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55625,7 +55625,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55736,7 +55736,7 @@ void m68008_device::move_l_adr16_aid_df8() // 20b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -55803,7 +55803,7 @@ void m68008_device::move_l_adr16_aid_df8() // 20b8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55837,7 +55837,7 @@ void m68008_device::move_l_adr16_aid_df8() // 20b8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55979,7 +55979,7 @@ void m68008_device::move_l_adr32_aid_df8() // 20b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -56046,7 +56046,7 @@ void m68008_device::move_l_adr32_aid_df8() // 20b9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56080,7 +56080,7 @@ void m68008_device::move_l_adr32_aid_df8() // 20b9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -56188,7 +56188,7 @@ void m68008_device::move_l_dpc_aid_df8() // 20ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -56255,7 +56255,7 @@ void m68008_device::move_l_dpc_aid_df8() // 20ba f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56289,7 +56289,7 @@ void m68008_device::move_l_dpc_aid_df8() // 20ba f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -56364,7 +56364,7 @@ void m68008_device::move_l_dpci_aid_df8() // 20bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -56445,7 +56445,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -56512,7 +56512,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56546,7 +56546,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -56722,7 +56722,7 @@ void m68008_device::move_l_imm32_aid_df8() // 20bc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56757,7 +56757,7 @@ void m68008_device::move_l_imm32_aid_df8() // 20bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56836,7 +56836,7 @@ void m68008_device::move_l_ds_aipd_df8() // 20c0 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56871,7 +56871,7 @@ void m68008_device::move_l_ds_aipd_df8() // 20c0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56950,7 +56950,7 @@ void m68008_device::move_l_as_aipd_df8() // 20c8 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56985,7 +56985,7 @@ void m68008_device::move_l_as_aipd_df8() // 20c8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57030,7 +57030,7 @@ void m68008_device::move_l_ais_aipd_df8() // 20d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -57097,7 +57097,7 @@ void m68008_device::move_l_ais_aipd_df8() // 20d0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57131,7 +57131,7 @@ void m68008_device::move_l_ais_aipd_df8() // 20d0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57208,7 +57208,7 @@ void m68008_device::move_l_aips_aipd_df8() // 20d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -57278,7 +57278,7 @@ void m68008_device::move_l_aips_aipd_df8() // 20d8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57312,7 +57312,7 @@ void m68008_device::move_l_aips_aipd_df8() // 20d8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57388,7 +57388,7 @@ void m68008_device::move_l_pais_aipd_df8() // 20e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -57460,7 +57460,7 @@ void m68008_device::move_l_pais_aipd_df8() // 20e0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57494,7 +57494,7 @@ void m68008_device::move_l_pais_aipd_df8() // 20e0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57602,7 +57602,7 @@ void m68008_device::move_l_das_aipd_df8() // 20e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -57669,7 +57669,7 @@ void m68008_device::move_l_das_aipd_df8() // 20e8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57703,7 +57703,7 @@ void m68008_device::move_l_das_aipd_df8() // 20e8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57778,7 +57778,7 @@ void m68008_device::move_l_dais_aipd_df8() // 20f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -57859,7 +57859,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -57926,7 +57926,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57960,7 +57960,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58070,7 +58070,7 @@ void m68008_device::move_l_adr16_aipd_df8() // 20f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -58137,7 +58137,7 @@ void m68008_device::move_l_adr16_aipd_df8() // 20f8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58171,7 +58171,7 @@ void m68008_device::move_l_adr16_aipd_df8() // 20f8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58312,7 +58312,7 @@ void m68008_device::move_l_adr32_aipd_df8() // 20f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -58379,7 +58379,7 @@ void m68008_device::move_l_adr32_aipd_df8() // 20f9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58413,7 +58413,7 @@ void m68008_device::move_l_adr32_aipd_df8() // 20f9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58520,7 +58520,7 @@ void m68008_device::move_l_dpc_aipd_df8() // 20fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -58587,7 +58587,7 @@ void m68008_device::move_l_dpc_aipd_df8() // 20fa f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58621,7 +58621,7 @@ void m68008_device::move_l_dpc_aipd_df8() // 20fa f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58695,7 +58695,7 @@ void m68008_device::move_l_dpci_aipd_df8() // 20fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -58776,7 +58776,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -58843,7 +58843,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58877,7 +58877,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59052,7 +59052,7 @@ void m68008_device::move_l_imm32_aipd_df8() // 20fc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -59087,7 +59087,7 @@ void m68008_device::move_l_imm32_aipd_df8() // 20fc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59134,7 +59134,7 @@ void m68008_device::move_l_ds_paid_df8() // 2100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59169,7 +59169,7 @@ void m68008_device::move_l_ds_paid_df8() // 2100 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59247,7 +59247,7 @@ void m68008_device::move_l_as_paid_df8() // 2108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59282,7 +59282,7 @@ void m68008_device::move_l_as_paid_df8() // 2108 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59358,7 +59358,7 @@ void m68008_device::move_l_ais_paid_df8() // 2110 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -59425,7 +59425,7 @@ void m68008_device::move_l_ais_paid_df8() // 2110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59460,7 +59460,7 @@ void m68008_device::move_l_ais_paid_df8() // 2110 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59536,7 +59536,7 @@ void m68008_device::move_l_aips_paid_df8() // 2118 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -59606,7 +59606,7 @@ void m68008_device::move_l_aips_paid_df8() // 2118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59641,7 +59641,7 @@ void m68008_device::move_l_aips_paid_df8() // 2118 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59716,7 +59716,7 @@ void m68008_device::move_l_pais_paid_df8() // 2120 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -59788,7 +59788,7 @@ void m68008_device::move_l_pais_paid_df8() // 2120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59823,7 +59823,7 @@ void m68008_device::move_l_pais_paid_df8() // 2120 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59930,7 +59930,7 @@ void m68008_device::move_l_das_paid_df8() // 2128 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -59997,7 +59997,7 @@ void m68008_device::move_l_das_paid_df8() // 2128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60032,7 +60032,7 @@ void m68008_device::move_l_das_paid_df8() // 2128 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60106,7 +60106,7 @@ void m68008_device::move_l_dais_paid_df8() // 2130 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -60187,7 +60187,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -60254,7 +60254,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60289,7 +60289,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60398,7 +60398,7 @@ void m68008_device::move_l_adr16_paid_df8() // 2138 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -60465,7 +60465,7 @@ void m68008_device::move_l_adr16_paid_df8() // 2138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60500,7 +60500,7 @@ void m68008_device::move_l_adr16_paid_df8() // 2138 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60640,7 +60640,7 @@ void m68008_device::move_l_adr32_paid_df8() // 2139 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -60707,7 +60707,7 @@ void m68008_device::move_l_adr32_paid_df8() // 2139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60742,7 +60742,7 @@ void m68008_device::move_l_adr32_paid_df8() // 2139 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60848,7 +60848,7 @@ void m68008_device::move_l_dpc_paid_df8() // 213a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -60915,7 +60915,7 @@ void m68008_device::move_l_dpc_paid_df8() // 213a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60950,7 +60950,7 @@ void m68008_device::move_l_dpc_paid_df8() // 213a f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61023,7 +61023,7 @@ void m68008_device::move_l_dpci_paid_df8() // 213b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -61104,7 +61104,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -61171,7 +61171,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61206,7 +61206,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61348,7 +61348,7 @@ void m68008_device::move_l_imm32_paid_df8() // 213c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61383,7 +61383,7 @@ void m68008_device::move_l_imm32_paid_df8() // 213c f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61492,7 +61492,7 @@ void m68008_device::move_l_ds_dad_df8() // 2140 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61526,7 +61526,7 @@ void m68008_device::move_l_ds_dad_df8() // 2140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -61561,7 +61561,7 @@ void m68008_device::move_l_ds_dad_df8() // 2140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61639,7 +61639,7 @@ void m68008_device::move_l_as_dad_df8() // 2148 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61673,7 +61673,7 @@ void m68008_device::move_l_as_dad_df8() // 2148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -61708,7 +61708,7 @@ void m68008_device::move_l_as_dad_df8() // 2148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61753,7 +61753,7 @@ void m68008_device::move_l_ais_dad_df8() // 2150 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -61819,7 +61819,7 @@ void m68008_device::move_l_ais_dad_df8() // 2150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61854,7 +61854,7 @@ void m68008_device::move_l_ais_dad_df8() // 2150 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61968,7 +61968,7 @@ void m68008_device::move_l_aips_dad_df8() // 2158 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -62037,7 +62037,7 @@ void m68008_device::move_l_aips_dad_df8() // 2158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62072,7 +62072,7 @@ void m68008_device::move_l_aips_dad_df8() // 2158 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62185,7 +62185,7 @@ void m68008_device::move_l_pais_dad_df8() // 2160 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -62256,7 +62256,7 @@ void m68008_device::move_l_pais_dad_df8() // 2160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62291,7 +62291,7 @@ void m68008_device::move_l_pais_dad_df8() // 2160 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62436,7 +62436,7 @@ void m68008_device::move_l_das_dad_df8() // 2168 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -62502,7 +62502,7 @@ void m68008_device::move_l_das_dad_df8() // 2168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62537,7 +62537,7 @@ void m68008_device::move_l_das_dad_df8() // 2168 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62649,7 +62649,7 @@ void m68008_device::move_l_dais_dad_df8() // 2170 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -62730,7 +62730,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -62796,7 +62796,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62831,7 +62831,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62978,7 +62978,7 @@ void m68008_device::move_l_adr16_dad_df8() // 2178 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -63044,7 +63044,7 @@ void m68008_device::move_l_adr16_dad_df8() // 2178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63079,7 +63079,7 @@ void m68008_device::move_l_adr16_dad_df8() // 2178 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63257,7 +63257,7 @@ void m68008_device::move_l_adr32_dad_df8() // 2179 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -63323,7 +63323,7 @@ void m68008_device::move_l_adr32_dad_df8() // 2179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63358,7 +63358,7 @@ void m68008_device::move_l_adr32_dad_df8() // 2179 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63502,7 +63502,7 @@ void m68008_device::move_l_dpc_dad_df8() // 217a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -63568,7 +63568,7 @@ void m68008_device::move_l_dpc_dad_df8() // 217a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63603,7 +63603,7 @@ void m68008_device::move_l_dpc_dad_df8() // 217a f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63714,7 +63714,7 @@ void m68008_device::move_l_dpci_dad_df8() // 217b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -63795,7 +63795,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -63861,7 +63861,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63896,7 +63896,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64107,7 +64107,7 @@ void m68008_device::move_l_imm32_dad_df8() // 217c f1ff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64141,7 +64141,7 @@ void m68008_device::move_l_imm32_dad_df8() // 217c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64176,7 +64176,7 @@ void m68008_device::move_l_imm32_dad_df8() // 217c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64219,7 +64219,7 @@ void m68008_device::move_l_ds_daid_df8() // 2180 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = m_irdi & 7; // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -64303,7 +64303,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64337,7 +64337,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64372,7 +64372,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64415,7 +64415,7 @@ void m68008_device::move_l_as_daid_df8() // 2188 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -64499,7 +64499,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64533,7 +64533,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64568,7 +64568,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64613,7 +64613,7 @@ void m68008_device::move_l_ais_daid_df8() // 2190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -64676,7 +64676,7 @@ void m68008_device::move_l_ais_daid_df8() // 2190 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -64691,7 +64691,7 @@ void m68008_device::move_l_ais_daid_df8() // 2190 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64725,7 +64725,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64762,7 +64762,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64876,7 +64876,7 @@ void m68008_device::move_l_aips_daid_df8() // 2198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -64942,7 +64942,7 @@ void m68008_device::move_l_aips_daid_df8() // 2198 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -64957,7 +64957,7 @@ void m68008_device::move_l_aips_daid_df8() // 2198 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64991,7 +64991,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65028,7 +65028,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65141,7 +65141,7 @@ void m68008_device::move_l_pais_daid_df8() // 21a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -65209,7 +65209,7 @@ void m68008_device::move_l_pais_daid_df8() // 21a0 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -65224,7 +65224,7 @@ void m68008_device::move_l_pais_daid_df8() // 21a0 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65258,7 +65258,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65295,7 +65295,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65440,7 +65440,7 @@ void m68008_device::move_l_das_daid_df8() // 21a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -65503,7 +65503,7 @@ void m68008_device::move_l_das_daid_df8() // 21a8 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -65518,7 +65518,7 @@ void m68008_device::move_l_das_daid_df8() // 21a8 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65552,7 +65552,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65589,7 +65589,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65701,7 +65701,7 @@ void m68008_device::move_l_dais_daid_df8() // 21b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -65782,7 +65782,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -65845,7 +65845,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -65860,7 +65860,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65894,7 +65894,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65931,7 +65931,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66078,7 +66078,7 @@ void m68008_device::move_l_adr16_daid_df8() // 21b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -66141,7 +66141,7 @@ void m68008_device::move_l_adr16_daid_df8() // 21b8 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -66156,7 +66156,7 @@ void m68008_device::move_l_adr16_daid_df8() // 21b8 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66190,7 +66190,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66227,7 +66227,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66405,7 +66405,7 @@ void m68008_device::move_l_adr32_daid_df8() // 21b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -66468,7 +66468,7 @@ void m68008_device::move_l_adr32_daid_df8() // 21b9 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -66483,7 +66483,7 @@ void m68008_device::move_l_adr32_daid_df8() // 21b9 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66517,7 +66517,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66554,7 +66554,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66698,7 +66698,7 @@ void m68008_device::move_l_dpc_daid_df8() // 21ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -66761,7 +66761,7 @@ void m68008_device::move_l_dpc_daid_df8() // 21ba f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -66776,7 +66776,7 @@ void m68008_device::move_l_dpc_daid_df8() // 21ba f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66810,7 +66810,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66847,7 +66847,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66958,7 +66958,7 @@ void m68008_device::move_l_dpci_daid_df8() // 21bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -67039,7 +67039,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -67102,7 +67102,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -67117,7 +67117,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67151,7 +67151,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67188,7 +67188,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67364,7 +67364,7 @@ void m68008_device::move_l_imm32_daid_df8() // 21bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -67448,7 +67448,7 @@ rmdl2: m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67482,7 +67482,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67517,7 +67517,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67563,7 +67563,7 @@ void m68008_device::move_l_ds_adr16_df8() // 21c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67598,7 +67598,7 @@ void m68008_device::move_l_ds_adr16_df8() // 21c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67713,7 +67713,7 @@ void m68008_device::move_l_as_adr16_df8() // 21c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67748,7 +67748,7 @@ void m68008_device::move_l_as_adr16_df8() // 21c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67861,7 +67861,7 @@ void m68008_device::move_l_ais_adr16_df8() // 21d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -67927,7 +67927,7 @@ void m68008_device::move_l_ais_adr16_df8() // 21d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67962,7 +67962,7 @@ void m68008_device::move_l_ais_adr16_df8() // 21d0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68075,7 +68075,7 @@ void m68008_device::move_l_aips_adr16_df8() // 21d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -68144,7 +68144,7 @@ void m68008_device::move_l_aips_adr16_df8() // 21d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68179,7 +68179,7 @@ void m68008_device::move_l_aips_adr16_df8() // 21d8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68291,7 +68291,7 @@ void m68008_device::move_l_pais_adr16_df8() // 21e0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -68362,7 +68362,7 @@ void m68008_device::move_l_pais_adr16_df8() // 21e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68397,7 +68397,7 @@ void m68008_device::move_l_pais_adr16_df8() // 21e0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68541,7 +68541,7 @@ void m68008_device::move_l_das_adr16_df8() // 21e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -68607,7 +68607,7 @@ void m68008_device::move_l_das_adr16_df8() // 21e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68642,7 +68642,7 @@ void m68008_device::move_l_das_adr16_df8() // 21e8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68753,7 +68753,7 @@ void m68008_device::move_l_dais_adr16_df8() // 21f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -68834,7 +68834,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -68900,7 +68900,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68935,7 +68935,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69081,7 +69081,7 @@ void m68008_device::move_l_adr16_adr16_df8() // 21f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -69147,7 +69147,7 @@ void m68008_device::move_l_adr16_adr16_df8() // 21f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69182,7 +69182,7 @@ void m68008_device::move_l_adr16_adr16_df8() // 21f8 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69359,7 +69359,7 @@ void m68008_device::move_l_adr32_adr16_df8() // 21f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -69425,7 +69425,7 @@ void m68008_device::move_l_adr32_adr16_df8() // 21f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69460,7 +69460,7 @@ void m68008_device::move_l_adr32_adr16_df8() // 21f9 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69603,7 +69603,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -69669,7 +69669,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69704,7 +69704,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69814,7 +69814,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff void m68008_device::move_l_dpci_adr16_df8() // 21fb ffff { // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -69895,7 +69895,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -69961,7 +69961,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69996,7 +69996,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70175,7 +70175,7 @@ void m68008_device::move_l_imm32_adr16_df8() // 21fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70210,7 +70210,7 @@ void m68008_device::move_l_imm32_adr16_df8() // 21fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70356,7 +70356,7 @@ void m68008_device::move_l_ds_adr32_df8() // 23c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70391,7 +70391,7 @@ void m68008_device::move_l_ds_adr32_df8() // 23c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70537,7 +70537,7 @@ void m68008_device::move_l_as_adr32_df8() // 23c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70572,7 +70572,7 @@ void m68008_device::move_l_as_adr32_df8() // 23c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70685,7 +70685,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -70752,7 +70752,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -70785,7 +70785,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -70819,7 +70819,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70931,7 +70931,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -71001,7 +71001,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -71034,7 +71034,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71068,7 +71068,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71179,7 +71179,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -71251,7 +71251,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -71284,7 +71284,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71318,7 +71318,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71461,7 +71461,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -71528,7 +71528,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -71561,7 +71561,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71595,7 +71595,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71705,7 +71705,7 @@ void m68008_device::move_l_dais_adr32_df8() // 23f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -71786,7 +71786,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -71853,7 +71853,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -71886,7 +71886,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71920,7 +71920,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72065,7 +72065,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -72132,7 +72132,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -72165,7 +72165,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -72199,7 +72199,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72375,7 +72375,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -72442,7 +72442,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -72475,7 +72475,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -72509,7 +72509,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72651,7 +72651,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -72718,7 +72718,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -72751,7 +72751,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -72785,7 +72785,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72894,7 +72894,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff void m68008_device::move_l_dpci_adr32_df8() // 23fb ffff { // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -72975,7 +72975,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -73042,7 +73042,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -73075,7 +73075,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -73109,7 +73109,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73318,7 +73318,7 @@ void m68008_device::move_l_imm32_adr32_df8() // 23fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73353,7 +73353,7 @@ void m68008_device::move_l_imm32_adr32_df8() // 23fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73470,7 +73470,7 @@ void m68008_device::move_w_ds_dd_df8() // 3000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -73523,7 +73523,7 @@ void m68008_device::move_w_as_dd_df8() // 3008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -73573,7 +73573,7 @@ void m68008_device::move_w_ais_dd_df8() // 3010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -73610,7 +73610,7 @@ void m68008_device::move_w_ais_dd_df8() // 3010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73664,7 +73664,7 @@ void m68008_device::move_w_aips_dd_df8() // 3018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -73699,7 +73699,7 @@ void m68008_device::move_w_aips_dd_df8() // 3018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73755,7 +73755,7 @@ void m68008_device::move_w_pais_dd_df8() // 3020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -73790,7 +73790,7 @@ void m68008_device::move_w_pais_dd_df8() // 3020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73870,7 +73870,7 @@ void m68008_device::move_w_das_dd_df8() // 3028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -73907,7 +73907,7 @@ void m68008_device::move_w_das_dd_df8() // 3028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73953,7 +73953,7 @@ void m68008_device::move_w_dais_dd_df8() // 3030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -74035,7 +74035,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -74072,7 +74072,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74153,7 +74153,7 @@ void m68008_device::move_w_adr16_dd_df8() // 3038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -74188,7 +74188,7 @@ void m68008_device::move_w_adr16_dd_df8() // 3038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74300,7 +74300,7 @@ void m68008_device::move_w_adr32_dd_df8() // 3039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -74335,7 +74335,7 @@ void m68008_device::move_w_adr32_dd_df8() // 3039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74414,7 +74414,7 @@ void m68008_device::move_w_dpc_dd_df8() // 303a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -74451,7 +74451,7 @@ void m68008_device::move_w_dpc_dd_df8() // 303a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74496,7 +74496,7 @@ void m68008_device::move_w_dpci_dd_df8() // 303b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -74578,7 +74578,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -74615,7 +74615,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74699,7 +74699,7 @@ void m68008_device::move_w_imm16_dd_df8() // 303c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -74756,7 +74756,7 @@ void m68008_device::movea_w_ds_ad_df8() // 3040 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -74806,7 +74806,7 @@ void m68008_device::movea_w_as_ad_df8() // 3048 f1f8 // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74851,7 +74851,7 @@ void m68008_device::movea_w_ais_ad_df8() // 3050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -74939,7 +74939,7 @@ void m68008_device::movea_w_aips_ad_df8() // 3058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -75027,7 +75027,7 @@ void m68008_device::movea_w_pais_ad_df8() // 3060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -75139,7 +75139,7 @@ void m68008_device::movea_w_das_ad_df8() // 3068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75219,7 +75219,7 @@ void m68008_device::movea_w_dais_ad_df8() // 3070 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -75301,7 +75301,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75416,7 +75416,7 @@ void m68008_device::movea_w_adr16_ad_df8() // 3078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -75560,7 +75560,7 @@ void m68008_device::movea_w_adr32_ad_df8() // 3079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -75671,7 +75671,7 @@ void m68008_device::movea_w_dpc_ad_df8() // 307a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75750,7 +75750,7 @@ void m68008_device::movea_w_dpci_ad_df8() // 307b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -75832,7 +75832,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75954,7 +75954,7 @@ void m68008_device::movea_w_imm16_ad_df8() // 307c f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -76001,7 +76001,7 @@ void m68008_device::move_w_ds_aid_df8() // 3080 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76082,7 +76082,7 @@ void m68008_device::move_w_as_aid_df8() // 3088 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76160,7 +76160,7 @@ void m68008_device::move_w_ais_aid_df8() // 3090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -76196,7 +76196,7 @@ void m68008_device::move_w_ais_aid_df8() // 3090 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76280,7 +76280,7 @@ void m68008_device::move_w_aips_aid_df8() // 3098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -76314,7 +76314,7 @@ void m68008_device::move_w_aips_aid_df8() // 3098 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76400,7 +76400,7 @@ void m68008_device::move_w_pais_aid_df8() // 30a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -76434,7 +76434,7 @@ void m68008_device::move_w_pais_aid_df8() // 30a0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76544,7 +76544,7 @@ void m68008_device::move_w_das_aid_df8() // 30a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -76580,7 +76580,7 @@ void m68008_device::move_w_das_aid_df8() // 30a8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76656,7 +76656,7 @@ void m68008_device::move_w_dais_aid_df8() // 30b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -76738,7 +76738,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -76774,7 +76774,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76885,7 +76885,7 @@ void m68008_device::move_w_adr16_aid_df8() // 30b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -76919,7 +76919,7 @@ void m68008_device::move_w_adr16_aid_df8() // 30b8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77061,7 +77061,7 @@ void m68008_device::move_w_adr32_aid_df8() // 30b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -77095,7 +77095,7 @@ void m68008_device::move_w_adr32_aid_df8() // 30b9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77204,7 +77204,7 @@ void m68008_device::move_w_dpc_aid_df8() // 30ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -77240,7 +77240,7 @@ void m68008_device::move_w_dpc_aid_df8() // 30ba f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77315,7 +77315,7 @@ void m68008_device::move_w_dpci_aid_df8() // 30bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -77397,7 +77397,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -77433,7 +77433,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77547,7 +77547,7 @@ void m68008_device::move_w_imm16_aid_df8() // 30bc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77628,7 +77628,7 @@ void m68008_device::move_w_ds_aipd_df8() // 30c0 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77708,7 +77708,7 @@ void m68008_device::move_w_as_aipd_df8() // 30c8 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77785,7 +77785,7 @@ void m68008_device::move_w_ais_aipd_df8() // 30d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -77822,7 +77822,7 @@ void m68008_device::move_w_ais_aipd_df8() // 30d0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77905,7 +77905,7 @@ void m68008_device::move_w_aips_aipd_df8() // 30d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -77940,7 +77940,7 @@ void m68008_device::move_w_aips_aipd_df8() // 30d8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78025,7 +78025,7 @@ void m68008_device::move_w_pais_aipd_df8() // 30e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -78060,7 +78060,7 @@ void m68008_device::move_w_pais_aipd_df8() // 30e0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78169,7 +78169,7 @@ void m68008_device::move_w_das_aipd_df8() // 30e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -78206,7 +78206,7 @@ void m68008_device::move_w_das_aipd_df8() // 30e8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78281,7 +78281,7 @@ void m68008_device::move_w_dais_aipd_df8() // 30f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -78363,7 +78363,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -78400,7 +78400,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78510,7 +78510,7 @@ void m68008_device::move_w_adr16_aipd_df8() // 30f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -78545,7 +78545,7 @@ void m68008_device::move_w_adr16_aipd_df8() // 30f8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78686,7 +78686,7 @@ void m68008_device::move_w_adr32_aipd_df8() // 30f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -78721,7 +78721,7 @@ void m68008_device::move_w_adr32_aipd_df8() // 30f9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78829,7 +78829,7 @@ void m68008_device::move_w_dpc_aipd_df8() // 30fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -78866,7 +78866,7 @@ void m68008_device::move_w_dpc_aipd_df8() // 30fa f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78940,7 +78940,7 @@ void m68008_device::move_w_dpci_aipd_df8() // 30fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -79022,7 +79022,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -79059,7 +79059,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -79172,7 +79172,7 @@ void m68008_device::move_w_imm16_aipd_df8() // 30fc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -79251,7 +79251,7 @@ void m68008_device::move_w_ds_paid_df8() // 3100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79331,7 +79331,7 @@ void m68008_device::move_w_as_paid_df8() // 3108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79409,7 +79409,7 @@ void m68008_device::move_w_ais_paid_df8() // 3110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -79445,7 +79445,7 @@ void m68008_device::move_w_ais_paid_df8() // 3110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79529,7 +79529,7 @@ void m68008_device::move_w_aips_paid_df8() // 3118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -79563,7 +79563,7 @@ void m68008_device::move_w_aips_paid_df8() // 3118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79649,7 +79649,7 @@ void m68008_device::move_w_pais_paid_df8() // 3120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -79683,7 +79683,7 @@ void m68008_device::move_w_pais_paid_df8() // 3120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79793,7 +79793,7 @@ void m68008_device::move_w_das_paid_df8() // 3128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -79829,7 +79829,7 @@ void m68008_device::move_w_das_paid_df8() // 3128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79905,7 +79905,7 @@ void m68008_device::move_w_dais_paid_df8() // 3130 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -79987,7 +79987,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -80023,7 +80023,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80134,7 +80134,7 @@ void m68008_device::move_w_adr16_paid_df8() // 3138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -80168,7 +80168,7 @@ void m68008_device::move_w_adr16_paid_df8() // 3138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80310,7 +80310,7 @@ void m68008_device::move_w_adr32_paid_df8() // 3139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -80344,7 +80344,7 @@ void m68008_device::move_w_adr32_paid_df8() // 3139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80453,7 +80453,7 @@ void m68008_device::move_w_dpc_paid_df8() // 313a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -80489,7 +80489,7 @@ void m68008_device::move_w_dpc_paid_df8() // 313a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80564,7 +80564,7 @@ void m68008_device::move_w_dpci_paid_df8() // 313b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -80646,7 +80646,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -80682,7 +80682,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80795,7 +80795,7 @@ void m68008_device::move_w_imm16_paid_df8() // 313c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80906,7 +80906,7 @@ void m68008_device::move_w_ds_dad_df8() // 3140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81018,7 +81018,7 @@ void m68008_device::move_w_as_dad_df8() // 3148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81097,7 +81097,7 @@ void m68008_device::move_w_ais_dad_df8() // 3150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -81132,7 +81132,7 @@ void m68008_device::move_w_ais_dad_df8() // 3150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81253,7 +81253,7 @@ void m68008_device::move_w_aips_dad_df8() // 3158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -81286,7 +81286,7 @@ void m68008_device::move_w_aips_dad_df8() // 3158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81409,7 +81409,7 @@ void m68008_device::move_w_pais_dad_df8() // 3160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -81442,7 +81442,7 @@ void m68008_device::move_w_pais_dad_df8() // 3160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81589,7 +81589,7 @@ void m68008_device::move_w_das_dad_df8() // 3168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -81624,7 +81624,7 @@ void m68008_device::move_w_das_dad_df8() // 3168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81737,7 +81737,7 @@ void m68008_device::move_w_dais_dad_df8() // 3170 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -81819,7 +81819,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -81854,7 +81854,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82002,7 +82002,7 @@ void m68008_device::move_w_adr16_dad_df8() // 3178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -82035,7 +82035,7 @@ void m68008_device::move_w_adr16_dad_df8() // 3178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82214,7 +82214,7 @@ void m68008_device::move_w_adr32_dad_df8() // 3179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -82247,7 +82247,7 @@ void m68008_device::move_w_adr32_dad_df8() // 3179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82393,7 +82393,7 @@ void m68008_device::move_w_dpc_dad_df8() // 317a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -82428,7 +82428,7 @@ void m68008_device::move_w_dpc_dad_df8() // 317a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82540,7 +82540,7 @@ void m68008_device::move_w_dpci_dad_df8() // 317b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -82622,7 +82622,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -82657,7 +82657,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82838,7 +82838,7 @@ void m68008_device::move_w_imm16_dad_df8() // 317c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82915,7 +82915,7 @@ void m68008_device::move_w_ds_daid_df8() // 3180 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = m_irdi & 7; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -82999,7 +82999,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83076,7 +83076,7 @@ void m68008_device::move_w_as_daid_df8() // 3188 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -83160,7 +83160,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83239,7 +83239,7 @@ void m68008_device::move_w_ais_daid_df8() // 3190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -83271,7 +83271,7 @@ void m68008_device::move_w_ais_daid_df8() // 3190 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83286,7 +83286,7 @@ void m68008_device::move_w_ais_daid_df8() // 3190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83320,7 +83320,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83443,7 +83443,7 @@ void m68008_device::move_w_aips_daid_df8() // 3198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -83473,7 +83473,7 @@ void m68008_device::move_w_aips_daid_df8() // 3198 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83488,7 +83488,7 @@ void m68008_device::move_w_aips_daid_df8() // 3198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83522,7 +83522,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83647,7 +83647,7 @@ void m68008_device::move_w_pais_daid_df8() // 31a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -83677,7 +83677,7 @@ void m68008_device::move_w_pais_daid_df8() // 31a0 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83692,7 +83692,7 @@ void m68008_device::move_w_pais_daid_df8() // 31a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83726,7 +83726,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83875,7 +83875,7 @@ void m68008_device::move_w_das_daid_df8() // 31a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -83907,7 +83907,7 @@ void m68008_device::move_w_das_daid_df8() // 31a8 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83922,7 +83922,7 @@ void m68008_device::move_w_das_daid_df8() // 31a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83956,7 +83956,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84071,7 +84071,7 @@ void m68008_device::move_w_dais_daid_df8() // 31b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -84153,7 +84153,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -84185,7 +84185,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84200,7 +84200,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84234,7 +84234,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84384,7 +84384,7 @@ void m68008_device::move_w_adr16_daid_df8() // 31b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -84414,7 +84414,7 @@ void m68008_device::move_w_adr16_daid_df8() // 31b8 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84429,7 +84429,7 @@ void m68008_device::move_w_adr16_daid_df8() // 31b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84463,7 +84463,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84644,7 +84644,7 @@ void m68008_device::move_w_adr32_daid_df8() // 31b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -84674,7 +84674,7 @@ void m68008_device::move_w_adr32_daid_df8() // 31b9 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84689,7 +84689,7 @@ void m68008_device::move_w_adr32_daid_df8() // 31b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84723,7 +84723,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84871,7 +84871,7 @@ void m68008_device::move_w_dpc_daid_df8() // 31ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -84903,7 +84903,7 @@ void m68008_device::move_w_dpc_daid_df8() // 31ba f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84918,7 +84918,7 @@ void m68008_device::move_w_dpc_daid_df8() // 31ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84952,7 +84952,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85066,7 +85066,7 @@ void m68008_device::move_w_dpci_daid_df8() // 31bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -85148,7 +85148,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -85180,7 +85180,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -85195,7 +85195,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85229,7 +85229,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85377,7 +85377,7 @@ void m68008_device::move_w_imm16_daid_df8() // 31bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -85461,7 +85461,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -85541,7 +85541,7 @@ void m68008_device::move_w_ds_adr16_df8() // 31c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85657,7 +85657,7 @@ void m68008_device::move_w_as_adr16_df8() // 31c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85771,7 +85771,7 @@ void m68008_device::move_w_ais_adr16_df8() // 31d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -85806,7 +85806,7 @@ void m68008_device::move_w_ais_adr16_df8() // 31d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85926,7 +85926,7 @@ void m68008_device::move_w_aips_adr16_df8() // 31d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -85959,7 +85959,7 @@ void m68008_device::move_w_aips_adr16_df8() // 31d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86081,7 +86081,7 @@ void m68008_device::move_w_pais_adr16_df8() // 31e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -86114,7 +86114,7 @@ void m68008_device::move_w_pais_adr16_df8() // 31e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86260,7 +86260,7 @@ void m68008_device::move_w_das_adr16_df8() // 31e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86295,7 +86295,7 @@ void m68008_device::move_w_das_adr16_df8() // 31e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86407,7 +86407,7 @@ void m68008_device::move_w_dais_adr16_df8() // 31f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -86489,7 +86489,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86524,7 +86524,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86671,7 +86671,7 @@ void m68008_device::move_w_adr16_adr16_df8() // 31f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -86704,7 +86704,7 @@ void m68008_device::move_w_adr16_adr16_df8() // 31f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86882,7 +86882,7 @@ void m68008_device::move_w_adr32_adr16_df8() // 31f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -86915,7 +86915,7 @@ void m68008_device::move_w_adr32_adr16_df8() // 31f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87060,7 +87060,7 @@ void m68008_device::move_w_dpc_adr16_df8() // 31fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87095,7 +87095,7 @@ void m68008_device::move_w_dpc_adr16_df8() // 31fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87206,7 +87206,7 @@ void m68008_device::move_w_dpc_adr16_df8() // 31fa ffff void m68008_device::move_w_dpci_adr16_df8() // 31fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -87288,7 +87288,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87323,7 +87323,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87472,7 +87472,7 @@ void m68008_device::move_w_imm16_adr16_df8() // 31fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87619,7 +87619,7 @@ void m68008_device::move_w_ds_adr32_df8() // 33c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87766,7 +87766,7 @@ void m68008_device::move_w_as_adr32_df8() // 33c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87880,7 +87880,7 @@ void m68008_device::move_w_ais_adr32_df8() // 33d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87915,7 +87915,7 @@ void m68008_device::move_w_ais_adr32_df8() // 33d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88065,7 +88065,7 @@ void m68008_device::move_w_aips_adr32_df8() // 33d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -88098,7 +88098,7 @@ void m68008_device::move_w_aips_adr32_df8() // 33d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88250,7 +88250,7 @@ void m68008_device::move_w_pais_adr32_df8() // 33e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -88283,7 +88283,7 @@ void m68008_device::move_w_pais_adr32_df8() // 33e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88459,7 +88459,7 @@ void m68008_device::move_w_das_adr32_df8() // 33e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88494,7 +88494,7 @@ void m68008_device::move_w_das_adr32_df8() // 33e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88636,7 +88636,7 @@ void m68008_device::move_w_dais_adr32_df8() // 33f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -88718,7 +88718,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88753,7 +88753,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88930,7 +88930,7 @@ void m68008_device::move_w_adr16_adr32_df8() // 33f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -88963,7 +88963,7 @@ void m68008_device::move_w_adr16_adr32_df8() // 33f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89171,7 +89171,7 @@ void m68008_device::move_w_adr32_adr32_df8() // 33f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -89204,7 +89204,7 @@ void m68008_device::move_w_adr32_adr32_df8() // 33f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89379,7 +89379,7 @@ void m68008_device::move_w_dpc_adr32_df8() // 33fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89414,7 +89414,7 @@ void m68008_device::move_w_dpc_adr32_df8() // 33fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89555,7 +89555,7 @@ void m68008_device::move_w_dpc_adr32_df8() // 33fa ffff void m68008_device::move_w_dpci_adr32_df8() // 33fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -89637,7 +89637,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89672,7 +89672,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89882,7 +89882,7 @@ void m68008_device::move_w_imm16_adr32_df8() // 33fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89998,7 +89998,7 @@ void m68008_device::negx_b_ds_df8() // 4000 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0 alu_subx8(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -90047,7 +90047,7 @@ void m68008_device::negx_b_ais_df8() // 4010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90068,7 +90068,7 @@ void m68008_device::negx_b_ais_df8() // 4010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90135,7 +90135,7 @@ void m68008_device::negx_b_aips_df8() // 4018 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -90154,7 +90154,7 @@ void m68008_device::negx_b_aips_df8() // 4018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90223,7 +90223,7 @@ void m68008_device::negx_b_pais_df8() // 4020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -90242,7 +90242,7 @@ void m68008_device::negx_b_pais_df8() // 4020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90335,7 +90335,7 @@ void m68008_device::negx_b_das_df8() // 4028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90356,7 +90356,7 @@ void m68008_device::negx_b_das_df8() // 4028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90415,7 +90415,7 @@ void m68008_device::negx_b_dais_df8() // 4030 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -90497,7 +90497,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90518,7 +90518,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90612,7 +90612,7 @@ void m68008_device::negx_b_adr16_df8() // 4038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -90631,7 +90631,7 @@ void m68008_device::negx_b_adr16_df8() // 4038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90756,7 +90756,7 @@ void m68008_device::negx_b_adr32_df8() // 4039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -90775,7 +90775,7 @@ void m68008_device::negx_b_adr32_df8() // 4039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90838,7 +90838,7 @@ void m68008_device::negx_w_ds_df8() // 4040 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -90887,7 +90887,7 @@ void m68008_device::negx_w_ais_df8() // 4050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90923,7 +90923,7 @@ void m68008_device::negx_w_ais_df8() // 4050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91005,7 +91005,7 @@ void m68008_device::negx_w_aips_df8() // 4058 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -91039,7 +91039,7 @@ void m68008_device::negx_w_aips_df8() // 4058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91123,7 +91123,7 @@ void m68008_device::negx_w_pais_df8() // 4060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -91157,7 +91157,7 @@ void m68008_device::negx_w_pais_df8() // 4060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91265,7 +91265,7 @@ void m68008_device::negx_w_das_df8() // 4068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -91301,7 +91301,7 @@ void m68008_device::negx_w_das_df8() // 4068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91375,7 +91375,7 @@ void m68008_device::negx_w_dais_df8() // 4070 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -91457,7 +91457,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -91493,7 +91493,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91602,7 +91602,7 @@ void m68008_device::negx_w_adr16_df8() // 4078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -91636,7 +91636,7 @@ void m68008_device::negx_w_adr16_df8() // 4078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91776,7 +91776,7 @@ void m68008_device::negx_w_adr32_df8() // 4079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -91810,7 +91810,7 @@ void m68008_device::negx_w_adr32_df8() // 4079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91888,12 +91888,12 @@ void m68008_device::negx_l_ds_df8() // 4080 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91943,7 +91943,7 @@ void m68008_device::negx_l_ais_df8() // 4090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -92010,7 +92010,7 @@ void m68008_device::negx_l_ais_df8() // 4090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92045,7 +92045,7 @@ void m68008_device::negx_l_ais_df8() // 4090 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92119,7 +92119,7 @@ void m68008_device::negx_l_aips_df8() // 4098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -92189,7 +92189,7 @@ void m68008_device::negx_l_aips_df8() // 4098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92224,7 +92224,7 @@ void m68008_device::negx_l_aips_df8() // 4098 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92297,7 +92297,7 @@ void m68008_device::negx_l_pais_df8() // 40a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -92369,7 +92369,7 @@ void m68008_device::negx_l_pais_df8() // 40a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92404,7 +92404,7 @@ void m68008_device::negx_l_pais_df8() // 40a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92509,7 +92509,7 @@ void m68008_device::negx_l_das_df8() // 40a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -92576,7 +92576,7 @@ void m68008_device::negx_l_das_df8() // 40a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92611,7 +92611,7 @@ void m68008_device::negx_l_das_df8() // 40a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92683,7 +92683,7 @@ void m68008_device::negx_l_dais_df8() // 40b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -92764,7 +92764,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -92831,7 +92831,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92866,7 +92866,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92973,7 +92973,7 @@ void m68008_device::negx_l_adr16_df8() // 40b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -93040,7 +93040,7 @@ void m68008_device::negx_l_adr16_df8() // 40b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93075,7 +93075,7 @@ void m68008_device::negx_l_adr16_df8() // 40b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -93213,7 +93213,7 @@ void m68008_device::negx_l_adr32_df8() // 40b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -93280,7 +93280,7 @@ void m68008_device::negx_l_adr32_df8() // 40b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93315,7 +93315,7 @@ void m68008_device::negx_l_adr32_df8() // 40b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -93439,7 +93439,7 @@ void m68008_device::move_sr_ais_df8() // 40d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -93477,7 +93477,7 @@ void m68008_device::move_sr_ais_df8() // 40d0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -93558,7 +93558,7 @@ void m68008_device::move_sr_aips_df8() // 40d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -93594,7 +93594,7 @@ void m68008_device::move_sr_aips_df8() // 40d8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -93677,7 +93677,7 @@ void m68008_device::move_sr_pais_df8() // 40e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -93713,7 +93713,7 @@ void m68008_device::move_sr_pais_df8() // 40e0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -93820,7 +93820,7 @@ void m68008_device::move_sr_das_df8() // 40e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -93858,7 +93858,7 @@ void m68008_device::move_sr_das_df8() // 40e8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -93931,7 +93931,7 @@ void m68008_device::move_sr_dais_df8() // 40f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -94013,7 +94013,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -94051,7 +94051,7 @@ adsw2: m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -94159,7 +94159,7 @@ void m68008_device::move_sr_adr16_df8() // 40f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -94195,7 +94195,7 @@ void m68008_device::move_sr_adr16_df8() // 40f8 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -94334,7 +94334,7 @@ void m68008_device::move_sr_adr32_df8() // 40f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -94370,7 +94370,7 @@ void m68008_device::move_sr_adr32_df8() // 40f9 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -94446,7 +94446,7 @@ void m68008_device::chk_w_ds_dd_df8() // 4180 f1f8 // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry] alu_sub(m_da[rx], m_da[ry]); sr_nzvc(); m_icount -= 2; @@ -94454,7 +94454,7 @@ void m68008_device::chk_w_ds_dd_df8() // 4180 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -94472,14 +94472,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -94514,7 +94514,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -94547,7 +94547,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -94736,7 +94736,7 @@ void m68008_device::chk_w_ais_dd_df8() // 4190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -94770,7 +94770,7 @@ void m68008_device::chk_w_ais_dd_df8() // 4190 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -94778,7 +94778,7 @@ void m68008_device::chk_w_ais_dd_df8() // 4190 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -94796,14 +94796,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -94838,7 +94838,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -94871,7 +94871,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95066,7 +95066,7 @@ void m68008_device::chk_w_aips_dd_df8() // 4198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -95098,7 +95098,7 @@ void m68008_device::chk_w_aips_dd_df8() // 4198 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -95106,7 +95106,7 @@ void m68008_device::chk_w_aips_dd_df8() // 4198 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -95124,14 +95124,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95166,7 +95166,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95199,7 +95199,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95396,7 +95396,7 @@ void m68008_device::chk_w_pais_dd_df8() // 41a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -95428,7 +95428,7 @@ void m68008_device::chk_w_pais_dd_df8() // 41a0 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -95436,7 +95436,7 @@ void m68008_device::chk_w_pais_dd_df8() // 41a0 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -95454,14 +95454,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95496,7 +95496,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95529,7 +95529,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95750,7 +95750,7 @@ void m68008_device::chk_w_das_dd_df8() // 41a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -95784,7 +95784,7 @@ void m68008_device::chk_w_das_dd_df8() // 41a8 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -95792,7 +95792,7 @@ void m68008_device::chk_w_das_dd_df8() // 41a8 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -95810,14 +95810,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95852,7 +95852,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -95885,7 +95885,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96072,7 +96072,7 @@ void m68008_device::chk_w_dais_dd_df8() // 41b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -96154,7 +96154,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -96188,7 +96188,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -96196,7 +96196,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -96214,14 +96214,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96256,7 +96256,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96289,7 +96289,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96511,7 +96511,7 @@ void m68008_device::chk_w_adr16_dd_df8() // 41b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -96543,7 +96543,7 @@ void m68008_device::chk_w_adr16_dd_df8() // 41b8 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -96551,7 +96551,7 @@ void m68008_device::chk_w_adr16_dd_df8() // 41b8 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -96569,14 +96569,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96611,7 +96611,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96644,7 +96644,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96897,7 +96897,7 @@ void m68008_device::chk_w_adr32_dd_df8() // 41b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -96929,7 +96929,7 @@ void m68008_device::chk_w_adr32_dd_df8() // 41b9 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -96937,7 +96937,7 @@ void m68008_device::chk_w_adr32_dd_df8() // 41b9 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -96955,14 +96955,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -96997,7 +96997,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97030,7 +97030,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97250,7 +97250,7 @@ void m68008_device::chk_w_dpc_dd_df8() // 41ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -97284,7 +97284,7 @@ void m68008_device::chk_w_dpc_dd_df8() // 41ba f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -97292,7 +97292,7 @@ void m68008_device::chk_w_dpc_dd_df8() // 41ba f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -97310,14 +97310,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97352,7 +97352,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97385,7 +97385,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97571,7 +97571,7 @@ void m68008_device::chk_w_dpci_dd_df8() // 41bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -97653,7 +97653,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -97687,7 +97687,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -97695,7 +97695,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -97713,14 +97713,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97755,7 +97755,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -97788,7 +97788,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -98010,7 +98010,7 @@ void m68008_device::chk_w_imm16_dd_df8() // 41bc f1ff // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt alu_sub(m_da[rx], m_dt); sr_nzvc(); m_icount -= 2; @@ -98018,7 +98018,7 @@ void m68008_device::chk_w_imm16_dd_df8() // 41bc f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -98036,14 +98036,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -98078,7 +98078,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -98111,7 +98111,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -98429,7 +98429,7 @@ void m68008_device::lea_dais_ad_df8() // 41f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -98824,7 +98824,7 @@ void m68008_device::lea_dpci_ad_df8() // 41fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -98957,7 +98957,7 @@ void m68008_device::clr_b_ds_df8() // 4200 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0 alu_and8(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -98965,7 +98965,7 @@ void m68008_device::clr_b_ds_df8() // 4200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99007,11 +99007,11 @@ void m68008_device::clr_b_ais_df8() // 4210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -99029,7 +99029,7 @@ void m68008_device::clr_b_ais_df8() // 4210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99066,7 +99066,7 @@ void m68008_device::clr_b_ais_df8() // 4210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99094,12 +99094,12 @@ void m68008_device::clr_b_aips_df8() // 4218 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -99118,7 +99118,7 @@ void m68008_device::clr_b_aips_df8() // 4218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99155,7 +99155,7 @@ void m68008_device::clr_b_aips_df8() // 4218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99182,7 +99182,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -99190,7 +99190,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -99209,7 +99209,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99246,7 +99246,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99271,7 +99271,7 @@ void m68008_device::clr_b_das_df8() // 4228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99304,11 +99304,11 @@ void m68008_device::clr_b_das_df8() // 4228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -99326,7 +99326,7 @@ void m68008_device::clr_b_das_df8() // 4228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99363,7 +99363,7 @@ void m68008_device::clr_b_das_df8() // 4228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99386,14 +99386,14 @@ void m68008_device::clr_b_dais_df8() // 4230 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -99401,7 +99401,7 @@ void m68008_device::clr_b_dais_df8() // 4230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99435,7 +99435,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99471,11 +99471,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -99493,7 +99493,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99530,7 +99530,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99557,7 +99557,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -99590,7 +99590,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -99609,7 +99609,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99646,7 +99646,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99671,7 +99671,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99705,7 +99705,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -99738,7 +99738,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -99757,7 +99757,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99794,7 +99794,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -99821,7 +99821,7 @@ void m68008_device::clr_w_ds_df8() // 4240 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -99829,7 +99829,7 @@ void m68008_device::clr_w_ds_df8() // 4240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99871,11 +99871,11 @@ void m68008_device::clr_w_ais_df8() // 4250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -99908,7 +99908,7 @@ void m68008_device::clr_w_ais_df8() // 4250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99945,7 +99945,7 @@ void m68008_device::clr_w_ais_df8() // 4250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -99988,12 +99988,12 @@ void m68008_device::clr_w_aips_df8() // 4258 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -100027,7 +100027,7 @@ void m68008_device::clr_w_aips_df8() // 4258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100064,7 +100064,7 @@ void m68008_device::clr_w_aips_df8() // 4258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100106,7 +100106,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -100114,7 +100114,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -100148,7 +100148,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100185,7 +100185,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100225,7 +100225,7 @@ void m68008_device::clr_w_das_df8() // 4268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -100258,11 +100258,11 @@ void m68008_device::clr_w_das_df8() // 4268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -100295,7 +100295,7 @@ void m68008_device::clr_w_das_df8() // 4268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100332,7 +100332,7 @@ void m68008_device::clr_w_das_df8() // 4268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100370,14 +100370,14 @@ void m68008_device::clr_w_dais_df8() // 4270 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -100385,7 +100385,7 @@ void m68008_device::clr_w_dais_df8() // 4270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -100419,7 +100419,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -100455,11 +100455,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -100492,7 +100492,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100529,7 +100529,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100571,7 +100571,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -100604,7 +100604,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -100638,7 +100638,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100675,7 +100675,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100715,7 +100715,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -100749,7 +100749,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -100782,7 +100782,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -100816,7 +100816,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100853,7 +100853,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100895,12 +100895,12 @@ void m68008_device::clr_l_ds_df8() // 4280 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0 alu_and(high16(m_da[ry]), 0x0000); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100936,7 +100936,7 @@ void m68008_device::clr_l_ds_df8() // 4280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -100951,7 +100951,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -100986,7 +100986,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101019,7 +101019,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101054,7 +101054,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101089,7 +101089,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101129,7 +101129,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -101164,11 +101164,11 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101201,7 +101201,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101236,7 +101236,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101271,7 +101271,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101310,14 +101310,14 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101351,7 +101351,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101384,7 +101384,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101419,7 +101419,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101454,7 +101454,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101494,7 +101494,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101526,7 +101526,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -101561,7 +101561,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101594,7 +101594,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101629,7 +101629,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101664,7 +101664,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101702,14 +101702,14 @@ void m68008_device::clr_l_dais_df8() // 42b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -101717,7 +101717,7 @@ void m68008_device::clr_l_dais_df8() // 42b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101751,7 +101751,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101786,7 +101786,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -101821,7 +101821,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -101854,7 +101854,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101889,7 +101889,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101924,7 +101924,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101966,7 +101966,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -101999,7 +101999,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -102034,7 +102034,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -102067,7 +102067,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102102,7 +102102,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -102137,7 +102137,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -102177,7 +102177,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -102211,7 +102211,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -102244,7 +102244,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -102279,7 +102279,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -102312,7 +102312,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102347,7 +102347,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -102382,7 +102382,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -102424,7 +102424,7 @@ void m68008_device::neg_b_ds_df8() // 4400 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0 alu_sub8(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -102473,7 +102473,7 @@ void m68008_device::neg_b_ais_df8() // 4410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -102494,7 +102494,7 @@ void m68008_device::neg_b_ais_df8() // 4410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102561,7 +102561,7 @@ void m68008_device::neg_b_aips_df8() // 4418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -102580,7 +102580,7 @@ void m68008_device::neg_b_aips_df8() // 4418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102649,7 +102649,7 @@ void m68008_device::neg_b_pais_df8() // 4420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -102668,7 +102668,7 @@ void m68008_device::neg_b_pais_df8() // 4420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102761,7 +102761,7 @@ void m68008_device::neg_b_das_df8() // 4428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -102782,7 +102782,7 @@ void m68008_device::neg_b_das_df8() // 4428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102841,7 +102841,7 @@ void m68008_device::neg_b_dais_df8() // 4430 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -102923,7 +102923,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -102944,7 +102944,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103038,7 +103038,7 @@ void m68008_device::neg_b_adr16_df8() // 4438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -103057,7 +103057,7 @@ void m68008_device::neg_b_adr16_df8() // 4438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103182,7 +103182,7 @@ void m68008_device::neg_b_adr32_df8() // 4439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -103201,7 +103201,7 @@ void m68008_device::neg_b_adr32_df8() // 4439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103264,7 +103264,7 @@ void m68008_device::neg_w_ds_df8() // 4440 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -103313,7 +103313,7 @@ void m68008_device::neg_w_ais_df8() // 4450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103349,7 +103349,7 @@ void m68008_device::neg_w_ais_df8() // 4450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103431,7 +103431,7 @@ void m68008_device::neg_w_aips_df8() // 4458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -103465,7 +103465,7 @@ void m68008_device::neg_w_aips_df8() // 4458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103549,7 +103549,7 @@ void m68008_device::neg_w_pais_df8() // 4460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -103583,7 +103583,7 @@ void m68008_device::neg_w_pais_df8() // 4460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103691,7 +103691,7 @@ void m68008_device::neg_w_das_df8() // 4468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103727,7 +103727,7 @@ void m68008_device::neg_w_das_df8() // 4468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103801,7 +103801,7 @@ void m68008_device::neg_w_dais_df8() // 4470 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -103883,7 +103883,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103919,7 +103919,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104028,7 +104028,7 @@ void m68008_device::neg_w_adr16_df8() // 4478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -104062,7 +104062,7 @@ void m68008_device::neg_w_adr16_df8() // 4478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104202,7 +104202,7 @@ void m68008_device::neg_w_adr32_df8() // 4479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -104236,7 +104236,7 @@ void m68008_device::neg_w_adr32_df8() // 4479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104314,12 +104314,12 @@ void m68008_device::neg_l_ds_df8() // 4480 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104369,7 +104369,7 @@ void m68008_device::neg_l_ais_df8() // 4490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -104436,7 +104436,7 @@ void m68008_device::neg_l_ais_df8() // 4490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104471,7 +104471,7 @@ void m68008_device::neg_l_ais_df8() // 4490 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -104545,7 +104545,7 @@ void m68008_device::neg_l_aips_df8() // 4498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -104615,7 +104615,7 @@ void m68008_device::neg_l_aips_df8() // 4498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104650,7 +104650,7 @@ void m68008_device::neg_l_aips_df8() // 4498 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -104723,7 +104723,7 @@ void m68008_device::neg_l_pais_df8() // 44a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -104795,7 +104795,7 @@ void m68008_device::neg_l_pais_df8() // 44a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104830,7 +104830,7 @@ void m68008_device::neg_l_pais_df8() // 44a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -104935,7 +104935,7 @@ void m68008_device::neg_l_das_df8() // 44a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -105002,7 +105002,7 @@ void m68008_device::neg_l_das_df8() // 44a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105037,7 +105037,7 @@ void m68008_device::neg_l_das_df8() // 44a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105109,7 +105109,7 @@ void m68008_device::neg_l_dais_df8() // 44b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -105190,7 +105190,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -105257,7 +105257,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105292,7 +105292,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105399,7 +105399,7 @@ void m68008_device::neg_l_adr16_df8() // 44b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -105466,7 +105466,7 @@ void m68008_device::neg_l_adr16_df8() // 44b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105501,7 +105501,7 @@ void m68008_device::neg_l_adr16_df8() // 44b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105639,7 +105639,7 @@ void m68008_device::neg_l_adr32_df8() // 44b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -105706,7 +105706,7 @@ void m68008_device::neg_l_adr32_df8() // 44b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105741,7 +105741,7 @@ void m68008_device::neg_l_adr32_df8() // 44b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105903,7 +105903,7 @@ void m68008_device::move_ais_ccr_df8() // 44d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -106031,7 +106031,7 @@ void m68008_device::move_aips_ccr_df8() // 44d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -106159,7 +106159,7 @@ void m68008_device::move_pais_ccr_df8() // 44e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -106311,7 +106311,7 @@ void m68008_device::move_das_ccr_df8() // 44e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -106431,7 +106431,7 @@ void m68008_device::move_dais_ccr_df8() // 44f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -106513,7 +106513,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -106668,7 +106668,7 @@ void m68008_device::move_adr16_ccr_df8() // 44f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -106852,7 +106852,7 @@ void m68008_device::move_adr32_ccr_df8() // 44f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -107003,7 +107003,7 @@ void m68008_device::move_dpc_ccr_df8() // 44fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107122,7 +107122,7 @@ void m68008_device::move_dpc_ccr_df8() // 44fa ffff void m68008_device::move_dpci_ccr_df8() // 44fb ffff { // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -107204,7 +107204,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107449,7 +107449,7 @@ void m68008_device::not_b_ds_df8() // 4600 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0 alu_not8(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -107498,7 +107498,7 @@ void m68008_device::not_b_ais_df8() // 4610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107519,7 +107519,7 @@ void m68008_device::not_b_ais_df8() // 4610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107586,7 +107586,7 @@ void m68008_device::not_b_aips_df8() // 4618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -107605,7 +107605,7 @@ void m68008_device::not_b_aips_df8() // 4618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107674,7 +107674,7 @@ void m68008_device::not_b_pais_df8() // 4620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -107693,7 +107693,7 @@ void m68008_device::not_b_pais_df8() // 4620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107786,7 +107786,7 @@ void m68008_device::not_b_das_df8() // 4628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107807,7 +107807,7 @@ void m68008_device::not_b_das_df8() // 4628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107866,7 +107866,7 @@ void m68008_device::not_b_dais_df8() // 4630 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -107948,7 +107948,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107969,7 +107969,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108063,7 +108063,7 @@ void m68008_device::not_b_adr16_df8() // 4638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -108082,7 +108082,7 @@ void m68008_device::not_b_adr16_df8() // 4638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108207,7 +108207,7 @@ void m68008_device::not_b_adr32_df8() // 4639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -108226,7 +108226,7 @@ void m68008_device::not_b_adr32_df8() // 4639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108289,7 +108289,7 @@ void m68008_device::not_w_ds_df8() // 4640 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -108338,7 +108338,7 @@ void m68008_device::not_w_ais_df8() // 4650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108374,7 +108374,7 @@ void m68008_device::not_w_ais_df8() // 4650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108456,7 +108456,7 @@ void m68008_device::not_w_aips_df8() // 4658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -108490,7 +108490,7 @@ void m68008_device::not_w_aips_df8() // 4658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108574,7 +108574,7 @@ void m68008_device::not_w_pais_df8() // 4660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -108608,7 +108608,7 @@ void m68008_device::not_w_pais_df8() // 4660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108716,7 +108716,7 @@ void m68008_device::not_w_das_df8() // 4668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108752,7 +108752,7 @@ void m68008_device::not_w_das_df8() // 4668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108826,7 +108826,7 @@ void m68008_device::not_w_dais_df8() // 4670 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -108908,7 +108908,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108944,7 +108944,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109053,7 +109053,7 @@ void m68008_device::not_w_adr16_df8() // 4678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -109087,7 +109087,7 @@ void m68008_device::not_w_adr16_df8() // 4678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109227,7 +109227,7 @@ void m68008_device::not_w_adr32_df8() // 4679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -109261,7 +109261,7 @@ void m68008_device::not_w_adr32_df8() // 4679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109339,12 +109339,12 @@ void m68008_device::not_l_ds_df8() // 4680 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0 alu_not(high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109394,7 +109394,7 @@ void m68008_device::not_l_ais_df8() // 4690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -109461,7 +109461,7 @@ void m68008_device::not_l_ais_df8() // 4690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109496,7 +109496,7 @@ void m68008_device::not_l_ais_df8() // 4690 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -109570,7 +109570,7 @@ void m68008_device::not_l_aips_df8() // 4698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -109640,7 +109640,7 @@ void m68008_device::not_l_aips_df8() // 4698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109675,7 +109675,7 @@ void m68008_device::not_l_aips_df8() // 4698 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -109748,7 +109748,7 @@ void m68008_device::not_l_pais_df8() // 46a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -109820,7 +109820,7 @@ void m68008_device::not_l_pais_df8() // 46a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109855,7 +109855,7 @@ void m68008_device::not_l_pais_df8() // 46a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -109960,7 +109960,7 @@ void m68008_device::not_l_das_df8() // 46a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -110027,7 +110027,7 @@ void m68008_device::not_l_das_df8() // 46a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110062,7 +110062,7 @@ void m68008_device::not_l_das_df8() // 46a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110134,7 +110134,7 @@ void m68008_device::not_l_dais_df8() // 46b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -110215,7 +110215,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -110282,7 +110282,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110317,7 +110317,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110424,7 +110424,7 @@ void m68008_device::not_l_adr16_df8() // 46b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -110491,7 +110491,7 @@ void m68008_device::not_l_adr16_df8() // 46b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110526,7 +110526,7 @@ void m68008_device::not_l_adr16_df8() // 46b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110664,7 +110664,7 @@ void m68008_device::not_l_adr32_df8() // 46b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -110731,7 +110731,7 @@ void m68008_device::not_l_adr32_df8() // 46b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110766,7 +110766,7 @@ void m68008_device::not_l_adr32_df8() // 46b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110938,7 +110938,7 @@ void m68008_device::move_ais_sr_df8() // 46d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -111072,7 +111072,7 @@ void m68008_device::move_aips_sr_df8() // 46d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -111206,7 +111206,7 @@ void m68008_device::move_pais_sr_df8() // 46e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -111364,7 +111364,7 @@ void m68008_device::move_das_sr_df8() // 46e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -111490,7 +111490,7 @@ void m68008_device::move_dais_sr_df8() // 46f0 fff8 return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -111572,7 +111572,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -111733,7 +111733,7 @@ void m68008_device::move_adr16_sr_df8() // 46f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -111923,7 +111923,7 @@ void m68008_device::move_adr32_sr_df8() // 46f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -112080,7 +112080,7 @@ void m68008_device::move_dpc_sr_df8() // 46fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112205,7 +112205,7 @@ void m68008_device::move_dpci_sr_df8() // 46fb ffff return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -112287,7 +112287,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112540,12 +112540,12 @@ void m68008_device::nbcd_b_ds_df8() // 4800 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0 alu_sbcd8(m_da[ry], 0x0000); sr_xnzvc_u(); // 117 nbcr2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -112593,7 +112593,7 @@ void m68008_device::nbcd_b_ais_df8() // 4810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112613,12 +112613,12 @@ void m68008_device::nbcd_b_ais_df8() // 4810 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -112683,7 +112683,7 @@ void m68008_device::nbcd_b_aips_df8() // 4818 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -112701,12 +112701,12 @@ void m68008_device::nbcd_b_aips_df8() // 4818 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -112773,7 +112773,7 @@ void m68008_device::nbcd_b_pais_df8() // 4820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -112791,12 +112791,12 @@ void m68008_device::nbcd_b_pais_df8() // 4820 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -112887,7 +112887,7 @@ void m68008_device::nbcd_b_das_df8() // 4828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112907,12 +112907,12 @@ void m68008_device::nbcd_b_das_df8() // 4828 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -112969,7 +112969,7 @@ void m68008_device::nbcd_b_dais_df8() // 4830 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -113051,7 +113051,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -113071,12 +113071,12 @@ adsw2: m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -113168,7 +113168,7 @@ void m68008_device::nbcd_b_adr16_df8() // 4838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -113186,12 +113186,12 @@ void m68008_device::nbcd_b_adr16_df8() // 4838 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -113314,7 +113314,7 @@ void m68008_device::nbcd_b_adr32_df8() // 4839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -113332,12 +113332,12 @@ void m68008_device::nbcd_b_adr32_df8() // 4839 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -113399,7 +113399,7 @@ void m68008_device::swap_ds_df8() // 4840 fff8 m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nzvc(); // 342 swap2 @@ -113407,7 +113407,7 @@ void m68008_device::swap_ds_df8() // 4840 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = merge_16_32(high16(m_at), m_aluo); m_au = m_au + 2; - // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -113454,7 +113454,7 @@ void m68008_device::pea_ais_df8() // 4850 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_da[m_sp] - 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -113561,7 +113561,7 @@ void m68008_device::pea_das_df8() // 4868 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -113598,7 +113598,7 @@ void m68008_device::pea_das_df8() // 4868 fff8 m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -113703,7 +113703,7 @@ void m68008_device::pea_dais_df8() // 4870 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -113784,7 +113784,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -114213,7 +114213,7 @@ void m68008_device::pea_dpc_df8() // 487a ffff m_aob = m_au; m_at = m_pc; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -114250,7 +114250,7 @@ void m68008_device::pea_dpc_df8() // 487a ffff m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114354,7 +114354,7 @@ void m68008_device::pea_dpc_df8() // 487a ffff void m68008_device::pea_dpci_df8() // 487b ffff { // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -114435,7 +114435,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -114549,7 +114549,7 @@ void m68008_device::ext_w_ds_df8() // 4880 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 + // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0 alu_ext(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -115040,7 +115040,7 @@ void m68008_device::movem_w_list_dais_df8() // 48b0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -115558,7 +115558,7 @@ void m68008_device::ext_l_ds_df8() // 48c0 fff8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 233 extr2 @@ -116140,7 +116140,7 @@ void m68008_device::movem_l_list_dais_df8() // 48f0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -116749,13 +116749,13 @@ void m68008_device::tst_b_ds_df8() // 4a00 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -116797,11 +116797,11 @@ void m68008_device::tst_b_ais_df8() // 4a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -116819,13 +116819,13 @@ void m68008_device::tst_b_ais_df8() // 4a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -116870,12 +116870,12 @@ void m68008_device::tst_b_aips_df8() // 4a18 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -116894,13 +116894,13 @@ void m68008_device::tst_b_aips_df8() // 4a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -116944,7 +116944,7 @@ void m68008_device::tst_b_pais_df8() // 4a20 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -116952,7 +116952,7 @@ void m68008_device::tst_b_pais_df8() // 4a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -116971,13 +116971,13 @@ void m68008_device::tst_b_pais_df8() // 4a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117019,7 +117019,7 @@ void m68008_device::tst_b_das_df8() // 4a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117052,11 +117052,11 @@ void m68008_device::tst_b_das_df8() // 4a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -117074,13 +117074,13 @@ void m68008_device::tst_b_das_df8() // 4a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117120,14 +117120,14 @@ void m68008_device::tst_b_dais_df8() // 4a30 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -117135,7 +117135,7 @@ void m68008_device::tst_b_dais_df8() // 4a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117169,7 +117169,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117205,11 +117205,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -117227,13 +117227,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117277,7 +117277,7 @@ void m68008_device::tst_b_adr16_df8() // 4a38 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -117310,7 +117310,7 @@ void m68008_device::tst_b_adr16_df8() // 4a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -117329,13 +117329,13 @@ void m68008_device::tst_b_adr16_df8() // 4a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117377,7 +117377,7 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117411,7 +117411,7 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -117444,7 +117444,7 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -117463,13 +117463,13 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117514,13 +117514,13 @@ void m68008_device::tst_w_ds_df8() // 4a40 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117562,11 +117562,11 @@ void m68008_device::tst_w_ais_df8() // 4a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117599,13 +117599,13 @@ void m68008_device::tst_w_ais_df8() // 4a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117650,12 +117650,12 @@ void m68008_device::tst_w_aips_df8() // 4a58 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -117689,13 +117689,13 @@ void m68008_device::tst_w_aips_df8() // 4a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117739,7 +117739,7 @@ void m68008_device::tst_w_pais_df8() // 4a60 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -117747,7 +117747,7 @@ void m68008_device::tst_w_pais_df8() // 4a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -117781,13 +117781,13 @@ void m68008_device::tst_w_pais_df8() // 4a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117829,7 +117829,7 @@ void m68008_device::tst_w_das_df8() // 4a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117862,11 +117862,11 @@ void m68008_device::tst_w_das_df8() // 4a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117899,13 +117899,13 @@ void m68008_device::tst_w_das_df8() // 4a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117945,14 +117945,14 @@ void m68008_device::tst_w_dais_df8() // 4a70 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -117960,7 +117960,7 @@ void m68008_device::tst_w_dais_df8() // 4a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -117994,7 +117994,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118030,11 +118030,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118067,13 +118067,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118117,7 +118117,7 @@ void m68008_device::tst_w_adr16_df8() // 4a78 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -118150,7 +118150,7 @@ void m68008_device::tst_w_adr16_df8() // 4a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -118184,13 +118184,13 @@ void m68008_device::tst_w_adr16_df8() // 4a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118232,7 +118232,7 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118266,7 +118266,7 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -118299,7 +118299,7 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -118333,13 +118333,13 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118384,13 +118384,13 @@ void m68008_device::tst_l_ds_df8() // 4a80 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 362 tsrl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118434,7 +118434,7 @@ void m68008_device::tst_l_ais_df8() // 4a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -118469,7 +118469,7 @@ void m68008_device::tst_l_ais_df8() // 4a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118502,13 +118502,13 @@ void m68008_device::tst_l_ais_df8() // 4a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118552,7 +118552,7 @@ void m68008_device::tst_l_aips_df8() // 4a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -118587,11 +118587,11 @@ void m68008_device::tst_l_aips_df8() // 4a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118624,13 +118624,13 @@ void m68008_device::tst_l_aips_df8() // 4a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118673,14 +118673,14 @@ void m68008_device::tst_l_pais_df8() // 4aa0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118714,7 +118714,7 @@ void m68008_device::tst_l_pais_df8() // 4aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118747,13 +118747,13 @@ void m68008_device::tst_l_pais_df8() // 4aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118797,7 +118797,7 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118829,7 +118829,7 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -118864,7 +118864,7 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118897,13 +118897,13 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118945,14 +118945,14 @@ void m68008_device::tst_l_dais_df8() // 4ab0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -118960,7 +118960,7 @@ void m68008_device::tst_l_dais_df8() // 4ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -118994,7 +118994,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119029,7 +119029,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -119064,7 +119064,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119097,13 +119097,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119149,7 +119149,7 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -119182,7 +119182,7 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -119217,7 +119217,7 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119250,13 +119250,13 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119300,7 +119300,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119334,7 +119334,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -119367,7 +119367,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -119402,7 +119402,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119435,13 +119435,13 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119487,14 +119487,14 @@ void m68008_device::tas_ds_df8() // 4ac0 fff8 m_ir = m_irc; m_alub = m_da[ry]; m_pc = m_au; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1 alu_and8(m_alub, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119538,11 +119538,11 @@ void m68008_device::tas_ais_df8() // 4ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -119555,14 +119555,14 @@ void m68008_device::tas_ais_df8() // 4ad0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119584,11 +119584,11 @@ void m68008_device::tas_ais_df8() // 4ad0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119633,12 +119633,12 @@ void m68008_device::tas_aips_df8() // 4ad8 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -119652,14 +119652,14 @@ void m68008_device::tas_aips_df8() // 4ad8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119681,11 +119681,11 @@ void m68008_device::tas_aips_df8() // 4ad8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119729,7 +119729,7 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -119737,7 +119737,7 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -119751,14 +119751,14 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119780,11 +119780,11 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119826,7 +119826,7 @@ void m68008_device::tas_das_df8() // 4ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119859,11 +119859,11 @@ void m68008_device::tas_das_df8() // 4ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -119876,14 +119876,14 @@ void m68008_device::tas_das_df8() // 4ae8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119905,11 +119905,11 @@ void m68008_device::tas_das_df8() // 4ae8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119949,14 +119949,14 @@ void m68008_device::tas_dais_df8() // 4af0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -119964,7 +119964,7 @@ void m68008_device::tas_dais_df8() // 4af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -119998,7 +119998,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -120034,11 +120034,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -120051,14 +120051,14 @@ adsw2: // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -120080,11 +120080,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -120128,7 +120128,7 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -120161,7 +120161,7 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -120175,14 +120175,14 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -120204,11 +120204,11 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -120250,7 +120250,7 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -120284,7 +120284,7 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -120317,7 +120317,7 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -120331,14 +120331,14 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -120360,11 +120360,11 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -120940,7 +120940,7 @@ void m68008_device::movem_w_dais_list_df8() // 4cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -121018,7 +121018,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -121771,7 +121771,7 @@ void m68008_device::movem_w_dpci_list_df8() // 4cbb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -121849,7 +121849,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -122602,7 +122602,7 @@ void m68008_device::movem_l_dais_list_df8() // 4cf0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -122680,7 +122680,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -123557,7 +123557,7 @@ void m68008_device::movem_l_dpci_list_df8() // 4cfb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -123635,7 +123635,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -123797,14 +123797,14 @@ void m68008_device::trap_imm4_df8() // 4e40 fff0 update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -123839,7 +123839,7 @@ void m68008_device::trap_imm4_df8() // 4e40 fff0 m_da[16] = m_au; m_ftu = 0x80 | ((m_ird & 0xf) << 2); m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -123872,7 +123872,7 @@ void m68008_device::trap_imm4_df8() // 4e40 fff0 m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -124044,7 +124044,7 @@ void m68008_device::link_as_imm16_df8() // 4e50 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 2b5 link2 m_pc = m_au; @@ -124411,7 +124411,7 @@ void m68008_device::reset_df8() // 4e70 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 27b rset2 @@ -124531,7 +124531,7 @@ void m68008_device::stop_i16u_df8() // 4e72 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 327 aaa01 @@ -124558,7 +124558,7 @@ void m68008_device::rte_df8() // 4e73 ffff if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1); m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -124639,9 +124639,6 @@ void m68008_device::rte_df8() // 4e73 ffff m_inst_substate = 10; return; } - m_sr = m_new_sr; - update_user_super(); - update_interrupt(); m_edb |= m_program8.read_interruptible(m_aob | 1); m_icount -= 4; if(m_icount <= 0) { @@ -124739,7 +124736,7 @@ void m68008_device::rts_df8() // 4e75 ffff // 126 rts1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -124930,7 +124927,7 @@ trpv3: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -124963,7 +124960,7 @@ trpv3: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -124998,7 +124995,7 @@ trpv3: m_da[16] = m_au; m_ftu = 0x001c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -125031,7 +125028,7 @@ trpv3: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -125201,7 +125198,7 @@ void m68008_device::rtr_df8() // 4e77 ffff // 12a rtr1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -125659,7 +125656,7 @@ void m68008_device::jsr_dais_df8() // 4eb0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -126278,7 +126275,7 @@ void m68008_device::jsr_dpc_df8() // 4eba ffff void m68008_device::jsr_dpci_df8() // 4ebb ffff { // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -126599,7 +126596,7 @@ void m68008_device::jmp_dais_df8() // 4ef0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -126961,7 +126958,7 @@ void m68008_device::jmp_dpc_df8() // 4efa ffff void m68008_device::jmp_dpci_df8() // 4efb ffff { // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -127065,7 +127062,7 @@ void m68008_device::addq_b_imm3_ds_df8() // 5000 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -127114,7 +127111,7 @@ void m68008_device::addq_b_imm3_ais_df8() // 5010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -127136,7 +127133,7 @@ void m68008_device::addq_b_imm3_ais_df8() // 5010 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127203,7 +127200,7 @@ void m68008_device::addq_b_imm3_aips_df8() // 5018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -127223,7 +127220,7 @@ void m68008_device::addq_b_imm3_aips_df8() // 5018 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127292,7 +127289,7 @@ void m68008_device::addq_b_imm3_pais_df8() // 5020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -127312,7 +127309,7 @@ void m68008_device::addq_b_imm3_pais_df8() // 5020 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127405,7 +127402,7 @@ void m68008_device::addq_b_imm3_das_df8() // 5028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -127427,7 +127424,7 @@ void m68008_device::addq_b_imm3_das_df8() // 5028 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127486,7 +127483,7 @@ void m68008_device::addq_b_imm3_dais_df8() // 5030 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -127568,7 +127565,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -127590,7 +127587,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127684,7 +127681,7 @@ void m68008_device::addq_b_imm3_adr16_df8() // 5038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -127704,7 +127701,7 @@ void m68008_device::addq_b_imm3_adr16_df8() // 5038 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127829,7 +127826,7 @@ void m68008_device::addq_b_imm3_adr32_df8() // 5039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -127849,7 +127846,7 @@ void m68008_device::addq_b_imm3_adr32_df8() // 5039 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127912,7 +127909,7 @@ void m68008_device::addq_w_imm3_ds_df8() // 5040 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -127963,7 +127960,7 @@ void m68008_device::addq_w_imm3_as_df8() // 5048 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -127996,7 +127993,7 @@ void m68008_device::addq_w_imm3_as_df8() // 5048 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -128018,7 +128015,7 @@ void m68008_device::addq_w_imm3_ais_df8() // 5050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -128055,7 +128052,7 @@ void m68008_device::addq_w_imm3_ais_df8() // 5050 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128137,7 +128134,7 @@ void m68008_device::addq_w_imm3_aips_df8() // 5058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -128172,7 +128169,7 @@ void m68008_device::addq_w_imm3_aips_df8() // 5058 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128256,7 +128253,7 @@ void m68008_device::addq_w_imm3_pais_df8() // 5060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -128291,7 +128288,7 @@ void m68008_device::addq_w_imm3_pais_df8() // 5060 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128399,7 +128396,7 @@ void m68008_device::addq_w_imm3_das_df8() // 5068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -128436,7 +128433,7 @@ void m68008_device::addq_w_imm3_das_df8() // 5068 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128510,7 +128507,7 @@ void m68008_device::addq_w_imm3_dais_df8() // 5070 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -128592,7 +128589,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -128629,7 +128626,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128738,7 +128735,7 @@ void m68008_device::addq_w_imm3_adr16_df8() // 5078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -128773,7 +128770,7 @@ void m68008_device::addq_w_imm3_adr16_df8() // 5078 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128913,7 +128910,7 @@ void m68008_device::addq_w_imm3_adr32_df8() // 5079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -128948,7 +128945,7 @@ void m68008_device::addq_w_imm3_adr32_df8() // 5079 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129026,7 +129023,7 @@ void m68008_device::addq_l_imm3_ds_df8() // 5080 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -129060,7 +129057,7 @@ void m68008_device::addq_l_imm3_ds_df8() // 5080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -129085,7 +129082,7 @@ void m68008_device::addq_l_imm3_as_df8() // 5088 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -129118,7 +129115,7 @@ void m68008_device::addq_l_imm3_as_df8() // 5088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -129140,7 +129137,7 @@ void m68008_device::addq_l_imm3_ais_df8() // 5090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -129208,7 +129205,7 @@ void m68008_device::addq_l_imm3_ais_df8() // 5090 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129243,7 +129240,7 @@ void m68008_device::addq_l_imm3_ais_df8() // 5090 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129317,7 +129314,7 @@ void m68008_device::addq_l_imm3_aips_df8() // 5098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -129388,7 +129385,7 @@ void m68008_device::addq_l_imm3_aips_df8() // 5098 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129423,7 +129420,7 @@ void m68008_device::addq_l_imm3_aips_df8() // 5098 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129496,7 +129493,7 @@ void m68008_device::addq_l_imm3_pais_df8() // 50a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -129569,7 +129566,7 @@ void m68008_device::addq_l_imm3_pais_df8() // 50a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129604,7 +129601,7 @@ void m68008_device::addq_l_imm3_pais_df8() // 50a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129709,7 +129706,7 @@ void m68008_device::addq_l_imm3_das_df8() // 50a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -129777,7 +129774,7 @@ void m68008_device::addq_l_imm3_das_df8() // 50a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129812,7 +129809,7 @@ void m68008_device::addq_l_imm3_das_df8() // 50a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129884,7 +129881,7 @@ void m68008_device::addq_l_imm3_dais_df8() // 50b0 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -129965,7 +129962,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -130033,7 +130030,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130068,7 +130065,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -130175,7 +130172,7 @@ void m68008_device::addq_l_imm3_adr16_df8() // 50b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -130243,7 +130240,7 @@ void m68008_device::addq_l_imm3_adr16_df8() // 50b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130278,7 +130275,7 @@ void m68008_device::addq_l_imm3_adr16_df8() // 50b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -130416,7 +130413,7 @@ void m68008_device::addq_l_imm3_adr32_df8() // 50b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -130484,7 +130481,7 @@ void m68008_device::addq_l_imm3_adr32_df8() // 50b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130519,7 +130516,7 @@ void m68008_device::addq_l_imm3_adr32_df8() // 50b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -130595,7 +130592,7 @@ void m68008_device::st_ds_df8() // 50c0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -130607,7 +130604,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -130644,7 +130641,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130679,7 +130676,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -130694,7 +130691,7 @@ void m68008_device::dbt_ds_rel16_df8() // 50c8 fff8 // 06c dbcc1 m_t = 1; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -130706,13 +130703,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130750,7 +130747,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -130758,7 +130755,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -130792,11 +130789,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -130836,13 +130833,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -130882,7 +130879,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -130923,11 +130920,11 @@ void m68008_device::st_ais_df8() // 50d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -130945,7 +130942,7 @@ void m68008_device::st_ais_df8() // 50d0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -130955,7 +130952,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -130989,7 +130986,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131027,7 +131024,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -131055,12 +131052,12 @@ void m68008_device::st_aips_df8() // 50d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -131079,7 +131076,7 @@ void m68008_device::st_aips_df8() // 50d8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131089,7 +131086,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131123,7 +131120,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131161,7 +131158,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -131188,7 +131185,7 @@ void m68008_device::st_pais_df8() // 50e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -131196,7 +131193,7 @@ void m68008_device::st_pais_df8() // 50e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -131215,7 +131212,7 @@ void m68008_device::st_pais_df8() // 50e0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131225,7 +131222,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131259,7 +131256,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131297,7 +131294,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -131322,7 +131319,7 @@ void m68008_device::st_das_df8() // 50e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131355,11 +131352,11 @@ void m68008_device::st_das_df8() // 50e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -131377,7 +131374,7 @@ void m68008_device::st_das_df8() // 50e8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131387,7 +131384,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131421,7 +131418,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131459,7 +131456,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -131482,14 +131479,14 @@ void m68008_device::st_dais_df8() // 50f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -131497,7 +131494,7 @@ void m68008_device::st_dais_df8() // 50f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131531,7 +131528,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131567,11 +131564,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -131589,7 +131586,7 @@ adsw2: m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131599,7 +131596,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131633,7 +131630,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131671,7 +131668,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -131698,7 +131695,7 @@ void m68008_device::st_adr16_df8() // 50f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131731,7 +131728,7 @@ void m68008_device::st_adr16_df8() // 50f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -131750,7 +131747,7 @@ void m68008_device::st_adr16_df8() // 50f8 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131760,7 +131757,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131794,7 +131791,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131832,7 +131829,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -131857,7 +131854,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131891,7 +131888,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -131924,7 +131921,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -131943,7 +131940,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131953,7 +131950,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -131987,7 +131984,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -132025,7 +132022,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -132052,7 +132049,7 @@ void m68008_device::subq_b_imm3_ds_df8() // 5100 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -132101,7 +132098,7 @@ void m68008_device::subq_b_imm3_ais_df8() // 5110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -132123,7 +132120,7 @@ void m68008_device::subq_b_imm3_ais_df8() // 5110 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132190,7 +132187,7 @@ void m68008_device::subq_b_imm3_aips_df8() // 5118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -132210,7 +132207,7 @@ void m68008_device::subq_b_imm3_aips_df8() // 5118 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132279,7 +132276,7 @@ void m68008_device::subq_b_imm3_pais_df8() // 5120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -132299,7 +132296,7 @@ void m68008_device::subq_b_imm3_pais_df8() // 5120 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132392,7 +132389,7 @@ void m68008_device::subq_b_imm3_das_df8() // 5128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -132414,7 +132411,7 @@ void m68008_device::subq_b_imm3_das_df8() // 5128 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132473,7 +132470,7 @@ void m68008_device::subq_b_imm3_dais_df8() // 5130 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -132555,7 +132552,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -132577,7 +132574,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132671,7 +132668,7 @@ void m68008_device::subq_b_imm3_adr16_df8() // 5138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -132691,7 +132688,7 @@ void m68008_device::subq_b_imm3_adr16_df8() // 5138 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132816,7 +132813,7 @@ void m68008_device::subq_b_imm3_adr32_df8() // 5139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -132836,7 +132833,7 @@ void m68008_device::subq_b_imm3_adr32_df8() // 5139 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132899,7 +132896,7 @@ void m68008_device::subq_w_imm3_ds_df8() // 5140 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -132950,7 +132947,7 @@ void m68008_device::subq_w_imm3_as_df8() // 5148 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -132983,7 +132980,7 @@ void m68008_device::subq_w_imm3_as_df8() // 5148 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -133005,7 +133002,7 @@ void m68008_device::subq_w_imm3_ais_df8() // 5150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -133042,7 +133039,7 @@ void m68008_device::subq_w_imm3_ais_df8() // 5150 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133124,7 +133121,7 @@ void m68008_device::subq_w_imm3_aips_df8() // 5158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -133159,7 +133156,7 @@ void m68008_device::subq_w_imm3_aips_df8() // 5158 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133243,7 +133240,7 @@ void m68008_device::subq_w_imm3_pais_df8() // 5160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -133278,7 +133275,7 @@ void m68008_device::subq_w_imm3_pais_df8() // 5160 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133386,7 +133383,7 @@ void m68008_device::subq_w_imm3_das_df8() // 5168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -133423,7 +133420,7 @@ void m68008_device::subq_w_imm3_das_df8() // 5168 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133497,7 +133494,7 @@ void m68008_device::subq_w_imm3_dais_df8() // 5170 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -133579,7 +133576,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -133616,7 +133613,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133725,7 +133722,7 @@ void m68008_device::subq_w_imm3_adr16_df8() // 5178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -133760,7 +133757,7 @@ void m68008_device::subq_w_imm3_adr16_df8() // 5178 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133900,7 +133897,7 @@ void m68008_device::subq_w_imm3_adr32_df8() // 5179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -133935,7 +133932,7 @@ void m68008_device::subq_w_imm3_adr32_df8() // 5179 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134013,7 +134010,7 @@ void m68008_device::subq_l_imm3_ds_df8() // 5180 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -134047,7 +134044,7 @@ void m68008_device::subq_l_imm3_ds_df8() // 5180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -134072,7 +134069,7 @@ void m68008_device::subq_l_imm3_as_df8() // 5188 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -134105,7 +134102,7 @@ void m68008_device::subq_l_imm3_as_df8() // 5188 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -134127,7 +134124,7 @@ void m68008_device::subq_l_imm3_ais_df8() // 5190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -134195,7 +134192,7 @@ void m68008_device::subq_l_imm3_ais_df8() // 5190 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134230,7 +134227,7 @@ void m68008_device::subq_l_imm3_ais_df8() // 5190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134304,7 +134301,7 @@ void m68008_device::subq_l_imm3_aips_df8() // 5198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -134375,7 +134372,7 @@ void m68008_device::subq_l_imm3_aips_df8() // 5198 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134410,7 +134407,7 @@ void m68008_device::subq_l_imm3_aips_df8() // 5198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134483,7 +134480,7 @@ void m68008_device::subq_l_imm3_pais_df8() // 51a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -134556,7 +134553,7 @@ void m68008_device::subq_l_imm3_pais_df8() // 51a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134591,7 +134588,7 @@ void m68008_device::subq_l_imm3_pais_df8() // 51a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134696,7 +134693,7 @@ void m68008_device::subq_l_imm3_das_df8() // 51a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -134764,7 +134761,7 @@ void m68008_device::subq_l_imm3_das_df8() // 51a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134799,7 +134796,7 @@ void m68008_device::subq_l_imm3_das_df8() // 51a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134871,7 +134868,7 @@ void m68008_device::subq_l_imm3_dais_df8() // 51b0 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -134952,7 +134949,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -135020,7 +135017,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -135055,7 +135052,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -135162,7 +135159,7 @@ void m68008_device::subq_l_imm3_adr16_df8() // 51b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -135230,7 +135227,7 @@ void m68008_device::subq_l_imm3_adr16_df8() // 51b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -135265,7 +135262,7 @@ void m68008_device::subq_l_imm3_adr16_df8() // 51b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -135403,7 +135400,7 @@ void m68008_device::subq_l_imm3_adr32_df8() // 51b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -135471,7 +135468,7 @@ void m68008_device::subq_l_imm3_adr32_df8() // 51b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -135506,7 +135503,7 @@ void m68008_device::subq_l_imm3_adr32_df8() // 51b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -135582,7 +135579,7 @@ void m68008_device::sf_ds_df8() // 51c0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -135594,7 +135591,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -135631,7 +135628,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135666,7 +135663,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -135681,7 +135678,7 @@ void m68008_device::dbra_ds_rel16_df8() // 51c8 fff8 // 06c dbcc1 m_t = 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -135693,13 +135690,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135737,7 +135734,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -135745,7 +135742,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -135779,11 +135776,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -135823,13 +135820,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -135869,7 +135866,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -135910,11 +135907,11 @@ void m68008_device::sf_ais_df8() // 51d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -135932,7 +135929,7 @@ void m68008_device::sf_ais_df8() // 51d0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -135942,7 +135939,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -135976,7 +135973,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136014,7 +136011,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -136042,12 +136039,12 @@ void m68008_device::sf_aips_df8() // 51d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -136066,7 +136063,7 @@ void m68008_device::sf_aips_df8() // 51d8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136076,7 +136073,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136110,7 +136107,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136148,7 +136145,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -136175,7 +136172,7 @@ void m68008_device::sf_pais_df8() // 51e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -136183,7 +136180,7 @@ void m68008_device::sf_pais_df8() // 51e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -136202,7 +136199,7 @@ void m68008_device::sf_pais_df8() // 51e0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136212,7 +136209,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136246,7 +136243,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136284,7 +136281,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -136309,7 +136306,7 @@ void m68008_device::sf_das_df8() // 51e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136342,11 +136339,11 @@ void m68008_device::sf_das_df8() // 51e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -136364,7 +136361,7 @@ void m68008_device::sf_das_df8() // 51e8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136374,7 +136371,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136408,7 +136405,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136446,7 +136443,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -136469,14 +136466,14 @@ void m68008_device::sf_dais_df8() // 51f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -136484,7 +136481,7 @@ void m68008_device::sf_dais_df8() // 51f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136518,7 +136515,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136554,11 +136551,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -136576,7 +136573,7 @@ adsw2: m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136586,7 +136583,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136620,7 +136617,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136658,7 +136655,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -136685,7 +136682,7 @@ void m68008_device::sf_adr16_df8() // 51f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136718,7 +136715,7 @@ void m68008_device::sf_adr16_df8() // 51f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -136737,7 +136734,7 @@ void m68008_device::sf_adr16_df8() // 51f8 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136747,7 +136744,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136781,7 +136778,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136819,7 +136816,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -136844,7 +136841,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136878,7 +136875,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136911,7 +136908,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -136930,7 +136927,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136940,7 +136937,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -136974,7 +136971,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137012,7 +137009,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -137039,7 +137036,7 @@ void m68008_device::shi_ds_df8() // 52c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -137051,7 +137048,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137088,7 +137085,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137123,7 +137120,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -137138,7 +137135,7 @@ void m68008_device::dbhi_ds_rel16_df8() // 52c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) == 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -137150,13 +137147,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137194,7 +137191,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -137202,7 +137199,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137236,11 +137233,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137280,13 +137277,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137326,7 +137323,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137367,11 +137364,11 @@ void m68008_device::shi_ais_df8() // 52d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -137389,7 +137386,7 @@ void m68008_device::shi_ais_df8() // 52d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137399,7 +137396,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137433,7 +137430,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137471,7 +137468,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -137499,12 +137496,12 @@ void m68008_device::shi_aips_df8() // 52d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -137523,7 +137520,7 @@ void m68008_device::shi_aips_df8() // 52d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137533,7 +137530,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137567,7 +137564,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137605,7 +137602,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -137632,7 +137629,7 @@ void m68008_device::shi_pais_df8() // 52e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -137640,7 +137637,7 @@ void m68008_device::shi_pais_df8() // 52e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -137659,7 +137656,7 @@ void m68008_device::shi_pais_df8() // 52e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137669,7 +137666,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137703,7 +137700,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137741,7 +137738,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -137766,7 +137763,7 @@ void m68008_device::shi_das_df8() // 52e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137799,11 +137796,11 @@ void m68008_device::shi_das_df8() // 52e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -137821,7 +137818,7 @@ void m68008_device::shi_das_df8() // 52e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137831,7 +137828,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137865,7 +137862,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137903,7 +137900,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -137926,14 +137923,14 @@ void m68008_device::shi_dais_df8() // 52f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -137941,7 +137938,7 @@ void m68008_device::shi_dais_df8() // 52f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -137975,7 +137972,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138011,11 +138008,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -138033,7 +138030,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138043,7 +138040,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138077,7 +138074,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138115,7 +138112,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -138142,7 +138139,7 @@ void m68008_device::shi_adr16_df8() // 52f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138175,7 +138172,7 @@ void m68008_device::shi_adr16_df8() // 52f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -138194,7 +138191,7 @@ void m68008_device::shi_adr16_df8() // 52f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138204,7 +138201,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138238,7 +138235,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138276,7 +138273,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -138301,7 +138298,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138335,7 +138332,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138368,7 +138365,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -138387,7 +138384,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138397,7 +138394,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138431,7 +138428,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138469,7 +138466,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -138496,7 +138493,7 @@ void m68008_device::sls_ds_df8() // 53c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -138508,7 +138505,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138545,7 +138542,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138580,7 +138577,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -138595,7 +138592,7 @@ void m68008_device::dbls_ds_rel16_df8() // 53c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) != 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -138607,13 +138604,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138651,7 +138648,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -138659,7 +138656,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138693,11 +138690,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138737,13 +138734,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138783,7 +138780,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138824,11 +138821,11 @@ void m68008_device::sls_ais_df8() // 53d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -138846,7 +138843,7 @@ void m68008_device::sls_ais_df8() // 53d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138856,7 +138853,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -138890,7 +138887,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138928,7 +138925,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -138956,12 +138953,12 @@ void m68008_device::sls_aips_df8() // 53d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -138980,7 +138977,7 @@ void m68008_device::sls_aips_df8() // 53d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138990,7 +138987,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139024,7 +139021,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139062,7 +139059,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -139089,7 +139086,7 @@ void m68008_device::sls_pais_df8() // 53e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -139097,7 +139094,7 @@ void m68008_device::sls_pais_df8() // 53e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -139116,7 +139113,7 @@ void m68008_device::sls_pais_df8() // 53e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139126,7 +139123,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139160,7 +139157,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139198,7 +139195,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -139223,7 +139220,7 @@ void m68008_device::sls_das_df8() // 53e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139256,11 +139253,11 @@ void m68008_device::sls_das_df8() // 53e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -139278,7 +139275,7 @@ void m68008_device::sls_das_df8() // 53e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139288,7 +139285,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139322,7 +139319,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139360,7 +139357,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -139383,14 +139380,14 @@ void m68008_device::sls_dais_df8() // 53f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -139398,7 +139395,7 @@ void m68008_device::sls_dais_df8() // 53f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139432,7 +139429,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139468,11 +139465,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -139490,7 +139487,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139500,7 +139497,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139534,7 +139531,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139572,7 +139569,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -139599,7 +139596,7 @@ void m68008_device::sls_adr16_df8() // 53f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139632,7 +139629,7 @@ void m68008_device::sls_adr16_df8() // 53f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -139651,7 +139648,7 @@ void m68008_device::sls_adr16_df8() // 53f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139661,7 +139658,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139695,7 +139692,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139733,7 +139730,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -139758,7 +139755,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139792,7 +139789,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139825,7 +139822,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -139844,7 +139841,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139854,7 +139851,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -139888,7 +139885,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139926,7 +139923,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -139953,7 +139950,7 @@ void m68008_device::scc_ds_df8() // 54c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -139965,7 +139962,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140002,7 +139999,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -140037,7 +140034,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -140052,7 +140049,7 @@ void m68008_device::dbcc_ds_rel16_df8() // 54c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_C); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -140064,13 +140061,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -140108,7 +140105,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -140116,7 +140113,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140150,11 +140147,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140194,13 +140191,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140240,7 +140237,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140281,11 +140278,11 @@ void m68008_device::scc_ais_df8() // 54d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -140303,7 +140300,7 @@ void m68008_device::scc_ais_df8() // 54d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140313,7 +140310,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140347,7 +140344,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -140385,7 +140382,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -140413,12 +140410,12 @@ void m68008_device::scc_aips_df8() // 54d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -140437,7 +140434,7 @@ void m68008_device::scc_aips_df8() // 54d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140447,7 +140444,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140481,7 +140478,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -140519,7 +140516,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -140546,7 +140543,7 @@ void m68008_device::scc_pais_df8() // 54e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -140554,7 +140551,7 @@ void m68008_device::scc_pais_df8() // 54e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -140573,7 +140570,7 @@ void m68008_device::scc_pais_df8() // 54e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140583,7 +140580,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140617,7 +140614,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -140655,7 +140652,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -140680,7 +140677,7 @@ void m68008_device::scc_das_df8() // 54e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140713,11 +140710,11 @@ void m68008_device::scc_das_df8() // 54e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -140735,7 +140732,7 @@ void m68008_device::scc_das_df8() // 54e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140745,7 +140742,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140779,7 +140776,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -140817,7 +140814,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -140840,14 +140837,14 @@ void m68008_device::scc_dais_df8() // 54f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -140855,7 +140852,7 @@ void m68008_device::scc_dais_df8() // 54f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140889,7 +140886,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140925,11 +140922,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -140947,7 +140944,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140957,7 +140954,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -140991,7 +140988,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141029,7 +141026,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -141056,7 +141053,7 @@ void m68008_device::scc_adr16_df8() // 54f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141089,7 +141086,7 @@ void m68008_device::scc_adr16_df8() // 54f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -141108,7 +141105,7 @@ void m68008_device::scc_adr16_df8() // 54f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141118,7 +141115,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141152,7 +141149,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141190,7 +141187,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -141215,7 +141212,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141249,7 +141246,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141282,7 +141279,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -141301,7 +141298,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141311,7 +141308,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141345,7 +141342,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141383,7 +141380,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -141410,7 +141407,7 @@ void m68008_device::scs_ds_df8() // 55c0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -141422,7 +141419,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141459,7 +141456,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141494,7 +141491,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -141509,7 +141506,7 @@ void m68008_device::dbcs_ds_rel16_df8() // 55c8 fff8 // 06c dbcc1 m_t = m_sr & SR_C; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -141521,13 +141518,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141565,7 +141562,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -141573,7 +141570,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141607,11 +141604,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141651,13 +141648,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141697,7 +141694,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141738,11 +141735,11 @@ void m68008_device::scs_ais_df8() // 55d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -141760,7 +141757,7 @@ void m68008_device::scs_ais_df8() // 55d0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141770,7 +141767,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141804,7 +141801,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141842,7 +141839,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -141870,12 +141867,12 @@ void m68008_device::scs_aips_df8() // 55d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -141894,7 +141891,7 @@ void m68008_device::scs_aips_df8() // 55d8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141904,7 +141901,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -141938,7 +141935,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -141976,7 +141973,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -142003,7 +142000,7 @@ void m68008_device::scs_pais_df8() // 55e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -142011,7 +142008,7 @@ void m68008_device::scs_pais_df8() // 55e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -142030,7 +142027,7 @@ void m68008_device::scs_pais_df8() // 55e0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142040,7 +142037,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142074,7 +142071,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142112,7 +142109,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -142137,7 +142134,7 @@ void m68008_device::scs_das_df8() // 55e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142170,11 +142167,11 @@ void m68008_device::scs_das_df8() // 55e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -142192,7 +142189,7 @@ void m68008_device::scs_das_df8() // 55e8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142202,7 +142199,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142236,7 +142233,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142274,7 +142271,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -142297,14 +142294,14 @@ void m68008_device::scs_dais_df8() // 55f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -142312,7 +142309,7 @@ void m68008_device::scs_dais_df8() // 55f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142346,7 +142343,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142382,11 +142379,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -142404,7 +142401,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142414,7 +142411,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142448,7 +142445,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142486,7 +142483,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -142513,7 +142510,7 @@ void m68008_device::scs_adr16_df8() // 55f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142546,7 +142543,7 @@ void m68008_device::scs_adr16_df8() // 55f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -142565,7 +142562,7 @@ void m68008_device::scs_adr16_df8() // 55f8 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142575,7 +142572,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142609,7 +142606,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142647,7 +142644,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -142672,7 +142669,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142706,7 +142703,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142739,7 +142736,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -142758,7 +142755,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142768,7 +142765,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142802,7 +142799,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142840,7 +142837,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -142867,7 +142864,7 @@ void m68008_device::sne_ds_df8() // 56c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -142879,7 +142876,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -142916,7 +142913,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -142951,7 +142948,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -142966,7 +142963,7 @@ void m68008_device::dbne_ds_rel16_df8() // 56c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_Z); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -142978,13 +142975,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -143022,7 +143019,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -143030,7 +143027,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143064,11 +143061,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143108,13 +143105,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143154,7 +143151,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143195,11 +143192,11 @@ void m68008_device::sne_ais_df8() // 56d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -143217,7 +143214,7 @@ void m68008_device::sne_ais_df8() // 56d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143227,7 +143224,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143261,7 +143258,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -143299,7 +143296,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -143327,12 +143324,12 @@ void m68008_device::sne_aips_df8() // 56d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -143351,7 +143348,7 @@ void m68008_device::sne_aips_df8() // 56d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143361,7 +143358,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143395,7 +143392,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -143433,7 +143430,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -143460,7 +143457,7 @@ void m68008_device::sne_pais_df8() // 56e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -143468,7 +143465,7 @@ void m68008_device::sne_pais_df8() // 56e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -143487,7 +143484,7 @@ void m68008_device::sne_pais_df8() // 56e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143497,7 +143494,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143531,7 +143528,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -143569,7 +143566,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -143594,7 +143591,7 @@ void m68008_device::sne_das_df8() // 56e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143627,11 +143624,11 @@ void m68008_device::sne_das_df8() // 56e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -143649,7 +143646,7 @@ void m68008_device::sne_das_df8() // 56e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143659,7 +143656,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143693,7 +143690,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -143731,7 +143728,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -143754,14 +143751,14 @@ void m68008_device::sne_dais_df8() // 56f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -143769,7 +143766,7 @@ void m68008_device::sne_dais_df8() // 56f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143803,7 +143800,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143839,11 +143836,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -143861,7 +143858,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143871,7 +143868,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -143905,7 +143902,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -143943,7 +143940,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -143970,7 +143967,7 @@ void m68008_device::sne_adr16_df8() // 56f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144003,7 +144000,7 @@ void m68008_device::sne_adr16_df8() // 56f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -144022,7 +144019,7 @@ void m68008_device::sne_adr16_df8() // 56f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144032,7 +144029,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144066,7 +144063,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144104,7 +144101,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -144129,7 +144126,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144163,7 +144160,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144196,7 +144193,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -144215,7 +144212,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144225,7 +144222,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144259,7 +144256,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144297,7 +144294,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -144324,7 +144321,7 @@ void m68008_device::seq_ds_df8() // 57c0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -144336,7 +144333,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144373,7 +144370,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144408,7 +144405,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -144423,7 +144420,7 @@ void m68008_device::dbeq_ds_rel16_df8() // 57c8 fff8 // 06c dbcc1 m_t = m_sr & SR_Z; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -144435,13 +144432,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144479,7 +144476,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -144487,7 +144484,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144521,11 +144518,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144565,13 +144562,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144611,7 +144608,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144652,11 +144649,11 @@ void m68008_device::seq_ais_df8() // 57d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -144674,7 +144671,7 @@ void m68008_device::seq_ais_df8() // 57d0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144684,7 +144681,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144718,7 +144715,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144756,7 +144753,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -144784,12 +144781,12 @@ void m68008_device::seq_aips_df8() // 57d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -144808,7 +144805,7 @@ void m68008_device::seq_aips_df8() // 57d8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144818,7 +144815,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144852,7 +144849,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -144890,7 +144887,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -144917,7 +144914,7 @@ void m68008_device::seq_pais_df8() // 57e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -144925,7 +144922,7 @@ void m68008_device::seq_pais_df8() // 57e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -144944,7 +144941,7 @@ void m68008_device::seq_pais_df8() // 57e0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144954,7 +144951,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -144988,7 +144985,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145026,7 +145023,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -145051,7 +145048,7 @@ void m68008_device::seq_das_df8() // 57e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145084,11 +145081,11 @@ void m68008_device::seq_das_df8() // 57e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -145106,7 +145103,7 @@ void m68008_device::seq_das_df8() // 57e8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145116,7 +145113,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145150,7 +145147,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145188,7 +145185,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -145211,14 +145208,14 @@ void m68008_device::seq_dais_df8() // 57f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -145226,7 +145223,7 @@ void m68008_device::seq_dais_df8() // 57f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145260,7 +145257,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145296,11 +145293,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -145318,7 +145315,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145328,7 +145325,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145362,7 +145359,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145400,7 +145397,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -145427,7 +145424,7 @@ void m68008_device::seq_adr16_df8() // 57f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145460,7 +145457,7 @@ void m68008_device::seq_adr16_df8() // 57f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -145479,7 +145476,7 @@ void m68008_device::seq_adr16_df8() // 57f8 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145489,7 +145486,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145523,7 +145520,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145561,7 +145558,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -145586,7 +145583,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145620,7 +145617,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145653,7 +145650,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -145672,7 +145669,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145682,7 +145679,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145716,7 +145713,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145754,7 +145751,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -145781,7 +145778,7 @@ void m68008_device::svc_ds_df8() // 58c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -145793,7 +145790,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145830,7 +145827,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145865,7 +145862,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -145880,7 +145877,7 @@ void m68008_device::dbvc_ds_rel16_df8() // 58c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -145892,13 +145889,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -145936,7 +145933,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -145944,7 +145941,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -145978,11 +145975,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146022,13 +146019,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146068,7 +146065,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146109,11 +146106,11 @@ void m68008_device::svc_ais_df8() // 58d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -146131,7 +146128,7 @@ void m68008_device::svc_ais_df8() // 58d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146141,7 +146138,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146175,7 +146172,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -146213,7 +146210,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -146241,12 +146238,12 @@ void m68008_device::svc_aips_df8() // 58d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -146265,7 +146262,7 @@ void m68008_device::svc_aips_df8() // 58d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146275,7 +146272,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146309,7 +146306,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -146347,7 +146344,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -146374,7 +146371,7 @@ void m68008_device::svc_pais_df8() // 58e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -146382,7 +146379,7 @@ void m68008_device::svc_pais_df8() // 58e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -146401,7 +146398,7 @@ void m68008_device::svc_pais_df8() // 58e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146411,7 +146408,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146445,7 +146442,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -146483,7 +146480,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -146508,7 +146505,7 @@ void m68008_device::svc_das_df8() // 58e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146541,11 +146538,11 @@ void m68008_device::svc_das_df8() // 58e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -146563,7 +146560,7 @@ void m68008_device::svc_das_df8() // 58e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146573,7 +146570,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146607,7 +146604,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -146645,7 +146642,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -146668,14 +146665,14 @@ void m68008_device::svc_dais_df8() // 58f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -146683,7 +146680,7 @@ void m68008_device::svc_dais_df8() // 58f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146717,7 +146714,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146753,11 +146750,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -146775,7 +146772,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146785,7 +146782,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146819,7 +146816,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -146857,7 +146854,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -146884,7 +146881,7 @@ void m68008_device::svc_adr16_df8() // 58f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -146917,7 +146914,7 @@ void m68008_device::svc_adr16_df8() // 58f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -146936,7 +146933,7 @@ void m68008_device::svc_adr16_df8() // 58f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146946,7 +146943,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -146980,7 +146977,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147018,7 +147015,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -147043,7 +147040,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147077,7 +147074,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147110,7 +147107,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -147129,7 +147126,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147139,7 +147136,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147173,7 +147170,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147211,7 +147208,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -147238,7 +147235,7 @@ void m68008_device::svs_ds_df8() // 59c0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -147250,7 +147247,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147287,7 +147284,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147322,7 +147319,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -147337,7 +147334,7 @@ void m68008_device::dbvs_ds_rel16_df8() // 59c8 fff8 // 06c dbcc1 m_t = m_sr & SR_V; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -147349,13 +147346,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147393,7 +147390,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -147401,7 +147398,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147435,11 +147432,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147479,13 +147476,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147525,7 +147522,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147566,11 +147563,11 @@ void m68008_device::svs_ais_df8() // 59d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -147588,7 +147585,7 @@ void m68008_device::svs_ais_df8() // 59d0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147598,7 +147595,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147632,7 +147629,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147670,7 +147667,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -147698,12 +147695,12 @@ void m68008_device::svs_aips_df8() // 59d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -147722,7 +147719,7 @@ void m68008_device::svs_aips_df8() // 59d8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147732,7 +147729,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147766,7 +147763,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147804,7 +147801,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -147831,7 +147828,7 @@ void m68008_device::svs_pais_df8() // 59e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -147839,7 +147836,7 @@ void m68008_device::svs_pais_df8() // 59e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -147858,7 +147855,7 @@ void m68008_device::svs_pais_df8() // 59e0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147868,7 +147865,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147902,7 +147899,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -147940,7 +147937,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -147965,7 +147962,7 @@ void m68008_device::svs_das_df8() // 59e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -147998,11 +147995,11 @@ void m68008_device::svs_das_df8() // 59e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -148020,7 +148017,7 @@ void m68008_device::svs_das_df8() // 59e8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148030,7 +148027,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148064,7 +148061,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148102,7 +148099,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -148125,14 +148122,14 @@ void m68008_device::svs_dais_df8() // 59f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -148140,7 +148137,7 @@ void m68008_device::svs_dais_df8() // 59f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148174,7 +148171,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148210,11 +148207,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -148232,7 +148229,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148242,7 +148239,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148276,7 +148273,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148314,7 +148311,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -148341,7 +148338,7 @@ void m68008_device::svs_adr16_df8() // 59f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148374,7 +148371,7 @@ void m68008_device::svs_adr16_df8() // 59f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -148393,7 +148390,7 @@ void m68008_device::svs_adr16_df8() // 59f8 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148403,7 +148400,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148437,7 +148434,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148475,7 +148472,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -148500,7 +148497,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148534,7 +148531,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148567,7 +148564,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -148586,7 +148583,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148596,7 +148593,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148630,7 +148627,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148668,7 +148665,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -148695,7 +148692,7 @@ void m68008_device::spl_ds_df8() // 5ac0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -148707,7 +148704,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148744,7 +148741,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148779,7 +148776,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -148794,7 +148791,7 @@ void m68008_device::dbpl_ds_rel16_df8() // 5ac8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_N); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -148806,13 +148803,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -148850,7 +148847,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -148858,7 +148855,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148892,11 +148889,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148936,13 +148933,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -148982,7 +148979,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149023,11 +149020,11 @@ void m68008_device::spl_ais_df8() // 5ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -149045,7 +149042,7 @@ void m68008_device::spl_ais_df8() // 5ad0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149055,7 +149052,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149089,7 +149086,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149127,7 +149124,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -149155,12 +149152,12 @@ void m68008_device::spl_aips_df8() // 5ad8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -149179,7 +149176,7 @@ void m68008_device::spl_aips_df8() // 5ad8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149189,7 +149186,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149223,7 +149220,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149261,7 +149258,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -149288,7 +149285,7 @@ void m68008_device::spl_pais_df8() // 5ae0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -149296,7 +149293,7 @@ void m68008_device::spl_pais_df8() // 5ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -149315,7 +149312,7 @@ void m68008_device::spl_pais_df8() // 5ae0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149325,7 +149322,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149359,7 +149356,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149397,7 +149394,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -149422,7 +149419,7 @@ void m68008_device::spl_das_df8() // 5ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149455,11 +149452,11 @@ void m68008_device::spl_das_df8() // 5ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -149477,7 +149474,7 @@ void m68008_device::spl_das_df8() // 5ae8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149487,7 +149484,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149521,7 +149518,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149559,7 +149556,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -149582,14 +149579,14 @@ void m68008_device::spl_dais_df8() // 5af0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -149597,7 +149594,7 @@ void m68008_device::spl_dais_df8() // 5af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149631,7 +149628,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149667,11 +149664,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -149689,7 +149686,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149699,7 +149696,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149733,7 +149730,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149771,7 +149768,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -149798,7 +149795,7 @@ void m68008_device::spl_adr16_df8() // 5af8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149831,7 +149828,7 @@ void m68008_device::spl_adr16_df8() // 5af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -149850,7 +149847,7 @@ void m68008_device::spl_adr16_df8() // 5af8 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149860,7 +149857,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149894,7 +149891,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -149932,7 +149929,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -149957,7 +149954,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -149991,7 +149988,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150024,7 +150021,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -150043,7 +150040,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150053,7 +150050,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150087,7 +150084,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150125,7 +150122,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -150152,7 +150149,7 @@ void m68008_device::smi_ds_df8() // 5bc0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -150164,7 +150161,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150201,7 +150198,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150236,7 +150233,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -150251,7 +150248,7 @@ void m68008_device::dbmi_ds_rel16_df8() // 5bc8 fff8 // 06c dbcc1 m_t = m_sr & SR_N; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -150263,13 +150260,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150307,7 +150304,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -150315,7 +150312,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150349,11 +150346,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150393,13 +150390,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150439,7 +150436,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150480,11 +150477,11 @@ void m68008_device::smi_ais_df8() // 5bd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -150502,7 +150499,7 @@ void m68008_device::smi_ais_df8() // 5bd0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150512,7 +150509,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150546,7 +150543,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150584,7 +150581,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -150612,12 +150609,12 @@ void m68008_device::smi_aips_df8() // 5bd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -150636,7 +150633,7 @@ void m68008_device::smi_aips_df8() // 5bd8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150646,7 +150643,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150680,7 +150677,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150718,7 +150715,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -150745,7 +150742,7 @@ void m68008_device::smi_pais_df8() // 5be0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -150753,7 +150750,7 @@ void m68008_device::smi_pais_df8() // 5be0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -150772,7 +150769,7 @@ void m68008_device::smi_pais_df8() // 5be0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150782,7 +150779,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150816,7 +150813,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150854,7 +150851,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -150879,7 +150876,7 @@ void m68008_device::smi_das_df8() // 5be8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150912,11 +150909,11 @@ void m68008_device::smi_das_df8() // 5be8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -150934,7 +150931,7 @@ void m68008_device::smi_das_df8() // 5be8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150944,7 +150941,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -150978,7 +150975,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151016,7 +151013,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -151039,14 +151036,14 @@ void m68008_device::smi_dais_df8() // 5bf0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -151054,7 +151051,7 @@ void m68008_device::smi_dais_df8() // 5bf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151088,7 +151085,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151124,11 +151121,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -151146,7 +151143,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151156,7 +151153,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151190,7 +151187,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151228,7 +151225,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -151255,7 +151252,7 @@ void m68008_device::smi_adr16_df8() // 5bf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151288,7 +151285,7 @@ void m68008_device::smi_adr16_df8() // 5bf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -151307,7 +151304,7 @@ void m68008_device::smi_adr16_df8() // 5bf8 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151317,7 +151314,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151351,7 +151348,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151389,7 +151386,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -151414,7 +151411,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151448,7 +151445,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151481,7 +151478,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -151500,7 +151497,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151510,7 +151507,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151544,7 +151541,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151582,7 +151579,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -151609,7 +151606,7 @@ void m68008_device::sge_ds_df8() // 5cc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -151621,7 +151618,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151658,7 +151655,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151693,7 +151690,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -151708,7 +151705,7 @@ void m68008_device::dbge_ds_rel16_df8() // 5cc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -151720,13 +151717,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151764,7 +151761,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -151772,7 +151769,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151806,11 +151803,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151850,13 +151847,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151896,7 +151893,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -151937,11 +151934,11 @@ void m68008_device::sge_ais_df8() // 5cd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -151959,7 +151956,7 @@ void m68008_device::sge_ais_df8() // 5cd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151969,7 +151966,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152003,7 +152000,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152041,7 +152038,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -152069,12 +152066,12 @@ void m68008_device::sge_aips_df8() // 5cd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -152093,7 +152090,7 @@ void m68008_device::sge_aips_df8() // 5cd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152103,7 +152100,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152137,7 +152134,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152175,7 +152172,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -152202,7 +152199,7 @@ void m68008_device::sge_pais_df8() // 5ce0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -152210,7 +152207,7 @@ void m68008_device::sge_pais_df8() // 5ce0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -152229,7 +152226,7 @@ void m68008_device::sge_pais_df8() // 5ce0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152239,7 +152236,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152273,7 +152270,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152311,7 +152308,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -152336,7 +152333,7 @@ void m68008_device::sge_das_df8() // 5ce8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152369,11 +152366,11 @@ void m68008_device::sge_das_df8() // 5ce8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -152391,7 +152388,7 @@ void m68008_device::sge_das_df8() // 5ce8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152401,7 +152398,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152435,7 +152432,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152473,7 +152470,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -152496,14 +152493,14 @@ void m68008_device::sge_dais_df8() // 5cf0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -152511,7 +152508,7 @@ void m68008_device::sge_dais_df8() // 5cf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152545,7 +152542,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152581,11 +152578,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -152603,7 +152600,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152613,7 +152610,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152647,7 +152644,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152685,7 +152682,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -152712,7 +152709,7 @@ void m68008_device::sge_adr16_df8() // 5cf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152745,7 +152742,7 @@ void m68008_device::sge_adr16_df8() // 5cf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -152764,7 +152761,7 @@ void m68008_device::sge_adr16_df8() // 5cf8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152774,7 +152771,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152808,7 +152805,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152846,7 +152843,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -152871,7 +152868,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -152905,7 +152902,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152938,7 +152935,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -152957,7 +152954,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152967,7 +152964,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153001,7 +152998,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153039,7 +153036,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -153066,7 +153063,7 @@ void m68008_device::slt_ds_df8() // 5dc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -153078,7 +153075,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153115,7 +153112,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153150,7 +153147,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -153165,7 +153162,7 @@ void m68008_device::dblt_ds_rel16_df8() // 5dc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -153177,13 +153174,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153221,7 +153218,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -153229,7 +153226,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153263,11 +153260,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153307,13 +153304,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153353,7 +153350,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153394,11 +153391,11 @@ void m68008_device::slt_ais_df8() // 5dd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -153416,7 +153413,7 @@ void m68008_device::slt_ais_df8() // 5dd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153426,7 +153423,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153460,7 +153457,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153498,7 +153495,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -153526,12 +153523,12 @@ void m68008_device::slt_aips_df8() // 5dd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -153550,7 +153547,7 @@ void m68008_device::slt_aips_df8() // 5dd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153560,7 +153557,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153594,7 +153591,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153632,7 +153629,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -153659,7 +153656,7 @@ void m68008_device::slt_pais_df8() // 5de0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -153667,7 +153664,7 @@ void m68008_device::slt_pais_df8() // 5de0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -153686,7 +153683,7 @@ void m68008_device::slt_pais_df8() // 5de0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153696,7 +153693,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153730,7 +153727,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153768,7 +153765,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -153793,7 +153790,7 @@ void m68008_device::slt_das_df8() // 5de8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153826,11 +153823,11 @@ void m68008_device::slt_das_df8() // 5de8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -153848,7 +153845,7 @@ void m68008_device::slt_das_df8() // 5de8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153858,7 +153855,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -153892,7 +153889,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -153930,7 +153927,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -153953,14 +153950,14 @@ void m68008_device::slt_dais_df8() // 5df0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -153968,7 +153965,7 @@ void m68008_device::slt_dais_df8() // 5df0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154002,7 +153999,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154038,11 +154035,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -154060,7 +154057,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154070,7 +154067,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154104,7 +154101,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154142,7 +154139,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -154169,7 +154166,7 @@ void m68008_device::slt_adr16_df8() // 5df8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154202,7 +154199,7 @@ void m68008_device::slt_adr16_df8() // 5df8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -154221,7 +154218,7 @@ void m68008_device::slt_adr16_df8() // 5df8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154231,7 +154228,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154265,7 +154262,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154303,7 +154300,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -154328,7 +154325,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154362,7 +154359,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154395,7 +154392,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -154414,7 +154411,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154424,7 +154421,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154458,7 +154455,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154496,7 +154493,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -154523,7 +154520,7 @@ void m68008_device::sgt_ds_df8() // 5ec0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -154535,7 +154532,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154572,7 +154569,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154607,7 +154604,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -154622,7 +154619,7 @@ void m68008_device::dbgt_ds_rel16_df8() // 5ec8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -154634,13 +154631,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154678,7 +154675,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -154686,7 +154683,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154720,11 +154717,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154764,13 +154761,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154810,7 +154807,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154851,11 +154848,11 @@ void m68008_device::sgt_ais_df8() // 5ed0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -154873,7 +154870,7 @@ void m68008_device::sgt_ais_df8() // 5ed0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154883,7 +154880,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -154917,7 +154914,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -154955,7 +154952,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -154983,12 +154980,12 @@ void m68008_device::sgt_aips_df8() // 5ed8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -155007,7 +155004,7 @@ void m68008_device::sgt_aips_df8() // 5ed8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155017,7 +155014,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155051,7 +155048,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155089,7 +155086,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -155116,7 +155113,7 @@ void m68008_device::sgt_pais_df8() // 5ee0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -155124,7 +155121,7 @@ void m68008_device::sgt_pais_df8() // 5ee0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -155143,7 +155140,7 @@ void m68008_device::sgt_pais_df8() // 5ee0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155153,7 +155150,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155187,7 +155184,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155225,7 +155222,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -155250,7 +155247,7 @@ void m68008_device::sgt_das_df8() // 5ee8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155283,11 +155280,11 @@ void m68008_device::sgt_das_df8() // 5ee8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -155305,7 +155302,7 @@ void m68008_device::sgt_das_df8() // 5ee8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155315,7 +155312,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155349,7 +155346,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155387,7 +155384,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -155410,14 +155407,14 @@ void m68008_device::sgt_dais_df8() // 5ef0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -155425,7 +155422,7 @@ void m68008_device::sgt_dais_df8() // 5ef0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155459,7 +155456,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155495,11 +155492,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -155517,7 +155514,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155527,7 +155524,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155561,7 +155558,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155599,7 +155596,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -155626,7 +155623,7 @@ void m68008_device::sgt_adr16_df8() // 5ef8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155659,7 +155656,7 @@ void m68008_device::sgt_adr16_df8() // 5ef8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -155678,7 +155675,7 @@ void m68008_device::sgt_adr16_df8() // 5ef8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155688,7 +155685,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155722,7 +155719,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155760,7 +155757,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -155785,7 +155782,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155819,7 +155816,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155852,7 +155849,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -155871,7 +155868,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155881,7 +155878,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -155915,7 +155912,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -155953,7 +155950,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -155980,7 +155977,7 @@ void m68008_device::sle_ds_df8() // 5fc0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -155992,7 +155989,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156029,7 +156026,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156064,7 +156061,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -156079,7 +156076,7 @@ void m68008_device::dble_ds_rel16_df8() // 5fc8 fff8 // 06c dbcc1 m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -156091,13 +156088,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156135,7 +156132,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156143,7 +156140,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156177,11 +156174,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156221,13 +156218,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156267,7 +156264,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156308,11 +156305,11 @@ void m68008_device::sle_ais_df8() // 5fd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -156330,7 +156327,7 @@ void m68008_device::sle_ais_df8() // 5fd0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156340,7 +156337,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156374,7 +156371,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156412,7 +156409,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -156440,12 +156437,12 @@ void m68008_device::sle_aips_df8() // 5fd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -156464,7 +156461,7 @@ void m68008_device::sle_aips_df8() // 5fd8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156474,7 +156471,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156508,7 +156505,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156546,7 +156543,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -156573,7 +156570,7 @@ void m68008_device::sle_pais_df8() // 5fe0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -156581,7 +156578,7 @@ void m68008_device::sle_pais_df8() // 5fe0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -156600,7 +156597,7 @@ void m68008_device::sle_pais_df8() // 5fe0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156610,7 +156607,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156644,7 +156641,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156682,7 +156679,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -156707,7 +156704,7 @@ void m68008_device::sle_das_df8() // 5fe8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156740,11 +156737,11 @@ void m68008_device::sle_das_df8() // 5fe8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -156762,7 +156759,7 @@ void m68008_device::sle_das_df8() // 5fe8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156772,7 +156769,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156806,7 +156803,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156844,7 +156841,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -156867,14 +156864,14 @@ void m68008_device::sle_dais_df8() // 5ff0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -156882,7 +156879,7 @@ void m68008_device::sle_dais_df8() // 5ff0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156916,7 +156913,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -156952,11 +156949,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -156974,7 +156971,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156984,7 +156981,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -157018,7 +157015,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157056,7 +157053,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -157083,7 +157080,7 @@ void m68008_device::sle_adr16_df8() // 5ff8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157116,7 +157113,7 @@ void m68008_device::sle_adr16_df8() // 5ff8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -157135,7 +157132,7 @@ void m68008_device::sle_adr16_df8() // 5ff8 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157145,7 +157142,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -157179,7 +157176,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157217,7 +157214,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -157242,7 +157239,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -157276,7 +157273,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157309,7 +157306,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -157328,7 +157325,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157338,7 +157335,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -157372,7 +157369,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157410,7 +157407,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -157661,7 +157658,7 @@ void m68008_device::bsr_rel16_df8() // 6100 ffff { // 0a9 bsrw1 m_at = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_icount -= 2; @@ -157808,7 +157805,7 @@ void m68008_device::bsr_rel8_df8() // 6100 ff00 // 089 bsri1 m_at = m_pc; m_au = m_da[m_sp] - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 102 bsri2 @@ -161150,7 +161147,7 @@ void m68008_device::moveq_imm8o_dd_df8() // 7000 f100 m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -161200,7 +161197,7 @@ void m68008_device::or_b_ds_dd_df8() // 8000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161208,7 +161205,7 @@ void m68008_device::or_b_ds_dd_df8() // 8000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161251,11 +161248,11 @@ void m68008_device::or_b_ais_dd_df8() // 8010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -161273,7 +161270,7 @@ void m68008_device::or_b_ais_dd_df8() // 8010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161281,7 +161278,7 @@ void m68008_device::or_b_ais_dd_df8() // 8010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161327,12 +161324,12 @@ void m68008_device::or_b_aips_dd_df8() // 8018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -161351,7 +161348,7 @@ void m68008_device::or_b_aips_dd_df8() // 8018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161359,7 +161356,7 @@ void m68008_device::or_b_aips_dd_df8() // 8018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161404,7 +161401,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -161412,7 +161409,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -161431,7 +161428,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161439,7 +161436,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161482,7 +161479,7 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161515,11 +161512,11 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -161537,7 +161534,7 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161545,7 +161542,7 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161586,14 +161583,14 @@ void m68008_device::or_b_dais_dd_df8() // 8030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -161601,7 +161598,7 @@ void m68008_device::or_b_dais_dd_df8() // 8030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161635,7 +161632,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161671,11 +161668,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -161693,7 +161690,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161701,7 +161698,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161746,7 +161743,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161779,7 +161776,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -161798,7 +161795,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161806,7 +161803,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161849,7 +161846,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161883,7 +161880,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161916,7 +161913,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -161935,7 +161932,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161943,7 +161940,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -161985,7 +161982,7 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162018,11 +162015,11 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -162040,7 +162037,7 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162048,7 +162045,7 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162088,14 +162085,14 @@ void m68008_device::or_b_dpci_dd_df8() // 803b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -162103,7 +162100,7 @@ void m68008_device::or_b_dpci_dd_df8() // 803b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162137,7 +162134,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162173,11 +162170,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -162195,7 +162192,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162203,7 +162200,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162248,7 +162245,7 @@ void m68008_device::or_b_imm8_dd_df8() // 803c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162282,7 +162279,7 @@ void m68008_device::or_b_imm8_dd_df8() // 803c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx] alu_or8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162290,7 +162287,7 @@ void m68008_device::or_b_imm8_dd_df8() // 803c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162335,7 +162332,7 @@ void m68008_device::or_w_ds_dd_df8() // 8040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162343,7 +162340,7 @@ void m68008_device::or_w_ds_dd_df8() // 8040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162386,11 +162383,11 @@ void m68008_device::or_w_ais_dd_df8() // 8050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162423,7 +162420,7 @@ void m68008_device::or_w_ais_dd_df8() // 8050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162431,7 +162428,7 @@ void m68008_device::or_w_ais_dd_df8() // 8050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162477,12 +162474,12 @@ void m68008_device::or_w_aips_dd_df8() // 8058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -162516,7 +162513,7 @@ void m68008_device::or_w_aips_dd_df8() // 8058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162524,7 +162521,7 @@ void m68008_device::or_w_aips_dd_df8() // 8058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162569,7 +162566,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -162577,7 +162574,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -162611,7 +162608,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162619,7 +162616,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162662,7 +162659,7 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162695,11 +162692,11 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162732,7 +162729,7 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162740,7 +162737,7 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162781,14 +162778,14 @@ void m68008_device::or_w_dais_dd_df8() // 8070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -162796,7 +162793,7 @@ void m68008_device::or_w_dais_dd_df8() // 8070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162830,7 +162827,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162866,11 +162863,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162903,7 +162900,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162911,7 +162908,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -162956,7 +162953,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162989,7 +162986,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -163023,7 +163020,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163031,7 +163028,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163074,7 +163071,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163108,7 +163105,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163141,7 +163138,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -163175,7 +163172,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163183,7 +163180,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163225,7 +163222,7 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163258,11 +163255,11 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163295,7 +163292,7 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163303,7 +163300,7 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163343,14 +163340,14 @@ void m68008_device::or_w_dpci_dd_df8() // 807b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -163358,7 +163355,7 @@ void m68008_device::or_w_dpci_dd_df8() // 807b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163392,7 +163389,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163428,11 +163425,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163465,7 +163462,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163473,7 +163470,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163518,7 +163515,7 @@ void m68008_device::or_w_imm16_dd_df8() // 807c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163552,7 +163549,7 @@ void m68008_device::or_w_imm16_dd_df8() // 807c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163560,7 +163557,7 @@ void m68008_device::or_w_imm16_dd_df8() // 807c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163605,12 +163602,12 @@ void m68008_device::or_l_ds_dd_df8() // 8080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163640,7 +163637,7 @@ void m68008_device::or_l_ds_dd_df8() // 8080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx] alu_or(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -163649,7 +163646,7 @@ void m68008_device::or_l_ds_dd_df8() // 8080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163665,7 +163662,7 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -163700,7 +163697,7 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163733,12 +163730,12 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -163774,7 +163771,7 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163790,7 +163787,7 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -163825,11 +163822,11 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163862,12 +163859,12 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -163903,7 +163900,7 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163918,14 +163915,14 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163959,7 +163956,7 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -163992,12 +163989,12 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164033,7 +164030,7 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164049,7 +164046,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164081,7 +164078,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -164116,7 +164113,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164149,12 +164146,12 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164190,7 +164187,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164204,14 +164201,14 @@ void m68008_device::or_l_dais_dd_df8() // 80b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -164219,7 +164216,7 @@ void m68008_device::or_l_dais_dd_df8() // 80b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164253,7 +164250,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164288,7 +164285,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -164323,7 +164320,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164356,12 +164353,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164397,7 +164394,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164415,7 +164412,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164448,7 +164445,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -164483,7 +164480,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164516,12 +164513,12 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164557,7 +164554,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164573,7 +164570,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164607,7 +164604,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164640,7 +164637,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -164675,7 +164672,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164708,12 +164705,12 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164749,7 +164746,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164764,7 +164761,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164796,7 +164793,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164831,7 +164828,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164864,12 +164861,12 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164905,7 +164902,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164918,14 +164915,14 @@ void m68008_device::or_l_dpci_dd_df8() // 80bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -164933,7 +164930,7 @@ void m68008_device::or_l_dpci_dd_df8() // 80bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -164967,7 +164964,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -165002,7 +164999,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165037,7 +165034,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -165070,12 +165067,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -165111,7 +165108,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -165127,7 +165124,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -165161,7 +165158,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -165195,12 +165192,12 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -165230,7 +165227,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx] alu_or(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -165239,7 +165236,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -165257,13 +165254,13 @@ void m68008_device::divu_w_ds_dd_df8() // 80c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -165276,7 +165273,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -165294,7 +165291,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -165302,7 +165299,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -165337,7 +165334,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -165370,7 +165367,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -165541,7 +165538,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -165581,7 +165578,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -165592,7 +165589,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -165604,7 +165601,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -165624,7 +165621,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -165635,7 +165632,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -165645,13 +165642,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -165662,7 +165659,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -165672,7 +165669,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -165680,7 +165677,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -165725,7 +165722,7 @@ void m68008_device::divu_w_ais_dd_df8() // 80d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -165761,13 +165758,13 @@ void m68008_device::divu_w_ais_dd_df8() // 80d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -165780,7 +165777,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -165798,7 +165795,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -165806,7 +165803,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -165841,7 +165838,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -165874,7 +165871,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -166045,7 +166042,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166085,7 +166082,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -166096,7 +166093,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166108,7 +166105,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166128,7 +166125,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -166139,7 +166136,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -166149,13 +166146,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -166166,7 +166163,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -166176,7 +166173,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -166184,7 +166181,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166235,7 +166232,7 @@ void m68008_device::divu_w_aips_dd_df8() // 80d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -166269,13 +166266,13 @@ void m68008_device::divu_w_aips_dd_df8() // 80d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -166288,7 +166285,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -166306,7 +166303,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -166314,7 +166311,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -166349,7 +166346,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -166382,7 +166379,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -166553,7 +166550,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166593,7 +166590,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -166604,7 +166601,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166616,7 +166613,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166636,7 +166633,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -166647,7 +166644,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -166657,13 +166654,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -166674,7 +166671,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -166684,7 +166681,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -166692,7 +166689,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166745,7 +166742,7 @@ void m68008_device::divu_w_pais_dd_df8() // 80e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -166779,13 +166776,13 @@ void m68008_device::divu_w_pais_dd_df8() // 80e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -166798,7 +166795,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -166816,7 +166813,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -166824,7 +166821,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -166859,7 +166856,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -166892,7 +166889,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -167063,7 +167060,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167103,7 +167100,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -167114,7 +167111,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167126,7 +167123,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167146,7 +167143,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -167157,7 +167154,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -167167,13 +167164,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -167184,7 +167181,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -167194,7 +167191,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -167202,7 +167199,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167279,7 +167276,7 @@ void m68008_device::divu_w_das_dd_df8() // 80e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -167315,13 +167312,13 @@ void m68008_device::divu_w_das_dd_df8() // 80e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -167334,7 +167331,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -167352,7 +167349,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -167360,7 +167357,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -167395,7 +167392,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -167428,7 +167425,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -167599,7 +167596,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167639,7 +167636,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -167650,7 +167647,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167662,7 +167659,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167682,7 +167679,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -167693,7 +167690,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -167703,13 +167700,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -167720,7 +167717,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -167730,7 +167727,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -167738,7 +167735,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167781,7 +167778,7 @@ void m68008_device::divu_w_dais_dd_df8() // 80f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -167863,7 +167860,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -167899,13 +167896,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -167918,7 +167915,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -167936,7 +167933,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -167944,7 +167941,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -167979,7 +167976,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -168012,7 +168009,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -168183,7 +168180,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168223,7 +168220,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -168234,7 +168231,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168246,7 +168243,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168266,7 +168263,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -168277,7 +168274,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -168287,13 +168284,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -168304,7 +168301,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -168314,7 +168311,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -168322,7 +168319,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168400,7 +168397,7 @@ void m68008_device::divu_w_adr16_dd_df8() // 80f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -168434,13 +168431,13 @@ void m68008_device::divu_w_adr16_dd_df8() // 80f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -168453,7 +168450,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -168471,7 +168468,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -168479,7 +168476,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -168514,7 +168511,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -168547,7 +168544,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -168718,7 +168715,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168758,7 +168755,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -168769,7 +168766,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168781,7 +168778,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168801,7 +168798,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -168812,7 +168809,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -168822,13 +168819,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -168839,7 +168836,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -168849,7 +168846,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -168857,7 +168854,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168966,7 +168963,7 @@ void m68008_device::divu_w_adr32_dd_df8() // 80f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -169000,13 +168997,13 @@ void m68008_device::divu_w_adr32_dd_df8() // 80f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -169019,7 +169016,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -169037,7 +169034,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -169045,7 +169042,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -169080,7 +169077,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -169113,7 +169110,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -169284,7 +169281,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -169324,7 +169321,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -169335,7 +169332,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169347,7 +169344,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169367,7 +169364,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -169378,7 +169375,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -169388,13 +169385,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -169405,7 +169402,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -169415,7 +169412,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -169423,7 +169420,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -169499,7 +169496,7 @@ void m68008_device::divu_w_dpc_dd_df8() // 80fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -169535,13 +169532,13 @@ void m68008_device::divu_w_dpc_dd_df8() // 80fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -169554,7 +169551,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -169572,7 +169569,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -169580,7 +169577,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -169615,7 +169612,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -169648,7 +169645,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -169819,7 +169816,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -169859,7 +169856,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -169870,7 +169867,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169882,7 +169879,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169902,7 +169899,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -169913,7 +169910,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -169923,13 +169920,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -169940,7 +169937,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -169950,7 +169947,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -169958,7 +169955,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170000,7 +169997,7 @@ void m68008_device::divu_w_dpci_dd_df8() // 80fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -170082,7 +170079,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -170118,13 +170115,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -170137,7 +170134,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -170155,7 +170152,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -170163,7 +170160,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -170198,7 +170195,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -170231,7 +170228,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -170402,7 +170399,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170442,7 +170439,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -170453,7 +170450,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170465,7 +170462,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170485,7 +170482,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -170496,7 +170493,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -170506,13 +170503,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -170523,7 +170520,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -170533,7 +170530,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -170541,7 +170538,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170621,13 +170618,13 @@ void m68008_device::divu_w_imm16_dd_df8() // 80fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -170640,7 +170637,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -170658,7 +170655,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -170666,7 +170663,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -170701,7 +170698,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -170734,7 +170731,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -170905,7 +170902,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170945,7 +170942,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -170956,7 +170953,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170968,7 +170965,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170988,7 +170985,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -170999,7 +170996,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -171009,13 +171006,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -171026,7 +171023,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -171036,7 +171033,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -171044,7 +171041,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171091,12 +171088,12 @@ void m68008_device::sbcd_ds_dd_df8() // 8100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx] alu_sbcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -171151,7 +171148,7 @@ void m68008_device::sbcd_pais_paid_df8() // 8108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -171187,12 +171184,12 @@ void m68008_device::sbcd_pais_paid_df8() // 8108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin alu_sbcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -171252,11 +171249,11 @@ void m68008_device::or_b_dd_ais_df8() // 8110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -171274,7 +171271,7 @@ void m68008_device::or_b_dd_ais_df8() // 8110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171311,7 +171308,7 @@ void m68008_device::or_b_dd_ais_df8() // 8110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -171340,12 +171337,12 @@ void m68008_device::or_b_dd_aips_df8() // 8118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -171364,7 +171361,7 @@ void m68008_device::or_b_dd_aips_df8() // 8118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171401,7 +171398,7 @@ void m68008_device::or_b_dd_aips_df8() // 8118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -171429,7 +171426,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -171437,7 +171434,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -171456,7 +171453,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171493,7 +171490,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -171519,7 +171516,7 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -171552,11 +171549,11 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -171574,7 +171571,7 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171611,7 +171608,7 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -171635,14 +171632,14 @@ void m68008_device::or_b_dd_dais_df8() // 8130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -171650,7 +171647,7 @@ void m68008_device::or_b_dd_dais_df8() // 8130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -171684,7 +171681,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -171720,11 +171717,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -171742,7 +171739,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171779,7 +171776,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -171807,7 +171804,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171840,7 +171837,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -171859,7 +171856,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171896,7 +171893,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -171922,7 +171919,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -171956,7 +171953,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171989,7 +171986,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -172008,7 +172005,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172045,7 +172042,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -172071,11 +172068,11 @@ void m68008_device::or_w_dd_ais_df8() // 8150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172108,7 +172105,7 @@ void m68008_device::or_w_dd_ais_df8() // 8150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172145,7 +172142,7 @@ void m68008_device::or_w_dd_ais_df8() // 8150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172189,12 +172186,12 @@ void m68008_device::or_w_dd_aips_df8() // 8158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -172228,7 +172225,7 @@ void m68008_device::or_w_dd_aips_df8() // 8158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172265,7 +172262,7 @@ void m68008_device::or_w_dd_aips_df8() // 8158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172308,7 +172305,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -172316,7 +172313,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -172350,7 +172347,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172387,7 +172384,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172428,7 +172425,7 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172461,11 +172458,11 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172498,7 +172495,7 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172535,7 +172532,7 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172574,14 +172571,14 @@ void m68008_device::or_w_dd_dais_df8() // 8170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -172589,7 +172586,7 @@ void m68008_device::or_w_dd_dais_df8() // 8170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172623,7 +172620,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172659,11 +172656,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172696,7 +172693,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172733,7 +172730,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172776,7 +172773,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172809,7 +172806,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -172843,7 +172840,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172880,7 +172877,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172921,7 +172918,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -172955,7 +172952,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172988,7 +172985,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -173022,7 +173019,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173059,7 +173056,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173100,7 +173097,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -173135,7 +173132,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173168,7 +173165,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173203,7 +173200,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173238,7 +173235,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173279,7 +173276,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -173314,11 +173311,11 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173351,7 +173348,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173386,7 +173383,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173421,7 +173418,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173461,14 +173458,14 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173502,7 +173499,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173535,7 +173532,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173570,7 +173567,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173605,7 +173602,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173646,7 +173643,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173678,7 +173675,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -173713,7 +173710,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173746,7 +173743,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173781,7 +173778,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173816,7 +173813,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173855,14 +173852,14 @@ void m68008_device::or_l_dd_dais_df8() // 81b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -173870,7 +173867,7 @@ void m68008_device::or_l_dd_dais_df8() // 81b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173904,7 +173901,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -173939,7 +173936,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -173974,7 +173971,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -174007,7 +174004,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174042,7 +174039,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -174077,7 +174074,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -174120,7 +174117,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174153,7 +174150,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -174188,7 +174185,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -174221,7 +174218,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174256,7 +174253,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -174291,7 +174288,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -174332,7 +174329,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -174366,7 +174363,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174399,7 +174396,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -174434,7 +174431,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -174467,7 +174464,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174502,7 +174499,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -174537,7 +174534,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -174580,13 +174577,13 @@ void m68008_device::divs_w_ds_dd_df8() // 81c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -174600,7 +174597,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -174610,7 +174607,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -174625,7 +174622,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -174633,7 +174630,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -174668,7 +174665,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -174701,7 +174698,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -174867,7 +174864,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -174876,7 +174873,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -174884,12 +174881,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -174897,7 +174894,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -174914,7 +174911,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -174922,7 +174919,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174962,7 +174959,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -174989,13 +174986,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175003,27 +175000,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175035,7 +175032,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175047,7 +175044,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175062,7 +175059,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175071,7 +175068,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175079,7 +175076,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175089,7 +175086,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175098,7 +175095,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175110,7 +175107,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175168,7 +175165,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -175181,7 +175178,7 @@ void m68008_device::divs_w_ais_dd_df8() // 81d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -175217,13 +175214,13 @@ void m68008_device::divs_w_ais_dd_df8() // 81d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175237,7 +175234,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175247,7 +175244,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175262,7 +175259,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -175270,7 +175267,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -175305,7 +175302,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -175338,7 +175335,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -175504,7 +175501,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -175513,7 +175510,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -175521,12 +175518,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -175534,7 +175531,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175551,7 +175548,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -175559,7 +175556,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -175599,7 +175596,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -175626,13 +175623,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175640,27 +175637,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175672,7 +175669,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175684,7 +175681,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175699,7 +175696,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175708,7 +175705,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175716,7 +175713,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175726,7 +175723,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175735,7 +175732,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175747,7 +175744,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175805,7 +175802,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -175824,7 +175821,7 @@ void m68008_device::divs_w_aips_dd_df8() // 81d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -175858,13 +175855,13 @@ void m68008_device::divs_w_aips_dd_df8() // 81d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175878,7 +175875,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175888,7 +175885,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175903,7 +175900,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -175911,7 +175908,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -175946,7 +175943,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -175979,7 +175976,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -176145,7 +176142,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -176154,7 +176151,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -176162,12 +176159,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176175,7 +176172,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176192,7 +176189,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -176200,7 +176197,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -176240,7 +176237,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176267,13 +176264,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176281,27 +176278,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176313,7 +176310,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176325,7 +176322,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176340,7 +176337,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -176349,7 +176346,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -176357,7 +176354,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -176367,7 +176364,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -176376,7 +176373,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -176388,7 +176385,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -176446,7 +176443,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -176467,7 +176464,7 @@ void m68008_device::divs_w_pais_dd_df8() // 81e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -176501,13 +176498,13 @@ void m68008_device::divs_w_pais_dd_df8() // 81e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -176521,7 +176518,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176531,7 +176528,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176546,7 +176543,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -176554,7 +176551,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -176589,7 +176586,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -176622,7 +176619,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -176788,7 +176785,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -176797,7 +176794,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -176805,12 +176802,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176818,7 +176815,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176835,7 +176832,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -176843,7 +176840,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -176883,7 +176880,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176910,13 +176907,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176924,27 +176921,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176956,7 +176953,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176968,7 +176965,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176983,7 +176980,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -176992,7 +176989,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177000,7 +176997,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177010,7 +177007,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177019,7 +177016,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -177031,7 +177028,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177089,7 +177086,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -177134,7 +177131,7 @@ void m68008_device::divs_w_das_dd_df8() // 81e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -177170,13 +177167,13 @@ void m68008_device::divs_w_das_dd_df8() // 81e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177190,7 +177187,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177200,7 +177197,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177215,7 +177212,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -177223,7 +177220,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -177258,7 +177255,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -177291,7 +177288,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -177457,7 +177454,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -177466,7 +177463,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -177474,12 +177471,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -177487,7 +177484,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177504,7 +177501,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -177512,7 +177509,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -177552,7 +177549,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -177579,13 +177576,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177593,27 +177590,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177625,7 +177622,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177637,7 +177634,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177652,7 +177649,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -177661,7 +177658,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177669,7 +177666,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177679,7 +177676,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177688,7 +177685,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -177700,7 +177697,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177758,7 +177755,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -177769,7 +177766,7 @@ void m68008_device::divs_w_dais_dd_df8() // 81f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -177851,7 +177848,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -177887,13 +177884,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177907,7 +177904,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177917,7 +177914,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177932,7 +177929,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -177940,7 +177937,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -177975,7 +177972,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -178008,7 +178005,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -178174,7 +178171,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -178183,7 +178180,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -178191,12 +178188,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178204,7 +178201,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178221,7 +178218,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -178229,7 +178226,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -178269,7 +178266,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178296,13 +178293,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178310,27 +178307,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -178342,7 +178339,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178354,7 +178351,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178369,7 +178366,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -178378,7 +178375,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -178386,7 +178383,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -178396,7 +178393,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -178405,7 +178402,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -178417,7 +178414,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -178475,7 +178472,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -178521,7 +178518,7 @@ void m68008_device::divs_w_adr16_dd_df8() // 81f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -178555,13 +178552,13 @@ void m68008_device::divs_w_adr16_dd_df8() // 81f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -178575,7 +178572,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -178585,7 +178582,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -178600,7 +178597,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -178608,7 +178605,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -178643,7 +178640,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -178676,7 +178673,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -178842,7 +178839,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -178851,7 +178848,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -178859,12 +178856,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178872,7 +178869,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178889,7 +178886,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -178897,7 +178894,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -178937,7 +178934,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178964,13 +178961,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178978,27 +178975,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179010,7 +179007,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179022,7 +179019,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179037,7 +179034,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179046,7 +179043,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179054,7 +179051,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179064,7 +179061,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179073,7 +179070,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179085,7 +179082,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179143,7 +179140,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -179220,7 +179217,7 @@ void m68008_device::divs_w_adr32_dd_df8() // 81f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -179254,13 +179251,13 @@ void m68008_device::divs_w_adr32_dd_df8() // 81f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179274,7 +179271,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179284,7 +179281,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179299,7 +179296,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -179307,7 +179304,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -179342,7 +179339,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -179375,7 +179372,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -179541,7 +179538,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -179550,7 +179547,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -179558,12 +179555,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -179571,7 +179568,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179588,7 +179585,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -179596,7 +179593,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -179636,7 +179633,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -179663,13 +179660,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179677,27 +179674,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179709,7 +179706,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179721,7 +179718,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179736,7 +179733,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179745,7 +179742,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179753,7 +179750,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179763,7 +179760,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179772,7 +179769,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179784,7 +179781,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179842,7 +179839,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -179886,7 +179883,7 @@ void m68008_device::divs_w_dpc_dd_df8() // 81fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -179922,13 +179919,13 @@ void m68008_device::divs_w_dpc_dd_df8() // 81fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179942,7 +179939,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179952,7 +179949,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179967,7 +179964,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -179975,7 +179972,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -180010,7 +180007,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -180043,7 +180040,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -180209,7 +180206,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -180218,7 +180215,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -180226,12 +180223,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -180239,7 +180236,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180256,7 +180253,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -180264,7 +180261,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -180304,7 +180301,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -180331,13 +180328,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180345,27 +180342,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -180377,7 +180374,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180389,7 +180386,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180404,7 +180401,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -180413,7 +180410,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -180421,7 +180418,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -180431,7 +180428,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -180440,7 +180437,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -180452,7 +180449,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -180510,7 +180507,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -180520,7 +180517,7 @@ void m68008_device::divs_w_dpci_dd_df8() // 81fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -180602,7 +180599,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -180638,13 +180635,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -180658,7 +180655,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -180668,7 +180665,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -180683,7 +180680,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -180691,7 +180688,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -180726,7 +180723,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -180759,7 +180756,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -180925,7 +180922,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -180934,7 +180931,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -180942,12 +180939,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -180955,7 +180952,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180972,7 +180969,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -180980,7 +180977,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -181020,7 +181017,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -181047,13 +181044,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181061,27 +181058,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181093,7 +181090,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181105,7 +181102,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181120,7 +181117,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181129,7 +181126,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181137,7 +181134,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181147,7 +181144,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181156,7 +181153,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181168,7 +181165,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181226,7 +181223,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -181274,13 +181271,13 @@ void m68008_device::divs_w_imm16_dd_df8() // 81fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181294,7 +181291,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181304,7 +181301,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181319,7 +181316,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -181327,7 +181324,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -181362,7 +181359,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -181395,7 +181392,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -181561,7 +181558,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -181570,7 +181567,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -181578,12 +181575,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -181591,7 +181588,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181608,7 +181605,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -181616,7 +181613,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -181656,7 +181653,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -181683,13 +181680,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181697,27 +181694,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181729,7 +181726,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181741,7 +181738,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181756,7 +181753,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181765,7 +181762,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181773,7 +181770,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181783,7 +181780,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181792,7 +181789,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181804,7 +181801,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181862,7 +181859,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -181877,7 +181874,7 @@ void m68008_device::sub_b_ds_dd_df8() // 9000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -181927,7 +181924,7 @@ void m68008_device::sub_b_ais_dd_df8() // 9010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -181948,7 +181945,7 @@ void m68008_device::sub_b_ais_dd_df8() // 9010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182004,7 +182001,7 @@ void m68008_device::sub_b_aips_dd_df8() // 9018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -182023,7 +182020,7 @@ void m68008_device::sub_b_aips_dd_df8() // 9018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182081,7 +182078,7 @@ void m68008_device::sub_b_pais_dd_df8() // 9020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -182100,7 +182097,7 @@ void m68008_device::sub_b_pais_dd_df8() // 9020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182182,7 +182179,7 @@ void m68008_device::sub_b_das_dd_df8() // 9028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182203,7 +182200,7 @@ void m68008_device::sub_b_das_dd_df8() // 9028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182251,7 +182248,7 @@ void m68008_device::sub_b_dais_dd_df8() // 9030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -182333,7 +182330,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182354,7 +182351,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182437,7 +182434,7 @@ void m68008_device::sub_b_adr16_dd_df8() // 9038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -182456,7 +182453,7 @@ void m68008_device::sub_b_adr16_dd_df8() // 9038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182570,7 +182567,7 @@ void m68008_device::sub_b_adr32_dd_df8() // 9039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -182589,7 +182586,7 @@ void m68008_device::sub_b_adr32_dd_df8() // 9039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182670,7 +182667,7 @@ void m68008_device::sub_b_dpc_dd_df8() // 903a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182691,7 +182688,7 @@ void m68008_device::sub_b_dpc_dd_df8() // 903a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182738,7 +182735,7 @@ void m68008_device::sub_b_dpci_dd_df8() // 903b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -182820,7 +182817,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182841,7 +182838,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182926,7 +182923,7 @@ void m68008_device::sub_b_imm8_dd_df8() // 903c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182978,7 +182975,7 @@ void m68008_device::sub_w_ds_dd_df8() // 9040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183030,7 +183027,7 @@ void m68008_device::sub_w_as_dd_df8() // 9048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183080,7 +183077,7 @@ void m68008_device::sub_w_ais_dd_df8() // 9050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183116,7 +183113,7 @@ void m68008_device::sub_w_ais_dd_df8() // 9050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183172,7 +183169,7 @@ void m68008_device::sub_w_aips_dd_df8() // 9058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -183206,7 +183203,7 @@ void m68008_device::sub_w_aips_dd_df8() // 9058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183264,7 +183261,7 @@ void m68008_device::sub_w_pais_dd_df8() // 9060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -183298,7 +183295,7 @@ void m68008_device::sub_w_pais_dd_df8() // 9060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183380,7 +183377,7 @@ void m68008_device::sub_w_das_dd_df8() // 9068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183416,7 +183413,7 @@ void m68008_device::sub_w_das_dd_df8() // 9068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183464,7 +183461,7 @@ void m68008_device::sub_w_dais_dd_df8() // 9070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -183546,7 +183543,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183582,7 +183579,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183665,7 +183662,7 @@ void m68008_device::sub_w_adr16_dd_df8() // 9078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -183699,7 +183696,7 @@ void m68008_device::sub_w_adr16_dd_df8() // 9078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183813,7 +183810,7 @@ void m68008_device::sub_w_adr32_dd_df8() // 9079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -183847,7 +183844,7 @@ void m68008_device::sub_w_adr32_dd_df8() // 9079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183928,7 +183925,7 @@ void m68008_device::sub_w_dpc_dd_df8() // 907a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183964,7 +183961,7 @@ void m68008_device::sub_w_dpc_dd_df8() // 907a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -184011,7 +184008,7 @@ void m68008_device::sub_w_dpci_dd_df8() // 907b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -184093,7 +184090,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -184129,7 +184126,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -184214,7 +184211,7 @@ void m68008_device::sub_w_imm16_dd_df8() // 907c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -184266,7 +184263,7 @@ void m68008_device::sub_l_ds_dd_df8() // 9080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -184300,7 +184297,7 @@ void m68008_device::sub_l_ds_dd_df8() // 9080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -184326,7 +184323,7 @@ void m68008_device::sub_l_as_dd_df8() // 9088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -184360,7 +184357,7 @@ void m68008_device::sub_l_as_dd_df8() // 9088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -184384,7 +184381,7 @@ void m68008_device::sub_l_ais_dd_df8() // 9090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -184451,12 +184448,12 @@ void m68008_device::sub_l_ais_dd_df8() // 9090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184507,7 +184504,7 @@ void m68008_device::sub_l_aips_dd_df8() // 9098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -184577,12 +184574,12 @@ void m68008_device::sub_l_aips_dd_df8() // 9098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184632,7 +184629,7 @@ void m68008_device::sub_l_pais_dd_df8() // 90a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -184704,12 +184701,12 @@ void m68008_device::sub_l_pais_dd_df8() // 90a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184791,7 +184788,7 @@ void m68008_device::sub_l_das_dd_df8() // 90a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -184858,12 +184855,12 @@ void m68008_device::sub_l_das_dd_df8() // 90a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184912,7 +184909,7 @@ void m68008_device::sub_l_dais_dd_df8() // 90b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -184993,7 +184990,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -185060,12 +185057,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185149,7 +185146,7 @@ void m68008_device::sub_l_adr16_dd_df8() // 90b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -185216,12 +185213,12 @@ void m68008_device::sub_l_adr16_dd_df8() // 90b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185336,7 +185333,7 @@ void m68008_device::sub_l_adr32_dd_df8() // 90b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -185403,12 +185400,12 @@ void m68008_device::sub_l_adr32_dd_df8() // 90b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185489,7 +185486,7 @@ void m68008_device::sub_l_dpc_dd_df8() // 90ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -185556,12 +185553,12 @@ void m68008_device::sub_l_dpc_dd_df8() // 90ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185609,7 +185606,7 @@ void m68008_device::sub_l_dpci_dd_df8() // 90bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -185690,7 +185687,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -185757,12 +185754,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185879,7 +185876,7 @@ void m68008_device::sub_l_imm32_dd_df8() // 90bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -185913,7 +185910,7 @@ void m68008_device::sub_l_imm32_dd_df8() // 90bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -185939,7 +185936,7 @@ void m68008_device::suba_w_ds_ad_df8() // 90c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -185972,7 +185969,7 @@ void m68008_device::suba_w_ds_ad_df8() // 90c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -185997,7 +185994,7 @@ void m68008_device::suba_w_as_ad_df8() // 90c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186030,7 +186027,7 @@ void m68008_device::suba_w_as_ad_df8() // 90c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186053,7 +186050,7 @@ void m68008_device::suba_w_ais_ad_df8() // 90d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186089,7 +186086,7 @@ void m68008_device::suba_w_ais_ad_df8() // 90d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186122,7 +186119,7 @@ void m68008_device::suba_w_ais_ad_df8() // 90d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186151,7 +186148,7 @@ void m68008_device::suba_w_aips_ad_df8() // 90d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -186185,7 +186182,7 @@ void m68008_device::suba_w_aips_ad_df8() // 90d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186218,7 +186215,7 @@ void m68008_device::suba_w_aips_ad_df8() // 90d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186249,7 +186246,7 @@ void m68008_device::suba_w_pais_ad_df8() // 90e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -186283,7 +186280,7 @@ void m68008_device::suba_w_pais_ad_df8() // 90e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186316,7 +186313,7 @@ void m68008_device::suba_w_pais_ad_df8() // 90e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186371,7 +186368,7 @@ void m68008_device::suba_w_das_ad_df8() // 90e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186407,7 +186404,7 @@ void m68008_device::suba_w_das_ad_df8() // 90e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186440,7 +186437,7 @@ void m68008_device::suba_w_das_ad_df8() // 90e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186461,7 +186458,7 @@ void m68008_device::suba_w_dais_ad_df8() // 90f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -186543,7 +186540,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186579,7 +186576,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186612,7 +186609,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186668,7 +186665,7 @@ void m68008_device::suba_w_adr16_ad_df8() // 90f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -186702,7 +186699,7 @@ void m68008_device::suba_w_adr16_ad_df8() // 90f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186735,7 +186732,7 @@ void m68008_device::suba_w_adr16_ad_df8() // 90f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186822,7 +186819,7 @@ void m68008_device::suba_w_adr32_ad_df8() // 90f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -186856,7 +186853,7 @@ void m68008_device::suba_w_adr32_ad_df8() // 90f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186889,7 +186886,7 @@ void m68008_device::suba_w_adr32_ad_df8() // 90f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186943,7 +186940,7 @@ void m68008_device::suba_w_dpc_ad_df8() // 90fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186979,7 +186976,7 @@ void m68008_device::suba_w_dpc_ad_df8() // 90fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -187012,7 +187009,7 @@ void m68008_device::suba_w_dpc_ad_df8() // 90fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -187032,7 +187029,7 @@ void m68008_device::suba_w_dpci_ad_df8() // 90fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -187114,7 +187111,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -187150,7 +187147,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -187183,7 +187180,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -187241,7 +187238,7 @@ void m68008_device::suba_w_imm16_ad_df8() // 90fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -187274,7 +187271,7 @@ void m68008_device::suba_w_imm16_ad_df8() // 90fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -187299,7 +187296,7 @@ void m68008_device::subx_b_ds_dd_df8() // 9100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -187355,7 +187352,7 @@ void m68008_device::subx_b_pais_paid_df8() // 9108 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -187392,7 +187389,7 @@ void m68008_device::subx_b_pais_paid_df8() // 9108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin alu_subx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187454,7 +187451,7 @@ void m68008_device::sub_b_dd_ais_df8() // 9110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -187475,7 +187472,7 @@ void m68008_device::sub_b_dd_ais_df8() // 9110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187543,7 +187540,7 @@ void m68008_device::sub_b_dd_aips_df8() // 9118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -187562,7 +187559,7 @@ void m68008_device::sub_b_dd_aips_df8() // 9118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187632,7 +187629,7 @@ void m68008_device::sub_b_dd_pais_df8() // 9120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -187651,7 +187648,7 @@ void m68008_device::sub_b_dd_pais_df8() // 9120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187745,7 +187742,7 @@ void m68008_device::sub_b_dd_das_df8() // 9128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -187766,7 +187763,7 @@ void m68008_device::sub_b_dd_das_df8() // 9128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187826,7 +187823,7 @@ void m68008_device::sub_b_dd_dais_df8() // 9130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -187908,7 +187905,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -187929,7 +187926,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188024,7 +188021,7 @@ void m68008_device::sub_b_dd_adr16_df8() // 9138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -188043,7 +188040,7 @@ void m68008_device::sub_b_dd_adr16_df8() // 9138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188169,7 +188166,7 @@ void m68008_device::sub_b_dd_adr32_df8() // 9139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -188188,7 +188185,7 @@ void m68008_device::sub_b_dd_adr32_df8() // 9139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188252,7 +188249,7 @@ void m68008_device::subx_w_ds_dd_df8() // 9140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -188308,7 +188305,7 @@ void m68008_device::subx_w_pais_paid_df8() // 9148 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; @@ -188375,7 +188372,7 @@ void m68008_device::subx_w_pais_paid_df8() // 9148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin alu_subx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188452,7 +188449,7 @@ void m68008_device::sub_w_dd_ais_df8() // 9150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -188488,7 +188485,7 @@ void m68008_device::sub_w_dd_ais_df8() // 9150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188571,7 +188568,7 @@ void m68008_device::sub_w_dd_aips_df8() // 9158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -188605,7 +188602,7 @@ void m68008_device::sub_w_dd_aips_df8() // 9158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188690,7 +188687,7 @@ void m68008_device::sub_w_dd_pais_df8() // 9160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -188724,7 +188721,7 @@ void m68008_device::sub_w_dd_pais_df8() // 9160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188833,7 +188830,7 @@ void m68008_device::sub_w_dd_das_df8() // 9168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -188869,7 +188866,7 @@ void m68008_device::sub_w_dd_das_df8() // 9168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188944,7 +188941,7 @@ void m68008_device::sub_w_dd_dais_df8() // 9170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -189026,7 +189023,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -189062,7 +189059,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189172,7 +189169,7 @@ void m68008_device::sub_w_dd_adr16_df8() // 9178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189206,7 +189203,7 @@ void m68008_device::sub_w_dd_adr16_df8() // 9178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189347,7 +189344,7 @@ void m68008_device::sub_w_dd_adr32_df8() // 9179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189381,7 +189378,7 @@ void m68008_device::sub_w_dd_adr32_df8() // 9179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189460,7 +189457,7 @@ void m68008_device::subx_l_ds_dd_df8() // 9180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 @@ -189494,7 +189491,7 @@ void m68008_device::subx_l_ds_dd_df8() // 9180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -189555,7 +189552,7 @@ void m68008_device::subx_l_pais_paid_df8() // 9188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; @@ -189622,7 +189619,7 @@ void m68008_device::subx_l_pais_paid_df8() // 9188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin alu_subx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -189686,7 +189683,7 @@ void m68008_device::subx_l_pais_paid_df8() // 9188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin alu_subc(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189763,7 +189760,7 @@ void m68008_device::sub_l_dd_ais_df8() // 9190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189830,7 +189827,7 @@ void m68008_device::sub_l_dd_ais_df8() // 9190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189865,7 +189862,7 @@ void m68008_device::sub_l_dd_ais_df8() // 9190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -189940,7 +189937,7 @@ void m68008_device::sub_l_dd_aips_df8() // 9198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -190010,7 +190007,7 @@ void m68008_device::sub_l_dd_aips_df8() // 9198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190045,7 +190042,7 @@ void m68008_device::sub_l_dd_aips_df8() // 9198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190119,7 +190116,7 @@ void m68008_device::sub_l_dd_pais_df8() // 91a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -190191,7 +190188,7 @@ void m68008_device::sub_l_dd_pais_df8() // 91a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190226,7 +190223,7 @@ void m68008_device::sub_l_dd_pais_df8() // 91a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190332,7 +190329,7 @@ void m68008_device::sub_l_dd_das_df8() // 91a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -190399,7 +190396,7 @@ void m68008_device::sub_l_dd_das_df8() // 91a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190434,7 +190431,7 @@ void m68008_device::sub_l_dd_das_df8() // 91a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190507,7 +190504,7 @@ void m68008_device::sub_l_dd_dais_df8() // 91b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -190588,7 +190585,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -190655,7 +190652,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190690,7 +190687,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190798,7 +190795,7 @@ void m68008_device::sub_l_dd_adr16_df8() // 91b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -190865,7 +190862,7 @@ void m68008_device::sub_l_dd_adr16_df8() // 91b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190900,7 +190897,7 @@ void m68008_device::sub_l_dd_adr16_df8() // 91b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -191039,7 +191036,7 @@ void m68008_device::sub_l_dd_adr32_df8() // 91b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -191106,7 +191103,7 @@ void m68008_device::sub_l_dd_adr32_df8() // 91b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191141,7 +191138,7 @@ void m68008_device::sub_l_dd_adr32_df8() // 91b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -191218,7 +191215,7 @@ void m68008_device::suba_l_ds_ad_df8() // 91c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -191251,7 +191248,7 @@ void m68008_device::suba_l_ds_ad_df8() // 91c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -191276,7 +191273,7 @@ void m68008_device::suba_l_as_ad_df8() // 91c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -191309,7 +191306,7 @@ void m68008_device::suba_l_as_ad_df8() // 91c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -191332,7 +191329,7 @@ void m68008_device::suba_l_ais_ad_df8() // 91d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -191399,11 +191396,11 @@ void m68008_device::suba_l_ais_ad_df8() // 91d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -191453,7 +191450,7 @@ void m68008_device::suba_l_aips_ad_df8() // 91d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -191523,11 +191520,11 @@ void m68008_device::suba_l_aips_ad_df8() // 91d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -191576,7 +191573,7 @@ void m68008_device::suba_l_pais_ad_df8() // 91e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -191648,11 +191645,11 @@ void m68008_device::suba_l_pais_ad_df8() // 91e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -191733,7 +191730,7 @@ void m68008_device::suba_l_das_ad_df8() // 91e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -191800,11 +191797,11 @@ void m68008_device::suba_l_das_ad_df8() // 91e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -191852,7 +191849,7 @@ void m68008_device::suba_l_dais_ad_df8() // 91f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -191933,7 +191930,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -192000,11 +191997,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192087,7 +192084,7 @@ void m68008_device::suba_l_adr16_ad_df8() // 91f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -192154,11 +192151,11 @@ void m68008_device::suba_l_adr16_ad_df8() // 91f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192272,7 +192269,7 @@ void m68008_device::suba_l_adr32_ad_df8() // 91f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -192339,11 +192336,11 @@ void m68008_device::suba_l_adr32_ad_df8() // 91f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192423,7 +192420,7 @@ void m68008_device::suba_l_dpc_ad_df8() // 91fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192490,11 +192487,11 @@ void m68008_device::suba_l_dpc_ad_df8() // 91fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192541,7 +192538,7 @@ void m68008_device::suba_l_dpci_ad_df8() // 91fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -192622,7 +192619,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192689,11 +192686,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -192809,7 +192806,7 @@ void m68008_device::suba_l_imm32_ad_df8() // 91fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -192842,7 +192839,7 @@ void m68008_device::suba_l_imm32_ad_df8() // 91fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -192867,7 +192864,7 @@ void m68008_device::cmp_b_ds_dd_df8() // b000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -192916,7 +192913,7 @@ void m68008_device::cmp_b_ais_dd_df8() // b010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -192937,7 +192934,7 @@ void m68008_device::cmp_b_ais_dd_df8() // b010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -192992,7 +192989,7 @@ void m68008_device::cmp_b_aips_dd_df8() // b018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -193011,7 +193008,7 @@ void m68008_device::cmp_b_aips_dd_df8() // b018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193068,7 +193065,7 @@ void m68008_device::cmp_b_pais_dd_df8() // b020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -193087,7 +193084,7 @@ void m68008_device::cmp_b_pais_dd_df8() // b020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193168,7 +193165,7 @@ void m68008_device::cmp_b_das_dd_df8() // b028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193189,7 +193186,7 @@ void m68008_device::cmp_b_das_dd_df8() // b028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193236,7 +193233,7 @@ void m68008_device::cmp_b_dais_dd_df8() // b030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -193318,7 +193315,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193339,7 +193336,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193421,7 +193418,7 @@ void m68008_device::cmp_b_adr16_dd_df8() // b038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -193440,7 +193437,7 @@ void m68008_device::cmp_b_adr16_dd_df8() // b038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193553,7 +193550,7 @@ void m68008_device::cmp_b_adr32_dd_df8() // b039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -193572,7 +193569,7 @@ void m68008_device::cmp_b_adr32_dd_df8() // b039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193652,7 +193649,7 @@ void m68008_device::cmp_b_dpc_dd_df8() // b03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193673,7 +193670,7 @@ void m68008_device::cmp_b_dpc_dd_df8() // b03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193719,7 +193716,7 @@ void m68008_device::cmp_b_dpci_dd_df8() // b03b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -193801,7 +193798,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193822,7 +193819,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193906,7 +193903,7 @@ void m68008_device::cmp_b_imm8_dd_df8() // b03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193957,7 +193954,7 @@ void m68008_device::cmp_w_ds_dd_df8() // b040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194008,7 +194005,7 @@ void m68008_device::cmp_w_as_dd_df8() // b048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194057,7 +194054,7 @@ void m68008_device::cmp_w_ais_dd_df8() // b050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194093,7 +194090,7 @@ void m68008_device::cmp_w_ais_dd_df8() // b050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194148,7 +194145,7 @@ void m68008_device::cmp_w_aips_dd_df8() // b058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -194182,7 +194179,7 @@ void m68008_device::cmp_w_aips_dd_df8() // b058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194239,7 +194236,7 @@ void m68008_device::cmp_w_pais_dd_df8() // b060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -194273,7 +194270,7 @@ void m68008_device::cmp_w_pais_dd_df8() // b060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194354,7 +194351,7 @@ void m68008_device::cmp_w_das_dd_df8() // b068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194390,7 +194387,7 @@ void m68008_device::cmp_w_das_dd_df8() // b068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194437,7 +194434,7 @@ void m68008_device::cmp_w_dais_dd_df8() // b070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -194519,7 +194516,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194555,7 +194552,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194637,7 +194634,7 @@ void m68008_device::cmp_w_adr16_dd_df8() // b078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -194671,7 +194668,7 @@ void m68008_device::cmp_w_adr16_dd_df8() // b078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194784,7 +194781,7 @@ void m68008_device::cmp_w_adr32_dd_df8() // b079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -194818,7 +194815,7 @@ void m68008_device::cmp_w_adr32_dd_df8() // b079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194898,7 +194895,7 @@ void m68008_device::cmp_w_dpc_dd_df8() // b07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194934,7 +194931,7 @@ void m68008_device::cmp_w_dpc_dd_df8() // b07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194980,7 +194977,7 @@ void m68008_device::cmp_w_dpci_dd_df8() // b07b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -195062,7 +195059,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -195098,7 +195095,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -195182,7 +195179,7 @@ void m68008_device::cmp_w_imm16_dd_df8() // b07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -195233,11 +195230,11 @@ void m68008_device::cmp_l_ds_dd_df8() // b080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195289,11 +195286,11 @@ void m68008_device::cmp_l_as_dd_df8() // b088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195343,7 +195340,7 @@ void m68008_device::cmp_l_ais_dd_df8() // b090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -195410,11 +195407,11 @@ void m68008_device::cmp_l_ais_dd_df8() // b090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195464,7 +195461,7 @@ void m68008_device::cmp_l_aips_dd_df8() // b098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -195534,11 +195531,11 @@ void m68008_device::cmp_l_aips_dd_df8() // b098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195587,7 +195584,7 @@ void m68008_device::cmp_l_pais_dd_df8() // b0a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -195659,11 +195656,11 @@ void m68008_device::cmp_l_pais_dd_df8() // b0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195744,7 +195741,7 @@ void m68008_device::cmp_l_das_dd_df8() // b0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -195811,11 +195808,11 @@ void m68008_device::cmp_l_das_dd_df8() // b0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195863,7 +195860,7 @@ void m68008_device::cmp_l_dais_dd_df8() // b0b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -195944,7 +195941,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -196011,11 +196008,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196098,7 +196095,7 @@ void m68008_device::cmp_l_adr16_dd_df8() // b0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -196165,11 +196162,11 @@ void m68008_device::cmp_l_adr16_dd_df8() // b0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196283,7 +196280,7 @@ void m68008_device::cmp_l_adr32_dd_df8() // b0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -196350,11 +196347,11 @@ void m68008_device::cmp_l_adr32_dd_df8() // b0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196434,7 +196431,7 @@ void m68008_device::cmp_l_dpc_dd_df8() // b0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -196501,11 +196498,11 @@ void m68008_device::cmp_l_dpc_dd_df8() // b0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196552,7 +196549,7 @@ void m68008_device::cmp_l_dpci_dd_df8() // b0bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -196633,7 +196630,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -196700,11 +196697,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196820,11 +196817,11 @@ void m68008_device::cmp_l_imm32_dd_df8() // b0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196876,11 +196873,11 @@ void m68008_device::cmpa_w_ds_ad_df8() // b0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196932,11 +196929,11 @@ void m68008_device::cmpa_w_as_ad_df8() // b0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196986,7 +196983,7 @@ void m68008_device::cmpa_w_ais_ad_df8() // b0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197022,11 +197019,11 @@ void m68008_device::cmpa_w_ais_ad_df8() // b0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197082,7 +197079,7 @@ void m68008_device::cmpa_w_aips_ad_df8() // b0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -197116,11 +197113,11 @@ void m68008_device::cmpa_w_aips_ad_df8() // b0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197178,7 +197175,7 @@ void m68008_device::cmpa_w_pais_ad_df8() // b0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -197212,11 +197209,11 @@ void m68008_device::cmpa_w_pais_ad_df8() // b0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197298,7 +197295,7 @@ void m68008_device::cmpa_w_das_ad_df8() // b0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197334,11 +197331,11 @@ void m68008_device::cmpa_w_das_ad_df8() // b0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197386,7 +197383,7 @@ void m68008_device::cmpa_w_dais_ad_df8() // b0f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -197468,7 +197465,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197504,11 +197501,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197591,7 +197588,7 @@ void m68008_device::cmpa_w_adr16_ad_df8() // b0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -197625,11 +197622,11 @@ void m68008_device::cmpa_w_adr16_ad_df8() // b0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197743,7 +197740,7 @@ void m68008_device::cmpa_w_adr32_ad_df8() // b0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -197777,11 +197774,11 @@ void m68008_device::cmpa_w_adr32_ad_df8() // b0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197862,7 +197859,7 @@ void m68008_device::cmpa_w_dpc_ad_df8() // b0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197898,11 +197895,11 @@ void m68008_device::cmpa_w_dpc_ad_df8() // b0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197949,7 +197946,7 @@ void m68008_device::cmpa_w_dpci_ad_df8() // b0fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -198031,7 +198028,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -198067,11 +198064,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198156,11 +198153,11 @@ void m68008_device::cmpa_w_imm16_ad_df8() // b0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198211,7 +198208,7 @@ void m68008_device::eor_b_dd_ds_df8() // b100 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -198219,7 +198216,7 @@ void m68008_device::eor_b_dd_ds_df8() // b100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -198283,7 +198280,7 @@ void m68008_device::cmpm_b_aips_aipd_df8() // b108 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -198303,7 +198300,7 @@ void m68008_device::cmpm_b_aips_aipd_df8() // b108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin alu_sub8(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198348,11 +198345,11 @@ void m68008_device::eor_b_dd_ais_df8() // b110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -198370,7 +198367,7 @@ void m68008_device::eor_b_dd_ais_df8() // b110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198407,7 +198404,7 @@ void m68008_device::eor_b_dd_ais_df8() // b110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -198436,12 +198433,12 @@ void m68008_device::eor_b_dd_aips_df8() // b118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -198460,7 +198457,7 @@ void m68008_device::eor_b_dd_aips_df8() // b118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198497,7 +198494,7 @@ void m68008_device::eor_b_dd_aips_df8() // b118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -198525,7 +198522,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -198533,7 +198530,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -198552,7 +198549,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198589,7 +198586,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -198615,7 +198612,7 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -198648,11 +198645,11 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -198670,7 +198667,7 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198707,7 +198704,7 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -198731,14 +198728,14 @@ void m68008_device::eor_b_dd_dais_df8() // b130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -198746,7 +198743,7 @@ void m68008_device::eor_b_dd_dais_df8() // b130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -198780,7 +198777,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -198816,11 +198813,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -198838,7 +198835,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198875,7 +198872,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -198903,7 +198900,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -198936,7 +198933,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -198955,7 +198952,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198992,7 +198989,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -199018,7 +199015,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199052,7 +199049,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -199085,7 +199082,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -199104,7 +199101,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199141,7 +199138,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -199168,7 +199165,7 @@ void m68008_device::eor_w_dd_ds_df8() // b140 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -199176,7 +199173,7 @@ void m68008_device::eor_w_dd_ds_df8() // b140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199255,7 +199252,7 @@ void m68008_device::cmpm_w_aips_aipd_df8() // b148 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199290,7 +199287,7 @@ void m68008_device::cmpm_w_aips_aipd_df8() // b148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199335,11 +199332,11 @@ void m68008_device::eor_w_dd_ais_df8() // b150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199372,7 +199369,7 @@ void m68008_device::eor_w_dd_ais_df8() // b150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199409,7 +199406,7 @@ void m68008_device::eor_w_dd_ais_df8() // b150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199453,12 +199450,12 @@ void m68008_device::eor_w_dd_aips_df8() // b158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199492,7 +199489,7 @@ void m68008_device::eor_w_dd_aips_df8() // b158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199529,7 +199526,7 @@ void m68008_device::eor_w_dd_aips_df8() // b158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199572,7 +199569,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -199580,7 +199577,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199614,7 +199611,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199651,7 +199648,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199692,7 +199689,7 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199725,11 +199722,11 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199762,7 +199759,7 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199799,7 +199796,7 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199838,14 +199835,14 @@ void m68008_device::eor_w_dd_dais_df8() // b170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -199853,7 +199850,7 @@ void m68008_device::eor_w_dd_dais_df8() // b170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199887,7 +199884,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199923,11 +199920,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -199960,7 +199957,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199997,7 +199994,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200040,7 +200037,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -200073,7 +200070,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200107,7 +200104,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200144,7 +200141,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200185,7 +200182,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -200219,7 +200216,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -200252,7 +200249,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200286,7 +200283,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200323,7 +200320,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200365,12 +200362,12 @@ void m68008_device::eor_l_dd_ds_df8() // b180 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -200400,7 +200397,7 @@ void m68008_device::eor_l_dd_ds_df8() // b180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry] alu_eor(high16(m_da[rx]), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -200409,7 +200406,7 @@ void m68008_device::eor_l_dd_ds_df8() // b180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -200492,7 +200489,7 @@ void m68008_device::cmpm_l_aips_aipd_df8() // b188 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200556,13 +200553,13 @@ void m68008_device::cmpm_l_aips_aipd_df8() // b188 f1f8 m_aob = m_pc; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); // 157 cmml7 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue alu_subc(m_alub, m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200607,7 +200604,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200642,7 +200639,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -200675,7 +200672,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200710,7 +200707,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200745,7 +200742,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200786,7 +200783,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200821,11 +200818,11 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -200858,7 +200855,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200893,7 +200890,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200928,7 +200925,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200968,14 +200965,14 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201009,7 +201006,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201042,7 +201039,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201077,7 +201074,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201112,7 +201109,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201153,7 +201150,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201185,7 +201182,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -201220,7 +201217,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201253,7 +201250,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201288,7 +201285,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201323,7 +201320,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201362,14 +201359,14 @@ void m68008_device::eor_l_dd_dais_df8() // b1b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -201377,7 +201374,7 @@ void m68008_device::eor_l_dd_dais_df8() // b1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201411,7 +201408,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201446,7 +201443,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -201481,7 +201478,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201514,7 +201511,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201549,7 +201546,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201584,7 +201581,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201627,7 +201624,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -201660,7 +201657,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -201695,7 +201692,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201728,7 +201725,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201763,7 +201760,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201798,7 +201795,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201839,7 +201836,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201873,7 +201870,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -201906,7 +201903,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -201941,7 +201938,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -201974,7 +201971,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202009,7 +202006,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -202044,7 +202041,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -202087,11 +202084,11 @@ void m68008_device::cmpa_l_ds_ad_df8() // b1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202143,11 +202140,11 @@ void m68008_device::cmpa_l_as_ad_df8() // b1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202197,7 +202194,7 @@ void m68008_device::cmpa_l_ais_ad_df8() // b1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -202264,11 +202261,11 @@ void m68008_device::cmpa_l_ais_ad_df8() // b1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202318,7 +202315,7 @@ void m68008_device::cmpa_l_aips_ad_df8() // b1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -202388,11 +202385,11 @@ void m68008_device::cmpa_l_aips_ad_df8() // b1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202441,7 +202438,7 @@ void m68008_device::cmpa_l_pais_ad_df8() // b1e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -202513,11 +202510,11 @@ void m68008_device::cmpa_l_pais_ad_df8() // b1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202598,7 +202595,7 @@ void m68008_device::cmpa_l_das_ad_df8() // b1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -202665,11 +202662,11 @@ void m68008_device::cmpa_l_das_ad_df8() // b1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202717,7 +202714,7 @@ void m68008_device::cmpa_l_dais_ad_df8() // b1f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -202798,7 +202795,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -202865,11 +202862,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202952,7 +202949,7 @@ void m68008_device::cmpa_l_adr16_ad_df8() // b1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -203019,11 +203016,11 @@ void m68008_device::cmpa_l_adr16_ad_df8() // b1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203137,7 +203134,7 @@ void m68008_device::cmpa_l_adr32_ad_df8() // b1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -203204,11 +203201,11 @@ void m68008_device::cmpa_l_adr32_ad_df8() // b1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203288,7 +203285,7 @@ void m68008_device::cmpa_l_dpc_ad_df8() // b1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -203355,11 +203352,11 @@ void m68008_device::cmpa_l_dpc_ad_df8() // b1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203406,7 +203403,7 @@ void m68008_device::cmpa_l_dpci_ad_df8() // b1fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -203487,7 +203484,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -203554,11 +203551,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203674,11 +203671,11 @@ void m68008_device::cmpa_l_imm32_ad_df8() // b1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203730,7 +203727,7 @@ void m68008_device::and_b_ds_dd_df8() // c000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203738,7 +203735,7 @@ void m68008_device::and_b_ds_dd_df8() // c000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -203781,11 +203778,11 @@ void m68008_device::and_b_ais_dd_df8() // c010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -203803,7 +203800,7 @@ void m68008_device::and_b_ais_dd_df8() // c010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203811,7 +203808,7 @@ void m68008_device::and_b_ais_dd_df8() // c010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -203857,12 +203854,12 @@ void m68008_device::and_b_aips_dd_df8() // c018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -203881,7 +203878,7 @@ void m68008_device::and_b_aips_dd_df8() // c018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203889,7 +203886,7 @@ void m68008_device::and_b_aips_dd_df8() // c018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -203934,7 +203931,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -203942,7 +203939,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -203961,7 +203958,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203969,7 +203966,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204012,7 +204009,7 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204045,11 +204042,11 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -204067,7 +204064,7 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204075,7 +204072,7 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204116,14 +204113,14 @@ void m68008_device::and_b_dais_dd_df8() // c030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -204131,7 +204128,7 @@ void m68008_device::and_b_dais_dd_df8() // c030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204165,7 +204162,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204201,11 +204198,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -204223,7 +204220,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204231,7 +204228,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204276,7 +204273,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -204309,7 +204306,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -204328,7 +204325,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204336,7 +204333,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204379,7 +204376,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204413,7 +204410,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -204446,7 +204443,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -204465,7 +204462,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204473,7 +204470,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204515,7 +204512,7 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204548,11 +204545,11 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -204570,7 +204567,7 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204578,7 +204575,7 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204618,14 +204615,14 @@ void m68008_device::and_b_dpci_dd_df8() // c03b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -204633,7 +204630,7 @@ void m68008_device::and_b_dpci_dd_df8() // c03b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204667,7 +204664,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204703,11 +204700,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob); m_icount -= 4; @@ -204725,7 +204722,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204733,7 +204730,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204778,7 +204775,7 @@ void m68008_device::and_b_imm8_dd_df8() // c03c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204812,7 +204809,7 @@ void m68008_device::and_b_imm8_dd_df8() // c03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx] alu_and8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204820,7 +204817,7 @@ void m68008_device::and_b_imm8_dd_df8() // c03c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204865,7 +204862,7 @@ void m68008_device::and_w_ds_dd_df8() // c040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204873,7 +204870,7 @@ void m68008_device::and_w_ds_dd_df8() // c040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204916,11 +204913,11 @@ void m68008_device::and_w_ais_dd_df8() // c050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -204953,7 +204950,7 @@ void m68008_device::and_w_ais_dd_df8() // c050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204961,7 +204958,7 @@ void m68008_device::and_w_ais_dd_df8() // c050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205007,12 +205004,12 @@ void m68008_device::and_w_aips_dd_df8() // c058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -205046,7 +205043,7 @@ void m68008_device::and_w_aips_dd_df8() // c058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205054,7 +205051,7 @@ void m68008_device::and_w_aips_dd_df8() // c058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205099,7 +205096,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -205107,7 +205104,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -205141,7 +205138,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205149,7 +205146,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205192,7 +205189,7 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205225,11 +205222,11 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205262,7 +205259,7 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205270,7 +205267,7 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205311,14 +205308,14 @@ void m68008_device::and_w_dais_dd_df8() // c070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -205326,7 +205323,7 @@ void m68008_device::and_w_dais_dd_df8() // c070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205360,7 +205357,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205396,11 +205393,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205433,7 +205430,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205441,7 +205438,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205486,7 +205483,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -205519,7 +205516,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -205553,7 +205550,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205561,7 +205558,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205604,7 +205601,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205638,7 +205635,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -205671,7 +205668,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -205705,7 +205702,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205713,7 +205710,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205755,7 +205752,7 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205788,11 +205785,11 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205825,7 +205822,7 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205833,7 +205830,7 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205873,14 +205870,14 @@ void m68008_device::and_w_dpci_dd_df8() // c07b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -205888,7 +205885,7 @@ void m68008_device::and_w_dpci_dd_df8() // c07b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205922,7 +205919,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205958,11 +205955,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -205995,7 +205992,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -206003,7 +206000,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206048,7 +206045,7 @@ void m68008_device::and_w_imm16_dd_df8() // c07c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206082,7 +206079,7 @@ void m68008_device::and_w_imm16_dd_df8() // c07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -206090,7 +206087,7 @@ void m68008_device::and_w_imm16_dd_df8() // c07c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206135,12 +206132,12 @@ void m68008_device::and_l_ds_dd_df8() // c080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206170,7 +206167,7 @@ void m68008_device::and_l_ds_dd_df8() // c080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx] alu_and(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -206179,7 +206176,7 @@ void m68008_device::and_l_ds_dd_df8() // c080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206195,7 +206192,7 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -206230,7 +206227,7 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206263,12 +206260,12 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206304,7 +206301,7 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206320,7 +206317,7 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -206355,11 +206352,11 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206392,12 +206389,12 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206433,7 +206430,7 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206448,14 +206445,14 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206489,7 +206486,7 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206522,12 +206519,12 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206563,7 +206560,7 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206579,7 +206576,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206611,7 +206608,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -206646,7 +206643,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206679,12 +206676,12 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206720,7 +206717,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206734,14 +206731,14 @@ void m68008_device::and_l_dais_dd_df8() // c0b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -206749,7 +206746,7 @@ void m68008_device::and_l_dais_dd_df8() // c0b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206783,7 +206780,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206818,7 +206815,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -206853,7 +206850,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -206886,12 +206883,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206927,7 +206924,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206945,7 +206942,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -206978,7 +206975,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -207013,7 +207010,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207046,12 +207043,12 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207087,7 +207084,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207103,7 +207100,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207137,7 +207134,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -207170,7 +207167,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -207205,7 +207202,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207238,12 +207235,12 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207279,7 +207276,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207294,7 +207291,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207326,7 +207323,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -207361,7 +207358,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207394,12 +207391,12 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207435,7 +207432,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207448,14 +207445,14 @@ void m68008_device::and_l_dpci_dd_df8() // c0bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -207463,7 +207460,7 @@ void m68008_device::and_l_dpci_dd_df8() // c0bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207497,7 +207494,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207532,7 +207529,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -207567,7 +207564,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207600,12 +207597,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207641,7 +207638,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207657,7 +207654,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207691,7 +207688,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207725,12 +207722,12 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -207760,7 +207757,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx] alu_and(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -207769,7 +207766,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207789,7 +207786,7 @@ void m68008_device::mulu_w_ds_dd_df8() // c0c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -207832,7 +207829,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207844,7 +207841,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207856,7 +207853,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -207874,7 +207871,7 @@ void m68008_device::mulu_w_ais_dd_df8() // c0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -207912,7 +207909,7 @@ void m68008_device::mulu_w_ais_dd_df8() // c0d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -207955,7 +207952,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207967,7 +207964,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207979,7 +207976,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208003,7 +208000,7 @@ void m68008_device::mulu_w_aips_dd_df8() // c0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -208039,7 +208036,7 @@ void m68008_device::mulu_w_aips_dd_df8() // c0d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208082,7 +208079,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208094,7 +208091,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208106,7 +208103,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208132,7 +208129,7 @@ void m68008_device::mulu_w_pais_dd_df8() // c0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -208168,7 +208165,7 @@ void m68008_device::mulu_w_pais_dd_df8() // c0e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208211,7 +208208,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208223,7 +208220,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208235,7 +208232,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208285,7 +208282,7 @@ void m68008_device::mulu_w_das_dd_df8() // c0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -208323,7 +208320,7 @@ void m68008_device::mulu_w_das_dd_df8() // c0e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208366,7 +208363,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208378,7 +208375,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208390,7 +208387,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208406,7 +208403,7 @@ void m68008_device::mulu_w_dais_dd_df8() // c0f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -208488,7 +208485,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -208526,7 +208523,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208569,7 +208566,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208581,7 +208578,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208593,7 +208590,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208644,7 +208641,7 @@ void m68008_device::mulu_w_adr16_dd_df8() // c0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -208680,7 +208677,7 @@ void m68008_device::mulu_w_adr16_dd_df8() // c0f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208723,7 +208720,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208735,7 +208732,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208747,7 +208744,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208829,7 +208826,7 @@ void m68008_device::mulu_w_adr32_dd_df8() // c0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -208865,7 +208862,7 @@ void m68008_device::mulu_w_adr32_dd_df8() // c0f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208908,7 +208905,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208920,7 +208917,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208932,7 +208929,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208981,7 +208978,7 @@ void m68008_device::mulu_w_dpc_dd_df8() // c0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209019,7 +209016,7 @@ void m68008_device::mulu_w_dpc_dd_df8() // c0fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -209062,7 +209059,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209074,7 +209071,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209086,7 +209083,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -209101,7 +209098,7 @@ void m68008_device::mulu_w_dpci_dd_df8() // c0fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -209183,7 +209180,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209221,7 +209218,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -209264,7 +209261,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209276,7 +209273,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209288,7 +209285,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -209343,7 +209340,7 @@ void m68008_device::mulu_w_imm16_dd_df8() // c0fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -209386,7 +209383,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209398,7 +209395,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209410,7 +209407,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -209430,12 +209427,12 @@ void m68008_device::abcd_ds_dd_df8() // c100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx] alu_abcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -209490,7 +209487,7 @@ void m68008_device::abcd_pais_paid_df8() // c108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -209526,12 +209523,12 @@ void m68008_device::abcd_pais_paid_df8() // c108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin alu_abcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -209591,11 +209588,11 @@ void m68008_device::and_b_dd_ais_df8() // c110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -209613,7 +209610,7 @@ void m68008_device::and_b_dd_ais_df8() // c110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209650,7 +209647,7 @@ void m68008_device::and_b_dd_ais_df8() // c110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -209679,12 +209676,12 @@ void m68008_device::and_b_dd_aips_df8() // c118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -209703,7 +209700,7 @@ void m68008_device::and_b_dd_aips_df8() // c118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209740,7 +209737,7 @@ void m68008_device::and_b_dd_aips_df8() // c118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -209768,7 +209765,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -209776,7 +209773,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -209795,7 +209792,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209832,7 +209829,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -209858,7 +209855,7 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -209891,11 +209888,11 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -209913,7 +209910,7 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209950,7 +209947,7 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -209974,14 +209971,14 @@ void m68008_device::and_b_dd_dais_df8() // c130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -209989,7 +209986,7 @@ void m68008_device::and_b_dd_dais_df8() // c130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -210023,7 +210020,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -210059,11 +210056,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -210081,7 +210078,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210118,7 +210115,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -210146,7 +210143,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -210179,7 +210176,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -210198,7 +210195,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210235,7 +210232,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -210261,7 +210258,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -210295,7 +210292,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -210328,7 +210325,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -210347,7 +210344,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210384,7 +210381,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -210518,11 +210515,11 @@ void m68008_device::and_w_dd_ais_df8() // c150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -210555,7 +210552,7 @@ void m68008_device::and_w_dd_ais_df8() // c150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210592,7 +210589,7 @@ void m68008_device::and_w_dd_ais_df8() // c150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -210636,12 +210633,12 @@ void m68008_device::and_w_dd_aips_df8() // c158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -210675,7 +210672,7 @@ void m68008_device::and_w_dd_aips_df8() // c158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210712,7 +210709,7 @@ void m68008_device::and_w_dd_aips_df8() // c158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -210755,7 +210752,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -210763,7 +210760,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -210797,7 +210794,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210834,7 +210831,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -210875,7 +210872,7 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -210908,11 +210905,11 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -210945,7 +210942,7 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210982,7 +210979,7 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211021,14 +211018,14 @@ void m68008_device::and_w_dd_dais_df8() // c170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -211036,7 +211033,7 @@ void m68008_device::and_w_dd_dais_df8() // c170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -211070,7 +211067,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -211106,11 +211103,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -211143,7 +211140,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211180,7 +211177,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211223,7 +211220,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -211256,7 +211253,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -211290,7 +211287,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211327,7 +211324,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211368,7 +211365,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -211402,7 +211399,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -211435,7 +211432,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -211469,7 +211466,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211506,7 +211503,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211601,7 +211598,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -211636,7 +211633,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -211669,7 +211666,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211704,7 +211701,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -211739,7 +211736,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211780,7 +211777,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -211815,11 +211812,11 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -211852,7 +211849,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211887,7 +211884,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -211922,7 +211919,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211962,14 +211959,14 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212003,7 +212000,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212036,7 +212033,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212071,7 +212068,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212106,7 +212103,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212147,7 +212144,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212179,7 +212176,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -212214,7 +212211,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212247,7 +212244,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212282,7 +212279,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212317,7 +212314,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212356,14 +212353,14 @@ void m68008_device::and_l_dd_dais_df8() // c1b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -212371,7 +212368,7 @@ void m68008_device::and_l_dd_dais_df8() // c1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212405,7 +212402,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212440,7 +212437,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -212475,7 +212472,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212508,7 +212505,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212543,7 +212540,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212578,7 +212575,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212621,7 +212618,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -212654,7 +212651,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -212689,7 +212686,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212722,7 +212719,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212757,7 +212754,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212792,7 +212789,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212833,7 +212830,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212867,7 +212864,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -212900,7 +212897,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -212935,7 +212932,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -212968,7 +212965,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213003,7 +213000,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -213038,7 +213035,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -213083,7 +213080,7 @@ void m68008_device::muls_w_ds_dd_df8() // c1c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213126,7 +213123,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213140,7 +213137,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213152,7 +213149,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213163,7 +213160,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213177,7 +213174,7 @@ void m68008_device::muls_w_ais_dd_df8() // c1d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -213215,7 +213212,7 @@ void m68008_device::muls_w_ais_dd_df8() // c1d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213258,7 +213255,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213272,7 +213269,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213284,7 +213281,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213295,7 +213292,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213315,7 +213312,7 @@ void m68008_device::muls_w_aips_dd_df8() // c1d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -213351,7 +213348,7 @@ void m68008_device::muls_w_aips_dd_df8() // c1d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213394,7 +213391,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213408,7 +213405,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213420,7 +213417,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213431,7 +213428,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213453,7 +213450,7 @@ void m68008_device::muls_w_pais_dd_df8() // c1e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -213489,7 +213486,7 @@ void m68008_device::muls_w_pais_dd_df8() // c1e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213532,7 +213529,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213546,7 +213543,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213558,7 +213555,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213569,7 +213566,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213615,7 +213612,7 @@ void m68008_device::muls_w_das_dd_df8() // c1e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -213653,7 +213650,7 @@ void m68008_device::muls_w_das_dd_df8() // c1e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213696,7 +213693,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213710,7 +213707,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213722,7 +213719,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213733,7 +213730,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213745,7 +213742,7 @@ void m68008_device::muls_w_dais_dd_df8() // c1f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -213827,7 +213824,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -213865,7 +213862,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213908,7 +213905,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213922,7 +213919,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213934,7 +213931,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213945,7 +213942,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213992,7 +213989,7 @@ void m68008_device::muls_w_adr16_dd_df8() // c1f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -214028,7 +214025,7 @@ void m68008_device::muls_w_adr16_dd_df8() // c1f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214071,7 +214068,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214085,7 +214082,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214097,7 +214094,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214108,7 +214105,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214186,7 +214183,7 @@ void m68008_device::muls_w_adr32_dd_df8() // c1f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -214222,7 +214219,7 @@ void m68008_device::muls_w_adr32_dd_df8() // c1f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214265,7 +214262,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214279,7 +214276,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214291,7 +214288,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214302,7 +214299,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214347,7 +214344,7 @@ void m68008_device::muls_w_dpc_dd_df8() // c1fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -214385,7 +214382,7 @@ void m68008_device::muls_w_dpc_dd_df8() // c1fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214428,7 +214425,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214442,7 +214439,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214454,7 +214451,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214465,7 +214462,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214476,7 +214473,7 @@ void m68008_device::muls_w_dpci_dd_df8() // c1fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -214558,7 +214555,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -214596,7 +214593,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214639,7 +214636,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214653,7 +214650,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214665,7 +214662,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214676,7 +214673,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214727,7 +214724,7 @@ void m68008_device::muls_w_imm16_dd_df8() // c1fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214770,7 +214767,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214784,7 +214781,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214796,7 +214793,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214807,7 +214804,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214823,7 +214820,7 @@ void m68008_device::add_b_ds_dd_df8() // d000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -214873,7 +214870,7 @@ void m68008_device::add_b_ais_dd_df8() // d010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -214894,7 +214891,7 @@ void m68008_device::add_b_ais_dd_df8() // d010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -214950,7 +214947,7 @@ void m68008_device::add_b_aips_dd_df8() // d018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -214969,7 +214966,7 @@ void m68008_device::add_b_aips_dd_df8() // d018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215027,7 +215024,7 @@ void m68008_device::add_b_pais_dd_df8() // d020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -215046,7 +215043,7 @@ void m68008_device::add_b_pais_dd_df8() // d020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215128,7 +215125,7 @@ void m68008_device::add_b_das_dd_df8() // d028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215149,7 +215146,7 @@ void m68008_device::add_b_das_dd_df8() // d028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215197,7 +215194,7 @@ void m68008_device::add_b_dais_dd_df8() // d030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -215279,7 +215276,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215300,7 +215297,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215383,7 +215380,7 @@ void m68008_device::add_b_adr16_dd_df8() // d038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -215402,7 +215399,7 @@ void m68008_device::add_b_adr16_dd_df8() // d038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215516,7 +215513,7 @@ void m68008_device::add_b_adr32_dd_df8() // d039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -215535,7 +215532,7 @@ void m68008_device::add_b_adr32_dd_df8() // d039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215616,7 +215613,7 @@ void m68008_device::add_b_dpc_dd_df8() // d03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215637,7 +215634,7 @@ void m68008_device::add_b_dpc_dd_df8() // d03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215684,7 +215681,7 @@ void m68008_device::add_b_dpci_dd_df8() // d03b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -215766,7 +215763,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215787,7 +215784,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215872,7 +215869,7 @@ void m68008_device::add_b_imm8_dd_df8() // d03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx] alu_add8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215924,7 +215921,7 @@ void m68008_device::add_w_ds_dd_df8() // d040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215976,7 +215973,7 @@ void m68008_device::add_w_as_dd_df8() // d048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216026,7 +216023,7 @@ void m68008_device::add_w_ais_dd_df8() // d050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216062,7 +216059,7 @@ void m68008_device::add_w_ais_dd_df8() // d050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216118,7 +216115,7 @@ void m68008_device::add_w_aips_dd_df8() // d058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -216152,7 +216149,7 @@ void m68008_device::add_w_aips_dd_df8() // d058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216210,7 +216207,7 @@ void m68008_device::add_w_pais_dd_df8() // d060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -216244,7 +216241,7 @@ void m68008_device::add_w_pais_dd_df8() // d060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216326,7 +216323,7 @@ void m68008_device::add_w_das_dd_df8() // d068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216362,7 +216359,7 @@ void m68008_device::add_w_das_dd_df8() // d068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216410,7 +216407,7 @@ void m68008_device::add_w_dais_dd_df8() // d070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -216492,7 +216489,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216528,7 +216525,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216611,7 +216608,7 @@ void m68008_device::add_w_adr16_dd_df8() // d078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -216645,7 +216642,7 @@ void m68008_device::add_w_adr16_dd_df8() // d078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216759,7 +216756,7 @@ void m68008_device::add_w_adr32_dd_df8() // d079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -216793,7 +216790,7 @@ void m68008_device::add_w_adr32_dd_df8() // d079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216874,7 +216871,7 @@ void m68008_device::add_w_dpc_dd_df8() // d07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216910,7 +216907,7 @@ void m68008_device::add_w_dpc_dd_df8() // d07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216957,7 +216954,7 @@ void m68008_device::add_w_dpci_dd_df8() // d07b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -217039,7 +217036,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -217075,7 +217072,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -217160,7 +217157,7 @@ void m68008_device::add_w_imm16_dd_df8() // d07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -217212,7 +217209,7 @@ void m68008_device::add_l_ds_dd_df8() // d080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -217246,7 +217243,7 @@ void m68008_device::add_l_ds_dd_df8() // d080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -217272,7 +217269,7 @@ void m68008_device::add_l_as_dd_df8() // d088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -217306,7 +217303,7 @@ void m68008_device::add_l_as_dd_df8() // d088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -217330,7 +217327,7 @@ void m68008_device::add_l_ais_dd_df8() // d090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -217397,12 +217394,12 @@ void m68008_device::add_l_ais_dd_df8() // d090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217453,7 +217450,7 @@ void m68008_device::add_l_aips_dd_df8() // d098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -217523,12 +217520,12 @@ void m68008_device::add_l_aips_dd_df8() // d098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217578,7 +217575,7 @@ void m68008_device::add_l_pais_dd_df8() // d0a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -217650,12 +217647,12 @@ void m68008_device::add_l_pais_dd_df8() // d0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217737,7 +217734,7 @@ void m68008_device::add_l_das_dd_df8() // d0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -217804,12 +217801,12 @@ void m68008_device::add_l_das_dd_df8() // d0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217858,7 +217855,7 @@ void m68008_device::add_l_dais_dd_df8() // d0b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -217939,7 +217936,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -218006,12 +218003,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218095,7 +218092,7 @@ void m68008_device::add_l_adr16_dd_df8() // d0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -218162,12 +218159,12 @@ void m68008_device::add_l_adr16_dd_df8() // d0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218282,7 +218279,7 @@ void m68008_device::add_l_adr32_dd_df8() // d0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -218349,12 +218346,12 @@ void m68008_device::add_l_adr32_dd_df8() // d0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218435,7 +218432,7 @@ void m68008_device::add_l_dpc_dd_df8() // d0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -218502,12 +218499,12 @@ void m68008_device::add_l_dpc_dd_df8() // d0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218555,7 +218552,7 @@ void m68008_device::add_l_dpci_dd_df8() // d0bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -218636,7 +218633,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -218703,12 +218700,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218825,7 +218822,7 @@ void m68008_device::add_l_imm32_dd_df8() // d0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -218859,7 +218856,7 @@ void m68008_device::add_l_imm32_dd_df8() // d0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -218885,7 +218882,7 @@ void m68008_device::adda_w_ds_ad_df8() // d0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -218918,7 +218915,7 @@ void m68008_device::adda_w_ds_ad_df8() // d0c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -218943,7 +218940,7 @@ void m68008_device::adda_w_as_ad_df8() // d0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -218976,7 +218973,7 @@ void m68008_device::adda_w_as_ad_df8() // d0c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -218999,7 +218996,7 @@ void m68008_device::adda_w_ais_ad_df8() // d0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219035,7 +219032,7 @@ void m68008_device::adda_w_ais_ad_df8() // d0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219068,7 +219065,7 @@ void m68008_device::adda_w_ais_ad_df8() // d0d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219097,7 +219094,7 @@ void m68008_device::adda_w_aips_ad_df8() // d0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -219131,7 +219128,7 @@ void m68008_device::adda_w_aips_ad_df8() // d0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219164,7 +219161,7 @@ void m68008_device::adda_w_aips_ad_df8() // d0d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219195,7 +219192,7 @@ void m68008_device::adda_w_pais_ad_df8() // d0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -219229,7 +219226,7 @@ void m68008_device::adda_w_pais_ad_df8() // d0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219262,7 +219259,7 @@ void m68008_device::adda_w_pais_ad_df8() // d0e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219317,7 +219314,7 @@ void m68008_device::adda_w_das_ad_df8() // d0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219353,7 +219350,7 @@ void m68008_device::adda_w_das_ad_df8() // d0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219386,7 +219383,7 @@ void m68008_device::adda_w_das_ad_df8() // d0e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219407,7 +219404,7 @@ void m68008_device::adda_w_dais_ad_df8() // d0f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -219489,7 +219486,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219525,7 +219522,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219558,7 +219555,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219614,7 +219611,7 @@ void m68008_device::adda_w_adr16_ad_df8() // d0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -219648,7 +219645,7 @@ void m68008_device::adda_w_adr16_ad_df8() // d0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219681,7 +219678,7 @@ void m68008_device::adda_w_adr16_ad_df8() // d0f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219768,7 +219765,7 @@ void m68008_device::adda_w_adr32_ad_df8() // d0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -219802,7 +219799,7 @@ void m68008_device::adda_w_adr32_ad_df8() // d0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219835,7 +219832,7 @@ void m68008_device::adda_w_adr32_ad_df8() // d0f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219889,7 +219886,7 @@ void m68008_device::adda_w_dpc_ad_df8() // d0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219925,7 +219922,7 @@ void m68008_device::adda_w_dpc_ad_df8() // d0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219958,7 +219955,7 @@ void m68008_device::adda_w_dpc_ad_df8() // d0fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219978,7 +219975,7 @@ void m68008_device::adda_w_dpci_ad_df8() // d0fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -220060,7 +220057,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -220096,7 +220093,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -220129,7 +220126,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -220187,7 +220184,7 @@ void m68008_device::adda_w_imm16_ad_df8() // d0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -220220,7 +220217,7 @@ void m68008_device::adda_w_imm16_ad_df8() // d0fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -220245,7 +220242,7 @@ void m68008_device::addx_b_ds_dd_df8() // d100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -220253,7 +220250,7 @@ void m68008_device::addx_b_ds_dd_df8() // d100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -220298,16 +220295,16 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -220326,7 +220323,7 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); m_icount -= 4; @@ -220342,7 +220339,7 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin alu_addx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220379,7 +220376,7 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob, m_dbout); m_icount -= 4; @@ -220405,7 +220402,7 @@ void m68008_device::add_b_dd_ais_df8() // d110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -220426,7 +220423,7 @@ void m68008_device::add_b_dd_ais_df8() // d110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220494,7 +220491,7 @@ void m68008_device::add_b_dd_aips_df8() // d118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -220513,7 +220510,7 @@ void m68008_device::add_b_dd_aips_df8() // d118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220583,7 +220580,7 @@ void m68008_device::add_b_dd_pais_df8() // d120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -220602,7 +220599,7 @@ void m68008_device::add_b_dd_pais_df8() // d120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220696,7 +220693,7 @@ void m68008_device::add_b_dd_das_df8() // d128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -220717,7 +220714,7 @@ void m68008_device::add_b_dd_das_df8() // d128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220777,7 +220774,7 @@ void m68008_device::add_b_dd_dais_df8() // d130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -220859,7 +220856,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -220880,7 +220877,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220975,7 +220972,7 @@ void m68008_device::add_b_dd_adr16_df8() // d138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -220994,7 +220991,7 @@ void m68008_device::add_b_dd_adr16_df8() // d138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221120,7 +221117,7 @@ void m68008_device::add_b_dd_adr32_df8() // d139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob); @@ -221139,7 +221136,7 @@ void m68008_device::add_b_dd_adr32_df8() // d139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221203,7 +221200,7 @@ void m68008_device::addx_w_ds_dd_df8() // d140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -221211,7 +221208,7 @@ void m68008_device::addx_w_ds_dd_df8() // d140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -221256,16 +221253,16 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -221299,7 +221296,7 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -221330,7 +221327,7 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221367,7 +221364,7 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -221408,7 +221405,7 @@ void m68008_device::add_w_dd_ais_df8() // d150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221444,7 +221441,7 @@ void m68008_device::add_w_dd_ais_df8() // d150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221527,7 +221524,7 @@ void m68008_device::add_w_dd_aips_df8() // d158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -221561,7 +221558,7 @@ void m68008_device::add_w_dd_aips_df8() // d158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221646,7 +221643,7 @@ void m68008_device::add_w_dd_pais_df8() // d160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -221680,7 +221677,7 @@ void m68008_device::add_w_dd_pais_df8() // d160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221789,7 +221786,7 @@ void m68008_device::add_w_dd_das_df8() // d168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221825,7 +221822,7 @@ void m68008_device::add_w_dd_das_df8() // d168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221900,7 +221897,7 @@ void m68008_device::add_w_dd_dais_df8() // d170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -221982,7 +221979,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222018,7 +222015,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222128,7 +222125,7 @@ void m68008_device::add_w_dd_adr16_df8() // d178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -222162,7 +222159,7 @@ void m68008_device::add_w_dd_adr16_df8() // d178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222303,7 +222300,7 @@ void m68008_device::add_w_dd_adr32_df8() // d179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -222337,7 +222334,7 @@ void m68008_device::add_w_dd_adr32_df8() // d179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222416,12 +222413,12 @@ void m68008_device::addx_l_ds_dd_df8() // d180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -222451,7 +222448,7 @@ void m68008_device::addx_l_ds_dd_df8() // d180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx] + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx] alu_addx(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -222460,7 +222457,7 @@ void m68008_device::addx_l_ds_dd_df8() // d180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -222478,13 +222475,13 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_icount -= 2; // 048 asxl2 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -222515,11 +222512,11 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -222551,7 +222548,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -222584,7 +222581,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin alu_addx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -222619,7 +222616,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = ext32(m_dbin); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -222649,7 +222646,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222686,7 +222683,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -222727,7 +222724,7 @@ void m68008_device::add_l_dd_ais_df8() // d190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -222794,7 +222791,7 @@ void m68008_device::add_l_dd_ais_df8() // d190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222829,7 +222826,7 @@ void m68008_device::add_l_dd_ais_df8() // d190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -222904,7 +222901,7 @@ void m68008_device::add_l_dd_aips_df8() // d198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -222974,7 +222971,7 @@ void m68008_device::add_l_dd_aips_df8() // d198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223009,7 +223006,7 @@ void m68008_device::add_l_dd_aips_df8() // d198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223083,7 +223080,7 @@ void m68008_device::add_l_dd_pais_df8() // d1a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -223155,7 +223152,7 @@ void m68008_device::add_l_dd_pais_df8() // d1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223190,7 +223187,7 @@ void m68008_device::add_l_dd_pais_df8() // d1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223296,7 +223293,7 @@ void m68008_device::add_l_dd_das_df8() // d1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -223363,7 +223360,7 @@ void m68008_device::add_l_dd_das_df8() // d1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223398,7 +223395,7 @@ void m68008_device::add_l_dd_das_df8() // d1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223471,7 +223468,7 @@ void m68008_device::add_l_dd_dais_df8() // d1b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -223552,7 +223549,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -223619,7 +223616,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223654,7 +223651,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223762,7 +223759,7 @@ void m68008_device::add_l_dd_adr16_df8() // d1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -223829,7 +223826,7 @@ void m68008_device::add_l_dd_adr16_df8() // d1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223864,7 +223861,7 @@ void m68008_device::add_l_dd_adr16_df8() // d1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -224003,7 +224000,7 @@ void m68008_device::add_l_dd_adr32_df8() // d1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -224070,7 +224067,7 @@ void m68008_device::add_l_dd_adr32_df8() // d1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224105,7 +224102,7 @@ void m68008_device::add_l_dd_adr32_df8() // d1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -224182,7 +224179,7 @@ void m68008_device::adda_l_ds_ad_df8() // d1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -224215,7 +224212,7 @@ void m68008_device::adda_l_ds_ad_df8() // d1c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -224240,7 +224237,7 @@ void m68008_device::adda_l_as_ad_df8() // d1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -224273,7 +224270,7 @@ void m68008_device::adda_l_as_ad_df8() // d1c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -224296,7 +224293,7 @@ void m68008_device::adda_l_ais_ad_df8() // d1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -224363,11 +224360,11 @@ void m68008_device::adda_l_ais_ad_df8() // d1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -224417,7 +224414,7 @@ void m68008_device::adda_l_aips_ad_df8() // d1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -224487,11 +224484,11 @@ void m68008_device::adda_l_aips_ad_df8() // d1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -224540,7 +224537,7 @@ void m68008_device::adda_l_pais_ad_df8() // d1e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -224612,11 +224609,11 @@ void m68008_device::adda_l_pais_ad_df8() // d1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -224697,7 +224694,7 @@ void m68008_device::adda_l_das_ad_df8() // d1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -224764,11 +224761,11 @@ void m68008_device::adda_l_das_ad_df8() // d1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -224816,7 +224813,7 @@ void m68008_device::adda_l_dais_ad_df8() // d1f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -224897,7 +224894,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -224964,11 +224961,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225051,7 +225048,7 @@ void m68008_device::adda_l_adr16_ad_df8() // d1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -225118,11 +225115,11 @@ void m68008_device::adda_l_adr16_ad_df8() // d1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225236,7 +225233,7 @@ void m68008_device::adda_l_adr32_ad_df8() // d1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -225303,11 +225300,11 @@ void m68008_device::adda_l_adr32_ad_df8() // d1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225387,7 +225384,7 @@ void m68008_device::adda_l_dpc_ad_df8() // d1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225454,11 +225451,11 @@ void m68008_device::adda_l_dpc_ad_df8() // d1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225505,7 +225502,7 @@ void m68008_device::adda_l_dpci_ad_df8() // d1fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -225586,7 +225583,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225653,11 +225650,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -225773,7 +225770,7 @@ void m68008_device::adda_l_imm32_ad_df8() // d1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -225806,7 +225803,7 @@ void m68008_device::adda_l_imm32_ad_df8() // d1fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -225830,13 +225827,13 @@ void m68008_device::asr_b_imm3_ds_df8() // e000 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225875,7 +225872,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -225905,13 +225902,13 @@ void m68008_device::lsr_b_imm3_ds_df8() // e008 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225950,7 +225947,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -225980,13 +225977,13 @@ void m68008_device::roxr_b_imm3_ds_df8() // e010 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226025,7 +226022,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226055,13 +226052,13 @@ void m68008_device::ror_b_imm3_ds_df8() // e018 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226100,7 +226097,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -226131,13 +226128,13 @@ void m68008_device::asr_b_dd_ds_df8() // e020 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226176,7 +226173,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226207,13 +226204,13 @@ void m68008_device::lsr_b_dd_ds_df8() // e028 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226252,7 +226249,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226283,13 +226280,13 @@ void m68008_device::roxr_b_dd_ds_df8() // e030 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226328,7 +226325,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226359,13 +226356,13 @@ void m68008_device::ror_b_dd_ds_df8() // e038 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226404,7 +226401,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -226434,13 +226431,13 @@ void m68008_device::asr_w_imm3_ds_df8() // e040 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226479,7 +226476,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226509,13 +226506,13 @@ void m68008_device::lsr_w_imm3_ds_df8() // e048 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226554,7 +226551,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226584,13 +226581,13 @@ void m68008_device::roxr_w_imm3_ds_df8() // e050 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226629,7 +226626,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226659,13 +226656,13 @@ void m68008_device::ror_w_imm3_ds_df8() // e058 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226704,7 +226701,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -226735,13 +226732,13 @@ void m68008_device::asr_w_dd_ds_df8() // e060 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226780,7 +226777,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226811,13 +226808,13 @@ void m68008_device::lsr_w_dd_ds_df8() // e068 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226856,7 +226853,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226887,13 +226884,13 @@ void m68008_device::roxr_w_dd_ds_df8() // e070 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226932,7 +226929,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226963,13 +226960,13 @@ void m68008_device::ror_w_dd_ds_df8() // e078 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227008,7 +227005,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -227038,13 +227035,13 @@ void m68008_device::asr_l_imm3_ds_df8() // e080 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227083,7 +227080,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227100,7 +227097,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227119,13 +227116,13 @@ void m68008_device::lsr_l_imm3_ds_df8() // e088 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227164,7 +227161,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227181,7 +227178,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227200,13 +227197,13 @@ void m68008_device::roxr_l_imm3_ds_df8() // e090 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227245,7 +227242,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227262,7 +227259,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227281,13 +227278,13 @@ void m68008_device::ror_l_imm3_ds_df8() // e098 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227326,7 +227323,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -227343,7 +227340,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227363,13 +227360,13 @@ void m68008_device::asr_l_dd_ds_df8() // e0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227408,7 +227405,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227425,7 +227422,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227445,13 +227442,13 @@ void m68008_device::lsr_l_dd_ds_df8() // e0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227490,7 +227487,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227507,7 +227504,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227527,13 +227524,13 @@ void m68008_device::roxr_l_dd_ds_df8() // e0b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227572,7 +227569,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227589,7 +227586,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227609,13 +227606,13 @@ void m68008_device::ror_l_dd_ds_df8() // e0b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227654,7 +227651,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -227671,7 +227668,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227689,7 +227686,7 @@ void m68008_device::asr_ais_df8() // e0d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -227725,12 +227722,12 @@ void m68008_device::asr_ais_df8() // e0d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227813,7 +227810,7 @@ void m68008_device::asr_aips_df8() // e0d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -227847,12 +227844,12 @@ void m68008_device::asr_aips_df8() // e0d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227937,7 +227934,7 @@ void m68008_device::asr_pais_df8() // e0e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -227971,12 +227968,12 @@ void m68008_device::asr_pais_df8() // e0e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228085,7 +228082,7 @@ void m68008_device::asr_das_df8() // e0e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -228121,12 +228118,12 @@ void m68008_device::asr_das_df8() // e0e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228201,7 +228198,7 @@ void m68008_device::asr_dais_df8() // e0f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -228283,7 +228280,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -228319,12 +228316,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228434,7 +228431,7 @@ void m68008_device::asr_adr16_df8() // e0f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -228468,12 +228465,12 @@ void m68008_device::asr_adr16_df8() // e0f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228614,7 +228611,7 @@ void m68008_device::asr_adr32_df8() // e0f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -228648,12 +228645,12 @@ void m68008_device::asr_adr32_df8() // e0f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228731,13 +228728,13 @@ void m68008_device::asl_b_imm3_ds_df8() // e100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228776,7 +228773,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -228806,13 +228803,13 @@ void m68008_device::lsl_b_imm3_ds_df8() // e108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228851,7 +228848,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -228865,7 +228862,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -228882,13 +228879,13 @@ void m68008_device::roxl_b_imm3_ds_df8() // e110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228927,7 +228924,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -228957,13 +228954,13 @@ void m68008_device::rol_b_imm3_ds_df8() // e118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229002,7 +228999,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229033,13 +229030,13 @@ void m68008_device::asl_b_dd_ds_df8() // e120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229078,7 +229075,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229109,13 +229106,13 @@ void m68008_device::lsl_b_dd_ds_df8() // e128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229154,7 +229151,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229168,7 +229165,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -229186,13 +229183,13 @@ void m68008_device::roxl_b_dd_ds_df8() // e130 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229231,7 +229228,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229262,13 +229259,13 @@ void m68008_device::rol_b_dd_ds_df8() // e138 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229307,7 +229304,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229337,13 +229334,13 @@ void m68008_device::asl_w_imm3_ds_df8() // e140 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229382,7 +229379,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229412,13 +229409,13 @@ void m68008_device::lsl_w_imm3_ds_df8() // e148 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229457,7 +229454,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229471,7 +229468,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -229488,13 +229485,13 @@ void m68008_device::roxl_w_imm3_ds_df8() // e150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229533,7 +229530,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229563,13 +229560,13 @@ void m68008_device::rol_w_imm3_ds_df8() // e158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229608,7 +229605,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229639,13 +229636,13 @@ void m68008_device::asl_w_dd_ds_df8() // e160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229684,7 +229681,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229715,13 +229712,13 @@ void m68008_device::lsl_w_dd_ds_df8() // e168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229760,7 +229757,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229774,7 +229771,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -229792,13 +229789,13 @@ void m68008_device::roxl_w_dd_ds_df8() // e170 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229837,7 +229834,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229868,13 +229865,13 @@ void m68008_device::rol_w_dd_ds_df8() // e178 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229913,7 +229910,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229943,13 +229940,13 @@ void m68008_device::asl_l_imm3_ds_df8() // e180 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229988,7 +229985,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230005,7 +230002,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230024,13 +230021,13 @@ void m68008_device::lsl_l_imm3_ds_df8() // e188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230069,7 +230066,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230081,14 +230078,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230107,13 +230104,13 @@ void m68008_device::roxl_l_imm3_ds_df8() // e190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230152,7 +230149,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230169,7 +230166,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230188,13 +230185,13 @@ void m68008_device::rol_l_imm3_ds_df8() // e198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230233,7 +230230,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -230250,7 +230247,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230270,13 +230267,13 @@ void m68008_device::asl_l_dd_ds_df8() // e1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230315,7 +230312,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230332,7 +230329,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230352,13 +230349,13 @@ void m68008_device::lsl_l_dd_ds_df8() // e1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230397,7 +230394,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230409,14 +230406,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230436,13 +230433,13 @@ void m68008_device::roxl_l_dd_ds_df8() // e1b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230481,7 +230478,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230498,7 +230495,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230518,13 +230515,13 @@ void m68008_device::rol_l_dd_ds_df8() // e1b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230563,7 +230560,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -230580,7 +230577,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230598,7 +230595,7 @@ void m68008_device::asl_ais_df8() // e1d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -230634,12 +230631,12 @@ void m68008_device::asl_ais_df8() // e1d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230722,7 +230719,7 @@ void m68008_device::asl_aips_df8() // e1d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -230756,12 +230753,12 @@ void m68008_device::asl_aips_df8() // e1d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230846,7 +230843,7 @@ void m68008_device::asl_pais_df8() // e1e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -230880,12 +230877,12 @@ void m68008_device::asl_pais_df8() // e1e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230994,7 +230991,7 @@ void m68008_device::asl_das_df8() // e1e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -231030,12 +231027,12 @@ void m68008_device::asl_das_df8() // e1e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231110,7 +231107,7 @@ void m68008_device::asl_dais_df8() // e1f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -231192,7 +231189,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -231228,12 +231225,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231343,7 +231340,7 @@ void m68008_device::asl_adr16_df8() // e1f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231377,12 +231374,12 @@ void m68008_device::asl_adr16_df8() // e1f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231523,7 +231520,7 @@ void m68008_device::asl_adr32_df8() // e1f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231557,12 +231554,12 @@ void m68008_device::asl_adr32_df8() // e1f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231639,7 +231636,7 @@ void m68008_device::lsr_ais_df8() // e2d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -231675,12 +231672,12 @@ void m68008_device::lsr_ais_df8() // e2d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231763,7 +231760,7 @@ void m68008_device::lsr_aips_df8() // e2d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231797,12 +231794,12 @@ void m68008_device::lsr_aips_df8() // e2d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231887,7 +231884,7 @@ void m68008_device::lsr_pais_df8() // e2e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231921,12 +231918,12 @@ void m68008_device::lsr_pais_df8() // e2e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232035,7 +232032,7 @@ void m68008_device::lsr_das_df8() // e2e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -232071,12 +232068,12 @@ void m68008_device::lsr_das_df8() // e2e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232151,7 +232148,7 @@ void m68008_device::lsr_dais_df8() // e2f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -232233,7 +232230,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -232269,12 +232266,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232384,7 +232381,7 @@ void m68008_device::lsr_adr16_df8() // e2f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -232418,12 +232415,12 @@ void m68008_device::lsr_adr16_df8() // e2f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232564,7 +232561,7 @@ void m68008_device::lsr_adr32_df8() // e2f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -232598,12 +232595,12 @@ void m68008_device::lsr_adr32_df8() // e2f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232680,11 +232677,11 @@ void m68008_device::lsl_ais_df8() // e3d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -232717,12 +232714,12 @@ void m68008_device::lsl_ais_df8() // e3d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232759,7 +232756,7 @@ void m68008_device::lsl_ais_df8() // e3d0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -232803,12 +232800,12 @@ void m68008_device::lsl_aips_df8() // e3d8 fff8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -232842,12 +232839,12 @@ void m68008_device::lsl_aips_df8() // e3d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232884,7 +232881,7 @@ void m68008_device::lsl_aips_df8() // e3d8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -232927,7 +232924,7 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -232935,7 +232932,7 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -232969,12 +232966,12 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233011,7 +233008,7 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233052,7 +233049,7 @@ void m68008_device::lsl_das_df8() // e3e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -233085,11 +233082,11 @@ void m68008_device::lsl_das_df8() // e3e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -233122,12 +233119,12 @@ void m68008_device::lsl_das_df8() // e3e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233164,7 +233161,7 @@ void m68008_device::lsl_das_df8() // e3e8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233203,14 +233200,14 @@ void m68008_device::lsl_dais_df8() // e3f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -233218,7 +233215,7 @@ void m68008_device::lsl_dais_df8() // e3f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -233252,7 +233249,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -233288,11 +233285,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -233325,12 +233322,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233367,7 +233364,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233410,7 +233407,7 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -233443,7 +233440,7 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -233477,12 +233474,12 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233519,7 +233516,7 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233560,7 +233557,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; m_icount -= 4; @@ -233594,7 +233591,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -233627,7 +233624,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -233661,12 +233658,12 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233703,7 +233700,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233744,7 +233741,7 @@ void m68008_device::roxr_ais_df8() // e4d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -233780,12 +233777,12 @@ void m68008_device::roxr_ais_df8() // e4d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233868,7 +233865,7 @@ void m68008_device::roxr_aips_df8() // e4d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -233902,12 +233899,12 @@ void m68008_device::roxr_aips_df8() // e4d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233992,7 +233989,7 @@ void m68008_device::roxr_pais_df8() // e4e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -234026,12 +234023,12 @@ void m68008_device::roxr_pais_df8() // e4e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234140,7 +234137,7 @@ void m68008_device::roxr_das_df8() // e4e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -234176,12 +234173,12 @@ void m68008_device::roxr_das_df8() // e4e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234256,7 +234253,7 @@ void m68008_device::roxr_dais_df8() // e4f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -234338,7 +234335,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -234374,12 +234371,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234489,7 +234486,7 @@ void m68008_device::roxr_adr16_df8() // e4f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -234523,12 +234520,12 @@ void m68008_device::roxr_adr16_df8() // e4f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234669,7 +234666,7 @@ void m68008_device::roxr_adr32_df8() // e4f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -234703,12 +234700,12 @@ void m68008_device::roxr_adr32_df8() // e4f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234785,7 +234782,7 @@ void m68008_device::roxl_ais_df8() // e5d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -234821,12 +234818,12 @@ void m68008_device::roxl_ais_df8() // e5d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234909,7 +234906,7 @@ void m68008_device::roxl_aips_df8() // e5d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -234943,12 +234940,12 @@ void m68008_device::roxl_aips_df8() // e5d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235033,7 +235030,7 @@ void m68008_device::roxl_pais_df8() // e5e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -235067,12 +235064,12 @@ void m68008_device::roxl_pais_df8() // e5e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235181,7 +235178,7 @@ void m68008_device::roxl_das_df8() // e5e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -235217,12 +235214,12 @@ void m68008_device::roxl_das_df8() // e5e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235297,7 +235294,7 @@ void m68008_device::roxl_dais_df8() // e5f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -235379,7 +235376,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -235415,12 +235412,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235530,7 +235527,7 @@ void m68008_device::roxl_adr16_df8() // e5f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -235564,12 +235561,12 @@ void m68008_device::roxl_adr16_df8() // e5f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235710,7 +235707,7 @@ void m68008_device::roxl_adr32_df8() // e5f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -235744,12 +235741,12 @@ void m68008_device::roxl_adr32_df8() // e5f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235826,7 +235823,7 @@ void m68008_device::ror_ais_df8() // e6d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -235862,12 +235859,12 @@ void m68008_device::ror_ais_df8() // e6d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235950,7 +235947,7 @@ void m68008_device::ror_aips_df8() // e6d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -235984,12 +235981,12 @@ void m68008_device::ror_aips_df8() // e6d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236074,7 +236071,7 @@ void m68008_device::ror_pais_df8() // e6e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -236108,12 +236105,12 @@ void m68008_device::ror_pais_df8() // e6e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236222,7 +236219,7 @@ void m68008_device::ror_das_df8() // e6e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -236258,12 +236255,12 @@ void m68008_device::ror_das_df8() // e6e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236338,7 +236335,7 @@ void m68008_device::ror_dais_df8() // e6f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -236420,7 +236417,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -236456,12 +236453,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236571,7 +236568,7 @@ void m68008_device::ror_adr16_df8() // e6f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -236605,12 +236602,12 @@ void m68008_device::ror_adr16_df8() // e6f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236751,7 +236748,7 @@ void m68008_device::ror_adr32_df8() // e6f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -236785,12 +236782,12 @@ void m68008_device::ror_adr32_df8() // e6f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236867,7 +236864,7 @@ void m68008_device::rol_ais_df8() // e7d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -236903,12 +236900,12 @@ void m68008_device::rol_ais_df8() // e7d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236991,7 +236988,7 @@ void m68008_device::rol_aips_df8() // e7d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237025,12 +237022,12 @@ void m68008_device::rol_aips_df8() // e7d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237115,7 +237112,7 @@ void m68008_device::rol_pais_df8() // e7e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237149,12 +237146,12 @@ void m68008_device::rol_pais_df8() // e7e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237263,7 +237260,7 @@ void m68008_device::rol_das_df8() // e7e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -237299,12 +237296,12 @@ void m68008_device::rol_das_df8() // e7e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237379,7 +237376,7 @@ void m68008_device::rol_dais_df8() // e7f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -237461,7 +237458,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -237497,12 +237494,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237612,7 +237609,7 @@ void m68008_device::rol_adr16_df8() // e7f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237646,12 +237643,12 @@ void m68008_device::rol_adr16_df8() // e7f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237792,7 +237789,7 @@ void m68008_device::rol_adr32_df8() // e7f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237826,12 +237823,12 @@ void m68008_device::rol_adr32_df8() // e7f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; diff --git a/src/devices/cpu/m68000/m68008-sdp8.cpp b/src/devices/cpu/m68000/m68008-sdp8.cpp index f0f640d6385..0e2a6dc7706 100644 --- a/src/devices/cpu/m68000/m68008-sdp8.cpp +++ b/src/devices/cpu/m68000/m68008-sdp8.cpp @@ -281,7 +281,7 @@ void m68008_device::state_bus_error_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -291,7 +291,7 @@ void m68008_device::state_bus_error_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 1: @@ -329,7 +329,7 @@ void m68008_device::state_bus_error_dp8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 5: @@ -366,7 +366,7 @@ void m68008_device::state_bus_error_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 9: @@ -407,7 +407,7 @@ void m68008_device::state_bus_error_dp8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 13: @@ -444,7 +444,7 @@ void m68008_device::state_bus_error_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 17: @@ -484,7 +484,7 @@ void m68008_device::state_bus_error_dp8() m_da[16] = m_au; m_ftu = 0x0008; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 21: @@ -522,7 +522,7 @@ void m68008_device::state_bus_error_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 25: @@ -729,7 +729,7 @@ void m68008_device::state_address_error_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -739,7 +739,7 @@ void m68008_device::state_address_error_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 1: @@ -777,7 +777,7 @@ void m68008_device::state_address_error_dp8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 5: @@ -814,7 +814,7 @@ void m68008_device::state_address_error_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 9: @@ -855,7 +855,7 @@ void m68008_device::state_address_error_dp8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 13: @@ -892,7 +892,7 @@ void m68008_device::state_address_error_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 17: @@ -932,7 +932,7 @@ void m68008_device::state_address_error_dp8() m_da[16] = m_au; m_ftu = 0x000c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 21: @@ -970,7 +970,7 @@ void m68008_device::state_address_error_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 25: @@ -1187,7 +1187,7 @@ void m68008_device::state_interrupt_dp8() m_pc = m_au; m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I); update_interrupt(); - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_icount -= 2; // 235 itlx3 @@ -1199,7 +1199,7 @@ void m68008_device::state_interrupt_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -1267,7 +1267,7 @@ void m68008_device::state_interrupt_dp8() m_da[16] = m_au; m_ftu = m_int_vector; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 7: @@ -1305,7 +1305,7 @@ void m68008_device::state_interrupt_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 11: @@ -1510,7 +1510,7 @@ void m68008_device::state_trace_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1520,7 +1520,7 @@ void m68008_device::state_trace_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -1560,7 +1560,7 @@ void m68008_device::state_trace_dp8() m_da[16] = m_au; m_ftu = 0x0024; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -1598,7 +1598,7 @@ void m68008_device::state_trace_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -1803,7 +1803,7 @@ void m68008_device::state_illegal_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1813,7 +1813,7 @@ void m68008_device::state_illegal_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -1853,7 +1853,7 @@ void m68008_device::state_illegal_dp8() m_da[16] = m_au; m_ftu = 0x0010; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -1891,7 +1891,7 @@ void m68008_device::state_illegal_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2096,7 +2096,7 @@ void m68008_device::state_priviledge_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2106,7 +2106,7 @@ void m68008_device::state_priviledge_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -2146,7 +2146,7 @@ void m68008_device::state_priviledge_dp8() m_da[16] = m_au; m_ftu = 0x0020; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -2184,7 +2184,7 @@ void m68008_device::state_priviledge_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2389,7 +2389,7 @@ void m68008_device::state_linea_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2399,7 +2399,7 @@ void m68008_device::state_linea_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -2439,7 +2439,7 @@ void m68008_device::state_linea_dp8() m_da[16] = m_au; m_ftu = 0x0028; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -2477,7 +2477,7 @@ void m68008_device::state_linea_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2682,7 +2682,7 @@ void m68008_device::state_linef_dp8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2692,7 +2692,7 @@ void m68008_device::state_linef_dp8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -2732,7 +2732,7 @@ void m68008_device::state_linef_dp8() m_da[16] = m_au; m_ftu = 0x002c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -2770,7 +2770,7 @@ void m68008_device::state_linef_dp8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2972,7 +2972,7 @@ void m68008_device::ori_b_imm8_ds_dp8() // 0000 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3010,7 +3010,7 @@ void m68008_device::ori_b_imm8_ds_dp8() // 0000 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -3018,7 +3018,7 @@ void m68008_device::ori_b_imm8_ds_dp8() // 0000 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3071,7 +3071,7 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3108,11 +3108,11 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -3132,7 +3132,7 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3174,7 +3174,7 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -3207,7 +3207,7 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3247,12 +3247,12 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -3273,7 +3273,7 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3315,7 +3315,7 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -3348,7 +3348,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3387,7 +3387,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -3395,7 +3395,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3458,7 +3458,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -3491,7 +3491,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3528,7 +3528,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3566,11 +3566,11 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -3590,7 +3590,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3632,7 +3632,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -3665,7 +3665,7 @@ void m68008_device::ori_b_imm8_dais_dp8() // 0030 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3700,14 +3700,14 @@ void m68008_device::ori_b_imm8_dais_dp8() // 0030 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -3715,7 +3715,7 @@ void m68008_device::ori_b_imm8_dais_dp8() // 0030 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3754,7 +3754,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3795,11 +3795,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -3819,7 +3819,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3861,7 +3861,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -3893,7 +3893,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -3933,7 +3933,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -3971,7 +3971,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -3992,7 +3992,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4034,7 +4034,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -4066,7 +4066,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4104,7 +4104,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4143,7 +4143,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -4181,7 +4181,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -4202,7 +4202,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4244,7 +4244,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 19: m_program8.write_interruptible(m_aob, m_dbout); @@ -4276,7 +4276,7 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4313,21 +4313,21 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt alu_or8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -4335,7 +4335,7 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4374,11 +4374,11 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4431,7 +4431,7 @@ void m68008_device::ori_w_imm16_ds_dp8() // 0040 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4469,7 +4469,7 @@ void m68008_device::ori_w_imm16_ds_dp8() // 0040 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -4477,7 +4477,7 @@ void m68008_device::ori_w_imm16_ds_dp8() // 0040 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4530,7 +4530,7 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4567,11 +4567,11 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -4609,7 +4609,7 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4651,7 +4651,7 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -4702,7 +4702,7 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4742,12 +4742,12 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -4786,7 +4786,7 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4828,7 +4828,7 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -4879,7 +4879,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -4918,7 +4918,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -4926,7 +4926,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -4965,7 +4965,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5007,7 +5007,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -5058,7 +5058,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5095,7 +5095,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5133,11 +5133,11 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -5175,7 +5175,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5217,7 +5217,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -5268,7 +5268,7 @@ void m68008_device::ori_w_imm16_dais_dp8() // 0070 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5303,14 +5303,14 @@ void m68008_device::ori_w_imm16_dais_dp8() // 0070 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -5318,7 +5318,7 @@ void m68008_device::ori_w_imm16_dais_dp8() // 0070 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5357,7 +5357,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5398,11 +5398,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -5440,7 +5440,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5482,7 +5482,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -5532,7 +5532,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5572,7 +5572,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -5610,7 +5610,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -5649,7 +5649,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5691,7 +5691,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -5741,7 +5741,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5779,7 +5779,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -5818,7 +5818,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -5856,7 +5856,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -5895,7 +5895,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5937,7 +5937,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -5991,7 +5991,7 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6028,23 +6028,23 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt alu_or(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -6052,7 +6052,7 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6091,11 +6091,11 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6147,7 +6147,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6185,7 +6185,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6223,12 +6223,12 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6263,7 +6263,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry] alu_or(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -6272,7 +6272,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -6292,7 +6292,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6330,7 +6330,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6367,7 +6367,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -6407,7 +6407,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -6445,7 +6445,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6485,7 +6485,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6525,7 +6525,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -6575,7 +6575,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6613,7 +6613,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6650,7 +6650,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -6690,11 +6690,11 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -6732,7 +6732,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6772,7 +6772,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6812,7 +6812,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -6862,7 +6862,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6900,7 +6900,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -6936,14 +6936,14 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -6982,7 +6982,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -7020,7 +7020,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7060,7 +7060,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7100,7 +7100,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -7150,7 +7150,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7188,7 +7188,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7225,7 +7225,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7262,7 +7262,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -7302,7 +7302,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -7340,7 +7340,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7380,7 +7380,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7420,7 +7420,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -7470,7 +7470,7 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7508,7 +7508,7 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7543,14 +7543,14 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -7558,7 +7558,7 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7597,7 +7597,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 33: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7637,7 +7637,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -7677,7 +7677,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -7715,7 +7715,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7755,7 +7755,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7795,7 +7795,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -7844,7 +7844,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7882,7 +7882,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -7922,7 +7922,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -7960,7 +7960,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -8000,7 +8000,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -8038,7 +8038,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -8078,7 +8078,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -8118,7 +8118,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -8167,7 +8167,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8205,7 +8205,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8243,7 +8243,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8282,7 +8282,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -8320,7 +8320,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -8360,7 +8360,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 21: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -8398,7 +8398,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -8438,7 +8438,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -8478,7 +8478,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 33: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -8532,13 +8532,13 @@ void m68008_device::btst_dd_ds_dp8() // 0100 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -8582,7 +8582,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8596,7 +8596,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8618,7 +8618,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8 // 1d2 mpiw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8655,7 +8655,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8 // 29a mpiw2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -8674,7 +8674,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 7: m_edb = m_program8.read_interruptible(m_aob); @@ -8696,7 +8696,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8748,11 +8748,11 @@ void m68008_device::btst_dd_ais_dp8() // 0110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -8772,13 +8772,13 @@ void m68008_device::btst_dd_ais_dp8() // 0110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8833,12 +8833,12 @@ void m68008_device::btst_dd_aips_dp8() // 0118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -8859,13 +8859,13 @@ void m68008_device::btst_dd_aips_dp8() // 0118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -8919,7 +8919,7 @@ void m68008_device::btst_dd_pais_dp8() // 0120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -8927,7 +8927,7 @@ void m68008_device::btst_dd_pais_dp8() // 0120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -8948,13 +8948,13 @@ void m68008_device::btst_dd_pais_dp8() // 0120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9006,7 +9006,7 @@ void m68008_device::btst_dd_das_dp8() // 0128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9044,11 +9044,11 @@ void m68008_device::btst_dd_das_dp8() // 0128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -9068,13 +9068,13 @@ void m68008_device::btst_dd_das_dp8() // 0128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9124,14 +9124,14 @@ void m68008_device::btst_dd_dais_dp8() // 0130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -9139,7 +9139,7 @@ void m68008_device::btst_dd_dais_dp8() // 0130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9178,7 +9178,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9219,11 +9219,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -9243,13 +9243,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9303,7 +9303,7 @@ void m68008_device::btst_dd_adr16_dp8() // 0138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -9341,7 +9341,7 @@ void m68008_device::btst_dd_adr16_dp8() // 0138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -9362,13 +9362,13 @@ void m68008_device::btst_dd_adr16_dp8() // 0138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9420,7 +9420,7 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9459,7 +9459,7 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -9497,7 +9497,7 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -9518,13 +9518,13 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9575,7 +9575,7 @@ void m68008_device::btst_dd_dpc_dp8() // 013a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9613,11 +9613,11 @@ void m68008_device::btst_dd_dpc_dp8() // 013a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -9637,13 +9637,13 @@ void m68008_device::btst_dd_dpc_dp8() // 013a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9692,14 +9692,14 @@ void m68008_device::btst_dd_dpci_dp8() // 013b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -9707,7 +9707,7 @@ void m68008_device::btst_dd_dpci_dp8() // 013b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9746,7 +9746,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9787,11 +9787,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -9811,13 +9811,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9871,7 +9871,7 @@ void m68008_device::btst_dd_imm_dp8() // 013c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -9911,12 +9911,12 @@ void m68008_device::btst_dd_imm_dp8() // 013c f1ff m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_dt; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -9960,7 +9960,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -9974,7 +9974,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -10000,13 +10000,13 @@ void m68008_device::bchg_dd_ds_dp8() // 0140 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -10050,7 +10050,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10063,14 +10063,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10092,7 +10092,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8 // 1d6 mpil1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10129,7 +10129,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8 // 29e mpil2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -10147,7 +10147,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8 // 34e mpil3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 7: m_edb = m_program8.read_interruptible(m_aob); @@ -10166,7 +10166,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8 m_aob = m_au; set_16h(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -10185,7 +10185,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 11: m_edb = m_program8.read_interruptible(m_aob); @@ -10207,7 +10207,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10259,11 +10259,11 @@ void m68008_device::bchg_dd_ais_dp8() // 0150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -10284,7 +10284,7 @@ void m68008_device::bchg_dd_ais_dp8() // 0150 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -10324,7 +10324,7 @@ void m68008_device::bchg_dd_ais_dp8() // 0150 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10361,12 +10361,12 @@ void m68008_device::bchg_dd_aips_dp8() // 0158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -10388,7 +10388,7 @@ void m68008_device::bchg_dd_aips_dp8() // 0158 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -10428,7 +10428,7 @@ void m68008_device::bchg_dd_aips_dp8() // 0158 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10464,7 +10464,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -10472,7 +10472,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -10494,7 +10494,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -10534,7 +10534,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10568,7 +10568,7 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10606,11 +10606,11 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -10631,7 +10631,7 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -10671,7 +10671,7 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10703,14 +10703,14 @@ void m68008_device::bchg_dd_dais_dp8() // 0170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -10718,7 +10718,7 @@ void m68008_device::bchg_dd_dais_dp8() // 0170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10757,7 +10757,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -10798,11 +10798,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -10823,7 +10823,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -10863,7 +10863,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10899,7 +10899,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -10937,7 +10937,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -10959,7 +10959,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -10999,7 +10999,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11033,7 +11033,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11072,7 +11072,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -11110,7 +11110,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -11132,7 +11132,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -11172,7 +11172,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11210,13 +11210,13 @@ void m68008_device::bclr_dd_ds_dp8() // 0180 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -11257,14 +11257,14 @@ void m68008_device::bclr_dd_ds_dp8() // 0180 f1f8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -11277,18 +11277,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -11310,7 +11310,7 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8 // 1ca mpow1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11349,7 +11349,7 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: m_program8.write_interruptible(m_aob, m_dbout); @@ -11367,7 +11367,7 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -11386,11 +11386,11 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11442,11 +11442,11 @@ void m68008_device::bclr_dd_ais_dp8() // 0190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -11466,12 +11466,12 @@ void m68008_device::bclr_dd_ais_dp8() // 0190 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -11511,7 +11511,7 @@ void m68008_device::bclr_dd_ais_dp8() // 0190 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11548,12 +11548,12 @@ void m68008_device::bclr_dd_aips_dp8() // 0198 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -11574,12 +11574,12 @@ void m68008_device::bclr_dd_aips_dp8() // 0198 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -11619,7 +11619,7 @@ void m68008_device::bclr_dd_aips_dp8() // 0198 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11655,7 +11655,7 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -11663,7 +11663,7 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -11684,12 +11684,12 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -11729,7 +11729,7 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11763,7 +11763,7 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11801,11 +11801,11 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -11825,12 +11825,12 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -11870,7 +11870,7 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11902,14 +11902,14 @@ void m68008_device::bclr_dd_dais_dp8() // 01b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -11917,7 +11917,7 @@ void m68008_device::bclr_dd_dais_dp8() // 01b0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11956,7 +11956,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -11997,11 +11997,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -12021,12 +12021,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -12066,7 +12066,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12102,7 +12102,7 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -12140,7 +12140,7 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -12161,12 +12161,12 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -12206,7 +12206,7 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12240,7 +12240,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -12279,7 +12279,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -12317,7 +12317,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -12338,12 +12338,12 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -12383,7 +12383,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12421,13 +12421,13 @@ void m68008_device::bset_dd_ds_dp8() // 01c0 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -12471,7 +12471,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -12484,14 +12484,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -12513,7 +12513,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8 // 1ce mpol1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -12551,7 +12551,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8 m_aob = m_au; set_8xh(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: m_program8.write_interruptible(m_aob, m_dbout); @@ -12569,7 +12569,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -12588,7 +12588,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob, m_dbout); @@ -12606,7 +12606,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -12625,11 +12625,11 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -12681,11 +12681,11 @@ void m68008_device::bset_dd_ais_dp8() // 01d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -12706,7 +12706,7 @@ void m68008_device::bset_dd_ais_dp8() // 01d0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -12746,7 +12746,7 @@ void m68008_device::bset_dd_ais_dp8() // 01d0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12783,12 +12783,12 @@ void m68008_device::bset_dd_aips_dp8() // 01d8 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -12810,7 +12810,7 @@ void m68008_device::bset_dd_aips_dp8() // 01d8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -12850,7 +12850,7 @@ void m68008_device::bset_dd_aips_dp8() // 01d8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12886,7 +12886,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -12894,7 +12894,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -12916,7 +12916,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -12956,7 +12956,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12990,7 +12990,7 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13028,11 +13028,11 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -13053,7 +13053,7 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -13093,7 +13093,7 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13125,14 +13125,14 @@ void m68008_device::bset_dd_dais_dp8() // 01f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -13140,7 +13140,7 @@ void m68008_device::bset_dd_dais_dp8() // 01f0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13179,7 +13179,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13220,11 +13220,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -13245,7 +13245,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -13285,7 +13285,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13321,7 +13321,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -13359,7 +13359,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -13381,7 +13381,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -13421,7 +13421,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13455,7 +13455,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13494,7 +13494,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -13532,7 +13532,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -13554,7 +13554,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -13594,7 +13594,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13629,7 +13629,7 @@ void m68008_device::andi_b_imm8_ds_dp8() // 0200 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13667,7 +13667,7 @@ void m68008_device::andi_b_imm8_ds_dp8() // 0200 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -13675,7 +13675,7 @@ void m68008_device::andi_b_imm8_ds_dp8() // 0200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13728,7 +13728,7 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13765,11 +13765,11 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -13789,7 +13789,7 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13831,7 +13831,7 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -13864,7 +13864,7 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -13904,12 +13904,12 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -13930,7 +13930,7 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13972,7 +13972,7 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -14005,7 +14005,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14044,7 +14044,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -14052,7 +14052,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -14073,7 +14073,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14115,7 +14115,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -14148,7 +14148,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14185,7 +14185,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14223,11 +14223,11 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -14247,7 +14247,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14289,7 +14289,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -14322,7 +14322,7 @@ void m68008_device::andi_b_imm8_dais_dp8() // 0230 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14357,14 +14357,14 @@ void m68008_device::andi_b_imm8_dais_dp8() // 0230 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -14372,7 +14372,7 @@ void m68008_device::andi_b_imm8_dais_dp8() // 0230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14411,7 +14411,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14452,11 +14452,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -14476,7 +14476,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14518,7 +14518,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -14550,7 +14550,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14590,7 +14590,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -14628,7 +14628,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -14649,7 +14649,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14691,7 +14691,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -14723,7 +14723,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14761,7 +14761,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14800,7 +14800,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -14838,7 +14838,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -14859,7 +14859,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14901,7 +14901,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 19: m_program8.write_interruptible(m_aob, m_dbout); @@ -14933,7 +14933,7 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -14970,21 +14970,21 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt alu_and8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -14992,7 +14992,7 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15031,11 +15031,11 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15088,7 +15088,7 @@ void m68008_device::andi_w_imm16_ds_dp8() // 0240 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15126,7 +15126,7 @@ void m68008_device::andi_w_imm16_ds_dp8() // 0240 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -15134,7 +15134,7 @@ void m68008_device::andi_w_imm16_ds_dp8() // 0240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15187,7 +15187,7 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15224,11 +15224,11 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -15266,7 +15266,7 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15308,7 +15308,7 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -15359,7 +15359,7 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15399,12 +15399,12 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -15443,7 +15443,7 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15485,7 +15485,7 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -15536,7 +15536,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15575,7 +15575,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -15583,7 +15583,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -15622,7 +15622,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15664,7 +15664,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -15715,7 +15715,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15752,7 +15752,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15790,11 +15790,11 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -15832,7 +15832,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15874,7 +15874,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -15925,7 +15925,7 @@ void m68008_device::andi_w_imm16_dais_dp8() // 0270 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -15960,14 +15960,14 @@ void m68008_device::andi_w_imm16_dais_dp8() // 0270 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -15975,7 +15975,7 @@ void m68008_device::andi_w_imm16_dais_dp8() // 0270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16014,7 +16014,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16055,11 +16055,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -16097,7 +16097,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16139,7 +16139,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -16189,7 +16189,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16229,7 +16229,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -16267,7 +16267,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -16306,7 +16306,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16348,7 +16348,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -16398,7 +16398,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16436,7 +16436,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16475,7 +16475,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -16513,7 +16513,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -16552,7 +16552,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16594,7 +16594,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -16648,7 +16648,7 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16685,23 +16685,23 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt alu_and(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -16709,7 +16709,7 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16748,11 +16748,11 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16804,7 +16804,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16842,7 +16842,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16880,12 +16880,12 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16920,7 +16920,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry] alu_and(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -16929,7 +16929,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -16949,7 +16949,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -16987,7 +16987,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17024,7 +17024,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -17064,7 +17064,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -17102,7 +17102,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17142,7 +17142,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -17182,7 +17182,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -17232,7 +17232,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17270,7 +17270,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17307,7 +17307,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -17347,11 +17347,11 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -17389,7 +17389,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17429,7 +17429,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -17469,7 +17469,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -17519,7 +17519,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17557,7 +17557,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17593,14 +17593,14 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -17639,7 +17639,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -17677,7 +17677,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17717,7 +17717,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -17757,7 +17757,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -17807,7 +17807,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17845,7 +17845,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17882,7 +17882,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -17919,7 +17919,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -17959,7 +17959,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -17997,7 +17997,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18037,7 +18037,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -18077,7 +18077,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -18127,7 +18127,7 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18165,7 +18165,7 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18200,14 +18200,14 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -18215,7 +18215,7 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18254,7 +18254,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 33: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18294,7 +18294,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -18334,7 +18334,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -18372,7 +18372,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18412,7 +18412,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -18452,7 +18452,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -18501,7 +18501,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18539,7 +18539,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18579,7 +18579,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -18617,7 +18617,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -18657,7 +18657,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -18695,7 +18695,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18735,7 +18735,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -18775,7 +18775,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -18824,7 +18824,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18862,7 +18862,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18900,7 +18900,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -18939,7 +18939,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -18977,7 +18977,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -19017,7 +19017,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 21: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -19055,7 +19055,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19095,7 +19095,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -19135,7 +19135,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 33: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -19223,7 +19223,7 @@ void m68008_device::subi_b_imm8_ds_dp8() // 0400 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -19319,7 +19319,7 @@ void m68008_device::subi_b_imm8_ais_dp8() // 0410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -19342,7 +19342,7 @@ void m68008_device::subi_b_imm8_ais_dp8() // 0410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19458,7 +19458,7 @@ void m68008_device::subi_b_imm8_aips_dp8() // 0418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -19479,7 +19479,7 @@ void m68008_device::subi_b_imm8_aips_dp8() // 0418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19597,7 +19597,7 @@ void m68008_device::subi_b_imm8_pais_dp8() // 0420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -19618,7 +19618,7 @@ void m68008_device::subi_b_imm8_pais_dp8() // 0420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19765,7 +19765,7 @@ void m68008_device::subi_b_imm8_das_dp8() // 0428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -19788,7 +19788,7 @@ void m68008_device::subi_b_imm8_das_dp8() // 0428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19896,7 +19896,7 @@ void m68008_device::subi_b_imm8_dais_dp8() // 0430 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -19988,7 +19988,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -20011,7 +20011,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20159,7 +20159,7 @@ void m68008_device::subi_b_imm8_adr16_dp8() // 0438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -20180,7 +20180,7 @@ void m68008_device::subi_b_imm8_adr16_dp8() // 0438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20364,7 +20364,7 @@ void m68008_device::subi_b_imm8_adr32_dp8() // 0439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -20385,7 +20385,7 @@ void m68008_device::subi_b_imm8_adr32_dp8() // 0439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20496,7 +20496,7 @@ void m68008_device::subi_w_imm16_ds_dp8() // 0440 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -20592,7 +20592,7 @@ void m68008_device::subi_w_imm16_ais_dp8() // 0450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -20633,7 +20633,7 @@ void m68008_device::subi_w_imm16_ais_dp8() // 0450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20767,7 +20767,7 @@ void m68008_device::subi_w_imm16_aips_dp8() // 0458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -20806,7 +20806,7 @@ void m68008_device::subi_w_imm16_aips_dp8() // 0458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20942,7 +20942,7 @@ void m68008_device::subi_w_imm16_pais_dp8() // 0460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -20981,7 +20981,7 @@ void m68008_device::subi_w_imm16_pais_dp8() // 0460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21146,7 +21146,7 @@ void m68008_device::subi_w_imm16_das_dp8() // 0468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21187,7 +21187,7 @@ void m68008_device::subi_w_imm16_das_dp8() // 0468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21313,7 +21313,7 @@ void m68008_device::subi_w_imm16_dais_dp8() // 0470 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -21405,7 +21405,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21446,7 +21446,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21612,7 +21612,7 @@ void m68008_device::subi_w_imm16_adr16_dp8() // 0478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -21651,7 +21651,7 @@ void m68008_device::subi_w_imm16_adr16_dp8() // 0478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21853,7 +21853,7 @@ void m68008_device::subi_w_imm16_adr32_dp8() // 0479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -21892,7 +21892,7 @@ void m68008_device::subi_w_imm16_adr32_dp8() // 0479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22057,7 +22057,7 @@ void m68008_device::subi_l_imm32_ds_dp8() // 0480 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -22096,7 +22096,7 @@ void m68008_device::subi_l_imm32_ds_dp8() // 0480 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -22197,7 +22197,7 @@ void m68008_device::subi_l_imm32_ais_dp8() // 0490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -22274,7 +22274,7 @@ void m68008_device::subi_l_imm32_ais_dp8() // 0490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22314,7 +22314,7 @@ void m68008_device::subi_l_imm32_ais_dp8() // 0490 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -22476,7 +22476,7 @@ void m68008_device::subi_l_imm32_aips_dp8() // 0498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -22556,7 +22556,7 @@ void m68008_device::subi_l_imm32_aips_dp8() // 0498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22596,7 +22596,7 @@ void m68008_device::subi_l_imm32_aips_dp8() // 0498 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -22757,7 +22757,7 @@ void m68008_device::subi_l_imm32_pais_dp8() // 04a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -22839,7 +22839,7 @@ void m68008_device::subi_l_imm32_pais_dp8() // 04a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22879,7 +22879,7 @@ void m68008_device::subi_l_imm32_pais_dp8() // 04a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23077,7 +23077,7 @@ void m68008_device::subi_l_imm32_das_dp8() // 04a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -23154,7 +23154,7 @@ void m68008_device::subi_l_imm32_das_dp8() // 04a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23194,7 +23194,7 @@ void m68008_device::subi_l_imm32_das_dp8() // 04a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23354,7 +23354,7 @@ void m68008_device::subi_l_imm32_dais_dp8() // 04b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -23445,7 +23445,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -23522,7 +23522,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23562,7 +23562,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23762,7 +23762,7 @@ void m68008_device::subi_l_imm32_adr16_dp8() // 04b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -23839,7 +23839,7 @@ void m68008_device::subi_l_imm32_adr16_dp8() // 04b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23879,7 +23879,7 @@ void m68008_device::subi_l_imm32_adr16_dp8() // 04b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24115,7 +24115,7 @@ void m68008_device::subi_l_imm32_adr32_dp8() // 04b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -24192,7 +24192,7 @@ void m68008_device::subi_l_imm32_adr32_dp8() // 04b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24232,7 +24232,7 @@ void m68008_device::subi_l_imm32_adr32_dp8() // 04b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24359,7 +24359,7 @@ void m68008_device::addi_b_imm8_ds_dp8() // 0600 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -24455,7 +24455,7 @@ void m68008_device::addi_b_imm8_ais_dp8() // 0610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -24478,7 +24478,7 @@ void m68008_device::addi_b_imm8_ais_dp8() // 0610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24594,7 +24594,7 @@ void m68008_device::addi_b_imm8_aips_dp8() // 0618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -24615,7 +24615,7 @@ void m68008_device::addi_b_imm8_aips_dp8() // 0618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24733,7 +24733,7 @@ void m68008_device::addi_b_imm8_pais_dp8() // 0620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -24754,7 +24754,7 @@ void m68008_device::addi_b_imm8_pais_dp8() // 0620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24901,7 +24901,7 @@ void m68008_device::addi_b_imm8_das_dp8() // 0628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -24924,7 +24924,7 @@ void m68008_device::addi_b_imm8_das_dp8() // 0628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25032,7 +25032,7 @@ void m68008_device::addi_b_imm8_dais_dp8() // 0630 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -25124,7 +25124,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -25147,7 +25147,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25295,7 +25295,7 @@ void m68008_device::addi_b_imm8_adr16_dp8() // 0638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -25316,7 +25316,7 @@ void m68008_device::addi_b_imm8_adr16_dp8() // 0638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25500,7 +25500,7 @@ void m68008_device::addi_b_imm8_adr32_dp8() // 0639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -25521,7 +25521,7 @@ void m68008_device::addi_b_imm8_adr32_dp8() // 0639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25632,7 +25632,7 @@ void m68008_device::addi_w_imm16_ds_dp8() // 0640 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -25728,7 +25728,7 @@ void m68008_device::addi_w_imm16_ais_dp8() // 0650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -25769,7 +25769,7 @@ void m68008_device::addi_w_imm16_ais_dp8() // 0650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25903,7 +25903,7 @@ void m68008_device::addi_w_imm16_aips_dp8() // 0658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -25942,7 +25942,7 @@ void m68008_device::addi_w_imm16_aips_dp8() // 0658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26078,7 +26078,7 @@ void m68008_device::addi_w_imm16_pais_dp8() // 0660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -26117,7 +26117,7 @@ void m68008_device::addi_w_imm16_pais_dp8() // 0660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26282,7 +26282,7 @@ void m68008_device::addi_w_imm16_das_dp8() // 0668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -26323,7 +26323,7 @@ void m68008_device::addi_w_imm16_das_dp8() // 0668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26449,7 +26449,7 @@ void m68008_device::addi_w_imm16_dais_dp8() // 0670 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -26541,7 +26541,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -26582,7 +26582,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26748,7 +26748,7 @@ void m68008_device::addi_w_imm16_adr16_dp8() // 0678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -26787,7 +26787,7 @@ void m68008_device::addi_w_imm16_adr16_dp8() // 0678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26989,7 +26989,7 @@ void m68008_device::addi_w_imm16_adr32_dp8() // 0679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -27028,7 +27028,7 @@ void m68008_device::addi_w_imm16_adr32_dp8() // 0679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -27193,7 +27193,7 @@ void m68008_device::addi_l_imm32_ds_dp8() // 0680 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -27232,7 +27232,7 @@ void m68008_device::addi_l_imm32_ds_dp8() // 0680 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -27333,7 +27333,7 @@ void m68008_device::addi_l_imm32_ais_dp8() // 0690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -27410,7 +27410,7 @@ void m68008_device::addi_l_imm32_ais_dp8() // 0690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -27450,7 +27450,7 @@ void m68008_device::addi_l_imm32_ais_dp8() // 0690 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -27612,7 +27612,7 @@ void m68008_device::addi_l_imm32_aips_dp8() // 0698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -27692,7 +27692,7 @@ void m68008_device::addi_l_imm32_aips_dp8() // 0698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -27732,7 +27732,7 @@ void m68008_device::addi_l_imm32_aips_dp8() // 0698 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -27893,7 +27893,7 @@ void m68008_device::addi_l_imm32_pais_dp8() // 06a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -27975,7 +27975,7 @@ void m68008_device::addi_l_imm32_pais_dp8() // 06a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -28015,7 +28015,7 @@ void m68008_device::addi_l_imm32_pais_dp8() // 06a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -28213,7 +28213,7 @@ void m68008_device::addi_l_imm32_das_dp8() // 06a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -28290,7 +28290,7 @@ void m68008_device::addi_l_imm32_das_dp8() // 06a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -28330,7 +28330,7 @@ void m68008_device::addi_l_imm32_das_dp8() // 06a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -28490,7 +28490,7 @@ void m68008_device::addi_l_imm32_dais_dp8() // 06b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -28581,7 +28581,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -28658,7 +28658,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -28698,7 +28698,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -28898,7 +28898,7 @@ void m68008_device::addi_l_imm32_adr16_dp8() // 06b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -28975,7 +28975,7 @@ void m68008_device::addi_l_imm32_adr16_dp8() // 06b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -29015,7 +29015,7 @@ void m68008_device::addi_l_imm32_adr16_dp8() // 06b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -29251,7 +29251,7 @@ void m68008_device::addi_l_imm32_adr32_dp8() // 06b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -29328,7 +29328,7 @@ void m68008_device::addi_l_imm32_adr32_dp8() // 06b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -29368,7 +29368,7 @@ void m68008_device::addi_l_imm32_adr32_dp8() // 06b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -29458,7 +29458,7 @@ void m68008_device::btst_imm8_ds_dp8() // 0800 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29499,13 +29499,13 @@ void m68008_device::btst_imm8_ds_dp8() // 0800 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -29549,7 +29549,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29563,7 +29563,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29586,7 +29586,7 @@ void m68008_device::btst_imm8_ais_dp8() // 0810 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29623,11 +29623,11 @@ void m68008_device::btst_imm8_ais_dp8() // 0810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -29647,13 +29647,13 @@ void m68008_device::btst_imm8_ais_dp8() // 0810 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29706,7 +29706,7 @@ void m68008_device::btst_imm8_aips_dp8() // 0818 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29746,12 +29746,12 @@ void m68008_device::btst_imm8_aips_dp8() // 0818 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -29772,13 +29772,13 @@ void m68008_device::btst_imm8_aips_dp8() // 0818 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29831,7 +29831,7 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29870,7 +29870,7 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -29878,7 +29878,7 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -29899,13 +29899,13 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29958,7 +29958,7 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -29995,7 +29995,7 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30033,11 +30033,11 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -30057,13 +30057,13 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30116,7 +30116,7 @@ void m68008_device::btst_imm8_dais_dp8() // 0830 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30151,14 +30151,14 @@ void m68008_device::btst_imm8_dais_dp8() // 0830 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -30166,7 +30166,7 @@ void m68008_device::btst_imm8_dais_dp8() // 0830 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30205,7 +30205,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30246,11 +30246,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -30270,13 +30270,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30328,7 +30328,7 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30368,7 +30368,7 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -30406,7 +30406,7 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -30427,13 +30427,13 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30485,7 +30485,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30523,7 +30523,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30562,7 +30562,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -30600,7 +30600,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -30621,13 +30621,13 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30679,7 +30679,7 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30716,7 +30716,7 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30754,11 +30754,11 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -30778,13 +30778,13 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30836,7 +30836,7 @@ void m68008_device::btst_imm8_dpci_dp8() // 083b ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30871,14 +30871,14 @@ void m68008_device::btst_imm8_dpci_dp8() // 083b ffff m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -30886,7 +30886,7 @@ void m68008_device::btst_imm8_dpci_dp8() // 083b ffff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30925,7 +30925,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -30966,11 +30966,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -30990,13 +30990,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31049,7 +31049,7 @@ void m68008_device::bchg_imm8_ds_dp8() // 0840 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31090,13 +31090,13 @@ void m68008_device::bchg_imm8_ds_dp8() // 0840 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -31140,7 +31140,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -31153,14 +31153,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -31183,7 +31183,7 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31220,11 +31220,11 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -31245,7 +31245,7 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -31285,7 +31285,7 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31320,7 +31320,7 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31360,12 +31360,12 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -31387,7 +31387,7 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -31427,7 +31427,7 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31462,7 +31462,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31501,7 +31501,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -31509,7 +31509,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -31531,7 +31531,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -31571,7 +31571,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31606,7 +31606,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31643,7 +31643,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31681,11 +31681,11 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -31706,7 +31706,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -31746,7 +31746,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31781,7 +31781,7 @@ void m68008_device::bchg_imm8_dais_dp8() // 0870 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31816,14 +31816,14 @@ void m68008_device::bchg_imm8_dais_dp8() // 0870 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -31831,7 +31831,7 @@ void m68008_device::bchg_imm8_dais_dp8() // 0870 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31870,7 +31870,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -31911,11 +31911,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -31936,7 +31936,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -31976,7 +31976,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32010,7 +32010,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32050,7 +32050,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -32088,7 +32088,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -32110,7 +32110,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -32150,7 +32150,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32184,7 +32184,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32222,7 +32222,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32261,7 +32261,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -32299,7 +32299,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -32321,7 +32321,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: @@ -32361,7 +32361,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32396,7 +32396,7 @@ void m68008_device::bclr_imm8_ds_dp8() // 0880 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32437,13 +32437,13 @@ void m68008_device::bclr_imm8_ds_dp8() // 0880 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -32484,14 +32484,14 @@ void m68008_device::bclr_imm8_ds_dp8() // 0880 fff8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -32504,18 +32504,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -32538,7 +32538,7 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32575,11 +32575,11 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -32599,12 +32599,12 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -32644,7 +32644,7 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32679,7 +32679,7 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32719,12 +32719,12 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -32745,12 +32745,12 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -32790,7 +32790,7 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32825,7 +32825,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -32864,7 +32864,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -32872,7 +32872,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -32893,12 +32893,12 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -32938,7 +32938,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32973,7 +32973,7 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33010,7 +33010,7 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33048,11 +33048,11 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -33072,12 +33072,12 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -33117,7 +33117,7 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33152,7 +33152,7 @@ void m68008_device::bclr_imm8_dais_dp8() // 08b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33187,14 +33187,14 @@ void m68008_device::bclr_imm8_dais_dp8() // 08b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -33202,7 +33202,7 @@ void m68008_device::bclr_imm8_dais_dp8() // 08b0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33241,7 +33241,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33282,11 +33282,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -33306,12 +33306,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -33351,7 +33351,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33385,7 +33385,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33425,7 +33425,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -33463,7 +33463,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -33484,12 +33484,12 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -33529,7 +33529,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33563,7 +33563,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33601,7 +33601,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33640,7 +33640,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -33678,7 +33678,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -33699,12 +33699,12 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: @@ -33744,7 +33744,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33779,7 +33779,7 @@ void m68008_device::bset_imm8_ds_dp8() // 08c0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33820,13 +33820,13 @@ void m68008_device::bset_imm8_ds_dp8() // 08c0 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -33870,7 +33870,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -33883,14 +33883,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -33913,7 +33913,7 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -33950,11 +33950,11 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -33975,7 +33975,7 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -34015,7 +34015,7 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34050,7 +34050,7 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34090,12 +34090,12 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -34117,7 +34117,7 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -34157,7 +34157,7 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34192,7 +34192,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34231,7 +34231,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -34239,7 +34239,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -34261,7 +34261,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -34301,7 +34301,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34336,7 +34336,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34373,7 +34373,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34411,11 +34411,11 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -34436,7 +34436,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -34476,7 +34476,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34511,7 +34511,7 @@ void m68008_device::bset_imm8_dais_dp8() // 08f0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34546,14 +34546,14 @@ void m68008_device::bset_imm8_dais_dp8() // 08f0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -34561,7 +34561,7 @@ void m68008_device::bset_imm8_dais_dp8() // 08f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34600,7 +34600,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34641,11 +34641,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -34666,7 +34666,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -34706,7 +34706,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34740,7 +34740,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34780,7 +34780,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -34818,7 +34818,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -34840,7 +34840,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -34880,7 +34880,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34914,7 +34914,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34952,7 +34952,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -34991,7 +34991,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -35029,7 +35029,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -35051,7 +35051,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: @@ -35091,7 +35091,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -35126,7 +35126,7 @@ void m68008_device::eori_b_imm8_ds_dp8() // 0a00 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35164,7 +35164,7 @@ void m68008_device::eori_b_imm8_ds_dp8() // 0a00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -35172,7 +35172,7 @@ void m68008_device::eori_b_imm8_ds_dp8() // 0a00 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35225,7 +35225,7 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35262,11 +35262,11 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -35286,7 +35286,7 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35328,7 +35328,7 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -35361,7 +35361,7 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35401,12 +35401,12 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -35427,7 +35427,7 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35469,7 +35469,7 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -35502,7 +35502,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35541,7 +35541,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -35549,7 +35549,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -35570,7 +35570,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35612,7 +35612,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -35645,7 +35645,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35682,7 +35682,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35720,11 +35720,11 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -35744,7 +35744,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35786,7 +35786,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -35819,7 +35819,7 @@ void m68008_device::eori_b_imm8_dais_dp8() // 0a30 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35854,14 +35854,14 @@ void m68008_device::eori_b_imm8_dais_dp8() // 0a30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -35869,7 +35869,7 @@ void m68008_device::eori_b_imm8_dais_dp8() // 0a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35908,7 +35908,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -35949,11 +35949,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob); @@ -35973,7 +35973,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36015,7 +36015,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -36047,7 +36047,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36087,7 +36087,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -36125,7 +36125,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -36146,7 +36146,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36188,7 +36188,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -36220,7 +36220,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36258,7 +36258,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36297,7 +36297,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -36335,7 +36335,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -36356,7 +36356,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36398,7 +36398,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 19: m_program8.write_interruptible(m_aob, m_dbout); @@ -36430,7 +36430,7 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36467,21 +36467,21 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt alu_eor8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -36489,7 +36489,7 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36528,11 +36528,11 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36585,7 +36585,7 @@ void m68008_device::eori_w_imm16_ds_dp8() // 0a40 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36623,7 +36623,7 @@ void m68008_device::eori_w_imm16_ds_dp8() // 0a40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -36631,7 +36631,7 @@ void m68008_device::eori_w_imm16_ds_dp8() // 0a40 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36684,7 +36684,7 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36721,11 +36721,11 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -36763,7 +36763,7 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36805,7 +36805,7 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -36856,7 +36856,7 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -36896,12 +36896,12 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -36940,7 +36940,7 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36982,7 +36982,7 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -37033,7 +37033,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37072,7 +37072,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -37080,7 +37080,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -37119,7 +37119,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37161,7 +37161,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -37212,7 +37212,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37249,7 +37249,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37287,11 +37287,11 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -37329,7 +37329,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37371,7 +37371,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -37422,7 +37422,7 @@ void m68008_device::eori_w_imm16_dais_dp8() // 0a70 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37457,14 +37457,14 @@ void m68008_device::eori_w_imm16_dais_dp8() // 0a70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -37472,7 +37472,7 @@ void m68008_device::eori_w_imm16_dais_dp8() // 0a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37511,7 +37511,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37552,11 +37552,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -37594,7 +37594,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37636,7 +37636,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -37686,7 +37686,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37726,7 +37726,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -37764,7 +37764,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -37803,7 +37803,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37845,7 +37845,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -37895,7 +37895,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37933,7 +37933,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -37972,7 +37972,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -38010,7 +38010,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -38049,7 +38049,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38091,7 +38091,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -38145,7 +38145,7 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38182,23 +38182,23 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt alu_eor(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -38206,7 +38206,7 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38245,11 +38245,11 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38301,7 +38301,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38339,7 +38339,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38377,12 +38377,12 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38417,7 +38417,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry] alu_eor(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -38426,7 +38426,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -38446,7 +38446,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38484,7 +38484,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38521,7 +38521,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -38561,7 +38561,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -38599,7 +38599,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38639,7 +38639,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -38679,7 +38679,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -38729,7 +38729,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38767,7 +38767,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -38804,7 +38804,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -38844,11 +38844,11 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -38886,7 +38886,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38926,7 +38926,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -38966,7 +38966,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -39016,7 +39016,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39054,7 +39054,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39090,14 +39090,14 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -39136,7 +39136,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -39174,7 +39174,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39214,7 +39214,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -39254,7 +39254,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -39304,7 +39304,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39342,7 +39342,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39379,7 +39379,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39416,7 +39416,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -39456,7 +39456,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -39494,7 +39494,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39534,7 +39534,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -39574,7 +39574,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -39624,7 +39624,7 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39662,7 +39662,7 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39697,14 +39697,14 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -39712,7 +39712,7 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39751,7 +39751,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 33: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -39791,7 +39791,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -39831,7 +39831,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -39869,7 +39869,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39909,7 +39909,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -39949,7 +39949,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -39998,7 +39998,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -40036,7 +40036,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -40076,7 +40076,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -40114,7 +40114,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -40154,7 +40154,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -40192,7 +40192,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -40232,7 +40232,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -40272,7 +40272,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -40321,7 +40321,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -40359,7 +40359,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -40397,7 +40397,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -40436,7 +40436,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -40474,7 +40474,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -40514,7 +40514,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 21: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -40552,7 +40552,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -40592,7 +40592,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -40632,7 +40632,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 33: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -40720,7 +40720,7 @@ void m68008_device::cmpi_b_imm8_ds_dp8() // 0c00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -40815,7 +40815,7 @@ void m68008_device::cmpi_b_imm8_ais_dp8() // 0c10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -40838,7 +40838,7 @@ void m68008_device::cmpi_b_imm8_ais_dp8() // 0c10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -40938,7 +40938,7 @@ void m68008_device::cmpi_b_imm8_aips_dp8() // 0c18 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -40959,7 +40959,7 @@ void m68008_device::cmpi_b_imm8_aips_dp8() // 0c18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41061,7 +41061,7 @@ void m68008_device::cmpi_b_imm8_pais_dp8() // 0c20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -41082,7 +41082,7 @@ void m68008_device::cmpi_b_imm8_pais_dp8() // 0c20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41213,7 +41213,7 @@ void m68008_device::cmpi_b_imm8_das_dp8() // 0c28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -41236,7 +41236,7 @@ void m68008_device::cmpi_b_imm8_das_dp8() // 0c28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41328,7 +41328,7 @@ void m68008_device::cmpi_b_imm8_dais_dp8() // 0c30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -41420,7 +41420,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -41443,7 +41443,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41575,7 +41575,7 @@ void m68008_device::cmpi_b_imm8_adr16_dp8() // 0c38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -41596,7 +41596,7 @@ void m68008_device::cmpi_b_imm8_adr16_dp8() // 0c38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41764,7 +41764,7 @@ void m68008_device::cmpi_b_imm8_adr32_dp8() // 0c39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -41785,7 +41785,7 @@ void m68008_device::cmpi_b_imm8_adr32_dp8() // 0c39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41880,7 +41880,7 @@ void m68008_device::cmpi_w_imm16_ds_dp8() // 0c40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -41975,7 +41975,7 @@ void m68008_device::cmpi_w_imm16_ais_dp8() // 0c50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -42016,7 +42016,7 @@ void m68008_device::cmpi_w_imm16_ais_dp8() // 0c50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42116,7 +42116,7 @@ void m68008_device::cmpi_w_imm16_aips_dp8() // 0c58 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -42155,7 +42155,7 @@ void m68008_device::cmpi_w_imm16_aips_dp8() // 0c58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42257,7 +42257,7 @@ void m68008_device::cmpi_w_imm16_pais_dp8() // 0c60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -42296,7 +42296,7 @@ void m68008_device::cmpi_w_imm16_pais_dp8() // 0c60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42427,7 +42427,7 @@ void m68008_device::cmpi_w_imm16_das_dp8() // 0c68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -42468,7 +42468,7 @@ void m68008_device::cmpi_w_imm16_das_dp8() // 0c68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42560,7 +42560,7 @@ void m68008_device::cmpi_w_imm16_dais_dp8() // 0c70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -42652,7 +42652,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -42693,7 +42693,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42825,7 +42825,7 @@ void m68008_device::cmpi_w_imm16_adr16_dp8() // 0c78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -42864,7 +42864,7 @@ void m68008_device::cmpi_w_imm16_adr16_dp8() // 0c78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -43032,7 +43032,7 @@ void m68008_device::cmpi_w_imm16_adr32_dp8() // 0c79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -43071,7 +43071,7 @@ void m68008_device::cmpi_w_imm16_adr32_dp8() // 0c79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -43203,11 +43203,11 @@ void m68008_device::cmpi_l_imm32_ds_dp8() // 0c80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 239 rcal2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43339,7 +43339,7 @@ void m68008_device::cmpi_l_imm32_ais_dp8() // 0c90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -43416,13 +43416,13 @@ void m68008_device::cmpi_l_imm32_ais_dp8() // 0c90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43549,7 +43549,7 @@ void m68008_device::cmpi_l_imm32_aips_dp8() // 0c98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -43629,13 +43629,13 @@ void m68008_device::cmpi_l_imm32_aips_dp8() // 0c98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43761,7 +43761,7 @@ void m68008_device::cmpi_l_imm32_pais_dp8() // 0ca0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -43843,13 +43843,13 @@ void m68008_device::cmpi_l_imm32_pais_dp8() // 0ca0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44012,7 +44012,7 @@ void m68008_device::cmpi_l_imm32_das_dp8() // 0ca8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -44089,13 +44089,13 @@ void m68008_device::cmpi_l_imm32_das_dp8() // 0ca8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44220,7 +44220,7 @@ void m68008_device::cmpi_l_imm32_dais_dp8() // 0cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -44311,7 +44311,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -44388,13 +44388,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44559,7 +44559,7 @@ void m68008_device::cmpi_l_imm32_adr16_dp8() // 0cb8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -44636,13 +44636,13 @@ void m68008_device::cmpi_l_imm32_adr16_dp8() // 0cb8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44843,7 +44843,7 @@ void m68008_device::cmpi_l_imm32_adr32_dp8() // 0cb9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -44920,13 +44920,13 @@ void m68008_device::cmpi_l_imm32_adr32_dp8() // 0cb9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44983,7 +44983,7 @@ void m68008_device::move_b_ds_dd_dp8() // 1000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -45042,7 +45042,7 @@ void m68008_device::move_b_ais_dd_dp8() // 1010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45066,7 +45066,7 @@ void m68008_device::move_b_ais_dd_dp8() // 1010 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45129,7 +45129,7 @@ void m68008_device::move_b_aips_dd_dp8() // 1018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -45151,7 +45151,7 @@ void m68008_device::move_b_aips_dd_dp8() // 1018 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45216,7 +45216,7 @@ void m68008_device::move_b_pais_dd_dp8() // 1020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -45238,7 +45238,7 @@ void m68008_device::move_b_pais_dd_dp8() // 1020 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45332,7 +45332,7 @@ void m68008_device::move_b_das_dd_dp8() // 1028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45356,7 +45356,7 @@ void m68008_device::move_b_das_dd_dp8() // 1028 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45411,7 +45411,7 @@ void m68008_device::move_b_dais_dd_dp8() // 1030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -45503,7 +45503,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45527,7 +45527,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45622,7 +45622,7 @@ void m68008_device::move_b_adr16_dd_dp8() // 1038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -45644,7 +45644,7 @@ void m68008_device::move_b_adr16_dd_dp8() // 1038 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45775,7 +45775,7 @@ void m68008_device::move_b_adr32_dd_dp8() // 1039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -45797,7 +45797,7 @@ void m68008_device::move_b_adr32_dd_dp8() // 1039 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45890,7 +45890,7 @@ void m68008_device::move_b_dpc_dd_dp8() // 103a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45914,7 +45914,7 @@ void m68008_device::move_b_dpc_dd_dp8() // 103a f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45968,7 +45968,7 @@ void m68008_device::move_b_dpci_dd_dp8() // 103b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -46060,7 +46060,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -46084,7 +46084,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -46182,7 +46182,7 @@ void m68008_device::move_b_imm8_dd_dp8() // 103c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -46244,7 +46244,7 @@ void m68008_device::move_b_ds_aid_dp8() // 1080 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46318,7 +46318,7 @@ void m68008_device::move_b_ais_aid_dp8() // 1090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46341,7 +46341,7 @@ void m68008_device::move_b_ais_aid_dp8() // 1090 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46421,7 +46421,7 @@ void m68008_device::move_b_aips_aid_dp8() // 1098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -46442,7 +46442,7 @@ void m68008_device::move_b_aips_aid_dp8() // 1098 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46524,7 +46524,7 @@ void m68008_device::move_b_pais_aid_dp8() // 10a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -46545,7 +46545,7 @@ void m68008_device::move_b_pais_aid_dp8() // 10a0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46656,7 +46656,7 @@ void m68008_device::move_b_das_aid_dp8() // 10a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46679,7 +46679,7 @@ void m68008_device::move_b_das_aid_dp8() // 10a8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46751,7 +46751,7 @@ void m68008_device::move_b_dais_aid_dp8() // 10b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -46843,7 +46843,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46866,7 +46866,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46978,7 +46978,7 @@ void m68008_device::move_b_adr16_aid_dp8() // 10b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -46999,7 +46999,7 @@ void m68008_device::move_b_adr16_aid_dp8() // 10b8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47147,7 +47147,7 @@ void m68008_device::move_b_adr32_aid_dp8() // 10b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -47168,7 +47168,7 @@ void m68008_device::move_b_adr32_aid_dp8() // 10b9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47278,7 +47278,7 @@ void m68008_device::move_b_dpc_aid_dp8() // 10ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47301,7 +47301,7 @@ void m68008_device::move_b_dpc_aid_dp8() // 10ba f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47372,7 +47372,7 @@ void m68008_device::move_b_dpci_aid_dp8() // 10bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -47464,7 +47464,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47487,7 +47487,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47602,7 +47602,7 @@ void m68008_device::move_b_imm8_aid_dp8() // 10bc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47679,7 +47679,7 @@ void m68008_device::move_b_ds_aipd_dp8() // 10c0 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47752,7 +47752,7 @@ void m68008_device::move_b_ais_aipd_dp8() // 10d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47776,7 +47776,7 @@ void m68008_device::move_b_ais_aipd_dp8() // 10d0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47855,7 +47855,7 @@ void m68008_device::move_b_aips_aipd_dp8() // 10d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -47877,7 +47877,7 @@ void m68008_device::move_b_aips_aipd_dp8() // 10d8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47958,7 +47958,7 @@ void m68008_device::move_b_pais_aipd_dp8() // 10e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -47980,7 +47980,7 @@ void m68008_device::move_b_pais_aipd_dp8() // 10e0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48090,7 +48090,7 @@ void m68008_device::move_b_das_aipd_dp8() // 10e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48114,7 +48114,7 @@ void m68008_device::move_b_das_aipd_dp8() // 10e8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48185,7 +48185,7 @@ void m68008_device::move_b_dais_aipd_dp8() // 10f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -48277,7 +48277,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48301,7 +48301,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48412,7 +48412,7 @@ void m68008_device::move_b_adr16_aipd_dp8() // 10f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -48434,7 +48434,7 @@ void m68008_device::move_b_adr16_aipd_dp8() // 10f8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48581,7 +48581,7 @@ void m68008_device::move_b_adr32_aipd_dp8() // 10f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -48603,7 +48603,7 @@ void m68008_device::move_b_adr32_aipd_dp8() // 10f9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48712,7 +48712,7 @@ void m68008_device::move_b_dpc_aipd_dp8() // 10fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48736,7 +48736,7 @@ void m68008_device::move_b_dpc_aipd_dp8() // 10fa f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48806,7 +48806,7 @@ void m68008_device::move_b_dpci_aipd_dp8() // 10fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -48898,7 +48898,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48922,7 +48922,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -49036,7 +49036,7 @@ void m68008_device::move_b_imm8_aipd_dp8() // 10fc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -49111,7 +49111,7 @@ void m68008_device::move_b_ds_paid_dp8() // 1100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49185,7 +49185,7 @@ void m68008_device::move_b_ais_paid_dp8() // 1110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49208,7 +49208,7 @@ void m68008_device::move_b_ais_paid_dp8() // 1110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49288,7 +49288,7 @@ void m68008_device::move_b_aips_paid_dp8() // 1118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -49309,7 +49309,7 @@ void m68008_device::move_b_aips_paid_dp8() // 1118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49391,7 +49391,7 @@ void m68008_device::move_b_pais_paid_dp8() // 1120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -49412,7 +49412,7 @@ void m68008_device::move_b_pais_paid_dp8() // 1120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49523,7 +49523,7 @@ void m68008_device::move_b_das_paid_dp8() // 1128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49546,7 +49546,7 @@ void m68008_device::move_b_das_paid_dp8() // 1128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49618,7 +49618,7 @@ void m68008_device::move_b_dais_paid_dp8() // 1130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -49710,7 +49710,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49733,7 +49733,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49845,7 +49845,7 @@ void m68008_device::move_b_adr16_paid_dp8() // 1138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -49866,7 +49866,7 @@ void m68008_device::move_b_adr16_paid_dp8() // 1138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50014,7 +50014,7 @@ void m68008_device::move_b_adr32_paid_dp8() // 1139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -50035,7 +50035,7 @@ void m68008_device::move_b_adr32_paid_dp8() // 1139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50145,7 +50145,7 @@ void m68008_device::move_b_dpc_paid_dp8() // 113a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50168,7 +50168,7 @@ void m68008_device::move_b_dpc_paid_dp8() // 113a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50239,7 +50239,7 @@ void m68008_device::move_b_dpci_paid_dp8() // 113b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -50331,7 +50331,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50354,7 +50354,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50468,7 +50468,7 @@ void m68008_device::move_b_imm8_paid_dp8() // 113c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50580,7 +50580,7 @@ void m68008_device::move_b_ds_dad_dp8() // 1140 f1f8 m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -50655,7 +50655,7 @@ void m68008_device::move_b_ais_dad_dp8() // 1150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50677,7 +50677,7 @@ void m68008_device::move_b_ais_dad_dp8() // 1150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50799,7 +50799,7 @@ void m68008_device::move_b_aips_dad_dp8() // 1158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -50819,7 +50819,7 @@ void m68008_device::move_b_aips_dad_dp8() // 1158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50943,7 +50943,7 @@ void m68008_device::move_b_pais_dad_dp8() // 1160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -50963,7 +50963,7 @@ void m68008_device::move_b_pais_dad_dp8() // 1160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51116,7 +51116,7 @@ void m68008_device::move_b_das_dad_dp8() // 1168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -51138,7 +51138,7 @@ void m68008_device::move_b_das_dad_dp8() // 1168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51252,7 +51252,7 @@ void m68008_device::move_b_dais_dad_dp8() // 1170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -51344,7 +51344,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -51366,7 +51366,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51520,7 +51520,7 @@ void m68008_device::move_b_adr16_dad_dp8() // 1178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -51540,7 +51540,7 @@ void m68008_device::move_b_adr16_dad_dp8() // 1178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51730,7 +51730,7 @@ void m68008_device::move_b_adr32_dad_dp8() // 1179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -51750,7 +51750,7 @@ void m68008_device::move_b_adr32_dad_dp8() // 1179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51902,7 +51902,7 @@ void m68008_device::move_b_dpc_dad_dp8() // 117a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -51924,7 +51924,7 @@ void m68008_device::move_b_dpc_dad_dp8() // 117a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52037,7 +52037,7 @@ void m68008_device::move_b_dpci_dad_dp8() // 117b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -52129,7 +52129,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -52151,7 +52151,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52343,7 +52343,7 @@ void m68008_device::move_b_imm8_dad_dp8() // 117c f1ff m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -52416,7 +52416,7 @@ void m68008_device::move_b_ds_daid_dp8() // 1180 f1f8 switch(m_inst_substate) { case 0: // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -52510,7 +52510,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -52585,7 +52585,7 @@ void m68008_device::move_b_ais_daid_dp8() // 1190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -52604,7 +52604,7 @@ void m68008_device::move_b_ais_daid_dp8() // 1190 f1f8 [[fallthrough]]; case 2: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -52619,7 +52619,7 @@ void m68008_device::move_b_ais_daid_dp8() // 1190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52658,7 +52658,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52782,7 +52782,7 @@ void m68008_device::move_b_aips_daid_dp8() // 1198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -52799,7 +52799,7 @@ void m68008_device::move_b_aips_daid_dp8() // 1198 f1f8 [[fallthrough]]; case 2: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -52814,7 +52814,7 @@ void m68008_device::move_b_aips_daid_dp8() // 1198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52853,7 +52853,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52979,7 +52979,7 @@ void m68008_device::move_b_pais_daid_dp8() // 11a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -52996,7 +52996,7 @@ void m68008_device::move_b_pais_daid_dp8() // 11a0 f1f8 [[fallthrough]]; case 2: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53011,7 +53011,7 @@ void m68008_device::move_b_pais_daid_dp8() // 11a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53050,7 +53050,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53205,7 +53205,7 @@ void m68008_device::move_b_das_daid_dp8() // 11a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -53224,7 +53224,7 @@ void m68008_device::move_b_das_daid_dp8() // 11a8 f1f8 [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53239,7 +53239,7 @@ void m68008_device::move_b_das_daid_dp8() // 11a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53278,7 +53278,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53394,7 +53394,7 @@ void m68008_device::move_b_dais_daid_dp8() // 11b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -53486,7 +53486,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -53505,7 +53505,7 @@ adsw2: [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53520,7 +53520,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53559,7 +53559,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53715,7 +53715,7 @@ void m68008_device::move_b_adr16_daid_dp8() // 11b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -53732,7 +53732,7 @@ void m68008_device::move_b_adr16_daid_dp8() // 11b8 f1ff [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53747,7 +53747,7 @@ void m68008_device::move_b_adr16_daid_dp8() // 11b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53786,7 +53786,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53978,7 +53978,7 @@ void m68008_device::move_b_adr32_daid_dp8() // 11b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -53995,7 +53995,7 @@ void m68008_device::move_b_adr32_daid_dp8() // 11b9 f1ff [[fallthrough]]; case 10: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -54010,7 +54010,7 @@ void m68008_device::move_b_adr32_daid_dp8() // 11b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54049,7 +54049,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54203,7 +54203,7 @@ void m68008_device::move_b_dpc_daid_dp8() // 11ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -54222,7 +54222,7 @@ void m68008_device::move_b_dpc_daid_dp8() // 11ba f1ff [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -54237,7 +54237,7 @@ void m68008_device::move_b_dpc_daid_dp8() // 11ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54276,7 +54276,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54391,7 +54391,7 @@ void m68008_device::move_b_dpci_daid_dp8() // 11bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -54483,7 +54483,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -54502,7 +54502,7 @@ adsw2: [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -54517,7 +54517,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54556,7 +54556,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54710,7 +54710,7 @@ void m68008_device::move_b_imm8_daid_dp8() // 11bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -54804,7 +54804,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54880,7 +54880,7 @@ void m68008_device::move_b_ds_adr16_dp8() // 11c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54995,7 +54995,7 @@ void m68008_device::move_b_ais_adr16_dp8() // 11d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -55017,7 +55017,7 @@ void m68008_device::move_b_ais_adr16_dp8() // 11d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55138,7 +55138,7 @@ void m68008_device::move_b_aips_adr16_dp8() // 11d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -55158,7 +55158,7 @@ void m68008_device::move_b_aips_adr16_dp8() // 11d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55281,7 +55281,7 @@ void m68008_device::move_b_pais_adr16_dp8() // 11e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -55301,7 +55301,7 @@ void m68008_device::move_b_pais_adr16_dp8() // 11e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55453,7 +55453,7 @@ void m68008_device::move_b_das_adr16_dp8() // 11e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -55475,7 +55475,7 @@ void m68008_device::move_b_das_adr16_dp8() // 11e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55588,7 +55588,7 @@ void m68008_device::move_b_dais_adr16_dp8() // 11f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -55680,7 +55680,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -55702,7 +55702,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55855,7 +55855,7 @@ void m68008_device::move_b_adr16_adr16_dp8() // 11f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -55875,7 +55875,7 @@ void m68008_device::move_b_adr16_adr16_dp8() // 11f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56064,7 +56064,7 @@ void m68008_device::move_b_adr32_adr16_dp8() // 11f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -56084,7 +56084,7 @@ void m68008_device::move_b_adr32_adr16_dp8() // 11f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56235,7 +56235,7 @@ void m68008_device::move_b_dpc_adr16_dp8() // 11fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -56257,7 +56257,7 @@ void m68008_device::move_b_dpc_adr16_dp8() // 11fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56369,7 +56369,7 @@ void m68008_device::move_b_dpci_adr16_dp8() // 11fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -56461,7 +56461,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -56483,7 +56483,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56638,7 +56638,7 @@ void m68008_device::move_b_imm8_adr16_dp8() // 11fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56791,7 +56791,7 @@ void m68008_device::move_b_ds_adr32_dp8() // 13c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56906,7 +56906,7 @@ void m68008_device::move_b_ais_adr32_dp8() // 13d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -56928,7 +56928,7 @@ void m68008_device::move_b_ais_adr32_dp8() // 13d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57084,7 +57084,7 @@ void m68008_device::move_b_aips_adr32_dp8() // 13d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -57104,7 +57104,7 @@ void m68008_device::move_b_aips_adr32_dp8() // 13d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57262,7 +57262,7 @@ void m68008_device::move_b_pais_adr32_dp8() // 13e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -57282,7 +57282,7 @@ void m68008_device::move_b_pais_adr32_dp8() // 13e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57469,7 +57469,7 @@ void m68008_device::move_b_das_adr32_dp8() // 13e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -57491,7 +57491,7 @@ void m68008_device::move_b_das_adr32_dp8() // 13e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57639,7 +57639,7 @@ void m68008_device::move_b_dais_adr32_dp8() // 13f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -57731,7 +57731,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -57753,7 +57753,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57941,7 +57941,7 @@ void m68008_device::move_b_adr16_adr32_dp8() // 13f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -57961,7 +57961,7 @@ void m68008_device::move_b_adr16_adr32_dp8() // 13f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58185,7 +58185,7 @@ void m68008_device::move_b_adr32_adr32_dp8() // 13f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -58205,7 +58205,7 @@ void m68008_device::move_b_adr32_adr32_dp8() // 13f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58391,7 +58391,7 @@ void m68008_device::move_b_dpc_adr32_dp8() // 13fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -58413,7 +58413,7 @@ void m68008_device::move_b_dpc_adr32_dp8() // 13fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58560,7 +58560,7 @@ void m68008_device::move_b_dpci_adr32_dp8() // 13fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -58652,7 +58652,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -58674,7 +58674,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58900,7 +58900,7 @@ void m68008_device::move_b_imm8_adr32_dp8() // 13fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59019,13 +59019,13 @@ void m68008_device::move_l_ds_dd_dp8() // 2000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_da[rx] = m_at; @@ -59083,14 +59083,14 @@ void m68008_device::move_l_as_dd_dp8() // 2008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59144,7 +59144,7 @@ void m68008_device::move_l_ais_dd_dp8() // 2010 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -59222,14 +59222,14 @@ void m68008_device::move_l_ais_dd_dp8() // 2010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59283,7 +59283,7 @@ void m68008_device::move_l_aips_dd_dp8() // 2018 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -59364,14 +59364,14 @@ void m68008_device::move_l_aips_dd_dp8() // 2018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59424,7 +59424,7 @@ void m68008_device::move_l_pais_dd_dp8() // 2020 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -59507,14 +59507,14 @@ void m68008_device::move_l_pais_dd_dp8() // 2020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59604,7 +59604,7 @@ void m68008_device::move_l_das_dd_dp8() // 2028 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -59682,14 +59682,14 @@ void m68008_device::move_l_das_dd_dp8() // 2028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59741,7 +59741,7 @@ void m68008_device::move_l_dais_dd_dp8() // 2030 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -59832,7 +59832,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -59910,14 +59910,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60009,7 +60009,7 @@ void m68008_device::move_l_adr16_dd_dp8() // 2038 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -60087,14 +60087,14 @@ void m68008_device::move_l_adr16_dd_dp8() // 2038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60222,7 +60222,7 @@ void m68008_device::move_l_adr32_dd_dp8() // 2039 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -60300,14 +60300,14 @@ void m68008_device::move_l_adr32_dd_dp8() // 2039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60396,7 +60396,7 @@ void m68008_device::move_l_dpc_dd_dp8() // 203a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -60474,14 +60474,14 @@ void m68008_device::move_l_dpc_dd_dp8() // 203a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60532,7 +60532,7 @@ void m68008_device::move_l_dpci_dd_dp8() // 203b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -60623,7 +60623,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -60701,14 +60701,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60839,14 +60839,14 @@ void m68008_device::move_l_imm32_dd_dp8() // 203c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60903,13 +60903,13 @@ void m68008_device::movea_l_ds_ad_dp8() // 2040 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -60965,12 +60965,12 @@ void m68008_device::movea_l_as_ad_dp8() // 2048 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61024,7 +61024,7 @@ void m68008_device::movea_l_ais_ad_dp8() // 2050 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -61102,13 +61102,13 @@ void m68008_device::movea_l_ais_ad_dp8() // 2050 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -61161,7 +61161,7 @@ void m68008_device::movea_l_aips_ad_dp8() // 2058 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -61242,13 +61242,13 @@ void m68008_device::movea_l_aips_ad_dp8() // 2058 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -61300,7 +61300,7 @@ void m68008_device::movea_l_pais_ad_dp8() // 2060 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -61383,13 +61383,13 @@ void m68008_device::movea_l_pais_ad_dp8() // 2060 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -61478,7 +61478,7 @@ void m68008_device::movea_l_das_ad_dp8() // 2068 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -61556,13 +61556,13 @@ void m68008_device::movea_l_das_ad_dp8() // 2068 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -61613,7 +61613,7 @@ void m68008_device::movea_l_dais_ad_dp8() // 2070 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -61704,7 +61704,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -61782,13 +61782,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -61879,7 +61879,7 @@ void m68008_device::movea_l_adr16_ad_dp8() // 2078 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -61957,13 +61957,13 @@ void m68008_device::movea_l_adr16_ad_dp8() // 2078 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -62090,7 +62090,7 @@ void m68008_device::movea_l_adr32_ad_dp8() // 2079 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -62168,13 +62168,13 @@ void m68008_device::movea_l_adr32_ad_dp8() // 2079 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -62262,7 +62262,7 @@ void m68008_device::movea_l_dpc_ad_dp8() // 207a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -62340,13 +62340,13 @@ void m68008_device::movea_l_dpc_ad_dp8() // 207a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -62396,7 +62396,7 @@ void m68008_device::movea_l_dpci_ad_dp8() // 207b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -62487,7 +62487,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -62565,13 +62565,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -62701,13 +62701,13 @@ void m68008_device::movea_l_imm32_ad_dp8() // 207c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -62799,7 +62799,7 @@ void m68008_device::move_l_ds_aid_dp8() // 2080 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -62839,7 +62839,7 @@ void m68008_device::move_l_ds_aid_dp8() // 2080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62932,7 +62932,7 @@ void m68008_device::move_l_as_aid_dp8() // 2088 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -62972,7 +62972,7 @@ void m68008_device::move_l_as_aid_dp8() // 2088 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63026,7 +63026,7 @@ void m68008_device::move_l_ais_aid_dp8() // 2090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -63103,7 +63103,7 @@ void m68008_device::move_l_ais_aid_dp8() // 2090 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63142,7 +63142,7 @@ void m68008_device::move_l_ais_aid_dp8() // 2090 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63234,7 +63234,7 @@ void m68008_device::move_l_aips_aid_dp8() // 2098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -63314,7 +63314,7 @@ void m68008_device::move_l_aips_aid_dp8() // 2098 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63353,7 +63353,7 @@ void m68008_device::move_l_aips_aid_dp8() // 2098 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63444,7 +63444,7 @@ void m68008_device::move_l_pais_aid_dp8() // 20a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -63526,7 +63526,7 @@ void m68008_device::move_l_pais_aid_dp8() // 20a0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63565,7 +63565,7 @@ void m68008_device::move_l_pais_aid_dp8() // 20a0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63693,7 +63693,7 @@ void m68008_device::move_l_das_aid_dp8() // 20a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -63770,7 +63770,7 @@ void m68008_device::move_l_das_aid_dp8() // 20a8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63809,7 +63809,7 @@ void m68008_device::move_l_das_aid_dp8() // 20a8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63899,7 +63899,7 @@ void m68008_device::move_l_dais_aid_dp8() // 20b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -63990,7 +63990,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -64067,7 +64067,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64106,7 +64106,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64236,7 +64236,7 @@ void m68008_device::move_l_adr16_aid_dp8() // 20b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -64313,7 +64313,7 @@ void m68008_device::move_l_adr16_aid_dp8() // 20b8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64352,7 +64352,7 @@ void m68008_device::move_l_adr16_aid_dp8() // 20b8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64518,7 +64518,7 @@ void m68008_device::move_l_adr32_aid_dp8() // 20b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -64595,7 +64595,7 @@ void m68008_device::move_l_adr32_aid_dp8() // 20b9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64634,7 +64634,7 @@ void m68008_device::move_l_adr32_aid_dp8() // 20b9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64761,7 +64761,7 @@ void m68008_device::move_l_dpc_aid_dp8() // 20ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -64838,7 +64838,7 @@ void m68008_device::move_l_dpc_aid_dp8() // 20ba f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64877,7 +64877,7 @@ void m68008_device::move_l_dpc_aid_dp8() // 20ba f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64966,7 +64966,7 @@ void m68008_device::move_l_dpci_aid_dp8() // 20bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -65057,7 +65057,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -65134,7 +65134,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65173,7 +65173,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65378,7 +65378,7 @@ void m68008_device::move_l_imm32_aid_dp8() // 20bc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65418,7 +65418,7 @@ void m68008_device::move_l_imm32_aid_dp8() // 20bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65511,7 +65511,7 @@ void m68008_device::move_l_ds_aipd_dp8() // 20c0 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65551,7 +65551,7 @@ void m68008_device::move_l_ds_aipd_dp8() // 20c0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65644,7 +65644,7 @@ void m68008_device::move_l_as_aipd_dp8() // 20c8 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65684,7 +65684,7 @@ void m68008_device::move_l_as_aipd_dp8() // 20c8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65738,7 +65738,7 @@ void m68008_device::move_l_ais_aipd_dp8() // 20d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -65815,7 +65815,7 @@ void m68008_device::move_l_ais_aipd_dp8() // 20d0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65854,7 +65854,7 @@ void m68008_device::move_l_ais_aipd_dp8() // 20d0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65945,7 +65945,7 @@ void m68008_device::move_l_aips_aipd_dp8() // 20d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -66025,7 +66025,7 @@ void m68008_device::move_l_aips_aipd_dp8() // 20d8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66064,7 +66064,7 @@ void m68008_device::move_l_aips_aipd_dp8() // 20d8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66154,7 +66154,7 @@ void m68008_device::move_l_pais_aipd_dp8() // 20e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -66236,7 +66236,7 @@ void m68008_device::move_l_pais_aipd_dp8() // 20e0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66275,7 +66275,7 @@ void m68008_device::move_l_pais_aipd_dp8() // 20e0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66402,7 +66402,7 @@ void m68008_device::move_l_das_aipd_dp8() // 20e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -66479,7 +66479,7 @@ void m68008_device::move_l_das_aipd_dp8() // 20e8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66518,7 +66518,7 @@ void m68008_device::move_l_das_aipd_dp8() // 20e8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66607,7 +66607,7 @@ void m68008_device::move_l_dais_aipd_dp8() // 20f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -66698,7 +66698,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -66775,7 +66775,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66814,7 +66814,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66943,7 +66943,7 @@ void m68008_device::move_l_adr16_aipd_dp8() // 20f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -67020,7 +67020,7 @@ void m68008_device::move_l_adr16_aipd_dp8() // 20f8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67059,7 +67059,7 @@ void m68008_device::move_l_adr16_aipd_dp8() // 20f8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67224,7 +67224,7 @@ void m68008_device::move_l_adr32_aipd_dp8() // 20f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -67301,7 +67301,7 @@ void m68008_device::move_l_adr32_aipd_dp8() // 20f9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67340,7 +67340,7 @@ void m68008_device::move_l_adr32_aipd_dp8() // 20f9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67466,7 +67466,7 @@ void m68008_device::move_l_dpc_aipd_dp8() // 20fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -67543,7 +67543,7 @@ void m68008_device::move_l_dpc_aipd_dp8() // 20fa f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67582,7 +67582,7 @@ void m68008_device::move_l_dpc_aipd_dp8() // 20fa f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67670,7 +67670,7 @@ void m68008_device::move_l_dpci_aipd_dp8() // 20fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -67761,7 +67761,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -67838,7 +67838,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67877,7 +67877,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68081,7 +68081,7 @@ void m68008_device::move_l_imm32_aipd_dp8() // 20fc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -68121,7 +68121,7 @@ void m68008_device::move_l_imm32_aipd_dp8() // 20fc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68177,7 +68177,7 @@ void m68008_device::move_l_ds_paid_dp8() // 2100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68217,7 +68217,7 @@ void m68008_device::move_l_ds_paid_dp8() // 2100 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68309,7 +68309,7 @@ void m68008_device::move_l_as_paid_dp8() // 2108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68349,7 +68349,7 @@ void m68008_device::move_l_as_paid_dp8() // 2108 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68439,7 +68439,7 @@ void m68008_device::move_l_ais_paid_dp8() // 2110 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -68516,7 +68516,7 @@ void m68008_device::move_l_ais_paid_dp8() // 2110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68556,7 +68556,7 @@ void m68008_device::move_l_ais_paid_dp8() // 2110 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68646,7 +68646,7 @@ void m68008_device::move_l_aips_paid_dp8() // 2118 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -68726,7 +68726,7 @@ void m68008_device::move_l_aips_paid_dp8() // 2118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68766,7 +68766,7 @@ void m68008_device::move_l_aips_paid_dp8() // 2118 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68855,7 +68855,7 @@ void m68008_device::move_l_pais_paid_dp8() // 2120 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -68937,7 +68937,7 @@ void m68008_device::move_l_pais_paid_dp8() // 2120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68977,7 +68977,7 @@ void m68008_device::move_l_pais_paid_dp8() // 2120 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69103,7 +69103,7 @@ void m68008_device::move_l_das_paid_dp8() // 2128 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -69180,7 +69180,7 @@ void m68008_device::move_l_das_paid_dp8() // 2128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69220,7 +69220,7 @@ void m68008_device::move_l_das_paid_dp8() // 2128 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69308,7 +69308,7 @@ void m68008_device::move_l_dais_paid_dp8() // 2130 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -69399,7 +69399,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -69476,7 +69476,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69516,7 +69516,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69644,7 +69644,7 @@ void m68008_device::move_l_adr16_paid_dp8() // 2138 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -69721,7 +69721,7 @@ void m68008_device::move_l_adr16_paid_dp8() // 2138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69761,7 +69761,7 @@ void m68008_device::move_l_adr16_paid_dp8() // 2138 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69925,7 +69925,7 @@ void m68008_device::move_l_adr32_paid_dp8() // 2139 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -70002,7 +70002,7 @@ void m68008_device::move_l_adr32_paid_dp8() // 2139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70042,7 +70042,7 @@ void m68008_device::move_l_adr32_paid_dp8() // 2139 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70167,7 +70167,7 @@ void m68008_device::move_l_dpc_paid_dp8() // 213a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -70244,7 +70244,7 @@ void m68008_device::move_l_dpc_paid_dp8() // 213a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70284,7 +70284,7 @@ void m68008_device::move_l_dpc_paid_dp8() // 213a f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70371,7 +70371,7 @@ void m68008_device::move_l_dpci_paid_dp8() // 213b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -70462,7 +70462,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -70539,7 +70539,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70579,7 +70579,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70745,7 +70745,7 @@ void m68008_device::move_l_imm32_paid_dp8() // 213c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70785,7 +70785,7 @@ void m68008_device::move_l_imm32_paid_dp8() // 213c f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70913,7 +70913,7 @@ void m68008_device::move_l_ds_dad_dp8() // 2140 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70952,7 +70952,7 @@ void m68008_device::move_l_ds_dad_dp8() // 2140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -70992,7 +70992,7 @@ void m68008_device::move_l_ds_dad_dp8() // 2140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71084,7 +71084,7 @@ void m68008_device::move_l_as_dad_dp8() // 2148 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71123,7 +71123,7 @@ void m68008_device::move_l_as_dad_dp8() // 2148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71163,7 +71163,7 @@ void m68008_device::move_l_as_dad_dp8() // 2148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71217,7 +71217,7 @@ void m68008_device::move_l_ais_dad_dp8() // 2150 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -71293,7 +71293,7 @@ void m68008_device::move_l_ais_dad_dp8() // 2150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71333,7 +71333,7 @@ void m68008_device::move_l_ais_dad_dp8() // 2150 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71466,7 +71466,7 @@ void m68008_device::move_l_aips_dad_dp8() // 2158 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -71545,7 +71545,7 @@ void m68008_device::move_l_aips_dad_dp8() // 2158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71585,7 +71585,7 @@ void m68008_device::move_l_aips_dad_dp8() // 2158 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71717,7 +71717,7 @@ void m68008_device::move_l_pais_dad_dp8() // 2160 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -71798,7 +71798,7 @@ void m68008_device::move_l_pais_dad_dp8() // 2160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71838,7 +71838,7 @@ void m68008_device::move_l_pais_dad_dp8() // 2160 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72007,7 +72007,7 @@ void m68008_device::move_l_das_dad_dp8() // 2168 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -72083,7 +72083,7 @@ void m68008_device::move_l_das_dad_dp8() // 2168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -72123,7 +72123,7 @@ void m68008_device::move_l_das_dad_dp8() // 2168 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72254,7 +72254,7 @@ void m68008_device::move_l_dais_dad_dp8() // 2170 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -72345,7 +72345,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -72421,7 +72421,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -72461,7 +72461,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72632,7 +72632,7 @@ void m68008_device::move_l_adr16_dad_dp8() // 2178 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -72708,7 +72708,7 @@ void m68008_device::move_l_adr16_dad_dp8() // 2178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -72748,7 +72748,7 @@ void m68008_device::move_l_adr16_dad_dp8() // 2178 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72955,7 +72955,7 @@ void m68008_device::move_l_adr32_dad_dp8() // 2179 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -73031,7 +73031,7 @@ void m68008_device::move_l_adr32_dad_dp8() // 2179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73071,7 +73071,7 @@ void m68008_device::move_l_adr32_dad_dp8() // 2179 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73239,7 +73239,7 @@ void m68008_device::move_l_dpc_dad_dp8() // 217a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -73315,7 +73315,7 @@ void m68008_device::move_l_dpc_dad_dp8() // 217a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73355,7 +73355,7 @@ void m68008_device::move_l_dpc_dad_dp8() // 217a f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73485,7 +73485,7 @@ void m68008_device::move_l_dpci_dad_dp8() // 217b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -73576,7 +73576,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -73652,7 +73652,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73692,7 +73692,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73937,7 +73937,7 @@ void m68008_device::move_l_imm32_dad_dp8() // 217c f1ff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73976,7 +73976,7 @@ void m68008_device::move_l_imm32_dad_dp8() // 217c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -74016,7 +74016,7 @@ void m68008_device::move_l_imm32_dad_dp8() // 217c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74068,7 +74068,7 @@ void m68008_device::move_l_ds_daid_dp8() // 2180 f1f8 switch(m_inst_substate) { case 0: // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -74162,7 +74162,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -74201,7 +74201,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -74241,7 +74241,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74293,7 +74293,7 @@ void m68008_device::move_l_as_daid_dp8() // 2188 f1f8 switch(m_inst_substate) { case 0: // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -74387,7 +74387,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -74426,7 +74426,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -74466,7 +74466,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74520,7 +74520,7 @@ void m68008_device::move_l_ais_daid_dp8() // 2190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -74593,7 +74593,7 @@ void m68008_device::move_l_ais_daid_dp8() // 2190 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -74608,7 +74608,7 @@ void m68008_device::move_l_ais_daid_dp8() // 2190 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74647,7 +74647,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74689,7 +74689,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -74822,7 +74822,7 @@ void m68008_device::move_l_aips_daid_dp8() // 2198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -74898,7 +74898,7 @@ void m68008_device::move_l_aips_daid_dp8() // 2198 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -74913,7 +74913,7 @@ void m68008_device::move_l_aips_daid_dp8() // 2198 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74952,7 +74952,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74994,7 +74994,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -75126,7 +75126,7 @@ void m68008_device::move_l_pais_daid_dp8() // 21a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -75204,7 +75204,7 @@ void m68008_device::move_l_pais_daid_dp8() // 21a0 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -75219,7 +75219,7 @@ void m68008_device::move_l_pais_daid_dp8() // 21a0 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75258,7 +75258,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75300,7 +75300,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -75469,7 +75469,7 @@ void m68008_device::move_l_das_daid_dp8() // 21a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -75542,7 +75542,7 @@ void m68008_device::move_l_das_daid_dp8() // 21a8 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -75557,7 +75557,7 @@ void m68008_device::move_l_das_daid_dp8() // 21a8 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75596,7 +75596,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75638,7 +75638,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -75769,7 +75769,7 @@ void m68008_device::move_l_dais_daid_dp8() // 21b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -75860,7 +75860,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -75933,7 +75933,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -75948,7 +75948,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75987,7 +75987,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76029,7 +76029,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -76200,7 +76200,7 @@ void m68008_device::move_l_adr16_daid_dp8() // 21b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -76273,7 +76273,7 @@ void m68008_device::move_l_adr16_daid_dp8() // 21b8 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -76288,7 +76288,7 @@ void m68008_device::move_l_adr16_daid_dp8() // 21b8 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76327,7 +76327,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76369,7 +76369,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -76576,7 +76576,7 @@ void m68008_device::move_l_adr32_daid_dp8() // 21b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -76649,7 +76649,7 @@ void m68008_device::move_l_adr32_daid_dp8() // 21b9 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -76664,7 +76664,7 @@ void m68008_device::move_l_adr32_daid_dp8() // 21b9 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76703,7 +76703,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76745,7 +76745,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -76913,7 +76913,7 @@ void m68008_device::move_l_dpc_daid_dp8() // 21ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -76986,7 +76986,7 @@ void m68008_device::move_l_dpc_daid_dp8() // 21ba f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -77001,7 +77001,7 @@ void m68008_device::move_l_dpc_daid_dp8() // 21ba f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77040,7 +77040,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77082,7 +77082,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -77212,7 +77212,7 @@ void m68008_device::move_l_dpci_daid_dp8() // 21bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -77303,7 +77303,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -77376,7 +77376,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -77391,7 +77391,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77430,7 +77430,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77472,7 +77472,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -77677,7 +77677,7 @@ void m68008_device::move_l_imm32_daid_dp8() // 21bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -77771,7 +77771,7 @@ rmdl2: m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -77810,7 +77810,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77850,7 +77850,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77905,7 +77905,7 @@ void m68008_device::move_l_ds_adr16_dp8() // 21c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77945,7 +77945,7 @@ void m68008_device::move_l_ds_adr16_dp8() // 21c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78079,7 +78079,7 @@ void m68008_device::move_l_as_adr16_dp8() // 21c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78119,7 +78119,7 @@ void m68008_device::move_l_as_adr16_dp8() // 21c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78251,7 +78251,7 @@ void m68008_device::move_l_ais_adr16_dp8() // 21d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -78327,7 +78327,7 @@ void m68008_device::move_l_ais_adr16_dp8() // 21d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78367,7 +78367,7 @@ void m68008_device::move_l_ais_adr16_dp8() // 21d0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78499,7 +78499,7 @@ void m68008_device::move_l_aips_adr16_dp8() // 21d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -78578,7 +78578,7 @@ void m68008_device::move_l_aips_adr16_dp8() // 21d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78618,7 +78618,7 @@ void m68008_device::move_l_aips_adr16_dp8() // 21d8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78749,7 +78749,7 @@ void m68008_device::move_l_pais_adr16_dp8() // 21e0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -78830,7 +78830,7 @@ void m68008_device::move_l_pais_adr16_dp8() // 21e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78870,7 +78870,7 @@ void m68008_device::move_l_pais_adr16_dp8() // 21e0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79038,7 +79038,7 @@ void m68008_device::move_l_das_adr16_dp8() // 21e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -79114,7 +79114,7 @@ void m68008_device::move_l_das_adr16_dp8() // 21e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79154,7 +79154,7 @@ void m68008_device::move_l_das_adr16_dp8() // 21e8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79284,7 +79284,7 @@ void m68008_device::move_l_dais_adr16_dp8() // 21f0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -79375,7 +79375,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -79451,7 +79451,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79491,7 +79491,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79661,7 +79661,7 @@ void m68008_device::move_l_adr16_adr16_dp8() // 21f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -79737,7 +79737,7 @@ void m68008_device::move_l_adr16_adr16_dp8() // 21f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79777,7 +79777,7 @@ void m68008_device::move_l_adr16_adr16_dp8() // 21f8 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79983,7 +79983,7 @@ void m68008_device::move_l_adr32_adr16_dp8() // 21f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -80059,7 +80059,7 @@ void m68008_device::move_l_adr32_adr16_dp8() // 21f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80099,7 +80099,7 @@ void m68008_device::move_l_adr32_adr16_dp8() // 21f9 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -80266,7 +80266,7 @@ void m68008_device::move_l_dpc_adr16_dp8() // 21fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -80342,7 +80342,7 @@ void m68008_device::move_l_dpc_adr16_dp8() // 21fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80382,7 +80382,7 @@ void m68008_device::move_l_dpc_adr16_dp8() // 21fa ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -80511,7 +80511,7 @@ void m68008_device::move_l_dpci_adr16_dp8() // 21fb ffff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -80602,7 +80602,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -80678,7 +80678,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80718,7 +80718,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -80926,7 +80926,7 @@ void m68008_device::move_l_imm32_adr16_dp8() // 21fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80966,7 +80966,7 @@ void m68008_device::move_l_imm32_adr16_dp8() // 21fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81136,7 +81136,7 @@ void m68008_device::move_l_ds_adr32_dp8() // 23c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81176,7 +81176,7 @@ void m68008_device::move_l_ds_adr32_dp8() // 23c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81346,7 +81346,7 @@ void m68008_device::move_l_as_adr32_dp8() // 23c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81386,7 +81386,7 @@ void m68008_device::move_l_as_adr32_dp8() // 23c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81518,7 +81518,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -81595,7 +81595,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -81633,7 +81633,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81672,7 +81672,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81803,7 +81803,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -81883,7 +81883,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -81921,7 +81921,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81960,7 +81960,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -82090,7 +82090,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -82172,7 +82172,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -82210,7 +82210,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82249,7 +82249,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -82416,7 +82416,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -82493,7 +82493,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -82531,7 +82531,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82570,7 +82570,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -82699,7 +82699,7 @@ void m68008_device::move_l_dais_adr32_dp8() // 23f0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -82790,7 +82790,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -82867,7 +82867,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -82905,7 +82905,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82944,7 +82944,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -83113,7 +83113,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -83190,7 +83190,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -83228,7 +83228,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83267,7 +83267,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -83472,7 +83472,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -83549,7 +83549,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -83587,7 +83587,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83626,7 +83626,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -83792,7 +83792,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -83869,7 +83869,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -83907,7 +83907,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83946,7 +83946,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -84074,7 +84074,7 @@ void m68008_device::move_l_dpci_adr32_dp8() // 23fb ffff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -84165,7 +84165,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -84242,7 +84242,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -84280,7 +84280,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -84319,7 +84319,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -84562,7 +84562,7 @@ void m68008_device::move_l_imm32_adr32_dp8() // 23fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84602,7 +84602,7 @@ void m68008_device::move_l_imm32_adr32_dp8() // 23fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -84738,7 +84738,7 @@ void m68008_device::move_w_ds_dd_dp8() // 3000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -84800,7 +84800,7 @@ void m68008_device::move_w_as_dd_dp8() // 3008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -84859,7 +84859,7 @@ void m68008_device::move_w_ais_dd_dp8() // 3010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -84901,7 +84901,7 @@ void m68008_device::move_w_ais_dd_dp8() // 3010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -84964,7 +84964,7 @@ void m68008_device::move_w_aips_dd_dp8() // 3018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -85004,7 +85004,7 @@ void m68008_device::move_w_aips_dd_dp8() // 3018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85069,7 +85069,7 @@ void m68008_device::move_w_pais_dd_dp8() // 3020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -85109,7 +85109,7 @@ void m68008_device::move_w_pais_dd_dp8() // 3020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85203,7 +85203,7 @@ void m68008_device::move_w_das_dd_dp8() // 3028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -85245,7 +85245,7 @@ void m68008_device::move_w_das_dd_dp8() // 3028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85300,7 +85300,7 @@ void m68008_device::move_w_dais_dd_dp8() // 3030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -85392,7 +85392,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -85434,7 +85434,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85529,7 +85529,7 @@ void m68008_device::move_w_adr16_dd_dp8() // 3038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -85569,7 +85569,7 @@ void m68008_device::move_w_adr16_dd_dp8() // 3038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85700,7 +85700,7 @@ void m68008_device::move_w_adr32_dd_dp8() // 3039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -85740,7 +85740,7 @@ void m68008_device::move_w_adr32_dd_dp8() // 3039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85833,7 +85833,7 @@ void m68008_device::move_w_dpc_dd_dp8() // 303a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -85875,7 +85875,7 @@ void m68008_device::move_w_dpc_dd_dp8() // 303a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85929,7 +85929,7 @@ void m68008_device::move_w_dpci_dd_dp8() // 303b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -86021,7 +86021,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -86063,7 +86063,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -86161,7 +86161,7 @@ void m68008_device::move_w_imm16_dd_dp8() // 303c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -86227,7 +86227,7 @@ void m68008_device::movea_w_ds_ad_dp8() // 3040 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -86286,7 +86286,7 @@ void m68008_device::movea_w_as_ad_dp8() // 3048 f1f8 // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86340,7 +86340,7 @@ void m68008_device::movea_w_ais_ad_dp8() // 3050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86442,7 +86442,7 @@ void m68008_device::movea_w_aips_ad_dp8() // 3058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -86544,7 +86544,7 @@ void m68008_device::movea_w_pais_ad_dp8() // 3060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -86675,7 +86675,7 @@ void m68008_device::movea_w_das_ad_dp8() // 3068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86769,7 +86769,7 @@ void m68008_device::movea_w_dais_ad_dp8() // 3070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -86861,7 +86861,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86995,7 +86995,7 @@ void m68008_device::movea_w_adr16_ad_dp8() // 3078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -87163,7 +87163,7 @@ void m68008_device::movea_w_adr32_ad_dp8() // 3079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -87293,7 +87293,7 @@ void m68008_device::movea_w_dpc_ad_dp8() // 307a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87386,7 +87386,7 @@ void m68008_device::movea_w_dpci_ad_dp8() // 307b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -87478,7 +87478,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87619,7 +87619,7 @@ void m68008_device::movea_w_imm16_ad_dp8() // 307c f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -87675,7 +87675,7 @@ void m68008_device::move_w_ds_aid_dp8() // 3080 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -87770,7 +87770,7 @@ void m68008_device::move_w_as_aid_dp8() // 3088 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -87862,7 +87862,7 @@ void m68008_device::move_w_ais_aid_dp8() // 3090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87903,7 +87903,7 @@ void m68008_device::move_w_ais_aid_dp8() // 3090 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88001,7 +88001,7 @@ void m68008_device::move_w_aips_aid_dp8() // 3098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -88040,7 +88040,7 @@ void m68008_device::move_w_aips_aid_dp8() // 3098 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88140,7 +88140,7 @@ void m68008_device::move_w_pais_aid_dp8() // 30a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -88179,7 +88179,7 @@ void m68008_device::move_w_pais_aid_dp8() // 30a0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88308,7 +88308,7 @@ void m68008_device::move_w_das_aid_dp8() // 30a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88349,7 +88349,7 @@ void m68008_device::move_w_das_aid_dp8() // 30a8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88439,7 +88439,7 @@ void m68008_device::move_w_dais_aid_dp8() // 30b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -88531,7 +88531,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88572,7 +88572,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88702,7 +88702,7 @@ void m68008_device::move_w_adr16_aid_dp8() // 30b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -88741,7 +88741,7 @@ void m68008_device::move_w_adr16_aid_dp8() // 30b8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88907,7 +88907,7 @@ void m68008_device::move_w_adr32_aid_dp8() // 30b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -88946,7 +88946,7 @@ void m68008_device::move_w_adr32_aid_dp8() // 30b9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89074,7 +89074,7 @@ void m68008_device::move_w_dpc_aid_dp8() // 30ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89115,7 +89115,7 @@ void m68008_device::move_w_dpc_aid_dp8() // 30ba f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89204,7 +89204,7 @@ void m68008_device::move_w_dpci_aid_dp8() // 30bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -89296,7 +89296,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89337,7 +89337,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89470,7 +89470,7 @@ void m68008_device::move_w_imm16_aid_dp8() // 30bc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89565,7 +89565,7 @@ void m68008_device::move_w_ds_aipd_dp8() // 30c0 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89659,7 +89659,7 @@ void m68008_device::move_w_as_aipd_dp8() // 30c8 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89750,7 +89750,7 @@ void m68008_device::move_w_ais_aipd_dp8() // 30d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89792,7 +89792,7 @@ void m68008_device::move_w_ais_aipd_dp8() // 30d0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89889,7 +89889,7 @@ void m68008_device::move_w_aips_aipd_dp8() // 30d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -89929,7 +89929,7 @@ void m68008_device::move_w_aips_aipd_dp8() // 30d8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90028,7 +90028,7 @@ void m68008_device::move_w_pais_aipd_dp8() // 30e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -90068,7 +90068,7 @@ void m68008_device::move_w_pais_aipd_dp8() // 30e0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90196,7 +90196,7 @@ void m68008_device::move_w_das_aipd_dp8() // 30e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -90238,7 +90238,7 @@ void m68008_device::move_w_das_aipd_dp8() // 30e8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90327,7 +90327,7 @@ void m68008_device::move_w_dais_aipd_dp8() // 30f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -90419,7 +90419,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -90461,7 +90461,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90590,7 +90590,7 @@ void m68008_device::move_w_adr16_aipd_dp8() // 30f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -90630,7 +90630,7 @@ void m68008_device::move_w_adr16_aipd_dp8() // 30f8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90795,7 +90795,7 @@ void m68008_device::move_w_adr32_aipd_dp8() // 30f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -90835,7 +90835,7 @@ void m68008_device::move_w_adr32_aipd_dp8() // 30f9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90962,7 +90962,7 @@ void m68008_device::move_w_dpc_aipd_dp8() // 30fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -91004,7 +91004,7 @@ void m68008_device::move_w_dpc_aipd_dp8() // 30fa f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -91092,7 +91092,7 @@ void m68008_device::move_w_dpci_aipd_dp8() // 30fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -91184,7 +91184,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -91226,7 +91226,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -91358,7 +91358,7 @@ void m68008_device::move_w_imm16_aipd_dp8() // 30fc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -91451,7 +91451,7 @@ void m68008_device::move_w_ds_paid_dp8() // 3100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91545,7 +91545,7 @@ void m68008_device::move_w_as_paid_dp8() // 3108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91637,7 +91637,7 @@ void m68008_device::move_w_ais_paid_dp8() // 3110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -91678,7 +91678,7 @@ void m68008_device::move_w_ais_paid_dp8() // 3110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91776,7 +91776,7 @@ void m68008_device::move_w_aips_paid_dp8() // 3118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -91815,7 +91815,7 @@ void m68008_device::move_w_aips_paid_dp8() // 3118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91915,7 +91915,7 @@ void m68008_device::move_w_pais_paid_dp8() // 3120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -91954,7 +91954,7 @@ void m68008_device::move_w_pais_paid_dp8() // 3120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92083,7 +92083,7 @@ void m68008_device::move_w_das_paid_dp8() // 3128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -92124,7 +92124,7 @@ void m68008_device::move_w_das_paid_dp8() // 3128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92214,7 +92214,7 @@ void m68008_device::move_w_dais_paid_dp8() // 3130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -92306,7 +92306,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -92347,7 +92347,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92477,7 +92477,7 @@ void m68008_device::move_w_adr16_paid_dp8() // 3138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -92516,7 +92516,7 @@ void m68008_device::move_w_adr16_paid_dp8() // 3138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92682,7 +92682,7 @@ void m68008_device::move_w_adr32_paid_dp8() // 3139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -92721,7 +92721,7 @@ void m68008_device::move_w_adr32_paid_dp8() // 3139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92849,7 +92849,7 @@ void m68008_device::move_w_dpc_paid_dp8() // 313a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -92890,7 +92890,7 @@ void m68008_device::move_w_dpc_paid_dp8() // 313a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92979,7 +92979,7 @@ void m68008_device::move_w_dpci_paid_dp8() // 313b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -93071,7 +93071,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -93112,7 +93112,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93244,7 +93244,7 @@ void m68008_device::move_w_imm16_paid_dp8() // 313c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93374,7 +93374,7 @@ void m68008_device::move_w_ds_dad_dp8() // 3140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -93505,7 +93505,7 @@ void m68008_device::move_w_as_dad_dp8() // 3148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -93598,7 +93598,7 @@ void m68008_device::move_w_ais_dad_dp8() // 3150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -93638,7 +93638,7 @@ void m68008_device::move_w_ais_dad_dp8() // 3150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93778,7 +93778,7 @@ void m68008_device::move_w_aips_dad_dp8() // 3158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -93816,7 +93816,7 @@ void m68008_device::move_w_aips_dad_dp8() // 3158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93958,7 +93958,7 @@ void m68008_device::move_w_pais_dad_dp8() // 3160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -93996,7 +93996,7 @@ void m68008_device::move_w_pais_dad_dp8() // 3160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94167,7 +94167,7 @@ void m68008_device::move_w_das_dad_dp8() // 3168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -94207,7 +94207,7 @@ void m68008_device::move_w_das_dad_dp8() // 3168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94339,7 +94339,7 @@ void m68008_device::move_w_dais_dad_dp8() // 3170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -94431,7 +94431,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -94471,7 +94471,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94643,7 +94643,7 @@ void m68008_device::move_w_adr16_dad_dp8() // 3178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -94681,7 +94681,7 @@ void m68008_device::move_w_adr16_dad_dp8() // 3178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94889,7 +94889,7 @@ void m68008_device::move_w_adr32_dad_dp8() // 3179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -94927,7 +94927,7 @@ void m68008_device::move_w_adr32_dad_dp8() // 3179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -95097,7 +95097,7 @@ void m68008_device::move_w_dpc_dad_dp8() // 317a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -95137,7 +95137,7 @@ void m68008_device::move_w_dpc_dad_dp8() // 317a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -95268,7 +95268,7 @@ void m68008_device::move_w_dpci_dad_dp8() // 317b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -95360,7 +95360,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -95400,7 +95400,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -95610,7 +95610,7 @@ void m68008_device::move_w_imm16_dad_dp8() // 317c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -95701,7 +95701,7 @@ void m68008_device::move_w_ds_daid_dp8() // 3180 f1f8 switch(m_inst_substate) { case 0: // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -95795,7 +95795,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -95886,7 +95886,7 @@ void m68008_device::move_w_as_daid_dp8() // 3188 f1f8 switch(m_inst_substate) { case 0: // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -95980,7 +95980,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -96073,7 +96073,7 @@ void m68008_device::move_w_ais_daid_dp8() // 3190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -96110,7 +96110,7 @@ void m68008_device::move_w_ais_daid_dp8() // 3190 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96125,7 +96125,7 @@ void m68008_device::move_w_ais_daid_dp8() // 3190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96164,7 +96164,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96306,7 +96306,7 @@ void m68008_device::move_w_aips_daid_dp8() // 3198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -96341,7 +96341,7 @@ void m68008_device::move_w_aips_daid_dp8() // 3198 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96356,7 +96356,7 @@ void m68008_device::move_w_aips_daid_dp8() // 3198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96395,7 +96395,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96539,7 +96539,7 @@ void m68008_device::move_w_pais_daid_dp8() // 31a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -96574,7 +96574,7 @@ void m68008_device::move_w_pais_daid_dp8() // 31a0 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96589,7 +96589,7 @@ void m68008_device::move_w_pais_daid_dp8() // 31a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96628,7 +96628,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96801,7 +96801,7 @@ void m68008_device::move_w_das_daid_dp8() // 31a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -96838,7 +96838,7 @@ void m68008_device::move_w_das_daid_dp8() // 31a8 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96853,7 +96853,7 @@ void m68008_device::move_w_das_daid_dp8() // 31a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96892,7 +96892,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97026,7 +97026,7 @@ void m68008_device::move_w_dais_daid_dp8() // 31b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -97118,7 +97118,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -97155,7 +97155,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97170,7 +97170,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97209,7 +97209,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97383,7 +97383,7 @@ void m68008_device::move_w_adr16_daid_dp8() // 31b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -97418,7 +97418,7 @@ void m68008_device::move_w_adr16_daid_dp8() // 31b8 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97433,7 +97433,7 @@ void m68008_device::move_w_adr16_daid_dp8() // 31b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97472,7 +97472,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97682,7 +97682,7 @@ void m68008_device::move_w_adr32_daid_dp8() // 31b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -97717,7 +97717,7 @@ void m68008_device::move_w_adr32_daid_dp8() // 31b9 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97732,7 +97732,7 @@ void m68008_device::move_w_adr32_daid_dp8() // 31b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97771,7 +97771,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97943,7 +97943,7 @@ void m68008_device::move_w_dpc_daid_dp8() // 31ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -97980,7 +97980,7 @@ void m68008_device::move_w_dpc_daid_dp8() // 31ba f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97995,7 +97995,7 @@ void m68008_device::move_w_dpc_daid_dp8() // 31ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98034,7 +98034,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98167,7 +98167,7 @@ void m68008_device::move_w_dpci_daid_dp8() // 31bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -98259,7 +98259,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -98296,7 +98296,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -98311,7 +98311,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98350,7 +98350,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98522,7 +98522,7 @@ void m68008_device::move_w_imm16_daid_dp8() // 31bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -98616,7 +98616,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -98710,7 +98710,7 @@ void m68008_device::move_w_ds_adr16_dp8() // 31c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98845,7 +98845,7 @@ void m68008_device::move_w_as_adr16_dp8() // 31c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98978,7 +98978,7 @@ void m68008_device::move_w_ais_adr16_dp8() // 31d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -99018,7 +99018,7 @@ void m68008_device::move_w_ais_adr16_dp8() // 31d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99157,7 +99157,7 @@ void m68008_device::move_w_aips_adr16_dp8() // 31d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -99195,7 +99195,7 @@ void m68008_device::move_w_aips_adr16_dp8() // 31d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99336,7 +99336,7 @@ void m68008_device::move_w_pais_adr16_dp8() // 31e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -99374,7 +99374,7 @@ void m68008_device::move_w_pais_adr16_dp8() // 31e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99544,7 +99544,7 @@ void m68008_device::move_w_das_adr16_dp8() // 31e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -99584,7 +99584,7 @@ void m68008_device::move_w_das_adr16_dp8() // 31e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99715,7 +99715,7 @@ void m68008_device::move_w_dais_adr16_dp8() // 31f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -99807,7 +99807,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -99847,7 +99847,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100018,7 +100018,7 @@ void m68008_device::move_w_adr16_adr16_dp8() // 31f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -100056,7 +100056,7 @@ void m68008_device::move_w_adr16_adr16_dp8() // 31f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100263,7 +100263,7 @@ void m68008_device::move_w_adr32_adr16_dp8() // 31f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -100301,7 +100301,7 @@ void m68008_device::move_w_adr32_adr16_dp8() // 31f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100470,7 +100470,7 @@ void m68008_device::move_w_dpc_adr16_dp8() // 31fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -100510,7 +100510,7 @@ void m68008_device::move_w_dpc_adr16_dp8() // 31fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100640,7 +100640,7 @@ void m68008_device::move_w_dpci_adr16_dp8() // 31fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -100732,7 +100732,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -100772,7 +100772,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100945,7 +100945,7 @@ void m68008_device::move_w_imm16_adr16_dp8() // 31fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101116,7 +101116,7 @@ void m68008_device::move_w_ds_adr32_dp8() // 33c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101287,7 +101287,7 @@ void m68008_device::move_w_as_adr32_dp8() // 33c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101420,7 +101420,7 @@ void m68008_device::move_w_ais_adr32_dp8() // 33d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -101460,7 +101460,7 @@ void m68008_device::move_w_ais_adr32_dp8() // 33d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101634,7 +101634,7 @@ void m68008_device::move_w_aips_adr32_dp8() // 33d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -101672,7 +101672,7 @@ void m68008_device::move_w_aips_adr32_dp8() // 33d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101848,7 +101848,7 @@ void m68008_device::move_w_pais_adr32_dp8() // 33e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -101886,7 +101886,7 @@ void m68008_device::move_w_pais_adr32_dp8() // 33e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102091,7 +102091,7 @@ void m68008_device::move_w_das_adr32_dp8() // 33e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -102131,7 +102131,7 @@ void m68008_device::move_w_das_adr32_dp8() // 33e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102297,7 +102297,7 @@ void m68008_device::move_w_dais_adr32_dp8() // 33f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -102389,7 +102389,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -102429,7 +102429,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102635,7 +102635,7 @@ void m68008_device::move_w_adr16_adr32_dp8() // 33f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -102673,7 +102673,7 @@ void m68008_device::move_w_adr16_adr32_dp8() // 33f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102915,7 +102915,7 @@ void m68008_device::move_w_adr32_adr32_dp8() // 33f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -102953,7 +102953,7 @@ void m68008_device::move_w_adr32_adr32_dp8() // 33f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103157,7 +103157,7 @@ void m68008_device::move_w_dpc_adr32_dp8() // 33fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -103197,7 +103197,7 @@ void m68008_device::move_w_dpc_adr32_dp8() // 33fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103362,7 +103362,7 @@ void m68008_device::move_w_dpci_adr32_dp8() // 33fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -103454,7 +103454,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -103494,7 +103494,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103738,7 +103738,7 @@ void m68008_device::move_w_imm16_adr32_dp8() // 33fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103873,7 +103873,7 @@ void m68008_device::negx_b_ds_dp8() // 4000 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0 alu_subx8(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -103931,7 +103931,7 @@ void m68008_device::negx_b_ais_dp8() // 4010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103954,7 +103954,7 @@ void m68008_device::negx_b_ais_dp8() // 4010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104032,7 +104032,7 @@ void m68008_device::negx_b_aips_dp8() // 4018 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -104053,7 +104053,7 @@ void m68008_device::negx_b_aips_dp8() // 4018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104133,7 +104133,7 @@ void m68008_device::negx_b_pais_dp8() // 4020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -104154,7 +104154,7 @@ void m68008_device::negx_b_pais_dp8() // 4020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104263,7 +104263,7 @@ void m68008_device::negx_b_das_dp8() // 4028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -104286,7 +104286,7 @@ void m68008_device::negx_b_das_dp8() // 4028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104356,7 +104356,7 @@ void m68008_device::negx_b_dais_dp8() // 4030 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -104448,7 +104448,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -104471,7 +104471,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104581,7 +104581,7 @@ void m68008_device::negx_b_adr16_dp8() // 4038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -104602,7 +104602,7 @@ void m68008_device::negx_b_adr16_dp8() // 4038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104748,7 +104748,7 @@ void m68008_device::negx_b_adr32_dp8() // 4039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -104769,7 +104769,7 @@ void m68008_device::negx_b_adr32_dp8() // 4039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104843,7 +104843,7 @@ void m68008_device::negx_w_ds_dp8() // 4040 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -104901,7 +104901,7 @@ void m68008_device::negx_w_ais_dp8() // 4050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -104942,7 +104942,7 @@ void m68008_device::negx_w_ais_dp8() // 4050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105038,7 +105038,7 @@ void m68008_device::negx_w_aips_dp8() // 4058 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -105077,7 +105077,7 @@ void m68008_device::negx_w_aips_dp8() // 4058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105175,7 +105175,7 @@ void m68008_device::negx_w_pais_dp8() // 4060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -105214,7 +105214,7 @@ void m68008_device::negx_w_pais_dp8() // 4060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105341,7 +105341,7 @@ void m68008_device::negx_w_das_dp8() // 4068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -105382,7 +105382,7 @@ void m68008_device::negx_w_das_dp8() // 4068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105470,7 +105470,7 @@ void m68008_device::negx_w_dais_dp8() // 4070 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -105562,7 +105562,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -105603,7 +105603,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105731,7 +105731,7 @@ void m68008_device::negx_w_adr16_dp8() // 4078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -105770,7 +105770,7 @@ void m68008_device::negx_w_adr16_dp8() // 4078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105934,7 +105934,7 @@ void m68008_device::negx_w_adr32_dp8() // 4079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -105973,7 +105973,7 @@ void m68008_device::negx_w_adr32_dp8() // 4079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106065,12 +106065,12 @@ void m68008_device::negx_l_ds_dp8() // 4080 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106129,7 +106129,7 @@ void m68008_device::negx_l_ais_dp8() // 4090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -106206,7 +106206,7 @@ void m68008_device::negx_l_ais_dp8() // 4090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106246,7 +106246,7 @@ void m68008_device::negx_l_ais_dp8() // 4090 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106334,7 +106334,7 @@ void m68008_device::negx_l_aips_dp8() // 4098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -106414,7 +106414,7 @@ void m68008_device::negx_l_aips_dp8() // 4098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106454,7 +106454,7 @@ void m68008_device::negx_l_aips_dp8() // 4098 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106541,7 +106541,7 @@ void m68008_device::negx_l_pais_dp8() // 40a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -106623,7 +106623,7 @@ void m68008_device::negx_l_pais_dp8() // 40a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106663,7 +106663,7 @@ void m68008_device::negx_l_pais_dp8() // 40a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106787,7 +106787,7 @@ void m68008_device::negx_l_das_dp8() // 40a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -106864,7 +106864,7 @@ void m68008_device::negx_l_das_dp8() // 40a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106904,7 +106904,7 @@ void m68008_device::negx_l_das_dp8() // 40a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106990,7 +106990,7 @@ void m68008_device::negx_l_dais_dp8() // 40b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -107081,7 +107081,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -107158,7 +107158,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107198,7 +107198,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -107324,7 +107324,7 @@ void m68008_device::negx_l_adr16_dp8() // 40b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -107401,7 +107401,7 @@ void m68008_device::negx_l_adr16_dp8() // 40b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107441,7 +107441,7 @@ void m68008_device::negx_l_adr16_dp8() // 40b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -107603,7 +107603,7 @@ void m68008_device::negx_l_adr32_dp8() // 40b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -107680,7 +107680,7 @@ void m68008_device::negx_l_adr32_dp8() // 40b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107720,7 +107720,7 @@ void m68008_device::negx_l_adr32_dp8() // 40b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -107867,7 +107867,7 @@ void m68008_device::move_sr_ais_dp8() // 40d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107910,7 +107910,7 @@ void m68008_device::move_sr_ais_dp8() // 40d0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -108005,7 +108005,7 @@ void m68008_device::move_sr_aips_dp8() // 40d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -108046,7 +108046,7 @@ void m68008_device::move_sr_aips_dp8() // 40d8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -108143,7 +108143,7 @@ void m68008_device::move_sr_pais_dp8() // 40e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -108184,7 +108184,7 @@ void m68008_device::move_sr_pais_dp8() // 40e0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -108310,7 +108310,7 @@ void m68008_device::move_sr_das_dp8() // 40e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108353,7 +108353,7 @@ void m68008_device::move_sr_das_dp8() // 40e8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -108440,7 +108440,7 @@ void m68008_device::move_sr_dais_dp8() // 40f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -108532,7 +108532,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108575,7 +108575,7 @@ adsw2: m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -108702,7 +108702,7 @@ void m68008_device::move_sr_adr16_dp8() // 40f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -108743,7 +108743,7 @@ void m68008_device::move_sr_adr16_dp8() // 40f8 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -108906,7 +108906,7 @@ void m68008_device::move_sr_adr32_dp8() // 40f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -108947,7 +108947,7 @@ void m68008_device::move_sr_adr32_dp8() // 40f9 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -109037,7 +109037,7 @@ void m68008_device::chk_w_ds_dd_dp8() // 4180 f1f8 // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry] alu_sub(m_da[rx], m_da[ry]); sr_nzvc(); m_icount -= 2; @@ -109045,7 +109045,7 @@ void m68008_device::chk_w_ds_dd_dp8() // 4180 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -109063,14 +109063,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -109110,7 +109110,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109148,7 +109148,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -109366,7 +109366,7 @@ void m68008_device::chk_w_ais_dd_dp8() // 4190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -109405,7 +109405,7 @@ void m68008_device::chk_w_ais_dd_dp8() // 4190 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -109413,7 +109413,7 @@ void m68008_device::chk_w_ais_dd_dp8() // 4190 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -109431,14 +109431,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109478,7 +109478,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -109516,7 +109516,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -109740,7 +109740,7 @@ void m68008_device::chk_w_aips_dd_dp8() // 4198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -109777,7 +109777,7 @@ void m68008_device::chk_w_aips_dd_dp8() // 4198 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -109785,7 +109785,7 @@ void m68008_device::chk_w_aips_dd_dp8() // 4198 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -109803,14 +109803,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109850,7 +109850,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -109888,7 +109888,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -110114,7 +110114,7 @@ void m68008_device::chk_w_pais_dd_dp8() // 41a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -110151,7 +110151,7 @@ void m68008_device::chk_w_pais_dd_dp8() // 41a0 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -110159,7 +110159,7 @@ void m68008_device::chk_w_pais_dd_dp8() // 41a0 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -110177,14 +110177,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110224,7 +110224,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110262,7 +110262,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -110517,7 +110517,7 @@ void m68008_device::chk_w_das_dd_dp8() // 41a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -110556,7 +110556,7 @@ void m68008_device::chk_w_das_dd_dp8() // 41a8 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -110564,7 +110564,7 @@ void m68008_device::chk_w_das_dd_dp8() // 41a8 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -110582,14 +110582,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110629,7 +110629,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -110667,7 +110667,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -110883,7 +110883,7 @@ void m68008_device::chk_w_dais_dd_dp8() // 41b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -110975,7 +110975,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -111014,7 +111014,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -111022,7 +111022,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -111040,14 +111040,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111087,7 +111087,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -111125,7 +111125,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -111381,7 +111381,7 @@ void m68008_device::chk_w_adr16_dd_dp8() // 41b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -111418,7 +111418,7 @@ void m68008_device::chk_w_adr16_dd_dp8() // 41b8 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -111426,7 +111426,7 @@ void m68008_device::chk_w_adr16_dd_dp8() // 41b8 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -111444,14 +111444,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111491,7 +111491,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -111529,7 +111529,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -111821,7 +111821,7 @@ void m68008_device::chk_w_adr32_dd_dp8() // 41b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -111858,7 +111858,7 @@ void m68008_device::chk_w_adr32_dd_dp8() // 41b9 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -111866,7 +111866,7 @@ void m68008_device::chk_w_adr32_dd_dp8() // 41b9 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -111884,14 +111884,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -111931,7 +111931,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -111969,7 +111969,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -112223,7 +112223,7 @@ void m68008_device::chk_w_dpc_dd_dp8() // 41ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -112262,7 +112262,7 @@ void m68008_device::chk_w_dpc_dd_dp8() // 41ba f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -112270,7 +112270,7 @@ void m68008_device::chk_w_dpc_dd_dp8() // 41ba f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -112288,14 +112288,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112335,7 +112335,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112373,7 +112373,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -112588,7 +112588,7 @@ void m68008_device::chk_w_dpci_dd_dp8() // 41bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -112680,7 +112680,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -112719,7 +112719,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -112727,7 +112727,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -112745,14 +112745,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112792,7 +112792,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112830,7 +112830,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -113086,7 +113086,7 @@ void m68008_device::chk_w_imm16_dd_dp8() // 41bc f1ff // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt alu_sub(m_da[rx], m_dt); sr_nzvc(); m_icount -= 2; @@ -113094,7 +113094,7 @@ void m68008_device::chk_w_imm16_dd_dp8() // 41bc f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -113112,14 +113112,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113159,7 +113159,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -113197,7 +113197,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -113567,7 +113567,7 @@ void m68008_device::lea_dais_ad_dp8() // 41f0 f1f8 switch(m_inst_substate) { case 0: // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -114028,7 +114028,7 @@ void m68008_device::lea_dpci_ad_dp8() // 41fb f1ff switch(m_inst_substate) { case 0: // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -114180,7 +114180,7 @@ void m68008_device::clr_b_ds_dp8() // 4200 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0 alu_and8(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -114188,7 +114188,7 @@ void m68008_device::clr_b_ds_dp8() // 4200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -114239,11 +114239,11 @@ void m68008_device::clr_b_ais_dp8() // 4210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -114263,7 +114263,7 @@ void m68008_device::clr_b_ais_dp8() // 4210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114305,7 +114305,7 @@ void m68008_device::clr_b_ais_dp8() // 4210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -114339,12 +114339,12 @@ void m68008_device::clr_b_aips_dp8() // 4218 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -114365,7 +114365,7 @@ void m68008_device::clr_b_aips_dp8() // 4218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114407,7 +114407,7 @@ void m68008_device::clr_b_aips_dp8() // 4218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -114440,7 +114440,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -114448,7 +114448,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -114469,7 +114469,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114511,7 +114511,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -114542,7 +114542,7 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -114580,11 +114580,11 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -114604,7 +114604,7 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114646,7 +114646,7 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -114675,14 +114675,14 @@ void m68008_device::clr_b_dais_dp8() // 4230 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -114690,7 +114690,7 @@ void m68008_device::clr_b_dais_dp8() // 4230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -114729,7 +114729,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -114770,11 +114770,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -114794,7 +114794,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114836,7 +114836,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -114869,7 +114869,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -114907,7 +114907,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -114928,7 +114928,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114970,7 +114970,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -115001,7 +115001,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -115040,7 +115040,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -115078,7 +115078,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -115099,7 +115099,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115141,7 +115141,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -115174,7 +115174,7 @@ void m68008_device::clr_w_ds_dp8() // 4240 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -115182,7 +115182,7 @@ void m68008_device::clr_w_ds_dp8() // 4240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -115233,11 +115233,11 @@ void m68008_device::clr_w_ais_dp8() // 4250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -115275,7 +115275,7 @@ void m68008_device::clr_w_ais_dp8() // 4250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115317,7 +115317,7 @@ void m68008_device::clr_w_ais_dp8() // 4250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -115369,12 +115369,12 @@ void m68008_device::clr_w_aips_dp8() // 4258 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -115413,7 +115413,7 @@ void m68008_device::clr_w_aips_dp8() // 4258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115455,7 +115455,7 @@ void m68008_device::clr_w_aips_dp8() // 4258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -115506,7 +115506,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -115514,7 +115514,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -115553,7 +115553,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115595,7 +115595,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -115644,7 +115644,7 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -115682,11 +115682,11 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -115724,7 +115724,7 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115766,7 +115766,7 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -115813,14 +115813,14 @@ void m68008_device::clr_w_dais_dp8() // 4270 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -115828,7 +115828,7 @@ void m68008_device::clr_w_dais_dp8() // 4270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -115867,7 +115867,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -115908,11 +115908,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -115950,7 +115950,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115992,7 +115992,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -116043,7 +116043,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -116081,7 +116081,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -116120,7 +116120,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116162,7 +116162,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -116211,7 +116211,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -116250,7 +116250,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -116288,7 +116288,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -116327,7 +116327,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116369,7 +116369,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -116420,12 +116420,12 @@ void m68008_device::clr_l_ds_dp8() // 4280 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0 alu_and(high16(m_da[ry]), 0x0000); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116466,7 +116466,7 @@ void m68008_device::clr_l_ds_dp8() // 4280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -116485,7 +116485,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -116525,7 +116525,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -116563,7 +116563,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116603,7 +116603,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -116643,7 +116643,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -116692,7 +116692,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -116732,11 +116732,11 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -116774,7 +116774,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116814,7 +116814,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -116854,7 +116854,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -116902,14 +116902,14 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -116948,7 +116948,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -116986,7 +116986,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117026,7 +117026,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117066,7 +117066,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -117115,7 +117115,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -117152,7 +117152,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -117192,7 +117192,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -117230,7 +117230,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117270,7 +117270,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117310,7 +117310,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -117357,14 +117357,14 @@ void m68008_device::clr_l_dais_dp8() // 42b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -117372,7 +117372,7 @@ void m68008_device::clr_l_dais_dp8() // 42b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -117411,7 +117411,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -117451,7 +117451,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -117491,7 +117491,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -117529,7 +117529,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117569,7 +117569,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117609,7 +117609,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -117660,7 +117660,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -117698,7 +117698,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -117738,7 +117738,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -117776,7 +117776,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117816,7 +117816,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117856,7 +117856,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -117905,7 +117905,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -117944,7 +117944,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -117982,7 +117982,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -118022,7 +118022,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -118060,7 +118060,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118100,7 +118100,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -118140,7 +118140,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -118191,7 +118191,7 @@ void m68008_device::neg_b_ds_dp8() // 4400 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0 alu_sub8(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -118249,7 +118249,7 @@ void m68008_device::neg_b_ais_dp8() // 4410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -118272,7 +118272,7 @@ void m68008_device::neg_b_ais_dp8() // 4410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118350,7 +118350,7 @@ void m68008_device::neg_b_aips_dp8() // 4418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -118371,7 +118371,7 @@ void m68008_device::neg_b_aips_dp8() // 4418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118451,7 +118451,7 @@ void m68008_device::neg_b_pais_dp8() // 4420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -118472,7 +118472,7 @@ void m68008_device::neg_b_pais_dp8() // 4420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118581,7 +118581,7 @@ void m68008_device::neg_b_das_dp8() // 4428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -118604,7 +118604,7 @@ void m68008_device::neg_b_das_dp8() // 4428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118674,7 +118674,7 @@ void m68008_device::neg_b_dais_dp8() // 4430 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -118766,7 +118766,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -118789,7 +118789,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118899,7 +118899,7 @@ void m68008_device::neg_b_adr16_dp8() // 4438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -118920,7 +118920,7 @@ void m68008_device::neg_b_adr16_dp8() // 4438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119066,7 +119066,7 @@ void m68008_device::neg_b_adr32_dp8() // 4439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -119087,7 +119087,7 @@ void m68008_device::neg_b_adr32_dp8() // 4439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119161,7 +119161,7 @@ void m68008_device::neg_w_ds_dp8() // 4440 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -119219,7 +119219,7 @@ void m68008_device::neg_w_ais_dp8() // 4450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -119260,7 +119260,7 @@ void m68008_device::neg_w_ais_dp8() // 4450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119356,7 +119356,7 @@ void m68008_device::neg_w_aips_dp8() // 4458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -119395,7 +119395,7 @@ void m68008_device::neg_w_aips_dp8() // 4458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119493,7 +119493,7 @@ void m68008_device::neg_w_pais_dp8() // 4460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -119532,7 +119532,7 @@ void m68008_device::neg_w_pais_dp8() // 4460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119659,7 +119659,7 @@ void m68008_device::neg_w_das_dp8() // 4468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -119700,7 +119700,7 @@ void m68008_device::neg_w_das_dp8() // 4468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119788,7 +119788,7 @@ void m68008_device::neg_w_dais_dp8() // 4470 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -119880,7 +119880,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -119921,7 +119921,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120049,7 +120049,7 @@ void m68008_device::neg_w_adr16_dp8() // 4478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -120088,7 +120088,7 @@ void m68008_device::neg_w_adr16_dp8() // 4478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120252,7 +120252,7 @@ void m68008_device::neg_w_adr32_dp8() // 4479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -120291,7 +120291,7 @@ void m68008_device::neg_w_adr32_dp8() // 4479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120383,12 +120383,12 @@ void m68008_device::neg_l_ds_dp8() // 4480 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120447,7 +120447,7 @@ void m68008_device::neg_l_ais_dp8() // 4490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -120524,7 +120524,7 @@ void m68008_device::neg_l_ais_dp8() // 4490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120564,7 +120564,7 @@ void m68008_device::neg_l_ais_dp8() // 4490 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -120652,7 +120652,7 @@ void m68008_device::neg_l_aips_dp8() // 4498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -120732,7 +120732,7 @@ void m68008_device::neg_l_aips_dp8() // 4498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120772,7 +120772,7 @@ void m68008_device::neg_l_aips_dp8() // 4498 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -120859,7 +120859,7 @@ void m68008_device::neg_l_pais_dp8() // 44a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -120941,7 +120941,7 @@ void m68008_device::neg_l_pais_dp8() // 44a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120981,7 +120981,7 @@ void m68008_device::neg_l_pais_dp8() // 44a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121105,7 +121105,7 @@ void m68008_device::neg_l_das_dp8() // 44a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -121182,7 +121182,7 @@ void m68008_device::neg_l_das_dp8() // 44a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -121222,7 +121222,7 @@ void m68008_device::neg_l_das_dp8() // 44a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121308,7 +121308,7 @@ void m68008_device::neg_l_dais_dp8() // 44b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -121399,7 +121399,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -121476,7 +121476,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -121516,7 +121516,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121642,7 +121642,7 @@ void m68008_device::neg_l_adr16_dp8() // 44b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -121719,7 +121719,7 @@ void m68008_device::neg_l_adr16_dp8() // 44b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -121759,7 +121759,7 @@ void m68008_device::neg_l_adr16_dp8() // 44b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121921,7 +121921,7 @@ void m68008_device::neg_l_adr32_dp8() // 44b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -121998,7 +121998,7 @@ void m68008_device::neg_l_adr32_dp8() // 44b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -122038,7 +122038,7 @@ void m68008_device::neg_l_adr32_dp8() // 44b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -122228,7 +122228,7 @@ void m68008_device::move_ais_ccr_dp8() // 44d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -122375,7 +122375,7 @@ void m68008_device::move_aips_ccr_dp8() // 44d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -122522,7 +122522,7 @@ void m68008_device::move_pais_ccr_dp8() // 44e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -122698,7 +122698,7 @@ void m68008_device::move_das_ccr_dp8() // 44e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -122837,7 +122837,7 @@ void m68008_device::move_dais_ccr_dp8() // 44f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -122929,7 +122929,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -123108,7 +123108,7 @@ void m68008_device::move_adr16_ccr_dp8() // 44f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -123321,7 +123321,7 @@ void m68008_device::move_adr32_ccr_dp8() // 44f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -123496,7 +123496,7 @@ void m68008_device::move_dpc_ccr_dp8() // 44fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -123634,7 +123634,7 @@ void m68008_device::move_dpci_ccr_dp8() // 44fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -123726,7 +123726,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124009,7 +124009,7 @@ void m68008_device::not_b_ds_dp8() // 4600 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0 alu_not8(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -124067,7 +124067,7 @@ void m68008_device::not_b_ais_dp8() // 4610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124090,7 +124090,7 @@ void m68008_device::not_b_ais_dp8() // 4610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124168,7 +124168,7 @@ void m68008_device::not_b_aips_dp8() // 4618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -124189,7 +124189,7 @@ void m68008_device::not_b_aips_dp8() // 4618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124269,7 +124269,7 @@ void m68008_device::not_b_pais_dp8() // 4620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -124290,7 +124290,7 @@ void m68008_device::not_b_pais_dp8() // 4620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124399,7 +124399,7 @@ void m68008_device::not_b_das_dp8() // 4628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124422,7 +124422,7 @@ void m68008_device::not_b_das_dp8() // 4628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124492,7 +124492,7 @@ void m68008_device::not_b_dais_dp8() // 4630 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -124584,7 +124584,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124607,7 +124607,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124717,7 +124717,7 @@ void m68008_device::not_b_adr16_dp8() // 4638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -124738,7 +124738,7 @@ void m68008_device::not_b_adr16_dp8() // 4638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124884,7 +124884,7 @@ void m68008_device::not_b_adr32_dp8() // 4639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -124905,7 +124905,7 @@ void m68008_device::not_b_adr32_dp8() // 4639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124979,7 +124979,7 @@ void m68008_device::not_w_ds_dp8() // 4640 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -125037,7 +125037,7 @@ void m68008_device::not_w_ais_dp8() // 4650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -125078,7 +125078,7 @@ void m68008_device::not_w_ais_dp8() // 4650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125174,7 +125174,7 @@ void m68008_device::not_w_aips_dp8() // 4658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -125213,7 +125213,7 @@ void m68008_device::not_w_aips_dp8() // 4658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125311,7 +125311,7 @@ void m68008_device::not_w_pais_dp8() // 4660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -125350,7 +125350,7 @@ void m68008_device::not_w_pais_dp8() // 4660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125477,7 +125477,7 @@ void m68008_device::not_w_das_dp8() // 4668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -125518,7 +125518,7 @@ void m68008_device::not_w_das_dp8() // 4668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125606,7 +125606,7 @@ void m68008_device::not_w_dais_dp8() // 4670 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -125698,7 +125698,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -125739,7 +125739,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125867,7 +125867,7 @@ void m68008_device::not_w_adr16_dp8() // 4678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -125906,7 +125906,7 @@ void m68008_device::not_w_adr16_dp8() // 4678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126070,7 +126070,7 @@ void m68008_device::not_w_adr32_dp8() // 4679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -126109,7 +126109,7 @@ void m68008_device::not_w_adr32_dp8() // 4679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126201,12 +126201,12 @@ void m68008_device::not_l_ds_dp8() // 4680 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0 alu_not(high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126265,7 +126265,7 @@ void m68008_device::not_l_ais_dp8() // 4690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -126342,7 +126342,7 @@ void m68008_device::not_l_ais_dp8() // 4690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126382,7 +126382,7 @@ void m68008_device::not_l_ais_dp8() // 4690 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -126470,7 +126470,7 @@ void m68008_device::not_l_aips_dp8() // 4698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -126550,7 +126550,7 @@ void m68008_device::not_l_aips_dp8() // 4698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126590,7 +126590,7 @@ void m68008_device::not_l_aips_dp8() // 4698 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -126677,7 +126677,7 @@ void m68008_device::not_l_pais_dp8() // 46a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -126759,7 +126759,7 @@ void m68008_device::not_l_pais_dp8() // 46a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126799,7 +126799,7 @@ void m68008_device::not_l_pais_dp8() // 46a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -126923,7 +126923,7 @@ void m68008_device::not_l_das_dp8() // 46a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -127000,7 +127000,7 @@ void m68008_device::not_l_das_dp8() // 46a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127040,7 +127040,7 @@ void m68008_device::not_l_das_dp8() // 46a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -127126,7 +127126,7 @@ void m68008_device::not_l_dais_dp8() // 46b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -127217,7 +127217,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -127294,7 +127294,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127334,7 +127334,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -127460,7 +127460,7 @@ void m68008_device::not_l_adr16_dp8() // 46b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -127537,7 +127537,7 @@ void m68008_device::not_l_adr16_dp8() // 46b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127577,7 +127577,7 @@ void m68008_device::not_l_adr16_dp8() // 46b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -127739,7 +127739,7 @@ void m68008_device::not_l_adr32_dp8() // 46b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -127816,7 +127816,7 @@ void m68008_device::not_l_adr32_dp8() // 46b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127856,7 +127856,7 @@ void m68008_device::not_l_adr32_dp8() // 46b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -128056,7 +128056,7 @@ void m68008_device::move_ais_sr_dp8() // 46d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -128209,7 +128209,7 @@ void m68008_device::move_aips_sr_dp8() // 46d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -128362,7 +128362,7 @@ void m68008_device::move_pais_sr_dp8() // 46e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -128544,7 +128544,7 @@ void m68008_device::move_das_sr_dp8() // 46e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -128689,7 +128689,7 @@ void m68008_device::move_dais_sr_dp8() // 46f0 fff8 return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -128781,7 +128781,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -128966,7 +128966,7 @@ void m68008_device::move_adr16_sr_dp8() // 46f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -129185,7 +129185,7 @@ void m68008_device::move_adr32_sr_dp8() // 46f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -129366,7 +129366,7 @@ void m68008_device::move_dpc_sr_dp8() // 46fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -129510,7 +129510,7 @@ void m68008_device::move_dpci_sr_dp8() // 46fb ffff return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -129602,7 +129602,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -129893,12 +129893,12 @@ void m68008_device::nbcd_b_ds_dp8() // 4800 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0 alu_sbcd8(m_da[ry], 0x0000); sr_xnzvc_u(); // 117 nbcr2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -129955,7 +129955,7 @@ void m68008_device::nbcd_b_ais_dp8() // 4810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -129977,12 +129977,12 @@ void m68008_device::nbcd_b_ais_dp8() // 4810 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130058,7 +130058,7 @@ void m68008_device::nbcd_b_aips_dp8() // 4818 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -130078,12 +130078,12 @@ void m68008_device::nbcd_b_aips_dp8() // 4818 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130161,7 +130161,7 @@ void m68008_device::nbcd_b_pais_dp8() // 4820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -130181,12 +130181,12 @@ void m68008_device::nbcd_b_pais_dp8() // 4820 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130293,7 +130293,7 @@ void m68008_device::nbcd_b_das_dp8() // 4828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -130315,12 +130315,12 @@ void m68008_device::nbcd_b_das_dp8() // 4828 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130388,7 +130388,7 @@ void m68008_device::nbcd_b_dais_dp8() // 4830 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -130480,7 +130480,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -130502,12 +130502,12 @@ adsw2: m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130615,7 +130615,7 @@ void m68008_device::nbcd_b_adr16_dp8() // 4838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -130635,12 +130635,12 @@ void m68008_device::nbcd_b_adr16_dp8() // 4838 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130784,7 +130784,7 @@ void m68008_device::nbcd_b_adr32_dp8() // 4839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -130804,12 +130804,12 @@ void m68008_device::nbcd_b_adr32_dp8() // 4839 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -130882,7 +130882,7 @@ void m68008_device::swap_ds_dp8() // 4840 fff8 m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nzvc(); // 342 swap2 @@ -130890,7 +130890,7 @@ void m68008_device::swap_ds_dp8() // 4840 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = merge_16_32(high16(m_at), m_aluo); m_au = m_au + 2; - // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130946,7 +130946,7 @@ void m68008_device::pea_ais_dp8() // 4850 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_da[m_sp] - 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -131072,7 +131072,7 @@ void m68008_device::pea_das_dp8() // 4868 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -131114,7 +131114,7 @@ void m68008_device::pea_das_dp8() // 4868 fff8 m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -131238,7 +131238,7 @@ void m68008_device::pea_dais_dp8() // 4870 fff8 switch(m_inst_substate) { case 0: // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -131329,7 +131329,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -131830,7 +131830,7 @@ void m68008_device::pea_dpc_dp8() // 487a ffff m_aob = m_au; m_at = m_pc; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -131872,7 +131872,7 @@ void m68008_device::pea_dpc_dp8() // 487a ffff m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -131995,7 +131995,7 @@ void m68008_device::pea_dpci_dp8() // 487b ffff switch(m_inst_substate) { case 0: // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -132086,7 +132086,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -132219,7 +132219,7 @@ void m68008_device::ext_w_ds_dp8() // 4880 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 + // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0 alu_ext(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -132786,7 +132786,7 @@ void m68008_device::movem_w_list_dais_dp8() // 48b0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -133381,7 +133381,7 @@ void m68008_device::ext_l_ds_dp8() // 48c0 fff8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 233 extr2 @@ -134054,7 +134054,7 @@ void m68008_device::movem_l_list_dais_dp8() // 48f0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -134755,13 +134755,13 @@ void m68008_device::tst_b_ds_dp8() // 4a00 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -134812,11 +134812,11 @@ void m68008_device::tst_b_ais_dp8() // 4a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -134836,13 +134836,13 @@ void m68008_device::tst_b_ais_dp8() // 4a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -134896,12 +134896,12 @@ void m68008_device::tst_b_aips_dp8() // 4a18 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -134922,13 +134922,13 @@ void m68008_device::tst_b_aips_dp8() // 4a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -134981,7 +134981,7 @@ void m68008_device::tst_b_pais_dp8() // 4a20 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -134989,7 +134989,7 @@ void m68008_device::tst_b_pais_dp8() // 4a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -135010,13 +135010,13 @@ void m68008_device::tst_b_pais_dp8() // 4a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135067,7 +135067,7 @@ void m68008_device::tst_b_das_dp8() // 4a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135105,11 +135105,11 @@ void m68008_device::tst_b_das_dp8() // 4a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -135129,13 +135129,13 @@ void m68008_device::tst_b_das_dp8() // 4a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135184,14 +135184,14 @@ void m68008_device::tst_b_dais_dp8() // 4a30 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -135199,7 +135199,7 @@ void m68008_device::tst_b_dais_dp8() // 4a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135238,7 +135238,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135279,11 +135279,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -135303,13 +135303,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135362,7 +135362,7 @@ void m68008_device::tst_b_adr16_dp8() // 4a38 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -135400,7 +135400,7 @@ void m68008_device::tst_b_adr16_dp8() // 4a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -135421,13 +135421,13 @@ void m68008_device::tst_b_adr16_dp8() // 4a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135478,7 +135478,7 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135517,7 +135517,7 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -135555,7 +135555,7 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -135576,13 +135576,13 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135636,13 +135636,13 @@ void m68008_device::tst_w_ds_dp8() // 4a40 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135693,11 +135693,11 @@ void m68008_device::tst_w_ais_dp8() // 4a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -135735,13 +135735,13 @@ void m68008_device::tst_w_ais_dp8() // 4a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135795,12 +135795,12 @@ void m68008_device::tst_w_aips_dp8() // 4a58 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -135839,13 +135839,13 @@ void m68008_device::tst_w_aips_dp8() // 4a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -135898,7 +135898,7 @@ void m68008_device::tst_w_pais_dp8() // 4a60 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -135906,7 +135906,7 @@ void m68008_device::tst_w_pais_dp8() // 4a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -135945,13 +135945,13 @@ void m68008_device::tst_w_pais_dp8() // 4a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136002,7 +136002,7 @@ void m68008_device::tst_w_das_dp8() // 4a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136040,11 +136040,11 @@ void m68008_device::tst_w_das_dp8() // 4a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -136082,13 +136082,13 @@ void m68008_device::tst_w_das_dp8() // 4a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136137,14 +136137,14 @@ void m68008_device::tst_w_dais_dp8() // 4a70 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -136152,7 +136152,7 @@ void m68008_device::tst_w_dais_dp8() // 4a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136191,7 +136191,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136232,11 +136232,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -136274,13 +136274,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136333,7 +136333,7 @@ void m68008_device::tst_w_adr16_dp8() // 4a78 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -136371,7 +136371,7 @@ void m68008_device::tst_w_adr16_dp8() // 4a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -136410,13 +136410,13 @@ void m68008_device::tst_w_adr16_dp8() // 4a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136467,7 +136467,7 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136506,7 +136506,7 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -136544,7 +136544,7 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -136583,13 +136583,13 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -136643,13 +136643,13 @@ void m68008_device::tst_l_ds_dp8() // 4a80 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 362 tsrl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -136702,7 +136702,7 @@ void m68008_device::tst_l_ais_dp8() // 4a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -136742,7 +136742,7 @@ void m68008_device::tst_l_ais_dp8() // 4a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -136780,13 +136780,13 @@ void m68008_device::tst_l_ais_dp8() // 4a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -136839,7 +136839,7 @@ void m68008_device::tst_l_aips_dp8() // 4a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -136879,11 +136879,11 @@ void m68008_device::tst_l_aips_dp8() // 4a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -136921,13 +136921,13 @@ void m68008_device::tst_l_aips_dp8() // 4a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -136979,14 +136979,14 @@ void m68008_device::tst_l_pais_dp8() // 4aa0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -137025,7 +137025,7 @@ void m68008_device::tst_l_pais_dp8() // 4aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -137063,13 +137063,13 @@ void m68008_device::tst_l_pais_dp8() // 4aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137122,7 +137122,7 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137159,7 +137159,7 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -137199,7 +137199,7 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -137237,13 +137237,13 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137294,14 +137294,14 @@ void m68008_device::tst_l_dais_dp8() // 4ab0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -137309,7 +137309,7 @@ void m68008_device::tst_l_dais_dp8() // 4ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137348,7 +137348,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137388,7 +137388,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -137428,7 +137428,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -137466,13 +137466,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137527,7 +137527,7 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -137565,7 +137565,7 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -137605,7 +137605,7 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -137643,13 +137643,13 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137702,7 +137702,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -137741,7 +137741,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -137779,7 +137779,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -137819,7 +137819,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -137857,13 +137857,13 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137918,14 +137918,14 @@ void m68008_device::tas_ds_dp8() // 4ac0 fff8 m_ir = m_irc; m_alub = m_da[ry]; m_pc = m_au; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1 alu_and8(m_alub, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137978,11 +137978,11 @@ void m68008_device::tas_ais_dp8() // 4ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -137997,14 +137997,14 @@ void m68008_device::tas_ais_dp8() // 4ad0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138028,11 +138028,11 @@ void m68008_device::tas_ais_dp8() // 4ad0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138086,12 +138086,12 @@ void m68008_device::tas_aips_dp8() // 4ad8 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -138107,14 +138107,14 @@ void m68008_device::tas_aips_dp8() // 4ad8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138138,11 +138138,11 @@ void m68008_device::tas_aips_dp8() // 4ad8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138195,7 +138195,7 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -138203,7 +138203,7 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -138219,14 +138219,14 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138250,11 +138250,11 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138305,7 +138305,7 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138343,11 +138343,11 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -138362,14 +138362,14 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138393,11 +138393,11 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138446,14 +138446,14 @@ void m68008_device::tas_dais_dp8() // 4af0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -138461,7 +138461,7 @@ void m68008_device::tas_dais_dp8() // 4af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138500,7 +138500,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138541,11 +138541,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -138560,14 +138560,14 @@ adsw2: // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138591,11 +138591,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138648,7 +138648,7 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -138686,7 +138686,7 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -138702,14 +138702,14 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138733,11 +138733,11 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138788,7 +138788,7 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -138827,7 +138827,7 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -138865,7 +138865,7 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -138881,14 +138881,14 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138912,11 +138912,11 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -139583,7 +139583,7 @@ void m68008_device::movem_w_dais_list_dp8() // 4cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -139671,7 +139671,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -140540,7 +140540,7 @@ void m68008_device::movem_w_dpci_list_dp8() // 4cbb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -140628,7 +140628,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -141497,7 +141497,7 @@ void m68008_device::movem_l_dais_list_dp8() // 4cf0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -141585,7 +141585,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -142598,7 +142598,7 @@ void m68008_device::movem_l_dpci_list_dp8() // 4cfb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -142686,7 +142686,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -142872,14 +142872,14 @@ void m68008_device::trap_imm4_dp8() // 4e40 fff0 update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -142919,7 +142919,7 @@ void m68008_device::trap_imm4_dp8() // 4e40 fff0 m_da[16] = m_au; m_ftu = 0x80 | ((m_ird & 0xf) << 2); m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -142957,7 +142957,7 @@ void m68008_device::trap_imm4_dp8() // 4e40 fff0 m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -143158,7 +143158,7 @@ void m68008_device::link_as_imm16_dp8() // 4e50 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 2b5 link2 m_pc = m_au; @@ -143586,7 +143586,7 @@ void m68008_device::reset_dp8() // 4e70 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 27b rset2 @@ -143724,7 +143724,7 @@ void m68008_device::stop_i16u_dp8() // 4e72 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 327 aaa01 @@ -143755,7 +143755,7 @@ void m68008_device::rte_dp8() // 4e73 ffff if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1); m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -143848,9 +143848,6 @@ void m68008_device::rte_dp8() // 4e73 ffff return; } [[fallthrough]]; case 10: - m_sr = m_new_sr; - update_user_super(); - update_interrupt(); [[fallthrough]]; case 11: m_edb |= m_program8.read_interruptible(m_aob | 1); m_icount -= 4; @@ -143965,7 +143962,7 @@ void m68008_device::rts_dp8() // 4e75 ffff // 126 rts1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -144186,7 +144183,7 @@ trpv3: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -144224,7 +144221,7 @@ trpv3: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -144264,7 +144261,7 @@ trpv3: m_da[16] = m_au; m_ftu = 0x001c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -144302,7 +144299,7 @@ trpv3: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -144501,7 +144498,7 @@ void m68008_device::rtr_dp8() // 4e77 ffff // 12a rtr1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -145036,7 +145033,7 @@ void m68008_device::jsr_dais_dp8() // 4eb0 fff8 switch(m_inst_substate) { case 0: // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -145756,7 +145753,7 @@ void m68008_device::jsr_dpci_dp8() // 4ebb ffff switch(m_inst_substate) { case 0: // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -146129,7 +146126,7 @@ void m68008_device::jmp_dais_dp8() // 4ef0 fff8 switch(m_inst_substate) { case 0: // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -146552,7 +146549,7 @@ void m68008_device::jmp_dpci_dp8() // 4efb ffff switch(m_inst_substate) { case 0: // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -146670,7 +146667,7 @@ void m68008_device::addq_b_imm3_ds_dp8() // 5000 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -146728,7 +146725,7 @@ void m68008_device::addq_b_imm3_ais_dp8() // 5010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -146752,7 +146749,7 @@ void m68008_device::addq_b_imm3_ais_dp8() // 5010 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -146830,7 +146827,7 @@ void m68008_device::addq_b_imm3_aips_dp8() // 5018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -146852,7 +146849,7 @@ void m68008_device::addq_b_imm3_aips_dp8() // 5018 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -146932,7 +146929,7 @@ void m68008_device::addq_b_imm3_pais_dp8() // 5020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -146954,7 +146951,7 @@ void m68008_device::addq_b_imm3_pais_dp8() // 5020 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147063,7 +147060,7 @@ void m68008_device::addq_b_imm3_das_dp8() // 5028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -147087,7 +147084,7 @@ void m68008_device::addq_b_imm3_das_dp8() // 5028 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147157,7 +147154,7 @@ void m68008_device::addq_b_imm3_dais_dp8() // 5030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -147249,7 +147246,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -147273,7 +147270,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147383,7 +147380,7 @@ void m68008_device::addq_b_imm3_adr16_dp8() // 5038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -147405,7 +147402,7 @@ void m68008_device::addq_b_imm3_adr16_dp8() // 5038 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147551,7 +147548,7 @@ void m68008_device::addq_b_imm3_adr32_dp8() // 5039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -147573,7 +147570,7 @@ void m68008_device::addq_b_imm3_adr32_dp8() // 5039 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147647,7 +147644,7 @@ void m68008_device::addq_w_imm3_ds_dp8() // 5040 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -147707,7 +147704,7 @@ void m68008_device::addq_w_imm3_as_dp8() // 5048 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -147745,7 +147742,7 @@ void m68008_device::addq_w_imm3_as_dp8() // 5048 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -147771,7 +147768,7 @@ void m68008_device::addq_w_imm3_ais_dp8() // 5050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -147813,7 +147810,7 @@ void m68008_device::addq_w_imm3_ais_dp8() // 5050 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147909,7 +147906,7 @@ void m68008_device::addq_w_imm3_aips_dp8() // 5058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -147949,7 +147946,7 @@ void m68008_device::addq_w_imm3_aips_dp8() // 5058 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148047,7 +148044,7 @@ void m68008_device::addq_w_imm3_pais_dp8() // 5060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -148087,7 +148084,7 @@ void m68008_device::addq_w_imm3_pais_dp8() // 5060 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148214,7 +148211,7 @@ void m68008_device::addq_w_imm3_das_dp8() // 5068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -148256,7 +148253,7 @@ void m68008_device::addq_w_imm3_das_dp8() // 5068 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148344,7 +148341,7 @@ void m68008_device::addq_w_imm3_dais_dp8() // 5070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -148436,7 +148433,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -148478,7 +148475,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148606,7 +148603,7 @@ void m68008_device::addq_w_imm3_adr16_dp8() // 5078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -148646,7 +148643,7 @@ void m68008_device::addq_w_imm3_adr16_dp8() // 5078 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148810,7 +148807,7 @@ void m68008_device::addq_w_imm3_adr32_dp8() // 5079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -148850,7 +148847,7 @@ void m68008_device::addq_w_imm3_adr32_dp8() // 5079 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148942,7 +148939,7 @@ void m68008_device::addq_l_imm3_ds_dp8() // 5080 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -148981,7 +148978,7 @@ void m68008_device::addq_l_imm3_ds_dp8() // 5080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -149010,7 +149007,7 @@ void m68008_device::addq_l_imm3_as_dp8() // 5088 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -149048,7 +149045,7 @@ void m68008_device::addq_l_imm3_as_dp8() // 5088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -149074,7 +149071,7 @@ void m68008_device::addq_l_imm3_ais_dp8() // 5090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -149152,7 +149149,7 @@ void m68008_device::addq_l_imm3_ais_dp8() // 5090 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149192,7 +149189,7 @@ void m68008_device::addq_l_imm3_ais_dp8() // 5090 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149280,7 +149277,7 @@ void m68008_device::addq_l_imm3_aips_dp8() // 5098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -149361,7 +149358,7 @@ void m68008_device::addq_l_imm3_aips_dp8() // 5098 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149401,7 +149398,7 @@ void m68008_device::addq_l_imm3_aips_dp8() // 5098 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149488,7 +149485,7 @@ void m68008_device::addq_l_imm3_pais_dp8() // 50a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -149571,7 +149568,7 @@ void m68008_device::addq_l_imm3_pais_dp8() // 50a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149611,7 +149608,7 @@ void m68008_device::addq_l_imm3_pais_dp8() // 50a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149735,7 +149732,7 @@ void m68008_device::addq_l_imm3_das_dp8() // 50a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -149813,7 +149810,7 @@ void m68008_device::addq_l_imm3_das_dp8() // 50a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149853,7 +149850,7 @@ void m68008_device::addq_l_imm3_das_dp8() // 50a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149939,7 +149936,7 @@ void m68008_device::addq_l_imm3_dais_dp8() // 50b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -150030,7 +150027,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -150108,7 +150105,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -150148,7 +150145,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -150274,7 +150271,7 @@ void m68008_device::addq_l_imm3_adr16_dp8() // 50b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -150352,7 +150349,7 @@ void m68008_device::addq_l_imm3_adr16_dp8() // 50b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -150392,7 +150389,7 @@ void m68008_device::addq_l_imm3_adr16_dp8() // 50b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -150554,7 +150551,7 @@ void m68008_device::addq_l_imm3_adr32_dp8() // 50b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -150632,7 +150629,7 @@ void m68008_device::addq_l_imm3_adr32_dp8() // 50b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -150672,7 +150669,7 @@ void m68008_device::addq_l_imm3_adr32_dp8() // 50b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -150762,7 +150759,7 @@ void m68008_device::st_ds_dp8() // 50c0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -150774,7 +150771,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150817,7 +150814,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -150857,7 +150854,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -150876,7 +150873,7 @@ void m68008_device::dbt_ds_rel16_dp8() // 50c8 fff8 // 06c dbcc1 m_t = 1; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -150888,13 +150885,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -150937,7 +150934,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -150945,7 +150942,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -150984,11 +150981,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151034,13 +151031,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151086,7 +151083,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151135,11 +151132,11 @@ void m68008_device::st_ais_dp8() // 50d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -151159,7 +151156,7 @@ void m68008_device::st_ais_dp8() // 50d0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151169,7 +151166,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151208,7 +151205,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -151251,7 +151248,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -151285,12 +151282,12 @@ void m68008_device::st_aips_dp8() // 50d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -151311,7 +151308,7 @@ void m68008_device::st_aips_dp8() // 50d8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151321,7 +151318,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151360,7 +151357,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -151403,7 +151400,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -151436,7 +151433,7 @@ void m68008_device::st_pais_dp8() // 50e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -151444,7 +151441,7 @@ void m68008_device::st_pais_dp8() // 50e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -151465,7 +151462,7 @@ void m68008_device::st_pais_dp8() // 50e0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151475,7 +151472,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151514,7 +151511,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -151557,7 +151554,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -151588,7 +151585,7 @@ void m68008_device::st_das_dp8() // 50e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151626,11 +151623,11 @@ void m68008_device::st_das_dp8() // 50e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -151650,7 +151647,7 @@ void m68008_device::st_das_dp8() // 50e8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151660,7 +151657,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151699,7 +151696,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -151742,7 +151739,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -151771,14 +151768,14 @@ void m68008_device::st_dais_dp8() // 50f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -151786,7 +151783,7 @@ void m68008_device::st_dais_dp8() // 50f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151825,7 +151822,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151866,11 +151863,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -151890,7 +151887,7 @@ adsw2: m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151900,7 +151897,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -151939,7 +151936,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -151982,7 +151979,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -152015,7 +152012,7 @@ void m68008_device::st_adr16_dp8() // 50f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -152053,7 +152050,7 @@ void m68008_device::st_adr16_dp8() // 50f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -152074,7 +152071,7 @@ void m68008_device::st_adr16_dp8() // 50f8 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152084,7 +152081,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152123,7 +152120,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -152166,7 +152163,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -152197,7 +152194,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152236,7 +152233,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -152274,7 +152271,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -152295,7 +152292,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152305,7 +152302,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -152344,7 +152341,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -152387,7 +152384,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -152420,7 +152417,7 @@ void m68008_device::subq_b_imm3_ds_dp8() // 5100 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -152478,7 +152475,7 @@ void m68008_device::subq_b_imm3_ais_dp8() // 5110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -152502,7 +152499,7 @@ void m68008_device::subq_b_imm3_ais_dp8() // 5110 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152580,7 +152577,7 @@ void m68008_device::subq_b_imm3_aips_dp8() // 5118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -152602,7 +152599,7 @@ void m68008_device::subq_b_imm3_aips_dp8() // 5118 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152682,7 +152679,7 @@ void m68008_device::subq_b_imm3_pais_dp8() // 5120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -152704,7 +152701,7 @@ void m68008_device::subq_b_imm3_pais_dp8() // 5120 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152813,7 +152810,7 @@ void m68008_device::subq_b_imm3_das_dp8() // 5128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -152837,7 +152834,7 @@ void m68008_device::subq_b_imm3_das_dp8() // 5128 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152907,7 +152904,7 @@ void m68008_device::subq_b_imm3_dais_dp8() // 5130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -152999,7 +152996,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -153023,7 +153020,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153133,7 +153130,7 @@ void m68008_device::subq_b_imm3_adr16_dp8() // 5138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -153155,7 +153152,7 @@ void m68008_device::subq_b_imm3_adr16_dp8() // 5138 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153301,7 +153298,7 @@ void m68008_device::subq_b_imm3_adr32_dp8() // 5139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -153323,7 +153320,7 @@ void m68008_device::subq_b_imm3_adr32_dp8() // 5139 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153397,7 +153394,7 @@ void m68008_device::subq_w_imm3_ds_dp8() // 5140 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -153457,7 +153454,7 @@ void m68008_device::subq_w_imm3_as_dp8() // 5148 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -153495,7 +153492,7 @@ void m68008_device::subq_w_imm3_as_dp8() // 5148 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -153521,7 +153518,7 @@ void m68008_device::subq_w_imm3_ais_dp8() // 5150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -153563,7 +153560,7 @@ void m68008_device::subq_w_imm3_ais_dp8() // 5150 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153659,7 +153656,7 @@ void m68008_device::subq_w_imm3_aips_dp8() // 5158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -153699,7 +153696,7 @@ void m68008_device::subq_w_imm3_aips_dp8() // 5158 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153797,7 +153794,7 @@ void m68008_device::subq_w_imm3_pais_dp8() // 5160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -153837,7 +153834,7 @@ void m68008_device::subq_w_imm3_pais_dp8() // 5160 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153964,7 +153961,7 @@ void m68008_device::subq_w_imm3_das_dp8() // 5168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -154006,7 +154003,7 @@ void m68008_device::subq_w_imm3_das_dp8() // 5168 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154094,7 +154091,7 @@ void m68008_device::subq_w_imm3_dais_dp8() // 5170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -154186,7 +154183,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -154228,7 +154225,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154356,7 +154353,7 @@ void m68008_device::subq_w_imm3_adr16_dp8() // 5178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -154396,7 +154393,7 @@ void m68008_device::subq_w_imm3_adr16_dp8() // 5178 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154560,7 +154557,7 @@ void m68008_device::subq_w_imm3_adr32_dp8() // 5179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -154600,7 +154597,7 @@ void m68008_device::subq_w_imm3_adr32_dp8() // 5179 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154692,7 +154689,7 @@ void m68008_device::subq_l_imm3_ds_dp8() // 5180 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -154731,7 +154728,7 @@ void m68008_device::subq_l_imm3_ds_dp8() // 5180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -154760,7 +154757,7 @@ void m68008_device::subq_l_imm3_as_dp8() // 5188 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -154798,7 +154795,7 @@ void m68008_device::subq_l_imm3_as_dp8() // 5188 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -154824,7 +154821,7 @@ void m68008_device::subq_l_imm3_ais_dp8() // 5190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -154902,7 +154899,7 @@ void m68008_device::subq_l_imm3_ais_dp8() // 5190 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154942,7 +154939,7 @@ void m68008_device::subq_l_imm3_ais_dp8() // 5190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155030,7 +155027,7 @@ void m68008_device::subq_l_imm3_aips_dp8() // 5198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -155111,7 +155108,7 @@ void m68008_device::subq_l_imm3_aips_dp8() // 5198 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155151,7 +155148,7 @@ void m68008_device::subq_l_imm3_aips_dp8() // 5198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155238,7 +155235,7 @@ void m68008_device::subq_l_imm3_pais_dp8() // 51a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -155321,7 +155318,7 @@ void m68008_device::subq_l_imm3_pais_dp8() // 51a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155361,7 +155358,7 @@ void m68008_device::subq_l_imm3_pais_dp8() // 51a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155485,7 +155482,7 @@ void m68008_device::subq_l_imm3_das_dp8() // 51a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -155563,7 +155560,7 @@ void m68008_device::subq_l_imm3_das_dp8() // 51a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155603,7 +155600,7 @@ void m68008_device::subq_l_imm3_das_dp8() // 51a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155689,7 +155686,7 @@ void m68008_device::subq_l_imm3_dais_dp8() // 51b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -155780,7 +155777,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -155858,7 +155855,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155898,7 +155895,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -156024,7 +156021,7 @@ void m68008_device::subq_l_imm3_adr16_dp8() // 51b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -156102,7 +156099,7 @@ void m68008_device::subq_l_imm3_adr16_dp8() // 51b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -156142,7 +156139,7 @@ void m68008_device::subq_l_imm3_adr16_dp8() // 51b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -156304,7 +156301,7 @@ void m68008_device::subq_l_imm3_adr32_dp8() // 51b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -156382,7 +156379,7 @@ void m68008_device::subq_l_imm3_adr32_dp8() // 51b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -156422,7 +156419,7 @@ void m68008_device::subq_l_imm3_adr32_dp8() // 51b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -156512,7 +156509,7 @@ void m68008_device::sf_ds_dp8() // 51c0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -156524,7 +156521,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156567,7 +156564,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -156607,7 +156604,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -156626,7 +156623,7 @@ void m68008_device::dbra_ds_rel16_dp8() // 51c8 fff8 // 06c dbcc1 m_t = 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -156638,13 +156635,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -156687,7 +156684,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156695,7 +156692,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156734,11 +156731,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156784,13 +156781,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156836,7 +156833,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156885,11 +156882,11 @@ void m68008_device::sf_ais_dp8() // 51d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -156909,7 +156906,7 @@ void m68008_device::sf_ais_dp8() // 51d0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156919,7 +156916,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -156958,7 +156955,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -157001,7 +156998,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -157035,12 +157032,12 @@ void m68008_device::sf_aips_dp8() // 51d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -157061,7 +157058,7 @@ void m68008_device::sf_aips_dp8() // 51d8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157071,7 +157068,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157110,7 +157107,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -157153,7 +157150,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -157186,7 +157183,7 @@ void m68008_device::sf_pais_dp8() // 51e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -157194,7 +157191,7 @@ void m68008_device::sf_pais_dp8() // 51e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -157215,7 +157212,7 @@ void m68008_device::sf_pais_dp8() // 51e0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157225,7 +157222,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157264,7 +157261,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -157307,7 +157304,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -157338,7 +157335,7 @@ void m68008_device::sf_das_dp8() // 51e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157376,11 +157373,11 @@ void m68008_device::sf_das_dp8() // 51e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -157400,7 +157397,7 @@ void m68008_device::sf_das_dp8() // 51e8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157410,7 +157407,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157449,7 +157446,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -157492,7 +157489,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -157521,14 +157518,14 @@ void m68008_device::sf_dais_dp8() // 51f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -157536,7 +157533,7 @@ void m68008_device::sf_dais_dp8() // 51f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157575,7 +157572,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157616,11 +157613,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -157640,7 +157637,7 @@ adsw2: m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157650,7 +157647,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157689,7 +157686,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -157732,7 +157729,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -157765,7 +157762,7 @@ void m68008_device::sf_adr16_dp8() // 51f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -157803,7 +157800,7 @@ void m68008_device::sf_adr16_dp8() // 51f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -157824,7 +157821,7 @@ void m68008_device::sf_adr16_dp8() // 51f8 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157834,7 +157831,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157873,7 +157870,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -157916,7 +157913,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -157947,7 +157944,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -157986,7 +157983,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -158024,7 +158021,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -158045,7 +158042,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158055,7 +158052,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158094,7 +158091,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -158137,7 +158134,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -158170,7 +158167,7 @@ void m68008_device::shi_ds_dp8() // 52c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -158182,7 +158179,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158225,7 +158222,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -158265,7 +158262,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -158284,7 +158281,7 @@ void m68008_device::dbhi_ds_rel16_dp8() // 52c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) == 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -158296,13 +158293,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -158345,7 +158342,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -158353,7 +158350,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158392,11 +158389,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158442,13 +158439,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158494,7 +158491,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158543,11 +158540,11 @@ void m68008_device::shi_ais_dp8() // 52d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -158567,7 +158564,7 @@ void m68008_device::shi_ais_dp8() // 52d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158577,7 +158574,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158616,7 +158613,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -158659,7 +158656,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -158693,12 +158690,12 @@ void m68008_device::shi_aips_dp8() // 52d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -158719,7 +158716,7 @@ void m68008_device::shi_aips_dp8() // 52d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158729,7 +158726,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158768,7 +158765,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -158811,7 +158808,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -158844,7 +158841,7 @@ void m68008_device::shi_pais_dp8() // 52e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -158852,7 +158849,7 @@ void m68008_device::shi_pais_dp8() // 52e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -158873,7 +158870,7 @@ void m68008_device::shi_pais_dp8() // 52e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158883,7 +158880,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -158922,7 +158919,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -158965,7 +158962,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -158996,7 +158993,7 @@ void m68008_device::shi_das_dp8() // 52e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159034,11 +159031,11 @@ void m68008_device::shi_das_dp8() // 52e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -159058,7 +159055,7 @@ void m68008_device::shi_das_dp8() // 52e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159068,7 +159065,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159107,7 +159104,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -159150,7 +159147,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -159179,14 +159176,14 @@ void m68008_device::shi_dais_dp8() // 52f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -159194,7 +159191,7 @@ void m68008_device::shi_dais_dp8() // 52f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159233,7 +159230,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159274,11 +159271,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -159298,7 +159295,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159308,7 +159305,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159347,7 +159344,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -159390,7 +159387,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -159423,7 +159420,7 @@ void m68008_device::shi_adr16_dp8() // 52f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -159461,7 +159458,7 @@ void m68008_device::shi_adr16_dp8() // 52f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -159482,7 +159479,7 @@ void m68008_device::shi_adr16_dp8() // 52f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159492,7 +159489,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159531,7 +159528,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -159574,7 +159571,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -159605,7 +159602,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159644,7 +159641,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -159682,7 +159679,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -159703,7 +159700,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159713,7 +159710,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159752,7 +159749,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -159795,7 +159792,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -159828,7 +159825,7 @@ void m68008_device::sls_ds_dp8() // 53c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -159840,7 +159837,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -159883,7 +159880,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -159923,7 +159920,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -159942,7 +159939,7 @@ void m68008_device::dbls_ds_rel16_dp8() // 53c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) != 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -159954,13 +159951,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -160003,7 +160000,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -160011,7 +160008,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160050,11 +160047,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160100,13 +160097,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160152,7 +160149,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160201,11 +160198,11 @@ void m68008_device::sls_ais_dp8() // 53d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -160225,7 +160222,7 @@ void m68008_device::sls_ais_dp8() // 53d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160235,7 +160232,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160274,7 +160271,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -160317,7 +160314,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -160351,12 +160348,12 @@ void m68008_device::sls_aips_dp8() // 53d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -160377,7 +160374,7 @@ void m68008_device::sls_aips_dp8() // 53d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160387,7 +160384,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160426,7 +160423,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -160469,7 +160466,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -160502,7 +160499,7 @@ void m68008_device::sls_pais_dp8() // 53e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -160510,7 +160507,7 @@ void m68008_device::sls_pais_dp8() // 53e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -160531,7 +160528,7 @@ void m68008_device::sls_pais_dp8() // 53e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160541,7 +160538,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160580,7 +160577,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -160623,7 +160620,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -160654,7 +160651,7 @@ void m68008_device::sls_das_dp8() // 53e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160692,11 +160689,11 @@ void m68008_device::sls_das_dp8() // 53e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -160716,7 +160713,7 @@ void m68008_device::sls_das_dp8() // 53e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160726,7 +160723,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160765,7 +160762,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -160808,7 +160805,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -160837,14 +160834,14 @@ void m68008_device::sls_dais_dp8() // 53f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -160852,7 +160849,7 @@ void m68008_device::sls_dais_dp8() // 53f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160891,7 +160888,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -160932,11 +160929,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -160956,7 +160953,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160966,7 +160963,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161005,7 +161002,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -161048,7 +161045,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -161081,7 +161078,7 @@ void m68008_device::sls_adr16_dp8() // 53f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -161119,7 +161116,7 @@ void m68008_device::sls_adr16_dp8() // 53f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -161140,7 +161137,7 @@ void m68008_device::sls_adr16_dp8() // 53f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -161150,7 +161147,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161189,7 +161186,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -161232,7 +161229,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -161263,7 +161260,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161302,7 +161299,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -161340,7 +161337,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -161361,7 +161358,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -161371,7 +161368,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161410,7 +161407,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -161453,7 +161450,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -161486,7 +161483,7 @@ void m68008_device::scc_ds_dp8() // 54c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -161498,7 +161495,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161541,7 +161538,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -161581,7 +161578,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -161600,7 +161597,7 @@ void m68008_device::dbcc_ds_rel16_dp8() // 54c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_C); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -161612,13 +161609,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -161661,7 +161658,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -161669,7 +161666,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161708,11 +161705,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161758,13 +161755,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161810,7 +161807,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161859,11 +161856,11 @@ void m68008_device::scc_ais_dp8() // 54d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -161883,7 +161880,7 @@ void m68008_device::scc_ais_dp8() // 54d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -161893,7 +161890,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -161932,7 +161929,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -161975,7 +161972,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -162009,12 +162006,12 @@ void m68008_device::scc_aips_dp8() // 54d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -162035,7 +162032,7 @@ void m68008_device::scc_aips_dp8() // 54d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162045,7 +162042,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162084,7 +162081,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -162127,7 +162124,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -162160,7 +162157,7 @@ void m68008_device::scc_pais_dp8() // 54e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -162168,7 +162165,7 @@ void m68008_device::scc_pais_dp8() // 54e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -162189,7 +162186,7 @@ void m68008_device::scc_pais_dp8() // 54e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162199,7 +162196,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162238,7 +162235,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -162281,7 +162278,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -162312,7 +162309,7 @@ void m68008_device::scc_das_dp8() // 54e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162350,11 +162347,11 @@ void m68008_device::scc_das_dp8() // 54e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -162374,7 +162371,7 @@ void m68008_device::scc_das_dp8() // 54e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162384,7 +162381,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162423,7 +162420,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -162466,7 +162463,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -162495,14 +162492,14 @@ void m68008_device::scc_dais_dp8() // 54f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -162510,7 +162507,7 @@ void m68008_device::scc_dais_dp8() // 54f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162549,7 +162546,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162590,11 +162587,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -162614,7 +162611,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162624,7 +162621,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162663,7 +162660,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -162706,7 +162703,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -162739,7 +162736,7 @@ void m68008_device::scc_adr16_dp8() // 54f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -162777,7 +162774,7 @@ void m68008_device::scc_adr16_dp8() // 54f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -162798,7 +162795,7 @@ void m68008_device::scc_adr16_dp8() // 54f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162808,7 +162805,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162847,7 +162844,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -162890,7 +162887,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -162921,7 +162918,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -162960,7 +162957,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -162998,7 +162995,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -163019,7 +163016,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163029,7 +163026,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163068,7 +163065,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -163111,7 +163108,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -163144,7 +163141,7 @@ void m68008_device::scs_ds_dp8() // 55c0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -163156,7 +163153,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163199,7 +163196,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -163239,7 +163236,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163258,7 +163255,7 @@ void m68008_device::dbcs_ds_rel16_dp8() // 55c8 fff8 // 06c dbcc1 m_t = m_sr & SR_C; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -163270,13 +163267,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -163319,7 +163316,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -163327,7 +163324,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163366,11 +163363,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163416,13 +163413,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163468,7 +163465,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163517,11 +163514,11 @@ void m68008_device::scs_ais_dp8() // 55d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -163541,7 +163538,7 @@ void m68008_device::scs_ais_dp8() // 55d0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163551,7 +163548,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163590,7 +163587,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -163633,7 +163630,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -163667,12 +163664,12 @@ void m68008_device::scs_aips_dp8() // 55d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -163693,7 +163690,7 @@ void m68008_device::scs_aips_dp8() // 55d8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163703,7 +163700,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163742,7 +163739,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -163785,7 +163782,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -163818,7 +163815,7 @@ void m68008_device::scs_pais_dp8() // 55e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -163826,7 +163823,7 @@ void m68008_device::scs_pais_dp8() // 55e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -163847,7 +163844,7 @@ void m68008_device::scs_pais_dp8() // 55e0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163857,7 +163854,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -163896,7 +163893,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -163939,7 +163936,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -163970,7 +163967,7 @@ void m68008_device::scs_das_dp8() // 55e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164008,11 +164005,11 @@ void m68008_device::scs_das_dp8() // 55e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -164032,7 +164029,7 @@ void m68008_device::scs_das_dp8() // 55e8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164042,7 +164039,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164081,7 +164078,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -164124,7 +164121,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -164153,14 +164150,14 @@ void m68008_device::scs_dais_dp8() // 55f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -164168,7 +164165,7 @@ void m68008_device::scs_dais_dp8() // 55f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164207,7 +164204,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164248,11 +164245,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -164272,7 +164269,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164282,7 +164279,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164321,7 +164318,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -164364,7 +164361,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -164397,7 +164394,7 @@ void m68008_device::scs_adr16_dp8() // 55f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -164435,7 +164432,7 @@ void m68008_device::scs_adr16_dp8() // 55f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -164456,7 +164453,7 @@ void m68008_device::scs_adr16_dp8() // 55f8 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164466,7 +164463,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164505,7 +164502,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -164548,7 +164545,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -164579,7 +164576,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164618,7 +164615,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -164656,7 +164653,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -164677,7 +164674,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164687,7 +164684,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164726,7 +164723,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -164769,7 +164766,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -164802,7 +164799,7 @@ void m68008_device::sne_ds_dp8() // 56c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -164814,7 +164811,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -164857,7 +164854,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -164897,7 +164894,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164916,7 +164913,7 @@ void m68008_device::dbne_ds_rel16_dp8() // 56c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_Z); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -164928,13 +164925,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -164977,7 +164974,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -164985,7 +164982,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165024,11 +165021,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165074,13 +165071,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165126,7 +165123,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165175,11 +165172,11 @@ void m68008_device::sne_ais_dp8() // 56d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -165199,7 +165196,7 @@ void m68008_device::sne_ais_dp8() // 56d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165209,7 +165206,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165248,7 +165245,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -165291,7 +165288,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -165325,12 +165322,12 @@ void m68008_device::sne_aips_dp8() // 56d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -165351,7 +165348,7 @@ void m68008_device::sne_aips_dp8() // 56d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165361,7 +165358,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165400,7 +165397,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -165443,7 +165440,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -165476,7 +165473,7 @@ void m68008_device::sne_pais_dp8() // 56e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -165484,7 +165481,7 @@ void m68008_device::sne_pais_dp8() // 56e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -165505,7 +165502,7 @@ void m68008_device::sne_pais_dp8() // 56e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165515,7 +165512,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165554,7 +165551,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -165597,7 +165594,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -165628,7 +165625,7 @@ void m68008_device::sne_das_dp8() // 56e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165666,11 +165663,11 @@ void m68008_device::sne_das_dp8() // 56e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -165690,7 +165687,7 @@ void m68008_device::sne_das_dp8() // 56e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165700,7 +165697,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165739,7 +165736,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -165782,7 +165779,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -165811,14 +165808,14 @@ void m68008_device::sne_dais_dp8() // 56f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -165826,7 +165823,7 @@ void m68008_device::sne_dais_dp8() // 56f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165865,7 +165862,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165906,11 +165903,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -165930,7 +165927,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165940,7 +165937,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -165979,7 +165976,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -166022,7 +166019,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -166055,7 +166052,7 @@ void m68008_device::sne_adr16_dp8() // 56f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -166093,7 +166090,7 @@ void m68008_device::sne_adr16_dp8() // 56f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -166114,7 +166111,7 @@ void m68008_device::sne_adr16_dp8() // 56f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -166124,7 +166121,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166163,7 +166160,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -166206,7 +166203,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -166237,7 +166234,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166276,7 +166273,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -166314,7 +166311,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -166335,7 +166332,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -166345,7 +166342,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166384,7 +166381,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -166427,7 +166424,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -166460,7 +166457,7 @@ void m68008_device::seq_ds_dp8() // 57c0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -166472,7 +166469,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166515,7 +166512,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -166555,7 +166552,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -166574,7 +166571,7 @@ void m68008_device::dbeq_ds_rel16_dp8() // 57c8 fff8 // 06c dbcc1 m_t = m_sr & SR_Z; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -166586,13 +166583,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -166635,7 +166632,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -166643,7 +166640,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166682,11 +166679,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166732,13 +166729,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166784,7 +166781,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166833,11 +166830,11 @@ void m68008_device::seq_ais_dp8() // 57d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -166857,7 +166854,7 @@ void m68008_device::seq_ais_dp8() // 57d0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -166867,7 +166864,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -166906,7 +166903,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -166949,7 +166946,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -166983,12 +166980,12 @@ void m68008_device::seq_aips_dp8() // 57d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -167009,7 +167006,7 @@ void m68008_device::seq_aips_dp8() // 57d8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167019,7 +167016,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167058,7 +167055,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -167101,7 +167098,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -167134,7 +167131,7 @@ void m68008_device::seq_pais_dp8() // 57e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -167142,7 +167139,7 @@ void m68008_device::seq_pais_dp8() // 57e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -167163,7 +167160,7 @@ void m68008_device::seq_pais_dp8() // 57e0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167173,7 +167170,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167212,7 +167209,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -167255,7 +167252,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -167286,7 +167283,7 @@ void m68008_device::seq_das_dp8() // 57e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167324,11 +167321,11 @@ void m68008_device::seq_das_dp8() // 57e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -167348,7 +167345,7 @@ void m68008_device::seq_das_dp8() // 57e8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167358,7 +167355,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167397,7 +167394,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -167440,7 +167437,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -167469,14 +167466,14 @@ void m68008_device::seq_dais_dp8() // 57f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -167484,7 +167481,7 @@ void m68008_device::seq_dais_dp8() // 57f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167523,7 +167520,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167564,11 +167561,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -167588,7 +167585,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167598,7 +167595,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167637,7 +167634,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -167680,7 +167677,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -167713,7 +167710,7 @@ void m68008_device::seq_adr16_dp8() // 57f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -167751,7 +167748,7 @@ void m68008_device::seq_adr16_dp8() // 57f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -167772,7 +167769,7 @@ void m68008_device::seq_adr16_dp8() // 57f8 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167782,7 +167779,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167821,7 +167818,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -167864,7 +167861,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -167895,7 +167892,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -167934,7 +167931,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -167972,7 +167969,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -167993,7 +167990,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168003,7 +168000,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168042,7 +168039,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -168085,7 +168082,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -168118,7 +168115,7 @@ void m68008_device::svc_ds_dp8() // 58c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -168130,7 +168127,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168173,7 +168170,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -168213,7 +168210,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -168232,7 +168229,7 @@ void m68008_device::dbvc_ds_rel16_dp8() // 58c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -168244,13 +168241,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -168293,7 +168290,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -168301,7 +168298,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168340,11 +168337,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168390,13 +168387,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168442,7 +168439,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168491,11 +168488,11 @@ void m68008_device::svc_ais_dp8() // 58d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -168515,7 +168512,7 @@ void m68008_device::svc_ais_dp8() // 58d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168525,7 +168522,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168564,7 +168561,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -168607,7 +168604,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -168641,12 +168638,12 @@ void m68008_device::svc_aips_dp8() // 58d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -168667,7 +168664,7 @@ void m68008_device::svc_aips_dp8() // 58d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168677,7 +168674,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168716,7 +168713,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -168759,7 +168756,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -168792,7 +168789,7 @@ void m68008_device::svc_pais_dp8() // 58e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -168800,7 +168797,7 @@ void m68008_device::svc_pais_dp8() // 58e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -168821,7 +168818,7 @@ void m68008_device::svc_pais_dp8() // 58e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168831,7 +168828,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168870,7 +168867,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -168913,7 +168910,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -168944,7 +168941,7 @@ void m68008_device::svc_das_dp8() // 58e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -168982,11 +168979,11 @@ void m68008_device::svc_das_dp8() // 58e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -169006,7 +169003,7 @@ void m68008_device::svc_das_dp8() // 58e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169016,7 +169013,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169055,7 +169052,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -169098,7 +169095,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -169127,14 +169124,14 @@ void m68008_device::svc_dais_dp8() // 58f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -169142,7 +169139,7 @@ void m68008_device::svc_dais_dp8() // 58f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169181,7 +169178,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169222,11 +169219,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -169246,7 +169243,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169256,7 +169253,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169295,7 +169292,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -169338,7 +169335,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -169371,7 +169368,7 @@ void m68008_device::svc_adr16_dp8() // 58f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -169409,7 +169406,7 @@ void m68008_device::svc_adr16_dp8() // 58f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -169430,7 +169427,7 @@ void m68008_device::svc_adr16_dp8() // 58f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169440,7 +169437,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169479,7 +169476,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -169522,7 +169519,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -169553,7 +169550,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169592,7 +169589,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -169630,7 +169627,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -169651,7 +169648,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169661,7 +169658,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169700,7 +169697,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -169743,7 +169740,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -169776,7 +169773,7 @@ void m68008_device::svs_ds_dp8() // 59c0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -169788,7 +169785,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169831,7 +169828,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -169871,7 +169868,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -169890,7 +169887,7 @@ void m68008_device::dbvs_ds_rel16_dp8() // 59c8 fff8 // 06c dbcc1 m_t = m_sr & SR_V; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -169902,13 +169899,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -169951,7 +169948,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -169959,7 +169956,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -169998,11 +169995,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170048,13 +170045,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170100,7 +170097,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170149,11 +170146,11 @@ void m68008_device::svs_ais_dp8() // 59d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -170173,7 +170170,7 @@ void m68008_device::svs_ais_dp8() // 59d0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170183,7 +170180,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170222,7 +170219,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -170265,7 +170262,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -170299,12 +170296,12 @@ void m68008_device::svs_aips_dp8() // 59d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -170325,7 +170322,7 @@ void m68008_device::svs_aips_dp8() // 59d8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170335,7 +170332,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170374,7 +170371,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -170417,7 +170414,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -170450,7 +170447,7 @@ void m68008_device::svs_pais_dp8() // 59e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -170458,7 +170455,7 @@ void m68008_device::svs_pais_dp8() // 59e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -170479,7 +170476,7 @@ void m68008_device::svs_pais_dp8() // 59e0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170489,7 +170486,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170528,7 +170525,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -170571,7 +170568,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -170602,7 +170599,7 @@ void m68008_device::svs_das_dp8() // 59e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170640,11 +170637,11 @@ void m68008_device::svs_das_dp8() // 59e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -170664,7 +170661,7 @@ void m68008_device::svs_das_dp8() // 59e8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170674,7 +170671,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170713,7 +170710,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -170756,7 +170753,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -170785,14 +170782,14 @@ void m68008_device::svs_dais_dp8() // 59f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -170800,7 +170797,7 @@ void m68008_device::svs_dais_dp8() // 59f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170839,7 +170836,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170880,11 +170877,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -170904,7 +170901,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170914,7 +170911,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -170953,7 +170950,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -170996,7 +170993,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -171029,7 +171026,7 @@ void m68008_device::svs_adr16_dp8() // 59f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -171067,7 +171064,7 @@ void m68008_device::svs_adr16_dp8() // 59f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -171088,7 +171085,7 @@ void m68008_device::svs_adr16_dp8() // 59f8 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171098,7 +171095,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171137,7 +171134,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -171180,7 +171177,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -171211,7 +171208,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171250,7 +171247,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -171288,7 +171285,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -171309,7 +171306,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171319,7 +171316,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171358,7 +171355,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -171401,7 +171398,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -171434,7 +171431,7 @@ void m68008_device::spl_ds_dp8() // 5ac0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -171446,7 +171443,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171489,7 +171486,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -171529,7 +171526,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -171548,7 +171545,7 @@ void m68008_device::dbpl_ds_rel16_dp8() // 5ac8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_N); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -171560,13 +171557,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -171609,7 +171606,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -171617,7 +171614,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171656,11 +171653,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171706,13 +171703,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171758,7 +171755,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171807,11 +171804,11 @@ void m68008_device::spl_ais_dp8() // 5ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -171831,7 +171828,7 @@ void m68008_device::spl_ais_dp8() // 5ad0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171841,7 +171838,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -171880,7 +171877,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -171923,7 +171920,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -171957,12 +171954,12 @@ void m68008_device::spl_aips_dp8() // 5ad8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -171983,7 +171980,7 @@ void m68008_device::spl_aips_dp8() // 5ad8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171993,7 +171990,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172032,7 +172029,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -172075,7 +172072,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -172108,7 +172105,7 @@ void m68008_device::spl_pais_dp8() // 5ae0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -172116,7 +172113,7 @@ void m68008_device::spl_pais_dp8() // 5ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -172137,7 +172134,7 @@ void m68008_device::spl_pais_dp8() // 5ae0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172147,7 +172144,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172186,7 +172183,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -172229,7 +172226,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -172260,7 +172257,7 @@ void m68008_device::spl_das_dp8() // 5ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172298,11 +172295,11 @@ void m68008_device::spl_das_dp8() // 5ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -172322,7 +172319,7 @@ void m68008_device::spl_das_dp8() // 5ae8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172332,7 +172329,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172371,7 +172368,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -172414,7 +172411,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -172443,14 +172440,14 @@ void m68008_device::spl_dais_dp8() // 5af0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -172458,7 +172455,7 @@ void m68008_device::spl_dais_dp8() // 5af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172497,7 +172494,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172538,11 +172535,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -172562,7 +172559,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172572,7 +172569,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172611,7 +172608,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -172654,7 +172651,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -172687,7 +172684,7 @@ void m68008_device::spl_adr16_dp8() // 5af8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -172725,7 +172722,7 @@ void m68008_device::spl_adr16_dp8() // 5af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -172746,7 +172743,7 @@ void m68008_device::spl_adr16_dp8() // 5af8 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172756,7 +172753,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172795,7 +172792,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -172838,7 +172835,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -172869,7 +172866,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -172908,7 +172905,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -172946,7 +172943,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -172967,7 +172964,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172977,7 +172974,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173016,7 +173013,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -173059,7 +173056,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -173092,7 +173089,7 @@ void m68008_device::smi_ds_dp8() // 5bc0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -173104,7 +173101,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173147,7 +173144,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -173187,7 +173184,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -173206,7 +173203,7 @@ void m68008_device::dbmi_ds_rel16_dp8() // 5bc8 fff8 // 06c dbcc1 m_t = m_sr & SR_N; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -173218,13 +173215,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -173267,7 +173264,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -173275,7 +173272,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173314,11 +173311,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173364,13 +173361,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173416,7 +173413,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173465,11 +173462,11 @@ void m68008_device::smi_ais_dp8() // 5bd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -173489,7 +173486,7 @@ void m68008_device::smi_ais_dp8() // 5bd0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173499,7 +173496,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173538,7 +173535,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -173581,7 +173578,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -173615,12 +173612,12 @@ void m68008_device::smi_aips_dp8() // 5bd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -173641,7 +173638,7 @@ void m68008_device::smi_aips_dp8() // 5bd8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173651,7 +173648,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173690,7 +173687,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -173733,7 +173730,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -173766,7 +173763,7 @@ void m68008_device::smi_pais_dp8() // 5be0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -173774,7 +173771,7 @@ void m68008_device::smi_pais_dp8() // 5be0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -173795,7 +173792,7 @@ void m68008_device::smi_pais_dp8() // 5be0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173805,7 +173802,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173844,7 +173841,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -173887,7 +173884,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -173918,7 +173915,7 @@ void m68008_device::smi_das_dp8() // 5be8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -173956,11 +173953,11 @@ void m68008_device::smi_das_dp8() // 5be8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -173980,7 +173977,7 @@ void m68008_device::smi_das_dp8() // 5be8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173990,7 +173987,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174029,7 +174026,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -174072,7 +174069,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -174101,14 +174098,14 @@ void m68008_device::smi_dais_dp8() // 5bf0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -174116,7 +174113,7 @@ void m68008_device::smi_dais_dp8() // 5bf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174155,7 +174152,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174196,11 +174193,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -174220,7 +174217,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -174230,7 +174227,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174269,7 +174266,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -174312,7 +174309,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -174345,7 +174342,7 @@ void m68008_device::smi_adr16_dp8() // 5bf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -174383,7 +174380,7 @@ void m68008_device::smi_adr16_dp8() // 5bf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -174404,7 +174401,7 @@ void m68008_device::smi_adr16_dp8() // 5bf8 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -174414,7 +174411,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174453,7 +174450,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -174496,7 +174493,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -174527,7 +174524,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174566,7 +174563,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -174604,7 +174601,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -174625,7 +174622,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -174635,7 +174632,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174674,7 +174671,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -174717,7 +174714,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -174750,7 +174747,7 @@ void m68008_device::sge_ds_dp8() // 5cc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -174762,7 +174759,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174805,7 +174802,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -174845,7 +174842,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -174864,7 +174861,7 @@ void m68008_device::dbge_ds_rel16_dp8() // 5cc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -174876,13 +174873,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -174925,7 +174922,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -174933,7 +174930,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -174972,11 +174969,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175022,13 +175019,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175074,7 +175071,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175123,11 +175120,11 @@ void m68008_device::sge_ais_dp8() // 5cd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -175147,7 +175144,7 @@ void m68008_device::sge_ais_dp8() // 5cd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175157,7 +175154,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175196,7 +175193,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -175239,7 +175236,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -175273,12 +175270,12 @@ void m68008_device::sge_aips_dp8() // 5cd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -175299,7 +175296,7 @@ void m68008_device::sge_aips_dp8() // 5cd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175309,7 +175306,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175348,7 +175345,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -175391,7 +175388,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -175424,7 +175421,7 @@ void m68008_device::sge_pais_dp8() // 5ce0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -175432,7 +175429,7 @@ void m68008_device::sge_pais_dp8() // 5ce0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -175453,7 +175450,7 @@ void m68008_device::sge_pais_dp8() // 5ce0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175463,7 +175460,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175502,7 +175499,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -175545,7 +175542,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -175576,7 +175573,7 @@ void m68008_device::sge_das_dp8() // 5ce8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175614,11 +175611,11 @@ void m68008_device::sge_das_dp8() // 5ce8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -175638,7 +175635,7 @@ void m68008_device::sge_das_dp8() // 5ce8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175648,7 +175645,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175687,7 +175684,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -175730,7 +175727,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -175759,14 +175756,14 @@ void m68008_device::sge_dais_dp8() // 5cf0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -175774,7 +175771,7 @@ void m68008_device::sge_dais_dp8() // 5cf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175813,7 +175810,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175854,11 +175851,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -175878,7 +175875,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175888,7 +175885,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -175927,7 +175924,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -175970,7 +175967,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -176003,7 +176000,7 @@ void m68008_device::sge_adr16_dp8() // 5cf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -176041,7 +176038,7 @@ void m68008_device::sge_adr16_dp8() // 5cf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -176062,7 +176059,7 @@ void m68008_device::sge_adr16_dp8() // 5cf8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176072,7 +176069,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176111,7 +176108,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -176154,7 +176151,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -176185,7 +176182,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176224,7 +176221,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -176262,7 +176259,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -176283,7 +176280,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176293,7 +176290,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176332,7 +176329,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -176375,7 +176372,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -176408,7 +176405,7 @@ void m68008_device::slt_ds_dp8() // 5dc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -176420,7 +176417,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176463,7 +176460,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -176503,7 +176500,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -176522,7 +176519,7 @@ void m68008_device::dblt_ds_rel16_dp8() // 5dc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -176534,13 +176531,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -176583,7 +176580,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -176591,7 +176588,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176630,11 +176627,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176680,13 +176677,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176732,7 +176729,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176781,11 +176778,11 @@ void m68008_device::slt_ais_dp8() // 5dd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -176805,7 +176802,7 @@ void m68008_device::slt_ais_dp8() // 5dd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176815,7 +176812,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -176854,7 +176851,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -176897,7 +176894,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -176931,12 +176928,12 @@ void m68008_device::slt_aips_dp8() // 5dd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -176957,7 +176954,7 @@ void m68008_device::slt_aips_dp8() // 5dd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176967,7 +176964,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177006,7 +177003,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -177049,7 +177046,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -177082,7 +177079,7 @@ void m68008_device::slt_pais_dp8() // 5de0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -177090,7 +177087,7 @@ void m68008_device::slt_pais_dp8() // 5de0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -177111,7 +177108,7 @@ void m68008_device::slt_pais_dp8() // 5de0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177121,7 +177118,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177160,7 +177157,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -177203,7 +177200,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -177234,7 +177231,7 @@ void m68008_device::slt_das_dp8() // 5de8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177272,11 +177269,11 @@ void m68008_device::slt_das_dp8() // 5de8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -177296,7 +177293,7 @@ void m68008_device::slt_das_dp8() // 5de8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177306,7 +177303,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177345,7 +177342,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -177388,7 +177385,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -177417,14 +177414,14 @@ void m68008_device::slt_dais_dp8() // 5df0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -177432,7 +177429,7 @@ void m68008_device::slt_dais_dp8() // 5df0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177471,7 +177468,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177512,11 +177509,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -177536,7 +177533,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177546,7 +177543,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177585,7 +177582,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -177628,7 +177625,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -177661,7 +177658,7 @@ void m68008_device::slt_adr16_dp8() // 5df8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -177699,7 +177696,7 @@ void m68008_device::slt_adr16_dp8() // 5df8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -177720,7 +177717,7 @@ void m68008_device::slt_adr16_dp8() // 5df8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177730,7 +177727,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177769,7 +177766,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -177812,7 +177809,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -177843,7 +177840,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177882,7 +177879,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -177920,7 +177917,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -177941,7 +177938,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177951,7 +177948,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -177990,7 +177987,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -178033,7 +178030,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -178066,7 +178063,7 @@ void m68008_device::sgt_ds_dp8() // 5ec0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -178078,7 +178075,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178121,7 +178118,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -178161,7 +178158,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -178180,7 +178177,7 @@ void m68008_device::dbgt_ds_rel16_dp8() // 5ec8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -178192,13 +178189,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -178241,7 +178238,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -178249,7 +178246,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178288,11 +178285,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178338,13 +178335,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178390,7 +178387,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178439,11 +178436,11 @@ void m68008_device::sgt_ais_dp8() // 5ed0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -178463,7 +178460,7 @@ void m68008_device::sgt_ais_dp8() // 5ed0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178473,7 +178470,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178512,7 +178509,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -178555,7 +178552,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -178589,12 +178586,12 @@ void m68008_device::sgt_aips_dp8() // 5ed8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -178615,7 +178612,7 @@ void m68008_device::sgt_aips_dp8() // 5ed8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178625,7 +178622,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178664,7 +178661,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -178707,7 +178704,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -178740,7 +178737,7 @@ void m68008_device::sgt_pais_dp8() // 5ee0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -178748,7 +178745,7 @@ void m68008_device::sgt_pais_dp8() // 5ee0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -178769,7 +178766,7 @@ void m68008_device::sgt_pais_dp8() // 5ee0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178779,7 +178776,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178818,7 +178815,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -178861,7 +178858,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -178892,7 +178889,7 @@ void m68008_device::sgt_das_dp8() // 5ee8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -178930,11 +178927,11 @@ void m68008_device::sgt_das_dp8() // 5ee8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -178954,7 +178951,7 @@ void m68008_device::sgt_das_dp8() // 5ee8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178964,7 +178961,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179003,7 +179000,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -179046,7 +179043,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -179075,14 +179072,14 @@ void m68008_device::sgt_dais_dp8() // 5ef0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -179090,7 +179087,7 @@ void m68008_device::sgt_dais_dp8() // 5ef0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179129,7 +179126,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179170,11 +179167,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -179194,7 +179191,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -179204,7 +179201,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179243,7 +179240,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -179286,7 +179283,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -179319,7 +179316,7 @@ void m68008_device::sgt_adr16_dp8() // 5ef8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -179357,7 +179354,7 @@ void m68008_device::sgt_adr16_dp8() // 5ef8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -179378,7 +179375,7 @@ void m68008_device::sgt_adr16_dp8() // 5ef8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -179388,7 +179385,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179427,7 +179424,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -179470,7 +179467,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -179501,7 +179498,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179540,7 +179537,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -179578,7 +179575,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -179599,7 +179596,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -179609,7 +179606,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179648,7 +179645,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -179691,7 +179688,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -179724,7 +179721,7 @@ void m68008_device::sle_ds_dp8() // 5fc0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -179736,7 +179733,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179779,7 +179776,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -179819,7 +179816,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -179838,7 +179835,7 @@ void m68008_device::dble_ds_rel16_dp8() // 5fc8 fff8 // 06c dbcc1 m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -179850,13 +179847,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -179899,7 +179896,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -179907,7 +179904,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179946,11 +179943,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -179996,13 +179993,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180048,7 +180045,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180097,11 +180094,11 @@ void m68008_device::sle_ais_dp8() // 5fd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -180121,7 +180118,7 @@ void m68008_device::sle_ais_dp8() // 5fd0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180131,7 +180128,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180170,7 +180167,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -180213,7 +180210,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -180247,12 +180244,12 @@ void m68008_device::sle_aips_dp8() // 5fd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -180273,7 +180270,7 @@ void m68008_device::sle_aips_dp8() // 5fd8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180283,7 +180280,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180322,7 +180319,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -180365,7 +180362,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -180398,7 +180395,7 @@ void m68008_device::sle_pais_dp8() // 5fe0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -180406,7 +180403,7 @@ void m68008_device::sle_pais_dp8() // 5fe0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -180427,7 +180424,7 @@ void m68008_device::sle_pais_dp8() // 5fe0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180437,7 +180434,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180476,7 +180473,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -180519,7 +180516,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -180550,7 +180547,7 @@ void m68008_device::sle_das_dp8() // 5fe8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180588,11 +180585,11 @@ void m68008_device::sle_das_dp8() // 5fe8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -180612,7 +180609,7 @@ void m68008_device::sle_das_dp8() // 5fe8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180622,7 +180619,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180661,7 +180658,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -180704,7 +180701,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -180733,14 +180730,14 @@ void m68008_device::sle_dais_dp8() // 5ff0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -180748,7 +180745,7 @@ void m68008_device::sle_dais_dp8() // 5ff0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180787,7 +180784,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180828,11 +180825,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -180852,7 +180849,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180862,7 +180859,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -180901,7 +180898,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -180944,7 +180941,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -180977,7 +180974,7 @@ void m68008_device::sle_adr16_dp8() // 5ff8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -181015,7 +181012,7 @@ void m68008_device::sle_adr16_dp8() // 5ff8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -181036,7 +181033,7 @@ void m68008_device::sle_adr16_dp8() // 5ff8 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -181046,7 +181043,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -181085,7 +181082,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -181128,7 +181125,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -181159,7 +181156,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -181198,7 +181195,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -181236,7 +181233,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -181257,7 +181254,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -181267,7 +181264,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -181306,7 +181303,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -181349,7 +181346,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -181639,7 +181636,7 @@ void m68008_device::bsr_rel16_dp8() // 6100 ffff case 0: // 0a9 bsrw1 m_at = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_icount -= 2; @@ -181810,7 +181807,7 @@ void m68008_device::bsr_rel8_dp8() // 6100 ff00 // 089 bsri1 m_at = m_pc; m_au = m_da[m_sp] - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 102 bsri2 @@ -185638,7 +185635,7 @@ void m68008_device::moveq_imm8o_dd_dp8() // 7000 f100 m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -185697,7 +185694,7 @@ void m68008_device::or_b_ds_dd_dp8() // 8000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185705,7 +185702,7 @@ void m68008_device::or_b_ds_dd_dp8() // 8000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -185757,11 +185754,11 @@ void m68008_device::or_b_ais_dd_dp8() // 8010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -185781,7 +185778,7 @@ void m68008_device::or_b_ais_dd_dp8() // 8010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185789,7 +185786,7 @@ void m68008_device::or_b_ais_dd_dp8() // 8010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -185844,12 +185841,12 @@ void m68008_device::or_b_aips_dd_dp8() // 8018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -185870,7 +185867,7 @@ void m68008_device::or_b_aips_dd_dp8() // 8018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185878,7 +185875,7 @@ void m68008_device::or_b_aips_dd_dp8() // 8018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -185932,7 +185929,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -185940,7 +185937,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -185961,7 +185958,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185969,7 +185966,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186021,7 +186018,7 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186059,11 +186056,11 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -186083,7 +186080,7 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186091,7 +186088,7 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186141,14 +186138,14 @@ void m68008_device::or_b_dais_dd_dp8() // 8030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -186156,7 +186153,7 @@ void m68008_device::or_b_dais_dd_dp8() // 8030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186195,7 +186192,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186236,11 +186233,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -186260,7 +186257,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186268,7 +186265,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186322,7 +186319,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -186360,7 +186357,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -186381,7 +186378,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186389,7 +186386,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186441,7 +186438,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186480,7 +186477,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -186518,7 +186515,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -186539,7 +186536,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186547,7 +186544,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186598,7 +186595,7 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186636,11 +186633,11 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -186660,7 +186657,7 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186668,7 +186665,7 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186717,14 +186714,14 @@ void m68008_device::or_b_dpci_dd_dp8() // 803b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -186732,7 +186729,7 @@ void m68008_device::or_b_dpci_dd_dp8() // 803b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186771,7 +186768,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186812,11 +186809,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -186836,7 +186833,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186844,7 +186841,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186898,7 +186895,7 @@ void m68008_device::or_b_imm8_dd_dp8() // 803c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186937,7 +186934,7 @@ void m68008_device::or_b_imm8_dd_dp8() // 803c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx] alu_or8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186945,7 +186942,7 @@ void m68008_device::or_b_imm8_dd_dp8() // 803c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -186999,7 +186996,7 @@ void m68008_device::or_w_ds_dd_dp8() // 8040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187007,7 +187004,7 @@ void m68008_device::or_w_ds_dd_dp8() // 8040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187059,11 +187056,11 @@ void m68008_device::or_w_ais_dd_dp8() // 8050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -187101,7 +187098,7 @@ void m68008_device::or_w_ais_dd_dp8() // 8050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187109,7 +187106,7 @@ void m68008_device::or_w_ais_dd_dp8() // 8050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187164,12 +187161,12 @@ void m68008_device::or_w_aips_dd_dp8() // 8058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -187208,7 +187205,7 @@ void m68008_device::or_w_aips_dd_dp8() // 8058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187216,7 +187213,7 @@ void m68008_device::or_w_aips_dd_dp8() // 8058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187270,7 +187267,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -187278,7 +187275,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -187317,7 +187314,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187325,7 +187322,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187377,7 +187374,7 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187415,11 +187412,11 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -187457,7 +187454,7 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187465,7 +187462,7 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187515,14 +187512,14 @@ void m68008_device::or_w_dais_dd_dp8() // 8070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -187530,7 +187527,7 @@ void m68008_device::or_w_dais_dd_dp8() // 8070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187569,7 +187566,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187610,11 +187607,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -187652,7 +187649,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187660,7 +187657,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187714,7 +187711,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -187752,7 +187749,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -187791,7 +187788,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187799,7 +187796,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187851,7 +187848,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -187890,7 +187887,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -187928,7 +187925,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -187967,7 +187964,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187975,7 +187972,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188026,7 +188023,7 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188064,11 +188061,11 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188106,7 +188103,7 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -188114,7 +188111,7 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188163,14 +188160,14 @@ void m68008_device::or_w_dpci_dd_dp8() // 807b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -188178,7 +188175,7 @@ void m68008_device::or_w_dpci_dd_dp8() // 807b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188217,7 +188214,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188258,11 +188255,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188300,7 +188297,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -188308,7 +188305,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188362,7 +188359,7 @@ void m68008_device::or_w_imm16_dd_dp8() // 807c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188401,7 +188398,7 @@ void m68008_device::or_w_imm16_dd_dp8() // 807c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -188409,7 +188406,7 @@ void m68008_device::or_w_imm16_dd_dp8() // 807c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188463,12 +188460,12 @@ void m68008_device::or_l_ds_dd_dp8() // 8080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -188503,7 +188500,7 @@ void m68008_device::or_l_ds_dd_dp8() // 8080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx] alu_or(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -188512,7 +188509,7 @@ void m68008_device::or_l_ds_dd_dp8() // 8080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188532,7 +188529,7 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -188572,7 +188569,7 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -188610,12 +188607,12 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188656,7 +188653,7 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188676,7 +188673,7 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -188716,11 +188713,11 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -188758,12 +188755,12 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188804,7 +188801,7 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188823,14 +188820,14 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -188869,7 +188866,7 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -188907,12 +188904,12 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188953,7 +188950,7 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188973,7 +188970,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -189010,7 +189007,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -189050,7 +189047,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189088,12 +189085,12 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189134,7 +189131,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189152,14 +189149,14 @@ void m68008_device::or_l_dais_dd_dp8() // 80b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -189167,7 +189164,7 @@ void m68008_device::or_l_dais_dd_dp8() // 80b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -189206,7 +189203,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -189246,7 +189243,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -189286,7 +189283,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189324,12 +189321,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189370,7 +189367,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189392,7 +189389,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -189430,7 +189427,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -189470,7 +189467,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189508,12 +189505,12 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189554,7 +189551,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189574,7 +189571,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -189613,7 +189610,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -189651,7 +189648,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -189691,7 +189688,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -189729,12 +189726,12 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189775,7 +189772,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189794,7 +189791,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -189831,7 +189828,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -189871,7 +189868,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -189909,12 +189906,12 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189955,7 +189952,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189972,14 +189969,14 @@ void m68008_device::or_l_dpci_dd_dp8() // 80bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -189987,7 +189984,7 @@ void m68008_device::or_l_dpci_dd_dp8() // 80bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -190026,7 +190023,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -190066,7 +190063,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -190106,7 +190103,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -190144,12 +190141,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190190,7 +190187,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -190210,7 +190207,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -190249,7 +190246,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -190288,12 +190285,12 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -190328,7 +190325,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx] alu_or(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -190337,7 +190334,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -190359,13 +190356,13 @@ void m68008_device::divu_w_ds_dd_dp8() // 80c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -190378,7 +190375,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -190396,7 +190393,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -190404,7 +190401,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -190444,7 +190441,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -190482,7 +190479,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -190679,7 +190676,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190725,7 +190722,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -190736,7 +190733,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -190748,7 +190745,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -190768,7 +190765,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -190779,7 +190776,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -190789,13 +190786,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -190806,7 +190803,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -190816,7 +190813,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -190824,7 +190821,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190878,7 +190875,7 @@ void m68008_device::divu_w_ais_dd_dp8() // 80d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -190919,13 +190916,13 @@ void m68008_device::divu_w_ais_dd_dp8() // 80d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -190938,7 +190935,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -190956,7 +190953,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -190964,7 +190961,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -191004,7 +191001,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -191042,7 +191039,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -191239,7 +191236,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191285,7 +191282,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -191296,7 +191293,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191308,7 +191305,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191328,7 +191325,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -191339,7 +191336,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -191349,13 +191346,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -191366,7 +191363,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -191376,7 +191373,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -191384,7 +191381,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191444,7 +191441,7 @@ void m68008_device::divu_w_aips_dd_dp8() // 80d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -191483,13 +191480,13 @@ void m68008_device::divu_w_aips_dd_dp8() // 80d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -191502,7 +191499,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -191520,7 +191517,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -191528,7 +191525,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -191568,7 +191565,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -191606,7 +191603,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -191803,7 +191800,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191849,7 +191846,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -191860,7 +191857,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191872,7 +191869,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191892,7 +191889,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -191903,7 +191900,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -191913,13 +191910,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -191930,7 +191927,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -191940,7 +191937,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -191948,7 +191945,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -192010,7 +192007,7 @@ void m68008_device::divu_w_pais_dd_dp8() // 80e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -192049,13 +192046,13 @@ void m68008_device::divu_w_pais_dd_dp8() // 80e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -192068,7 +192065,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -192086,7 +192083,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -192094,7 +192091,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -192134,7 +192131,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -192172,7 +192169,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -192369,7 +192366,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -192415,7 +192412,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -192426,7 +192423,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -192438,7 +192435,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -192458,7 +192455,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -192469,7 +192466,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -192479,13 +192476,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -192496,7 +192493,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -192506,7 +192503,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -192514,7 +192511,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -192605,7 +192602,7 @@ void m68008_device::divu_w_das_dd_dp8() // 80e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -192646,13 +192643,13 @@ void m68008_device::divu_w_das_dd_dp8() // 80e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -192665,7 +192662,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -192683,7 +192680,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -192691,7 +192688,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -192731,7 +192728,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -192769,7 +192766,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -192966,7 +192963,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193012,7 +193009,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -193023,7 +193020,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193035,7 +193032,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193055,7 +193052,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -193066,7 +193063,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -193076,13 +193073,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -193093,7 +193090,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -193103,7 +193100,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -193111,7 +193108,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193163,7 +193160,7 @@ void m68008_device::divu_w_dais_dd_dp8() // 80f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -193255,7 +193252,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193296,13 +193293,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -193315,7 +193312,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -193333,7 +193330,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -193341,7 +193338,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -193381,7 +193378,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -193419,7 +193416,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -193616,7 +193613,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193662,7 +193659,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -193673,7 +193670,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193685,7 +193682,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193705,7 +193702,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -193716,7 +193713,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -193726,13 +193723,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -193743,7 +193740,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -193753,7 +193750,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -193761,7 +193758,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193853,7 +193850,7 @@ void m68008_device::divu_w_adr16_dd_dp8() // 80f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -193892,13 +193889,13 @@ void m68008_device::divu_w_adr16_dd_dp8() // 80f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -193911,7 +193908,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -193929,7 +193926,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -193937,7 +193934,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -193977,7 +193974,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -194015,7 +194012,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -194212,7 +194209,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -194258,7 +194255,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -194269,7 +194266,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194281,7 +194278,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194301,7 +194298,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -194312,7 +194309,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -194322,13 +194319,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -194339,7 +194336,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -194349,7 +194346,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -194357,7 +194354,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -194485,7 +194482,7 @@ void m68008_device::divu_w_adr32_dd_dp8() // 80f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -194524,13 +194521,13 @@ void m68008_device::divu_w_adr32_dd_dp8() // 80f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -194543,7 +194540,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -194561,7 +194558,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -194569,7 +194566,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -194609,7 +194606,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -194647,7 +194644,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: @@ -194844,7 +194841,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -194890,7 +194887,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -194901,7 +194898,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194913,7 +194910,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194933,7 +194930,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -194944,7 +194941,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -194954,13 +194951,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -194971,7 +194968,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -194981,7 +194978,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -194989,7 +194986,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195079,7 +195076,7 @@ void m68008_device::divu_w_dpc_dd_dp8() // 80fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -195120,13 +195117,13 @@ void m68008_device::divu_w_dpc_dd_dp8() // 80fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -195139,7 +195136,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -195157,7 +195154,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -195165,7 +195162,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -195205,7 +195202,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -195243,7 +195240,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -195440,7 +195437,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195486,7 +195483,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -195497,7 +195494,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -195509,7 +195506,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -195529,7 +195526,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -195540,7 +195537,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -195550,13 +195547,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -195567,7 +195564,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -195577,7 +195574,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -195585,7 +195582,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195636,7 +195633,7 @@ void m68008_device::divu_w_dpci_dd_dp8() // 80fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -195728,7 +195725,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -195769,13 +195766,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -195788,7 +195785,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -195806,7 +195803,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -195814,7 +195811,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -195854,7 +195851,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -195892,7 +195889,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -196089,7 +196086,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196135,7 +196132,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -196146,7 +196143,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196158,7 +196155,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196178,7 +196175,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -196189,7 +196186,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -196199,13 +196196,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -196216,7 +196213,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -196226,7 +196223,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -196234,7 +196231,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196328,13 +196325,13 @@ void m68008_device::divu_w_imm16_dd_dp8() // 80fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -196347,7 +196344,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -196365,7 +196362,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -196373,7 +196370,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -196413,7 +196410,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -196451,7 +196448,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -196648,7 +196645,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196694,7 +196691,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -196705,7 +196702,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196717,7 +196714,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196737,7 +196734,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -196748,7 +196745,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -196758,13 +196755,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -196775,7 +196772,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -196785,7 +196782,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -196793,7 +196790,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196849,12 +196846,12 @@ void m68008_device::sbcd_ds_dd_dp8() // 8100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx] alu_sbcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -196918,7 +196915,7 @@ void m68008_device::sbcd_pais_paid_dp8() // 8108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -196958,12 +196955,12 @@ void m68008_device::sbcd_pais_paid_dp8() // 8108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin alu_sbcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -197034,11 +197031,11 @@ void m68008_device::or_b_dd_ais_dp8() // 8110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -197058,7 +197055,7 @@ void m68008_device::or_b_dd_ais_dp8() // 8110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197100,7 +197097,7 @@ void m68008_device::or_b_dd_ais_dp8() // 8110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -197135,12 +197132,12 @@ void m68008_device::or_b_dd_aips_dp8() // 8118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -197161,7 +197158,7 @@ void m68008_device::or_b_dd_aips_dp8() // 8118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197203,7 +197200,7 @@ void m68008_device::or_b_dd_aips_dp8() // 8118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -197237,7 +197234,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -197245,7 +197242,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -197266,7 +197263,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197308,7 +197305,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -197340,7 +197337,7 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -197378,11 +197375,11 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -197402,7 +197399,7 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197444,7 +197441,7 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -197474,14 +197471,14 @@ void m68008_device::or_b_dd_dais_dp8() // 8130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -197489,7 +197486,7 @@ void m68008_device::or_b_dd_dais_dp8() // 8130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -197528,7 +197525,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -197569,11 +197566,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -197593,7 +197590,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197635,7 +197632,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -197669,7 +197666,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -197707,7 +197704,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -197728,7 +197725,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197770,7 +197767,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -197802,7 +197799,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -197841,7 +197838,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -197879,7 +197876,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -197900,7 +197897,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197942,7 +197939,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -197974,11 +197971,11 @@ void m68008_device::or_w_dd_ais_dp8() // 8150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -198016,7 +198013,7 @@ void m68008_device::or_w_dd_ais_dp8() // 8150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198058,7 +198055,7 @@ void m68008_device::or_w_dd_ais_dp8() // 8150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -198111,12 +198108,12 @@ void m68008_device::or_w_dd_aips_dp8() // 8158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -198155,7 +198152,7 @@ void m68008_device::or_w_dd_aips_dp8() // 8158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198197,7 +198194,7 @@ void m68008_device::or_w_dd_aips_dp8() // 8158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -198249,7 +198246,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -198257,7 +198254,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -198296,7 +198293,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198338,7 +198335,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -198388,7 +198385,7 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -198426,11 +198423,11 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -198468,7 +198465,7 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198510,7 +198507,7 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -198558,14 +198555,14 @@ void m68008_device::or_w_dd_dais_dp8() // 8170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -198573,7 +198570,7 @@ void m68008_device::or_w_dd_dais_dp8() // 8170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -198612,7 +198609,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -198653,11 +198650,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -198695,7 +198692,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198737,7 +198734,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -198789,7 +198786,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -198827,7 +198824,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -198866,7 +198863,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198908,7 +198905,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -198958,7 +198955,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -198997,7 +198994,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -199035,7 +199032,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -199074,7 +199071,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199116,7 +199113,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -199166,7 +199163,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -199206,7 +199203,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199244,7 +199241,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199284,7 +199281,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199324,7 +199321,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -199374,7 +199371,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -199414,11 +199411,11 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199456,7 +199453,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199496,7 +199493,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199536,7 +199533,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -199585,14 +199582,14 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199631,7 +199628,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199669,7 +199666,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199709,7 +199706,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199749,7 +199746,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -199799,7 +199796,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -199836,7 +199833,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -199876,7 +199873,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -199914,7 +199911,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199954,7 +199951,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199994,7 +199991,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -200042,14 +200039,14 @@ void m68008_device::or_l_dd_dais_dp8() // 81b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -200057,7 +200054,7 @@ void m68008_device::or_l_dd_dais_dp8() // 81b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -200096,7 +200093,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -200136,7 +200133,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -200176,7 +200173,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200214,7 +200211,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200254,7 +200251,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200294,7 +200291,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -200346,7 +200343,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -200384,7 +200381,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -200424,7 +200421,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200462,7 +200459,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200502,7 +200499,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200542,7 +200539,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -200592,7 +200589,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -200631,7 +200628,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -200669,7 +200666,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -200709,7 +200706,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -200747,7 +200744,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200787,7 +200784,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200827,7 +200824,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -200879,13 +200876,13 @@ void m68008_device::divs_w_ds_dd_dp8() // 81c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -200899,7 +200896,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -200909,7 +200906,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -200924,7 +200921,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -200932,7 +200929,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -200972,7 +200969,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -201010,7 +201007,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -201202,7 +201199,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -201211,7 +201208,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -201219,12 +201216,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -201232,7 +201229,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201249,7 +201246,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -201257,7 +201254,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201303,7 +201300,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -201330,13 +201327,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201344,27 +201341,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -201376,7 +201373,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201388,7 +201385,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201403,7 +201400,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -201412,7 +201409,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -201420,7 +201417,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -201430,7 +201427,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -201439,7 +201436,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -201451,7 +201448,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -201515,7 +201512,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -201531,7 +201528,7 @@ void m68008_device::divs_w_ais_dd_dp8() // 81d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -201572,13 +201569,13 @@ void m68008_device::divs_w_ais_dd_dp8() // 81d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -201592,7 +201589,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -201602,7 +201599,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -201617,7 +201614,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -201625,7 +201622,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -201665,7 +201662,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -201703,7 +201700,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -201895,7 +201892,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -201904,7 +201901,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -201912,12 +201909,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -201925,7 +201922,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201942,7 +201939,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -201950,7 +201947,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201996,7 +201993,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -202023,13 +202020,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202037,27 +202034,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202069,7 +202066,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202081,7 +202078,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202096,7 +202093,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202105,7 +202102,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202113,7 +202110,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202123,7 +202120,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202132,7 +202129,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202144,7 +202141,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202208,7 +202205,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -202230,7 +202227,7 @@ void m68008_device::divs_w_aips_dd_dp8() // 81d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -202269,13 +202266,13 @@ void m68008_device::divs_w_aips_dd_dp8() // 81d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202289,7 +202286,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202299,7 +202296,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202314,7 +202311,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -202322,7 +202319,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -202362,7 +202359,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -202400,7 +202397,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -202592,7 +202589,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -202601,7 +202598,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -202609,12 +202606,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -202622,7 +202619,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202639,7 +202636,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -202647,7 +202644,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202693,7 +202690,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -202720,13 +202717,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202734,27 +202731,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202766,7 +202763,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202778,7 +202775,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202793,7 +202790,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202802,7 +202799,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202810,7 +202807,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202820,7 +202817,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202829,7 +202826,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202841,7 +202838,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202905,7 +202902,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -202929,7 +202926,7 @@ void m68008_device::divs_w_pais_dd_dp8() // 81e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -202968,13 +202965,13 @@ void m68008_device::divs_w_pais_dd_dp8() // 81e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202988,7 +202985,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202998,7 +202995,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203013,7 +203010,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -203021,7 +203018,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -203061,7 +203058,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -203099,7 +203096,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -203291,7 +203288,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -203300,7 +203297,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -203308,12 +203305,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -203321,7 +203318,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203338,7 +203335,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -203346,7 +203343,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203392,7 +203389,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -203419,13 +203416,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203433,27 +203430,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203465,7 +203462,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203477,7 +203474,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203492,7 +203489,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -203501,7 +203498,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -203509,7 +203506,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -203519,7 +203516,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -203528,7 +203525,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -203540,7 +203537,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -203604,7 +203601,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -203657,7 +203654,7 @@ void m68008_device::divs_w_das_dd_dp8() // 81e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -203698,13 +203695,13 @@ void m68008_device::divs_w_das_dd_dp8() // 81e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -203718,7 +203715,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203728,7 +203725,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203743,7 +203740,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -203751,7 +203748,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -203791,7 +203788,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -203829,7 +203826,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -204021,7 +204018,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -204030,7 +204027,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -204038,12 +204035,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204051,7 +204048,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204068,7 +204065,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -204076,7 +204073,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -204122,7 +204119,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204149,13 +204146,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204163,27 +204160,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204195,7 +204192,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204207,7 +204204,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204222,7 +204219,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -204231,7 +204228,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -204239,7 +204236,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -204249,7 +204246,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -204258,7 +204255,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -204270,7 +204267,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -204334,7 +204331,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -204348,7 +204345,7 @@ void m68008_device::divs_w_dais_dd_dp8() // 81f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -204440,7 +204437,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -204481,13 +204478,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -204501,7 +204498,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204511,7 +204508,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204526,7 +204523,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -204534,7 +204531,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -204574,7 +204571,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -204612,7 +204609,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -204804,7 +204801,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -204813,7 +204810,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -204821,12 +204818,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204834,7 +204831,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204851,7 +204848,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -204859,7 +204856,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -204905,7 +204902,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204932,13 +204929,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204946,27 +204943,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204978,7 +204975,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204990,7 +204987,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205005,7 +205002,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205014,7 +205011,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205022,7 +205019,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205032,7 +205029,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205041,7 +205038,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205053,7 +205050,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205117,7 +205114,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -205171,7 +205168,7 @@ void m68008_device::divs_w_adr16_dd_dp8() // 81f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -205210,13 +205207,13 @@ void m68008_device::divs_w_adr16_dd_dp8() // 81f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205230,7 +205227,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -205240,7 +205237,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -205255,7 +205252,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -205263,7 +205260,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -205303,7 +205300,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -205341,7 +205338,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -205533,7 +205530,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -205542,7 +205539,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -205550,12 +205547,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -205563,7 +205560,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205580,7 +205577,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -205588,7 +205585,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -205634,7 +205631,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -205661,13 +205658,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205675,27 +205672,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -205707,7 +205704,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205719,7 +205716,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205734,7 +205731,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205743,7 +205740,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205751,7 +205748,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205761,7 +205758,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205770,7 +205767,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205782,7 +205779,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205846,7 +205843,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -205936,7 +205933,7 @@ void m68008_device::divs_w_adr32_dd_dp8() // 81f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -205975,13 +205972,13 @@ void m68008_device::divs_w_adr32_dd_dp8() // 81f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205995,7 +205992,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206005,7 +206002,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206020,7 +206017,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -206028,7 +206025,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -206068,7 +206065,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -206106,7 +206103,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: @@ -206298,7 +206295,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -206307,7 +206304,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -206315,12 +206312,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -206328,7 +206325,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206345,7 +206342,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -206353,7 +206350,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206399,7 +206396,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -206426,13 +206423,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206440,27 +206437,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206472,7 +206469,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206484,7 +206481,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206499,7 +206496,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -206508,7 +206505,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -206516,7 +206513,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -206526,7 +206523,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -206535,7 +206532,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -206547,7 +206544,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -206611,7 +206608,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -206663,7 +206660,7 @@ void m68008_device::divs_w_dpc_dd_dp8() // 81fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -206704,13 +206701,13 @@ void m68008_device::divs_w_dpc_dd_dp8() // 81fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -206724,7 +206721,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206734,7 +206731,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206749,7 +206746,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -206757,7 +206754,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -206797,7 +206794,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -206835,7 +206832,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -207027,7 +207024,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -207036,7 +207033,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -207044,12 +207041,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207057,7 +207054,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207074,7 +207071,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -207082,7 +207079,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207128,7 +207125,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207155,13 +207152,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207169,27 +207166,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207201,7 +207198,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207213,7 +207210,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207228,7 +207225,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -207237,7 +207234,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -207245,7 +207242,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -207255,7 +207252,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -207264,7 +207261,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -207276,7 +207273,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -207340,7 +207337,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -207353,7 +207350,7 @@ void m68008_device::divs_w_dpci_dd_dp8() // 81fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -207445,7 +207442,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -207486,13 +207483,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -207506,7 +207503,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207516,7 +207513,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207531,7 +207528,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -207539,7 +207536,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -207579,7 +207576,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -207617,7 +207614,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -207809,7 +207806,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -207818,7 +207815,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -207826,12 +207823,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207839,7 +207836,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207856,7 +207853,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -207864,7 +207861,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207910,7 +207907,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207937,13 +207934,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207951,27 +207948,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207983,7 +207980,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207995,7 +207992,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208010,7 +208007,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208019,7 +208016,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208027,7 +208024,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208037,7 +208034,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208046,7 +208043,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208058,7 +208055,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208122,7 +208119,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -208178,13 +208175,13 @@ void m68008_device::divs_w_imm16_dd_dp8() // 81fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208198,7 +208195,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -208208,7 +208205,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -208223,7 +208220,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -208231,7 +208228,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -208271,7 +208268,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -208309,7 +208306,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -208501,7 +208498,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -208510,7 +208507,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -208518,12 +208515,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -208531,7 +208528,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208548,7 +208545,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -208556,7 +208553,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -208602,7 +208599,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -208629,13 +208626,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208643,27 +208640,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -208675,7 +208672,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208687,7 +208684,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208702,7 +208699,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208711,7 +208708,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208719,7 +208716,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208729,7 +208726,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208738,7 +208735,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208750,7 +208747,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208814,7 +208811,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -208832,7 +208829,7 @@ void m68008_device::sub_b_ds_dd_dp8() // 9000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -208891,7 +208888,7 @@ void m68008_device::sub_b_ais_dd_dp8() // 9010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -208914,7 +208911,7 @@ void m68008_device::sub_b_ais_dd_dp8() // 9010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -208979,7 +208976,7 @@ void m68008_device::sub_b_aips_dd_dp8() // 9018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -209000,7 +208997,7 @@ void m68008_device::sub_b_aips_dd_dp8() // 9018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209067,7 +209064,7 @@ void m68008_device::sub_b_pais_dd_dp8() // 9020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -209088,7 +209085,7 @@ void m68008_device::sub_b_pais_dd_dp8() // 9020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209184,7 +209181,7 @@ void m68008_device::sub_b_das_dd_dp8() // 9028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209207,7 +209204,7 @@ void m68008_device::sub_b_das_dd_dp8() // 9028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209264,7 +209261,7 @@ void m68008_device::sub_b_dais_dd_dp8() // 9030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -209356,7 +209353,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209379,7 +209376,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209476,7 +209473,7 @@ void m68008_device::sub_b_adr16_dd_dp8() // 9038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -209497,7 +209494,7 @@ void m68008_device::sub_b_adr16_dd_dp8() // 9038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209630,7 +209627,7 @@ void m68008_device::sub_b_adr32_dd_dp8() // 9039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -209651,7 +209648,7 @@ void m68008_device::sub_b_adr32_dd_dp8() // 9039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209746,7 +209743,7 @@ void m68008_device::sub_b_dpc_dd_dp8() // 903a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209769,7 +209766,7 @@ void m68008_device::sub_b_dpc_dd_dp8() // 903a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209825,7 +209822,7 @@ void m68008_device::sub_b_dpci_dd_dp8() // 903b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -209917,7 +209914,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209940,7 +209937,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210039,7 +210036,7 @@ void m68008_device::sub_b_imm8_dd_dp8() // 903c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210100,7 +210097,7 @@ void m68008_device::sub_w_ds_dd_dp8() // 9040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210161,7 +210158,7 @@ void m68008_device::sub_w_as_dd_dp8() // 9048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210220,7 +210217,7 @@ void m68008_device::sub_w_ais_dd_dp8() // 9050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -210261,7 +210258,7 @@ void m68008_device::sub_w_ais_dd_dp8() // 9050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210326,7 +210323,7 @@ void m68008_device::sub_w_aips_dd_dp8() // 9058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -210365,7 +210362,7 @@ void m68008_device::sub_w_aips_dd_dp8() // 9058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210432,7 +210429,7 @@ void m68008_device::sub_w_pais_dd_dp8() // 9060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -210471,7 +210468,7 @@ void m68008_device::sub_w_pais_dd_dp8() // 9060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210567,7 +210564,7 @@ void m68008_device::sub_w_das_dd_dp8() // 9068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -210608,7 +210605,7 @@ void m68008_device::sub_w_das_dd_dp8() // 9068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210665,7 +210662,7 @@ void m68008_device::sub_w_dais_dd_dp8() // 9070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -210757,7 +210754,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -210798,7 +210795,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210895,7 +210892,7 @@ void m68008_device::sub_w_adr16_dd_dp8() // 9078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -210934,7 +210931,7 @@ void m68008_device::sub_w_adr16_dd_dp8() // 9078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211067,7 +211064,7 @@ void m68008_device::sub_w_adr32_dd_dp8() // 9079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -211106,7 +211103,7 @@ void m68008_device::sub_w_adr32_dd_dp8() // 9079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211201,7 +211198,7 @@ void m68008_device::sub_w_dpc_dd_dp8() // 907a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -211242,7 +211239,7 @@ void m68008_device::sub_w_dpc_dd_dp8() // 907a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211298,7 +211295,7 @@ void m68008_device::sub_w_dpci_dd_dp8() // 907b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -211390,7 +211387,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -211431,7 +211428,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211530,7 +211527,7 @@ void m68008_device::sub_w_imm16_dd_dp8() // 907c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211591,7 +211588,7 @@ void m68008_device::sub_l_ds_dd_dp8() // 9080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -211630,7 +211627,7 @@ void m68008_device::sub_l_ds_dd_dp8() // 9080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -211660,7 +211657,7 @@ void m68008_device::sub_l_as_dd_dp8() // 9088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -211699,7 +211696,7 @@ void m68008_device::sub_l_as_dd_dp8() // 9088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -211727,7 +211724,7 @@ void m68008_device::sub_l_ais_dd_dp8() // 9090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -211804,12 +211801,12 @@ void m68008_device::sub_l_ais_dd_dp8() // 9090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211869,7 +211866,7 @@ void m68008_device::sub_l_aips_dd_dp8() // 9098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -211949,12 +211946,12 @@ void m68008_device::sub_l_aips_dd_dp8() // 9098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212013,7 +212010,7 @@ void m68008_device::sub_l_pais_dd_dp8() // 90a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -212095,12 +212092,12 @@ void m68008_device::sub_l_pais_dd_dp8() // 90a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212196,7 +212193,7 @@ void m68008_device::sub_l_das_dd_dp8() // 90a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -212273,12 +212270,12 @@ void m68008_device::sub_l_das_dd_dp8() // 90a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212336,7 +212333,7 @@ void m68008_device::sub_l_dais_dd_dp8() // 90b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -212427,7 +212424,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -212504,12 +212501,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212607,7 +212604,7 @@ void m68008_device::sub_l_adr16_dd_dp8() // 90b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -212684,12 +212681,12 @@ void m68008_device::sub_l_adr16_dd_dp8() // 90b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212823,7 +212820,7 @@ void m68008_device::sub_l_adr32_dd_dp8() // 90b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -212900,12 +212897,12 @@ void m68008_device::sub_l_adr32_dd_dp8() // 90b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213000,7 +212997,7 @@ void m68008_device::sub_l_dpc_dd_dp8() // 90ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -213077,12 +213074,12 @@ void m68008_device::sub_l_dpc_dd_dp8() // 90ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213139,7 +213136,7 @@ void m68008_device::sub_l_dpci_dd_dp8() // 90bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -213230,7 +213227,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -213307,12 +213304,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213448,7 +213445,7 @@ void m68008_device::sub_l_imm32_dd_dp8() // 90bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -213487,7 +213484,7 @@ void m68008_device::sub_l_imm32_dd_dp8() // 90bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -213517,7 +213514,7 @@ void m68008_device::suba_w_ds_ad_dp8() // 90c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213555,7 +213552,7 @@ void m68008_device::suba_w_ds_ad_dp8() // 90c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213584,7 +213581,7 @@ void m68008_device::suba_w_as_ad_dp8() // 90c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213622,7 +213619,7 @@ void m68008_device::suba_w_as_ad_dp8() // 90c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213649,7 +213646,7 @@ void m68008_device::suba_w_ais_ad_dp8() // 90d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -213690,7 +213687,7 @@ void m68008_device::suba_w_ais_ad_dp8() // 90d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213728,7 +213725,7 @@ void m68008_device::suba_w_ais_ad_dp8() // 90d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213761,7 +213758,7 @@ void m68008_device::suba_w_aips_ad_dp8() // 90d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -213800,7 +213797,7 @@ void m68008_device::suba_w_aips_ad_dp8() // 90d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213838,7 +213835,7 @@ void m68008_device::suba_w_aips_ad_dp8() // 90d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213873,7 +213870,7 @@ void m68008_device::suba_w_pais_ad_dp8() // 90e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -213912,7 +213909,7 @@ void m68008_device::suba_w_pais_ad_dp8() // 90e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213950,7 +213947,7 @@ void m68008_device::suba_w_pais_ad_dp8() // 90e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214014,7 +214011,7 @@ void m68008_device::suba_w_das_ad_dp8() // 90e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214055,7 +214052,7 @@ void m68008_device::suba_w_das_ad_dp8() // 90e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214093,7 +214090,7 @@ void m68008_device::suba_w_das_ad_dp8() // 90e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214118,7 +214115,7 @@ void m68008_device::suba_w_dais_ad_dp8() // 90f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -214210,7 +214207,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214251,7 +214248,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214289,7 +214286,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214354,7 +214351,7 @@ void m68008_device::suba_w_adr16_ad_dp8() // 90f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -214393,7 +214390,7 @@ void m68008_device::suba_w_adr16_ad_dp8() // 90f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214431,7 +214428,7 @@ void m68008_device::suba_w_adr16_ad_dp8() // 90f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214532,7 +214529,7 @@ void m68008_device::suba_w_adr32_ad_dp8() // 90f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -214571,7 +214568,7 @@ void m68008_device::suba_w_adr32_ad_dp8() // 90f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214609,7 +214606,7 @@ void m68008_device::suba_w_adr32_ad_dp8() // 90f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214672,7 +214669,7 @@ void m68008_device::suba_w_dpc_ad_dp8() // 90fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214713,7 +214710,7 @@ void m68008_device::suba_w_dpc_ad_dp8() // 90fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214751,7 +214748,7 @@ void m68008_device::suba_w_dpc_ad_dp8() // 90fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214775,7 +214772,7 @@ void m68008_device::suba_w_dpci_ad_dp8() // 90fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -214867,7 +214864,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214908,7 +214905,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214946,7 +214943,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -215013,7 +215010,7 @@ void m68008_device::suba_w_imm16_ad_dp8() // 90fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -215051,7 +215048,7 @@ void m68008_device::suba_w_imm16_ad_dp8() // 90fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -215080,7 +215077,7 @@ void m68008_device::subx_b_ds_dd_dp8() // 9100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -215145,7 +215142,7 @@ void m68008_device::subx_b_pais_paid_dp8() // 9108 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -215186,7 +215183,7 @@ void m68008_device::subx_b_pais_paid_dp8() // 9108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin alu_subx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215259,7 +215256,7 @@ void m68008_device::sub_b_dd_ais_dp8() // 9110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215282,7 +215279,7 @@ void m68008_device::sub_b_dd_ais_dp8() // 9110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215361,7 +215358,7 @@ void m68008_device::sub_b_dd_aips_dp8() // 9118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -215382,7 +215379,7 @@ void m68008_device::sub_b_dd_aips_dp8() // 9118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215463,7 +215460,7 @@ void m68008_device::sub_b_dd_pais_dp8() // 9120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -215484,7 +215481,7 @@ void m68008_device::sub_b_dd_pais_dp8() // 9120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215594,7 +215591,7 @@ void m68008_device::sub_b_dd_das_dp8() // 9128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215617,7 +215614,7 @@ void m68008_device::sub_b_dd_das_dp8() // 9128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215688,7 +215685,7 @@ void m68008_device::sub_b_dd_dais_dp8() // 9130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -215780,7 +215777,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215803,7 +215800,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215914,7 +215911,7 @@ void m68008_device::sub_b_dd_adr16_dp8() // 9138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -215935,7 +215932,7 @@ void m68008_device::sub_b_dd_adr16_dp8() // 9138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216082,7 +216079,7 @@ void m68008_device::sub_b_dd_adr32_dp8() // 9139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -216103,7 +216100,7 @@ void m68008_device::sub_b_dd_adr32_dp8() // 9139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216178,7 +216175,7 @@ void m68008_device::subx_w_ds_dd_dp8() // 9140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -216243,7 +216240,7 @@ void m68008_device::subx_w_pais_paid_dp8() // 9148 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; @@ -216320,7 +216317,7 @@ void m68008_device::subx_w_pais_paid_dp8() // 9148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin alu_subx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216411,7 +216408,7 @@ void m68008_device::sub_w_dd_ais_dp8() // 9150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216452,7 +216449,7 @@ void m68008_device::sub_w_dd_ais_dp8() // 9150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216549,7 +216546,7 @@ void m68008_device::sub_w_dd_aips_dp8() // 9158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -216588,7 +216585,7 @@ void m68008_device::sub_w_dd_aips_dp8() // 9158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216687,7 +216684,7 @@ void m68008_device::sub_w_dd_pais_dp8() // 9160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -216726,7 +216723,7 @@ void m68008_device::sub_w_dd_pais_dp8() // 9160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216854,7 +216851,7 @@ void m68008_device::sub_w_dd_das_dp8() // 9168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216895,7 +216892,7 @@ void m68008_device::sub_w_dd_das_dp8() // 9168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216984,7 +216981,7 @@ void m68008_device::sub_w_dd_dais_dp8() // 9170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -217076,7 +217073,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -217117,7 +217114,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217246,7 +217243,7 @@ void m68008_device::sub_w_dd_adr16_dp8() // 9178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -217285,7 +217282,7 @@ void m68008_device::sub_w_dd_adr16_dp8() // 9178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217450,7 +217447,7 @@ void m68008_device::sub_w_dd_adr32_dp8() // 9179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -217489,7 +217486,7 @@ void m68008_device::sub_w_dd_adr32_dp8() // 9179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217582,7 +217579,7 @@ void m68008_device::subx_l_ds_dd_dp8() // 9180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 @@ -217621,7 +217618,7 @@ void m68008_device::subx_l_ds_dd_dp8() // 9180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -217691,7 +217688,7 @@ void m68008_device::subx_l_pais_paid_dp8() // 9188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; @@ -217768,7 +217765,7 @@ void m68008_device::subx_l_pais_paid_dp8() // 9188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin alu_subx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -217842,7 +217839,7 @@ void m68008_device::subx_l_pais_paid_dp8() // 9188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin alu_subc(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217933,7 +217930,7 @@ void m68008_device::sub_l_dd_ais_dp8() // 9190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -218010,7 +218007,7 @@ void m68008_device::sub_l_dd_ais_dp8() // 9190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218050,7 +218047,7 @@ void m68008_device::sub_l_dd_ais_dp8() // 9190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218139,7 +218136,7 @@ void m68008_device::sub_l_dd_aips_dp8() // 9198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -218219,7 +218216,7 @@ void m68008_device::sub_l_dd_aips_dp8() // 9198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218259,7 +218256,7 @@ void m68008_device::sub_l_dd_aips_dp8() // 9198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218347,7 +218344,7 @@ void m68008_device::sub_l_dd_pais_dp8() // 91a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -218429,7 +218426,7 @@ void m68008_device::sub_l_dd_pais_dp8() // 91a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218469,7 +218466,7 @@ void m68008_device::sub_l_dd_pais_dp8() // 91a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218594,7 +218591,7 @@ void m68008_device::sub_l_dd_das_dp8() // 91a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -218671,7 +218668,7 @@ void m68008_device::sub_l_dd_das_dp8() // 91a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218711,7 +218708,7 @@ void m68008_device::sub_l_dd_das_dp8() // 91a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218798,7 +218795,7 @@ void m68008_device::sub_l_dd_dais_dp8() // 91b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -218889,7 +218886,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -218966,7 +218963,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -219006,7 +219003,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -219133,7 +219130,7 @@ void m68008_device::sub_l_dd_adr16_dp8() // 91b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -219210,7 +219207,7 @@ void m68008_device::sub_l_dd_adr16_dp8() // 91b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -219250,7 +219247,7 @@ void m68008_device::sub_l_dd_adr16_dp8() // 91b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -219413,7 +219410,7 @@ void m68008_device::sub_l_dd_adr32_dp8() // 91b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -219490,7 +219487,7 @@ void m68008_device::sub_l_dd_adr32_dp8() // 91b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -219530,7 +219527,7 @@ void m68008_device::sub_l_dd_adr32_dp8() // 91b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -219621,7 +219618,7 @@ void m68008_device::suba_l_ds_ad_dp8() // 91c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -219659,7 +219656,7 @@ void m68008_device::suba_l_ds_ad_dp8() // 91c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219688,7 +219685,7 @@ void m68008_device::suba_l_as_ad_dp8() // 91c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -219726,7 +219723,7 @@ void m68008_device::suba_l_as_ad_dp8() // 91c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219753,7 +219750,7 @@ void m68008_device::suba_l_ais_ad_dp8() // 91d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -219830,11 +219827,11 @@ void m68008_device::suba_l_ais_ad_dp8() // 91d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -219893,7 +219890,7 @@ void m68008_device::suba_l_aips_ad_dp8() // 91d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -219973,11 +219970,11 @@ void m68008_device::suba_l_aips_ad_dp8() // 91d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -220035,7 +220032,7 @@ void m68008_device::suba_l_pais_ad_dp8() // 91e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -220117,11 +220114,11 @@ void m68008_device::suba_l_pais_ad_dp8() // 91e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -220216,7 +220213,7 @@ void m68008_device::suba_l_das_ad_dp8() // 91e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -220293,11 +220290,11 @@ void m68008_device::suba_l_das_ad_dp8() // 91e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -220354,7 +220351,7 @@ void m68008_device::suba_l_dais_ad_dp8() // 91f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -220445,7 +220442,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -220522,11 +220519,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -220623,7 +220620,7 @@ void m68008_device::suba_l_adr16_ad_dp8() // 91f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -220700,11 +220697,11 @@ void m68008_device::suba_l_adr16_ad_dp8() // 91f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -220837,7 +220834,7 @@ void m68008_device::suba_l_adr32_ad_dp8() // 91f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -220914,11 +220911,11 @@ void m68008_device::suba_l_adr32_ad_dp8() // 91f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -221012,7 +221009,7 @@ void m68008_device::suba_l_dpc_ad_dp8() // 91fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -221089,11 +221086,11 @@ void m68008_device::suba_l_dpc_ad_dp8() // 91fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -221149,7 +221146,7 @@ void m68008_device::suba_l_dpci_ad_dp8() // 91fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -221240,7 +221237,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -221317,11 +221314,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -221456,7 +221453,7 @@ void m68008_device::suba_l_imm32_ad_dp8() // 91fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -221494,7 +221491,7 @@ void m68008_device::suba_l_imm32_ad_dp8() // 91fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -221523,7 +221520,7 @@ void m68008_device::cmp_b_ds_dd_dp8() // b000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221581,7 +221578,7 @@ void m68008_device::cmp_b_ais_dd_dp8() // b010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221604,7 +221601,7 @@ void m68008_device::cmp_b_ais_dd_dp8() // b010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221668,7 +221665,7 @@ void m68008_device::cmp_b_aips_dd_dp8() // b018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -221689,7 +221686,7 @@ void m68008_device::cmp_b_aips_dd_dp8() // b018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221755,7 +221752,7 @@ void m68008_device::cmp_b_pais_dd_dp8() // b020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -221776,7 +221773,7 @@ void m68008_device::cmp_b_pais_dd_dp8() // b020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221871,7 +221868,7 @@ void m68008_device::cmp_b_das_dd_dp8() // b028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221894,7 +221891,7 @@ void m68008_device::cmp_b_das_dd_dp8() // b028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221950,7 +221947,7 @@ void m68008_device::cmp_b_dais_dd_dp8() // b030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -222042,7 +222039,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222065,7 +222062,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222161,7 +222158,7 @@ void m68008_device::cmp_b_adr16_dd_dp8() // b038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -222182,7 +222179,7 @@ void m68008_device::cmp_b_adr16_dd_dp8() // b038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222314,7 +222311,7 @@ void m68008_device::cmp_b_adr32_dd_dp8() // b039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -222335,7 +222332,7 @@ void m68008_device::cmp_b_adr32_dd_dp8() // b039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222429,7 +222426,7 @@ void m68008_device::cmp_b_dpc_dd_dp8() // b03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222452,7 +222449,7 @@ void m68008_device::cmp_b_dpc_dd_dp8() // b03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222507,7 +222504,7 @@ void m68008_device::cmp_b_dpci_dd_dp8() // b03b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -222599,7 +222596,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222622,7 +222619,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222720,7 +222717,7 @@ void m68008_device::cmp_b_imm8_dd_dp8() // b03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222780,7 +222777,7 @@ void m68008_device::cmp_w_ds_dd_dp8() // b040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222840,7 +222837,7 @@ void m68008_device::cmp_w_as_dd_dp8() // b048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222898,7 +222895,7 @@ void m68008_device::cmp_w_ais_dd_dp8() // b050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222939,7 +222936,7 @@ void m68008_device::cmp_w_ais_dd_dp8() // b050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223003,7 +223000,7 @@ void m68008_device::cmp_w_aips_dd_dp8() // b058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -223042,7 +223039,7 @@ void m68008_device::cmp_w_aips_dd_dp8() // b058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223108,7 +223105,7 @@ void m68008_device::cmp_w_pais_dd_dp8() // b060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -223147,7 +223144,7 @@ void m68008_device::cmp_w_pais_dd_dp8() // b060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223242,7 +223239,7 @@ void m68008_device::cmp_w_das_dd_dp8() // b068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -223283,7 +223280,7 @@ void m68008_device::cmp_w_das_dd_dp8() // b068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223339,7 +223336,7 @@ void m68008_device::cmp_w_dais_dd_dp8() // b070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -223431,7 +223428,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -223472,7 +223469,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223568,7 +223565,7 @@ void m68008_device::cmp_w_adr16_dd_dp8() // b078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -223607,7 +223604,7 @@ void m68008_device::cmp_w_adr16_dd_dp8() // b078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223739,7 +223736,7 @@ void m68008_device::cmp_w_adr32_dd_dp8() // b079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -223778,7 +223775,7 @@ void m68008_device::cmp_w_adr32_dd_dp8() // b079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223872,7 +223869,7 @@ void m68008_device::cmp_w_dpc_dd_dp8() // b07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -223913,7 +223910,7 @@ void m68008_device::cmp_w_dpc_dd_dp8() // b07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223968,7 +223965,7 @@ void m68008_device::cmp_w_dpci_dd_dp8() // b07b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -224060,7 +224057,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -224101,7 +224098,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -224199,7 +224196,7 @@ void m68008_device::cmp_w_imm16_dd_dp8() // b07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -224259,11 +224256,11 @@ void m68008_device::cmp_l_ds_dd_dp8() // b080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224324,11 +224321,11 @@ void m68008_device::cmp_l_as_dd_dp8() // b088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224387,7 +224384,7 @@ void m68008_device::cmp_l_ais_dd_dp8() // b090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -224464,11 +224461,11 @@ void m68008_device::cmp_l_ais_dd_dp8() // b090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224527,7 +224524,7 @@ void m68008_device::cmp_l_aips_dd_dp8() // b098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -224607,11 +224604,11 @@ void m68008_device::cmp_l_aips_dd_dp8() // b098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224669,7 +224666,7 @@ void m68008_device::cmp_l_pais_dd_dp8() // b0a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -224751,11 +224748,11 @@ void m68008_device::cmp_l_pais_dd_dp8() // b0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224850,7 +224847,7 @@ void m68008_device::cmp_l_das_dd_dp8() // b0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -224927,11 +224924,11 @@ void m68008_device::cmp_l_das_dd_dp8() // b0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224988,7 +224985,7 @@ void m68008_device::cmp_l_dais_dd_dp8() // b0b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -225079,7 +225076,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -225156,11 +225153,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225257,7 +225254,7 @@ void m68008_device::cmp_l_adr16_dd_dp8() // b0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -225334,11 +225331,11 @@ void m68008_device::cmp_l_adr16_dd_dp8() // b0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225471,7 +225468,7 @@ void m68008_device::cmp_l_adr32_dd_dp8() // b0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -225548,11 +225545,11 @@ void m68008_device::cmp_l_adr32_dd_dp8() // b0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225646,7 +225643,7 @@ void m68008_device::cmp_l_dpc_dd_dp8() // b0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -225723,11 +225720,11 @@ void m68008_device::cmp_l_dpc_dd_dp8() // b0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225783,7 +225780,7 @@ void m68008_device::cmp_l_dpci_dd_dp8() // b0bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -225874,7 +225871,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -225951,11 +225948,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226090,11 +226087,11 @@ void m68008_device::cmp_l_imm32_dd_dp8() // b0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226155,11 +226152,11 @@ void m68008_device::cmpa_w_ds_ad_dp8() // b0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226220,11 +226217,11 @@ void m68008_device::cmpa_w_as_ad_dp8() // b0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226283,7 +226280,7 @@ void m68008_device::cmpa_w_ais_ad_dp8() // b0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -226324,11 +226321,11 @@ void m68008_device::cmpa_w_ais_ad_dp8() // b0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226393,7 +226390,7 @@ void m68008_device::cmpa_w_aips_ad_dp8() // b0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -226432,11 +226429,11 @@ void m68008_device::cmpa_w_aips_ad_dp8() // b0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226503,7 +226500,7 @@ void m68008_device::cmpa_w_pais_ad_dp8() // b0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -226542,11 +226539,11 @@ void m68008_device::cmpa_w_pais_ad_dp8() // b0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226642,7 +226639,7 @@ void m68008_device::cmpa_w_das_ad_dp8() // b0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -226683,11 +226680,11 @@ void m68008_device::cmpa_w_das_ad_dp8() // b0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226744,7 +226741,7 @@ void m68008_device::cmpa_w_dais_ad_dp8() // b0f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -226836,7 +226833,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -226877,11 +226874,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226978,7 +226975,7 @@ void m68008_device::cmpa_w_adr16_ad_dp8() // b0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -227017,11 +227014,11 @@ void m68008_device::cmpa_w_adr16_ad_dp8() // b0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227154,7 +227151,7 @@ void m68008_device::cmpa_w_adr32_ad_dp8() // b0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -227193,11 +227190,11 @@ void m68008_device::cmpa_w_adr32_ad_dp8() // b0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227292,7 +227289,7 @@ void m68008_device::cmpa_w_dpc_ad_dp8() // b0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -227333,11 +227330,11 @@ void m68008_device::cmpa_w_dpc_ad_dp8() // b0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227393,7 +227390,7 @@ void m68008_device::cmpa_w_dpci_ad_dp8() // b0fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -227485,7 +227482,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -227526,11 +227523,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227629,11 +227626,11 @@ void m68008_device::cmpa_w_imm16_ad_dp8() // b0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227693,7 +227690,7 @@ void m68008_device::eor_b_dd_ds_dp8() // b100 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -227701,7 +227698,7 @@ void m68008_device::eor_b_dd_ds_dp8() // b100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -227776,7 +227773,7 @@ void m68008_device::cmpm_b_aips_aipd_dp8() // b108 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -227798,7 +227795,7 @@ void m68008_device::cmpm_b_aips_aipd_dp8() // b108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin alu_sub8(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227852,11 +227849,11 @@ void m68008_device::eor_b_dd_ais_dp8() // b110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -227876,7 +227873,7 @@ void m68008_device::eor_b_dd_ais_dp8() // b110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227918,7 +227915,7 @@ void m68008_device::eor_b_dd_ais_dp8() // b110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -227953,12 +227950,12 @@ void m68008_device::eor_b_dd_aips_dp8() // b118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -227979,7 +227976,7 @@ void m68008_device::eor_b_dd_aips_dp8() // b118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228021,7 +228018,7 @@ void m68008_device::eor_b_dd_aips_dp8() // b118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -228055,7 +228052,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -228063,7 +228060,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -228084,7 +228081,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228126,7 +228123,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -228158,7 +228155,7 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -228196,11 +228193,11 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -228220,7 +228217,7 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228262,7 +228259,7 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -228292,14 +228289,14 @@ void m68008_device::eor_b_dd_dais_dp8() // b130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -228307,7 +228304,7 @@ void m68008_device::eor_b_dd_dais_dp8() // b130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -228346,7 +228343,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -228387,11 +228384,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -228411,7 +228408,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228453,7 +228450,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -228487,7 +228484,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -228525,7 +228522,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -228546,7 +228543,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228588,7 +228585,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -228620,7 +228617,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -228659,7 +228656,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -228697,7 +228694,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -228718,7 +228715,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228760,7 +228757,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -228793,7 +228790,7 @@ void m68008_device::eor_w_dd_ds_dp8() // b140 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -228801,7 +228798,7 @@ void m68008_device::eor_w_dd_ds_dp8() // b140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -228894,7 +228891,7 @@ void m68008_device::cmpm_w_aips_aipd_dp8() // b148 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -228934,7 +228931,7 @@ void m68008_device::cmpm_w_aips_aipd_dp8() // b148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228988,11 +228985,11 @@ void m68008_device::eor_w_dd_ais_dp8() // b150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -229030,7 +229027,7 @@ void m68008_device::eor_w_dd_ais_dp8() // b150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229072,7 +229069,7 @@ void m68008_device::eor_w_dd_ais_dp8() // b150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -229125,12 +229122,12 @@ void m68008_device::eor_w_dd_aips_dp8() // b158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -229169,7 +229166,7 @@ void m68008_device::eor_w_dd_aips_dp8() // b158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229211,7 +229208,7 @@ void m68008_device::eor_w_dd_aips_dp8() // b158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -229263,7 +229260,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -229271,7 +229268,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -229310,7 +229307,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229352,7 +229349,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -229402,7 +229399,7 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -229440,11 +229437,11 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -229482,7 +229479,7 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229524,7 +229521,7 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -229572,14 +229569,14 @@ void m68008_device::eor_w_dd_dais_dp8() // b170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -229587,7 +229584,7 @@ void m68008_device::eor_w_dd_dais_dp8() // b170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -229626,7 +229623,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -229667,11 +229664,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -229709,7 +229706,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229751,7 +229748,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -229803,7 +229800,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -229841,7 +229838,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -229880,7 +229877,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229922,7 +229919,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -229972,7 +229969,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -230011,7 +230008,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -230049,7 +230046,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -230088,7 +230085,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230130,7 +230127,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -230181,12 +230178,12 @@ void m68008_device::eor_l_dd_ds_dp8() // b180 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -230221,7 +230218,7 @@ void m68008_device::eor_l_dd_ds_dp8() // b180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry] alu_eor(high16(m_da[rx]), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -230230,7 +230227,7 @@ void m68008_device::eor_l_dd_ds_dp8() // b180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -230327,7 +230324,7 @@ void m68008_device::cmpm_l_aips_aipd_dp8() // b188 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -230401,13 +230398,13 @@ void m68008_device::cmpm_l_aips_aipd_dp8() // b188 f1f8 m_aob = m_pc; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); // 157 cmml7 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue alu_subc(m_alub, m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230461,7 +230458,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -230501,7 +230498,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -230539,7 +230536,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230579,7 +230576,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -230619,7 +230616,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -230669,7 +230666,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -230709,11 +230706,11 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -230751,7 +230748,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230791,7 +230788,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -230831,7 +230828,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -230880,14 +230877,14 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -230926,7 +230923,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -230964,7 +230961,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231004,7 +231001,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231044,7 +231041,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -231094,7 +231091,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -231131,7 +231128,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -231171,7 +231168,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231209,7 +231206,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231249,7 +231246,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231289,7 +231286,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -231337,14 +231334,14 @@ void m68008_device::eor_l_dd_dais_dp8() // b1b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -231352,7 +231349,7 @@ void m68008_device::eor_l_dd_dais_dp8() // b1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -231391,7 +231388,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -231431,7 +231428,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -231471,7 +231468,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231509,7 +231506,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231549,7 +231546,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231589,7 +231586,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -231641,7 +231638,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -231679,7 +231676,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -231719,7 +231716,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -231757,7 +231754,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231797,7 +231794,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231837,7 +231834,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -231887,7 +231884,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -231926,7 +231923,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -231964,7 +231961,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -232004,7 +232001,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -232042,7 +232039,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232082,7 +232079,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -232122,7 +232119,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -232174,11 +232171,11 @@ void m68008_device::cmpa_l_ds_ad_dp8() // b1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232239,11 +232236,11 @@ void m68008_device::cmpa_l_as_ad_dp8() // b1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232302,7 +232299,7 @@ void m68008_device::cmpa_l_ais_ad_dp8() // b1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -232379,11 +232376,11 @@ void m68008_device::cmpa_l_ais_ad_dp8() // b1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232442,7 +232439,7 @@ void m68008_device::cmpa_l_aips_ad_dp8() // b1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -232522,11 +232519,11 @@ void m68008_device::cmpa_l_aips_ad_dp8() // b1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232584,7 +232581,7 @@ void m68008_device::cmpa_l_pais_ad_dp8() // b1e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -232666,11 +232663,11 @@ void m68008_device::cmpa_l_pais_ad_dp8() // b1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232765,7 +232762,7 @@ void m68008_device::cmpa_l_das_ad_dp8() // b1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -232842,11 +232839,11 @@ void m68008_device::cmpa_l_das_ad_dp8() // b1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232903,7 +232900,7 @@ void m68008_device::cmpa_l_dais_ad_dp8() // b1f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -232994,7 +232991,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -233071,11 +233068,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233172,7 +233169,7 @@ void m68008_device::cmpa_l_adr16_ad_dp8() // b1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -233249,11 +233246,11 @@ void m68008_device::cmpa_l_adr16_ad_dp8() // b1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233386,7 +233383,7 @@ void m68008_device::cmpa_l_adr32_ad_dp8() // b1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -233463,11 +233460,11 @@ void m68008_device::cmpa_l_adr32_ad_dp8() // b1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233561,7 +233558,7 @@ void m68008_device::cmpa_l_dpc_ad_dp8() // b1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -233638,11 +233635,11 @@ void m68008_device::cmpa_l_dpc_ad_dp8() // b1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233698,7 +233695,7 @@ void m68008_device::cmpa_l_dpci_ad_dp8() // b1fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -233789,7 +233786,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -233866,11 +233863,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234005,11 +234002,11 @@ void m68008_device::cmpa_l_imm32_ad_dp8() // b1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234070,7 +234067,7 @@ void m68008_device::and_b_ds_dd_dp8() // c000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234078,7 +234075,7 @@ void m68008_device::and_b_ds_dd_dp8() // c000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234130,11 +234127,11 @@ void m68008_device::and_b_ais_dd_dp8() // c010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -234154,7 +234151,7 @@ void m68008_device::and_b_ais_dd_dp8() // c010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234162,7 +234159,7 @@ void m68008_device::and_b_ais_dd_dp8() // c010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234217,12 +234214,12 @@ void m68008_device::and_b_aips_dd_dp8() // c018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -234243,7 +234240,7 @@ void m68008_device::and_b_aips_dd_dp8() // c018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234251,7 +234248,7 @@ void m68008_device::and_b_aips_dd_dp8() // c018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234305,7 +234302,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -234313,7 +234310,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -234334,7 +234331,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234342,7 +234339,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234394,7 +234391,7 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234432,11 +234429,11 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -234456,7 +234453,7 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234464,7 +234461,7 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234514,14 +234511,14 @@ void m68008_device::and_b_dais_dd_dp8() // c030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -234529,7 +234526,7 @@ void m68008_device::and_b_dais_dd_dp8() // c030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234568,7 +234565,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234609,11 +234606,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -234633,7 +234630,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234641,7 +234638,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234695,7 +234692,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -234733,7 +234730,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -234754,7 +234751,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234762,7 +234759,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234814,7 +234811,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234853,7 +234850,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -234891,7 +234888,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -234912,7 +234909,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234920,7 +234917,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -234971,7 +234968,7 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235009,11 +235006,11 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -235033,7 +235030,7 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235041,7 +235038,7 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235090,14 +235087,14 @@ void m68008_device::and_b_dpci_dd_dp8() // c03b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -235105,7 +235102,7 @@ void m68008_device::and_b_dpci_dd_dp8() // c03b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235144,7 +235141,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235185,11 +235182,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob); @@ -235209,7 +235206,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235217,7 +235214,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235271,7 +235268,7 @@ void m68008_device::and_b_imm8_dd_dp8() // c03c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235310,7 +235307,7 @@ void m68008_device::and_b_imm8_dd_dp8() // c03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx] alu_and8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235318,7 +235315,7 @@ void m68008_device::and_b_imm8_dd_dp8() // c03c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235372,7 +235369,7 @@ void m68008_device::and_w_ds_dd_dp8() // c040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235380,7 +235377,7 @@ void m68008_device::and_w_ds_dd_dp8() // c040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235432,11 +235429,11 @@ void m68008_device::and_w_ais_dd_dp8() // c050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -235474,7 +235471,7 @@ void m68008_device::and_w_ais_dd_dp8() // c050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235482,7 +235479,7 @@ void m68008_device::and_w_ais_dd_dp8() // c050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235537,12 +235534,12 @@ void m68008_device::and_w_aips_dd_dp8() // c058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -235581,7 +235578,7 @@ void m68008_device::and_w_aips_dd_dp8() // c058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235589,7 +235586,7 @@ void m68008_device::and_w_aips_dd_dp8() // c058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235643,7 +235640,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -235651,7 +235648,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -235690,7 +235687,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235698,7 +235695,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235750,7 +235747,7 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235788,11 +235785,11 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -235830,7 +235827,7 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235838,7 +235835,7 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235888,14 +235885,14 @@ void m68008_device::and_w_dais_dd_dp8() // c070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -235903,7 +235900,7 @@ void m68008_device::and_w_dais_dd_dp8() // c070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235942,7 +235939,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -235983,11 +235980,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -236025,7 +236022,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236033,7 +236030,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236087,7 +236084,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -236125,7 +236122,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -236164,7 +236161,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236172,7 +236169,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236224,7 +236221,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236263,7 +236260,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -236301,7 +236298,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -236340,7 +236337,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236348,7 +236345,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236399,7 +236396,7 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236437,11 +236434,11 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236479,7 +236476,7 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236487,7 +236484,7 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236536,14 +236533,14 @@ void m68008_device::and_w_dpci_dd_dp8() // c07b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -236551,7 +236548,7 @@ void m68008_device::and_w_dpci_dd_dp8() // c07b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236590,7 +236587,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236631,11 +236628,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236673,7 +236670,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236681,7 +236678,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236735,7 +236732,7 @@ void m68008_device::and_w_imm16_dd_dp8() // c07c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236774,7 +236771,7 @@ void m68008_device::and_w_imm16_dd_dp8() // c07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236782,7 +236779,7 @@ void m68008_device::and_w_imm16_dd_dp8() // c07c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236836,12 +236833,12 @@ void m68008_device::and_l_ds_dd_dp8() // c080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -236876,7 +236873,7 @@ void m68008_device::and_l_ds_dd_dp8() // c080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx] alu_and(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -236885,7 +236882,7 @@ void m68008_device::and_l_ds_dd_dp8() // c080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -236905,7 +236902,7 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -236945,7 +236942,7 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -236983,12 +236980,12 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237029,7 +237026,7 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237049,7 +237046,7 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -237089,11 +237086,11 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237131,12 +237128,12 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237177,7 +237174,7 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237196,14 +237193,14 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237242,7 +237239,7 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237280,12 +237277,12 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237326,7 +237323,7 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237346,7 +237343,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -237383,7 +237380,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -237423,7 +237420,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237461,12 +237458,12 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237507,7 +237504,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237525,14 +237522,14 @@ void m68008_device::and_l_dais_dd_dp8() // c0b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -237540,7 +237537,7 @@ void m68008_device::and_l_dais_dd_dp8() // c0b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -237579,7 +237576,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -237619,7 +237616,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -237659,7 +237656,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237697,12 +237694,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237743,7 +237740,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237765,7 +237762,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -237803,7 +237800,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -237843,7 +237840,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -237881,12 +237878,12 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237927,7 +237924,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237947,7 +237944,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -237986,7 +237983,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -238024,7 +238021,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -238064,7 +238061,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -238102,12 +238099,12 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -238148,7 +238145,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238167,7 +238164,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238204,7 +238201,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -238244,7 +238241,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238282,12 +238279,12 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -238328,7 +238325,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238345,14 +238342,14 @@ void m68008_device::and_l_dpci_dd_dp8() // c0bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -238360,7 +238357,7 @@ void m68008_device::and_l_dpci_dd_dp8() // c0bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238399,7 +238396,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238439,7 +238436,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -238479,7 +238476,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238517,12 +238514,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -238563,7 +238560,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238583,7 +238580,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238622,7 +238619,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238661,12 +238658,12 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -238701,7 +238698,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx] alu_and(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -238710,7 +238707,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238734,7 +238731,7 @@ void m68008_device::mulu_w_ds_dd_dp8() // c0c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -238782,7 +238779,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238794,7 +238791,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238806,7 +238803,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -238828,7 +238825,7 @@ void m68008_device::mulu_w_ais_dd_dp8() // c0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -238871,7 +238868,7 @@ void m68008_device::mulu_w_ais_dd_dp8() // c0d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -238919,7 +238916,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238931,7 +238928,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238943,7 +238940,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -238971,7 +238968,7 @@ void m68008_device::mulu_w_aips_dd_dp8() // c0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -239012,7 +239009,7 @@ void m68008_device::mulu_w_aips_dd_dp8() // c0d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239060,7 +239057,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239072,7 +239069,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239084,7 +239081,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239114,7 +239111,7 @@ void m68008_device::mulu_w_pais_dd_dp8() // c0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -239155,7 +239152,7 @@ void m68008_device::mulu_w_pais_dd_dp8() // c0e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239203,7 +239200,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239215,7 +239212,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239227,7 +239224,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239286,7 +239283,7 @@ void m68008_device::mulu_w_das_dd_dp8() // c0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -239329,7 +239326,7 @@ void m68008_device::mulu_w_das_dd_dp8() // c0e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239377,7 +239374,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239389,7 +239386,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239401,7 +239398,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239421,7 +239418,7 @@ void m68008_device::mulu_w_dais_dd_dp8() // c0f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -239513,7 +239510,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -239556,7 +239553,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239604,7 +239601,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239616,7 +239613,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239628,7 +239625,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239688,7 +239685,7 @@ void m68008_device::mulu_w_adr16_dd_dp8() // c0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -239729,7 +239726,7 @@ void m68008_device::mulu_w_adr16_dd_dp8() // c0f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239777,7 +239774,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239789,7 +239786,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239801,7 +239798,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239897,7 +239894,7 @@ void m68008_device::mulu_w_adr32_dd_dp8() // c0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -239938,7 +239935,7 @@ void m68008_device::mulu_w_adr32_dd_dp8() // c0f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239986,7 +239983,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239998,7 +239995,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240010,7 +240007,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240068,7 +240065,7 @@ void m68008_device::mulu_w_dpc_dd_dp8() // c0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -240111,7 +240108,7 @@ void m68008_device::mulu_w_dpc_dd_dp8() // c0fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -240159,7 +240156,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240171,7 +240168,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240183,7 +240180,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240202,7 +240199,7 @@ void m68008_device::mulu_w_dpci_dd_dp8() // c0fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -240294,7 +240291,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -240337,7 +240334,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -240385,7 +240382,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240397,7 +240394,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240409,7 +240406,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240473,7 +240470,7 @@ void m68008_device::mulu_w_imm16_dd_dp8() // c0fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -240521,7 +240518,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240533,7 +240530,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240545,7 +240542,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240569,12 +240566,12 @@ void m68008_device::abcd_ds_dd_dp8() // c100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx] alu_abcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -240638,7 +240635,7 @@ void m68008_device::abcd_pais_paid_dp8() // c108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -240678,12 +240675,12 @@ void m68008_device::abcd_pais_paid_dp8() // c108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin alu_abcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -240754,11 +240751,11 @@ void m68008_device::and_b_dd_ais_dp8() // c110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -240778,7 +240775,7 @@ void m68008_device::and_b_dd_ais_dp8() // c110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -240820,7 +240817,7 @@ void m68008_device::and_b_dd_ais_dp8() // c110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -240855,12 +240852,12 @@ void m68008_device::and_b_dd_aips_dp8() // c118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -240881,7 +240878,7 @@ void m68008_device::and_b_dd_aips_dp8() // c118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -240923,7 +240920,7 @@ void m68008_device::and_b_dd_aips_dp8() // c118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -240957,7 +240954,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -240965,7 +240962,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -240986,7 +240983,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241028,7 +241025,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_program8.write_interruptible(m_aob, m_dbout); @@ -241060,7 +241057,7 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -241098,11 +241095,11 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -241122,7 +241119,7 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241164,7 +241161,7 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -241194,14 +241191,14 @@ void m68008_device::and_b_dd_dais_dp8() // c130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -241209,7 +241206,7 @@ void m68008_device::and_b_dd_dais_dp8() // c130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -241248,7 +241245,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -241289,11 +241286,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob); @@ -241313,7 +241310,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241355,7 +241352,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -241389,7 +241386,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -241427,7 +241424,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -241448,7 +241445,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241490,7 +241487,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_program8.write_interruptible(m_aob, m_dbout); @@ -241522,7 +241519,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -241561,7 +241558,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -241599,7 +241596,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -241620,7 +241617,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241662,7 +241659,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_program8.write_interruptible(m_aob, m_dbout); @@ -241820,11 +241817,11 @@ void m68008_device::and_w_dd_ais_dp8() // c150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -241862,7 +241859,7 @@ void m68008_device::and_w_dd_ais_dp8() // c150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241904,7 +241901,7 @@ void m68008_device::and_w_dd_ais_dp8() // c150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -241957,12 +241954,12 @@ void m68008_device::and_w_dd_aips_dp8() // c158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -242001,7 +241998,7 @@ void m68008_device::and_w_dd_aips_dp8() // c158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242043,7 +242040,7 @@ void m68008_device::and_w_dd_aips_dp8() // c158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -242095,7 +242092,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -242103,7 +242100,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -242142,7 +242139,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242184,7 +242181,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -242234,7 +242231,7 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -242272,11 +242269,11 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -242314,7 +242311,7 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242356,7 +242353,7 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -242404,14 +242401,14 @@ void m68008_device::and_w_dd_dais_dp8() // c170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -242419,7 +242416,7 @@ void m68008_device::and_w_dd_dais_dp8() // c170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -242458,7 +242455,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -242499,11 +242496,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -242541,7 +242538,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242583,7 +242580,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -242635,7 +242632,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -242673,7 +242670,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -242712,7 +242709,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242754,7 +242751,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -242804,7 +242801,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -242843,7 +242840,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -242881,7 +242878,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -242920,7 +242917,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242962,7 +242959,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -243075,7 +243072,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -243115,7 +243112,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -243153,7 +243150,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243193,7 +243190,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243233,7 +243230,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -243283,7 +243280,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -243323,11 +243320,11 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -243365,7 +243362,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243405,7 +243402,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243445,7 +243442,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -243494,14 +243491,14 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -243540,7 +243537,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -243578,7 +243575,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243618,7 +243615,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243658,7 +243655,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -243708,7 +243705,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -243745,7 +243742,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -243785,7 +243782,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -243823,7 +243820,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243863,7 +243860,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243903,7 +243900,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -243951,14 +243948,14 @@ void m68008_device::and_l_dd_dais_dp8() // c1b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -243966,7 +243963,7 @@ void m68008_device::and_l_dd_dais_dp8() // c1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -244005,7 +244002,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -244045,7 +244042,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -244085,7 +244082,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -244123,7 +244120,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -244163,7 +244160,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -244203,7 +244200,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -244255,7 +244252,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -244293,7 +244290,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -244333,7 +244330,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -244371,7 +244368,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -244411,7 +244408,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -244451,7 +244448,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -244501,7 +244498,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -244540,7 +244537,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -244578,7 +244575,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -244618,7 +244615,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -244656,7 +244653,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -244696,7 +244693,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -244736,7 +244733,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -244790,7 +244787,7 @@ void m68008_device::muls_w_ds_dd_dp8() // c1c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -244838,7 +244835,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244852,7 +244849,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244864,7 +244861,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -244876,7 +244873,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244893,7 +244890,7 @@ void m68008_device::muls_w_ais_dd_dp8() // c1d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -244936,7 +244933,7 @@ void m68008_device::muls_w_ais_dd_dp8() // c1d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -244984,7 +244981,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244998,7 +244995,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245010,7 +245007,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245022,7 +245019,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245045,7 +245042,7 @@ void m68008_device::muls_w_aips_dd_dp8() // c1d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -245086,7 +245083,7 @@ void m68008_device::muls_w_aips_dd_dp8() // c1d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245134,7 +245131,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245148,7 +245145,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245160,7 +245157,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245172,7 +245169,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245197,7 +245194,7 @@ void m68008_device::muls_w_pais_dd_dp8() // c1e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -245238,7 +245235,7 @@ void m68008_device::muls_w_pais_dd_dp8() // c1e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245286,7 +245283,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245300,7 +245297,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245312,7 +245309,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245324,7 +245321,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245378,7 +245375,7 @@ void m68008_device::muls_w_das_dd_dp8() // c1e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -245421,7 +245418,7 @@ void m68008_device::muls_w_das_dd_dp8() // c1e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245469,7 +245466,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245483,7 +245480,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245495,7 +245492,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245507,7 +245504,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245522,7 +245519,7 @@ void m68008_device::muls_w_dais_dd_dp8() // c1f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -245614,7 +245611,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -245657,7 +245654,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245705,7 +245702,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245719,7 +245716,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245731,7 +245728,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245743,7 +245740,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245798,7 +245795,7 @@ void m68008_device::muls_w_adr16_dd_dp8() // c1f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -245839,7 +245836,7 @@ void m68008_device::muls_w_adr16_dd_dp8() // c1f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245887,7 +245884,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245901,7 +245898,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245913,7 +245910,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245925,7 +245922,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246016,7 +246013,7 @@ void m68008_device::muls_w_adr32_dd_dp8() // c1f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -246057,7 +246054,7 @@ void m68008_device::muls_w_adr32_dd_dp8() // c1f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246105,7 +246102,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246119,7 +246116,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246131,7 +246128,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246143,7 +246140,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246196,7 +246193,7 @@ void m68008_device::muls_w_dpc_dd_dp8() // c1fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -246239,7 +246236,7 @@ void m68008_device::muls_w_dpc_dd_dp8() // c1fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246287,7 +246284,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246301,7 +246298,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246313,7 +246310,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246325,7 +246322,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246339,7 +246336,7 @@ void m68008_device::muls_w_dpci_dd_dp8() // c1fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -246431,7 +246428,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -246474,7 +246471,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246522,7 +246519,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246536,7 +246533,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246548,7 +246545,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246560,7 +246557,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246619,7 +246616,7 @@ void m68008_device::muls_w_imm16_dd_dp8() // c1fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246667,7 +246664,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246681,7 +246678,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246693,7 +246690,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246705,7 +246702,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246724,7 +246721,7 @@ void m68008_device::add_b_ds_dd_dp8() // d000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -246783,7 +246780,7 @@ void m68008_device::add_b_ais_dd_dp8() // d010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -246806,7 +246803,7 @@ void m68008_device::add_b_ais_dd_dp8() // d010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -246871,7 +246868,7 @@ void m68008_device::add_b_aips_dd_dp8() // d018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -246892,7 +246889,7 @@ void m68008_device::add_b_aips_dd_dp8() // d018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -246959,7 +246956,7 @@ void m68008_device::add_b_pais_dd_dp8() // d020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -246980,7 +246977,7 @@ void m68008_device::add_b_pais_dd_dp8() // d020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247076,7 +247073,7 @@ void m68008_device::add_b_das_dd_dp8() // d028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247099,7 +247096,7 @@ void m68008_device::add_b_das_dd_dp8() // d028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247156,7 +247153,7 @@ void m68008_device::add_b_dais_dd_dp8() // d030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -247248,7 +247245,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247271,7 +247268,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247368,7 +247365,7 @@ void m68008_device::add_b_adr16_dd_dp8() // d038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -247389,7 +247386,7 @@ void m68008_device::add_b_adr16_dd_dp8() // d038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247522,7 +247519,7 @@ void m68008_device::add_b_adr32_dd_dp8() // d039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -247543,7 +247540,7 @@ void m68008_device::add_b_adr32_dd_dp8() // d039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247638,7 +247635,7 @@ void m68008_device::add_b_dpc_dd_dp8() // d03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247661,7 +247658,7 @@ void m68008_device::add_b_dpc_dd_dp8() // d03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247717,7 +247714,7 @@ void m68008_device::add_b_dpci_dd_dp8() // d03b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -247809,7 +247806,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247832,7 +247829,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247931,7 +247928,7 @@ void m68008_device::add_b_imm8_dd_dp8() // d03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx] alu_add8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247992,7 +247989,7 @@ void m68008_device::add_w_ds_dd_dp8() // d040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248053,7 +248050,7 @@ void m68008_device::add_w_as_dd_dp8() // d048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248112,7 +248109,7 @@ void m68008_device::add_w_ais_dd_dp8() // d050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -248153,7 +248150,7 @@ void m68008_device::add_w_ais_dd_dp8() // d050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248218,7 +248215,7 @@ void m68008_device::add_w_aips_dd_dp8() // d058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -248257,7 +248254,7 @@ void m68008_device::add_w_aips_dd_dp8() // d058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248324,7 +248321,7 @@ void m68008_device::add_w_pais_dd_dp8() // d060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -248363,7 +248360,7 @@ void m68008_device::add_w_pais_dd_dp8() // d060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248459,7 +248456,7 @@ void m68008_device::add_w_das_dd_dp8() // d068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -248500,7 +248497,7 @@ void m68008_device::add_w_das_dd_dp8() // d068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248557,7 +248554,7 @@ void m68008_device::add_w_dais_dd_dp8() // d070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -248649,7 +248646,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -248690,7 +248687,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248787,7 +248784,7 @@ void m68008_device::add_w_adr16_dd_dp8() // d078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -248826,7 +248823,7 @@ void m68008_device::add_w_adr16_dd_dp8() // d078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248959,7 +248956,7 @@ void m68008_device::add_w_adr32_dd_dp8() // d079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -248998,7 +248995,7 @@ void m68008_device::add_w_adr32_dd_dp8() // d079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249093,7 +249090,7 @@ void m68008_device::add_w_dpc_dd_dp8() // d07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -249134,7 +249131,7 @@ void m68008_device::add_w_dpc_dd_dp8() // d07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249190,7 +249187,7 @@ void m68008_device::add_w_dpci_dd_dp8() // d07b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -249282,7 +249279,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -249323,7 +249320,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249422,7 +249419,7 @@ void m68008_device::add_w_imm16_dd_dp8() // d07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249483,7 +249480,7 @@ void m68008_device::add_l_ds_dd_dp8() // d080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -249522,7 +249519,7 @@ void m68008_device::add_l_ds_dd_dp8() // d080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -249552,7 +249549,7 @@ void m68008_device::add_l_as_dd_dp8() // d088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -249591,7 +249588,7 @@ void m68008_device::add_l_as_dd_dp8() // d088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -249619,7 +249616,7 @@ void m68008_device::add_l_ais_dd_dp8() // d090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -249696,12 +249693,12 @@ void m68008_device::add_l_ais_dd_dp8() // d090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -249761,7 +249758,7 @@ void m68008_device::add_l_aips_dd_dp8() // d098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -249841,12 +249838,12 @@ void m68008_device::add_l_aips_dd_dp8() // d098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -249905,7 +249902,7 @@ void m68008_device::add_l_pais_dd_dp8() // d0a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -249987,12 +249984,12 @@ void m68008_device::add_l_pais_dd_dp8() // d0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250088,7 +250085,7 @@ void m68008_device::add_l_das_dd_dp8() // d0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -250165,12 +250162,12 @@ void m68008_device::add_l_das_dd_dp8() // d0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250228,7 +250225,7 @@ void m68008_device::add_l_dais_dd_dp8() // d0b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -250319,7 +250316,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -250396,12 +250393,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250499,7 +250496,7 @@ void m68008_device::add_l_adr16_dd_dp8() // d0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -250576,12 +250573,12 @@ void m68008_device::add_l_adr16_dd_dp8() // d0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250715,7 +250712,7 @@ void m68008_device::add_l_adr32_dd_dp8() // d0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -250792,12 +250789,12 @@ void m68008_device::add_l_adr32_dd_dp8() // d0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250892,7 +250889,7 @@ void m68008_device::add_l_dpc_dd_dp8() // d0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -250969,12 +250966,12 @@ void m68008_device::add_l_dpc_dd_dp8() // d0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -251031,7 +251028,7 @@ void m68008_device::add_l_dpci_dd_dp8() // d0bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -251122,7 +251119,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -251199,12 +251196,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -251340,7 +251337,7 @@ void m68008_device::add_l_imm32_dd_dp8() // d0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -251379,7 +251376,7 @@ void m68008_device::add_l_imm32_dd_dp8() // d0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -251409,7 +251406,7 @@ void m68008_device::adda_w_ds_ad_dp8() // d0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251447,7 +251444,7 @@ void m68008_device::adda_w_ds_ad_dp8() // d0c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251476,7 +251473,7 @@ void m68008_device::adda_w_as_ad_dp8() // d0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251514,7 +251511,7 @@ void m68008_device::adda_w_as_ad_dp8() // d0c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251541,7 +251538,7 @@ void m68008_device::adda_w_ais_ad_dp8() // d0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -251582,7 +251579,7 @@ void m68008_device::adda_w_ais_ad_dp8() // d0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251620,7 +251617,7 @@ void m68008_device::adda_w_ais_ad_dp8() // d0d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251653,7 +251650,7 @@ void m68008_device::adda_w_aips_ad_dp8() // d0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -251692,7 +251689,7 @@ void m68008_device::adda_w_aips_ad_dp8() // d0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251730,7 +251727,7 @@ void m68008_device::adda_w_aips_ad_dp8() // d0d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251765,7 +251762,7 @@ void m68008_device::adda_w_pais_ad_dp8() // d0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -251804,7 +251801,7 @@ void m68008_device::adda_w_pais_ad_dp8() // d0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251842,7 +251839,7 @@ void m68008_device::adda_w_pais_ad_dp8() // d0e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251906,7 +251903,7 @@ void m68008_device::adda_w_das_ad_dp8() // d0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -251947,7 +251944,7 @@ void m68008_device::adda_w_das_ad_dp8() // d0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251985,7 +251982,7 @@ void m68008_device::adda_w_das_ad_dp8() // d0e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252010,7 +252007,7 @@ void m68008_device::adda_w_dais_ad_dp8() // d0f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -252102,7 +252099,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -252143,7 +252140,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252181,7 +252178,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252246,7 +252243,7 @@ void m68008_device::adda_w_adr16_ad_dp8() // d0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -252285,7 +252282,7 @@ void m68008_device::adda_w_adr16_ad_dp8() // d0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252323,7 +252320,7 @@ void m68008_device::adda_w_adr16_ad_dp8() // d0f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252424,7 +252421,7 @@ void m68008_device::adda_w_adr32_ad_dp8() // d0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -252463,7 +252460,7 @@ void m68008_device::adda_w_adr32_ad_dp8() // d0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252501,7 +252498,7 @@ void m68008_device::adda_w_adr32_ad_dp8() // d0f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252564,7 +252561,7 @@ void m68008_device::adda_w_dpc_ad_dp8() // d0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -252605,7 +252602,7 @@ void m68008_device::adda_w_dpc_ad_dp8() // d0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252643,7 +252640,7 @@ void m68008_device::adda_w_dpc_ad_dp8() // d0fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252667,7 +252664,7 @@ void m68008_device::adda_w_dpci_ad_dp8() // d0fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -252759,7 +252756,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -252800,7 +252797,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252838,7 +252835,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252905,7 +252902,7 @@ void m68008_device::adda_w_imm16_ad_dp8() // d0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252943,7 +252940,7 @@ void m68008_device::adda_w_imm16_ad_dp8() // d0fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252972,7 +252969,7 @@ void m68008_device::addx_b_ds_dd_dp8() // d100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -252980,7 +252977,7 @@ void m68008_device::addx_b_ds_dd_dp8() // d100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -253034,16 +253031,16 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob); @@ -253064,7 +253061,7 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_program8.read_interruptible(m_aob); @@ -253082,7 +253079,7 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin alu_addx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253124,7 +253121,7 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob, m_dbout); @@ -253156,7 +253153,7 @@ void m68008_device::add_b_dd_ais_dp8() // d110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -253179,7 +253176,7 @@ void m68008_device::add_b_dd_ais_dp8() // d110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253258,7 +253255,7 @@ void m68008_device::add_b_dd_aips_dp8() // d118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -253279,7 +253276,7 @@ void m68008_device::add_b_dd_aips_dp8() // d118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253360,7 +253357,7 @@ void m68008_device::add_b_dd_pais_dp8() // d120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -253381,7 +253378,7 @@ void m68008_device::add_b_dd_pais_dp8() // d120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253491,7 +253488,7 @@ void m68008_device::add_b_dd_das_dp8() // d128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -253514,7 +253511,7 @@ void m68008_device::add_b_dd_das_dp8() // d128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253585,7 +253582,7 @@ void m68008_device::add_b_dd_dais_dp8() // d130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -253677,7 +253674,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -253700,7 +253697,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253811,7 +253808,7 @@ void m68008_device::add_b_dd_adr16_dp8() // d138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -253832,7 +253829,7 @@ void m68008_device::add_b_dd_adr16_dp8() // d138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253979,7 +253976,7 @@ void m68008_device::add_b_dd_adr32_dp8() // d139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -254000,7 +253997,7 @@ void m68008_device::add_b_dd_adr32_dp8() // d139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254075,7 +254072,7 @@ void m68008_device::addx_w_ds_dd_dp8() // d140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -254083,7 +254080,7 @@ void m68008_device::addx_w_ds_dd_dp8() // d140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -254137,16 +254134,16 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -254185,7 +254182,7 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -254221,7 +254218,7 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254263,7 +254260,7 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -254313,7 +254310,7 @@ void m68008_device::add_w_dd_ais_dp8() // d150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -254354,7 +254351,7 @@ void m68008_device::add_w_dd_ais_dp8() // d150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254451,7 +254448,7 @@ void m68008_device::add_w_dd_aips_dp8() // d158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -254490,7 +254487,7 @@ void m68008_device::add_w_dd_aips_dp8() // d158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254589,7 +254586,7 @@ void m68008_device::add_w_dd_pais_dp8() // d160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -254628,7 +254625,7 @@ void m68008_device::add_w_dd_pais_dp8() // d160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254756,7 +254753,7 @@ void m68008_device::add_w_dd_das_dp8() // d168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -254797,7 +254794,7 @@ void m68008_device::add_w_dd_das_dp8() // d168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254886,7 +254883,7 @@ void m68008_device::add_w_dd_dais_dp8() // d170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -254978,7 +254975,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -255019,7 +255016,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255148,7 +255145,7 @@ void m68008_device::add_w_dd_adr16_dp8() // d178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -255187,7 +255184,7 @@ void m68008_device::add_w_dd_adr16_dp8() // d178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255352,7 +255349,7 @@ void m68008_device::add_w_dd_adr32_dp8() // d179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -255391,7 +255388,7 @@ void m68008_device::add_w_dd_adr32_dp8() // d179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255484,12 +255481,12 @@ void m68008_device::addx_l_ds_dd_dp8() // d180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -255524,7 +255521,7 @@ void m68008_device::addx_l_ds_dd_dp8() // d180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx] + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx] alu_addx(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -255533,7 +255530,7 @@ void m68008_device::addx_l_ds_dd_dp8() // d180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -255555,13 +255552,13 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_icount -= 2; // 048 asxl2 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -255597,11 +255594,11 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -255638,7 +255635,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -255676,7 +255673,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin alu_addx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -255716,7 +255713,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = ext32(m_dbin); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -255751,7 +255748,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255793,7 +255790,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -255843,7 +255840,7 @@ void m68008_device::add_l_dd_ais_dp8() // d190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -255920,7 +255917,7 @@ void m68008_device::add_l_dd_ais_dp8() // d190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255960,7 +255957,7 @@ void m68008_device::add_l_dd_ais_dp8() // d190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256049,7 +256046,7 @@ void m68008_device::add_l_dd_aips_dp8() // d198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -256129,7 +256126,7 @@ void m68008_device::add_l_dd_aips_dp8() // d198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256169,7 +256166,7 @@ void m68008_device::add_l_dd_aips_dp8() // d198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256257,7 +256254,7 @@ void m68008_device::add_l_dd_pais_dp8() // d1a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -256339,7 +256336,7 @@ void m68008_device::add_l_dd_pais_dp8() // d1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256379,7 +256376,7 @@ void m68008_device::add_l_dd_pais_dp8() // d1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256504,7 +256501,7 @@ void m68008_device::add_l_dd_das_dp8() // d1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -256581,7 +256578,7 @@ void m68008_device::add_l_dd_das_dp8() // d1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256621,7 +256618,7 @@ void m68008_device::add_l_dd_das_dp8() // d1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256708,7 +256705,7 @@ void m68008_device::add_l_dd_dais_dp8() // d1b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -256799,7 +256796,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -256876,7 +256873,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256916,7 +256913,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -257043,7 +257040,7 @@ void m68008_device::add_l_dd_adr16_dp8() // d1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -257120,7 +257117,7 @@ void m68008_device::add_l_dd_adr16_dp8() // d1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -257160,7 +257157,7 @@ void m68008_device::add_l_dd_adr16_dp8() // d1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -257323,7 +257320,7 @@ void m68008_device::add_l_dd_adr32_dp8() // d1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -257400,7 +257397,7 @@ void m68008_device::add_l_dd_adr32_dp8() // d1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -257440,7 +257437,7 @@ void m68008_device::add_l_dd_adr32_dp8() // d1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -257531,7 +257528,7 @@ void m68008_device::adda_l_ds_ad_dp8() // d1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -257569,7 +257566,7 @@ void m68008_device::adda_l_ds_ad_dp8() // d1c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -257598,7 +257595,7 @@ void m68008_device::adda_l_as_ad_dp8() // d1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -257636,7 +257633,7 @@ void m68008_device::adda_l_as_ad_dp8() // d1c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -257663,7 +257660,7 @@ void m68008_device::adda_l_ais_ad_dp8() // d1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -257740,11 +257737,11 @@ void m68008_device::adda_l_ais_ad_dp8() // d1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -257803,7 +257800,7 @@ void m68008_device::adda_l_aips_ad_dp8() // d1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -257883,11 +257880,11 @@ void m68008_device::adda_l_aips_ad_dp8() // d1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -257945,7 +257942,7 @@ void m68008_device::adda_l_pais_ad_dp8() // d1e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -258027,11 +258024,11 @@ void m68008_device::adda_l_pais_ad_dp8() // d1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -258126,7 +258123,7 @@ void m68008_device::adda_l_das_ad_dp8() // d1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -258203,11 +258200,11 @@ void m68008_device::adda_l_das_ad_dp8() // d1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -258264,7 +258261,7 @@ void m68008_device::adda_l_dais_ad_dp8() // d1f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -258355,7 +258352,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -258432,11 +258429,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -258533,7 +258530,7 @@ void m68008_device::adda_l_adr16_ad_dp8() // d1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -258610,11 +258607,11 @@ void m68008_device::adda_l_adr16_ad_dp8() // d1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -258747,7 +258744,7 @@ void m68008_device::adda_l_adr32_ad_dp8() // d1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -258824,11 +258821,11 @@ void m68008_device::adda_l_adr32_ad_dp8() // d1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -258922,7 +258919,7 @@ void m68008_device::adda_l_dpc_ad_dp8() // d1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -258999,11 +258996,11 @@ void m68008_device::adda_l_dpc_ad_dp8() // d1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -259059,7 +259056,7 @@ void m68008_device::adda_l_dpci_ad_dp8() // d1fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -259150,7 +259147,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -259227,11 +259224,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -259366,7 +259363,7 @@ void m68008_device::adda_l_imm32_ad_dp8() // d1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -259404,7 +259401,7 @@ void m68008_device::adda_l_imm32_ad_dp8() // d1fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -259432,13 +259429,13 @@ void m68008_device::asr_b_imm3_ds_dp8() // e000 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259482,7 +259479,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259516,13 +259513,13 @@ void m68008_device::lsr_b_imm3_ds_dp8() // e008 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259566,7 +259563,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259600,13 +259597,13 @@ void m68008_device::roxr_b_imm3_ds_dp8() // e010 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259650,7 +259647,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259684,13 +259681,13 @@ void m68008_device::ror_b_imm3_ds_dp8() // e018 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259734,7 +259731,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -259769,13 +259766,13 @@ void m68008_device::asr_b_dd_ds_dp8() // e020 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259819,7 +259816,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259854,13 +259851,13 @@ void m68008_device::lsr_b_dd_ds_dp8() // e028 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259904,7 +259901,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259939,13 +259936,13 @@ void m68008_device::roxr_b_dd_ds_dp8() // e030 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259989,7 +259986,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260024,13 +260021,13 @@ void m68008_device::ror_b_dd_ds_dp8() // e038 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260074,7 +260071,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -260108,13 +260105,13 @@ void m68008_device::asr_w_imm3_ds_dp8() // e040 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260158,7 +260155,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260192,13 +260189,13 @@ void m68008_device::lsr_w_imm3_ds_dp8() // e048 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260242,7 +260239,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260276,13 +260273,13 @@ void m68008_device::roxr_w_imm3_ds_dp8() // e050 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260326,7 +260323,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260360,13 +260357,13 @@ void m68008_device::ror_w_imm3_ds_dp8() // e058 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260410,7 +260407,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -260445,13 +260442,13 @@ void m68008_device::asr_w_dd_ds_dp8() // e060 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260495,7 +260492,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260530,13 +260527,13 @@ void m68008_device::lsr_w_dd_ds_dp8() // e068 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260580,7 +260577,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260615,13 +260612,13 @@ void m68008_device::roxr_w_dd_ds_dp8() // e070 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260665,7 +260662,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260700,13 +260697,13 @@ void m68008_device::ror_w_dd_ds_dp8() // e078 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260750,7 +260747,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -260784,13 +260781,13 @@ void m68008_device::asr_l_imm3_ds_dp8() // e080 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260834,7 +260831,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260851,7 +260848,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -260874,13 +260871,13 @@ void m68008_device::lsr_l_imm3_ds_dp8() // e088 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260924,7 +260921,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260941,7 +260938,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -260964,13 +260961,13 @@ void m68008_device::roxr_l_imm3_ds_dp8() // e090 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261014,7 +261011,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261031,7 +261028,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261054,13 +261051,13 @@ void m68008_device::ror_l_imm3_ds_dp8() // e098 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261104,7 +261101,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -261121,7 +261118,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261145,13 +261142,13 @@ void m68008_device::asr_l_dd_ds_dp8() // e0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261195,7 +261192,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261212,7 +261209,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261236,13 +261233,13 @@ void m68008_device::lsr_l_dd_ds_dp8() // e0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261286,7 +261283,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261303,7 +261300,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261327,13 +261324,13 @@ void m68008_device::roxr_l_dd_ds_dp8() // e0b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261377,7 +261374,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261394,7 +261391,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261418,13 +261415,13 @@ void m68008_device::ror_l_dd_ds_dp8() // e0b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261468,7 +261465,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -261485,7 +261482,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261507,7 +261504,7 @@ void m68008_device::asr_ais_dp8() // e0d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -261548,12 +261545,12 @@ void m68008_device::asr_ais_dp8() // e0d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261650,7 +261647,7 @@ void m68008_device::asr_aips_dp8() // e0d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -261689,12 +261686,12 @@ void m68008_device::asr_aips_dp8() // e0d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261793,7 +261790,7 @@ void m68008_device::asr_pais_dp8() // e0e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -261832,12 +261829,12 @@ void m68008_device::asr_pais_dp8() // e0e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261965,7 +261962,7 @@ void m68008_device::asr_das_dp8() // e0e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -262006,12 +262003,12 @@ void m68008_device::asr_das_dp8() // e0e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262100,7 +262097,7 @@ void m68008_device::asr_dais_dp8() // e0f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -262192,7 +262189,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -262233,12 +262230,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262367,7 +262364,7 @@ void m68008_device::asr_adr16_dp8() // e0f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -262406,12 +262403,12 @@ void m68008_device::asr_adr16_dp8() // e0f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262576,7 +262573,7 @@ void m68008_device::asr_adr32_dp8() // e0f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -262615,12 +262612,12 @@ void m68008_device::asr_adr32_dp8() // e0f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262712,13 +262709,13 @@ void m68008_device::asl_b_imm3_ds_dp8() // e100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262762,7 +262759,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -262796,13 +262793,13 @@ void m68008_device::lsl_b_imm3_ds_dp8() // e108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262846,7 +262843,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -262860,7 +262857,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -262881,13 +262878,13 @@ void m68008_device::roxl_b_imm3_ds_dp8() // e110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262931,7 +262928,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -262965,13 +262962,13 @@ void m68008_device::rol_b_imm3_ds_dp8() // e118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263015,7 +263012,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -263050,13 +263047,13 @@ void m68008_device::asl_b_dd_ds_dp8() // e120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263100,7 +263097,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263135,13 +263132,13 @@ void m68008_device::lsl_b_dd_ds_dp8() // e128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263185,7 +263182,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263199,7 +263196,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -263221,13 +263218,13 @@ void m68008_device::roxl_b_dd_ds_dp8() // e130 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263271,7 +263268,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263306,13 +263303,13 @@ void m68008_device::rol_b_dd_ds_dp8() // e138 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263356,7 +263353,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -263390,13 +263387,13 @@ void m68008_device::asl_w_imm3_ds_dp8() // e140 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263440,7 +263437,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263474,13 +263471,13 @@ void m68008_device::lsl_w_imm3_ds_dp8() // e148 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263524,7 +263521,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263538,7 +263535,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -263559,13 +263556,13 @@ void m68008_device::roxl_w_imm3_ds_dp8() // e150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263609,7 +263606,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263643,13 +263640,13 @@ void m68008_device::rol_w_imm3_ds_dp8() // e158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263693,7 +263690,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -263728,13 +263725,13 @@ void m68008_device::asl_w_dd_ds_dp8() // e160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263778,7 +263775,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263813,13 +263810,13 @@ void m68008_device::lsl_w_dd_ds_dp8() // e168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263863,7 +263860,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263877,7 +263874,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -263899,13 +263896,13 @@ void m68008_device::roxl_w_dd_ds_dp8() // e170 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263949,7 +263946,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263984,13 +263981,13 @@ void m68008_device::rol_w_dd_ds_dp8() // e178 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264034,7 +264031,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -264068,13 +264065,13 @@ void m68008_device::asl_l_imm3_ds_dp8() // e180 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264118,7 +264115,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264135,7 +264132,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264158,13 +264155,13 @@ void m68008_device::lsl_l_imm3_ds_dp8() // e188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264208,7 +264205,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264220,14 +264217,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264250,13 +264247,13 @@ void m68008_device::roxl_l_imm3_ds_dp8() // e190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264300,7 +264297,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264317,7 +264314,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264340,13 +264337,13 @@ void m68008_device::rol_l_imm3_ds_dp8() // e198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264390,7 +264387,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -264407,7 +264404,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264431,13 +264428,13 @@ void m68008_device::asl_l_dd_ds_dp8() // e1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264481,7 +264478,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264498,7 +264495,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264522,13 +264519,13 @@ void m68008_device::lsl_l_dd_ds_dp8() // e1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264572,7 +264569,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264584,14 +264581,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264615,13 +264612,13 @@ void m68008_device::roxl_l_dd_ds_dp8() // e1b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264665,7 +264662,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264682,7 +264679,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264706,13 +264703,13 @@ void m68008_device::rol_l_dd_ds_dp8() // e1b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264756,7 +264753,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -264773,7 +264770,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264795,7 +264792,7 @@ void m68008_device::asl_ais_dp8() // e1d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -264836,12 +264833,12 @@ void m68008_device::asl_ais_dp8() // e1d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264938,7 +264935,7 @@ void m68008_device::asl_aips_dp8() // e1d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -264977,12 +264974,12 @@ void m68008_device::asl_aips_dp8() // e1d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265081,7 +265078,7 @@ void m68008_device::asl_pais_dp8() // e1e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -265120,12 +265117,12 @@ void m68008_device::asl_pais_dp8() // e1e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265253,7 +265250,7 @@ void m68008_device::asl_das_dp8() // e1e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -265294,12 +265291,12 @@ void m68008_device::asl_das_dp8() // e1e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265388,7 +265385,7 @@ void m68008_device::asl_dais_dp8() // e1f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -265480,7 +265477,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -265521,12 +265518,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265655,7 +265652,7 @@ void m68008_device::asl_adr16_dp8() // e1f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -265694,12 +265691,12 @@ void m68008_device::asl_adr16_dp8() // e1f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265864,7 +265861,7 @@ void m68008_device::asl_adr32_dp8() // e1f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -265903,12 +265900,12 @@ void m68008_device::asl_adr32_dp8() // e1f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265999,7 +265996,7 @@ void m68008_device::lsr_ais_dp8() // e2d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -266040,12 +266037,12 @@ void m68008_device::lsr_ais_dp8() // e2d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266142,7 +266139,7 @@ void m68008_device::lsr_aips_dp8() // e2d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -266181,12 +266178,12 @@ void m68008_device::lsr_aips_dp8() // e2d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266285,7 +266282,7 @@ void m68008_device::lsr_pais_dp8() // e2e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -266324,12 +266321,12 @@ void m68008_device::lsr_pais_dp8() // e2e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266457,7 +266454,7 @@ void m68008_device::lsr_das_dp8() // e2e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -266498,12 +266495,12 @@ void m68008_device::lsr_das_dp8() // e2e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266592,7 +266589,7 @@ void m68008_device::lsr_dais_dp8() // e2f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -266684,7 +266681,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -266725,12 +266722,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266859,7 +266856,7 @@ void m68008_device::lsr_adr16_dp8() // e2f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -266898,12 +266895,12 @@ void m68008_device::lsr_adr16_dp8() // e2f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267068,7 +267065,7 @@ void m68008_device::lsr_adr32_dp8() // e2f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -267107,12 +267104,12 @@ void m68008_device::lsr_adr32_dp8() // e2f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267203,11 +267200,11 @@ void m68008_device::lsl_ais_dp8() // e3d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -267245,12 +267242,12 @@ void m68008_device::lsl_ais_dp8() // e3d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267292,7 +267289,7 @@ void m68008_device::lsl_ais_dp8() // e3d0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -267345,12 +267342,12 @@ void m68008_device::lsl_aips_dp8() // e3d8 fff8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -267389,12 +267386,12 @@ void m68008_device::lsl_aips_dp8() // e3d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267436,7 +267433,7 @@ void m68008_device::lsl_aips_dp8() // e3d8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -267488,7 +267485,7 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -267496,7 +267493,7 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -267535,12 +267532,12 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267582,7 +267579,7 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -267632,7 +267629,7 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -267670,11 +267667,11 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -267712,12 +267709,12 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267759,7 +267756,7 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -267807,14 +267804,14 @@ void m68008_device::lsl_dais_dp8() // e3f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -267822,7 +267819,7 @@ void m68008_device::lsl_dais_dp8() // e3f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -267861,7 +267858,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -267902,11 +267899,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_program8.read_interruptible(m_aob & ~1) << 8; @@ -267944,12 +267941,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267991,7 +267988,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -268043,7 +268040,7 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -268081,7 +268078,7 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -268120,12 +268117,12 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268167,7 +268164,7 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -268217,7 +268214,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8; @@ -268256,7 +268253,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -268294,7 +268291,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -268333,12 +268330,12 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268380,7 +268377,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8); @@ -268430,7 +268427,7 @@ void m68008_device::roxr_ais_dp8() // e4d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -268471,12 +268468,12 @@ void m68008_device::roxr_ais_dp8() // e4d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268573,7 +268570,7 @@ void m68008_device::roxr_aips_dp8() // e4d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -268612,12 +268609,12 @@ void m68008_device::roxr_aips_dp8() // e4d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268716,7 +268713,7 @@ void m68008_device::roxr_pais_dp8() // e4e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -268755,12 +268752,12 @@ void m68008_device::roxr_pais_dp8() // e4e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268888,7 +268885,7 @@ void m68008_device::roxr_das_dp8() // e4e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -268929,12 +268926,12 @@ void m68008_device::roxr_das_dp8() // e4e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269023,7 +269020,7 @@ void m68008_device::roxr_dais_dp8() // e4f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -269115,7 +269112,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -269156,12 +269153,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269290,7 +269287,7 @@ void m68008_device::roxr_adr16_dp8() // e4f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -269329,12 +269326,12 @@ void m68008_device::roxr_adr16_dp8() // e4f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269499,7 +269496,7 @@ void m68008_device::roxr_adr32_dp8() // e4f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -269538,12 +269535,12 @@ void m68008_device::roxr_adr32_dp8() // e4f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269634,7 +269631,7 @@ void m68008_device::roxl_ais_dp8() // e5d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -269675,12 +269672,12 @@ void m68008_device::roxl_ais_dp8() // e5d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269777,7 +269774,7 @@ void m68008_device::roxl_aips_dp8() // e5d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -269816,12 +269813,12 @@ void m68008_device::roxl_aips_dp8() // e5d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269920,7 +269917,7 @@ void m68008_device::roxl_pais_dp8() // e5e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -269959,12 +269956,12 @@ void m68008_device::roxl_pais_dp8() // e5e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270092,7 +270089,7 @@ void m68008_device::roxl_das_dp8() // e5e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -270133,12 +270130,12 @@ void m68008_device::roxl_das_dp8() // e5e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270227,7 +270224,7 @@ void m68008_device::roxl_dais_dp8() // e5f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -270319,7 +270316,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -270360,12 +270357,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270494,7 +270491,7 @@ void m68008_device::roxl_adr16_dp8() // e5f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -270533,12 +270530,12 @@ void m68008_device::roxl_adr16_dp8() // e5f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270703,7 +270700,7 @@ void m68008_device::roxl_adr32_dp8() // e5f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -270742,12 +270739,12 @@ void m68008_device::roxl_adr32_dp8() // e5f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270838,7 +270835,7 @@ void m68008_device::ror_ais_dp8() // e6d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -270879,12 +270876,12 @@ void m68008_device::ror_ais_dp8() // e6d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270981,7 +270978,7 @@ void m68008_device::ror_aips_dp8() // e6d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -271020,12 +271017,12 @@ void m68008_device::ror_aips_dp8() // e6d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271124,7 +271121,7 @@ void m68008_device::ror_pais_dp8() // e6e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -271163,12 +271160,12 @@ void m68008_device::ror_pais_dp8() // e6e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271296,7 +271293,7 @@ void m68008_device::ror_das_dp8() // e6e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -271337,12 +271334,12 @@ void m68008_device::ror_das_dp8() // e6e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271431,7 +271428,7 @@ void m68008_device::ror_dais_dp8() // e6f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -271523,7 +271520,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -271564,12 +271561,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271698,7 +271695,7 @@ void m68008_device::ror_adr16_dp8() // e6f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -271737,12 +271734,12 @@ void m68008_device::ror_adr16_dp8() // e6f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271907,7 +271904,7 @@ void m68008_device::ror_adr32_dp8() // e6f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -271946,12 +271943,12 @@ void m68008_device::ror_adr32_dp8() // e6f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272042,7 +272039,7 @@ void m68008_device::rol_ais_dp8() // e7d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -272083,12 +272080,12 @@ void m68008_device::rol_ais_dp8() // e7d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272185,7 +272182,7 @@ void m68008_device::rol_aips_dp8() // e7d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -272224,12 +272221,12 @@ void m68008_device::rol_aips_dp8() // e7d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272328,7 +272325,7 @@ void m68008_device::rol_pais_dp8() // e7e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -272367,12 +272364,12 @@ void m68008_device::rol_pais_dp8() // e7e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272500,7 +272497,7 @@ void m68008_device::rol_das_dp8() // e7e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -272541,12 +272538,12 @@ void m68008_device::rol_das_dp8() // e7e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272635,7 +272632,7 @@ void m68008_device::rol_dais_dp8() // e7f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -272727,7 +272724,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -272768,12 +272765,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272902,7 +272899,7 @@ void m68008_device::rol_adr16_dp8() // e7f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -272941,12 +272938,12 @@ void m68008_device::rol_adr16_dp8() // e7f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -273111,7 +273108,7 @@ void m68008_device::rol_adr32_dp8() // e7f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -273150,12 +273147,12 @@ void m68008_device::rol_adr32_dp8() // e7f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; diff --git a/src/devices/cpu/m68000/m68008-sif8.cpp b/src/devices/cpu/m68000/m68008-sif8.cpp index 14c00a48f46..f1656b84201 100644 --- a/src/devices/cpu/m68000/m68008-sif8.cpp +++ b/src/devices/cpu/m68000/m68008-sif8.cpp @@ -245,7 +245,7 @@ void m68008_device::state_bus_error_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -255,7 +255,7 @@ void m68008_device::state_bus_error_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -288,7 +288,7 @@ void m68008_device::state_bus_error_if8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -320,7 +320,7 @@ void m68008_device::state_bus_error_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -356,7 +356,7 @@ void m68008_device::state_bus_error_if8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -388,7 +388,7 @@ void m68008_device::state_bus_error_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -423,7 +423,7 @@ void m68008_device::state_bus_error_if8() m_da[16] = m_au; m_ftu = 0x0008; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -456,7 +456,7 @@ void m68008_device::state_bus_error_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -634,7 +634,7 @@ void m68008_device::state_address_error_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -644,7 +644,7 @@ void m68008_device::state_address_error_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -677,7 +677,7 @@ void m68008_device::state_address_error_if8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -709,7 +709,7 @@ void m68008_device::state_address_error_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -745,7 +745,7 @@ void m68008_device::state_address_error_if8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -777,7 +777,7 @@ void m68008_device::state_address_error_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -812,7 +812,7 @@ void m68008_device::state_address_error_if8() m_da[16] = m_au; m_ftu = 0x000c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -845,7 +845,7 @@ void m68008_device::state_address_error_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1030,7 +1030,7 @@ void m68008_device::state_interrupt_if8() m_pc = m_au; m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I); update_interrupt(); - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_icount -= 2; // 235 itlx3 @@ -1042,7 +1042,7 @@ void m68008_device::state_interrupt_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1103,7 +1103,7 @@ void m68008_device::state_interrupt_if8() m_da[16] = m_au; m_ftu = m_int_vector; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1136,7 +1136,7 @@ void m68008_device::state_interrupt_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1312,7 +1312,7 @@ void m68008_device::state_trace_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1322,7 +1322,7 @@ void m68008_device::state_trace_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1357,7 +1357,7 @@ void m68008_device::state_trace_if8() m_da[16] = m_au; m_ftu = 0x0024; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1390,7 +1390,7 @@ void m68008_device::state_trace_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1566,7 +1566,7 @@ void m68008_device::state_illegal_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1576,7 +1576,7 @@ void m68008_device::state_illegal_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1611,7 +1611,7 @@ void m68008_device::state_illegal_if8() m_da[16] = m_au; m_ftu = 0x0010; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1644,7 +1644,7 @@ void m68008_device::state_illegal_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1820,7 +1820,7 @@ void m68008_device::state_priviledge_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1830,7 +1830,7 @@ void m68008_device::state_priviledge_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1865,7 +1865,7 @@ void m68008_device::state_priviledge_if8() m_da[16] = m_au; m_ftu = 0x0020; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -1898,7 +1898,7 @@ void m68008_device::state_priviledge_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2074,7 +2074,7 @@ void m68008_device::state_linea_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2084,7 +2084,7 @@ void m68008_device::state_linea_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2119,7 +2119,7 @@ void m68008_device::state_linea_if8() m_da[16] = m_au; m_ftu = 0x0028; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2152,7 +2152,7 @@ void m68008_device::state_linea_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2328,7 +2328,7 @@ void m68008_device::state_linef_if8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2338,7 +2338,7 @@ void m68008_device::state_linef_if8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2373,7 +2373,7 @@ void m68008_device::state_linef_if8() m_da[16] = m_au; m_ftu = 0x002c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2406,7 +2406,7 @@ void m68008_device::state_linef_if8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -2579,7 +2579,7 @@ void m68008_device::ori_b_imm8_ds_if8() // 0000 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -2612,7 +2612,7 @@ void m68008_device::ori_b_imm8_ds_if8() // 0000 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -2620,7 +2620,7 @@ void m68008_device::ori_b_imm8_ds_if8() // 0000 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -2664,7 +2664,7 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -2696,11 +2696,11 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -2718,7 +2718,7 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -2755,7 +2755,7 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -2782,7 +2782,7 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -2817,12 +2817,12 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -2841,7 +2841,7 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -2878,7 +2878,7 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -2905,7 +2905,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -2939,7 +2939,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -2947,7 +2947,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -2966,7 +2966,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3003,7 +3003,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -3030,7 +3030,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3062,7 +3062,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3095,11 +3095,11 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -3117,7 +3117,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3154,7 +3154,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -3181,7 +3181,7 @@ void m68008_device::ori_b_imm8_dais_if8() // 0030 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3211,14 +3211,14 @@ void m68008_device::ori_b_imm8_dais_if8() // 0030 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -3226,7 +3226,7 @@ void m68008_device::ori_b_imm8_dais_if8() // 0030 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3260,7 +3260,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3296,11 +3296,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -3318,7 +3318,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3355,7 +3355,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -3381,7 +3381,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3449,7 +3449,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -3468,7 +3468,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3505,7 +3505,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -3531,7 +3531,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3564,7 +3564,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3598,7 +3598,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3631,7 +3631,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -3650,7 +3650,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3687,7 +3687,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -3713,7 +3713,7 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3745,21 +3745,21 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt alu_or8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -3767,7 +3767,7 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3801,11 +3801,11 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3849,7 +3849,7 @@ void m68008_device::ori_w_imm16_ds_if8() // 0040 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3882,7 +3882,7 @@ void m68008_device::ori_w_imm16_ds_if8() // 0040 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -3890,7 +3890,7 @@ void m68008_device::ori_w_imm16_ds_if8() // 0040 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3934,7 +3934,7 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -3966,11 +3966,11 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -4003,7 +4003,7 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4040,7 +4040,7 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4082,7 +4082,7 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4117,12 +4117,12 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -4156,7 +4156,7 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4193,7 +4193,7 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4235,7 +4235,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4269,7 +4269,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -4277,7 +4277,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -4311,7 +4311,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4348,7 +4348,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4390,7 +4390,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4422,7 +4422,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4455,11 +4455,11 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -4492,7 +4492,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4529,7 +4529,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4571,7 +4571,7 @@ void m68008_device::ori_w_imm16_dais_if8() // 0070 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4601,14 +4601,14 @@ void m68008_device::ori_w_imm16_dais_if8() // 0070 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -4616,7 +4616,7 @@ void m68008_device::ori_w_imm16_dais_if8() // 0070 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4650,7 +4650,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4686,11 +4686,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -4723,7 +4723,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4760,7 +4760,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4801,7 +4801,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -4836,7 +4836,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4869,7 +4869,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -4903,7 +4903,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4940,7 +4940,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -4981,7 +4981,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5014,7 +5014,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5048,7 +5048,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5081,7 +5081,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -5115,7 +5115,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5152,7 +5152,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -5197,7 +5197,7 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5229,23 +5229,23 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt alu_or(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -5253,7 +5253,7 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5287,11 +5287,11 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5334,7 +5334,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5367,7 +5367,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5400,12 +5400,12 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5435,7 +5435,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry] alu_or(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -5444,7 +5444,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -5460,7 +5460,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5493,7 +5493,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5525,7 +5525,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -5560,7 +5560,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -5593,7 +5593,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5628,7 +5628,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -5663,7 +5663,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -5704,7 +5704,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5737,7 +5737,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5769,7 +5769,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -5804,11 +5804,11 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -5841,7 +5841,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5876,7 +5876,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -5911,7 +5911,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -5952,7 +5952,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -5985,7 +5985,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6016,14 +6016,14 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -6057,7 +6057,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -6090,7 +6090,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6125,7 +6125,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6160,7 +6160,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -6201,7 +6201,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6234,7 +6234,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6266,7 +6266,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6298,7 +6298,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -6333,7 +6333,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -6366,7 +6366,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6401,7 +6401,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6436,7 +6436,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -6477,7 +6477,7 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6510,7 +6510,7 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6540,14 +6540,14 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -6555,7 +6555,7 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6589,7 +6589,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6624,7 +6624,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -6659,7 +6659,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -6692,7 +6692,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6727,7 +6727,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6762,7 +6762,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -6802,7 +6802,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6835,7 +6835,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -6870,7 +6870,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6903,7 +6903,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -6938,7 +6938,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -6971,7 +6971,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7006,7 +7006,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7041,7 +7041,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -7081,7 +7081,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7114,7 +7114,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7147,7 +7147,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7181,7 +7181,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7214,7 +7214,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -7249,7 +7249,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -7282,7 +7282,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7317,7 +7317,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7352,7 +7352,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -7397,13 +7397,13 @@ void m68008_device::btst_dd_ds_if8() // 0100 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7442,7 +7442,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -7455,7 +7455,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -7473,7 +7473,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8 // 1d2 mpiw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7505,7 +7505,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8 // 29a mpiw2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -7522,7 +7522,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -7542,7 +7542,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7585,11 +7585,11 @@ void m68008_device::btst_dd_ais_if8() // 0110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -7607,13 +7607,13 @@ void m68008_device::btst_dd_ais_if8() // 0110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7659,12 +7659,12 @@ void m68008_device::btst_dd_aips_if8() // 0118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -7683,13 +7683,13 @@ void m68008_device::btst_dd_aips_if8() // 0118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7734,7 +7734,7 @@ void m68008_device::btst_dd_pais_if8() // 0120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -7742,7 +7742,7 @@ void m68008_device::btst_dd_pais_if8() // 0120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -7761,13 +7761,13 @@ void m68008_device::btst_dd_pais_if8() // 0120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7810,7 +7810,7 @@ void m68008_device::btst_dd_das_if8() // 0128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7843,11 +7843,11 @@ void m68008_device::btst_dd_das_if8() // 0128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -7865,13 +7865,13 @@ void m68008_device::btst_dd_das_if8() // 0128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7912,14 +7912,14 @@ void m68008_device::btst_dd_dais_if8() // 0130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -7927,7 +7927,7 @@ void m68008_device::btst_dd_dais_if8() // 0130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7961,7 +7961,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -7997,11 +7997,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -8019,13 +8019,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8070,7 +8070,7 @@ void m68008_device::btst_dd_adr16_if8() // 0138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8103,7 +8103,7 @@ void m68008_device::btst_dd_adr16_if8() // 0138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -8122,13 +8122,13 @@ void m68008_device::btst_dd_adr16_if8() // 0138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8171,7 +8171,7 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8205,7 +8205,7 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8238,7 +8238,7 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -8257,13 +8257,13 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8305,7 +8305,7 @@ void m68008_device::btst_dd_dpc_if8() // 013a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8338,11 +8338,11 @@ void m68008_device::btst_dd_dpc_if8() // 013a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -8360,13 +8360,13 @@ void m68008_device::btst_dd_dpc_if8() // 013a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8406,14 +8406,14 @@ void m68008_device::btst_dd_dpci_if8() // 013b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -8421,7 +8421,7 @@ void m68008_device::btst_dd_dpci_if8() // 013b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8455,7 +8455,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8491,11 +8491,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -8513,13 +8513,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8564,7 +8564,7 @@ void m68008_device::btst_dd_imm_if8() // 013c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8599,12 +8599,12 @@ void m68008_device::btst_dd_imm_if8() // 013c f1ff m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_dt; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8643,7 +8643,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -8656,7 +8656,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -8678,13 +8678,13 @@ void m68008_device::bchg_dd_ds_if8() // 0140 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8723,7 +8723,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8735,14 +8735,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8760,7 +8760,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8 // 1d6 mpil1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8792,7 +8792,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8 // 29e mpil2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -8808,7 +8808,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8 // 34e mpil3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -8825,7 +8825,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8 m_aob = m_au; set_16h(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -8842,7 +8842,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -8862,7 +8862,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -8905,11 +8905,11 @@ void m68008_device::bchg_dd_ais_if8() // 0150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -8928,7 +8928,7 @@ void m68008_device::bchg_dd_ais_if8() // 0150 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8963,7 +8963,7 @@ void m68008_device::bchg_dd_ais_if8() // 0150 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -8994,12 +8994,12 @@ void m68008_device::bchg_dd_aips_if8() // 0158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -9019,7 +9019,7 @@ void m68008_device::bchg_dd_aips_if8() // 0158 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9054,7 +9054,7 @@ void m68008_device::bchg_dd_aips_if8() // 0158 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9084,7 +9084,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -9092,7 +9092,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -9112,7 +9112,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9147,7 +9147,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9175,7 +9175,7 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -9208,11 +9208,11 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -9231,7 +9231,7 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9266,7 +9266,7 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9292,14 +9292,14 @@ void m68008_device::bchg_dd_dais_if8() // 0170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -9307,7 +9307,7 @@ void m68008_device::bchg_dd_dais_if8() // 0170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -9341,7 +9341,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -9377,11 +9377,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -9400,7 +9400,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9435,7 +9435,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9465,7 +9465,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9498,7 +9498,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -9518,7 +9518,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9553,7 +9553,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9581,7 +9581,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -9615,7 +9615,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9648,7 +9648,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -9668,7 +9668,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9703,7 +9703,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -9735,13 +9735,13 @@ void m68008_device::bclr_dd_ds_if8() // 0180 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9777,14 +9777,14 @@ void m68008_device::bclr_dd_ds_if8() // 0180 f1f8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -9796,18 +9796,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -9825,7 +9825,7 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8 // 1ca mpow1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -9859,7 +9859,7 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -9875,7 +9875,7 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -9892,11 +9892,11 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -9939,11 +9939,11 @@ void m68008_device::bclr_dd_ais_if8() // 0190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -9961,12 +9961,12 @@ void m68008_device::bclr_dd_ais_if8() // 0190 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10001,7 +10001,7 @@ void m68008_device::bclr_dd_ais_if8() // 0190 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10032,12 +10032,12 @@ void m68008_device::bclr_dd_aips_if8() // 0198 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -10056,12 +10056,12 @@ void m68008_device::bclr_dd_aips_if8() // 0198 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10096,7 +10096,7 @@ void m68008_device::bclr_dd_aips_if8() // 0198 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10126,7 +10126,7 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -10134,7 +10134,7 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -10153,12 +10153,12 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10193,7 +10193,7 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10221,7 +10221,7 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -10254,11 +10254,11 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -10276,12 +10276,12 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10316,7 +10316,7 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10342,14 +10342,14 @@ void m68008_device::bclr_dd_dais_if8() // 01b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -10357,7 +10357,7 @@ void m68008_device::bclr_dd_dais_if8() // 01b0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -10391,7 +10391,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -10427,11 +10427,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -10449,12 +10449,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10489,7 +10489,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10519,7 +10519,7 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10552,7 +10552,7 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -10571,12 +10571,12 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10611,7 +10611,7 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10639,7 +10639,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -10673,7 +10673,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10706,7 +10706,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -10725,12 +10725,12 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10765,7 +10765,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10797,13 +10797,13 @@ void m68008_device::bset_dd_ds_if8() // 01c0 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10842,7 +10842,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10854,14 +10854,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10879,7 +10879,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8 // 1ce mpol1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -10912,7 +10912,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8 m_aob = m_au; set_8xh(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -10928,7 +10928,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -10945,7 +10945,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -10961,7 +10961,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -10978,11 +10978,11 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11025,11 +11025,11 @@ void m68008_device::bset_dd_ais_if8() // 01d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -11048,7 +11048,7 @@ void m68008_device::bset_dd_ais_if8() // 01d0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11083,7 +11083,7 @@ void m68008_device::bset_dd_ais_if8() // 01d0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11114,12 +11114,12 @@ void m68008_device::bset_dd_aips_if8() // 01d8 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -11139,7 +11139,7 @@ void m68008_device::bset_dd_aips_if8() // 01d8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11174,7 +11174,7 @@ void m68008_device::bset_dd_aips_if8() // 01d8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11204,7 +11204,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -11212,7 +11212,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -11232,7 +11232,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11267,7 +11267,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11295,7 +11295,7 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11328,11 +11328,11 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -11351,7 +11351,7 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11386,7 +11386,7 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11412,14 +11412,14 @@ void m68008_device::bset_dd_dais_if8() // 01f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -11427,7 +11427,7 @@ void m68008_device::bset_dd_dais_if8() // 01f0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11461,7 +11461,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11497,11 +11497,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -11520,7 +11520,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11555,7 +11555,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11585,7 +11585,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11618,7 +11618,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -11638,7 +11638,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11673,7 +11673,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11701,7 +11701,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11735,7 +11735,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11768,7 +11768,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -11788,7 +11788,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11823,7 +11823,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11852,7 +11852,7 @@ void m68008_device::andi_b_imm8_ds_if8() // 0200 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11885,7 +11885,7 @@ void m68008_device::andi_b_imm8_ds_if8() // 0200 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -11893,7 +11893,7 @@ void m68008_device::andi_b_imm8_ds_if8() // 0200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11937,7 +11937,7 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -11969,11 +11969,11 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -11991,7 +11991,7 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12028,7 +12028,7 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12055,7 +12055,7 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12090,12 +12090,12 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -12114,7 +12114,7 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12151,7 +12151,7 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12178,7 +12178,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12212,7 +12212,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -12220,7 +12220,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -12239,7 +12239,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12276,7 +12276,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12303,7 +12303,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12335,7 +12335,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12368,11 +12368,11 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -12390,7 +12390,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12427,7 +12427,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12454,7 +12454,7 @@ void m68008_device::andi_b_imm8_dais_if8() // 0230 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12484,14 +12484,14 @@ void m68008_device::andi_b_imm8_dais_if8() // 0230 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -12499,7 +12499,7 @@ void m68008_device::andi_b_imm8_dais_if8() // 0230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12533,7 +12533,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12569,11 +12569,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -12591,7 +12591,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12628,7 +12628,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12654,7 +12654,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12689,7 +12689,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -12722,7 +12722,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -12741,7 +12741,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12778,7 +12778,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12804,7 +12804,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12837,7 +12837,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -12871,7 +12871,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -12904,7 +12904,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -12923,7 +12923,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -12960,7 +12960,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -12986,7 +12986,7 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13018,21 +13018,21 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt alu_and8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -13040,7 +13040,7 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13074,11 +13074,11 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13122,7 +13122,7 @@ void m68008_device::andi_w_imm16_ds_if8() // 0240 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13155,7 +13155,7 @@ void m68008_device::andi_w_imm16_ds_if8() // 0240 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -13163,7 +13163,7 @@ void m68008_device::andi_w_imm16_ds_if8() // 0240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13207,7 +13207,7 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13239,11 +13239,11 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -13276,7 +13276,7 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13313,7 +13313,7 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13355,7 +13355,7 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13390,12 +13390,12 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -13429,7 +13429,7 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13466,7 +13466,7 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13508,7 +13508,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13542,7 +13542,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -13550,7 +13550,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -13584,7 +13584,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13621,7 +13621,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13663,7 +13663,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13695,7 +13695,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13728,11 +13728,11 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -13765,7 +13765,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13802,7 +13802,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -13844,7 +13844,7 @@ void m68008_device::andi_w_imm16_dais_if8() // 0270 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13874,14 +13874,14 @@ void m68008_device::andi_w_imm16_dais_if8() // 0270 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -13889,7 +13889,7 @@ void m68008_device::andi_w_imm16_dais_if8() // 0270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13923,7 +13923,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -13959,11 +13959,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -13996,7 +13996,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14033,7 +14033,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14074,7 +14074,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14109,7 +14109,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14142,7 +14142,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -14176,7 +14176,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14213,7 +14213,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14254,7 +14254,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14287,7 +14287,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14321,7 +14321,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14354,7 +14354,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -14388,7 +14388,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14425,7 +14425,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14470,7 +14470,7 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14502,23 +14502,23 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt alu_and(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -14526,7 +14526,7 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14560,11 +14560,11 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14607,7 +14607,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14640,7 +14640,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14673,12 +14673,12 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14708,7 +14708,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry] alu_and(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -14717,7 +14717,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -14733,7 +14733,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14766,7 +14766,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -14798,7 +14798,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -14833,7 +14833,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -14866,7 +14866,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14901,7 +14901,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -14936,7 +14936,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -14977,7 +14977,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15010,7 +15010,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15042,7 +15042,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -15077,11 +15077,11 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -15114,7 +15114,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15149,7 +15149,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -15184,7 +15184,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -15225,7 +15225,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15258,7 +15258,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15289,14 +15289,14 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -15330,7 +15330,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -15363,7 +15363,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15398,7 +15398,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -15433,7 +15433,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -15474,7 +15474,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15507,7 +15507,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15539,7 +15539,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15571,7 +15571,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -15606,7 +15606,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -15639,7 +15639,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15674,7 +15674,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -15709,7 +15709,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -15750,7 +15750,7 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15783,7 +15783,7 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15813,14 +15813,14 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -15828,7 +15828,7 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15862,7 +15862,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -15897,7 +15897,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -15932,7 +15932,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -15965,7 +15965,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16000,7 +16000,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -16035,7 +16035,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -16075,7 +16075,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -16108,7 +16108,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -16143,7 +16143,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16176,7 +16176,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -16211,7 +16211,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -16244,7 +16244,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16279,7 +16279,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -16314,7 +16314,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -16354,7 +16354,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -16387,7 +16387,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -16420,7 +16420,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -16454,7 +16454,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16487,7 +16487,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -16522,7 +16522,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -16555,7 +16555,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16590,7 +16590,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -16625,7 +16625,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -16699,7 +16699,7 @@ void m68008_device::subi_b_imm8_ds_if8() // 0400 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -16781,7 +16781,7 @@ void m68008_device::subi_b_imm8_ais_if8() // 0410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -16802,7 +16802,7 @@ void m68008_device::subi_b_imm8_ais_if8() // 0410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16902,7 +16902,7 @@ void m68008_device::subi_b_imm8_aips_if8() // 0418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -16921,7 +16921,7 @@ void m68008_device::subi_b_imm8_aips_if8() // 0418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17023,7 +17023,7 @@ void m68008_device::subi_b_imm8_pais_if8() // 0420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -17042,7 +17042,7 @@ void m68008_device::subi_b_imm8_pais_if8() // 0420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17168,7 +17168,7 @@ void m68008_device::subi_b_imm8_das_if8() // 0428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -17189,7 +17189,7 @@ void m68008_device::subi_b_imm8_das_if8() // 0428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17281,7 +17281,7 @@ void m68008_device::subi_b_imm8_dais_if8() // 0430 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -17363,7 +17363,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -17384,7 +17384,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17511,7 +17511,7 @@ void m68008_device::subi_b_imm8_adr16_if8() // 0438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -17530,7 +17530,7 @@ void m68008_device::subi_b_imm8_adr16_if8() // 0438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17688,7 +17688,7 @@ void m68008_device::subi_b_imm8_adr32_if8() // 0439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -17707,7 +17707,7 @@ void m68008_device::subi_b_imm8_adr32_if8() // 0439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17802,7 +17802,7 @@ void m68008_device::subi_w_imm16_ds_if8() // 0440 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -17884,7 +17884,7 @@ void m68008_device::subi_w_imm16_ais_if8() // 0450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -17920,7 +17920,7 @@ void m68008_device::subi_w_imm16_ais_if8() // 0450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18035,7 +18035,7 @@ void m68008_device::subi_w_imm16_aips_if8() // 0458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -18069,7 +18069,7 @@ void m68008_device::subi_w_imm16_aips_if8() // 0458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18186,7 +18186,7 @@ void m68008_device::subi_w_imm16_pais_if8() // 0460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -18220,7 +18220,7 @@ void m68008_device::subi_w_imm16_pais_if8() // 0460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18361,7 +18361,7 @@ void m68008_device::subi_w_imm16_das_if8() // 0468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -18397,7 +18397,7 @@ void m68008_device::subi_w_imm16_das_if8() // 0468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18504,7 +18504,7 @@ void m68008_device::subi_w_imm16_dais_if8() // 0470 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -18586,7 +18586,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -18622,7 +18622,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18764,7 +18764,7 @@ void m68008_device::subi_w_imm16_adr16_if8() // 0478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -18798,7 +18798,7 @@ void m68008_device::subi_w_imm16_adr16_if8() // 0478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18971,7 +18971,7 @@ void m68008_device::subi_w_imm16_adr32_if8() // 0479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -19005,7 +19005,7 @@ void m68008_device::subi_w_imm16_adr32_if8() // 0479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19146,7 +19146,7 @@ void m68008_device::subi_l_imm32_ds_if8() // 0480 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -19180,7 +19180,7 @@ void m68008_device::subi_l_imm32_ds_if8() // 0480 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -19267,7 +19267,7 @@ void m68008_device::subi_l_imm32_ais_if8() // 0490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -19334,7 +19334,7 @@ void m68008_device::subi_l_imm32_ais_if8() // 0490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19369,7 +19369,7 @@ void m68008_device::subi_l_imm32_ais_if8() // 0490 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -19507,7 +19507,7 @@ void m68008_device::subi_l_imm32_aips_if8() // 0498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -19577,7 +19577,7 @@ void m68008_device::subi_l_imm32_aips_if8() // 0498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19612,7 +19612,7 @@ void m68008_device::subi_l_imm32_aips_if8() // 0498 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -19749,7 +19749,7 @@ void m68008_device::subi_l_imm32_pais_if8() // 04a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -19821,7 +19821,7 @@ void m68008_device::subi_l_imm32_pais_if8() // 04a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19856,7 +19856,7 @@ void m68008_device::subi_l_imm32_pais_if8() // 04a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20025,7 +20025,7 @@ void m68008_device::subi_l_imm32_das_if8() // 04a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -20092,7 +20092,7 @@ void m68008_device::subi_l_imm32_das_if8() // 04a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20127,7 +20127,7 @@ void m68008_device::subi_l_imm32_das_if8() // 04a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20263,7 +20263,7 @@ void m68008_device::subi_l_imm32_dais_if8() // 04b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -20344,7 +20344,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -20411,7 +20411,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20446,7 +20446,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20617,7 +20617,7 @@ void m68008_device::subi_l_imm32_adr16_if8() // 04b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -20684,7 +20684,7 @@ void m68008_device::subi_l_imm32_adr16_if8() // 04b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20719,7 +20719,7 @@ void m68008_device::subi_l_imm32_adr16_if8() // 04b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -20921,7 +20921,7 @@ void m68008_device::subi_l_imm32_adr32_if8() // 04b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -20988,7 +20988,7 @@ void m68008_device::subi_l_imm32_adr32_if8() // 04b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21023,7 +21023,7 @@ void m68008_device::subi_l_imm32_adr32_if8() // 04b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -21131,7 +21131,7 @@ void m68008_device::addi_b_imm8_ds_if8() // 0600 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -21213,7 +21213,7 @@ void m68008_device::addi_b_imm8_ais_if8() // 0610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21234,7 +21234,7 @@ void m68008_device::addi_b_imm8_ais_if8() // 0610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21334,7 +21334,7 @@ void m68008_device::addi_b_imm8_aips_if8() // 0618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -21353,7 +21353,7 @@ void m68008_device::addi_b_imm8_aips_if8() // 0618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21455,7 +21455,7 @@ void m68008_device::addi_b_imm8_pais_if8() // 0620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -21474,7 +21474,7 @@ void m68008_device::addi_b_imm8_pais_if8() // 0620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21600,7 +21600,7 @@ void m68008_device::addi_b_imm8_das_if8() // 0628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21621,7 +21621,7 @@ void m68008_device::addi_b_imm8_das_if8() // 0628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21713,7 +21713,7 @@ void m68008_device::addi_b_imm8_dais_if8() // 0630 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -21795,7 +21795,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21816,7 +21816,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21943,7 +21943,7 @@ void m68008_device::addi_b_imm8_adr16_if8() // 0638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -21962,7 +21962,7 @@ void m68008_device::addi_b_imm8_adr16_if8() // 0638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22120,7 +22120,7 @@ void m68008_device::addi_b_imm8_adr32_if8() // 0639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -22139,7 +22139,7 @@ void m68008_device::addi_b_imm8_adr32_if8() // 0639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22234,7 +22234,7 @@ void m68008_device::addi_w_imm16_ds_if8() // 0640 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -22316,7 +22316,7 @@ void m68008_device::addi_w_imm16_ais_if8() // 0650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -22352,7 +22352,7 @@ void m68008_device::addi_w_imm16_ais_if8() // 0650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22467,7 +22467,7 @@ void m68008_device::addi_w_imm16_aips_if8() // 0658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -22501,7 +22501,7 @@ void m68008_device::addi_w_imm16_aips_if8() // 0658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22618,7 +22618,7 @@ void m68008_device::addi_w_imm16_pais_if8() // 0660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -22652,7 +22652,7 @@ void m68008_device::addi_w_imm16_pais_if8() // 0660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22793,7 +22793,7 @@ void m68008_device::addi_w_imm16_das_if8() // 0668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -22829,7 +22829,7 @@ void m68008_device::addi_w_imm16_das_if8() // 0668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22936,7 +22936,7 @@ void m68008_device::addi_w_imm16_dais_if8() // 0670 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -23018,7 +23018,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -23054,7 +23054,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23196,7 +23196,7 @@ void m68008_device::addi_w_imm16_adr16_if8() // 0678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -23230,7 +23230,7 @@ void m68008_device::addi_w_imm16_adr16_if8() // 0678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23403,7 +23403,7 @@ void m68008_device::addi_w_imm16_adr32_if8() // 0679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -23437,7 +23437,7 @@ void m68008_device::addi_w_imm16_adr32_if8() // 0679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23578,7 +23578,7 @@ void m68008_device::addi_l_imm32_ds_if8() // 0680 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -23612,7 +23612,7 @@ void m68008_device::addi_l_imm32_ds_if8() // 0680 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -23699,7 +23699,7 @@ void m68008_device::addi_l_imm32_ais_if8() // 0690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -23766,7 +23766,7 @@ void m68008_device::addi_l_imm32_ais_if8() // 0690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23801,7 +23801,7 @@ void m68008_device::addi_l_imm32_ais_if8() // 0690 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23939,7 +23939,7 @@ void m68008_device::addi_l_imm32_aips_if8() // 0698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -24009,7 +24009,7 @@ void m68008_device::addi_l_imm32_aips_if8() // 0698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24044,7 +24044,7 @@ void m68008_device::addi_l_imm32_aips_if8() // 0698 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24181,7 +24181,7 @@ void m68008_device::addi_l_imm32_pais_if8() // 06a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -24253,7 +24253,7 @@ void m68008_device::addi_l_imm32_pais_if8() // 06a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24288,7 +24288,7 @@ void m68008_device::addi_l_imm32_pais_if8() // 06a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24457,7 +24457,7 @@ void m68008_device::addi_l_imm32_das_if8() // 06a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -24524,7 +24524,7 @@ void m68008_device::addi_l_imm32_das_if8() // 06a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24559,7 +24559,7 @@ void m68008_device::addi_l_imm32_das_if8() // 06a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24695,7 +24695,7 @@ void m68008_device::addi_l_imm32_dais_if8() // 06b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -24776,7 +24776,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -24843,7 +24843,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24878,7 +24878,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -25049,7 +25049,7 @@ void m68008_device::addi_l_imm32_adr16_if8() // 06b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -25116,7 +25116,7 @@ void m68008_device::addi_l_imm32_adr16_if8() // 06b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25151,7 +25151,7 @@ void m68008_device::addi_l_imm32_adr16_if8() // 06b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -25353,7 +25353,7 @@ void m68008_device::addi_l_imm32_adr32_if8() // 06b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -25420,7 +25420,7 @@ void m68008_device::addi_l_imm32_adr32_if8() // 06b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25455,7 +25455,7 @@ void m68008_device::addi_l_imm32_adr32_if8() // 06b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -25531,7 +25531,7 @@ void m68008_device::btst_imm8_ds_if8() // 0800 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25567,13 +25567,13 @@ void m68008_device::btst_imm8_ds_if8() // 0800 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -25612,7 +25612,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -25625,7 +25625,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -25644,7 +25644,7 @@ void m68008_device::btst_imm8_ais_if8() // 0810 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25676,11 +25676,11 @@ void m68008_device::btst_imm8_ais_if8() // 0810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -25698,13 +25698,13 @@ void m68008_device::btst_imm8_ais_if8() // 0810 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25748,7 +25748,7 @@ void m68008_device::btst_imm8_aips_if8() // 0818 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25783,12 +25783,12 @@ void m68008_device::btst_imm8_aips_if8() // 0818 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -25807,13 +25807,13 @@ void m68008_device::btst_imm8_aips_if8() // 0818 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25857,7 +25857,7 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25891,7 +25891,7 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -25899,7 +25899,7 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -25918,13 +25918,13 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -25968,7 +25968,7 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26000,7 +26000,7 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26033,11 +26033,11 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -26055,13 +26055,13 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26105,7 +26105,7 @@ void m68008_device::btst_imm8_dais_if8() // 0830 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26135,14 +26135,14 @@ void m68008_device::btst_imm8_dais_if8() // 0830 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -26150,7 +26150,7 @@ void m68008_device::btst_imm8_dais_if8() // 0830 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26184,7 +26184,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26220,11 +26220,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -26242,13 +26242,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26291,7 +26291,7 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26326,7 +26326,7 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -26359,7 +26359,7 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -26378,13 +26378,13 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26427,7 +26427,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26460,7 +26460,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26494,7 +26494,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -26527,7 +26527,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -26546,13 +26546,13 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26595,7 +26595,7 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26627,7 +26627,7 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26660,11 +26660,11 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -26682,13 +26682,13 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26731,7 +26731,7 @@ void m68008_device::btst_imm8_dpci_if8() // 083b ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26761,14 +26761,14 @@ void m68008_device::btst_imm8_dpci_if8() // 083b ffff m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -26776,7 +26776,7 @@ void m68008_device::btst_imm8_dpci_if8() // 083b ffff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26810,7 +26810,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26846,11 +26846,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -26868,13 +26868,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26918,7 +26918,7 @@ void m68008_device::bchg_imm8_ds_if8() // 0840 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -26954,13 +26954,13 @@ void m68008_device::bchg_imm8_ds_if8() // 0840 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -26999,7 +26999,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -27011,14 +27011,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -27037,7 +27037,7 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27069,11 +27069,11 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -27092,7 +27092,7 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27127,7 +27127,7 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27156,7 +27156,7 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27191,12 +27191,12 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -27216,7 +27216,7 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27251,7 +27251,7 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27280,7 +27280,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27314,7 +27314,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -27322,7 +27322,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -27342,7 +27342,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27377,7 +27377,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27406,7 +27406,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27438,7 +27438,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27471,11 +27471,11 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -27494,7 +27494,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27529,7 +27529,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27558,7 +27558,7 @@ void m68008_device::bchg_imm8_dais_if8() // 0870 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27588,14 +27588,14 @@ void m68008_device::bchg_imm8_dais_if8() // 0870 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -27603,7 +27603,7 @@ void m68008_device::bchg_imm8_dais_if8() // 0870 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27637,7 +27637,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27673,11 +27673,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -27696,7 +27696,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27731,7 +27731,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27759,7 +27759,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27794,7 +27794,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27827,7 +27827,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -27847,7 +27847,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -27882,7 +27882,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -27910,7 +27910,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27943,7 +27943,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -27977,7 +27977,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28010,7 +28010,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -28030,7 +28030,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28065,7 +28065,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28094,7 +28094,7 @@ void m68008_device::bclr_imm8_ds_if8() // 0880 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28130,13 +28130,13 @@ void m68008_device::bclr_imm8_ds_if8() // 0880 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28172,14 +28172,14 @@ void m68008_device::bclr_imm8_ds_if8() // 0880 fff8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -28191,18 +28191,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -28221,7 +28221,7 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28253,11 +28253,11 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -28275,12 +28275,12 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28315,7 +28315,7 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28344,7 +28344,7 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28379,12 +28379,12 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -28403,12 +28403,12 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28443,7 +28443,7 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28472,7 +28472,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28506,7 +28506,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -28514,7 +28514,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -28533,12 +28533,12 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28573,7 +28573,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28602,7 +28602,7 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28634,7 +28634,7 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28667,11 +28667,11 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -28689,12 +28689,12 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28729,7 +28729,7 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28758,7 +28758,7 @@ void m68008_device::bclr_imm8_dais_if8() // 08b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28788,14 +28788,14 @@ void m68008_device::bclr_imm8_dais_if8() // 08b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -28803,7 +28803,7 @@ void m68008_device::bclr_imm8_dais_if8() // 08b0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28837,7 +28837,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28873,11 +28873,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -28895,12 +28895,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -28935,7 +28935,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -28963,7 +28963,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -28998,7 +28998,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29031,7 +29031,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -29050,12 +29050,12 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29090,7 +29090,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29118,7 +29118,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29151,7 +29151,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29185,7 +29185,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29218,7 +29218,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -29237,12 +29237,12 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29277,7 +29277,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29306,7 +29306,7 @@ void m68008_device::bset_imm8_ds_if8() // 08c0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29342,13 +29342,13 @@ void m68008_device::bset_imm8_ds_if8() // 08c0 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29387,7 +29387,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29399,14 +29399,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29425,7 +29425,7 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29457,11 +29457,11 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -29480,7 +29480,7 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29515,7 +29515,7 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29544,7 +29544,7 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29579,12 +29579,12 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -29604,7 +29604,7 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29639,7 +29639,7 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29668,7 +29668,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29702,7 +29702,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -29710,7 +29710,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -29730,7 +29730,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29765,7 +29765,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29794,7 +29794,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29826,7 +29826,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29859,11 +29859,11 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -29882,7 +29882,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29917,7 +29917,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -29946,7 +29946,7 @@ void m68008_device::bset_imm8_dais_if8() // 08f0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -29976,14 +29976,14 @@ void m68008_device::bset_imm8_dais_if8() // 08f0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -29991,7 +29991,7 @@ void m68008_device::bset_imm8_dais_if8() // 08f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30025,7 +30025,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30061,11 +30061,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -30084,7 +30084,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30119,7 +30119,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -30147,7 +30147,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30182,7 +30182,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30215,7 +30215,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -30235,7 +30235,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30270,7 +30270,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -30298,7 +30298,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30331,7 +30331,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30365,7 +30365,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30398,7 +30398,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -30418,7 +30418,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30453,7 +30453,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -30482,7 +30482,7 @@ void m68008_device::eori_b_imm8_ds_if8() // 0a00 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30515,7 +30515,7 @@ void m68008_device::eori_b_imm8_ds_if8() // 0a00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -30523,7 +30523,7 @@ void m68008_device::eori_b_imm8_ds_if8() // 0a00 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30567,7 +30567,7 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30599,11 +30599,11 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -30621,7 +30621,7 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -30658,7 +30658,7 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -30685,7 +30685,7 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30720,12 +30720,12 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -30744,7 +30744,7 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -30781,7 +30781,7 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -30808,7 +30808,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30842,7 +30842,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -30850,7 +30850,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -30869,7 +30869,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -30906,7 +30906,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -30933,7 +30933,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30965,7 +30965,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -30998,11 +30998,11 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -31020,7 +31020,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31057,7 +31057,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -31084,7 +31084,7 @@ void m68008_device::eori_b_imm8_dais_if8() // 0a30 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31114,14 +31114,14 @@ void m68008_device::eori_b_imm8_dais_if8() // 0a30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -31129,7 +31129,7 @@ void m68008_device::eori_b_imm8_dais_if8() // 0a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31163,7 +31163,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31199,11 +31199,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -31221,7 +31221,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31258,7 +31258,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -31284,7 +31284,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31319,7 +31319,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31352,7 +31352,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -31371,7 +31371,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31408,7 +31408,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -31434,7 +31434,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31467,7 +31467,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31501,7 +31501,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31534,7 +31534,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -31553,7 +31553,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31590,7 +31590,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -31616,7 +31616,7 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31648,21 +31648,21 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt alu_eor8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -31670,7 +31670,7 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31704,11 +31704,11 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31752,7 +31752,7 @@ void m68008_device::eori_w_imm16_ds_if8() // 0a40 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31785,7 +31785,7 @@ void m68008_device::eori_w_imm16_ds_if8() // 0a40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -31793,7 +31793,7 @@ void m68008_device::eori_w_imm16_ds_if8() // 0a40 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31837,7 +31837,7 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -31869,11 +31869,11 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -31906,7 +31906,7 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -31943,7 +31943,7 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -31985,7 +31985,7 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32020,12 +32020,12 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -32059,7 +32059,7 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32096,7 +32096,7 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32138,7 +32138,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32172,7 +32172,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -32180,7 +32180,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -32214,7 +32214,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32251,7 +32251,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32293,7 +32293,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32325,7 +32325,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32358,11 +32358,11 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -32395,7 +32395,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32432,7 +32432,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32474,7 +32474,7 @@ void m68008_device::eori_w_imm16_dais_if8() // 0a70 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32504,14 +32504,14 @@ void m68008_device::eori_w_imm16_dais_if8() // 0a70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -32519,7 +32519,7 @@ void m68008_device::eori_w_imm16_dais_if8() // 0a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32553,7 +32553,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32589,11 +32589,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -32626,7 +32626,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32663,7 +32663,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32704,7 +32704,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32739,7 +32739,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32772,7 +32772,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -32806,7 +32806,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -32843,7 +32843,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -32884,7 +32884,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32917,7 +32917,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -32951,7 +32951,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32984,7 +32984,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -33018,7 +33018,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -33055,7 +33055,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -33100,7 +33100,7 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33132,23 +33132,23 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt alu_eor(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -33156,7 +33156,7 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33190,11 +33190,11 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33237,7 +33237,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33270,7 +33270,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33303,12 +33303,12 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33338,7 +33338,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry] alu_eor(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -33347,7 +33347,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -33363,7 +33363,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33396,7 +33396,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33428,7 +33428,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -33463,7 +33463,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -33496,7 +33496,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -33531,7 +33531,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -33566,7 +33566,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -33607,7 +33607,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33640,7 +33640,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33672,7 +33672,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -33707,11 +33707,11 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -33744,7 +33744,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -33779,7 +33779,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -33814,7 +33814,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -33855,7 +33855,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33888,7 +33888,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -33919,14 +33919,14 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -33960,7 +33960,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -33993,7 +33993,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34028,7 +34028,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34063,7 +34063,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34104,7 +34104,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34137,7 +34137,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34169,7 +34169,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34201,7 +34201,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -34236,7 +34236,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -34269,7 +34269,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34304,7 +34304,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34339,7 +34339,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34380,7 +34380,7 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34413,7 +34413,7 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34443,14 +34443,14 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -34458,7 +34458,7 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34492,7 +34492,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34527,7 +34527,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -34562,7 +34562,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -34595,7 +34595,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34630,7 +34630,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34665,7 +34665,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34705,7 +34705,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34738,7 +34738,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -34773,7 +34773,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34806,7 +34806,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -34841,7 +34841,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -34874,7 +34874,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -34909,7 +34909,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -34944,7 +34944,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -34984,7 +34984,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -35017,7 +35017,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -35050,7 +35050,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -35084,7 +35084,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35117,7 +35117,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -35152,7 +35152,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -35185,7 +35185,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35220,7 +35220,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -35255,7 +35255,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -35329,7 +35329,7 @@ void m68008_device::cmpi_b_imm8_ds_if8() // 0c00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -35410,7 +35410,7 @@ void m68008_device::cmpi_b_imm8_ais_if8() // 0c10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -35431,7 +35431,7 @@ void m68008_device::cmpi_b_imm8_ais_if8() // 0c10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35517,7 +35517,7 @@ void m68008_device::cmpi_b_imm8_aips_if8() // 0c18 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -35536,7 +35536,7 @@ void m68008_device::cmpi_b_imm8_aips_if8() // 0c18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35624,7 +35624,7 @@ void m68008_device::cmpi_b_imm8_pais_if8() // 0c20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -35643,7 +35643,7 @@ void m68008_device::cmpi_b_imm8_pais_if8() // 0c20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35755,7 +35755,7 @@ void m68008_device::cmpi_b_imm8_das_if8() // 0c28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -35776,7 +35776,7 @@ void m68008_device::cmpi_b_imm8_das_if8() // 0c28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -35854,7 +35854,7 @@ void m68008_device::cmpi_b_imm8_dais_if8() // 0c30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -35936,7 +35936,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -35957,7 +35957,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36070,7 +36070,7 @@ void m68008_device::cmpi_b_imm8_adr16_if8() // 0c38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -36089,7 +36089,7 @@ void m68008_device::cmpi_b_imm8_adr16_if8() // 0c38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36233,7 +36233,7 @@ void m68008_device::cmpi_b_imm8_adr32_if8() // 0c39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -36252,7 +36252,7 @@ void m68008_device::cmpi_b_imm8_adr32_if8() // 0c39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36333,7 +36333,7 @@ void m68008_device::cmpi_w_imm16_ds_if8() // 0c40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -36414,7 +36414,7 @@ void m68008_device::cmpi_w_imm16_ais_if8() // 0c50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -36450,7 +36450,7 @@ void m68008_device::cmpi_w_imm16_ais_if8() // 0c50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36536,7 +36536,7 @@ void m68008_device::cmpi_w_imm16_aips_if8() // 0c58 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -36570,7 +36570,7 @@ void m68008_device::cmpi_w_imm16_aips_if8() // 0c58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36658,7 +36658,7 @@ void m68008_device::cmpi_w_imm16_pais_if8() // 0c60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -36692,7 +36692,7 @@ void m68008_device::cmpi_w_imm16_pais_if8() // 0c60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36804,7 +36804,7 @@ void m68008_device::cmpi_w_imm16_das_if8() // 0c68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -36840,7 +36840,7 @@ void m68008_device::cmpi_w_imm16_das_if8() // 0c68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -36918,7 +36918,7 @@ void m68008_device::cmpi_w_imm16_dais_if8() // 0c70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -37000,7 +37000,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -37036,7 +37036,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -37149,7 +37149,7 @@ void m68008_device::cmpi_w_imm16_adr16_if8() // 0c78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -37183,7 +37183,7 @@ void m68008_device::cmpi_w_imm16_adr16_if8() // 0c78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -37327,7 +37327,7 @@ void m68008_device::cmpi_w_imm16_adr32_if8() // 0c79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -37361,7 +37361,7 @@ void m68008_device::cmpi_w_imm16_adr32_if8() // 0c79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -37474,11 +37474,11 @@ void m68008_device::cmpi_l_imm32_ds_if8() // 0c80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 239 rcal2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37591,7 +37591,7 @@ void m68008_device::cmpi_l_imm32_ais_if8() // 0c90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -37658,13 +37658,13 @@ void m68008_device::cmpi_l_imm32_ais_if8() // 0c90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37772,7 +37772,7 @@ void m68008_device::cmpi_l_imm32_aips_if8() // 0c98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -37842,13 +37842,13 @@ void m68008_device::cmpi_l_imm32_aips_if8() // 0c98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37955,7 +37955,7 @@ void m68008_device::cmpi_l_imm32_pais_if8() // 0ca0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -38027,13 +38027,13 @@ void m68008_device::cmpi_l_imm32_pais_if8() // 0ca0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38172,7 +38172,7 @@ void m68008_device::cmpi_l_imm32_das_if8() // 0ca8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -38239,13 +38239,13 @@ void m68008_device::cmpi_l_imm32_das_if8() // 0ca8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38351,7 +38351,7 @@ void m68008_device::cmpi_l_imm32_dais_if8() // 0cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -38432,7 +38432,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -38499,13 +38499,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38646,7 +38646,7 @@ void m68008_device::cmpi_l_imm32_adr16_if8() // 0cb8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -38713,13 +38713,13 @@ void m68008_device::cmpi_l_imm32_adr16_if8() // 0cb8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38891,7 +38891,7 @@ void m68008_device::cmpi_l_imm32_adr32_if8() // 0cb9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -38958,13 +38958,13 @@ void m68008_device::cmpi_l_imm32_adr32_if8() // 0cb9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39012,7 +39012,7 @@ void m68008_device::move_b_ds_dd_if8() // 1000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -39062,7 +39062,7 @@ void m68008_device::move_b_ais_dd_if8() // 1010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39084,7 +39084,7 @@ void m68008_device::move_b_ais_dd_if8() // 1010 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39138,7 +39138,7 @@ void m68008_device::move_b_aips_dd_if8() // 1018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -39158,7 +39158,7 @@ void m68008_device::move_b_aips_dd_if8() // 1018 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39214,7 +39214,7 @@ void m68008_device::move_b_pais_dd_if8() // 1020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -39234,7 +39234,7 @@ void m68008_device::move_b_pais_dd_if8() // 1020 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39314,7 +39314,7 @@ void m68008_device::move_b_das_dd_if8() // 1028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39336,7 +39336,7 @@ void m68008_device::move_b_das_dd_if8() // 1028 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39382,7 +39382,7 @@ void m68008_device::move_b_dais_dd_if8() // 1030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -39464,7 +39464,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39486,7 +39486,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39567,7 +39567,7 @@ void m68008_device::move_b_adr16_dd_if8() // 1038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -39587,7 +39587,7 @@ void m68008_device::move_b_adr16_dd_if8() // 1038 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39699,7 +39699,7 @@ void m68008_device::move_b_adr32_dd_if8() // 1039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -39719,7 +39719,7 @@ void m68008_device::move_b_adr32_dd_if8() // 1039 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39798,7 +39798,7 @@ void m68008_device::move_b_dpc_dd_if8() // 103a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39820,7 +39820,7 @@ void m68008_device::move_b_dpc_dd_if8() // 103a f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -39865,7 +39865,7 @@ void m68008_device::move_b_dpci_dd_if8() // 103b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -39947,7 +39947,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -39969,7 +39969,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -40053,7 +40053,7 @@ void m68008_device::move_b_imm8_dd_if8() // 103c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -40106,7 +40106,7 @@ void m68008_device::move_b_ds_aid_if8() // 1080 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40169,7 +40169,7 @@ void m68008_device::move_b_ais_aid_if8() // 1090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -40190,7 +40190,7 @@ void m68008_device::move_b_ais_aid_if8() // 1090 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40259,7 +40259,7 @@ void m68008_device::move_b_aips_aid_if8() // 1098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -40278,7 +40278,7 @@ void m68008_device::move_b_aips_aid_if8() // 1098 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40349,7 +40349,7 @@ void m68008_device::move_b_pais_aid_if8() // 10a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -40368,7 +40368,7 @@ void m68008_device::move_b_pais_aid_if8() // 10a0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40463,7 +40463,7 @@ void m68008_device::move_b_das_aid_if8() // 10a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -40484,7 +40484,7 @@ void m68008_device::move_b_das_aid_if8() // 10a8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40545,7 +40545,7 @@ void m68008_device::move_b_dais_aid_if8() // 10b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -40627,7 +40627,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -40648,7 +40648,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40744,7 +40744,7 @@ void m68008_device::move_b_adr16_aid_if8() // 10b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -40763,7 +40763,7 @@ void m68008_device::move_b_adr16_aid_if8() // 10b8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -40890,7 +40890,7 @@ void m68008_device::move_b_adr32_aid_if8() // 10b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -40909,7 +40909,7 @@ void m68008_device::move_b_adr32_aid_if8() // 10b9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41003,7 +41003,7 @@ void m68008_device::move_b_dpc_aid_if8() // 10ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41024,7 +41024,7 @@ void m68008_device::move_b_dpc_aid_if8() // 10ba f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41084,7 +41084,7 @@ void m68008_device::move_b_dpci_aid_if8() // 10bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -41166,7 +41166,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41187,7 +41187,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41286,7 +41286,7 @@ void m68008_device::move_b_imm8_aid_if8() // 10bc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41352,7 +41352,7 @@ void m68008_device::move_b_ds_aipd_if8() // 10c0 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41414,7 +41414,7 @@ void m68008_device::move_b_ais_aipd_if8() // 10d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41436,7 +41436,7 @@ void m68008_device::move_b_ais_aipd_if8() // 10d0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41504,7 +41504,7 @@ void m68008_device::move_b_aips_aipd_if8() // 10d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -41524,7 +41524,7 @@ void m68008_device::move_b_aips_aipd_if8() // 10d8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41594,7 +41594,7 @@ void m68008_device::move_b_pais_aipd_if8() // 10e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -41614,7 +41614,7 @@ void m68008_device::move_b_pais_aipd_if8() // 10e0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41708,7 +41708,7 @@ void m68008_device::move_b_das_aipd_if8() // 10e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41730,7 +41730,7 @@ void m68008_device::move_b_das_aipd_if8() // 10e8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41790,7 +41790,7 @@ void m68008_device::move_b_dais_aipd_if8() // 10f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -41872,7 +41872,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -41894,7 +41894,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -41989,7 +41989,7 @@ void m68008_device::move_b_adr16_aipd_if8() // 10f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -42009,7 +42009,7 @@ void m68008_device::move_b_adr16_aipd_if8() // 10f8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42135,7 +42135,7 @@ void m68008_device::move_b_adr32_aipd_if8() // 10f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -42155,7 +42155,7 @@ void m68008_device::move_b_adr32_aipd_if8() // 10f9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42248,7 +42248,7 @@ void m68008_device::move_b_dpc_aipd_if8() // 10fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42270,7 +42270,7 @@ void m68008_device::move_b_dpc_aipd_if8() // 10fa f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42329,7 +42329,7 @@ void m68008_device::move_b_dpci_aipd_if8() // 10fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -42411,7 +42411,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42433,7 +42433,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42531,7 +42531,7 @@ void m68008_device::move_b_imm8_aipd_if8() // 10fc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -42595,7 +42595,7 @@ void m68008_device::move_b_ds_paid_if8() // 1100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42658,7 +42658,7 @@ void m68008_device::move_b_ais_paid_if8() // 1110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42679,7 +42679,7 @@ void m68008_device::move_b_ais_paid_if8() // 1110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42748,7 +42748,7 @@ void m68008_device::move_b_aips_paid_if8() // 1118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -42767,7 +42767,7 @@ void m68008_device::move_b_aips_paid_if8() // 1118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42838,7 +42838,7 @@ void m68008_device::move_b_pais_paid_if8() // 1120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -42857,7 +42857,7 @@ void m68008_device::move_b_pais_paid_if8() // 1120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -42952,7 +42952,7 @@ void m68008_device::move_b_das_paid_if8() // 1128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -42973,7 +42973,7 @@ void m68008_device::move_b_das_paid_if8() // 1128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43034,7 +43034,7 @@ void m68008_device::move_b_dais_paid_if8() // 1130 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -43116,7 +43116,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43137,7 +43137,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43233,7 +43233,7 @@ void m68008_device::move_b_adr16_paid_if8() // 1138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -43252,7 +43252,7 @@ void m68008_device::move_b_adr16_paid_if8() // 1138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43379,7 +43379,7 @@ void m68008_device::move_b_adr32_paid_if8() // 1139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -43398,7 +43398,7 @@ void m68008_device::move_b_adr32_paid_if8() // 1139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43492,7 +43492,7 @@ void m68008_device::move_b_dpc_paid_if8() // 113a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43513,7 +43513,7 @@ void m68008_device::move_b_dpc_paid_if8() // 113a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43573,7 +43573,7 @@ void m68008_device::move_b_dpci_paid_if8() // 113b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -43655,7 +43655,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43676,7 +43676,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43774,7 +43774,7 @@ void m68008_device::move_b_imm8_paid_if8() // 113c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43870,7 +43870,7 @@ void m68008_device::move_b_ds_dad_if8() // 1140 f1f8 m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -43934,7 +43934,7 @@ void m68008_device::move_b_ais_dad_if8() // 1150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -43954,7 +43954,7 @@ void m68008_device::move_b_ais_dad_if8() // 1150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44060,7 +44060,7 @@ void m68008_device::move_b_aips_dad_if8() // 1158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -44078,7 +44078,7 @@ void m68008_device::move_b_aips_dad_if8() // 1158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44186,7 +44186,7 @@ void m68008_device::move_b_pais_dad_if8() // 1160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -44204,7 +44204,7 @@ void m68008_device::move_b_pais_dad_if8() // 1160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44336,7 +44336,7 @@ void m68008_device::move_b_das_dad_if8() // 1168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -44356,7 +44356,7 @@ void m68008_device::move_b_das_dad_if8() // 1168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44454,7 +44454,7 @@ void m68008_device::move_b_dais_dad_if8() // 1170 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -44536,7 +44536,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -44556,7 +44556,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44689,7 +44689,7 @@ void m68008_device::move_b_adr16_dad_if8() // 1178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -44707,7 +44707,7 @@ void m68008_device::move_b_adr16_dad_if8() // 1178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44871,7 +44871,7 @@ void m68008_device::move_b_adr32_dad_if8() // 1179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -44889,7 +44889,7 @@ void m68008_device::move_b_adr32_dad_if8() // 1179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45020,7 +45020,7 @@ void m68008_device::move_b_dpc_dad_if8() // 117a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -45040,7 +45040,7 @@ void m68008_device::move_b_dpc_dad_if8() // 117a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45137,7 +45137,7 @@ void m68008_device::move_b_dpci_dad_if8() // 117b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -45219,7 +45219,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -45239,7 +45239,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45405,7 +45405,7 @@ void m68008_device::move_b_imm8_dad_if8() // 117c f1ff m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -45467,7 +45467,7 @@ void m68008_device::move_b_ds_daid_if8() // 1180 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = m_irdi & 7; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -45551,7 +45551,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -45615,7 +45615,7 @@ void m68008_device::move_b_ais_daid_if8() // 1190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -45632,7 +45632,7 @@ void m68008_device::move_b_ais_daid_if8() // 1190 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -45647,7 +45647,7 @@ void m68008_device::move_b_ais_daid_if8() // 1190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45681,7 +45681,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45789,7 +45789,7 @@ void m68008_device::move_b_aips_daid_if8() // 1198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -45804,7 +45804,7 @@ void m68008_device::move_b_aips_daid_if8() // 1198 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -45819,7 +45819,7 @@ void m68008_device::move_b_aips_daid_if8() // 1198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45853,7 +45853,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -45963,7 +45963,7 @@ void m68008_device::move_b_pais_daid_if8() // 11a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -45978,7 +45978,7 @@ void m68008_device::move_b_pais_daid_if8() // 11a0 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -45993,7 +45993,7 @@ void m68008_device::move_b_pais_daid_if8() // 11a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46027,7 +46027,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46161,7 +46161,7 @@ void m68008_device::move_b_das_daid_if8() // 11a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46178,7 +46178,7 @@ void m68008_device::move_b_das_daid_if8() // 11a8 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46193,7 +46193,7 @@ void m68008_device::move_b_das_daid_if8() // 11a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46227,7 +46227,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46327,7 +46327,7 @@ void m68008_device::move_b_dais_daid_if8() // 11b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -46409,7 +46409,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46426,7 +46426,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46441,7 +46441,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46475,7 +46475,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46610,7 +46610,7 @@ void m68008_device::move_b_adr16_daid_if8() // 11b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -46625,7 +46625,7 @@ void m68008_device::move_b_adr16_daid_if8() // 11b8 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46640,7 +46640,7 @@ void m68008_device::move_b_adr16_daid_if8() // 11b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46674,7 +46674,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46840,7 +46840,7 @@ void m68008_device::move_b_adr32_daid_if8() // 11b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -46855,7 +46855,7 @@ void m68008_device::move_b_adr32_daid_if8() // 11b9 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -46870,7 +46870,7 @@ void m68008_device::move_b_adr32_daid_if8() // 11b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -46904,7 +46904,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47037,7 +47037,7 @@ void m68008_device::move_b_dpc_daid_if8() // 11ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47054,7 +47054,7 @@ void m68008_device::move_b_dpc_daid_if8() // 11ba f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -47069,7 +47069,7 @@ void m68008_device::move_b_dpc_daid_if8() // 11ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47103,7 +47103,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47202,7 +47202,7 @@ void m68008_device::move_b_dpci_daid_if8() // 11bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -47284,7 +47284,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47301,7 +47301,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -47316,7 +47316,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47350,7 +47350,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47483,7 +47483,7 @@ void m68008_device::move_b_imm8_daid_if8() // 11bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -47567,7 +47567,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47632,7 +47632,7 @@ void m68008_device::move_b_ds_adr16_if8() // 11c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47731,7 +47731,7 @@ void m68008_device::move_b_ais_adr16_if8() // 11d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47751,7 +47751,7 @@ void m68008_device::move_b_ais_adr16_if8() // 11d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47856,7 +47856,7 @@ void m68008_device::move_b_aips_adr16_if8() // 11d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -47874,7 +47874,7 @@ void m68008_device::move_b_aips_adr16_if8() // 11d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -47981,7 +47981,7 @@ void m68008_device::move_b_pais_adr16_if8() // 11e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -47999,7 +47999,7 @@ void m68008_device::move_b_pais_adr16_if8() // 11e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48130,7 +48130,7 @@ void m68008_device::move_b_das_adr16_if8() // 11e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48150,7 +48150,7 @@ void m68008_device::move_b_das_adr16_if8() // 11e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48247,7 +48247,7 @@ void m68008_device::move_b_dais_adr16_if8() // 11f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -48329,7 +48329,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48349,7 +48349,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48481,7 +48481,7 @@ void m68008_device::move_b_adr16_adr16_if8() // 11f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -48499,7 +48499,7 @@ void m68008_device::move_b_adr16_adr16_if8() // 11f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48662,7 +48662,7 @@ void m68008_device::move_b_adr32_adr16_if8() // 11f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -48680,7 +48680,7 @@ void m68008_device::move_b_adr32_adr16_if8() // 11f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48810,7 +48810,7 @@ void m68008_device::move_b_dpc_adr16_if8() // 11fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48830,7 +48830,7 @@ void m68008_device::move_b_dpc_adr16_if8() // 11fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -48926,7 +48926,7 @@ void m68008_device::move_b_dpc_adr16_if8() // 11fa ffff void m68008_device::move_b_dpci_adr16_if8() // 11fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -49008,7 +49008,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49028,7 +49028,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49162,7 +49162,7 @@ void m68008_device::move_b_imm8_adr16_if8() // 11fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49294,7 +49294,7 @@ void m68008_device::move_b_ds_adr32_if8() // 13c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49393,7 +49393,7 @@ void m68008_device::move_b_ais_adr32_if8() // 13d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49413,7 +49413,7 @@ void m68008_device::move_b_ais_adr32_if8() // 13d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49548,7 +49548,7 @@ void m68008_device::move_b_aips_adr32_if8() // 13d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -49566,7 +49566,7 @@ void m68008_device::move_b_aips_adr32_if8() // 13d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49703,7 +49703,7 @@ void m68008_device::move_b_pais_adr32_if8() // 13e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -49721,7 +49721,7 @@ void m68008_device::move_b_pais_adr32_if8() // 13e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49882,7 +49882,7 @@ void m68008_device::move_b_das_adr32_if8() // 13e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49902,7 +49902,7 @@ void m68008_device::move_b_das_adr32_if8() // 13e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50029,7 +50029,7 @@ void m68008_device::move_b_dais_adr32_if8() // 13f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -50111,7 +50111,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50131,7 +50131,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50293,7 +50293,7 @@ void m68008_device::move_b_adr16_adr32_if8() // 13f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -50311,7 +50311,7 @@ void m68008_device::move_b_adr16_adr32_if8() // 13f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50504,7 +50504,7 @@ void m68008_device::move_b_adr32_adr32_if8() // 13f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -50522,7 +50522,7 @@ void m68008_device::move_b_adr32_adr32_if8() // 13f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50682,7 +50682,7 @@ void m68008_device::move_b_dpc_adr32_if8() // 13fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50702,7 +50702,7 @@ void m68008_device::move_b_dpc_adr32_if8() // 13fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50828,7 +50828,7 @@ void m68008_device::move_b_dpc_adr32_if8() // 13fa ffff void m68008_device::move_b_dpci_adr32_if8() // 13fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -50910,7 +50910,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50930,7 +50930,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51125,7 +51125,7 @@ void m68008_device::move_b_imm8_adr32_if8() // 13fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51228,13 +51228,13 @@ void m68008_device::move_l_ds_dd_if8() // 2000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_da[rx] = m_at; @@ -51283,14 +51283,14 @@ void m68008_device::move_l_as_dd_if8() // 2008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51335,7 +51335,7 @@ void m68008_device::move_l_ais_dd_if8() // 2010 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -51403,14 +51403,14 @@ void m68008_device::move_l_ais_dd_if8() // 2010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51455,7 +51455,7 @@ void m68008_device::move_l_aips_dd_if8() // 2018 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -51526,14 +51526,14 @@ void m68008_device::move_l_aips_dd_if8() // 2018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51577,7 +51577,7 @@ void m68008_device::move_l_pais_dd_if8() // 2020 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -51650,14 +51650,14 @@ void m68008_device::move_l_pais_dd_if8() // 2020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51733,7 +51733,7 @@ void m68008_device::move_l_das_dd_if8() // 2028 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -51801,14 +51801,14 @@ void m68008_device::move_l_das_dd_if8() // 2028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51851,7 +51851,7 @@ void m68008_device::move_l_dais_dd_if8() // 2030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -51932,7 +51932,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -52000,14 +52000,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52085,7 +52085,7 @@ void m68008_device::move_l_adr16_dd_if8() // 2038 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -52153,14 +52153,14 @@ void m68008_device::move_l_adr16_dd_if8() // 2038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52269,7 +52269,7 @@ void m68008_device::move_l_adr32_dd_if8() // 2039 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -52337,14 +52337,14 @@ void m68008_device::move_l_adr32_dd_if8() // 2039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52419,7 +52419,7 @@ void m68008_device::move_l_dpc_dd_if8() // 203a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -52487,14 +52487,14 @@ void m68008_device::move_l_dpc_dd_if8() // 203a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52536,7 +52536,7 @@ void m68008_device::move_l_dpci_dd_if8() // 203b f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -52617,7 +52617,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -52685,14 +52685,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52804,14 +52804,14 @@ void m68008_device::move_l_imm32_dd_if8() // 203c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52859,13 +52859,13 @@ void m68008_device::movea_l_ds_ad_if8() // 2040 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -52912,12 +52912,12 @@ void m68008_device::movea_l_as_ad_if8() // 2048 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52962,7 +52962,7 @@ void m68008_device::movea_l_ais_ad_if8() // 2050 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -53030,13 +53030,13 @@ void m68008_device::movea_l_ais_ad_if8() // 2050 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -53080,7 +53080,7 @@ void m68008_device::movea_l_aips_ad_if8() // 2058 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -53151,13 +53151,13 @@ void m68008_device::movea_l_aips_ad_if8() // 2058 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -53200,7 +53200,7 @@ void m68008_device::movea_l_pais_ad_if8() // 2060 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -53273,13 +53273,13 @@ void m68008_device::movea_l_pais_ad_if8() // 2060 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -53354,7 +53354,7 @@ void m68008_device::movea_l_das_ad_if8() // 2068 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -53422,13 +53422,13 @@ void m68008_device::movea_l_das_ad_if8() // 2068 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -53470,7 +53470,7 @@ void m68008_device::movea_l_dais_ad_if8() // 2070 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -53551,7 +53551,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -53619,13 +53619,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -53702,7 +53702,7 @@ void m68008_device::movea_l_adr16_ad_if8() // 2078 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -53770,13 +53770,13 @@ void m68008_device::movea_l_adr16_ad_if8() // 2078 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -53884,7 +53884,7 @@ void m68008_device::movea_l_adr32_ad_if8() // 2079 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -53952,13 +53952,13 @@ void m68008_device::movea_l_adr32_ad_if8() // 2079 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -54032,7 +54032,7 @@ void m68008_device::movea_l_dpc_ad_if8() // 207a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -54100,13 +54100,13 @@ void m68008_device::movea_l_dpc_ad_if8() // 207a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -54147,7 +54147,7 @@ void m68008_device::movea_l_dpci_ad_if8() // 207b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -54228,7 +54228,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -54296,13 +54296,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -54413,13 +54413,13 @@ void m68008_device::movea_l_imm32_ad_if8() // 207c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -54497,7 +54497,7 @@ void m68008_device::move_l_ds_aid_if8() // 2080 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54532,7 +54532,7 @@ void m68008_device::move_l_ds_aid_if8() // 2080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54611,7 +54611,7 @@ void m68008_device::move_l_as_aid_if8() // 2088 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54646,7 +54646,7 @@ void m68008_device::move_l_as_aid_if8() // 2088 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54691,7 +54691,7 @@ void m68008_device::move_l_ais_aid_if8() // 2090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -54758,7 +54758,7 @@ void m68008_device::move_l_ais_aid_if8() // 2090 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54792,7 +54792,7 @@ void m68008_device::move_l_ais_aid_if8() // 2090 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -54870,7 +54870,7 @@ void m68008_device::move_l_aips_aid_if8() // 2098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -54940,7 +54940,7 @@ void m68008_device::move_l_aips_aid_if8() // 2098 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54974,7 +54974,7 @@ void m68008_device::move_l_aips_aid_if8() // 2098 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55051,7 +55051,7 @@ void m68008_device::move_l_pais_aid_if8() // 20a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -55123,7 +55123,7 @@ void m68008_device::move_l_pais_aid_if8() // 20a0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55157,7 +55157,7 @@ void m68008_device::move_l_pais_aid_if8() // 20a0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55266,7 +55266,7 @@ void m68008_device::move_l_das_aid_if8() // 20a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -55333,7 +55333,7 @@ void m68008_device::move_l_das_aid_if8() // 20a8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55367,7 +55367,7 @@ void m68008_device::move_l_das_aid_if8() // 20a8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55443,7 +55443,7 @@ void m68008_device::move_l_dais_aid_if8() // 20b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -55524,7 +55524,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -55591,7 +55591,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55625,7 +55625,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55736,7 +55736,7 @@ void m68008_device::move_l_adr16_aid_if8() // 20b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -55803,7 +55803,7 @@ void m68008_device::move_l_adr16_aid_if8() // 20b8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -55837,7 +55837,7 @@ void m68008_device::move_l_adr16_aid_if8() // 20b8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -55979,7 +55979,7 @@ void m68008_device::move_l_adr32_aid_if8() // 20b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -56046,7 +56046,7 @@ void m68008_device::move_l_adr32_aid_if8() // 20b9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56080,7 +56080,7 @@ void m68008_device::move_l_adr32_aid_if8() // 20b9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -56188,7 +56188,7 @@ void m68008_device::move_l_dpc_aid_if8() // 20ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -56255,7 +56255,7 @@ void m68008_device::move_l_dpc_aid_if8() // 20ba f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56289,7 +56289,7 @@ void m68008_device::move_l_dpc_aid_if8() // 20ba f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -56364,7 +56364,7 @@ void m68008_device::move_l_dpci_aid_if8() // 20bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -56445,7 +56445,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -56512,7 +56512,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56546,7 +56546,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -56722,7 +56722,7 @@ void m68008_device::move_l_imm32_aid_if8() // 20bc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56757,7 +56757,7 @@ void m68008_device::move_l_imm32_aid_if8() // 20bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56836,7 +56836,7 @@ void m68008_device::move_l_ds_aipd_if8() // 20c0 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56871,7 +56871,7 @@ void m68008_device::move_l_ds_aipd_if8() // 20c0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56950,7 +56950,7 @@ void m68008_device::move_l_as_aipd_if8() // 20c8 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -56985,7 +56985,7 @@ void m68008_device::move_l_as_aipd_if8() // 20c8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57030,7 +57030,7 @@ void m68008_device::move_l_ais_aipd_if8() // 20d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -57097,7 +57097,7 @@ void m68008_device::move_l_ais_aipd_if8() // 20d0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57131,7 +57131,7 @@ void m68008_device::move_l_ais_aipd_if8() // 20d0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57208,7 +57208,7 @@ void m68008_device::move_l_aips_aipd_if8() // 20d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -57278,7 +57278,7 @@ void m68008_device::move_l_aips_aipd_if8() // 20d8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57312,7 +57312,7 @@ void m68008_device::move_l_aips_aipd_if8() // 20d8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57388,7 +57388,7 @@ void m68008_device::move_l_pais_aipd_if8() // 20e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -57460,7 +57460,7 @@ void m68008_device::move_l_pais_aipd_if8() // 20e0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57494,7 +57494,7 @@ void m68008_device::move_l_pais_aipd_if8() // 20e0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57602,7 +57602,7 @@ void m68008_device::move_l_das_aipd_if8() // 20e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -57669,7 +57669,7 @@ void m68008_device::move_l_das_aipd_if8() // 20e8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57703,7 +57703,7 @@ void m68008_device::move_l_das_aipd_if8() // 20e8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -57778,7 +57778,7 @@ void m68008_device::move_l_dais_aipd_if8() // 20f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -57859,7 +57859,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -57926,7 +57926,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -57960,7 +57960,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58070,7 +58070,7 @@ void m68008_device::move_l_adr16_aipd_if8() // 20f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -58137,7 +58137,7 @@ void m68008_device::move_l_adr16_aipd_if8() // 20f8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58171,7 +58171,7 @@ void m68008_device::move_l_adr16_aipd_if8() // 20f8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58312,7 +58312,7 @@ void m68008_device::move_l_adr32_aipd_if8() // 20f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -58379,7 +58379,7 @@ void m68008_device::move_l_adr32_aipd_if8() // 20f9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58413,7 +58413,7 @@ void m68008_device::move_l_adr32_aipd_if8() // 20f9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58520,7 +58520,7 @@ void m68008_device::move_l_dpc_aipd_if8() // 20fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -58587,7 +58587,7 @@ void m68008_device::move_l_dpc_aipd_if8() // 20fa f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58621,7 +58621,7 @@ void m68008_device::move_l_dpc_aipd_if8() // 20fa f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -58695,7 +58695,7 @@ void m68008_device::move_l_dpci_aipd_if8() // 20fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -58776,7 +58776,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -58843,7 +58843,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -58877,7 +58877,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59052,7 +59052,7 @@ void m68008_device::move_l_imm32_aipd_if8() // 20fc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -59087,7 +59087,7 @@ void m68008_device::move_l_imm32_aipd_if8() // 20fc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59134,7 +59134,7 @@ void m68008_device::move_l_ds_paid_if8() // 2100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59169,7 +59169,7 @@ void m68008_device::move_l_ds_paid_if8() // 2100 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59247,7 +59247,7 @@ void m68008_device::move_l_as_paid_if8() // 2108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59282,7 +59282,7 @@ void m68008_device::move_l_as_paid_if8() // 2108 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59358,7 +59358,7 @@ void m68008_device::move_l_ais_paid_if8() // 2110 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -59425,7 +59425,7 @@ void m68008_device::move_l_ais_paid_if8() // 2110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59460,7 +59460,7 @@ void m68008_device::move_l_ais_paid_if8() // 2110 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59536,7 +59536,7 @@ void m68008_device::move_l_aips_paid_if8() // 2118 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -59606,7 +59606,7 @@ void m68008_device::move_l_aips_paid_if8() // 2118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59641,7 +59641,7 @@ void m68008_device::move_l_aips_paid_if8() // 2118 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59716,7 +59716,7 @@ void m68008_device::move_l_pais_paid_if8() // 2120 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -59788,7 +59788,7 @@ void m68008_device::move_l_pais_paid_if8() // 2120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59823,7 +59823,7 @@ void m68008_device::move_l_pais_paid_if8() // 2120 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -59930,7 +59930,7 @@ void m68008_device::move_l_das_paid_if8() // 2128 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -59997,7 +59997,7 @@ void m68008_device::move_l_das_paid_if8() // 2128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60032,7 +60032,7 @@ void m68008_device::move_l_das_paid_if8() // 2128 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60106,7 +60106,7 @@ void m68008_device::move_l_dais_paid_if8() // 2130 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -60187,7 +60187,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -60254,7 +60254,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60289,7 +60289,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60398,7 +60398,7 @@ void m68008_device::move_l_adr16_paid_if8() // 2138 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -60465,7 +60465,7 @@ void m68008_device::move_l_adr16_paid_if8() // 2138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60500,7 +60500,7 @@ void m68008_device::move_l_adr16_paid_if8() // 2138 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60640,7 +60640,7 @@ void m68008_device::move_l_adr32_paid_if8() // 2139 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -60707,7 +60707,7 @@ void m68008_device::move_l_adr32_paid_if8() // 2139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60742,7 +60742,7 @@ void m68008_device::move_l_adr32_paid_if8() // 2139 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -60848,7 +60848,7 @@ void m68008_device::move_l_dpc_paid_if8() // 213a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -60915,7 +60915,7 @@ void m68008_device::move_l_dpc_paid_if8() // 213a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60950,7 +60950,7 @@ void m68008_device::move_l_dpc_paid_if8() // 213a f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61023,7 +61023,7 @@ void m68008_device::move_l_dpci_paid_if8() // 213b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -61104,7 +61104,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -61171,7 +61171,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61206,7 +61206,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61348,7 +61348,7 @@ void m68008_device::move_l_imm32_paid_if8() // 213c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61383,7 +61383,7 @@ void m68008_device::move_l_imm32_paid_if8() // 213c f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61492,7 +61492,7 @@ void m68008_device::move_l_ds_dad_if8() // 2140 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61526,7 +61526,7 @@ void m68008_device::move_l_ds_dad_if8() // 2140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -61561,7 +61561,7 @@ void m68008_device::move_l_ds_dad_if8() // 2140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61639,7 +61639,7 @@ void m68008_device::move_l_as_dad_if8() // 2148 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61673,7 +61673,7 @@ void m68008_device::move_l_as_dad_if8() // 2148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -61708,7 +61708,7 @@ void m68008_device::move_l_as_dad_if8() // 2148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61753,7 +61753,7 @@ void m68008_device::move_l_ais_dad_if8() // 2150 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -61819,7 +61819,7 @@ void m68008_device::move_l_ais_dad_if8() // 2150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61854,7 +61854,7 @@ void m68008_device::move_l_ais_dad_if8() // 2150 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -61968,7 +61968,7 @@ void m68008_device::move_l_aips_dad_if8() // 2158 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -62037,7 +62037,7 @@ void m68008_device::move_l_aips_dad_if8() // 2158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62072,7 +62072,7 @@ void m68008_device::move_l_aips_dad_if8() // 2158 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62185,7 +62185,7 @@ void m68008_device::move_l_pais_dad_if8() // 2160 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -62256,7 +62256,7 @@ void m68008_device::move_l_pais_dad_if8() // 2160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62291,7 +62291,7 @@ void m68008_device::move_l_pais_dad_if8() // 2160 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62436,7 +62436,7 @@ void m68008_device::move_l_das_dad_if8() // 2168 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -62502,7 +62502,7 @@ void m68008_device::move_l_das_dad_if8() // 2168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62537,7 +62537,7 @@ void m68008_device::move_l_das_dad_if8() // 2168 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62649,7 +62649,7 @@ void m68008_device::move_l_dais_dad_if8() // 2170 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -62730,7 +62730,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -62796,7 +62796,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62831,7 +62831,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -62978,7 +62978,7 @@ void m68008_device::move_l_adr16_dad_if8() // 2178 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -63044,7 +63044,7 @@ void m68008_device::move_l_adr16_dad_if8() // 2178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63079,7 +63079,7 @@ void m68008_device::move_l_adr16_dad_if8() // 2178 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63257,7 +63257,7 @@ void m68008_device::move_l_adr32_dad_if8() // 2179 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -63323,7 +63323,7 @@ void m68008_device::move_l_adr32_dad_if8() // 2179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63358,7 +63358,7 @@ void m68008_device::move_l_adr32_dad_if8() // 2179 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63502,7 +63502,7 @@ void m68008_device::move_l_dpc_dad_if8() // 217a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -63568,7 +63568,7 @@ void m68008_device::move_l_dpc_dad_if8() // 217a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63603,7 +63603,7 @@ void m68008_device::move_l_dpc_dad_if8() // 217a f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63714,7 +63714,7 @@ void m68008_device::move_l_dpci_dad_if8() // 217b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -63795,7 +63795,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -63861,7 +63861,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63896,7 +63896,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64107,7 +64107,7 @@ void m68008_device::move_l_imm32_dad_if8() // 217c f1ff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64141,7 +64141,7 @@ void m68008_device::move_l_imm32_dad_if8() // 217c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64176,7 +64176,7 @@ void m68008_device::move_l_imm32_dad_if8() // 217c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64219,7 +64219,7 @@ void m68008_device::move_l_ds_daid_if8() // 2180 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = m_irdi & 7; // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -64303,7 +64303,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64337,7 +64337,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64372,7 +64372,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64415,7 +64415,7 @@ void m68008_device::move_l_as_daid_if8() // 2188 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -64499,7 +64499,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64533,7 +64533,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64568,7 +64568,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64613,7 +64613,7 @@ void m68008_device::move_l_ais_daid_if8() // 2190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -64676,7 +64676,7 @@ void m68008_device::move_l_ais_daid_if8() // 2190 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -64691,7 +64691,7 @@ void m68008_device::move_l_ais_daid_if8() // 2190 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64725,7 +64725,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64762,7 +64762,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64876,7 +64876,7 @@ void m68008_device::move_l_aips_daid_if8() // 2198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -64942,7 +64942,7 @@ void m68008_device::move_l_aips_daid_if8() // 2198 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -64957,7 +64957,7 @@ void m68008_device::move_l_aips_daid_if8() // 2198 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -64991,7 +64991,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65028,7 +65028,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65141,7 +65141,7 @@ void m68008_device::move_l_pais_daid_if8() // 21a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -65209,7 +65209,7 @@ void m68008_device::move_l_pais_daid_if8() // 21a0 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -65224,7 +65224,7 @@ void m68008_device::move_l_pais_daid_if8() // 21a0 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65258,7 +65258,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65295,7 +65295,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65440,7 +65440,7 @@ void m68008_device::move_l_das_daid_if8() // 21a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -65503,7 +65503,7 @@ void m68008_device::move_l_das_daid_if8() // 21a8 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -65518,7 +65518,7 @@ void m68008_device::move_l_das_daid_if8() // 21a8 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65552,7 +65552,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65589,7 +65589,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65701,7 +65701,7 @@ void m68008_device::move_l_dais_daid_if8() // 21b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -65782,7 +65782,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -65845,7 +65845,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -65860,7 +65860,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65894,7 +65894,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65931,7 +65931,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66078,7 +66078,7 @@ void m68008_device::move_l_adr16_daid_if8() // 21b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -66141,7 +66141,7 @@ void m68008_device::move_l_adr16_daid_if8() // 21b8 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -66156,7 +66156,7 @@ void m68008_device::move_l_adr16_daid_if8() // 21b8 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66190,7 +66190,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66227,7 +66227,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66405,7 +66405,7 @@ void m68008_device::move_l_adr32_daid_if8() // 21b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -66468,7 +66468,7 @@ void m68008_device::move_l_adr32_daid_if8() // 21b9 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -66483,7 +66483,7 @@ void m68008_device::move_l_adr32_daid_if8() // 21b9 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66517,7 +66517,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66554,7 +66554,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66698,7 +66698,7 @@ void m68008_device::move_l_dpc_daid_if8() // 21ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -66761,7 +66761,7 @@ void m68008_device::move_l_dpc_daid_if8() // 21ba f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -66776,7 +66776,7 @@ void m68008_device::move_l_dpc_daid_if8() // 21ba f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66810,7 +66810,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -66847,7 +66847,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66958,7 +66958,7 @@ void m68008_device::move_l_dpci_daid_if8() // 21bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -67039,7 +67039,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -67102,7 +67102,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -67117,7 +67117,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67151,7 +67151,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67188,7 +67188,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67364,7 +67364,7 @@ void m68008_device::move_l_imm32_daid_if8() // 21bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -67448,7 +67448,7 @@ rmdl2: m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67482,7 +67482,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67517,7 +67517,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67563,7 +67563,7 @@ void m68008_device::move_l_ds_adr16_if8() // 21c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67598,7 +67598,7 @@ void m68008_device::move_l_ds_adr16_if8() // 21c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67713,7 +67713,7 @@ void m68008_device::move_l_as_adr16_if8() // 21c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67748,7 +67748,7 @@ void m68008_device::move_l_as_adr16_if8() // 21c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67861,7 +67861,7 @@ void m68008_device::move_l_ais_adr16_if8() // 21d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -67927,7 +67927,7 @@ void m68008_device::move_l_ais_adr16_if8() // 21d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -67962,7 +67962,7 @@ void m68008_device::move_l_ais_adr16_if8() // 21d0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68075,7 +68075,7 @@ void m68008_device::move_l_aips_adr16_if8() // 21d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -68144,7 +68144,7 @@ void m68008_device::move_l_aips_adr16_if8() // 21d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68179,7 +68179,7 @@ void m68008_device::move_l_aips_adr16_if8() // 21d8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68291,7 +68291,7 @@ void m68008_device::move_l_pais_adr16_if8() // 21e0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -68362,7 +68362,7 @@ void m68008_device::move_l_pais_adr16_if8() // 21e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68397,7 +68397,7 @@ void m68008_device::move_l_pais_adr16_if8() // 21e0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68541,7 +68541,7 @@ void m68008_device::move_l_das_adr16_if8() // 21e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -68607,7 +68607,7 @@ void m68008_device::move_l_das_adr16_if8() // 21e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68642,7 +68642,7 @@ void m68008_device::move_l_das_adr16_if8() // 21e8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68753,7 +68753,7 @@ void m68008_device::move_l_dais_adr16_if8() // 21f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -68834,7 +68834,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -68900,7 +68900,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68935,7 +68935,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69081,7 +69081,7 @@ void m68008_device::move_l_adr16_adr16_if8() // 21f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -69147,7 +69147,7 @@ void m68008_device::move_l_adr16_adr16_if8() // 21f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69182,7 +69182,7 @@ void m68008_device::move_l_adr16_adr16_if8() // 21f8 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69359,7 +69359,7 @@ void m68008_device::move_l_adr32_adr16_if8() // 21f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -69425,7 +69425,7 @@ void m68008_device::move_l_adr32_adr16_if8() // 21f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69460,7 +69460,7 @@ void m68008_device::move_l_adr32_adr16_if8() // 21f9 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69603,7 +69603,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -69669,7 +69669,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69704,7 +69704,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69814,7 +69814,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff void m68008_device::move_l_dpci_adr16_if8() // 21fb ffff { // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -69895,7 +69895,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -69961,7 +69961,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69996,7 +69996,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70175,7 +70175,7 @@ void m68008_device::move_l_imm32_adr16_if8() // 21fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70210,7 +70210,7 @@ void m68008_device::move_l_imm32_adr16_if8() // 21fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70356,7 +70356,7 @@ void m68008_device::move_l_ds_adr32_if8() // 23c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70391,7 +70391,7 @@ void m68008_device::move_l_ds_adr32_if8() // 23c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70537,7 +70537,7 @@ void m68008_device::move_l_as_adr32_if8() // 23c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70572,7 +70572,7 @@ void m68008_device::move_l_as_adr32_if8() // 23c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70685,7 +70685,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -70752,7 +70752,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -70785,7 +70785,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -70819,7 +70819,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70931,7 +70931,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -71001,7 +71001,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -71034,7 +71034,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71068,7 +71068,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71179,7 +71179,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -71251,7 +71251,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -71284,7 +71284,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71318,7 +71318,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71461,7 +71461,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -71528,7 +71528,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -71561,7 +71561,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71595,7 +71595,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71705,7 +71705,7 @@ void m68008_device::move_l_dais_adr32_if8() // 23f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -71786,7 +71786,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -71853,7 +71853,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -71886,7 +71886,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71920,7 +71920,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72065,7 +72065,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -72132,7 +72132,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -72165,7 +72165,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -72199,7 +72199,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72375,7 +72375,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -72442,7 +72442,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -72475,7 +72475,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -72509,7 +72509,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72651,7 +72651,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -72718,7 +72718,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -72751,7 +72751,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -72785,7 +72785,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72894,7 +72894,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff void m68008_device::move_l_dpci_adr32_if8() // 23fb ffff { // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -72975,7 +72975,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -73042,7 +73042,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -73075,7 +73075,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -73109,7 +73109,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73318,7 +73318,7 @@ void m68008_device::move_l_imm32_adr32_if8() // 23fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73353,7 +73353,7 @@ void m68008_device::move_l_imm32_adr32_if8() // 23fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73470,7 +73470,7 @@ void m68008_device::move_w_ds_dd_if8() // 3000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -73523,7 +73523,7 @@ void m68008_device::move_w_as_dd_if8() // 3008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -73573,7 +73573,7 @@ void m68008_device::move_w_ais_dd_if8() // 3010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -73610,7 +73610,7 @@ void m68008_device::move_w_ais_dd_if8() // 3010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73664,7 +73664,7 @@ void m68008_device::move_w_aips_dd_if8() // 3018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -73699,7 +73699,7 @@ void m68008_device::move_w_aips_dd_if8() // 3018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73755,7 +73755,7 @@ void m68008_device::move_w_pais_dd_if8() // 3020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -73790,7 +73790,7 @@ void m68008_device::move_w_pais_dd_if8() // 3020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73870,7 +73870,7 @@ void m68008_device::move_w_das_dd_if8() // 3028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -73907,7 +73907,7 @@ void m68008_device::move_w_das_dd_if8() // 3028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -73953,7 +73953,7 @@ void m68008_device::move_w_dais_dd_if8() // 3030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -74035,7 +74035,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -74072,7 +74072,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74153,7 +74153,7 @@ void m68008_device::move_w_adr16_dd_if8() // 3038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -74188,7 +74188,7 @@ void m68008_device::move_w_adr16_dd_if8() // 3038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74300,7 +74300,7 @@ void m68008_device::move_w_adr32_dd_if8() // 3039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -74335,7 +74335,7 @@ void m68008_device::move_w_adr32_dd_if8() // 3039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74414,7 +74414,7 @@ void m68008_device::move_w_dpc_dd_if8() // 303a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -74451,7 +74451,7 @@ void m68008_device::move_w_dpc_dd_if8() // 303a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74496,7 +74496,7 @@ void m68008_device::move_w_dpci_dd_if8() // 303b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -74578,7 +74578,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -74615,7 +74615,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -74699,7 +74699,7 @@ void m68008_device::move_w_imm16_dd_if8() // 303c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -74756,7 +74756,7 @@ void m68008_device::movea_w_ds_ad_if8() // 3040 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -74806,7 +74806,7 @@ void m68008_device::movea_w_as_ad_if8() // 3048 f1f8 // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74851,7 +74851,7 @@ void m68008_device::movea_w_ais_ad_if8() // 3050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -74939,7 +74939,7 @@ void m68008_device::movea_w_aips_ad_if8() // 3058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -75027,7 +75027,7 @@ void m68008_device::movea_w_pais_ad_if8() // 3060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -75139,7 +75139,7 @@ void m68008_device::movea_w_das_ad_if8() // 3068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75219,7 +75219,7 @@ void m68008_device::movea_w_dais_ad_if8() // 3070 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -75301,7 +75301,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75416,7 +75416,7 @@ void m68008_device::movea_w_adr16_ad_if8() // 3078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -75560,7 +75560,7 @@ void m68008_device::movea_w_adr32_ad_if8() // 3079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -75671,7 +75671,7 @@ void m68008_device::movea_w_dpc_ad_if8() // 307a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75750,7 +75750,7 @@ void m68008_device::movea_w_dpci_ad_if8() // 307b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -75832,7 +75832,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -75954,7 +75954,7 @@ void m68008_device::movea_w_imm16_ad_if8() // 307c f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -76001,7 +76001,7 @@ void m68008_device::move_w_ds_aid_if8() // 3080 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76082,7 +76082,7 @@ void m68008_device::move_w_as_aid_if8() // 3088 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76160,7 +76160,7 @@ void m68008_device::move_w_ais_aid_if8() // 3090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -76196,7 +76196,7 @@ void m68008_device::move_w_ais_aid_if8() // 3090 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76280,7 +76280,7 @@ void m68008_device::move_w_aips_aid_if8() // 3098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -76314,7 +76314,7 @@ void m68008_device::move_w_aips_aid_if8() // 3098 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76400,7 +76400,7 @@ void m68008_device::move_w_pais_aid_if8() // 30a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -76434,7 +76434,7 @@ void m68008_device::move_w_pais_aid_if8() // 30a0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76544,7 +76544,7 @@ void m68008_device::move_w_das_aid_if8() // 30a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -76580,7 +76580,7 @@ void m68008_device::move_w_das_aid_if8() // 30a8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76656,7 +76656,7 @@ void m68008_device::move_w_dais_aid_if8() // 30b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -76738,7 +76738,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -76774,7 +76774,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -76885,7 +76885,7 @@ void m68008_device::move_w_adr16_aid_if8() // 30b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -76919,7 +76919,7 @@ void m68008_device::move_w_adr16_aid_if8() // 30b8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77061,7 +77061,7 @@ void m68008_device::move_w_adr32_aid_if8() // 30b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -77095,7 +77095,7 @@ void m68008_device::move_w_adr32_aid_if8() // 30b9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77204,7 +77204,7 @@ void m68008_device::move_w_dpc_aid_if8() // 30ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -77240,7 +77240,7 @@ void m68008_device::move_w_dpc_aid_if8() // 30ba f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77315,7 +77315,7 @@ void m68008_device::move_w_dpci_aid_if8() // 30bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -77397,7 +77397,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -77433,7 +77433,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77547,7 +77547,7 @@ void m68008_device::move_w_imm16_aid_if8() // 30bc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77628,7 +77628,7 @@ void m68008_device::move_w_ds_aipd_if8() // 30c0 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77708,7 +77708,7 @@ void m68008_device::move_w_as_aipd_if8() // 30c8 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77785,7 +77785,7 @@ void m68008_device::move_w_ais_aipd_if8() // 30d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -77822,7 +77822,7 @@ void m68008_device::move_w_ais_aipd_if8() // 30d0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77905,7 +77905,7 @@ void m68008_device::move_w_aips_aipd_if8() // 30d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -77940,7 +77940,7 @@ void m68008_device::move_w_aips_aipd_if8() // 30d8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78025,7 +78025,7 @@ void m68008_device::move_w_pais_aipd_if8() // 30e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -78060,7 +78060,7 @@ void m68008_device::move_w_pais_aipd_if8() // 30e0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78169,7 +78169,7 @@ void m68008_device::move_w_das_aipd_if8() // 30e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -78206,7 +78206,7 @@ void m68008_device::move_w_das_aipd_if8() // 30e8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78281,7 +78281,7 @@ void m68008_device::move_w_dais_aipd_if8() // 30f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -78363,7 +78363,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -78400,7 +78400,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78510,7 +78510,7 @@ void m68008_device::move_w_adr16_aipd_if8() // 30f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -78545,7 +78545,7 @@ void m68008_device::move_w_adr16_aipd_if8() // 30f8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78686,7 +78686,7 @@ void m68008_device::move_w_adr32_aipd_if8() // 30f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -78721,7 +78721,7 @@ void m68008_device::move_w_adr32_aipd_if8() // 30f9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78829,7 +78829,7 @@ void m68008_device::move_w_dpc_aipd_if8() // 30fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -78866,7 +78866,7 @@ void m68008_device::move_w_dpc_aipd_if8() // 30fa f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -78940,7 +78940,7 @@ void m68008_device::move_w_dpci_aipd_if8() // 30fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -79022,7 +79022,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -79059,7 +79059,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -79172,7 +79172,7 @@ void m68008_device::move_w_imm16_aipd_if8() // 30fc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -79251,7 +79251,7 @@ void m68008_device::move_w_ds_paid_if8() // 3100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79331,7 +79331,7 @@ void m68008_device::move_w_as_paid_if8() // 3108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79409,7 +79409,7 @@ void m68008_device::move_w_ais_paid_if8() // 3110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -79445,7 +79445,7 @@ void m68008_device::move_w_ais_paid_if8() // 3110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79529,7 +79529,7 @@ void m68008_device::move_w_aips_paid_if8() // 3118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -79563,7 +79563,7 @@ void m68008_device::move_w_aips_paid_if8() // 3118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79649,7 +79649,7 @@ void m68008_device::move_w_pais_paid_if8() // 3120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -79683,7 +79683,7 @@ void m68008_device::move_w_pais_paid_if8() // 3120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79793,7 +79793,7 @@ void m68008_device::move_w_das_paid_if8() // 3128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -79829,7 +79829,7 @@ void m68008_device::move_w_das_paid_if8() // 3128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79905,7 +79905,7 @@ void m68008_device::move_w_dais_paid_if8() // 3130 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -79987,7 +79987,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -80023,7 +80023,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80134,7 +80134,7 @@ void m68008_device::move_w_adr16_paid_if8() // 3138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -80168,7 +80168,7 @@ void m68008_device::move_w_adr16_paid_if8() // 3138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80310,7 +80310,7 @@ void m68008_device::move_w_adr32_paid_if8() // 3139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -80344,7 +80344,7 @@ void m68008_device::move_w_adr32_paid_if8() // 3139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80453,7 +80453,7 @@ void m68008_device::move_w_dpc_paid_if8() // 313a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -80489,7 +80489,7 @@ void m68008_device::move_w_dpc_paid_if8() // 313a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80564,7 +80564,7 @@ void m68008_device::move_w_dpci_paid_if8() // 313b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -80646,7 +80646,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -80682,7 +80682,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80795,7 +80795,7 @@ void m68008_device::move_w_imm16_paid_if8() // 313c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80906,7 +80906,7 @@ void m68008_device::move_w_ds_dad_if8() // 3140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81018,7 +81018,7 @@ void m68008_device::move_w_as_dad_if8() // 3148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81097,7 +81097,7 @@ void m68008_device::move_w_ais_dad_if8() // 3150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -81132,7 +81132,7 @@ void m68008_device::move_w_ais_dad_if8() // 3150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81253,7 +81253,7 @@ void m68008_device::move_w_aips_dad_if8() // 3158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -81286,7 +81286,7 @@ void m68008_device::move_w_aips_dad_if8() // 3158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81409,7 +81409,7 @@ void m68008_device::move_w_pais_dad_if8() // 3160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -81442,7 +81442,7 @@ void m68008_device::move_w_pais_dad_if8() // 3160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81589,7 +81589,7 @@ void m68008_device::move_w_das_dad_if8() // 3168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -81624,7 +81624,7 @@ void m68008_device::move_w_das_dad_if8() // 3168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81737,7 +81737,7 @@ void m68008_device::move_w_dais_dad_if8() // 3170 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -81819,7 +81819,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -81854,7 +81854,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82002,7 +82002,7 @@ void m68008_device::move_w_adr16_dad_if8() // 3178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -82035,7 +82035,7 @@ void m68008_device::move_w_adr16_dad_if8() // 3178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82214,7 +82214,7 @@ void m68008_device::move_w_adr32_dad_if8() // 3179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -82247,7 +82247,7 @@ void m68008_device::move_w_adr32_dad_if8() // 3179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82393,7 +82393,7 @@ void m68008_device::move_w_dpc_dad_if8() // 317a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -82428,7 +82428,7 @@ void m68008_device::move_w_dpc_dad_if8() // 317a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82540,7 +82540,7 @@ void m68008_device::move_w_dpci_dad_if8() // 317b f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -82622,7 +82622,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -82657,7 +82657,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -82838,7 +82838,7 @@ void m68008_device::move_w_imm16_dad_if8() // 317c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82915,7 +82915,7 @@ void m68008_device::move_w_ds_daid_if8() // 3180 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = m_irdi & 7; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -82999,7 +82999,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83076,7 +83076,7 @@ void m68008_device::move_w_as_daid_if8() // 3188 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -83160,7 +83160,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83239,7 +83239,7 @@ void m68008_device::move_w_ais_daid_if8() // 3190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -83271,7 +83271,7 @@ void m68008_device::move_w_ais_daid_if8() // 3190 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83286,7 +83286,7 @@ void m68008_device::move_w_ais_daid_if8() // 3190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83320,7 +83320,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83443,7 +83443,7 @@ void m68008_device::move_w_aips_daid_if8() // 3198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -83473,7 +83473,7 @@ void m68008_device::move_w_aips_daid_if8() // 3198 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83488,7 +83488,7 @@ void m68008_device::move_w_aips_daid_if8() // 3198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83522,7 +83522,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83647,7 +83647,7 @@ void m68008_device::move_w_pais_daid_if8() // 31a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -83677,7 +83677,7 @@ void m68008_device::move_w_pais_daid_if8() // 31a0 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83692,7 +83692,7 @@ void m68008_device::move_w_pais_daid_if8() // 31a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83726,7 +83726,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83875,7 +83875,7 @@ void m68008_device::move_w_das_daid_if8() // 31a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -83907,7 +83907,7 @@ void m68008_device::move_w_das_daid_if8() // 31a8 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -83922,7 +83922,7 @@ void m68008_device::move_w_das_daid_if8() // 31a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -83956,7 +83956,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84071,7 +84071,7 @@ void m68008_device::move_w_dais_daid_if8() // 31b0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -84153,7 +84153,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -84185,7 +84185,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84200,7 +84200,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84234,7 +84234,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84384,7 +84384,7 @@ void m68008_device::move_w_adr16_daid_if8() // 31b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -84414,7 +84414,7 @@ void m68008_device::move_w_adr16_daid_if8() // 31b8 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84429,7 +84429,7 @@ void m68008_device::move_w_adr16_daid_if8() // 31b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84463,7 +84463,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84644,7 +84644,7 @@ void m68008_device::move_w_adr32_daid_if8() // 31b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -84674,7 +84674,7 @@ void m68008_device::move_w_adr32_daid_if8() // 31b9 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84689,7 +84689,7 @@ void m68008_device::move_w_adr32_daid_if8() // 31b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84723,7 +84723,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84871,7 +84871,7 @@ void m68008_device::move_w_dpc_daid_if8() // 31ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -84903,7 +84903,7 @@ void m68008_device::move_w_dpc_daid_if8() // 31ba f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -84918,7 +84918,7 @@ void m68008_device::move_w_dpc_daid_if8() // 31ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84952,7 +84952,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85066,7 +85066,7 @@ void m68008_device::move_w_dpci_daid_if8() // 31bb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -85148,7 +85148,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -85180,7 +85180,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -85195,7 +85195,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85229,7 +85229,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85377,7 +85377,7 @@ void m68008_device::move_w_imm16_daid_if8() // 31bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -85461,7 +85461,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -85541,7 +85541,7 @@ void m68008_device::move_w_ds_adr16_if8() // 31c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85657,7 +85657,7 @@ void m68008_device::move_w_as_adr16_if8() // 31c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85771,7 +85771,7 @@ void m68008_device::move_w_ais_adr16_if8() // 31d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -85806,7 +85806,7 @@ void m68008_device::move_w_ais_adr16_if8() // 31d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -85926,7 +85926,7 @@ void m68008_device::move_w_aips_adr16_if8() // 31d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -85959,7 +85959,7 @@ void m68008_device::move_w_aips_adr16_if8() // 31d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86081,7 +86081,7 @@ void m68008_device::move_w_pais_adr16_if8() // 31e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -86114,7 +86114,7 @@ void m68008_device::move_w_pais_adr16_if8() // 31e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86260,7 +86260,7 @@ void m68008_device::move_w_das_adr16_if8() // 31e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86295,7 +86295,7 @@ void m68008_device::move_w_das_adr16_if8() // 31e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86407,7 +86407,7 @@ void m68008_device::move_w_dais_adr16_if8() // 31f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -86489,7 +86489,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86524,7 +86524,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86671,7 +86671,7 @@ void m68008_device::move_w_adr16_adr16_if8() // 31f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -86704,7 +86704,7 @@ void m68008_device::move_w_adr16_adr16_if8() // 31f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86882,7 +86882,7 @@ void m68008_device::move_w_adr32_adr16_if8() // 31f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -86915,7 +86915,7 @@ void m68008_device::move_w_adr32_adr16_if8() // 31f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87060,7 +87060,7 @@ void m68008_device::move_w_dpc_adr16_if8() // 31fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87095,7 +87095,7 @@ void m68008_device::move_w_dpc_adr16_if8() // 31fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87206,7 +87206,7 @@ void m68008_device::move_w_dpc_adr16_if8() // 31fa ffff void m68008_device::move_w_dpci_adr16_if8() // 31fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -87288,7 +87288,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87323,7 +87323,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87472,7 +87472,7 @@ void m68008_device::move_w_imm16_adr16_if8() // 31fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87619,7 +87619,7 @@ void m68008_device::move_w_ds_adr32_if8() // 33c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87766,7 +87766,7 @@ void m68008_device::move_w_as_adr32_if8() // 33c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -87880,7 +87880,7 @@ void m68008_device::move_w_ais_adr32_if8() // 33d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87915,7 +87915,7 @@ void m68008_device::move_w_ais_adr32_if8() // 33d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88065,7 +88065,7 @@ void m68008_device::move_w_aips_adr32_if8() // 33d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -88098,7 +88098,7 @@ void m68008_device::move_w_aips_adr32_if8() // 33d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88250,7 +88250,7 @@ void m68008_device::move_w_pais_adr32_if8() // 33e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -88283,7 +88283,7 @@ void m68008_device::move_w_pais_adr32_if8() // 33e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88459,7 +88459,7 @@ void m68008_device::move_w_das_adr32_if8() // 33e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88494,7 +88494,7 @@ void m68008_device::move_w_das_adr32_if8() // 33e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88636,7 +88636,7 @@ void m68008_device::move_w_dais_adr32_if8() // 33f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -88718,7 +88718,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88753,7 +88753,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -88930,7 +88930,7 @@ void m68008_device::move_w_adr16_adr32_if8() // 33f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -88963,7 +88963,7 @@ void m68008_device::move_w_adr16_adr32_if8() // 33f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89171,7 +89171,7 @@ void m68008_device::move_w_adr32_adr32_if8() // 33f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -89204,7 +89204,7 @@ void m68008_device::move_w_adr32_adr32_if8() // 33f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89379,7 +89379,7 @@ void m68008_device::move_w_dpc_adr32_if8() // 33fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89414,7 +89414,7 @@ void m68008_device::move_w_dpc_adr32_if8() // 33fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89555,7 +89555,7 @@ void m68008_device::move_w_dpc_adr32_if8() // 33fa ffff void m68008_device::move_w_dpci_adr32_if8() // 33fb ffff { // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -89637,7 +89637,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89672,7 +89672,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89882,7 +89882,7 @@ void m68008_device::move_w_imm16_adr32_if8() // 33fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -89998,7 +89998,7 @@ void m68008_device::negx_b_ds_if8() // 4000 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0 alu_subx8(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -90047,7 +90047,7 @@ void m68008_device::negx_b_ais_if8() // 4010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90068,7 +90068,7 @@ void m68008_device::negx_b_ais_if8() // 4010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90135,7 +90135,7 @@ void m68008_device::negx_b_aips_if8() // 4018 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -90154,7 +90154,7 @@ void m68008_device::negx_b_aips_if8() // 4018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90223,7 +90223,7 @@ void m68008_device::negx_b_pais_if8() // 4020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -90242,7 +90242,7 @@ void m68008_device::negx_b_pais_if8() // 4020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90335,7 +90335,7 @@ void m68008_device::negx_b_das_if8() // 4028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90356,7 +90356,7 @@ void m68008_device::negx_b_das_if8() // 4028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90415,7 +90415,7 @@ void m68008_device::negx_b_dais_if8() // 4030 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -90497,7 +90497,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90518,7 +90518,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90612,7 +90612,7 @@ void m68008_device::negx_b_adr16_if8() // 4038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -90631,7 +90631,7 @@ void m68008_device::negx_b_adr16_if8() // 4038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90756,7 +90756,7 @@ void m68008_device::negx_b_adr32_if8() // 4039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -90775,7 +90775,7 @@ void m68008_device::negx_b_adr32_if8() // 4039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -90838,7 +90838,7 @@ void m68008_device::negx_w_ds_if8() // 4040 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -90887,7 +90887,7 @@ void m68008_device::negx_w_ais_if8() // 4050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -90923,7 +90923,7 @@ void m68008_device::negx_w_ais_if8() // 4050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91005,7 +91005,7 @@ void m68008_device::negx_w_aips_if8() // 4058 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -91039,7 +91039,7 @@ void m68008_device::negx_w_aips_if8() // 4058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91123,7 +91123,7 @@ void m68008_device::negx_w_pais_if8() // 4060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -91157,7 +91157,7 @@ void m68008_device::negx_w_pais_if8() // 4060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91265,7 +91265,7 @@ void m68008_device::negx_w_das_if8() // 4068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -91301,7 +91301,7 @@ void m68008_device::negx_w_das_if8() // 4068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91375,7 +91375,7 @@ void m68008_device::negx_w_dais_if8() // 4070 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -91457,7 +91457,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -91493,7 +91493,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91602,7 +91602,7 @@ void m68008_device::negx_w_adr16_if8() // 4078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -91636,7 +91636,7 @@ void m68008_device::negx_w_adr16_if8() // 4078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91776,7 +91776,7 @@ void m68008_device::negx_w_adr32_if8() // 4079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -91810,7 +91810,7 @@ void m68008_device::negx_w_adr32_if8() // 4079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91888,12 +91888,12 @@ void m68008_device::negx_l_ds_if8() // 4080 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91943,7 +91943,7 @@ void m68008_device::negx_l_ais_if8() // 4090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -92010,7 +92010,7 @@ void m68008_device::negx_l_ais_if8() // 4090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92045,7 +92045,7 @@ void m68008_device::negx_l_ais_if8() // 4090 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92119,7 +92119,7 @@ void m68008_device::negx_l_aips_if8() // 4098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -92189,7 +92189,7 @@ void m68008_device::negx_l_aips_if8() // 4098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92224,7 +92224,7 @@ void m68008_device::negx_l_aips_if8() // 4098 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92297,7 +92297,7 @@ void m68008_device::negx_l_pais_if8() // 40a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -92369,7 +92369,7 @@ void m68008_device::negx_l_pais_if8() // 40a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92404,7 +92404,7 @@ void m68008_device::negx_l_pais_if8() // 40a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92509,7 +92509,7 @@ void m68008_device::negx_l_das_if8() // 40a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -92576,7 +92576,7 @@ void m68008_device::negx_l_das_if8() // 40a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92611,7 +92611,7 @@ void m68008_device::negx_l_das_if8() // 40a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92683,7 +92683,7 @@ void m68008_device::negx_l_dais_if8() // 40b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -92764,7 +92764,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -92831,7 +92831,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92866,7 +92866,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -92973,7 +92973,7 @@ void m68008_device::negx_l_adr16_if8() // 40b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -93040,7 +93040,7 @@ void m68008_device::negx_l_adr16_if8() // 40b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93075,7 +93075,7 @@ void m68008_device::negx_l_adr16_if8() // 40b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -93213,7 +93213,7 @@ void m68008_device::negx_l_adr32_if8() // 40b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -93280,7 +93280,7 @@ void m68008_device::negx_l_adr32_if8() // 40b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93315,7 +93315,7 @@ void m68008_device::negx_l_adr32_if8() // 40b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -93439,7 +93439,7 @@ void m68008_device::move_sr_ais_if8() // 40d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -93477,7 +93477,7 @@ void m68008_device::move_sr_ais_if8() // 40d0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -93558,7 +93558,7 @@ void m68008_device::move_sr_aips_if8() // 40d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -93594,7 +93594,7 @@ void m68008_device::move_sr_aips_if8() // 40d8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -93677,7 +93677,7 @@ void m68008_device::move_sr_pais_if8() // 40e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -93713,7 +93713,7 @@ void m68008_device::move_sr_pais_if8() // 40e0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -93820,7 +93820,7 @@ void m68008_device::move_sr_das_if8() // 40e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -93858,7 +93858,7 @@ void m68008_device::move_sr_das_if8() // 40e8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -93931,7 +93931,7 @@ void m68008_device::move_sr_dais_if8() // 40f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -94013,7 +94013,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -94051,7 +94051,7 @@ adsw2: m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -94159,7 +94159,7 @@ void m68008_device::move_sr_adr16_if8() // 40f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -94195,7 +94195,7 @@ void m68008_device::move_sr_adr16_if8() // 40f8 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -94334,7 +94334,7 @@ void m68008_device::move_sr_adr32_if8() // 40f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -94370,7 +94370,7 @@ void m68008_device::move_sr_adr32_if8() // 40f9 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -94446,7 +94446,7 @@ void m68008_device::chk_w_ds_dd_if8() // 4180 f1f8 // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry] alu_sub(m_da[rx], m_da[ry]); sr_nzvc(); m_icount -= 2; @@ -94454,7 +94454,7 @@ void m68008_device::chk_w_ds_dd_if8() // 4180 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -94472,14 +94472,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -94514,7 +94514,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -94547,7 +94547,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -94736,7 +94736,7 @@ void m68008_device::chk_w_ais_dd_if8() // 4190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -94770,7 +94770,7 @@ void m68008_device::chk_w_ais_dd_if8() // 4190 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -94778,7 +94778,7 @@ void m68008_device::chk_w_ais_dd_if8() // 4190 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -94796,14 +94796,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -94838,7 +94838,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -94871,7 +94871,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95066,7 +95066,7 @@ void m68008_device::chk_w_aips_dd_if8() // 4198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -95098,7 +95098,7 @@ void m68008_device::chk_w_aips_dd_if8() // 4198 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -95106,7 +95106,7 @@ void m68008_device::chk_w_aips_dd_if8() // 4198 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -95124,14 +95124,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95166,7 +95166,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95199,7 +95199,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95396,7 +95396,7 @@ void m68008_device::chk_w_pais_dd_if8() // 41a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -95428,7 +95428,7 @@ void m68008_device::chk_w_pais_dd_if8() // 41a0 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -95436,7 +95436,7 @@ void m68008_device::chk_w_pais_dd_if8() // 41a0 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -95454,14 +95454,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95496,7 +95496,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95529,7 +95529,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95750,7 +95750,7 @@ void m68008_device::chk_w_das_dd_if8() // 41a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -95784,7 +95784,7 @@ void m68008_device::chk_w_das_dd_if8() // 41a8 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -95792,7 +95792,7 @@ void m68008_device::chk_w_das_dd_if8() // 41a8 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -95810,14 +95810,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95852,7 +95852,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -95885,7 +95885,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96072,7 +96072,7 @@ void m68008_device::chk_w_dais_dd_if8() // 41b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -96154,7 +96154,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -96188,7 +96188,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -96196,7 +96196,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -96214,14 +96214,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96256,7 +96256,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96289,7 +96289,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96511,7 +96511,7 @@ void m68008_device::chk_w_adr16_dd_if8() // 41b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -96543,7 +96543,7 @@ void m68008_device::chk_w_adr16_dd_if8() // 41b8 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -96551,7 +96551,7 @@ void m68008_device::chk_w_adr16_dd_if8() // 41b8 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -96569,14 +96569,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96611,7 +96611,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96644,7 +96644,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96897,7 +96897,7 @@ void m68008_device::chk_w_adr32_dd_if8() // 41b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -96929,7 +96929,7 @@ void m68008_device::chk_w_adr32_dd_if8() // 41b9 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -96937,7 +96937,7 @@ void m68008_device::chk_w_adr32_dd_if8() // 41b9 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -96955,14 +96955,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -96997,7 +96997,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97030,7 +97030,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97250,7 +97250,7 @@ void m68008_device::chk_w_dpc_dd_if8() // 41ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -97284,7 +97284,7 @@ void m68008_device::chk_w_dpc_dd_if8() // 41ba f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -97292,7 +97292,7 @@ void m68008_device::chk_w_dpc_dd_if8() // 41ba f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -97310,14 +97310,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97352,7 +97352,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97385,7 +97385,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97571,7 +97571,7 @@ void m68008_device::chk_w_dpci_dd_if8() // 41bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -97653,7 +97653,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -97687,7 +97687,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -97695,7 +97695,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -97713,14 +97713,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97755,7 +97755,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -97788,7 +97788,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -98010,7 +98010,7 @@ void m68008_device::chk_w_imm16_dd_if8() // 41bc f1ff // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt alu_sub(m_da[rx], m_dt); sr_nzvc(); m_icount -= 2; @@ -98018,7 +98018,7 @@ void m68008_device::chk_w_imm16_dd_if8() // 41bc f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -98036,14 +98036,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -98078,7 +98078,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -98111,7 +98111,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -98429,7 +98429,7 @@ void m68008_device::lea_dais_ad_if8() // 41f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -98824,7 +98824,7 @@ void m68008_device::lea_dpci_ad_if8() // 41fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -98957,7 +98957,7 @@ void m68008_device::clr_b_ds_if8() // 4200 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0 alu_and8(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -98965,7 +98965,7 @@ void m68008_device::clr_b_ds_if8() // 4200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -99007,11 +99007,11 @@ void m68008_device::clr_b_ais_if8() // 4210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -99029,7 +99029,7 @@ void m68008_device::clr_b_ais_if8() // 4210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99066,7 +99066,7 @@ void m68008_device::clr_b_ais_if8() // 4210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99094,12 +99094,12 @@ void m68008_device::clr_b_aips_if8() // 4218 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -99118,7 +99118,7 @@ void m68008_device::clr_b_aips_if8() // 4218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99155,7 +99155,7 @@ void m68008_device::clr_b_aips_if8() // 4218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99182,7 +99182,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -99190,7 +99190,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -99209,7 +99209,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99246,7 +99246,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99271,7 +99271,7 @@ void m68008_device::clr_b_das_if8() // 4228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -99304,11 +99304,11 @@ void m68008_device::clr_b_das_if8() // 4228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -99326,7 +99326,7 @@ void m68008_device::clr_b_das_if8() // 4228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99363,7 +99363,7 @@ void m68008_device::clr_b_das_if8() // 4228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99386,14 +99386,14 @@ void m68008_device::clr_b_dais_if8() // 4230 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -99401,7 +99401,7 @@ void m68008_device::clr_b_dais_if8() // 4230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -99435,7 +99435,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -99471,11 +99471,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -99493,7 +99493,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99530,7 +99530,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99557,7 +99557,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -99590,7 +99590,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -99609,7 +99609,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99646,7 +99646,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99671,7 +99671,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -99705,7 +99705,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -99738,7 +99738,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -99757,7 +99757,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99794,7 +99794,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -99821,7 +99821,7 @@ void m68008_device::clr_w_ds_if8() // 4240 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -99829,7 +99829,7 @@ void m68008_device::clr_w_ds_if8() // 4240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -99871,11 +99871,11 @@ void m68008_device::clr_w_ais_if8() // 4250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -99908,7 +99908,7 @@ void m68008_device::clr_w_ais_if8() // 4250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99945,7 +99945,7 @@ void m68008_device::clr_w_ais_if8() // 4250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -99988,12 +99988,12 @@ void m68008_device::clr_w_aips_if8() // 4258 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -100027,7 +100027,7 @@ void m68008_device::clr_w_aips_if8() // 4258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100064,7 +100064,7 @@ void m68008_device::clr_w_aips_if8() // 4258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100106,7 +100106,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -100114,7 +100114,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -100148,7 +100148,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100185,7 +100185,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100225,7 +100225,7 @@ void m68008_device::clr_w_das_if8() // 4268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -100258,11 +100258,11 @@ void m68008_device::clr_w_das_if8() // 4268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -100295,7 +100295,7 @@ void m68008_device::clr_w_das_if8() // 4268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100332,7 +100332,7 @@ void m68008_device::clr_w_das_if8() // 4268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100370,14 +100370,14 @@ void m68008_device::clr_w_dais_if8() // 4270 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -100385,7 +100385,7 @@ void m68008_device::clr_w_dais_if8() // 4270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -100419,7 +100419,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -100455,11 +100455,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -100492,7 +100492,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100529,7 +100529,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100571,7 +100571,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -100604,7 +100604,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -100638,7 +100638,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100675,7 +100675,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100715,7 +100715,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -100749,7 +100749,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -100782,7 +100782,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -100816,7 +100816,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100853,7 +100853,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -100895,12 +100895,12 @@ void m68008_device::clr_l_ds_if8() // 4280 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0 alu_and(high16(m_da[ry]), 0x0000); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100936,7 +100936,7 @@ void m68008_device::clr_l_ds_if8() // 4280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -100951,7 +100951,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -100986,7 +100986,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -101019,7 +101019,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101054,7 +101054,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101089,7 +101089,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101129,7 +101129,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -101164,11 +101164,11 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -101201,7 +101201,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101236,7 +101236,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101271,7 +101271,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101310,14 +101310,14 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -101351,7 +101351,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -101384,7 +101384,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101419,7 +101419,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101454,7 +101454,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101494,7 +101494,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -101526,7 +101526,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -101561,7 +101561,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -101594,7 +101594,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101629,7 +101629,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101664,7 +101664,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101702,14 +101702,14 @@ void m68008_device::clr_l_dais_if8() // 42b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -101717,7 +101717,7 @@ void m68008_device::clr_l_dais_if8() // 42b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -101751,7 +101751,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -101786,7 +101786,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -101821,7 +101821,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -101854,7 +101854,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101889,7 +101889,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -101924,7 +101924,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -101966,7 +101966,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -101999,7 +101999,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -102034,7 +102034,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -102067,7 +102067,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102102,7 +102102,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -102137,7 +102137,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -102177,7 +102177,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -102211,7 +102211,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -102244,7 +102244,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -102279,7 +102279,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -102312,7 +102312,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102347,7 +102347,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -102382,7 +102382,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -102424,7 +102424,7 @@ void m68008_device::neg_b_ds_if8() // 4400 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0 alu_sub8(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -102473,7 +102473,7 @@ void m68008_device::neg_b_ais_if8() // 4410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -102494,7 +102494,7 @@ void m68008_device::neg_b_ais_if8() // 4410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102561,7 +102561,7 @@ void m68008_device::neg_b_aips_if8() // 4418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -102580,7 +102580,7 @@ void m68008_device::neg_b_aips_if8() // 4418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102649,7 +102649,7 @@ void m68008_device::neg_b_pais_if8() // 4420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -102668,7 +102668,7 @@ void m68008_device::neg_b_pais_if8() // 4420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102761,7 +102761,7 @@ void m68008_device::neg_b_das_if8() // 4428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -102782,7 +102782,7 @@ void m68008_device::neg_b_das_if8() // 4428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102841,7 +102841,7 @@ void m68008_device::neg_b_dais_if8() // 4430 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -102923,7 +102923,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -102944,7 +102944,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103038,7 +103038,7 @@ void m68008_device::neg_b_adr16_if8() // 4438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -103057,7 +103057,7 @@ void m68008_device::neg_b_adr16_if8() // 4438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103182,7 +103182,7 @@ void m68008_device::neg_b_adr32_if8() // 4439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -103201,7 +103201,7 @@ void m68008_device::neg_b_adr32_if8() // 4439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103264,7 +103264,7 @@ void m68008_device::neg_w_ds_if8() // 4440 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -103313,7 +103313,7 @@ void m68008_device::neg_w_ais_if8() // 4450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103349,7 +103349,7 @@ void m68008_device::neg_w_ais_if8() // 4450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103431,7 +103431,7 @@ void m68008_device::neg_w_aips_if8() // 4458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -103465,7 +103465,7 @@ void m68008_device::neg_w_aips_if8() // 4458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103549,7 +103549,7 @@ void m68008_device::neg_w_pais_if8() // 4460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -103583,7 +103583,7 @@ void m68008_device::neg_w_pais_if8() // 4460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103691,7 +103691,7 @@ void m68008_device::neg_w_das_if8() // 4468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103727,7 +103727,7 @@ void m68008_device::neg_w_das_if8() // 4468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103801,7 +103801,7 @@ void m68008_device::neg_w_dais_if8() // 4470 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -103883,7 +103883,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103919,7 +103919,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104028,7 +104028,7 @@ void m68008_device::neg_w_adr16_if8() // 4478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -104062,7 +104062,7 @@ void m68008_device::neg_w_adr16_if8() // 4478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104202,7 +104202,7 @@ void m68008_device::neg_w_adr32_if8() // 4479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -104236,7 +104236,7 @@ void m68008_device::neg_w_adr32_if8() // 4479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104314,12 +104314,12 @@ void m68008_device::neg_l_ds_if8() // 4480 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104369,7 +104369,7 @@ void m68008_device::neg_l_ais_if8() // 4490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -104436,7 +104436,7 @@ void m68008_device::neg_l_ais_if8() // 4490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104471,7 +104471,7 @@ void m68008_device::neg_l_ais_if8() // 4490 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -104545,7 +104545,7 @@ void m68008_device::neg_l_aips_if8() // 4498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -104615,7 +104615,7 @@ void m68008_device::neg_l_aips_if8() // 4498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104650,7 +104650,7 @@ void m68008_device::neg_l_aips_if8() // 4498 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -104723,7 +104723,7 @@ void m68008_device::neg_l_pais_if8() // 44a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -104795,7 +104795,7 @@ void m68008_device::neg_l_pais_if8() // 44a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104830,7 +104830,7 @@ void m68008_device::neg_l_pais_if8() // 44a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -104935,7 +104935,7 @@ void m68008_device::neg_l_das_if8() // 44a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -105002,7 +105002,7 @@ void m68008_device::neg_l_das_if8() // 44a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105037,7 +105037,7 @@ void m68008_device::neg_l_das_if8() // 44a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105109,7 +105109,7 @@ void m68008_device::neg_l_dais_if8() // 44b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -105190,7 +105190,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -105257,7 +105257,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105292,7 +105292,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105399,7 +105399,7 @@ void m68008_device::neg_l_adr16_if8() // 44b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -105466,7 +105466,7 @@ void m68008_device::neg_l_adr16_if8() // 44b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105501,7 +105501,7 @@ void m68008_device::neg_l_adr16_if8() // 44b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105639,7 +105639,7 @@ void m68008_device::neg_l_adr32_if8() // 44b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -105706,7 +105706,7 @@ void m68008_device::neg_l_adr32_if8() // 44b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105741,7 +105741,7 @@ void m68008_device::neg_l_adr32_if8() // 44b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -105903,7 +105903,7 @@ void m68008_device::move_ais_ccr_if8() // 44d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -106031,7 +106031,7 @@ void m68008_device::move_aips_ccr_if8() // 44d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -106159,7 +106159,7 @@ void m68008_device::move_pais_ccr_if8() // 44e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -106311,7 +106311,7 @@ void m68008_device::move_das_ccr_if8() // 44e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -106431,7 +106431,7 @@ void m68008_device::move_dais_ccr_if8() // 44f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -106513,7 +106513,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -106668,7 +106668,7 @@ void m68008_device::move_adr16_ccr_if8() // 44f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -106852,7 +106852,7 @@ void m68008_device::move_adr32_ccr_if8() // 44f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -107003,7 +107003,7 @@ void m68008_device::move_dpc_ccr_if8() // 44fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107122,7 +107122,7 @@ void m68008_device::move_dpc_ccr_if8() // 44fa ffff void m68008_device::move_dpci_ccr_if8() // 44fb ffff { // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -107204,7 +107204,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107449,7 +107449,7 @@ void m68008_device::not_b_ds_if8() // 4600 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0 alu_not8(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -107498,7 +107498,7 @@ void m68008_device::not_b_ais_if8() // 4610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107519,7 +107519,7 @@ void m68008_device::not_b_ais_if8() // 4610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107586,7 +107586,7 @@ void m68008_device::not_b_aips_if8() // 4618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -107605,7 +107605,7 @@ void m68008_device::not_b_aips_if8() // 4618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107674,7 +107674,7 @@ void m68008_device::not_b_pais_if8() // 4620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -107693,7 +107693,7 @@ void m68008_device::not_b_pais_if8() // 4620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107786,7 +107786,7 @@ void m68008_device::not_b_das_if8() // 4628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107807,7 +107807,7 @@ void m68008_device::not_b_das_if8() // 4628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107866,7 +107866,7 @@ void m68008_device::not_b_dais_if8() // 4630 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -107948,7 +107948,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107969,7 +107969,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108063,7 +108063,7 @@ void m68008_device::not_b_adr16_if8() // 4638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -108082,7 +108082,7 @@ void m68008_device::not_b_adr16_if8() // 4638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108207,7 +108207,7 @@ void m68008_device::not_b_adr32_if8() // 4639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -108226,7 +108226,7 @@ void m68008_device::not_b_adr32_if8() // 4639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108289,7 +108289,7 @@ void m68008_device::not_w_ds_if8() // 4640 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -108338,7 +108338,7 @@ void m68008_device::not_w_ais_if8() // 4650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108374,7 +108374,7 @@ void m68008_device::not_w_ais_if8() // 4650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108456,7 +108456,7 @@ void m68008_device::not_w_aips_if8() // 4658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -108490,7 +108490,7 @@ void m68008_device::not_w_aips_if8() // 4658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108574,7 +108574,7 @@ void m68008_device::not_w_pais_if8() // 4660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -108608,7 +108608,7 @@ void m68008_device::not_w_pais_if8() // 4660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108716,7 +108716,7 @@ void m68008_device::not_w_das_if8() // 4668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108752,7 +108752,7 @@ void m68008_device::not_w_das_if8() // 4668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -108826,7 +108826,7 @@ void m68008_device::not_w_dais_if8() // 4670 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -108908,7 +108908,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108944,7 +108944,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109053,7 +109053,7 @@ void m68008_device::not_w_adr16_if8() // 4678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -109087,7 +109087,7 @@ void m68008_device::not_w_adr16_if8() // 4678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109227,7 +109227,7 @@ void m68008_device::not_w_adr32_if8() // 4679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -109261,7 +109261,7 @@ void m68008_device::not_w_adr32_if8() // 4679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109339,12 +109339,12 @@ void m68008_device::not_l_ds_if8() // 4680 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0 alu_not(high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109394,7 +109394,7 @@ void m68008_device::not_l_ais_if8() // 4690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -109461,7 +109461,7 @@ void m68008_device::not_l_ais_if8() // 4690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109496,7 +109496,7 @@ void m68008_device::not_l_ais_if8() // 4690 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -109570,7 +109570,7 @@ void m68008_device::not_l_aips_if8() // 4698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -109640,7 +109640,7 @@ void m68008_device::not_l_aips_if8() // 4698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109675,7 +109675,7 @@ void m68008_device::not_l_aips_if8() // 4698 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -109748,7 +109748,7 @@ void m68008_device::not_l_pais_if8() // 46a0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -109820,7 +109820,7 @@ void m68008_device::not_l_pais_if8() // 46a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -109855,7 +109855,7 @@ void m68008_device::not_l_pais_if8() // 46a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -109960,7 +109960,7 @@ void m68008_device::not_l_das_if8() // 46a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -110027,7 +110027,7 @@ void m68008_device::not_l_das_if8() // 46a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110062,7 +110062,7 @@ void m68008_device::not_l_das_if8() // 46a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110134,7 +110134,7 @@ void m68008_device::not_l_dais_if8() // 46b0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -110215,7 +110215,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -110282,7 +110282,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110317,7 +110317,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110424,7 +110424,7 @@ void m68008_device::not_l_adr16_if8() // 46b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -110491,7 +110491,7 @@ void m68008_device::not_l_adr16_if8() // 46b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110526,7 +110526,7 @@ void m68008_device::not_l_adr16_if8() // 46b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110664,7 +110664,7 @@ void m68008_device::not_l_adr32_if8() // 46b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -110731,7 +110731,7 @@ void m68008_device::not_l_adr32_if8() // 46b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -110766,7 +110766,7 @@ void m68008_device::not_l_adr32_if8() // 46b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -110938,7 +110938,7 @@ void m68008_device::move_ais_sr_if8() // 46d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -111072,7 +111072,7 @@ void m68008_device::move_aips_sr_if8() // 46d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -111206,7 +111206,7 @@ void m68008_device::move_pais_sr_if8() // 46e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -111364,7 +111364,7 @@ void m68008_device::move_das_sr_if8() // 46e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -111490,7 +111490,7 @@ void m68008_device::move_dais_sr_if8() // 46f0 fff8 return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -111572,7 +111572,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -111733,7 +111733,7 @@ void m68008_device::move_adr16_sr_if8() // 46f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -111923,7 +111923,7 @@ void m68008_device::move_adr32_sr_if8() // 46f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -112080,7 +112080,7 @@ void m68008_device::move_dpc_sr_if8() // 46fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112205,7 +112205,7 @@ void m68008_device::move_dpci_sr_if8() // 46fb ffff return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -112287,7 +112287,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112540,12 +112540,12 @@ void m68008_device::nbcd_b_ds_if8() // 4800 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0 alu_sbcd8(m_da[ry], 0x0000); sr_xnzvc_u(); // 117 nbcr2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -112593,7 +112593,7 @@ void m68008_device::nbcd_b_ais_if8() // 4810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112613,12 +112613,12 @@ void m68008_device::nbcd_b_ais_if8() // 4810 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -112683,7 +112683,7 @@ void m68008_device::nbcd_b_aips_if8() // 4818 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -112701,12 +112701,12 @@ void m68008_device::nbcd_b_aips_if8() // 4818 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -112773,7 +112773,7 @@ void m68008_device::nbcd_b_pais_if8() // 4820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -112791,12 +112791,12 @@ void m68008_device::nbcd_b_pais_if8() // 4820 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -112887,7 +112887,7 @@ void m68008_device::nbcd_b_das_if8() // 4828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -112907,12 +112907,12 @@ void m68008_device::nbcd_b_das_if8() // 4828 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -112969,7 +112969,7 @@ void m68008_device::nbcd_b_dais_if8() // 4830 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -113051,7 +113051,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -113071,12 +113071,12 @@ adsw2: m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -113168,7 +113168,7 @@ void m68008_device::nbcd_b_adr16_if8() // 4838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -113186,12 +113186,12 @@ void m68008_device::nbcd_b_adr16_if8() // 4838 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -113314,7 +113314,7 @@ void m68008_device::nbcd_b_adr32_if8() // 4839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -113332,12 +113332,12 @@ void m68008_device::nbcd_b_adr32_if8() // 4839 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -113399,7 +113399,7 @@ void m68008_device::swap_ds_if8() // 4840 fff8 m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nzvc(); // 342 swap2 @@ -113407,7 +113407,7 @@ void m68008_device::swap_ds_if8() // 4840 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = merge_16_32(high16(m_at), m_aluo); m_au = m_au + 2; - // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -113454,7 +113454,7 @@ void m68008_device::pea_ais_if8() // 4850 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_da[m_sp] - 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -113561,7 +113561,7 @@ void m68008_device::pea_das_if8() // 4868 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -113598,7 +113598,7 @@ void m68008_device::pea_das_if8() // 4868 fff8 m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -113703,7 +113703,7 @@ void m68008_device::pea_dais_if8() // 4870 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -113784,7 +113784,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -114213,7 +114213,7 @@ void m68008_device::pea_dpc_if8() // 487a ffff m_aob = m_au; m_at = m_pc; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -114250,7 +114250,7 @@ void m68008_device::pea_dpc_if8() // 487a ffff m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114354,7 +114354,7 @@ void m68008_device::pea_dpc_if8() // 487a ffff void m68008_device::pea_dpci_if8() // 487b ffff { // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -114435,7 +114435,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -114549,7 +114549,7 @@ void m68008_device::ext_w_ds_if8() // 4880 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 + // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0 alu_ext(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -115040,7 +115040,7 @@ void m68008_device::movem_w_list_dais_if8() // 48b0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -115558,7 +115558,7 @@ void m68008_device::ext_l_ds_if8() // 48c0 fff8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 233 extr2 @@ -116140,7 +116140,7 @@ void m68008_device::movem_l_list_dais_if8() // 48f0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -116749,13 +116749,13 @@ void m68008_device::tst_b_ds_if8() // 4a00 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -116797,11 +116797,11 @@ void m68008_device::tst_b_ais_if8() // 4a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -116819,13 +116819,13 @@ void m68008_device::tst_b_ais_if8() // 4a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -116870,12 +116870,12 @@ void m68008_device::tst_b_aips_if8() // 4a18 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -116894,13 +116894,13 @@ void m68008_device::tst_b_aips_if8() // 4a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -116944,7 +116944,7 @@ void m68008_device::tst_b_pais_if8() // 4a20 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -116952,7 +116952,7 @@ void m68008_device::tst_b_pais_if8() // 4a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -116971,13 +116971,13 @@ void m68008_device::tst_b_pais_if8() // 4a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117019,7 +117019,7 @@ void m68008_device::tst_b_das_if8() // 4a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117052,11 +117052,11 @@ void m68008_device::tst_b_das_if8() // 4a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -117074,13 +117074,13 @@ void m68008_device::tst_b_das_if8() // 4a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117120,14 +117120,14 @@ void m68008_device::tst_b_dais_if8() // 4a30 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -117135,7 +117135,7 @@ void m68008_device::tst_b_dais_if8() // 4a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117169,7 +117169,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117205,11 +117205,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -117227,13 +117227,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117277,7 +117277,7 @@ void m68008_device::tst_b_adr16_if8() // 4a38 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -117310,7 +117310,7 @@ void m68008_device::tst_b_adr16_if8() // 4a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -117329,13 +117329,13 @@ void m68008_device::tst_b_adr16_if8() // 4a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117377,7 +117377,7 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117411,7 +117411,7 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -117444,7 +117444,7 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -117463,13 +117463,13 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117514,13 +117514,13 @@ void m68008_device::tst_w_ds_if8() // 4a40 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117562,11 +117562,11 @@ void m68008_device::tst_w_ais_if8() // 4a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -117599,13 +117599,13 @@ void m68008_device::tst_w_ais_if8() // 4a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117650,12 +117650,12 @@ void m68008_device::tst_w_aips_if8() // 4a58 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -117689,13 +117689,13 @@ void m68008_device::tst_w_aips_if8() // 4a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117739,7 +117739,7 @@ void m68008_device::tst_w_pais_if8() // 4a60 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -117747,7 +117747,7 @@ void m68008_device::tst_w_pais_if8() // 4a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -117781,13 +117781,13 @@ void m68008_device::tst_w_pais_if8() // 4a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117829,7 +117829,7 @@ void m68008_device::tst_w_das_if8() // 4a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117862,11 +117862,11 @@ void m68008_device::tst_w_das_if8() // 4a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -117899,13 +117899,13 @@ void m68008_device::tst_w_das_if8() // 4a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117945,14 +117945,14 @@ void m68008_device::tst_w_dais_if8() // 4a70 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -117960,7 +117960,7 @@ void m68008_device::tst_w_dais_if8() // 4a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -117994,7 +117994,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118030,11 +118030,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -118067,13 +118067,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118117,7 +118117,7 @@ void m68008_device::tst_w_adr16_if8() // 4a78 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -118150,7 +118150,7 @@ void m68008_device::tst_w_adr16_if8() // 4a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -118184,13 +118184,13 @@ void m68008_device::tst_w_adr16_if8() // 4a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118232,7 +118232,7 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118266,7 +118266,7 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -118299,7 +118299,7 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -118333,13 +118333,13 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118384,13 +118384,13 @@ void m68008_device::tst_l_ds_if8() // 4a80 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 362 tsrl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118434,7 +118434,7 @@ void m68008_device::tst_l_ais_if8() // 4a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -118469,7 +118469,7 @@ void m68008_device::tst_l_ais_if8() // 4a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -118502,13 +118502,13 @@ void m68008_device::tst_l_ais_if8() // 4a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118552,7 +118552,7 @@ void m68008_device::tst_l_aips_if8() // 4a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -118587,11 +118587,11 @@ void m68008_device::tst_l_aips_if8() // 4a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -118624,13 +118624,13 @@ void m68008_device::tst_l_aips_if8() // 4a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118673,14 +118673,14 @@ void m68008_device::tst_l_pais_if8() // 4aa0 fff8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -118714,7 +118714,7 @@ void m68008_device::tst_l_pais_if8() // 4aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -118747,13 +118747,13 @@ void m68008_device::tst_l_pais_if8() // 4aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118797,7 +118797,7 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118829,7 +118829,7 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -118864,7 +118864,7 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -118897,13 +118897,13 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118945,14 +118945,14 @@ void m68008_device::tst_l_dais_if8() // 4ab0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -118960,7 +118960,7 @@ void m68008_device::tst_l_dais_if8() // 4ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -118994,7 +118994,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119029,7 +119029,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -119064,7 +119064,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -119097,13 +119097,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119149,7 +119149,7 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -119182,7 +119182,7 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -119217,7 +119217,7 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -119250,13 +119250,13 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119300,7 +119300,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119334,7 +119334,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -119367,7 +119367,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -119402,7 +119402,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -119435,13 +119435,13 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119487,14 +119487,14 @@ void m68008_device::tas_ds_if8() // 4ac0 fff8 m_ir = m_irc; m_alub = m_da[ry]; m_pc = m_au; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1 alu_and8(m_alub, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119538,11 +119538,11 @@ void m68008_device::tas_ais_if8() // 4ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -119555,14 +119555,14 @@ void m68008_device::tas_ais_if8() // 4ad0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119584,11 +119584,11 @@ void m68008_device::tas_ais_if8() // 4ad0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119633,12 +119633,12 @@ void m68008_device::tas_aips_if8() // 4ad8 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -119652,14 +119652,14 @@ void m68008_device::tas_aips_if8() // 4ad8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119681,11 +119681,11 @@ void m68008_device::tas_aips_if8() // 4ad8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119729,7 +119729,7 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -119737,7 +119737,7 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -119751,14 +119751,14 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119780,11 +119780,11 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119826,7 +119826,7 @@ void m68008_device::tas_das_if8() // 4ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119859,11 +119859,11 @@ void m68008_device::tas_das_if8() // 4ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -119876,14 +119876,14 @@ void m68008_device::tas_das_if8() // 4ae8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -119905,11 +119905,11 @@ void m68008_device::tas_das_if8() // 4ae8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119949,14 +119949,14 @@ void m68008_device::tas_dais_if8() // 4af0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -119964,7 +119964,7 @@ void m68008_device::tas_dais_if8() // 4af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -119998,7 +119998,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -120034,11 +120034,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -120051,14 +120051,14 @@ adsw2: // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -120080,11 +120080,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -120128,7 +120128,7 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -120161,7 +120161,7 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -120175,14 +120175,14 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -120204,11 +120204,11 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -120250,7 +120250,7 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -120284,7 +120284,7 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -120317,7 +120317,7 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -120331,14 +120331,14 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -120360,11 +120360,11 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -120940,7 +120940,7 @@ void m68008_device::movem_w_dais_list_if8() // 4cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -121018,7 +121018,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -121771,7 +121771,7 @@ void m68008_device::movem_w_dpci_list_if8() // 4cbb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -121849,7 +121849,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -122602,7 +122602,7 @@ void m68008_device::movem_l_dais_list_if8() // 4cf0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -122680,7 +122680,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -123557,7 +123557,7 @@ void m68008_device::movem_l_dpci_list_if8() // 4cfb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -123635,7 +123635,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -123797,14 +123797,14 @@ void m68008_device::trap_imm4_if8() // 4e40 fff0 update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -123839,7 +123839,7 @@ void m68008_device::trap_imm4_if8() // 4e40 fff0 m_da[16] = m_au; m_ftu = 0x80 | ((m_ird & 0xf) << 2); m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -123872,7 +123872,7 @@ void m68008_device::trap_imm4_if8() // 4e40 fff0 m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -124044,7 +124044,7 @@ void m68008_device::link_as_imm16_if8() // 4e50 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 2b5 link2 m_pc = m_au; @@ -124411,7 +124411,7 @@ void m68008_device::reset_if8() // 4e70 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 27b rset2 @@ -124531,7 +124531,7 @@ void m68008_device::stop_i16u_if8() // 4e72 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 327 aaa01 @@ -124558,7 +124558,7 @@ void m68008_device::rte_if8() // 4e73 ffff if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1); m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -124639,9 +124639,6 @@ void m68008_device::rte_if8() // 4e73 ffff m_inst_substate = 10; return; } - m_sr = m_new_sr; - update_user_super(); - update_interrupt(); m_edb |= m_mmu8->read_data(m_aob | 1); m_icount -= 4; if(m_icount <= 0) { @@ -124739,7 +124736,7 @@ void m68008_device::rts_if8() // 4e75 ffff // 126 rts1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -124930,7 +124927,7 @@ trpv3: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -124963,7 +124960,7 @@ trpv3: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -124998,7 +124995,7 @@ trpv3: m_da[16] = m_au; m_ftu = 0x001c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -125031,7 +125028,7 @@ trpv3: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -125201,7 +125198,7 @@ void m68008_device::rtr_if8() // 4e77 ffff // 12a rtr1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -125659,7 +125656,7 @@ void m68008_device::jsr_dais_if8() // 4eb0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -126278,7 +126275,7 @@ void m68008_device::jsr_dpc_if8() // 4eba ffff void m68008_device::jsr_dpci_if8() // 4ebb ffff { // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -126599,7 +126596,7 @@ void m68008_device::jmp_dais_if8() // 4ef0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -126961,7 +126958,7 @@ void m68008_device::jmp_dpc_if8() // 4efa ffff void m68008_device::jmp_dpci_if8() // 4efb ffff { // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -127065,7 +127062,7 @@ void m68008_device::addq_b_imm3_ds_if8() // 5000 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -127114,7 +127111,7 @@ void m68008_device::addq_b_imm3_ais_if8() // 5010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -127136,7 +127133,7 @@ void m68008_device::addq_b_imm3_ais_if8() // 5010 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127203,7 +127200,7 @@ void m68008_device::addq_b_imm3_aips_if8() // 5018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -127223,7 +127220,7 @@ void m68008_device::addq_b_imm3_aips_if8() // 5018 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127292,7 +127289,7 @@ void m68008_device::addq_b_imm3_pais_if8() // 5020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -127312,7 +127309,7 @@ void m68008_device::addq_b_imm3_pais_if8() // 5020 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127405,7 +127402,7 @@ void m68008_device::addq_b_imm3_das_if8() // 5028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -127427,7 +127424,7 @@ void m68008_device::addq_b_imm3_das_if8() // 5028 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127486,7 +127483,7 @@ void m68008_device::addq_b_imm3_dais_if8() // 5030 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -127568,7 +127565,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -127590,7 +127587,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127684,7 +127681,7 @@ void m68008_device::addq_b_imm3_adr16_if8() // 5038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -127704,7 +127701,7 @@ void m68008_device::addq_b_imm3_adr16_if8() // 5038 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127829,7 +127826,7 @@ void m68008_device::addq_b_imm3_adr32_if8() // 5039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -127849,7 +127846,7 @@ void m68008_device::addq_b_imm3_adr32_if8() // 5039 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127912,7 +127909,7 @@ void m68008_device::addq_w_imm3_ds_if8() // 5040 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -127963,7 +127960,7 @@ void m68008_device::addq_w_imm3_as_if8() // 5048 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -127996,7 +127993,7 @@ void m68008_device::addq_w_imm3_as_if8() // 5048 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -128018,7 +128015,7 @@ void m68008_device::addq_w_imm3_ais_if8() // 5050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -128055,7 +128052,7 @@ void m68008_device::addq_w_imm3_ais_if8() // 5050 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128137,7 +128134,7 @@ void m68008_device::addq_w_imm3_aips_if8() // 5058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -128172,7 +128169,7 @@ void m68008_device::addq_w_imm3_aips_if8() // 5058 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128256,7 +128253,7 @@ void m68008_device::addq_w_imm3_pais_if8() // 5060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -128291,7 +128288,7 @@ void m68008_device::addq_w_imm3_pais_if8() // 5060 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128399,7 +128396,7 @@ void m68008_device::addq_w_imm3_das_if8() // 5068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -128436,7 +128433,7 @@ void m68008_device::addq_w_imm3_das_if8() // 5068 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128510,7 +128507,7 @@ void m68008_device::addq_w_imm3_dais_if8() // 5070 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -128592,7 +128589,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -128629,7 +128626,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128738,7 +128735,7 @@ void m68008_device::addq_w_imm3_adr16_if8() // 5078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -128773,7 +128770,7 @@ void m68008_device::addq_w_imm3_adr16_if8() // 5078 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -128913,7 +128910,7 @@ void m68008_device::addq_w_imm3_adr32_if8() // 5079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -128948,7 +128945,7 @@ void m68008_device::addq_w_imm3_adr32_if8() // 5079 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129026,7 +129023,7 @@ void m68008_device::addq_l_imm3_ds_if8() // 5080 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -129060,7 +129057,7 @@ void m68008_device::addq_l_imm3_ds_if8() // 5080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -129085,7 +129082,7 @@ void m68008_device::addq_l_imm3_as_if8() // 5088 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -129118,7 +129115,7 @@ void m68008_device::addq_l_imm3_as_if8() // 5088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -129140,7 +129137,7 @@ void m68008_device::addq_l_imm3_ais_if8() // 5090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -129208,7 +129205,7 @@ void m68008_device::addq_l_imm3_ais_if8() // 5090 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129243,7 +129240,7 @@ void m68008_device::addq_l_imm3_ais_if8() // 5090 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129317,7 +129314,7 @@ void m68008_device::addq_l_imm3_aips_if8() // 5098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -129388,7 +129385,7 @@ void m68008_device::addq_l_imm3_aips_if8() // 5098 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129423,7 +129420,7 @@ void m68008_device::addq_l_imm3_aips_if8() // 5098 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129496,7 +129493,7 @@ void m68008_device::addq_l_imm3_pais_if8() // 50a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -129569,7 +129566,7 @@ void m68008_device::addq_l_imm3_pais_if8() // 50a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129604,7 +129601,7 @@ void m68008_device::addq_l_imm3_pais_if8() // 50a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129709,7 +129706,7 @@ void m68008_device::addq_l_imm3_das_if8() // 50a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -129777,7 +129774,7 @@ void m68008_device::addq_l_imm3_das_if8() // 50a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -129812,7 +129809,7 @@ void m68008_device::addq_l_imm3_das_if8() // 50a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -129884,7 +129881,7 @@ void m68008_device::addq_l_imm3_dais_if8() // 50b0 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -129965,7 +129962,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -130033,7 +130030,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130068,7 +130065,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -130175,7 +130172,7 @@ void m68008_device::addq_l_imm3_adr16_if8() // 50b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -130243,7 +130240,7 @@ void m68008_device::addq_l_imm3_adr16_if8() // 50b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130278,7 +130275,7 @@ void m68008_device::addq_l_imm3_adr16_if8() // 50b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -130416,7 +130413,7 @@ void m68008_device::addq_l_imm3_adr32_if8() // 50b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -130484,7 +130481,7 @@ void m68008_device::addq_l_imm3_adr32_if8() // 50b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130519,7 +130516,7 @@ void m68008_device::addq_l_imm3_adr32_if8() // 50b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -130595,7 +130592,7 @@ void m68008_device::st_ds_if8() // 50c0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -130607,7 +130604,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -130644,7 +130641,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130679,7 +130676,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -130694,7 +130691,7 @@ void m68008_device::dbt_ds_rel16_if8() // 50c8 fff8 // 06c dbcc1 m_t = 1; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -130706,13 +130703,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130750,7 +130747,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -130758,7 +130755,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -130792,11 +130789,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -130836,13 +130833,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -130882,7 +130879,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -130923,11 +130920,11 @@ void m68008_device::st_ais_if8() // 50d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -130945,7 +130942,7 @@ void m68008_device::st_ais_if8() // 50d0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -130955,7 +130952,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -130989,7 +130986,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131027,7 +131024,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -131055,12 +131052,12 @@ void m68008_device::st_aips_if8() // 50d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -131079,7 +131076,7 @@ void m68008_device::st_aips_if8() // 50d8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131089,7 +131086,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131123,7 +131120,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131161,7 +131158,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -131188,7 +131185,7 @@ void m68008_device::st_pais_if8() // 50e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -131196,7 +131193,7 @@ void m68008_device::st_pais_if8() // 50e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -131215,7 +131212,7 @@ void m68008_device::st_pais_if8() // 50e0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131225,7 +131222,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131259,7 +131256,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131297,7 +131294,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -131322,7 +131319,7 @@ void m68008_device::st_das_if8() // 50e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131355,11 +131352,11 @@ void m68008_device::st_das_if8() // 50e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -131377,7 +131374,7 @@ void m68008_device::st_das_if8() // 50e8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131387,7 +131384,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131421,7 +131418,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131459,7 +131456,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -131482,14 +131479,14 @@ void m68008_device::st_dais_if8() // 50f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -131497,7 +131494,7 @@ void m68008_device::st_dais_if8() // 50f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131531,7 +131528,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131567,11 +131564,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -131589,7 +131586,7 @@ adsw2: m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131599,7 +131596,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131633,7 +131630,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131671,7 +131668,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -131698,7 +131695,7 @@ void m68008_device::st_adr16_if8() // 50f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131731,7 +131728,7 @@ void m68008_device::st_adr16_if8() // 50f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -131750,7 +131747,7 @@ void m68008_device::st_adr16_if8() // 50f8 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131760,7 +131757,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131794,7 +131791,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131832,7 +131829,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -131857,7 +131854,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131891,7 +131888,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -131924,7 +131921,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -131943,7 +131940,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -131953,7 +131950,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -131987,7 +131984,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -132025,7 +132022,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -132052,7 +132049,7 @@ void m68008_device::subq_b_imm3_ds_if8() // 5100 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -132101,7 +132098,7 @@ void m68008_device::subq_b_imm3_ais_if8() // 5110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -132123,7 +132120,7 @@ void m68008_device::subq_b_imm3_ais_if8() // 5110 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132190,7 +132187,7 @@ void m68008_device::subq_b_imm3_aips_if8() // 5118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -132210,7 +132207,7 @@ void m68008_device::subq_b_imm3_aips_if8() // 5118 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132279,7 +132276,7 @@ void m68008_device::subq_b_imm3_pais_if8() // 5120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -132299,7 +132296,7 @@ void m68008_device::subq_b_imm3_pais_if8() // 5120 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132392,7 +132389,7 @@ void m68008_device::subq_b_imm3_das_if8() // 5128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -132414,7 +132411,7 @@ void m68008_device::subq_b_imm3_das_if8() // 5128 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132473,7 +132470,7 @@ void m68008_device::subq_b_imm3_dais_if8() // 5130 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -132555,7 +132552,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -132577,7 +132574,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132671,7 +132668,7 @@ void m68008_device::subq_b_imm3_adr16_if8() // 5138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -132691,7 +132688,7 @@ void m68008_device::subq_b_imm3_adr16_if8() // 5138 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132816,7 +132813,7 @@ void m68008_device::subq_b_imm3_adr32_if8() // 5139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -132836,7 +132833,7 @@ void m68008_device::subq_b_imm3_adr32_if8() // 5139 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -132899,7 +132896,7 @@ void m68008_device::subq_w_imm3_ds_if8() // 5140 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -132950,7 +132947,7 @@ void m68008_device::subq_w_imm3_as_if8() // 5148 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -132983,7 +132980,7 @@ void m68008_device::subq_w_imm3_as_if8() // 5148 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -133005,7 +133002,7 @@ void m68008_device::subq_w_imm3_ais_if8() // 5150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -133042,7 +133039,7 @@ void m68008_device::subq_w_imm3_ais_if8() // 5150 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133124,7 +133121,7 @@ void m68008_device::subq_w_imm3_aips_if8() // 5158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -133159,7 +133156,7 @@ void m68008_device::subq_w_imm3_aips_if8() // 5158 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133243,7 +133240,7 @@ void m68008_device::subq_w_imm3_pais_if8() // 5160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -133278,7 +133275,7 @@ void m68008_device::subq_w_imm3_pais_if8() // 5160 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133386,7 +133383,7 @@ void m68008_device::subq_w_imm3_das_if8() // 5168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -133423,7 +133420,7 @@ void m68008_device::subq_w_imm3_das_if8() // 5168 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133497,7 +133494,7 @@ void m68008_device::subq_w_imm3_dais_if8() // 5170 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -133579,7 +133576,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -133616,7 +133613,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133725,7 +133722,7 @@ void m68008_device::subq_w_imm3_adr16_if8() // 5178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -133760,7 +133757,7 @@ void m68008_device::subq_w_imm3_adr16_if8() // 5178 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -133900,7 +133897,7 @@ void m68008_device::subq_w_imm3_adr32_if8() // 5179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -133935,7 +133932,7 @@ void m68008_device::subq_w_imm3_adr32_if8() // 5179 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134013,7 +134010,7 @@ void m68008_device::subq_l_imm3_ds_if8() // 5180 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -134047,7 +134044,7 @@ void m68008_device::subq_l_imm3_ds_if8() // 5180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -134072,7 +134069,7 @@ void m68008_device::subq_l_imm3_as_if8() // 5188 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -134105,7 +134102,7 @@ void m68008_device::subq_l_imm3_as_if8() // 5188 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -134127,7 +134124,7 @@ void m68008_device::subq_l_imm3_ais_if8() // 5190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -134195,7 +134192,7 @@ void m68008_device::subq_l_imm3_ais_if8() // 5190 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134230,7 +134227,7 @@ void m68008_device::subq_l_imm3_ais_if8() // 5190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134304,7 +134301,7 @@ void m68008_device::subq_l_imm3_aips_if8() // 5198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -134375,7 +134372,7 @@ void m68008_device::subq_l_imm3_aips_if8() // 5198 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134410,7 +134407,7 @@ void m68008_device::subq_l_imm3_aips_if8() // 5198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134483,7 +134480,7 @@ void m68008_device::subq_l_imm3_pais_if8() // 51a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -134556,7 +134553,7 @@ void m68008_device::subq_l_imm3_pais_if8() // 51a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134591,7 +134588,7 @@ void m68008_device::subq_l_imm3_pais_if8() // 51a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134696,7 +134693,7 @@ void m68008_device::subq_l_imm3_das_if8() // 51a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -134764,7 +134761,7 @@ void m68008_device::subq_l_imm3_das_if8() // 51a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -134799,7 +134796,7 @@ void m68008_device::subq_l_imm3_das_if8() // 51a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -134871,7 +134868,7 @@ void m68008_device::subq_l_imm3_dais_if8() // 51b0 f1f8 { int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -134952,7 +134949,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -135020,7 +135017,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -135055,7 +135052,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -135162,7 +135159,7 @@ void m68008_device::subq_l_imm3_adr16_if8() // 51b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -135230,7 +135227,7 @@ void m68008_device::subq_l_imm3_adr16_if8() // 51b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -135265,7 +135262,7 @@ void m68008_device::subq_l_imm3_adr16_if8() // 51b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -135403,7 +135400,7 @@ void m68008_device::subq_l_imm3_adr32_if8() // 51b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -135471,7 +135468,7 @@ void m68008_device::subq_l_imm3_adr32_if8() // 51b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -135506,7 +135503,7 @@ void m68008_device::subq_l_imm3_adr32_if8() // 51b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -135582,7 +135579,7 @@ void m68008_device::sf_ds_if8() // 51c0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -135594,7 +135591,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -135631,7 +135628,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135666,7 +135663,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -135681,7 +135678,7 @@ void m68008_device::dbra_ds_rel16_if8() // 51c8 fff8 // 06c dbcc1 m_t = 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -135693,13 +135690,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135737,7 +135734,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -135745,7 +135742,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -135779,11 +135776,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -135823,13 +135820,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -135869,7 +135866,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -135910,11 +135907,11 @@ void m68008_device::sf_ais_if8() // 51d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -135932,7 +135929,7 @@ void m68008_device::sf_ais_if8() // 51d0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -135942,7 +135939,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -135976,7 +135973,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136014,7 +136011,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -136042,12 +136039,12 @@ void m68008_device::sf_aips_if8() // 51d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -136066,7 +136063,7 @@ void m68008_device::sf_aips_if8() // 51d8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136076,7 +136073,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136110,7 +136107,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136148,7 +136145,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -136175,7 +136172,7 @@ void m68008_device::sf_pais_if8() // 51e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -136183,7 +136180,7 @@ void m68008_device::sf_pais_if8() // 51e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -136202,7 +136199,7 @@ void m68008_device::sf_pais_if8() // 51e0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136212,7 +136209,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136246,7 +136243,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136284,7 +136281,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -136309,7 +136306,7 @@ void m68008_device::sf_das_if8() // 51e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136342,11 +136339,11 @@ void m68008_device::sf_das_if8() // 51e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -136364,7 +136361,7 @@ void m68008_device::sf_das_if8() // 51e8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136374,7 +136371,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136408,7 +136405,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136446,7 +136443,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -136469,14 +136466,14 @@ void m68008_device::sf_dais_if8() // 51f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -136484,7 +136481,7 @@ void m68008_device::sf_dais_if8() // 51f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136518,7 +136515,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136554,11 +136551,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -136576,7 +136573,7 @@ adsw2: m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136586,7 +136583,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136620,7 +136617,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136658,7 +136655,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -136685,7 +136682,7 @@ void m68008_device::sf_adr16_if8() // 51f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136718,7 +136715,7 @@ void m68008_device::sf_adr16_if8() // 51f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -136737,7 +136734,7 @@ void m68008_device::sf_adr16_if8() // 51f8 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136747,7 +136744,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136781,7 +136778,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136819,7 +136816,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -136844,7 +136841,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136878,7 +136875,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136911,7 +136908,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -136930,7 +136927,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -136940,7 +136937,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -136974,7 +136971,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137012,7 +137009,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -137039,7 +137036,7 @@ void m68008_device::shi_ds_if8() // 52c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -137051,7 +137048,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137088,7 +137085,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137123,7 +137120,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -137138,7 +137135,7 @@ void m68008_device::dbhi_ds_rel16_if8() // 52c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) == 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -137150,13 +137147,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137194,7 +137191,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -137202,7 +137199,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137236,11 +137233,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137280,13 +137277,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137326,7 +137323,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137367,11 +137364,11 @@ void m68008_device::shi_ais_if8() // 52d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -137389,7 +137386,7 @@ void m68008_device::shi_ais_if8() // 52d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137399,7 +137396,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137433,7 +137430,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137471,7 +137468,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -137499,12 +137496,12 @@ void m68008_device::shi_aips_if8() // 52d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -137523,7 +137520,7 @@ void m68008_device::shi_aips_if8() // 52d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137533,7 +137530,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137567,7 +137564,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137605,7 +137602,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -137632,7 +137629,7 @@ void m68008_device::shi_pais_if8() // 52e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -137640,7 +137637,7 @@ void m68008_device::shi_pais_if8() // 52e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -137659,7 +137656,7 @@ void m68008_device::shi_pais_if8() // 52e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137669,7 +137666,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137703,7 +137700,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137741,7 +137738,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -137766,7 +137763,7 @@ void m68008_device::shi_das_if8() // 52e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137799,11 +137796,11 @@ void m68008_device::shi_das_if8() // 52e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -137821,7 +137818,7 @@ void m68008_device::shi_das_if8() // 52e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -137831,7 +137828,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137865,7 +137862,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137903,7 +137900,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -137926,14 +137923,14 @@ void m68008_device::shi_dais_if8() // 52f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -137941,7 +137938,7 @@ void m68008_device::shi_dais_if8() // 52f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -137975,7 +137972,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138011,11 +138008,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -138033,7 +138030,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138043,7 +138040,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138077,7 +138074,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138115,7 +138112,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -138142,7 +138139,7 @@ void m68008_device::shi_adr16_if8() // 52f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138175,7 +138172,7 @@ void m68008_device::shi_adr16_if8() // 52f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -138194,7 +138191,7 @@ void m68008_device::shi_adr16_if8() // 52f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138204,7 +138201,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138238,7 +138235,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138276,7 +138273,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -138301,7 +138298,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138335,7 +138332,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138368,7 +138365,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -138387,7 +138384,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138397,7 +138394,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138431,7 +138428,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138469,7 +138466,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -138496,7 +138493,7 @@ void m68008_device::sls_ds_if8() // 53c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -138508,7 +138505,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138545,7 +138542,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138580,7 +138577,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -138595,7 +138592,7 @@ void m68008_device::dbls_ds_rel16_if8() // 53c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) != 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -138607,13 +138604,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138651,7 +138648,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -138659,7 +138656,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138693,11 +138690,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138737,13 +138734,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138783,7 +138780,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138824,11 +138821,11 @@ void m68008_device::sls_ais_if8() // 53d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -138846,7 +138843,7 @@ void m68008_device::sls_ais_if8() // 53d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138856,7 +138853,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -138890,7 +138887,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138928,7 +138925,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -138956,12 +138953,12 @@ void m68008_device::sls_aips_if8() // 53d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -138980,7 +138977,7 @@ void m68008_device::sls_aips_if8() // 53d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -138990,7 +138987,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139024,7 +139021,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139062,7 +139059,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -139089,7 +139086,7 @@ void m68008_device::sls_pais_if8() // 53e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -139097,7 +139094,7 @@ void m68008_device::sls_pais_if8() // 53e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -139116,7 +139113,7 @@ void m68008_device::sls_pais_if8() // 53e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139126,7 +139123,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139160,7 +139157,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139198,7 +139195,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -139223,7 +139220,7 @@ void m68008_device::sls_das_if8() // 53e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139256,11 +139253,11 @@ void m68008_device::sls_das_if8() // 53e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -139278,7 +139275,7 @@ void m68008_device::sls_das_if8() // 53e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139288,7 +139285,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139322,7 +139319,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139360,7 +139357,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -139383,14 +139380,14 @@ void m68008_device::sls_dais_if8() // 53f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -139398,7 +139395,7 @@ void m68008_device::sls_dais_if8() // 53f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139432,7 +139429,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139468,11 +139465,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -139490,7 +139487,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139500,7 +139497,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139534,7 +139531,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139572,7 +139569,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -139599,7 +139596,7 @@ void m68008_device::sls_adr16_if8() // 53f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139632,7 +139629,7 @@ void m68008_device::sls_adr16_if8() // 53f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -139651,7 +139648,7 @@ void m68008_device::sls_adr16_if8() // 53f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139661,7 +139658,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139695,7 +139692,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139733,7 +139730,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -139758,7 +139755,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139792,7 +139789,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139825,7 +139822,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -139844,7 +139841,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -139854,7 +139851,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -139888,7 +139885,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139926,7 +139923,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -139953,7 +139950,7 @@ void m68008_device::scc_ds_if8() // 54c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -139965,7 +139962,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140002,7 +139999,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -140037,7 +140034,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -140052,7 +140049,7 @@ void m68008_device::dbcc_ds_rel16_if8() // 54c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_C); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -140064,13 +140061,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -140108,7 +140105,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -140116,7 +140113,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140150,11 +140147,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140194,13 +140191,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140240,7 +140237,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140281,11 +140278,11 @@ void m68008_device::scc_ais_if8() // 54d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -140303,7 +140300,7 @@ void m68008_device::scc_ais_if8() // 54d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140313,7 +140310,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140347,7 +140344,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -140385,7 +140382,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -140413,12 +140410,12 @@ void m68008_device::scc_aips_if8() // 54d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -140437,7 +140434,7 @@ void m68008_device::scc_aips_if8() // 54d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140447,7 +140444,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140481,7 +140478,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -140519,7 +140516,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -140546,7 +140543,7 @@ void m68008_device::scc_pais_if8() // 54e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -140554,7 +140551,7 @@ void m68008_device::scc_pais_if8() // 54e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -140573,7 +140570,7 @@ void m68008_device::scc_pais_if8() // 54e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140583,7 +140580,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140617,7 +140614,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -140655,7 +140652,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -140680,7 +140677,7 @@ void m68008_device::scc_das_if8() // 54e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140713,11 +140710,11 @@ void m68008_device::scc_das_if8() // 54e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -140735,7 +140732,7 @@ void m68008_device::scc_das_if8() // 54e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140745,7 +140742,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140779,7 +140776,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -140817,7 +140814,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -140840,14 +140837,14 @@ void m68008_device::scc_dais_if8() // 54f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -140855,7 +140852,7 @@ void m68008_device::scc_dais_if8() // 54f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140889,7 +140886,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140925,11 +140922,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -140947,7 +140944,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -140957,7 +140954,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -140991,7 +140988,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141029,7 +141026,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -141056,7 +141053,7 @@ void m68008_device::scc_adr16_if8() // 54f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141089,7 +141086,7 @@ void m68008_device::scc_adr16_if8() // 54f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -141108,7 +141105,7 @@ void m68008_device::scc_adr16_if8() // 54f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141118,7 +141115,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141152,7 +141149,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141190,7 +141187,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -141215,7 +141212,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141249,7 +141246,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141282,7 +141279,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -141301,7 +141298,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141311,7 +141308,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141345,7 +141342,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141383,7 +141380,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -141410,7 +141407,7 @@ void m68008_device::scs_ds_if8() // 55c0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -141422,7 +141419,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141459,7 +141456,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141494,7 +141491,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -141509,7 +141506,7 @@ void m68008_device::dbcs_ds_rel16_if8() // 55c8 fff8 // 06c dbcc1 m_t = m_sr & SR_C; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -141521,13 +141518,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141565,7 +141562,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -141573,7 +141570,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141607,11 +141604,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141651,13 +141648,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141697,7 +141694,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141738,11 +141735,11 @@ void m68008_device::scs_ais_if8() // 55d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -141760,7 +141757,7 @@ void m68008_device::scs_ais_if8() // 55d0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141770,7 +141767,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141804,7 +141801,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141842,7 +141839,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -141870,12 +141867,12 @@ void m68008_device::scs_aips_if8() // 55d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -141894,7 +141891,7 @@ void m68008_device::scs_aips_if8() // 55d8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -141904,7 +141901,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -141938,7 +141935,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -141976,7 +141973,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -142003,7 +142000,7 @@ void m68008_device::scs_pais_if8() // 55e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -142011,7 +142008,7 @@ void m68008_device::scs_pais_if8() // 55e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -142030,7 +142027,7 @@ void m68008_device::scs_pais_if8() // 55e0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142040,7 +142037,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142074,7 +142071,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142112,7 +142109,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -142137,7 +142134,7 @@ void m68008_device::scs_das_if8() // 55e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142170,11 +142167,11 @@ void m68008_device::scs_das_if8() // 55e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -142192,7 +142189,7 @@ void m68008_device::scs_das_if8() // 55e8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142202,7 +142199,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142236,7 +142233,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142274,7 +142271,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -142297,14 +142294,14 @@ void m68008_device::scs_dais_if8() // 55f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -142312,7 +142309,7 @@ void m68008_device::scs_dais_if8() // 55f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142346,7 +142343,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142382,11 +142379,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -142404,7 +142401,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142414,7 +142411,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142448,7 +142445,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142486,7 +142483,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -142513,7 +142510,7 @@ void m68008_device::scs_adr16_if8() // 55f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142546,7 +142543,7 @@ void m68008_device::scs_adr16_if8() // 55f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -142565,7 +142562,7 @@ void m68008_device::scs_adr16_if8() // 55f8 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142575,7 +142572,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142609,7 +142606,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142647,7 +142644,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -142672,7 +142669,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142706,7 +142703,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142739,7 +142736,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -142758,7 +142755,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -142768,7 +142765,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142802,7 +142799,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142840,7 +142837,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -142867,7 +142864,7 @@ void m68008_device::sne_ds_if8() // 56c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -142879,7 +142876,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -142916,7 +142913,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -142951,7 +142948,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -142966,7 +142963,7 @@ void m68008_device::dbne_ds_rel16_if8() // 56c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_Z); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -142978,13 +142975,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -143022,7 +143019,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -143030,7 +143027,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143064,11 +143061,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143108,13 +143105,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143154,7 +143151,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143195,11 +143192,11 @@ void m68008_device::sne_ais_if8() // 56d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -143217,7 +143214,7 @@ void m68008_device::sne_ais_if8() // 56d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143227,7 +143224,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143261,7 +143258,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -143299,7 +143296,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -143327,12 +143324,12 @@ void m68008_device::sne_aips_if8() // 56d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -143351,7 +143348,7 @@ void m68008_device::sne_aips_if8() // 56d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143361,7 +143358,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143395,7 +143392,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -143433,7 +143430,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -143460,7 +143457,7 @@ void m68008_device::sne_pais_if8() // 56e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -143468,7 +143465,7 @@ void m68008_device::sne_pais_if8() // 56e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -143487,7 +143484,7 @@ void m68008_device::sne_pais_if8() // 56e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143497,7 +143494,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143531,7 +143528,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -143569,7 +143566,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -143594,7 +143591,7 @@ void m68008_device::sne_das_if8() // 56e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143627,11 +143624,11 @@ void m68008_device::sne_das_if8() // 56e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -143649,7 +143646,7 @@ void m68008_device::sne_das_if8() // 56e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143659,7 +143656,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143693,7 +143690,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -143731,7 +143728,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -143754,14 +143751,14 @@ void m68008_device::sne_dais_if8() // 56f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -143769,7 +143766,7 @@ void m68008_device::sne_dais_if8() // 56f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143803,7 +143800,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143839,11 +143836,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -143861,7 +143858,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -143871,7 +143868,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -143905,7 +143902,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -143943,7 +143940,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -143970,7 +143967,7 @@ void m68008_device::sne_adr16_if8() // 56f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144003,7 +144000,7 @@ void m68008_device::sne_adr16_if8() // 56f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -144022,7 +144019,7 @@ void m68008_device::sne_adr16_if8() // 56f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144032,7 +144029,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144066,7 +144063,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144104,7 +144101,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -144129,7 +144126,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144163,7 +144160,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144196,7 +144193,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -144215,7 +144212,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144225,7 +144222,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144259,7 +144256,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144297,7 +144294,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -144324,7 +144321,7 @@ void m68008_device::seq_ds_if8() // 57c0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -144336,7 +144333,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144373,7 +144370,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144408,7 +144405,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -144423,7 +144420,7 @@ void m68008_device::dbeq_ds_rel16_if8() // 57c8 fff8 // 06c dbcc1 m_t = m_sr & SR_Z; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -144435,13 +144432,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144479,7 +144476,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -144487,7 +144484,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144521,11 +144518,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144565,13 +144562,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144611,7 +144608,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144652,11 +144649,11 @@ void m68008_device::seq_ais_if8() // 57d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -144674,7 +144671,7 @@ void m68008_device::seq_ais_if8() // 57d0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144684,7 +144681,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144718,7 +144715,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144756,7 +144753,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -144784,12 +144781,12 @@ void m68008_device::seq_aips_if8() // 57d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -144808,7 +144805,7 @@ void m68008_device::seq_aips_if8() // 57d8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144818,7 +144815,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144852,7 +144849,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -144890,7 +144887,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -144917,7 +144914,7 @@ void m68008_device::seq_pais_if8() // 57e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -144925,7 +144922,7 @@ void m68008_device::seq_pais_if8() // 57e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -144944,7 +144941,7 @@ void m68008_device::seq_pais_if8() // 57e0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -144954,7 +144951,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -144988,7 +144985,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145026,7 +145023,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -145051,7 +145048,7 @@ void m68008_device::seq_das_if8() // 57e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145084,11 +145081,11 @@ void m68008_device::seq_das_if8() // 57e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -145106,7 +145103,7 @@ void m68008_device::seq_das_if8() // 57e8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145116,7 +145113,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145150,7 +145147,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145188,7 +145185,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -145211,14 +145208,14 @@ void m68008_device::seq_dais_if8() // 57f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -145226,7 +145223,7 @@ void m68008_device::seq_dais_if8() // 57f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145260,7 +145257,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145296,11 +145293,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -145318,7 +145315,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145328,7 +145325,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145362,7 +145359,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145400,7 +145397,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -145427,7 +145424,7 @@ void m68008_device::seq_adr16_if8() // 57f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145460,7 +145457,7 @@ void m68008_device::seq_adr16_if8() // 57f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -145479,7 +145476,7 @@ void m68008_device::seq_adr16_if8() // 57f8 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145489,7 +145486,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145523,7 +145520,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145561,7 +145558,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -145586,7 +145583,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145620,7 +145617,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145653,7 +145650,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -145672,7 +145669,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -145682,7 +145679,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145716,7 +145713,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145754,7 +145751,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -145781,7 +145778,7 @@ void m68008_device::svc_ds_if8() // 58c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -145793,7 +145790,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145830,7 +145827,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145865,7 +145862,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -145880,7 +145877,7 @@ void m68008_device::dbvc_ds_rel16_if8() // 58c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -145892,13 +145889,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -145936,7 +145933,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -145944,7 +145941,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -145978,11 +145975,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146022,13 +146019,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146068,7 +146065,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146109,11 +146106,11 @@ void m68008_device::svc_ais_if8() // 58d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -146131,7 +146128,7 @@ void m68008_device::svc_ais_if8() // 58d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146141,7 +146138,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146175,7 +146172,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -146213,7 +146210,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -146241,12 +146238,12 @@ void m68008_device::svc_aips_if8() // 58d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -146265,7 +146262,7 @@ void m68008_device::svc_aips_if8() // 58d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146275,7 +146272,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146309,7 +146306,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -146347,7 +146344,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -146374,7 +146371,7 @@ void m68008_device::svc_pais_if8() // 58e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -146382,7 +146379,7 @@ void m68008_device::svc_pais_if8() // 58e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -146401,7 +146398,7 @@ void m68008_device::svc_pais_if8() // 58e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146411,7 +146408,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146445,7 +146442,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -146483,7 +146480,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -146508,7 +146505,7 @@ void m68008_device::svc_das_if8() // 58e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146541,11 +146538,11 @@ void m68008_device::svc_das_if8() // 58e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -146563,7 +146560,7 @@ void m68008_device::svc_das_if8() // 58e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146573,7 +146570,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146607,7 +146604,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -146645,7 +146642,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -146668,14 +146665,14 @@ void m68008_device::svc_dais_if8() // 58f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -146683,7 +146680,7 @@ void m68008_device::svc_dais_if8() // 58f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146717,7 +146714,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146753,11 +146750,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -146775,7 +146772,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146785,7 +146782,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146819,7 +146816,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -146857,7 +146854,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -146884,7 +146881,7 @@ void m68008_device::svc_adr16_if8() // 58f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -146917,7 +146914,7 @@ void m68008_device::svc_adr16_if8() // 58f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -146936,7 +146933,7 @@ void m68008_device::svc_adr16_if8() // 58f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -146946,7 +146943,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -146980,7 +146977,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147018,7 +147015,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -147043,7 +147040,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147077,7 +147074,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147110,7 +147107,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -147129,7 +147126,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147139,7 +147136,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147173,7 +147170,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147211,7 +147208,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -147238,7 +147235,7 @@ void m68008_device::svs_ds_if8() // 59c0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -147250,7 +147247,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147287,7 +147284,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147322,7 +147319,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -147337,7 +147334,7 @@ void m68008_device::dbvs_ds_rel16_if8() // 59c8 fff8 // 06c dbcc1 m_t = m_sr & SR_V; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -147349,13 +147346,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147393,7 +147390,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -147401,7 +147398,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147435,11 +147432,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147479,13 +147476,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147525,7 +147522,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147566,11 +147563,11 @@ void m68008_device::svs_ais_if8() // 59d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -147588,7 +147585,7 @@ void m68008_device::svs_ais_if8() // 59d0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147598,7 +147595,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147632,7 +147629,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147670,7 +147667,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -147698,12 +147695,12 @@ void m68008_device::svs_aips_if8() // 59d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -147722,7 +147719,7 @@ void m68008_device::svs_aips_if8() // 59d8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147732,7 +147729,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147766,7 +147763,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147804,7 +147801,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -147831,7 +147828,7 @@ void m68008_device::svs_pais_if8() // 59e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -147839,7 +147836,7 @@ void m68008_device::svs_pais_if8() // 59e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -147858,7 +147855,7 @@ void m68008_device::svs_pais_if8() // 59e0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -147868,7 +147865,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147902,7 +147899,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -147940,7 +147937,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -147965,7 +147962,7 @@ void m68008_device::svs_das_if8() // 59e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -147998,11 +147995,11 @@ void m68008_device::svs_das_if8() // 59e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -148020,7 +148017,7 @@ void m68008_device::svs_das_if8() // 59e8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148030,7 +148027,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148064,7 +148061,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148102,7 +148099,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -148125,14 +148122,14 @@ void m68008_device::svs_dais_if8() // 59f0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -148140,7 +148137,7 @@ void m68008_device::svs_dais_if8() // 59f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148174,7 +148171,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148210,11 +148207,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -148232,7 +148229,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148242,7 +148239,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148276,7 +148273,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148314,7 +148311,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -148341,7 +148338,7 @@ void m68008_device::svs_adr16_if8() // 59f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148374,7 +148371,7 @@ void m68008_device::svs_adr16_if8() // 59f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -148393,7 +148390,7 @@ void m68008_device::svs_adr16_if8() // 59f8 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148403,7 +148400,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148437,7 +148434,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148475,7 +148472,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -148500,7 +148497,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148534,7 +148531,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148567,7 +148564,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -148586,7 +148583,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -148596,7 +148593,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148630,7 +148627,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148668,7 +148665,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -148695,7 +148692,7 @@ void m68008_device::spl_ds_if8() // 5ac0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -148707,7 +148704,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148744,7 +148741,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148779,7 +148776,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -148794,7 +148791,7 @@ void m68008_device::dbpl_ds_rel16_if8() // 5ac8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_N); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -148806,13 +148803,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -148850,7 +148847,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -148858,7 +148855,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148892,11 +148889,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148936,13 +148933,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -148982,7 +148979,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149023,11 +149020,11 @@ void m68008_device::spl_ais_if8() // 5ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -149045,7 +149042,7 @@ void m68008_device::spl_ais_if8() // 5ad0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149055,7 +149052,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149089,7 +149086,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149127,7 +149124,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -149155,12 +149152,12 @@ void m68008_device::spl_aips_if8() // 5ad8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -149179,7 +149176,7 @@ void m68008_device::spl_aips_if8() // 5ad8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149189,7 +149186,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149223,7 +149220,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149261,7 +149258,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -149288,7 +149285,7 @@ void m68008_device::spl_pais_if8() // 5ae0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -149296,7 +149293,7 @@ void m68008_device::spl_pais_if8() // 5ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -149315,7 +149312,7 @@ void m68008_device::spl_pais_if8() // 5ae0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149325,7 +149322,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149359,7 +149356,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149397,7 +149394,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -149422,7 +149419,7 @@ void m68008_device::spl_das_if8() // 5ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149455,11 +149452,11 @@ void m68008_device::spl_das_if8() // 5ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -149477,7 +149474,7 @@ void m68008_device::spl_das_if8() // 5ae8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149487,7 +149484,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149521,7 +149518,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149559,7 +149556,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -149582,14 +149579,14 @@ void m68008_device::spl_dais_if8() // 5af0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -149597,7 +149594,7 @@ void m68008_device::spl_dais_if8() // 5af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149631,7 +149628,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149667,11 +149664,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -149689,7 +149686,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149699,7 +149696,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149733,7 +149730,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149771,7 +149768,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -149798,7 +149795,7 @@ void m68008_device::spl_adr16_if8() // 5af8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149831,7 +149828,7 @@ void m68008_device::spl_adr16_if8() // 5af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -149850,7 +149847,7 @@ void m68008_device::spl_adr16_if8() // 5af8 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -149860,7 +149857,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149894,7 +149891,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -149932,7 +149929,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -149957,7 +149954,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -149991,7 +149988,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150024,7 +150021,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -150043,7 +150040,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150053,7 +150050,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150087,7 +150084,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150125,7 +150122,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -150152,7 +150149,7 @@ void m68008_device::smi_ds_if8() // 5bc0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -150164,7 +150161,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150201,7 +150198,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150236,7 +150233,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -150251,7 +150248,7 @@ void m68008_device::dbmi_ds_rel16_if8() // 5bc8 fff8 // 06c dbcc1 m_t = m_sr & SR_N; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -150263,13 +150260,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150307,7 +150304,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -150315,7 +150312,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150349,11 +150346,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150393,13 +150390,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150439,7 +150436,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150480,11 +150477,11 @@ void m68008_device::smi_ais_if8() // 5bd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -150502,7 +150499,7 @@ void m68008_device::smi_ais_if8() // 5bd0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150512,7 +150509,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150546,7 +150543,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150584,7 +150581,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -150612,12 +150609,12 @@ void m68008_device::smi_aips_if8() // 5bd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -150636,7 +150633,7 @@ void m68008_device::smi_aips_if8() // 5bd8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150646,7 +150643,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150680,7 +150677,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150718,7 +150715,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -150745,7 +150742,7 @@ void m68008_device::smi_pais_if8() // 5be0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -150753,7 +150750,7 @@ void m68008_device::smi_pais_if8() // 5be0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -150772,7 +150769,7 @@ void m68008_device::smi_pais_if8() // 5be0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150782,7 +150779,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150816,7 +150813,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150854,7 +150851,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -150879,7 +150876,7 @@ void m68008_device::smi_das_if8() // 5be8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150912,11 +150909,11 @@ void m68008_device::smi_das_if8() // 5be8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -150934,7 +150931,7 @@ void m68008_device::smi_das_if8() // 5be8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -150944,7 +150941,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -150978,7 +150975,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151016,7 +151013,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -151039,14 +151036,14 @@ void m68008_device::smi_dais_if8() // 5bf0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -151054,7 +151051,7 @@ void m68008_device::smi_dais_if8() // 5bf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151088,7 +151085,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151124,11 +151121,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -151146,7 +151143,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151156,7 +151153,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151190,7 +151187,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151228,7 +151225,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -151255,7 +151252,7 @@ void m68008_device::smi_adr16_if8() // 5bf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151288,7 +151285,7 @@ void m68008_device::smi_adr16_if8() // 5bf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -151307,7 +151304,7 @@ void m68008_device::smi_adr16_if8() // 5bf8 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151317,7 +151314,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151351,7 +151348,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151389,7 +151386,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -151414,7 +151411,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151448,7 +151445,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151481,7 +151478,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -151500,7 +151497,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151510,7 +151507,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151544,7 +151541,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151582,7 +151579,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -151609,7 +151606,7 @@ void m68008_device::sge_ds_if8() // 5cc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -151621,7 +151618,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151658,7 +151655,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151693,7 +151690,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -151708,7 +151705,7 @@ void m68008_device::dbge_ds_rel16_if8() // 5cc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -151720,13 +151717,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151764,7 +151761,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -151772,7 +151769,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151806,11 +151803,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151850,13 +151847,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151896,7 +151893,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -151937,11 +151934,11 @@ void m68008_device::sge_ais_if8() // 5cd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -151959,7 +151956,7 @@ void m68008_device::sge_ais_if8() // 5cd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151969,7 +151966,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152003,7 +152000,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152041,7 +152038,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -152069,12 +152066,12 @@ void m68008_device::sge_aips_if8() // 5cd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -152093,7 +152090,7 @@ void m68008_device::sge_aips_if8() // 5cd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152103,7 +152100,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152137,7 +152134,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152175,7 +152172,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -152202,7 +152199,7 @@ void m68008_device::sge_pais_if8() // 5ce0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -152210,7 +152207,7 @@ void m68008_device::sge_pais_if8() // 5ce0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -152229,7 +152226,7 @@ void m68008_device::sge_pais_if8() // 5ce0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152239,7 +152236,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152273,7 +152270,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152311,7 +152308,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -152336,7 +152333,7 @@ void m68008_device::sge_das_if8() // 5ce8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152369,11 +152366,11 @@ void m68008_device::sge_das_if8() // 5ce8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -152391,7 +152388,7 @@ void m68008_device::sge_das_if8() // 5ce8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152401,7 +152398,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152435,7 +152432,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152473,7 +152470,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -152496,14 +152493,14 @@ void m68008_device::sge_dais_if8() // 5cf0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -152511,7 +152508,7 @@ void m68008_device::sge_dais_if8() // 5cf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152545,7 +152542,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152581,11 +152578,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -152603,7 +152600,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152613,7 +152610,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152647,7 +152644,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152685,7 +152682,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -152712,7 +152709,7 @@ void m68008_device::sge_adr16_if8() // 5cf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152745,7 +152742,7 @@ void m68008_device::sge_adr16_if8() // 5cf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -152764,7 +152761,7 @@ void m68008_device::sge_adr16_if8() // 5cf8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152774,7 +152771,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152808,7 +152805,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152846,7 +152843,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -152871,7 +152868,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -152905,7 +152902,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152938,7 +152935,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -152957,7 +152954,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152967,7 +152964,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153001,7 +152998,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153039,7 +153036,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -153066,7 +153063,7 @@ void m68008_device::slt_ds_if8() // 5dc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -153078,7 +153075,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153115,7 +153112,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153150,7 +153147,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -153165,7 +153162,7 @@ void m68008_device::dblt_ds_rel16_if8() // 5dc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -153177,13 +153174,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153221,7 +153218,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -153229,7 +153226,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153263,11 +153260,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153307,13 +153304,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153353,7 +153350,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153394,11 +153391,11 @@ void m68008_device::slt_ais_if8() // 5dd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -153416,7 +153413,7 @@ void m68008_device::slt_ais_if8() // 5dd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153426,7 +153423,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153460,7 +153457,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153498,7 +153495,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -153526,12 +153523,12 @@ void m68008_device::slt_aips_if8() // 5dd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -153550,7 +153547,7 @@ void m68008_device::slt_aips_if8() // 5dd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153560,7 +153557,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153594,7 +153591,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153632,7 +153629,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -153659,7 +153656,7 @@ void m68008_device::slt_pais_if8() // 5de0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -153667,7 +153664,7 @@ void m68008_device::slt_pais_if8() // 5de0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -153686,7 +153683,7 @@ void m68008_device::slt_pais_if8() // 5de0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153696,7 +153693,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153730,7 +153727,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153768,7 +153765,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -153793,7 +153790,7 @@ void m68008_device::slt_das_if8() // 5de8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153826,11 +153823,11 @@ void m68008_device::slt_das_if8() // 5de8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -153848,7 +153845,7 @@ void m68008_device::slt_das_if8() // 5de8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -153858,7 +153855,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -153892,7 +153889,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -153930,7 +153927,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -153953,14 +153950,14 @@ void m68008_device::slt_dais_if8() // 5df0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -153968,7 +153965,7 @@ void m68008_device::slt_dais_if8() // 5df0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154002,7 +153999,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154038,11 +154035,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -154060,7 +154057,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154070,7 +154067,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154104,7 +154101,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154142,7 +154139,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -154169,7 +154166,7 @@ void m68008_device::slt_adr16_if8() // 5df8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154202,7 +154199,7 @@ void m68008_device::slt_adr16_if8() // 5df8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -154221,7 +154218,7 @@ void m68008_device::slt_adr16_if8() // 5df8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154231,7 +154228,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154265,7 +154262,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154303,7 +154300,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -154328,7 +154325,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154362,7 +154359,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154395,7 +154392,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -154414,7 +154411,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154424,7 +154421,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154458,7 +154455,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154496,7 +154493,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -154523,7 +154520,7 @@ void m68008_device::sgt_ds_if8() // 5ec0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -154535,7 +154532,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154572,7 +154569,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154607,7 +154604,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -154622,7 +154619,7 @@ void m68008_device::dbgt_ds_rel16_if8() // 5ec8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -154634,13 +154631,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154678,7 +154675,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -154686,7 +154683,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154720,11 +154717,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154764,13 +154761,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154810,7 +154807,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154851,11 +154848,11 @@ void m68008_device::sgt_ais_if8() // 5ed0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -154873,7 +154870,7 @@ void m68008_device::sgt_ais_if8() // 5ed0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -154883,7 +154880,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -154917,7 +154914,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -154955,7 +154952,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -154983,12 +154980,12 @@ void m68008_device::sgt_aips_if8() // 5ed8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -155007,7 +155004,7 @@ void m68008_device::sgt_aips_if8() // 5ed8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155017,7 +155014,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155051,7 +155048,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155089,7 +155086,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -155116,7 +155113,7 @@ void m68008_device::sgt_pais_if8() // 5ee0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -155124,7 +155121,7 @@ void m68008_device::sgt_pais_if8() // 5ee0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -155143,7 +155140,7 @@ void m68008_device::sgt_pais_if8() // 5ee0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155153,7 +155150,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155187,7 +155184,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155225,7 +155222,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -155250,7 +155247,7 @@ void m68008_device::sgt_das_if8() // 5ee8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155283,11 +155280,11 @@ void m68008_device::sgt_das_if8() // 5ee8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -155305,7 +155302,7 @@ void m68008_device::sgt_das_if8() // 5ee8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155315,7 +155312,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155349,7 +155346,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155387,7 +155384,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -155410,14 +155407,14 @@ void m68008_device::sgt_dais_if8() // 5ef0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -155425,7 +155422,7 @@ void m68008_device::sgt_dais_if8() // 5ef0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155459,7 +155456,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155495,11 +155492,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -155517,7 +155514,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155527,7 +155524,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155561,7 +155558,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155599,7 +155596,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -155626,7 +155623,7 @@ void m68008_device::sgt_adr16_if8() // 5ef8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155659,7 +155656,7 @@ void m68008_device::sgt_adr16_if8() // 5ef8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -155678,7 +155675,7 @@ void m68008_device::sgt_adr16_if8() // 5ef8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155688,7 +155685,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155722,7 +155719,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155760,7 +155757,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -155785,7 +155782,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155819,7 +155816,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155852,7 +155849,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -155871,7 +155868,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -155881,7 +155878,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -155915,7 +155912,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -155953,7 +155950,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -155980,7 +155977,7 @@ void m68008_device::sle_ds_if8() // 5fc0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -155992,7 +155989,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156029,7 +156026,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156064,7 +156061,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -156079,7 +156076,7 @@ void m68008_device::dble_ds_rel16_if8() // 5fc8 fff8 // 06c dbcc1 m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -156091,13 +156088,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156135,7 +156132,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156143,7 +156140,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156177,11 +156174,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156221,13 +156218,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156267,7 +156264,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156308,11 +156305,11 @@ void m68008_device::sle_ais_if8() // 5fd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -156330,7 +156327,7 @@ void m68008_device::sle_ais_if8() // 5fd0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156340,7 +156337,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156374,7 +156371,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156412,7 +156409,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -156440,12 +156437,12 @@ void m68008_device::sle_aips_if8() // 5fd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -156464,7 +156461,7 @@ void m68008_device::sle_aips_if8() // 5fd8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156474,7 +156471,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156508,7 +156505,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156546,7 +156543,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -156573,7 +156570,7 @@ void m68008_device::sle_pais_if8() // 5fe0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -156581,7 +156578,7 @@ void m68008_device::sle_pais_if8() // 5fe0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -156600,7 +156597,7 @@ void m68008_device::sle_pais_if8() // 5fe0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156610,7 +156607,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156644,7 +156641,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156682,7 +156679,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -156707,7 +156704,7 @@ void m68008_device::sle_das_if8() // 5fe8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156740,11 +156737,11 @@ void m68008_device::sle_das_if8() // 5fe8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -156762,7 +156759,7 @@ void m68008_device::sle_das_if8() // 5fe8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156772,7 +156769,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156806,7 +156803,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156844,7 +156841,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -156867,14 +156864,14 @@ void m68008_device::sle_dais_if8() // 5ff0 fff8 { int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -156882,7 +156879,7 @@ void m68008_device::sle_dais_if8() // 5ff0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156916,7 +156913,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -156952,11 +156949,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -156974,7 +156971,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156984,7 +156981,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -157018,7 +157015,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157056,7 +157053,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -157083,7 +157080,7 @@ void m68008_device::sle_adr16_if8() // 5ff8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157116,7 +157113,7 @@ void m68008_device::sle_adr16_if8() // 5ff8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -157135,7 +157132,7 @@ void m68008_device::sle_adr16_if8() // 5ff8 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157145,7 +157142,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -157179,7 +157176,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157217,7 +157214,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -157242,7 +157239,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -157276,7 +157273,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157309,7 +157306,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -157328,7 +157325,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157338,7 +157335,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -157372,7 +157369,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157410,7 +157407,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -157661,7 +157658,7 @@ void m68008_device::bsr_rel16_if8() // 6100 ffff { // 0a9 bsrw1 m_at = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_icount -= 2; @@ -157808,7 +157805,7 @@ void m68008_device::bsr_rel8_if8() // 6100 ff00 // 089 bsri1 m_at = m_pc; m_au = m_da[m_sp] - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 102 bsri2 @@ -161150,7 +161147,7 @@ void m68008_device::moveq_imm8o_dd_if8() // 7000 f100 m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -161200,7 +161197,7 @@ void m68008_device::or_b_ds_dd_if8() // 8000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161208,7 +161205,7 @@ void m68008_device::or_b_ds_dd_if8() // 8000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161251,11 +161248,11 @@ void m68008_device::or_b_ais_dd_if8() // 8010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -161273,7 +161270,7 @@ void m68008_device::or_b_ais_dd_if8() // 8010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161281,7 +161278,7 @@ void m68008_device::or_b_ais_dd_if8() // 8010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161327,12 +161324,12 @@ void m68008_device::or_b_aips_dd_if8() // 8018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -161351,7 +161348,7 @@ void m68008_device::or_b_aips_dd_if8() // 8018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161359,7 +161356,7 @@ void m68008_device::or_b_aips_dd_if8() // 8018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161404,7 +161401,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -161412,7 +161409,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -161431,7 +161428,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161439,7 +161436,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161482,7 +161479,7 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161515,11 +161512,11 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -161537,7 +161534,7 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161545,7 +161542,7 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161586,14 +161583,14 @@ void m68008_device::or_b_dais_dd_if8() // 8030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -161601,7 +161598,7 @@ void m68008_device::or_b_dais_dd_if8() // 8030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161635,7 +161632,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161671,11 +161668,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -161693,7 +161690,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161701,7 +161698,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161746,7 +161743,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161779,7 +161776,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -161798,7 +161795,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161806,7 +161803,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161849,7 +161846,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161883,7 +161880,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161916,7 +161913,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -161935,7 +161932,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -161943,7 +161940,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -161985,7 +161982,7 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162018,11 +162015,11 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -162040,7 +162037,7 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162048,7 +162045,7 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162088,14 +162085,14 @@ void m68008_device::or_b_dpci_dd_if8() // 803b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -162103,7 +162100,7 @@ void m68008_device::or_b_dpci_dd_if8() // 803b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162137,7 +162134,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162173,11 +162170,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -162195,7 +162192,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162203,7 +162200,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162248,7 +162245,7 @@ void m68008_device::or_b_imm8_dd_if8() // 803c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162282,7 +162279,7 @@ void m68008_device::or_b_imm8_dd_if8() // 803c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx] alu_or8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162290,7 +162287,7 @@ void m68008_device::or_b_imm8_dd_if8() // 803c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162335,7 +162332,7 @@ void m68008_device::or_w_ds_dd_if8() // 8040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162343,7 +162340,7 @@ void m68008_device::or_w_ds_dd_if8() // 8040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162386,11 +162383,11 @@ void m68008_device::or_w_ais_dd_if8() // 8050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -162423,7 +162420,7 @@ void m68008_device::or_w_ais_dd_if8() // 8050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162431,7 +162428,7 @@ void m68008_device::or_w_ais_dd_if8() // 8050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162477,12 +162474,12 @@ void m68008_device::or_w_aips_dd_if8() // 8058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -162516,7 +162513,7 @@ void m68008_device::or_w_aips_dd_if8() // 8058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162524,7 +162521,7 @@ void m68008_device::or_w_aips_dd_if8() // 8058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162569,7 +162566,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -162577,7 +162574,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -162611,7 +162608,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162619,7 +162616,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162662,7 +162659,7 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162695,11 +162692,11 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -162732,7 +162729,7 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162740,7 +162737,7 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162781,14 +162778,14 @@ void m68008_device::or_w_dais_dd_if8() // 8070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -162796,7 +162793,7 @@ void m68008_device::or_w_dais_dd_if8() // 8070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162830,7 +162827,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162866,11 +162863,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -162903,7 +162900,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -162911,7 +162908,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -162956,7 +162953,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162989,7 +162986,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -163023,7 +163020,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163031,7 +163028,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163074,7 +163071,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163108,7 +163105,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163141,7 +163138,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -163175,7 +163172,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163183,7 +163180,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163225,7 +163222,7 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163258,11 +163255,11 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163295,7 +163292,7 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163303,7 +163300,7 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163343,14 +163340,14 @@ void m68008_device::or_w_dpci_dd_if8() // 807b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -163358,7 +163355,7 @@ void m68008_device::or_w_dpci_dd_if8() // 807b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163392,7 +163389,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163428,11 +163425,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163465,7 +163462,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163473,7 +163470,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163518,7 +163515,7 @@ void m68008_device::or_w_imm16_dd_if8() // 807c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163552,7 +163549,7 @@ void m68008_device::or_w_imm16_dd_if8() // 807c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -163560,7 +163557,7 @@ void m68008_device::or_w_imm16_dd_if8() // 807c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163605,12 +163602,12 @@ void m68008_device::or_l_ds_dd_if8() // 8080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -163640,7 +163637,7 @@ void m68008_device::or_l_ds_dd_if8() // 8080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx] alu_or(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -163649,7 +163646,7 @@ void m68008_device::or_l_ds_dd_if8() // 8080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163665,7 +163662,7 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -163700,7 +163697,7 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -163733,12 +163730,12 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -163774,7 +163771,7 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163790,7 +163787,7 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -163825,11 +163822,11 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -163862,12 +163859,12 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -163903,7 +163900,7 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163918,14 +163915,14 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -163959,7 +163956,7 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -163992,12 +163989,12 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164033,7 +164030,7 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164049,7 +164046,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164081,7 +164078,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -164116,7 +164113,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -164149,12 +164146,12 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164190,7 +164187,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164204,14 +164201,14 @@ void m68008_device::or_l_dais_dd_if8() // 80b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -164219,7 +164216,7 @@ void m68008_device::or_l_dais_dd_if8() // 80b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164253,7 +164250,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164288,7 +164285,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -164323,7 +164320,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -164356,12 +164353,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164397,7 +164394,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164415,7 +164412,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164448,7 +164445,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -164483,7 +164480,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -164516,12 +164513,12 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164557,7 +164554,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164573,7 +164570,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164607,7 +164604,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164640,7 +164637,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -164675,7 +164672,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -164708,12 +164705,12 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164749,7 +164746,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164764,7 +164761,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164796,7 +164793,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164831,7 +164828,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164864,12 +164861,12 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -164905,7 +164902,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164918,14 +164915,14 @@ void m68008_device::or_l_dpci_dd_if8() // 80bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -164933,7 +164930,7 @@ void m68008_device::or_l_dpci_dd_if8() // 80bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -164967,7 +164964,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -165002,7 +164999,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165037,7 +165034,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -165070,12 +165067,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -165111,7 +165108,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -165127,7 +165124,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -165161,7 +165158,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -165195,12 +165192,12 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -165230,7 +165227,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx] alu_or(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -165239,7 +165236,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -165257,13 +165254,13 @@ void m68008_device::divu_w_ds_dd_if8() // 80c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -165276,7 +165273,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -165294,7 +165291,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -165302,7 +165299,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -165337,7 +165334,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -165370,7 +165367,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -165541,7 +165538,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -165581,7 +165578,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -165592,7 +165589,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -165604,7 +165601,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -165624,7 +165621,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -165635,7 +165632,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -165645,13 +165642,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -165662,7 +165659,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -165672,7 +165669,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -165680,7 +165677,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -165725,7 +165722,7 @@ void m68008_device::divu_w_ais_dd_if8() // 80d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -165761,13 +165758,13 @@ void m68008_device::divu_w_ais_dd_if8() // 80d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -165780,7 +165777,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -165798,7 +165795,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -165806,7 +165803,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -165841,7 +165838,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -165874,7 +165871,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -166045,7 +166042,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166085,7 +166082,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -166096,7 +166093,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166108,7 +166105,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166128,7 +166125,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -166139,7 +166136,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -166149,13 +166146,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -166166,7 +166163,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -166176,7 +166173,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -166184,7 +166181,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166235,7 +166232,7 @@ void m68008_device::divu_w_aips_dd_if8() // 80d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -166269,13 +166266,13 @@ void m68008_device::divu_w_aips_dd_if8() // 80d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -166288,7 +166285,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -166306,7 +166303,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -166314,7 +166311,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -166349,7 +166346,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -166382,7 +166379,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -166553,7 +166550,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166593,7 +166590,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -166604,7 +166601,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166616,7 +166613,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -166636,7 +166633,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -166647,7 +166644,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -166657,13 +166654,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -166674,7 +166671,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -166684,7 +166681,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -166692,7 +166689,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -166745,7 +166742,7 @@ void m68008_device::divu_w_pais_dd_if8() // 80e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -166779,13 +166776,13 @@ void m68008_device::divu_w_pais_dd_if8() // 80e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -166798,7 +166795,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -166816,7 +166813,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -166824,7 +166821,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -166859,7 +166856,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -166892,7 +166889,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -167063,7 +167060,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167103,7 +167100,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -167114,7 +167111,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167126,7 +167123,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167146,7 +167143,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -167157,7 +167154,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -167167,13 +167164,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -167184,7 +167181,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -167194,7 +167191,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -167202,7 +167199,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167279,7 +167276,7 @@ void m68008_device::divu_w_das_dd_if8() // 80e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -167315,13 +167312,13 @@ void m68008_device::divu_w_das_dd_if8() // 80e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -167334,7 +167331,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -167352,7 +167349,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -167360,7 +167357,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -167395,7 +167392,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -167428,7 +167425,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -167599,7 +167596,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167639,7 +167636,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -167650,7 +167647,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167662,7 +167659,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -167682,7 +167679,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -167693,7 +167690,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -167703,13 +167700,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -167720,7 +167717,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -167730,7 +167727,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -167738,7 +167735,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -167781,7 +167778,7 @@ void m68008_device::divu_w_dais_dd_if8() // 80f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -167863,7 +167860,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -167899,13 +167896,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -167918,7 +167915,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -167936,7 +167933,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -167944,7 +167941,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -167979,7 +167976,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -168012,7 +168009,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -168183,7 +168180,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168223,7 +168220,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -168234,7 +168231,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168246,7 +168243,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168266,7 +168263,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -168277,7 +168274,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -168287,13 +168284,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -168304,7 +168301,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -168314,7 +168311,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -168322,7 +168319,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168400,7 +168397,7 @@ void m68008_device::divu_w_adr16_dd_if8() // 80f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -168434,13 +168431,13 @@ void m68008_device::divu_w_adr16_dd_if8() // 80f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -168453,7 +168450,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -168471,7 +168468,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -168479,7 +168476,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -168514,7 +168511,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -168547,7 +168544,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -168718,7 +168715,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168758,7 +168755,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -168769,7 +168766,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168781,7 +168778,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -168801,7 +168798,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -168812,7 +168809,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -168822,13 +168819,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -168839,7 +168836,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -168849,7 +168846,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -168857,7 +168854,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -168966,7 +168963,7 @@ void m68008_device::divu_w_adr32_dd_if8() // 80f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -169000,13 +168997,13 @@ void m68008_device::divu_w_adr32_dd_if8() // 80f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -169019,7 +169016,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -169037,7 +169034,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -169045,7 +169042,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -169080,7 +169077,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -169113,7 +169110,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -169284,7 +169281,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -169324,7 +169321,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -169335,7 +169332,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169347,7 +169344,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169367,7 +169364,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -169378,7 +169375,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -169388,13 +169385,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -169405,7 +169402,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -169415,7 +169412,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -169423,7 +169420,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -169499,7 +169496,7 @@ void m68008_device::divu_w_dpc_dd_if8() // 80fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -169535,13 +169532,13 @@ void m68008_device::divu_w_dpc_dd_if8() // 80fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -169554,7 +169551,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -169572,7 +169569,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -169580,7 +169577,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -169615,7 +169612,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -169648,7 +169645,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -169819,7 +169816,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -169859,7 +169856,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -169870,7 +169867,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169882,7 +169879,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -169902,7 +169899,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -169913,7 +169910,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -169923,13 +169920,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -169940,7 +169937,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -169950,7 +169947,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -169958,7 +169955,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170000,7 +169997,7 @@ void m68008_device::divu_w_dpci_dd_if8() // 80fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -170082,7 +170079,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -170118,13 +170115,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -170137,7 +170134,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -170155,7 +170152,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -170163,7 +170160,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -170198,7 +170195,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -170231,7 +170228,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -170402,7 +170399,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170442,7 +170439,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -170453,7 +170450,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170465,7 +170462,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170485,7 +170482,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -170496,7 +170493,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -170506,13 +170503,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -170523,7 +170520,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -170533,7 +170530,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -170541,7 +170538,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170621,13 +170618,13 @@ void m68008_device::divu_w_imm16_dd_if8() // 80fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -170640,7 +170637,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -170658,7 +170655,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -170666,7 +170663,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -170701,7 +170698,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -170734,7 +170731,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -170905,7 +170902,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -170945,7 +170942,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -170956,7 +170953,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170968,7 +170965,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -170988,7 +170985,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -170999,7 +170996,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -171009,13 +171006,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -171026,7 +171023,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -171036,7 +171033,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -171044,7 +171041,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171091,12 +171088,12 @@ void m68008_device::sbcd_ds_dd_if8() // 8100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx] alu_sbcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -171151,7 +171148,7 @@ void m68008_device::sbcd_pais_paid_if8() // 8108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -171187,12 +171184,12 @@ void m68008_device::sbcd_pais_paid_if8() // 8108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin alu_sbcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -171252,11 +171249,11 @@ void m68008_device::or_b_dd_ais_if8() // 8110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -171274,7 +171271,7 @@ void m68008_device::or_b_dd_ais_if8() // 8110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171311,7 +171308,7 @@ void m68008_device::or_b_dd_ais_if8() // 8110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -171340,12 +171337,12 @@ void m68008_device::or_b_dd_aips_if8() // 8118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -171364,7 +171361,7 @@ void m68008_device::or_b_dd_aips_if8() // 8118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171401,7 +171398,7 @@ void m68008_device::or_b_dd_aips_if8() // 8118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -171429,7 +171426,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -171437,7 +171434,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -171456,7 +171453,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171493,7 +171490,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -171519,7 +171516,7 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -171552,11 +171549,11 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -171574,7 +171571,7 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171611,7 +171608,7 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -171635,14 +171632,14 @@ void m68008_device::or_b_dd_dais_if8() // 8130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -171650,7 +171647,7 @@ void m68008_device::or_b_dd_dais_if8() // 8130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -171684,7 +171681,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -171720,11 +171717,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -171742,7 +171739,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171779,7 +171776,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -171807,7 +171804,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171840,7 +171837,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -171859,7 +171856,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -171896,7 +171893,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -171922,7 +171919,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -171956,7 +171953,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171989,7 +171986,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -172008,7 +172005,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172045,7 +172042,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -172071,11 +172068,11 @@ void m68008_device::or_w_dd_ais_if8() // 8150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -172108,7 +172105,7 @@ void m68008_device::or_w_dd_ais_if8() // 8150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172145,7 +172142,7 @@ void m68008_device::or_w_dd_ais_if8() // 8150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172189,12 +172186,12 @@ void m68008_device::or_w_dd_aips_if8() // 8158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -172228,7 +172225,7 @@ void m68008_device::or_w_dd_aips_if8() // 8158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172265,7 +172262,7 @@ void m68008_device::or_w_dd_aips_if8() // 8158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172308,7 +172305,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -172316,7 +172313,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -172350,7 +172347,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172387,7 +172384,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172428,7 +172425,7 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -172461,11 +172458,11 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -172498,7 +172495,7 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172535,7 +172532,7 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172574,14 +172571,14 @@ void m68008_device::or_w_dd_dais_if8() // 8170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -172589,7 +172586,7 @@ void m68008_device::or_w_dd_dais_if8() // 8170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -172623,7 +172620,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -172659,11 +172656,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -172696,7 +172693,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172733,7 +172730,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172776,7 +172773,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172809,7 +172806,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -172843,7 +172840,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -172880,7 +172877,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -172921,7 +172918,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -172955,7 +172952,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172988,7 +172985,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -173022,7 +173019,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173059,7 +173056,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173100,7 +173097,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -173135,7 +173132,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -173168,7 +173165,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173203,7 +173200,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173238,7 +173235,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173279,7 +173276,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -173314,11 +173311,11 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -173351,7 +173348,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173386,7 +173383,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173421,7 +173418,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173461,14 +173458,14 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -173502,7 +173499,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -173535,7 +173532,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173570,7 +173567,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173605,7 +173602,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173646,7 +173643,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -173678,7 +173675,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -173713,7 +173710,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -173746,7 +173743,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -173781,7 +173778,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -173816,7 +173813,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -173855,14 +173852,14 @@ void m68008_device::or_l_dd_dais_if8() // 81b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -173870,7 +173867,7 @@ void m68008_device::or_l_dd_dais_if8() // 81b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -173904,7 +173901,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -173939,7 +173936,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -173974,7 +173971,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -174007,7 +174004,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174042,7 +174039,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -174077,7 +174074,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -174120,7 +174117,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174153,7 +174150,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -174188,7 +174185,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -174221,7 +174218,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174256,7 +174253,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -174291,7 +174288,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -174332,7 +174329,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -174366,7 +174363,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174399,7 +174396,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -174434,7 +174431,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -174467,7 +174464,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174502,7 +174499,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -174537,7 +174534,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -174580,13 +174577,13 @@ void m68008_device::divs_w_ds_dd_if8() // 81c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -174600,7 +174597,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -174610,7 +174607,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -174625,7 +174622,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -174633,7 +174630,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -174668,7 +174665,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -174701,7 +174698,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -174867,7 +174864,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -174876,7 +174873,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -174884,12 +174881,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -174897,7 +174894,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -174914,7 +174911,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -174922,7 +174919,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -174962,7 +174959,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -174989,13 +174986,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175003,27 +175000,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175035,7 +175032,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175047,7 +175044,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175062,7 +175059,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175071,7 +175068,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175079,7 +175076,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175089,7 +175086,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175098,7 +175095,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175110,7 +175107,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175168,7 +175165,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -175181,7 +175178,7 @@ void m68008_device::divs_w_ais_dd_if8() // 81d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -175217,13 +175214,13 @@ void m68008_device::divs_w_ais_dd_if8() // 81d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175237,7 +175234,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175247,7 +175244,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175262,7 +175259,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -175270,7 +175267,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -175305,7 +175302,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -175338,7 +175335,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -175504,7 +175501,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -175513,7 +175510,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -175521,12 +175518,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -175534,7 +175531,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175551,7 +175548,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -175559,7 +175556,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -175599,7 +175596,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -175626,13 +175623,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175640,27 +175637,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175672,7 +175669,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175684,7 +175681,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -175699,7 +175696,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175708,7 +175705,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175716,7 +175713,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175726,7 +175723,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175735,7 +175732,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -175747,7 +175744,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -175805,7 +175802,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -175824,7 +175821,7 @@ void m68008_device::divs_w_aips_dd_if8() // 81d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -175858,13 +175855,13 @@ void m68008_device::divs_w_aips_dd_if8() // 81d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -175878,7 +175875,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175888,7 +175885,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -175903,7 +175900,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -175911,7 +175908,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -175946,7 +175943,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -175979,7 +175976,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -176145,7 +176142,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -176154,7 +176151,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -176162,12 +176159,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176175,7 +176172,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176192,7 +176189,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -176200,7 +176197,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -176240,7 +176237,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176267,13 +176264,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176281,27 +176278,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176313,7 +176310,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176325,7 +176322,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176340,7 +176337,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -176349,7 +176346,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -176357,7 +176354,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -176367,7 +176364,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -176376,7 +176373,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -176388,7 +176385,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -176446,7 +176443,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -176467,7 +176464,7 @@ void m68008_device::divs_w_pais_dd_if8() // 81e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -176501,13 +176498,13 @@ void m68008_device::divs_w_pais_dd_if8() // 81e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -176521,7 +176518,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176531,7 +176528,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176546,7 +176543,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -176554,7 +176551,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -176589,7 +176586,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -176622,7 +176619,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -176788,7 +176785,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -176797,7 +176794,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -176805,12 +176802,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176818,7 +176815,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176835,7 +176832,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -176843,7 +176840,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -176883,7 +176880,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -176910,13 +176907,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176924,27 +176921,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -176956,7 +176953,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176968,7 +176965,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -176983,7 +176980,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -176992,7 +176989,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177000,7 +176997,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177010,7 +177007,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177019,7 +177016,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -177031,7 +177028,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177089,7 +177086,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -177134,7 +177131,7 @@ void m68008_device::divs_w_das_dd_if8() // 81e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -177170,13 +177167,13 @@ void m68008_device::divs_w_das_dd_if8() // 81e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177190,7 +177187,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177200,7 +177197,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177215,7 +177212,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -177223,7 +177220,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -177258,7 +177255,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -177291,7 +177288,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -177457,7 +177454,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -177466,7 +177463,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -177474,12 +177471,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -177487,7 +177484,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177504,7 +177501,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -177512,7 +177509,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -177552,7 +177549,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -177579,13 +177576,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177593,27 +177590,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177625,7 +177622,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177637,7 +177634,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -177652,7 +177649,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -177661,7 +177658,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177669,7 +177666,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177679,7 +177676,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177688,7 +177685,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -177700,7 +177697,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -177758,7 +177755,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -177769,7 +177766,7 @@ void m68008_device::divs_w_dais_dd_if8() // 81f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -177851,7 +177848,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -177887,13 +177884,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -177907,7 +177904,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177917,7 +177914,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -177932,7 +177929,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -177940,7 +177937,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -177975,7 +177972,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -178008,7 +178005,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -178174,7 +178171,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -178183,7 +178180,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -178191,12 +178188,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178204,7 +178201,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178221,7 +178218,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -178229,7 +178226,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -178269,7 +178266,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178296,13 +178293,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178310,27 +178307,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -178342,7 +178339,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178354,7 +178351,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178369,7 +178366,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -178378,7 +178375,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -178386,7 +178383,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -178396,7 +178393,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -178405,7 +178402,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -178417,7 +178414,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -178475,7 +178472,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -178521,7 +178518,7 @@ void m68008_device::divs_w_adr16_dd_if8() // 81f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -178555,13 +178552,13 @@ void m68008_device::divs_w_adr16_dd_if8() // 81f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -178575,7 +178572,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -178585,7 +178582,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -178600,7 +178597,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -178608,7 +178605,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -178643,7 +178640,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -178676,7 +178673,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -178842,7 +178839,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -178851,7 +178848,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -178859,12 +178856,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178872,7 +178869,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178889,7 +178886,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -178897,7 +178894,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -178937,7 +178934,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -178964,13 +178961,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -178978,27 +178975,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179010,7 +179007,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179022,7 +179019,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179037,7 +179034,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179046,7 +179043,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179054,7 +179051,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179064,7 +179061,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179073,7 +179070,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179085,7 +179082,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179143,7 +179140,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -179220,7 +179217,7 @@ void m68008_device::divs_w_adr32_dd_if8() // 81f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -179254,13 +179251,13 @@ void m68008_device::divs_w_adr32_dd_if8() // 81f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179274,7 +179271,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179284,7 +179281,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179299,7 +179296,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -179307,7 +179304,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -179342,7 +179339,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -179375,7 +179372,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -179541,7 +179538,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -179550,7 +179547,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -179558,12 +179555,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -179571,7 +179568,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179588,7 +179585,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -179596,7 +179593,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -179636,7 +179633,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -179663,13 +179660,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179677,27 +179674,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179709,7 +179706,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179721,7 +179718,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -179736,7 +179733,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179745,7 +179742,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179753,7 +179750,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179763,7 +179760,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179772,7 +179769,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -179784,7 +179781,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -179842,7 +179839,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -179886,7 +179883,7 @@ void m68008_device::divs_w_dpc_dd_if8() // 81fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -179922,13 +179919,13 @@ void m68008_device::divs_w_dpc_dd_if8() // 81fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -179942,7 +179939,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179952,7 +179949,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -179967,7 +179964,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -179975,7 +179972,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -180010,7 +180007,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -180043,7 +180040,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -180209,7 +180206,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -180218,7 +180215,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -180226,12 +180223,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -180239,7 +180236,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180256,7 +180253,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -180264,7 +180261,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -180304,7 +180301,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -180331,13 +180328,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180345,27 +180342,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -180377,7 +180374,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180389,7 +180386,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180404,7 +180401,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -180413,7 +180410,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -180421,7 +180418,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -180431,7 +180428,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -180440,7 +180437,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -180452,7 +180449,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -180510,7 +180507,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -180520,7 +180517,7 @@ void m68008_device::divs_w_dpci_dd_if8() // 81fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -180602,7 +180599,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -180638,13 +180635,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -180658,7 +180655,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -180668,7 +180665,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -180683,7 +180680,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -180691,7 +180688,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -180726,7 +180723,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -180759,7 +180756,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -180925,7 +180922,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -180934,7 +180931,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -180942,12 +180939,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -180955,7 +180952,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -180972,7 +180969,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -180980,7 +180977,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -181020,7 +181017,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -181047,13 +181044,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181061,27 +181058,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181093,7 +181090,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181105,7 +181102,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181120,7 +181117,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181129,7 +181126,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181137,7 +181134,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181147,7 +181144,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181156,7 +181153,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181168,7 +181165,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181226,7 +181223,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -181274,13 +181271,13 @@ void m68008_device::divs_w_imm16_dd_if8() // 81fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181294,7 +181291,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181304,7 +181301,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181319,7 +181316,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -181327,7 +181324,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -181362,7 +181359,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -181395,7 +181392,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -181561,7 +181558,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -181570,7 +181567,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -181578,12 +181575,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -181591,7 +181588,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181608,7 +181605,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -181616,7 +181613,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -181656,7 +181653,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -181683,13 +181680,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181697,27 +181694,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -181729,7 +181726,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181741,7 +181738,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -181756,7 +181753,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181765,7 +181762,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181773,7 +181770,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181783,7 +181780,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -181792,7 +181789,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -181804,7 +181801,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -181862,7 +181859,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -181877,7 +181874,7 @@ void m68008_device::sub_b_ds_dd_if8() // 9000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -181927,7 +181924,7 @@ void m68008_device::sub_b_ais_dd_if8() // 9010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -181948,7 +181945,7 @@ void m68008_device::sub_b_ais_dd_if8() // 9010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182004,7 +182001,7 @@ void m68008_device::sub_b_aips_dd_if8() // 9018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -182023,7 +182020,7 @@ void m68008_device::sub_b_aips_dd_if8() // 9018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182081,7 +182078,7 @@ void m68008_device::sub_b_pais_dd_if8() // 9020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -182100,7 +182097,7 @@ void m68008_device::sub_b_pais_dd_if8() // 9020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182182,7 +182179,7 @@ void m68008_device::sub_b_das_dd_if8() // 9028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182203,7 +182200,7 @@ void m68008_device::sub_b_das_dd_if8() // 9028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182251,7 +182248,7 @@ void m68008_device::sub_b_dais_dd_if8() // 9030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -182333,7 +182330,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182354,7 +182351,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182437,7 +182434,7 @@ void m68008_device::sub_b_adr16_dd_if8() // 9038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -182456,7 +182453,7 @@ void m68008_device::sub_b_adr16_dd_if8() // 9038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182570,7 +182567,7 @@ void m68008_device::sub_b_adr32_dd_if8() // 9039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -182589,7 +182586,7 @@ void m68008_device::sub_b_adr32_dd_if8() // 9039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182670,7 +182667,7 @@ void m68008_device::sub_b_dpc_dd_if8() // 903a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182691,7 +182688,7 @@ void m68008_device::sub_b_dpc_dd_if8() // 903a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182738,7 +182735,7 @@ void m68008_device::sub_b_dpci_dd_if8() // 903b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -182820,7 +182817,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -182841,7 +182838,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182926,7 +182923,7 @@ void m68008_device::sub_b_imm8_dd_if8() // 903c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -182978,7 +182975,7 @@ void m68008_device::sub_w_ds_dd_if8() // 9040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183030,7 +183027,7 @@ void m68008_device::sub_w_as_dd_if8() // 9048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183080,7 +183077,7 @@ void m68008_device::sub_w_ais_dd_if8() // 9050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183116,7 +183113,7 @@ void m68008_device::sub_w_ais_dd_if8() // 9050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183172,7 +183169,7 @@ void m68008_device::sub_w_aips_dd_if8() // 9058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -183206,7 +183203,7 @@ void m68008_device::sub_w_aips_dd_if8() // 9058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183264,7 +183261,7 @@ void m68008_device::sub_w_pais_dd_if8() // 9060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -183298,7 +183295,7 @@ void m68008_device::sub_w_pais_dd_if8() // 9060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183380,7 +183377,7 @@ void m68008_device::sub_w_das_dd_if8() // 9068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183416,7 +183413,7 @@ void m68008_device::sub_w_das_dd_if8() // 9068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183464,7 +183461,7 @@ void m68008_device::sub_w_dais_dd_if8() // 9070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -183546,7 +183543,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183582,7 +183579,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183665,7 +183662,7 @@ void m68008_device::sub_w_adr16_dd_if8() // 9078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -183699,7 +183696,7 @@ void m68008_device::sub_w_adr16_dd_if8() // 9078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183813,7 +183810,7 @@ void m68008_device::sub_w_adr32_dd_if8() // 9079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -183847,7 +183844,7 @@ void m68008_device::sub_w_adr32_dd_if8() // 9079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -183928,7 +183925,7 @@ void m68008_device::sub_w_dpc_dd_if8() // 907a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -183964,7 +183961,7 @@ void m68008_device::sub_w_dpc_dd_if8() // 907a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -184011,7 +184008,7 @@ void m68008_device::sub_w_dpci_dd_if8() // 907b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -184093,7 +184090,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -184129,7 +184126,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -184214,7 +184211,7 @@ void m68008_device::sub_w_imm16_dd_if8() // 907c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -184266,7 +184263,7 @@ void m68008_device::sub_l_ds_dd_if8() // 9080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -184300,7 +184297,7 @@ void m68008_device::sub_l_ds_dd_if8() // 9080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -184326,7 +184323,7 @@ void m68008_device::sub_l_as_dd_if8() // 9088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -184360,7 +184357,7 @@ void m68008_device::sub_l_as_dd_if8() // 9088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -184384,7 +184381,7 @@ void m68008_device::sub_l_ais_dd_if8() // 9090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -184451,12 +184448,12 @@ void m68008_device::sub_l_ais_dd_if8() // 9090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184507,7 +184504,7 @@ void m68008_device::sub_l_aips_dd_if8() // 9098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -184577,12 +184574,12 @@ void m68008_device::sub_l_aips_dd_if8() // 9098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184632,7 +184629,7 @@ void m68008_device::sub_l_pais_dd_if8() // 90a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -184704,12 +184701,12 @@ void m68008_device::sub_l_pais_dd_if8() // 90a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184791,7 +184788,7 @@ void m68008_device::sub_l_das_dd_if8() // 90a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -184858,12 +184855,12 @@ void m68008_device::sub_l_das_dd_if8() // 90a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -184912,7 +184909,7 @@ void m68008_device::sub_l_dais_dd_if8() // 90b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -184993,7 +184990,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -185060,12 +185057,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185149,7 +185146,7 @@ void m68008_device::sub_l_adr16_dd_if8() // 90b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -185216,12 +185213,12 @@ void m68008_device::sub_l_adr16_dd_if8() // 90b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185336,7 +185333,7 @@ void m68008_device::sub_l_adr32_dd_if8() // 90b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -185403,12 +185400,12 @@ void m68008_device::sub_l_adr32_dd_if8() // 90b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185489,7 +185486,7 @@ void m68008_device::sub_l_dpc_dd_if8() // 90ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -185556,12 +185553,12 @@ void m68008_device::sub_l_dpc_dd_if8() // 90ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185609,7 +185606,7 @@ void m68008_device::sub_l_dpci_dd_if8() // 90bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -185690,7 +185687,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -185757,12 +185754,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -185879,7 +185876,7 @@ void m68008_device::sub_l_imm32_dd_if8() // 90bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -185913,7 +185910,7 @@ void m68008_device::sub_l_imm32_dd_if8() // 90bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -185939,7 +185936,7 @@ void m68008_device::suba_w_ds_ad_if8() // 90c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -185972,7 +185969,7 @@ void m68008_device::suba_w_ds_ad_if8() // 90c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -185997,7 +185994,7 @@ void m68008_device::suba_w_as_ad_if8() // 90c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186030,7 +186027,7 @@ void m68008_device::suba_w_as_ad_if8() // 90c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186053,7 +186050,7 @@ void m68008_device::suba_w_ais_ad_if8() // 90d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186089,7 +186086,7 @@ void m68008_device::suba_w_ais_ad_if8() // 90d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186122,7 +186119,7 @@ void m68008_device::suba_w_ais_ad_if8() // 90d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186151,7 +186148,7 @@ void m68008_device::suba_w_aips_ad_if8() // 90d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -186185,7 +186182,7 @@ void m68008_device::suba_w_aips_ad_if8() // 90d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186218,7 +186215,7 @@ void m68008_device::suba_w_aips_ad_if8() // 90d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186249,7 +186246,7 @@ void m68008_device::suba_w_pais_ad_if8() // 90e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -186283,7 +186280,7 @@ void m68008_device::suba_w_pais_ad_if8() // 90e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186316,7 +186313,7 @@ void m68008_device::suba_w_pais_ad_if8() // 90e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186371,7 +186368,7 @@ void m68008_device::suba_w_das_ad_if8() // 90e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186407,7 +186404,7 @@ void m68008_device::suba_w_das_ad_if8() // 90e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186440,7 +186437,7 @@ void m68008_device::suba_w_das_ad_if8() // 90e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186461,7 +186458,7 @@ void m68008_device::suba_w_dais_ad_if8() // 90f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -186543,7 +186540,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186579,7 +186576,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186612,7 +186609,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186668,7 +186665,7 @@ void m68008_device::suba_w_adr16_ad_if8() // 90f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -186702,7 +186699,7 @@ void m68008_device::suba_w_adr16_ad_if8() // 90f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186735,7 +186732,7 @@ void m68008_device::suba_w_adr16_ad_if8() // 90f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186822,7 +186819,7 @@ void m68008_device::suba_w_adr32_ad_if8() // 90f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -186856,7 +186853,7 @@ void m68008_device::suba_w_adr32_ad_if8() // 90f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -186889,7 +186886,7 @@ void m68008_device::suba_w_adr32_ad_if8() // 90f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -186943,7 +186940,7 @@ void m68008_device::suba_w_dpc_ad_if8() // 90fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -186979,7 +186976,7 @@ void m68008_device::suba_w_dpc_ad_if8() // 90fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -187012,7 +187009,7 @@ void m68008_device::suba_w_dpc_ad_if8() // 90fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -187032,7 +187029,7 @@ void m68008_device::suba_w_dpci_ad_if8() // 90fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -187114,7 +187111,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -187150,7 +187147,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -187183,7 +187180,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -187241,7 +187238,7 @@ void m68008_device::suba_w_imm16_ad_if8() // 90fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -187274,7 +187271,7 @@ void m68008_device::suba_w_imm16_ad_if8() // 90fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -187299,7 +187296,7 @@ void m68008_device::subx_b_ds_dd_if8() // 9100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -187355,7 +187352,7 @@ void m68008_device::subx_b_pais_paid_if8() // 9108 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -187392,7 +187389,7 @@ void m68008_device::subx_b_pais_paid_if8() // 9108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin alu_subx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187454,7 +187451,7 @@ void m68008_device::sub_b_dd_ais_if8() // 9110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -187475,7 +187472,7 @@ void m68008_device::sub_b_dd_ais_if8() // 9110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187543,7 +187540,7 @@ void m68008_device::sub_b_dd_aips_if8() // 9118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -187562,7 +187559,7 @@ void m68008_device::sub_b_dd_aips_if8() // 9118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187632,7 +187629,7 @@ void m68008_device::sub_b_dd_pais_if8() // 9120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -187651,7 +187648,7 @@ void m68008_device::sub_b_dd_pais_if8() // 9120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187745,7 +187742,7 @@ void m68008_device::sub_b_dd_das_if8() // 9128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -187766,7 +187763,7 @@ void m68008_device::sub_b_dd_das_if8() // 9128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -187826,7 +187823,7 @@ void m68008_device::sub_b_dd_dais_if8() // 9130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -187908,7 +187905,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -187929,7 +187926,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188024,7 +188021,7 @@ void m68008_device::sub_b_dd_adr16_if8() // 9138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -188043,7 +188040,7 @@ void m68008_device::sub_b_dd_adr16_if8() // 9138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188169,7 +188166,7 @@ void m68008_device::sub_b_dd_adr32_if8() // 9139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -188188,7 +188185,7 @@ void m68008_device::sub_b_dd_adr32_if8() // 9139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188252,7 +188249,7 @@ void m68008_device::subx_w_ds_dd_if8() // 9140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -188308,7 +188305,7 @@ void m68008_device::subx_w_pais_paid_if8() // 9148 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; @@ -188375,7 +188372,7 @@ void m68008_device::subx_w_pais_paid_if8() // 9148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin alu_subx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188452,7 +188449,7 @@ void m68008_device::sub_w_dd_ais_if8() // 9150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -188488,7 +188485,7 @@ void m68008_device::sub_w_dd_ais_if8() // 9150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188571,7 +188568,7 @@ void m68008_device::sub_w_dd_aips_if8() // 9158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -188605,7 +188602,7 @@ void m68008_device::sub_w_dd_aips_if8() // 9158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188690,7 +188687,7 @@ void m68008_device::sub_w_dd_pais_if8() // 9160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -188724,7 +188721,7 @@ void m68008_device::sub_w_dd_pais_if8() // 9160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188833,7 +188830,7 @@ void m68008_device::sub_w_dd_das_if8() // 9168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -188869,7 +188866,7 @@ void m68008_device::sub_w_dd_das_if8() // 9168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188944,7 +188941,7 @@ void m68008_device::sub_w_dd_dais_if8() // 9170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -189026,7 +189023,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -189062,7 +189059,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189172,7 +189169,7 @@ void m68008_device::sub_w_dd_adr16_if8() // 9178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189206,7 +189203,7 @@ void m68008_device::sub_w_dd_adr16_if8() // 9178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189347,7 +189344,7 @@ void m68008_device::sub_w_dd_adr32_if8() // 9179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189381,7 +189378,7 @@ void m68008_device::sub_w_dd_adr32_if8() // 9179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189460,7 +189457,7 @@ void m68008_device::subx_l_ds_dd_if8() // 9180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 @@ -189494,7 +189491,7 @@ void m68008_device::subx_l_ds_dd_if8() // 9180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -189555,7 +189552,7 @@ void m68008_device::subx_l_pais_paid_if8() // 9188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; @@ -189622,7 +189619,7 @@ void m68008_device::subx_l_pais_paid_if8() // 9188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin alu_subx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -189686,7 +189683,7 @@ void m68008_device::subx_l_pais_paid_if8() // 9188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin alu_subc(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189763,7 +189760,7 @@ void m68008_device::sub_l_dd_ais_if8() // 9190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189830,7 +189827,7 @@ void m68008_device::sub_l_dd_ais_if8() // 9190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189865,7 +189862,7 @@ void m68008_device::sub_l_dd_ais_if8() // 9190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -189940,7 +189937,7 @@ void m68008_device::sub_l_dd_aips_if8() // 9198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -190010,7 +190007,7 @@ void m68008_device::sub_l_dd_aips_if8() // 9198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190045,7 +190042,7 @@ void m68008_device::sub_l_dd_aips_if8() // 9198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190119,7 +190116,7 @@ void m68008_device::sub_l_dd_pais_if8() // 91a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -190191,7 +190188,7 @@ void m68008_device::sub_l_dd_pais_if8() // 91a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190226,7 +190223,7 @@ void m68008_device::sub_l_dd_pais_if8() // 91a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190332,7 +190329,7 @@ void m68008_device::sub_l_dd_das_if8() // 91a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -190399,7 +190396,7 @@ void m68008_device::sub_l_dd_das_if8() // 91a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190434,7 +190431,7 @@ void m68008_device::sub_l_dd_das_if8() // 91a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190507,7 +190504,7 @@ void m68008_device::sub_l_dd_dais_if8() // 91b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -190588,7 +190585,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -190655,7 +190652,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190690,7 +190687,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -190798,7 +190795,7 @@ void m68008_device::sub_l_dd_adr16_if8() // 91b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -190865,7 +190862,7 @@ void m68008_device::sub_l_dd_adr16_if8() // 91b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190900,7 +190897,7 @@ void m68008_device::sub_l_dd_adr16_if8() // 91b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -191039,7 +191036,7 @@ void m68008_device::sub_l_dd_adr32_if8() // 91b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -191106,7 +191103,7 @@ void m68008_device::sub_l_dd_adr32_if8() // 91b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191141,7 +191138,7 @@ void m68008_device::sub_l_dd_adr32_if8() // 91b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -191218,7 +191215,7 @@ void m68008_device::suba_l_ds_ad_if8() // 91c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -191251,7 +191248,7 @@ void m68008_device::suba_l_ds_ad_if8() // 91c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -191276,7 +191273,7 @@ void m68008_device::suba_l_as_ad_if8() // 91c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -191309,7 +191306,7 @@ void m68008_device::suba_l_as_ad_if8() // 91c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -191332,7 +191329,7 @@ void m68008_device::suba_l_ais_ad_if8() // 91d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -191399,11 +191396,11 @@ void m68008_device::suba_l_ais_ad_if8() // 91d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -191453,7 +191450,7 @@ void m68008_device::suba_l_aips_ad_if8() // 91d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -191523,11 +191520,11 @@ void m68008_device::suba_l_aips_ad_if8() // 91d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -191576,7 +191573,7 @@ void m68008_device::suba_l_pais_ad_if8() // 91e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -191648,11 +191645,11 @@ void m68008_device::suba_l_pais_ad_if8() // 91e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -191733,7 +191730,7 @@ void m68008_device::suba_l_das_ad_if8() // 91e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -191800,11 +191797,11 @@ void m68008_device::suba_l_das_ad_if8() // 91e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -191852,7 +191849,7 @@ void m68008_device::suba_l_dais_ad_if8() // 91f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -191933,7 +191930,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -192000,11 +191997,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192087,7 +192084,7 @@ void m68008_device::suba_l_adr16_ad_if8() // 91f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -192154,11 +192151,11 @@ void m68008_device::suba_l_adr16_ad_if8() // 91f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192272,7 +192269,7 @@ void m68008_device::suba_l_adr32_ad_if8() // 91f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -192339,11 +192336,11 @@ void m68008_device::suba_l_adr32_ad_if8() // 91f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192423,7 +192420,7 @@ void m68008_device::suba_l_dpc_ad_if8() // 91fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192490,11 +192487,11 @@ void m68008_device::suba_l_dpc_ad_if8() // 91fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192541,7 +192538,7 @@ void m68008_device::suba_l_dpci_ad_if8() // 91fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -192622,7 +192619,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192689,11 +192686,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -192809,7 +192806,7 @@ void m68008_device::suba_l_imm32_ad_if8() // 91fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -192842,7 +192839,7 @@ void m68008_device::suba_l_imm32_ad_if8() // 91fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -192867,7 +192864,7 @@ void m68008_device::cmp_b_ds_dd_if8() // b000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -192916,7 +192913,7 @@ void m68008_device::cmp_b_ais_dd_if8() // b010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -192937,7 +192934,7 @@ void m68008_device::cmp_b_ais_dd_if8() // b010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -192992,7 +192989,7 @@ void m68008_device::cmp_b_aips_dd_if8() // b018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -193011,7 +193008,7 @@ void m68008_device::cmp_b_aips_dd_if8() // b018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193068,7 +193065,7 @@ void m68008_device::cmp_b_pais_dd_if8() // b020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -193087,7 +193084,7 @@ void m68008_device::cmp_b_pais_dd_if8() // b020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193168,7 +193165,7 @@ void m68008_device::cmp_b_das_dd_if8() // b028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193189,7 +193186,7 @@ void m68008_device::cmp_b_das_dd_if8() // b028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193236,7 +193233,7 @@ void m68008_device::cmp_b_dais_dd_if8() // b030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -193318,7 +193315,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193339,7 +193336,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193421,7 +193418,7 @@ void m68008_device::cmp_b_adr16_dd_if8() // b038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -193440,7 +193437,7 @@ void m68008_device::cmp_b_adr16_dd_if8() // b038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193553,7 +193550,7 @@ void m68008_device::cmp_b_adr32_dd_if8() // b039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -193572,7 +193569,7 @@ void m68008_device::cmp_b_adr32_dd_if8() // b039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193652,7 +193649,7 @@ void m68008_device::cmp_b_dpc_dd_if8() // b03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193673,7 +193670,7 @@ void m68008_device::cmp_b_dpc_dd_if8() // b03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193719,7 +193716,7 @@ void m68008_device::cmp_b_dpci_dd_if8() // b03b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -193801,7 +193798,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193822,7 +193819,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193906,7 +193903,7 @@ void m68008_device::cmp_b_imm8_dd_if8() // b03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -193957,7 +193954,7 @@ void m68008_device::cmp_w_ds_dd_if8() // b040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194008,7 +194005,7 @@ void m68008_device::cmp_w_as_dd_if8() // b048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194057,7 +194054,7 @@ void m68008_device::cmp_w_ais_dd_if8() // b050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194093,7 +194090,7 @@ void m68008_device::cmp_w_ais_dd_if8() // b050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194148,7 +194145,7 @@ void m68008_device::cmp_w_aips_dd_if8() // b058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -194182,7 +194179,7 @@ void m68008_device::cmp_w_aips_dd_if8() // b058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194239,7 +194236,7 @@ void m68008_device::cmp_w_pais_dd_if8() // b060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -194273,7 +194270,7 @@ void m68008_device::cmp_w_pais_dd_if8() // b060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194354,7 +194351,7 @@ void m68008_device::cmp_w_das_dd_if8() // b068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194390,7 +194387,7 @@ void m68008_device::cmp_w_das_dd_if8() // b068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194437,7 +194434,7 @@ void m68008_device::cmp_w_dais_dd_if8() // b070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -194519,7 +194516,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194555,7 +194552,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194637,7 +194634,7 @@ void m68008_device::cmp_w_adr16_dd_if8() // b078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -194671,7 +194668,7 @@ void m68008_device::cmp_w_adr16_dd_if8() // b078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194784,7 +194781,7 @@ void m68008_device::cmp_w_adr32_dd_if8() // b079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -194818,7 +194815,7 @@ void m68008_device::cmp_w_adr32_dd_if8() // b079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194898,7 +194895,7 @@ void m68008_device::cmp_w_dpc_dd_if8() // b07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -194934,7 +194931,7 @@ void m68008_device::cmp_w_dpc_dd_if8() // b07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -194980,7 +194977,7 @@ void m68008_device::cmp_w_dpci_dd_if8() // b07b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -195062,7 +195059,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -195098,7 +195095,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -195182,7 +195179,7 @@ void m68008_device::cmp_w_imm16_dd_if8() // b07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -195233,11 +195230,11 @@ void m68008_device::cmp_l_ds_dd_if8() // b080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195289,11 +195286,11 @@ void m68008_device::cmp_l_as_dd_if8() // b088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195343,7 +195340,7 @@ void m68008_device::cmp_l_ais_dd_if8() // b090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -195410,11 +195407,11 @@ void m68008_device::cmp_l_ais_dd_if8() // b090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195464,7 +195461,7 @@ void m68008_device::cmp_l_aips_dd_if8() // b098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -195534,11 +195531,11 @@ void m68008_device::cmp_l_aips_dd_if8() // b098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195587,7 +195584,7 @@ void m68008_device::cmp_l_pais_dd_if8() // b0a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -195659,11 +195656,11 @@ void m68008_device::cmp_l_pais_dd_if8() // b0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195744,7 +195741,7 @@ void m68008_device::cmp_l_das_dd_if8() // b0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -195811,11 +195808,11 @@ void m68008_device::cmp_l_das_dd_if8() // b0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195863,7 +195860,7 @@ void m68008_device::cmp_l_dais_dd_if8() // b0b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -195944,7 +195941,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -196011,11 +196008,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196098,7 +196095,7 @@ void m68008_device::cmp_l_adr16_dd_if8() // b0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -196165,11 +196162,11 @@ void m68008_device::cmp_l_adr16_dd_if8() // b0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196283,7 +196280,7 @@ void m68008_device::cmp_l_adr32_dd_if8() // b0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -196350,11 +196347,11 @@ void m68008_device::cmp_l_adr32_dd_if8() // b0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196434,7 +196431,7 @@ void m68008_device::cmp_l_dpc_dd_if8() // b0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -196501,11 +196498,11 @@ void m68008_device::cmp_l_dpc_dd_if8() // b0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196552,7 +196549,7 @@ void m68008_device::cmp_l_dpci_dd_if8() // b0bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -196633,7 +196630,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -196700,11 +196697,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196820,11 +196817,11 @@ void m68008_device::cmp_l_imm32_dd_if8() // b0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196876,11 +196873,11 @@ void m68008_device::cmpa_w_ds_ad_if8() // b0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196932,11 +196929,11 @@ void m68008_device::cmpa_w_as_ad_if8() // b0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196986,7 +196983,7 @@ void m68008_device::cmpa_w_ais_ad_if8() // b0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197022,11 +197019,11 @@ void m68008_device::cmpa_w_ais_ad_if8() // b0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197082,7 +197079,7 @@ void m68008_device::cmpa_w_aips_ad_if8() // b0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -197116,11 +197113,11 @@ void m68008_device::cmpa_w_aips_ad_if8() // b0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197178,7 +197175,7 @@ void m68008_device::cmpa_w_pais_ad_if8() // b0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -197212,11 +197209,11 @@ void m68008_device::cmpa_w_pais_ad_if8() // b0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197298,7 +197295,7 @@ void m68008_device::cmpa_w_das_ad_if8() // b0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197334,11 +197331,11 @@ void m68008_device::cmpa_w_das_ad_if8() // b0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197386,7 +197383,7 @@ void m68008_device::cmpa_w_dais_ad_if8() // b0f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -197468,7 +197465,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197504,11 +197501,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197591,7 +197588,7 @@ void m68008_device::cmpa_w_adr16_ad_if8() // b0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -197625,11 +197622,11 @@ void m68008_device::cmpa_w_adr16_ad_if8() // b0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197743,7 +197740,7 @@ void m68008_device::cmpa_w_adr32_ad_if8() // b0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -197777,11 +197774,11 @@ void m68008_device::cmpa_w_adr32_ad_if8() // b0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197862,7 +197859,7 @@ void m68008_device::cmpa_w_dpc_ad_if8() // b0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -197898,11 +197895,11 @@ void m68008_device::cmpa_w_dpc_ad_if8() // b0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197949,7 +197946,7 @@ void m68008_device::cmpa_w_dpci_ad_if8() // b0fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -198031,7 +198028,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -198067,11 +198064,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198156,11 +198153,11 @@ void m68008_device::cmpa_w_imm16_ad_if8() // b0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198211,7 +198208,7 @@ void m68008_device::eor_b_dd_ds_if8() // b100 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -198219,7 +198216,7 @@ void m68008_device::eor_b_dd_ds_if8() // b100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -198283,7 +198280,7 @@ void m68008_device::cmpm_b_aips_aipd_if8() // b108 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -198303,7 +198300,7 @@ void m68008_device::cmpm_b_aips_aipd_if8() // b108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin alu_sub8(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198348,11 +198345,11 @@ void m68008_device::eor_b_dd_ais_if8() // b110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -198370,7 +198367,7 @@ void m68008_device::eor_b_dd_ais_if8() // b110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198407,7 +198404,7 @@ void m68008_device::eor_b_dd_ais_if8() // b110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -198436,12 +198433,12 @@ void m68008_device::eor_b_dd_aips_if8() // b118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -198460,7 +198457,7 @@ void m68008_device::eor_b_dd_aips_if8() // b118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198497,7 +198494,7 @@ void m68008_device::eor_b_dd_aips_if8() // b118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -198525,7 +198522,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -198533,7 +198530,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -198552,7 +198549,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198589,7 +198586,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -198615,7 +198612,7 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -198648,11 +198645,11 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -198670,7 +198667,7 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198707,7 +198704,7 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -198731,14 +198728,14 @@ void m68008_device::eor_b_dd_dais_if8() // b130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -198746,7 +198743,7 @@ void m68008_device::eor_b_dd_dais_if8() // b130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -198780,7 +198777,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -198816,11 +198813,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -198838,7 +198835,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198875,7 +198872,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -198903,7 +198900,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -198936,7 +198933,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -198955,7 +198952,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198992,7 +198989,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -199018,7 +199015,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -199052,7 +199049,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -199085,7 +199082,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -199104,7 +199101,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199141,7 +199138,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -199168,7 +199165,7 @@ void m68008_device::eor_w_dd_ds_if8() // b140 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -199176,7 +199173,7 @@ void m68008_device::eor_w_dd_ds_if8() // b140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -199255,7 +199252,7 @@ void m68008_device::cmpm_w_aips_aipd_if8() // b148 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199290,7 +199287,7 @@ void m68008_device::cmpm_w_aips_aipd_if8() // b148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199335,11 +199332,11 @@ void m68008_device::eor_w_dd_ais_if8() // b150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -199372,7 +199369,7 @@ void m68008_device::eor_w_dd_ais_if8() // b150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199409,7 +199406,7 @@ void m68008_device::eor_w_dd_ais_if8() // b150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199453,12 +199450,12 @@ void m68008_device::eor_w_dd_aips_if8() // b158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199492,7 +199489,7 @@ void m68008_device::eor_w_dd_aips_if8() // b158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199529,7 +199526,7 @@ void m68008_device::eor_w_dd_aips_if8() // b158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199572,7 +199569,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -199580,7 +199577,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199614,7 +199611,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199651,7 +199648,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199692,7 +199689,7 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -199725,11 +199722,11 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -199762,7 +199759,7 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199799,7 +199796,7 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -199838,14 +199835,14 @@ void m68008_device::eor_w_dd_dais_if8() // b170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -199853,7 +199850,7 @@ void m68008_device::eor_w_dd_dais_if8() // b170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -199887,7 +199884,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -199923,11 +199920,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -199960,7 +199957,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199997,7 +199994,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200040,7 +200037,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -200073,7 +200070,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200107,7 +200104,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200144,7 +200141,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200185,7 +200182,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -200219,7 +200216,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -200252,7 +200249,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200286,7 +200283,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200323,7 +200320,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200365,12 +200362,12 @@ void m68008_device::eor_l_dd_ds_if8() // b180 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -200400,7 +200397,7 @@ void m68008_device::eor_l_dd_ds_if8() // b180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry] alu_eor(high16(m_da[rx]), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -200409,7 +200406,7 @@ void m68008_device::eor_l_dd_ds_if8() // b180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -200492,7 +200489,7 @@ void m68008_device::cmpm_l_aips_aipd_if8() // b188 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200556,13 +200553,13 @@ void m68008_device::cmpm_l_aips_aipd_if8() // b188 f1f8 m_aob = m_pc; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); // 157 cmml7 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue alu_subc(m_alub, m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200607,7 +200604,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200642,7 +200639,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -200675,7 +200672,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200710,7 +200707,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200745,7 +200742,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200786,7 +200783,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200821,11 +200818,11 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -200858,7 +200855,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200893,7 +200890,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200928,7 +200925,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -200968,14 +200965,14 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -201009,7 +201006,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -201042,7 +201039,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201077,7 +201074,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201112,7 +201109,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201153,7 +201150,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -201185,7 +201182,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -201220,7 +201217,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -201253,7 +201250,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201288,7 +201285,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201323,7 +201320,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201362,14 +201359,14 @@ void m68008_device::eor_l_dd_dais_if8() // b1b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -201377,7 +201374,7 @@ void m68008_device::eor_l_dd_dais_if8() // b1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -201411,7 +201408,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -201446,7 +201443,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -201481,7 +201478,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -201514,7 +201511,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201549,7 +201546,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201584,7 +201581,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201627,7 +201624,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -201660,7 +201657,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -201695,7 +201692,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -201728,7 +201725,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201763,7 +201760,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -201798,7 +201795,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -201839,7 +201836,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -201873,7 +201870,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -201906,7 +201903,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -201941,7 +201938,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -201974,7 +201971,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202009,7 +202006,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -202044,7 +202041,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -202087,11 +202084,11 @@ void m68008_device::cmpa_l_ds_ad_if8() // b1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202143,11 +202140,11 @@ void m68008_device::cmpa_l_as_ad_if8() // b1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202197,7 +202194,7 @@ void m68008_device::cmpa_l_ais_ad_if8() // b1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -202264,11 +202261,11 @@ void m68008_device::cmpa_l_ais_ad_if8() // b1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202318,7 +202315,7 @@ void m68008_device::cmpa_l_aips_ad_if8() // b1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -202388,11 +202385,11 @@ void m68008_device::cmpa_l_aips_ad_if8() // b1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202441,7 +202438,7 @@ void m68008_device::cmpa_l_pais_ad_if8() // b1e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -202513,11 +202510,11 @@ void m68008_device::cmpa_l_pais_ad_if8() // b1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202598,7 +202595,7 @@ void m68008_device::cmpa_l_das_ad_if8() // b1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -202665,11 +202662,11 @@ void m68008_device::cmpa_l_das_ad_if8() // b1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202717,7 +202714,7 @@ void m68008_device::cmpa_l_dais_ad_if8() // b1f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -202798,7 +202795,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -202865,11 +202862,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202952,7 +202949,7 @@ void m68008_device::cmpa_l_adr16_ad_if8() // b1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -203019,11 +203016,11 @@ void m68008_device::cmpa_l_adr16_ad_if8() // b1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203137,7 +203134,7 @@ void m68008_device::cmpa_l_adr32_ad_if8() // b1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -203204,11 +203201,11 @@ void m68008_device::cmpa_l_adr32_ad_if8() // b1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203288,7 +203285,7 @@ void m68008_device::cmpa_l_dpc_ad_if8() // b1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -203355,11 +203352,11 @@ void m68008_device::cmpa_l_dpc_ad_if8() // b1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203406,7 +203403,7 @@ void m68008_device::cmpa_l_dpci_ad_if8() // b1fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -203487,7 +203484,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -203554,11 +203551,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203674,11 +203671,11 @@ void m68008_device::cmpa_l_imm32_ad_if8() // b1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203730,7 +203727,7 @@ void m68008_device::and_b_ds_dd_if8() // c000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203738,7 +203735,7 @@ void m68008_device::and_b_ds_dd_if8() // c000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -203781,11 +203778,11 @@ void m68008_device::and_b_ais_dd_if8() // c010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -203803,7 +203800,7 @@ void m68008_device::and_b_ais_dd_if8() // c010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203811,7 +203808,7 @@ void m68008_device::and_b_ais_dd_if8() // c010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -203857,12 +203854,12 @@ void m68008_device::and_b_aips_dd_if8() // c018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -203881,7 +203878,7 @@ void m68008_device::and_b_aips_dd_if8() // c018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203889,7 +203886,7 @@ void m68008_device::and_b_aips_dd_if8() // c018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -203934,7 +203931,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -203942,7 +203939,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -203961,7 +203958,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -203969,7 +203966,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204012,7 +204009,7 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204045,11 +204042,11 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -204067,7 +204064,7 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204075,7 +204072,7 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204116,14 +204113,14 @@ void m68008_device::and_b_dais_dd_if8() // c030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -204131,7 +204128,7 @@ void m68008_device::and_b_dais_dd_if8() // c030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204165,7 +204162,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204201,11 +204198,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -204223,7 +204220,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204231,7 +204228,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204276,7 +204273,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -204309,7 +204306,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -204328,7 +204325,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204336,7 +204333,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204379,7 +204376,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204413,7 +204410,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -204446,7 +204443,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -204465,7 +204462,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204473,7 +204470,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204515,7 +204512,7 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204548,11 +204545,11 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -204570,7 +204567,7 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204578,7 +204575,7 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204618,14 +204615,14 @@ void m68008_device::and_b_dpci_dd_if8() // c03b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -204633,7 +204630,7 @@ void m68008_device::and_b_dpci_dd_if8() // c03b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204667,7 +204664,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204703,11 +204700,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob); m_icount -= 4; @@ -204725,7 +204722,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204733,7 +204730,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204778,7 +204775,7 @@ void m68008_device::and_b_imm8_dd_if8() // c03c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204812,7 +204809,7 @@ void m68008_device::and_b_imm8_dd_if8() // c03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx] alu_and8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204820,7 +204817,7 @@ void m68008_device::and_b_imm8_dd_if8() // c03c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204865,7 +204862,7 @@ void m68008_device::and_w_ds_dd_if8() // c040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204873,7 +204870,7 @@ void m68008_device::and_w_ds_dd_if8() // c040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -204916,11 +204913,11 @@ void m68008_device::and_w_ais_dd_if8() // c050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -204953,7 +204950,7 @@ void m68008_device::and_w_ais_dd_if8() // c050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -204961,7 +204958,7 @@ void m68008_device::and_w_ais_dd_if8() // c050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205007,12 +205004,12 @@ void m68008_device::and_w_aips_dd_if8() // c058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -205046,7 +205043,7 @@ void m68008_device::and_w_aips_dd_if8() // c058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205054,7 +205051,7 @@ void m68008_device::and_w_aips_dd_if8() // c058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205099,7 +205096,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -205107,7 +205104,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -205141,7 +205138,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205149,7 +205146,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205192,7 +205189,7 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205225,11 +205222,11 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -205262,7 +205259,7 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205270,7 +205267,7 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205311,14 +205308,14 @@ void m68008_device::and_w_dais_dd_if8() // c070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -205326,7 +205323,7 @@ void m68008_device::and_w_dais_dd_if8() // c070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205360,7 +205357,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205396,11 +205393,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -205433,7 +205430,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205441,7 +205438,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205486,7 +205483,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -205519,7 +205516,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -205553,7 +205550,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205561,7 +205558,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205604,7 +205601,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205638,7 +205635,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -205671,7 +205668,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -205705,7 +205702,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205713,7 +205710,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205755,7 +205752,7 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205788,11 +205785,11 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205825,7 +205822,7 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -205833,7 +205830,7 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205873,14 +205870,14 @@ void m68008_device::and_w_dpci_dd_if8() // c07b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -205888,7 +205885,7 @@ void m68008_device::and_w_dpci_dd_if8() // c07b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205922,7 +205919,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205958,11 +205955,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -205995,7 +205992,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -206003,7 +206000,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206048,7 +206045,7 @@ void m68008_device::and_w_imm16_dd_if8() // c07c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206082,7 +206079,7 @@ void m68008_device::and_w_imm16_dd_if8() // c07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -206090,7 +206087,7 @@ void m68008_device::and_w_imm16_dd_if8() // c07c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206135,12 +206132,12 @@ void m68008_device::and_l_ds_dd_if8() // c080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206170,7 +206167,7 @@ void m68008_device::and_l_ds_dd_if8() // c080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx] alu_and(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -206179,7 +206176,7 @@ void m68008_device::and_l_ds_dd_if8() // c080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206195,7 +206192,7 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -206230,7 +206227,7 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -206263,12 +206260,12 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206304,7 +206301,7 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206320,7 +206317,7 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -206355,11 +206352,11 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -206392,12 +206389,12 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206433,7 +206430,7 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206448,14 +206445,14 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -206489,7 +206486,7 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -206522,12 +206519,12 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206563,7 +206560,7 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206579,7 +206576,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206611,7 +206608,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -206646,7 +206643,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -206679,12 +206676,12 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206720,7 +206717,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206734,14 +206731,14 @@ void m68008_device::and_l_dais_dd_if8() // c0b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -206749,7 +206746,7 @@ void m68008_device::and_l_dais_dd_if8() // c0b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206783,7 +206780,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -206818,7 +206815,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -206853,7 +206850,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -206886,12 +206883,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206927,7 +206924,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -206945,7 +206942,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -206978,7 +206975,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -207013,7 +207010,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -207046,12 +207043,12 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207087,7 +207084,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207103,7 +207100,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207137,7 +207134,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -207170,7 +207167,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -207205,7 +207202,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -207238,12 +207235,12 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207279,7 +207276,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207294,7 +207291,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207326,7 +207323,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -207361,7 +207358,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207394,12 +207391,12 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207435,7 +207432,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207448,14 +207445,14 @@ void m68008_device::and_l_dpci_dd_if8() // c0bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -207463,7 +207460,7 @@ void m68008_device::and_l_dpci_dd_if8() // c0bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207497,7 +207494,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207532,7 +207529,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -207567,7 +207564,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207600,12 +207597,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207641,7 +207638,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207657,7 +207654,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207691,7 +207688,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207725,12 +207722,12 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -207760,7 +207757,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx] alu_and(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -207769,7 +207766,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -207789,7 +207786,7 @@ void m68008_device::mulu_w_ds_dd_if8() // c0c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -207832,7 +207829,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207844,7 +207841,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207856,7 +207853,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -207874,7 +207871,7 @@ void m68008_device::mulu_w_ais_dd_if8() // c0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -207912,7 +207909,7 @@ void m68008_device::mulu_w_ais_dd_if8() // c0d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -207955,7 +207952,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207967,7 +207964,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -207979,7 +207976,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208003,7 +208000,7 @@ void m68008_device::mulu_w_aips_dd_if8() // c0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -208039,7 +208036,7 @@ void m68008_device::mulu_w_aips_dd_if8() // c0d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208082,7 +208079,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208094,7 +208091,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208106,7 +208103,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208132,7 +208129,7 @@ void m68008_device::mulu_w_pais_dd_if8() // c0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -208168,7 +208165,7 @@ void m68008_device::mulu_w_pais_dd_if8() // c0e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208211,7 +208208,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208223,7 +208220,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208235,7 +208232,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208285,7 +208282,7 @@ void m68008_device::mulu_w_das_dd_if8() // c0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -208323,7 +208320,7 @@ void m68008_device::mulu_w_das_dd_if8() // c0e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208366,7 +208363,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208378,7 +208375,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208390,7 +208387,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208406,7 +208403,7 @@ void m68008_device::mulu_w_dais_dd_if8() // c0f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -208488,7 +208485,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -208526,7 +208523,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208569,7 +208566,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208581,7 +208578,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208593,7 +208590,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208644,7 +208641,7 @@ void m68008_device::mulu_w_adr16_dd_if8() // c0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -208680,7 +208677,7 @@ void m68008_device::mulu_w_adr16_dd_if8() // c0f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208723,7 +208720,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208735,7 +208732,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208747,7 +208744,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208829,7 +208826,7 @@ void m68008_device::mulu_w_adr32_dd_if8() // c0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -208865,7 +208862,7 @@ void m68008_device::mulu_w_adr32_dd_if8() // c0f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -208908,7 +208905,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208920,7 +208917,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -208932,7 +208929,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -208981,7 +208978,7 @@ void m68008_device::mulu_w_dpc_dd_if8() // c0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209019,7 +209016,7 @@ void m68008_device::mulu_w_dpc_dd_if8() // c0fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -209062,7 +209059,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209074,7 +209071,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209086,7 +209083,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -209101,7 +209098,7 @@ void m68008_device::mulu_w_dpci_dd_if8() // c0fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -209183,7 +209180,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209221,7 +209218,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -209264,7 +209261,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209276,7 +209273,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209288,7 +209285,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -209343,7 +209340,7 @@ void m68008_device::mulu_w_imm16_dd_if8() // c0fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -209386,7 +209383,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209398,7 +209395,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -209410,7 +209407,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -209430,12 +209427,12 @@ void m68008_device::abcd_ds_dd_if8() // c100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx] alu_abcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -209490,7 +209487,7 @@ void m68008_device::abcd_pais_paid_if8() // c108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -209526,12 +209523,12 @@ void m68008_device::abcd_pais_paid_if8() // c108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin alu_abcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -209591,11 +209588,11 @@ void m68008_device::and_b_dd_ais_if8() // c110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -209613,7 +209610,7 @@ void m68008_device::and_b_dd_ais_if8() // c110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209650,7 +209647,7 @@ void m68008_device::and_b_dd_ais_if8() // c110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -209679,12 +209676,12 @@ void m68008_device::and_b_dd_aips_if8() // c118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -209703,7 +209700,7 @@ void m68008_device::and_b_dd_aips_if8() // c118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209740,7 +209737,7 @@ void m68008_device::and_b_dd_aips_if8() // c118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -209768,7 +209765,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -209776,7 +209773,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -209795,7 +209792,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209832,7 +209829,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -209858,7 +209855,7 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -209891,11 +209888,11 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -209913,7 +209910,7 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -209950,7 +209947,7 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -209974,14 +209971,14 @@ void m68008_device::and_b_dd_dais_if8() // c130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -209989,7 +209986,7 @@ void m68008_device::and_b_dd_dais_if8() // c130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -210023,7 +210020,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -210059,11 +210056,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -210081,7 +210078,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210118,7 +210115,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -210146,7 +210143,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -210179,7 +210176,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -210198,7 +210195,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210235,7 +210232,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -210261,7 +210258,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -210295,7 +210292,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -210328,7 +210325,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -210347,7 +210344,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210384,7 +210381,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -210518,11 +210515,11 @@ void m68008_device::and_w_dd_ais_if8() // c150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -210555,7 +210552,7 @@ void m68008_device::and_w_dd_ais_if8() // c150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210592,7 +210589,7 @@ void m68008_device::and_w_dd_ais_if8() // c150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -210636,12 +210633,12 @@ void m68008_device::and_w_dd_aips_if8() // c158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -210675,7 +210672,7 @@ void m68008_device::and_w_dd_aips_if8() // c158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210712,7 +210709,7 @@ void m68008_device::and_w_dd_aips_if8() // c158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -210755,7 +210752,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -210763,7 +210760,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -210797,7 +210794,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210834,7 +210831,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -210875,7 +210872,7 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -210908,11 +210905,11 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -210945,7 +210942,7 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -210982,7 +210979,7 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211021,14 +211018,14 @@ void m68008_device::and_w_dd_dais_if8() // c170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -211036,7 +211033,7 @@ void m68008_device::and_w_dd_dais_if8() // c170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -211070,7 +211067,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -211106,11 +211103,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -211143,7 +211140,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211180,7 +211177,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211223,7 +211220,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -211256,7 +211253,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -211290,7 +211287,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211327,7 +211324,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211368,7 +211365,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -211402,7 +211399,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -211435,7 +211432,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -211469,7 +211466,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211506,7 +211503,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211601,7 +211598,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -211636,7 +211633,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -211669,7 +211666,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211704,7 +211701,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -211739,7 +211736,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211780,7 +211777,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -211815,11 +211812,11 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -211852,7 +211849,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211887,7 +211884,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -211922,7 +211919,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -211962,14 +211959,14 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -212003,7 +212000,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -212036,7 +212033,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212071,7 +212068,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212106,7 +212103,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212147,7 +212144,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -212179,7 +212176,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -212214,7 +212211,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -212247,7 +212244,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212282,7 +212279,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212317,7 +212314,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212356,14 +212353,14 @@ void m68008_device::and_l_dd_dais_if8() // c1b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -212371,7 +212368,7 @@ void m68008_device::and_l_dd_dais_if8() // c1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -212405,7 +212402,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -212440,7 +212437,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -212475,7 +212472,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -212508,7 +212505,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212543,7 +212540,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212578,7 +212575,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212621,7 +212618,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -212654,7 +212651,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -212689,7 +212686,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -212722,7 +212719,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212757,7 +212754,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -212792,7 +212789,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -212833,7 +212830,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -212867,7 +212864,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -212900,7 +212897,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -212935,7 +212932,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -212968,7 +212965,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213003,7 +213000,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -213038,7 +213035,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -213083,7 +213080,7 @@ void m68008_device::muls_w_ds_dd_if8() // c1c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213126,7 +213123,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213140,7 +213137,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213152,7 +213149,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213163,7 +213160,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213177,7 +213174,7 @@ void m68008_device::muls_w_ais_dd_if8() // c1d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -213215,7 +213212,7 @@ void m68008_device::muls_w_ais_dd_if8() // c1d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213258,7 +213255,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213272,7 +213269,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213284,7 +213281,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213295,7 +213292,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213315,7 +213312,7 @@ void m68008_device::muls_w_aips_dd_if8() // c1d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -213351,7 +213348,7 @@ void m68008_device::muls_w_aips_dd_if8() // c1d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213394,7 +213391,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213408,7 +213405,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213420,7 +213417,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213431,7 +213428,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213453,7 +213450,7 @@ void m68008_device::muls_w_pais_dd_if8() // c1e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -213489,7 +213486,7 @@ void m68008_device::muls_w_pais_dd_if8() // c1e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213532,7 +213529,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213546,7 +213543,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213558,7 +213555,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213569,7 +213566,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213615,7 +213612,7 @@ void m68008_device::muls_w_das_dd_if8() // c1e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -213653,7 +213650,7 @@ void m68008_device::muls_w_das_dd_if8() // c1e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213696,7 +213693,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213710,7 +213707,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213722,7 +213719,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213733,7 +213730,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213745,7 +213742,7 @@ void m68008_device::muls_w_dais_dd_if8() // c1f0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -213827,7 +213824,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -213865,7 +213862,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -213908,7 +213905,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213922,7 +213919,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213934,7 +213931,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -213945,7 +213942,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -213992,7 +213989,7 @@ void m68008_device::muls_w_adr16_dd_if8() // c1f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -214028,7 +214025,7 @@ void m68008_device::muls_w_adr16_dd_if8() // c1f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214071,7 +214068,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214085,7 +214082,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214097,7 +214094,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214108,7 +214105,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214186,7 +214183,7 @@ void m68008_device::muls_w_adr32_dd_if8() // c1f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -214222,7 +214219,7 @@ void m68008_device::muls_w_adr32_dd_if8() // c1f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214265,7 +214262,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214279,7 +214276,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214291,7 +214288,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214302,7 +214299,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214347,7 +214344,7 @@ void m68008_device::muls_w_dpc_dd_if8() // c1fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -214385,7 +214382,7 @@ void m68008_device::muls_w_dpc_dd_if8() // c1fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214428,7 +214425,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214442,7 +214439,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214454,7 +214451,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214465,7 +214462,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214476,7 +214473,7 @@ void m68008_device::muls_w_dpci_dd_if8() // c1fb f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -214558,7 +214555,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -214596,7 +214593,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214639,7 +214636,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214653,7 +214650,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214665,7 +214662,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214676,7 +214673,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214727,7 +214724,7 @@ void m68008_device::muls_w_imm16_dd_if8() // c1fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -214770,7 +214767,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214784,7 +214781,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214796,7 +214793,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -214807,7 +214804,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -214823,7 +214820,7 @@ void m68008_device::add_b_ds_dd_if8() // d000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -214873,7 +214870,7 @@ void m68008_device::add_b_ais_dd_if8() // d010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -214894,7 +214891,7 @@ void m68008_device::add_b_ais_dd_if8() // d010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -214950,7 +214947,7 @@ void m68008_device::add_b_aips_dd_if8() // d018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -214969,7 +214966,7 @@ void m68008_device::add_b_aips_dd_if8() // d018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215027,7 +215024,7 @@ void m68008_device::add_b_pais_dd_if8() // d020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -215046,7 +215043,7 @@ void m68008_device::add_b_pais_dd_if8() // d020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215128,7 +215125,7 @@ void m68008_device::add_b_das_dd_if8() // d028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215149,7 +215146,7 @@ void m68008_device::add_b_das_dd_if8() // d028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215197,7 +215194,7 @@ void m68008_device::add_b_dais_dd_if8() // d030 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -215279,7 +215276,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215300,7 +215297,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215383,7 +215380,7 @@ void m68008_device::add_b_adr16_dd_if8() // d038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -215402,7 +215399,7 @@ void m68008_device::add_b_adr16_dd_if8() // d038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215516,7 +215513,7 @@ void m68008_device::add_b_adr32_dd_if8() // d039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -215535,7 +215532,7 @@ void m68008_device::add_b_adr32_dd_if8() // d039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215616,7 +215613,7 @@ void m68008_device::add_b_dpc_dd_if8() // d03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215637,7 +215634,7 @@ void m68008_device::add_b_dpc_dd_if8() // d03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215684,7 +215681,7 @@ void m68008_device::add_b_dpci_dd_if8() // d03b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -215766,7 +215763,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215787,7 +215784,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215872,7 +215869,7 @@ void m68008_device::add_b_imm8_dd_if8() // d03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx] alu_add8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215924,7 +215921,7 @@ void m68008_device::add_w_ds_dd_if8() // d040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -215976,7 +215973,7 @@ void m68008_device::add_w_as_dd_if8() // d048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216026,7 +216023,7 @@ void m68008_device::add_w_ais_dd_if8() // d050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216062,7 +216059,7 @@ void m68008_device::add_w_ais_dd_if8() // d050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216118,7 +216115,7 @@ void m68008_device::add_w_aips_dd_if8() // d058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -216152,7 +216149,7 @@ void m68008_device::add_w_aips_dd_if8() // d058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216210,7 +216207,7 @@ void m68008_device::add_w_pais_dd_if8() // d060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -216244,7 +216241,7 @@ void m68008_device::add_w_pais_dd_if8() // d060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216326,7 +216323,7 @@ void m68008_device::add_w_das_dd_if8() // d068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216362,7 +216359,7 @@ void m68008_device::add_w_das_dd_if8() // d068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216410,7 +216407,7 @@ void m68008_device::add_w_dais_dd_if8() // d070 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -216492,7 +216489,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216528,7 +216525,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216611,7 +216608,7 @@ void m68008_device::add_w_adr16_dd_if8() // d078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -216645,7 +216642,7 @@ void m68008_device::add_w_adr16_dd_if8() // d078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216759,7 +216756,7 @@ void m68008_device::add_w_adr32_dd_if8() // d079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -216793,7 +216790,7 @@ void m68008_device::add_w_adr32_dd_if8() // d079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216874,7 +216871,7 @@ void m68008_device::add_w_dpc_dd_if8() // d07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216910,7 +216907,7 @@ void m68008_device::add_w_dpc_dd_if8() // d07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -216957,7 +216954,7 @@ void m68008_device::add_w_dpci_dd_if8() // d07b f1ff { int rx = (m_irdi >> 9) & 7; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -217039,7 +217036,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -217075,7 +217072,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -217160,7 +217157,7 @@ void m68008_device::add_w_imm16_dd_if8() // d07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -217212,7 +217209,7 @@ void m68008_device::add_l_ds_dd_if8() // d080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -217246,7 +217243,7 @@ void m68008_device::add_l_ds_dd_if8() // d080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -217272,7 +217269,7 @@ void m68008_device::add_l_as_dd_if8() // d088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -217306,7 +217303,7 @@ void m68008_device::add_l_as_dd_if8() // d088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -217330,7 +217327,7 @@ void m68008_device::add_l_ais_dd_if8() // d090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -217397,12 +217394,12 @@ void m68008_device::add_l_ais_dd_if8() // d090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217453,7 +217450,7 @@ void m68008_device::add_l_aips_dd_if8() // d098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -217523,12 +217520,12 @@ void m68008_device::add_l_aips_dd_if8() // d098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217578,7 +217575,7 @@ void m68008_device::add_l_pais_dd_if8() // d0a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -217650,12 +217647,12 @@ void m68008_device::add_l_pais_dd_if8() // d0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217737,7 +217734,7 @@ void m68008_device::add_l_das_dd_if8() // d0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -217804,12 +217801,12 @@ void m68008_device::add_l_das_dd_if8() // d0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217858,7 +217855,7 @@ void m68008_device::add_l_dais_dd_if8() // d0b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -217939,7 +217936,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -218006,12 +218003,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218095,7 +218092,7 @@ void m68008_device::add_l_adr16_dd_if8() // d0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -218162,12 +218159,12 @@ void m68008_device::add_l_adr16_dd_if8() // d0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218282,7 +218279,7 @@ void m68008_device::add_l_adr32_dd_if8() // d0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -218349,12 +218346,12 @@ void m68008_device::add_l_adr32_dd_if8() // d0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218435,7 +218432,7 @@ void m68008_device::add_l_dpc_dd_if8() // d0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -218502,12 +218499,12 @@ void m68008_device::add_l_dpc_dd_if8() // d0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218555,7 +218552,7 @@ void m68008_device::add_l_dpci_dd_if8() // d0bb f1ff { int rx = (m_irdi >> 9) & 7; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -218636,7 +218633,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -218703,12 +218700,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218825,7 +218822,7 @@ void m68008_device::add_l_imm32_dd_if8() // d0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -218859,7 +218856,7 @@ void m68008_device::add_l_imm32_dd_if8() // d0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -218885,7 +218882,7 @@ void m68008_device::adda_w_ds_ad_if8() // d0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -218918,7 +218915,7 @@ void m68008_device::adda_w_ds_ad_if8() // d0c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -218943,7 +218940,7 @@ void m68008_device::adda_w_as_ad_if8() // d0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -218976,7 +218973,7 @@ void m68008_device::adda_w_as_ad_if8() // d0c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -218999,7 +218996,7 @@ void m68008_device::adda_w_ais_ad_if8() // d0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219035,7 +219032,7 @@ void m68008_device::adda_w_ais_ad_if8() // d0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219068,7 +219065,7 @@ void m68008_device::adda_w_ais_ad_if8() // d0d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219097,7 +219094,7 @@ void m68008_device::adda_w_aips_ad_if8() // d0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -219131,7 +219128,7 @@ void m68008_device::adda_w_aips_ad_if8() // d0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219164,7 +219161,7 @@ void m68008_device::adda_w_aips_ad_if8() // d0d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219195,7 +219192,7 @@ void m68008_device::adda_w_pais_ad_if8() // d0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -219229,7 +219226,7 @@ void m68008_device::adda_w_pais_ad_if8() // d0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219262,7 +219259,7 @@ void m68008_device::adda_w_pais_ad_if8() // d0e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219317,7 +219314,7 @@ void m68008_device::adda_w_das_ad_if8() // d0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219353,7 +219350,7 @@ void m68008_device::adda_w_das_ad_if8() // d0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219386,7 +219383,7 @@ void m68008_device::adda_w_das_ad_if8() // d0e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219407,7 +219404,7 @@ void m68008_device::adda_w_dais_ad_if8() // d0f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -219489,7 +219486,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219525,7 +219522,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219558,7 +219555,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219614,7 +219611,7 @@ void m68008_device::adda_w_adr16_ad_if8() // d0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -219648,7 +219645,7 @@ void m68008_device::adda_w_adr16_ad_if8() // d0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219681,7 +219678,7 @@ void m68008_device::adda_w_adr16_ad_if8() // d0f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219768,7 +219765,7 @@ void m68008_device::adda_w_adr32_ad_if8() // d0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -219802,7 +219799,7 @@ void m68008_device::adda_w_adr32_ad_if8() // d0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219835,7 +219832,7 @@ void m68008_device::adda_w_adr32_ad_if8() // d0f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219889,7 +219886,7 @@ void m68008_device::adda_w_dpc_ad_if8() // d0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -219925,7 +219922,7 @@ void m68008_device::adda_w_dpc_ad_if8() // d0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -219958,7 +219955,7 @@ void m68008_device::adda_w_dpc_ad_if8() // d0fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219978,7 +219975,7 @@ void m68008_device::adda_w_dpci_ad_if8() // d0fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -220060,7 +220057,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -220096,7 +220093,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -220129,7 +220126,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -220187,7 +220184,7 @@ void m68008_device::adda_w_imm16_ad_if8() // d0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -220220,7 +220217,7 @@ void m68008_device::adda_w_imm16_ad_if8() // d0fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -220245,7 +220242,7 @@ void m68008_device::addx_b_ds_dd_if8() // d100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -220253,7 +220250,7 @@ void m68008_device::addx_b_ds_dd_if8() // d100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -220298,16 +220295,16 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -220326,7 +220323,7 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); m_icount -= 4; @@ -220342,7 +220339,7 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin alu_addx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220379,7 +220376,7 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob, m_dbout); m_icount -= 4; @@ -220405,7 +220402,7 @@ void m68008_device::add_b_dd_ais_if8() // d110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -220426,7 +220423,7 @@ void m68008_device::add_b_dd_ais_if8() // d110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220494,7 +220491,7 @@ void m68008_device::add_b_dd_aips_if8() // d118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -220513,7 +220510,7 @@ void m68008_device::add_b_dd_aips_if8() // d118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220583,7 +220580,7 @@ void m68008_device::add_b_dd_pais_if8() // d120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -220602,7 +220599,7 @@ void m68008_device::add_b_dd_pais_if8() // d120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220696,7 +220693,7 @@ void m68008_device::add_b_dd_das_if8() // d128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -220717,7 +220714,7 @@ void m68008_device::add_b_dd_das_if8() // d128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220777,7 +220774,7 @@ void m68008_device::add_b_dd_dais_if8() // d130 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -220859,7 +220856,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -220880,7 +220877,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -220975,7 +220972,7 @@ void m68008_device::add_b_dd_adr16_if8() // d138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -220994,7 +220991,7 @@ void m68008_device::add_b_dd_adr16_if8() // d138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221120,7 +221117,7 @@ void m68008_device::add_b_dd_adr32_if8() // d139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob); @@ -221139,7 +221136,7 @@ void m68008_device::add_b_dd_adr32_if8() // d139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221203,7 +221200,7 @@ void m68008_device::addx_w_ds_dd_if8() // d140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -221211,7 +221208,7 @@ void m68008_device::addx_w_ds_dd_if8() // d140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -221256,16 +221253,16 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -221299,7 +221296,7 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -221330,7 +221327,7 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221367,7 +221364,7 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -221408,7 +221405,7 @@ void m68008_device::add_w_dd_ais_if8() // d150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221444,7 +221441,7 @@ void m68008_device::add_w_dd_ais_if8() // d150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221527,7 +221524,7 @@ void m68008_device::add_w_dd_aips_if8() // d158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -221561,7 +221558,7 @@ void m68008_device::add_w_dd_aips_if8() // d158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221646,7 +221643,7 @@ void m68008_device::add_w_dd_pais_if8() // d160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -221680,7 +221677,7 @@ void m68008_device::add_w_dd_pais_if8() // d160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221789,7 +221786,7 @@ void m68008_device::add_w_dd_das_if8() // d168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221825,7 +221822,7 @@ void m68008_device::add_w_dd_das_if8() // d168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -221900,7 +221897,7 @@ void m68008_device::add_w_dd_dais_if8() // d170 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -221982,7 +221979,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222018,7 +222015,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222128,7 +222125,7 @@ void m68008_device::add_w_dd_adr16_if8() // d178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -222162,7 +222159,7 @@ void m68008_device::add_w_dd_adr16_if8() // d178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222303,7 +222300,7 @@ void m68008_device::add_w_dd_adr32_if8() // d179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -222337,7 +222334,7 @@ void m68008_device::add_w_dd_adr32_if8() // d179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222416,12 +222413,12 @@ void m68008_device::addx_l_ds_dd_if8() // d180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -222451,7 +222448,7 @@ void m68008_device::addx_l_ds_dd_if8() // d180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx] + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx] alu_addx(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -222460,7 +222457,7 @@ void m68008_device::addx_l_ds_dd_if8() // d180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -222478,13 +222475,13 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_icount -= 2; // 048 asxl2 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -222515,11 +222512,11 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -222551,7 +222548,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -222584,7 +222581,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin alu_addx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -222619,7 +222616,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = ext32(m_dbin); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -222649,7 +222646,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222686,7 +222683,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -222727,7 +222724,7 @@ void m68008_device::add_l_dd_ais_if8() // d190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -222794,7 +222791,7 @@ void m68008_device::add_l_dd_ais_if8() // d190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -222829,7 +222826,7 @@ void m68008_device::add_l_dd_ais_if8() // d190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -222904,7 +222901,7 @@ void m68008_device::add_l_dd_aips_if8() // d198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -222974,7 +222971,7 @@ void m68008_device::add_l_dd_aips_if8() // d198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223009,7 +223006,7 @@ void m68008_device::add_l_dd_aips_if8() // d198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223083,7 +223080,7 @@ void m68008_device::add_l_dd_pais_if8() // d1a0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -223155,7 +223152,7 @@ void m68008_device::add_l_dd_pais_if8() // d1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223190,7 +223187,7 @@ void m68008_device::add_l_dd_pais_if8() // d1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223296,7 +223293,7 @@ void m68008_device::add_l_dd_das_if8() // d1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -223363,7 +223360,7 @@ void m68008_device::add_l_dd_das_if8() // d1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223398,7 +223395,7 @@ void m68008_device::add_l_dd_das_if8() // d1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223471,7 +223468,7 @@ void m68008_device::add_l_dd_dais_if8() // d1b0 f1f8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -223552,7 +223549,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -223619,7 +223616,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223654,7 +223651,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -223762,7 +223759,7 @@ void m68008_device::add_l_dd_adr16_if8() // d1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -223829,7 +223826,7 @@ void m68008_device::add_l_dd_adr16_if8() // d1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -223864,7 +223861,7 @@ void m68008_device::add_l_dd_adr16_if8() // d1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -224003,7 +224000,7 @@ void m68008_device::add_l_dd_adr32_if8() // d1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -224070,7 +224067,7 @@ void m68008_device::add_l_dd_adr32_if8() // d1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224105,7 +224102,7 @@ void m68008_device::add_l_dd_adr32_if8() // d1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -224182,7 +224179,7 @@ void m68008_device::adda_l_ds_ad_if8() // d1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -224215,7 +224212,7 @@ void m68008_device::adda_l_ds_ad_if8() // d1c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -224240,7 +224237,7 @@ void m68008_device::adda_l_as_ad_if8() // d1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -224273,7 +224270,7 @@ void m68008_device::adda_l_as_ad_if8() // d1c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -224296,7 +224293,7 @@ void m68008_device::adda_l_ais_ad_if8() // d1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -224363,11 +224360,11 @@ void m68008_device::adda_l_ais_ad_if8() // d1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -224417,7 +224414,7 @@ void m68008_device::adda_l_aips_ad_if8() // d1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -224487,11 +224484,11 @@ void m68008_device::adda_l_aips_ad_if8() // d1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -224540,7 +224537,7 @@ void m68008_device::adda_l_pais_ad_if8() // d1e0 f1f8 int ry = map_sp((m_irdi & 7) | 8); // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -224612,11 +224609,11 @@ void m68008_device::adda_l_pais_ad_if8() // d1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -224697,7 +224694,7 @@ void m68008_device::adda_l_das_ad_if8() // d1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -224764,11 +224761,11 @@ void m68008_device::adda_l_das_ad_if8() // d1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -224816,7 +224813,7 @@ void m68008_device::adda_l_dais_ad_if8() // d1f0 f1f8 int rx = map_sp(((m_irdi >> 9) & 7) | 8); int ry = map_sp((m_irdi & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -224897,7 +224894,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -224964,11 +224961,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225051,7 +225048,7 @@ void m68008_device::adda_l_adr16_ad_if8() // d1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -225118,11 +225115,11 @@ void m68008_device::adda_l_adr16_ad_if8() // d1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225236,7 +225233,7 @@ void m68008_device::adda_l_adr32_ad_if8() // d1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -225303,11 +225300,11 @@ void m68008_device::adda_l_adr32_ad_if8() // d1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225387,7 +225384,7 @@ void m68008_device::adda_l_dpc_ad_if8() // d1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225454,11 +225451,11 @@ void m68008_device::adda_l_dpc_ad_if8() // d1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225505,7 +225502,7 @@ void m68008_device::adda_l_dpci_ad_if8() // d1fb f1ff { int rx = map_sp(((m_irdi >> 9) & 7) | 8); // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -225586,7 +225583,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225653,11 +225650,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -225773,7 +225770,7 @@ void m68008_device::adda_l_imm32_ad_if8() // d1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -225806,7 +225803,7 @@ void m68008_device::adda_l_imm32_ad_if8() // d1fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -225830,13 +225827,13 @@ void m68008_device::asr_b_imm3_ds_if8() // e000 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225875,7 +225872,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -225905,13 +225902,13 @@ void m68008_device::lsr_b_imm3_ds_if8() // e008 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225950,7 +225947,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -225980,13 +225977,13 @@ void m68008_device::roxr_b_imm3_ds_if8() // e010 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226025,7 +226022,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226055,13 +226052,13 @@ void m68008_device::ror_b_imm3_ds_if8() // e018 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226100,7 +226097,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -226131,13 +226128,13 @@ void m68008_device::asr_b_dd_ds_if8() // e020 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226176,7 +226173,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226207,13 +226204,13 @@ void m68008_device::lsr_b_dd_ds_if8() // e028 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226252,7 +226249,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226283,13 +226280,13 @@ void m68008_device::roxr_b_dd_ds_if8() // e030 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226328,7 +226325,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226359,13 +226356,13 @@ void m68008_device::ror_b_dd_ds_if8() // e038 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226404,7 +226401,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -226434,13 +226431,13 @@ void m68008_device::asr_w_imm3_ds_if8() // e040 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226479,7 +226476,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226509,13 +226506,13 @@ void m68008_device::lsr_w_imm3_ds_if8() // e048 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226554,7 +226551,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226584,13 +226581,13 @@ void m68008_device::roxr_w_imm3_ds_if8() // e050 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226629,7 +226626,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226659,13 +226656,13 @@ void m68008_device::ror_w_imm3_ds_if8() // e058 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226704,7 +226701,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -226735,13 +226732,13 @@ void m68008_device::asr_w_dd_ds_if8() // e060 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226780,7 +226777,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226811,13 +226808,13 @@ void m68008_device::lsr_w_dd_ds_if8() // e068 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226856,7 +226853,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226887,13 +226884,13 @@ void m68008_device::roxr_w_dd_ds_if8() // e070 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226932,7 +226929,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -226963,13 +226960,13 @@ void m68008_device::ror_w_dd_ds_if8() // e078 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227008,7 +227005,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -227038,13 +227035,13 @@ void m68008_device::asr_l_imm3_ds_if8() // e080 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227083,7 +227080,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227100,7 +227097,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227119,13 +227116,13 @@ void m68008_device::lsr_l_imm3_ds_if8() // e088 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227164,7 +227161,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227181,7 +227178,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227200,13 +227197,13 @@ void m68008_device::roxr_l_imm3_ds_if8() // e090 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227245,7 +227242,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227262,7 +227259,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227281,13 +227278,13 @@ void m68008_device::ror_l_imm3_ds_if8() // e098 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227326,7 +227323,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -227343,7 +227340,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227363,13 +227360,13 @@ void m68008_device::asr_l_dd_ds_if8() // e0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227408,7 +227405,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227425,7 +227422,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227445,13 +227442,13 @@ void m68008_device::lsr_l_dd_ds_if8() // e0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227490,7 +227487,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227507,7 +227504,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227527,13 +227524,13 @@ void m68008_device::roxr_l_dd_ds_if8() // e0b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227572,7 +227569,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -227589,7 +227586,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227609,13 +227606,13 @@ void m68008_device::ror_l_dd_ds_if8() // e0b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227654,7 +227651,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -227671,7 +227668,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -227689,7 +227686,7 @@ void m68008_device::asr_ais_if8() // e0d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -227725,12 +227722,12 @@ void m68008_device::asr_ais_if8() // e0d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227813,7 +227810,7 @@ void m68008_device::asr_aips_if8() // e0d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -227847,12 +227844,12 @@ void m68008_device::asr_aips_if8() // e0d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227937,7 +227934,7 @@ void m68008_device::asr_pais_if8() // e0e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -227971,12 +227968,12 @@ void m68008_device::asr_pais_if8() // e0e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228085,7 +228082,7 @@ void m68008_device::asr_das_if8() // e0e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -228121,12 +228118,12 @@ void m68008_device::asr_das_if8() // e0e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228201,7 +228198,7 @@ void m68008_device::asr_dais_if8() // e0f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -228283,7 +228280,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -228319,12 +228316,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228434,7 +228431,7 @@ void m68008_device::asr_adr16_if8() // e0f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -228468,12 +228465,12 @@ void m68008_device::asr_adr16_if8() // e0f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228614,7 +228611,7 @@ void m68008_device::asr_adr32_if8() // e0f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -228648,12 +228645,12 @@ void m68008_device::asr_adr32_if8() // e0f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228731,13 +228728,13 @@ void m68008_device::asl_b_imm3_ds_if8() // e100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228776,7 +228773,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -228806,13 +228803,13 @@ void m68008_device::lsl_b_imm3_ds_if8() // e108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228851,7 +228848,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -228865,7 +228862,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -228882,13 +228879,13 @@ void m68008_device::roxl_b_imm3_ds_if8() // e110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228927,7 +228924,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -228957,13 +228954,13 @@ void m68008_device::rol_b_imm3_ds_if8() // e118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229002,7 +228999,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229033,13 +229030,13 @@ void m68008_device::asl_b_dd_ds_if8() // e120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229078,7 +229075,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229109,13 +229106,13 @@ void m68008_device::lsl_b_dd_ds_if8() // e128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229154,7 +229151,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229168,7 +229165,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -229186,13 +229183,13 @@ void m68008_device::roxl_b_dd_ds_if8() // e130 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229231,7 +229228,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229262,13 +229259,13 @@ void m68008_device::rol_b_dd_ds_if8() // e138 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229307,7 +229304,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229337,13 +229334,13 @@ void m68008_device::asl_w_imm3_ds_if8() // e140 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229382,7 +229379,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229412,13 +229409,13 @@ void m68008_device::lsl_w_imm3_ds_if8() // e148 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229457,7 +229454,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229471,7 +229468,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -229488,13 +229485,13 @@ void m68008_device::roxl_w_imm3_ds_if8() // e150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229533,7 +229530,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229563,13 +229560,13 @@ void m68008_device::rol_w_imm3_ds_if8() // e158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229608,7 +229605,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229639,13 +229636,13 @@ void m68008_device::asl_w_dd_ds_if8() // e160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229684,7 +229681,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229715,13 +229712,13 @@ void m68008_device::lsl_w_dd_ds_if8() // e168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229760,7 +229757,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229774,7 +229771,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -229792,13 +229789,13 @@ void m68008_device::roxl_w_dd_ds_if8() // e170 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229837,7 +229834,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -229868,13 +229865,13 @@ void m68008_device::rol_w_dd_ds_if8() // e178 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229913,7 +229910,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -229943,13 +229940,13 @@ void m68008_device::asl_l_imm3_ds_if8() // e180 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229988,7 +229985,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230005,7 +230002,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230024,13 +230021,13 @@ void m68008_device::lsl_l_imm3_ds_if8() // e188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230069,7 +230066,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230081,14 +230078,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230107,13 +230104,13 @@ void m68008_device::roxl_l_imm3_ds_if8() // e190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230152,7 +230149,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230169,7 +230166,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230188,13 +230185,13 @@ void m68008_device::rol_l_imm3_ds_if8() // e198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230233,7 +230230,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -230250,7 +230247,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230270,13 +230267,13 @@ void m68008_device::asl_l_dd_ds_if8() // e1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230315,7 +230312,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230332,7 +230329,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230352,13 +230349,13 @@ void m68008_device::lsl_l_dd_ds_if8() // e1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230397,7 +230394,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230409,14 +230406,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230436,13 +230433,13 @@ void m68008_device::roxl_l_dd_ds_if8() // e1b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230481,7 +230478,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -230498,7 +230495,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230518,13 +230515,13 @@ void m68008_device::rol_l_dd_ds_if8() // e1b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230563,7 +230560,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -230580,7 +230577,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -230598,7 +230595,7 @@ void m68008_device::asl_ais_if8() // e1d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -230634,12 +230631,12 @@ void m68008_device::asl_ais_if8() // e1d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230722,7 +230719,7 @@ void m68008_device::asl_aips_if8() // e1d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -230756,12 +230753,12 @@ void m68008_device::asl_aips_if8() // e1d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230846,7 +230843,7 @@ void m68008_device::asl_pais_if8() // e1e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -230880,12 +230877,12 @@ void m68008_device::asl_pais_if8() // e1e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230994,7 +230991,7 @@ void m68008_device::asl_das_if8() // e1e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -231030,12 +231027,12 @@ void m68008_device::asl_das_if8() // e1e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231110,7 +231107,7 @@ void m68008_device::asl_dais_if8() // e1f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -231192,7 +231189,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -231228,12 +231225,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231343,7 +231340,7 @@ void m68008_device::asl_adr16_if8() // e1f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231377,12 +231374,12 @@ void m68008_device::asl_adr16_if8() // e1f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231523,7 +231520,7 @@ void m68008_device::asl_adr32_if8() // e1f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231557,12 +231554,12 @@ void m68008_device::asl_adr32_if8() // e1f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231639,7 +231636,7 @@ void m68008_device::lsr_ais_if8() // e2d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -231675,12 +231672,12 @@ void m68008_device::lsr_ais_if8() // e2d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231763,7 +231760,7 @@ void m68008_device::lsr_aips_if8() // e2d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231797,12 +231794,12 @@ void m68008_device::lsr_aips_if8() // e2d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231887,7 +231884,7 @@ void m68008_device::lsr_pais_if8() // e2e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231921,12 +231918,12 @@ void m68008_device::lsr_pais_if8() // e2e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232035,7 +232032,7 @@ void m68008_device::lsr_das_if8() // e2e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -232071,12 +232068,12 @@ void m68008_device::lsr_das_if8() // e2e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232151,7 +232148,7 @@ void m68008_device::lsr_dais_if8() // e2f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -232233,7 +232230,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -232269,12 +232266,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232384,7 +232381,7 @@ void m68008_device::lsr_adr16_if8() // e2f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -232418,12 +232415,12 @@ void m68008_device::lsr_adr16_if8() // e2f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232564,7 +232561,7 @@ void m68008_device::lsr_adr32_if8() // e2f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -232598,12 +232595,12 @@ void m68008_device::lsr_adr32_if8() // e2f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232680,11 +232677,11 @@ void m68008_device::lsl_ais_if8() // e3d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -232717,12 +232714,12 @@ void m68008_device::lsl_ais_if8() // e3d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232759,7 +232756,7 @@ void m68008_device::lsl_ais_if8() // e3d0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -232803,12 +232800,12 @@ void m68008_device::lsl_aips_if8() // e3d8 fff8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -232842,12 +232839,12 @@ void m68008_device::lsl_aips_if8() // e3d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232884,7 +232881,7 @@ void m68008_device::lsl_aips_if8() // e3d8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -232927,7 +232924,7 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -232935,7 +232932,7 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -232969,12 +232966,12 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233011,7 +233008,7 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233052,7 +233049,7 @@ void m68008_device::lsl_das_if8() // e3e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -233085,11 +233082,11 @@ void m68008_device::lsl_das_if8() // e3e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -233122,12 +233119,12 @@ void m68008_device::lsl_das_if8() // e3e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233164,7 +233161,7 @@ void m68008_device::lsl_das_if8() // e3e8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233203,14 +233200,14 @@ void m68008_device::lsl_dais_if8() // e3f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -233218,7 +233215,7 @@ void m68008_device::lsl_dais_if8() // e3f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -233252,7 +233249,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -233288,11 +233285,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; m_icount -= 4; @@ -233325,12 +233322,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233367,7 +233364,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233410,7 +233407,7 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -233443,7 +233440,7 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -233477,12 +233474,12 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233519,7 +233516,7 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233560,7 +233557,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; m_icount -= 4; @@ -233594,7 +233591,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -233627,7 +233624,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -233661,12 +233658,12 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233703,7 +233700,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); m_icount -= 4; @@ -233744,7 +233741,7 @@ void m68008_device::roxr_ais_if8() // e4d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -233780,12 +233777,12 @@ void m68008_device::roxr_ais_if8() // e4d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233868,7 +233865,7 @@ void m68008_device::roxr_aips_if8() // e4d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -233902,12 +233899,12 @@ void m68008_device::roxr_aips_if8() // e4d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233992,7 +233989,7 @@ void m68008_device::roxr_pais_if8() // e4e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -234026,12 +234023,12 @@ void m68008_device::roxr_pais_if8() // e4e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234140,7 +234137,7 @@ void m68008_device::roxr_das_if8() // e4e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -234176,12 +234173,12 @@ void m68008_device::roxr_das_if8() // e4e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234256,7 +234253,7 @@ void m68008_device::roxr_dais_if8() // e4f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -234338,7 +234335,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -234374,12 +234371,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234489,7 +234486,7 @@ void m68008_device::roxr_adr16_if8() // e4f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -234523,12 +234520,12 @@ void m68008_device::roxr_adr16_if8() // e4f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234669,7 +234666,7 @@ void m68008_device::roxr_adr32_if8() // e4f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -234703,12 +234700,12 @@ void m68008_device::roxr_adr32_if8() // e4f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234785,7 +234782,7 @@ void m68008_device::roxl_ais_if8() // e5d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -234821,12 +234818,12 @@ void m68008_device::roxl_ais_if8() // e5d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234909,7 +234906,7 @@ void m68008_device::roxl_aips_if8() // e5d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -234943,12 +234940,12 @@ void m68008_device::roxl_aips_if8() // e5d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235033,7 +235030,7 @@ void m68008_device::roxl_pais_if8() // e5e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -235067,12 +235064,12 @@ void m68008_device::roxl_pais_if8() // e5e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235181,7 +235178,7 @@ void m68008_device::roxl_das_if8() // e5e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -235217,12 +235214,12 @@ void m68008_device::roxl_das_if8() // e5e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235297,7 +235294,7 @@ void m68008_device::roxl_dais_if8() // e5f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -235379,7 +235376,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -235415,12 +235412,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235530,7 +235527,7 @@ void m68008_device::roxl_adr16_if8() // e5f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -235564,12 +235561,12 @@ void m68008_device::roxl_adr16_if8() // e5f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235710,7 +235707,7 @@ void m68008_device::roxl_adr32_if8() // e5f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -235744,12 +235741,12 @@ void m68008_device::roxl_adr32_if8() // e5f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235826,7 +235823,7 @@ void m68008_device::ror_ais_if8() // e6d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -235862,12 +235859,12 @@ void m68008_device::ror_ais_if8() // e6d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -235950,7 +235947,7 @@ void m68008_device::ror_aips_if8() // e6d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -235984,12 +235981,12 @@ void m68008_device::ror_aips_if8() // e6d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236074,7 +236071,7 @@ void m68008_device::ror_pais_if8() // e6e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -236108,12 +236105,12 @@ void m68008_device::ror_pais_if8() // e6e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236222,7 +236219,7 @@ void m68008_device::ror_das_if8() // e6e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -236258,12 +236255,12 @@ void m68008_device::ror_das_if8() // e6e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236338,7 +236335,7 @@ void m68008_device::ror_dais_if8() // e6f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -236420,7 +236417,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -236456,12 +236453,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236571,7 +236568,7 @@ void m68008_device::ror_adr16_if8() // e6f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -236605,12 +236602,12 @@ void m68008_device::ror_adr16_if8() // e6f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236751,7 +236748,7 @@ void m68008_device::ror_adr32_if8() // e6f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -236785,12 +236782,12 @@ void m68008_device::ror_adr32_if8() // e6f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236867,7 +236864,7 @@ void m68008_device::rol_ais_if8() // e7d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -236903,12 +236900,12 @@ void m68008_device::rol_ais_if8() // e7d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -236991,7 +236988,7 @@ void m68008_device::rol_aips_if8() // e7d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237025,12 +237022,12 @@ void m68008_device::rol_aips_if8() // e7d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237115,7 +237112,7 @@ void m68008_device::rol_pais_if8() // e7e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237149,12 +237146,12 @@ void m68008_device::rol_pais_if8() // e7e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237263,7 +237260,7 @@ void m68008_device::rol_das_if8() // e7e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -237299,12 +237296,12 @@ void m68008_device::rol_das_if8() // e7e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237379,7 +237376,7 @@ void m68008_device::rol_dais_if8() // e7f0 fff8 int rx = (m_irdi >> 9) & 7; int ry = map_sp((m_irdi & 7) | 8); // 1e3 aixl0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -237461,7 +237458,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -237497,12 +237494,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237612,7 +237609,7 @@ void m68008_device::rol_adr16_if8() // e7f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237646,12 +237643,12 @@ void m68008_device::rol_adr16_if8() // e7f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237792,7 +237789,7 @@ void m68008_device::rol_adr32_if8() // e7f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237826,12 +237823,12 @@ void m68008_device::rol_adr32_if8() // e7f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; diff --git a/src/devices/cpu/m68000/m68008-sip8.cpp b/src/devices/cpu/m68000/m68008-sip8.cpp index 33610de164c..6eff5d630e5 100644 --- a/src/devices/cpu/m68000/m68008-sip8.cpp +++ b/src/devices/cpu/m68000/m68008-sip8.cpp @@ -281,7 +281,7 @@ void m68008_device::state_bus_error_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -291,7 +291,7 @@ void m68008_device::state_bus_error_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 1: @@ -329,7 +329,7 @@ void m68008_device::state_bus_error_ip8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 5: @@ -366,7 +366,7 @@ void m68008_device::state_bus_error_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 9: @@ -407,7 +407,7 @@ void m68008_device::state_bus_error_ip8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 13: @@ -444,7 +444,7 @@ void m68008_device::state_bus_error_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 17: @@ -484,7 +484,7 @@ void m68008_device::state_bus_error_ip8() m_da[16] = m_au; m_ftu = 0x0008; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 21: @@ -522,7 +522,7 @@ void m68008_device::state_bus_error_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 25: @@ -729,7 +729,7 @@ void m68008_device::state_address_error_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -739,7 +739,7 @@ void m68008_device::state_address_error_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 1: @@ -777,7 +777,7 @@ void m68008_device::state_address_error_ip8() m_dbout = m_aluo; m_ftu = m_ird; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 5: @@ -814,7 +814,7 @@ void m68008_device::state_address_error_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 9: @@ -855,7 +855,7 @@ void m68008_device::state_address_error_ip8() m_pc = m_at; m_ftu = (m_ftu & ~0x1f) | m_ssw; m_au = m_au - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 13: @@ -892,7 +892,7 @@ void m68008_device::state_address_error_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 17: @@ -932,7 +932,7 @@ void m68008_device::state_address_error_ip8() m_da[16] = m_au; m_ftu = 0x000c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 21: @@ -970,7 +970,7 @@ void m68008_device::state_address_error_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL; [[fallthrough]]; case 25: @@ -1187,7 +1187,7 @@ void m68008_device::state_interrupt_ip8() m_pc = m_au; m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I); update_interrupt(); - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_icount -= 2; // 235 itlx3 @@ -1199,7 +1199,7 @@ void m68008_device::state_interrupt_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -1267,7 +1267,7 @@ void m68008_device::state_interrupt_ip8() m_da[16] = m_au; m_ftu = m_int_vector; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 7: @@ -1305,7 +1305,7 @@ void m68008_device::state_interrupt_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 11: @@ -1510,7 +1510,7 @@ void m68008_device::state_trace_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1520,7 +1520,7 @@ void m68008_device::state_trace_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -1560,7 +1560,7 @@ void m68008_device::state_trace_ip8() m_da[16] = m_au; m_ftu = 0x0024; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -1598,7 +1598,7 @@ void m68008_device::state_trace_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -1803,7 +1803,7 @@ void m68008_device::state_illegal_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -1813,7 +1813,7 @@ void m68008_device::state_illegal_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -1853,7 +1853,7 @@ void m68008_device::state_illegal_ip8() m_da[16] = m_au; m_ftu = 0x0010; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -1891,7 +1891,7 @@ void m68008_device::state_illegal_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2096,7 +2096,7 @@ void m68008_device::state_priviledge_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2106,7 +2106,7 @@ void m68008_device::state_priviledge_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -2146,7 +2146,7 @@ void m68008_device::state_priviledge_ip8() m_da[16] = m_au; m_ftu = 0x0020; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -2184,7 +2184,7 @@ void m68008_device::state_priviledge_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2389,7 +2389,7 @@ void m68008_device::state_linea_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2399,7 +2399,7 @@ void m68008_device::state_linea_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -2439,7 +2439,7 @@ void m68008_device::state_linea_ip8() m_da[16] = m_au; m_ftu = 0x0028; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -2477,7 +2477,7 @@ void m68008_device::state_linea_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2682,7 +2682,7 @@ void m68008_device::state_linef_ip8() update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -2692,7 +2692,7 @@ void m68008_device::state_linef_ip8() m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 1: @@ -2732,7 +2732,7 @@ void m68008_device::state_linef_ip8() m_da[16] = m_au; m_ftu = 0x002c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 5: @@ -2770,7 +2770,7 @@ void m68008_device::state_linef_ip8() m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_N; [[fallthrough]]; case 9: @@ -2972,7 +2972,7 @@ void m68008_device::ori_b_imm8_ds_ip8() // 0000 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3010,7 +3010,7 @@ void m68008_device::ori_b_imm8_ds_ip8() // 0000 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry] alu_or8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -3018,7 +3018,7 @@ void m68008_device::ori_b_imm8_ds_ip8() // 0000 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3071,7 +3071,7 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3108,11 +3108,11 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -3132,7 +3132,7 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3174,7 +3174,7 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -3207,7 +3207,7 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3247,12 +3247,12 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -3273,7 +3273,7 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3315,7 +3315,7 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -3348,7 +3348,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3387,7 +3387,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -3395,7 +3395,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3458,7 +3458,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -3491,7 +3491,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3528,7 +3528,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3566,11 +3566,11 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -3590,7 +3590,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3632,7 +3632,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -3665,7 +3665,7 @@ void m68008_device::ori_b_imm8_dais_ip8() // 0030 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3700,14 +3700,14 @@ void m68008_device::ori_b_imm8_dais_ip8() // 0030 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -3715,7 +3715,7 @@ void m68008_device::ori_b_imm8_dais_ip8() // 0030 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3754,7 +3754,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3795,11 +3795,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -3819,7 +3819,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -3861,7 +3861,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -3893,7 +3893,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -3933,7 +3933,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -3971,7 +3971,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -3992,7 +3992,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4034,7 +4034,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -4066,7 +4066,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4104,7 +4104,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4143,7 +4143,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -4181,7 +4181,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -4202,7 +4202,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4244,7 +4244,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 19: m_mmu8->write_data(m_aob, m_dbout); @@ -4276,7 +4276,7 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4313,21 +4313,21 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt alu_or8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -4335,7 +4335,7 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4374,11 +4374,11 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4431,7 +4431,7 @@ void m68008_device::ori_w_imm16_ds_ip8() // 0040 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4469,7 +4469,7 @@ void m68008_device::ori_w_imm16_ds_ip8() // 0040 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -4477,7 +4477,7 @@ void m68008_device::ori_w_imm16_ds_ip8() // 0040 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4530,7 +4530,7 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4567,11 +4567,11 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -4609,7 +4609,7 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4651,7 +4651,7 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -4702,7 +4702,7 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4742,12 +4742,12 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -4786,7 +4786,7 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -4828,7 +4828,7 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -4879,7 +4879,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -4918,7 +4918,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -4926,7 +4926,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -4965,7 +4965,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5007,7 +5007,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -5058,7 +5058,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5095,7 +5095,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5133,11 +5133,11 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -5175,7 +5175,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5217,7 +5217,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -5268,7 +5268,7 @@ void m68008_device::ori_w_imm16_dais_ip8() // 0070 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5303,14 +5303,14 @@ void m68008_device::ori_w_imm16_dais_ip8() // 0070 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -5318,7 +5318,7 @@ void m68008_device::ori_w_imm16_dais_ip8() // 0070 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5357,7 +5357,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5398,11 +5398,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -5440,7 +5440,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5482,7 +5482,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -5532,7 +5532,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5572,7 +5572,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -5610,7 +5610,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -5649,7 +5649,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5691,7 +5691,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -5741,7 +5741,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5779,7 +5779,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -5818,7 +5818,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -5856,7 +5856,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -5895,7 +5895,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -5937,7 +5937,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -5991,7 +5991,7 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6028,23 +6028,23 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt alu_or(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -6052,7 +6052,7 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6091,11 +6091,11 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6147,7 +6147,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6185,7 +6185,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6223,12 +6223,12 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6263,7 +6263,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry] alu_or(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -6272,7 +6272,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -6292,7 +6292,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6330,7 +6330,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6367,7 +6367,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -6407,7 +6407,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -6445,7 +6445,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6485,7 +6485,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6525,7 +6525,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -6575,7 +6575,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6613,7 +6613,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6650,7 +6650,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -6690,11 +6690,11 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -6732,7 +6732,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -6772,7 +6772,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -6812,7 +6812,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -6862,7 +6862,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6900,7 +6900,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -6936,14 +6936,14 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -6982,7 +6982,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -7020,7 +7020,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7060,7 +7060,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7100,7 +7100,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -7150,7 +7150,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7188,7 +7188,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7225,7 +7225,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7262,7 +7262,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -7302,7 +7302,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -7340,7 +7340,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7380,7 +7380,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7420,7 +7420,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -7470,7 +7470,7 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7508,7 +7508,7 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7543,14 +7543,14 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -7558,7 +7558,7 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7597,7 +7597,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 33: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7637,7 +7637,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -7677,7 +7677,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -7715,7 +7715,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -7755,7 +7755,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -7795,7 +7795,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -7844,7 +7844,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7882,7 +7882,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -7922,7 +7922,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -7960,7 +7960,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -8000,7 +8000,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -8038,7 +8038,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -8078,7 +8078,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -8118,7 +8118,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -8167,7 +8167,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8205,7 +8205,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8243,7 +8243,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8282,7 +8282,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -8320,7 +8320,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -8360,7 +8360,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -8398,7 +8398,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin alu_or(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -8438,7 +8438,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue alu_or(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -8478,7 +8478,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 33: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -8532,13 +8532,13 @@ void m68008_device::btst_dd_ds_ip8() // 0100 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -8582,7 +8582,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8596,7 +8596,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -8618,7 +8618,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8 // 1d2 mpiw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8655,7 +8655,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8 // 29a mpiw2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -8674,7 +8674,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_data(m_aob); @@ -8696,7 +8696,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8748,11 +8748,11 @@ void m68008_device::btst_dd_ais_ip8() // 0110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -8772,13 +8772,13 @@ void m68008_device::btst_dd_ais_ip8() // 0110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8833,12 +8833,12 @@ void m68008_device::btst_dd_aips_ip8() // 0118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -8859,13 +8859,13 @@ void m68008_device::btst_dd_aips_ip8() // 0118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -8919,7 +8919,7 @@ void m68008_device::btst_dd_pais_ip8() // 0120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -8927,7 +8927,7 @@ void m68008_device::btst_dd_pais_ip8() // 0120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -8948,13 +8948,13 @@ void m68008_device::btst_dd_pais_ip8() // 0120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9006,7 +9006,7 @@ void m68008_device::btst_dd_das_ip8() // 0128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9044,11 +9044,11 @@ void m68008_device::btst_dd_das_ip8() // 0128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -9068,13 +9068,13 @@ void m68008_device::btst_dd_das_ip8() // 0128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9124,14 +9124,14 @@ void m68008_device::btst_dd_dais_ip8() // 0130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -9139,7 +9139,7 @@ void m68008_device::btst_dd_dais_ip8() // 0130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9178,7 +9178,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9219,11 +9219,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -9243,13 +9243,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9303,7 +9303,7 @@ void m68008_device::btst_dd_adr16_ip8() // 0138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -9341,7 +9341,7 @@ void m68008_device::btst_dd_adr16_ip8() // 0138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -9362,13 +9362,13 @@ void m68008_device::btst_dd_adr16_ip8() // 0138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9420,7 +9420,7 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9459,7 +9459,7 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -9497,7 +9497,7 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -9518,13 +9518,13 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9575,7 +9575,7 @@ void m68008_device::btst_dd_dpc_ip8() // 013a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9613,11 +9613,11 @@ void m68008_device::btst_dd_dpc_ip8() // 013a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob); @@ -9637,13 +9637,13 @@ void m68008_device::btst_dd_dpc_ip8() // 013a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9692,14 +9692,14 @@ void m68008_device::btst_dd_dpci_ip8() // 013b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -9707,7 +9707,7 @@ void m68008_device::btst_dd_dpci_ip8() // 013b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9746,7 +9746,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9787,11 +9787,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob); @@ -9811,13 +9811,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9871,7 +9871,7 @@ void m68008_device::btst_dd_imm_ip8() // 013c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -9911,12 +9911,12 @@ void m68008_device::btst_dd_imm_ip8() // 013c f1ff m_pc = m_au; m_dcr = m_da[rx]; set_16h(m_dt, high16(m_at)); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_dt; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -9960,7 +9960,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_dt, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -9974,7 +9974,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8 alu_and8(high16(m_dt), 1 << (m_dcr & 7)); sr_z(); set_ftu_const(); @@ -10000,13 +10000,13 @@ void m68008_device::bchg_dd_ds_ip8() // 0140 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -10050,7 +10050,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10063,14 +10063,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -10092,7 +10092,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8 // 1d6 mpil1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10129,7 +10129,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8 // 29e mpil2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -10147,7 +10147,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8 // 34e mpil3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_data(m_aob); @@ -10166,7 +10166,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8 m_aob = m_au; set_16h(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -10185,7 +10185,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8 m_aob = m_au; m_ir = m_irc; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_data(m_aob); @@ -10207,7 +10207,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10259,11 +10259,11 @@ void m68008_device::bchg_dd_ais_ip8() // 0150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -10284,7 +10284,7 @@ void m68008_device::bchg_dd_ais_ip8() // 0150 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -10324,7 +10324,7 @@ void m68008_device::bchg_dd_ais_ip8() // 0150 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10361,12 +10361,12 @@ void m68008_device::bchg_dd_aips_ip8() // 0158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -10388,7 +10388,7 @@ void m68008_device::bchg_dd_aips_ip8() // 0158 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -10428,7 +10428,7 @@ void m68008_device::bchg_dd_aips_ip8() // 0158 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10464,7 +10464,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -10472,7 +10472,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -10494,7 +10494,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -10534,7 +10534,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10568,7 +10568,7 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10606,11 +10606,11 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -10631,7 +10631,7 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -10671,7 +10671,7 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10703,14 +10703,14 @@ void m68008_device::bchg_dd_dais_ip8() // 0170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -10718,7 +10718,7 @@ void m68008_device::bchg_dd_dais_ip8() // 0170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10757,7 +10757,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -10798,11 +10798,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -10823,7 +10823,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -10863,7 +10863,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -10899,7 +10899,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -10937,7 +10937,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -10959,7 +10959,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -10999,7 +10999,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11033,7 +11033,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11072,7 +11072,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -11110,7 +11110,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -11132,7 +11132,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -11172,7 +11172,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11210,13 +11210,13 @@ void m68008_device::bclr_dd_ds_ip8() // 0180 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -11257,14 +11257,14 @@ void m68008_device::bclr_dd_ds_ip8() // 0180 f1f8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -11277,18 +11277,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -11310,7 +11310,7 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8 // 1ca mpow1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11349,7 +11349,7 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: m_mmu8->write_data(m_aob, m_dbout); @@ -11367,7 +11367,7 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -11386,11 +11386,11 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11442,11 +11442,11 @@ void m68008_device::bclr_dd_ais_ip8() // 0190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -11466,12 +11466,12 @@ void m68008_device::bclr_dd_ais_ip8() // 0190 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -11511,7 +11511,7 @@ void m68008_device::bclr_dd_ais_ip8() // 0190 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11548,12 +11548,12 @@ void m68008_device::bclr_dd_aips_ip8() // 0198 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -11574,12 +11574,12 @@ void m68008_device::bclr_dd_aips_ip8() // 0198 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -11619,7 +11619,7 @@ void m68008_device::bclr_dd_aips_ip8() // 0198 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11655,7 +11655,7 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -11663,7 +11663,7 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -11684,12 +11684,12 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -11729,7 +11729,7 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11763,7 +11763,7 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11801,11 +11801,11 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -11825,12 +11825,12 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -11870,7 +11870,7 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -11902,14 +11902,14 @@ void m68008_device::bclr_dd_dais_ip8() // 01b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -11917,7 +11917,7 @@ void m68008_device::bclr_dd_dais_ip8() // 01b0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11956,7 +11956,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -11997,11 +11997,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -12021,12 +12021,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -12066,7 +12066,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12102,7 +12102,7 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -12140,7 +12140,7 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -12161,12 +12161,12 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -12206,7 +12206,7 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12240,7 +12240,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -12279,7 +12279,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -12317,7 +12317,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -12338,12 +12338,12 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -12383,7 +12383,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12421,13 +12421,13 @@ void m68008_device::bset_dd_ds_ip8() // 01c0 f1f8 m_dcr = m_da[rx]; m_at = m_da[rx]; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry] alu_or(m_da[rx], m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -12471,7 +12471,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -12484,14 +12484,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -12513,7 +12513,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8 // 1ce mpol1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -12551,7 +12551,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8 m_aob = m_au; set_8xh(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: m_mmu8->write_data(m_aob, m_dbout); @@ -12569,7 +12569,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, high16(m_da[rx])); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -12588,7 +12588,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8 m_ir = m_irc; set_8xh(m_dbout, m_da[rx]); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx] + // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx] m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob, m_dbout); @@ -12606,7 +12606,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8 m_aob = m_au; set_8xl(m_dbout, m_da[rx]); m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -12625,11 +12625,11 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -12681,11 +12681,11 @@ void m68008_device::bset_dd_ais_ip8() // 01d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -12706,7 +12706,7 @@ void m68008_device::bset_dd_ais_ip8() // 01d0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -12746,7 +12746,7 @@ void m68008_device::bset_dd_ais_ip8() // 01d0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12783,12 +12783,12 @@ void m68008_device::bset_dd_aips_ip8() // 01d8 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -12810,7 +12810,7 @@ void m68008_device::bset_dd_aips_ip8() // 01d8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -12850,7 +12850,7 @@ void m68008_device::bset_dd_aips_ip8() // 01d8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12886,7 +12886,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -12894,7 +12894,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -12916,7 +12916,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: @@ -12956,7 +12956,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -12990,7 +12990,7 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13028,11 +13028,11 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -13053,7 +13053,7 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -13093,7 +13093,7 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13125,14 +13125,14 @@ void m68008_device::bset_dd_dais_ip8() // 01f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -13140,7 +13140,7 @@ void m68008_device::bset_dd_dais_ip8() // 01f0 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13179,7 +13179,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13220,11 +13220,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -13245,7 +13245,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -13285,7 +13285,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13321,7 +13321,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -13359,7 +13359,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -13381,7 +13381,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -13421,7 +13421,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13455,7 +13455,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13494,7 +13494,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -13532,7 +13532,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -13554,7 +13554,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -13594,7 +13594,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -13629,7 +13629,7 @@ void m68008_device::andi_b_imm8_ds_ip8() // 0200 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13667,7 +13667,7 @@ void m68008_device::andi_b_imm8_ds_ip8() // 0200 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry] alu_and8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -13675,7 +13675,7 @@ void m68008_device::andi_b_imm8_ds_ip8() // 0200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13728,7 +13728,7 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13765,11 +13765,11 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -13789,7 +13789,7 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13831,7 +13831,7 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -13864,7 +13864,7 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -13904,12 +13904,12 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -13930,7 +13930,7 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -13972,7 +13972,7 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -14005,7 +14005,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14044,7 +14044,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -14052,7 +14052,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -14073,7 +14073,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14115,7 +14115,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -14148,7 +14148,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14185,7 +14185,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14223,11 +14223,11 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -14247,7 +14247,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14289,7 +14289,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -14322,7 +14322,7 @@ void m68008_device::andi_b_imm8_dais_ip8() // 0230 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14357,14 +14357,14 @@ void m68008_device::andi_b_imm8_dais_ip8() // 0230 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -14372,7 +14372,7 @@ void m68008_device::andi_b_imm8_dais_ip8() // 0230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14411,7 +14411,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14452,11 +14452,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -14476,7 +14476,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14518,7 +14518,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -14550,7 +14550,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14590,7 +14590,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -14628,7 +14628,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -14649,7 +14649,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14691,7 +14691,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -14723,7 +14723,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14761,7 +14761,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14800,7 +14800,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -14838,7 +14838,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -14859,7 +14859,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin alu_and8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -14901,7 +14901,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 19: m_mmu8->write_data(m_aob, m_dbout); @@ -14933,7 +14933,7 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -14970,21 +14970,21 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt alu_and8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -14992,7 +14992,7 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15031,11 +15031,11 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15088,7 +15088,7 @@ void m68008_device::andi_w_imm16_ds_ip8() // 0240 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15126,7 +15126,7 @@ void m68008_device::andi_w_imm16_ds_ip8() // 0240 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -15134,7 +15134,7 @@ void m68008_device::andi_w_imm16_ds_ip8() // 0240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15187,7 +15187,7 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15224,11 +15224,11 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -15266,7 +15266,7 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15308,7 +15308,7 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -15359,7 +15359,7 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15399,12 +15399,12 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -15443,7 +15443,7 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15485,7 +15485,7 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -15536,7 +15536,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15575,7 +15575,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -15583,7 +15583,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -15622,7 +15622,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15664,7 +15664,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -15715,7 +15715,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15752,7 +15752,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15790,11 +15790,11 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -15832,7 +15832,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -15874,7 +15874,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -15925,7 +15925,7 @@ void m68008_device::andi_w_imm16_dais_ip8() // 0270 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -15960,14 +15960,14 @@ void m68008_device::andi_w_imm16_dais_ip8() // 0270 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -15975,7 +15975,7 @@ void m68008_device::andi_w_imm16_dais_ip8() // 0270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16014,7 +16014,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16055,11 +16055,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -16097,7 +16097,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16139,7 +16139,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -16189,7 +16189,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16229,7 +16229,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -16267,7 +16267,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -16306,7 +16306,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16348,7 +16348,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -16398,7 +16398,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16436,7 +16436,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16475,7 +16475,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -16513,7 +16513,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -16552,7 +16552,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -16594,7 +16594,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -16648,7 +16648,7 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16685,23 +16685,23 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt alu_and(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -16709,7 +16709,7 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16748,11 +16748,11 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16804,7 +16804,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16842,7 +16842,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16880,12 +16880,12 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry] alu_and(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16920,7 +16920,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry] alu_and(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -16929,7 +16929,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -16949,7 +16949,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -16987,7 +16987,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17024,7 +17024,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -17064,7 +17064,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -17102,7 +17102,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17142,7 +17142,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -17182,7 +17182,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -17232,7 +17232,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17270,7 +17270,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17307,7 +17307,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -17347,11 +17347,11 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -17389,7 +17389,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17429,7 +17429,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -17469,7 +17469,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -17519,7 +17519,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17557,7 +17557,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17593,14 +17593,14 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -17639,7 +17639,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -17677,7 +17677,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -17717,7 +17717,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -17757,7 +17757,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -17807,7 +17807,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17845,7 +17845,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17882,7 +17882,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -17919,7 +17919,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -17959,7 +17959,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -17997,7 +17997,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18037,7 +18037,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -18077,7 +18077,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -18127,7 +18127,7 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18165,7 +18165,7 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18200,14 +18200,14 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -18215,7 +18215,7 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18254,7 +18254,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 33: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18294,7 +18294,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -18334,7 +18334,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -18372,7 +18372,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18412,7 +18412,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -18452,7 +18452,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -18501,7 +18501,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18539,7 +18539,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18579,7 +18579,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -18617,7 +18617,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -18657,7 +18657,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -18695,7 +18695,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -18735,7 +18735,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -18775,7 +18775,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -18824,7 +18824,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18862,7 +18862,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18900,7 +18900,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -18939,7 +18939,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -18977,7 +18977,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -19017,7 +19017,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -19055,7 +19055,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin alu_and(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19095,7 +19095,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue alu_and(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -19135,7 +19135,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 33: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -19223,7 +19223,7 @@ void m68008_device::subi_b_imm8_ds_ip8() // 0400 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -19319,7 +19319,7 @@ void m68008_device::subi_b_imm8_ais_ip8() // 0410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -19342,7 +19342,7 @@ void m68008_device::subi_b_imm8_ais_ip8() // 0410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19458,7 +19458,7 @@ void m68008_device::subi_b_imm8_aips_ip8() // 0418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -19479,7 +19479,7 @@ void m68008_device::subi_b_imm8_aips_ip8() // 0418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19597,7 +19597,7 @@ void m68008_device::subi_b_imm8_pais_ip8() // 0420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -19618,7 +19618,7 @@ void m68008_device::subi_b_imm8_pais_ip8() // 0420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19765,7 +19765,7 @@ void m68008_device::subi_b_imm8_das_ip8() // 0428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -19788,7 +19788,7 @@ void m68008_device::subi_b_imm8_das_ip8() // 0428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -19896,7 +19896,7 @@ void m68008_device::subi_b_imm8_dais_ip8() // 0430 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -19988,7 +19988,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -20011,7 +20011,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20159,7 +20159,7 @@ void m68008_device::subi_b_imm8_adr16_ip8() // 0438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -20180,7 +20180,7 @@ void m68008_device::subi_b_imm8_adr16_ip8() // 0438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20364,7 +20364,7 @@ void m68008_device::subi_b_imm8_adr32_ip8() // 0439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -20385,7 +20385,7 @@ void m68008_device::subi_b_imm8_adr32_ip8() // 0439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20496,7 +20496,7 @@ void m68008_device::subi_w_imm16_ds_ip8() // 0440 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -20592,7 +20592,7 @@ void m68008_device::subi_w_imm16_ais_ip8() // 0450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -20633,7 +20633,7 @@ void m68008_device::subi_w_imm16_ais_ip8() // 0450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20767,7 +20767,7 @@ void m68008_device::subi_w_imm16_aips_ip8() // 0458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -20806,7 +20806,7 @@ void m68008_device::subi_w_imm16_aips_ip8() // 0458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -20942,7 +20942,7 @@ void m68008_device::subi_w_imm16_pais_ip8() // 0460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -20981,7 +20981,7 @@ void m68008_device::subi_w_imm16_pais_ip8() // 0460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21146,7 +21146,7 @@ void m68008_device::subi_w_imm16_das_ip8() // 0468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21187,7 +21187,7 @@ void m68008_device::subi_w_imm16_das_ip8() // 0468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21313,7 +21313,7 @@ void m68008_device::subi_w_imm16_dais_ip8() // 0470 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -21405,7 +21405,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -21446,7 +21446,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21612,7 +21612,7 @@ void m68008_device::subi_w_imm16_adr16_ip8() // 0478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -21651,7 +21651,7 @@ void m68008_device::subi_w_imm16_adr16_ip8() // 0478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -21853,7 +21853,7 @@ void m68008_device::subi_w_imm16_adr32_ip8() // 0479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -21892,7 +21892,7 @@ void m68008_device::subi_w_imm16_adr32_ip8() // 0479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22057,7 +22057,7 @@ void m68008_device::subi_l_imm32_ds_ip8() // 0480 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -22096,7 +22096,7 @@ void m68008_device::subi_l_imm32_ds_ip8() // 0480 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -22197,7 +22197,7 @@ void m68008_device::subi_l_imm32_ais_ip8() // 0490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -22274,7 +22274,7 @@ void m68008_device::subi_l_imm32_ais_ip8() // 0490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22314,7 +22314,7 @@ void m68008_device::subi_l_imm32_ais_ip8() // 0490 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -22476,7 +22476,7 @@ void m68008_device::subi_l_imm32_aips_ip8() // 0498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -22556,7 +22556,7 @@ void m68008_device::subi_l_imm32_aips_ip8() // 0498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22596,7 +22596,7 @@ void m68008_device::subi_l_imm32_aips_ip8() // 0498 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -22757,7 +22757,7 @@ void m68008_device::subi_l_imm32_pais_ip8() // 04a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -22839,7 +22839,7 @@ void m68008_device::subi_l_imm32_pais_ip8() // 04a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -22879,7 +22879,7 @@ void m68008_device::subi_l_imm32_pais_ip8() // 04a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23077,7 +23077,7 @@ void m68008_device::subi_l_imm32_das_ip8() // 04a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -23154,7 +23154,7 @@ void m68008_device::subi_l_imm32_das_ip8() // 04a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23194,7 +23194,7 @@ void m68008_device::subi_l_imm32_das_ip8() // 04a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23354,7 +23354,7 @@ void m68008_device::subi_l_imm32_dais_ip8() // 04b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -23445,7 +23445,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -23522,7 +23522,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23562,7 +23562,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -23762,7 +23762,7 @@ void m68008_device::subi_l_imm32_adr16_ip8() // 04b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -23839,7 +23839,7 @@ void m68008_device::subi_l_imm32_adr16_ip8() // 04b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -23879,7 +23879,7 @@ void m68008_device::subi_l_imm32_adr16_ip8() // 04b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24115,7 +24115,7 @@ void m68008_device::subi_l_imm32_adr32_ip8() // 04b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -24192,7 +24192,7 @@ void m68008_device::subi_l_imm32_adr32_ip8() // 04b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24232,7 +24232,7 @@ void m68008_device::subi_l_imm32_adr32_ip8() // 04b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -24359,7 +24359,7 @@ void m68008_device::addi_b_imm8_ds_ip8() // 0600 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry] alu_add8(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -24455,7 +24455,7 @@ void m68008_device::addi_b_imm8_ais_ip8() // 0610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -24478,7 +24478,7 @@ void m68008_device::addi_b_imm8_ais_ip8() // 0610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24594,7 +24594,7 @@ void m68008_device::addi_b_imm8_aips_ip8() // 0618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -24615,7 +24615,7 @@ void m68008_device::addi_b_imm8_aips_ip8() // 0618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24733,7 +24733,7 @@ void m68008_device::addi_b_imm8_pais_ip8() // 0620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -24754,7 +24754,7 @@ void m68008_device::addi_b_imm8_pais_ip8() // 0620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -24901,7 +24901,7 @@ void m68008_device::addi_b_imm8_das_ip8() // 0628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -24924,7 +24924,7 @@ void m68008_device::addi_b_imm8_das_ip8() // 0628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25032,7 +25032,7 @@ void m68008_device::addi_b_imm8_dais_ip8() // 0630 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -25124,7 +25124,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -25147,7 +25147,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25295,7 +25295,7 @@ void m68008_device::addi_b_imm8_adr16_ip8() // 0638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -25316,7 +25316,7 @@ void m68008_device::addi_b_imm8_adr16_ip8() // 0638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25500,7 +25500,7 @@ void m68008_device::addi_b_imm8_adr32_ip8() // 0639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -25521,7 +25521,7 @@ void m68008_device::addi_b_imm8_adr32_ip8() // 0639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin alu_add8(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25632,7 +25632,7 @@ void m68008_device::addi_w_imm16_ds_ip8() // 0640 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -25728,7 +25728,7 @@ void m68008_device::addi_w_imm16_ais_ip8() // 0650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -25769,7 +25769,7 @@ void m68008_device::addi_w_imm16_ais_ip8() // 0650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -25903,7 +25903,7 @@ void m68008_device::addi_w_imm16_aips_ip8() // 0658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -25942,7 +25942,7 @@ void m68008_device::addi_w_imm16_aips_ip8() // 0658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26078,7 +26078,7 @@ void m68008_device::addi_w_imm16_pais_ip8() // 0660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -26117,7 +26117,7 @@ void m68008_device::addi_w_imm16_pais_ip8() // 0660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26282,7 +26282,7 @@ void m68008_device::addi_w_imm16_das_ip8() // 0668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -26323,7 +26323,7 @@ void m68008_device::addi_w_imm16_das_ip8() // 0668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26449,7 +26449,7 @@ void m68008_device::addi_w_imm16_dais_ip8() // 0670 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -26541,7 +26541,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -26582,7 +26582,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26748,7 +26748,7 @@ void m68008_device::addi_w_imm16_adr16_ip8() // 0678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -26787,7 +26787,7 @@ void m68008_device::addi_w_imm16_adr16_ip8() // 0678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -26989,7 +26989,7 @@ void m68008_device::addi_w_imm16_adr32_ip8() // 0679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -27028,7 +27028,7 @@ void m68008_device::addi_w_imm16_adr32_ip8() // 0679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -27193,7 +27193,7 @@ void m68008_device::addi_l_imm32_ds_ip8() // 0680 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry] alu_add(m_dt, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -27232,7 +27232,7 @@ void m68008_device::addi_l_imm32_ds_ip8() // 0680 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -27333,7 +27333,7 @@ void m68008_device::addi_l_imm32_ais_ip8() // 0690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -27410,7 +27410,7 @@ void m68008_device::addi_l_imm32_ais_ip8() // 0690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -27450,7 +27450,7 @@ void m68008_device::addi_l_imm32_ais_ip8() // 0690 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -27612,7 +27612,7 @@ void m68008_device::addi_l_imm32_aips_ip8() // 0698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -27692,7 +27692,7 @@ void m68008_device::addi_l_imm32_aips_ip8() // 0698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -27732,7 +27732,7 @@ void m68008_device::addi_l_imm32_aips_ip8() // 0698 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -27893,7 +27893,7 @@ void m68008_device::addi_l_imm32_pais_ip8() // 06a0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -27975,7 +27975,7 @@ void m68008_device::addi_l_imm32_pais_ip8() // 06a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -28015,7 +28015,7 @@ void m68008_device::addi_l_imm32_pais_ip8() // 06a0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -28213,7 +28213,7 @@ void m68008_device::addi_l_imm32_das_ip8() // 06a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -28290,7 +28290,7 @@ void m68008_device::addi_l_imm32_das_ip8() // 06a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -28330,7 +28330,7 @@ void m68008_device::addi_l_imm32_das_ip8() // 06a8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -28490,7 +28490,7 @@ void m68008_device::addi_l_imm32_dais_ip8() // 06b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -28581,7 +28581,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -28658,7 +28658,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -28698,7 +28698,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -28898,7 +28898,7 @@ void m68008_device::addi_l_imm32_adr16_ip8() // 06b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -28975,7 +28975,7 @@ void m68008_device::addi_l_imm32_adr16_ip8() // 06b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -29015,7 +29015,7 @@ void m68008_device::addi_l_imm32_adr16_ip8() // 06b8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -29251,7 +29251,7 @@ void m68008_device::addi_l_imm32_adr32_ip8() // 06b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -29328,7 +29328,7 @@ void m68008_device::addi_l_imm32_adr32_ip8() // 06b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin alu_add(m_dt, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -29368,7 +29368,7 @@ void m68008_device::addi_l_imm32_adr32_ip8() // 06b9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -29458,7 +29458,7 @@ void m68008_device::btst_imm8_ds_ip8() // 0800 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29499,13 +29499,13 @@ void m68008_device::btst_imm8_ds_ip8() // 0800 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 0e7 btsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -29549,7 +29549,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29563,7 +29563,7 @@ btsr3: // 044 btsr3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro alu_and(high16(m_da[ry]), 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -29586,7 +29586,7 @@ void m68008_device::btst_imm8_ais_ip8() // 0810 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29623,11 +29623,11 @@ void m68008_device::btst_imm8_ais_ip8() // 0810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -29647,13 +29647,13 @@ void m68008_device::btst_imm8_ais_ip8() // 0810 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29706,7 +29706,7 @@ void m68008_device::btst_imm8_aips_ip8() // 0818 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29746,12 +29746,12 @@ void m68008_device::btst_imm8_aips_ip8() // 0818 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -29772,13 +29772,13 @@ void m68008_device::btst_imm8_aips_ip8() // 0818 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29831,7 +29831,7 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29870,7 +29870,7 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -29878,7 +29878,7 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -29899,13 +29899,13 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29958,7 +29958,7 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -29995,7 +29995,7 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30033,11 +30033,11 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -30057,13 +30057,13 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30116,7 +30116,7 @@ void m68008_device::btst_imm8_dais_ip8() // 0830 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30151,14 +30151,14 @@ void m68008_device::btst_imm8_dais_ip8() // 0830 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -30166,7 +30166,7 @@ void m68008_device::btst_imm8_dais_ip8() // 0830 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30205,7 +30205,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30246,11 +30246,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -30270,13 +30270,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30328,7 +30328,7 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30368,7 +30368,7 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -30406,7 +30406,7 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -30427,13 +30427,13 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30485,7 +30485,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30523,7 +30523,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30562,7 +30562,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -30600,7 +30600,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -30621,13 +30621,13 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30679,7 +30679,7 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30716,7 +30716,7 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30754,11 +30754,11 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob); @@ -30778,13 +30778,13 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30836,7 +30836,7 @@ void m68008_device::btst_imm8_dpci_ip8() // 083b ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30871,14 +30871,14 @@ void m68008_device::btst_imm8_dpci_ip8() // 083b ffff m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -30886,7 +30886,7 @@ void m68008_device::btst_imm8_dpci_ip8() // 083b ffff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30925,7 +30925,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -30966,11 +30966,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob); @@ -30990,13 +30990,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8 alu_and8(m_dbin, 1 << (m_dcr & 7)); sr_z(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31049,7 +31049,7 @@ void m68008_device::bchg_imm8_ds_ip8() // 0840 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31090,13 +31090,13 @@ void m68008_device::bchg_imm8_ds_ip8() // 0840 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro alu_eor(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -31140,7 +31140,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -31153,14 +31153,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -31183,7 +31183,7 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31220,11 +31220,11 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -31245,7 +31245,7 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -31285,7 +31285,7 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31320,7 +31320,7 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31360,12 +31360,12 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -31387,7 +31387,7 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -31427,7 +31427,7 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31462,7 +31462,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31501,7 +31501,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -31509,7 +31509,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -31531,7 +31531,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -31571,7 +31571,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31606,7 +31606,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31643,7 +31643,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31681,11 +31681,11 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -31706,7 +31706,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -31746,7 +31746,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -31781,7 +31781,7 @@ void m68008_device::bchg_imm8_dais_ip8() // 0870 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31816,14 +31816,14 @@ void m68008_device::bchg_imm8_dais_ip8() // 0870 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -31831,7 +31831,7 @@ void m68008_device::bchg_imm8_dais_ip8() // 0870 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31870,7 +31870,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -31911,11 +31911,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -31936,7 +31936,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -31976,7 +31976,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32010,7 +32010,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32050,7 +32050,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -32088,7 +32088,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -32110,7 +32110,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -32150,7 +32150,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32184,7 +32184,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32222,7 +32222,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32261,7 +32261,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -32299,7 +32299,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -32321,7 +32321,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8 alu_eor8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: @@ -32361,7 +32361,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32396,7 +32396,7 @@ void m68008_device::bclr_imm8_ds_ip8() // 0880 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32437,13 +32437,13 @@ void m68008_device::bclr_imm8_ds_ip8() // 0880 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06e bclr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -32484,14 +32484,14 @@ void m68008_device::bclr_imm8_ds_ip8() // 0880 fff8 goto bclr4; bclr4: // 0cc bclr4 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0c4 bcsr4 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -32504,18 +32504,18 @@ bclr4: bclr3: // 08c bclr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0c8 bclr5 - // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro + // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro alu_eor(m_aluo, 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -32538,7 +32538,7 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32575,11 +32575,11 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -32599,12 +32599,12 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -32644,7 +32644,7 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32679,7 +32679,7 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32719,12 +32719,12 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -32745,12 +32745,12 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -32790,7 +32790,7 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32825,7 +32825,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -32864,7 +32864,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -32872,7 +32872,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -32893,12 +32893,12 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -32938,7 +32938,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -32973,7 +32973,7 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33010,7 +33010,7 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33048,11 +33048,11 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -33072,12 +33072,12 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8 m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -33117,7 +33117,7 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33152,7 +33152,7 @@ void m68008_device::bclr_imm8_dais_ip8() // 08b0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33187,14 +33187,14 @@ void m68008_device::bclr_imm8_dais_ip8() // 08b0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -33202,7 +33202,7 @@ void m68008_device::bclr_imm8_dais_ip8() // 08b0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33241,7 +33241,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33282,11 +33282,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -33306,12 +33306,12 @@ adsw2: m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -33351,7 +33351,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33385,7 +33385,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33425,7 +33425,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -33463,7 +33463,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -33484,12 +33484,12 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -33529,7 +33529,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33563,7 +33563,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33601,7 +33601,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33640,7 +33640,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -33678,7 +33678,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -33699,12 +33699,12 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff m_ir = m_irc; m_alub = m_dbin; m_ftu = m_sr; - // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); // 067 bclm2 m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8 + // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8 alu_eor8(m_aluo, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: @@ -33744,7 +33744,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -33779,7 +33779,7 @@ void m68008_device::bset_imm8_ds_ip8() // 08c0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33820,13 +33820,13 @@ void m68008_device::bset_imm8_ds_ip8() // 08c0 fff8 m_dcr = m_dt; m_at = m_dt; m_au = m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry] alu_or(m_dt, m_da[ry]); // 06a bcsr2 m_t = m_dcr & 0x10; m_alub = m_da[ry]; m_au = m_pc + 2; - // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro alu_or(m_da[ry], 1 << (m_dcr & 15)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -33870,7 +33870,7 @@ bcsr4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -33883,14 +33883,14 @@ bcsr4: bcsr3: // 084 bcsr3 m_alub = high16(m_da[ry]); - // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro + // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro alu_or(high16(m_da[ry]), 1 << (m_dcr & 15)); m_icount -= 2; // 0a1 bcsr5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); - // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro + // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro alu_and(m_alub, 1 << (m_dcr & 15)); sr_z(); set_ftu_const(); @@ -33913,7 +33913,7 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -33950,11 +33950,11 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -33975,7 +33975,7 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -34015,7 +34015,7 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34050,7 +34050,7 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34090,12 +34090,12 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -34117,7 +34117,7 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -34157,7 +34157,7 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34192,7 +34192,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34231,7 +34231,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -34239,7 +34239,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -34261,7 +34261,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: @@ -34301,7 +34301,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34336,7 +34336,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34373,7 +34373,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34411,11 +34411,11 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -34436,7 +34436,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8 m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -34476,7 +34476,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34511,7 +34511,7 @@ void m68008_device::bset_imm8_dais_ip8() // 08f0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34546,14 +34546,14 @@ void m68008_device::bset_imm8_dais_ip8() // 08f0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -34561,7 +34561,7 @@ void m68008_device::bset_imm8_dais_ip8() // 08f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34600,7 +34600,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34641,11 +34641,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -34666,7 +34666,7 @@ adsw2: m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -34706,7 +34706,7 @@ adsw2: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34740,7 +34740,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34780,7 +34780,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -34818,7 +34818,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -34840,7 +34840,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: @@ -34880,7 +34880,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -34914,7 +34914,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34952,7 +34952,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -34991,7 +34991,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -35029,7 +35029,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -35051,7 +35051,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff m_alub = m_dbin; m_pc = m_au; m_au = m_au + 2; - // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8 + // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8 alu_or8(m_dbin, 1 << (m_dcr & 7)); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 15: @@ -35091,7 +35091,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); - // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8 + // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8 alu_and8(m_alub, 1 << (m_dcr & 7)); sr_z(); m_base_ssw = SSW_DATA; @@ -35126,7 +35126,7 @@ void m68008_device::eori_b_imm8_ds_ip8() // 0a00 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35164,7 +35164,7 @@ void m68008_device::eori_b_imm8_ds_ip8() // 0a00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor8(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -35172,7 +35172,7 @@ void m68008_device::eori_b_imm8_ds_ip8() // 0a00 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35225,7 +35225,7 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35262,11 +35262,11 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -35286,7 +35286,7 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35328,7 +35328,7 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -35361,7 +35361,7 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35401,12 +35401,12 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -35427,7 +35427,7 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35469,7 +35469,7 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -35502,7 +35502,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35541,7 +35541,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -35549,7 +35549,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -35570,7 +35570,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35612,7 +35612,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -35645,7 +35645,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35682,7 +35682,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35720,11 +35720,11 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -35744,7 +35744,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -35786,7 +35786,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -35819,7 +35819,7 @@ void m68008_device::eori_b_imm8_dais_ip8() // 0a30 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35854,14 +35854,14 @@ void m68008_device::eori_b_imm8_dais_ip8() // 0a30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -35869,7 +35869,7 @@ void m68008_device::eori_b_imm8_dais_ip8() // 0a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35908,7 +35908,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -35949,11 +35949,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob); @@ -35973,7 +35973,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36015,7 +36015,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -36047,7 +36047,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36087,7 +36087,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -36125,7 +36125,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -36146,7 +36146,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36188,7 +36188,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -36220,7 +36220,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36258,7 +36258,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36297,7 +36297,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -36335,7 +36335,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -36356,7 +36356,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin alu_eor8(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36398,7 +36398,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 19: m_mmu8->write_data(m_aob, m_dbout); @@ -36430,7 +36430,7 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36467,21 +36467,21 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt alu_eor8(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -36489,7 +36489,7 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36528,11 +36528,11 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36585,7 +36585,7 @@ void m68008_device::eori_w_imm16_ds_ip8() // 0a40 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36623,7 +36623,7 @@ void m68008_device::eori_w_imm16_ds_ip8() // 0a40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -36631,7 +36631,7 @@ void m68008_device::eori_w_imm16_ds_ip8() // 0a40 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36684,7 +36684,7 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36721,11 +36721,11 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -36763,7 +36763,7 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36805,7 +36805,7 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -36856,7 +36856,7 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -36896,12 +36896,12 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -36940,7 +36940,7 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -36982,7 +36982,7 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -37033,7 +37033,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37072,7 +37072,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -37080,7 +37080,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -37119,7 +37119,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37161,7 +37161,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -37212,7 +37212,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37249,7 +37249,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37287,11 +37287,11 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -37329,7 +37329,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37371,7 +37371,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -37422,7 +37422,7 @@ void m68008_device::eori_w_imm16_dais_ip8() // 0a70 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37457,14 +37457,14 @@ void m68008_device::eori_w_imm16_dais_ip8() // 0a70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -37472,7 +37472,7 @@ void m68008_device::eori_w_imm16_dais_ip8() // 0a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37511,7 +37511,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37552,11 +37552,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -37594,7 +37594,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37636,7 +37636,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -37686,7 +37686,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37726,7 +37726,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -37764,7 +37764,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -37803,7 +37803,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -37845,7 +37845,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -37895,7 +37895,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37933,7 +37933,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -37972,7 +37972,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -38010,7 +38010,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -38049,7 +38049,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38091,7 +38091,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -38145,7 +38145,7 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38182,23 +38182,23 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff // 1cc stiw1 m_ftu = m_sr; m_au = m_pc - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 307 stiw2 - // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt + // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt alu_eor(m_ftu, m_dt); m_icount -= 2; // 320 stiw3 m_movemr = m_dbin; m_ftu = m_aluo; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_icount -= 2; // 321 stiw4 m_sr = m_isr = m_ftu & (SR_CCR|SR_SR); update_user_super(); update_interrupt(); - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_icount -= 2; // 1e1 malw3 m_aob = m_au; @@ -38206,7 +38206,7 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38245,11 +38245,11 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38301,7 +38301,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38339,7 +38339,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38377,12 +38377,12 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry] alu_eor(m_dt, m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38417,7 +38417,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry] alu_eor(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -38426,7 +38426,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -38446,7 +38446,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38484,7 +38484,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38521,7 +38521,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -38561,7 +38561,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -38599,7 +38599,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38639,7 +38639,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -38679,7 +38679,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -38729,7 +38729,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38767,7 +38767,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -38804,7 +38804,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -38844,11 +38844,11 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -38886,7 +38886,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -38926,7 +38926,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -38966,7 +38966,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -39016,7 +39016,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39054,7 +39054,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39090,14 +39090,14 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -39136,7 +39136,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -39174,7 +39174,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39214,7 +39214,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -39254,7 +39254,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -39304,7 +39304,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39342,7 +39342,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39379,7 +39379,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39416,7 +39416,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -39456,7 +39456,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -39494,7 +39494,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39534,7 +39534,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -39574,7 +39574,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -39624,7 +39624,7 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8 m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39662,7 +39662,7 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8 m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39697,14 +39697,14 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -39712,7 +39712,7 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39751,7 +39751,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 33: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -39791,7 +39791,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -39831,7 +39831,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -39869,7 +39869,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -39909,7 +39909,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -39949,7 +39949,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -39998,7 +39998,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -40036,7 +40036,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -40076,7 +40076,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -40114,7 +40114,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -40154,7 +40154,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -40192,7 +40192,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -40232,7 +40232,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -40272,7 +40272,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -40321,7 +40321,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -40359,7 +40359,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_pc = m_au; set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -40397,7 +40397,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -40436,7 +40436,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -40474,7 +40474,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -40514,7 +40514,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 21: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -40552,7 +40552,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin alu_eor(m_dt, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -40592,7 +40592,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue alu_eor(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -40632,7 +40632,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 33: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -40720,7 +40720,7 @@ void m68008_device::cmpi_b_imm8_ds_ip8() // 0c00 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub8(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -40815,7 +40815,7 @@ void m68008_device::cmpi_b_imm8_ais_ip8() // 0c10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -40838,7 +40838,7 @@ void m68008_device::cmpi_b_imm8_ais_ip8() // 0c10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -40938,7 +40938,7 @@ void m68008_device::cmpi_b_imm8_aips_ip8() // 0c18 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -40959,7 +40959,7 @@ void m68008_device::cmpi_b_imm8_aips_ip8() // 0c18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41061,7 +41061,7 @@ void m68008_device::cmpi_b_imm8_pais_ip8() // 0c20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -41082,7 +41082,7 @@ void m68008_device::cmpi_b_imm8_pais_ip8() // 0c20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41213,7 +41213,7 @@ void m68008_device::cmpi_b_imm8_das_ip8() // 0c28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -41236,7 +41236,7 @@ void m68008_device::cmpi_b_imm8_das_ip8() // 0c28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41328,7 +41328,7 @@ void m68008_device::cmpi_b_imm8_dais_ip8() // 0c30 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -41420,7 +41420,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -41443,7 +41443,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41575,7 +41575,7 @@ void m68008_device::cmpi_b_imm8_adr16_ip8() // 0c38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -41596,7 +41596,7 @@ void m68008_device::cmpi_b_imm8_adr16_ip8() // 0c38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41764,7 +41764,7 @@ void m68008_device::cmpi_b_imm8_adr32_ip8() // 0c39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -41785,7 +41785,7 @@ void m68008_device::cmpi_b_imm8_adr32_ip8() // 0c39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin alu_sub8(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -41880,7 +41880,7 @@ void m68008_device::cmpi_w_imm16_ds_ip8() // 0c40 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 23a rcaw2 @@ -41975,7 +41975,7 @@ void m68008_device::cmpi_w_imm16_ais_ip8() // 0c50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -42016,7 +42016,7 @@ void m68008_device::cmpi_w_imm16_ais_ip8() // 0c50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42116,7 +42116,7 @@ void m68008_device::cmpi_w_imm16_aips_ip8() // 0c58 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -42155,7 +42155,7 @@ void m68008_device::cmpi_w_imm16_aips_ip8() // 0c58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42257,7 +42257,7 @@ void m68008_device::cmpi_w_imm16_pais_ip8() // 0c60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -42296,7 +42296,7 @@ void m68008_device::cmpi_w_imm16_pais_ip8() // 0c60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42427,7 +42427,7 @@ void m68008_device::cmpi_w_imm16_das_ip8() // 0c68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -42468,7 +42468,7 @@ void m68008_device::cmpi_w_imm16_das_ip8() // 0c68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42560,7 +42560,7 @@ void m68008_device::cmpi_w_imm16_dais_ip8() // 0c70 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -42652,7 +42652,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -42693,7 +42693,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -42825,7 +42825,7 @@ void m68008_device::cmpi_w_imm16_adr16_ip8() // 0c78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -42864,7 +42864,7 @@ void m68008_device::cmpi_w_imm16_adr16_ip8() // 0c78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -43032,7 +43032,7 @@ void m68008_device::cmpi_w_imm16_adr32_ip8() // 0c79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -43071,7 +43071,7 @@ void m68008_device::cmpi_w_imm16_adr32_ip8() // 0c79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 34c mmrw3 @@ -43203,11 +43203,11 @@ void m68008_device::cmpi_l_imm32_ds_ip8() // 0c80 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry] alu_sub(m_dt, m_da[ry]); sr_nzvc(); // 239 rcal2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43339,7 +43339,7 @@ void m68008_device::cmpi_l_imm32_ais_ip8() // 0c90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -43416,13 +43416,13 @@ void m68008_device::cmpi_l_imm32_ais_ip8() // 0c90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43549,7 +43549,7 @@ void m68008_device::cmpi_l_imm32_aips_ip8() // 0c98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -43629,13 +43629,13 @@ void m68008_device::cmpi_l_imm32_aips_ip8() // 0c98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -43761,7 +43761,7 @@ void m68008_device::cmpi_l_imm32_pais_ip8() // 0ca0 fff8 m_dbin = m_edb; // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -43843,13 +43843,13 @@ void m68008_device::cmpi_l_imm32_pais_ip8() // 0ca0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44012,7 +44012,7 @@ void m68008_device::cmpi_l_imm32_das_ip8() // 0ca8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -44089,13 +44089,13 @@ void m68008_device::cmpi_l_imm32_das_ip8() // 0ca8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44220,7 +44220,7 @@ void m68008_device::cmpi_l_imm32_dais_ip8() // 0cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -44311,7 +44311,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -44388,13 +44388,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44559,7 +44559,7 @@ void m68008_device::cmpi_l_imm32_adr16_ip8() // 0cb8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: @@ -44636,13 +44636,13 @@ void m68008_device::cmpi_l_imm32_adr16_ip8() // 0cb8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44843,7 +44843,7 @@ void m68008_device::cmpi_l_imm32_adr32_ip8() // 0cb9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 17: @@ -44920,13 +44920,13 @@ void m68008_device::cmpi_l_imm32_adr32_ip8() // 0cb9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin alu_sub(m_dt, m_dbin); sr_nzvc(); // 171 cpdl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -44983,7 +44983,7 @@ void m68008_device::move_b_ds_dd_ip8() // 1000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -45042,7 +45042,7 @@ void m68008_device::move_b_ais_dd_ip8() // 1010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45066,7 +45066,7 @@ void m68008_device::move_b_ais_dd_ip8() // 1010 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45129,7 +45129,7 @@ void m68008_device::move_b_aips_dd_ip8() // 1018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -45151,7 +45151,7 @@ void m68008_device::move_b_aips_dd_ip8() // 1018 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45216,7 +45216,7 @@ void m68008_device::move_b_pais_dd_ip8() // 1020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -45238,7 +45238,7 @@ void m68008_device::move_b_pais_dd_ip8() // 1020 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45332,7 +45332,7 @@ void m68008_device::move_b_das_dd_ip8() // 1028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45356,7 +45356,7 @@ void m68008_device::move_b_das_dd_ip8() // 1028 f1f8 m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45411,7 +45411,7 @@ void m68008_device::move_b_dais_dd_ip8() // 1030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -45503,7 +45503,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45527,7 +45527,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45622,7 +45622,7 @@ void m68008_device::move_b_adr16_dd_ip8() // 1038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -45644,7 +45644,7 @@ void m68008_device::move_b_adr16_dd_ip8() // 1038 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45775,7 +45775,7 @@ void m68008_device::move_b_adr32_dd_ip8() // 1039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -45797,7 +45797,7 @@ void m68008_device::move_b_adr32_dd_ip8() // 1039 f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45890,7 +45890,7 @@ void m68008_device::move_b_dpc_dd_ip8() // 103a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -45914,7 +45914,7 @@ void m68008_device::move_b_dpc_dd_ip8() // 103a f1ff m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -45968,7 +45968,7 @@ void m68008_device::move_b_dpci_dd_ip8() // 103b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -46060,7 +46060,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -46084,7 +46084,7 @@ adsw2: m_pc = m_au; set_8(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -46182,7 +46182,7 @@ void m68008_device::move_b_imm8_dd_ip8() // 103c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -46244,7 +46244,7 @@ void m68008_device::move_b_ds_aid_ip8() // 1080 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46318,7 +46318,7 @@ void m68008_device::move_b_ais_aid_ip8() // 1090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46341,7 +46341,7 @@ void m68008_device::move_b_ais_aid_ip8() // 1090 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46421,7 +46421,7 @@ void m68008_device::move_b_aips_aid_ip8() // 1098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -46442,7 +46442,7 @@ void m68008_device::move_b_aips_aid_ip8() // 1098 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46524,7 +46524,7 @@ void m68008_device::move_b_pais_aid_ip8() // 10a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -46545,7 +46545,7 @@ void m68008_device::move_b_pais_aid_ip8() // 10a0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46656,7 +46656,7 @@ void m68008_device::move_b_das_aid_ip8() // 10a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46679,7 +46679,7 @@ void m68008_device::move_b_das_aid_ip8() // 10a8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46751,7 +46751,7 @@ void m68008_device::move_b_dais_aid_ip8() // 10b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -46843,7 +46843,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -46866,7 +46866,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -46978,7 +46978,7 @@ void m68008_device::move_b_adr16_aid_ip8() // 10b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -46999,7 +46999,7 @@ void m68008_device::move_b_adr16_aid_ip8() // 10b8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47147,7 +47147,7 @@ void m68008_device::move_b_adr32_aid_ip8() // 10b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -47168,7 +47168,7 @@ void m68008_device::move_b_adr32_aid_ip8() // 10b9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47278,7 +47278,7 @@ void m68008_device::move_b_dpc_aid_ip8() // 10ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47301,7 +47301,7 @@ void m68008_device::move_b_dpc_aid_ip8() // 10ba f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47372,7 +47372,7 @@ void m68008_device::move_b_dpci_aid_ip8() // 10bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -47464,7 +47464,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47487,7 +47487,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47602,7 +47602,7 @@ void m68008_device::move_b_imm8_aid_ip8() // 10bc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47679,7 +47679,7 @@ void m68008_device::move_b_ds_aipd_ip8() // 10c0 f1f8 set_8xl(m_dbout, m_da[ry]); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47752,7 +47752,7 @@ void m68008_device::move_b_ais_aipd_ip8() // 10d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -47776,7 +47776,7 @@ void m68008_device::move_b_ais_aipd_ip8() // 10d0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47855,7 +47855,7 @@ void m68008_device::move_b_aips_aipd_ip8() // 10d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -47877,7 +47877,7 @@ void m68008_device::move_b_aips_aipd_ip8() // 10d8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -47958,7 +47958,7 @@ void m68008_device::move_b_pais_aipd_ip8() // 10e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -47980,7 +47980,7 @@ void m68008_device::move_b_pais_aipd_ip8() // 10e0 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48090,7 +48090,7 @@ void m68008_device::move_b_das_aipd_ip8() // 10e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48114,7 +48114,7 @@ void m68008_device::move_b_das_aipd_ip8() // 10e8 f1f8 set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48185,7 +48185,7 @@ void m68008_device::move_b_dais_aipd_ip8() // 10f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -48277,7 +48277,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48301,7 +48301,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48412,7 +48412,7 @@ void m68008_device::move_b_adr16_aipd_ip8() // 10f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -48434,7 +48434,7 @@ void m68008_device::move_b_adr16_aipd_ip8() // 10f8 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48581,7 +48581,7 @@ void m68008_device::move_b_adr32_aipd_ip8() // 10f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -48603,7 +48603,7 @@ void m68008_device::move_b_adr32_aipd_ip8() // 10f9 f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48712,7 +48712,7 @@ void m68008_device::move_b_dpc_aipd_ip8() // 10fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48736,7 +48736,7 @@ void m68008_device::move_b_dpc_aipd_ip8() // 10fa f1ff set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -48806,7 +48806,7 @@ void m68008_device::move_b_dpci_aipd_ip8() // 10fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -48898,7 +48898,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -48922,7 +48922,7 @@ adsw2: set_8xl(m_dbout, m_dbin); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -49036,7 +49036,7 @@ void m68008_device::move_b_imm8_aipd_ip8() // 10fc f1ff set_8xl(m_dbout, m_dt); m_pc = m_au; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -49111,7 +49111,7 @@ void m68008_device::move_b_ds_paid_ip8() // 1100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49185,7 +49185,7 @@ void m68008_device::move_b_ais_paid_ip8() // 1110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49208,7 +49208,7 @@ void m68008_device::move_b_ais_paid_ip8() // 1110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49288,7 +49288,7 @@ void m68008_device::move_b_aips_paid_ip8() // 1118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -49309,7 +49309,7 @@ void m68008_device::move_b_aips_paid_ip8() // 1118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49391,7 +49391,7 @@ void m68008_device::move_b_pais_paid_ip8() // 1120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -49412,7 +49412,7 @@ void m68008_device::move_b_pais_paid_ip8() // 1120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49523,7 +49523,7 @@ void m68008_device::move_b_das_paid_ip8() // 1128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49546,7 +49546,7 @@ void m68008_device::move_b_das_paid_ip8() // 1128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49618,7 +49618,7 @@ void m68008_device::move_b_dais_paid_ip8() // 1130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -49710,7 +49710,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -49733,7 +49733,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -49845,7 +49845,7 @@ void m68008_device::move_b_adr16_paid_ip8() // 1138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -49866,7 +49866,7 @@ void m68008_device::move_b_adr16_paid_ip8() // 1138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50014,7 +50014,7 @@ void m68008_device::move_b_adr32_paid_ip8() // 1139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -50035,7 +50035,7 @@ void m68008_device::move_b_adr32_paid_ip8() // 1139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50145,7 +50145,7 @@ void m68008_device::move_b_dpc_paid_ip8() // 113a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50168,7 +50168,7 @@ void m68008_device::move_b_dpc_paid_ip8() // 113a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50239,7 +50239,7 @@ void m68008_device::move_b_dpci_paid_ip8() // 113b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -50331,7 +50331,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50354,7 +50354,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50468,7 +50468,7 @@ void m68008_device::move_b_imm8_paid_ip8() // 113c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50580,7 +50580,7 @@ void m68008_device::move_b_ds_dad_ip8() // 1140 f1f8 m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -50655,7 +50655,7 @@ void m68008_device::move_b_ais_dad_ip8() // 1150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -50677,7 +50677,7 @@ void m68008_device::move_b_ais_dad_ip8() // 1150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50799,7 +50799,7 @@ void m68008_device::move_b_aips_dad_ip8() // 1158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -50819,7 +50819,7 @@ void m68008_device::move_b_aips_dad_ip8() // 1158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -50943,7 +50943,7 @@ void m68008_device::move_b_pais_dad_ip8() // 1160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -50963,7 +50963,7 @@ void m68008_device::move_b_pais_dad_ip8() // 1160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51116,7 +51116,7 @@ void m68008_device::move_b_das_dad_ip8() // 1168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -51138,7 +51138,7 @@ void m68008_device::move_b_das_dad_ip8() // 1168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51252,7 +51252,7 @@ void m68008_device::move_b_dais_dad_ip8() // 1170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -51344,7 +51344,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -51366,7 +51366,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51520,7 +51520,7 @@ void m68008_device::move_b_adr16_dad_ip8() // 1178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -51540,7 +51540,7 @@ void m68008_device::move_b_adr16_dad_ip8() // 1178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51730,7 +51730,7 @@ void m68008_device::move_b_adr32_dad_ip8() // 1179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -51750,7 +51750,7 @@ void m68008_device::move_b_adr32_dad_ip8() // 1179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -51902,7 +51902,7 @@ void m68008_device::move_b_dpc_dad_ip8() // 117a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -51924,7 +51924,7 @@ void m68008_device::move_b_dpc_dad_ip8() // 117a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52037,7 +52037,7 @@ void m68008_device::move_b_dpci_dad_ip8() // 117b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -52129,7 +52129,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -52151,7 +52151,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52343,7 +52343,7 @@ void m68008_device::move_b_imm8_dad_ip8() // 117c f1ff m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -52416,7 +52416,7 @@ void m68008_device::move_b_ds_daid_ip8() // 1180 f1f8 switch(m_inst_substate) { case 0: // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -52510,7 +52510,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_da[ry]); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -52585,7 +52585,7 @@ void m68008_device::move_b_ais_daid_ip8() // 1190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -52604,7 +52604,7 @@ void m68008_device::move_b_ais_daid_ip8() // 1190 f1f8 [[fallthrough]]; case 2: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -52619,7 +52619,7 @@ void m68008_device::move_b_ais_daid_ip8() // 1190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52658,7 +52658,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52782,7 +52782,7 @@ void m68008_device::move_b_aips_daid_ip8() // 1198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -52799,7 +52799,7 @@ void m68008_device::move_b_aips_daid_ip8() // 1198 f1f8 [[fallthrough]]; case 2: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -52814,7 +52814,7 @@ void m68008_device::move_b_aips_daid_ip8() // 1198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52853,7 +52853,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -52979,7 +52979,7 @@ void m68008_device::move_b_pais_daid_ip8() // 11a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -52996,7 +52996,7 @@ void m68008_device::move_b_pais_daid_ip8() // 11a0 f1f8 [[fallthrough]]; case 2: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53011,7 +53011,7 @@ void m68008_device::move_b_pais_daid_ip8() // 11a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53050,7 +53050,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53205,7 +53205,7 @@ void m68008_device::move_b_das_daid_ip8() // 11a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -53224,7 +53224,7 @@ void m68008_device::move_b_das_daid_ip8() // 11a8 f1f8 [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53239,7 +53239,7 @@ void m68008_device::move_b_das_daid_ip8() // 11a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53278,7 +53278,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53394,7 +53394,7 @@ void m68008_device::move_b_dais_daid_ip8() // 11b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -53486,7 +53486,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -53505,7 +53505,7 @@ adsw2: [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53520,7 +53520,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53559,7 +53559,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53715,7 +53715,7 @@ void m68008_device::move_b_adr16_daid_ip8() // 11b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -53732,7 +53732,7 @@ void m68008_device::move_b_adr16_daid_ip8() // 11b8 f1ff [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -53747,7 +53747,7 @@ void m68008_device::move_b_adr16_daid_ip8() // 11b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53786,7 +53786,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -53978,7 +53978,7 @@ void m68008_device::move_b_adr32_daid_ip8() // 11b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -53995,7 +53995,7 @@ void m68008_device::move_b_adr32_daid_ip8() // 11b9 f1ff [[fallthrough]]; case 10: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -54010,7 +54010,7 @@ void m68008_device::move_b_adr32_daid_ip8() // 11b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54049,7 +54049,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54203,7 +54203,7 @@ void m68008_device::move_b_dpc_daid_ip8() // 11ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -54222,7 +54222,7 @@ void m68008_device::move_b_dpc_daid_ip8() // 11ba f1ff [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -54237,7 +54237,7 @@ void m68008_device::move_b_dpc_daid_ip8() // 11ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54276,7 +54276,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54391,7 +54391,7 @@ void m68008_device::move_b_dpci_daid_ip8() // 11bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -54483,7 +54483,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -54502,7 +54502,7 @@ adsw2: [[fallthrough]]; case 6: m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -54517,7 +54517,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54556,7 +54556,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54710,7 +54710,7 @@ void m68008_device::move_b_imm8_daid_ip8() // 11bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -54804,7 +54804,7 @@ rmdw2: m_ir = m_irc; set_8xl(m_dbout, m_dt); m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -54880,7 +54880,7 @@ void m68008_device::move_b_ds_adr16_ip8() // 11c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -54995,7 +54995,7 @@ void m68008_device::move_b_ais_adr16_ip8() // 11d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -55017,7 +55017,7 @@ void m68008_device::move_b_ais_adr16_ip8() // 11d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55138,7 +55138,7 @@ void m68008_device::move_b_aips_adr16_ip8() // 11d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -55158,7 +55158,7 @@ void m68008_device::move_b_aips_adr16_ip8() // 11d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55281,7 +55281,7 @@ void m68008_device::move_b_pais_adr16_ip8() // 11e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -55301,7 +55301,7 @@ void m68008_device::move_b_pais_adr16_ip8() // 11e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55453,7 +55453,7 @@ void m68008_device::move_b_das_adr16_ip8() // 11e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -55475,7 +55475,7 @@ void m68008_device::move_b_das_adr16_ip8() // 11e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55588,7 +55588,7 @@ void m68008_device::move_b_dais_adr16_ip8() // 11f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -55680,7 +55680,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -55702,7 +55702,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -55855,7 +55855,7 @@ void m68008_device::move_b_adr16_adr16_ip8() // 11f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -55875,7 +55875,7 @@ void m68008_device::move_b_adr16_adr16_ip8() // 11f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56064,7 +56064,7 @@ void m68008_device::move_b_adr32_adr16_ip8() // 11f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -56084,7 +56084,7 @@ void m68008_device::move_b_adr32_adr16_ip8() // 11f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56235,7 +56235,7 @@ void m68008_device::move_b_dpc_adr16_ip8() // 11fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -56257,7 +56257,7 @@ void m68008_device::move_b_dpc_adr16_ip8() // 11fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56369,7 +56369,7 @@ void m68008_device::move_b_dpci_adr16_ip8() // 11fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -56461,7 +56461,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -56483,7 +56483,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56638,7 +56638,7 @@ void m68008_device::move_b_imm8_adr16_ip8() // 11fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56791,7 +56791,7 @@ void m68008_device::move_b_ds_adr32_ip8() // 13c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -56906,7 +56906,7 @@ void m68008_device::move_b_ais_adr32_ip8() // 13d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -56928,7 +56928,7 @@ void m68008_device::move_b_ais_adr32_ip8() // 13d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57084,7 +57084,7 @@ void m68008_device::move_b_aips_adr32_ip8() // 13d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -57104,7 +57104,7 @@ void m68008_device::move_b_aips_adr32_ip8() // 13d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57262,7 +57262,7 @@ void m68008_device::move_b_pais_adr32_ip8() // 13e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -57282,7 +57282,7 @@ void m68008_device::move_b_pais_adr32_ip8() // 13e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57469,7 +57469,7 @@ void m68008_device::move_b_das_adr32_ip8() // 13e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -57491,7 +57491,7 @@ void m68008_device::move_b_das_adr32_ip8() // 13e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57639,7 +57639,7 @@ void m68008_device::move_b_dais_adr32_ip8() // 13f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -57731,7 +57731,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -57753,7 +57753,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -57941,7 +57941,7 @@ void m68008_device::move_b_adr16_adr32_ip8() // 13f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -57961,7 +57961,7 @@ void m68008_device::move_b_adr16_adr32_ip8() // 13f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58185,7 +58185,7 @@ void m68008_device::move_b_adr32_adr32_ip8() // 13f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -58205,7 +58205,7 @@ void m68008_device::move_b_adr32_adr32_ip8() // 13f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58391,7 +58391,7 @@ void m68008_device::move_b_dpc_adr32_ip8() // 13fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -58413,7 +58413,7 @@ void m68008_device::move_b_dpc_adr32_ip8() // 13fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58560,7 +58560,7 @@ void m68008_device::move_b_dpci_adr32_ip8() // 13fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -58652,7 +58652,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -58674,7 +58674,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -58900,7 +58900,7 @@ void m68008_device::move_b_imm8_adr32_ip8() // 13fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1 alu_and8(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59019,13 +59019,13 @@ void m68008_device::move_l_ds_dd_ip8() // 2000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_da[rx] = m_at; @@ -59083,14 +59083,14 @@ void m68008_device::move_l_as_dd_ip8() // 2008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59144,7 +59144,7 @@ void m68008_device::move_l_ais_dd_ip8() // 2010 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -59222,14 +59222,14 @@ void m68008_device::move_l_ais_dd_ip8() // 2010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59283,7 +59283,7 @@ void m68008_device::move_l_aips_dd_ip8() // 2018 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -59364,14 +59364,14 @@ void m68008_device::move_l_aips_dd_ip8() // 2018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59424,7 +59424,7 @@ void m68008_device::move_l_pais_dd_ip8() // 2020 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -59507,14 +59507,14 @@ void m68008_device::move_l_pais_dd_ip8() // 2020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59604,7 +59604,7 @@ void m68008_device::move_l_das_dd_ip8() // 2028 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -59682,14 +59682,14 @@ void m68008_device::move_l_das_dd_ip8() // 2028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -59741,7 +59741,7 @@ void m68008_device::move_l_dais_dd_ip8() // 2030 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -59832,7 +59832,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -59910,14 +59910,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60009,7 +60009,7 @@ void m68008_device::move_l_adr16_dd_ip8() // 2038 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -60087,14 +60087,14 @@ void m68008_device::move_l_adr16_dd_ip8() // 2038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60222,7 +60222,7 @@ void m68008_device::move_l_adr32_dd_ip8() // 2039 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -60300,14 +60300,14 @@ void m68008_device::move_l_adr32_dd_ip8() // 2039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60396,7 +60396,7 @@ void m68008_device::move_l_dpc_dd_ip8() // 203a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -60474,14 +60474,14 @@ void m68008_device::move_l_dpc_dd_ip8() // 203a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60532,7 +60532,7 @@ void m68008_device::move_l_dpci_dd_ip8() // 203b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -60623,7 +60623,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -60701,14 +60701,14 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60839,14 +60839,14 @@ void m68008_device::move_l_imm32_dd_ip8() // 203c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -60903,13 +60903,13 @@ void m68008_device::movea_l_ds_ad_ip8() // 2040 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -60965,12 +60965,12 @@ void m68008_device::movea_l_as_ad_ip8() // 2048 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -61024,7 +61024,7 @@ void m68008_device::movea_l_ais_ad_ip8() // 2050 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -61102,13 +61102,13 @@ void m68008_device::movea_l_ais_ad_ip8() // 2050 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -61161,7 +61161,7 @@ void m68008_device::movea_l_aips_ad_ip8() // 2058 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -61242,13 +61242,13 @@ void m68008_device::movea_l_aips_ad_ip8() // 2058 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -61300,7 +61300,7 @@ void m68008_device::movea_l_pais_ad_ip8() // 2060 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -61383,13 +61383,13 @@ void m68008_device::movea_l_pais_ad_ip8() // 2060 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -61478,7 +61478,7 @@ void m68008_device::movea_l_das_ad_ip8() // 2068 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -61556,13 +61556,13 @@ void m68008_device::movea_l_das_ad_ip8() // 2068 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -61613,7 +61613,7 @@ void m68008_device::movea_l_dais_ad_ip8() // 2070 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -61704,7 +61704,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -61782,13 +61782,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -61879,7 +61879,7 @@ void m68008_device::movea_l_adr16_ad_ip8() // 2078 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -61957,13 +61957,13 @@ void m68008_device::movea_l_adr16_ad_ip8() // 2078 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -62090,7 +62090,7 @@ void m68008_device::movea_l_adr32_ad_ip8() // 2079 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -62168,13 +62168,13 @@ void m68008_device::movea_l_adr32_ad_ip8() // 2079 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -62262,7 +62262,7 @@ void m68008_device::movea_l_dpc_ad_ip8() // 207a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -62340,13 +62340,13 @@ void m68008_device::movea_l_dpc_ad_ip8() // 207a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -62396,7 +62396,7 @@ void m68008_device::movea_l_dpci_ad_ip8() // 207b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -62487,7 +62487,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -62565,13 +62565,13 @@ adsl2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 36f mrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_alue); - // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -62701,13 +62701,13 @@ void m68008_device::movea_l_imm32_ad_ip8() // 207c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -62799,7 +62799,7 @@ void m68008_device::move_l_ds_aid_ip8() // 2080 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -62839,7 +62839,7 @@ void m68008_device::move_l_ds_aid_ip8() // 2080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -62932,7 +62932,7 @@ void m68008_device::move_l_as_aid_ip8() // 2088 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -62972,7 +62972,7 @@ void m68008_device::move_l_as_aid_ip8() // 2088 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -63026,7 +63026,7 @@ void m68008_device::move_l_ais_aid_ip8() // 2090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -63103,7 +63103,7 @@ void m68008_device::move_l_ais_aid_ip8() // 2090 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63142,7 +63142,7 @@ void m68008_device::move_l_ais_aid_ip8() // 2090 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63234,7 +63234,7 @@ void m68008_device::move_l_aips_aid_ip8() // 2098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -63314,7 +63314,7 @@ void m68008_device::move_l_aips_aid_ip8() // 2098 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63353,7 +63353,7 @@ void m68008_device::move_l_aips_aid_ip8() // 2098 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63444,7 +63444,7 @@ void m68008_device::move_l_pais_aid_ip8() // 20a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -63526,7 +63526,7 @@ void m68008_device::move_l_pais_aid_ip8() // 20a0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63565,7 +63565,7 @@ void m68008_device::move_l_pais_aid_ip8() // 20a0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63693,7 +63693,7 @@ void m68008_device::move_l_das_aid_ip8() // 20a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -63770,7 +63770,7 @@ void m68008_device::move_l_das_aid_ip8() // 20a8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -63809,7 +63809,7 @@ void m68008_device::move_l_das_aid_ip8() // 20a8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -63899,7 +63899,7 @@ void m68008_device::move_l_dais_aid_ip8() // 20b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -63990,7 +63990,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -64067,7 +64067,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64106,7 +64106,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64236,7 +64236,7 @@ void m68008_device::move_l_adr16_aid_ip8() // 20b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -64313,7 +64313,7 @@ void m68008_device::move_l_adr16_aid_ip8() // 20b8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64352,7 +64352,7 @@ void m68008_device::move_l_adr16_aid_ip8() // 20b8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64518,7 +64518,7 @@ void m68008_device::move_l_adr32_aid_ip8() // 20b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -64595,7 +64595,7 @@ void m68008_device::move_l_adr32_aid_ip8() // 20b9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64634,7 +64634,7 @@ void m68008_device::move_l_adr32_aid_ip8() // 20b9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64761,7 +64761,7 @@ void m68008_device::move_l_dpc_aid_ip8() // 20ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -64838,7 +64838,7 @@ void m68008_device::move_l_dpc_aid_ip8() // 20ba f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -64877,7 +64877,7 @@ void m68008_device::move_l_dpc_aid_ip8() // 20ba f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -64966,7 +64966,7 @@ void m68008_device::move_l_dpci_aid_ip8() // 20bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -65057,7 +65057,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -65134,7 +65134,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65173,7 +65173,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65378,7 +65378,7 @@ void m68008_device::move_l_imm32_aid_ip8() // 20bc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65418,7 +65418,7 @@ void m68008_device::move_l_imm32_aid_ip8() // 20bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65511,7 +65511,7 @@ void m68008_device::move_l_ds_aipd_ip8() // 20c0 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65551,7 +65551,7 @@ void m68008_device::move_l_ds_aipd_ip8() // 20c0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65644,7 +65644,7 @@ void m68008_device::move_l_as_aipd_ip8() // 20c8 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65684,7 +65684,7 @@ void m68008_device::move_l_as_aipd_ip8() // 20c8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -65738,7 +65738,7 @@ void m68008_device::move_l_ais_aipd_ip8() // 20d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -65815,7 +65815,7 @@ void m68008_device::move_l_ais_aipd_ip8() // 20d0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -65854,7 +65854,7 @@ void m68008_device::move_l_ais_aipd_ip8() // 20d0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -65945,7 +65945,7 @@ void m68008_device::move_l_aips_aipd_ip8() // 20d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -66025,7 +66025,7 @@ void m68008_device::move_l_aips_aipd_ip8() // 20d8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66064,7 +66064,7 @@ void m68008_device::move_l_aips_aipd_ip8() // 20d8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66154,7 +66154,7 @@ void m68008_device::move_l_pais_aipd_ip8() // 20e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -66236,7 +66236,7 @@ void m68008_device::move_l_pais_aipd_ip8() // 20e0 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66275,7 +66275,7 @@ void m68008_device::move_l_pais_aipd_ip8() // 20e0 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66402,7 +66402,7 @@ void m68008_device::move_l_das_aipd_ip8() // 20e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -66479,7 +66479,7 @@ void m68008_device::move_l_das_aipd_ip8() // 20e8 f1f8 m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66518,7 +66518,7 @@ void m68008_device::move_l_das_aipd_ip8() // 20e8 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66607,7 +66607,7 @@ void m68008_device::move_l_dais_aipd_ip8() // 20f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -66698,7 +66698,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -66775,7 +66775,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -66814,7 +66814,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -66943,7 +66943,7 @@ void m68008_device::move_l_adr16_aipd_ip8() // 20f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -67020,7 +67020,7 @@ void m68008_device::move_l_adr16_aipd_ip8() // 20f8 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67059,7 +67059,7 @@ void m68008_device::move_l_adr16_aipd_ip8() // 20f8 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67224,7 +67224,7 @@ void m68008_device::move_l_adr32_aipd_ip8() // 20f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -67301,7 +67301,7 @@ void m68008_device::move_l_adr32_aipd_ip8() // 20f9 f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67340,7 +67340,7 @@ void m68008_device::move_l_adr32_aipd_ip8() // 20f9 f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67466,7 +67466,7 @@ void m68008_device::move_l_dpc_aipd_ip8() // 20fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -67543,7 +67543,7 @@ void m68008_device::move_l_dpc_aipd_ip8() // 20fa f1ff m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67582,7 +67582,7 @@ void m68008_device::move_l_dpc_aipd_ip8() // 20fa f1ff m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -67670,7 +67670,7 @@ void m68008_device::move_l_dpci_aipd_ip8() // 20fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -67761,7 +67761,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -67838,7 +67838,7 @@ adsl2: m_dbout = m_alue; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -67877,7 +67877,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68081,7 +68081,7 @@ void m68008_device::move_l_imm32_aipd_ip8() // 20fc f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -68121,7 +68121,7 @@ void m68008_device::move_l_imm32_aipd_ip8() // 20fc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68177,7 +68177,7 @@ void m68008_device::move_l_ds_paid_ip8() // 2100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68217,7 +68217,7 @@ void m68008_device::move_l_ds_paid_ip8() // 2100 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68309,7 +68309,7 @@ void m68008_device::move_l_as_paid_ip8() // 2108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68349,7 +68349,7 @@ void m68008_device::move_l_as_paid_ip8() // 2108 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68439,7 +68439,7 @@ void m68008_device::move_l_ais_paid_ip8() // 2110 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -68516,7 +68516,7 @@ void m68008_device::move_l_ais_paid_ip8() // 2110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68556,7 +68556,7 @@ void m68008_device::move_l_ais_paid_ip8() // 2110 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68646,7 +68646,7 @@ void m68008_device::move_l_aips_paid_ip8() // 2118 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -68726,7 +68726,7 @@ void m68008_device::move_l_aips_paid_ip8() // 2118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68766,7 +68766,7 @@ void m68008_device::move_l_aips_paid_ip8() // 2118 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -68855,7 +68855,7 @@ void m68008_device::move_l_pais_paid_ip8() // 2120 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -68937,7 +68937,7 @@ void m68008_device::move_l_pais_paid_ip8() // 2120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -68977,7 +68977,7 @@ void m68008_device::move_l_pais_paid_ip8() // 2120 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69103,7 +69103,7 @@ void m68008_device::move_l_das_paid_ip8() // 2128 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -69180,7 +69180,7 @@ void m68008_device::move_l_das_paid_ip8() // 2128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69220,7 +69220,7 @@ void m68008_device::move_l_das_paid_ip8() // 2128 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69308,7 +69308,7 @@ void m68008_device::move_l_dais_paid_ip8() // 2130 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -69399,7 +69399,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -69476,7 +69476,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69516,7 +69516,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69644,7 +69644,7 @@ void m68008_device::move_l_adr16_paid_ip8() // 2138 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -69721,7 +69721,7 @@ void m68008_device::move_l_adr16_paid_ip8() // 2138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -69761,7 +69761,7 @@ void m68008_device::move_l_adr16_paid_ip8() // 2138 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -69925,7 +69925,7 @@ void m68008_device::move_l_adr32_paid_ip8() // 2139 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -70002,7 +70002,7 @@ void m68008_device::move_l_adr32_paid_ip8() // 2139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70042,7 +70042,7 @@ void m68008_device::move_l_adr32_paid_ip8() // 2139 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70167,7 +70167,7 @@ void m68008_device::move_l_dpc_paid_ip8() // 213a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -70244,7 +70244,7 @@ void m68008_device::move_l_dpc_paid_ip8() // 213a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70284,7 +70284,7 @@ void m68008_device::move_l_dpc_paid_ip8() // 213a f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70371,7 +70371,7 @@ void m68008_device::move_l_dpci_paid_ip8() // 213b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -70462,7 +70462,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -70539,7 +70539,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70579,7 +70579,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70745,7 +70745,7 @@ void m68008_device::move_l_imm32_paid_ip8() // 213c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -70785,7 +70785,7 @@ void m68008_device::move_l_imm32_paid_ip8() // 213c f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70913,7 +70913,7 @@ void m68008_device::move_l_ds_dad_ip8() // 2140 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -70952,7 +70952,7 @@ void m68008_device::move_l_ds_dad_ip8() // 2140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -70992,7 +70992,7 @@ void m68008_device::move_l_ds_dad_ip8() // 2140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71084,7 +71084,7 @@ void m68008_device::move_l_as_dad_ip8() // 2148 f1f8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71123,7 +71123,7 @@ void m68008_device::move_l_as_dad_ip8() // 2148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -71163,7 +71163,7 @@ void m68008_device::move_l_as_dad_ip8() // 2148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71217,7 +71217,7 @@ void m68008_device::move_l_ais_dad_ip8() // 2150 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -71293,7 +71293,7 @@ void m68008_device::move_l_ais_dad_ip8() // 2150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71333,7 +71333,7 @@ void m68008_device::move_l_ais_dad_ip8() // 2150 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71466,7 +71466,7 @@ void m68008_device::move_l_aips_dad_ip8() // 2158 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -71545,7 +71545,7 @@ void m68008_device::move_l_aips_dad_ip8() // 2158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71585,7 +71585,7 @@ void m68008_device::move_l_aips_dad_ip8() // 2158 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -71717,7 +71717,7 @@ void m68008_device::move_l_pais_dad_ip8() // 2160 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -71798,7 +71798,7 @@ void m68008_device::move_l_pais_dad_ip8() // 2160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -71838,7 +71838,7 @@ void m68008_device::move_l_pais_dad_ip8() // 2160 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72007,7 +72007,7 @@ void m68008_device::move_l_das_dad_ip8() // 2168 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -72083,7 +72083,7 @@ void m68008_device::move_l_das_dad_ip8() // 2168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -72123,7 +72123,7 @@ void m68008_device::move_l_das_dad_ip8() // 2168 f1f8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72254,7 +72254,7 @@ void m68008_device::move_l_dais_dad_ip8() // 2170 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -72345,7 +72345,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -72421,7 +72421,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -72461,7 +72461,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72632,7 +72632,7 @@ void m68008_device::move_l_adr16_dad_ip8() // 2178 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -72708,7 +72708,7 @@ void m68008_device::move_l_adr16_dad_ip8() // 2178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -72748,7 +72748,7 @@ void m68008_device::move_l_adr16_dad_ip8() // 2178 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -72955,7 +72955,7 @@ void m68008_device::move_l_adr32_dad_ip8() // 2179 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -73031,7 +73031,7 @@ void m68008_device::move_l_adr32_dad_ip8() // 2179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73071,7 +73071,7 @@ void m68008_device::move_l_adr32_dad_ip8() // 2179 f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73239,7 +73239,7 @@ void m68008_device::move_l_dpc_dad_ip8() // 217a f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -73315,7 +73315,7 @@ void m68008_device::move_l_dpc_dad_ip8() // 217a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73355,7 +73355,7 @@ void m68008_device::move_l_dpc_dad_ip8() // 217a f1ff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73485,7 +73485,7 @@ void m68008_device::move_l_dpci_dad_ip8() // 217b f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -73576,7 +73576,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -73652,7 +73652,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -73692,7 +73692,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73937,7 +73937,7 @@ void m68008_device::move_l_imm32_dad_ip8() // 217c f1ff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -73976,7 +73976,7 @@ void m68008_device::move_l_imm32_dad_ip8() // 217c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -74016,7 +74016,7 @@ void m68008_device::move_l_imm32_dad_ip8() // 217c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74068,7 +74068,7 @@ void m68008_device::move_l_ds_daid_ip8() // 2180 f1f8 switch(m_inst_substate) { case 0: // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -74162,7 +74162,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -74201,7 +74201,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -74241,7 +74241,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74293,7 +74293,7 @@ void m68008_device::move_l_as_daid_ip8() // 2188 f1f8 switch(m_inst_substate) { case 0: // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -74387,7 +74387,7 @@ rmdl2: m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -74426,7 +74426,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -74466,7 +74466,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74520,7 +74520,7 @@ void m68008_device::move_l_ais_daid_ip8() // 2190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -74593,7 +74593,7 @@ void m68008_device::move_l_ais_daid_ip8() // 2190 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -74608,7 +74608,7 @@ void m68008_device::move_l_ais_daid_ip8() // 2190 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74647,7 +74647,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74689,7 +74689,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -74822,7 +74822,7 @@ void m68008_device::move_l_aips_daid_ip8() // 2198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -74898,7 +74898,7 @@ void m68008_device::move_l_aips_daid_ip8() // 2198 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -74913,7 +74913,7 @@ void m68008_device::move_l_aips_daid_ip8() // 2198 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74952,7 +74952,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -74994,7 +74994,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -75126,7 +75126,7 @@ void m68008_device::move_l_pais_daid_ip8() // 21a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -75204,7 +75204,7 @@ void m68008_device::move_l_pais_daid_ip8() // 21a0 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -75219,7 +75219,7 @@ void m68008_device::move_l_pais_daid_ip8() // 21a0 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75258,7 +75258,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75300,7 +75300,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -75469,7 +75469,7 @@ void m68008_device::move_l_das_daid_ip8() // 21a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -75542,7 +75542,7 @@ void m68008_device::move_l_das_daid_ip8() // 21a8 f1f8 } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -75557,7 +75557,7 @@ void m68008_device::move_l_das_daid_ip8() // 21a8 f1f8 mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75596,7 +75596,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75638,7 +75638,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -75769,7 +75769,7 @@ void m68008_device::move_l_dais_daid_ip8() // 21b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -75860,7 +75860,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -75933,7 +75933,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -75948,7 +75948,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -75987,7 +75987,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76029,7 +76029,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -76200,7 +76200,7 @@ void m68008_device::move_l_adr16_daid_ip8() // 21b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -76273,7 +76273,7 @@ void m68008_device::move_l_adr16_daid_ip8() // 21b8 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -76288,7 +76288,7 @@ void m68008_device::move_l_adr16_daid_ip8() // 21b8 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76327,7 +76327,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76369,7 +76369,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -76576,7 +76576,7 @@ void m68008_device::move_l_adr32_daid_ip8() // 21b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -76649,7 +76649,7 @@ void m68008_device::move_l_adr32_daid_ip8() // 21b9 f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -76664,7 +76664,7 @@ void m68008_device::move_l_adr32_daid_ip8() // 21b9 f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76703,7 +76703,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -76745,7 +76745,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -76913,7 +76913,7 @@ void m68008_device::move_l_dpc_daid_ip8() // 21ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -76986,7 +76986,7 @@ void m68008_device::move_l_dpc_daid_ip8() // 21ba f1ff } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -77001,7 +77001,7 @@ void m68008_device::move_l_dpc_daid_ip8() // 21ba f1ff mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77040,7 +77040,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77082,7 +77082,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -77212,7 +77212,7 @@ void m68008_device::move_l_dpci_daid_ip8() // 21bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -77303,7 +77303,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -77376,7 +77376,7 @@ adsl2: } m_dbin = m_edb; // 29c mmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 10d mmxl1 @@ -77391,7 +77391,7 @@ adsl2: mmxl2: // 02c mmxl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77430,7 +77430,7 @@ mmxl2: mmxl3: // 0ec mmxl3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77472,7 +77472,7 @@ mawl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -77677,7 +77677,7 @@ void m68008_device::move_l_imm32_daid_ip8() // 21bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1ef rmxl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 105 rmxl1 @@ -77771,7 +77771,7 @@ rmdl2: m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -77810,7 +77810,7 @@ rmdl2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -77850,7 +77850,7 @@ rmdl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77905,7 +77905,7 @@ void m68008_device::move_l_ds_adr16_ip8() // 21c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -77945,7 +77945,7 @@ void m68008_device::move_l_ds_adr16_ip8() // 21c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78079,7 +78079,7 @@ void m68008_device::move_l_as_adr16_ip8() // 21c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78119,7 +78119,7 @@ void m68008_device::move_l_as_adr16_ip8() // 21c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78251,7 +78251,7 @@ void m68008_device::move_l_ais_adr16_ip8() // 21d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -78327,7 +78327,7 @@ void m68008_device::move_l_ais_adr16_ip8() // 21d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78367,7 +78367,7 @@ void m68008_device::move_l_ais_adr16_ip8() // 21d0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78499,7 +78499,7 @@ void m68008_device::move_l_aips_adr16_ip8() // 21d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -78578,7 +78578,7 @@ void m68008_device::move_l_aips_adr16_ip8() // 21d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78618,7 +78618,7 @@ void m68008_device::move_l_aips_adr16_ip8() // 21d8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -78749,7 +78749,7 @@ void m68008_device::move_l_pais_adr16_ip8() // 21e0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -78830,7 +78830,7 @@ void m68008_device::move_l_pais_adr16_ip8() // 21e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -78870,7 +78870,7 @@ void m68008_device::move_l_pais_adr16_ip8() // 21e0 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79038,7 +79038,7 @@ void m68008_device::move_l_das_adr16_ip8() // 21e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -79114,7 +79114,7 @@ void m68008_device::move_l_das_adr16_ip8() // 21e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79154,7 +79154,7 @@ void m68008_device::move_l_das_adr16_ip8() // 21e8 fff8 m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79284,7 +79284,7 @@ void m68008_device::move_l_dais_adr16_ip8() // 21f0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -79375,7 +79375,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -79451,7 +79451,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79491,7 +79491,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79661,7 +79661,7 @@ void m68008_device::move_l_adr16_adr16_ip8() // 21f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -79737,7 +79737,7 @@ void m68008_device::move_l_adr16_adr16_ip8() // 21f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -79777,7 +79777,7 @@ void m68008_device::move_l_adr16_adr16_ip8() // 21f8 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -79983,7 +79983,7 @@ void m68008_device::move_l_adr32_adr16_ip8() // 21f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -80059,7 +80059,7 @@ void m68008_device::move_l_adr32_adr16_ip8() // 21f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80099,7 +80099,7 @@ void m68008_device::move_l_adr32_adr16_ip8() // 21f9 ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -80266,7 +80266,7 @@ void m68008_device::move_l_dpc_adr16_ip8() // 21fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -80342,7 +80342,7 @@ void m68008_device::move_l_dpc_adr16_ip8() // 21fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80382,7 +80382,7 @@ void m68008_device::move_l_dpc_adr16_ip8() // 21fa ffff m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -80511,7 +80511,7 @@ void m68008_device::move_l_dpci_adr16_ip8() // 21fb ffff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -80602,7 +80602,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -80678,7 +80678,7 @@ adsl2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80718,7 +80718,7 @@ adsl2: m_dbout = m_alue; set_16l(m_at, m_aluo); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -80926,7 +80926,7 @@ void m68008_device::move_l_imm32_adr16_ip8() // 21fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -80966,7 +80966,7 @@ void m68008_device::move_l_imm32_adr16_ip8() // 21fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81136,7 +81136,7 @@ void m68008_device::move_l_ds_adr32_ip8() // 23c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81176,7 +81176,7 @@ void m68008_device::move_l_ds_adr32_ip8() // 23c0 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81346,7 +81346,7 @@ void m68008_device::move_l_as_adr32_ip8() // 23c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -81386,7 +81386,7 @@ void m68008_device::move_l_as_adr32_ip8() // 23c8 fff8 m_dbout = high16(m_da[ry]); m_alub = high16(m_da[ry]); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81518,7 +81518,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -81595,7 +81595,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -81633,7 +81633,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81672,7 +81672,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -81803,7 +81803,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -81883,7 +81883,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -81921,7 +81921,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -81960,7 +81960,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -82090,7 +82090,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -82172,7 +82172,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -82210,7 +82210,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82249,7 +82249,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -82416,7 +82416,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -82493,7 +82493,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8 m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -82531,7 +82531,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8 m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82570,7 +82570,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8 m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -82699,7 +82699,7 @@ void m68008_device::move_l_dais_adr32_ip8() // 23f0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -82790,7 +82790,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -82867,7 +82867,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -82905,7 +82905,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -82944,7 +82944,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -83113,7 +83113,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -83190,7 +83190,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -83228,7 +83228,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83267,7 +83267,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -83472,7 +83472,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -83549,7 +83549,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -83587,7 +83587,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83626,7 +83626,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -83792,7 +83792,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -83869,7 +83869,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -83907,7 +83907,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -83946,7 +83946,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -84074,7 +84074,7 @@ void m68008_device::move_l_dpci_adr32_ip8() // 23fb ffff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -84165,7 +84165,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -84242,7 +84242,7 @@ adsl2: m_pc = m_au; set_16l(m_at, m_dbin); set_16h(m_at, m_aluo); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -84280,7 +84280,7 @@ adsl2: m_aob = merge_16_32(high16(m_at), m_dbin); m_dbout = m_aluo; m_au = merge_16_32(high16(m_at), m_dbin) + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -84319,7 +84319,7 @@ adsl2: m_ir = m_irc; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -84562,7 +84562,7 @@ void m68008_device::move_l_imm32_adr32_ip8() // 23fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -84602,7 +84602,7 @@ void m68008_device::move_l_imm32_adr32_ip8() // 23fc ffff m_dbout = high16(m_dt); m_alub = high16(m_dt); m_au = m_au + 2; - // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); sr_nz_u(); m_base_ssw = SSW_DATA; @@ -84738,7 +84738,7 @@ void m68008_device::move_w_ds_dd_ip8() // 3000 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -84800,7 +84800,7 @@ void m68008_device::move_w_as_dd_ip8() // 3008 f1f8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 27a rrgw2 @@ -84859,7 +84859,7 @@ void m68008_device::move_w_ais_dd_ip8() // 3010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -84901,7 +84901,7 @@ void m68008_device::move_w_ais_dd_ip8() // 3010 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -84964,7 +84964,7 @@ void m68008_device::move_w_aips_dd_ip8() // 3018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -85004,7 +85004,7 @@ void m68008_device::move_w_aips_dd_ip8() // 3018 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85069,7 +85069,7 @@ void m68008_device::move_w_pais_dd_ip8() // 3020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -85109,7 +85109,7 @@ void m68008_device::move_w_pais_dd_ip8() // 3020 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85203,7 +85203,7 @@ void m68008_device::move_w_das_dd_ip8() // 3028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -85245,7 +85245,7 @@ void m68008_device::move_w_das_dd_ip8() // 3028 f1f8 m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85300,7 +85300,7 @@ void m68008_device::move_w_dais_dd_ip8() // 3030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -85392,7 +85392,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -85434,7 +85434,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85529,7 +85529,7 @@ void m68008_device::move_w_adr16_dd_ip8() // 3038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -85569,7 +85569,7 @@ void m68008_device::move_w_adr16_dd_ip8() // 3038 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85700,7 +85700,7 @@ void m68008_device::move_w_adr32_dd_ip8() // 3039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -85740,7 +85740,7 @@ void m68008_device::move_w_adr32_dd_ip8() // 3039 f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85833,7 +85833,7 @@ void m68008_device::move_w_dpc_dd_ip8() // 303a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -85875,7 +85875,7 @@ void m68008_device::move_w_dpc_dd_ip8() // 303a f1ff m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -85929,7 +85929,7 @@ void m68008_device::move_w_dpci_dd_ip8() // 303b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -86021,7 +86021,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -86063,7 +86063,7 @@ adsw2: m_pc = m_au; set_16l(m_da[rx], m_dbin); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -86161,7 +86161,7 @@ void m68008_device::move_w_imm16_dd_ip8() // 303c f1ff m_pc = m_au; m_at = m_dt; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); // 27a rrgw2 @@ -86227,7 +86227,7 @@ void m68008_device::movea_w_ds_ad_ip8() // 3040 f1f8 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -86286,7 +86286,7 @@ void m68008_device::movea_w_as_ad_ip8() // 3048 f1f8 // 278 rrgl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); m_da[rx] = m_at; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -86340,7 +86340,7 @@ void m68008_device::movea_w_ais_ad_ip8() // 3050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86442,7 +86442,7 @@ void m68008_device::movea_w_aips_ad_ip8() // 3058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -86544,7 +86544,7 @@ void m68008_device::movea_w_pais_ad_ip8() // 3060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -86675,7 +86675,7 @@ void m68008_device::movea_w_das_ad_ip8() // 3068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86769,7 +86769,7 @@ void m68008_device::movea_w_dais_ad_ip8() // 3070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -86861,7 +86861,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -86995,7 +86995,7 @@ void m68008_device::movea_w_adr16_ad_ip8() // 3078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -87163,7 +87163,7 @@ void m68008_device::movea_w_adr32_ad_ip8() // 3079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -87293,7 +87293,7 @@ void m68008_device::movea_w_dpc_ad_ip8() // 307a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87386,7 +87386,7 @@ void m68008_device::movea_w_dpci_ad_ip8() // 307b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -87478,7 +87478,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87619,7 +87619,7 @@ void m68008_device::movea_w_imm16_ad_ip8() // 307c f1ff m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_at; - // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1 + // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1 alu_and(high16(m_dt), 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -87675,7 +87675,7 @@ void m68008_device::move_w_ds_aid_ip8() // 3080 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -87770,7 +87770,7 @@ void m68008_device::move_w_as_aid_ip8() // 3088 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -87862,7 +87862,7 @@ void m68008_device::move_w_ais_aid_ip8() // 3090 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -87903,7 +87903,7 @@ void m68008_device::move_w_ais_aid_ip8() // 3090 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88001,7 +88001,7 @@ void m68008_device::move_w_aips_aid_ip8() // 3098 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -88040,7 +88040,7 @@ void m68008_device::move_w_aips_aid_ip8() // 3098 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88140,7 +88140,7 @@ void m68008_device::move_w_pais_aid_ip8() // 30a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -88179,7 +88179,7 @@ void m68008_device::move_w_pais_aid_ip8() // 30a0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88308,7 +88308,7 @@ void m68008_device::move_w_das_aid_ip8() // 30a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88349,7 +88349,7 @@ void m68008_device::move_w_das_aid_ip8() // 30a8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88439,7 +88439,7 @@ void m68008_device::move_w_dais_aid_ip8() // 30b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -88531,7 +88531,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -88572,7 +88572,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88702,7 +88702,7 @@ void m68008_device::move_w_adr16_aid_ip8() // 30b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -88741,7 +88741,7 @@ void m68008_device::move_w_adr16_aid_ip8() // 30b8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -88907,7 +88907,7 @@ void m68008_device::move_w_adr32_aid_ip8() // 30b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -88946,7 +88946,7 @@ void m68008_device::move_w_adr32_aid_ip8() // 30b9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89074,7 +89074,7 @@ void m68008_device::move_w_dpc_aid_ip8() // 30ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89115,7 +89115,7 @@ void m68008_device::move_w_dpc_aid_ip8() // 30ba f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89204,7 +89204,7 @@ void m68008_device::move_w_dpci_aid_ip8() // 30bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -89296,7 +89296,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89337,7 +89337,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89470,7 +89470,7 @@ void m68008_device::move_w_imm16_aid_ip8() // 30bc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89565,7 +89565,7 @@ void m68008_device::move_w_ds_aipd_ip8() // 30c0 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89659,7 +89659,7 @@ void m68008_device::move_w_as_aipd_ip8() // 30c8 f1f8 m_dbout = m_da[ry]; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89750,7 +89750,7 @@ void m68008_device::move_w_ais_aipd_ip8() // 30d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -89792,7 +89792,7 @@ void m68008_device::move_w_ais_aipd_ip8() // 30d0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -89889,7 +89889,7 @@ void m68008_device::move_w_aips_aipd_ip8() // 30d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -89929,7 +89929,7 @@ void m68008_device::move_w_aips_aipd_ip8() // 30d8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90028,7 +90028,7 @@ void m68008_device::move_w_pais_aipd_ip8() // 30e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -90068,7 +90068,7 @@ void m68008_device::move_w_pais_aipd_ip8() // 30e0 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90196,7 +90196,7 @@ void m68008_device::move_w_das_aipd_ip8() // 30e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -90238,7 +90238,7 @@ void m68008_device::move_w_das_aipd_ip8() // 30e8 f1f8 m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90327,7 +90327,7 @@ void m68008_device::move_w_dais_aipd_ip8() // 30f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -90419,7 +90419,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -90461,7 +90461,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90590,7 +90590,7 @@ void m68008_device::move_w_adr16_aipd_ip8() // 30f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -90630,7 +90630,7 @@ void m68008_device::move_w_adr16_aipd_ip8() // 30f8 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90795,7 +90795,7 @@ void m68008_device::move_w_adr32_aipd_ip8() // 30f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -90835,7 +90835,7 @@ void m68008_device::move_w_adr32_aipd_ip8() // 30f9 f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -90962,7 +90962,7 @@ void m68008_device::move_w_dpc_aipd_ip8() // 30fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -91004,7 +91004,7 @@ void m68008_device::move_w_dpc_aipd_ip8() // 30fa f1ff m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -91092,7 +91092,7 @@ void m68008_device::move_w_dpci_aipd_ip8() // 30fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -91184,7 +91184,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -91226,7 +91226,7 @@ adsw2: m_dbout = m_dbin; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -91358,7 +91358,7 @@ void m68008_device::move_w_imm16_aipd_ip8() // 30fc f1ff m_dbout = m_dt; m_pc = m_au; m_au = m_da[rx] + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -91451,7 +91451,7 @@ void m68008_device::move_w_ds_paid_ip8() // 3100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91545,7 +91545,7 @@ void m68008_device::move_w_as_paid_ip8() // 3108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91637,7 +91637,7 @@ void m68008_device::move_w_ais_paid_ip8() // 3110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -91678,7 +91678,7 @@ void m68008_device::move_w_ais_paid_ip8() // 3110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91776,7 +91776,7 @@ void m68008_device::move_w_aips_paid_ip8() // 3118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -91815,7 +91815,7 @@ void m68008_device::move_w_aips_paid_ip8() // 3118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -91915,7 +91915,7 @@ void m68008_device::move_w_pais_paid_ip8() // 3120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -91954,7 +91954,7 @@ void m68008_device::move_w_pais_paid_ip8() // 3120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92083,7 +92083,7 @@ void m68008_device::move_w_das_paid_ip8() // 3128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -92124,7 +92124,7 @@ void m68008_device::move_w_das_paid_ip8() // 3128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92214,7 +92214,7 @@ void m68008_device::move_w_dais_paid_ip8() // 3130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -92306,7 +92306,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -92347,7 +92347,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92477,7 +92477,7 @@ void m68008_device::move_w_adr16_paid_ip8() // 3138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -92516,7 +92516,7 @@ void m68008_device::move_w_adr16_paid_ip8() // 3138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92682,7 +92682,7 @@ void m68008_device::move_w_adr32_paid_ip8() // 3139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -92721,7 +92721,7 @@ void m68008_device::move_w_adr32_paid_ip8() // 3139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92849,7 +92849,7 @@ void m68008_device::move_w_dpc_paid_ip8() // 313a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -92890,7 +92890,7 @@ void m68008_device::move_w_dpc_paid_ip8() // 313a f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -92979,7 +92979,7 @@ void m68008_device::move_w_dpci_paid_ip8() // 313b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -93071,7 +93071,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -93112,7 +93112,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93244,7 +93244,7 @@ void m68008_device::move_w_imm16_paid_ip8() // 313c f1ff m_ir = m_irc; m_pc = m_au; m_au = m_da[rx] - 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93374,7 +93374,7 @@ void m68008_device::move_w_ds_dad_ip8() // 3140 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -93505,7 +93505,7 @@ void m68008_device::move_w_as_dad_ip8() // 3148 f1f8 m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -93598,7 +93598,7 @@ void m68008_device::move_w_ais_dad_ip8() // 3150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -93638,7 +93638,7 @@ void m68008_device::move_w_ais_dad_ip8() // 3150 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93778,7 +93778,7 @@ void m68008_device::move_w_aips_dad_ip8() // 3158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -93816,7 +93816,7 @@ void m68008_device::move_w_aips_dad_ip8() // 3158 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -93958,7 +93958,7 @@ void m68008_device::move_w_pais_dad_ip8() // 3160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -93996,7 +93996,7 @@ void m68008_device::move_w_pais_dad_ip8() // 3160 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94167,7 +94167,7 @@ void m68008_device::move_w_das_dad_ip8() // 3168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -94207,7 +94207,7 @@ void m68008_device::move_w_das_dad_ip8() // 3168 f1f8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94339,7 +94339,7 @@ void m68008_device::move_w_dais_dad_ip8() // 3170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -94431,7 +94431,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -94471,7 +94471,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94643,7 +94643,7 @@ void m68008_device::move_w_adr16_dad_ip8() // 3178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -94681,7 +94681,7 @@ void m68008_device::move_w_adr16_dad_ip8() // 3178 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -94889,7 +94889,7 @@ void m68008_device::move_w_adr32_dad_ip8() // 3179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -94927,7 +94927,7 @@ void m68008_device::move_w_adr32_dad_ip8() // 3179 f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -95097,7 +95097,7 @@ void m68008_device::move_w_dpc_dad_ip8() // 317a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -95137,7 +95137,7 @@ void m68008_device::move_w_dpc_dad_ip8() // 317a f1ff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -95268,7 +95268,7 @@ void m68008_device::move_w_dpci_dad_ip8() // 317b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -95360,7 +95360,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -95400,7 +95400,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo) + m_da[rx]; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -95610,7 +95610,7 @@ void m68008_device::move_w_imm16_dad_ip8() // 317c f1ff m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -95701,7 +95701,7 @@ void m68008_device::move_w_ds_daid_ip8() // 3180 f1f8 switch(m_inst_substate) { case 0: // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -95795,7 +95795,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -95886,7 +95886,7 @@ void m68008_device::move_w_as_daid_ip8() // 3188 f1f8 switch(m_inst_substate) { case 0: // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -95980,7 +95980,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_da[ry]; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -96073,7 +96073,7 @@ void m68008_device::move_w_ais_daid_ip8() // 3190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -96110,7 +96110,7 @@ void m68008_device::move_w_ais_daid_ip8() // 3190 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96125,7 +96125,7 @@ void m68008_device::move_w_ais_daid_ip8() // 3190 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96164,7 +96164,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96306,7 +96306,7 @@ void m68008_device::move_w_aips_daid_ip8() // 3198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -96341,7 +96341,7 @@ void m68008_device::move_w_aips_daid_ip8() // 3198 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96356,7 +96356,7 @@ void m68008_device::move_w_aips_daid_ip8() // 3198 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96395,7 +96395,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96539,7 +96539,7 @@ void m68008_device::move_w_pais_daid_ip8() // 31a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -96574,7 +96574,7 @@ void m68008_device::move_w_pais_daid_ip8() // 31a0 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96589,7 +96589,7 @@ void m68008_device::move_w_pais_daid_ip8() // 31a0 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96628,7 +96628,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96801,7 +96801,7 @@ void m68008_device::move_w_das_daid_ip8() // 31a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -96838,7 +96838,7 @@ void m68008_device::move_w_das_daid_ip8() // 31a8 f1f8 } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -96853,7 +96853,7 @@ void m68008_device::move_w_das_daid_ip8() // 31a8 f1f8 mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -96892,7 +96892,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97026,7 +97026,7 @@ void m68008_device::move_w_dais_daid_ip8() // 31b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -97118,7 +97118,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -97155,7 +97155,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97170,7 +97170,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97209,7 +97209,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97383,7 +97383,7 @@ void m68008_device::move_w_adr16_daid_ip8() // 31b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -97418,7 +97418,7 @@ void m68008_device::move_w_adr16_daid_ip8() // 31b8 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97433,7 +97433,7 @@ void m68008_device::move_w_adr16_daid_ip8() // 31b8 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97472,7 +97472,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97682,7 +97682,7 @@ void m68008_device::move_w_adr32_daid_ip8() // 31b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -97717,7 +97717,7 @@ void m68008_device::move_w_adr32_daid_ip8() // 31b9 f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97732,7 +97732,7 @@ void m68008_device::move_w_adr32_daid_ip8() // 31b9 f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97771,7 +97771,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -97943,7 +97943,7 @@ void m68008_device::move_w_dpc_daid_ip8() // 31ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -97980,7 +97980,7 @@ void m68008_device::move_w_dpc_daid_ip8() // 31ba f1ff } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -97995,7 +97995,7 @@ void m68008_device::move_w_dpc_daid_ip8() // 31ba f1ff mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98034,7 +98034,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98167,7 +98167,7 @@ void m68008_device::move_w_dpci_daid_ip8() // 31bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -98259,7 +98259,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -98296,7 +98296,7 @@ adsw2: } m_dbin = m_edb; // 298 mmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0 alu_ext(m_aluo); m_icount -= 2; // 101 mmxw1 @@ -98311,7 +98311,7 @@ adsw2: mmxw2: // 028 mmxw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98350,7 +98350,7 @@ mmxw2: mmxw3: // 0e8 mmxw3 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98522,7 +98522,7 @@ void m68008_device::move_w_imm16_daid_ip8() // 31bc f1ff m_irc = m_edb; m_dbin = m_edb; // 1eb rmxw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 109 rmxw1 @@ -98616,7 +98616,7 @@ rmdw2: m_ir = m_irc; m_dbout = m_dt; m_au = m_pc + 2; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -98710,7 +98710,7 @@ void m68008_device::move_w_ds_adr16_ip8() // 31c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98845,7 +98845,7 @@ void m68008_device::move_w_as_adr16_ip8() // 31c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -98978,7 +98978,7 @@ void m68008_device::move_w_ais_adr16_ip8() // 31d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -99018,7 +99018,7 @@ void m68008_device::move_w_ais_adr16_ip8() // 31d0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99157,7 +99157,7 @@ void m68008_device::move_w_aips_adr16_ip8() // 31d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -99195,7 +99195,7 @@ void m68008_device::move_w_aips_adr16_ip8() // 31d8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99336,7 +99336,7 @@ void m68008_device::move_w_pais_adr16_ip8() // 31e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -99374,7 +99374,7 @@ void m68008_device::move_w_pais_adr16_ip8() // 31e0 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99544,7 +99544,7 @@ void m68008_device::move_w_das_adr16_ip8() // 31e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -99584,7 +99584,7 @@ void m68008_device::move_w_das_adr16_ip8() // 31e8 fff8 m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -99715,7 +99715,7 @@ void m68008_device::move_w_dais_adr16_ip8() // 31f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -99807,7 +99807,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -99847,7 +99847,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100018,7 +100018,7 @@ void m68008_device::move_w_adr16_adr16_ip8() // 31f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -100056,7 +100056,7 @@ void m68008_device::move_w_adr16_adr16_ip8() // 31f8 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100263,7 +100263,7 @@ void m68008_device::move_w_adr32_adr16_ip8() // 31f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -100301,7 +100301,7 @@ void m68008_device::move_w_adr32_adr16_ip8() // 31f9 ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100470,7 +100470,7 @@ void m68008_device::move_w_dpc_adr16_ip8() // 31fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -100510,7 +100510,7 @@ void m68008_device::move_w_dpc_adr16_ip8() // 31fa ffff m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100640,7 +100640,7 @@ void m68008_device::move_w_dpci_adr16_ip8() // 31fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -100732,7 +100732,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -100772,7 +100772,7 @@ adsw2: m_aob = m_au; m_pc = m_au; m_au = ext32(m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -100945,7 +100945,7 @@ void m68008_device::move_w_imm16_adr16_ip8() // 31fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = ext32(m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101116,7 +101116,7 @@ void m68008_device::move_w_ds_adr32_ip8() // 33c0 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101287,7 +101287,7 @@ void m68008_device::move_w_as_adr32_ip8() // 33c8 fff8 m_pc = m_au; set_16l(m_at, m_da[ry]); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101420,7 +101420,7 @@ void m68008_device::move_w_ais_adr32_ip8() // 33d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -101460,7 +101460,7 @@ void m68008_device::move_w_ais_adr32_ip8() // 33d0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101634,7 +101634,7 @@ void m68008_device::move_w_aips_adr32_ip8() // 33d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -101672,7 +101672,7 @@ void m68008_device::move_w_aips_adr32_ip8() // 33d8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -101848,7 +101848,7 @@ void m68008_device::move_w_pais_adr32_ip8() // 33e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -101886,7 +101886,7 @@ void m68008_device::move_w_pais_adr32_ip8() // 33e0 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102091,7 +102091,7 @@ void m68008_device::move_w_das_adr32_ip8() // 33e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -102131,7 +102131,7 @@ void m68008_device::move_w_das_adr32_ip8() // 33e8 fff8 m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102297,7 +102297,7 @@ void m68008_device::move_w_dais_adr32_ip8() // 33f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -102389,7 +102389,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -102429,7 +102429,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102635,7 +102635,7 @@ void m68008_device::move_w_adr16_adr32_ip8() // 33f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -102673,7 +102673,7 @@ void m68008_device::move_w_adr16_adr32_ip8() // 33f8 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -102915,7 +102915,7 @@ void m68008_device::move_w_adr32_adr32_ip8() // 33f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -102953,7 +102953,7 @@ void m68008_device::move_w_adr32_adr32_ip8() // 33f9 ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103157,7 +103157,7 @@ void m68008_device::move_w_dpc_adr32_ip8() // 33fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -103197,7 +103197,7 @@ void m68008_device::move_w_dpc_adr32_ip8() // 33fa ffff m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103362,7 +103362,7 @@ void m68008_device::move_w_dpci_adr32_ip8() // 33fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -103454,7 +103454,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -103494,7 +103494,7 @@ adsw2: m_aob = m_au; m_pc = m_au; set_16h(m_at, m_aluo); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103738,7 +103738,7 @@ void m68008_device::move_w_imm16_adr32_ip8() // 33fc ffff m_pc = m_au; set_16l(m_at, m_dt); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -103873,7 +103873,7 @@ void m68008_device::negx_b_ds_ip8() // 4000 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0 alu_subx8(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -103931,7 +103931,7 @@ void m68008_device::negx_b_ais_ip8() // 4010 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -103954,7 +103954,7 @@ void m68008_device::negx_b_ais_ip8() // 4010 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104032,7 +104032,7 @@ void m68008_device::negx_b_aips_ip8() // 4018 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -104053,7 +104053,7 @@ void m68008_device::negx_b_aips_ip8() // 4018 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104133,7 +104133,7 @@ void m68008_device::negx_b_pais_ip8() // 4020 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -104154,7 +104154,7 @@ void m68008_device::negx_b_pais_ip8() // 4020 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104263,7 +104263,7 @@ void m68008_device::negx_b_das_ip8() // 4028 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -104286,7 +104286,7 @@ void m68008_device::negx_b_das_ip8() // 4028 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104356,7 +104356,7 @@ void m68008_device::negx_b_dais_ip8() // 4030 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -104448,7 +104448,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -104471,7 +104471,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104581,7 +104581,7 @@ void m68008_device::negx_b_adr16_ip8() // 4038 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -104602,7 +104602,7 @@ void m68008_device::negx_b_adr16_ip8() // 4038 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104748,7 +104748,7 @@ void m68008_device::negx_b_adr32_ip8() // 4039 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -104769,7 +104769,7 @@ void m68008_device::negx_b_adr32_ip8() // 4039 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0 alu_subx8(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -104843,7 +104843,7 @@ void m68008_device::negx_w_ds_ip8() // 4040 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 08b roaw2 @@ -104901,7 +104901,7 @@ void m68008_device::negx_w_ais_ip8() // 4050 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -104942,7 +104942,7 @@ void m68008_device::negx_w_ais_ip8() // 4050 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105038,7 +105038,7 @@ void m68008_device::negx_w_aips_ip8() // 4058 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -105077,7 +105077,7 @@ void m68008_device::negx_w_aips_ip8() // 4058 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105175,7 +105175,7 @@ void m68008_device::negx_w_pais_ip8() // 4060 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -105214,7 +105214,7 @@ void m68008_device::negx_w_pais_ip8() // 4060 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105341,7 +105341,7 @@ void m68008_device::negx_w_das_ip8() // 4068 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -105382,7 +105382,7 @@ void m68008_device::negx_w_das_ip8() // 4068 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105470,7 +105470,7 @@ void m68008_device::negx_w_dais_ip8() // 4070 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -105562,7 +105562,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -105603,7 +105603,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105731,7 +105731,7 @@ void m68008_device::negx_w_adr16_ip8() // 4078 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -105770,7 +105770,7 @@ void m68008_device::negx_w_adr16_ip8() // 4078 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -105934,7 +105934,7 @@ void m68008_device::negx_w_adr32_ip8() // 4079 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -105973,7 +105973,7 @@ void m68008_device::negx_w_adr32_ip8() // 4079 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106065,12 +106065,12 @@ void m68008_device::negx_l_ds_ip8() // 4080 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0 alu_subx(m_da[ry], 0x0000); sr_xnzvc_u(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106129,7 +106129,7 @@ void m68008_device::negx_l_ais_ip8() // 4090 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -106206,7 +106206,7 @@ void m68008_device::negx_l_ais_ip8() // 4090 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106246,7 +106246,7 @@ void m68008_device::negx_l_ais_ip8() // 4090 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106334,7 +106334,7 @@ void m68008_device::negx_l_aips_ip8() // 4098 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -106414,7 +106414,7 @@ void m68008_device::negx_l_aips_ip8() // 4098 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106454,7 +106454,7 @@ void m68008_device::negx_l_aips_ip8() // 4098 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106541,7 +106541,7 @@ void m68008_device::negx_l_pais_ip8() // 40a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -106623,7 +106623,7 @@ void m68008_device::negx_l_pais_ip8() // 40a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106663,7 +106663,7 @@ void m68008_device::negx_l_pais_ip8() // 40a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106787,7 +106787,7 @@ void m68008_device::negx_l_das_ip8() // 40a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -106864,7 +106864,7 @@ void m68008_device::negx_l_das_ip8() // 40a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -106904,7 +106904,7 @@ void m68008_device::negx_l_das_ip8() // 40a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -106990,7 +106990,7 @@ void m68008_device::negx_l_dais_ip8() // 40b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -107081,7 +107081,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -107158,7 +107158,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107198,7 +107198,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -107324,7 +107324,7 @@ void m68008_device::negx_l_adr16_ip8() // 40b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -107401,7 +107401,7 @@ void m68008_device::negx_l_adr16_ip8() // 40b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107441,7 +107441,7 @@ void m68008_device::negx_l_adr16_ip8() // 40b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -107603,7 +107603,7 @@ void m68008_device::negx_l_adr32_ip8() // 40b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -107680,7 +107680,7 @@ void m68008_device::negx_l_adr32_ip8() // 40b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0 + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0 alu_subx(m_dbin, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -107720,7 +107720,7 @@ void m68008_device::negx_l_adr32_ip8() // 40b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -107867,7 +107867,7 @@ void m68008_device::move_sr_ais_ip8() // 40d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -107910,7 +107910,7 @@ void m68008_device::move_sr_ais_ip8() // 40d0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -108005,7 +108005,7 @@ void m68008_device::move_sr_aips_ip8() // 40d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -108046,7 +108046,7 @@ void m68008_device::move_sr_aips_ip8() // 40d8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -108143,7 +108143,7 @@ void m68008_device::move_sr_pais_ip8() // 40e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -108184,7 +108184,7 @@ void m68008_device::move_sr_pais_ip8() // 40e0 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -108310,7 +108310,7 @@ void m68008_device::move_sr_das_ip8() // 40e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108353,7 +108353,7 @@ void m68008_device::move_sr_das_ip8() // 40e8 fff8 m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -108440,7 +108440,7 @@ void m68008_device::move_sr_dais_ip8() // 40f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -108532,7 +108532,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -108575,7 +108575,7 @@ adsw2: m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -108702,7 +108702,7 @@ void m68008_device::move_sr_adr16_ip8() // 40f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -108743,7 +108743,7 @@ void m68008_device::move_sr_adr16_ip8() // 40f8 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -108906,7 +108906,7 @@ void m68008_device::move_sr_adr32_ip8() // 40f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -108947,7 +108947,7 @@ void m68008_device::move_sr_adr32_ip8() // 40f9 ffff m_ftu = m_sr; // 324 sftm2 m_au = m_at; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -109037,7 +109037,7 @@ void m68008_device::chk_w_ds_dd_ip8() // 4180 f1f8 // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry] alu_sub(m_da[rx], m_da[ry]); sr_nzvc(); m_icount -= 2; @@ -109045,7 +109045,7 @@ void m68008_device::chk_w_ds_dd_ip8() // 4180 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -109063,14 +109063,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -109110,7 +109110,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109148,7 +109148,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -109366,7 +109366,7 @@ void m68008_device::chk_w_ais_dd_ip8() // 4190 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -109405,7 +109405,7 @@ void m68008_device::chk_w_ais_dd_ip8() // 4190 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -109413,7 +109413,7 @@ void m68008_device::chk_w_ais_dd_ip8() // 4190 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -109431,14 +109431,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109478,7 +109478,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -109516,7 +109516,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -109740,7 +109740,7 @@ void m68008_device::chk_w_aips_dd_ip8() // 4198 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -109777,7 +109777,7 @@ void m68008_device::chk_w_aips_dd_ip8() // 4198 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -109785,7 +109785,7 @@ void m68008_device::chk_w_aips_dd_ip8() // 4198 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -109803,14 +109803,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -109850,7 +109850,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -109888,7 +109888,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -110114,7 +110114,7 @@ void m68008_device::chk_w_pais_dd_ip8() // 41a0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -110151,7 +110151,7 @@ void m68008_device::chk_w_pais_dd_ip8() // 41a0 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -110159,7 +110159,7 @@ void m68008_device::chk_w_pais_dd_ip8() // 41a0 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -110177,14 +110177,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -110224,7 +110224,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110262,7 +110262,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -110517,7 +110517,7 @@ void m68008_device::chk_w_das_dd_ip8() // 41a8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -110556,7 +110556,7 @@ void m68008_device::chk_w_das_dd_ip8() // 41a8 f1f8 // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -110564,7 +110564,7 @@ void m68008_device::chk_w_das_dd_ip8() // 41a8 f1f8 m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -110582,14 +110582,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -110629,7 +110629,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -110667,7 +110667,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -110883,7 +110883,7 @@ void m68008_device::chk_w_dais_dd_ip8() // 41b0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -110975,7 +110975,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -111014,7 +111014,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -111022,7 +111022,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -111040,14 +111040,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111087,7 +111087,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -111125,7 +111125,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -111381,7 +111381,7 @@ void m68008_device::chk_w_adr16_dd_ip8() // 41b8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -111418,7 +111418,7 @@ void m68008_device::chk_w_adr16_dd_ip8() // 41b8 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -111426,7 +111426,7 @@ void m68008_device::chk_w_adr16_dd_ip8() // 41b8 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -111444,14 +111444,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -111491,7 +111491,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -111529,7 +111529,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -111821,7 +111821,7 @@ void m68008_device::chk_w_adr32_dd_ip8() // 41b9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -111858,7 +111858,7 @@ void m68008_device::chk_w_adr32_dd_ip8() // 41b9 f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -111866,7 +111866,7 @@ void m68008_device::chk_w_adr32_dd_ip8() // 41b9 f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -111884,14 +111884,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -111931,7 +111931,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -111969,7 +111969,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -112223,7 +112223,7 @@ void m68008_device::chk_w_dpc_dd_ip8() // 41ba f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -112262,7 +112262,7 @@ void m68008_device::chk_w_dpc_dd_ip8() // 41ba f1ff // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -112270,7 +112270,7 @@ void m68008_device::chk_w_dpc_dd_ip8() // 41ba f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -112288,14 +112288,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112335,7 +112335,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112373,7 +112373,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -112588,7 +112588,7 @@ void m68008_device::chk_w_dpci_dd_ip8() // 41bb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -112680,7 +112680,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -112719,7 +112719,7 @@ adsw2: // 151 chkm1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_nzvc(); m_icount -= 2; @@ -112727,7 +112727,7 @@ adsw2: m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -112745,14 +112745,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -112792,7 +112792,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -112830,7 +112830,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -113086,7 +113086,7 @@ void m68008_device::chk_w_imm16_dd_ip8() // 41bc f1ff // 152 chkr1 m_alub = m_da[rx]; m_au = m_au - 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt alu_sub(m_da[rx], m_dt); sr_nzvc(); m_icount -= 2; @@ -113094,7 +113094,7 @@ void m68008_device::chk_w_imm16_dd_ip8() // 41bc f1ff m_t = !(m_isr & (SR_V|SR_N)); m_pc = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -113112,14 +113112,14 @@ trap1: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -113159,7 +113159,7 @@ trap1: m_da[16] = m_au; m_ftu = 0x0018; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -113197,7 +113197,7 @@ trap1: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -113567,7 +113567,7 @@ void m68008_device::lea_dais_ad_ip8() // 41f0 f1f8 switch(m_inst_substate) { case 0: // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -114028,7 +114028,7 @@ void m68008_device::lea_dpci_ad_ip8() // 41fb f1ff switch(m_inst_substate) { case 0: // 1fb leax0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ea leax1 @@ -114180,7 +114180,7 @@ void m68008_device::clr_b_ds_ip8() // 4200 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0 alu_and8(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -114188,7 +114188,7 @@ void m68008_device::clr_b_ds_ip8() // 4200 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -114239,11 +114239,11 @@ void m68008_device::clr_b_ais_ip8() // 4210 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -114263,7 +114263,7 @@ void m68008_device::clr_b_ais_ip8() // 4210 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114305,7 +114305,7 @@ void m68008_device::clr_b_ais_ip8() // 4210 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -114339,12 +114339,12 @@ void m68008_device::clr_b_aips_ip8() // 4218 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -114365,7 +114365,7 @@ void m68008_device::clr_b_aips_ip8() // 4218 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114407,7 +114407,7 @@ void m68008_device::clr_b_aips_ip8() // 4218 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -114440,7 +114440,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -114448,7 +114448,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -114469,7 +114469,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114511,7 +114511,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -114542,7 +114542,7 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -114580,11 +114580,11 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -114604,7 +114604,7 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114646,7 +114646,7 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -114675,14 +114675,14 @@ void m68008_device::clr_b_dais_ip8() // 4230 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -114690,7 +114690,7 @@ void m68008_device::clr_b_dais_ip8() // 4230 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -114729,7 +114729,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -114770,11 +114770,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -114794,7 +114794,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114836,7 +114836,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -114869,7 +114869,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -114907,7 +114907,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -114928,7 +114928,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -114970,7 +114970,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -115001,7 +115001,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -115040,7 +115040,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -115078,7 +115078,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -115099,7 +115099,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0 alu_and8(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115141,7 +115141,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -115174,7 +115174,7 @@ void m68008_device::clr_w_ds_ip8() // 4240 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 08b roaw2 @@ -115182,7 +115182,7 @@ void m68008_device::clr_w_ds_ip8() // 4240 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -115233,11 +115233,11 @@ void m68008_device::clr_w_ais_ip8() // 4250 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -115275,7 +115275,7 @@ void m68008_device::clr_w_ais_ip8() // 4250 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115317,7 +115317,7 @@ void m68008_device::clr_w_ais_ip8() // 4250 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -115369,12 +115369,12 @@ void m68008_device::clr_w_aips_ip8() // 4258 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -115413,7 +115413,7 @@ void m68008_device::clr_w_aips_ip8() // 4258 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115455,7 +115455,7 @@ void m68008_device::clr_w_aips_ip8() // 4258 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -115506,7 +115506,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -115514,7 +115514,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -115553,7 +115553,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115595,7 +115595,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -115644,7 +115644,7 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -115682,11 +115682,11 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -115724,7 +115724,7 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115766,7 +115766,7 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -115813,14 +115813,14 @@ void m68008_device::clr_w_dais_ip8() // 4270 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -115828,7 +115828,7 @@ void m68008_device::clr_w_dais_ip8() // 4270 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -115867,7 +115867,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -115908,11 +115908,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -115950,7 +115950,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -115992,7 +115992,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -116043,7 +116043,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -116081,7 +116081,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -116120,7 +116120,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116162,7 +116162,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -116211,7 +116211,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -116250,7 +116250,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -116288,7 +116288,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -116327,7 +116327,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116369,7 +116369,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -116420,12 +116420,12 @@ void m68008_device::clr_l_ds_ip8() // 4280 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0 alu_and(m_da[ry], 0x0000); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0 alu_and(high16(m_da[ry]), 0x0000); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116466,7 +116466,7 @@ void m68008_device::clr_l_ds_ip8() // 4280 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -116485,7 +116485,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -116525,7 +116525,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -116563,7 +116563,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116603,7 +116603,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -116643,7 +116643,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -116692,7 +116692,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -116732,11 +116732,11 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -116774,7 +116774,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -116814,7 +116814,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -116854,7 +116854,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -116902,14 +116902,14 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -116948,7 +116948,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -116986,7 +116986,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117026,7 +117026,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117066,7 +117066,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -117115,7 +117115,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -117152,7 +117152,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -117192,7 +117192,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -117230,7 +117230,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117270,7 +117270,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117310,7 +117310,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -117357,14 +117357,14 @@ void m68008_device::clr_l_dais_ip8() // 42b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -117372,7 +117372,7 @@ void m68008_device::clr_l_dais_ip8() // 42b0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -117411,7 +117411,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -117451,7 +117451,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -117491,7 +117491,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -117529,7 +117529,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117569,7 +117569,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117609,7 +117609,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -117660,7 +117660,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -117698,7 +117698,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -117738,7 +117738,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -117776,7 +117776,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -117816,7 +117816,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -117856,7 +117856,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -117905,7 +117905,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -117944,7 +117944,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin alu_and(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -117982,7 +117982,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -118022,7 +118022,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -118060,7 +118060,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118100,7 +118100,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0 + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0 alu_and(m_alub, 0x0000); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -118140,7 +118140,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -118191,7 +118191,7 @@ void m68008_device::neg_b_ds_ip8() // 4400 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0 alu_sub8(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -118249,7 +118249,7 @@ void m68008_device::neg_b_ais_ip8() // 4410 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -118272,7 +118272,7 @@ void m68008_device::neg_b_ais_ip8() // 4410 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118350,7 +118350,7 @@ void m68008_device::neg_b_aips_ip8() // 4418 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -118371,7 +118371,7 @@ void m68008_device::neg_b_aips_ip8() // 4418 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118451,7 +118451,7 @@ void m68008_device::neg_b_pais_ip8() // 4420 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -118472,7 +118472,7 @@ void m68008_device::neg_b_pais_ip8() // 4420 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118581,7 +118581,7 @@ void m68008_device::neg_b_das_ip8() // 4428 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -118604,7 +118604,7 @@ void m68008_device::neg_b_das_ip8() // 4428 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118674,7 +118674,7 @@ void m68008_device::neg_b_dais_ip8() // 4430 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -118766,7 +118766,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -118789,7 +118789,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -118899,7 +118899,7 @@ void m68008_device::neg_b_adr16_ip8() // 4438 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -118920,7 +118920,7 @@ void m68008_device::neg_b_adr16_ip8() // 4438 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119066,7 +119066,7 @@ void m68008_device::neg_b_adr32_ip8() // 4439 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -119087,7 +119087,7 @@ void m68008_device::neg_b_adr32_ip8() // 4439 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0 alu_sub8(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119161,7 +119161,7 @@ void m68008_device::neg_w_ds_ip8() // 4440 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 08b roaw2 @@ -119219,7 +119219,7 @@ void m68008_device::neg_w_ais_ip8() // 4450 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -119260,7 +119260,7 @@ void m68008_device::neg_w_ais_ip8() // 4450 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119356,7 +119356,7 @@ void m68008_device::neg_w_aips_ip8() // 4458 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -119395,7 +119395,7 @@ void m68008_device::neg_w_aips_ip8() // 4458 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119493,7 +119493,7 @@ void m68008_device::neg_w_pais_ip8() // 4460 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -119532,7 +119532,7 @@ void m68008_device::neg_w_pais_ip8() // 4460 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119659,7 +119659,7 @@ void m68008_device::neg_w_das_ip8() // 4468 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -119700,7 +119700,7 @@ void m68008_device::neg_w_das_ip8() // 4468 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -119788,7 +119788,7 @@ void m68008_device::neg_w_dais_ip8() // 4470 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -119880,7 +119880,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -119921,7 +119921,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120049,7 +120049,7 @@ void m68008_device::neg_w_adr16_ip8() // 4478 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -120088,7 +120088,7 @@ void m68008_device::neg_w_adr16_ip8() // 4478 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120252,7 +120252,7 @@ void m68008_device::neg_w_adr32_ip8() // 4479 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -120291,7 +120291,7 @@ void m68008_device::neg_w_adr32_ip8() // 4479 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120383,12 +120383,12 @@ void m68008_device::neg_l_ds_ip8() // 4480 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0 alu_sub(m_da[ry], 0x0000); sr_xnzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0 alu_subc(high16(m_da[ry]), 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120447,7 +120447,7 @@ void m68008_device::neg_l_ais_ip8() // 4490 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -120524,7 +120524,7 @@ void m68008_device::neg_l_ais_ip8() // 4490 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120564,7 +120564,7 @@ void m68008_device::neg_l_ais_ip8() // 4490 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -120652,7 +120652,7 @@ void m68008_device::neg_l_aips_ip8() // 4498 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -120732,7 +120732,7 @@ void m68008_device::neg_l_aips_ip8() // 4498 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120772,7 +120772,7 @@ void m68008_device::neg_l_aips_ip8() // 4498 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -120859,7 +120859,7 @@ void m68008_device::neg_l_pais_ip8() // 44a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -120941,7 +120941,7 @@ void m68008_device::neg_l_pais_ip8() // 44a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -120981,7 +120981,7 @@ void m68008_device::neg_l_pais_ip8() // 44a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121105,7 +121105,7 @@ void m68008_device::neg_l_das_ip8() // 44a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -121182,7 +121182,7 @@ void m68008_device::neg_l_das_ip8() // 44a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -121222,7 +121222,7 @@ void m68008_device::neg_l_das_ip8() // 44a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121308,7 +121308,7 @@ void m68008_device::neg_l_dais_ip8() // 44b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -121399,7 +121399,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -121476,7 +121476,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -121516,7 +121516,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121642,7 +121642,7 @@ void m68008_device::neg_l_adr16_ip8() // 44b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -121719,7 +121719,7 @@ void m68008_device::neg_l_adr16_ip8() // 44b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -121759,7 +121759,7 @@ void m68008_device::neg_l_adr16_ip8() // 44b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -121921,7 +121921,7 @@ void m68008_device::neg_l_adr32_ip8() // 44b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -121998,7 +121998,7 @@ void m68008_device::neg_l_adr32_ip8() // 44b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0 + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0 alu_sub(m_dbin, 0x0000); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -122038,7 +122038,7 @@ void m68008_device::neg_l_adr32_ip8() // 44b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0 + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0 alu_subc(m_alub, 0x0000); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -122228,7 +122228,7 @@ void m68008_device::move_ais_ccr_ip8() // 44d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -122375,7 +122375,7 @@ void m68008_device::move_aips_ccr_ip8() // 44d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -122522,7 +122522,7 @@ void m68008_device::move_pais_ccr_ip8() // 44e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -122698,7 +122698,7 @@ void m68008_device::move_das_ccr_ip8() // 44e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -122837,7 +122837,7 @@ void m68008_device::move_dais_ccr_ip8() // 44f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -122929,7 +122929,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -123108,7 +123108,7 @@ void m68008_device::move_adr16_ccr_ip8() // 44f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -123321,7 +123321,7 @@ void m68008_device::move_adr32_ccr_ip8() // 44f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -123496,7 +123496,7 @@ void m68008_device::move_dpc_ccr_ip8() // 44fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -123634,7 +123634,7 @@ void m68008_device::move_dpci_ccr_ip8() // 44fb ffff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -123726,7 +123726,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124009,7 +124009,7 @@ void m68008_device::not_b_ds_ip8() // 4600 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0 alu_not8(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -124067,7 +124067,7 @@ void m68008_device::not_b_ais_ip8() // 4610 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124090,7 +124090,7 @@ void m68008_device::not_b_ais_ip8() // 4610 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124168,7 +124168,7 @@ void m68008_device::not_b_aips_ip8() // 4618 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -124189,7 +124189,7 @@ void m68008_device::not_b_aips_ip8() // 4618 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124269,7 +124269,7 @@ void m68008_device::not_b_pais_ip8() // 4620 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1 alu_and8x(m_alub, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -124290,7 +124290,7 @@ void m68008_device::not_b_pais_ip8() // 4620 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124399,7 +124399,7 @@ void m68008_device::not_b_das_ip8() // 4628 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124422,7 +124422,7 @@ void m68008_device::not_b_das_ip8() // 4628 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124492,7 +124492,7 @@ void m68008_device::not_b_dais_ip8() // 4630 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -124584,7 +124584,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -124607,7 +124607,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124717,7 +124717,7 @@ void m68008_device::not_b_adr16_ip8() // 4638 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -124738,7 +124738,7 @@ void m68008_device::not_b_adr16_ip8() // 4638 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124884,7 +124884,7 @@ void m68008_device::not_b_adr32_ip8() // 4639 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1 alu_and8x(m_dbin, 0xff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -124905,7 +124905,7 @@ void m68008_device::not_b_adr32_ip8() // 4639 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0 alu_not8(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -124979,7 +124979,7 @@ void m68008_device::not_w_ds_ip8() // 4640 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -125037,7 +125037,7 @@ void m68008_device::not_w_ais_ip8() // 4650 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -125078,7 +125078,7 @@ void m68008_device::not_w_ais_ip8() // 4650 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125174,7 +125174,7 @@ void m68008_device::not_w_aips_ip8() // 4658 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -125213,7 +125213,7 @@ void m68008_device::not_w_aips_ip8() // 4658 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125311,7 +125311,7 @@ void m68008_device::not_w_pais_ip8() // 4660 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -125350,7 +125350,7 @@ void m68008_device::not_w_pais_ip8() // 4660 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125477,7 +125477,7 @@ void m68008_device::not_w_das_ip8() // 4668 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -125518,7 +125518,7 @@ void m68008_device::not_w_das_ip8() // 4668 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125606,7 +125606,7 @@ void m68008_device::not_w_dais_ip8() // 4670 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -125698,7 +125698,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -125739,7 +125739,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -125867,7 +125867,7 @@ void m68008_device::not_w_adr16_ip8() // 4678 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -125906,7 +125906,7 @@ void m68008_device::not_w_adr16_ip8() // 4678 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126070,7 +126070,7 @@ void m68008_device::not_w_adr32_ip8() // 4679 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -126109,7 +126109,7 @@ void m68008_device::not_w_adr32_ip8() // 4679 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126201,12 +126201,12 @@ void m68008_device::not_l_ds_ip8() // 4680 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0 alu_not(m_da[ry]); sr_nzvc(); // 15e nnrl2 set_16l(m_da[ry], m_aluo); - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0 alu_not(high16(m_da[ry])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126265,7 +126265,7 @@ void m68008_device::not_l_ais_ip8() // 4690 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -126342,7 +126342,7 @@ void m68008_device::not_l_ais_ip8() // 4690 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126382,7 +126382,7 @@ void m68008_device::not_l_ais_ip8() // 4690 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -126470,7 +126470,7 @@ void m68008_device::not_l_aips_ip8() // 4698 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -126550,7 +126550,7 @@ void m68008_device::not_l_aips_ip8() // 4698 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126590,7 +126590,7 @@ void m68008_device::not_l_aips_ip8() // 4698 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -126677,7 +126677,7 @@ void m68008_device::not_l_pais_ip8() // 46a0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -126759,7 +126759,7 @@ void m68008_device::not_l_pais_ip8() // 46a0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -126799,7 +126799,7 @@ void m68008_device::not_l_pais_ip8() // 46a0 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -126923,7 +126923,7 @@ void m68008_device::not_l_das_ip8() // 46a8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -127000,7 +127000,7 @@ void m68008_device::not_l_das_ip8() // 46a8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127040,7 +127040,7 @@ void m68008_device::not_l_das_ip8() // 46a8 fff8 m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -127126,7 +127126,7 @@ void m68008_device::not_l_dais_ip8() // 46b0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -127217,7 +127217,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -127294,7 +127294,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127334,7 +127334,7 @@ adsl2: m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -127460,7 +127460,7 @@ void m68008_device::not_l_adr16_ip8() // 46b8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -127537,7 +127537,7 @@ void m68008_device::not_l_adr16_ip8() // 46b8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127577,7 +127577,7 @@ void m68008_device::not_l_adr16_ip8() // 46b8 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -127739,7 +127739,7 @@ void m68008_device::not_l_adr32_ip8() // 46b9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -127816,7 +127816,7 @@ void m68008_device::not_l_adr32_ip8() // 46b9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0 + // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0 alu_not(m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -127856,7 +127856,7 @@ void m68008_device::not_l_adr32_ip8() // 46b9 ffff m_aob = m_at; m_dbout = m_aluo; m_au = m_at - 2; - // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0 + // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0 alu_not(m_alub); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -128056,7 +128056,7 @@ void m68008_device::move_ais_sr_ip8() // 46d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -128209,7 +128209,7 @@ void m68008_device::move_aips_sr_ip8() // 46d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -128362,7 +128362,7 @@ void m68008_device::move_pais_sr_ip8() // 46e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -128544,7 +128544,7 @@ void m68008_device::move_das_sr_ip8() // 46e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -128689,7 +128689,7 @@ void m68008_device::move_dais_sr_ip8() // 46f0 fff8 return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -128781,7 +128781,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -128966,7 +128966,7 @@ void m68008_device::move_adr16_sr_ip8() // 46f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -129185,7 +129185,7 @@ void m68008_device::move_adr32_sr_ip8() // 46f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -129366,7 +129366,7 @@ void m68008_device::move_dpc_sr_ip8() // 46fa ffff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -129510,7 +129510,7 @@ void m68008_device::move_dpci_sr_ip8() // 46fb ffff return; } // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -129602,7 +129602,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -129893,12 +129893,12 @@ void m68008_device::nbcd_b_ds_ip8() // 4800 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0 alu_sbcd8(m_da[ry], 0x0000); sr_xnzvc_u(); // 117 nbcr2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -129955,7 +129955,7 @@ void m68008_device::nbcd_b_ais_ip8() // 4810 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -129977,12 +129977,12 @@ void m68008_device::nbcd_b_ais_ip8() // 4810 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130058,7 +130058,7 @@ void m68008_device::nbcd_b_aips_ip8() // 4818 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -130078,12 +130078,12 @@ void m68008_device::nbcd_b_aips_ip8() // 4818 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130161,7 +130161,7 @@ void m68008_device::nbcd_b_pais_ip8() // 4820 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -130181,12 +130181,12 @@ void m68008_device::nbcd_b_pais_ip8() // 4820 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130293,7 +130293,7 @@ void m68008_device::nbcd_b_das_ip8() // 4828 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -130315,12 +130315,12 @@ void m68008_device::nbcd_b_das_ip8() // 4828 fff8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130388,7 +130388,7 @@ void m68008_device::nbcd_b_dais_ip8() // 4830 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -130480,7 +130480,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; @@ -130502,12 +130502,12 @@ adsw2: m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130615,7 +130615,7 @@ void m68008_device::nbcd_b_adr16_ip8() // 4838 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -130635,12 +130635,12 @@ void m68008_device::nbcd_b_adr16_ip8() // 4838 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130784,7 +130784,7 @@ void m68008_device::nbcd_b_adr32_ip8() // 4839 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -130804,12 +130804,12 @@ void m68008_device::nbcd_b_adr32_ip8() // 4839 ffff m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0 + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0 alu_sbcd8(m_dbin, 0x0000); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -130882,7 +130882,7 @@ void m68008_device::swap_ds_ip8() // 4840 fff8 m_alub = m_da[ry]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nzvc(); // 342 swap2 @@ -130890,7 +130890,7 @@ void m68008_device::swap_ds_ip8() // 4840 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[ry] = merge_16_32(high16(m_at), m_aluo); m_au = m_au + 2; - // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -130946,7 +130946,7 @@ void m68008_device::pea_ais_ip8() // 4850 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_da[m_sp] - 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -131072,7 +131072,7 @@ void m68008_device::pea_das_ip8() // 4868 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -131114,7 +131114,7 @@ void m68008_device::pea_das_ip8() // 4868 fff8 m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -131238,7 +131238,7 @@ void m68008_device::pea_dais_ip8() // 4870 fff8 switch(m_inst_substate) { case 0: // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -131329,7 +131329,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -131830,7 +131830,7 @@ void m68008_device::pea_dpc_ip8() // 487a ffff m_aob = m_au; m_at = m_pc; m_au = m_au + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -131872,7 +131872,7 @@ void m68008_device::pea_dpc_ip8() // 487a ffff m_au = ext32(m_aluo) + m_at; // 17f pead3 m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_base_ssw = SSW_PROGRAM | SSW_R; @@ -131995,7 +131995,7 @@ void m68008_device::pea_dpci_ip8() // 487b ffff switch(m_inst_substate) { case 0: // 1ff peax0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3ee peax1 @@ -132086,7 +132086,7 @@ peax4: // 218 peax4 m_ir = m_irc; m_at = m_au; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_pc + 4; m_icount -= 2; @@ -132219,7 +132219,7 @@ void m68008_device::ext_w_ds_ip8() // 4880 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0 + // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0 alu_ext(m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -132786,7 +132786,7 @@ void m68008_device::movem_w_list_dais_ip8() // 48b0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -133381,7 +133381,7 @@ void m68008_device::ext_l_ds_ip8() // 48c0 fff8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 233 extr2 @@ -134054,7 +134054,7 @@ void m68008_device::movem_l_list_dais_ip8() // 48f0 fff8 m_pc = m_au; set_16l(m_at, m_dbin); m_au = m_au - 2; - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02f stmx3 @@ -134755,13 +134755,13 @@ void m68008_device::tst_b_ds_ip8() // 4a00 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -134812,11 +134812,11 @@ void m68008_device::tst_b_ais_ip8() // 4a10 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -134836,13 +134836,13 @@ void m68008_device::tst_b_ais_ip8() // 4a10 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -134896,12 +134896,12 @@ void m68008_device::tst_b_aips_ip8() // 4a18 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -134922,13 +134922,13 @@ void m68008_device::tst_b_aips_ip8() // 4a18 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -134981,7 +134981,7 @@ void m68008_device::tst_b_pais_ip8() // 4a20 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -134989,7 +134989,7 @@ void m68008_device::tst_b_pais_ip8() // 4a20 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -135010,13 +135010,13 @@ void m68008_device::tst_b_pais_ip8() // 4a20 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135067,7 +135067,7 @@ void m68008_device::tst_b_das_ip8() // 4a28 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135105,11 +135105,11 @@ void m68008_device::tst_b_das_ip8() // 4a28 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -135129,13 +135129,13 @@ void m68008_device::tst_b_das_ip8() // 4a28 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135184,14 +135184,14 @@ void m68008_device::tst_b_dais_ip8() // 4a30 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -135199,7 +135199,7 @@ void m68008_device::tst_b_dais_ip8() // 4a30 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135238,7 +135238,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135279,11 +135279,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -135303,13 +135303,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135362,7 +135362,7 @@ void m68008_device::tst_b_adr16_ip8() // 4a38 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -135400,7 +135400,7 @@ void m68008_device::tst_b_adr16_ip8() // 4a38 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -135421,13 +135421,13 @@ void m68008_device::tst_b_adr16_ip8() // 4a38 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135478,7 +135478,7 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135517,7 +135517,7 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -135555,7 +135555,7 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -135576,13 +135576,13 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135636,13 +135636,13 @@ void m68008_device::tst_w_ds_ip8() // 4a40 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135693,11 +135693,11 @@ void m68008_device::tst_w_ais_ip8() // 4a50 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -135735,13 +135735,13 @@ void m68008_device::tst_w_ais_ip8() // 4a50 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135795,12 +135795,12 @@ void m68008_device::tst_w_aips_ip8() // 4a58 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -135839,13 +135839,13 @@ void m68008_device::tst_w_aips_ip8() // 4a58 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -135898,7 +135898,7 @@ void m68008_device::tst_w_pais_ip8() // 4a60 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -135906,7 +135906,7 @@ void m68008_device::tst_w_pais_ip8() // 4a60 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -135945,13 +135945,13 @@ void m68008_device::tst_w_pais_ip8() // 4a60 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136002,7 +136002,7 @@ void m68008_device::tst_w_das_ip8() // 4a68 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136040,11 +136040,11 @@ void m68008_device::tst_w_das_ip8() // 4a68 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -136082,13 +136082,13 @@ void m68008_device::tst_w_das_ip8() // 4a68 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136137,14 +136137,14 @@ void m68008_device::tst_w_dais_ip8() // 4a70 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -136152,7 +136152,7 @@ void m68008_device::tst_w_dais_ip8() // 4a70 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136191,7 +136191,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136232,11 +136232,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -136274,13 +136274,13 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136333,7 +136333,7 @@ void m68008_device::tst_w_adr16_ip8() // 4a78 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -136371,7 +136371,7 @@ void m68008_device::tst_w_adr16_ip8() // 4a78 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -136410,13 +136410,13 @@ void m68008_device::tst_w_adr16_ip8() // 4a78 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136467,7 +136467,7 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136506,7 +136506,7 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -136544,7 +136544,7 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -136583,13 +136583,13 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -136643,13 +136643,13 @@ void m68008_device::tst_l_ds_ip8() // 4a80 fff8 m_pc = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); // 362 tsrl2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -136702,7 +136702,7 @@ void m68008_device::tst_l_ais_ip8() // 4a90 fff8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -136742,7 +136742,7 @@ void m68008_device::tst_l_ais_ip8() // 4a90 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -136780,13 +136780,13 @@ void m68008_device::tst_l_ais_ip8() // 4a90 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -136839,7 +136839,7 @@ void m68008_device::tst_l_aips_ip8() // 4a98 fff8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -136879,11 +136879,11 @@ void m68008_device::tst_l_aips_ip8() // 4a98 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -136921,13 +136921,13 @@ void m68008_device::tst_l_aips_ip8() // 4a98 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -136979,14 +136979,14 @@ void m68008_device::tst_l_pais_ip8() // 4aa0 fff8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -137025,7 +137025,7 @@ void m68008_device::tst_l_pais_ip8() // 4aa0 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -137063,13 +137063,13 @@ void m68008_device::tst_l_pais_ip8() // 4aa0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137122,7 +137122,7 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137159,7 +137159,7 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -137199,7 +137199,7 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -137237,13 +137237,13 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137294,14 +137294,14 @@ void m68008_device::tst_l_dais_ip8() // 4ab0 fff8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -137309,7 +137309,7 @@ void m68008_device::tst_l_dais_ip8() // 4ab0 fff8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137348,7 +137348,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137388,7 +137388,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -137428,7 +137428,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -137466,13 +137466,13 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137527,7 +137527,7 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -137565,7 +137565,7 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -137605,7 +137605,7 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -137643,13 +137643,13 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137702,7 +137702,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -137741,7 +137741,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -137779,7 +137779,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -137819,7 +137819,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -137857,13 +137857,13 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 361 tsml2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137918,14 +137918,14 @@ void m68008_device::tas_ds_ip8() // 4ac0 fff8 m_ir = m_irc; m_alub = m_da[ry]; m_pc = m_au; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry] alu_or8(m_ftu, m_da[ry]); // 346 tasr2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_au + 2; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1 alu_and8(m_alub, 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -137978,11 +137978,11 @@ void m68008_device::tas_ais_ip8() // 4ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -137997,14 +137997,14 @@ void m68008_device::tas_ais_ip8() // 4ad0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138028,11 +138028,11 @@ void m68008_device::tas_ais_ip8() // 4ad0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138086,12 +138086,12 @@ void m68008_device::tas_aips_ip8() // 4ad8 fff8 m_dcr = m_da[m_movems]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -138107,14 +138107,14 @@ void m68008_device::tas_aips_ip8() // 4ad8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138138,11 +138138,11 @@ void m68008_device::tas_aips_ip8() // 4ad8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138195,7 +138195,7 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8 m_pc = m_au; m_dcr = m_da[m_movems]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -138203,7 +138203,7 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -138219,14 +138219,14 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138250,11 +138250,11 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138305,7 +138305,7 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138343,11 +138343,11 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -138362,14 +138362,14 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8 // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138393,11 +138393,11 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138446,14 +138446,14 @@ void m68008_device::tas_dais_ip8() // 4af0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -138461,7 +138461,7 @@ void m68008_device::tas_dais_ip8() // 4af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138500,7 +138500,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138541,11 +138541,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[m_movems]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -138560,14 +138560,14 @@ adsw2: // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138591,11 +138591,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138648,7 +138648,7 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff m_dcr = m_da[m_movems]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -138686,7 +138686,7 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -138702,14 +138702,14 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138733,11 +138733,11 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138788,7 +138788,7 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -138827,7 +138827,7 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff m_dcr = m_da[m_movems]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin alu_or8(m_da[m_movems], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -138865,7 +138865,7 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -138881,14 +138881,14 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff // 343 tasm1 m_pc = m_au; m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin alu_or8(m_ftu, m_dbin); m_icount -= 2; // 344 tasm2 m_aob = m_au; set_8xl(m_dbout, m_aluo); m_au = m_pc; - // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); sr_nzvc(); m_base_ssw = SSW_DATA; @@ -138912,11 +138912,11 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -139583,7 +139583,7 @@ void m68008_device::movem_w_dais_list_ip8() // 4cb0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -139671,7 +139671,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -140540,7 +140540,7 @@ void m68008_device::movem_w_dpci_list_ip8() // 4cbb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -140628,7 +140628,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -141497,7 +141497,7 @@ void m68008_device::movem_l_dais_list_ip8() // 4cf0 fff8 m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -141585,7 +141585,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -142598,7 +142598,7 @@ void m68008_device::movem_l_dpci_list_ip8() // 4cfb ffff m_irc = m_edb; m_dbin = m_edb; // 027 ldmx1 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 02b ldmx2 @@ -142686,7 +142686,7 @@ ldmx5: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 277 ldmx6 m_t = !m_movemr; @@ -142872,14 +142872,14 @@ void m68008_device::trap_imm4_ip8() // 4e40 fff0 update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 3c2 trap3 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 1: @@ -142919,7 +142919,7 @@ void m68008_device::trap_imm4_ip8() // 4e40 fff0 m_da[16] = m_au; m_ftu = 0x80 | ((m_ird & 0xf) << 2); m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 5: @@ -142957,7 +142957,7 @@ void m68008_device::trap_imm4_ip8() // 4e40 fff0 m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -143158,7 +143158,7 @@ void m68008_device::link_as_imm16_ip8() // 4e50 fff8 m_aob = m_au; m_at = m_da[ry]; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 2b5 link2 m_pc = m_au; @@ -143586,7 +143586,7 @@ void m68008_device::reset_ip8() // 4e70 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 27b rset2 @@ -143724,7 +143724,7 @@ void m68008_device::stop_i16u_ip8() // 4e72 ffff m_pc = m_au; m_ftu = m_dbin; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0 alu_and(m_dbin, 0x0000); m_icount -= 2; // 327 aaa01 @@ -143755,7 +143755,7 @@ void m68008_device::rte_ip8() // 4e73 ffff if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1); m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -143848,9 +143848,6 @@ void m68008_device::rte_ip8() // 4e73 ffff return; } [[fallthrough]]; case 10: - m_sr = m_new_sr; - update_user_super(); - update_interrupt(); [[fallthrough]]; case 11: m_edb |= m_mmu8->read_data(m_aob | 1); m_icount -= 4; @@ -143965,7 +143962,7 @@ void m68008_device::rts_ip8() // 4e75 ffff // 126 rts1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -144186,7 +144183,7 @@ trpv3: update_user_super(); update_interrupt(); m_au = m_da[16] - 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -144224,7 +144221,7 @@ trpv3: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -144264,7 +144261,7 @@ trpv3: m_da[16] = m_au; m_ftu = 0x001c; m_au = m_au + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -144302,7 +144299,7 @@ trpv3: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -144501,7 +144498,7 @@ void m68008_device::rtr_ip8() // 4e77 ffff // 12a rtr1 m_aob = m_da[m_sp]; m_au = m_da[m_sp] + 2; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -145036,7 +145033,7 @@ void m68008_device::jsr_dais_ip8() // 4eb0 fff8 switch(m_inst_substate) { case 0: // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -145756,7 +145753,7 @@ void m68008_device::jsr_dpci_ip8() // 4ebb ffff switch(m_inst_substate) { case 0: // 1f3 jsrx0 - // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b2 jsrx1 @@ -146129,7 +146126,7 @@ void m68008_device::jmp_dais_ip8() // 4ef0 fff8 switch(m_inst_substate) { case 0: // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -146552,7 +146549,7 @@ void m68008_device::jmp_dpci_ip8() // 4efb ffff switch(m_inst_substate) { case 0: // 1f7 jmpx0 - // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 2b6 jmpx1 @@ -146670,7 +146667,7 @@ void m68008_device::addq_b_imm3_ds_ip8() // 5000 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -146728,7 +146725,7 @@ void m68008_device::addq_b_imm3_ais_ip8() // 5010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -146752,7 +146749,7 @@ void m68008_device::addq_b_imm3_ais_ip8() // 5010 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -146830,7 +146827,7 @@ void m68008_device::addq_b_imm3_aips_ip8() // 5018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -146852,7 +146849,7 @@ void m68008_device::addq_b_imm3_aips_ip8() // 5018 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -146932,7 +146929,7 @@ void m68008_device::addq_b_imm3_pais_ip8() // 5020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -146954,7 +146951,7 @@ void m68008_device::addq_b_imm3_pais_ip8() // 5020 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147063,7 +147060,7 @@ void m68008_device::addq_b_imm3_das_ip8() // 5028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -147087,7 +147084,7 @@ void m68008_device::addq_b_imm3_das_ip8() // 5028 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147157,7 +147154,7 @@ void m68008_device::addq_b_imm3_dais_ip8() // 5030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -147249,7 +147246,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -147273,7 +147270,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147383,7 +147380,7 @@ void m68008_device::addq_b_imm3_adr16_ip8() // 5038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -147405,7 +147402,7 @@ void m68008_device::addq_b_imm3_adr16_ip8() // 5038 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147551,7 +147548,7 @@ void m68008_device::addq_b_imm3_adr32_ip8() // 5039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -147573,7 +147570,7 @@ void m68008_device::addq_b_imm3_adr32_ip8() // 5039 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin alu_add8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147647,7 +147644,7 @@ void m68008_device::addq_w_imm3_ds_ip8() // 5040 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -147707,7 +147704,7 @@ void m68008_device::addq_w_imm3_as_ip8() // 5048 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -147745,7 +147742,7 @@ void m68008_device::addq_w_imm3_as_ip8() // 5048 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -147771,7 +147768,7 @@ void m68008_device::addq_w_imm3_ais_ip8() // 5050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -147813,7 +147810,7 @@ void m68008_device::addq_w_imm3_ais_ip8() // 5050 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -147909,7 +147906,7 @@ void m68008_device::addq_w_imm3_aips_ip8() // 5058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -147949,7 +147946,7 @@ void m68008_device::addq_w_imm3_aips_ip8() // 5058 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148047,7 +148044,7 @@ void m68008_device::addq_w_imm3_pais_ip8() // 5060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -148087,7 +148084,7 @@ void m68008_device::addq_w_imm3_pais_ip8() // 5060 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148214,7 +148211,7 @@ void m68008_device::addq_w_imm3_das_ip8() // 5068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -148256,7 +148253,7 @@ void m68008_device::addq_w_imm3_das_ip8() // 5068 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148344,7 +148341,7 @@ void m68008_device::addq_w_imm3_dais_ip8() // 5070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -148436,7 +148433,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -148478,7 +148475,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148606,7 +148603,7 @@ void m68008_device::addq_w_imm3_adr16_ip8() // 5078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -148646,7 +148643,7 @@ void m68008_device::addq_w_imm3_adr16_ip8() // 5078 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148810,7 +148807,7 @@ void m68008_device::addq_w_imm3_adr32_ip8() // 5079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -148850,7 +148847,7 @@ void m68008_device::addq_w_imm3_adr32_ip8() // 5079 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -148942,7 +148939,7 @@ void m68008_device::addq_l_imm3_ds_ip8() // 5080 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry] alu_add(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -148981,7 +148978,7 @@ void m68008_device::addq_l_imm3_ds_ip8() // 5080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -149010,7 +149007,7 @@ void m68008_device::addq_l_imm3_as_ip8() // 5088 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry] alu_add(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -149048,7 +149045,7 @@ void m68008_device::addq_l_imm3_as_ip8() // 5088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry] + // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry] alu_addc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -149074,7 +149071,7 @@ void m68008_device::addq_l_imm3_ais_ip8() // 5090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -149152,7 +149149,7 @@ void m68008_device::addq_l_imm3_ais_ip8() // 5090 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149192,7 +149189,7 @@ void m68008_device::addq_l_imm3_ais_ip8() // 5090 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149280,7 +149277,7 @@ void m68008_device::addq_l_imm3_aips_ip8() // 5098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -149361,7 +149358,7 @@ void m68008_device::addq_l_imm3_aips_ip8() // 5098 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149401,7 +149398,7 @@ void m68008_device::addq_l_imm3_aips_ip8() // 5098 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149488,7 +149485,7 @@ void m68008_device::addq_l_imm3_pais_ip8() // 50a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -149571,7 +149568,7 @@ void m68008_device::addq_l_imm3_pais_ip8() // 50a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149611,7 +149608,7 @@ void m68008_device::addq_l_imm3_pais_ip8() // 50a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149735,7 +149732,7 @@ void m68008_device::addq_l_imm3_das_ip8() // 50a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -149813,7 +149810,7 @@ void m68008_device::addq_l_imm3_das_ip8() // 50a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -149853,7 +149850,7 @@ void m68008_device::addq_l_imm3_das_ip8() // 50a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -149939,7 +149936,7 @@ void m68008_device::addq_l_imm3_dais_ip8() // 50b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -150030,7 +150027,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -150108,7 +150105,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -150148,7 +150145,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -150274,7 +150271,7 @@ void m68008_device::addq_l_imm3_adr16_ip8() // 50b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -150352,7 +150349,7 @@ void m68008_device::addq_l_imm3_adr16_ip8() // 50b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -150392,7 +150389,7 @@ void m68008_device::addq_l_imm3_adr16_ip8() // 50b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -150554,7 +150551,7 @@ void m68008_device::addq_l_imm3_adr32_ip8() // 50b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -150632,7 +150629,7 @@ void m68008_device::addq_l_imm3_adr32_ip8() // 50b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin alu_add(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -150672,7 +150669,7 @@ void m68008_device::addq_l_imm3_adr32_ip8() // 50b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue alu_addc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -150762,7 +150759,7 @@ void m68008_device::st_ds_ip8() // 50c0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -150774,7 +150771,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150817,7 +150814,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -150857,7 +150854,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -150876,7 +150873,7 @@ void m68008_device::dbt_ds_rel16_ip8() // 50c8 fff8 // 06c dbcc1 m_t = 1; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -150888,13 +150885,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -150937,7 +150934,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -150945,7 +150942,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -150984,11 +150981,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151034,13 +151031,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151086,7 +151083,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151135,11 +151132,11 @@ void m68008_device::st_ais_ip8() // 50d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -151159,7 +151156,7 @@ void m68008_device::st_ais_ip8() // 50d0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151169,7 +151166,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151208,7 +151205,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -151251,7 +151248,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -151285,12 +151282,12 @@ void m68008_device::st_aips_ip8() // 50d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -151311,7 +151308,7 @@ void m68008_device::st_aips_ip8() // 50d8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151321,7 +151318,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151360,7 +151357,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -151403,7 +151400,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -151436,7 +151433,7 @@ void m68008_device::st_pais_ip8() // 50e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -151444,7 +151441,7 @@ void m68008_device::st_pais_ip8() // 50e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -151465,7 +151462,7 @@ void m68008_device::st_pais_ip8() // 50e0 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151475,7 +151472,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151514,7 +151511,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -151557,7 +151554,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -151588,7 +151585,7 @@ void m68008_device::st_das_ip8() // 50e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151626,11 +151623,11 @@ void m68008_device::st_das_ip8() // 50e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -151650,7 +151647,7 @@ void m68008_device::st_das_ip8() // 50e8 fff8 m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151660,7 +151657,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151699,7 +151696,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -151742,7 +151739,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -151771,14 +151768,14 @@ void m68008_device::st_dais_ip8() // 50f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -151786,7 +151783,7 @@ void m68008_device::st_dais_ip8() // 50f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151825,7 +151822,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151866,11 +151863,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -151890,7 +151887,7 @@ adsw2: m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -151900,7 +151897,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -151939,7 +151936,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -151982,7 +151979,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -152015,7 +152012,7 @@ void m68008_device::st_adr16_ip8() // 50f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -152053,7 +152050,7 @@ void m68008_device::st_adr16_ip8() // 50f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -152074,7 +152071,7 @@ void m68008_device::st_adr16_ip8() // 50f8 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152084,7 +152081,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152123,7 +152120,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -152166,7 +152163,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -152197,7 +152194,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152236,7 +152233,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -152274,7 +152271,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -152295,7 +152292,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff m_ir = m_irc; m_t = 1; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -152305,7 +152302,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -152344,7 +152341,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -152387,7 +152384,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -152420,7 +152417,7 @@ void m68008_device::subq_b_imm3_ds_ip8() // 5100 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub8(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -152478,7 +152475,7 @@ void m68008_device::subq_b_imm3_ais_ip8() // 5110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -152502,7 +152499,7 @@ void m68008_device::subq_b_imm3_ais_ip8() // 5110 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152580,7 +152577,7 @@ void m68008_device::subq_b_imm3_aips_ip8() // 5118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -152602,7 +152599,7 @@ void m68008_device::subq_b_imm3_aips_ip8() // 5118 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152682,7 +152679,7 @@ void m68008_device::subq_b_imm3_pais_ip8() // 5120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -152704,7 +152701,7 @@ void m68008_device::subq_b_imm3_pais_ip8() // 5120 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152813,7 +152810,7 @@ void m68008_device::subq_b_imm3_das_ip8() // 5128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -152837,7 +152834,7 @@ void m68008_device::subq_b_imm3_das_ip8() // 5128 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -152907,7 +152904,7 @@ void m68008_device::subq_b_imm3_dais_ip8() // 5130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -152999,7 +152996,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -153023,7 +153020,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153133,7 +153130,7 @@ void m68008_device::subq_b_imm3_adr16_ip8() // 5138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -153155,7 +153152,7 @@ void m68008_device::subq_b_imm3_adr16_ip8() // 5138 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153301,7 +153298,7 @@ void m68008_device::subq_b_imm3_adr32_ip8() // 5139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -153323,7 +153320,7 @@ void m68008_device::subq_b_imm3_adr32_ip8() // 5139 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin alu_sub8(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153397,7 +153394,7 @@ void m68008_device::subq_w_imm3_ds_ip8() // 5140 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 08b roaw2 @@ -153457,7 +153454,7 @@ void m68008_device::subq_w_imm3_as_ip8() // 5148 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -153495,7 +153492,7 @@ void m68008_device::subq_w_imm3_as_ip8() // 5148 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -153521,7 +153518,7 @@ void m68008_device::subq_w_imm3_ais_ip8() // 5150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -153563,7 +153560,7 @@ void m68008_device::subq_w_imm3_ais_ip8() // 5150 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153659,7 +153656,7 @@ void m68008_device::subq_w_imm3_aips_ip8() // 5158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -153699,7 +153696,7 @@ void m68008_device::subq_w_imm3_aips_ip8() // 5158 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153797,7 +153794,7 @@ void m68008_device::subq_w_imm3_pais_ip8() // 5160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -153837,7 +153834,7 @@ void m68008_device::subq_w_imm3_pais_ip8() // 5160 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -153964,7 +153961,7 @@ void m68008_device::subq_w_imm3_das_ip8() // 5168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -154006,7 +154003,7 @@ void m68008_device::subq_w_imm3_das_ip8() // 5168 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154094,7 +154091,7 @@ void m68008_device::subq_w_imm3_dais_ip8() // 5170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -154186,7 +154183,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; @@ -154228,7 +154225,7 @@ adsw2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154356,7 +154353,7 @@ void m68008_device::subq_w_imm3_adr16_ip8() // 5178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -154396,7 +154393,7 @@ void m68008_device::subq_w_imm3_adr16_ip8() // 5178 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154560,7 +154557,7 @@ void m68008_device::subq_w_imm3_adr32_ip8() // 5179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -154600,7 +154597,7 @@ void m68008_device::subq_w_imm3_adr32_ip8() // 5179 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154692,7 +154689,7 @@ void m68008_device::subq_l_imm3_ds_ip8() // 5180 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry] alu_sub(m_ftu, m_da[ry]); sr_xnzvc(); // 259 roal2 @@ -154731,7 +154728,7 @@ void m68008_device::subq_l_imm3_ds_ip8() // 5180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); sr_xnzvc_u(); m_icount -= 2; @@ -154760,7 +154757,7 @@ void m68008_device::subq_l_imm3_as_ip8() // 5188 f1f8 m_ir = m_irc; m_pc = m_au; m_dt = ext32(m_ftu); - // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry] + // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry] alu_sub(m_ftu, m_da[ry]); // 259 roal2 set_16l(m_da[ry], m_aluo); @@ -154798,7 +154795,7 @@ void m68008_device::subq_l_imm3_as_ip8() // 5188 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry] + // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry] alu_subc(high16(m_dt), high16(m_da[ry])); m_icount -= 2; // 25b roal4 @@ -154824,7 +154821,7 @@ void m68008_device::subq_l_imm3_ais_ip8() // 5190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -154902,7 +154899,7 @@ void m68008_device::subq_l_imm3_ais_ip8() // 5190 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -154942,7 +154939,7 @@ void m68008_device::subq_l_imm3_ais_ip8() // 5190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155030,7 +155027,7 @@ void m68008_device::subq_l_imm3_aips_ip8() // 5198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -155111,7 +155108,7 @@ void m68008_device::subq_l_imm3_aips_ip8() // 5198 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155151,7 +155148,7 @@ void m68008_device::subq_l_imm3_aips_ip8() // 5198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155238,7 +155235,7 @@ void m68008_device::subq_l_imm3_pais_ip8() // 51a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -155321,7 +155318,7 @@ void m68008_device::subq_l_imm3_pais_ip8() // 51a0 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155361,7 +155358,7 @@ void m68008_device::subq_l_imm3_pais_ip8() // 51a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155485,7 +155482,7 @@ void m68008_device::subq_l_imm3_das_ip8() // 51a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -155563,7 +155560,7 @@ void m68008_device::subq_l_imm3_das_ip8() // 51a8 f1f8 m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155603,7 +155600,7 @@ void m68008_device::subq_l_imm3_das_ip8() // 51a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -155689,7 +155686,7 @@ void m68008_device::subq_l_imm3_dais_ip8() // 51b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -155780,7 +155777,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -155858,7 +155855,7 @@ adsl2: m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -155898,7 +155895,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -156024,7 +156021,7 @@ void m68008_device::subq_l_imm3_adr16_ip8() // 51b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -156102,7 +156099,7 @@ void m68008_device::subq_l_imm3_adr16_ip8() // 51b8 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -156142,7 +156139,7 @@ void m68008_device::subq_l_imm3_adr16_ip8() // 51b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -156304,7 +156301,7 @@ void m68008_device::subq_l_imm3_adr32_ip8() // 51b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -156382,7 +156379,7 @@ void m68008_device::subq_l_imm3_adr32_ip8() // 51b9 f1ff m_pc = m_au; m_dt = ext32(m_ftu); m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin alu_sub(m_ftu, m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -156422,7 +156419,7 @@ void m68008_device::subq_l_imm3_adr32_ip8() // 51b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue alu_subc(high16(m_dt), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -156512,7 +156509,7 @@ void m68008_device::sf_ds_ip8() // 51c0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -156524,7 +156521,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156567,7 +156564,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -156607,7 +156604,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -156626,7 +156623,7 @@ void m68008_device::dbra_ds_rel16_ip8() // 51c8 fff8 // 06c dbcc1 m_t = 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -156638,13 +156635,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -156687,7 +156684,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -156695,7 +156692,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156734,11 +156731,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156784,13 +156781,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156836,7 +156833,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156885,11 +156882,11 @@ void m68008_device::sf_ais_ip8() // 51d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -156909,7 +156906,7 @@ void m68008_device::sf_ais_ip8() // 51d0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -156919,7 +156916,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -156958,7 +156955,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -157001,7 +156998,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -157035,12 +157032,12 @@ void m68008_device::sf_aips_ip8() // 51d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -157061,7 +157058,7 @@ void m68008_device::sf_aips_ip8() // 51d8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157071,7 +157068,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157110,7 +157107,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -157153,7 +157150,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -157186,7 +157183,7 @@ void m68008_device::sf_pais_ip8() // 51e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -157194,7 +157191,7 @@ void m68008_device::sf_pais_ip8() // 51e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -157215,7 +157212,7 @@ void m68008_device::sf_pais_ip8() // 51e0 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157225,7 +157222,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157264,7 +157261,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -157307,7 +157304,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -157338,7 +157335,7 @@ void m68008_device::sf_das_ip8() // 51e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157376,11 +157373,11 @@ void m68008_device::sf_das_ip8() // 51e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -157400,7 +157397,7 @@ void m68008_device::sf_das_ip8() // 51e8 fff8 m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157410,7 +157407,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157449,7 +157446,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -157492,7 +157489,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -157521,14 +157518,14 @@ void m68008_device::sf_dais_ip8() // 51f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -157536,7 +157533,7 @@ void m68008_device::sf_dais_ip8() // 51f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157575,7 +157572,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157616,11 +157613,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -157640,7 +157637,7 @@ adsw2: m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157650,7 +157647,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157689,7 +157686,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -157732,7 +157729,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -157765,7 +157762,7 @@ void m68008_device::sf_adr16_ip8() // 51f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -157803,7 +157800,7 @@ void m68008_device::sf_adr16_ip8() // 51f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -157824,7 +157821,7 @@ void m68008_device::sf_adr16_ip8() // 51f8 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -157834,7 +157831,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157873,7 +157870,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -157916,7 +157913,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -157947,7 +157944,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -157986,7 +157983,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -158024,7 +158021,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -158045,7 +158042,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff m_ir = m_irc; m_t = 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158055,7 +158052,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158094,7 +158091,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -158137,7 +158134,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -158170,7 +158167,7 @@ void m68008_device::shi_ds_ip8() // 52c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -158182,7 +158179,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158225,7 +158222,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -158265,7 +158262,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -158284,7 +158281,7 @@ void m68008_device::dbhi_ds_rel16_ip8() // 52c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) == 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -158296,13 +158293,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -158345,7 +158342,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -158353,7 +158350,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158392,11 +158389,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158442,13 +158439,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158494,7 +158491,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158543,11 +158540,11 @@ void m68008_device::shi_ais_ip8() // 52d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -158567,7 +158564,7 @@ void m68008_device::shi_ais_ip8() // 52d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158577,7 +158574,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158616,7 +158613,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -158659,7 +158656,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -158693,12 +158690,12 @@ void m68008_device::shi_aips_ip8() // 52d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -158719,7 +158716,7 @@ void m68008_device::shi_aips_ip8() // 52d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158729,7 +158726,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158768,7 +158765,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -158811,7 +158808,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -158844,7 +158841,7 @@ void m68008_device::shi_pais_ip8() // 52e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -158852,7 +158849,7 @@ void m68008_device::shi_pais_ip8() // 52e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -158873,7 +158870,7 @@ void m68008_device::shi_pais_ip8() // 52e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -158883,7 +158880,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -158922,7 +158919,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -158965,7 +158962,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -158996,7 +158993,7 @@ void m68008_device::shi_das_ip8() // 52e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159034,11 +159031,11 @@ void m68008_device::shi_das_ip8() // 52e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -159058,7 +159055,7 @@ void m68008_device::shi_das_ip8() // 52e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159068,7 +159065,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159107,7 +159104,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -159150,7 +159147,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -159179,14 +159176,14 @@ void m68008_device::shi_dais_ip8() // 52f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -159194,7 +159191,7 @@ void m68008_device::shi_dais_ip8() // 52f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159233,7 +159230,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159274,11 +159271,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -159298,7 +159295,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159308,7 +159305,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159347,7 +159344,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -159390,7 +159387,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -159423,7 +159420,7 @@ void m68008_device::shi_adr16_ip8() // 52f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -159461,7 +159458,7 @@ void m68008_device::shi_adr16_ip8() // 52f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -159482,7 +159479,7 @@ void m68008_device::shi_adr16_ip8() // 52f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159492,7 +159489,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159531,7 +159528,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -159574,7 +159571,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -159605,7 +159602,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159644,7 +159641,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -159682,7 +159679,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -159703,7 +159700,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) == 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -159713,7 +159710,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159752,7 +159749,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -159795,7 +159792,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -159828,7 +159825,7 @@ void m68008_device::sls_ds_ip8() // 53c0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -159840,7 +159837,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -159883,7 +159880,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -159923,7 +159920,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -159942,7 +159939,7 @@ void m68008_device::dbls_ds_rel16_ip8() // 53c8 fff8 // 06c dbcc1 m_t = (m_sr & (SR_C|SR_Z)) != 0; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -159954,13 +159951,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -160003,7 +160000,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -160011,7 +160008,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160050,11 +160047,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160100,13 +160097,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160152,7 +160149,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160201,11 +160198,11 @@ void m68008_device::sls_ais_ip8() // 53d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -160225,7 +160222,7 @@ void m68008_device::sls_ais_ip8() // 53d0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160235,7 +160232,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160274,7 +160271,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -160317,7 +160314,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -160351,12 +160348,12 @@ void m68008_device::sls_aips_ip8() // 53d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -160377,7 +160374,7 @@ void m68008_device::sls_aips_ip8() // 53d8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160387,7 +160384,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160426,7 +160423,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -160469,7 +160466,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -160502,7 +160499,7 @@ void m68008_device::sls_pais_ip8() // 53e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -160510,7 +160507,7 @@ void m68008_device::sls_pais_ip8() // 53e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -160531,7 +160528,7 @@ void m68008_device::sls_pais_ip8() // 53e0 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160541,7 +160538,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160580,7 +160577,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -160623,7 +160620,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -160654,7 +160651,7 @@ void m68008_device::sls_das_ip8() // 53e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160692,11 +160689,11 @@ void m68008_device::sls_das_ip8() // 53e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -160716,7 +160713,7 @@ void m68008_device::sls_das_ip8() // 53e8 fff8 m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160726,7 +160723,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160765,7 +160762,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -160808,7 +160805,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -160837,14 +160834,14 @@ void m68008_device::sls_dais_ip8() // 53f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -160852,7 +160849,7 @@ void m68008_device::sls_dais_ip8() // 53f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160891,7 +160888,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -160932,11 +160929,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -160956,7 +160953,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -160966,7 +160963,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161005,7 +161002,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -161048,7 +161045,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -161081,7 +161078,7 @@ void m68008_device::sls_adr16_ip8() // 53f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -161119,7 +161116,7 @@ void m68008_device::sls_adr16_ip8() // 53f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -161140,7 +161137,7 @@ void m68008_device::sls_adr16_ip8() // 53f8 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -161150,7 +161147,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161189,7 +161186,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -161232,7 +161229,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -161263,7 +161260,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161302,7 +161299,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -161340,7 +161337,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -161361,7 +161358,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff m_ir = m_irc; m_t = (m_sr & (SR_C|SR_Z)) != 0; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -161371,7 +161368,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161410,7 +161407,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -161453,7 +161450,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -161486,7 +161483,7 @@ void m68008_device::scc_ds_ip8() // 54c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -161498,7 +161495,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161541,7 +161538,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -161581,7 +161578,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -161600,7 +161597,7 @@ void m68008_device::dbcc_ds_rel16_ip8() // 54c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_C); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -161612,13 +161609,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -161661,7 +161658,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -161669,7 +161666,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161708,11 +161705,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161758,13 +161755,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161810,7 +161807,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161859,11 +161856,11 @@ void m68008_device::scc_ais_ip8() // 54d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -161883,7 +161880,7 @@ void m68008_device::scc_ais_ip8() // 54d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -161893,7 +161890,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -161932,7 +161929,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -161975,7 +161972,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -162009,12 +162006,12 @@ void m68008_device::scc_aips_ip8() // 54d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -162035,7 +162032,7 @@ void m68008_device::scc_aips_ip8() // 54d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162045,7 +162042,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162084,7 +162081,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -162127,7 +162124,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -162160,7 +162157,7 @@ void m68008_device::scc_pais_ip8() // 54e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -162168,7 +162165,7 @@ void m68008_device::scc_pais_ip8() // 54e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -162189,7 +162186,7 @@ void m68008_device::scc_pais_ip8() // 54e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162199,7 +162196,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162238,7 +162235,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -162281,7 +162278,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -162312,7 +162309,7 @@ void m68008_device::scc_das_ip8() // 54e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162350,11 +162347,11 @@ void m68008_device::scc_das_ip8() // 54e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -162374,7 +162371,7 @@ void m68008_device::scc_das_ip8() // 54e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162384,7 +162381,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162423,7 +162420,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -162466,7 +162463,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -162495,14 +162492,14 @@ void m68008_device::scc_dais_ip8() // 54f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -162510,7 +162507,7 @@ void m68008_device::scc_dais_ip8() // 54f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162549,7 +162546,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162590,11 +162587,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -162614,7 +162611,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162624,7 +162621,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162663,7 +162660,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -162706,7 +162703,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -162739,7 +162736,7 @@ void m68008_device::scc_adr16_ip8() // 54f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -162777,7 +162774,7 @@ void m68008_device::scc_adr16_ip8() // 54f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -162798,7 +162795,7 @@ void m68008_device::scc_adr16_ip8() // 54f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -162808,7 +162805,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162847,7 +162844,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -162890,7 +162887,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -162921,7 +162918,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -162960,7 +162957,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -162998,7 +162995,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -163019,7 +163016,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_C); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163029,7 +163026,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163068,7 +163065,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -163111,7 +163108,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -163144,7 +163141,7 @@ void m68008_device::scs_ds_ip8() // 55c0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -163156,7 +163153,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163199,7 +163196,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -163239,7 +163236,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -163258,7 +163255,7 @@ void m68008_device::dbcs_ds_rel16_ip8() // 55c8 fff8 // 06c dbcc1 m_t = m_sr & SR_C; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -163270,13 +163267,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -163319,7 +163316,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -163327,7 +163324,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163366,11 +163363,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163416,13 +163413,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163468,7 +163465,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163517,11 +163514,11 @@ void m68008_device::scs_ais_ip8() // 55d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -163541,7 +163538,7 @@ void m68008_device::scs_ais_ip8() // 55d0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163551,7 +163548,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163590,7 +163587,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -163633,7 +163630,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -163667,12 +163664,12 @@ void m68008_device::scs_aips_ip8() // 55d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -163693,7 +163690,7 @@ void m68008_device::scs_aips_ip8() // 55d8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163703,7 +163700,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163742,7 +163739,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -163785,7 +163782,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -163818,7 +163815,7 @@ void m68008_device::scs_pais_ip8() // 55e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -163826,7 +163823,7 @@ void m68008_device::scs_pais_ip8() // 55e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -163847,7 +163844,7 @@ void m68008_device::scs_pais_ip8() // 55e0 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -163857,7 +163854,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -163896,7 +163893,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -163939,7 +163936,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -163970,7 +163967,7 @@ void m68008_device::scs_das_ip8() // 55e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164008,11 +164005,11 @@ void m68008_device::scs_das_ip8() // 55e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -164032,7 +164029,7 @@ void m68008_device::scs_das_ip8() // 55e8 fff8 m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164042,7 +164039,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164081,7 +164078,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -164124,7 +164121,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -164153,14 +164150,14 @@ void m68008_device::scs_dais_ip8() // 55f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -164168,7 +164165,7 @@ void m68008_device::scs_dais_ip8() // 55f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164207,7 +164204,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164248,11 +164245,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -164272,7 +164269,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164282,7 +164279,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164321,7 +164318,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -164364,7 +164361,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -164397,7 +164394,7 @@ void m68008_device::scs_adr16_ip8() // 55f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -164435,7 +164432,7 @@ void m68008_device::scs_adr16_ip8() // 55f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -164456,7 +164453,7 @@ void m68008_device::scs_adr16_ip8() // 55f8 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164466,7 +164463,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164505,7 +164502,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -164548,7 +164545,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -164579,7 +164576,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164618,7 +164615,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -164656,7 +164653,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -164677,7 +164674,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff m_ir = m_irc; m_t = m_sr & SR_C; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -164687,7 +164684,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164726,7 +164723,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -164769,7 +164766,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -164802,7 +164799,7 @@ void m68008_device::sne_ds_ip8() // 56c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -164814,7 +164811,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -164857,7 +164854,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -164897,7 +164894,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -164916,7 +164913,7 @@ void m68008_device::dbne_ds_rel16_ip8() // 56c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_Z); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -164928,13 +164925,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -164977,7 +164974,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -164985,7 +164982,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165024,11 +165021,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165074,13 +165071,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165126,7 +165123,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165175,11 +165172,11 @@ void m68008_device::sne_ais_ip8() // 56d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -165199,7 +165196,7 @@ void m68008_device::sne_ais_ip8() // 56d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165209,7 +165206,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165248,7 +165245,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -165291,7 +165288,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -165325,12 +165322,12 @@ void m68008_device::sne_aips_ip8() // 56d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -165351,7 +165348,7 @@ void m68008_device::sne_aips_ip8() // 56d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165361,7 +165358,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165400,7 +165397,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -165443,7 +165440,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -165476,7 +165473,7 @@ void m68008_device::sne_pais_ip8() // 56e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -165484,7 +165481,7 @@ void m68008_device::sne_pais_ip8() // 56e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -165505,7 +165502,7 @@ void m68008_device::sne_pais_ip8() // 56e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165515,7 +165512,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165554,7 +165551,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -165597,7 +165594,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -165628,7 +165625,7 @@ void m68008_device::sne_das_ip8() // 56e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165666,11 +165663,11 @@ void m68008_device::sne_das_ip8() // 56e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -165690,7 +165687,7 @@ void m68008_device::sne_das_ip8() // 56e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165700,7 +165697,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165739,7 +165736,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -165782,7 +165779,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -165811,14 +165808,14 @@ void m68008_device::sne_dais_ip8() // 56f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -165826,7 +165823,7 @@ void m68008_device::sne_dais_ip8() // 56f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165865,7 +165862,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165906,11 +165903,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -165930,7 +165927,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -165940,7 +165937,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -165979,7 +165976,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -166022,7 +166019,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -166055,7 +166052,7 @@ void m68008_device::sne_adr16_ip8() // 56f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -166093,7 +166090,7 @@ void m68008_device::sne_adr16_ip8() // 56f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -166114,7 +166111,7 @@ void m68008_device::sne_adr16_ip8() // 56f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -166124,7 +166121,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166163,7 +166160,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -166206,7 +166203,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -166237,7 +166234,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166276,7 +166273,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -166314,7 +166311,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -166335,7 +166332,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_Z); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -166345,7 +166342,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166384,7 +166381,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -166427,7 +166424,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -166460,7 +166457,7 @@ void m68008_device::seq_ds_ip8() // 57c0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -166472,7 +166469,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166515,7 +166512,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -166555,7 +166552,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -166574,7 +166571,7 @@ void m68008_device::dbeq_ds_rel16_ip8() // 57c8 fff8 // 06c dbcc1 m_t = m_sr & SR_Z; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -166586,13 +166583,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -166635,7 +166632,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -166643,7 +166640,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166682,11 +166679,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166732,13 +166729,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166784,7 +166781,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166833,11 +166830,11 @@ void m68008_device::seq_ais_ip8() // 57d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -166857,7 +166854,7 @@ void m68008_device::seq_ais_ip8() // 57d0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -166867,7 +166864,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -166906,7 +166903,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -166949,7 +166946,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -166983,12 +166980,12 @@ void m68008_device::seq_aips_ip8() // 57d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -167009,7 +167006,7 @@ void m68008_device::seq_aips_ip8() // 57d8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167019,7 +167016,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167058,7 +167055,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -167101,7 +167098,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -167134,7 +167131,7 @@ void m68008_device::seq_pais_ip8() // 57e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -167142,7 +167139,7 @@ void m68008_device::seq_pais_ip8() // 57e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -167163,7 +167160,7 @@ void m68008_device::seq_pais_ip8() // 57e0 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167173,7 +167170,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167212,7 +167209,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -167255,7 +167252,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -167286,7 +167283,7 @@ void m68008_device::seq_das_ip8() // 57e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167324,11 +167321,11 @@ void m68008_device::seq_das_ip8() // 57e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -167348,7 +167345,7 @@ void m68008_device::seq_das_ip8() // 57e8 fff8 m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167358,7 +167355,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167397,7 +167394,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -167440,7 +167437,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -167469,14 +167466,14 @@ void m68008_device::seq_dais_ip8() // 57f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -167484,7 +167481,7 @@ void m68008_device::seq_dais_ip8() // 57f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167523,7 +167520,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167564,11 +167561,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -167588,7 +167585,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167598,7 +167595,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167637,7 +167634,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -167680,7 +167677,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -167713,7 +167710,7 @@ void m68008_device::seq_adr16_ip8() // 57f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -167751,7 +167748,7 @@ void m68008_device::seq_adr16_ip8() // 57f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -167772,7 +167769,7 @@ void m68008_device::seq_adr16_ip8() // 57f8 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -167782,7 +167779,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167821,7 +167818,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -167864,7 +167861,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -167895,7 +167892,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -167934,7 +167931,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -167972,7 +167969,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -167993,7 +167990,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff m_ir = m_irc; m_t = m_sr & SR_Z; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168003,7 +168000,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168042,7 +168039,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -168085,7 +168082,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -168118,7 +168115,7 @@ void m68008_device::svc_ds_ip8() // 58c0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -168130,7 +168127,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168173,7 +168170,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -168213,7 +168210,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -168232,7 +168229,7 @@ void m68008_device::dbvc_ds_rel16_ip8() // 58c8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -168244,13 +168241,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -168293,7 +168290,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -168301,7 +168298,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168340,11 +168337,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168390,13 +168387,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168442,7 +168439,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168491,11 +168488,11 @@ void m68008_device::svc_ais_ip8() // 58d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -168515,7 +168512,7 @@ void m68008_device::svc_ais_ip8() // 58d0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168525,7 +168522,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168564,7 +168561,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -168607,7 +168604,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -168641,12 +168638,12 @@ void m68008_device::svc_aips_ip8() // 58d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -168667,7 +168664,7 @@ void m68008_device::svc_aips_ip8() // 58d8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168677,7 +168674,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168716,7 +168713,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -168759,7 +168756,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -168792,7 +168789,7 @@ void m68008_device::svc_pais_ip8() // 58e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -168800,7 +168797,7 @@ void m68008_device::svc_pais_ip8() // 58e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -168821,7 +168818,7 @@ void m68008_device::svc_pais_ip8() // 58e0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -168831,7 +168828,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168870,7 +168867,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -168913,7 +168910,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -168944,7 +168941,7 @@ void m68008_device::svc_das_ip8() // 58e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -168982,11 +168979,11 @@ void m68008_device::svc_das_ip8() // 58e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -169006,7 +169003,7 @@ void m68008_device::svc_das_ip8() // 58e8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169016,7 +169013,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169055,7 +169052,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -169098,7 +169095,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -169127,14 +169124,14 @@ void m68008_device::svc_dais_ip8() // 58f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -169142,7 +169139,7 @@ void m68008_device::svc_dais_ip8() // 58f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169181,7 +169178,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169222,11 +169219,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -169246,7 +169243,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169256,7 +169253,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169295,7 +169292,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -169338,7 +169335,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -169371,7 +169368,7 @@ void m68008_device::svc_adr16_ip8() // 58f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -169409,7 +169406,7 @@ void m68008_device::svc_adr16_ip8() // 58f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -169430,7 +169427,7 @@ void m68008_device::svc_adr16_ip8() // 58f8 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169440,7 +169437,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169479,7 +169476,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -169522,7 +169519,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -169553,7 +169550,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169592,7 +169589,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -169630,7 +169627,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -169651,7 +169648,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff m_ir = m_irc; m_t = !(m_sr & SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -169661,7 +169658,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169700,7 +169697,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -169743,7 +169740,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -169776,7 +169773,7 @@ void m68008_device::svs_ds_ip8() // 59c0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -169788,7 +169785,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169831,7 +169828,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -169871,7 +169868,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -169890,7 +169887,7 @@ void m68008_device::dbvs_ds_rel16_ip8() // 59c8 fff8 // 06c dbcc1 m_t = m_sr & SR_V; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -169902,13 +169899,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -169951,7 +169948,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -169959,7 +169956,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -169998,11 +169995,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170048,13 +170045,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170100,7 +170097,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170149,11 +170146,11 @@ void m68008_device::svs_ais_ip8() // 59d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -170173,7 +170170,7 @@ void m68008_device::svs_ais_ip8() // 59d0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170183,7 +170180,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170222,7 +170219,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -170265,7 +170262,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -170299,12 +170296,12 @@ void m68008_device::svs_aips_ip8() // 59d8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -170325,7 +170322,7 @@ void m68008_device::svs_aips_ip8() // 59d8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170335,7 +170332,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170374,7 +170371,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -170417,7 +170414,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -170450,7 +170447,7 @@ void m68008_device::svs_pais_ip8() // 59e0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -170458,7 +170455,7 @@ void m68008_device::svs_pais_ip8() // 59e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -170479,7 +170476,7 @@ void m68008_device::svs_pais_ip8() // 59e0 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170489,7 +170486,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170528,7 +170525,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -170571,7 +170568,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -170602,7 +170599,7 @@ void m68008_device::svs_das_ip8() // 59e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170640,11 +170637,11 @@ void m68008_device::svs_das_ip8() // 59e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -170664,7 +170661,7 @@ void m68008_device::svs_das_ip8() // 59e8 fff8 m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170674,7 +170671,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170713,7 +170710,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -170756,7 +170753,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -170785,14 +170782,14 @@ void m68008_device::svs_dais_ip8() // 59f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -170800,7 +170797,7 @@ void m68008_device::svs_dais_ip8() // 59f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170839,7 +170836,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170880,11 +170877,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -170904,7 +170901,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -170914,7 +170911,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -170953,7 +170950,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -170996,7 +170993,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -171029,7 +171026,7 @@ void m68008_device::svs_adr16_ip8() // 59f8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -171067,7 +171064,7 @@ void m68008_device::svs_adr16_ip8() // 59f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -171088,7 +171085,7 @@ void m68008_device::svs_adr16_ip8() // 59f8 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171098,7 +171095,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171137,7 +171134,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -171180,7 +171177,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -171211,7 +171208,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171250,7 +171247,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -171288,7 +171285,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -171309,7 +171306,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff m_ir = m_irc; m_t = m_sr & SR_V; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171319,7 +171316,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171358,7 +171355,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -171401,7 +171398,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -171434,7 +171431,7 @@ void m68008_device::spl_ds_ip8() // 5ac0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -171446,7 +171443,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171489,7 +171486,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -171529,7 +171526,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -171548,7 +171545,7 @@ void m68008_device::dbpl_ds_rel16_ip8() // 5ac8 fff8 // 06c dbcc1 m_t = !(m_sr & SR_N); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -171560,13 +171557,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -171609,7 +171606,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -171617,7 +171614,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171656,11 +171653,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171706,13 +171703,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171758,7 +171755,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171807,11 +171804,11 @@ void m68008_device::spl_ais_ip8() // 5ad0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -171831,7 +171828,7 @@ void m68008_device::spl_ais_ip8() // 5ad0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171841,7 +171838,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -171880,7 +171877,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -171923,7 +171920,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -171957,12 +171954,12 @@ void m68008_device::spl_aips_ip8() // 5ad8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -171983,7 +171980,7 @@ void m68008_device::spl_aips_ip8() // 5ad8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -171993,7 +171990,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172032,7 +172029,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -172075,7 +172072,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -172108,7 +172105,7 @@ void m68008_device::spl_pais_ip8() // 5ae0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -172116,7 +172113,7 @@ void m68008_device::spl_pais_ip8() // 5ae0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -172137,7 +172134,7 @@ void m68008_device::spl_pais_ip8() // 5ae0 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172147,7 +172144,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172186,7 +172183,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -172229,7 +172226,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -172260,7 +172257,7 @@ void m68008_device::spl_das_ip8() // 5ae8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172298,11 +172295,11 @@ void m68008_device::spl_das_ip8() // 5ae8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -172322,7 +172319,7 @@ void m68008_device::spl_das_ip8() // 5ae8 fff8 m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172332,7 +172329,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172371,7 +172368,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -172414,7 +172411,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -172443,14 +172440,14 @@ void m68008_device::spl_dais_ip8() // 5af0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -172458,7 +172455,7 @@ void m68008_device::spl_dais_ip8() // 5af0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172497,7 +172494,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172538,11 +172535,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -172562,7 +172559,7 @@ adsw2: m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172572,7 +172569,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172611,7 +172608,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -172654,7 +172651,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -172687,7 +172684,7 @@ void m68008_device::spl_adr16_ip8() // 5af8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -172725,7 +172722,7 @@ void m68008_device::spl_adr16_ip8() // 5af8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -172746,7 +172743,7 @@ void m68008_device::spl_adr16_ip8() // 5af8 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172756,7 +172753,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172795,7 +172792,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -172838,7 +172835,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -172869,7 +172866,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -172908,7 +172905,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -172946,7 +172943,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -172967,7 +172964,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff m_ir = m_irc; m_t = !(m_sr & SR_N); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -172977,7 +172974,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173016,7 +173013,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -173059,7 +173056,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -173092,7 +173089,7 @@ void m68008_device::smi_ds_ip8() // 5bc0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -173104,7 +173101,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173147,7 +173144,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -173187,7 +173184,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -173206,7 +173203,7 @@ void m68008_device::dbmi_ds_rel16_ip8() // 5bc8 fff8 // 06c dbcc1 m_t = m_sr & SR_N; m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -173218,13 +173215,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -173267,7 +173264,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -173275,7 +173272,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173314,11 +173311,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173364,13 +173361,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173416,7 +173413,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173465,11 +173462,11 @@ void m68008_device::smi_ais_ip8() // 5bd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -173489,7 +173486,7 @@ void m68008_device::smi_ais_ip8() // 5bd0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173499,7 +173496,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173538,7 +173535,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -173581,7 +173578,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -173615,12 +173612,12 @@ void m68008_device::smi_aips_ip8() // 5bd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -173641,7 +173638,7 @@ void m68008_device::smi_aips_ip8() // 5bd8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173651,7 +173648,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173690,7 +173687,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -173733,7 +173730,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -173766,7 +173763,7 @@ void m68008_device::smi_pais_ip8() // 5be0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -173774,7 +173771,7 @@ void m68008_device::smi_pais_ip8() // 5be0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -173795,7 +173792,7 @@ void m68008_device::smi_pais_ip8() // 5be0 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173805,7 +173802,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173844,7 +173841,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -173887,7 +173884,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -173918,7 +173915,7 @@ void m68008_device::smi_das_ip8() // 5be8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -173956,11 +173953,11 @@ void m68008_device::smi_das_ip8() // 5be8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -173980,7 +173977,7 @@ void m68008_device::smi_das_ip8() // 5be8 fff8 m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -173990,7 +173987,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174029,7 +174026,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -174072,7 +174069,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -174101,14 +174098,14 @@ void m68008_device::smi_dais_ip8() // 5bf0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -174116,7 +174113,7 @@ void m68008_device::smi_dais_ip8() // 5bf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174155,7 +174152,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174196,11 +174193,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -174220,7 +174217,7 @@ adsw2: m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -174230,7 +174227,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174269,7 +174266,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -174312,7 +174309,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -174345,7 +174342,7 @@ void m68008_device::smi_adr16_ip8() // 5bf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -174383,7 +174380,7 @@ void m68008_device::smi_adr16_ip8() // 5bf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -174404,7 +174401,7 @@ void m68008_device::smi_adr16_ip8() // 5bf8 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -174414,7 +174411,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174453,7 +174450,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -174496,7 +174493,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -174527,7 +174524,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174566,7 +174563,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -174604,7 +174601,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -174625,7 +174622,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff m_ir = m_irc; m_t = m_sr & SR_N; m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -174635,7 +174632,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174674,7 +174671,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -174717,7 +174714,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -174750,7 +174747,7 @@ void m68008_device::sge_ds_ip8() // 5cc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -174762,7 +174759,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174805,7 +174802,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -174845,7 +174842,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -174864,7 +174861,7 @@ void m68008_device::dbge_ds_rel16_ip8() // 5cc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -174876,13 +174873,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -174925,7 +174922,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -174933,7 +174930,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -174972,11 +174969,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175022,13 +175019,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175074,7 +175071,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175123,11 +175120,11 @@ void m68008_device::sge_ais_ip8() // 5cd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -175147,7 +175144,7 @@ void m68008_device::sge_ais_ip8() // 5cd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175157,7 +175154,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175196,7 +175193,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -175239,7 +175236,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -175273,12 +175270,12 @@ void m68008_device::sge_aips_ip8() // 5cd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -175299,7 +175296,7 @@ void m68008_device::sge_aips_ip8() // 5cd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175309,7 +175306,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175348,7 +175345,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -175391,7 +175388,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -175424,7 +175421,7 @@ void m68008_device::sge_pais_ip8() // 5ce0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -175432,7 +175429,7 @@ void m68008_device::sge_pais_ip8() // 5ce0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -175453,7 +175450,7 @@ void m68008_device::sge_pais_ip8() // 5ce0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175463,7 +175460,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175502,7 +175499,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -175545,7 +175542,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -175576,7 +175573,7 @@ void m68008_device::sge_das_ip8() // 5ce8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175614,11 +175611,11 @@ void m68008_device::sge_das_ip8() // 5ce8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -175638,7 +175635,7 @@ void m68008_device::sge_das_ip8() // 5ce8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175648,7 +175645,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175687,7 +175684,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -175730,7 +175727,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -175759,14 +175756,14 @@ void m68008_device::sge_dais_ip8() // 5cf0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -175774,7 +175771,7 @@ void m68008_device::sge_dais_ip8() // 5cf0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175813,7 +175810,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175854,11 +175851,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -175878,7 +175875,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -175888,7 +175885,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -175927,7 +175924,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -175970,7 +175967,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -176003,7 +176000,7 @@ void m68008_device::sge_adr16_ip8() // 5cf8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -176041,7 +176038,7 @@ void m68008_device::sge_adr16_ip8() // 5cf8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -176062,7 +176059,7 @@ void m68008_device::sge_adr16_ip8() // 5cf8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176072,7 +176069,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176111,7 +176108,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -176154,7 +176151,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -176185,7 +176182,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176224,7 +176221,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -176262,7 +176259,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -176283,7 +176280,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176293,7 +176290,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176332,7 +176329,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -176375,7 +176372,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -176408,7 +176405,7 @@ void m68008_device::slt_ds_ip8() // 5dc0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -176420,7 +176417,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176463,7 +176460,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -176503,7 +176500,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -176522,7 +176519,7 @@ void m68008_device::dblt_ds_rel16_ip8() // 5dc8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -176534,13 +176531,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -176583,7 +176580,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -176591,7 +176588,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176630,11 +176627,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176680,13 +176677,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176732,7 +176729,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176781,11 +176778,11 @@ void m68008_device::slt_ais_ip8() // 5dd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -176805,7 +176802,7 @@ void m68008_device::slt_ais_ip8() // 5dd0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176815,7 +176812,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -176854,7 +176851,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -176897,7 +176894,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -176931,12 +176928,12 @@ void m68008_device::slt_aips_ip8() // 5dd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -176957,7 +176954,7 @@ void m68008_device::slt_aips_ip8() // 5dd8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -176967,7 +176964,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177006,7 +177003,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -177049,7 +177046,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -177082,7 +177079,7 @@ void m68008_device::slt_pais_ip8() // 5de0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -177090,7 +177087,7 @@ void m68008_device::slt_pais_ip8() // 5de0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -177111,7 +177108,7 @@ void m68008_device::slt_pais_ip8() // 5de0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177121,7 +177118,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177160,7 +177157,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -177203,7 +177200,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -177234,7 +177231,7 @@ void m68008_device::slt_das_ip8() // 5de8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177272,11 +177269,11 @@ void m68008_device::slt_das_ip8() // 5de8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -177296,7 +177293,7 @@ void m68008_device::slt_das_ip8() // 5de8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177306,7 +177303,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177345,7 +177342,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -177388,7 +177385,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -177417,14 +177414,14 @@ void m68008_device::slt_dais_ip8() // 5df0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -177432,7 +177429,7 @@ void m68008_device::slt_dais_ip8() // 5df0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177471,7 +177468,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177512,11 +177509,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -177536,7 +177533,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177546,7 +177543,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177585,7 +177582,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -177628,7 +177625,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -177661,7 +177658,7 @@ void m68008_device::slt_adr16_ip8() // 5df8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -177699,7 +177696,7 @@ void m68008_device::slt_adr16_ip8() // 5df8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -177720,7 +177717,7 @@ void m68008_device::slt_adr16_ip8() // 5df8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177730,7 +177727,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177769,7 +177766,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -177812,7 +177809,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -177843,7 +177840,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177882,7 +177879,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -177920,7 +177917,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -177941,7 +177938,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -177951,7 +177948,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -177990,7 +177987,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -178033,7 +178030,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -178066,7 +178063,7 @@ void m68008_device::sgt_ds_ip8() // 5ec0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -178078,7 +178075,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178121,7 +178118,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -178161,7 +178158,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -178180,7 +178177,7 @@ void m68008_device::dbgt_ds_rel16_ip8() // 5ec8 fff8 // 06c dbcc1 m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -178192,13 +178189,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -178241,7 +178238,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -178249,7 +178246,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178288,11 +178285,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178338,13 +178335,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178390,7 +178387,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178439,11 +178436,11 @@ void m68008_device::sgt_ais_ip8() // 5ed0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -178463,7 +178460,7 @@ void m68008_device::sgt_ais_ip8() // 5ed0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178473,7 +178470,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178512,7 +178509,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -178555,7 +178552,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -178589,12 +178586,12 @@ void m68008_device::sgt_aips_ip8() // 5ed8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -178615,7 +178612,7 @@ void m68008_device::sgt_aips_ip8() // 5ed8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178625,7 +178622,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178664,7 +178661,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -178707,7 +178704,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -178740,7 +178737,7 @@ void m68008_device::sgt_pais_ip8() // 5ee0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -178748,7 +178745,7 @@ void m68008_device::sgt_pais_ip8() // 5ee0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -178769,7 +178766,7 @@ void m68008_device::sgt_pais_ip8() // 5ee0 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178779,7 +178776,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178818,7 +178815,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -178861,7 +178858,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -178892,7 +178889,7 @@ void m68008_device::sgt_das_ip8() // 5ee8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -178930,11 +178927,11 @@ void m68008_device::sgt_das_ip8() // 5ee8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -178954,7 +178951,7 @@ void m68008_device::sgt_das_ip8() // 5ee8 fff8 m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -178964,7 +178961,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179003,7 +179000,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -179046,7 +179043,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -179075,14 +179072,14 @@ void m68008_device::sgt_dais_ip8() // 5ef0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -179090,7 +179087,7 @@ void m68008_device::sgt_dais_ip8() // 5ef0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179129,7 +179126,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179170,11 +179167,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -179194,7 +179191,7 @@ adsw2: m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -179204,7 +179201,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179243,7 +179240,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -179286,7 +179283,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -179319,7 +179316,7 @@ void m68008_device::sgt_adr16_ip8() // 5ef8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -179357,7 +179354,7 @@ void m68008_device::sgt_adr16_ip8() // 5ef8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -179378,7 +179375,7 @@ void m68008_device::sgt_adr16_ip8() // 5ef8 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -179388,7 +179385,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179427,7 +179424,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -179470,7 +179467,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -179501,7 +179498,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179540,7 +179537,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -179578,7 +179575,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -179599,7 +179596,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff m_ir = m_irc; m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -179609,7 +179606,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179648,7 +179645,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -179691,7 +179688,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -179724,7 +179721,7 @@ void m68008_device::sle_ds_ip8() // 5fc0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccr2; @@ -179736,7 +179733,7 @@ roaw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179779,7 +179776,7 @@ roaw2: sccr2: // 0cb sccr2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -179819,7 +179816,7 @@ sccr2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -179838,7 +179835,7 @@ void m68008_device::dble_ds_rel16_ip8() // 5fc8 fff8 // 06c dbcc1 m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_au = ext32(m_dbin) + m_pc; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_icount -= 2; if(m_t) goto dbcc6; @@ -179850,13 +179847,13 @@ dbcc2: m_alub = m_da[ry]; m_at = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); // 175 dbcc3 m_t = m_isr & SR_Z; m_pc = m_au; m_au = m_at + 2; - // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1 + // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1 alu_add(m_alub, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -179899,7 +179896,7 @@ dbcc6: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none set_ftu_const(); m_icount -= 2; if(m_sr & SR_T) @@ -179907,7 +179904,7 @@ dbcc6: // 0c5 bbci3 m_aob = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179946,11 +179943,11 @@ dbcc6: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 34c mmrw3 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -179996,13 +179993,13 @@ dbcc4: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none // 08b roaw2 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180048,7 +180045,7 @@ dbcc5: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180097,11 +180094,11 @@ void m68008_device::sle_ais_ip8() // 5fd0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -180121,7 +180118,7 @@ void m68008_device::sle_ais_ip8() // 5fd0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180131,7 +180128,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180170,7 +180167,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -180213,7 +180210,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -180247,12 +180244,12 @@ void m68008_device::sle_aips_ip8() // 5fd8 fff8 m_dcr = m_dt; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -180273,7 +180270,7 @@ void m68008_device::sle_aips_ip8() // 5fd8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180283,7 +180280,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180322,7 +180319,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -180365,7 +180362,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -180398,7 +180395,7 @@ void m68008_device::sle_pais_ip8() // 5fe0 fff8 m_pc = m_au; m_dcr = m_dt; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_icount -= 2; // 17b pdcw2 @@ -180406,7 +180403,7 @@ void m68008_device::sle_pais_ip8() // 5fe0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -180427,7 +180424,7 @@ void m68008_device::sle_pais_ip8() // 5fe0 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180437,7 +180434,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180476,7 +180473,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -180519,7 +180516,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -180550,7 +180547,7 @@ void m68008_device::sle_das_ip8() // 5fe8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180588,11 +180585,11 @@ void m68008_device::sle_das_ip8() // 5fe8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -180612,7 +180609,7 @@ void m68008_device::sle_das_ip8() // 5fe8 fff8 m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180622,7 +180619,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180661,7 +180658,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -180704,7 +180701,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -180733,14 +180730,14 @@ void m68008_device::sle_dais_ip8() // 5ff0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -180748,7 +180745,7 @@ void m68008_device::sle_dais_ip8() // 5ff0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180787,7 +180784,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180828,11 +180825,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_dt; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -180852,7 +180849,7 @@ adsw2: m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -180862,7 +180859,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -180901,7 +180898,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -180944,7 +180941,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -180977,7 +180974,7 @@ void m68008_device::sle_adr16_ip8() // 5ff8 ffff m_dcr = m_dt; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -181015,7 +181012,7 @@ void m68008_device::sle_adr16_ip8() // 5ff8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -181036,7 +181033,7 @@ void m68008_device::sle_adr16_ip8() // 5ff8 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -181046,7 +181043,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -181085,7 +181082,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -181128,7 +181125,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -181159,7 +181156,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -181198,7 +181195,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff m_dcr = m_dt; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin + // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin alu_or8(m_dt, m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -181236,7 +181233,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -181257,7 +181254,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff m_ir = m_irc; m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V); m_pc = m_au; - // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0 + // alu r=15 c=1 m=..... i=b...... 1 a=none d=0 alu_and8(0x0000, 0x0000); if(m_t) goto sccb2; @@ -181267,7 +181264,7 @@ sccb3: // 04f sccb3 m_pc = m_au; m_au = m_at; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -181306,7 +181303,7 @@ sccb3: sccb2: // 0cf sccb2 m_au = m_at; - // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1 + // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1 alu_or8(m_aluo, 0xff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -181349,7 +181346,7 @@ morw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=15 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -181639,7 +181636,7 @@ void m68008_device::bsr_rel16_ip8() // 6100 ffff case 0: // 0a9 bsrw1 m_at = m_au; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[m_sp] - 4; m_icount -= 2; @@ -181810,7 +181807,7 @@ void m68008_device::bsr_rel8_ip8() // 6100 ff00 // 089 bsri1 m_at = m_pc; m_au = m_da[m_sp] - 4; - // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1 + // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1 alu_and(m_pc, 0xffff); m_icount -= 2; // 102 bsri2 @@ -185638,7 +185635,7 @@ void m68008_device::moveq_imm8o_dd_ip8() // 7000 f100 m_pc = m_au; m_da[rx] = ext32(m_ftu); m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); sr_nzvc(); // 34c mmrw3 @@ -185697,7 +185694,7 @@ void m68008_device::or_b_ds_dd_ip8() // 8000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185705,7 +185702,7 @@ void m68008_device::or_b_ds_dd_ip8() // 8000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -185757,11 +185754,11 @@ void m68008_device::or_b_ais_dd_ip8() // 8010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -185781,7 +185778,7 @@ void m68008_device::or_b_ais_dd_ip8() // 8010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185789,7 +185786,7 @@ void m68008_device::or_b_ais_dd_ip8() // 8010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -185844,12 +185841,12 @@ void m68008_device::or_b_aips_dd_ip8() // 8018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -185870,7 +185867,7 @@ void m68008_device::or_b_aips_dd_ip8() // 8018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185878,7 +185875,7 @@ void m68008_device::or_b_aips_dd_ip8() // 8018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -185932,7 +185929,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -185940,7 +185937,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -185961,7 +185958,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -185969,7 +185966,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186021,7 +186018,7 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186059,11 +186056,11 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -186083,7 +186080,7 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186091,7 +186088,7 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186141,14 +186138,14 @@ void m68008_device::or_b_dais_dd_ip8() // 8030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -186156,7 +186153,7 @@ void m68008_device::or_b_dais_dd_ip8() // 8030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186195,7 +186192,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186236,11 +186233,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -186260,7 +186257,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186268,7 +186265,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186322,7 +186319,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -186360,7 +186357,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -186381,7 +186378,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186389,7 +186386,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186441,7 +186438,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186480,7 +186477,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -186518,7 +186515,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -186539,7 +186536,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186547,7 +186544,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186598,7 +186595,7 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186636,11 +186633,11 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob); @@ -186660,7 +186657,7 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186668,7 +186665,7 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186717,14 +186714,14 @@ void m68008_device::or_b_dpci_dd_ip8() // 803b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -186732,7 +186729,7 @@ void m68008_device::or_b_dpci_dd_ip8() // 803b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186771,7 +186768,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186812,11 +186809,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob); @@ -186836,7 +186833,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186844,7 +186841,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186898,7 +186895,7 @@ void m68008_device::or_b_imm8_dd_ip8() // 803c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186937,7 +186934,7 @@ void m68008_device::or_b_imm8_dd_ip8() // 803c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx] alu_or8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -186945,7 +186942,7 @@ void m68008_device::or_b_imm8_dd_ip8() // 803c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -186999,7 +186996,7 @@ void m68008_device::or_w_ds_dd_ip8() // 8040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187007,7 +187004,7 @@ void m68008_device::or_w_ds_dd_ip8() // 8040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187059,11 +187056,11 @@ void m68008_device::or_w_ais_dd_ip8() // 8050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -187101,7 +187098,7 @@ void m68008_device::or_w_ais_dd_ip8() // 8050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187109,7 +187106,7 @@ void m68008_device::or_w_ais_dd_ip8() // 8050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187164,12 +187161,12 @@ void m68008_device::or_w_aips_dd_ip8() // 8058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -187208,7 +187205,7 @@ void m68008_device::or_w_aips_dd_ip8() // 8058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187216,7 +187213,7 @@ void m68008_device::or_w_aips_dd_ip8() // 8058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187270,7 +187267,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -187278,7 +187275,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -187317,7 +187314,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187325,7 +187322,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187377,7 +187374,7 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187415,11 +187412,11 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -187457,7 +187454,7 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187465,7 +187462,7 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187515,14 +187512,14 @@ void m68008_device::or_w_dais_dd_ip8() // 8070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -187530,7 +187527,7 @@ void m68008_device::or_w_dais_dd_ip8() // 8070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187569,7 +187566,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187610,11 +187607,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -187652,7 +187649,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187660,7 +187657,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187714,7 +187711,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -187752,7 +187749,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -187791,7 +187788,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187799,7 +187796,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187851,7 +187848,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -187890,7 +187887,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -187928,7 +187925,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -187967,7 +187964,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -187975,7 +187972,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188026,7 +188023,7 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188064,11 +188061,11 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188106,7 +188103,7 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -188114,7 +188111,7 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188163,14 +188160,14 @@ void m68008_device::or_w_dpci_dd_ip8() // 807b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -188178,7 +188175,7 @@ void m68008_device::or_w_dpci_dd_ip8() // 807b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188217,7 +188214,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188258,11 +188255,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188300,7 +188297,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -188308,7 +188305,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188362,7 +188359,7 @@ void m68008_device::or_w_imm16_dd_ip8() // 807c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188401,7 +188398,7 @@ void m68008_device::or_w_imm16_dd_ip8() // 807c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -188409,7 +188406,7 @@ void m68008_device::or_w_imm16_dd_ip8() // 807c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188463,12 +188460,12 @@ void m68008_device::or_l_ds_dd_ip8() // 8080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx] alu_or(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -188503,7 +188500,7 @@ void m68008_device::or_l_ds_dd_ip8() // 8080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx] alu_or(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -188512,7 +188509,7 @@ void m68008_device::or_l_ds_dd_ip8() // 8080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188532,7 +188529,7 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -188572,7 +188569,7 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -188610,12 +188607,12 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188656,7 +188653,7 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188676,7 +188673,7 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -188716,11 +188713,11 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -188758,12 +188755,12 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188804,7 +188801,7 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188823,14 +188820,14 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -188869,7 +188866,7 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -188907,12 +188904,12 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -188953,7 +188950,7 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -188973,7 +188970,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -189010,7 +189007,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -189050,7 +189047,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189088,12 +189085,12 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189134,7 +189131,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189152,14 +189149,14 @@ void m68008_device::or_l_dais_dd_ip8() // 80b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -189167,7 +189164,7 @@ void m68008_device::or_l_dais_dd_ip8() // 80b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -189206,7 +189203,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -189246,7 +189243,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -189286,7 +189283,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189324,12 +189321,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189370,7 +189367,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189392,7 +189389,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -189430,7 +189427,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -189470,7 +189467,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189508,12 +189505,12 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189554,7 +189551,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189574,7 +189571,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -189613,7 +189610,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -189651,7 +189648,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -189691,7 +189688,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -189729,12 +189726,12 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189775,7 +189772,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189794,7 +189791,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -189831,7 +189828,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -189871,7 +189868,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -189909,12 +189906,12 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -189955,7 +189952,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -189972,14 +189969,14 @@ void m68008_device::or_l_dpci_dd_ip8() // 80bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -189987,7 +189984,7 @@ void m68008_device::or_l_dpci_dd_ip8() // 80bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -190026,7 +190023,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -190066,7 +190063,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -190106,7 +190103,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -190144,12 +190141,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx] alu_or(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx] alu_or(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190190,7 +190187,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -190210,7 +190207,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -190249,7 +190246,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -190288,12 +190285,12 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx] alu_or(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -190328,7 +190325,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx] + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx] alu_or(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -190337,7 +190334,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -190359,13 +190356,13 @@ void m68008_device::divu_w_ds_dd_ip8() // 80c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -190378,7 +190375,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -190396,7 +190393,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -190404,7 +190401,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -190444,7 +190441,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -190482,7 +190479,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -190679,7 +190676,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190725,7 +190722,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -190736,7 +190733,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -190748,7 +190745,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -190768,7 +190765,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -190779,7 +190776,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -190789,13 +190786,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -190806,7 +190803,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -190816,7 +190813,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -190824,7 +190821,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -190878,7 +190875,7 @@ void m68008_device::divu_w_ais_dd_ip8() // 80d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -190919,13 +190916,13 @@ void m68008_device::divu_w_ais_dd_ip8() // 80d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -190938,7 +190935,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -190956,7 +190953,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -190964,7 +190961,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -191004,7 +191001,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -191042,7 +191039,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -191239,7 +191236,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191285,7 +191282,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -191296,7 +191293,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191308,7 +191305,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191328,7 +191325,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -191339,7 +191336,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -191349,13 +191346,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -191366,7 +191363,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -191376,7 +191373,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -191384,7 +191381,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191444,7 +191441,7 @@ void m68008_device::divu_w_aips_dd_ip8() // 80d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -191483,13 +191480,13 @@ void m68008_device::divu_w_aips_dd_ip8() // 80d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -191502,7 +191499,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -191520,7 +191517,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -191528,7 +191525,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -191568,7 +191565,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -191606,7 +191603,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -191803,7 +191800,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -191849,7 +191846,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -191860,7 +191857,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191872,7 +191869,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -191892,7 +191889,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -191903,7 +191900,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -191913,13 +191910,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -191930,7 +191927,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -191940,7 +191937,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -191948,7 +191945,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -192010,7 +192007,7 @@ void m68008_device::divu_w_pais_dd_ip8() // 80e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -192049,13 +192046,13 @@ void m68008_device::divu_w_pais_dd_ip8() // 80e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -192068,7 +192065,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -192086,7 +192083,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -192094,7 +192091,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -192134,7 +192131,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -192172,7 +192169,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -192369,7 +192366,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -192415,7 +192412,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -192426,7 +192423,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -192438,7 +192435,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -192458,7 +192455,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -192469,7 +192466,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -192479,13 +192476,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -192496,7 +192493,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -192506,7 +192503,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -192514,7 +192511,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -192605,7 +192602,7 @@ void m68008_device::divu_w_das_dd_ip8() // 80e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -192646,13 +192643,13 @@ void m68008_device::divu_w_das_dd_ip8() // 80e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -192665,7 +192662,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -192683,7 +192680,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -192691,7 +192688,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -192731,7 +192728,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -192769,7 +192766,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -192966,7 +192963,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193012,7 +193009,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -193023,7 +193020,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193035,7 +193032,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193055,7 +193052,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -193066,7 +193063,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -193076,13 +193073,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -193093,7 +193090,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -193103,7 +193100,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -193111,7 +193108,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193163,7 +193160,7 @@ void m68008_device::divu_w_dais_dd_ip8() // 80f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -193255,7 +193252,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -193296,13 +193293,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -193315,7 +193312,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -193333,7 +193330,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -193341,7 +193338,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -193381,7 +193378,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -193419,7 +193416,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -193616,7 +193613,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193662,7 +193659,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -193673,7 +193670,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193685,7 +193682,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -193705,7 +193702,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -193716,7 +193713,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -193726,13 +193723,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -193743,7 +193740,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -193753,7 +193750,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -193761,7 +193758,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -193853,7 +193850,7 @@ void m68008_device::divu_w_adr16_dd_ip8() // 80f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -193892,13 +193889,13 @@ void m68008_device::divu_w_adr16_dd_ip8() // 80f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -193911,7 +193908,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -193929,7 +193926,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -193937,7 +193934,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -193977,7 +193974,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -194015,7 +194012,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -194212,7 +194209,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -194258,7 +194255,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -194269,7 +194266,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194281,7 +194278,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194301,7 +194298,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -194312,7 +194309,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -194322,13 +194319,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -194339,7 +194336,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -194349,7 +194346,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -194357,7 +194354,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -194485,7 +194482,7 @@ void m68008_device::divu_w_adr32_dd_ip8() // 80f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -194524,13 +194521,13 @@ void m68008_device::divu_w_adr32_dd_ip8() // 80f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -194543,7 +194540,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -194561,7 +194558,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -194569,7 +194566,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -194609,7 +194606,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -194647,7 +194644,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: @@ -194844,7 +194841,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -194890,7 +194887,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -194901,7 +194898,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194913,7 +194910,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -194933,7 +194930,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -194944,7 +194941,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -194954,13 +194951,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -194971,7 +194968,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -194981,7 +194978,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -194989,7 +194986,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195079,7 +195076,7 @@ void m68008_device::divu_w_dpc_dd_ip8() // 80fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -195120,13 +195117,13 @@ void m68008_device::divu_w_dpc_dd_ip8() // 80fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -195139,7 +195136,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -195157,7 +195154,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -195165,7 +195162,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -195205,7 +195202,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -195243,7 +195240,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -195440,7 +195437,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195486,7 +195483,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -195497,7 +195494,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -195509,7 +195506,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -195529,7 +195526,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -195540,7 +195537,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -195550,13 +195547,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -195567,7 +195564,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -195577,7 +195574,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -195585,7 +195582,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -195636,7 +195633,7 @@ void m68008_device::divu_w_dpci_dd_ip8() // 80fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -195728,7 +195725,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -195769,13 +195766,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -195788,7 +195785,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -195806,7 +195803,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -195814,7 +195811,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -195854,7 +195851,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -195892,7 +195889,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -196089,7 +196086,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196135,7 +196132,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -196146,7 +196143,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196158,7 +196155,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196178,7 +196175,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -196189,7 +196186,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -196199,13 +196196,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -196216,7 +196213,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -196226,7 +196223,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -196234,7 +196231,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196328,13 +196325,13 @@ void m68008_device::divu_w_imm16_dd_ip8() // 80fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 213 dvum2 m_t = m_isr & SR_Z; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx] + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx] alu_sub(m_alub, high16(m_da[rx])); sr_nzvc(); m_icount -= 2; @@ -196347,7 +196344,7 @@ dvum3: m_t = m_isr & SR_C; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -196365,7 +196362,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -196373,7 +196370,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -196413,7 +196410,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -196451,7 +196448,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -196648,7 +196645,7 @@ dvum4: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196694,7 +196691,7 @@ dvum5: // 291 dvum5 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; if(m_t) @@ -196705,7 +196702,7 @@ dvum8: // 252 dvum8 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196717,7 +196714,7 @@ dvum7: // 2d2 dvum7 m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -196737,7 +196734,7 @@ dvumc: // 369 dvumc m_t = m_isr & SR_C; set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; if(m_t) @@ -196748,7 +196745,7 @@ dvum6: // 2d0 dvum6 m_t = m_isr & SR_N; m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; if(m_t) @@ -196758,13 +196755,13 @@ dvum6: dvum9: // 250 dvum9 set_16h(m_da[rx], m_aluo); - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0 + // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0 alu_and(m_aluo, 0x0000); m_icount -= 2; goto dvumd; dvume: // 290 dvume - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -196775,7 +196772,7 @@ dvumd: m_ir = m_irc; m_alub = m_aluo; m_au = m_pc + 2; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); goto dvum0; dvumf: @@ -196785,7 +196782,7 @@ dvumf: m_alub = m_aluo; set_16h(m_da[rx], m_at); m_au = m_pc + 2; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); goto dvum0; dvum0: @@ -196793,7 +196790,7 @@ dvum0: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_alue); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue alu_sub(m_alub, m_alue); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -196849,12 +196846,12 @@ void m68008_device::sbcd_ds_dd_ip8() // 8100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx] alu_sbcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -196918,7 +196915,7 @@ void m68008_device::sbcd_pais_paid_ip8() // 8108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -196958,12 +196955,12 @@ void m68008_device::sbcd_pais_paid_ip8() // 8108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin + // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin alu_sbcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=? + // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -197034,11 +197031,11 @@ void m68008_device::or_b_dd_ais_ip8() // 8110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -197058,7 +197055,7 @@ void m68008_device::or_b_dd_ais_ip8() // 8110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197100,7 +197097,7 @@ void m68008_device::or_b_dd_ais_ip8() // 8110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -197135,12 +197132,12 @@ void m68008_device::or_b_dd_aips_ip8() // 8118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -197161,7 +197158,7 @@ void m68008_device::or_b_dd_aips_ip8() // 8118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197203,7 +197200,7 @@ void m68008_device::or_b_dd_aips_ip8() // 8118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -197237,7 +197234,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -197245,7 +197242,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -197266,7 +197263,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197308,7 +197305,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -197340,7 +197337,7 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -197378,11 +197375,11 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -197402,7 +197399,7 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197444,7 +197441,7 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -197474,14 +197471,14 @@ void m68008_device::or_b_dd_dais_ip8() // 8130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -197489,7 +197486,7 @@ void m68008_device::or_b_dd_dais_ip8() // 8130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -197528,7 +197525,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -197569,11 +197566,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -197593,7 +197590,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197635,7 +197632,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -197669,7 +197666,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -197707,7 +197704,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -197728,7 +197725,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197770,7 +197767,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -197802,7 +197799,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -197841,7 +197838,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -197879,7 +197876,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -197900,7 +197897,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -197942,7 +197939,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=b...... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -197974,11 +197971,11 @@ void m68008_device::or_w_dd_ais_ip8() // 8150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -198016,7 +198013,7 @@ void m68008_device::or_w_dd_ais_ip8() // 8150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198058,7 +198055,7 @@ void m68008_device::or_w_dd_ais_ip8() // 8150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -198111,12 +198108,12 @@ void m68008_device::or_w_dd_aips_ip8() // 8158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -198155,7 +198152,7 @@ void m68008_device::or_w_dd_aips_ip8() // 8158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198197,7 +198194,7 @@ void m68008_device::or_w_dd_aips_ip8() // 8158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -198249,7 +198246,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -198257,7 +198254,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -198296,7 +198293,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198338,7 +198335,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -198388,7 +198385,7 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -198426,11 +198423,11 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -198468,7 +198465,7 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198510,7 +198507,7 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -198558,14 +198555,14 @@ void m68008_device::or_w_dd_dais_ip8() // 8170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -198573,7 +198570,7 @@ void m68008_device::or_w_dd_dais_ip8() // 8170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -198612,7 +198609,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -198653,11 +198650,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -198695,7 +198692,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198737,7 +198734,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -198789,7 +198786,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -198827,7 +198824,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -198866,7 +198863,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -198908,7 +198905,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -198958,7 +198955,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -198997,7 +198994,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -199035,7 +199032,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -199074,7 +199071,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199116,7 +199113,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=....... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -199166,7 +199163,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -199206,7 +199203,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199244,7 +199241,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199284,7 +199281,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199324,7 +199321,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -199374,7 +199371,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -199414,11 +199411,11 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199456,7 +199453,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199496,7 +199493,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199536,7 +199533,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -199585,14 +199582,14 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199631,7 +199628,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199669,7 +199666,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199709,7 +199706,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199749,7 +199746,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -199799,7 +199796,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -199836,7 +199833,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -199876,7 +199873,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -199914,7 +199911,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -199954,7 +199951,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -199994,7 +199991,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -200042,14 +200039,14 @@ void m68008_device::or_l_dd_dais_ip8() // 81b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -200057,7 +200054,7 @@ void m68008_device::or_l_dd_dais_ip8() // 81b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -200096,7 +200093,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -200136,7 +200133,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -200176,7 +200173,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200214,7 +200211,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200254,7 +200251,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200294,7 +200291,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -200346,7 +200343,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -200384,7 +200381,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -200424,7 +200421,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200462,7 +200459,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200502,7 +200499,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200542,7 +200539,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -200592,7 +200589,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -200631,7 +200628,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -200669,7 +200666,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -200709,7 +200706,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -200747,7 +200744,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin alu_or(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -200787,7 +200784,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue alu_or(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -200827,7 +200824,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none + // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -200879,13 +200876,13 @@ void m68008_device::divs_w_ds_dd_ip8() // 81c0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_da[ry]); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -200899,7 +200896,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -200909,7 +200906,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -200924,7 +200921,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -200932,7 +200929,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: @@ -200972,7 +200969,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -201010,7 +201007,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -201202,7 +201199,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -201211,7 +201208,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -201219,12 +201216,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -201232,7 +201229,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201249,7 +201246,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -201257,7 +201254,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201303,7 +201300,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -201330,13 +201327,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201344,27 +201341,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -201376,7 +201373,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201388,7 +201385,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201403,7 +201400,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -201412,7 +201409,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -201420,7 +201417,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -201430,7 +201427,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -201439,7 +201436,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -201451,7 +201448,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -201515,7 +201512,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -201531,7 +201528,7 @@ void m68008_device::divs_w_ais_dd_ip8() // 81d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -201572,13 +201569,13 @@ void m68008_device::divs_w_ais_dd_ip8() // 81d0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -201592,7 +201589,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -201602,7 +201599,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -201617,7 +201614,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -201625,7 +201622,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -201665,7 +201662,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -201703,7 +201700,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -201895,7 +201892,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -201904,7 +201901,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -201912,12 +201909,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -201925,7 +201922,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -201942,7 +201939,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -201950,7 +201947,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -201996,7 +201993,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -202023,13 +202020,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202037,27 +202034,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202069,7 +202066,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202081,7 +202078,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202096,7 +202093,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202105,7 +202102,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202113,7 +202110,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202123,7 +202120,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202132,7 +202129,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202144,7 +202141,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202208,7 +202205,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -202230,7 +202227,7 @@ void m68008_device::divs_w_aips_dd_ip8() // 81d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -202269,13 +202266,13 @@ void m68008_device::divs_w_aips_dd_ip8() // 81d8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202289,7 +202286,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202299,7 +202296,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202314,7 +202311,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -202322,7 +202319,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -202362,7 +202359,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -202400,7 +202397,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -202592,7 +202589,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -202601,7 +202598,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -202609,12 +202606,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -202622,7 +202619,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202639,7 +202636,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -202647,7 +202644,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -202693,7 +202690,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -202720,13 +202717,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202734,27 +202731,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202766,7 +202763,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202778,7 +202775,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -202793,7 +202790,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202802,7 +202799,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202810,7 +202807,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202820,7 +202817,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202829,7 +202826,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -202841,7 +202838,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -202905,7 +202902,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -202929,7 +202926,7 @@ void m68008_device::divs_w_pais_dd_ip8() // 81e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -202968,13 +202965,13 @@ void m68008_device::divs_w_pais_dd_ip8() // 81e0 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -202988,7 +202985,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -202998,7 +202995,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203013,7 +203010,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -203021,7 +203018,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -203061,7 +203058,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -203099,7 +203096,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -203291,7 +203288,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -203300,7 +203297,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -203308,12 +203305,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -203321,7 +203318,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203338,7 +203335,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -203346,7 +203343,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -203392,7 +203389,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -203419,13 +203416,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203433,27 +203430,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203465,7 +203462,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203477,7 +203474,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -203492,7 +203489,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -203501,7 +203498,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -203509,7 +203506,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -203519,7 +203516,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -203528,7 +203525,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -203540,7 +203537,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -203604,7 +203601,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -203657,7 +203654,7 @@ void m68008_device::divs_w_das_dd_ip8() // 81e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -203698,13 +203695,13 @@ void m68008_device::divs_w_das_dd_ip8() // 81e8 f1f8 m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -203718,7 +203715,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203728,7 +203725,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -203743,7 +203740,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -203751,7 +203748,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -203791,7 +203788,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -203829,7 +203826,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -204021,7 +204018,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -204030,7 +204027,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -204038,12 +204035,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204051,7 +204048,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204068,7 +204065,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -204076,7 +204073,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -204122,7 +204119,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204149,13 +204146,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204163,27 +204160,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204195,7 +204192,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204207,7 +204204,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204222,7 +204219,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -204231,7 +204228,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -204239,7 +204236,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -204249,7 +204246,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -204258,7 +204255,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -204270,7 +204267,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -204334,7 +204331,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -204348,7 +204345,7 @@ void m68008_device::divs_w_dais_dd_ip8() // 81f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -204440,7 +204437,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -204481,13 +204478,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -204501,7 +204498,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204511,7 +204508,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204526,7 +204523,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -204534,7 +204531,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -204574,7 +204571,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -204612,7 +204609,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -204804,7 +204801,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -204813,7 +204810,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -204821,12 +204818,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204834,7 +204831,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204851,7 +204848,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -204859,7 +204856,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -204905,7 +204902,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -204932,13 +204929,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204946,27 +204943,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -204978,7 +204975,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -204990,7 +204987,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205005,7 +205002,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205014,7 +205011,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205022,7 +205019,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205032,7 +205029,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205041,7 +205038,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205053,7 +205050,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205117,7 +205114,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -205171,7 +205168,7 @@ void m68008_device::divs_w_adr16_dd_ip8() // 81f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -205210,13 +205207,13 @@ void m68008_device::divs_w_adr16_dd_ip8() // 81f8 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205230,7 +205227,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -205240,7 +205237,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -205255,7 +205252,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -205263,7 +205260,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -205303,7 +205300,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -205341,7 +205338,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -205533,7 +205530,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -205542,7 +205539,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -205550,12 +205547,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -205563,7 +205560,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205580,7 +205577,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -205588,7 +205585,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -205634,7 +205631,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -205661,13 +205658,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205675,27 +205672,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -205707,7 +205704,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205719,7 +205716,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -205734,7 +205731,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205743,7 +205740,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205751,7 +205748,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205761,7 +205758,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205770,7 +205767,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -205782,7 +205779,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -205846,7 +205843,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -205936,7 +205933,7 @@ void m68008_device::divs_w_adr32_dd_ip8() // 81f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -205975,13 +205972,13 @@ void m68008_device::divs_w_adr32_dd_ip8() // 81f9 f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -205995,7 +205992,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206005,7 +206002,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206020,7 +206017,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -206028,7 +206025,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -206068,7 +206065,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -206106,7 +206103,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 29: @@ -206298,7 +206295,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -206307,7 +206304,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -206315,12 +206312,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -206328,7 +206325,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206345,7 +206342,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -206353,7 +206350,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -206399,7 +206396,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -206426,13 +206423,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206440,27 +206437,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206472,7 +206469,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206484,7 +206481,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -206499,7 +206496,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -206508,7 +206505,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -206516,7 +206513,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -206526,7 +206523,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -206535,7 +206532,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -206547,7 +206544,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -206611,7 +206608,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -206663,7 +206660,7 @@ void m68008_device::divs_w_dpc_dd_ip8() // 81fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -206704,13 +206701,13 @@ void m68008_device::divs_w_dpc_dd_ip8() // 81fa f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -206724,7 +206721,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206734,7 +206731,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -206749,7 +206746,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -206757,7 +206754,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -206797,7 +206794,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -206835,7 +206832,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -207027,7 +207024,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -207036,7 +207033,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -207044,12 +207041,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207057,7 +207054,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207074,7 +207071,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -207082,7 +207079,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207128,7 +207125,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207155,13 +207152,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207169,27 +207166,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207201,7 +207198,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207213,7 +207210,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207228,7 +207225,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -207237,7 +207234,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -207245,7 +207242,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -207255,7 +207252,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -207264,7 +207261,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -207276,7 +207273,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -207340,7 +207337,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -207353,7 +207350,7 @@ void m68008_device::divs_w_dpci_dd_ip8() // 81fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0 + // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0 alu_over(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -207445,7 +207442,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -207486,13 +207483,13 @@ adsw2: m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dbin); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -207506,7 +207503,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207516,7 +207513,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207531,7 +207528,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -207539,7 +207536,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -207579,7 +207576,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -207617,7 +207614,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: @@ -207809,7 +207806,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -207818,7 +207815,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -207826,12 +207823,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207839,7 +207836,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207856,7 +207853,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -207864,7 +207861,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -207910,7 +207907,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -207937,13 +207934,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207951,27 +207948,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -207983,7 +207980,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -207995,7 +207992,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208010,7 +208007,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208019,7 +208016,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208027,7 +208024,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208037,7 +208034,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208046,7 +208043,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208058,7 +208055,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208122,7 +208119,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -208178,13 +208175,13 @@ void m68008_device::divs_w_imm16_dd_ip8() // 81fc f1ff m_alue = m_da[rx]; m_pc = m_au; set_16h(m_at, m_dt); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1 alu_and(m_dt, 0xffff); sr_nzvc(); m_icount -= 2; // 0c9 dvs03 m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208198,7 +208195,7 @@ dvs04: // 0a3 dvs04 set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -208208,7 +208205,7 @@ dvs05: m_alub = m_aluo; set_16l(m_at, high16(m_da[rx])); m_au = merge_16_32(0, m_ftu) + 1; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -208223,7 +208220,7 @@ dvur2: update_user_super(); update_interrupt(); m_pc = m_au; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1 alu_and(m_au, 0xffff); m_au = m_da[16] - 2; m_icount -= 2; @@ -208231,7 +208228,7 @@ dvur2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1 alu_and(m_ftu, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: @@ -208271,7 +208268,7 @@ dvur2: m_da[16] = m_au; m_ftu = 0x0014; m_au = m_au + 2; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1 alu_and(high16(m_pc), 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: @@ -208309,7 +208306,7 @@ dvur2: m_dbout = m_aluo; m_at = ext32(m_ftu); m_au = m_au - 4; - // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: @@ -208501,7 +208498,7 @@ dvur2: dvs06: // 176 dvs06 m_t = m_isr & SR_N; - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0 alu_sub(m_da[rx], 0x0000); m_icount -= 2; if(m_t) @@ -208510,7 +208507,7 @@ dvs06: goto dvs07; dvs07: // 042 dvs07 - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at alu_sub(m_alub, m_at); sr_nzvc(); m_icount -= 2; @@ -208518,12 +208515,12 @@ dvs07: dvs10: // 0c2 dvs10 m_alue = m_aluo; - // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0 + // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0 alu_subc(high16(m_da[rx]), 0x0000); m_icount -= 2; // 177 dvs11 set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -208531,7 +208528,7 @@ dvs10: dvs08: // 216 dvs08 m_t = m_isr & SR_C; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208548,7 +208545,7 @@ dvumz: dvs09: // 295 dvs09 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs0c; @@ -208556,7 +208553,7 @@ dvuma: // 0e6 dvuma m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none + // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none alu_over(0x0000); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -208602,7 +208599,7 @@ dvs0c: // 2d6 dvs0c m_t = !(m_au & 0x3f); set_16l(m_at, m_aluo); - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc(); m_icount -= 2; @@ -208629,13 +208626,13 @@ dvs0e: dvs0a: // 2d4 dvs0a m_au = m_au - 1; - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs0c; dvs0f: // 294 dvs0f - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1 alu_and(m_at, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208643,27 +208640,27 @@ dvs0f: dvs13: // 254 dvs13 set_16l(m_at, m_aluo); - // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1 + // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1 alu_sla1(m_aluo); m_icount -= 2; goto dvs14; dvs12: // 214 dvs12 m_au = m_au - 1; - // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1 + // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1 alu_sla0(m_aluo); m_icount -= 2; goto dvs14; dvs14: // 210 dvs14 - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1 alu_and(high16(m_at), 0xffff); sr_nzvc(); m_icount -= 2; // 211 dvs15 m_t = m_isr & SR_N; m_alub = m_alue; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1 alu_and(high16(m_da[rx]), 0xffff); sr_nzvc(); m_icount -= 2; @@ -208675,7 +208672,7 @@ dvs16: // 041 dvs16 m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208687,7 +208684,7 @@ dvs1d: // 0c1 dvs1d m_t = m_isr & SR_N; set_16h(m_at, m_at); - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); m_icount -= 2; @@ -208702,7 +208699,7 @@ dvs17: m_t = m_isr & SR_N; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208711,7 +208708,7 @@ dvs17: goto leaa2; dvs1a: // 0cd dvs1a - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208719,7 +208716,7 @@ dvs1a: m_t = (m_isr & (SR_Z|SR_N)) != 0; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208729,7 +208726,7 @@ dvs1a: dvs1f: // 08a dvs1f m_ir = m_irc; - // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0 + // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0 alu_sub(m_alub, 0x0000); sr_nzvc(); m_icount -= 2; @@ -208738,7 +208735,7 @@ dvs1f: m_t = (m_isr & (SR_Z|SR_N)) != 0; set_16l(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc(); if(m_t) @@ -208750,7 +208747,7 @@ dvs1e: m_t = m_isr & SR_N; m_alub = m_aluo; set_16l(m_at, m_aluo); - // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0 + // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0 alu_sub(high16(m_at), 0x0000); m_icount -= 2; if(m_t) @@ -208814,7 +208811,7 @@ dvs1c: m_ir = m_irc; set_16h(m_at, m_aluo); m_au = m_pc + 2; - // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1 + // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nzvc(); goto leaa2; @@ -208832,7 +208829,7 @@ void m68008_device::sub_b_ds_dd_ip8() // 9000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -208891,7 +208888,7 @@ void m68008_device::sub_b_ais_dd_ip8() // 9010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -208914,7 +208911,7 @@ void m68008_device::sub_b_ais_dd_ip8() // 9010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -208979,7 +208976,7 @@ void m68008_device::sub_b_aips_dd_ip8() // 9018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -209000,7 +208997,7 @@ void m68008_device::sub_b_aips_dd_ip8() // 9018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209067,7 +209064,7 @@ void m68008_device::sub_b_pais_dd_ip8() // 9020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -209088,7 +209085,7 @@ void m68008_device::sub_b_pais_dd_ip8() // 9020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209184,7 +209181,7 @@ void m68008_device::sub_b_das_dd_ip8() // 9028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209207,7 +209204,7 @@ void m68008_device::sub_b_das_dd_ip8() // 9028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209264,7 +209261,7 @@ void m68008_device::sub_b_dais_dd_ip8() // 9030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -209356,7 +209353,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209379,7 +209376,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209476,7 +209473,7 @@ void m68008_device::sub_b_adr16_dd_ip8() // 9038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -209497,7 +209494,7 @@ void m68008_device::sub_b_adr16_dd_ip8() // 9038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209630,7 +209627,7 @@ void m68008_device::sub_b_adr32_dd_ip8() // 9039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -209651,7 +209648,7 @@ void m68008_device::sub_b_adr32_dd_ip8() // 9039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209746,7 +209743,7 @@ void m68008_device::sub_b_dpc_dd_ip8() // 903a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209769,7 +209766,7 @@ void m68008_device::sub_b_dpc_dd_ip8() // 903a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -209825,7 +209822,7 @@ void m68008_device::sub_b_dpci_dd_ip8() // 903b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -209917,7 +209914,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -209940,7 +209937,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210039,7 +210036,7 @@ void m68008_device::sub_b_imm8_dd_ip8() // 903c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210100,7 +210097,7 @@ void m68008_device::sub_w_ds_dd_ip8() // 9040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210161,7 +210158,7 @@ void m68008_device::sub_w_as_dd_ip8() // 9048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210220,7 +210217,7 @@ void m68008_device::sub_w_ais_dd_ip8() // 9050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -210261,7 +210258,7 @@ void m68008_device::sub_w_ais_dd_ip8() // 9050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210326,7 +210323,7 @@ void m68008_device::sub_w_aips_dd_ip8() // 9058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -210365,7 +210362,7 @@ void m68008_device::sub_w_aips_dd_ip8() // 9058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210432,7 +210429,7 @@ void m68008_device::sub_w_pais_dd_ip8() // 9060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -210471,7 +210468,7 @@ void m68008_device::sub_w_pais_dd_ip8() // 9060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210567,7 +210564,7 @@ void m68008_device::sub_w_das_dd_ip8() // 9068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -210608,7 +210605,7 @@ void m68008_device::sub_w_das_dd_ip8() // 9068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210665,7 +210662,7 @@ void m68008_device::sub_w_dais_dd_ip8() // 9070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -210757,7 +210754,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -210798,7 +210795,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -210895,7 +210892,7 @@ void m68008_device::sub_w_adr16_dd_ip8() // 9078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -210934,7 +210931,7 @@ void m68008_device::sub_w_adr16_dd_ip8() // 9078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211067,7 +211064,7 @@ void m68008_device::sub_w_adr32_dd_ip8() // 9079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -211106,7 +211103,7 @@ void m68008_device::sub_w_adr32_dd_ip8() // 9079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211201,7 +211198,7 @@ void m68008_device::sub_w_dpc_dd_ip8() // 907a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -211242,7 +211239,7 @@ void m68008_device::sub_w_dpc_dd_ip8() // 907a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211298,7 +211295,7 @@ void m68008_device::sub_w_dpci_dd_ip8() // 907b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -211390,7 +211387,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -211431,7 +211428,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211530,7 +211527,7 @@ void m68008_device::sub_w_imm16_dd_ip8() // 907c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -211591,7 +211588,7 @@ void m68008_device::sub_l_ds_dd_ip8() // 9080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -211630,7 +211627,7 @@ void m68008_device::sub_l_ds_dd_ip8() // 9080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -211660,7 +211657,7 @@ void m68008_device::sub_l_as_dd_ip8() // 9088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -211699,7 +211696,7 @@ void m68008_device::sub_l_as_dd_ip8() // 9088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -211727,7 +211724,7 @@ void m68008_device::sub_l_ais_dd_ip8() // 9090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -211804,12 +211801,12 @@ void m68008_device::sub_l_ais_dd_ip8() // 9090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -211869,7 +211866,7 @@ void m68008_device::sub_l_aips_dd_ip8() // 9098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -211949,12 +211946,12 @@ void m68008_device::sub_l_aips_dd_ip8() // 9098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212013,7 +212010,7 @@ void m68008_device::sub_l_pais_dd_ip8() // 90a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -212095,12 +212092,12 @@ void m68008_device::sub_l_pais_dd_ip8() // 90a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212196,7 +212193,7 @@ void m68008_device::sub_l_das_dd_ip8() // 90a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -212273,12 +212270,12 @@ void m68008_device::sub_l_das_dd_ip8() // 90a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212336,7 +212333,7 @@ void m68008_device::sub_l_dais_dd_ip8() // 90b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -212427,7 +212424,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -212504,12 +212501,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212607,7 +212604,7 @@ void m68008_device::sub_l_adr16_dd_ip8() // 90b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -212684,12 +212681,12 @@ void m68008_device::sub_l_adr16_dd_ip8() // 90b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -212823,7 +212820,7 @@ void m68008_device::sub_l_adr32_dd_ip8() // 90b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -212900,12 +212897,12 @@ void m68008_device::sub_l_adr32_dd_ip8() // 90b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213000,7 +212997,7 @@ void m68008_device::sub_l_dpc_dd_ip8() // 90ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -213077,12 +213074,12 @@ void m68008_device::sub_l_dpc_dd_ip8() // 90ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213139,7 +213136,7 @@ void m68008_device::sub_l_dpci_dd_ip8() // 90bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -213230,7 +213227,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -213307,12 +213304,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -213448,7 +213445,7 @@ void m68008_device::sub_l_imm32_dd_ip8() // 90bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -213487,7 +213484,7 @@ void m68008_device::sub_l_imm32_dd_ip8() // 90bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -213517,7 +213514,7 @@ void m68008_device::suba_w_ds_ad_ip8() // 90c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213555,7 +213552,7 @@ void m68008_device::suba_w_ds_ad_ip8() // 90c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213584,7 +213581,7 @@ void m68008_device::suba_w_as_ad_ip8() // 90c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213622,7 +213619,7 @@ void m68008_device::suba_w_as_ad_ip8() // 90c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213649,7 +213646,7 @@ void m68008_device::suba_w_ais_ad_ip8() // 90d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -213690,7 +213687,7 @@ void m68008_device::suba_w_ais_ad_ip8() // 90d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213728,7 +213725,7 @@ void m68008_device::suba_w_ais_ad_ip8() // 90d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213761,7 +213758,7 @@ void m68008_device::suba_w_aips_ad_ip8() // 90d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -213800,7 +213797,7 @@ void m68008_device::suba_w_aips_ad_ip8() // 90d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213838,7 +213835,7 @@ void m68008_device::suba_w_aips_ad_ip8() // 90d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -213873,7 +213870,7 @@ void m68008_device::suba_w_pais_ad_ip8() // 90e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -213912,7 +213909,7 @@ void m68008_device::suba_w_pais_ad_ip8() // 90e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -213950,7 +213947,7 @@ void m68008_device::suba_w_pais_ad_ip8() // 90e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214014,7 +214011,7 @@ void m68008_device::suba_w_das_ad_ip8() // 90e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214055,7 +214052,7 @@ void m68008_device::suba_w_das_ad_ip8() // 90e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214093,7 +214090,7 @@ void m68008_device::suba_w_das_ad_ip8() // 90e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214118,7 +214115,7 @@ void m68008_device::suba_w_dais_ad_ip8() // 90f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -214210,7 +214207,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214251,7 +214248,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214289,7 +214286,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214354,7 +214351,7 @@ void m68008_device::suba_w_adr16_ad_ip8() // 90f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -214393,7 +214390,7 @@ void m68008_device::suba_w_adr16_ad_ip8() // 90f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214431,7 +214428,7 @@ void m68008_device::suba_w_adr16_ad_ip8() // 90f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214532,7 +214529,7 @@ void m68008_device::suba_w_adr32_ad_ip8() // 90f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -214571,7 +214568,7 @@ void m68008_device::suba_w_adr32_ad_ip8() // 90f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214609,7 +214606,7 @@ void m68008_device::suba_w_adr32_ad_ip8() // 90f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214672,7 +214669,7 @@ void m68008_device::suba_w_dpc_ad_ip8() // 90fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214713,7 +214710,7 @@ void m68008_device::suba_w_dpc_ad_ip8() // 90fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214751,7 +214748,7 @@ void m68008_device::suba_w_dpc_ad_ip8() // 90fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -214775,7 +214772,7 @@ void m68008_device::suba_w_dpci_ad_ip8() // 90fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -214867,7 +214864,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -214908,7 +214905,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -214946,7 +214943,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -215013,7 +215010,7 @@ void m68008_device::suba_w_imm16_ad_ip8() // 90fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -215051,7 +215048,7 @@ void m68008_device::suba_w_imm16_ad_ip8() // 90fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -215080,7 +215077,7 @@ void m68008_device::subx_b_ds_dd_ip8() // 9100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -215145,7 +215142,7 @@ void m68008_device::subx_b_pais_paid_ip8() // 9108 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -215186,7 +215183,7 @@ void m68008_device::subx_b_pais_paid_ip8() // 9108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin alu_subx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215259,7 +215256,7 @@ void m68008_device::sub_b_dd_ais_ip8() // 9110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215282,7 +215279,7 @@ void m68008_device::sub_b_dd_ais_ip8() // 9110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215361,7 +215358,7 @@ void m68008_device::sub_b_dd_aips_ip8() // 9118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -215382,7 +215379,7 @@ void m68008_device::sub_b_dd_aips_ip8() // 9118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215463,7 +215460,7 @@ void m68008_device::sub_b_dd_pais_ip8() // 9120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -215484,7 +215481,7 @@ void m68008_device::sub_b_dd_pais_ip8() // 9120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215594,7 +215591,7 @@ void m68008_device::sub_b_dd_das_ip8() // 9128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215617,7 +215614,7 @@ void m68008_device::sub_b_dd_das_ip8() // 9128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215688,7 +215685,7 @@ void m68008_device::sub_b_dd_dais_ip8() // 9130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -215780,7 +215777,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -215803,7 +215800,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -215914,7 +215911,7 @@ void m68008_device::sub_b_dd_adr16_ip8() // 9138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -215935,7 +215932,7 @@ void m68008_device::sub_b_dd_adr16_ip8() // 9138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216082,7 +216079,7 @@ void m68008_device::sub_b_dd_adr32_ip8() // 9139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -216103,7 +216100,7 @@ void m68008_device::sub_b_dd_adr32_ip8() // 9139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216178,7 +216175,7 @@ void m68008_device::subx_w_ds_dd_ip8() // 9140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -216243,7 +216240,7 @@ void m68008_device::subx_w_pais_paid_ip8() // 9148 f1f8 // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; @@ -216320,7 +216317,7 @@ void m68008_device::subx_w_pais_paid_ip8() // 9148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin alu_subx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216411,7 +216408,7 @@ void m68008_device::sub_w_dd_ais_ip8() // 9150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216452,7 +216449,7 @@ void m68008_device::sub_w_dd_ais_ip8() // 9150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216549,7 +216546,7 @@ void m68008_device::sub_w_dd_aips_ip8() // 9158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -216588,7 +216585,7 @@ void m68008_device::sub_w_dd_aips_ip8() // 9158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216687,7 +216684,7 @@ void m68008_device::sub_w_dd_pais_ip8() // 9160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -216726,7 +216723,7 @@ void m68008_device::sub_w_dd_pais_ip8() // 9160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216854,7 +216851,7 @@ void m68008_device::sub_w_dd_das_ip8() // 9168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -216895,7 +216892,7 @@ void m68008_device::sub_w_dd_das_ip8() // 9168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -216984,7 +216981,7 @@ void m68008_device::sub_w_dd_dais_ip8() // 9170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -217076,7 +217073,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -217117,7 +217114,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217246,7 +217243,7 @@ void m68008_device::sub_w_dd_adr16_ip8() // 9178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -217285,7 +217282,7 @@ void m68008_device::sub_w_dd_adr16_ip8() // 9178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217450,7 +217447,7 @@ void m68008_device::sub_w_dd_adr32_ip8() // 9179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -217489,7 +217486,7 @@ void m68008_device::sub_w_dd_adr32_ip8() // 9179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217582,7 +217579,7 @@ void m68008_device::subx_l_ds_dd_ip8() // 9180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx] alu_subx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 @@ -217621,7 +217618,7 @@ void m68008_device::subx_l_ds_dd_ip8() // 9180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -217691,7 +217688,7 @@ void m68008_device::subx_l_pais_paid_ip8() // 9188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; @@ -217768,7 +217765,7 @@ void m68008_device::subx_l_pais_paid_ip8() // 9188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin alu_subx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -217842,7 +217839,7 @@ void m68008_device::subx_l_pais_paid_ip8() // 9188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin + // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin alu_subc(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -217933,7 +217930,7 @@ void m68008_device::sub_l_dd_ais_ip8() // 9190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -218010,7 +218007,7 @@ void m68008_device::sub_l_dd_ais_ip8() // 9190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218050,7 +218047,7 @@ void m68008_device::sub_l_dd_ais_ip8() // 9190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218139,7 +218136,7 @@ void m68008_device::sub_l_dd_aips_ip8() // 9198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -218219,7 +218216,7 @@ void m68008_device::sub_l_dd_aips_ip8() // 9198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218259,7 +218256,7 @@ void m68008_device::sub_l_dd_aips_ip8() // 9198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218347,7 +218344,7 @@ void m68008_device::sub_l_dd_pais_ip8() // 91a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -218429,7 +218426,7 @@ void m68008_device::sub_l_dd_pais_ip8() // 91a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218469,7 +218466,7 @@ void m68008_device::sub_l_dd_pais_ip8() // 91a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218594,7 +218591,7 @@ void m68008_device::sub_l_dd_das_ip8() // 91a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -218671,7 +218668,7 @@ void m68008_device::sub_l_dd_das_ip8() // 91a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -218711,7 +218708,7 @@ void m68008_device::sub_l_dd_das_ip8() // 91a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -218798,7 +218795,7 @@ void m68008_device::sub_l_dd_dais_ip8() // 91b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -218889,7 +218886,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -218966,7 +218963,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -219006,7 +219003,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -219133,7 +219130,7 @@ void m68008_device::sub_l_dd_adr16_ip8() // 91b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -219210,7 +219207,7 @@ void m68008_device::sub_l_dd_adr16_ip8() // 91b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -219250,7 +219247,7 @@ void m68008_device::sub_l_dd_adr16_ip8() // 91b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -219413,7 +219410,7 @@ void m68008_device::sub_l_dd_adr32_ip8() // 91b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -219490,7 +219487,7 @@ void m68008_device::sub_l_dd_adr32_ip8() // 91b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin alu_sub(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -219530,7 +219527,7 @@ void m68008_device::sub_l_dd_adr32_ip8() // 91b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue + // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue alu_subc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -219621,7 +219618,7 @@ void m68008_device::suba_l_ds_ad_ip8() // 91c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -219659,7 +219656,7 @@ void m68008_device::suba_l_ds_ad_ip8() // 91c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219688,7 +219685,7 @@ void m68008_device::suba_l_as_ad_ip8() // 91c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -219726,7 +219723,7 @@ void m68008_device::suba_l_as_ad_ip8() // 91c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -219753,7 +219750,7 @@ void m68008_device::suba_l_ais_ad_ip8() // 91d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -219830,11 +219827,11 @@ void m68008_device::suba_l_ais_ad_ip8() // 91d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -219893,7 +219890,7 @@ void m68008_device::suba_l_aips_ad_ip8() // 91d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -219973,11 +219970,11 @@ void m68008_device::suba_l_aips_ad_ip8() // 91d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -220035,7 +220032,7 @@ void m68008_device::suba_l_pais_ad_ip8() // 91e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -220117,11 +220114,11 @@ void m68008_device::suba_l_pais_ad_ip8() // 91e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -220216,7 +220213,7 @@ void m68008_device::suba_l_das_ad_ip8() // 91e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -220293,11 +220290,11 @@ void m68008_device::suba_l_das_ad_ip8() // 91e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -220354,7 +220351,7 @@ void m68008_device::suba_l_dais_ad_ip8() // 91f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -220445,7 +220442,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -220522,11 +220519,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -220623,7 +220620,7 @@ void m68008_device::suba_l_adr16_ad_ip8() // 91f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -220700,11 +220697,11 @@ void m68008_device::suba_l_adr16_ad_ip8() // 91f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -220837,7 +220834,7 @@ void m68008_device::suba_l_adr32_ad_ip8() // 91f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -220914,11 +220911,11 @@ void m68008_device::suba_l_adr32_ad_ip8() // 91f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -221012,7 +221009,7 @@ void m68008_device::suba_l_dpc_ad_ip8() // 91fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -221089,11 +221086,11 @@ void m68008_device::suba_l_dpc_ad_ip8() // 91fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -221149,7 +221146,7 @@ void m68008_device::suba_l_dpci_ad_ip8() // 91fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -221240,7 +221237,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -221317,11 +221314,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -221456,7 +221453,7 @@ void m68008_device::suba_l_imm32_ad_ip8() // 91fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -221494,7 +221491,7 @@ void m68008_device::suba_l_imm32_ad_ip8() // 91fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -221523,7 +221520,7 @@ void m68008_device::cmp_b_ds_dd_ip8() // b000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub8(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221581,7 +221578,7 @@ void m68008_device::cmp_b_ais_dd_ip8() // b010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221604,7 +221601,7 @@ void m68008_device::cmp_b_ais_dd_ip8() // b010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221668,7 +221665,7 @@ void m68008_device::cmp_b_aips_dd_ip8() // b018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -221689,7 +221686,7 @@ void m68008_device::cmp_b_aips_dd_ip8() // b018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221755,7 +221752,7 @@ void m68008_device::cmp_b_pais_dd_ip8() // b020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -221776,7 +221773,7 @@ void m68008_device::cmp_b_pais_dd_ip8() // b020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221871,7 +221868,7 @@ void m68008_device::cmp_b_das_dd_ip8() // b028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -221894,7 +221891,7 @@ void m68008_device::cmp_b_das_dd_ip8() // b028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -221950,7 +221947,7 @@ void m68008_device::cmp_b_dais_dd_ip8() // b030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -222042,7 +222039,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222065,7 +222062,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222161,7 +222158,7 @@ void m68008_device::cmp_b_adr16_dd_ip8() // b038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -222182,7 +222179,7 @@ void m68008_device::cmp_b_adr16_dd_ip8() // b038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222314,7 +222311,7 @@ void m68008_device::cmp_b_adr32_dd_ip8() // b039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -222335,7 +222332,7 @@ void m68008_device::cmp_b_adr32_dd_ip8() // b039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222429,7 +222426,7 @@ void m68008_device::cmp_b_dpc_dd_ip8() // b03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222452,7 +222449,7 @@ void m68008_device::cmp_b_dpc_dd_ip8() // b03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222507,7 +222504,7 @@ void m68008_device::cmp_b_dpci_dd_ip8() // b03b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -222599,7 +222596,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222622,7 +222619,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub8(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222720,7 +222717,7 @@ void m68008_device::cmp_b_imm8_dd_ip8() // b03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub8(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222780,7 +222777,7 @@ void m68008_device::cmp_w_ds_dd_ip8() // b040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222840,7 +222837,7 @@ void m68008_device::cmp_w_as_dd_ip8() // b048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -222898,7 +222895,7 @@ void m68008_device::cmp_w_ais_dd_ip8() // b050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -222939,7 +222936,7 @@ void m68008_device::cmp_w_ais_dd_ip8() // b050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223003,7 +223000,7 @@ void m68008_device::cmp_w_aips_dd_ip8() // b058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -223042,7 +223039,7 @@ void m68008_device::cmp_w_aips_dd_ip8() // b058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223108,7 +223105,7 @@ void m68008_device::cmp_w_pais_dd_ip8() // b060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -223147,7 +223144,7 @@ void m68008_device::cmp_w_pais_dd_ip8() // b060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223242,7 +223239,7 @@ void m68008_device::cmp_w_das_dd_ip8() // b068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -223283,7 +223280,7 @@ void m68008_device::cmp_w_das_dd_ip8() // b068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223339,7 +223336,7 @@ void m68008_device::cmp_w_dais_dd_ip8() // b070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -223431,7 +223428,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -223472,7 +223469,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223568,7 +223565,7 @@ void m68008_device::cmp_w_adr16_dd_ip8() // b078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -223607,7 +223604,7 @@ void m68008_device::cmp_w_adr16_dd_ip8() // b078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223739,7 +223736,7 @@ void m68008_device::cmp_w_adr32_dd_ip8() // b079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -223778,7 +223775,7 @@ void m68008_device::cmp_w_adr32_dd_ip8() // b079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223872,7 +223869,7 @@ void m68008_device::cmp_w_dpc_dd_ip8() // b07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -223913,7 +223910,7 @@ void m68008_device::cmp_w_dpc_dd_ip8() // b07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -223968,7 +223965,7 @@ void m68008_device::cmp_w_dpci_dd_ip8() // b07b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -224060,7 +224057,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -224101,7 +224098,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -224199,7 +224196,7 @@ void m68008_device::cmp_w_imm16_dd_ip8() // b07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 23a rcaw2 @@ -224259,11 +224256,11 @@ void m68008_device::cmp_l_ds_dd_ip8() // b080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224324,11 +224321,11 @@ void m68008_device::cmp_l_as_dd_ip8() // b088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224387,7 +224384,7 @@ void m68008_device::cmp_l_ais_dd_ip8() // b090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -224464,11 +224461,11 @@ void m68008_device::cmp_l_ais_dd_ip8() // b090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224527,7 +224524,7 @@ void m68008_device::cmp_l_aips_dd_ip8() // b098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -224607,11 +224604,11 @@ void m68008_device::cmp_l_aips_dd_ip8() // b098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224669,7 +224666,7 @@ void m68008_device::cmp_l_pais_dd_ip8() // b0a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -224751,11 +224748,11 @@ void m68008_device::cmp_l_pais_dd_ip8() // b0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224850,7 +224847,7 @@ void m68008_device::cmp_l_das_dd_ip8() // b0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -224927,11 +224924,11 @@ void m68008_device::cmp_l_das_dd_ip8() // b0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -224988,7 +224985,7 @@ void m68008_device::cmp_l_dais_dd_ip8() // b0b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -225079,7 +225076,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -225156,11 +225153,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225257,7 +225254,7 @@ void m68008_device::cmp_l_adr16_dd_ip8() // b0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -225334,11 +225331,11 @@ void m68008_device::cmp_l_adr16_dd_ip8() // b0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225471,7 +225468,7 @@ void m68008_device::cmp_l_adr32_dd_ip8() // b0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -225548,11 +225545,11 @@ void m68008_device::cmp_l_adr32_dd_ip8() // b0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225646,7 +225643,7 @@ void m68008_device::cmp_l_dpc_dd_ip8() // b0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -225723,11 +225720,11 @@ void m68008_device::cmp_l_dpc_dd_ip8() // b0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -225783,7 +225780,7 @@ void m68008_device::cmp_l_dpci_dd_ip8() // b0bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -225874,7 +225871,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -225951,11 +225948,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226090,11 +226087,11 @@ void m68008_device::cmp_l_imm32_dd_ip8() // b0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx] + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226155,11 +226152,11 @@ void m68008_device::cmpa_w_ds_ad_ip8() // b0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226220,11 +226217,11 @@ void m68008_device::cmpa_w_as_ad_ip8() // b0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226283,7 +226280,7 @@ void m68008_device::cmpa_w_ais_ad_ip8() // b0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -226324,11 +226321,11 @@ void m68008_device::cmpa_w_ais_ad_ip8() // b0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226393,7 +226390,7 @@ void m68008_device::cmpa_w_aips_ad_ip8() // b0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -226432,11 +226429,11 @@ void m68008_device::cmpa_w_aips_ad_ip8() // b0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226503,7 +226500,7 @@ void m68008_device::cmpa_w_pais_ad_ip8() // b0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -226542,11 +226539,11 @@ void m68008_device::cmpa_w_pais_ad_ip8() // b0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226642,7 +226639,7 @@ void m68008_device::cmpa_w_das_ad_ip8() // b0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -226683,11 +226680,11 @@ void m68008_device::cmpa_w_das_ad_ip8() // b0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226744,7 +226741,7 @@ void m68008_device::cmpa_w_dais_ad_ip8() // b0f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -226836,7 +226833,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -226877,11 +226874,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -226978,7 +226975,7 @@ void m68008_device::cmpa_w_adr16_ad_ip8() // b0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -227017,11 +227014,11 @@ void m68008_device::cmpa_w_adr16_ad_ip8() // b0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227154,7 +227151,7 @@ void m68008_device::cmpa_w_adr32_ad_ip8() // b0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -227193,11 +227190,11 @@ void m68008_device::cmpa_w_adr32_ad_ip8() // b0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227292,7 +227289,7 @@ void m68008_device::cmpa_w_dpc_ad_ip8() // b0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -227333,11 +227330,11 @@ void m68008_device::cmpa_w_dpc_ad_ip8() // b0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227393,7 +227390,7 @@ void m68008_device::cmpa_w_dpci_ad_ip8() // b0fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -227485,7 +227482,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -227526,11 +227523,11 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227629,11 +227626,11 @@ void m68008_device::cmpa_w_imm16_ad_ip8() // b0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 174 cprm2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx] alu_subc(high16(m_at), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227693,7 +227690,7 @@ void m68008_device::eor_b_dd_ds_ip8() // b100 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor8(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -227701,7 +227698,7 @@ void m68008_device::eor_b_dd_ds_ip8() // b100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -227776,7 +227773,7 @@ void m68008_device::cmpm_b_aips_aipd_ip8() // b108 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + (rx < 15 ? 1 : 2); - // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: @@ -227798,7 +227795,7 @@ void m68008_device::cmpm_b_aips_aipd_ip8() // b108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin alu_sub8(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227852,11 +227849,11 @@ void m68008_device::eor_b_dd_ais_ip8() // b110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -227876,7 +227873,7 @@ void m68008_device::eor_b_dd_ais_ip8() // b110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -227918,7 +227915,7 @@ void m68008_device::eor_b_dd_ais_ip8() // b110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -227953,12 +227950,12 @@ void m68008_device::eor_b_dd_aips_ip8() // b118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -227979,7 +227976,7 @@ void m68008_device::eor_b_dd_aips_ip8() // b118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228021,7 +228018,7 @@ void m68008_device::eor_b_dd_aips_ip8() // b118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -228055,7 +228052,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -228063,7 +228060,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -228084,7 +228081,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228126,7 +228123,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -228158,7 +228155,7 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -228196,11 +228193,11 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -228220,7 +228217,7 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228262,7 +228259,7 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -228292,14 +228289,14 @@ void m68008_device::eor_b_dd_dais_ip8() // b130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -228307,7 +228304,7 @@ void m68008_device::eor_b_dd_dais_ip8() // b130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -228346,7 +228343,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -228387,11 +228384,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -228411,7 +228408,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228453,7 +228450,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -228487,7 +228484,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -228525,7 +228522,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -228546,7 +228543,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228588,7 +228585,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -228620,7 +228617,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -228659,7 +228656,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -228697,7 +228694,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -228718,7 +228715,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228760,7 +228757,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=b...... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -228793,7 +228790,7 @@ void m68008_device::eor_w_dd_ds_ip8() // b140 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 08b roaw2 @@ -228801,7 +228798,7 @@ void m68008_device::eor_w_dd_ds_ip8() // b140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -228894,7 +228891,7 @@ void m68008_device::cmpm_w_aips_aipd_ip8() // b148 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -228934,7 +228931,7 @@ void m68008_device::cmpm_w_aips_aipd_ip8() // b148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -228988,11 +228985,11 @@ void m68008_device::eor_w_dd_ais_ip8() // b150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -229030,7 +229027,7 @@ void m68008_device::eor_w_dd_ais_ip8() // b150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229072,7 +229069,7 @@ void m68008_device::eor_w_dd_ais_ip8() // b150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -229125,12 +229122,12 @@ void m68008_device::eor_w_dd_aips_ip8() // b158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -229169,7 +229166,7 @@ void m68008_device::eor_w_dd_aips_ip8() // b158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229211,7 +229208,7 @@ void m68008_device::eor_w_dd_aips_ip8() // b158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -229263,7 +229260,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -229271,7 +229268,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -229310,7 +229307,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229352,7 +229349,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -229402,7 +229399,7 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -229440,11 +229437,11 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -229482,7 +229479,7 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229524,7 +229521,7 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -229572,14 +229569,14 @@ void m68008_device::eor_w_dd_dais_ip8() // b170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -229587,7 +229584,7 @@ void m68008_device::eor_w_dd_dais_ip8() // b170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -229626,7 +229623,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -229667,11 +229664,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -229709,7 +229706,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229751,7 +229748,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -229803,7 +229800,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -229841,7 +229838,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -229880,7 +229877,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -229922,7 +229919,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -229972,7 +229969,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -230011,7 +230008,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -230049,7 +230046,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -230088,7 +230085,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230130,7 +230127,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=....... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -230181,12 +230178,12 @@ void m68008_device::eor_l_dd_ds_ip8() // b180 f1f8 m_aob = m_au; m_ir = m_irc; m_pc = m_au; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry] + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry] alu_eor(m_da[rx], m_da[ry]); sr_nzvc(); // 259 roal2 set_16l(m_da[ry], m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -230221,7 +230218,7 @@ void m68008_device::eor_l_dd_ds_ip8() // b180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25a roal3 - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry] + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry] alu_eor(high16(m_da[rx]), high16(m_da[ry])); sr_nzvc_u(); m_icount -= 2; @@ -230230,7 +230227,7 @@ void m68008_device::eor_l_dd_ds_ip8() // b180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -230327,7 +230324,7 @@ void m68008_device::cmpm_l_aips_aipd_ip8() // b188 f1f8 m_aob = m_da[rx]; m_ir = m_irc; m_au = m_da[rx] + 2; - // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -230401,13 +230398,13 @@ void m68008_device::cmpm_l_aips_aipd_ip8() // b188 f1f8 m_aob = m_pc; m_da[rx] = m_au; m_au = m_pc + 2; - // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin alu_sub(m_aluo, m_dbin); sr_nzvc(); // 157 cmml7 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; - // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue + // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue alu_subc(m_alub, m_alue); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230461,7 +230458,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -230501,7 +230498,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -230539,7 +230536,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230579,7 +230576,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -230619,7 +230616,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -230669,7 +230666,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -230709,11 +230706,11 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -230751,7 +230748,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -230791,7 +230788,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -230831,7 +230828,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -230880,14 +230877,14 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -230926,7 +230923,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -230964,7 +230961,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231004,7 +231001,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231044,7 +231041,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -231094,7 +231091,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -231131,7 +231128,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -231171,7 +231168,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231209,7 +231206,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231249,7 +231246,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231289,7 +231286,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -231337,14 +231334,14 @@ void m68008_device::eor_l_dd_dais_ip8() // b1b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -231352,7 +231349,7 @@ void m68008_device::eor_l_dd_dais_ip8() // b1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -231391,7 +231388,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -231431,7 +231428,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -231471,7 +231468,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231509,7 +231506,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231549,7 +231546,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231589,7 +231586,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -231641,7 +231638,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -231679,7 +231676,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -231719,7 +231716,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -231757,7 +231754,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -231797,7 +231794,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -231837,7 +231834,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -231887,7 +231884,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -231926,7 +231923,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -231964,7 +231961,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -232004,7 +232001,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -232042,7 +232039,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin alu_eor(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232082,7 +232079,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue + // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue alu_eor(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -232122,7 +232119,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none + // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -232174,11 +232171,11 @@ void m68008_device::cmpa_l_ds_ad_ip8() // b1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232239,11 +232236,11 @@ void m68008_device::cmpa_l_as_ad_ip8() // b1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx] alu_sub(m_da[ry], m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx] alu_subc(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232302,7 +232299,7 @@ void m68008_device::cmpa_l_ais_ad_ip8() // b1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -232379,11 +232376,11 @@ void m68008_device::cmpa_l_ais_ad_ip8() // b1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232442,7 +232439,7 @@ void m68008_device::cmpa_l_aips_ad_ip8() // b1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -232522,11 +232519,11 @@ void m68008_device::cmpa_l_aips_ad_ip8() // b1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232584,7 +232581,7 @@ void m68008_device::cmpa_l_pais_ad_ip8() // b1e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -232666,11 +232663,11 @@ void m68008_device::cmpa_l_pais_ad_ip8() // b1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232765,7 +232762,7 @@ void m68008_device::cmpa_l_das_ad_ip8() // b1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -232842,11 +232839,11 @@ void m68008_device::cmpa_l_das_ad_ip8() // b1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -232903,7 +232900,7 @@ void m68008_device::cmpa_l_dais_ad_ip8() // b1f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -232994,7 +232991,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -233071,11 +233068,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233172,7 +233169,7 @@ void m68008_device::cmpa_l_adr16_ad_ip8() // b1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -233249,11 +233246,11 @@ void m68008_device::cmpa_l_adr16_ad_ip8() // b1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233386,7 +233383,7 @@ void m68008_device::cmpa_l_adr32_ad_ip8() // b1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -233463,11 +233460,11 @@ void m68008_device::cmpa_l_adr32_ad_ip8() // b1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233561,7 +233558,7 @@ void m68008_device::cmpa_l_dpc_ad_ip8() // b1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -233638,11 +233635,11 @@ void m68008_device::cmpa_l_dpc_ad_ip8() // b1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -233698,7 +233695,7 @@ void m68008_device::cmpa_l_dpci_ad_ip8() // b1fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -233789,7 +233786,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -233866,11 +233863,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx] alu_sub(m_dbin, m_da[rx]); sr_nzvc(); // 172 cpml2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx] alu_subc(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234005,11 +234002,11 @@ void m68008_device::cmpa_l_imm32_ad_ip8() // b1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx] alu_sub(m_dt, m_da[rx]); sr_nzvc(); // 173 cprl2 - // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx] + // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx] alu_subc(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -234070,7 +234067,7 @@ void m68008_device::and_b_ds_dd_ip8() // c000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and8(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234078,7 +234075,7 @@ void m68008_device::and_b_ds_dd_ip8() // c000 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234130,11 +234127,11 @@ void m68008_device::and_b_ais_dd_ip8() // c010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -234154,7 +234151,7 @@ void m68008_device::and_b_ais_dd_ip8() // c010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234162,7 +234159,7 @@ void m68008_device::and_b_ais_dd_ip8() // c010 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234217,12 +234214,12 @@ void m68008_device::and_b_aips_dd_ip8() // c018 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -234243,7 +234240,7 @@ void m68008_device::and_b_aips_dd_ip8() // c018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234251,7 +234248,7 @@ void m68008_device::and_b_aips_dd_ip8() // c018 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234305,7 +234302,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -234313,7 +234310,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -234334,7 +234331,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234342,7 +234339,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234394,7 +234391,7 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234432,11 +234429,11 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -234456,7 +234453,7 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234464,7 +234461,7 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234514,14 +234511,14 @@ void m68008_device::and_b_dais_dd_ip8() // c030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -234529,7 +234526,7 @@ void m68008_device::and_b_dais_dd_ip8() // c030 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234568,7 +234565,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234609,11 +234606,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -234633,7 +234630,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234641,7 +234638,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234695,7 +234692,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -234733,7 +234730,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -234754,7 +234751,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234762,7 +234759,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234814,7 +234811,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234853,7 +234850,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -234891,7 +234888,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -234912,7 +234909,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -234920,7 +234917,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -234971,7 +234968,7 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235009,11 +235006,11 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob); @@ -235033,7 +235030,7 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235041,7 +235038,7 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235090,14 +235087,14 @@ void m68008_device::and_b_dpci_dd_ip8() // c03b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -235105,7 +235102,7 @@ void m68008_device::and_b_dpci_dd_ip8() // c03b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235144,7 +235141,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 11: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235185,11 +235182,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob); @@ -235209,7 +235206,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and8(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235217,7 +235214,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 7: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235271,7 +235268,7 @@ void m68008_device::and_b_imm8_dd_ip8() // c03c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235310,7 +235307,7 @@ void m68008_device::and_b_imm8_dd_ip8() // c03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx] alu_and8(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235318,7 +235315,7 @@ void m68008_device::and_b_imm8_dd_ip8() // c03c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235372,7 +235369,7 @@ void m68008_device::and_w_ds_dd_ip8() // c040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235380,7 +235377,7 @@ void m68008_device::and_w_ds_dd_ip8() // c040 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235432,11 +235429,11 @@ void m68008_device::and_w_ais_dd_ip8() // c050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -235474,7 +235471,7 @@ void m68008_device::and_w_ais_dd_ip8() // c050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235482,7 +235479,7 @@ void m68008_device::and_w_ais_dd_ip8() // c050 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235537,12 +235534,12 @@ void m68008_device::and_w_aips_dd_ip8() // c058 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -235581,7 +235578,7 @@ void m68008_device::and_w_aips_dd_ip8() // c058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235589,7 +235586,7 @@ void m68008_device::and_w_aips_dd_ip8() // c058 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235643,7 +235640,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -235651,7 +235648,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -235690,7 +235687,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235698,7 +235695,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235750,7 +235747,7 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235788,11 +235785,11 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -235830,7 +235827,7 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -235838,7 +235835,7 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235888,14 +235885,14 @@ void m68008_device::and_w_dais_dd_ip8() // c070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -235903,7 +235900,7 @@ void m68008_device::and_w_dais_dd_ip8() // c070 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235942,7 +235939,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -235983,11 +235980,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -236025,7 +236022,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236033,7 +236030,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236087,7 +236084,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -236125,7 +236122,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -236164,7 +236161,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236172,7 +236169,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236224,7 +236221,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236263,7 +236260,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -236301,7 +236298,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -236340,7 +236337,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236348,7 +236345,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236399,7 +236396,7 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236437,11 +236434,11 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236479,7 +236476,7 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236487,7 +236484,7 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236536,14 +236533,14 @@ void m68008_device::and_w_dpci_dd_ip8() // c07b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -236551,7 +236548,7 @@ void m68008_device::and_w_dpci_dd_ip8() // c07b f1ff aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236590,7 +236587,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236631,11 +236628,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236673,7 +236670,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236681,7 +236678,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236735,7 +236732,7 @@ void m68008_device::and_w_imm16_dd_ip8() // c07c f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236774,7 +236771,7 @@ void m68008_device::and_w_imm16_dd_ip8() // c07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 27a rrgw2 @@ -236782,7 +236779,7 @@ void m68008_device::and_w_imm16_dd_ip8() // c07c f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236836,12 +236833,12 @@ void m68008_device::and_l_ds_dd_ip8() // c080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx] alu_and(m_da[ry], m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -236876,7 +236873,7 @@ void m68008_device::and_l_ds_dd_ip8() // c080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx] alu_and(high16(m_da[ry]), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -236885,7 +236882,7 @@ void m68008_device::and_l_ds_dd_ip8() // c080 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -236905,7 +236902,7 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -236945,7 +236942,7 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -236983,12 +236980,12 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237029,7 +237026,7 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237049,7 +237046,7 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -237089,11 +237086,11 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237131,12 +237128,12 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237177,7 +237174,7 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237196,14 +237193,14 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237242,7 +237239,7 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237280,12 +237277,12 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237326,7 +237323,7 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237346,7 +237343,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -237383,7 +237380,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -237423,7 +237420,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237461,12 +237458,12 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237507,7 +237504,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237525,14 +237522,14 @@ void m68008_device::and_l_dais_dd_ip8() // c0b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -237540,7 +237537,7 @@ void m68008_device::and_l_dais_dd_ip8() // c0b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -237579,7 +237576,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -237619,7 +237616,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -237659,7 +237656,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237697,12 +237694,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237743,7 +237740,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237765,7 +237762,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -237803,7 +237800,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -237843,7 +237840,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -237881,12 +237878,12 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -237927,7 +237924,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -237947,7 +237944,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -237986,7 +237983,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -238024,7 +238021,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -238064,7 +238061,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -238102,12 +238099,12 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -238148,7 +238145,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238167,7 +238164,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_pc; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238204,7 +238201,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -238244,7 +238241,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238282,12 +238279,12 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -238328,7 +238325,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238345,14 +238342,14 @@ void m68008_device::and_l_dpci_dd_ip8() // c0bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_pc + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -238360,7 +238357,7 @@ void m68008_device::and_l_dpci_dd_ip8() // c0bb f1ff aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238399,7 +238396,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238439,7 +238436,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -238479,7 +238476,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238517,12 +238514,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx] alu_and(m_dbin, m_da[rx]); sr_nzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx] alu_and(m_alub, high16(m_da[rx])); sr_nzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -238563,7 +238560,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238583,7 +238580,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff m_aob = m_au; set_16h(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238622,7 +238619,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff set_16h(m_at, m_dbin); set_16l(m_dt, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238661,12 +238658,12 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx] alu_and(m_dt, m_da[rx]); sr_nzvc(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -238701,7 +238698,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx] + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx] alu_and(high16(m_dt), high16(m_da[rx])); sr_nzvc_u(); m_icount -= 2; @@ -238710,7 +238707,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -238734,7 +238731,7 @@ void m68008_device::mulu_w_ds_dd_ip8() // c0c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -238782,7 +238779,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238794,7 +238791,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238806,7 +238803,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -238828,7 +238825,7 @@ void m68008_device::mulu_w_ais_dd_ip8() // c0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -238871,7 +238868,7 @@ void m68008_device::mulu_w_ais_dd_ip8() // c0d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -238919,7 +238916,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238931,7 +238928,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -238943,7 +238940,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -238971,7 +238968,7 @@ void m68008_device::mulu_w_aips_dd_ip8() // c0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -239012,7 +239009,7 @@ void m68008_device::mulu_w_aips_dd_ip8() // c0d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239060,7 +239057,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239072,7 +239069,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239084,7 +239081,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239114,7 +239111,7 @@ void m68008_device::mulu_w_pais_dd_ip8() // c0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -239155,7 +239152,7 @@ void m68008_device::mulu_w_pais_dd_ip8() // c0e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239203,7 +239200,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239215,7 +239212,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239227,7 +239224,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239286,7 +239283,7 @@ void m68008_device::mulu_w_das_dd_ip8() // c0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -239329,7 +239326,7 @@ void m68008_device::mulu_w_das_dd_ip8() // c0e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239377,7 +239374,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239389,7 +239386,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239401,7 +239398,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239421,7 +239418,7 @@ void m68008_device::mulu_w_dais_dd_ip8() // c0f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -239513,7 +239510,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -239556,7 +239553,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239604,7 +239601,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239616,7 +239613,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239628,7 +239625,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239688,7 +239685,7 @@ void m68008_device::mulu_w_adr16_dd_ip8() // c0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -239729,7 +239726,7 @@ void m68008_device::mulu_w_adr16_dd_ip8() // c0f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239777,7 +239774,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239789,7 +239786,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239801,7 +239798,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -239897,7 +239894,7 @@ void m68008_device::mulu_w_adr32_dd_ip8() // c0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -239938,7 +239935,7 @@ void m68008_device::mulu_w_adr32_dd_ip8() // c0f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -239986,7 +239983,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -239998,7 +239995,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240010,7 +240007,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240068,7 +240065,7 @@ void m68008_device::mulu_w_dpc_dd_ip8() // c0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -240111,7 +240108,7 @@ void m68008_device::mulu_w_dpc_dd_ip8() // c0fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -240159,7 +240156,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240171,7 +240168,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240183,7 +240180,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240202,7 +240199,7 @@ void m68008_device::mulu_w_dpci_dd_ip8() // c0fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -240294,7 +240291,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -240337,7 +240334,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -240385,7 +240382,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240397,7 +240394,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240409,7 +240406,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240473,7 +240470,7 @@ void m68008_device::mulu_w_imm16_dd_ip8() // c0fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -240521,7 +240518,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32mu(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240533,7 +240530,7 @@ mulm4: goto mulm4; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -240545,7 +240542,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -240569,12 +240566,12 @@ void m68008_device::abcd_ds_dd_ip8() // c100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx] alu_abcd8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 11b rbrb2 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -240638,7 +240635,7 @@ void m68008_device::abcd_pais_paid_ip8() // c108 f1f8 // 135 asbb2 m_aob = m_au; m_da[ry] = m_au; - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 136 asbb3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); @@ -240678,12 +240675,12 @@ void m68008_device::abcd_pais_paid_ip8() // c108 f1f8 m_dbin = m_edb; // 040 asbb5 m_aob = m_pc; - // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin + // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin alu_abcd8(m_alub, m_dbin); sr_xnzvc_u(); // 113 asbb6 m_au = m_at; - // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=? + // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=? m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -240754,11 +240751,11 @@ void m68008_device::and_b_dd_ais_ip8() // c110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -240778,7 +240775,7 @@ void m68008_device::and_b_dd_ais_ip8() // c110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -240820,7 +240817,7 @@ void m68008_device::and_b_dd_ais_ip8() // c110 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -240855,12 +240852,12 @@ void m68008_device::and_b_dd_aips_ip8() // c118 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -240881,7 +240878,7 @@ void m68008_device::and_b_dd_aips_ip8() // c118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -240923,7 +240920,7 @@ void m68008_device::and_b_dd_aips_ip8() // c118 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -240957,7 +240954,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -240965,7 +240962,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -240986,7 +240983,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241028,7 +241025,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 7: m_mmu8->write_data(m_aob, m_dbout); @@ -241060,7 +241057,7 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -241098,11 +241095,11 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -241122,7 +241119,7 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241164,7 +241161,7 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -241194,14 +241191,14 @@ void m68008_device::and_b_dd_dais_ip8() // c130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -241209,7 +241206,7 @@ void m68008_device::and_b_dd_dais_ip8() // c130 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -241248,7 +241245,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -241289,11 +241286,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob); @@ -241313,7 +241310,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241355,7 +241352,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -241389,7 +241386,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -241427,7 +241424,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -241448,7 +241445,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241490,7 +241487,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 11: m_mmu8->write_data(m_aob, m_dbout); @@ -241522,7 +241519,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -241561,7 +241558,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -241599,7 +241596,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -241620,7 +241617,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and8(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241662,7 +241659,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=b...... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 15: m_mmu8->write_data(m_aob, m_dbout); @@ -241820,11 +241817,11 @@ void m68008_device::and_w_dd_ais_ip8() // c150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -241862,7 +241859,7 @@ void m68008_device::and_w_dd_ais_ip8() // c150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -241904,7 +241901,7 @@ void m68008_device::and_w_dd_ais_ip8() // c150 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -241957,12 +241954,12 @@ void m68008_device::and_w_dd_aips_ip8() // c158 f1f8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -242001,7 +241998,7 @@ void m68008_device::and_w_dd_aips_ip8() // c158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242043,7 +242040,7 @@ void m68008_device::and_w_dd_aips_ip8() // c158 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -242095,7 +242092,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -242103,7 +242100,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -242142,7 +242139,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242184,7 +242181,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -242234,7 +242231,7 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -242272,11 +242269,11 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -242314,7 +242311,7 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242356,7 +242353,7 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -242404,14 +242401,14 @@ void m68008_device::and_w_dd_dais_ip8() // c170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -242419,7 +242416,7 @@ void m68008_device::and_w_dd_dais_ip8() // c170 f1f8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -242458,7 +242455,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -242499,11 +242496,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -242541,7 +242538,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242583,7 +242580,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -242635,7 +242632,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -242673,7 +242670,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -242712,7 +242709,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242754,7 +242751,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -242804,7 +242801,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -242843,7 +242840,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -242881,7 +242878,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -242920,7 +242917,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -242962,7 +242959,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -243075,7 +243072,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -243115,7 +243112,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -243153,7 +243150,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243193,7 +243190,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243233,7 +243230,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -243283,7 +243280,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -243323,11 +243320,11 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin // 21b pinl3 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -243365,7 +243362,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243405,7 +243402,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243445,7 +243442,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -243494,14 +243491,14 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 m_aob = m_au; m_da[ry] = m_au; m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -243540,7 +243537,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -243578,7 +243575,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243618,7 +243615,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243658,7 +243655,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -243708,7 +243705,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8 // 1c6 adsl1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -243745,7 +243742,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -243785,7 +243782,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -243823,7 +243820,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -243863,7 +243860,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -243903,7 +243900,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -243951,14 +243948,14 @@ void m68008_device::and_l_dd_dais_ip8() // c1b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none if(m_t) goto aixw4; else @@ -243966,7 +243963,7 @@ void m68008_device::and_l_dd_dais_ip8() // c1b0 f1f8 aixw2: // 124 aixw2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -244005,7 +244002,7 @@ aixw2: aixw4: // 1e4 aixw4 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 25: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -244045,7 +244042,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -244085,7 +244082,7 @@ adsl2: m_alue = m_dbin; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -244123,7 +244120,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -244163,7 +244160,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -244203,7 +244200,7 @@ adsl2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -244255,7 +244252,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -244293,7 +244290,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -244333,7 +244330,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -244371,7 +244368,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -244411,7 +244408,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -244451,7 +244448,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 21: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -244501,7 +244498,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -244540,7 +244537,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -244578,7 +244575,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -244618,7 +244615,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff m_alue = m_dbin; m_at = m_au; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 13: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -244656,7 +244653,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -244696,7 +244693,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue + // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue alu_and(high16(m_da[rx]), m_alue); sr_nzvc_u(); m_base_ssw = SSW_DATA; @@ -244736,7 +244733,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -244790,7 +244787,7 @@ void m68008_device::muls_w_ds_dd_ip8() // c1c0 f1f8 m_alue = m_da[ry]; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -244838,7 +244835,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244852,7 +244849,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244864,7 +244861,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -244876,7 +244873,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244893,7 +244890,7 @@ void m68008_device::muls_w_ais_dd_ip8() // c1d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -244936,7 +244933,7 @@ void m68008_device::muls_w_ais_dd_ip8() // c1d0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -244984,7 +244981,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -244998,7 +244995,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245010,7 +245007,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245022,7 +245019,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245045,7 +245042,7 @@ void m68008_device::muls_w_aips_dd_ip8() // c1d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -245086,7 +245083,7 @@ void m68008_device::muls_w_aips_dd_ip8() // c1d8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245134,7 +245131,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245148,7 +245145,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245160,7 +245157,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245172,7 +245169,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245197,7 +245194,7 @@ void m68008_device::muls_w_pais_dd_ip8() // c1e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -245238,7 +245235,7 @@ void m68008_device::muls_w_pais_dd_ip8() // c1e0 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245286,7 +245283,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245300,7 +245297,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245312,7 +245309,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245324,7 +245321,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245378,7 +245375,7 @@ void m68008_device::muls_w_das_dd_ip8() // c1e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -245421,7 +245418,7 @@ void m68008_device::muls_w_das_dd_ip8() // c1e8 f1f8 m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245469,7 +245466,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245483,7 +245480,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245495,7 +245492,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245507,7 +245504,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245522,7 +245519,7 @@ void m68008_device::muls_w_dais_dd_ip8() // c1f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -245614,7 +245611,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -245657,7 +245654,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245705,7 +245702,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245719,7 +245716,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245731,7 +245728,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245743,7 +245740,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245798,7 +245795,7 @@ void m68008_device::muls_w_adr16_dd_ip8() // c1f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -245839,7 +245836,7 @@ void m68008_device::muls_w_adr16_dd_ip8() // c1f8 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -245887,7 +245884,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245901,7 +245898,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -245913,7 +245910,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -245925,7 +245922,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246016,7 +246013,7 @@ void m68008_device::muls_w_adr32_dd_ip8() // c1f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -246057,7 +246054,7 @@ void m68008_device::muls_w_adr32_dd_ip8() // c1f9 f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246105,7 +246102,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246119,7 +246116,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246131,7 +246128,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246143,7 +246140,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246196,7 +246193,7 @@ void m68008_device::muls_w_dpc_dd_ip8() // c1fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -246239,7 +246236,7 @@ void m68008_device::muls_w_dpc_dd_ip8() // c1fa f1ff m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246287,7 +246284,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246301,7 +246298,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246313,7 +246310,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246325,7 +246322,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246339,7 +246336,7 @@ void m68008_device::muls_w_dpci_dd_ip8() // c1fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -246431,7 +246428,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -246474,7 +246471,7 @@ adsw2: m_alue = m_dbin; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246522,7 +246519,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246536,7 +246533,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246548,7 +246545,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246560,7 +246557,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246619,7 +246616,7 @@ void m68008_device::muls_w_imm16_dd_ip8() // c1fc f1ff m_alue = m_dt; m_at = m_au; m_au = ext32(m_ftu); - // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0 + // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0 alu_and(m_da[rx], 0x0000); sr_nzvc(); // 3c4 mulm2 @@ -246667,7 +246664,7 @@ mulm4: m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3; set_16l(m_pc, m_at); m_au = m_au - 1; - // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1 alu_roxr32ms(m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246681,7 +246678,7 @@ mulm4: goto mulm4; mulm5: // 0a0 mulm5 - // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo + // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo alu_sub(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246693,7 +246690,7 @@ mulm6: set_16h(m_pc, high16(m_at)); m_da[rx] = merge_16_32(m_aluo, m_alue); m_au = m_at + 2; - // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1 + // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1 alu_and(m_aluo, 0xffff); sr_nzvc_u(); set_ftu_const(); @@ -246705,7 +246702,7 @@ mulm6: return; mulm3: // 060 mulm3 - // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo + // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo alu_add(m_alub, m_aluo); sr_nzvc_u(); m_icount -= 2; @@ -246724,7 +246721,7 @@ void m68008_device::add_b_ds_dd_ip8() // d000 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add8(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -246783,7 +246780,7 @@ void m68008_device::add_b_ais_dd_ip8() // d010 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -246806,7 +246803,7 @@ void m68008_device::add_b_ais_dd_ip8() // d010 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -246871,7 +246868,7 @@ void m68008_device::add_b_aips_dd_ip8() // d018 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -246892,7 +246889,7 @@ void m68008_device::add_b_aips_dd_ip8() // d018 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -246959,7 +246956,7 @@ void m68008_device::add_b_pais_dd_ip8() // d020 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -246980,7 +246977,7 @@ void m68008_device::add_b_pais_dd_ip8() // d020 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247076,7 +247073,7 @@ void m68008_device::add_b_das_dd_ip8() // d028 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247099,7 +247096,7 @@ void m68008_device::add_b_das_dd_ip8() // d028 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247156,7 +247153,7 @@ void m68008_device::add_b_dais_dd_ip8() // d030 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -247248,7 +247245,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247271,7 +247268,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247368,7 +247365,7 @@ void m68008_device::add_b_adr16_dd_ip8() // d038 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -247389,7 +247386,7 @@ void m68008_device::add_b_adr16_dd_ip8() // d038 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247522,7 +247519,7 @@ void m68008_device::add_b_adr32_dd_ip8() // d039 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -247543,7 +247540,7 @@ void m68008_device::add_b_adr32_dd_ip8() // d039 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247638,7 +247635,7 @@ void m68008_device::add_b_dpc_dd_ip8() // d03a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247661,7 +247658,7 @@ void m68008_device::add_b_dpc_dd_ip8() // d03a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247717,7 +247714,7 @@ void m68008_device::add_b_dpci_dd_ip8() // d03b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -247809,7 +247806,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -247832,7 +247829,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add8(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247931,7 +247928,7 @@ void m68008_device::add_b_imm8_dd_ip8() // d03c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx] alu_add8(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -247992,7 +247989,7 @@ void m68008_device::add_w_ds_dd_ip8() // d040 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248053,7 +248050,7 @@ void m68008_device::add_w_as_dd_ip8() // d048 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248112,7 +248109,7 @@ void m68008_device::add_w_ais_dd_ip8() // d050 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -248153,7 +248150,7 @@ void m68008_device::add_w_ais_dd_ip8() // d050 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248218,7 +248215,7 @@ void m68008_device::add_w_aips_dd_ip8() // d058 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -248257,7 +248254,7 @@ void m68008_device::add_w_aips_dd_ip8() // d058 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248324,7 +248321,7 @@ void m68008_device::add_w_pais_dd_ip8() // d060 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -248363,7 +248360,7 @@ void m68008_device::add_w_pais_dd_ip8() // d060 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248459,7 +248456,7 @@ void m68008_device::add_w_das_dd_ip8() // d068 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -248500,7 +248497,7 @@ void m68008_device::add_w_das_dd_ip8() // d068 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248557,7 +248554,7 @@ void m68008_device::add_w_dais_dd_ip8() // d070 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -248649,7 +248646,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -248690,7 +248687,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248787,7 +248784,7 @@ void m68008_device::add_w_adr16_dd_ip8() // d078 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -248826,7 +248823,7 @@ void m68008_device::add_w_adr16_dd_ip8() // d078 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -248959,7 +248956,7 @@ void m68008_device::add_w_adr32_dd_ip8() // d079 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -248998,7 +248995,7 @@ void m68008_device::add_w_adr32_dd_ip8() // d079 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249093,7 +249090,7 @@ void m68008_device::add_w_dpc_dd_ip8() // d07a f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -249134,7 +249131,7 @@ void m68008_device::add_w_dpc_dd_ip8() // d07a f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249190,7 +249187,7 @@ void m68008_device::add_w_dpci_dd_ip8() // d07b f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -249282,7 +249279,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -249323,7 +249320,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249422,7 +249419,7 @@ void m68008_device::add_w_imm16_dd_ip8() // d07c f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 27a rrgw2 @@ -249483,7 +249480,7 @@ void m68008_device::add_l_ds_dd_ip8() // d080 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -249522,7 +249519,7 @@ void m68008_device::add_l_ds_dd_ip8() // d080 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -249552,7 +249549,7 @@ void m68008_device::add_l_as_dd_ip8() // d088 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx] alu_add(m_da[ry], m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -249591,7 +249588,7 @@ void m68008_device::add_l_as_dd_ip8() // d088 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -249619,7 +249616,7 @@ void m68008_device::add_l_ais_dd_ip8() // d090 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -249696,12 +249693,12 @@ void m68008_device::add_l_ais_dd_ip8() // d090 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -249761,7 +249758,7 @@ void m68008_device::add_l_aips_dd_ip8() // d098 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -249841,12 +249838,12 @@ void m68008_device::add_l_aips_dd_ip8() // d098 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -249905,7 +249902,7 @@ void m68008_device::add_l_pais_dd_ip8() // d0a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -249987,12 +249984,12 @@ void m68008_device::add_l_pais_dd_ip8() // d0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250088,7 +250085,7 @@ void m68008_device::add_l_das_dd_ip8() // d0a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -250165,12 +250162,12 @@ void m68008_device::add_l_das_dd_ip8() // d0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250228,7 +250225,7 @@ void m68008_device::add_l_dais_dd_ip8() // d0b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -250319,7 +250316,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -250396,12 +250393,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250499,7 +250496,7 @@ void m68008_device::add_l_adr16_dd_ip8() // d0b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -250576,12 +250573,12 @@ void m68008_device::add_l_adr16_dd_ip8() // d0b8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250715,7 +250712,7 @@ void m68008_device::add_l_adr32_dd_ip8() // d0b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -250792,12 +250789,12 @@ void m68008_device::add_l_adr32_dd_ip8() // d0b9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -250892,7 +250889,7 @@ void m68008_device::add_l_dpc_dd_ip8() // d0ba f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -250969,12 +250966,12 @@ void m68008_device::add_l_dpc_dd_ip8() // d0ba f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -251031,7 +251028,7 @@ void m68008_device::add_l_dpci_dd_ip8() // d0bb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -251122,7 +251119,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -251199,12 +251196,12 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx] alu_add(m_dbin, m_da[rx]); sr_xnzvc(); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -251340,7 +251337,7 @@ void m68008_device::add_l_imm32_dd_ip8() // d0bc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx] + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx] alu_add(m_dt, m_da[rx]); sr_xnzvc(); // 3c0 rorl2 @@ -251379,7 +251376,7 @@ void m68008_device::add_l_imm32_dd_ip8() // d0bc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx] + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -251409,7 +251406,7 @@ void m68008_device::adda_w_ds_ad_ip8() // d0c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251447,7 +251444,7 @@ void m68008_device::adda_w_ds_ad_ip8() // d0c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251476,7 +251473,7 @@ void m68008_device::adda_w_as_ad_ip8() // d0c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251514,7 +251511,7 @@ void m68008_device::adda_w_as_ad_ip8() // d0c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251541,7 +251538,7 @@ void m68008_device::adda_w_ais_ad_ip8() // d0d0 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -251582,7 +251579,7 @@ void m68008_device::adda_w_ais_ad_ip8() // d0d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251620,7 +251617,7 @@ void m68008_device::adda_w_ais_ad_ip8() // d0d0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251653,7 +251650,7 @@ void m68008_device::adda_w_aips_ad_ip8() // d0d8 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -251692,7 +251689,7 @@ void m68008_device::adda_w_aips_ad_ip8() // d0d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251730,7 +251727,7 @@ void m68008_device::adda_w_aips_ad_ip8() // d0d8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251765,7 +251762,7 @@ void m68008_device::adda_w_pais_ad_ip8() // d0e0 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -251804,7 +251801,7 @@ void m68008_device::adda_w_pais_ad_ip8() // d0e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251842,7 +251839,7 @@ void m68008_device::adda_w_pais_ad_ip8() // d0e0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -251906,7 +251903,7 @@ void m68008_device::adda_w_das_ad_ip8() // d0e8 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -251947,7 +251944,7 @@ void m68008_device::adda_w_das_ad_ip8() // d0e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -251985,7 +251982,7 @@ void m68008_device::adda_w_das_ad_ip8() // d0e8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252010,7 +252007,7 @@ void m68008_device::adda_w_dais_ad_ip8() // d0f0 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -252102,7 +252099,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -252143,7 +252140,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252181,7 +252178,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252246,7 +252243,7 @@ void m68008_device::adda_w_adr16_ad_ip8() // d0f8 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -252285,7 +252282,7 @@ void m68008_device::adda_w_adr16_ad_ip8() // d0f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252323,7 +252320,7 @@ void m68008_device::adda_w_adr16_ad_ip8() // d0f8 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252424,7 +252421,7 @@ void m68008_device::adda_w_adr32_ad_ip8() // d0f9 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -252463,7 +252460,7 @@ void m68008_device::adda_w_adr32_ad_ip8() // d0f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252501,7 +252498,7 @@ void m68008_device::adda_w_adr32_ad_ip8() // d0f9 f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252564,7 +252561,7 @@ void m68008_device::adda_w_dpc_ad_ip8() // d0fa f1ff m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -252605,7 +252602,7 @@ void m68008_device::adda_w_dpc_ad_ip8() // d0fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252643,7 +252640,7 @@ void m68008_device::adda_w_dpc_ad_ip8() // d0fa f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252667,7 +252664,7 @@ void m68008_device::adda_w_dpci_ad_ip8() // d0fb f1ff switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -252759,7 +252756,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = 0; @@ -252800,7 +252797,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252838,7 +252835,7 @@ adsw2: m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252905,7 +252902,7 @@ void m68008_device::adda_w_imm16_ad_ip8() // d0fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c8 rorm2 set_16l(m_da[rx], m_aluo); @@ -252943,7 +252940,7 @@ void m68008_device::adda_w_imm16_ad_ip8() // d0fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25f rorm3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx] alu_addc(high16(m_at), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -252972,7 +252969,7 @@ void m68008_device::addx_b_ds_dd_ip8() // d100 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx8(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -252980,7 +252977,7 @@ void m68008_device::addx_b_ds_dd_ip8() // d100 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -253034,16 +253031,16 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - (ry < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - (rx < 15 ? 1 : 2); - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob); @@ -253064,7 +253061,7 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 3: m_edb = m_mmu8->read_data(m_aob); @@ -253082,7 +253079,7 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin alu_addx8(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253124,7 +253121,7 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8xl(m_dbout, m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=b...... 12 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob, m_dbout); @@ -253156,7 +253153,7 @@ void m68008_device::add_b_dd_ais_ip8() // d110 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -253179,7 +253176,7 @@ void m68008_device::add_b_dd_ais_ip8() // d110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253258,7 +253255,7 @@ void m68008_device::add_b_dd_aips_ip8() // d118 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -253279,7 +253276,7 @@ void m68008_device::add_b_dd_aips_ip8() // d118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253360,7 +253357,7 @@ void m68008_device::add_b_dd_pais_ip8() // d120 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1 alu_and8(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -253381,7 +253378,7 @@ void m68008_device::add_b_dd_pais_ip8() // d120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253491,7 +253488,7 @@ void m68008_device::add_b_dd_das_ip8() // d128 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -253514,7 +253511,7 @@ void m68008_device::add_b_dd_das_ip8() // d128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253585,7 +253582,7 @@ void m68008_device::add_b_dd_dais_ip8() // d130 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -253677,7 +253674,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -253700,7 +253697,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253811,7 +253808,7 @@ void m68008_device::add_b_dd_adr16_ip8() // d138 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -253832,7 +253829,7 @@ void m68008_device::add_b_dd_adr16_ip8() // d138 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -253979,7 +253976,7 @@ void m68008_device::add_b_dd_adr32_ip8() // d139 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1 alu_and8(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -254000,7 +253997,7 @@ void m68008_device::add_b_dd_adr32_ip8() // d139 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add8(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254075,7 +254072,7 @@ void m68008_device::addx_w_ds_dd_ip8() // d140 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 27a rrgw2 @@ -254083,7 +254080,7 @@ void m68008_device::addx_w_ds_dd_ip8() // d140 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -254137,16 +254134,16 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_icount -= 2; // 131 asxw2 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 132 asxw3 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -254185,7 +254182,7 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8 m_alub = m_dbin; m_at = m_au; m_da[rx] = m_au; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -254221,7 +254218,7 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8 // 065 asxw5 m_aob = m_pc; m_au = m_at; - // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254263,7 +254260,7 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=....... 12 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -254313,7 +254310,7 @@ void m68008_device::add_w_dd_ais_ip8() // d150 f1f8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -254354,7 +254351,7 @@ void m68008_device::add_w_dd_ais_ip8() // d150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254451,7 +254448,7 @@ void m68008_device::add_w_dd_aips_ip8() // d158 f1f8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -254490,7 +254487,7 @@ void m68008_device::add_w_dd_aips_ip8() // d158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254589,7 +254586,7 @@ void m68008_device::add_w_dd_pais_ip8() // d160 f1f8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -254628,7 +254625,7 @@ void m68008_device::add_w_dd_pais_ip8() // d160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254756,7 +254753,7 @@ void m68008_device::add_w_dd_das_ip8() // d168 f1f8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -254797,7 +254794,7 @@ void m68008_device::add_w_dd_das_ip8() // d168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -254886,7 +254883,7 @@ void m68008_device::add_w_dd_dais_ip8() // d170 f1f8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -254978,7 +254975,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -255019,7 +255016,7 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255148,7 +255145,7 @@ void m68008_device::add_w_dd_adr16_ip8() // d178 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -255187,7 +255184,7 @@ void m68008_device::add_w_dd_adr16_ip8() // d178 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255352,7 +255349,7 @@ void m68008_device::add_w_dd_adr32_ip8() // d179 f1ff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -255391,7 +255388,7 @@ void m68008_device::add_w_dd_adr32_ip8() // d179 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255484,12 +255481,12 @@ void m68008_device::addx_l_ds_dd_ip8() // d180 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx] + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx] alu_addx(m_da[ry], m_da[rx]); sr_xnzvc_u(); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -255524,7 +255521,7 @@ void m68008_device::addx_l_ds_dd_ip8() // d180 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx] + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx] alu_addx(high16(m_da[ry]), high16(m_da[rx])); sr_xnzvc_u(); m_icount -= 2; @@ -255533,7 +255530,7 @@ void m68008_device::addx_l_ds_dd_ip8() // d180 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16h(m_da[rx], m_aluo); m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -255555,13 +255552,13 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 m_pc = m_au; m_dcr = 0; m_au = m_da[ry] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_icount -= 2; // 048 asxl2 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -255597,11 +255594,11 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 // 139 asxl3 m_aob = m_au; m_da[ry] = m_au; - // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 13a asxl4 m_au = m_da[rx] - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -255638,7 +255635,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 m_aob = m_au; m_alub = m_dbin; m_au = m_au - 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -255676,7 +255673,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 m_at = m_au; m_da[rx] = m_au; m_au = m_au + 2; - // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin + // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin alu_addx(m_aluo, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_DATA | SSW_R; @@ -255716,7 +255713,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 m_ir = m_irc; m_dbout = m_aluo; m_au = ext32(m_dbin); - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -255751,7 +255748,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 // 062 asxl8 m_aob = m_pc; m_au = m_at; - // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin + // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin alu_addx(m_alub, m_dbin); sr_xnzvc_u(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255793,7 +255790,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none + // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 25: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -255843,7 +255840,7 @@ void m68008_device::add_l_dd_ais_ip8() // d190 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -255920,7 +255917,7 @@ void m68008_device::add_l_dd_ais_ip8() // d190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -255960,7 +255957,7 @@ void m68008_device::add_l_dd_ais_ip8() // d190 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256049,7 +256046,7 @@ void m68008_device::add_l_dd_aips_ip8() // d198 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -256129,7 +256126,7 @@ void m68008_device::add_l_dd_aips_ip8() // d198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256169,7 +256166,7 @@ void m68008_device::add_l_dd_aips_ip8() // d198 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256257,7 +256254,7 @@ void m68008_device::add_l_dd_pais_ip8() // d1a0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -256339,7 +256336,7 @@ void m68008_device::add_l_dd_pais_ip8() // d1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256379,7 +256376,7 @@ void m68008_device::add_l_dd_pais_ip8() // d1a0 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256504,7 +256501,7 @@ void m68008_device::add_l_dd_das_ip8() // d1a8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -256581,7 +256578,7 @@ void m68008_device::add_l_dd_das_ip8() // d1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256621,7 +256618,7 @@ void m68008_device::add_l_dd_das_ip8() // d1a8 f1f8 m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -256708,7 +256705,7 @@ void m68008_device::add_l_dd_dais_ip8() // d1b0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -256799,7 +256796,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -256876,7 +256873,7 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -256916,7 +256913,7 @@ adsl2: m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -257043,7 +257040,7 @@ void m68008_device::add_l_dd_adr16_ip8() // d1b8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -257120,7 +257117,7 @@ void m68008_device::add_l_dd_adr16_ip8() // d1b8 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -257160,7 +257157,7 @@ void m68008_device::add_l_dd_adr16_ip8() // d1b8 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -257323,7 +257320,7 @@ void m68008_device::add_l_dd_adr32_ip8() // d1b9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -257400,7 +257397,7 @@ void m68008_device::add_l_dd_adr32_ip8() // d1b9 f1ff m_ir = m_irc; m_pc = m_au; m_au = m_at; - // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin alu_add(m_da[rx], m_dbin); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -257440,7 +257437,7 @@ void m68008_device::add_l_dd_adr32_ip8() // d1b9 f1ff m_aob = m_au; m_dbout = m_aluo; m_au = m_au - 2; - // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue + // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue alu_addc(high16(m_da[rx]), m_alue); sr_xnzvc_u(); m_base_ssw = SSW_DATA; @@ -257531,7 +257528,7 @@ void m68008_device::adda_l_ds_ad_ip8() // d1c0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -257569,7 +257566,7 @@ void m68008_device::adda_l_ds_ad_ip8() // d1c0 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -257598,7 +257595,7 @@ void m68008_device::adda_l_as_ad_ip8() // d1c8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_da[ry]); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx] alu_add(m_da[ry], m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -257636,7 +257633,7 @@ void m68008_device::adda_l_as_ad_ip8() // d1c8 f1f8 m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx] alu_addc(high16(m_da[ry]), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -257663,7 +257660,7 @@ void m68008_device::adda_l_ais_ad_ip8() // d1d0 f1f8 // 00b adrl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -257740,11 +257737,11 @@ void m68008_device::adda_l_ais_ad_ip8() // d1d0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -257803,7 +257800,7 @@ void m68008_device::adda_l_aips_ad_ip8() // d1d8 f1f8 // 00f pinl1 m_aob = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -257883,11 +257880,11 @@ void m68008_device::adda_l_aips_ad_ip8() // d1d8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -257945,7 +257942,7 @@ void m68008_device::adda_l_pais_ad_ip8() // d1e0 f1f8 case 0: // 179 pdcl1 m_au = m_da[ry] - 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_icount -= 2; // 17a pdcl2 @@ -258027,11 +258024,11 @@ void m68008_device::adda_l_pais_ad_ip8() // d1e0 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 9: @@ -258126,7 +258123,7 @@ void m68008_device::adda_l_das_ad_ip8() // d1e8 f1f8 // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -258203,11 +258200,11 @@ void m68008_device::adda_l_das_ad_ip8() // d1e8 f1f8 m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -258264,7 +258261,7 @@ void m68008_device::adda_l_dais_ad_ip8() // d1f0 f1f8 switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -258355,7 +258352,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -258432,11 +258429,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -258533,7 +258530,7 @@ void m68008_device::adda_l_adr16_ad_ip8() // d1f8 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -258610,11 +258607,11 @@ void m68008_device::adda_l_adr16_ad_ip8() // d1f8 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -258747,7 +258744,7 @@ void m68008_device::adda_l_adr32_ad_ip8() // d1f9 f1ff // 008 ablw3 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -258824,11 +258821,11 @@ void m68008_device::adda_l_adr32_ad_ip8() // d1f9 f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: @@ -258922,7 +258919,7 @@ void m68008_device::adda_l_dpc_ad_ip8() // d1fa f1ff // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -258999,11 +258996,11 @@ void m68008_device::adda_l_dpc_ad_ip8() // d1fa f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -259059,7 +259056,7 @@ void m68008_device::adda_l_dpci_ad_ip8() // d1fb f1ff switch(m_inst_substate) { case 0: // 1e7 aixw0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e6 aixw1 @@ -259150,7 +259147,7 @@ adsl2: // 00c adsl2 m_aob = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -259227,11 +259224,11 @@ adsl2: m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dbin); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx] alu_add(m_dbin, m_da[rx]); // 25c roml2 set_16l(m_da[rx], m_aluo); - // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx] alu_addc(m_alub, high16(m_da[rx])); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 13: @@ -259366,7 +259363,7 @@ void m68008_device::adda_l_imm32_ad_ip8() // d1fc f1ff m_ir = m_irc; m_pc = m_au; m_at = ext32(m_dt); - // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx] + // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx] alu_add(m_dt, m_da[rx]); // 3c0 rorl2 set_16l(m_da[rx], m_aluo); @@ -259404,7 +259401,7 @@ void m68008_device::adda_l_imm32_ad_ip8() // d1fc f1ff m_irc = m_edb; m_dbin = m_edb; // 25e rorl3 - // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx] + // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx] alu_addc(high16(m_dt), high16(m_da[rx])); m_icount -= 2; // 25d roml3 @@ -259432,13 +259429,13 @@ void m68008_device::asr_b_imm3_ds_ip8() // e000 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259482,7 +259479,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259516,13 +259513,13 @@ void m68008_device::lsr_b_imm3_ds_ip8() // e008 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259566,7 +259563,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259600,13 +259597,13 @@ void m68008_device::roxr_b_imm3_ds_ip8() // e010 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259650,7 +259647,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259684,13 +259681,13 @@ void m68008_device::ror_b_imm3_ds_ip8() // e018 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259734,7 +259731,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -259769,13 +259766,13 @@ void m68008_device::asr_b_dd_ds_ip8() // e020 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259819,7 +259816,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1 alu_asr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259854,13 +259851,13 @@ void m68008_device::lsr_b_dd_ds_ip8() // e028 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259904,7 +259901,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1 alu_lsr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -259939,13 +259936,13 @@ void m68008_device::roxr_b_dd_ds_ip8() // e030 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -259989,7 +259986,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1 alu_roxr8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260024,13 +260021,13 @@ void m68008_device::ror_b_dd_ds_ip8() // e038 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260074,7 +260071,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1 alu_ror8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -260108,13 +260105,13 @@ void m68008_device::asr_w_imm3_ds_ip8() // e040 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260158,7 +260155,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260192,13 +260189,13 @@ void m68008_device::lsr_w_imm3_ds_ip8() // e048 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260242,7 +260239,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260276,13 +260273,13 @@ void m68008_device::roxr_w_imm3_ds_ip8() // e050 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260326,7 +260323,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260360,13 +260357,13 @@ void m68008_device::ror_w_imm3_ds_ip8() // e058 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260410,7 +260407,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -260445,13 +260442,13 @@ void m68008_device::asr_w_dd_ds_ip8() // e060 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260495,7 +260492,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260530,13 +260527,13 @@ void m68008_device::lsr_w_dd_ds_ip8() // e068 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260580,7 +260577,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260615,13 +260612,13 @@ void m68008_device::roxr_w_dd_ds_ip8() // e070 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260665,7 +260662,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260700,13 +260697,13 @@ void m68008_device::ror_w_dd_ds_ip8() // e078 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260750,7 +260747,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_icount -= 2; @@ -260784,13 +260781,13 @@ void m68008_device::asr_l_imm3_ds_ip8() // e080 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260834,7 +260831,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260851,7 +260848,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -260874,13 +260871,13 @@ void m68008_device::lsr_l_imm3_ds_ip8() // e088 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -260924,7 +260921,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -260941,7 +260938,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -260964,13 +260961,13 @@ void m68008_device::roxr_l_imm3_ds_ip8() // e090 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261014,7 +261011,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261031,7 +261028,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261054,13 +261051,13 @@ void m68008_device::ror_l_imm3_ds_ip8() // e098 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261104,7 +261101,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -261121,7 +261118,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261145,13 +261142,13 @@ void m68008_device::asr_l_dd_ds_ip8() // e0a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261195,7 +261192,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1 alu_asr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261212,7 +261209,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261236,13 +261233,13 @@ void m68008_device::lsr_l_dd_ds_ip8() // e0a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261286,7 +261283,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1 alu_lsr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261303,7 +261300,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261327,13 +261324,13 @@ void m68008_device::roxr_l_dd_ds_ip8() // e0b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261377,7 +261374,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1 alu_roxr32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -261394,7 +261391,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261418,13 +261415,13 @@ void m68008_device::ror_l_dd_ds_ip8() // e0b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261468,7 +261465,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1 alu_ror32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -261485,7 +261482,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -261507,7 +261504,7 @@ void m68008_device::asr_ais_ip8() // e0d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -261548,12 +261545,12 @@ void m68008_device::asr_ais_ip8() // e0d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261650,7 +261647,7 @@ void m68008_device::asr_aips_ip8() // e0d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -261689,12 +261686,12 @@ void m68008_device::asr_aips_ip8() // e0d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261793,7 +261790,7 @@ void m68008_device::asr_pais_ip8() // e0e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -261832,12 +261829,12 @@ void m68008_device::asr_pais_ip8() // e0e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -261965,7 +261962,7 @@ void m68008_device::asr_das_ip8() // e0e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -262006,12 +262003,12 @@ void m68008_device::asr_das_ip8() // e0e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262100,7 +262097,7 @@ void m68008_device::asr_dais_ip8() // e0f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -262192,7 +262189,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -262233,12 +262230,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262367,7 +262364,7 @@ void m68008_device::asr_adr16_ip8() // e0f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -262406,12 +262403,12 @@ void m68008_device::asr_adr16_ip8() // e0f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262576,7 +262573,7 @@ void m68008_device::asr_adr32_ip8() // e0f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -262615,12 +262612,12 @@ void m68008_device::asr_adr32_ip8() // e0f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1 + // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1 alu_asr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262712,13 +262709,13 @@ void m68008_device::asl_b_imm3_ds_ip8() // e100 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262762,7 +262759,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -262796,13 +262793,13 @@ void m68008_device::lsl_b_imm3_ds_ip8() // e108 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262846,7 +262843,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -262860,7 +262857,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -262881,13 +262878,13 @@ void m68008_device::roxl_b_imm3_ds_ip8() // e110 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -262931,7 +262928,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -262965,13 +262962,13 @@ void m68008_device::rol_b_imm3_ds_ip8() // e118 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263015,7 +263012,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -263050,13 +263047,13 @@ void m68008_device::asl_b_dd_ds_ip8() // e120 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263100,7 +263097,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1 alu_asl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263135,13 +263132,13 @@ void m68008_device::lsl_b_dd_ds_ip8() // e128 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263185,7 +263182,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1 alu_lsl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263199,7 +263196,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_8(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -263221,13 +263218,13 @@ void m68008_device::roxl_b_dd_ds_ip8() // e130 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1 alu_and8x(high16(m_da[ry]), 0xff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1 alu_and8x(m_da[ry], 0xff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263271,7 +263268,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1 alu_roxl8(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263306,13 +263303,13 @@ void m68008_device::rol_b_dd_ds_ip8() // e138 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1 alu_and8(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1 alu_and8(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263356,7 +263353,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1 alu_rol8(m_aluo); sr_nzvc(); m_icount -= 2; @@ -263390,13 +263387,13 @@ void m68008_device::asl_w_imm3_ds_ip8() // e140 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263440,7 +263437,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263474,13 +263471,13 @@ void m68008_device::lsl_w_imm3_ds_ip8() // e148 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263524,7 +263521,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263538,7 +263535,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -263559,13 +263556,13 @@ void m68008_device::roxl_w_imm3_ds_ip8() // e150 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263609,7 +263606,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263643,13 +263640,13 @@ void m68008_device::rol_w_imm3_ds_ip8() // e158 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263693,7 +263690,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -263728,13 +263725,13 @@ void m68008_device::asl_w_dd_ds_ip8() // e160 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263778,7 +263775,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263813,13 +263810,13 @@ void m68008_device::lsl_w_dd_ds_ip8() // e168 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263863,7 +263860,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263877,7 +263874,7 @@ nbcr3: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; set_16l(m_da[ry], m_aluo); m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none set_ftu_const(); m_icount -= 2; m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird]; @@ -263899,13 +263896,13 @@ void m68008_device::roxl_w_dd_ds_ip8() // e170 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -263949,7 +263946,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -263984,13 +263981,13 @@ void m68008_device::rol_w_dd_ds_ip8() // e178 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 383 srrw2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264034,7 +264031,7 @@ srrw3: // 2d3 srrw3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_icount -= 2; @@ -264068,13 +264065,13 @@ void m68008_device::asl_l_imm3_ds_ip8() // e180 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264118,7 +264115,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264135,7 +264132,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264158,13 +264155,13 @@ void m68008_device::lsl_l_imm3_ds_ip8() // e188 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264208,7 +264205,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264220,14 +264217,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264250,13 +264247,13 @@ void m68008_device::roxl_l_imm3_ds_ip8() // e190 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264300,7 +264297,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264317,7 +264314,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264340,13 +264337,13 @@ void m68008_device::rol_l_imm3_ds_ip8() // e198 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_ftu); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264390,7 +264387,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -264407,7 +264404,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264431,13 +264428,13 @@ void m68008_device::asl_l_dd_ds_ip8() // e1a0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264481,7 +264478,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1 alu_asl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264498,7 +264495,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264522,13 +264519,13 @@ void m68008_device::lsl_l_dd_ds_ip8() // e1a8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264572,7 +264569,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1 alu_lsl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264584,14 +264581,14 @@ srrl4: // 257 srrl4 m_alub = m_alue; m_da[ry] = merge_16_32(m_alue, m_aluo); - // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue + // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue alu_and(m_aluo, m_alue); m_icount -= 2; // 306 srrl5 m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264615,13 +264612,13 @@ void m68008_device::roxl_l_dd_ds_ip8() // e1b0 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1 + // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1 alu_andx(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1 alu_andx(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264665,7 +264662,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1 alu_roxl32(m_aluo); sr_xnzvc(); m_icount -= 2; @@ -264682,7 +264679,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1 alu_andx(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264706,13 +264703,13 @@ void m68008_device::rol_l_dd_ds_ip8() // e1b8 f1f8 m_ir = m_irc; m_pc = m_au; m_au = ext32(m_da[rx]); - // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1 + // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1 alu_and(high16(m_da[ry]), 0xffff); // 387 srrl2 m_t = !(m_au & 0x3f); m_alue = m_aluo; m_au = m_au - 1; - // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1 + // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1 alu_and(m_da[ry], 0xffff); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264756,7 +264753,7 @@ srrl3: // 2d7 srrl3 m_t = !(m_au & 0x3f); m_au = m_au - 1; - // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1 alu_rol32(m_aluo); sr_nzvc(); m_icount -= 2; @@ -264773,7 +264770,7 @@ srrl4: m_ird = m_ir; if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_au = m_pc + 2; - // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1 alu_and(m_alub, 0xffff); sr_nz_u(); set_ftu_const(); @@ -264795,7 +264792,7 @@ void m68008_device::asl_ais_ip8() // e1d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -264836,12 +264833,12 @@ void m68008_device::asl_ais_ip8() // e1d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -264938,7 +264935,7 @@ void m68008_device::asl_aips_ip8() // e1d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -264977,12 +264974,12 @@ void m68008_device::asl_aips_ip8() // e1d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265081,7 +265078,7 @@ void m68008_device::asl_pais_ip8() // e1e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -265120,12 +265117,12 @@ void m68008_device::asl_pais_ip8() // e1e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265253,7 +265250,7 @@ void m68008_device::asl_das_ip8() // e1e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -265294,12 +265291,12 @@ void m68008_device::asl_das_ip8() // e1e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265388,7 +265385,7 @@ void m68008_device::asl_dais_ip8() // e1f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -265480,7 +265477,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -265521,12 +265518,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265655,7 +265652,7 @@ void m68008_device::asl_adr16_ip8() // e1f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -265694,12 +265691,12 @@ void m68008_device::asl_adr16_ip8() // e1f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265864,7 +265861,7 @@ void m68008_device::asl_adr32_ip8() // e1f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -265903,12 +265900,12 @@ void m68008_device::asl_adr32_ip8() // e1f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1 + // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1 alu_asl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -265999,7 +265996,7 @@ void m68008_device::lsr_ais_ip8() // e2d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -266040,12 +266037,12 @@ void m68008_device::lsr_ais_ip8() // e2d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266142,7 +266139,7 @@ void m68008_device::lsr_aips_ip8() // e2d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -266181,12 +266178,12 @@ void m68008_device::lsr_aips_ip8() // e2d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266285,7 +266282,7 @@ void m68008_device::lsr_pais_ip8() // e2e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -266324,12 +266321,12 @@ void m68008_device::lsr_pais_ip8() // e2e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266457,7 +266454,7 @@ void m68008_device::lsr_das_ip8() // e2e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -266498,12 +266495,12 @@ void m68008_device::lsr_das_ip8() // e2e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266592,7 +266589,7 @@ void m68008_device::lsr_dais_ip8() // e2f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -266684,7 +266681,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -266725,12 +266722,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -266859,7 +266856,7 @@ void m68008_device::lsr_adr16_ip8() // e2f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -266898,12 +266895,12 @@ void m68008_device::lsr_adr16_ip8() // e2f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267068,7 +267065,7 @@ void m68008_device::lsr_adr32_ip8() // e2f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -267107,12 +267104,12 @@ void m68008_device::lsr_adr32_ip8() // e2f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1 + // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1 alu_lsr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267203,11 +267200,11 @@ void m68008_device::lsl_ais_ip8() // e3d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -267245,12 +267242,12 @@ void m68008_device::lsl_ais_ip8() // e3d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267292,7 +267289,7 @@ void m68008_device::lsl_ais_ip8() // e3d0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -267345,12 +267342,12 @@ void m68008_device::lsl_aips_ip8() // e3d8 fff8 m_dcr = m_da[rx]; m_at = m_da[ry]; m_au = m_da[ry] + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -267389,12 +267386,12 @@ void m68008_device::lsl_aips_ip8() // e3d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267436,7 +267433,7 @@ void m68008_device::lsl_aips_ip8() // e3d8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -267488,7 +267485,7 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8 m_pc = m_au; m_dcr = m_da[rx]; m_au = m_da[ry] - 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_icount -= 2; // 17b pdcw2 @@ -267496,7 +267493,7 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -267535,12 +267532,12 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267582,7 +267579,7 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 9: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -267632,7 +267629,7 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8 // 1c2 adsw1 m_aob = m_au; m_au = ext32(m_dbin) + m_da[ry]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -267670,11 +267667,11 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -267712,12 +267709,12 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267759,7 +267756,7 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8 if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -267807,14 +267804,14 @@ void m68008_device::lsl_dais_ip8() // e3f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 m_aob = m_au; m_t = m_irc & 0x0800; m_au = m_da[ry] + ext32(m_aluo); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none + // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none if(m_t) goto aixl5; else @@ -267822,7 +267819,7 @@ void m68008_device::lsl_dais_ip8() // e3f0 fff8 aixl2: // 120 aixl2 m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -267861,7 +267858,7 @@ aixl2: aixl5: // 1e0 aixl5 m_au = m_da[map_sp(m_irc >> 12)] + m_au; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)] + // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)] m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 17: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -267902,11 +267899,11 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: m_edb = m_mmu8->read_data(m_aob & ~1) << 8; @@ -267944,12 +267941,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -267991,7 +267988,7 @@ adsw2: if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -268043,7 +268040,7 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff m_dcr = m_da[rx]; m_at = ext32(m_dbin); m_au = ext32(m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: @@ -268081,7 +268078,7 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -268120,12 +268117,12 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268167,7 +268164,7 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 13: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -268217,7 +268214,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff m_aob = m_au; set_16h(m_at, m_dbin); m_au = m_au + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none + // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 1: m_edb = m_mmu8->read_program(m_aob & ~1) << 8; @@ -268256,7 +268253,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff m_dcr = m_da[rx]; set_16l(m_at, m_dbin); m_au = merge_16_32(high16(m_at), m_dbin); - // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin + // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin alu_and(m_da[rx], m_dbin); m_base_ssw = SSW_PROGRAM | SSW_R; [[fallthrough]]; case 5: @@ -268294,7 +268291,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -268333,12 +268330,12 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1 + // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1 alu_lsl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268380,7 +268377,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff if(m_next_state != S_TRACE) m_next_state = m_int_next_state; m_dbout = m_aluo; m_au = m_pc + 2; - // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none + // alu r=4 c=0 m=..... i=....... 1 a=none d=none m_base_ssw = SSW_DATA; [[fallthrough]]; case 17: m_mmu8->write_data(m_aob & ~1, m_dbout >> 8); @@ -268430,7 +268427,7 @@ void m68008_device::roxr_ais_ip8() // e4d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -268471,12 +268468,12 @@ void m68008_device::roxr_ais_ip8() // e4d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268573,7 +268570,7 @@ void m68008_device::roxr_aips_ip8() // e4d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -268612,12 +268609,12 @@ void m68008_device::roxr_aips_ip8() // e4d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268716,7 +268713,7 @@ void m68008_device::roxr_pais_ip8() // e4e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -268755,12 +268752,12 @@ void m68008_device::roxr_pais_ip8() // e4e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -268888,7 +268885,7 @@ void m68008_device::roxr_das_ip8() // e4e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -268929,12 +268926,12 @@ void m68008_device::roxr_das_ip8() // e4e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269023,7 +269020,7 @@ void m68008_device::roxr_dais_ip8() // e4f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -269115,7 +269112,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -269156,12 +269153,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269290,7 +269287,7 @@ void m68008_device::roxr_adr16_ip8() // e4f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -269329,12 +269326,12 @@ void m68008_device::roxr_adr16_ip8() // e4f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269499,7 +269496,7 @@ void m68008_device::roxr_adr32_ip8() // e4f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -269538,12 +269535,12 @@ void m68008_device::roxr_adr32_ip8() // e4f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1 + // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1 alu_roxr(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269634,7 +269631,7 @@ void m68008_device::roxl_ais_ip8() // e5d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -269675,12 +269672,12 @@ void m68008_device::roxl_ais_ip8() // e5d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269777,7 +269774,7 @@ void m68008_device::roxl_aips_ip8() // e5d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -269816,12 +269813,12 @@ void m68008_device::roxl_aips_ip8() // e5d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -269920,7 +269917,7 @@ void m68008_device::roxl_pais_ip8() // e5e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1 alu_andx(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -269959,12 +269956,12 @@ void m68008_device::roxl_pais_ip8() // e5e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270092,7 +270089,7 @@ void m68008_device::roxl_das_ip8() // e5e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -270133,12 +270130,12 @@ void m68008_device::roxl_das_ip8() // e5e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270227,7 +270224,7 @@ void m68008_device::roxl_dais_ip8() // e5f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -270319,7 +270316,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -270360,12 +270357,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270494,7 +270491,7 @@ void m68008_device::roxl_adr16_ip8() // e5f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -270533,12 +270530,12 @@ void m68008_device::roxl_adr16_ip8() // e5f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270703,7 +270700,7 @@ void m68008_device::roxl_adr32_ip8() // e5f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -270742,12 +270739,12 @@ void m68008_device::roxl_adr32_ip8() // e5f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1 alu_andx(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1 + // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1 alu_roxl(m_aluo); sr_xnzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270838,7 +270835,7 @@ void m68008_device::ror_ais_ip8() // e6d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -270879,12 +270876,12 @@ void m68008_device::ror_ais_ip8() // e6d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -270981,7 +270978,7 @@ void m68008_device::ror_aips_ip8() // e6d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -271020,12 +271017,12 @@ void m68008_device::ror_aips_ip8() // e6d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271124,7 +271121,7 @@ void m68008_device::ror_pais_ip8() // e6e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -271163,12 +271160,12 @@ void m68008_device::ror_pais_ip8() // e6e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271296,7 +271293,7 @@ void m68008_device::ror_das_ip8() // e6e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -271337,12 +271334,12 @@ void m68008_device::ror_das_ip8() // e6e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271431,7 +271428,7 @@ void m68008_device::ror_dais_ip8() // e6f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -271523,7 +271520,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -271564,12 +271561,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271698,7 +271695,7 @@ void m68008_device::ror_adr16_ip8() // e6f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -271737,12 +271734,12 @@ void m68008_device::ror_adr16_ip8() // e6f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -271907,7 +271904,7 @@ void m68008_device::ror_adr32_ip8() // e6f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -271946,12 +271943,12 @@ void m68008_device::ror_adr32_ip8() // e6f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1 + // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1 alu_ror(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272042,7 +272039,7 @@ void m68008_device::rol_ais_ip8() // e7d0 fff8 // 006 adrw1 m_aob = m_da[ry]; m_at = m_da[ry]; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -272083,12 +272080,12 @@ void m68008_device::rol_ais_ip8() // e7d0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272185,7 +272182,7 @@ void m68008_device::rol_aips_ip8() // e7d8 fff8 // 21d pinw2 m_da[ry] = m_au; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -272224,12 +272221,12 @@ void m68008_device::rol_aips_ip8() // e7d8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272328,7 +272325,7 @@ void m68008_device::rol_pais_ip8() // e7e0 fff8 m_at = m_au; m_da[ry] = m_au; m_au = m_pc; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1 alu_and(m_alub, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 1: @@ -272367,12 +272364,12 @@ void m68008_device::rol_pais_ip8() // e7e0 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272500,7 +272497,7 @@ void m68008_device::rol_das_ip8() // e7e8 fff8 m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -272541,12 +272538,12 @@ void m68008_device::rol_das_ip8() // e7e8 fff8 m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272635,7 +272632,7 @@ void m68008_device::rol_dais_ip8() // e7f0 fff8 switch(m_inst_substate) { case 0: // 1e3 aixl0 - // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0 + // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0 alu_ext(m_dbin); m_icount -= 2; // 3e2 aixl1 @@ -272727,7 +272724,7 @@ adsw2: m_aob = m_au; m_at = m_au; m_au = m_pc + 4; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); // 024 adrw2 m_dcr = m_da[rx]; @@ -272768,12 +272765,12 @@ adsw2: m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -272902,7 +272899,7 @@ void m68008_device::rol_adr16_ip8() // e7f8 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 5: @@ -272941,12 +272938,12 @@ void m68008_device::rol_adr16_ip8() // e7f8 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; @@ -273111,7 +273108,7 @@ void m68008_device::rol_adr32_ip8() // e7f9 ffff // 004 abll3 m_aob = m_at; m_au = m_pc + 2; - // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); m_base_ssw = SSW_DATA | SSW_R; [[fallthrough]]; case 9: @@ -273150,12 +273147,12 @@ void m68008_device::rol_adr32_ip8() // e7f9 ffff m_ir = m_irc; m_pc = m_au; m_au = m_au + 2; - // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1 + // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1 alu_and(m_dbin, 0xffff); sr_nzvc(); // 304 stmw2 m_au = m_at; - // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1 + // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1 alu_rol(m_aluo); sr_nzvc(); m_base_ssw = SSW_PROGRAM | SSW_R; From 60623732de8602a2cd893e653a9c309de17f7576 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 19 Mar 2026 15:38:27 +0100 Subject: [PATCH 321/351] sound abuffer: fix wrong assumption that samplerate is fixed at 48000 --- src/osd/modules/sound/coreaudio_sound.cpp | 12 ++++++------ src/osd/modules/sound/pa_sound.cpp | 8 ++++---- src/osd/modules/sound/pipewire_sound.cpp | 6 +++--- src/osd/modules/sound/pulse_sound.cpp | 4 ++-- src/osd/modules/sound/sdl3_sound.cpp | 6 +++--- src/osd/modules/sound/sdl_sound.cpp | 4 ++-- src/osd/modules/sound/sound_module.cpp | 5 +++-- src/osd/modules/sound/sound_module.h | 3 ++- src/osd/modules/sound/wasapi_sound.cpp | 2 +- src/osd/modules/sound/xaudio2_sound.cpp | 2 +- 10 files changed, 27 insertions(+), 25 deletions(-) diff --git a/src/osd/modules/sound/coreaudio_sound.cpp b/src/osd/modules/sound/coreaudio_sound.cpp index 8e5fb2da93e..c17c6a4c4c7 100644 --- a/src/osd/modules/sound/coreaudio_sound.cpp +++ b/src/osd/modules/sound/coreaudio_sound.cpp @@ -243,8 +243,8 @@ private: class coreaudio_stream { public: - coreaudio_stream(sound_coreaudio *parent, int input_channels) : - m_input_buffer(input_channels), + coreaudio_stream(sound_coreaudio *parent, int input_channels, uint32_t rate) : + m_input_buffer(input_channels, rate), m_parent(parent), m_graph(nullptr), m_is_source(false), @@ -392,9 +392,9 @@ private: std::shared_ptr m_stream; std::vector m_volumes; - coreaudio_stream_info(sound_coreaudio *parent, int channels) + coreaudio_stream_info(sound_coreaudio *parent, int channels, uint32_t rate) { - m_stream = std::make_shared(parent, channels); + m_stream = std::make_shared(parent, channels, rate); } }; @@ -534,7 +534,7 @@ uint32_t sound_coreaudio::stream_sink_open(uint32_t node, std::string name, uint { if (our_device->second.m_sinks > 0) { - struct coreaudio_stream_info stream(this, 1); + struct coreaudio_stream_info stream(this, 1, rate); if (!stream.m_stream->create_sink_stream(our_device->second, name.c_str(), rate, m_audio_latency)) { @@ -567,7 +567,7 @@ uint32_t sound_coreaudio::stream_source_open(uint32_t node, std::string name, ui if (sources > 0) { - struct coreaudio_stream_info stream(this, sources); + struct coreaudio_stream_info stream(this, sources, rate); if (!stream.m_stream->create_source_stream(our_device->second, name.c_str(), rate, m_audio_latency)) { diff --git a/src/osd/modules/sound/pa_sound.cpp b/src/osd/modules/sound/pa_sound.cpp index a33a65f212a..defde5aa240 100644 --- a/src/osd/modules/sound/pa_sound.cpp +++ b/src/osd/modules/sound/pa_sound.cpp @@ -65,8 +65,8 @@ private: uint32_t m_devid; abuffer m_buffer; - stream_info(sound_pa *manager, uint32_t channels, uint32_t id, uint32_t devid) : - m_manager(manager), m_stream(nullptr), m_channels(channels), m_id(id), m_devid(devid), m_buffer(channels) + stream_info(sound_pa *manager, uint32_t channels, uint32_t rate, uint32_t id, uint32_t devid) : + m_manager(manager), m_stream(nullptr), m_channels(channels), m_id(id), m_devid(devid), m_buffer(channels, rate) { } }; @@ -217,7 +217,7 @@ uint32_t sound_pa::stream_sink_open(uint32_t node, std::string name, uint32_t ra op.hostApiSpecificStreamInfo = nullptr; uint32_t id = m_stream_id ++; - auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sinks, id, node)).first; + auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sinks, rate, id, node)).first; si->second.m_buffer.set_latency(op.suggestedLatency / 20e-3); PaError err = Pa_OpenStream(&si->second.m_stream, nullptr, &op, rate, paFramesPerBufferUnspecified, 0, s_stream_callback, &si->second); @@ -248,7 +248,7 @@ uint32_t sound_pa::stream_source_open(uint32_t node, std::string name, uint32_t ip.hostApiSpecificStreamInfo = nullptr; uint32_t id = m_stream_id ++; - auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sources, id, node)).first; + auto si = m_streams.emplace(id, stream_info(this, m_info.m_nodes[node-1].m_sources, rate, id, node)).first; si->second.m_buffer.set_latency(ip.suggestedLatency / 20e-3); PaError err = Pa_OpenStream(&si->second.m_stream, &ip, nullptr, rate, paFramesPerBufferUnspecified, 0, s_stream_callback, &si->second); diff --git a/src/osd/modules/sound/pipewire_sound.cpp b/src/osd/modules/sound/pipewire_sound.cpp index b6ffd73160f..2d13f44d2b4 100644 --- a/src/osd/modules/sound/pipewire_sound.cpp +++ b/src/osd/modules/sound/pipewire_sound.cpp @@ -99,7 +99,7 @@ private: std::vector m_volumes; abuffer m_buffer; - stream_info(sound_pipewire *wire, bool is_output, uint32_t osdid, uint32_t channels) : m_wire(wire), m_is_output(is_output), m_wait_stream(true), m_osdid(osdid), m_channels(channels), m_stream(nullptr), m_buffer(channels) {} + stream_info(sound_pipewire *wire, bool is_output, uint32_t osdid, uint32_t channels, uint32_t rate) : m_wire(wire), m_is_output(is_output), m_wait_stream(true), m_osdid(osdid), m_channels(channels), m_stream(nullptr), m_buffer(channels, rate) {} }; static const pw_core_events core_events; @@ -680,7 +680,7 @@ uint32_t sound_pipewire::stream_sink_open(uint32_t node, std::string name, uint3 node_info &snode = m_nodes.find(ni->second)->second; uint32_t id = m_stream_current_id++; - auto &stream = m_streams.emplace(id, stream_info(this, true, id, snode.m_sinks)).first->second; + auto &stream = m_streams.emplace(id, stream_info(this, true, id, snode.m_sinks, rate)).first->second; stream.m_stream = pw_stream_new_simple(pw_thread_loop_get_loop(m_loop), name.c_str(), @@ -733,7 +733,7 @@ uint32_t sound_pipewire::stream_source_open(uint32_t node, std::string name, uin node_info &snode = m_nodes.find(ni->second)->second; uint32_t id = m_stream_current_id++; - auto &stream = m_streams.emplace(id, stream_info(this, false, id, snode.m_sources)).first->second; + auto &stream = m_streams.emplace(id, stream_info(this, false, id, snode.m_sources, rate)).first->second; stream.m_stream = pw_stream_new_simple(pw_thread_loop_get_loop(m_loop), name.c_str(), diff --git a/src/osd/modules/sound/pulse_sound.cpp b/src/osd/modules/sound/pulse_sound.cpp index 093bd4d75f8..21639b2482f 100644 --- a/src/osd/modules/sound/pulse_sound.cpp +++ b/src/osd/modules/sound/pulse_sound.cpp @@ -80,7 +80,7 @@ private: std::vector m_volumes; abuffer m_buffer; - stream_info(sound_pulse *pulse, uint32_t osdid, uint32_t channels) : m_pulse(pulse), m_osdid(osdid), m_pulse_id(0), m_channels(channels), m_stream(nullptr), m_volumes(channels), m_buffer(channels) {} + stream_info(sound_pulse *pulse, uint32_t osdid, uint32_t channels, uint32_t rate) : m_pulse(pulse), m_osdid(osdid), m_pulse_id(0), m_channels(channels), m_stream(nullptr), m_volumes(channels), m_buffer(channels, rate) {} }; std::map m_nodes; @@ -448,7 +448,7 @@ uint32_t sound_pulse::stream_sink_open(uint32_t node, std::string name, uint32_t node_info &snode = m_nodes.find(ni->second)->second; uint32_t id = m_stream_current_id++; - auto &stream = m_streams.emplace(id, stream_info(this, id, snode.m_sink_port_count)).first->second; + auto &stream = m_streams.emplace(id, stream_info(this, id, snode.m_sink_port_count, rate)).first->second; pa_sample_spec ss; #ifdef LSB_FIRST diff --git a/src/osd/modules/sound/sdl3_sound.cpp b/src/osd/modules/sound/sdl3_sound.cpp index c04c4934154..d450a898a83 100644 --- a/src/osd/modules/sound/sdl3_sound.cpp +++ b/src/osd/modules/sound/sdl3_sound.cpp @@ -79,7 +79,7 @@ private: SDL_AudioDeviceID m_sdl_id; SDL_AudioStream *m_sdl_stream; abuffer m_buffer; - stream_info(uint32_t id, uint8_t channels) : m_id(id), m_sdl_id(0), m_buffer(channels) {} + stream_info(uint32_t id, uint8_t channels, uint32_t rate) : m_id(id), m_sdl_id(0), m_buffer(channels, rate) {} }; std::vector m_devices; @@ -257,7 +257,7 @@ uint32_t sound_sdl3::stream_sink_open(uint32_t node, std::string name, uint32_t dspec.format = SDL_AUDIO_S16; dspec.channels = m_devices[devnode].m_channels; - std::unique_ptr stream = std::make_unique(m_stream_next_id ++, dspec.channels); + std::unique_ptr stream = std::make_unique(m_stream_next_id ++, dspec.channels, rate); stream->m_sdl_id = SDL_OpenAudioDevice(device_id, &dspec); if(!stream->m_sdl_id) { @@ -295,7 +295,7 @@ uint32_t sound_sdl3::stream_source_open(uint32_t node, std::string name, uint32_ dspec.format = SDL_AUDIO_S16; dspec.channels = m_devices[devnode].m_channels; - std::unique_ptr stream = std::make_unique(m_stream_next_id++, dspec.channels); + std::unique_ptr stream = std::make_unique(m_stream_next_id++, dspec.channels, rate); printf("opening source device %d at rate %d channels %d\n", device_id, dspec.freq, dspec.channels); diff --git a/src/osd/modules/sound/sdl_sound.cpp b/src/osd/modules/sound/sdl_sound.cpp index 38a21c0eaa9..dbc7fc1ad45 100644 --- a/src/osd/modules/sound/sdl_sound.cpp +++ b/src/osd/modules/sound/sdl_sound.cpp @@ -66,7 +66,7 @@ private: uint32_t m_id; SDL_AudioDeviceID m_sdl_id; abuffer m_buffer; - stream_info(uint32_t id, uint8_t channels) : m_id(id), m_sdl_id(0), m_buffer(channels) {} + stream_info(uint32_t id, uint8_t channels, uint32_t rate) : m_id(id), m_sdl_id(0), m_buffer(channels, rate) {} }; std::vector m_devices; @@ -202,7 +202,7 @@ osd::audio_info sound_sdl::get_information() uint32_t sound_sdl::stream_sink_open(uint32_t node, std::string name, uint32_t rate) { device_info &dev = m_devices[node-1]; - std::unique_ptr stream = std::make_unique(m_stream_next_id ++, dev.m_channels); + std::unique_ptr stream = std::make_unique(m_stream_next_id ++, dev.m_channels, rate); SDL_AudioSpec dspec, ospec; dspec.freq = rate; diff --git a/src/osd/modules/sound/sound_module.cpp b/src/osd/modules/sound/sound_module.cpp index 80ec56f885e..de914e51080 100644 --- a/src/osd/modules/sound/sound_module.cpp +++ b/src/osd/modules/sound/sound_module.cpp @@ -14,8 +14,9 @@ sound_module::~sound_module() // implementing this here forces the vtable and inline virtual member functions to be instantiated } -sound_module::abuffer::abuffer(uint32_t channels) noexcept : +sound_module::abuffer::abuffer(uint32_t channels, uint32_t rate) noexcept : m_channels(channels), + m_rate(rate), m_max_buffers(8), m_hindex(0), m_last_sample(channels, 0) @@ -94,7 +95,7 @@ void sound_module::abuffer::push(const int16_t *data, uint32_t samples) // maximum number of buffers relative to samples // unless -speed or -refreshspeed is used, this is same as m_max_buffers - const uint32_t max_buffers = std::max(m_max_buffers * 48000 / samples / 50, 4U); + const uint32_t max_buffers = std::max(m_max_buffers * m_rate / samples / 50, 4U); // minimum number of buffers after overrun // lower limit of 2 prevents buffer underruns with push(this), get, get, push diff --git a/src/osd/modules/sound/sound_module.h b/src/osd/modules/sound/sound_module.h index 69ef1732fde..b160a14dd1b 100644 --- a/src/osd/modules/sound/sound_module.h +++ b/src/osd/modules/sound/sound_module.h @@ -38,7 +38,7 @@ public: protected: class abuffer { public: - abuffer(uint32_t channels) noexcept; + abuffer(uint32_t channels, uint32_t rate) noexcept; void set_latency(float latency); void clear(); void get(int16_t *data, uint32_t samples) noexcept; @@ -62,6 +62,7 @@ protected: buffer &push_buffer(); uint32_t m_channels; + uint32_t m_rate; uint32_t m_used_buffers; uint32_t m_used_buffers_prev; uint32_t m_max_buffers; diff --git a/src/osd/modules/sound/wasapi_sound.cpp b/src/osd/modules/sound/wasapi_sound.cpp index f17f7757a03..1c0fdd38e02 100644 --- a/src/osd/modules/sound/wasapi_sound.cpp +++ b/src/osd/modules/sound/wasapi_sound.cpp @@ -266,7 +266,7 @@ sound_wasapi::stream_info::stream_info( uint32_t rate) : m_host(host), m_event(std::move(event)), - m_buffer(channels), + m_buffer(channels, rate), m_underflow_fill(channels, 0U), m_client(std::move(client)), m_buffer_frames(buffer_frames), diff --git a/src/osd/modules/sound/xaudio2_sound.cpp b/src/osd/modules/sound/xaudio2_sound.cpp index 6d56b260361..7ede9f7016b 100644 --- a/src/osd/modules/sound/xaudio2_sound.cpp +++ b/src/osd/modules/sound/xaudio2_sound.cpp @@ -937,7 +937,7 @@ sound_xaudio2::voice_info::voice_info(sound_xaudio2 &host, WAVEFORMATEX const &f volume_matrix(std::make_unique(format.nChannels * format.nChannels)), m_host(host), m_buffer_pool(4, calculate_packet_bytes(format)), - m_buffer(format.nChannels), + m_buffer(format.nChannels, format.nSamplesPerSec), m_packet_bytes(calculate_packet_bytes(format)), m_sample_bytes(format.nBlockAlign), m_need_update(false), From dde7a2021e49e6017d194ec64c8dce71416a3150 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 19 Mar 2026 15:49:11 +0100 Subject: [PATCH 322/351] tilemap: set all scroll rows/cols on single param scrollx/y --- src/emu/tilemap.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/emu/tilemap.h b/src/emu/tilemap.h index ecc61674470..3d0c6a0cf04 100644 --- a/src/emu/tilemap.h +++ b/src/emu/tilemap.h @@ -309,6 +309,7 @@ #pragma once #include "memarray.h" +#include #include #include #include @@ -473,8 +474,8 @@ public: void set_scrolldy(int dy, int dy_flipped) { m_dy = dy; m_dy_flipped = dy_flipped; } void set_scrollx(int which, int value) { if (which < m_scrollrows) m_rowscroll[which] = value; } void set_scrolly(int which, int value) { if (which < m_scrollcols) m_colscroll[which] = value; } - void set_scrollx(int value) { set_scrollx(0, value); } - void set_scrolly(int value) { set_scrolly(0, value); } + void set_scrollx(int value) { std::fill_n(m_rowscroll.begin(), m_scrollrows, value); } + void set_scrolly(int value) { std::fill_n(m_colscroll.begin(), m_scrollcols, value); } void set_scroll_rows(u32 scroll_rows) { assert(scroll_rows > 0 && scroll_rows <= m_height); m_scrollrows = scroll_rows; } void set_scroll_cols(u32 scroll_cols) { assert(scroll_cols > 0 && scroll_cols <= m_width); m_scrollcols = scroll_cols; } void set_flip(u32 attributes) { if (m_attributes != attributes) { m_attributes = attributes; mappings_update(); } } From 83f6558ef7c848ea8b54de1c468823763d37bc24 Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 19 Mar 2026 16:04:24 +0100 Subject: [PATCH 323/351] labyrunr: fix possible issue with yscroll, k051733: reduce code size a bit --- src/mame/konami/k051733.cpp | 34 ++++++------------------- src/mame/konami/labyrunr.cpp | 48 ++++++++++++++++++------------------ 2 files changed, 31 insertions(+), 51 deletions(-) diff --git a/src/mame/konami/k051733.cpp b/src/mame/konami/k051733.cpp index 478b0c1047f..fbb5184ffeb 100644 --- a/src/mame/konami/k051733.cpp +++ b/src/mame/konami/k051733.cpp @@ -157,39 +157,19 @@ u8 k051733_device::read(offs_t offset) return 0xff; // octant angle - if (y1 >= y2) + if (dy <= 0) { - if (x1 >= x2) - { - if (dy >= dx) - return 0x00; - else - return 0x06; - } + if (dx <= 0) + return (dy >= dx) ? 0x00 : 0x06; else - { - if (dy >= -dx) - return 0x04; - else - return 0x07; - } + return (dy >= -dx) ? 0x04 : 0x07; } else { - if (x1 >= x2) - { - if (dy > -dx) - return 0x02; - else - return 0x01; - } + if (dx <= 0) + return (dy > -dx) ? 0x02 : 0x01; else - { - if (dy > dx) - return 0x03; - else - return 0x05; - } + return (dy > dx) ? 0x03 : 0x05; } } } diff --git a/src/mame/konami/labyrunr.cpp b/src/mame/konami/labyrunr.cpp index 59c99313a6d..ebe04546153 100644 --- a/src/mame/konami/labyrunr.cpp +++ b/src/mame/konami/labyrunr.cpp @@ -180,7 +180,8 @@ void labyrunr_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - uint8_t ctrl_0 = m_k007121->ctrl_r(0); + const uint8_t ctrl_0 = m_k007121->ctrl_r(0); + const uint8_t ctrl_2 = m_k007121->ctrl_r(2); const int bgpen = (m_k007121->ctrl_r(6) & 0x30) * 2 + 16; bitmap.fill(bgpen << 4, cliprect); @@ -190,7 +191,7 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm rectangle clip[3]; clip[0] = clip[1] = clip[2] = visarea; - if (m_k007121->ctrl_r(3) & 0x10) + if (BIT(m_k007121->ctrl_r(3), 4)) { // compute clipping if (m_k007121->flipscreen()) @@ -206,26 +207,22 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm clip[0] &= cliprect; clip[1] &= cliprect; + clip[2] = clip[0]; // set scroll registers - m_tilemap[0]->set_scrollx(0, ctrl_0 - 40); - m_tilemap[1]->set_scrollx(0, 0); + m_tilemap[0]->set_scrollx(ctrl_0 - 40); + m_tilemap[1]->set_scrollx(0); + m_tilemap[1]->set_scrolly(0); m_k007121->set_sprite_offsets(40, 16); - for (int i = 0; i < 32; i++) + // enable colscroll + if (BIT(m_k007121->ctrl_r(1), 1)) { - // enable colscroll - if (m_k007121->ctrl_r(1) & 2) + for (int i = 0; i < 32; i++) m_tilemap[0]->set_scrolly((i + 2) & 0x1f, m_k007121->scroll_r(i)); - else - m_tilemap[0]->set_scrolly((i + 2) & 0x1f, m_k007121->ctrl_r(2)); } - - // draw the graphics - m_tilemap[0]->draw(screen, bitmap, clip[0], TILEMAP_DRAW_OPAQUE | TILEMAP_DRAW_CATEGORY(0), 0); - draw_sprites(bitmap, clip[0], screen.priority()); - m_tilemap[0]->draw(screen, bitmap, clip[0], TILEMAP_DRAW_OPAQUE | TILEMAP_DRAW_CATEGORY(1), 0); - m_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); + else + m_tilemap[0]->set_scrolly(ctrl_2); } else { @@ -242,7 +239,7 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm } // width of 240 or 256 - if (m_k007121->ctrl_r(3) & 0x40) + if (BIT(m_k007121->ctrl_r(3), 6)) { clip[2].min_x += 24; clip[2].max_x -= 16; @@ -268,17 +265,20 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm } // set scroll registers - m_tilemap[0]->set_scrollx(0, ctrl_0 - 16); - m_tilemap[1]->set_scrollx(0, ctrl_0 - 16); + m_tilemap[0]->set_scrollx(ctrl_0 - 16); + m_tilemap[1]->set_scrollx(ctrl_0 - 16); + m_tilemap[0]->set_scrolly(ctrl_2); + m_tilemap[1]->set_scrolly(ctrl_2); m_k007121->set_sprite_offsets(16, -8); - - // draw the graphics - m_tilemap[0]->draw(screen, bitmap, clip[0], TILEMAP_DRAW_CATEGORY(0), 0); - draw_sprites(bitmap, clip[2], screen.priority()); - m_tilemap[0]->draw(screen, bitmap, clip[0], TILEMAP_DRAW_CATEGORY(1), 0); - m_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); } + // draw the graphics + const uint32_t opaque = BIT(m_k007121->ctrl_r(3), 5) ? 0 : TILEMAP_DRAW_OPAQUE; + m_tilemap[0]->draw(screen, bitmap, clip[0], opaque | TILEMAP_DRAW_CATEGORY(0), 0); + draw_sprites(bitmap, clip[2], screen.priority()); + m_tilemap[0]->draw(screen, bitmap, clip[0], opaque | TILEMAP_DRAW_CATEGORY(1), 0); + m_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); + return 0; } From 5fd7917b64dcdaf9c40daede348444a6808f0d57 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Thu, 19 Mar 2026 17:27:25 +0100 Subject: [PATCH 324/351] New systems marked not working ------------------------------ Draw Poker HI-LO (Americade) [chaneman] --- src/mame/dataeast/dfruit2.cpp | 42 ++++++++++++++++++++++++++++------- src/mame/huangyeh/hy-268a.cpp | 4 ++-- src/mame/mame.lst | 1 + src/mame/misc/norautp.cpp | 37 ++++++++++++++++++++++++++++++ 4 files changed, 74 insertions(+), 10 deletions(-) diff --git a/src/mame/dataeast/dfruit2.cpp b/src/mame/dataeast/dfruit2.cpp index 04d7f84a25c..5e8dae643d9 100644 --- a/src/mame/dataeast/dfruit2.cpp +++ b/src/mame/dataeast/dfruit2.cpp @@ -21,12 +21,14 @@ bank of 8 switches NOTES: -appears to be ported from the version on tc009xlvc hardware, with some of the features -of that SoC reproduced here +- appears to be ported from the version on tc009xlvc hardware, with some of the features + of that SoC reproduced here; +- while the game has DIPs, most configuration options are found in service mode. TODO: - complete I/O - IRQ handling may be incomplete +- hopper hookup may be imperfect - various unknown reads / writes */ @@ -38,6 +40,7 @@ TODO: #include "cpu/z80/z80.h" #include "machine/i8255.h" +#include "machine/ticket.h" #include "machine/timer.h" #include "sound/ymopn.h" @@ -55,6 +58,7 @@ public: dfruit2_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), + m_hopper(*this, "hopper"), m_palette(*this, "palette"), m_deco_tilegen(*this, "tilegen"), m_sprgen(*this, "sprgen"), @@ -71,6 +75,7 @@ protected: private: required_device m_maincpu; + required_device m_hopper; required_device m_palette; required_device m_deco_tilegen; required_device m_sprgen; @@ -95,6 +100,7 @@ private: uint8_t bank_r(); void bank_w(uint8_t data); void b109_w(uint8_t data); + void counters_w(uint8_t data); void program_map(address_map &map) ATTR_COLD; }; @@ -205,6 +211,23 @@ void dfruit2_state::bank_w(uint8_t data) void dfruit2_state::b109_w(uint8_t data) { m_b109 = data; + if (m_b109 & 0xfe) + logerror("%s b109_w: %02x\n", machine().describe_context(), data); + + // TODO: bit 1 seems to be set only during double up game. What is it used for? +} + +void dfruit2_state::counters_w(uint8_t data) +{ + machine().bookkeeping().coin_counter_w(0, BIT(data, 0)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 1)); + + m_hopper->motor_w(BIT(data, 2)); // or maybe 3? + + if (data & 0x0c) + logerror("%s output_w: %02x\n", machine().describe_context(), data); + + // 0xf0 always on? } void dfruit2_state::machine_start() @@ -250,14 +273,14 @@ void dfruit2_state::program_map(address_map &map) static INPUT_PORTS_START( dfruit2 ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) // no coin counter, so assume service PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW ) // or book-keeping? - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) // also service / book-keeping PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -270,7 +293,7 @@ static INPUT_PORTS_START( dfruit2 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("IN2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // by default only works with at least 300 credits, changeable in service mode PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop Reel 1 / Double Up") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) PORT_NAME("Stop Reel 3 / Black") @@ -343,7 +366,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(dfruit2_state::scanline_cb) { int const scanline = param; - if (m_b109 & 1) + if (BIT(m_b109, 0)) m_irq_source = 0x10; else m_irq_source = 0x00; @@ -365,6 +388,8 @@ void dfruit2_state::dfruit2(machine_config &config) ppi.in_pb_callback().set_ioport("IN1"); ppi.in_pc_callback().set_ioport("IN2"); + HOPPER(config, m_hopper, attotime::from_msec(200)); // TODO: probably wrong period + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(58); screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); @@ -394,6 +419,7 @@ void dfruit2_state::dfruit2(machine_config &config) SPEAKER(config, "mono").front_center(); ym2203_device &ym(YM2203(config, "ym", 28_MHz_XTAL / 8)); + ym.port_a_write_callback().set(FUNC(dfruit2_state::counters_w)); ym.port_b_read_callback().set_ioport("DSW"); ym.add_route(ALL_OUTPUTS, "mono", 1.00); // divider not verified } diff --git a/src/mame/huangyeh/hy-268a.cpp b/src/mame/huangyeh/hy-268a.cpp index 28dd8574feb..d8190d6b6d0 100644 --- a/src/mame/huangyeh/hy-268a.cpp +++ b/src/mame/huangyeh/hy-268a.cpp @@ -17,7 +17,7 @@ HUANG YEH HY9826 160-pin custom (GFX related?) 2x Altera EPM70325LC44-10 FPGA U6295 ADPCM (Oki M6295 clone) UM3567 OPL (YM2413 clone) -ATMEL 93C45 EEPROM +ATMEL 93C46 EEPROM TODO: @@ -126,7 +126,7 @@ void hy268a_state::xycs(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &hy268a_state::program_map); m_maincpu->set_vblank_int("screen", FUNC(hy268a_state::irq3_line_hold)); - EEPROM_93C46_16BIT(config, "eeprom"); // 93C45 + EEPROM_93C46_16BIT(config, "eeprom"); // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO: verify everything once emulation works diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 115df5fcbe7..adbaea213ef 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -32688,6 +32688,7 @@ df_djpkr df_djpkra dphl dphla +dphlac dphljp dphlunkb drhl diff --git a/src/mame/misc/norautp.cpp b/src/mame/misc/norautp.cpp index 51000c1bb01..85dadc2c9f3 100644 --- a/src/mame/misc/norautp.cpp +++ b/src/mame/misc/norautp.cpp @@ -4567,6 +4567,42 @@ ROM_START( dphljp ) // close to GTI Poker ROM_LOAD( "japan_6301.u51", 0x0000, 0x0100, CRC(88302127) SHA1(aed1273974917673405f1234ab64e6f8b3856c34) ) ROM_END + +/* +PCB: + +"AMERICADE +S2507 DOMINO +HI/LO DOUBLE UP" + +Smaller PCB: + +AMERICADE 3523 + +8080A CPU + +2716 EPROMs + +Two 2111 SRAM + +Two 5101 SRAM +*/ +ROM_START( dphlac ) // close to dphljp. Only first program ROM and PROM differ. + ROM_REGION( 0x10000, "maincpu", 0 ) + ROM_LOAD( "hilob.u6", 0x0000, 0x0800, CRC(b87134a7) SHA1(598115ee2f2f653cc10b24db160ecb2f43a90dd0) ) + ROM_RELOAD( 0x0800, 0x0800 ) + ROM_LOAD( "hiloa.u9", 0x1000, 0x0800, CRC(ccaad5cb) SHA1(5f6ca497ccb7c535714a6e24df00f2831a7840c1) ) + ROM_RELOAD( 0x1800, 0x0800 ) + ROM_LOAD( "hiloc.u11", 0x2000, 0x0800, CRC(9f9c67d5) SHA1(cd11849b245406821af7ac3554805c9dd89645b2) ) + + ROM_REGION( 0x1000, "gfx", 0 ) + ROM_FILL( 0x0000, 0x0800, 0xff ) + ROM_LOAD( "colorhilo.new", 0x0800, 0x0800, CRC(412fc492) SHA1(094ea0ffd0c22274cfe164f07c009ffe022331fd) ) + + ROM_REGION( 0x0100, "proms", 0 ) + ROM_LOAD( "82s129.u17", 0x0000, 0x0100, CRC(e4b8c299) SHA1(deda332faf02e15b16df1cbe86ba689ee9dd8035) ) +ROM_END + /* Kimble Double HI-LO (8080). @@ -6766,6 +6802,7 @@ GAMEL( 1997, ddellf97e, ddellf97, norautxp, delv18ap, norautp_state, empty_init, GAMEL( 1982, dphl, 0, dphl, dphl, norautp_state, empty_init, ROT0, "M.Kramer Manufacturing.", "Draw Poker HI-LO (M.Kramer)", 0, layout_noraut10 ) GAMEL( 1983, dphla, 0, dphla, dphla, norautp_state, empty_init, ROT0, "", "Joker Poker (Kramer, alt)", 0, layout_noraut10 ) GAMEL( 1983, dphljp, 0, dphl, dphl, norautp_state, empty_init, ROT0, "", "Draw Poker HI-LO (Japanese)", 0, layout_noraut10 ) +GAMEL( 1983, dphlac, 0, dphl, dphl, norautp_state, empty_init, ROT0, "Americade", "Draw Poker HI-LO (Americade)", MACHINE_NOT_WORKING, layout_noraut10 ) GAMEL( 198?, newhilop, 0, dphl, newhilop, norautp_state, empty_init, ROT0, "Song Won?", "New Hi-Low Poker", 0, layout_noraut10 ) GAMEL( 198?, pkii_dm, 0, dphl, newhilop, norautp_state, empty_init, ROT0, "", "Draw Poker HI-LO (PKII/DM)", 0, layout_noraut10 ) GAMEL( 1983, krampcb2, 0, dphl, dphla, norautp_state, empty_init, ROT0, "bootleg", "Draw Poker HI-LO (bootleg, set 1)", 0, layout_noraut10 ) From 6add4dcab51fa1b99ab84ddb950f7843466fa00c Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 19 Mar 2026 17:22:54 +0100 Subject: [PATCH 325/351] src/mame/pc: sort out notes of several PC based Arcade drivers * rename gaelco/radikaldarts.cpp to gaelco/radsys.cpp, rename set to radikald; * rename pc/cuttherope.cpp to ice/cutrope.cpp; * move pc/igspc.cpp to igs folder; * add a warning note in misc/neomania.cpp, add MUP flag; --- src/mame/astrocorp/astropc.cpp | 36 +++----- src/mame/cave/cavepc.cpp | 5 +- src/mame/cave/fstgfish.cpp | 10 +-- src/mame/funworld/photoplys.cpp | 2 +- src/mame/gaelco/gaelcopc.cpp | 19 ++--- src/mame/gaelco/radikaldarts.cpp | 80 ------------------ src/mame/gaelco/radsys.cpp | 82 +++++++++++++++++++ .../{pc/cuttherope.cpp => ice/cutrope.cpp} | 30 ++++--- src/mame/ice/frenzyxprss.cpp | 17 ++-- src/mame/{pc => igs}/igspc.cpp | 0 src/mame/jaleco/jaleco_vj_pc.cpp | 2 +- src/mame/konami/otomedius.cpp | 41 ++-------- src/mame/mame.lst | 18 ++-- src/mame/misc/bntyhunt.cpp | 5 +- src/mame/misc/neomania.cpp | 12 ++- src/mame/pc/play4texash.cpp | 18 ++-- src/mame/pc/seawolfnm.cpp | 20 ++--- src/mame/pc/sshuffle.cpp | 2 +- src/mame/success/skopro.cpp | 8 +- src/mame/unico/unianapc.cpp | 11 ++- 20 files changed, 183 insertions(+), 235 deletions(-) delete mode 100644 src/mame/gaelco/radikaldarts.cpp create mode 100644 src/mame/gaelco/radsys.cpp rename src/mame/{pc/cuttherope.cpp => ice/cutrope.cpp} (62%) rename src/mame/{pc => igs}/igspc.cpp (100%) diff --git a/src/mame/astrocorp/astropc.cpp b/src/mame/astrocorp/astropc.cpp index 9475a59f5e9..1727c51074f 100644 --- a/src/mame/astrocorp/astropc.cpp +++ b/src/mame/astrocorp/astropc.cpp @@ -154,8 +154,6 @@ public: void astropc(machine_config &config); - void init_astropc(); - private: void main_map(address_map &map) ATTR_COLD; void main_io(address_map &map) ATTR_COLD; @@ -174,10 +172,6 @@ void astropc_state::main_io(address_map &map) } -static INPUT_PORTS_START( astropc ) -INPUT_PORTS_END - - void astropc_state::astropc(machine_config &config) { MEDIAGX(config, m_maincpu, 233'000'000); // Cyrix MediaGX GXm-266GP @@ -456,34 +450,30 @@ ROM_START( santacl ) ROM_END -void astropc_state::init_astropc() -{ -} - } // anonymous namespace // Pallas games -GAME( 2005, blackbd, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Black Beard (Russia, set 1)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005?, blackbda, blackbd, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Black Beard (Russia, set 2)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, blackbdb, blackbd, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Black Beard (Russia, set 3)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, blackbdu, blackbd, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Black Beard (US.00, 2005/03/14)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, blackbd, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Black Beard (Russia, set 1)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005?, blackbda, blackbd, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Black Beard (Russia, set 2)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, blackbdb, blackbd, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Black Beard (Russia, set 3)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, blackbdu, blackbd, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Black Beard (US.00, 2005/03/14)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, dslayrr, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Dragon Slayer (Russia, v15.B, 2005/08/10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2006, dslayrra, dslayrr, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Dragon Slayer (Russia, v16.B, 2005/11/10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, dslayrr, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Dragon Slayer (Russia, v15.B, 2005/08/10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2006, dslayrra, dslayrr, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Dragon Slayer (Russia, v16.B, 2005/11/10)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, hwparty, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Halloween Party (US.23.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, hwparty, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Halloween Party (US.23.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2004, hawaii, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Hawaii (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2004, hawaii, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Hawaii (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, oligam, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Olympian Games (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, oligam, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Olympian Games (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, rasce, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Ra's Scepter (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, rasce, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Ra's Scepter (Russia)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2005, treasurh, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Treasure Hunting (US.09.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2005, treasurh, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Treasure Hunting (US.09.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) // Artemis II games -GAME( 2009, carnivac, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Carnival (Astro Corp., US.004.D)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 2009, santacl, 0, astropc, astropc, astropc_state, init_astropc, ROT0, "Astro Corp.", "Santa Claus (IN.001.07.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2009, carnivac, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Carnival (Astro Corp., US.004.D)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2009, santacl, 0, astropc, 0, astropc_state, empty_init, ROT0, "Astro Corp.", "Santa Claus (IN.001.07.A)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/cave/cavepc.cpp b/src/mame/cave/cavepc.cpp index c4f2d5d3b45..6b4a3392f0b 100644 --- a/src/mame/cave/cavepc.cpp +++ b/src/mame/cave/cavepc.cpp @@ -93,9 +93,6 @@ void cavepc_state::cavepc_io(address_map &map) /*****************************************************************************/ -static INPUT_PORTS_START(cavepc) -INPUT_PORTS_END - void cavepc_state::cavepc(machine_config &config) { @@ -154,4 +151,4 @@ ROM_END /*****************************************************************************/ -GAME(2009, deathsm2, 0, cavepc, cavepc, cavepc_state, empty_init, ROT0, "Cave", "Deathsmiles II: Makai no Merry Christmas (2009/10/14 MASTER VER 4.00)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME(2009, deathsm2, 0, cavepc, 0, cavepc_state, empty_init, ROT0, "Cave", "Deathsmiles II: Makai no Merry Christmas (2009/10/14 MASTER VER 4.00)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/cave/fstgfish.cpp b/src/mame/cave/fstgfish.cpp index 2e4cf9424cf..eebfda06217 100644 --- a/src/mame/cave/fstgfish.cpp +++ b/src/mame/cave/fstgfish.cpp @@ -7,11 +7,11 @@ Festival: Goldfish Scoop (c) 2008 CAVE/PLABI/SEVENGEARS/cavia PCIe era with Gigabyte GA-G31M-S2L (rev. 1.1/2.0), connected cards doesn't matter as long as the CV1000XP/CV2000XP is connected thru USB. -- Intel G31 + ICH7 +- Intel 82G31 (GMCH) + 82801GB (ICH7) - IT8718 Super I/O -GA-G31M-S2L/GA-G31M-S2C datasheet reports these two (mutually exclusive?) -- RTL8111C (PCIe Integrated Gigabit Ethernet Controller) -- RTL8102E (PCIe Fast Ethernet NIC) +- Realtek RTL8111DL (PCIe Integrated Gigabit Ethernet Controller) +- Realtek ALC662 (HD Audio) +- Intel GMA 3100 (integrated in northbridge) Notes: - CF card looks sysprep-ed, can't boot in shutms11. @@ -67,7 +67,7 @@ goldfish.exe and copy in cmd.exe as cvgame.exe will get us a command prompt. PS2 keyboard is working, USB keyboard and mouse have been -disabled in BIOS. BIOS is easily accessible using: DEL +disabled in BIOS. BIOS is easily accessible using DEL key Use portmon to log the serial connection to the CV1000XP (COM3) then start up the game. This gives a nice log of the communication. diff --git a/src/mame/funworld/photoplys.cpp b/src/mame/funworld/photoplys.cpp index a0572a0e749..1ab65182c48 100644 --- a/src/mame/funworld/photoplys.cpp +++ b/src/mame/funworld/photoplys.cpp @@ -11,7 +11,7 @@ PCB: Intel FW82801AA (ICH), IT8888F PCI-to-ISA Bridge, CMI8738 audio I/O: Winbond W83977, Winbond W83627HF BIOS: Intel N82802AB (FWH) Dongle: Parallel port + keyboard DIN (uses both ports) with a SX28AC/DP MCU (Parallax, Ubicom, etc.). On some versions there's also a SEEPROM (93C46LN, etc.). -Net: Optional Ethernet PCI card with RTL8139C +Net: Optional Ethernet PCI card with Realtek RTL8139C */ diff --git a/src/mame/gaelco/gaelcopc.cpp b/src/mame/gaelco/gaelcopc.cpp index 438c7ccb9a3..8cb2cfe0396 100644 --- a/src/mame/gaelco/gaelcopc.cpp +++ b/src/mame/gaelco/gaelcopc.cpp @@ -11,9 +11,9 @@ TODO: likely gonna play with monitor DDC; Custom motherboard with -Intel 82815 (host + bridge + AGP devices) -Intel 82801 (PCI 2.3 + integrated LAN + IDE + USB 2.0 + AC'97 + LPC + - ACPI 2.0 + Flash BIOS control + SMBus + GPIO) +Intel 82815 GMCH (host + bridge + AGP devices) +Intel 82801 (ICH*?) (PCI 2.3 + integrated LAN + IDE + USB 2.0 + AC'97 + LPC + + ACPI 2.0 + Flash BIOS control + SMBus + GPIO) Intel 82562 (LAN) RTM 560-25R (Audio) nVidia GeForce 4 TI4200 128Mb AGP @@ -63,9 +63,6 @@ void gaelcopc_state::gaelcopc_map(address_map &map) map(0xfff80000, 0xffffffff).rom().region("bios", 0); } -static INPUT_PORTS_START( gaelcopc ) -INPUT_PORTS_END - void gaelcopc_state::gaelcopc(machine_config &config) { @@ -142,8 +139,8 @@ ROM_END } // anonymous namespace -GAME( 2003, tokyocop, 0, gaelcopc, gaelcopc, gaelcopc_state, empty_init, ROT0, "Gaelco", "Tokyo Cop (US, dedicated version)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 2003, tokyocopk, tokyocop, gaelcopc, gaelcopc, gaelcopc_state, empty_init, ROT0, "Gaelco", "Tokyo Cop (US, kit version)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 2003, tokyocopi, tokyocop, gaelcopc, gaelcopc, gaelcopc_state, empty_init, ROT0, "Gaelco", "Tokyo Cop (Italy)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 2004, rriders, 0, gaelcopc, gaelcopc, gaelcopc_state, empty_init, ROT0, "Gaelco", "Ring Riders (Software version v2.2)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) -GAME( 2005, tuningrc, 0, gaelcopc, gaelcopc, gaelcopc_state, empty_init, ROT0, "Gaelco", "Gaelco Championship Tuning Race", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2003, tokyocop, 0, gaelcopc, 0, gaelcopc_state, empty_init, ROT0, "Gaelco", "Tokyo Cop (US, dedicated version)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2003, tokyocopk, tokyocop, gaelcopc, 0, gaelcopc_state, empty_init, ROT0, "Gaelco", "Tokyo Cop (US, kit version)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2003, tokyocopi, tokyocop, gaelcopc, 0, gaelcopc_state, empty_init, ROT0, "Gaelco", "Tokyo Cop (Italy)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2004, rriders, 0, gaelcopc, 0, gaelcopc_state, empty_init, ROT0, "Gaelco", "Ring Riders (Software version v2.2)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2005, tuningrc, 0, gaelcopc, 0, gaelcopc_state, empty_init, ROT0, "Gaelco", "Gaelco Championship Tuning Race", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/gaelco/radikaldarts.cpp b/src/mame/gaelco/radikaldarts.cpp deleted file mode 100644 index d6b2ddfca68..00000000000 --- a/src/mame/gaelco/radikaldarts.cpp +++ /dev/null @@ -1,80 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders: -/* - Radikal Darts / Radikal System hardware by Gaelco Darts. - - PC hardware running Linux: - -Intel Celeron SL6C8 1200/256/100/1.5 - -Chipset: Intel NH82801BA, Intel 82815 Graphics Controller + Realtek RTM560 + IRU3013 + Intel DA82562EM Ethernet - -IDE hard disk (40GB) - -128MB RAM (1 x Kingston KVR133X64C3Q/128) - - Additional Gaelco custom riser PCB (REF. 050525) with: - -IDE connector. - -DVI connector. - -AD9288 ADC + Altera Cyclone EP1C3T144C8N FPGA + 2 x ALVCH16374 + PCM1725U + DS90C385AMT - - Note: Similar specs as gaelco/gaelcopc.cpp, including a BIOS with just different ACFG data ... -*/ - -#include "emu.h" -#include "cpu/i386/i386.h" -#include "machine/pci.h" - -namespace { - -class radikaldarts_state : public driver_device -{ -public: - radikaldarts_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag) - , m_maincpu(*this, "maincpu") - { } - - void radikaldarts(machine_config &config); - - -private: - required_device m_maincpu; - - void radikaldarts_map(address_map &map) ATTR_COLD; -}; - -void radikaldarts_state::radikaldarts_map(address_map &map) -{ - map(0x00000000, 0x0009ffff).ram(); - map(0x000e0000, 0x000fffff).rom().region("bios", 0x60000); - map(0xfff80000, 0xffffffff).rom().region("bios", 0); -} - -static INPUT_PORTS_START( radikaldarts ) -INPUT_PORTS_END - - -void radikaldarts_state::radikaldarts(machine_config &config) -{ - // Basic machine hardware - PENTIUM3(config, m_maincpu, 120'000'000); // Celeron SL6C8 1.2 GHz - m_maincpu->set_addrmap(AS_PROGRAM, &radikaldarts_state::radikaldarts_map); - - PCI_ROOT(config, "pci", 0); - // ... -} - -/*************************************************************************** - - Game drivers - -***************************************************************************/ - -ROM_START( radikaldrt ) - ROM_REGION32_LE(0x80000, "bios", 0) - ROM_LOAD("sst49lf004b_plcc32.u10", 0x00000, 0x80000, CRC(53ab9628) SHA1(5cd54ecb03e29352d8acd3e2e9be5dfbc4dd4064) ) // BIOS string: "10/16/2002-i815EP-627-6A69RPAVC-00 00" - - DISK_REGION( "ide:0:hdd" ) // Hitachi HTS541040G9AT00 - DISK_IMAGE( "hts541040g9at00_dv7.29.25", 0, BAD_DUMP SHA1(37c987c3f5493cabe9f54786702349029e0fda59) ) // Contains operator and players data -ROM_END - -} // Anonymous namespace - -GAME( 2011?, radikaldrt, 0, radikaldarts, radikaldarts, radikaldarts_state, empty_init, ROT0, "Gaelco Darts", "Radikal Darts (Diana Version 7.29.25)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/gaelco/radsys.cpp b/src/mame/gaelco/radsys.cpp new file mode 100644 index 00000000000..f0b7df0933e --- /dev/null +++ b/src/mame/gaelco/radsys.cpp @@ -0,0 +1,82 @@ +// license:BSD-3-Clause +// copyright-holders: +/* +Radikal Darts / Radikal System hardware by Gaelco Darts. + +PC hardware running Linux: +- Intel Celeron SL6C8 1200/256/100/1.5 +- Intel FW82815 (GMCH) +- Intel NH82801BA (ICH2) +- Intel 82815 Graphics Controller +- Realtek RTM560 (Clock Synth / PLL) +- IRU3013 (VRM 8.5 compatible controller, for Socket 370 based CPUs) +- Intel DA82562EM Ethernet +- IDE hard disk (40GB) +- 128MB RAM (1 x Kingston KVR133X64C3Q/128) +- EPoX based motherboard + +Additional Gaelco custom riser PCB (REF. 050525) with: +- IDE connector. +- DVI connector. +- AD9288 ADC + Altera Cyclone EP1C3T144C8N FPGA + 2 x ALVCH16374 + PCM1725U + DS90C385AMT + +Note: Similar specs as gaelco/gaelcopc.cpp, including a BIOS with just different ACFG data ... +*/ + +#include "emu.h" +#include "cpu/i386/i386.h" +#include "machine/pci.h" + +namespace { + +class radsys_state : public driver_device +{ +public: + radsys_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + { } + + void radikald(machine_config &config); + + +private: + required_device m_maincpu; + + void radsys_map(address_map &map) ATTR_COLD; +}; + +void radsys_state::radsys_map(address_map &map) +{ + map(0x00000000, 0x0009ffff).ram(); + map(0x000e0000, 0x000fffff).rom().region("bios", 0x60000); + map(0xfff80000, 0xffffffff).rom().region("bios", 0); +} + +void radsys_state::radikald(machine_config &config) +{ + // Socket 370 + PENTIUM3(config, m_maincpu, 120'000'000); // Celeron SL6C8 Tualatin-256 1.2 GHz + m_maincpu->set_addrmap(AS_PROGRAM, &radsys_state::radsys_map); + + PCI_ROOT(config, "pci", 0); + // ... +} + +/*************************************************************************** + + Game drivers + +***************************************************************************/ + +ROM_START( radikald ) + ROM_REGION32_LE(0x80000, "bios", 0) + ROM_LOAD("sst49lf004b_plcc32.u10", 0x00000, 0x80000, CRC(53ab9628) SHA1(5cd54ecb03e29352d8acd3e2e9be5dfbc4dd4064) ) // BIOS string: "10/16/2002-i815EP-627-6A69RPAVC-00 00" + + DISK_REGION( "ide:0:hdd" ) // Hitachi HTS541040G9AT00 + DISK_IMAGE( "hts541040g9at00_dv7.29.25", 0, BAD_DUMP SHA1(37c987c3f5493cabe9f54786702349029e0fda59) ) // Contains operator and players data +ROM_END + +} // Anonymous namespace + +GAME( 2011?, radikald, 0, radikald, 0, radsys_state, empty_init, ROT0, "Gaelco Darts", "Radikal Darts (Diana Version 7.29.25)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/pc/cuttherope.cpp b/src/mame/ice/cutrope.cpp similarity index 62% rename from src/mame/pc/cuttherope.cpp rename to src/mame/ice/cutrope.cpp index 91d129a9880..bbe05c5715c 100644 --- a/src/mame/pc/cuttherope.cpp +++ b/src/mame/ice/cutrope.cpp @@ -3,7 +3,7 @@ /*********************************************************************************************************** Skeleton driver for "Cut The Rope", by Innovative Concepts in Entertainment, Inc. (ICE). -Redemption game with a vertical touch sceen and ticket payout, from 2016. +Redemption game with a vertical touch screen and ticket payout, from 2016. ICE also produced a "Cut the Rope" electromechanical crane arcade machine in 2013, with a suction cup rather than a claw. @@ -24,41 +24,39 @@ And an external PCB for I/O, connected by USB to the motherboard: namespace { -class cuttherope_state : public driver_device +class cutrope_state : public driver_device { public: - cuttherope_state(const machine_config &mconfig, device_type type, const char *tag) + cutrope_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") { } - void cuttherope(machine_config &config); + void cutrope(machine_config &config); private: required_device m_maincpu; - void cuttherope_io(address_map &map) ATTR_COLD; - void cuttherope_map(address_map &map) ATTR_COLD; + void cutrope_io(address_map &map) ATTR_COLD; + void cutrope_map(address_map &map) ATTR_COLD; }; -void cuttherope_state::cuttherope_map(address_map &map) +void cutrope_state::cutrope_map(address_map &map) { } -void cuttherope_state::cuttherope_io(address_map &map) +void cutrope_state::cutrope_io(address_map &map) { } -static INPUT_PORTS_START(cuttherope) -INPUT_PORTS_END - -void cuttherope_state::cuttherope(machine_config &config) +void cutrope_state::cutrope(machine_config &config) { + // Socket H2 (!) PENTIUM4(config, m_maincpu, 100'000'000); // Exact CPU and frequency unknown - m_maincpu->set_addrmap(AS_PROGRAM, &cuttherope_state::cuttherope_map); - m_maincpu->set_addrmap(AS_IO, &cuttherope_state::cuttherope_io); + m_maincpu->set_addrmap(AS_PROGRAM, &cutrope_state::cutrope_map); + m_maincpu->set_addrmap(AS_IO, &cutrope_state::cutrope_io); PCI_ROOT(config, "pci", 0); // ... @@ -73,10 +71,10 @@ ROM_START(cutrope) ROM_LOAD("mcf51jm32vlk", 0x00000, 0x40000, NO_DUMP) // On the I/O PCB DISK_REGION("ide:0:hdd") - DISK_IMAGE("cuttherope", 0, SHA1(25be8285ca75d759962f4b59b313a97d9077747e)) + DISK_IMAGE("cutrope", 0, SHA1(25be8285ca75d759962f4b59b313a97d9077747e)) ROM_END } // anonymous namespace -GAME(2016, cutrope, 0, cuttherope, cuttherope, cuttherope_state, empty_init, ROT90, "ICE", "Cut The Rope", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME(2016, cutrope, 0, cutrope, 0, cutrope_state, empty_init, ROT90, "ICE", "Cut The Rope", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/ice/frenzyxprss.cpp b/src/mame/ice/frenzyxprss.cpp index f747df3b61c..fe0ed82ce3d 100644 --- a/src/mame/ice/frenzyxprss.cpp +++ b/src/mame/ice/frenzyxprss.cpp @@ -1,14 +1,15 @@ // license:BSD-3-Clause // copyright-holders: /* - Skeleton driver for ICE Frenzy Express. - PC-based configuration running Windows 98 SE SP3: - - 694T Pro Ver 5 motherboard (Via VT82C686B + Via VT82C694T). - - Intel Celeron CPU 1000A/256/100/1.475 Q208A083-0620 SL5ZF. - - 256MB PC133 RAM (one single M366S3253CTS-C7A module). - - InsideTNC IV011A AGP graphics card. - - Crystal CS4281-CM EP based PCI sound card. - - "FE 107 I/O" ISA card. +Skeleton driver for ICE Frenzy Express. + +PC-based configuration running Windows 98 SE SP3: +- 694T Pro Ver 5 motherboard (Via VT82C686B + Via VT82C694T). +- Intel Celeron CPU 1000A/256/100/1.475 Q208A083-0620 SL5ZF. +- 256MB PC133 RAM (one single M366S3253CTS-C7A module). +- InsideTNC IV011A AGP graphics card. a.k.a. GeForce2 MX/GTS (NV15/NV11) +- Crystal CS4281-CM EP based PCI sound card. +- "FE 107 I/O" ISA card. FE 107 I/O ________ ________ ________ ________ diff --git a/src/mame/pc/igspc.cpp b/src/mame/igs/igspc.cpp similarity index 100% rename from src/mame/pc/igspc.cpp rename to src/mame/igs/igspc.cpp diff --git a/src/mame/jaleco/jaleco_vj_pc.cpp b/src/mame/jaleco/jaleco_vj_pc.cpp index 9782716c525..d4d894ec7bd 100644 --- a/src/mame/jaleco/jaleco_vj_pc.cpp +++ b/src/mame/jaleco/jaleco_vj_pc.cpp @@ -111,7 +111,7 @@ void jaleco_vj_pc_device::device_add_mconfig(machine_config &config) m_maincpu->smiact().set("pci:00.0", FUNC(i82439hx_host_device::smi_act_w)); PCI_ROOT(config, "pci", 0); - I82439HX(config, "pci:00.0", 0, m_maincpu, 256*1024*1024); // TODO: Should be 0x11060585 VIA VT82C585 Apollo VP,VPX,VPX-97 System Controller + I82439HX(config, "pci:00.0", 0, m_maincpu, 256*1024*1024); // TODO: Should be 0x11060585 VIA VT82C585VPX Apollo System Controller i82371sb_isa_device &isa(I82371SB_ISA(config, "pci:07.0", 0, m_maincpu)); // isa.set_ids(0x11060586, 0x23, 0x060100, 0x00000000); // TODO: Should be VIA VT82C586B, PCI-to-ISA Bridge diff --git a/src/mame/konami/otomedius.cpp b/src/mame/konami/otomedius.cpp index e347f167256..54efd3b28a1 100644 --- a/src/mame/konami/otomedius.cpp +++ b/src/mame/konami/otomedius.cpp @@ -8,7 +8,7 @@ Hardware for Otomedius: - Intel Socket 478 Celeron CPU, 2.5 GHz, S-Spec "SL6ZY" More info: http://www.cpu-world.com/sspec/SL/SL6ZY.html - - Intel 82865G northbridge + - Intel 82865G northbridge "Springdale-G" - Intel 82801EB southbridge / "ICH5" Super I/O - 512MB of system RAM - ATI-branded Radeon 9600XT AGP video card with 128 MB of VRAM @@ -17,7 +17,7 @@ #include "emu.h" #include "cpu/i386/i386.h" -#include "screen.h" +#include "machine/pci.h" namespace { @@ -35,22 +35,9 @@ public: private: required_device m_maincpu; - virtual void machine_start() override ATTR_COLD; - virtual void machine_reset() override ATTR_COLD; - virtual void video_start() override ATTR_COLD; - uint32_t screen_update_konami_pc(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); void konami_pc_map(address_map &map) ATTR_COLD; }; -void konami_pc_state::video_start() -{ -} - -uint32_t konami_pc_state::screen_update_konami_pc(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) -{ - return 0; -} - void konami_pc_state::konami_pc_map(address_map &map) { map(0x00000000, 0x0009ffff).ram(); @@ -58,31 +45,15 @@ void konami_pc_state::konami_pc_map(address_map &map) map(0xfff80000, 0xffffffff).rom().region("maincpu", 0); } -static INPUT_PORTS_START( konami_pc ) -INPUT_PORTS_END - - -void konami_pc_state::machine_start() -{ -} - -void konami_pc_state::machine_reset() -{ -} void konami_pc_state::konami_pc(machine_config &config) { - /* basic machine hardware */ + // Socket 478 PENTIUM3(config, m_maincpu, 100000000); // actually Celeron m_maincpu->set_addrmap(AS_PROGRAM, &konami_pc_state::konami_pc_map); - /* video hardware */ - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size(640, 480); - screen.set_visarea(0, 640-1, 0, 480-1); - screen.set_screen_update(FUNC(konami_pc_state::screen_update_konami_pc)); + PCI_ROOT(config, "pci", 0); + // ... } /*************************************************************************** @@ -105,4 +76,4 @@ ROM_END } // anonymous namespace -GAME( 2007, otomedius, 0, konami_pc, konami_pc, konami_pc_state, empty_init, ROT0, "Konami", "Otomedius (ver GGG:J:A:A:2008041801)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 2007, otomedius, 0, konami_pc, 0, konami_pc_state, empty_init, ROT0, "Konami", "Otomedius (ver GGG:J:A:A:2008041801)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index adbaea213ef..fb4d789914a 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -18975,8 +18975,8 @@ mastboyod @source:gaelco/mastboyo_ms.cpp mastboyom -@source:gaelco/radikaldarts.cpp -radikaldrt +@source:gaelco/radsys.cpp +radikald @source:gaelco/rollext.cpp rollext @@ -20638,6 +20638,9 @@ olihockey olihockeya unkbubsc +@source:ice/cutrope.cpp +cutrope + @source:ice/fcourtfev.cpp stbasket @@ -21257,6 +21260,10 @@ xyddz xydn zjddz +@source:igs/igspc.cpp +eztouch +speeddrv + @source:igs/igspoker.cpp chleague chleaguel @@ -37530,9 +37537,6 @@ ast6000 ast611 ct486 -@source:pc/cuttherope.cpp -cutrope - @source:pc/dawg.cpp dawg @@ -37570,10 +37574,6 @@ ibm5160 ibmpcjr ibmpcjx -@source:pc/igspc.cpp -eztouch -speeddrv - @source:pc/iskr103x.cpp iskr1030m iskr1031 diff --git a/src/mame/misc/bntyhunt.cpp b/src/mame/misc/bntyhunt.cpp index 230e748a8b9..3c9de2a978b 100644 --- a/src/mame/misc/bntyhunt.cpp +++ b/src/mame/misc/bntyhunt.cpp @@ -59,9 +59,6 @@ void bntyhunt_state::bntyhunt_map(address_map &map) { } -static INPUT_PORTS_START( bntyhunt ) -INPUT_PORTS_END - void bntyhunt_state::bntyhunt(machine_config &config) { @@ -85,4 +82,4 @@ ROM_END } // anonymous namespace -GAME( 2002?, bntyhunt, 0, bntyhunt, bntyhunt, bntyhunt_state, empty_init, ROT0, "GC-Tech Co., LTD", "Bounty Hunter (GC-Tech Co., LTD)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2002?, bntyhunt, 0, bntyhunt, 0, bntyhunt_state, empty_init, ROT0, "GC-Tech Co., LTD", "Bounty Hunter (GC-Tech Co., LTD)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/misc/neomania.cpp b/src/mame/misc/neomania.cpp index 4c8509798da..491af16cfc0 100644 --- a/src/mame/misc/neomania.cpp +++ b/src/mame/misc/neomania.cpp @@ -4,7 +4,7 @@ TODO: - SIGABRT in pcipc/pciagp trying to execute ppm.exe, - in shutms11 will draw "Parallel Port Manager v4.0" then fail on device check. + in shutms11 & ls5amvp3 will draw "Parallel Port Manager v4.0" then fail on device check. \- "Testing I/O board connection" bp 100027e2, edit $25dd11 = 0x02 (board identifier?) \- "Testing I/O board communications" @@ -15,6 +15,9 @@ TODO: Goes ahead in checking each port r/w, TBD \- Fails win98 PS/2 PnP afterwards, which isn't supposed to be connected in the first place. - Extract "Guard.zip" and understand what is for; +\- WARNING: once in non-Safe Mode Windows (after drivers installation etc.) the OS has a Startup + item for the frontend (neofend.exe). If protection fails it will proceed to *wipe out* the + entire HDD, it is advised to backup the .dif before fiddling with that. =================================================================================================== @@ -71,13 +74,8 @@ void neomania_state::neomania_map(address_map &map) { } -static INPUT_PORTS_START( neomania ) -INPUT_PORTS_END - - void neomania_state::neomania(machine_config &config) { - // Basic machine hardware // Neoemu.exe requires a processor with at least MMX features PENTIUM3(config, m_maincpu, 100'000'000); // Exact hardware not specified m_maincpu->set_addrmap(AS_PROGRAM, &neomania_state::neomania_map); @@ -104,4 +102,4 @@ ROM_END } // Anonymous namespace -GAME( 2003, neomania, 0, neomania, neomania, neomania_state, empty_init, ROT0, "bootleg (Hyper M.A.R.)", "Neo Mania (Portugal)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2003, neomania, 0, neomania, 0, neomania_state, empty_init, ROT0, "bootleg (Hyper M.A.R.)", "Neo Mania (Portugal)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) diff --git a/src/mame/pc/play4texash.cpp b/src/mame/pc/play4texash.cpp index 3241b7f3b25..1c585ac816e 100644 --- a/src/mame/pc/play4texash.cpp +++ b/src/mame/pc/play4texash.cpp @@ -5,11 +5,14 @@ Skeleton driver for "Play4Texas Hold'em", by Sleic. Advantech DPX-E105, based on an Innocore / Advantech "E105MB/B" PCB (specific for embedded gaming systems): --CPU Intel Atom N270 SLB73, 1.6 GHz / 512 / 533. --512MB RAM. --Safenet Sentinel USB security dongle. --Intel NH82801GBM chipset, RTL8111CP Ethernet controller, IT8718F-S EC - LPC I/O, GL826/MX2AE12G12 USB 2.0 card reader controller. --PIC16F54 near a 4MHz xtal, Lattice ispMACH LC4256V near a 40MHz xtal, PIC16LF747, Lattice ispMACH LC4384V, CY62157EV3 SRAM. +- CPU Intel Atom N270 SLB73, 1.6 GHz / 512 / 533. +- 512MB RAM. +- Safenet Sentinel USB security dongle. +- Intel NH82801GBM chipset +- Realtek RTL8111CP Ethernet controller +- ITE IT8718F-S EC - LPC I/O +- GL826/MX2AE12G12 USB 2.0 card reader controller. +- PIC16F54 near a 4MHz xtal, Lattice ispMACH LC4256V near a 40MHz xtal, PIC16LF747, Lattice ispMACH LC4384V, CY62157EV3 SRAM. The machine has two anti-tamper switches directly connected to the PCB. @@ -58,9 +61,6 @@ void play4texash_state::play4texash_io(address_map &map) { } -static INPUT_PORTS_START(play4texash) -INPUT_PORTS_END - void play4texash_state::play4texash(machine_config &config) { PENTIUM4(config, m_maincpu, 100'000'000); // Intel Atom N270 SLB73, 1.6 GHz / 512 / 533 @@ -94,4 +94,4 @@ ROM_END } // anonymous namespace -GAME(2011, play4texash, 0, play4texash, play4texash, play4texash_state, empty_init, ROT0, "Sleic", "Play4Texas Hold'em", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME(2011, play4texash, 0, play4texash, 0, play4texash_state, empty_init, ROT0, "Sleic", "Play4Texas Hold'em", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/pc/seawolfnm.cpp b/src/mame/pc/seawolfnm.cpp index 977dacf805c..3693affee7c 100644 --- a/src/mame/pc/seawolfnm.cpp +++ b/src/mame/pc/seawolfnm.cpp @@ -1,21 +1,20 @@ // license:BSD-3-Clause // copyright-holders: - /**************************************************************************** Skeleton driver for "Sea Wolf - Next Mission", from Coastal Amusements Inc. -Based on an Foxconn "45CMX" PCB: --Intel Celeron SL9XN 1.8GHz/512/800/06 CPU. --1024MB DDR2-667 RAM. --North Bridge: Intel 945GC/945G chipset; South Bridge: Intel ICH7. - -Jaton Video-PX8400GS-EX video board with 512 MB RAM (NVIDIA GeForce 8400GS). +Based on an Foxconn 45CMX-X PCB: +- Intel Celeron SL9XN 1.8GHz/512/800/06 CPU. +- 1024MB DDR2-667 RAM. +- Intel 82945GC GMCH North Bridge; +- Intel 82801GB ICH7 South Bridge; +- Jaton Video-PX8400GS-EX video board with 512 MB RAM (NVIDIA GeForce 8400GS). Coastal Game I/O PCB: --Atmel 89C5131A near a 24MHz cristal. --Buttons for set and calibration. --Etc. +- Atmel 89C5131A near a 24MHz cristal. +- Buttons for set and calibration. +- Etc. ****************************************************************************/ @@ -61,6 +60,7 @@ INPUT_PORTS_END void seawolfnm_state::seawolfnm(machine_config &config) { + // Socket T LGA775 PENTIUM4(config, m_maincpu, 100'000'000); // Actually an Intel Celeron SL9XN 1.8GHz m_maincpu->set_addrmap(AS_PROGRAM, &seawolfnm_state::seawolfnm_map); m_maincpu->set_addrmap(AS_IO, &seawolfnm_state::seawolfnm_io); diff --git a/src/mame/pc/sshuffle.cpp b/src/mame/pc/sshuffle.cpp index 481cd9024d0..8811c754cbb 100644 --- a/src/mame/pc/sshuffle.cpp +++ b/src/mame/pc/sshuffle.cpp @@ -4,7 +4,7 @@ Skeleton driver for Arachnid "Super Shuffle" (electromechanical + video). -Based on an Asus "M2N68-AM PLUS" PCB: +Based on an Asus M2N68-AM PLUS PCB: - AMD Sempron SDX140HBK13GQ CPU. - Nvidia MCP68S - Realtek ALC662 audio diff --git a/src/mame/success/skopro.cpp b/src/mame/success/skopro.cpp index a540e349d98..1e48aaeb7dd 100644 --- a/src/mame/success/skopro.cpp +++ b/src/mame/success/skopro.cpp @@ -11,6 +11,7 @@ Hitachi Deskstar HDS721680PLA320 80 GB EGIS2JVS V1.2 card Windows XP embedded + TODO: north/southbridge? The system was meant to be modular, but only 2 titles are said to have been actually released. @@ -49,12 +50,9 @@ void skopro_state::skopro_map(address_map &map) { } -static INPUT_PORTS_START( skopro ) -INPUT_PORTS_END - void skopro_state::skopro(machine_config &config) { - /* basic machine hardware */ + // Socket T PENTIUM4(config, m_maincpu, 100'000'000); // actually a Pentium E2160 at 1.80 GHz m_maincpu->set_addrmap(AS_PROGRAM, &skopro_state::skopro_map); m_maincpu->set_disable(); @@ -80,4 +78,4 @@ ROM_END } // anonymous namespace -GAME( 2008, drgdance, 0, skopro, skopro, skopro_state, empty_init, ROT0, "Success", "Dragon Dance (V1.02J)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) +GAME( 2008, drgdance, 0, skopro, 0, skopro_state, empty_init, ROT0, "Success", "Dragon Dance (V1.02J)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/unico/unianapc.cpp b/src/mame/unico/unianapc.cpp index 8fc21d332aa..30f8f1f7f92 100644 --- a/src/mame/unico/unianapc.cpp +++ b/src/mame/unico/unianapc.cpp @@ -9,6 +9,8 @@ Intel Celeron CPU, 1.70GHz MSI MS-6566E VER: 2 motherboard + Intel RG82845E (MCH) + Intel FW82801BA (ICH2) Samsung 256MB DDR PC2100 CL2.5 RAM Inside TNC 128MB(?) VGA Graphics Video Card E-G012-01-1247 <- seems to be a Korean OEM for nVidia GeForce2 MX400 (NV11) -AS Dynamic 4281 Rev. A sound card by Jin Information Technology with Crystal CS4281 sound chip @@ -54,12 +56,9 @@ void unianapc_state::unianapc_map(address_map &map) { } -static INPUT_PORTS_START( unianapc ) -INPUT_PORTS_END - void unianapc_state::unianapc(machine_config &config) { - /* basic machine hardware */ + // Socket 478 PENTIUM3(config, m_maincpu, 100'000'000); // actually a Celeron at 1.70 GHz m_maincpu->set_addrmap(AS_PROGRAM, &unianapc_state::unianapc_map); m_maincpu->set_disable(); @@ -102,5 +101,5 @@ ROM_END } // anonymous namespace -GAME( 2002, dhunting, 0, unianapc, unianapc, unianapc_state, empty_init, ROT0, "Game Box Entertainment", "Dream Hunting (US)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Ver 1007? -GAME( 2003, hogwild, 0, unianapc, unianapc, unianapc_state, empty_init, ROT0, "Uniana", "Hog Wild (US)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Ver.00.26.b? +GAME( 2002, dhunting, 0, unianapc, 0, unianapc_state, empty_init, ROT0, "Game Box Entertainment", "Dream Hunting (US)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Ver 1007? +GAME( 2003, hogwild, 0, unianapc, 0, unianapc_state, empty_init, ROT0, "Uniana", "Hog Wild (US)", MACHINE_NO_SOUND | MACHINE_NOT_WORKING ) // Ver.00.26.b? From 82700bfac0f0e9896a119cdf61df4ebe6ef9713c Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Thu, 19 Mar 2026 19:09:47 +0200 Subject: [PATCH 326/351] luxor/abc1600: WIP. --- src/mame/luxor/abc1600.cpp | 14 +++++--------- src/mame/luxor/abc1600_mmu.cpp | 10 +++++----- 2 files changed, 10 insertions(+), 14 deletions(-) diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 1ce1f953a70..58632c1b792 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -6,7 +6,6 @@ How to create HDD image: ------------------------ - ./chdman createhd -chs 615,4,17 -ss 512 -o necd5126a.chd ./chdman createhd -chs 1024,8,17 -ss 512 -o micr1325a.chd How to format HDD: @@ -24,9 +23,8 @@ mf(2,0) mf(2,0) abcenix - loadsys1 - - + loadsys1 -wt micr1325a -we sa40 -bs 512 + loadsys ABCenix <= D-NIX <= AT&T Unix System V @@ -37,11 +35,9 @@ TODO: - write to floppy fails with status 0x04 (lost byte) after commit 339bb2758640202e5378a1c2b1c19b2ef46fa1d9 - - abcenix panics while booting after commit 78661e9aa92c7e43c9a96039e7dfb3dabc79a287 - systest1600 failures - CIO timer (works if CIO clock is 4219000) - DMA (expects to read 0xff from 0x18000..) - - loadsys1 core dump (/etc/mkfs -b 1024 -v 69000 /dev/sa40) - crashes after reset - Z80 SCC/DART interrupt chain - [:2a:chb] - TX FIFO is full, discarding data @@ -597,7 +593,7 @@ void abc1600_state::dmadis_w(int state) LOG("%s _DMADIS %d\n", machine().describe_context(), state); m_dmadis = state; - + update_br(); } @@ -1206,7 +1202,7 @@ ROM_START( abc1600 ) ROM_LOAD( "1031", 0x71c, 0x144, CRC(0aedc9fc) SHA1(2cbbc7d5cb16b410d296062feb77ed26ff01af24) ) // NS32081 IN ABC1600 ROM_REGION( 0x20, NMC9306_TAG, 0 ) - ROM_LOAD( "nmc9306.14c", 0x00, 0x20, CRC(1cb59b6e) SHA1(3c955a667034db86fa1b848f0c0317157a3a48f6) ) + ROM_LOAD( "nmc9306.14c", 0x00, 0x20, CRC(0edfc912) SHA1(a4d080456d32a6731d8969dd3727fba76cfe252d) ) ROM_END } // anonymous namespace @@ -1218,4 +1214,4 @@ ROM_END //************************************************************************** // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS -COMP( 1985, abc1600, 0, 0, abc1600, abc1600, abc1600_state, empty_init, "Luxor", "ABC 1600", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) +COMP( 1985, abc1600, 0, 0, abc1600, abc1600, abc1600_state, empty_init, "Luxor", "ABC 1600", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_CONTROLS | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/luxor/abc1600_mmu.cpp b/src/mame/luxor/abc1600_mmu.cpp index 15c0d8530cb..e39332518b6 100644 --- a/src/mame/luxor/abc1600_mmu.cpp +++ b/src/mame/luxor/abc1600_mmu.cpp @@ -91,8 +91,8 @@ abc1600_mmu_device::abc1600_mmu_device(machine_config const &mconfig, char const { } -abc1600_mmu_device::mmu::mmu(m68008_device *maincpu, address_space &boot, address_space &program, address_space &cpu_space, address_space &mac_space, u8 *segment_ram, u16 *page_ram) : - m_maincpu(maincpu), +abc1600_mmu_device::mmu::mmu(m68008_device *maincpu, address_space &boot, address_space &program, address_space &cpu_space, address_space &mac_space, u8 *segment_ram, u16 *page_ram) : + m_maincpu(maincpu), m_segment_ram(segment_ram), m_page_ram(page_ram), m_a_boot(boot), @@ -223,7 +223,7 @@ bool abc1600_mmu_device::mmu::translate(int spacenum, int intention, offs_t &add target_space = &m_a_mac_space; return true; } - + bool nonx, wp; address = get_physical_address(address, intention, nonx, wp); @@ -241,7 +241,7 @@ u8 abc1600_mmu_device::mmu::mmu_read(offs_t logical, int intention) if (!ifc2(intention) && BIT(logical, 19)) return m_s_program.read_interruptible(logical); - + bool nonx, wp; offs_t physical = get_physical_address(logical, intention, nonx, wp); @@ -276,7 +276,7 @@ u8 abc1600_mmu_device::mmu::read_program(offs_t logical) return mmu_read(logical, TR_FETCH); } -void abc1600_mmu_device::mmu::write_program(offs_t logical, u8 data) +void abc1600_mmu_device::mmu::write_program(offs_t logical, u8 data) { mmu_write(logical, data); } From 9816d2f2f051788ca0f58e233c3e70066b1be45a Mon Sep 17 00:00:00 2001 From: hap Date: Thu, 19 Mar 2026 18:24:17 +0100 Subject: [PATCH 327/351] gng: update notes after msg from dink about palette glitch --- src/mame/capcom/gng.cpp | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/src/mame/capcom/gng.cpp b/src/mame/capcom/gng.cpp index 9ec3f8f76ca..cb58d82d14e 100644 --- a/src/mame/capcom/gng.cpp +++ b/src/mame/capcom/gng.cpp @@ -2,11 +2,10 @@ // copyright-holders:Pierpaolo Prazzoli /*************************************************************************** -Ghosts'n Goblins -Diamond Run - +Capcom Ghosts'n Goblins hardware Notes: + - Diamond Run doesn't use all the ROMs. d5 is not used at all, and the second half of d3o is not used either. There are 0x38 levels in total, the data for levels 0x00-0x0f is taken from ROM space 0x8000-0xbfff, the data for levels @@ -20,14 +19,17 @@ Notes: - Increased "sprites" to address 0x400 sprites, to avoid Ghosts'n Goblins drawing a bad sprite. (18/08/2005 Pierpaolo Prazzoli) +- There is no watchdog in GnG, as previously stated in the MAME driver. + Instead, there is a DMA circuit that copies object data from the CPU RAM to + a buffer, this also slows down the CPU as it is halted during that time. + The DMA is triggered when a certain memory location is addressed. That + location was thought to be a watchdog before. - Jose Tejada (jotego) -Notes by Jose Tejada (jotego): - -There is no watchdog in GnG, as previously stated in the MAME driver. -Instead, there is a DMA circuit that copies object data from the CPU RAM to a buffer, -this also slows down the CPU as it is halted during that time. -The DMA is triggered when a certain memory location is addressed. That location was -thought to be a watchdog before. +- Writing to palette during active display causes bus conflicts, this happens + at busy moments and the vblank routine overflows to the next frame, see: + https://www.youtube.com/watch?v=h7473QQwZYA&t=1301s + https://www.youtube.com/watch?v=KWUphU2rx9Y&t=1439s + The glitchy 'lightning' effect is currently not emulated. ***************************************************************************/ @@ -633,7 +635,7 @@ void gng_state::diamrun(machine_config &config) /* Newer PCB, with visible wires and mask ROMs (85606-A-5 / 85606-B-4). The ROM contents are a mix between 'gnga' and 'makaimurb'. - + The ROM configuration is set with a jumpers bank at 1F. Mask ROMs: EPROMs (eg. gnga): J2 = Short Open From bc49262fbf33bd85cd5d438e712656b5da7f51a2 Mon Sep 17 00:00:00 2001 From: angelosa Date: Thu, 19 Mar 2026 20:29:21 +0100 Subject: [PATCH 328/351] bus/isa: add the original Microsoft Sound System card --- scripts/src/bus.lua | 2 + src/devices/bus/isa/isa_cards.cpp | 2 + src/devices/bus/isa/wss.cpp | 73 +++++++++++++++++++++++++++++++ src/devices/bus/isa/wss.h | 40 +++++++++++++++++ src/mame/pc/conliner.cpp | 3 +- 5 files changed, 119 insertions(+), 1 deletion(-) create mode 100644 src/devices/bus/isa/wss.cpp create mode 100644 src/devices/bus/isa/wss.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index c1e0d0c1c1f..bbf5047396d 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -2973,6 +2973,8 @@ if BUSES["ISA"] then MAME_DIR .. "src/devices/bus/isa/wd1007a.h", MAME_DIR .. "src/devices/bus/isa/wdxt_gen.cpp", MAME_DIR .. "src/devices/bus/isa/wdxt_gen.h", + MAME_DIR .. "src/devices/bus/isa/wss.cpp", + MAME_DIR .. "src/devices/bus/isa/wss.h", MAME_DIR .. "src/devices/bus/isa/xsu_cards.cpp", MAME_DIR .. "src/devices/bus/isa/xsu_cards.h", MAME_DIR .. "src/devices/bus/isa/xtide.cpp", diff --git a/src/devices/bus/isa/isa_cards.cpp b/src/devices/bus/isa/isa_cards.cpp index f16f94fda11..2befce31841 100644 --- a/src/devices/bus/isa/isa_cards.cpp +++ b/src/devices/bus/isa/isa_cards.cpp @@ -78,6 +78,7 @@ #include "sblaster.h" #include "ssi2001.h" #include "stereo_fx.h" +#include "wss.h" // network #include "3c503.h" @@ -233,6 +234,7 @@ void pc_isa16_cards(device_slot_interface &device) device.option_add("omti8621", ISA16_OMTI8621); device.option_add("lrk331", LRK331); device.option_add("hpblp", HPBLP); + device.option_add("wss", ISA16_WSS); // EISA cards // TODO: move to own block diff --git a/src/devices/bus/isa/wss.cpp b/src/devices/bus/isa/wss.cpp new file mode 100644 index 00000000000..24235784237 --- /dev/null +++ b/src/devices/bus/isa/wss.cpp @@ -0,0 +1,73 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +/************************************************************************************************** + +Microsoft Windows Sound System based cards + +TODO: +- Untested; +- Configuration jumpers; + +**************************************************************************************************/ + +#include "emu.h" +#include "wss.h" + +#include "speaker.h" + +DEFINE_DEVICE_TYPE(ISA16_WSS, isa16_wss_device, "wss", "Microsoft Windows Sound System (original design)") + +isa16_wss_device::isa16_wss_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, ISA16_WSS, tag, owner, clock) + , device_isa16_card_interface(mconfig, *this) + , m_opl3(*this, "opl3") + , m_soundport(*this, "soundport") +{ +} + + +void isa16_wss_device::device_add_mconfig(machine_config &config) +{ + SPEAKER(config, "speaker", 2).front(); + + YMF262(config, m_opl3, XTAL(14'318'181)); + m_opl3->add_route(0, "speaker", 1.0, 0); + m_opl3->add_route(1, "speaker", 1.0, 1); + m_opl3->add_route(2, "speaker", 1.0, 0); + m_opl3->add_route(3, "speaker", 1.0, 1); + + AD1848(config, m_soundport, 0); + m_soundport->irq().set([this] (int state) { m_isa->irq7_w(state); }); + m_soundport->drq().set([this] (int state) { m_isa->drq0_w(state); }); + +} + +void isa16_wss_device::device_start() +{ + set_isa_device(); + m_isa->set_dma_channel(0, this, false); +} + +void isa16_wss_device::device_reset() +{ + remap(AS_IO, 0, 0xffff); +} + +void isa16_wss_device::remap(int space_id, offs_t start, offs_t end) +{ + if (space_id == AS_IO) + { + m_isa->install_device(0x0220, 0x022f, *this, &isa16_wss_device::host_io); + + m_isa->install_device(0x0388, 0x038b, read8sm_delegate(*m_opl3, FUNC(ymf262_device::read)), write8sm_delegate(*m_opl3, FUNC(ymf262_device::write))); + + m_isa->install_device(0x0534, 0x0537, read8sm_delegate(*m_soundport, FUNC(ad1848_device::read)), write8sm_delegate(*m_soundport, FUNC(ad1848_device::write))); + } +} + +void isa16_wss_device::host_io(address_map &map) +{ + map(0x00, 0x03).rw(m_opl3, FUNC(ymf262_device::read), FUNC(ymf262_device::write)); + map(0x04, 0x07).rw(m_soundport, FUNC(ad1848_device::read), FUNC(ad1848_device::write)); + map(0x08, 0x09).rw(m_opl3, FUNC(ymf262_device::read), FUNC(ymf262_device::write)); +} diff --git a/src/devices/bus/isa/wss.h b/src/devices/bus/isa/wss.h new file mode 100644 index 00000000000..1fa951a33e3 --- /dev/null +++ b/src/devices/bus/isa/wss.h @@ -0,0 +1,40 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_ISA_WSS_H +#define MAME_BUS_ISA_WSS_H + +#pragma once + +#include "isa.h" +#include "sound/ad1848.h" +#include "sound/ymopl.h" + +class isa16_wss_device : public device_t, + public device_isa16_card_interface +{ +public: + isa16_wss_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + static constexpr feature_type imperfect_features() { return feature::SOUND; } + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + + virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; + // virtual ioport_constructor device_input_ports() const override ATTR_COLD; + + virtual void remap(int space_id, offs_t start, offs_t end) override; + +private: + required_device m_opl3; + required_device m_soundport; + + void host_io(address_map &map); +}; + + +DECLARE_DEVICE_TYPE(ISA16_WSS, isa16_wss_device) + +#endif // MAME_BUS_ISA_WSS_H diff --git a/src/mame/pc/conliner.cpp b/src/mame/pc/conliner.cpp index 6ecdd8974cb..db440e79d8e 100644 --- a/src/mame/pc/conliner.cpp +++ b/src/mame/pc/conliner.cpp @@ -6,7 +6,7 @@ The machines need an online server to work, they won't boot up the games without it. More info: https://www.recreativas.org/onliner-6342-comatel - -Gigabyte GA-7VKMP Rev 3.4 motherboard (VIA KM266, VIA T8235, IT8705F, RTL8100BL, ALC650, etc.). + -Gigabyte GA-7VKMP Rev 3.4 motherboard (VIA VT8375 KM266, VIA VT8235, IT8705F, RTL8100BL, ALC650, etc.). -256MB RAM PC2700 DDR -AMD Athlon AXDA1800DLT3C processor. -ATI Rage 128 Pro 32MB AGP video. @@ -75,6 +75,7 @@ INPUT_PORTS_END void conliner_state::conliner(machine_config &config) { + // Socket A PGA462 PENTIUM(config, m_maincpu, 166'000'000); // Actually an AMD Athlon AXDA1800DLT3C m_maincpu->set_addrmap(AS_PROGRAM, &conliner_state::mem_map); From 6468f2eae51f4668b8326ae165e3bfc43f48ba5e Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Fri, 20 Mar 2026 07:52:07 +1100 Subject: [PATCH 329/351] -dynax/ddenlovr.cpp: Use slotted control panels. * This is most useful for the games that can support several panel types, especially when the hanaroku panel is supported. * Added preliminary support for Hanafuda Hana Gokou joystick controls, improved some DIP switch settings a little. * emu/inpttype.ipp: Added 3P and 4P hanafuda controls, moved some gambling controls to the "other" group. * shared/mahjong.cpp: Added a simple slot system for standard mahjong and hanafuda matrix panels (up to 6*6). -konami/kontest.cpp: Only loop over 8*8 blocks that need to be drawn. --- src/emu/inpttype.ipp | 44 ++- src/mame/dynax/ddenlovr.cpp | 520 +++++++++++++++++------------------- src/mame/konami/kontest.cpp | 25 +- src/mame/shared/mahjong.cpp | 297 ++++++++++++++++++++ src/mame/shared/mahjong.h | 52 ++++ 5 files changed, 639 insertions(+), 299 deletions(-) diff --git a/src/emu/inpttype.ipp b/src/emu/inpttype.ipp index 2ee9d624da1..35c859a9da0 100644 --- a/src/emu/inpttype.ipp +++ b/src/emu/inpttype.ipp @@ -100,11 +100,11 @@ namespace { #define CORE_INPUT_TYPES_GAMBLE \ CORE_INPUT_TYPES_BEGIN(gamble) \ - INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_KEYIN, N_p("input-name", "Key In"), input_seq(KEYCODE_Q) ) \ - INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_KEYOUT, N_p("input-name", "Key Out"), input_seq(KEYCODE_W) ) \ - INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_SERVICE, N_p("input-name", "Service"), input_seq(KEYCODE_9) ) \ - INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_BOOK, N_p("input-name", "Book-Keeping"), input_seq(KEYCODE_0) ) \ - INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_PAYOUT, N_p("input-name", "Payout"), input_seq(KEYCODE_4) ) \ + INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_KEYIN, N_p("input-name", "Key In"), input_seq(KEYCODE_Q) ) \ + INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_KEYOUT, N_p("input-name", "Key Out"), input_seq(KEYCODE_W) ) \ + INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_SERVICE, N_p("input-name", "Service"), input_seq(KEYCODE_9) ) \ + INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_BOOK, N_p("input-name", "Bookkeeping"), input_seq(KEYCODE_0) ) \ + INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_PAYOUT, N_p("input-name", "Payout"), input_seq(KEYCODE_4) ) \ INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_BET, N_p("input-name", "Bet"), input_seq(KEYCODE_M) ) \ INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_DEAL, N_p("input-name", "Deal"), input_seq(KEYCODE_2) ) \ INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_STAND, N_p("input-name", "Stand"), input_seq(KEYCODE_L) ) \ @@ -283,6 +283,20 @@ namespace { INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, MAHJONG_LAST_CHANCE, N_p("input-name", "%p Mahjong Last Chance"), input_seq(KEYCODE_RALT_INDEXED(2)) ) \ CORE_INPUT_TYPES_END() +#define CORE_INPUT_TYPES_P3_HANAFUDA \ + CORE_INPUT_TYPES_BEGIN(p3_hanafuda) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_A, N_p("input-name", "%p Hanafuda A/1"), input_seq(KEYCODE_A_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_B, N_p("input-name", "%p Hanafuda B/2"), input_seq(KEYCODE_B_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_C, N_p("input-name", "%p Hanafuda C/3"), input_seq(KEYCODE_C_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_D, N_p("input-name", "%p Hanafuda D/4"), input_seq(KEYCODE_D_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_E, N_p("input-name", "%p Hanafuda E/5"), input_seq(KEYCODE_E_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_F, N_p("input-name", "%p Hanafuda F/6"), input_seq(KEYCODE_F_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_G, N_p("input-name", "%p Hanafuda G/7"), input_seq(KEYCODE_G_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_H, N_p("input-name", "%p Hanafuda H/8"), input_seq(KEYCODE_H_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_YES, N_p("input-name", "%p Hanafuda Yes"), input_seq(KEYCODE_M_INDEXED(2)) ) \ + INPUT_PORT_DIGITAL_TYPE( 3, PLAYER3, HANAFUDA_NO, N_p("input-name", "%p Hanafuda No"), input_seq(KEYCODE_N_INDEXED(2)) ) \ + CORE_INPUT_TYPES_END() + #define CORE_INPUT_TYPES_P4 \ CORE_INPUT_TYPES_BEGIN(p4) \ INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, JOYSTICK_UP, N_p("input-name", "%p Up"), input_seq(KEYCODE_8_PAD) ) \ @@ -350,6 +364,20 @@ namespace { INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, MAHJONG_LAST_CHANCE, N_p("input-name", "%p Mahjong Last Chance"), input_seq(KEYCODE_RALT_INDEXED(3)) ) \ CORE_INPUT_TYPES_END() +#define CORE_INPUT_TYPES_P4_HANAFUDA \ + CORE_INPUT_TYPES_BEGIN(p4_hanafuda) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_A, N_p("input-name", "%p Hanafuda A/1"), input_seq(KEYCODE_A_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_B, N_p("input-name", "%p Hanafuda B/2"), input_seq(KEYCODE_B_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_C, N_p("input-name", "%p Hanafuda C/3"), input_seq(KEYCODE_C_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_D, N_p("input-name", "%p Hanafuda D/4"), input_seq(KEYCODE_D_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_E, N_p("input-name", "%p Hanafuda E/5"), input_seq(KEYCODE_E_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_F, N_p("input-name", "%p Hanafuda F/6"), input_seq(KEYCODE_F_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_G, N_p("input-name", "%p Hanafuda G/7"), input_seq(KEYCODE_G_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_H, N_p("input-name", "%p Hanafuda H/8"), input_seq(KEYCODE_H_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_YES, N_p("input-name", "%p Hanafuda Yes"), input_seq(KEYCODE_M_INDEXED(3)) ) \ + INPUT_PORT_DIGITAL_TYPE( 4, PLAYER4, HANAFUDA_NO, N_p("input-name", "%p Hanafuda No"), input_seq(KEYCODE_N_INDEXED(3)) ) \ + CORE_INPUT_TYPES_END() + #define CORE_INPUT_TYPES_P5 \ CORE_INPUT_TYPES_BEGIN(p5) \ INPUT_PORT_DIGITAL_TYPE( 5, PLAYER5, JOYSTICK_UP, N_p("input-name", "%p Up"), input_seq() ) \ @@ -983,8 +1011,10 @@ CORE_INPUT_TYPES_P2_MAHJONG CORE_INPUT_TYPES_P2_HANAFUDA CORE_INPUT_TYPES_P3 CORE_INPUT_TYPES_P3_MAHJONG +CORE_INPUT_TYPES_P3_HANAFUDA CORE_INPUT_TYPES_P4 CORE_INPUT_TYPES_P4_MAHJONG +CORE_INPUT_TYPES_P4_HANAFUDA CORE_INPUT_TYPES_P5 CORE_INPUT_TYPES_P6 CORE_INPUT_TYPES_P7 @@ -1042,8 +1072,10 @@ constexpr size_t core_input_types_count() CORE_INPUT_TYPES_P2_HANAFUDA CORE_INPUT_TYPES_P3 CORE_INPUT_TYPES_P3_MAHJONG + CORE_INPUT_TYPES_P3_HANAFUDA CORE_INPUT_TYPES_P4 CORE_INPUT_TYPES_P4_MAHJONG + CORE_INPUT_TYPES_P4_HANAFUDA CORE_INPUT_TYPES_P5 CORE_INPUT_TYPES_P6 CORE_INPUT_TYPES_P7 @@ -1099,8 +1131,10 @@ ATTR_COLD inline void emplace_core_types(std::vector &typelist emplace_core_types_p2_hanafuda(typelist); emplace_core_types_p3(typelist); emplace_core_types_p3_mahjong(typelist); + emplace_core_types_p3_hanafuda(typelist); emplace_core_types_p4(typelist); emplace_core_types_p4_mahjong(typelist); + emplace_core_types_p4_hanafuda(typelist); emplace_core_types_p5(typelist); emplace_core_types_p6(typelist); emplace_core_types_p7(typelist); diff --git a/src/mame/dynax/ddenlovr.cpp b/src/mame/dynax/ddenlovr.cpp index 12f23991635..ad76a00ba0b 100644 --- a/src/mame/dynax/ddenlovr.cpp +++ b/src/mame/dynax/ddenlovr.cpp @@ -118,6 +118,10 @@ TODO: - jongoh: a lightning effect during transitions in attract mode doesn't seem to be rendered correctly (hw reference: https://www.youtube.com/watch?v=ytJiqOvHKgM) +- hginga: how are the 2P Start and 2P Bet buttons read for the hanaroku panel? + +- hgokou: joystick controls are incomplete + Notes: - all games using black as default palette is trusted from a real rongrong PCB; @@ -129,7 +133,6 @@ Notes: #include "emu.h" #include "dynax_blitter_rev2.h" -#include "hanafuda.h" #include "mjdipsw.h" #include "mahjong.h" @@ -163,8 +166,50 @@ Notes: #define LOGBLIT(...) LOGMASKED(LOG_BLIT, __VA_ARGS__) +DECLARE_DEVICE_TYPE(HGOKOU_JOYSTICK, device_mahjong_panel_interface) + namespace { +INPUT_PORTS_START(hgokou_joystick) + PORT_START("IN") + PORT_BIT(0x03, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT) PORT_PLAYER(1) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_PLAYER(1) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_PLAYER(1) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1) +INPUT_PORTS_END + + +class hgokou_joystick_device : public device_t, public device_mahjong_panel_interface +{ +public: + hgokou_joystick_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + device_t(mconfig, HGOKOU_JOYSTICK, tag, owner, clock), + device_mahjong_panel_interface(mconfig, *this), + m_in(*this, "IN") + { + } + + virtual u8 read(u8 select) override { return m_in->read(); } + +protected: + ioport_constructor device_input_ports() const override ATTR_COLD + { + return INPUT_PORTS_NAME(hgokou_joystick); + } + + virtual void device_start() override ATTR_COLD { } + +private: + required_ioport m_in; +}; + + + /*************************************************************************** Blitter Data Format @@ -200,6 +245,44 @@ static const int hanakanz_commands[8] = { BLIT_NEXT, BLIT_CHANGE_PEN, BLIT_ static const int mjflove_commands[8] = { BLIT_STOP, BLIT_CHANGE_PEN, BLIT_CHANGE_NUM, BLIT_UNKNOWN, BLIT_SKIP, BLIT_COPY, BLIT_LINE, BLIT_NEXT }; +void standard_panels(device_slot_interface &device) +{ + device.option_add("mj", MAHJONG_MEDAL_PANEL); + device.option_add("mjam", MAHJONG_PANEL); + device.option_add("hf", HANAFUDA_MEDAL_PANEL); + device.option_add("hfam", HANAFUDA_PANEL); +} + +void mahjong_medal_panel(device_slot_interface &device) +{ + device.option_add("mj", MAHJONG_MEDAL_PANEL); +} + +void hanafuda_medal_panel(device_slot_interface &device) +{ + device.option_add("hf", HANAFUDA_MEDAL_PANEL); +} + +void medal_panels(device_slot_interface &device) +{ + device.option_add("mj", MAHJONG_MEDAL_PANEL); + device.option_add("hf", HANAFUDA_MEDAL_PANEL); +} + +void hginga_panels(device_slot_interface &device) +{ + medal_panels(device); + device.option_add("hr", HANAROKU_PANEL); +} + +void hgokou_panels(device_slot_interface &device) +{ + standard_panels(device); + device.option_add("hr", HANAROKU_PANEL); + device.option_add("joy", HGOKOU_JOYSTICK); +} + + class ddenlovr_state : public driver_device { public: @@ -209,12 +292,12 @@ public: , m_screen(*this, "screen") , m_palette(*this, "palette") , m_mainlatch(*this, "mainlatch") + , m_key_matrix(*this, "panel%u", 1U) , m_hopper(*this, "hopper") , m_blitter_irq_handler(*this) , m_oki(*this, "oki") , m_protection1(*this, "protection1") , m_protection2(*this, "protection2") - , m_io_key{ { *this, "KEY%u", 0U }, { *this, "KEY%u", 5U } } , m_io_fake(*this, "FAKE") { } @@ -393,7 +476,7 @@ private: uint8_t hginga_dsw_r(); void mjflove_okibank_w(uint8_t data); uint8_t seljan2_dsw_r(); - uint8_t hgokou_player_r( int player ); + uint8_t hgokou_player_r(int player); protected: void ddenlovr_flipscreen_w(uint8_t data); @@ -450,6 +533,7 @@ protected: required_device m_screen; required_device m_palette; optional_device m_mainlatch; + optional_device_array m_key_matrix; optional_device m_hopper; devcb_write_line m_blitter_irq_handler; @@ -458,9 +542,6 @@ protected: private: optional_shared_ptr m_protection1; optional_shared_ptr m_protection2; -protected: - optional_ioport_array<5> m_io_key[2]; -private: optional_ioport m_io_fake; protected: std::unique_ptr m_ddenlovr_pixmap[8]; @@ -660,6 +741,7 @@ public: void hanakanz(machine_config &config) ATTR_COLD; void jongtei(machine_config &config) ATTR_COLD; void jongteia(machine_config &config) ATTR_COLD; + void htsubaki(machine_config &config) ATTR_COLD; void mjchuuka(machine_config &config) ATTR_COLD; void mjreach1(machine_config &config) ATTR_COLD; void daimyojn(machine_config &config) ATTR_COLD; @@ -2072,13 +2154,7 @@ void ddenlovr_state::keyboard_select_w(uint8_t data) template uint8_t ddenlovr_state::keyb_r() { - uint8_t result = 0x3f; - - for (int i = 0; i < 5; i++) - if (!BIT(m_keyb, i)) - result &= m_io_key[Which][i]->read(); - - return result; + return m_key_matrix[Which]->read(m_keyb); } uint8_t ddenlovr_state::rongrong_input2_r() @@ -3335,7 +3411,7 @@ uint8_t ddenlovr_state::mjmyster_keyb_r() if (m_keyb < 5) { - ret = m_io_key[BIT(m_input_sel, 0)][m_keyb]->read(); + ret = m_key_matrix[BIT(m_input_sel, 0)]->read(~(uint8_t(1) << m_keyb)); if (!machine().side_effects_disabled()) ++m_keyb; } @@ -3508,9 +3584,9 @@ uint8_t ddenlovr_state::hginga_input_r() case 0xa1: // player 1 case 0xa2: // player 2 - if (m_keyb < 5) + if (m_keyb < 6) { - result = m_io_key[BIT(~m_input_sel, 1)][m_keyb]->read(); + result = m_key_matrix[BIT(~m_input_sel, 1)]->read(~(uint8_t(1) << m_keyb)); if (!machine().side_effects_disabled()) ++m_keyb; } @@ -3587,13 +3663,7 @@ uint8_t ddenlovr_state::hgokou_player_r(int player) { uint8_t hopper_bit = ((m_hopper && !(m_screen->frame_number() % 10)) ? 0 : (1 << 6)); - if (!BIT(m_input_sel, 0)) return ioport(player ? "KEY5" : "KEY0")->read() | hopper_bit; - if (!BIT(m_input_sel, 1)) return ioport(player ? "KEY6" : "KEY1")->read() | hopper_bit; - if (!BIT(m_input_sel, 2)) return ioport(player ? "KEY7" : "KEY2")->read() | hopper_bit; - if (!BIT(m_input_sel, 3)) return ioport(player ? "KEY8" : "KEY3")->read() | hopper_bit; - if (!BIT(m_input_sel, 4)) return ioport(player ? "KEY9" : "KEY4")->read() | hopper_bit; - - return 0x7f; // bit 7 = blitter busy, bit 6 = hopper + return m_key_matrix[player]->read(m_input_sel) | hopper_bit; // bit 7 = blitter busy, bit 6 = hopper } void ddenlovr_state::hgokou_dsw_sel_w(uint8_t data) @@ -4531,7 +4601,7 @@ uint8_t htengoku_state::htengoku_input_r() case 0x82: if (m_keyb < 5) { - result = m_io_key[BIT(m_input_sel, 0)][m_keyb]->read(); + result = m_key_matrix[BIT(m_input_sel, 0)]->read(~(uint8_t(1) << m_keyb)); if (!machine().side_effects_disabled()) ++m_keyb; } @@ -4673,6 +4743,9 @@ void htengoku_state::htengoku(machine_config &config) m_mainlatch->q_out_cb<2>().set(FUNC(htengoku_state::layer_half2_w)); // m_mainlatch->q_out_cb<5>().set(FUNC(htengoku_state::blitter_ack_w)); // Blitter IRQ Ack + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], hanafuda_medal_panel, "hf", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], hanafuda_medal_panel, "hf", false); + HOPPER(config, m_hopper, attotime::from_msec(50)); // video hardware @@ -5026,8 +5099,6 @@ static INPUT_PORTS_START( mjxysl ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP1:1,2,3,4") PORT_DIPNAME( 0x30, 0x30, "Odds Rate" ) PORT_DIPLOCATION("DIP1:5,6") @@ -5273,8 +5344,6 @@ static INPUT_PORTS_START( htengoku ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_INCLUDE(dynax_hanafuda_keys_bet) - PORT_START("DSW0") // IN11 - DSW1 PORT_DIPNAME( 0x01, 0x01, "Show Gals" ) PORT_DIPLOCATION("SW 1:1") // ギャル表示 PORT_DIPSETTING( 0x00, DEF_STR(Off) ) // 無 @@ -5859,8 +5928,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( hanakanz ) PORT_START("SYSTEM") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_CONDITION("BET",0x40,EQUALS,0x00) // pay - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("BET",0x40,EQUALS,0x40) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // pay (only in 6-card medal modes) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME(DEF_STR(Test)) // Test PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) // analyzer @@ -5869,20 +5937,6 @@ static INPUT_PORTS_START( hanakanz ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE(dynax_hanafuda_keys_bet) - - PORT_MODIFY("KEY2") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_G ) - - PORT_MODIFY("KEY3") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_H ) - - PORT_MODIFY("KEY7") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_G ) PORT_PLAYER(2) - - PORT_MODIFY("KEY8") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_H ) PORT_PLAYER(2) - PORT_START("DSW1") PORT_DIPNAME( 0x07, 0x07, "Unknown 1-0&1&2" ) PORT_DIPSETTING( 0x07, "0" ) @@ -6039,8 +6093,6 @@ static INPUT_PORTS_START( hkagerou ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE(dynax_hanafuda_keys_bet) - PORT_START("DSW1") PORT_DIPNAME( 0x07, 0x04, "Hanafuda Game Payout Rate" ) PORT_DIPLOCATION("SW1:1,2,3") // 花札　ゲーム　配当率 PORT_DIPSETTING( 0x00, "8 (Low)" ) // 低い８ @@ -6419,8 +6471,6 @@ static INPUT_PORTS_START( mjreach1 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) PORT_DIPSETTING( 0x00, "50" ) @@ -6574,8 +6624,6 @@ static INPUT_PORTS_START( jongtei ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) PORT_DIPSETTING( 0x00, "50" ) @@ -6784,8 +6832,6 @@ static INPUT_PORTS_START( mjchuuka ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) PORT_DIPSETTING( 0x00, "50" ) @@ -6939,8 +6985,6 @@ static INPUT_PORTS_START( mjschuka ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) PORT_DIPSETTING( 0x00, "50" ) @@ -7204,8 +7248,6 @@ static INPUT_PORTS_START( mjmyster ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "SW1:1,2,3,4") // PAY-OUT 管理 PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("SW1:5,6") // ODDS 設定 @@ -7352,10 +7394,8 @@ static INPUT_PORTS_START( hginga ) // SW 3 OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF ON OFF OFF ON OFF OFF OFF OFF OFF // SW 4 ON OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF - // TODO: are separate 2P Start and Bet buttons supported with a hanaroku panel? - PORT_START("SYSTEM") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_CONDITION("DSW3", 0x03, EQUALS, 0x02) // pay + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_CONDITION("DSW3", 0x03, EQUALS, 0x02) // FIXME: this is keyout with hanaroku panel selected PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_CONDITION("DSW3", 0x03, EQUALS, 0x03) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("DSW3", 0x02, EQUALS, 0x00) // PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -7366,144 +7406,6 @@ static INPUT_PORTS_START( hginga ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1) // PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("KEY0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_E ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_YES ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_B ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_C ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_D ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) // only a single Flip Flop, corresponding 2P input - - PORT_START("KEY1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_B ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_F ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_NO ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_E ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_NO ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_YES ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_F ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_C ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_D ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_B ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_C ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_D ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY4") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(1) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_E ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_NO ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_YES ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_F ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY5") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_E ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_YES ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY6") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_B ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_F ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_NO ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY7") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_C ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY8") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_D ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - - PORT_START("KEY9") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x03) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x03, EQUALS, 0x02) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x02) - PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_CONDITION("FAKE", 0x02, EQUALS, 0x00) - PORT_START("DSW1") PORT_DIPNAME( 0x07, 0x04, "Hanafuda Game Payout Rate" ) PORT_DIPLOCATION("SW1:1,2,3") // 花札　ゲーム　配当率 PORT_DIPSETTING( 0x00, "8 (Low)" ) // 低い８ @@ -7639,7 +7541,7 @@ static INPUT_PORTS_START( hginga ) PORT_DIPNAME( 0x03, 0x03, DEF_STR(Controls) ) PORT_DIPLOCATION("SW4:8,9") PORT_DIPSETTING( 0x03, "Hanafuda Panel" ) // 花札パネル PORT_DIPSETTING( 0x02, "Mahjong Panel" ) // 麻雀パネル - PORT_DIPSETTING( 0x01, "Hanaroku Panel" ) // 花六パネル (not supported) + PORT_DIPSETTING( 0x01, "Hanaroku Panel" ) // 花六パネル (not fully supported) //PORT_DIPSETTING( 0x00, "Hanaroku Panel" ) PORT_START("BET") @@ -7663,7 +7565,8 @@ static INPUT_PORTS_START( hgokou ) // * クレジットタイマー設定は、１コイン２プレイ又は５プレイをおすすめします。 PORT_START("SYSTEM") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // pay + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_CONDITION("FAKE", 0x07, NOTEQUALS, 0x05) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_CONDITION("FAKE", 0x07, EQUALS, 0x05) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME(DEF_STR(Test)) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) // analyzer @@ -7672,8 +7575,6 @@ static INPUT_PORTS_START( hgokou ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_INCLUDE( dynax_hanafuda_keys_bet ) - PORT_START("DSW1") PORT_DIPNAME( 0x07, 0x04, "Hanafuda Game Payout Rate" ) PORT_DIPLOCATION("SW1:1,2,3") // 花札　ゲーム配当率 PORT_DIPSETTING( 0x00, "8 (low)" ) // 低い　8 @@ -7810,7 +7711,7 @@ static INPUT_PORTS_START( hgokou ) PORT_DIPNAME( 0x07, 0x07, DEF_STR(Controls) ) PORT_DIPLOCATION("SW4:7,8,9") // 花札パネル PORT_DIPSETTING( 0x07, "Hanafuda Panel" ) // 花札パネル (numbers) PORT_DIPSETTING( 0x06, "Mahjong Panel" ) // 麻雀パネル (letters) - PORT_DIPSETTING( 0x05, "Hanaroku Panel" ) // 花六パネル (not supported) + PORT_DIPSETTING( 0x05, "Hanaroku Panel" ) // 花六パネル (numbers, minimal buttons) PORT_DIPSETTING( 0x04, "Mahjong Amusement" ) // 麻雀アミューズメント (letters, doesn't use take/w-up/big/small) PORT_DIPSETTING( 0x03, DEF_STR(Joystick) ) // 十字レバー (not supported) PORT_DIPSETTING( 0x02, "Hanafuda Amusement" ) // 当社華札アミューズメントパネルシール (numbers, doesn't use take/w-up/big/small) @@ -7834,8 +7735,6 @@ static INPUT_PORTS_START( mjmyornt ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "SW 1:1,2,3,4") // ＰＡＹ－ＯＵＴ　管理 PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("SW 1:5,6") // ＯＤＤＳ　設定 @@ -8083,8 +7982,6 @@ static INPUT_PORTS_START( mjflove ) PORT_BIT( 0x60, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(FUNC(ddenlovr_state::mjflove_blitter_r)) // RTC (bit 5) & blitter irq flag (bit 6) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) // blitter busy flag - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW2") // IN12 - DSW2 PORT_DIPNAME( 0x03, 0x03, DEF_STR(Coinage) ) PORT_DIPLOCATION("SW1:1,2") // コインレート PORT_DIPSETTING( 0x00, DEF_STR(3C_1C) ) // ３コイン　　１クレジット @@ -8294,8 +8191,6 @@ static INPUT_PORTS_START( sryudens ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) // note2 - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) PORT_DIPSETTING( 0x00, "50" ) @@ -8455,8 +8350,6 @@ static INPUT_PORTS_START( seljan2 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) // note2 - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP-SW1:1,2,3,4") // PAY OUT RATE PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ODDS RATE @@ -8665,73 +8558,63 @@ static INPUT_PORTS_START( janshinp ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) // data clear PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) // note PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) // service coin (test mode) - - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin (test mode) PORT_START("DSW1") - PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) - PORT_DIPSETTING( 0x00, "50" ) - PORT_DIPSETTING( 0x01, "53" ) - PORT_DIPSETTING( 0x02, "56" ) - PORT_DIPSETTING( 0x03, "59" ) - PORT_DIPSETTING( 0x04, "62" ) - PORT_DIPSETTING( 0x05, "65" ) - PORT_DIPSETTING( 0x06, "68" ) - PORT_DIPSETTING( 0x07, "71" ) - PORT_DIPSETTING( 0x08, "75" ) - PORT_DIPSETTING( 0x09, "78" ) - PORT_DIPSETTING( 0x0a, "81" ) - PORT_DIPSETTING( 0x0b, "84" ) - PORT_DIPSETTING( 0x0c, "87" ) - PORT_DIPSETTING( 0x0d, "90" ) - PORT_DIPSETTING( 0x0e, "93" ) - PORT_DIPSETTING( 0x0f, "96" ) - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) + MAHJONG_PAYOUT_RATE(0, "DIP1:1,2,3,4") + PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP1:5,6") PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) - PORT_DIPNAME( 0xc0, 0x40, "Max Rate" ) + PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP1:7,8") PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) PORT_DIPSETTING( 0x40, "10" ) PORT_DIPSETTING( 0x00, "20" ) PORT_START("DSW2") - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_10C ) ) - PORT_DIPNAME( 0x0c, 0x0c, "Min Rate To Play" ) + MAHJONG_COINAGE(0, "DIP2:1,2") + PORT_DIPNAME( 0x0c, 0x0c, "Minimum Bet" ) PORT_DIPLOCATION("DIP2:3,4") PORT_DIPSETTING( 0x0c, "1" ) PORT_DIPSETTING( 0x08, "2" ) PORT_DIPSETTING( 0x04, "3" ) PORT_DIPSETTING( 0x00, "5" ) - PORT_DIPNAME( 0x30, 0x00, "Payout" ) - PORT_DIPSETTING( 0x30, "300" ) - PORT_DIPSETTING( 0x20, "500" ) - PORT_DIPSETTING( 0x10, "700" ) - PORT_DIPSETTING( 0x00, "1000" ) - PORT_DIPNAME( 0x40, 0x00, "W-Bet" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, "Last Chance" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x30, 0x10, "Credit Limit" ) PORT_DIPLOCATION("DIP2:5,6") + PORT_DIPSETTING( 0x30, "300" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) + PORT_DIPSETTING( 0x30, "600" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x30, "1500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x30, "3000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x20, "500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) + PORT_DIPSETTING( 0x20, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x20, "2500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x20, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x10, "700" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) + PORT_DIPSETTING( 0x10, "1400" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x10, "3500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x10, "7000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x00, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) + PORT_DIPSETTING( 0x00, "2000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x00, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x00, "10000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPNAME( 0x40, 0x00, "Double Bet" ) PORT_DIPLOCATION("DIP2:7") + PORT_DIPSETTING( 0x40, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) + PORT_DIPNAME( 0x80, 0x00, "Last Chance" ) PORT_DIPLOCATION("DIP2:8") + PORT_DIPSETTING( 0x80, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) PORT_START("DSW3") - PORT_DIPNAME( 0x07, 0x07, "YAKUMAN Bonus" ) - PORT_DIPSETTING( 0x07, "Cut" ) - PORT_DIPSETTING( 0x06, "1 T" ) - PORT_DIPSETTING( 0x05, "300" ) - PORT_DIPSETTING( 0x04, "500" ) - PORT_DIPSETTING( 0x03, "700" ) - PORT_DIPSETTING( 0x02, "1000" ) -// PORT_DIPSETTING( 0x01, "1000" ) -// PORT_DIPSETTING( 0x00, "1000" ) - PORT_DIPNAME( 0x08, 0x00, "YAKUMAN Times" ) + PORT_DIPNAME( 0x07, 0x02, "Yakuman Chance Cycle" ) PORT_DIPLOCATION("DIP3:1,2,3") + PORT_DIPSETTING( 0x07, "None" ) + PORT_DIPSETTING( 0x06, "First time only" ) + PORT_DIPSETTING( 0x05, "Every 300 coins" ) + PORT_DIPSETTING( 0x04, "Every 500 coins" ) + PORT_DIPSETTING( 0x03, "Every 700 coins" ) + PORT_DIPSETTING( 0x02, "Every 1000 coins" ) +// PORT_DIPSETTING( 0x01, "Every 1000 coins" ) +// PORT_DIPSETTING( 0x00, "Every 1000 coins" ) + PORT_DIPNAME( 0x08, 0x08, "Yakuman Chances Per Cycle" ) PORT_DIPLOCATION("DIP3:4") PORT_DIPSETTING( 0x00, "1" ) PORT_DIPSETTING( 0x08, "2" ) PORT_DIPNAME( 0x30, 0x00, "Fever Chance" ) @@ -8739,26 +8622,26 @@ static INPUT_PORTS_START( janshinp ) PORT_DIPSETTING( 0x20, "None?" ) PORT_DIPSETTING( 0x10, "Many?" ) PORT_DIPSETTING( 0x00, "Only One?" ) - PORT_DIPNAME( 0x40, 0x40, "Auto Tsumo" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "DonDen Key" ) + PORT_DIPNAME( 0x40, 0x00, "Auto Reach" ) PORT_DIPLOCATION("DIP3:7") + PORT_DIPSETTING( 0x40, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) + PORT_DIPNAME( 0x80, 0x00, "Don Den Button" ) PORT_DIPLOCATION("DIP3:8") PORT_DIPSETTING( 0x80, "Start" ) PORT_DIPSETTING( 0x00, "Flip Flop" ) PORT_START("DSW4") - PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "In Game Music" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x01, 0x00, DEF_STR(Demo_Sounds) ) PORT_DIPLOCATION("DIP4:1") + PORT_DIPSETTING( 0x01, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) + PORT_DIPNAME( 0x02, 0x00, "In-Game Music" ) PORT_DIPLOCATION("DIP4:2") + PORT_DIPSETTING( 0x02, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) PORT_DIPNAME( 0x04, 0x00, "Girls In Demo Mode" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, "Select Girl" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x00, "Gal Select" ) PORT_DIPLOCATION("DIP4:4") + PORT_DIPSETTING( 0x08, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -8825,9 +8708,7 @@ static INPUT_PORTS_START( dtoyoken ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) // data clear PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) // note PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) // service coin (test mode) - - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin (test mode) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP-SW1:1,2,3,4") // PAY OUT RATE @@ -8968,8 +8849,6 @@ static INPUT_PORTS_START( daimyojn ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) // note2 - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP-SW1:1,2,3,4") // ＰＡＹ　ＯＵＴ　ＲＡＴＥ PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ＯＤＤＳ　ＲＡＴＥ no effect in "Credit timer" mode, always uses 1 2 4 8 12 16 24 32 @@ -9109,8 +8988,6 @@ static INPUT_PORTS_START( mjnigiri ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 ) // note2 - PORT_INCLUDE( mahjong_matrix_2p_bet_wup ) - PORT_START("DSW1") MAHJONG_PAYOUT_RATE_DFLT(0, 0x06, "DIP-SW1:1,2,3,4") // PAY OUT RATE PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ODDS RATE no effect in "Credit timer" mode, always uses 1 2 4 8 12 16 24 32 @@ -9283,8 +9160,6 @@ static INPUT_PORTS_START( hnrose ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_INCLUDE( dynax_hanafuda_keys_bet ) - // Note the PCB has 4x 10-position DIP switches and SW5 is a 4-position DIP switch. // SW5 is marked as Unused and 'leave all off' in the manual // A manual for a different version of this game has been found, but the settings don't all match the version that has been dumped. @@ -9882,6 +9757,9 @@ void hanakanz_state::hanakanz(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], standard_panels, "hf", false); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], standard_panels, "hf", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60); @@ -9973,6 +9851,15 @@ void hanakanz_state::mjreach1(machine_config &config) { hanakanz(config); + m_key_matrix[0]->option_reset(); + mahjong_medal_panel(*m_key_matrix[0]); + m_key_matrix[0]->set_default_option("mj"); + m_key_matrix[0]->set_fixed(true); + + m_key_matrix[1]->option_reset(); + mahjong_medal_panel(*m_key_matrix[1]); + m_key_matrix[1]->set_default_option("mj"); + // basic machine hardware m_maincpu->set_addrmap(AS_IO, &hanakanz_state::mjreach1_portmap); } @@ -9999,6 +9886,15 @@ void hanakanz_state::mjchuuka(machine_config &config) tmpz.out_pa_callback().set(FUNC(hanakanz_state::hanakanz_rombank_w)); tmpz.out_pb_callback().set(FUNC(hanakanz_state::mjchuuka_oki_bank_w)); + m_key_matrix[0]->option_reset(); + mahjong_medal_panel(*m_key_matrix[0]); + m_key_matrix[0]->set_default_option("mj"); + m_key_matrix[0]->set_fixed(true); + + m_key_matrix[1]->option_reset(); + mahjong_medal_panel(*m_key_matrix[1]); + m_key_matrix[1]->set_default_option("mj"); + m_screen->screen_vblank().set("maincpu", FUNC(tmpz84c015_device::trg0)); subdevice("rtc")->out_int_handler().set(m_maincpu, FUNC(tmpz84c015_device::trg1)); @@ -10053,6 +9949,9 @@ void ddenlovr_state::mjschuka(machine_config &config) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,sryudens) MCFG_MACHINE_RESET_OVERRIDE(ddenlovr_state,ddenlovr) + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60); @@ -10129,6 +10028,9 @@ void ddenlovr_state::mjmyster(machine_config &config) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,mjmyster) + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + ay8910_device &aysnd(AY8910(config, "aysnd", 3579545)); aysnd.port_b_write_callback().set(FUNC(ddenlovr_state::ddenlovr_select_w)); aysnd.add_route(ALL_OUTPUTS, "mono", 0.30); @@ -10157,6 +10059,9 @@ void ddenlovr_state::hginga(machine_config &config) maincpu.out_pa_callback().set(FUNC(ddenlovr_state::mjmyster_rambank_w)); maincpu.out_pb_callback().set(FUNC(ddenlovr_state::hginga_rombank_w)); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], hginga_panels, "hf", false); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], medal_panels, "hf", false); + HOPPER(config, m_hopper, attotime::from_msec(50)); m_screen->screen_vblank().set("maincpu", FUNC(tmpz84c015_device::trg0)); @@ -10190,6 +10095,9 @@ void ddenlovr_state::hgokou(machine_config &config) subdevice("rtc")->out_int_handler().set(m_maincpu, FUNC(tmpz84c015_device::pa7_w)).invert(); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], hgokou_panels, "hf", false); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], standard_panels, "hf", false); + blitter_irq().set("maincpu", FUNC(tmpz84c015_device::trg1)); blitter_irq().append("maincpu", FUNC(tmpz84c015_device::trg2)); @@ -10239,6 +10147,9 @@ void ddenlovr_state::mjmyuniv(machine_config &config) subdevice("rtc")->out_int_handler().set_inputline("maincpu", INPUT_LINE_NMI); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + blitter_irq().set("maincpu", FUNC(tmpz84c015_device::trg1)); blitter_irq().append("maincpu", FUNC(tmpz84c015_device::trg2)); @@ -10273,6 +10184,9 @@ void ddenlovr_state::mjmyornt(machine_config &config) subdevice("rtc")->out_int_handler().set_inputline("maincpu", INPUT_LINE_NMI); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + blitter_irq().set("maincpu", FUNC(tmpz84c015_device::trg1)); blitter_irq().append("maincpu", FUNC(tmpz84c015_device::trg2)); @@ -10320,6 +10234,9 @@ void ddenlovr_state::mjflove(machine_config &config) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,mjflove) + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + m_screen->screen_vblank().set(FUNC(ddenlovr_state::mjflove_irq)); m_screen->screen_vblank().append(m_maincpu, FUNC(tmpz84c015_device::trg0)); // frame counter? @@ -10367,6 +10284,9 @@ void hanakanz_state::jongtei(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60); @@ -10413,6 +10333,19 @@ void hanakanz_state::mjgnight(machine_config &config) m_screen->set_visarea(0, 336-1, 5-4, 256-11-1-4); } +void hanakanz_state::htsubaki(machine_config &config) +{ + jongtei(config); + + m_key_matrix[0]->option_reset(); + hanafuda_medal_panel(*m_key_matrix[0]); + m_key_matrix[0]->set_default_option("hf"); + + m_key_matrix[1]->option_reset(); + hanafuda_medal_panel(*m_key_matrix[1]); + m_key_matrix[1]->set_default_option("hf"); +} + /*************************************************************************** Mahjong Seiryu Densetsu ***************************************************************************/ @@ -10429,6 +10362,9 @@ void ddenlovr_state::sryudens(machine_config &config) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,sryudens) MCFG_MACHINE_RESET_OVERRIDE(ddenlovr_state,ddenlovr) + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60.8532); // VSync 60.8532Hz, HSync 15.2790kHz @@ -10475,6 +10411,9 @@ void ddenlovr_state::janshinp(machine_config &config) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,sryudens) MCFG_MACHINE_RESET_OVERRIDE(ddenlovr_state,ddenlovr) + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60.8532); // VSync 60.8532Hz, HSync 15.2790kHz ? @@ -10543,6 +10482,9 @@ void ddenlovr_state::seljan2(machine_config &config) MCFG_MACHINE_START_OVERRIDE(ddenlovr_state,seljan2) MCFG_MACHINE_RESET_OVERRIDE(ddenlovr_state,ddenlovr) + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60.8532); // VSync 60.8532Hz, HSync 15.2790kHz ? @@ -10615,6 +10557,9 @@ void hanakanz_state::daimyojn(machine_config &config) NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], mahjong_medal_panel, "mj", true); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], mahjong_medal_panel, "mj", false); + // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(59.7922); // HSync 15.4248kHz @@ -10659,6 +10604,15 @@ void hanakanz_state::hnrose(machine_config &config) daimyojn(config); m_maincpu->set_addrmap(AS_IO, &hanakanz_state::hnrose_portmap); + + m_key_matrix[0]->option_reset(); + standard_panels(*m_key_matrix[0]); + m_key_matrix[0]->set_default_option("hf"); + m_key_matrix[0]->set_fixed(false); + + m_key_matrix[1]->option_reset(); + standard_panels(*m_key_matrix[1]); + m_key_matrix[1]->set_default_option("hf"); } /*************************************************************************** @@ -13348,6 +13302,8 @@ ROM_END } // anonymous namespace +DEFINE_DEVICE_TYPE_PRIVATE(HGOKOU_JOYSTICK, device_mahjong_panel_interface, hgokou_joystick_device, "hgokou_joystick", "Hanafuda Hana Gokou joystick") + GAME( 1992, htengoku, 0, htengoku, htengoku, htengoku_state, empty_init, ROT180, "Dynax", "Hanafuda Hana Tengoku (Japan)", 0 ) @@ -13439,7 +13395,7 @@ GAME( 1998, mjreach1a, mjreach1, mjreach1, mjreach1, hanakanz_state, empty_ GAME( 1999, jongtei, 0, jongtei, jongtei, hanakanz_state, empty_init, ROT0, "Dynax", "Mahjong Jong-Tei (Japan, NM532-01)", MACHINE_NO_COCKTAIL ) GAME( 2000, jongteia, jongtei, jongteia, jongtei, hanakanz_state, empty_init, ROT0, "Dynax (Techno-Top license)", "Mahjong Jong-Tei (Japan, Techno-Top license)", MACHINE_NO_COCKTAIL ) -GAME( 1999, htsubaki, 0, jongtei, hnrose, hanakanz_state, empty_init, ROT0, "Dynax", "Hanafuda Hana Tsubaki (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_COCKTAIL ) // need inputs /DSW +GAME( 1999, htsubaki, 0, htsubaki, hnrose, hanakanz_state, empty_init, ROT0, "Dynax", "Hanafuda Hana Tsubaki (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_COCKTAIL ) // need inputs /DSW GAME( 2000, mjgnight, 0, mjgnight, mjgnight, hanakanz_state, empty_init, ROT0, "Techno-Top", "Mahjong Gorgeous Night (Japan, TSM003-01)", MACHINE_NO_COCKTAIL ) diff --git a/src/mame/konami/kontest.cpp b/src/mame/konami/kontest.cpp index cd012b6faf2..2197dc390b2 100644 --- a/src/mame/konami/kontest.cpp +++ b/src/mame/konami/kontest.cpp @@ -103,27 +103,28 @@ void kontest_state::kontest_palette(palette_device &palette) const } } -uint32_t kontest_state::screen_update( screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect ) +uint32_t kontest_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - for (int y = 0; y < 32; y++) + for (int y = (cliprect.top() >> 3); y <= (cliprect.bottom() >> 3); y++) { - for (int x = 0; x < 64; x++) + for (int x = (cliprect.left() >> 3); x <= (cliprect.right() >> 3); x++) { - uint8_t const tile = m_ram[(x + y * 64) | 0x800]; - uint8_t const attr = m_ram[(x + ((y >> 1) * 64))] & 7; + uint8_t const tile = m_ram[x | (y << 6) | 0x820]; + uint8_t const attr = m_ram[x | ((y >> 1) << 6) | 0x20] & 7; for (int yi = 0; yi < 8; yi++) { + int const res_y = (y << 3) | yi; for (int xi = 0; xi < 8; xi++) { - uint8_t const pen = m_ram[(yi << 1) | (xi >> 2) | (tile << 4) | 0x1000]; - uint8_t const color = BIT(pen >> 4, ~xi & 3) << 1 | BIT(pen, ~xi & 3); - - int const res_x = x * 8 + xi - 256; - int const res_y = y * 8 + yi; - + int const res_x = (x << 3) | xi; if (cliprect.contains(res_x, res_y)) - bitmap.pix(res_y, res_x) = m_palette->pen(color | attr * 4); + { + uint8_t const pen = m_ram[(yi << 1) | (xi >> 2) | (tile << 4) | 0x1000]; + uint8_t const color = bitswap<2>(pen, (~xi & 3) | 4, ~xi & 3); + + bitmap.pix(res_y, res_x) = m_palette->pen(color | (attr << 2)); + } } } } diff --git a/src/mame/shared/mahjong.cpp b/src/mame/shared/mahjong.cpp index 2ebaffa2978..9fc8cfaedca 100644 --- a/src/mame/shared/mahjong.cpp +++ b/src/mame/shared/mahjong.cpp @@ -42,6 +42,303 @@ #include "mahjong.h" +namespace { + +INPUT_PORTS_START(mahjong_matrix_bet) + PORT_INCLUDE(mahjong_matrix_1p_bet) + + PORT_MODIFY("KEY0") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1) + + PORT_START("KEY5") + PORT_BIT(0x3f, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + + +INPUT_PORTS_START(mahjong_matrix_bet_wup) + PORT_INCLUDE(mahjong_matrix_1p_bet_wup) + + PORT_MODIFY("KEY0") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1) + + PORT_START("KEY5") + PORT_BIT(0x3f, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + + +INPUT_PORTS_START(hanafuda_matrix_bet) + PORT_START("KEY0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A) PORT_PLAYER(1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_E) PORT_PLAYER(1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_YES) PORT_PLAYER(1) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNKNOWN) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1) + + PORT_START("KEY1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_B) PORT_PLAYER(1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_F) PORT_PLAYER(1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_NO) PORT_PLAYER(1) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET) PORT_PLAYER(1) + + PORT_START("KEY2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_C) PORT_PLAYER(1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_G) PORT_PLAYER(1) + PORT_BIT(0x3c, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_D) PORT_PLAYER(1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_H) PORT_PLAYER(1) + PORT_BIT(0x3c, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY4") + PORT_BIT(0x07, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP) PORT_PLAYER(1) + PORT_BIT(0x30, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY5") + PORT_BIT(0x3f, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + + +INPUT_PORTS_START(hanafuda_matrix_bet_wup) + PORT_INCLUDE(hanafuda_matrix_bet) + + PORT_MODIFY("KEY4") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE) PORT_PLAYER(1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP) PORT_PLAYER(1) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG) PORT_PLAYER(1) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL) PORT_PLAYER(1) +INPUT_PORTS_END + + +INPUT_PORTS_START(hanaroku_panel) + PORT_START("KEY0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A) PORT_PLAYER(1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_B) PORT_PLAYER(1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_C) PORT_PLAYER(1) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_D) PORT_PLAYER(1) + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP) // only a single Flip Flop + + PORT_START("KEY1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_E) PORT_PLAYER(1) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_NO) PORT_PLAYER(1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_YES) PORT_PLAYER(1) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_F) PORT_PLAYER(1) + PORT_BIT(0x30, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(1) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_MAHJONG_BET) PORT_PLAYER(1) + PORT_BIT(0x38, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A) PORT_PLAYER(2) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_B) PORT_PLAYER(2) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_C) PORT_PLAYER(2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_D) PORT_PLAYER(2) + PORT_BIT(0x30, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_E) PORT_PLAYER(2) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_NO) PORT_PLAYER(2) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_YES) PORT_PLAYER(2) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_HANAFUDA_F) PORT_PLAYER(2) + PORT_BIT(0x30, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KEY5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_START) PORT_PLAYER(2) + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_MAHJONG_BET) PORT_PLAYER(2) + PORT_BIT(0x38, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + + + +class mahjong_panel_device_base : public device_t, public device_mahjong_panel_interface +{ +public: + virtual u8 read(u8 select) override + { + u8 result = 0x3f; + for (unsigned i = 0; m_keys.size() > i; ++i) + { + if (!BIT(select, i)) + result &= m_keys[i]->read(); + } + return result; + } + +protected: + mahjong_panel_device_base( + machine_config const &mconfig, + device_type type, + char const *tag, + device_t *owner, + u32 clock) : + device_t(mconfig, type, tag, owner, clock), + device_mahjong_panel_interface(mconfig, *this), + m_keys(*this, "KEY%u", 0U) + { + } + + virtual void device_start() override ATTR_COLD { } + +private: + required_ioport_array<6> m_keys; +}; + + +class mahjong_panel_device : public mahjong_panel_device_base +{ +public: + mahjong_panel_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + mahjong_panel_device_base(mconfig, MAHJONG_PANEL, tag, owner, clock) + { + } + +protected: + ioport_constructor device_input_ports() const override ATTR_COLD + { + return INPUT_PORTS_NAME(mahjong_matrix_bet); + } +}; + + +class mahjong_medal_panel_device : public mahjong_panel_device_base +{ +public: + mahjong_medal_panel_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + mahjong_panel_device_base(mconfig, MAHJONG_MEDAL_PANEL, tag, owner, clock) + { + } + +protected: + ioport_constructor device_input_ports() const override ATTR_COLD + { + return INPUT_PORTS_NAME(mahjong_matrix_bet_wup); + } +}; + + +class hanafuda_panel_device : public mahjong_panel_device_base +{ +public: + hanafuda_panel_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + mahjong_panel_device_base(mconfig, HANAFUDA_PANEL, tag, owner, clock) + { + } + +protected: + ioport_constructor device_input_ports() const override ATTR_COLD + { + return INPUT_PORTS_NAME(hanafuda_matrix_bet); + } +}; + + +class hanafuda_medal_panel_device : public mahjong_panel_device_base +{ +public: + hanafuda_medal_panel_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + mahjong_panel_device_base(mconfig, HANAFUDA_MEDAL_PANEL, tag, owner, clock) + { + } + +protected: + ioport_constructor device_input_ports() const override ATTR_COLD + { + return INPUT_PORTS_NAME(hanafuda_matrix_bet_wup); + } +}; + + +class hanaroku_panel_device : public mahjong_panel_device_base +{ +public: + hanaroku_panel_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + mahjong_panel_device_base(mconfig, HANAROKU_PANEL, tag, owner, clock) + { + } + +protected: + ioport_constructor device_input_ports() const override ATTR_COLD + { + return INPUT_PORTS_NAME(hanaroku_panel); + } +}; + +} // anonymous namespace + + + +DEFINE_DEVICE_TYPE(MAHJONG_PANEL_CONNECTOR, mahjong_panel_connector_device, "mahjong_panel_connector", "Mahjong panel connector") + +DEFINE_DEVICE_TYPE_PRIVATE(MAHJONG_PANEL, device_mahjong_panel_interface, mahjong_panel_device, "mahjong_panel", "Mahjong panel") +DEFINE_DEVICE_TYPE_PRIVATE(MAHJONG_MEDAL_PANEL, device_mahjong_panel_interface, mahjong_medal_panel_device, "mahjong_medal_panel", "Mahjong panel with double-up controls") +DEFINE_DEVICE_TYPE_PRIVATE(HANAFUDA_PANEL, device_mahjong_panel_interface, hanafuda_panel_device, "hanafuda_panel", "Hanafuda panel") +DEFINE_DEVICE_TYPE_PRIVATE(HANAFUDA_MEDAL_PANEL, device_mahjong_panel_interface, hanafuda_medal_panel_device, "hanafuda_medal_panel", "Hanafuda panel with double-up controls") +DEFINE_DEVICE_TYPE_PRIVATE(HANAROKU_PANEL, device_mahjong_panel_interface, hanaroku_panel_device, "hanaroku_panel", "Hanaroku panel") + + +device_mahjong_panel_interface::device_mahjong_panel_interface( + machine_config const &mconfig, + device_t &device) : + device_interface(device, "mahjongpanel") +{ +} + +device_mahjong_panel_interface::~device_mahjong_panel_interface() +{ +} + + +mahjong_panel_connector_device::mahjong_panel_connector_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + u32 clock) : + device_t(mconfig, MAHJONG_PANEL_CONNECTOR, tag, owner, clock), + device_single_card_slot_interface(mconfig, *this), + m_panel(nullptr) +{ +} + +mahjong_panel_connector_device::~mahjong_panel_connector_device() +{ +} + +void mahjong_panel_connector_device::device_start() +{ + m_panel = get_card_device(); +} + + + INPUT_PORTS_START(mahjong_matrix_1p) PORT_START("KEY0") PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A) diff --git a/src/mame/shared/mahjong.h b/src/mame/shared/mahjong.h index 14a6a72eaa6..04b4b9d4e77 100644 --- a/src/mame/shared/mahjong.h +++ b/src/mame/shared/mahjong.h @@ -6,6 +6,58 @@ #pragma once +class device_mahjong_panel_interface : public device_interface +{ +public: + virtual ~device_mahjong_panel_interface(); + + virtual u8 read(u8 select) = 0; + +protected: + device_mahjong_panel_interface(machine_config const &mconfig, device_t &device); +}; + + +class mahjong_panel_connector_device : public device_t, public device_single_card_slot_interface +{ +public: + template + mahjong_panel_connector_device( + machine_config const &mconfig, + char const *tag, + device_t *owner, + T &&opts, + char const *dflt, + bool const fixed) + : mahjong_panel_connector_device(mconfig, tag, owner, u32(0)) + { + option_reset(); + opts(*this); + set_default_option(dflt); + set_fixed(fixed); + } + mahjong_panel_connector_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); + virtual ~mahjong_panel_connector_device(); + + u8 read(u8 select) { return m_panel ? m_panel->read(select) : 0x3f; } + +protected: + virtual void device_start() override ATTR_COLD; + +private: + device_mahjong_panel_interface *m_panel; +}; + + +DECLARE_DEVICE_TYPE(MAHJONG_PANEL_CONNECTOR, mahjong_panel_connector_device) + +DECLARE_DEVICE_TYPE(MAHJONG_PANEL, device_mahjong_panel_interface) +DECLARE_DEVICE_TYPE(MAHJONG_MEDAL_PANEL, device_mahjong_panel_interface) +DECLARE_DEVICE_TYPE(HANAFUDA_PANEL, device_mahjong_panel_interface) +DECLARE_DEVICE_TYPE(HANAFUDA_MEDAL_PANEL, device_mahjong_panel_interface) +DECLARE_DEVICE_TYPE(HANAROKU_PANEL, device_mahjong_panel_interface) + + INPUT_PORTS_EXTERN(mahjong_matrix_1p); // letters, start, kan/pon/chi/reach/ron INPUT_PORTS_EXTERN(mahjong_matrix_1p_ff); // adds flip flop INPUT_PORTS_EXTERN(mahjong_matrix_1p_bet); // adds bet/last chance From fd9d21e5224c14f4cfb0f29cac577de20da43013 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 20 Mar 2026 12:48:52 +0100 Subject: [PATCH 330/351] gng: reorder world sets (before this commit: gngc=newest, gngb=oldest) --- src/mame/capcom/gng.cpp | 399 ++++++++++++++++++++-------------------- 1 file changed, 200 insertions(+), 199 deletions(-) diff --git a/src/mame/capcom/gng.cpp b/src/mame/capcom/gng.cpp index cb58d82d14e..ee5ef4e37cf 100644 --- a/src/mame/capcom/gng.cpp +++ b/src/mame/capcom/gng.cpp @@ -633,11 +633,48 @@ void gng_state::diamrun(machine_config &config) ***************************************************************************/ +ROM_START( gng ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "mm_c_04", 0x04000, 0x4000, CRC(4f94130f) SHA1(6863fee3c97c76ba314ccbada7efacb6783e7d32) ) + ROM_LOAD( "mm_c_03", 0x08000, 0x8000, CRC(1def138a) SHA1(d29e12082c4d5c06a9910b3500ef66242cdec905) ) + ROM_LOAD( "mm_c_05", 0x10000, 0x8000, CRC(ed28e86e) SHA1(064871918547a56be330c6994d4db2c9932e14db) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) + + ROM_REGION( 0x18000, "tiles", 0 ) + ROM_LOAD( "gg11.bin", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 + ROM_LOAD( "gg10.bin", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 + ROM_LOAD( "gg9.bin", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 + ROM_LOAD( "gg8.bin", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 + ROM_LOAD( "gg7.bin", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 + ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) + ROM_LOAD( "gg17.bin", 0x00000, 0x4000, CRC(93e50a8f) SHA1(42d367f57bb2fdf60a0445ac1533da99cfeaa617) ) // sprites 0 Plane 1-2 + ROM_LOAD( "gg16.bin", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 + ROM_LOAD( "gg15.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 + ROM_LOAD( "gg14.bin", 0x10000, 0x4000, CRC(6aaf12f9) SHA1(207a7407288182a4f3eddaea634c6a6452131182) ) // sprites 0 Plane 3-4 + ROM_LOAD( "gg13.bin", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 + ROM_LOAD( "gg12.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "tbp24s10.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) + ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) + + ROM_REGION( 0x0100, "plds", 0 ) + ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) +ROM_END + /* Newer PCB, with visible wires and mask ROMs (85606-A-5 / 85606-B-4). - The ROM contents are a mix between 'gnga' and 'makaimurb'. + The ROM contents are a mix between 'gngb' and 'makaimurb'. + It has the Japanese cross weapon srpite, but retains the shield icon in the tiles. The ROM configuration is set with a jumpers bank at 1F. - Mask ROMs: EPROMs (eg. gnga): + Mask ROMs: EPROMs (eg. gngb): J2 = Short Open J3 = Short Open J4 = Open Short @@ -645,7 +682,7 @@ void gng_state::diamrun(machine_config &config) J6 = Open Short J7 = Short Open */ -ROM_START( gng ) +ROM_START( gnga ) ROM_REGION( 0x18000, "maincpu", 0 ) // All EPROMs ROM_LOAD( "mjg_04.10n", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) // 4000-5fff is page 4 ROM_LOAD( "mjg_03.8n", 0x08000, 0x8000, CRC(9e01c65e) SHA1(a87880d87c64a6d61313c3bc69c8d49511e0f9c3) ) @@ -655,21 +692,19 @@ ROM_START( gng ) ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_02.14h", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) // yes, really "CAPSOM" (same goes for the other mask ROMs) ROM_REGION( 0x04000, "chars", 0 ) // Mask ROM - ROM_LOAD( "capsom_m5m23256p_p_616105_mjg_01.11e", 0x00000, 0x4000, CRC(1ab9038a) SHA1(907f2e2753f8e11a4addd19c225a5f333ff74344) ) + ROM_LOAD( "capsom_m5m23256p_p_616105_mjg_01.11e", 0x00000, 0x4000, CRC(1ab9038a) SHA1(907f2e2753f8e11a4addd19c225a5f333ff74344) ) // 178366b4 & 178366b4 ROM_IGNORE( 0x4000 ) ROM_REGION( 0x18000, "tiles", 0 ) // All mask ROMs - ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_08.3e", 0x00000, 0x8000, CRC(c09a716f) SHA1(d30d31ae8458ac22b61a01bf52dd50788e15c51f) ) // 0-1-2-3 Plane 1 - ROM_LOAD( "capsom_m5m23256p_p_61710z_mmg_07.3c", 0x08000, 0x8000, CRC(0b92b129) SHA1(8e06b03323b470482e068a9d60f0263ac5088876) ) // 0-1-2-3 Plane 2 - ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_06.3b", 0x10000, 0x8000, CRC(830176af) SHA1(1053adf458f2613a3ce6f3eb5d7d917906341d5c) ) // 0-1-2-3 Plane 3 + ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_08.3e", 0x00000, 0x8000, CRC(c09a716f) SHA1(d30d31ae8458ac22b61a01bf52dd50788e15c51f) ) // ddd56fa9 & 7302529d + ROM_LOAD( "capsom_m5m23256p_p_61710z_mmg_07.3c", 0x08000, 0x8000, CRC(0b92b129) SHA1(8e06b03323b470482e068a9d60f0263ac5088876) ) // 20035bda & f12ba271 + ROM_LOAD( "capsom_m5m23256p_p_616105_mmg_06.3b", 0x10000, 0x8000, CRC(830176af) SHA1(1053adf458f2613a3ce6f3eb5d7d917906341d5c) ) // e525207d & 2d77e9b2 - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) // All mask ROMs - ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_12.4n", 0x00000, 0x8000, CRC(dbf05081) SHA1(c0a327e8c1a899a7b6c35ae197f2640b89491dd9) ) // sprites 0 Plane 1-2, sprites 1 Plane 1-2 - ROM_LOAD( "capsom_m5m23256p_p_620108_mjg_11.3n", 0x08000, 0x4000, CRC(cf533077) SHA1(9ad39aa884daaf757668063f6c8a1a2037308441) ) // sprites 2 Plane 1-2 - ROM_IGNORE( 0x4000 ) - ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_10.4l", 0x10000, 0x8000, CRC(5f36734e) SHA1(b0eb666b2ef31c0a801f17cc797bd0d2fdae9511) ) // sprites 0 Plane 3-4, sprites 1 Plane 3-4 - ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_09.3l", 0x18000, 0x4000, CRC(89c71940) SHA1(9dd7decf4c776a2ebcf27a4b71e520774b9563eb) ) // sprites 2 Plane 3-4 - ROM_IGNORE( 0x4000 ) + ROM_REGION( 0x20000, "sprites", 0 ) // All mask ROMs + ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_12.4n", 0x00000, 0x8000, CRC(dbf05081) SHA1(c0a327e8c1a899a7b6c35ae197f2640b89491dd9) ) // 4613afdc & 06d7e5ca + ROM_LOAD( "capsom_m5m23256p_p_620108_mjg_11.3n", 0x08000, 0x8000, CRC(cf533077) SHA1(9ad39aa884daaf757668063f6c8a1a2037308441) ) // bc1fe02d & empty + ROM_LOAD( "capsom_m5m23256p_p_62410p_mjg_10.4l", 0x10000, 0x8000, CRC(5f36734e) SHA1(b0eb666b2ef31c0a801f17cc797bd0d2fdae9511) ) // 608d68d5 & e80c3fca + ROM_LOAD( "capsom_m5m23256p_p_61710g_mjg_09.3l", 0x18000, 0x8000, CRC(89c71940) SHA1(9dd7decf4c776a2ebcf27a4b71e520774b9563eb) ) // 7780a925 & empty ROM_REGION( 0x0200, "proms", 0 ) ROM_LOAD( "m-02_63s141.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) @@ -679,14 +714,14 @@ ROM_START( gng ) ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) ROM_END -ROM_START( gnga ) +ROM_START( gngb ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "gg4.bin", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) // 4000-5fff is page 4 ROM_LOAD( "gg3.bin", 0x08000, 0x8000, CRC(9e01c65e) SHA1(a87880d87c64a6d61313c3bc69c8d49511e0f9c3) ) ROM_LOAD( "gg5.bin", 0x10000, 0x8000, CRC(d6397b2b) SHA1(39aa3cb8c229e60ac0ac410ff61e0c09dba78501) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -715,7 +750,7 @@ ROM_START( gnga ) ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) ROM_END -ROM_START( gngb ) +ROM_START( gngc ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "gng.n10", 0x04000, 0x4000, CRC(60343188) SHA1(dfc95d3f23a3a4b05b559f1dc76488b2659fbf66) ) ROM_LOAD( "gng.n9", 0x08000, 0x4000, CRC(b6b91cfb) SHA1(019a38b1c4e987715be1575948a3dc06ee59123d) ) @@ -724,7 +759,7 @@ ROM_START( gngb ) ROM_LOAD( "gng.n12", 0x14000, 0x4000, CRC(13cf6238) SHA1(0305908e922891a6a6b6c29e6a099867215d084e) ) ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -750,169 +785,6 @@ ROM_START( gngb ) ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) ROM_END -ROM_START( gngc ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "mm_c_04", 0x04000, 0x4000, CRC(4f94130f) SHA1(6863fee3c97c76ba314ccbada7efacb6783e7d32) ) - ROM_LOAD( "mm_c_03", 0x08000, 0x8000, CRC(1def138a) SHA1(d29e12082c4d5c06a9910b3500ef66242cdec905) ) - ROM_LOAD( "mm_c_05", 0x10000, 0x8000, CRC(ed28e86e) SHA1(064871918547a56be330c6994d4db2c9932e14db) ) - - ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) - - ROM_REGION( 0x04000, "chars", 0 ) - ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) - - ROM_REGION( 0x18000, "tiles", 0 ) - ROM_LOAD( "gg11.bin", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 - ROM_LOAD( "gg10.bin", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 - ROM_LOAD( "gg9.bin", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 - ROM_LOAD( "gg8.bin", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 - ROM_LOAD( "gg7.bin", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 - ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 - - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) - ROM_LOAD( "gg17.bin", 0x00000, 0x4000, CRC(93e50a8f) SHA1(42d367f57bb2fdf60a0445ac1533da99cfeaa617) ) // sprites 0 Plane 1-2 - ROM_LOAD( "gg16.bin", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 - ROM_LOAD( "gg15.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 - ROM_LOAD( "gg14.bin", 0x10000, 0x4000, CRC(6aaf12f9) SHA1(207a7407288182a4f3eddaea634c6a6452131182) ) // sprites 0 Plane 3-4 - ROM_LOAD( "gg13.bin", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 - ROM_LOAD( "gg12.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 - - ROM_REGION( 0x0200, "proms", 0 ) - ROM_LOAD( "tbp24s10.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) - ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) -ROM_END - -ROM_START( gngbl ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "5.84490.10n", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) - ROM_LOAD( "4.84490.9n", 0x08000, 0x4000, CRC(527f5c39) SHA1(fcef0159fcb2d8492537408758ac9629781a8c62) ) - ROM_LOAD( "3.84490.8n", 0x0c000, 0x4000, CRC(1c5175d5) SHA1(0e21756517ac39d03af212dd5a04a3bbf633e067) ) - ROM_LOAD( "7.84490.13n", 0x10000, 0x4000, CRC(fd9a8dda) SHA1(222c3c759c6b60f82351b9e6bf748fb4872e82b4) ) - ROM_LOAD( "6.84490.12n", 0x14000, 0x4000, CRC(c83dbd10) SHA1(0243fcb3d228c4c8177ebb6686b84ff512467533) ) - - ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "2.8529.13h", 0x0000, 0x8000, CRC(55cfb196) SHA1(df9cdbb24c26bca226d7274225725d62ea854c7a) ) - - ROM_REGION( 0x04000, "chars", 0 ) - ROM_LOAD( "1.84490.11e", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) - - ROM_REGION( 0x18000, "tiles", 0 ) - ROM_LOAD( "13.84490.3e", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 - ROM_LOAD( "12.84490.1e", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 - ROM_LOAD( "11.84490.3c", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 - ROM_LOAD( "10.84490.1c", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 - ROM_LOAD( "9.84490.3b", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 - ROM_LOAD( "8.84490.1b", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 - - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) - ROM_LOAD( "19.84472.4n", 0x00000, 0x4000, CRC(4613afdc) SHA1(13e5a38a134bd7cfa16c63a18fa332c6d66b9345) ) // sprites 0 Plane 1-2 - ROM_LOAD( "18.84472.3n", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 - ROM_LOAD( "17.84472.1n", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 - ROM_LOAD( "16.84472.4l", 0x10000, 0x4000, CRC(608d68d5) SHA1(af207f9ee2f93a0cf9cf25cfe72b0fdfe55481b8) ) // sprites 0 Plane 3-4 - ROM_LOAD( "15.84490.3l", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 - ROM_LOAD( "14.84490.1l", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 -ROM_END - -ROM_START( gngbla ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "3.10n", 0x04000, 0x4000, CRC(4f94130f) SHA1(6863fee3c97c76ba314ccbada7efacb6783e7d32) ) - ROM_LOAD( "4.9n", 0x08000, 0x4000, CRC(08322bef) SHA1(7107ed1f9eae2618b0d420d53af04df680bd4b99) ) - ROM_LOAD( "5.8n", 0x0c000, 0x4000, CRC(b6582167) SHA1(47be2b9d6a23fefcc131e10456c5ba71df5461c5) ) - ROM_LOAD( "1.13n", 0x10000, 0x4000, CRC(fd9a8dda) SHA1(222c3c759c6b60f82351b9e6bf748fb4872e82b4) ) - ROM_LOAD( "2.12n", 0x14000, 0x4000, CRC(f32c2e55) SHA1(0eab4b4e567f4b87233a5f259654c4dde4f8cad2) ) - - ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "6.13h", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) - - ROM_REGION( 0x04000, "chars", 0 ) - ROM_LOAD( "7.10e", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) - - ROM_REGION( 0x18000, "tiles", 0 ) - ROM_LOAD( "19.e3", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 - ROM_LOAD( "12.e1", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 - ROM_LOAD( "11.c3", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 - ROM_LOAD( "10.c1", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 - ROM_LOAD( "9.b3", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 - ROM_LOAD( "8.1b", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 - - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) - ROM_LOAD( "13.n4", 0x00000, 0x4000, CRC(4613afdc) SHA1(13e5a38a134bd7cfa16c63a18fa332c6d66b9345) ) // sprites 0 Plane 1-2 - ROM_LOAD( "14.n3", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 - ROM_LOAD( "15.n1", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 - ROM_LOAD( "16.l4", 0x10000, 0x4000, CRC(608d68d5) SHA1(af207f9ee2f93a0cf9cf25cfe72b0fdfe55481b8) ) // sprites 0 Plane 3-4 - ROM_LOAD( "17.l3", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 - ROM_LOAD( "18.l1", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 -ROM_END - -ROM_START( gngprot ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "gg10n.bin", 0x04000, 0x4000, CRC(5d2a2c90) SHA1(39db20ebf95deb61d887bd88e3cb66c7bbd11f15) ) - ROM_LOAD( "gg9n.bin", 0x08000, 0x4000, CRC(30eb183d) SHA1(8df3d73c9d190edfa0b435cdf994b9f30def2ce0) ) - ROM_LOAD( "gg8n.bin", 0x0c000, 0x4000, CRC(4b5e2145) SHA1(99f269d52ab817fee456b157ce7931859711102a) ) - ROM_LOAD( "gg13n.bin", 0x10000, 0x4000, CRC(2664aae6) SHA1(d2dd3951d115da8a28096d4bad709b1d6f80fc50) ) - ROM_LOAD( "gg12n.bin", 0x14000, 0x4000, CRC(c7ef4ae8) SHA1(ffa34bad487b3a5b249bc8d1bbe614e34d1dc2c6) ) - - ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg14h.bin", 0x0000, 0x8000, CRC(55cfb196) SHA1(df9cdbb24c26bca226d7274225725d62ea854c7a) ) - - ROM_REGION( 0x04000, "chars", 0 ) - ROM_LOAD( "gg11e.bin", 0x00000, 0x4000, CRC(ccea9365) SHA1(bb567529fa376afc0a5afd331dcecef4f61cc8a3) ) - - ROM_REGION( 0x18000, "tiles", 0 ) - ROM_LOAD( "gg3e.bin", 0x00000, 0x4000, CRC(68db22c8) SHA1(ada859bfa60d9563a8a86b1b6526f626b932981c) ) // 0-1 Plane 1 - ROM_LOAD( "gg1e.bin", 0x04000, 0x4000, CRC(dad8dd2f) SHA1(30a6dd2f6b26acaab0a003f5099a2fcb46644d45) ) // 2-3 Plane 1 - ROM_LOAD( "gg3c.bin", 0x08000, 0x4000, CRC(7a158323) SHA1(183f33f214b4c04e9130cbe2c24e08b5303bb2de) ) // 0-1 Plane 2 - ROM_LOAD( "gg1c.bin", 0x0c000, 0x4000, CRC(7314d095) SHA1(1288eaf0d82ac65a1bb94e68114b4b2f84910901) ) // 2-3 Plane 2 - ROM_LOAD( "gg3b.bin", 0x10000, 0x4000, CRC(03a96d9b) SHA1(5d74e156b0cd1b54d7bd61e1664834f768d5b9f8) ) // 0-1 Plane 3 - ROM_LOAD( "gg1b.bin", 0x14000, 0x4000, CRC(7b9899bc) SHA1(be9b7b18542f38c8fb8b075760995acecace79ad) ) // 2-3 Plane 3 - - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) - ROM_LOAD( "gg4l.bin", 0x00000, 0x4000, CRC(49cf81b4) SHA1(b87aba71446884f9926ced28716876ad701b183f) ) // sprites 0 Plane 1-2 - ROM_LOAD( "gg3l.bin", 0x04000, 0x4000, CRC(e61437b1) SHA1(7043ac80ee40057839bf7ee7af62961d9ff3d50b) ) // sprites 1 Plane 1-2 - ROM_LOAD( "gg1l.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 - ROM_LOAD( "gg4n.bin", 0x10000, 0x4000, CRC(d5aff5a7) SHA1(b75b271c7d38ed9689bff7a3bc9a67a0aae9ed8b) ) // sprites 0 Plane 3-4 - ROM_LOAD( "gg3n.bin", 0x14000, 0x4000, CRC(d589caeb) SHA1(f787557dc083f765aec3d64896ef6cdf5e8d54cc) ) // sprites 1 Plane 3-4 - ROM_LOAD( "gg1n.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 -ROM_END - - -ROM_START( gngblita ) - ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "3", 0x04000, 0x4000, CRC(4859d068) SHA1(8b22772ea383ecaee01da696c0c7b568ab1e4615) ) - ROM_LOAD( "4-5", 0x08000, 0x8000, CRC(233a4589) SHA1(c95c4dcbf53fac5a0c11466bc27369bf8328bd01) ) - ROM_LOAD( "1-2", 0x10000, 0x8000, CRC(ed28e86e) SHA1(064871918547a56be330c6994d4db2c9932e14db) ) - - ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) - - ROM_REGION( 0x04000, "chars", 0 ) - ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) - - ROM_REGION( 0x18000, "tiles", 0 ) - ROM_LOAD( "gg11.bin", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 - ROM_LOAD( "gg10.bin", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 - ROM_LOAD( "gg9.bin", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 - ROM_LOAD( "gg8.bin", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 - ROM_LOAD( "gg7.bin", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 - ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 - - ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) - ROM_LOAD( "gg17.bin", 0x00000, 0x4000, CRC(93e50a8f) SHA1(42d367f57bb2fdf60a0445ac1533da99cfeaa617) ) // sprites 0 Plane 1-2 - ROM_LOAD( "gg16.bin", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 - ROM_LOAD( "gg15.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 - ROM_LOAD( "gg14.bin", 0x10000, 0x4000, CRC(6aaf12f9) SHA1(207a7407288182a4f3eddaea634c6a6452131182) ) // sprites 0 Plane 3-4 - ROM_LOAD( "gg13.bin", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 - ROM_LOAD( "gg12.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 - - ROM_REGION( 0x0200, "proms", 0 ) - ROM_LOAD( "tbp24s10.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) - ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) - - ROM_REGION( 0x0100, "plds", 0 ) - ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) -ROM_END - /* Ghosts'n Goblins (US) @@ -927,7 +799,7 @@ ROM_START( gngt ) ROM_LOAD( "mmt05d.13n", 0x10000, 0x8000, CRC(8f7cff61) SHA1(1875f254a7737e1fbf6770ee4a322d675d043a44) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "mm02.14h", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "mm02.14h", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "mm01.11e", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -953,6 +825,135 @@ ROM_START( gngt ) ROM_LOAD( "m-01.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // 63s141, priority (not used) ROM_END +ROM_START( gngprot ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "gg10n.bin", 0x04000, 0x4000, CRC(5d2a2c90) SHA1(39db20ebf95deb61d887bd88e3cb66c7bbd11f15) ) + ROM_LOAD( "gg9n.bin", 0x08000, 0x4000, CRC(30eb183d) SHA1(8df3d73c9d190edfa0b435cdf994b9f30def2ce0) ) + ROM_LOAD( "gg8n.bin", 0x0c000, 0x4000, CRC(4b5e2145) SHA1(99f269d52ab817fee456b157ce7931859711102a) ) + ROM_LOAD( "gg13n.bin", 0x10000, 0x4000, CRC(2664aae6) SHA1(d2dd3951d115da8a28096d4bad709b1d6f80fc50) ) + ROM_LOAD( "gg12n.bin", 0x14000, 0x4000, CRC(c7ef4ae8) SHA1(ffa34bad487b3a5b249bc8d1bbe614e34d1dc2c6) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "gg14h.bin", 0x00000, 0x8000, CRC(55cfb196) SHA1(df9cdbb24c26bca226d7274225725d62ea854c7a) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "gg11e.bin", 0x00000, 0x4000, CRC(ccea9365) SHA1(bb567529fa376afc0a5afd331dcecef4f61cc8a3) ) + + ROM_REGION( 0x18000, "tiles", 0 ) + ROM_LOAD( "gg3e.bin", 0x00000, 0x4000, CRC(68db22c8) SHA1(ada859bfa60d9563a8a86b1b6526f626b932981c) ) // 0-1 Plane 1 + ROM_LOAD( "gg1e.bin", 0x04000, 0x4000, CRC(dad8dd2f) SHA1(30a6dd2f6b26acaab0a003f5099a2fcb46644d45) ) // 2-3 Plane 1 + ROM_LOAD( "gg3c.bin", 0x08000, 0x4000, CRC(7a158323) SHA1(183f33f214b4c04e9130cbe2c24e08b5303bb2de) ) // 0-1 Plane 2 + ROM_LOAD( "gg1c.bin", 0x0c000, 0x4000, CRC(7314d095) SHA1(1288eaf0d82ac65a1bb94e68114b4b2f84910901) ) // 2-3 Plane 2 + ROM_LOAD( "gg3b.bin", 0x10000, 0x4000, CRC(03a96d9b) SHA1(5d74e156b0cd1b54d7bd61e1664834f768d5b9f8) ) // 0-1 Plane 3 + ROM_LOAD( "gg1b.bin", 0x14000, 0x4000, CRC(7b9899bc) SHA1(be9b7b18542f38c8fb8b075760995acecace79ad) ) // 2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) + ROM_LOAD( "gg4l.bin", 0x00000, 0x4000, CRC(49cf81b4) SHA1(b87aba71446884f9926ced28716876ad701b183f) ) // sprites 0 Plane 1-2 + ROM_LOAD( "gg3l.bin", 0x04000, 0x4000, CRC(e61437b1) SHA1(7043ac80ee40057839bf7ee7af62961d9ff3d50b) ) // sprites 1 Plane 1-2 + ROM_LOAD( "gg1l.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 + ROM_LOAD( "gg4n.bin", 0x10000, 0x4000, CRC(d5aff5a7) SHA1(b75b271c7d38ed9689bff7a3bc9a67a0aae9ed8b) ) // sprites 0 Plane 3-4 + ROM_LOAD( "gg3n.bin", 0x14000, 0x4000, CRC(d589caeb) SHA1(f787557dc083f765aec3d64896ef6cdf5e8d54cc) ) // sprites 1 Plane 3-4 + ROM_LOAD( "gg1n.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 +ROM_END + +ROM_START( gngbl ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "5.84490.10n", 0x04000, 0x4000, CRC(66606beb) SHA1(4c640f49be93c7d2b12d4d4c56c56e74099b6c2f) ) + ROM_LOAD( "4.84490.9n", 0x08000, 0x4000, CRC(527f5c39) SHA1(fcef0159fcb2d8492537408758ac9629781a8c62) ) + ROM_LOAD( "3.84490.8n", 0x0c000, 0x4000, CRC(1c5175d5) SHA1(0e21756517ac39d03af212dd5a04a3bbf633e067) ) + ROM_LOAD( "7.84490.13n", 0x10000, 0x4000, CRC(fd9a8dda) SHA1(222c3c759c6b60f82351b9e6bf748fb4872e82b4) ) + ROM_LOAD( "6.84490.12n", 0x14000, 0x4000, CRC(c83dbd10) SHA1(0243fcb3d228c4c8177ebb6686b84ff512467533) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "2.8529.13h", 0x00000, 0x8000, CRC(55cfb196) SHA1(df9cdbb24c26bca226d7274225725d62ea854c7a) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "1.84490.11e", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) + + ROM_REGION( 0x18000, "tiles", 0 ) + ROM_LOAD( "13.84490.3e", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 + ROM_LOAD( "12.84490.1e", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 + ROM_LOAD( "11.84490.3c", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 + ROM_LOAD( "10.84490.1c", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 + ROM_LOAD( "9.84490.3b", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 + ROM_LOAD( "8.84490.1b", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) + ROM_LOAD( "19.84472.4n", 0x00000, 0x4000, CRC(4613afdc) SHA1(13e5a38a134bd7cfa16c63a18fa332c6d66b9345) ) // sprites 0 Plane 1-2 + ROM_LOAD( "18.84472.3n", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 + ROM_LOAD( "17.84472.1n", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 + ROM_LOAD( "16.84472.4l", 0x10000, 0x4000, CRC(608d68d5) SHA1(af207f9ee2f93a0cf9cf25cfe72b0fdfe55481b8) ) // sprites 0 Plane 3-4 + ROM_LOAD( "15.84490.3l", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 + ROM_LOAD( "14.84490.1l", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 +ROM_END + +ROM_START( gngbla ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "3.10n", 0x04000, 0x4000, CRC(4f94130f) SHA1(6863fee3c97c76ba314ccbada7efacb6783e7d32) ) + ROM_LOAD( "4.9n", 0x08000, 0x4000, CRC(08322bef) SHA1(7107ed1f9eae2618b0d420d53af04df680bd4b99) ) + ROM_LOAD( "5.8n", 0x0c000, 0x4000, CRC(b6582167) SHA1(47be2b9d6a23fefcc131e10456c5ba71df5461c5) ) + ROM_LOAD( "1.13n", 0x10000, 0x4000, CRC(fd9a8dda) SHA1(222c3c759c6b60f82351b9e6bf748fb4872e82b4) ) + ROM_LOAD( "2.12n", 0x14000, 0x4000, CRC(f32c2e55) SHA1(0eab4b4e567f4b87233a5f259654c4dde4f8cad2) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "6.13h", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "7.10e", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) + + ROM_REGION( 0x18000, "tiles", 0 ) + ROM_LOAD( "19.e3", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 + ROM_LOAD( "12.e1", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 + ROM_LOAD( "11.c3", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 + ROM_LOAD( "10.c1", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 + ROM_LOAD( "9.b3", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 + ROM_LOAD( "8.1b", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) + ROM_LOAD( "13.n4", 0x00000, 0x4000, CRC(4613afdc) SHA1(13e5a38a134bd7cfa16c63a18fa332c6d66b9345) ) // sprites 0 Plane 1-2 + ROM_LOAD( "14.n3", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 + ROM_LOAD( "15.n1", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 + ROM_LOAD( "16.l4", 0x10000, 0x4000, CRC(608d68d5) SHA1(af207f9ee2f93a0cf9cf25cfe72b0fdfe55481b8) ) // sprites 0 Plane 3-4 + ROM_LOAD( "17.l3", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 + ROM_LOAD( "18.l1", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 +ROM_END + +ROM_START( gngblita ) + ROM_REGION( 0x18000, "maincpu", 0 ) + ROM_LOAD( "3", 0x04000, 0x4000, CRC(4859d068) SHA1(8b22772ea383ecaee01da696c0c7b568ab1e4615) ) + ROM_LOAD( "4-5", 0x08000, 0x8000, CRC(233a4589) SHA1(c95c4dcbf53fac5a0c11466bc27369bf8328bd01) ) + ROM_LOAD( "1-2", 0x10000, 0x8000, CRC(ed28e86e) SHA1(064871918547a56be330c6994d4db2c9932e14db) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + + ROM_REGION( 0x04000, "chars", 0 ) + ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) + + ROM_REGION( 0x18000, "tiles", 0 ) + ROM_LOAD( "gg11.bin", 0x00000, 0x4000, CRC(ddd56fa9) SHA1(f9d77eee5e2738b7e83ba02fcc55dd480391479f) ) // 0-1 Plane 1 + ROM_LOAD( "gg10.bin", 0x04000, 0x4000, CRC(7302529d) SHA1(8434c994cc55d2586641f3b90b6b15fd65dfb67c) ) // 2-3 Plane 1 + ROM_LOAD( "gg9.bin", 0x08000, 0x4000, CRC(20035bda) SHA1(bbb1fba0eb19471f66d29526fa8423ccb047bd63) ) // 0-1 Plane 2 + ROM_LOAD( "gg8.bin", 0x0c000, 0x4000, CRC(f12ba271) SHA1(1c42fa02cb27b35d10c3f7f036005e747f9f6b79) ) // 2-3 Plane 2 + ROM_LOAD( "gg7.bin", 0x10000, 0x4000, CRC(e525207d) SHA1(1947f159189b3a53f1251d8653b6e7c65c91fc3c) ) // 0-1 Plane 3 + ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2d77e9b2) SHA1(944da1ce29a18bf0fc8deff78bceacba0bf23a07) ) // 2-3 Plane 3 + + ROM_REGION( 0x20000, "sprites", ROMREGION_ERASEFF ) + ROM_LOAD( "gg17.bin", 0x00000, 0x4000, CRC(93e50a8f) SHA1(42d367f57bb2fdf60a0445ac1533da99cfeaa617) ) // sprites 0 Plane 1-2 + ROM_LOAD( "gg16.bin", 0x04000, 0x4000, CRC(06d7e5ca) SHA1(9e06012bcd82f98fad43de666ef9a75979d940ab) ) // sprites 1 Plane 1-2 + ROM_LOAD( "gg15.bin", 0x08000, 0x4000, CRC(bc1fe02d) SHA1(e3a1421d465b87148ffa94f5673b2307f0246afe) ) // sprites 2 Plane 1-2 + ROM_LOAD( "gg14.bin", 0x10000, 0x4000, CRC(6aaf12f9) SHA1(207a7407288182a4f3eddaea634c6a6452131182) ) // sprites 0 Plane 3-4 + ROM_LOAD( "gg13.bin", 0x14000, 0x4000, CRC(e80c3fca) SHA1(cb641c25bb04b970b2cbeca41adb792bbe142fb5) ) // sprites 1 Plane 3-4 + ROM_LOAD( "gg12.bin", 0x18000, 0x4000, CRC(7780a925) SHA1(3f129ca6d695548b659955fe538584bd9ac2ff17) ) // sprites 2 Plane 3-4 + + ROM_REGION( 0x0200, "proms", 0 ) + ROM_LOAD( "tbp24s10.14k", 0x0000, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) // video timing (not used) + ROM_LOAD( "63s141.2e", 0x0100, 0x0100, CRC(4a1285a4) SHA1(5018c3950b675af58db499e2883ecbc55419b491) ) // priority (not used) + + ROM_REGION( 0x0100, "plds", 0 ) + ROM_LOAD( "gg-pal10l8.bin", 0x0000, 0x002c, CRC(87f1b7e0) SHA1(b719c3be7bd4a02660bb0887f752e9769cbd37d2) ) +ROM_END + ROM_START( makaimur ) ROM_REGION( 0x18000, "maincpu", 0 ) ROM_LOAD( "10n.rom", 0x04000, 0x4000, CRC(81e567e0) SHA1(2a917e562686e782ea7d034a54e9728695a19258) ) // 4000-5fff is page 4 @@ -960,7 +961,7 @@ ROM_START( makaimur ) ROM_LOAD( "12n.rom", 0x10000, 0x8000, CRC(65a6a97b) SHA1(79de931ae183d8044cb6d9024b475196c679c86c) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -988,9 +989,9 @@ ROM_END ROM_START( makaimurb ) // 85606-A-3/85606-B-3 ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "mj04b.10n", 0x04000, 0x4000, CRC(f8bda78f) SHA1(ed5d67996475504cdf7b9fa356f6e160cbbcfa77) ) // 4000-5fff is page 4 - ROM_LOAD( "mj03b.8n", 0x08000, 0x8000, CRC(0ba14114) SHA1(ce72044e22906dcd3a88d5f177905a787ac229ce) ) - ROM_LOAD( "mj05b.12n", 0x10000, 0x8000, CRC(3040a574) SHA1(fbb2fb77ef2e45ca4e54c82c8fda3b3ceca34d2d) ) // page 0, 1, 2, 3 + ROM_LOAD( "mj04b.10n", 0x04000, 0x4000, CRC(f8bda78f) SHA1(ed5d67996475504cdf7b9fa356f6e160cbbcfa77) ) // 4000-5fff is page 4 + ROM_LOAD( "mj03b.8n", 0x08000, 0x8000, CRC(0ba14114) SHA1(ce72044e22906dcd3a88d5f177905a787ac229ce) ) + ROM_LOAD( "mj05b.12n", 0x10000, 0x8000, CRC(3040a574) SHA1(fbb2fb77ef2e45ca4e54c82c8fda3b3ceca34d2d) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) ROM_LOAD( "mm02.14h", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) @@ -1033,7 +1034,7 @@ ROM_START( makaimurbbl ) ROM_LOAD( "gg6.bin", 0x14000, 0x4000, CRC(2e44634f) SHA1(60b6b8630f14688488593ee439ef77a7a65cd467) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -1061,12 +1062,12 @@ ROM_END ROM_START( makaimurc ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "mj04c.bin", 0x04000, 0x4000, CRC(1294edb1) SHA1(35d3b3ce4ee25d3cfa27097de0c9a2ab5e4892aa) ) // 4000-5fff is page 4 - ROM_LOAD( "mj03c.bin", 0x08000, 0x8000, CRC(d343332d) SHA1(3edf47ff2bd49b4451b737b6d3eb54256b489c81) ) - ROM_LOAD( "mj05c.bin", 0x10000, 0x8000, CRC(535342c2) SHA1(5f05a4965476f2db6fddec557d93d12ec1f9750c) ) // page 0, 1, 2, 3 + ROM_LOAD( "mj04c.bin", 0x04000, 0x4000, CRC(1294edb1) SHA1(35d3b3ce4ee25d3cfa27097de0c9a2ab5e4892aa) ) // 4000-5fff is page 4 + ROM_LOAD( "mj03c.bin", 0x08000, 0x8000, CRC(d343332d) SHA1(3edf47ff2bd49b4451b737b6d3eb54256b489c81) ) + ROM_LOAD( "mj05c.bin", 0x10000, 0x8000, CRC(535342c2) SHA1(5f05a4965476f2db6fddec557d93d12ec1f9750c) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -1094,12 +1095,12 @@ ROM_END ROM_START( makaimurg ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD( "mj04g.bin", 0x04000, 0x4000, CRC(757c94d3) SHA1(07f7cf788810a1425016e016ce3579adb3253ac7) ) // 4000-5fff is page 4 - ROM_LOAD( "mj03g.bin", 0x08000, 0x8000, CRC(61b043bb) SHA1(23a0a17d0abc4b084ffeba90266ef455361771cc) ) - ROM_LOAD( "mj05g.bin", 0x10000, 0x8000, CRC(f2fdccf5) SHA1(7694a981a6196d77fd2279fc34042b4cfb40c054) ) // page 0, 1, 2, 3 + ROM_LOAD( "mj04g.bin", 0x04000, 0x4000, CRC(757c94d3) SHA1(07f7cf788810a1425016e016ce3579adb3253ac7) ) // 4000-5fff is page 4 + ROM_LOAD( "mj03g.bin", 0x08000, 0x8000, CRC(61b043bb) SHA1(23a0a17d0abc4b084ffeba90266ef455361771cc) ) + ROM_LOAD( "mj05g.bin", 0x10000, 0x8000, CRC(f2fdccf5) SHA1(7694a981a6196d77fd2279fc34042b4cfb40c054) ) // page 0, 1, 2, 3 ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "gg2.bin", 0x0000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) + ROM_LOAD( "gg2.bin", 0x00000, 0x8000, CRC(615f5b6f) SHA1(7ef9ec5c2072e21c787a6bbf700033f50c759c1d) ) ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "gg1.bin", 0x00000, 0x4000, CRC(ecfccf07) SHA1(0a1518e19a2e0a4cc3dde4b9568202ea911b5ece) ) @@ -1158,15 +1159,15 @@ ROM_END } // anonymous namespace -GAME( 1985, gng, 0, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gng, 0, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 1)", MACHINE_SUPPORTS_SAVE ) // rev c? GAME( 1985, gnga, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 2)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngb, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 3)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, gngc, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 4)", MACHINE_SUPPORTS_SAVE ) // rev c? +GAME( 1985, gngc, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (World? set 4)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gngt, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom (Taito America license)", "Ghosts'n Goblins (US)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gngprot, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (prototype)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngbl, gng, gng, gng, gng_state, empty_init, ROT0, "bootleg", "Ghosts'n Goblins (bootleg with Cross)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngbla, gng, gng, gng, gng_state, empty_init, ROT0, "bootleg", "Ghosts'n Goblins (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, gngprot, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom", "Ghosts'n Goblins (prototype)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, gngblita, gng, gng, gng, gng_state, empty_init, ROT0, "bootleg", "Ghosts'n Goblins (Italian bootleg, harder)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, gngt, gng, gng, gng, gng_state, empty_init, ROT0, "Capcom (Taito America license)", "Ghosts'n Goblins (US)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, makaimur, gng, gng, makaimur, gng_state, empty_init, ROT0, "Capcom", "Makaimura (Japan)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, makaimurb, gng, gng, makaimur, gng_state, empty_init, ROT0, "Capcom", "Makaimura (Japan revision B)", MACHINE_SUPPORTS_SAVE ) GAME( 1985, makaimurbbl, gng, gng, makaimur, gng_state, empty_init, ROT0, "bootleg", "Makaimura (Japan revision B bootleg)", MACHINE_SUPPORTS_SAVE ) From 95d628819fc515b5dc85a3a4f60a6511a3e41c43 Mon Sep 17 00:00:00 2001 From: hap Date: Fri, 20 Mar 2026 14:00:25 +0100 Subject: [PATCH 331/351] ymz770: remove hardcoded clock --- src/devices/sound/ymz770.cpp | 11 +++++------ src/devices/sound/ymz770.h | 4 ++-- src/mame/capcom/gng.cpp | 2 +- src/mame/igs/pgm2.cpp | 2 +- 4 files changed, 9 insertions(+), 10 deletions(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index f175cac853d..d4de2996f53 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -12,7 +12,6 @@ TODO: - Simple Access mode. SACs is register / data lists same as SEQ. in 770C, when both /SEL and /CS pins goes low - will be run SAC with number set at data bus. can not be used in CV1K (/SEL pin is NC, internally pulled to VCC), probably not used in PGM2 too. 770: -- Configurable clock (currently hardcoded at 16kHz) - sequencer timers implemented but seems unused, presumably because of design flaws or bugs, likely due to lack of automatic adding of sequencer # to register offset. in result sequences uses very long chains of 32-sample wait commands instead, wasting a lot of ROM space. - sequencer triggers not implemented, not sure how they works (Deathsmiles ending tune starts sequence with TGST = 01h, likely a bug and don't affect tune playback) @@ -49,15 +48,15 @@ DEFINE_DEVICE_TYPE(YMZ774, ymz774_device, "ymz774", "Yamaha YMZ774 AMMS2C") //------------------------------------------------- ymz770_device::ymz770_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ymz770_device(mconfig, YMZ770, tag, owner, clock, 16000) + : ymz770_device(mconfig, YMZ770, tag, owner, clock, 1024) { } -ymz770_device::ymz770_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t sclock) +ymz770_device::ymz770_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t divider) : device_t(mconfig, type, tag, owner, clock) , device_sound_interface(mconfig, *this) , m_stream(nullptr) - , m_sclock(sclock) + , m_divider(divider) , m_cur_reg(0) , m_mute(0) , m_doen(0) @@ -77,7 +76,7 @@ ymz770_device::ymz770_device(const machine_config &mconfig, device_type type, co void ymz770_device::device_start() { // create the stream - m_stream = stream_alloc(0, 2, m_sclock); + m_stream = stream_alloc(0, 2, clock() / m_divider); for (auto & channel : m_channels) { @@ -454,7 +453,7 @@ void ymz770_device::internal_reg_write(uint8_t reg, uint8_t data) //------------------------------------------------- ymz774_device::ymz774_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : ymz770_device(mconfig, YMZ774, tag, owner, clock, 44100) + : ymz770_device(mconfig, YMZ774, tag, owner, clock, 512) { // calculate volume increments, fixed point values, fractions of 0x20000 for (u32 i = 0; i < 256; i++) diff --git a/src/devices/sound/ymz770.h b/src/devices/sound/ymz770.h index 70b110029b9..1d81b5eb675 100644 --- a/src/devices/sound/ymz770.h +++ b/src/devices/sound/ymz770.h @@ -41,10 +41,10 @@ protected: virtual void sequencer(); uint8_t get_rom_byte(uint32_t offset) { return m_rom[offset % m_rom.bytes()]; } // need optimise or its good as is ? - ymz770_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t sclock); + ymz770_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t divider); sound_stream *m_stream; - uint32_t m_sclock; + uint32_t m_divider; // data uint8_t m_cur_reg; diff --git a/src/mame/capcom/gng.cpp b/src/mame/capcom/gng.cpp index ee5ef4e37cf..2edcd395d3d 100644 --- a/src/mame/capcom/gng.cpp +++ b/src/mame/capcom/gng.cpp @@ -671,7 +671,7 @@ ROM_END /* Newer PCB, with visible wires and mask ROMs (85606-A-5 / 85606-B-4). The ROM contents are a mix between 'gngb' and 'makaimurb'. - It has the Japanese cross weapon srpite, but retains the shield icon in the tiles. + It has the Japanese cross weapon sprite, but retains the shield icon in the tiles. The ROM configuration is set with a jumpers bank at 1F. Mask ROMs: EPROMs (eg. gngb): diff --git a/src/mame/igs/pgm2.cpp b/src/mame/igs/pgm2.cpp index 3e61d617ac3..d3709ff1ce0 100644 --- a/src/mame/igs/pgm2.cpp +++ b/src/mame/igs/pgm2.cpp @@ -778,7 +778,7 @@ void pgm2_state::pgm2(machine_config &config) SPEAKER(config, "speaker", 2).front(); - ymz774_device &ymz774(YMZ774(config, "ymz774", 16384000)); // is clock correct ? + ymz774_device &ymz774(YMZ774(config, "ymz774", 22.5792_MHz_XTAL)); ymz774.add_route(0, "speaker", 1.0, 0); ymz774.add_route(1, "speaker", 1.0, 1); From 1afd61fbdbaf30c6c4e8c8ef101492520e3925e8 Mon Sep 17 00:00:00 2001 From: Stuart Inglis Date: Sat, 21 Mar 2026 05:06:49 +1300 Subject: [PATCH 332/351] m6502: route core fetch/data/write paths through interruptible accesses (#15121) * m6502: route core fetch/data/write paths through interruptible accesses * m6502: add interruptible access regression test * m6502: narrow interruptible access follow-up --- src/devices/cpu/m6502/m4510.cpp | 8 +- src/devices/cpu/m6502/m50734.cpp | 4 +- src/devices/cpu/m6502/m6502.cpp | 42 +++-- src/devices/cpu/m6502/m6502.h | 10 +- src/devices/cpu/m6502/m6502make.py | 5 +- src/devices/cpu/m6502/m6509.cpp | 12 +- src/devices/cpu/m6502/m6510.cpp | 16 +- src/devices/cpu/m6502/r65c19.cpp | 20 +-- src/devices/cpu/m6502/r65c19.h | 2 +- src/devices/cpu/m6502/rp2a03.cpp | 2 +- src/devices/cpu/m6502/st2204.cpp | 24 +-- src/devices/cpu/m6502/st2205u.cpp | 58 +++---- src/devices/cpu/m6502/st2xxx.h | 2 +- src/devices/cpu/m6502/xavix.cpp | 28 ++-- src/devices/cpu/m6502/xavix.h | 5 +- src/mame/mame.lst | 3 + src/mame/virtual/utm6502.cpp | 250 +++++++++++++++++++++++++++++ 17 files changed, 381 insertions(+), 110 deletions(-) create mode 100644 src/mame/virtual/utm6502.cpp diff --git a/src/devices/cpu/m6502/m4510.cpp b/src/devices/cpu/m6502/m4510.cpp index 7f881067a50..3b8aae863f7 100644 --- a/src/devices/cpu/m6502/m4510.cpp +++ b/src/devices/cpu/m6502/m4510.cpp @@ -130,7 +130,7 @@ m4510_device::mi_4510::mi_4510(m4510_device *_base) uint8_t m4510_device::mi_4510::read(uint16_t adr) { - uint8_t res = m_program.read_byte(m_base->map(adr)); + uint8_t res = m_program.read_interruptible(m_base->map(adr)); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -140,7 +140,7 @@ uint8_t m4510_device::mi_4510::read(uint16_t adr) uint8_t m4510_device::mi_4510::read_sync(uint16_t adr) { - uint8_t res = m_csprogram.read_byte(m_base->map(adr)); + uint8_t res = m_csprogram.read_interruptible(m_base->map(adr)); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -150,7 +150,7 @@ uint8_t m4510_device::mi_4510::read_sync(uint16_t adr) uint8_t m4510_device::mi_4510::read_arg(uint16_t adr) { - uint8_t res = m_cprogram.read_byte(m_base->map(adr)); + uint8_t res = m_cprogram.read_interruptible(m_base->map(adr)); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -160,7 +160,7 @@ uint8_t m4510_device::mi_4510::read_arg(uint16_t adr) void m4510_device::mi_4510::write(uint16_t adr, uint8_t val) { - m_program.write_byte(m_base->map(adr), val); + m_program.write_interruptible(m_base->map(adr), val); if(adr == 0x0000) m_base->dir_w(val); else if(adr == 0x0001) diff --git a/src/devices/cpu/m6502/m50734.cpp b/src/devices/cpu/m6502/m50734.cpp index 98e6e99e541..1d3a1c084a8 100644 --- a/src/devices/cpu/m6502/m50734.cpp +++ b/src/devices/cpu/m6502/m50734.cpp @@ -171,7 +171,7 @@ void m50734_device::read_dummy(u16 adr) u8 m50734_device::read_data(u16 adr) { if (BIT(m_p0_function, 5)) - return m_data.read_byte(adr); + return m_data.read_interruptible(adr); else return m740_device::read(adr); } @@ -179,7 +179,7 @@ u8 m50734_device::read_data(u16 adr) void m50734_device::write_data(u16 adr, u8 val) { if (BIT(m_p0_function, 5)) - m_data.write_byte(adr, val); + m_data.write_interruptible(adr, val); else m740_device::write(adr, val); } diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index c8480540120..1668db08ae4 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -46,14 +46,22 @@ void m6502_device::device_start() void m6502_device::init() { if(m_mintf) { - space(AS_PROGRAM).cache(m_mintf->m_cprogram); - space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(m_mintf->m_csprogram); - // specific group 1-14 or 15-31 - if(space(AS_PROGRAM).addr_width() > 14) + if(space(AS_PROGRAM).addr_width() > 14) { space(AS_PROGRAM).specific(m_mintf->m_program); - else + m_mintf->m_cprogram = m_mintf->m_program; + if(has_space(AS_OPCODES)) + space(AS_OPCODES).specific(m_mintf->m_csprogram); + else + m_mintf->m_csprogram = m_mintf->m_program; + } else { space(AS_PROGRAM).specific(m_mintf->m_program14); + m_mintf->m_cprogram14 = m_mintf->m_program14; + if(has_space(AS_OPCODES)) + space(AS_OPCODES).specific(m_mintf->m_csprogram14); + else + m_mintf->m_csprogram14 = m_mintf->m_program14; + } } state_add(STATE_GENPC, "GENPC", m_XPC).callexport().noshow(); @@ -447,7 +455,7 @@ void m6502_device::state_import(const device_state_entry &entry) m_PC = m_NPC; m_irq_taken = false; prefetch_start(); - m_IR = m_mintf->read_sync(m_PC); + m_IR = read_sync(m_PC); prefetch_end(); m_PPC = m_NPC; m_inst_state = m_IR | m_inst_state_base; @@ -535,32 +543,42 @@ void m6502_device::memory_interface::write_9(uint16_t adr, uint8_t val) uint8_t m6502_device::mi_default::read(uint16_t adr) { - return m_program.read_byte(adr); + return m_program.read_interruptible(adr); } uint8_t m6502_device::mi_default::read_sync(uint16_t adr) { - return m_csprogram.read_byte(adr); + return m_csprogram.read_interruptible(adr); } uint8_t m6502_device::mi_default::read_arg(uint16_t adr) { - return m_cprogram.read_byte(adr); + return m_cprogram.read_interruptible(adr); } void m6502_device::mi_default::write(uint16_t adr, uint8_t val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); } uint8_t m6502_device::mi_default14::read(uint16_t adr) { - return m_program14.read_byte(adr); + return m_program14.read_interruptible(adr); +} + +uint8_t m6502_device::mi_default14::read_sync(uint16_t adr) +{ + return m_csprogram14.read_interruptible(adr); +} + +uint8_t m6502_device::mi_default14::read_arg(uint16_t adr) +{ + return m_cprogram14.read_interruptible(adr); } void m6502_device::mi_default14::write(uint16_t adr, uint8_t val) { - m_program14.write_byte(adr, val); + m_program14.write_interruptible(adr, val); } diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h index 55b95f6ed08..99a491cdefc 100644 --- a/src/devices/cpu/m6502/m6502.h +++ b/src/devices/cpu/m6502/m6502.h @@ -25,9 +25,8 @@ public: class memory_interface { public: - memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_cprogram, m_csprogram; - memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_program; - memory_access<14, 0, 0, ENDIANNESS_LITTLE>::specific m_program14; + memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_program, m_cprogram, m_csprogram; + memory_access<14, 0, 0, ENDIANNESS_LITTLE>::specific m_program14, m_cprogram14, m_csprogram14; virtual ~memory_interface() = default; virtual uint8_t read(uint16_t adr) = 0; @@ -72,6 +71,8 @@ protected: public: virtual ~mi_default14() = default; virtual uint8_t read(uint16_t adr) override; + virtual uint8_t read_sync(uint16_t adr) override; + virtual uint8_t read_arg(uint16_t adr) override; virtual void write(uint16_t adr, uint8_t val) override; }; @@ -140,10 +141,11 @@ protected: uint8_t read(uint16_t adr) { return m_mintf->read(adr); } uint8_t read_9(uint16_t adr) { return m_mintf->read_9(adr); } + uint8_t read_sync(uint16_t adr) { return m_mintf->read_sync(adr); } void write(uint16_t adr, uint8_t val) { m_mintf->write(adr, val); } void write_9(uint16_t adr, uint8_t val) { m_mintf->write_9(adr, val); } uint8_t read_arg(uint16_t adr) { return m_mintf->read_arg(adr); } - uint8_t read_pc() { return m_mintf->read_arg(m_PC); } + uint8_t read_pc() { return read_arg(m_PC); } void prefetch_start(); void prefetch_end(); void prefetch_end_noirq(); diff --git a/src/devices/cpu/m6502/m6502make.py b/src/devices/cpu/m6502/m6502make.py index bbe540b3566..6a5c896aeac 100755 --- a/src/devices/cpu/m6502/m6502make.py +++ b/src/devices/cpu/m6502/m6502make.py @@ -33,11 +33,11 @@ def load_opcodes(fname): # append instruction to last opcode if line == '\tprefetch();': opcodes[-1][1].append("\tprefetch_start();") - opcodes[-1][1].append("\tm_IR = m_mintf->read_sync(m_PC);") + opcodes[-1][1].append("\tm_IR = read_sync(m_PC);") opcodes[-1][1].append("\tprefetch_end();") elif line == '\tprefetch_noirq();': opcodes[-1][1].append("\tprefetch_start();") - opcodes[-1][1].append("\tm_IR = m_mintf->read_sync(m_PC);") + opcodes[-1][1].append("\tm_IR = read_sync(m_PC);") opcodes[-1][1].append("\tprefetch_end_noirq();") else: opcodes[-1][1].append(line) @@ -292,4 +292,3 @@ def main(argv): # ====================================================================== if __name__ == "__main__": sys.exit(main(sys.argv)) - diff --git a/src/devices/cpu/m6502/m6509.cpp b/src/devices/cpu/m6502/m6509.cpp index bb6fa45b5d0..e13fd0b8f23 100644 --- a/src/devices/cpu/m6502/m6509.cpp +++ b/src/devices/cpu/m6502/m6509.cpp @@ -59,7 +59,7 @@ m6509_device::mi_6509::mi_6509(m6509_device *_base) uint8_t m6509_device::mi_6509::read(uint16_t adr) { - uint8_t res = m_program.read_byte(m_base->adr_in_bank_i(adr)); + uint8_t res = m_program.read_interruptible(m_base->adr_in_bank_i(adr)); if(adr == 0x0000) res = m_base->bank_i_r(); else if(adr == 0x0001) @@ -69,7 +69,7 @@ uint8_t m6509_device::mi_6509::read(uint16_t adr) uint8_t m6509_device::mi_6509::read_sync(uint16_t adr) { - uint8_t res = m_csprogram.read_byte(m_base->adr_in_bank_i(adr)); + uint8_t res = m_csprogram.read_interruptible(m_base->adr_in_bank_i(adr)); if(adr == 0x0000) res = m_base->bank_i_r(); else if(adr == 0x0001) @@ -79,7 +79,7 @@ uint8_t m6509_device::mi_6509::read_sync(uint16_t adr) uint8_t m6509_device::mi_6509::read_arg(uint16_t adr) { - uint8_t res = m_cprogram.read_byte(m_base->adr_in_bank_i(adr)); + uint8_t res = m_cprogram.read_interruptible(m_base->adr_in_bank_i(adr)); if(adr == 0x0000) res = m_base->bank_i_r(); else if(adr == 0x0001) @@ -89,7 +89,7 @@ uint8_t m6509_device::mi_6509::read_arg(uint16_t adr) uint8_t m6509_device::mi_6509::read_9(uint16_t adr) { - uint8_t res = m_program.read_byte(m_base->adr_in_bank_y(adr)); + uint8_t res = m_program.read_interruptible(m_base->adr_in_bank_y(adr)); if(adr == 0x0000) res = m_base->bank_i_r(); else if(adr == 0x0001) @@ -99,7 +99,7 @@ uint8_t m6509_device::mi_6509::read_9(uint16_t adr) void m6509_device::mi_6509::write(uint16_t adr, uint8_t val) { - m_program.write_byte(m_base->adr_in_bank_i(adr), val); + m_program.write_interruptible(m_base->adr_in_bank_i(adr), val); if(adr == 0x0000) m_base->bank_i_w(val); else if(adr == 0x0001) @@ -108,7 +108,7 @@ void m6509_device::mi_6509::write(uint16_t adr, uint8_t val) void m6509_device::mi_6509::write_9(uint16_t adr, uint8_t val) { - m_program.write_byte(m_base->adr_in_bank_y(adr), val); + m_program.write_interruptible(m_base->adr_in_bank_y(adr), val); if(adr == 0x0000) m_base->bank_i_w(val); else if(adr == 0x0001) diff --git a/src/devices/cpu/m6502/m6510.cpp b/src/devices/cpu/m6502/m6510.cpp index a5ba07f3743..f328a8867ff 100644 --- a/src/devices/cpu/m6502/m6510.cpp +++ b/src/devices/cpu/m6502/m6510.cpp @@ -111,7 +111,7 @@ m6510_device::mi_6510::mi_6510(m6510_device *_base) uint8_t m6510_device::mi_6510::read(uint16_t adr) { - uint8_t res = m_program.read_byte(adr); + uint8_t res = m_program.read_interruptible(adr); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -121,7 +121,7 @@ uint8_t m6510_device::mi_6510::read(uint16_t adr) uint8_t m6510_device::mi_6510::read_sync(uint16_t adr) { - uint8_t res = m_csprogram.read_byte(adr); + uint8_t res = m_csprogram.read_interruptible(adr); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -131,7 +131,7 @@ uint8_t m6510_device::mi_6510::read_sync(uint16_t adr) uint8_t m6510_device::mi_6510::read_arg(uint16_t adr) { - uint8_t res = m_cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_interruptible(adr); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -141,7 +141,7 @@ uint8_t m6510_device::mi_6510::read_arg(uint16_t adr) void m6510_device::mi_6510::write(uint16_t adr, uint8_t val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); if(adr == 0x0000) m_base->dir_w(val); else if(adr == 0x0001) @@ -173,7 +173,7 @@ m6508_device::mi_6508::mi_6508(m6508_device *_base) uint8_t m6508_device::mi_6508::read(uint16_t adr) { - uint8_t res = m_program.read_byte(adr); + uint8_t res = m_program.read_interruptible(adr); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -185,7 +185,7 @@ uint8_t m6508_device::mi_6508::read(uint16_t adr) uint8_t m6508_device::mi_6508::read_sync(uint16_t adr) { - uint8_t res = m_csprogram.read_byte(adr); + uint8_t res = m_csprogram.read_interruptible(adr); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -197,7 +197,7 @@ uint8_t m6508_device::mi_6508::read_sync(uint16_t adr) uint8_t m6508_device::mi_6508::read_arg(uint16_t adr) { - uint8_t res = m_cprogram.read_byte(adr); + uint8_t res = m_cprogram.read_interruptible(adr); if(adr == 0x0000) res = m_base->dir_r(); else if(adr == 0x0001) @@ -209,7 +209,7 @@ uint8_t m6508_device::mi_6508::read_arg(uint16_t adr) void m6508_device::mi_6508::write(uint16_t adr, uint8_t val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); if(adr == 0x0000) m_base->dir_w(val); else if(adr == 0x0001) diff --git a/src/devices/cpu/m6502/r65c19.cpp b/src/devices/cpu/m6502/r65c19.cpp index ff379c79e3f..84b3ad7f1a1 100644 --- a/src/devices/cpu/m6502/r65c19.cpp +++ b/src/devices/cpu/m6502/r65c19.cpp @@ -108,8 +108,8 @@ device_memory_interface::space_config_vector c39_device::memory_space_config() c void c39_device::device_start() { std::unique_ptr intf = std::make_unique(); - space(AS_DATA).cache(intf->m_escache); space(AS_DATA).specific(intf->m_exp); + intf->m_escache = intf->m_exp; space(AS_IO).specific(intf->m_es4); save_item(NAME(intf->m_bsr)); @@ -186,38 +186,38 @@ void r65c19_device::cir_w(u8 data) u8 c39_device::mi_banked::exp_read(u16 adr) { - return m_exp.read_byte(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); + return m_exp.read_interruptible(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); } u8 c39_device::mi_banked::exp_read_cached(u16 adr) { - return m_escache.read_byte(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); + return m_escache.read_interruptible(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff)); } void c39_device::mi_banked::exp_write(u16 adr, u8 val) { - m_exp.write_byte(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff), val); + m_exp.write_interruptible(u32(m_bsr[(adr & 0xe000) >> 13]) << 13 | (adr & 0x1fff), val); } u8 c39_device::mi_banked::es4_read(u16 adr) { - return m_es4.read_byte(adr & 0x1ff); + return m_es4.read_interruptible(adr & 0x1ff); } void c39_device::mi_banked::es4_write(u16 adr, u8 val) { - m_es4.write_byte(adr & 0x1ff, val); + m_es4.write_interruptible(adr & 0x1ff, val); } u8 c39_device::mi_banked::read(u16 adr) { - return m_program.read_byte(adr); + return m_program.read_interruptible(adr); } u8 c39_device::mi_banked::read_sync(u16 adr) { if (adr < 0x0600) - return m_cprogram.read_byte(adr); + return m_cprogram.read_interruptible(adr); else if (adr >= 0x0800 || BIT(m_pbs, 1)) return exp_read_cached(adr); else @@ -227,7 +227,7 @@ u8 c39_device::mi_banked::read_sync(u16 adr) u8 c39_device::mi_banked::read_arg(u16 adr) { if (adr < 0x0600) - return m_cprogram.read_byte(adr); + return m_cprogram.read_interruptible(adr); else if (adr >= 0x0800 || BIT(m_pbs, 1)) return exp_read_cached(adr); else @@ -236,7 +236,7 @@ u8 c39_device::mi_banked::read_arg(u16 adr) void c39_device::mi_banked::write(u16 adr, u8 val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); } u8 c39_device::pbs_r() diff --git a/src/devices/cpu/m6502/r65c19.h b/src/devices/cpu/m6502/r65c19.h index 1c63e58b3d9..c46ae3f6629 100644 --- a/src/devices/cpu/m6502/r65c19.h +++ b/src/devices/cpu/m6502/r65c19.h @@ -138,7 +138,7 @@ private: u8 es4_read(u16 adr); void es4_write(u16 adr, u8 val); - memory_access<21, 0, 0, ENDIANNESS_LITTLE>::cache m_escache; + memory_access<21, 0, 0, ENDIANNESS_LITTLE>::specific m_escache; memory_access<21, 0, 0, ENDIANNESS_LITTLE>::specific m_exp; memory_access< 9, 0, 0, ENDIANNESS_LITTLE>::specific m_es4; diff --git a/src/devices/cpu/m6502/rp2a03.cpp b/src/devices/cpu/m6502/rp2a03.cpp index 2e1267d8c11..9128d72ef9a 100644 --- a/src/devices/cpu/m6502/rp2a03.cpp +++ b/src/devices/cpu/m6502/rp2a03.cpp @@ -76,7 +76,7 @@ void rp2a03_device::apu_irq(int state) uint8_t rp2a03_device::apu_read_mem(offs_t offset) { - return m_mintf->m_program.read_byte(offset); + return m_mintf->m_program.read_interruptible(offset); } void rp2a03_device::device_add_mconfig(machine_config &config) diff --git a/src/devices/cpu/m6502/st2204.cpp b/src/devices/cpu/m6502/st2204.cpp index 7f1ade8f627..d1d1bb80a7e 100644 --- a/src/devices/cpu/m6502/st2204.cpp +++ b/src/devices/cpu/m6502/st2204.cpp @@ -72,8 +72,8 @@ void st2204_device::device_start() { std::unique_ptr intf = std::make_unique(); - space(AS_DATA).cache(intf->m_dcache); space(AS_DATA).specific(intf->m_data); + intf->m_dcache = intf->m_data; intf->m_irr_enable = false; intf->m_irr = 0; intf->m_prr = 0; @@ -202,55 +202,55 @@ const char *st2204_device::st2xxx_irq_name(int i) const u8 st2204_device::mi_st2204::pread(u16 adr) { u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; - return m_data.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff)); + return m_data.read_interruptible(u32(bank ^ 1) << 14 | (adr & 0x3fff)); } u8 st2204_device::mi_st2204::preadc(u16 adr) { u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; - return m_dcache.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff)); + return m_dcache.read_interruptible(u32(bank ^ 1) << 14 | (adr & 0x3fff)); } void st2204_device::mi_st2204::pwrite(u16 adr, u8 val) { u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; - m_data.write_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff), val); + m_data.write_interruptible(u32(bank ^ 1) << 14 | (adr & 0x3fff), val); } u8 st2204_device::mi_st2204::dread(u16 adr) { - return m_data.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); + return m_data.read_interruptible(u32(m_drr) << 15 | (adr & 0x7fff)); } u8 st2204_device::mi_st2204::dreadc(u16 adr) { - return m_dcache.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); + return m_dcache.read_interruptible(u32(m_drr) << 15 | (adr & 0x7fff)); } void st2204_device::mi_st2204::dwrite(u16 adr, u8 val) { - m_data.write_byte(u32(m_drr) << 15 | (adr & 0x7fff), val); + m_data.write_interruptible(u32(m_drr) << 15 | (adr & 0x7fff), val); } u8 st2204_device::mi_st2204::read(u16 adr) { - return m_program.read_byte(adr); + return m_program.read_interruptible(adr); } u8 st2204_device::mi_st2204::read_sync(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_interruptible(adr); } u8 st2204_device::mi_st2204::read_arg(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_interruptible(adr); } u8 st2204_device::mi_st2204::read_dma(u16 adr) { if (BIT(adr, 15)) - return m_dcache.read_byte(u32(m_dmr) << 15 | (adr & 0x7fff)); + return m_dcache.read_interruptible(u32(m_dmr) << 15 | (adr & 0x7fff)); else return read(adr); } @@ -262,7 +262,7 @@ u8 st2204_device::mi_st2204::read_vector(u16 adr) void st2204_device::mi_st2204::write(u16 adr, u8 val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); } unsigned st2204_device::st2xxx_bt_divider(int n) const diff --git a/src/devices/cpu/m6502/st2205u.cpp b/src/devices/cpu/m6502/st2205u.cpp index 249faf06554..e5677b9f900 100644 --- a/src/devices/cpu/m6502/st2205u.cpp +++ b/src/devices/cpu/m6502/st2205u.cpp @@ -169,7 +169,7 @@ void st2205u_device::device_start() { std::unique_ptr intf = std::make_unique(); space(AS_DATA).specific(intf->m_data); - space(AS_DATA).cache(intf->m_dcache); + intf->m_dcache = intf->m_data; intf->m_irr_enable = false; intf->m_irr = 0; intf->m_prr = 0; @@ -264,7 +264,7 @@ void st2302u_device::device_start() { std::unique_ptr intf = std::make_unique(); space(AS_DATA).specific(intf->m_data); - space(AS_DATA).cache(intf->m_dcache); + intf->m_dcache = intf->m_data; intf->m_irr_enable = false; intf->m_irr = 0; intf->m_prr = 0; @@ -425,7 +425,7 @@ u8 st2205u_device::mi_st2205u::pread(u16 adr) if (BIT(bank, 15)) return m_ram[0x4000 | (adr & 0x3fff)]; else - return m_data.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + return m_data.read_interruptible(u32(bank) << 14 | (adr & 0x3fff)); } u8 st2205u_device::mi_st2205u::preadc(u16 adr) @@ -434,7 +434,7 @@ u8 st2205u_device::mi_st2205u::preadc(u16 adr) if (BIT(bank, 15)) return m_ram[0x4000 | (adr & 0x3fff)]; else - return m_dcache.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + return m_dcache.read_interruptible(u32(bank) << 14 | (adr & 0x3fff)); } void st2205u_device::mi_st2205u::pwrite(u16 adr, u8 val) @@ -443,7 +443,7 @@ void st2205u_device::mi_st2205u::pwrite(u16 adr, u8 val) if (BIT(bank, 15)) m_ram[0x4000 | (adr & 0x3fff)] = val; else - m_data.write_byte(u32(bank) << 14 | (adr & 0x3fff), val); + m_data.write_interruptible(u32(bank) << 14 | (adr & 0x3fff), val); } u8 st2205u_device::mi_st2205u::dread(u16 adr) @@ -451,7 +451,7 @@ u8 st2205u_device::mi_st2205u::dread(u16 adr) if (BIT(m_drr, 15)) return m_ram[adr & 0x7fff]; else - return m_data.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); + return m_data.read_interruptible(u32(m_drr) << 15 | (adr & 0x7fff)); } u8 st2205u_device::mi_st2205u::dreadc(u16 adr) @@ -459,7 +459,7 @@ u8 st2205u_device::mi_st2205u::dreadc(u16 adr) if (BIT(m_drr, 15)) return m_ram[adr & 0x7fff]; else - return m_dcache.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); + return m_dcache.read_interruptible(u32(m_drr) << 15 | (adr & 0x7fff)); } void st2205u_device::mi_st2205u::dwrite(u16 adr, u8 val) @@ -467,7 +467,7 @@ void st2205u_device::mi_st2205u::dwrite(u16 adr, u8 val) if (BIT(m_drr, 15)) m_ram[adr & 0x7fff] = val; else - m_data.write_byte(u32(m_drr) << 15 | (adr & 0x7fff), val); + m_data.write_interruptible(u32(m_drr) << 15 | (adr & 0x7fff), val); } u8 st2205u_device::mi_st2205u::bread(u16 adr) @@ -475,7 +475,7 @@ u8 st2205u_device::mi_st2205u::bread(u16 adr) if (BIT(m_brr, 15)) return m_ram[0x2000 | (adr & 0x1fff)]; else - return m_data.read_byte(u32(m_brr) << 13 | (adr & 0x1fff)); + return m_data.read_interruptible(u32(m_brr) << 13 | (adr & 0x1fff)); } u8 st2205u_device::mi_st2205u::breadc(u16 adr) @@ -483,7 +483,7 @@ u8 st2205u_device::mi_st2205u::breadc(u16 adr) if (BIT(m_brr, 15)) return m_ram[0x2000 | (adr & 0x1fff)]; else - return m_dcache.read_byte(u32(m_brr) << 13 | (adr & 0x1fff)); + return m_dcache.read_interruptible(u32(m_brr) << 13 | (adr & 0x1fff)); } void st2205u_device::mi_st2205u::bwrite(u16 adr, u8 val) @@ -491,55 +491,55 @@ void st2205u_device::mi_st2205u::bwrite(u16 adr, u8 val) if (BIT(m_brr, 15)) m_ram[0x2000 | (adr & 0x1fff)] = val; else - m_data.write_byte(u32(m_brr) << 13 | (adr & 0x1fff), val); + m_data.write_interruptible(u32(m_brr) << 13 | (adr & 0x1fff), val); } u8 st2302u_device::mi_st2302u::pread(u16 adr) { u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; - return m_data.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + return m_data.read_interruptible(u32(bank) << 14 | (adr & 0x3fff)); } u8 st2302u_device::mi_st2302u::preadc(u16 adr) { u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; - return m_dcache.read_byte(u32(bank) << 14 | (adr & 0x3fff)); + return m_dcache.read_interruptible(u32(bank) << 14 | (adr & 0x3fff)); } void st2302u_device::mi_st2302u::pwrite(u16 adr, u8 val) { u16 bank = m_irq_service && m_irr_enable ? m_irr : m_prr; - m_data.write_byte(u32(bank) << 14 | (adr & 0x3fff), val); + m_data.write_interruptible(u32(bank) << 14 | (adr & 0x3fff), val); } u8 st2302u_device::mi_st2302u::dread(u16 adr) { - return m_data.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); + return m_data.read_interruptible(u32(m_drr) << 15 | (adr & 0x7fff)); } u8 st2302u_device::mi_st2302u::dreadc(u16 adr) { - return m_dcache.read_byte(u32(m_drr) << 15 | (adr & 0x7fff)); + return m_dcache.read_interruptible(u32(m_drr) << 15 | (adr & 0x7fff)); } void st2302u_device::mi_st2302u::dwrite(u16 adr, u8 val) { - m_data.write_byte(u32(m_drr) << 15 | (adr & 0x7fff), val); + m_data.write_interruptible(u32(m_drr) << 15 | (adr & 0x7fff), val); } u8 st2205u_device::mi_st2205u::read(u16 adr) { - return m_program.read_byte(adr); + return m_program.read_interruptible(adr); } u8 st2205u_device::mi_st2205u::read_sync(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : m_cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : m_cprogram.read_interruptible(adr); } u8 st2205u_device::mi_st2205u::read_arg(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : m_cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : BIT(adr, 13) ? breadc(adr) : m_cprogram.read_interruptible(adr); } u8 st2205u_device::mi_st2205u::read_vector(u16 adr) @@ -549,22 +549,22 @@ u8 st2205u_device::mi_st2205u::read_vector(u16 adr) void st2205u_device::mi_st2205u::write(u16 adr, u8 val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); } u8 st2302u_device::mi_st2302u::read(u16 adr) { - return m_program.read_byte(adr); + return m_program.read_interruptible(adr); } u8 st2302u_device::mi_st2302u::read_sync(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_interruptible(adr); } u8 st2302u_device::mi_st2302u::read_arg(u16 adr) { - return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_byte(adr); + return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : m_cprogram.read_interruptible(adr); } u8 st2302u_device::mi_st2302u::read_vector(u16 adr) @@ -574,7 +574,7 @@ u8 st2302u_device::mi_st2302u::read_vector(u16 adr) void st2302u_device::mi_st2302u::write(u16 adr, u8 val) { - m_program.write_byte(adr, val); + m_program.write_interruptible(adr, val); } u8 st2205u_device::brrl_r() @@ -1022,9 +1022,9 @@ void st2205u_base_device::dcnth_w(u8 data) { uint8_t data; if (BIT(srcb, 15)) - data = m_mintf->m_cprogram.read_byte(srcp); // FIXME: 0080-7FFF should be all RAM on ST2205U + data = m_mintf->m_cprogram.read_interruptible(srcp); // FIXME: 0080-7FFF should be all RAM on ST2205U else - data = downcast(*m_mintf).m_dcache.read_byte(srcp | u32(srcb << 15)); + data = downcast(*m_mintf).m_dcache.read_interruptible(srcp | u32(srcb << 15)); if (!BIT(mode, 1)) { if (srcp++ == 0x7fff) @@ -1036,9 +1036,9 @@ void st2205u_base_device::dcnth_w(u8 data) // TODO: XOR/OR/AND logic for DMA0 three-cycle modes (different on ST23XX?) if (BIT(dstb, 15)) - m_mintf->m_cprogram.write_byte(dstp, data); // FIXME: 0080-7FFF should be all RAM on ST2205U + m_mintf->m_cprogram.write_interruptible(dstp, data); // FIXME: 0080-7FFF should be all RAM on ST2205U else - downcast(*m_mintf).m_dcache.write_byte(dstp | u32(dstb << 15), data); + downcast(*m_mintf).m_dcache.write_interruptible(dstp | u32(dstb << 15), data); if (!BIT(mode, 3)) { if (dstp++ == 0x7fff) diff --git a/src/devices/cpu/m6502/st2xxx.h b/src/devices/cpu/m6502/st2xxx.h index 7d0a57d16ae..a8c7fd2590e 100644 --- a/src/devices/cpu/m6502/st2xxx.h +++ b/src/devices/cpu/m6502/st2xxx.h @@ -115,7 +115,7 @@ protected: public: virtual u8 read_vector(u16 adr) = 0; - memory_access<26, 0, 0, ENDIANNESS_LITTLE>::cache m_dcache; + memory_access<26, 0, 0, ENDIANNESS_LITTLE>::specific m_dcache; memory_access<26, 0, 0, ENDIANNESS_LITTLE>::specific m_data; bool m_irq_service; diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp index 406f45cc5c5..3fc199fd893 100644 --- a/src/devices/cpu/m6502/xavix.cpp +++ b/src/devices/cpu/m6502/xavix.cpp @@ -78,8 +78,8 @@ void xavix_device::device_start() init(); - m_lowbus_space = &space(5); - m_extbus_space = &space(6); + space(5).specific(m_lowbus); + space(6).specific(m_extbus); state_add(XAVIX_DATABANK, "DATBNK", m_databank).callimport().formatstr("%2s"); state_add(XAVIX_CODEBANK, "CODBNK", m_codebank).callimport().formatstr("%2s"); @@ -176,16 +176,16 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr) return m_databank; } - return m_lowbus_space->read_byte(adr); + return m_lowbus.read_interruptible(adr); } else { - return m_extbus_space->read_byte(((databank << 16) | adr) & 0x7fffff ); + return m_extbus.read_interruptible(((databank << 16) | adr) & 0x7fffff); } } else { - return m_extbus_space->read_byte(((databank << 16) | adr) & 0x7fffff ); + return m_extbus.read_interruptible(((databank << 16) | adr) & 0x7fffff); } } @@ -199,13 +199,13 @@ inline uint8_t xavix_device::mi_xavix::read(uint16_t adr) // opcode reads uint8_t xavix_device::mi_xavix::read_sync(uint16_t adr) { - return m_csprogram.read_byte(m_base->adr_with_codebank(adr)); + return m_csprogram.read_interruptible(m_base->adr_with_codebank(adr)); } // oprand reads uint8_t xavix_device::mi_xavix::read_arg(uint16_t adr) { - return m_cprogram.read_byte(m_base->adr_with_codebank(adr)); + return m_cprogram.read_interruptible(m_base->adr_with_codebank(adr)); } // data writes @@ -217,13 +217,13 @@ void xavix_device::write_full_data(uint32_t addr, uint8_t val) uint8_t xavix_device::read_stack(uint32_t addr) { // address is always 0x100-0x1ff - return m_lowbus_space->read_byte((addr & 0xff)+0x100); + return m_lowbus.read_interruptible((addr & 0xff) + 0x100); } void xavix_device::write_stack(uint32_t addr, uint8_t val) { // address is always 0x100-0x1ff - m_lowbus_space->write_byte((addr & 0xff)+0x100, val); + m_lowbus.write_interruptible((addr & 0xff) + 0x100, val); } uint8_t xavix_device::read_zeropage(uint32_t addr) @@ -240,7 +240,7 @@ uint8_t xavix_device::read_zeropage(uint32_t addr) return m_databank; } - return m_lowbus_space->read_byte(addr); + return m_lowbus.read_interruptible(addr); } void xavix_device::write_zeropage(uint32_t addr, uint8_t val) @@ -259,7 +259,7 @@ void xavix_device::write_zeropage(uint32_t addr, uint8_t val) return; } - m_lowbus_space->write_byte(addr, val); + m_lowbus.write_interruptible(addr, val); } @@ -281,16 +281,16 @@ inline void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_ return; } - m_lowbus_space->write_byte(adr, val); + m_lowbus.write_interruptible(adr, val); } else { - m_extbus_space->write_byte(((databank << 16) | adr) & 0x7fffff, val); + m_extbus.write_interruptible(((databank << 16) | adr) & 0x7fffff, val); } } else { - m_extbus_space->write_byte(((databank << 16) | adr) & 0x7fffff, val); + m_extbus.write_interruptible(((databank << 16) | adr) & 0x7fffff, val); } } diff --git a/src/devices/cpu/m6502/xavix.h b/src/devices/cpu/m6502/xavix.h index 2416902c6b7..5e4af41d5d5 100644 --- a/src/devices/cpu/m6502/xavix.h +++ b/src/devices/cpu/m6502/xavix.h @@ -178,11 +178,10 @@ protected: virtual space_config_vector memory_space_config() const override; address_space_config m_special_data_config; - address_space *m_special_data_space; address_space_config m_lowbus_config; address_space_config m_extbus_config; - address_space *m_lowbus_space; - address_space *m_extbus_space; + memory_access<15, 0, 0, ENDIANNESS_LITTLE>::specific m_lowbus; + memory_access<24, 0, 0, ENDIANNESS_LITTLE>::specific m_extbus; protected: xavix_interrupt_vector_delegate m_vector_callback; diff --git a/src/mame/mame.lst b/src/mame/mame.lst index fb4d789914a..c431e9af9e7 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -48662,6 +48662,9 @@ wavesynth @source:virtual/utdsp563xx.cpp utdsp563xx +@source:virtual/utm6502.cpp +utm6502 + @source:visual/v100.cpp v100 diff --git a/src/mame/virtual/utm6502.cpp b/src/mame/virtual/utm6502.cpp new file mode 100644 index 00000000000..f057b401cb9 --- /dev/null +++ b/src/mame/virtual/utm6502.cpp @@ -0,0 +1,250 @@ +// license:BSD-3-Clause + +// 6502 interruptible access unit test + +#include "emu.h" + +#include "cpu/m6502/m6502.h" + + +namespace { + +class utm6502_state : public driver_device +{ +public: + utm6502_state(machine_config const &mconfig, device_type type, char const *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_ram(*this, "ram") + { + } + + void utm6502(machine_config &config); + +private: + enum phase : u8 + { + PHASE_RESET_LO, + PHASE_RESET_HI, + PHASE_OPCODE, + PHASE_OPERAND_LO, + PHASE_OPERAND_HI, + PHASE_DATA, + PHASE_NEXT_FETCH + }; + + required_device m_maincpu; + required_shared_ptr m_ram; + + memory_passthrough_handler m_read_tap; + emu_timer *m_slice_timer = nullptr; + + std::array m_delay_cycles{}; + u64 m_base_cycle = 0; + u64 m_opcode_cycle = 0; + u64 m_last_read_cycle = 0; + u32 m_delay_hits = 0; + u16 m_last_read_address = 0; + u8 m_last_read_data = 0; + phase m_phase = PHASE_RESET_LO; + bool m_finished = false; + + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + + void program_map(address_map &map) ATTR_COLD; + + u32 data_read_delay(offs_t offset); + void observe_read(offs_t offset, u8 data); + void fail(char const *message); + char const *phase_name() const; + + TIMER_CALLBACK_MEMBER(slice_tick); +}; + + +void utm6502_state::program_map(address_map &map) +{ + map(0x0000, 0xffff).ram().share("ram"); +} + + +u32 utm6502_state::data_read_delay(offs_t offset) +{ + if (offset == 0x1234) + { + if (m_delay_hits < m_delay_cycles.size()) + m_delay_cycles[m_delay_hits] = m_maincpu->total_cycles() - m_base_cycle; + m_delay_hits++; + } + return 2; +} + + +void utm6502_state::observe_read(offs_t offset, u8 data) +{ + u64 const cycle = m_maincpu->total_cycles() - m_base_cycle; + + m_last_read_cycle = cycle; + m_last_read_address = u16(offset); + m_last_read_data = data; + + switch (m_phase) + { + case PHASE_RESET_LO: + if ((offset == 0xfffc) && (data == 0x00)) + m_phase = PHASE_RESET_HI; + break; + + case PHASE_RESET_HI: + if ((offset == 0xfffd) && (data == 0xc0)) + m_phase = PHASE_OPCODE; + break; + + case PHASE_OPCODE: + if ((offset == 0xc000) && (data == 0xad)) + { + m_opcode_cycle = cycle; + m_phase = PHASE_OPERAND_LO; + } + break; + + case PHASE_OPERAND_LO: + if ((cycle != (m_opcode_cycle + 1)) || (offset != 0xc001) || (data != 0x34)) + fail("expected low operand fetch at opcode+1"); + m_phase = PHASE_OPERAND_HI; + break; + + case PHASE_OPERAND_HI: + if ((cycle != (m_opcode_cycle + 2)) || (offset != 0xc002) || (data != 0x12)) + fail("expected high operand fetch at opcode+2"); + m_phase = PHASE_DATA; + break; + + case PHASE_DATA: + if (m_delay_hits != 2) + fail("expected two delay-hook hits before final data read"); + if ((m_delay_cycles[0] != (m_opcode_cycle + 3)) || (m_delay_cycles[1] != (m_opcode_cycle + 5))) + fail("delay-hook cycles did not match expected redo timing"); + if ((cycle != (m_opcode_cycle + 5)) || (offset != 0x1234) || (data != 0x56)) + fail("expected delayed data read at opcode+5"); + m_phase = PHASE_NEXT_FETCH; + break; + + case PHASE_NEXT_FETCH: + if ((cycle != (m_opcode_cycle + 6)) || (offset != 0xc003) || (data != 0xea)) + fail("expected next opcode fetch at opcode+6"); + m_finished = true; + throw emu_fatalerror(0, "PASS"); + } +} + + +void utm6502_state::fail(char const *message) +{ + m_finished = true; + throw emu_fatalerror( + "%s; phase=%s delay_hits=%u delay0=%u delay1=%u last=%u:%04X:%02X opcode=%u", + message, + phase_name(), + m_delay_hits, + u32(m_delay_cycles[0]), + u32(m_delay_cycles[1]), + u32(m_last_read_cycle), + m_last_read_address, + m_last_read_data, + u32(m_opcode_cycle)); +} + + +char const *utm6502_state::phase_name() const +{ + switch (m_phase) + { + case PHASE_RESET_LO: return "RESET_LO"; + case PHASE_RESET_HI: return "RESET_HI"; + case PHASE_OPCODE: return "OPCODE"; + case PHASE_OPERAND_LO: return "OPERAND_LO"; + case PHASE_OPERAND_HI: return "OPERAND_HI"; + case PHASE_DATA: return "DATA"; + case PHASE_NEXT_FETCH: return "NEXT_FETCH"; + } + + return "UNKNOWN"; +} + + +TIMER_CALLBACK_MEMBER(utm6502_state::slice_tick) +{ + if (!m_finished && ((m_maincpu->total_cycles() - m_base_cycle) > 32)) + fail("timed out waiting for expected read sequence"); +} + + +void utm6502_state::machine_start() +{ + address_space &program = m_maincpu->space(AS_PROGRAM); + program.install_read_before_delay(0x1234, 0x1234, ws_delay_delegate(*this, FUNC(utm6502_state::data_read_delay))); + m_read_tap = program.install_read_tap( + 0x0000, 0xffff, + "utm6502_read_tap", + [this] (offs_t offset, u8 &data, u8 mem_mask) + { + if (!machine().side_effects_disabled()) + observe_read(offset, data); + }, + &m_read_tap); + m_slice_timer = timer_alloc(FUNC(utm6502_state::slice_tick), this); + save_item(NAME(m_delay_cycles)); + save_item(NAME(m_base_cycle)); + save_item(NAME(m_opcode_cycle)); + save_item(NAME(m_last_read_cycle)); + save_item(NAME(m_delay_hits)); + save_item(NAME(m_last_read_address)); + save_item(NAME(m_last_read_data)); + save_item(NAME(m_finished)); +} + + +void utm6502_state::machine_reset() +{ + std::fill_n(&m_ram[0], 0x10000, 0xea); + + m_delay_cycles.fill(0); + m_base_cycle = 0; + m_opcode_cycle = 0; + m_last_read_cycle = 0; + m_delay_hits = 0; + m_last_read_address = 0; + m_last_read_data = 0; + m_phase = PHASE_RESET_LO; + m_finished = false; + + m_ram[0xc000] = 0xad; // LDA $1234 + m_ram[0xc001] = 0x34; + m_ram[0xc002] = 0x12; + m_ram[0xc003] = 0xea; // NOP + m_ram[0x1234] = 0x56; + m_ram[0xfffc] = 0x00; + m_ram[0xfffd] = 0xc0; + + attotime const cycle = attotime::from_hz(m_maincpu->clock()); + m_slice_timer->adjust(cycle, 0, cycle); +} + + +void utm6502_state::utm6502(machine_config &config) +{ + M6502(config, m_maincpu, 1'000'000); + m_maincpu->set_addrmap(AS_PROGRAM, &utm6502_state::program_map); +} + +} // anonymous namespace + + +ROM_START( utm6502 ) + ROM_REGION(0x10, "user1", ROMREGION_ERASEFF) +ROM_END + + +SYST(2026, utm6502, 0, 0, utm6502, 0, utm6502_state, empty_init, "MAME", "6502 interruptible access unit test", MACHINE_NO_SOUND_HW) From 58332396887b4cf69225fbc0922788aee647cb00 Mon Sep 17 00:00:00 2001 From: Ivan Vangelista Date: Fri, 20 Mar 2026 18:42:57 +0100 Subject: [PATCH 333/351] New systems marked not working ------------------------------ Mahjong Sweet Academy Special (Japan, P010B-Y05) [Hammy] --- src/mame/dynax/ddenlovr.cpp | 45 +++++++++++++++++++++++++++++++++++++ src/mame/mame.lst | 1 + 2 files changed, 46 insertions(+) diff --git a/src/mame/dynax/ddenlovr.cpp b/src/mame/dynax/ddenlovr.cpp index ad76a00ba0b..ee0468e5981 100644 --- a/src/mame/dynax/ddenlovr.cpp +++ b/src/mame/dynax/ddenlovr.cpp @@ -750,6 +750,7 @@ public: void kotbinyo(machine_config &config) ATTR_COLD; void daireach(machine_config &config) ATTR_COLD; void hnrose(machine_config &config) ATTR_COLD; + void mjswacads(machine_config &config) ATTR_COLD; private: DECLARE_MACHINE_START(hanakanz); @@ -804,6 +805,7 @@ private: void mjgnight_portmap(address_map &map) ATTR_COLD; void mjnigiri_portmap(address_map &map) ATTR_COLD; void mjreach1_portmap(address_map &map) ATTR_COLD; + void mjswacads_portmap(address_map &map) ATTR_COLD; void momotaro_portmap(address_map &map) ATTR_COLD; memory_share_creator m_banked_nvram; @@ -4865,6 +4867,13 @@ void hanakanz_state::mjnigiri_portmap(address_map &map) map(0xe0, 0xe0).r(FUNC(hanakanz_state::technotop_protection_r<0xf2>)); } +void hanakanz_state::mjswacads_portmap(address_map &map) +{ + daimyojn_portmap(map); + + map(0xe0, 0xe0).r(FUNC(hanakanz_state::technotop_protection_r<0x0a>)); +} + /*************************************************************************** Mahjong Dai-Reach @@ -10599,6 +10608,13 @@ void hanakanz_state::mjnigiri(machine_config &config) m_maincpu->set_addrmap(AS_IO, &hanakanz_state::mjnigiri_portmap); } +void hanakanz_state::mjswacads(machine_config &config) +{ + daimyojn(config); + + m_maincpu->set_addrmap(AS_IO, &hanakanz_state::mjswacads_portmap); +} + void hanakanz_state::hnrose(machine_config &config) { daimyojn(config); @@ -13300,6 +13316,33 @@ ROM_START( mjswacad ) ROM_LOAD( "01001.2b", 0x000000, 0x200000, CRC(4b84f45c) SHA1(2ad92b15986d88d4c9254f43ce251a0ebd90a48b) ) // 1xxxxxxxxxxxxxxxxxxxx = 0xFF ROM_END + +/*************************************************************************** + +Mahjong Sweet Academy Special + +Techno-Top, Limited + +TTL.0103 sticker + +Has 4 banks of 10 DIP switches + +***************************************************************************/ + +ROM_START( mjswacads ) + ROM_REGION( 0x80000, "maincpu", 0 ) + ROM_LOAD( "p0102y5.5b", 0x00000, 0x80000, CRC(8ae679ad) SHA1(f47cdf6c8d8ec71e5c36369ad68447471bfc48f9) ) // different from mjswacad + + ROM_REGION( 0x800000, "blitter", 0 ) + ROM_LOAD( "01003.7b", 0x000000, 0x200000, CRC(1df7a355) SHA1(3122570a845bb046936e8296423636281b39cc4a) ) + ROM_LOAD( "01004.8b", 0x200000, 0x200000, CRC(198904d4) SHA1(d34a297cd08c227767808dfa695573ef596022c9) ) + ROM_LOAD( "01005.9b", 0x400000, 0x200000, CRC(4dbcf7cf) SHA1(8bf4eaff1a280b2d5bf1221dc516647936e146d7) ) + ROM_LOAD( "01006_2.11b ", 0x600000, 0x200000, CRC(7c646f5c) SHA1(d911f497b2b4b10da1693308a2bfab9f70d2e34a) ) // only different one from mjswacad + + ROM_REGION( 0x100000, "oki", 0 ) + ROM_LOAD( "01001.2b", 0x000000, 0x100000, CRC(ee30d20a) SHA1(14689196486bc4eab4a174fe880b425fa544cd25) ) // same as mjswacad but half size (no empty half) +ROM_END + } // anonymous namespace DEFINE_DEVICE_TYPE_PRIVATE(HGOKOU_JOYSTICK, device_mahjong_panel_interface, hgokou_joystick_device, "hgokou_joystick", "Hanafuda Hana Gokou joystick") @@ -13409,6 +13452,8 @@ GAME( 2001, daireach, 0, daireach, seljan2, hanakanz_state, empty_ GAME( 2002, daimyojn, 0, daimyojn, daimyojn, hanakanz_state, empty_init, ROT0, "Dynax / Techno-Top / Techno-Planning", "Mahjong Daimyojin (Japan, T017-PB-00)", MACHINE_NO_COCKTAIL ) +GAME( 2002, mjswacads, 0, mjswacads, daimyojn, hanakanz_state, empty_init, ROT0, "Techno-Top", "Mahjong Sweet Academy Special (Japan, P010B-Y05)", MACHINE_NOT_WORKING | MACHINE_NO_COCKTAIL ) // needs verifying of inputs, outputs (DIP sheet available) + GAME( 2002, mjtenho, 0, daimyojn, daimyojn, hanakanz_state, empty_init, ROT0, "Techno-Top", "Mahjong Tenho (Japan, P016B-000)", MACHINE_NOT_WORKING | MACHINE_NO_COCKTAIL ) GAME( 2004, momotaro, 0, momotaro, daimyojn, hanakanz_state, empty_init, ROT0, "Techno-Top", "Mahjong Momotarou (Japan, T027-RB-01)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index c431e9af9e7..aa7edc9c825 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -17822,6 +17822,7 @@ mjreach1 mjreach1a mjschuka mjswacad +mjswacads mjtenho mjxysl mmpanic From 279a58c48782f1614c6516d42cb818a339afb0c3 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 20 Mar 2026 19:01:56 +0100 Subject: [PATCH 334/351] bus/centronics: initial Neo Mania Adapter JAMMA board --- scripts/src/bus.lua | 2 + src/devices/bus/centronics/ctronics.cpp | 3 + .../bus/centronics/neomania_adapter.cpp | 143 ++++++++++++++++++ src/devices/bus/centronics/neomania_adapter.h | 54 +++++++ src/mame/misc/neomania.cpp | 9 +- 5 files changed, 210 insertions(+), 1 deletion(-) create mode 100644 src/devices/bus/centronics/neomania_adapter.cpp create mode 100644 src/devices/bus/centronics/neomania_adapter.h diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index bbf5047396d..769a9a8eb21 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -1600,6 +1600,8 @@ if BUSES["CENTRONICS"] then MAME_DIR .. "src/devices/bus/centronics/epson_rx80.h", MAME_DIR .. "src/devices/bus/centronics/hasp_savquest.cpp", MAME_DIR .. "src/devices/bus/centronics/hasp_savquest.h", + MAME_DIR .. "src/devices/bus/centronics/neomania_adapter.cpp", + MAME_DIR .. "src/devices/bus/centronics/neomania_adapter.h", MAME_DIR .. "src/devices/bus/centronics/mz1p16.cpp", MAME_DIR .. "src/devices/bus/centronics/mz1p16.h", MAME_DIR .. "src/devices/bus/centronics/nec_p72.cpp", diff --git a/src/devices/bus/centronics/ctronics.cpp b/src/devices/bus/centronics/ctronics.cpp index 6dfe2e6e0aa..224048a1df6 100644 --- a/src/devices/bus/centronics/ctronics.cpp +++ b/src/devices/bus/centronics/ctronics.cpp @@ -128,6 +128,7 @@ device_centronics_peripheral_interface::~device_centronics_peripheral_interface( #include "epson_lx810l.h" #include "epson_rx80.h" #include "hasp_savquest.h" +#include "neomania_adapter.h" #include "mz1p16.h" #include "nec_p72.h" #include "nlq401.h" @@ -158,4 +159,6 @@ void centronics_devices(device_slot_interface &device) device.option_add("mz1p16", MZ1P16); device.option_add_internal("hasp_savquest", HASP_SAVQUEST); + // TODO: will become option_add_internal when misc/neomania.cpp will have a working chipset + device.option_add("neomania", NEOMANIA_ADAPTER); } diff --git a/src/devices/bus/centronics/neomania_adapter.cpp b/src/devices/bus/centronics/neomania_adapter.cpp new file mode 100644 index 00000000000..b30635401f0 --- /dev/null +++ b/src/devices/bus/centronics/neomania_adapter.cpp @@ -0,0 +1,143 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#include "emu.h" +#include "neomania_adapter.h" + +#define VERBOSE (LOG_GENERAL) +//#define LOG_OUTPUT_FUNC osd_printf_info + +#include "logmacro.h" + +DEFINE_DEVICE_TYPE(NEOMANIA_ADAPTER, neomania_adapter_device, "neomania_adapter", "Neo Mania Adapter JAMMA board") + +neomania_adapter_device::neomania_adapter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, NEOMANIA_ADAPTER, tag, owner, clock), + device_centronics_peripheral_interface(mconfig, *this), + m_in(*this, "IN%u", 0U), + m_select_in(0), + m_init(0), + m_strobe(0), + m_autofd(0), + m_has_inited(false) +{ } + +// "Testing I/O board input bits" wants IN0~3 and IN7 to return low +static INPUT_PORTS_START( neomania_adapter ) + PORT_START("IN0") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN4") + + PORT_START("IN5") + + PORT_START("IN6") + + PORT_START("IN7") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) +INPUT_PORTS_END + + +ioport_constructor neomania_adapter_device::device_input_ports() const +{ + return INPUT_PORTS_NAME( neomania_adapter ); +} + +void neomania_adapter_device::device_start() +{ + save_item(NAME(m_select_in)); + save_item(NAME(m_init)); + save_item(NAME(m_strobe)); + save_item(NAME(m_autofd)); + + save_item(NAME(m_ddr)); +} + +void neomania_adapter_device::device_reset() +{ + m_select_in = m_init = 0; + m_autofd = m_strobe = 0; + m_has_inited = false; + + m_ddr = 0xff; +} + +void neomania_adapter_device::input_strobe(int state) +{ + LOG("input_strobe %d\n", state); + m_strobe = !state; + update_ack(); +} + +void neomania_adapter_device::input_select_in(int state) +{ + m_select_in = state; + LOG("input_select_in %d\n", state); + update_ack(); +} + +void neomania_adapter_device::input_autofd(int state) +{ + m_autofd = !state; + LOG("input_autofd %d\n", state); + update_ack(); +} + +void neomania_adapter_device::input_init(int state) +{ + LOG("input_init %d\n", state); + + m_init = state; + update_ack(); + + // "Testing I/O board connection" at bp 100027e2 + // this is enough to make it output a 0x02 in the buffer, perhaps different board revs? + if (state && !m_select_in) + { + output_fault(0); + output_select(0); + output_perror(0); + output_busy(0); + // avoid BIOS interfering with actual I/O reading + m_has_inited = true; + } +} + +// "Testing I/O board communications" +// wants an encoded ACK depending on control writes +// 0xec -> 0xe0 -> 0xe1 -> ... -> 0xe7 +void neomania_adapter_device::update_ack() +{ + const int id_table[8] = { 1, 1, 0, 0, 1, 0, 1, 0 }; + u8 id_ptr = (m_strobe | (m_autofd << 1) | (m_init << 2)) & 7; + int result = id_table[id_ptr]; + LOG("ACK %d -> %d\n", id_ptr, result); + output_ack(result); + + if (m_has_inited) + { + // "Testing I/O board input bits" + // TODO: doesn't work, BIOS writes a 0 to pc_lpt data_w, which craps this out the window + const u8 data_in = m_in[id_ptr]->read(); + + LOG("read input @ %d -> %02x\n", id_ptr, data_in); + + output_data0(BIT(data_in, 0)); + output_data1(BIT(data_in, 1)); + output_data2(BIT(data_in, 2)); + output_data3(BIT(data_in, 3)); + output_data4(BIT(data_in, 4)); + output_data5(BIT(data_in, 5)); + output_data6(BIT(data_in, 6)); + output_data7(BIT(data_in, 7)); + } +} diff --git a/src/devices/bus/centronics/neomania_adapter.h b/src/devices/bus/centronics/neomania_adapter.h new file mode 100644 index 00000000000..6ed81a5bb6b --- /dev/null +++ b/src/devices/bus/centronics/neomania_adapter.h @@ -0,0 +1,54 @@ +// license:BSD-3-Clause +// copyright-holders: Angelo Salese + +#ifndef MAME_BUS_CENTRONICS_NEOMANIA_ADAPTER_H +#define MAME_BUS_CENTRONICS_NEOMANIA_ADAPTER_H + +#pragma once + +#include "ctronics.h" + +class neomania_adapter_device : public device_t, + public device_centronics_peripheral_interface +{ +public: + neomania_adapter_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + virtual void input_strobe(int state) override; + + virtual void input_data0(int state) override { if (state) m_ddr |= 0x01; else m_ddr &= ~0x01; } + virtual void input_data1(int state) override { if (state) m_ddr |= 0x02; else m_ddr &= ~0x02; } + virtual void input_data2(int state) override { if (state) m_ddr |= 0x04; else m_ddr &= ~0x04; } + virtual void input_data3(int state) override { if (state) m_ddr |= 0x08; else m_ddr &= ~0x08; } + virtual void input_data4(int state) override { if (state) m_ddr |= 0x10; else m_ddr &= ~0x10; } + virtual void input_data5(int state) override { if (state) m_ddr |= 0x20; else m_ddr &= ~0x20; } + virtual void input_data6(int state) override { if (state) m_ddr |= 0x40; else m_ddr &= ~0x40; } + virtual void input_data7(int state) override { if (state) m_ddr |= 0x80; else m_ddr &= ~0x80; } +// virtual void input_ack(int state) override { printf("input_ack %d\n", state); } +// virtual void input_busy(int state) override { printf("input_busy %d\n", state); } +// virtual void input_perror(int state) override { printf("input_perror %d\n", state); } +// virtual void input_select(int state) override { printf("input_select %d\n", state); } + virtual void input_autofd(int state) override; +// virtual void input_fault(int state) override { printf("input_fault %d\n", state); } + virtual void input_init(int state) override; + virtual void input_select_in(int state) override; + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual ioport_constructor device_input_ports() const override ATTR_COLD; + +private: + required_ioport_array<8> m_in; + + int m_select_in, m_init, m_strobe, m_autofd; + bool m_has_inited; + u8 m_ddr; + + void update_ack(); +}; + + +DECLARE_DEVICE_TYPE(NEOMANIA_ADAPTER, neomania_adapter_device) + +#endif // MAME_BUS_CENTRONICS_NEOMANIA_ADAPTER_H diff --git a/src/mame/misc/neomania.cpp b/src/mame/misc/neomania.cpp index 491af16cfc0..316d4156f4b 100644 --- a/src/mame/misc/neomania.cpp +++ b/src/mame/misc/neomania.cpp @@ -17,7 +17,14 @@ TODO: - Extract "Guard.zip" and understand what is for; \- WARNING: once in non-Safe Mode Windows (after drivers installation etc.) the OS has a Startup item for the frontend (neofend.exe). If protection fails it will proceed to *wipe out* the - entire HDD, it is advised to backup the .dif before fiddling with that. + entire HDD and any non-write protected floppy, it is advised to backup the .dif before fiddling + with that. +\- PPM puts following files in memory, with header "NeomaniaUniversalMonitorVer5": + - C:/Neomania/Pkunzip.exe;Guard.zip;Pkzip.exe + - C:/windows/win.ini;user.dat + - , xor with 0xff gives back the same + 'C:/Neomania/Driver/Ppm.exe' (...) + - C:/Neomania/Neofend.dat (as a key result for the protection?) =================================================================================================== From cd97c9b234f6743bef912aff64e7874a4dc16a2b Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Fri, 20 Mar 2026 20:39:57 +0200 Subject: [PATCH 335/351] New working software list items ------------------------------- abc1600_hdd: ABCenix 5.18 [Curt Coder] abc1600_flop: ABCenix 5.18 [Curt Coder] --- hash/abc1600_flop.xml | 76 +++++++++++++++++++++---------------------- hash/abc1600_hdd.xml | 25 ++++---------- 2 files changed, 45 insertions(+), 56 deletions(-) diff --git a/hash/abc1600_flop.xml b/hash/abc1600_flop.xml index 4ae03b67f58..98e98d17178 100644 --- a/hash/abc1600_flop.xml +++ b/hash/abc1600_flop.xml @@ -6,170 +6,170 @@ license:CC0-1.0 - ABCenix 5.12 - 198? + ABCenix 5.18 + 1986 Luxor - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - + - + - - - - - - - diff --git a/hash/abc1600_hdd.xml b/hash/abc1600_hdd.xml index 4396716b781..37de56e40ea 100644 --- a/hash/abc1600_hdd.xml +++ b/hash/abc1600_hdd.xml @@ -1,32 +1,21 @@ - - Formatted Micropolis 1325A 69MB - 198? - unknown + + + ABCenix 5.18 + 1986 + Luxor - + - - Formatted NEC D5216A 20MB - 198? - unknown - - - - - - - - From 9b734657da2aab18d6e4c2d730c8fe0a0c70c18c Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 21 Mar 2026 01:53:17 +0100 Subject: [PATCH 336/351] ymz770: update notes --- src/devices/sound/ymz770.cpp | 30 +++++++++++++++++++----------- src/mame/capcom/alien.cpp | 2 +- 2 files changed, 20 insertions(+), 12 deletions(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index d4de2996f53..15756948c09 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -1,27 +1,35 @@ // license:BSD-3-Clause // copyright-holders:Olivier Galibert, R. Belmont, MetalliC -/*************************************************************************** +/******************************************************************************* Yamaha YMZ770B "AMMSL", YMZ770C "AMMS-A" and YMZ774 "AMMS2C" Emulation by R. Belmont and MetalliC AMM decode by Olivier Galibert ------ +-------------------------------------------------------------------------------- + TODO: -- Simple Access mode. SACs is register / data lists same as SEQ. in 770C, when both /SEL and /CS pins goes low - will be run SAC with number set at data bus. - can not be used in CV1K (/SEL pin is NC, internally pulled to VCC), probably not used in PGM2 too. - 770: -- sequencer timers implemented but seems unused, presumably because of design flaws or bugs, likely due to lack of automatic adding of sequencer # to register offset. - in result sequences uses very long chains of 32-sample wait commands instead, wasting a lot of ROM space. -- sequencer triggers not implemented, not sure how they works (Deathsmiles ending tune starts sequence with TGST = 01h, likely a bug and don't affect tune playback) - 774: +- Simple Access mode. SACs is register / data lists same as SEQ. in 770C, when + both /SEL and /CS pins goes low - will be run SAC with number set at data bus. + It can not be used in CV1K (/SEL pin is NC, internally pulled to VCC), probably + not used in PGM2 too. +- Configurable sample clock divider (currently hardcoded) +770: +- Sequencer timers are implemented but seem unused, presumably because of design + flaws or bugs, likely due to lack of automatic adding of sequencer # to register + offset. In result, sequences use very long chains of 32-sample wait commands + instead, wasting a lot of ROM space. +- Sequencer triggers are not implemented, not sure how they work (Deathsmiles + ending tune starts sequence with TGST = 01h, likely a bug and doesn't affect + tune playback) +774: - 4 channel output - Equalizer - pan delayed transition (not used in games) - sequencer off trigger (not used in games) - known SPUs in this series: +known SPUs in this series: YMZ770B AMMSL Capcom medal hardware (alien.cpp) YMZ770C AMMS-A Cave CV1000 YMZ771 SSGS3 @@ -33,7 +41,7 @@ TODO: YMZ779 AMMS3D YMZ870 AMMS3EX -***************************************************************************/ +*******************************************************************************/ #include "emu.h" #include "ymz770.h" diff --git a/src/mame/capcom/alien.cpp b/src/mame/capcom/alien.cpp index 2b76f0642ba..0b0118b4cc9 100644 --- a/src/mame/capcom/alien.cpp +++ b/src/mame/capcom/alien.cpp @@ -416,7 +416,7 @@ void alien_state::alien(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); // YMZ770B on all games but wontame (YMZ770C), TBD - YMZ770(config, m_ymz, 16.384_MHz_XTAL).add_route(ALL_OUTPUTS, "mono", 1.0); + YMZ770(config, m_ymz, 16.9344_MHz_XTAL).add_route(ALL_OUTPUTS, "mono", 1.0); M48T35(config, "m48t35"); } From c48c18802e312b3ce5fea4502a369a5ae564fb39 Mon Sep 17 00:00:00 2001 From: arbee Date: Fri, 20 Mar 2026 22:14:43 -0400 Subject: [PATCH 337/351] sdl3_sound.cpp: Rate-limit the output stream so it doesn't queue up to infinity when you unthrottle. (MAMETesters #9401) [R. Belmont] --- src/osd/modules/sound/sdl3_sound.cpp | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/src/osd/modules/sound/sdl3_sound.cpp b/src/osd/modules/sound/sdl3_sound.cpp index d450a898a83..57fcc48df89 100644 --- a/src/osd/modules/sound/sdl3_sound.cpp +++ b/src/osd/modules/sound/sdl3_sound.cpp @@ -88,8 +88,6 @@ private: osd::audio_info m_deviceinfo; std::map> m_streams; - - static void sink_callback(void *userdata, Uint8 *stream, int len); }; //============================================================ @@ -344,18 +342,28 @@ void sound_sdl3::stream_close(uint32_t id) void sound_sdl3::stream_sink_update(uint32_t id, const int16_t *buffer, int samples_this_frame) { auto si = m_streams.find(id); - if(si == m_streams.end()) + if (si == m_streams.end()) + { return; - stream_info *stream = si->second.get(); - SDL_PutAudioStreamData(stream->m_sdl_stream, (void *)buffer, samples_this_frame * sizeof(int16_t) * stream->m_buffer.channels()); + } + + const stream_info *stream = si->second.get(); + const auto queue_size = SDL_GetAudioStreamQueued(stream->m_sdl_stream); + if (queue_size <= 8 * samples_this_frame) + { + SDL_PutAudioStreamData(stream->m_sdl_stream, (void *)buffer, samples_this_frame * sizeof(int16_t) * stream->m_buffer.channels()); + } } void sound_sdl3::stream_source_update(uint32_t id, int16_t *buffer, int samples_this_frame) { auto si = m_streams.find(id); if (si == m_streams.end()) + { return; - stream_info *stream = si->second.get(); + } + + const stream_info *stream = si->second.get(); SDL_GetAudioStreamData(stream->m_sdl_stream, (void *)buffer, samples_this_frame * sizeof(int16_t) * stream->m_buffer.channels()); } From 2ad7438fb07efd2ebcfa439f001522ad614cefcf Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 21 Mar 2026 12:27:47 +0100 Subject: [PATCH 338/351] sdl3_sound: don't hardcode max frames to 8 --- src/osd/modules/sound/sdl3_sound.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/osd/modules/sound/sdl3_sound.cpp b/src/osd/modules/sound/sdl3_sound.cpp index 57fcc48df89..d519aa9de33 100644 --- a/src/osd/modules/sound/sdl3_sound.cpp +++ b/src/osd/modules/sound/sdl3_sound.cpp @@ -86,6 +86,7 @@ private: uint32_t m_default_sink, m_default_source; uint32_t m_stream_next_id; osd::audio_info m_deviceinfo; + uint32_t m_max_frames; std::map> m_streams; }; @@ -107,8 +108,8 @@ int sound_sdl3::init(osd_interface &osd, const osd_options &options) char const *const audio_driver = SDL_GetCurrentAudioDriver(); osd_printf_verbose("SDL Audio: Driver is %s\n", audio_driver ? audio_driver : "not initialized"); - if(options.audio_latency() > 0.0f) - osd_printf_verbose("SDL Audio: %s module does not support audio_latency option\n", name()); + const float latency = options.audio_latency(); + m_max_frames = (latency > 0.0f) ? latency + 3 : 8; int dev_count = 0; SDL_AudioSpec spec; @@ -349,7 +350,7 @@ void sound_sdl3::stream_sink_update(uint32_t id, const int16_t *buffer, int samp const stream_info *stream = si->second.get(); const auto queue_size = SDL_GetAudioStreamQueued(stream->m_sdl_stream); - if (queue_size <= 8 * samples_this_frame) + if (queue_size < m_max_frames * samples_this_frame) { SDL_PutAudioStreamData(stream->m_sdl_stream, (void *)buffer, samples_this_frame * sizeof(int16_t) * stream->m_buffer.channels()); } From b2ad0681d9fa7f50bae00463ec5b5d57d9f73e82 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 21 Mar 2026 12:40:05 +0100 Subject: [PATCH 339/351] docs: door input is not gambling-specific anymore --- docs/source/usingmame/defaultkeys.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/source/usingmame/defaultkeys.rst b/docs/source/usingmame/defaultkeys.rst index edce72acd20..a5a76580c41 100644 --- a/docs/source/usingmame/defaultkeys.rst +++ b/docs/source/usingmame/defaultkeys.rst @@ -259,6 +259,8 @@ the standard keyboard configuration. Usually a tilt switch or shock sensor that will end the current game, reset credits and/or reset the machine if the machine is knocked excessively hard or moved. Most commonly found on pinball machines. +**O** + Door Interlock (A coin door for example) **-** *(not numeric keypad)* Volume Down @@ -620,8 +622,6 @@ buttons. High/big **S** Low/small -**O** - Door .. _default-blackjack-keys: From 009b58536bfc98e91c971a9e76f7013c4f14bdf4 Mon Sep 17 00:00:00 2001 From: hap Date: Sat, 21 Mar 2026 12:51:14 +0100 Subject: [PATCH 340/351] bzone: remove space from title --- src/devices/video/avgdvg.cpp | 8 ++++---- src/mame/atari/bzone.cpp | 13 +++++++------ src/mame/atari/bzone.h | 2 +- 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/src/devices/video/avgdvg.cpp b/src/devices/video/avgdvg.cpp index 7290ccb996b..5d14c0076ce 100644 --- a/src/devices/video/avgdvg.cpp +++ b/src/devices/video/avgdvg.cpp @@ -1102,7 +1102,7 @@ int avg_quantum_device::handler_7() // quantum_strobe3 int avg_bzone_device::handler_1() // bzone_latch1 { /* - * Battle Zone has clipping hardware. We need to remember the + * Battlezone has clipping hardware. We need to remember the * position of the beam when the analog switches hst or lst get * turned off. */ @@ -1140,7 +1140,7 @@ int avg_bzone_device::handler_6() // bzone_strobe2 /* * If izblank is true the zblank signal gets * inverted. This behaviour can't be handled with the - * clipping we have right now. Battle Zone doesn't seem to + * clipping we have right now. Battlezone doesn't seem to * invert zblank so it's no issue. */ m_izblank = m_dvy & 0x100; @@ -1152,7 +1152,7 @@ int avg_bzone_device::handler_6() // bzone_strobe2 int avg_bzone_device::handler_7() // bzone_strobe3 { - // Battle Zone is B/W + // Battlezone is B/W const int cycles = avg_common_strobe3(); if (!OP0() && !OP2()) @@ -1501,4 +1501,4 @@ DEFINE_DEVICE_TYPE(AVG_TEMPEST, avg_tempest_device, "avg_tempest", "Atari AVG DEFINE_DEVICE_TYPE(AVG_MHAVOC, avg_mhavoc_device, "avg_mhavoc", "Atari AVG (Major Havoc)") DEFINE_DEVICE_TYPE(AVG_STARWARS, avg_starwars_device, "avg_starwars", "Atari AVG (Star Wars)") DEFINE_DEVICE_TYPE(AVG_QUANTUM, avg_quantum_device, "avg_quantum", "Atari AVG (Quantum)") -DEFINE_DEVICE_TYPE(AVG_BZONE, avg_bzone_device, "avg_bzone", "Atari AVG (Battle Zone)") +DEFINE_DEVICE_TYPE(AVG_BZONE, avg_bzone_device, "avg_bzone", "Atari AVG (Battlezone)") diff --git a/src/mame/atari/bzone.cpp b/src/mame/atari/bzone.cpp index b3a8f6665fe..2fa46eb785d 100644 --- a/src/mame/atari/bzone.cpp +++ b/src/mame/atari/bzone.cpp @@ -8,7 +8,7 @@ * Battlezone * Bradley Trainer * Red Baron - * Desert Wars (Spanish bootleg of Battle Zone) + * Desert Wars (Spanish bootleg of Battlezone) Known bugs: * None at this time on the Atari sets (Desert Wars isn't working) @@ -687,7 +687,7 @@ void redbaron_state::redbaron(machine_config &config) * *************************************/ -/* Battle Zone +/* Battlezone For the Analog Vec Gen A035742 PCB: @@ -1007,13 +1007,14 @@ void bzone_state::analog_select_w(offs_t offset, uint8_t data) * Game drivers * *************************************/ + // YEAR NAME PARENT MACHINE INPUT CLASS INIT ROT COMPANY FULLNAME FLAGS LAYOUT -GAMEL(1980, bzone, 0, bzone, bzone, bzone_state, empty_init, ROT0, "Atari", "Battle Zone (rev 2)", MACHINE_SUPPORTS_SAVE, layout_bzone ) -GAMEL(1980, bzonea, bzone, bzone, bzone, bzone_state, empty_init, ROT0, "Atari", "Battle Zone (rev 1)", MACHINE_SUPPORTS_SAVE, layout_bzone ) -GAMEL(1980, bzonec, bzone, bzone, bzone, bzone_state, empty_init, ROT0, "Atari", "Battle Zone (cocktail)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL, layout_bzone ) +GAMEL(1980, bzone, 0, bzone, bzone, bzone_state, empty_init, ROT0, "Atari", "Battlezone (rev 2)", MACHINE_SUPPORTS_SAVE, layout_bzone ) // "Battle Zone" on titlescreen +GAMEL(1980, bzonea, bzone, bzone, bzone, bzone_state, empty_init, ROT0, "Atari", "Battlezone (rev 1)", MACHINE_SUPPORTS_SAVE, layout_bzone ) +GAMEL(1980, bzonec, bzone, bzone, bzone, bzone_state, empty_init, ROT0, "Atari", "Battlezone (cocktail)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL, layout_bzone ) GAME( 1980, bradley, 0, bradley, bradley, bzone_state, empty_init, ROT0, "Atari", "Bradley Trainer", MACHINE_SUPPORTS_SAVE ) GAMEL(1980, redbaron, 0, redbaron, redbaron, redbaron_state, empty_init, ROT0, "Atari", "Red Baron (revised hardware)", MACHINE_SUPPORTS_SAVE, layout_redbaron ) GAMEL(1980, redbarona, redbaron, redbaron, redbaron, redbaron_state, empty_init, ROT0, "Atari", "Red Baron", MACHINE_SUPPORTS_SAVE, layout_redbaron ) // Not from Atari -GAMEL(1981, dsrtwars, bzone, dsrtwars, bzone, bzone_state, empty_init, ROT0, "bootleg (Andra S.A.)", "Desert Wars (bootleg of Battle Zone)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING, layout_bzone ) +GAMEL(1981, dsrtwars, bzone, dsrtwars, bzone, bzone_state, empty_init, ROT0, "bootleg (Andra S.A.)", "Desert Wars (bootleg of Battlezone)", MACHINE_SUPPORTS_SAVE | MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING, layout_bzone ) diff --git a/src/mame/atari/bzone.h b/src/mame/atari/bzone.h index 6754c95765f..a5658b1bc37 100644 --- a/src/mame/atari/bzone.h +++ b/src/mame/atari/bzone.h @@ -2,7 +2,7 @@ // copyright-holders:Brad Oliver, Nicola Salmoria /************************************************************************* - Atari Battle Zone hardware + Atari Battlezone hardware *************************************************************************/ #ifndef MAME_ATARI_BZONE_H From e8be28f34fe7328830acd6d5931b592f15c940a3 Mon Sep 17 00:00:00 2001 From: arekkusu42 Date: Sat, 21 Mar 2026 05:17:30 -0700 Subject: [PATCH 341/351] apple2gs: fix aux text page2 shadowing to work like page1. (#15124) --- src/mame/apple/apple2gs.cpp | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/mame/apple/apple2gs.cpp b/src/mame/apple/apple2gs.cpp index fa6a132d506..5c2011e84bb 100644 --- a/src/mame/apple/apple2gs.cpp +++ b/src/mame/apple/apple2gs.cpp @@ -2963,7 +2963,6 @@ u8 apple2gs_state::b0ram0800_r(offs_t offset) { return m_ram_ptr[offset+0x800]; void apple2gs_state::b0ram0800_w(offs_t offset, u8 data) { m_ram_ptr[offset+0x800] = data; - if (offset < 0x400) { if ((!(m_shadow & SHAD_TXTPG2)) && (m_is_rom3)) @@ -3017,8 +3016,11 @@ void apple2gs_state::b1ram0800_w(offs_t offset, u8 data) m_ram_ptr[offset+0x10800] = data; if (offset < 0x400) { - slow_cycle(); - m_megaii_ram[offset+0x10800] = data; + if ((!(m_shadow & SHAD_TXTPG2)) && (m_is_rom3)) + { + slow_cycle(); + m_megaii_ram[offset+0x10800] = data; + } } } u8 apple2gs_state::b1ram2000_r(offs_t offset) { return m_ram_ptr[offset+0x12000]; } @@ -3803,7 +3805,7 @@ void apple2gs_state::apple2gs(machine_config &config) APPLE2_GAMEIO(config, m_gameio, apple2_gameio_device::default_options, nullptr); // HBL is positioned to the right of active video here, but to the left on hardware. - // the left border is positioned to the left here, but to the far right on hardware. + // the borders are counted as active video here, but as HBL on hardware. // these must be compensated for in any use of hpos/vpos/hblank/vblank. SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_raw(A2GS_1M.value() * 16, 65 * 16, 0, BORDER_LEFT + 40 * 16 + BORDER_RIGHT, 262, 0, 231); From 15f785382d7ab08d649cb0cb760c633d5e2f3b6a Mon Sep 17 00:00:00 2001 From: holub Date: Sat, 21 Mar 2026 08:18:53 -0400 Subject: [PATCH 342/351] sinclair/specnext.cpp: separated VRAM memory. (#15117) The Next moved typical VRAM pages (bank5&7) from SRAM to internal FPGA BRAM. bank7 has only 0x2000 and it's mirrored to the second half - this is also covered in this implementation --- src/mame/sinclair/chloe.cpp | 3 +- src/mame/sinclair/screen_ula.cpp | 7 +-- src/mame/sinclair/screen_ula.h | 6 ++- src/mame/sinclair/specnext.cpp | 66 +++++++++++++++++++++------- src/mame/sinclair/specnext_lores.cpp | 2 +- src/mame/sinclair/specnext_lores.h | 4 +- src/mame/sinclair/specnext_tiles.cpp | 12 ++--- src/mame/sinclair/specnext_tiles.h | 6 ++- 8 files changed, 73 insertions(+), 33 deletions(-) diff --git a/src/mame/sinclair/chloe.cpp b/src/mame/sinclair/chloe.cpp index 4d35162e9fa..75449742429 100644 --- a/src/mame/sinclair/chloe.cpp +++ b/src/mame/sinclair/chloe.cpp @@ -896,7 +896,8 @@ void chloe_state::video_start() spectrum_128_state::video_start(); const u8 *ram = m_ram->pointer(); - m_ula_scr->set_host_ram_ptr(ram); + m_ula_scr->set_bram_bank5_ptr(ram + (5 << 14)); + m_ula_scr->set_bram_bank7_ptr(ram + (7 << 14)); } diff --git a/src/mame/sinclair/screen_ula.cpp b/src/mame/sinclair/screen_ula.cpp index fb0cce46aa1..1b737a1e774 100644 --- a/src/mame/sinclair/screen_ula.cpp +++ b/src/mame/sinclair/screen_ula.cpp @@ -102,11 +102,12 @@ void screen_ula_device::draw(screen_device &screen, bitmap_rgb32 &bitmap, const void screen_ula_device::draw_ula(bitmap_rgb32 &bitmap, const rectangle &clip, bool flash, bitmap_ind8 &priority_bitmap, u8 pcode) { const bool hicolor = screen_mode() == 2; // timex hicolor - const bool timex_alt = !m_ula_shadow_en && screen_mode() == 1; flash &= !m_ulanext_en && !m_ulap_en; const rgb_t gt0 = rgbexpand<3,3,3>((m_global_transparent << 1) | 0, 6, 3, 0); const rgb_t gt1 = rgbexpand<3,3,3>((m_global_transparent << 1) | 1, 6, 3, 0); - const u8 *screen_location = m_host_ram_ptr + ((m_ula_shadow_en ? 7 : 5) << 14) + (timex_alt ? 0x2000 : 0); + const u8 *screen_location = m_ula_shadow_en ? m_bram_bank7_ptr : m_bram_bank5_ptr; + if (screen_mode() == 1) // Timex alt screen + screen_location += 0x2000; const u16 x2_min = ((clip.left() - m_offset_h) + (m_ula_scroll_x << 1) + m_ula_fine_scroll_x) % (SCREEN_AREA.width() << 1); for (u16 vpos = clip.top(); vpos <= clip.bottom(); vpos++) @@ -167,7 +168,7 @@ void screen_ula_device::draw_hires(bitmap_rgb32 &bitmap, const rectangle &clip, { const rgb_t gt0 = rgbexpand<3,3,3>((m_global_transparent << 1) | 0, 6, 3, 0); const rgb_t gt1 = rgbexpand<3,3,3>((m_global_transparent << 1) | 1, 6, 3, 0); - const u8 *screen_location = m_host_ram_ptr + ((m_ula_shadow_en ? 7 : 5) << 14); + const u8 *screen_location = m_ula_shadow_en ? m_bram_bank7_ptr : m_bram_bank5_ptr; const u8 attr = 0x40 | (~m_port_ff_reg & 0x38) | BIT(m_port_ff_reg, 3, 3); const std::pair pi = parse_attribute(attr); diff --git a/src/mame/sinclair/screen_ula.h b/src/mame/sinclair/screen_ula.h index 24b7f411fd1..7a84efe8be3 100644 --- a/src/mame/sinclair/screen_ula.h +++ b/src/mame/sinclair/screen_ula.h @@ -9,7 +9,8 @@ class screen_ula_device : public device_t, public device_gfx_interface { public: - screen_ula_device &set_host_ram_ptr(const u8 *host_ram_ptr) { m_host_ram_ptr = host_ram_ptr; return *this; } + screen_ula_device &set_bram_bank5_ptr(const u8 *bram_bank5_ptr) { m_bram_bank5_ptr = bram_bank5_ptr; return *this; } + screen_ula_device &set_bram_bank7_ptr(const u8 *bram_bank7_ptr) { m_bram_bank7_ptr = bram_bank7_ptr; return *this; } screen_ula_device &set_palette(const char *tag, u16 base_offset, u16 alt_offset); void set_raster_offset(u16 offset_h, u16 offset_v) { m_offset_h = offset_h; m_offset_v = offset_v; } @@ -55,7 +56,8 @@ private: static inline constexpr u16 UTM_FALLBACK_PEN = 0x800; u16 m_offset_h, m_offset_v; - const u8 *m_host_ram_ptr; + const u8 *m_bram_bank5_ptr; + const u8 *m_bram_bank7_ptr; u8 m_global_transparent; u16 m_palette_base_offset; u16 m_palette_alt_offset; diff --git a/src/mame/sinclair/specnext.cpp b/src/mame/sinclair/specnext.cpp index 12495417457..7b020273136 100644 --- a/src/mame/sinclair/specnext.cpp +++ b/src/mame/sinclair/specnext.cpp @@ -110,6 +110,8 @@ public: , m_io_expbus_view(*this, "io_expbus_view") , m_bank_boot_rom(*this, "bootrom") , m_bank_ram(*this, "bank_ram%u", 0U) + , m_bram_bank5(*this, "bram_bank5", 0x4000, ENDIANNESS_LITTLE) + , m_bram_bank7(*this, "bram_bank7", 0x2000, ENDIANNESS_LITTLE) , m_view0(*this, "mem_view0") , m_view1(*this, "mem_view1") , m_view2(*this, "mem_view2") @@ -355,6 +357,8 @@ private: memory_view m_io_expbus_view; memory_bank_creator m_bank_boot_rom; memory_bank_array_creator<8> m_bank_ram; + memory_share_creator m_bram_bank5; + memory_share_creator m_bram_bank7; memory_view m_view0, m_view1, m_view2, m_view3, m_view4, m_view5, m_view6, m_view7; required_device m_im2_line; optional_device m_im2_uart0_rx; @@ -830,28 +834,41 @@ void specnext_state::bank_update(u8 bank) } if (false) // unused in current implementation, makes compiler happy - printf("%d", sram_active + sram_bank5 + sram_romcs_en + sram_mem_hide_n); + printf("%d", sram_romcs_en); - if (cpu_rd_n) + if (cpu_rd_n) // write cycle { m_page_shadow[bank] = sram_rdonly ? -1 : sram_A21_A13; } - else + else // read cycle { - const bool ro = sram_rdonly || (m_page_shadow[bank] != sram_A21_A13); if (sram_A21_A13 < m_ram_pages) { - m_bank_ram[bank]->set_entry(sram_A21_A13); - views[bank].get().select(ro); - LOGMEM("%s%d = %x\n", ro ? "ROM" : "RAM", bank, sram_A21_A13); + if (!sram_active && !sram_mem_hide_n && (sram_bank5 || sram_bank7)) + { + views[bank].get().select(sram_A21_A13); + LOGMEM("RAM%d = bank%d\n", bank, sram_bank5 ? 5 : 7); + m_page_shadow[bank] = -1; + } + else + { + const bool ro = sram_rdonly || (m_page_shadow[bank] != sram_A21_A13); + m_bank_ram[bank]->set_entry(sram_A21_A13); + views[bank].get().select(ro); + LOGMEM("%s%d = %x\n", ro ? "ROM" : "RAM", bank, sram_A21_A13); + + if (!ro) + { + if (m_page_shadow[bank] == sram_A21_A13) + m_page_shadow[bank] = -1; + } + } + } else - views[bank].get().disable(); - - if (!ro) { - if (m_page_shadow[bank] == sram_A21_A13) - m_page_shadow[bank] = -1; + views[bank].get().disable(); + m_page_shadow[bank] = -1; } } } @@ -2959,6 +2976,21 @@ void specnext_state::map_mem(address_map &map) map(0x0000 + i * 0x2000, 0x1fff + i * 0x2000).view(views[i].get()); views[i].get()[0](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).bankrw(m_bank_ram[i]); views[i].get()[1](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).bankr(m_bank_ram[i]); + + // bank5 + views[i].get()[0x2a](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).lrw8( + NAME([this](offs_t offset) { return m_bram_bank5[offset & 0x1fff]; }), + NAME([this](offs_t offset, u8 data) { m_bram_bank5[offset & 0x1fff] = data; }) + ); + views[i].get()[0x2b](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).lrw8( + NAME([this](offs_t offset) { return m_bram_bank5[0x2000 + (offset & 0x1fff)]; }), + NAME([this](offs_t offset, u8 data) { m_bram_bank5[0x2000 + (offset & 0x1fff)] = data; }) + ); + // bank7 + views[i].get()[0x2e](0x0000 + i * 0x2000, 0x1fff + i * 0x2000).lrw8( + NAME([this](offs_t offset) { return m_bram_bank7[offset & 0x1fff]; }), + NAME([this](offs_t offset, u8 data) { m_bram_bank7[offset & 0x1fff] = data; }) + ); } views[0].get()[2](0x0000, 0x1fff).bankr(m_bank_boot_rom); views[1].get()[2](0x2000, 0x3fff).bankr(m_bank_boot_rom); @@ -3292,10 +3324,12 @@ void specnext_state::machine_start() m_bank_boot_rom->configure_entry(0, memregion("maincpu")->base()); const u8 *ram = m_ram->pointer() + 0x40000; - m_ula_scr->set_host_ram_ptr(ram); - m_tiles->set_host_ram_ptr(ram); + m_ula_scr->set_bram_bank5_ptr(m_bram_bank5.target()); + m_ula_scr->set_bram_bank7_ptr(m_bram_bank7.target()); + m_tiles->set_bram_bank5_ptr(m_bram_bank5.target()); + m_tiles->set_bram_bank7_ptr(m_bram_bank7.target()); m_layer2->set_host_ram_ptr(ram); - m_lores->set_host_ram_ptr(ram); + m_lores->set_bram_bank5_ptr(m_bram_bank5.target()); m_nr_02_hard_reset = 1; @@ -3940,7 +3974,7 @@ void specnext_state::video_start() prg.install_write_tap(0x0000, 0xbfff, "shadow_w", [this](offs_t offset, u8 &data, u8 mem_mask) { u8 bank8 = offset >> 13; - if (m_page_shadow[bank8] >= 0 && m_ram_pages > m_page_shadow[bank8]) + if (m_page_shadow[bank8] >= 0) { u8 *to = m_ram->pointer() + (m_page_shadow[bank8] << 13); to[offset & 0x1fff] = data; diff --git a/src/mame/sinclair/specnext_lores.cpp b/src/mame/sinclair/specnext_lores.cpp index 18611172cdd..022cba2a9bb 100644 --- a/src/mame/sinclair/specnext_lores.cpp +++ b/src/mame/sinclair/specnext_lores.cpp @@ -49,7 +49,7 @@ void specnext_lores_device::draw(screen_device &screen, bitmap_rgb32 &bitmap, co u16 pen_base = (m_lores_palette_select ? m_palette_alt_offset : m_palette_base_offset); if (m_mode) pen_base |= (((m_ulap_en ? 0b1100 : 0) | m_lores_palette_offset) << 4); - const u8 *screen_location = m_host_ram_ptr + (5 << 14); + const u8 *screen_location = m_bram_bank5_ptr; const u16 x4_min = (clip.left() - m_offset_h + (m_scroll_x << 1) + (SCREEN_AREA.width() << 1)) % (SCREEN_AREA.width() << 1); for (u16 vpos = clip.top(); vpos <= clip.bottom(); ++vpos) diff --git a/src/mame/sinclair/specnext_lores.h b/src/mame/sinclair/specnext_lores.h index ea6fd65cc0f..7b0c24038b6 100644 --- a/src/mame/sinclair/specnext_lores.h +++ b/src/mame/sinclair/specnext_lores.h @@ -11,7 +11,7 @@ class specnext_lores_device : public device_t, public device_gfx_interface public: specnext_lores_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - specnext_lores_device &set_host_ram_ptr(const u8 *host_ram_ptr) { m_host_ram_ptr = host_ram_ptr; return *this; } + specnext_lores_device &set_bram_bank5_ptr(const u8 *bram_bank5_ptr) { m_bram_bank5_ptr = bram_bank5_ptr; return *this; } specnext_lores_device &set_palette(const char *tag, u16 base_offset, u16 alt_offset); void set_raster_offset(u16 offset_h, u16 offset_v) { m_offset_h = offset_h; m_offset_v = offset_v; } @@ -40,7 +40,7 @@ protected: private: u16 m_offset_h, m_offset_v; - const u8 *m_host_ram_ptr; + const u8 *m_bram_bank5_ptr; u8 m_global_transparent; u16 m_palette_base_offset; u16 m_palette_alt_offset; diff --git a/src/mame/sinclair/specnext_tiles.cpp b/src/mame/sinclair/specnext_tiles.cpp index b4ac1c85f20..5d4e107aaf1 100644 --- a/src/mame/sinclair/specnext_tiles.cpp +++ b/src/mame/sinclair/specnext_tiles.cpp @@ -102,7 +102,9 @@ void specnext_tiles_device::tilemap_update() { if (gfx(0) == nullptr) return; - const u8 *tiles_offset = m_host_ram_ptr + ((BIT(m_tm_tile_base, 6) ? 7 : 5) << 14) + ((m_tm_tile_base & 0x3f) << 8); + const u8 *tiles_offset = BIT(m_tm_tile_base, 6) + ? m_bram_bank7_ptr + ((m_tm_tile_base & 0x1f) << 8) + : m_bram_bank5_ptr + ((m_tm_tile_base & 0x3f) << 8); for (auto i = 0; i < 6; ++i) { gfx(i)->set_source(tiles_offset); @@ -133,11 +135,9 @@ void specnext_tiles_device::tilemap_update() } } - m_tiles_info = m_host_ram_ptr; - if (BIT(m_tm_map_base, 6)) - m_tiles_info += (7 << 14) + ((m_tm_map_base & 0x1f) << 8); - else - m_tiles_info += (5 << 14) + ((m_tm_map_base & 0x3f) << 8); + m_tiles_info = BIT(m_tm_map_base, 6) + ? m_bram_bank7_ptr + ((m_tm_map_base & 0x1f) << 8) + : m_bram_bank5_ptr + ((m_tm_map_base & 0x3f) << 8); } void specnext_tiles_device::draw(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect, u32 flags, u8 pcode, u8 priority_mask) diff --git a/src/mame/sinclair/specnext_tiles.h b/src/mame/sinclair/specnext_tiles.h index f989668be7d..15dbf098e83 100644 --- a/src/mame/sinclair/specnext_tiles.h +++ b/src/mame/sinclair/specnext_tiles.h @@ -13,7 +13,8 @@ class specnext_tiles_device : public device_t, public device_gfx_interface public: specnext_tiles_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); - specnext_tiles_device &set_host_ram_ptr(const u8 *host_ram_ptr) { m_host_ram_ptr = host_ram_ptr; tilemap_update(); return *this; } + specnext_tiles_device &set_bram_bank5_ptr(const u8 *bram_bank5_ptr) { m_bram_bank5_ptr = bram_bank5_ptr; tilemap_update(); return *this; } + specnext_tiles_device &set_bram_bank7_ptr(const u8 *bram_bank7_ptr) { m_bram_bank7_ptr = bram_bank7_ptr; tilemap_update(); return *this; } specnext_tiles_device &set_palette(const char *tag, u16 base_offset, u16 alt_offset); void tilemap_update(); @@ -46,7 +47,8 @@ protected: TILE_GET_INFO_MEMBER(get_tile_info); - const u8 *m_host_ram_ptr; + const u8 *m_bram_bank5_ptr; + const u8 *m_bram_bank7_ptr; const u8 *m_tiles_info; tilemap_t *m_tilemap[2]; From 85b6891f26be0b4c4756465bd8100bd688ba34af Mon Sep 17 00:00:00 2001 From: Vincent-Halver Date: Sat, 21 Mar 2026 05:22:05 -0700 Subject: [PATCH 343/351] CD-i: Add Audio Mixing (#15105) * cdic: Remove Allocation Removes unnecessary memory allocation in CDDA decoder. The class already has m_samples prepared for this purpose. * cdic: Simplify XA Audio This removes an allocation of 56 bytes by instead using an orphaned array which was intended for this purpose. * CD-i: Add Audio Attenuation Storage Breaks existing savestates. * cdicdic: Add Attenuation Math * CD-i: Reduce crashes from Audio Previously, attenuation commands were not processed resulting in executing data bytes as code. This placeholder properly skips 5 bytes, increasing stability of the system. * CD-i: Add Audio Mixing CD-i audio mixing now largely working. To verify, try Zelda Wand of Gamelon and notice the audio now fades correctly. * CD-i: Reduce Audio Peaking Changing to 0.25 removes some noticeable audio peaking. For example, the intro Philips logo. --- src/mame/philips/cdi.cpp | 1 + src/mame/philips/cdicdic.cpp | 66 +++++++++++++++++-------- src/mame/philips/cdicdic.h | 6 ++- src/mame/philips/cdislavehle.cpp | 82 ++++++++++++++------------------ src/mame/philips/cdislavehle.h | 2 + 5 files changed, 89 insertions(+), 68 deletions(-) diff --git a/src/mame/philips/cdi.cpp b/src/mame/philips/cdi.cpp index 2286e6a0c25..ad14642139a 100644 --- a/src/mame/philips/cdi.cpp +++ b/src/mame/philips/cdi.cpp @@ -457,6 +457,7 @@ void cdi_state::cdimono1_base(machine_config &config) CDI_SLAVE_HLE(config, m_slave_hle, 0); m_slave_hle->int_callback().set(m_maincpu, FUNC(scc68070_device::in2_w)); + m_slave_hle->atten_callback().set(m_cdic, FUNC(cdicdic_device::atten_w)); CDROM(config, m_cdrom); m_cdrom->set_interface("cdrom"); diff --git a/src/mame/philips/cdicdic.cpp b/src/mame/philips/cdicdic.cpp index d81570e7281..fe8b7070873 100644 --- a/src/mame/philips/cdicdic.cpp +++ b/src/mame/philips/cdicdic.cpp @@ -24,8 +24,6 @@ TODO: #include "cdrom.h" #include "sound/cdda.h" -#include - #define LOG_DECODES (1U << 1) #define LOG_SAMPLES (1U << 2) #define LOG_COMMANDS (1U << 3) @@ -314,40 +312,33 @@ void cdicdic_device::play_raw_group(const uint8_t *data) m_dmadac[1]->transfer(0, 1, 1, 28, samples); } -void cdicdic_device::play_xa_group(const uint8_t coding, const uint8_t *data) +void cdicdic_device::play_xa_group(const uint8_t coding, const uint8_t *data, const uint16_t idx) { static const uint16_t HEADER_OFFSET_4BIT[8] = { 4, 5, 6, 7, 12, 13, 14, 15 }; static const uint16_t HEADER_OFFSET_8BIT[4] = { 4, 5, 6, 7 }; static const uint16_t DATA_OFFSET_4BIT[8] = { 16, 16, 17, 17, 18, 18, 19, 19 }; static const uint16_t DATA_OFFSET_8BIT[4] = { 16, 17, 18, 19 }; - int16_t samples[28]; - const uint8_t num_samples = (coding & CODING_8BPS) ? 4 : 8; + const uint8_t num_samples = coding & CODING_8BPS ? 4 : 8; for (uint8_t i = 0; i < num_samples; i++) { switch (coding & (CODING_BPS_MASK | CODING_CHAN_MASK)) { case CODING_4BPS | CODING_MONO: - decode_4bit_xa_unit(0, data[HEADER_OFFSET_4BIT[i]], data + DATA_OFFSET_4BIT[i], (i & 1) ? 4 : 0, samples); - m_dmadac[0]->transfer(0, 1, 1, 28, samples); - m_dmadac[1]->transfer(0, 1, 1, 28, samples); + decode_4bit_xa_unit(0, data[HEADER_OFFSET_4BIT[i]], data + DATA_OFFSET_4BIT[i], (i & 1) ? 4 : 0, &m_samples[0][idx + i * 28]); break; case CODING_4BPS | CODING_STEREO: - decode_4bit_xa_unit(i & 1, data[HEADER_OFFSET_4BIT[i]], data + DATA_OFFSET_4BIT[i], (i & 1) ? 4 : 0, samples); - m_dmadac[i & 1]->transfer(0, 1, 1, 28, samples); + decode_4bit_xa_unit(i & 1, data[HEADER_OFFSET_4BIT[i]], data + DATA_OFFSET_4BIT[i], (i & 1) ? 4 : 0, &m_samples[i & 1][idx + (i >> 1) * 28]); break; case CODING_8BPS | CODING_MONO: - decode_8bit_xa_unit(0, data[HEADER_OFFSET_8BIT[i]], data + DATA_OFFSET_8BIT[i], samples); - m_dmadac[0]->transfer(0, 1, 1, 28, samples); - m_dmadac[1]->transfer(0, 1, 1, 28, samples); + decode_8bit_xa_unit(0, data[HEADER_OFFSET_8BIT[i]], data + DATA_OFFSET_8BIT[i], &m_samples[0][idx + i * 28]); break; case CODING_8BPS | CODING_STEREO: - decode_8bit_xa_unit(i & 1, data[HEADER_OFFSET_8BIT[i]], data + DATA_OFFSET_8BIT[i], samples); - m_dmadac[i & 1]->transfer(0, 1, 1, 28, samples); + decode_8bit_xa_unit(i & 1, data[HEADER_OFFSET_8BIT[i]], data + DATA_OFFSET_8BIT[i], &m_samples[i & 1][idx + (i >> 1) * 28]); break; } } @@ -361,15 +352,14 @@ void cdicdic_device::play_cdda_sector(const uint8_t *data) m_dmadac[1]->set_volume(0x100); const uint16_t NUM_SAMPLES = SECTOR_SIZE / 4; - int16_t samples[2][NUM_SAMPLES]; for (uint16_t i = 0; i < NUM_SAMPLES; i++) { - samples[0][i] = (int16_t)((data[(i * 4) + 1] << 8) | data[(i * 4) + 0]); - samples[1][i] = (int16_t)((data[(i * 4) + 3] << 8) | data[(i * 4) + 2]); + m_samples[0][i] = (int16_t)((data[(i * 4) + 1] << 8) | data[(i * 4) + 0]); + m_samples[1][i] = (int16_t)((data[(i * 4) + 3] << 8) | data[(i * 4) + 2]); } - m_dmadac[0]->transfer(0, 1, 1, NUM_SAMPLES, samples[0]); - m_dmadac[1]->transfer(0, 1, 1, NUM_SAMPLES, samples[1]); + m_dmadac[0]->transfer(0, 1, 1, NUM_SAMPLES, &m_samples[0][0]); + m_dmadac[1]->transfer(0, 1, 1, NUM_SAMPLES, &m_samples[1][0]); } void cdicdic_device::play_audio_sector(const uint8_t coding, const uint8_t *data) @@ -434,6 +424,10 @@ void cdicdic_device::play_audio_sector(const uint8_t coding, const uint8_t *data m_dmadac[0]->set_volume(0x100); m_dmadac[1]->set_volume(0x100); + const uint16_t bps = ((coding & CODING_BPS_MASK) == CODING_8BPS); + const uint16_t chan = ((coding & CODING_CHAN_MASK) == CODING_STEREO); + const uint16_t num_samples = 8 >> (bps + chan); + if (bits == 16 && channels == 2) { for (uint16_t i = 0; i < SECTOR_AUDIO_SIZE; i += 112, data += 112) @@ -443,9 +437,29 @@ void cdicdic_device::play_audio_sector(const uint8_t coding, const uint8_t *data } else { + uint16_t offset = 0; for (uint16_t i = 0; i < SECTOR_AUDIO_SIZE; i += 128, data += 128) { - play_xa_group(coding, data); + play_xa_group(coding, data, offset); + offset += 28 * num_samples; + } + + int16_t sampleL = 0, sampleR = 0, outL = 0, outR = 0; + // Attenuation is logarithmic (decibels). + // Floats are not chip accurate, but the formula is correct. + float scaleLL = powf(10.0f, -m_atten[0] / 20.0f); + float scaleLR = powf(10.0f, -m_atten[1] / 20.0f); + float scaleRR = powf(10.0f, -m_atten[2] / 20.0f); + float scaleRL = powf(10.0f, -m_atten[3] / 20.0f); + for (uint16_t i = 0; i < 18 * 28 * num_samples; i++) + { + sampleL = m_samples[0][i]; + sampleR = m_samples[coding & CODING_STEREO][i]; + + outL = (sampleL * scaleLL + sampleR * scaleRL) * 0.25; + outR = (sampleL * scaleLR + sampleR * scaleRR) * 0.25; + m_dmadac[0]->transfer(0, 1, 1, 1, &outL); + m_dmadac[1]->transfer(0, 1, 1, 1, &outR); } } } @@ -1172,6 +1186,14 @@ void cdicdic_device::regs_w(offs_t offset, uint16_t data, uint16_t mem_mask) } } + +void cdicdic_device::atten_w(uint32_t state) { + m_atten[0] = (state & 0xFF000000) >> 24; + m_atten[1] = (state & 0x00FF0000) >> 16; + m_atten[2] = (state & 0x0000FF00) >> 8; + m_atten[3] = (state & 0x000000FF); +} + void cdicdic_device::init_disc_read(uint8_t disc_mode) { m_disc_command = m_command; @@ -1313,6 +1335,7 @@ void cdicdic_device::device_start() save_item(NAME(m_decoding_audio_map)); save_item(NAME(m_decode_addr)); + save_item(NAME(m_atten)); save_item(NAME(m_xa_last)); m_audio_timer = timer_alloc(FUNC(cdicdic_device::audio_tick), this); @@ -1360,6 +1383,7 @@ void cdicdic_device::device_reset() m_dmadac[0]->enable(1); m_dmadac[1]->enable(1); + std::fill_n(m_atten, 4, 0); std::fill_n(m_xa_last, 4, 0); } diff --git a/src/mame/philips/cdicdic.h b/src/mame/philips/cdicdic.h index 664eef09f9a..21900eb0eb8 100644 --- a/src/mame/philips/cdicdic.h +++ b/src/mame/philips/cdicdic.h @@ -58,6 +58,7 @@ public: void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint8_t intack_r(); + void atten_w(uint32_t state); protected: // device_t implementation @@ -186,7 +187,8 @@ private: bool m_decoding_audio_map; uint16_t m_decode_addr; - // Should eventually have Audio Attenuation (L->L, L->R, R->R, R->L) here + // Audio Attenuation (L->L, L->R, R->R, R->L) + uint8_t m_atten[4]; int16_t m_xa_last[4]; std::unique_ptr m_ram; std::unique_ptr m_samples[2]; @@ -195,7 +197,7 @@ private: void decode_8bit_xa_unit(int channel, uint8_t param, const uint8_t *data, int16_t *out_buffer); void decode_4bit_xa_unit(int channel, uint8_t param, const uint8_t *data, uint8_t shift, int16_t *out_buffer); void play_raw_group(const uint8_t *data); - void play_xa_group(const uint8_t coding, const uint8_t *data); + void play_xa_group(const uint8_t coding, const uint8_t *data, const uint16_t idx); void play_audio_sector(const uint8_t coding, const uint8_t *data); void play_cdda_sector(const uint8_t *data); void process_audio_map(); diff --git a/src/mame/philips/cdislavehle.cpp b/src/mame/philips/cdislavehle.cpp index fcea66f12e8..29d06bde197 100644 --- a/src/mame/philips/cdislavehle.cpp +++ b/src/mame/philips/cdislavehle.cpp @@ -143,18 +143,17 @@ void cdislave_hle_device::set_mouse_position() void cdislave_hle_device::slave_w_mouse(offs_t offset, uint16_t data) { - m_in_buf[m_in_index] = data & 0x00ff; bool set_mouse = m_in_buf[0] >= 0xc0; if (set_mouse) { - if (m_in_index == 0) + if (m_in_index == 1) { LOGMASKED(LOG_COMMANDS, "slave_w: Channel %d: Update Mouse Position (0x%02x)\n", offset, data & 0x00ff); m_in_count = 3; } else { - if (m_in_index == m_in_count - 1) + if (m_in_index == m_in_count) { // Update Mouse Position set_mouse_position(); @@ -168,66 +167,65 @@ void cdislave_hle_device::slave_w_mouse(offs_t offset, uint16_t data) else { LOGMASKED(LOG_COMMANDS | LOG_UNKNOWNS, "slave_w: Channel %d: Unknown register: %02x\n", offset, data & 0x00ff); - if (m_in_index == 0){ + if (m_in_index == 1) + { + m_in_index = 0; return; } } - m_in_index++; } void cdislave_hle_device::slave_w(offs_t offset, uint16_t data) { LOGMASKED(LOG_WRITES, "slave_w: Channel %d: %d = %02x\n", offset, m_in_index, data & 0x00ff); + if (offset == 1 && m_in_index == 0) + { + LOGMASKED(LOG_COMMANDS | LOG_UNKNOWNS, "slave_w: Channel %d: Unknown register: %02x\n", offset, data & 0x00ff); + memset(m_in_buf, 0, 17); + m_in_index = 0; + m_in_count = 0; + return; + } + + m_in_buf[m_in_index] = data & 0x00ff; + m_in_index++; switch (offset) { case 0: slave_w_mouse(offset, data); break; case 1: - if (m_in_index) + if (m_in_index > 1) { - m_in_buf[m_in_index] = data & 0x00ff; - m_in_index++; if (m_in_index == m_in_count) { switch (m_in_buf[0]) { case 0xf0: // Set Front Panel LCD memcpy(m_lcd_state, m_in_buf + 1, 16); - memset(m_in_buf, 0, 17); - m_in_index = 0; - m_in_count = 0; break; default: - memset(m_in_buf, 0, 17); - m_in_index = 0; - m_in_count = 0; break; } - } - } - else - { - switch (data & 0x00ff) - { - default: - LOGMASKED(LOG_COMMANDS | LOG_UNKNOWNS, "slave_w: Channel %d: Unknown register: %02x\n", offset, data & 0x00ff); - memset(m_in_buf, 0, 17); - m_in_index = 0; - m_in_count = 0; - break; + memset(m_in_buf, 0, 17); + m_in_index = 0; + m_in_count = 0; } } break; case 2: - if (m_in_index) + if (m_in_index > 1) { - m_in_buf[m_in_index] = data & 0x00ff; - m_in_index++; if (m_in_index == m_in_count) { switch (m_in_buf[0]) { + case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: + case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: + m_atten_w((((u32)m_in_buf[1]) << 24) | (((u32)m_in_buf[2]) << 16) | (((u32)m_in_buf[3]) << 8) | (((u32)m_in_buf[4]))); + m_in_index = 0; + m_in_count = 0; + break; case 0xf0: // Set Front Panel LCD memset(m_in_buf + 1, 0, 16); m_in_count = 17; @@ -242,8 +240,6 @@ void cdislave_hle_device::slave_w(offs_t offset, uint16_t data) } else { - m_in_buf[m_in_index] = data & 0x00ff; - m_in_index++; switch (data & 0x00ff) { case 0x82: // Mute Audio @@ -265,6 +261,11 @@ void cdislave_hle_device::slave_w(offs_t offset, uint16_t data) m_in_count = 0; break; } + case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: + case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: + LOGMASKED(LOG_COMMANDS, "slave_w: Channel %d: Set Attenuation Audio\n", offset); + m_in_count = 5; + break; case 0xf0: // Set Front Panel LCD LOGMASKED(LOG_COMMANDS, "slave_w: Channel %d: Set Front Panel LCD (0xf0)\n", offset); m_in_count = 17; @@ -279,38 +280,28 @@ void cdislave_hle_device::slave_w(offs_t offset, uint16_t data) } break; case 3: - if (m_in_index) + if (m_in_index > 1) { - m_in_buf[m_in_index] = data & 0x00ff; - m_in_index++; if (m_in_index == m_in_count) { switch (m_in_buf[0]) { case 0xb0: // Request Disc Status - memset(m_in_buf, 0, 17); - m_in_index = 0; - m_in_count = 0; prepare_readback(attotime::from_hz(4), 3, 4, 0xb0, 0x00, 0x02, 0x15, 0xb0); break; //case 0xb1: // Request Disc Base - //memset(m_in_buf, 0, 17); - //m_in_index = 0; - //m_in_count = 0; //prepare_readback(attotime::from_hz(10000), 3, 4, 0xb1, 0x00, 0x00, 0x00, 0xb1); //break; default: - memset(m_in_buf, 0, 17); - m_in_index = 0; - m_in_count = 0; break; } + memset(m_in_buf, 0, 17); + m_in_index = 0; + m_in_count = 0; } } else { - m_in_buf[m_in_index] = data & 0x00ff; - m_in_index++; switch (data & 0x00ff) { case 0xb0: // Request Disc Status @@ -378,6 +369,7 @@ cdislave_hle_device::cdislave_hle_device(const machine_config &mconfig, const ch , m_read_mousey(*this, 0x0000) , m_read_mousebtn(*this, 0x00) , m_dmadac(*this, ":dac%u", 1U) + , m_atten_w(*this) { } diff --git a/src/mame/philips/cdislavehle.h b/src/mame/philips/cdislavehle.h index 93051e69653..0ae46aab511 100644 --- a/src/mame/philips/cdislavehle.h +++ b/src/mame/philips/cdislavehle.h @@ -38,6 +38,7 @@ public: auto read_mousex() { return m_read_mousex.bind(); } auto read_mousey() { return m_read_mousey.bind(); } auto read_mousebtn() { return m_read_mousebtn.bind(); } + auto atten_callback() { return m_atten_w.bind(); } uint8_t* get_lcd_state() { return m_lcd_state; } @@ -64,6 +65,7 @@ private: devcb_read8 m_read_mousebtn; required_device_array m_dmadac; + devcb_write32 m_atten_w; struct channel_state { From f35d749527426d1e18155232f0846e271eb26c63 Mon Sep 17 00:00:00 2001 From: arbee Date: Sat, 21 Mar 2026 08:30:24 -0400 Subject: [PATCH 344/351] Revert "sdl3_sound: don't hardcode max frames to 8" This reverts commit 2ad7438fb07efd2ebcfa439f001522ad614cefcf. This is not the correct way to implement max_latency for SDL3. --- src/osd/modules/sound/sdl3_sound.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/osd/modules/sound/sdl3_sound.cpp b/src/osd/modules/sound/sdl3_sound.cpp index d519aa9de33..57fcc48df89 100644 --- a/src/osd/modules/sound/sdl3_sound.cpp +++ b/src/osd/modules/sound/sdl3_sound.cpp @@ -86,7 +86,6 @@ private: uint32_t m_default_sink, m_default_source; uint32_t m_stream_next_id; osd::audio_info m_deviceinfo; - uint32_t m_max_frames; std::map> m_streams; }; @@ -108,8 +107,8 @@ int sound_sdl3::init(osd_interface &osd, const osd_options &options) char const *const audio_driver = SDL_GetCurrentAudioDriver(); osd_printf_verbose("SDL Audio: Driver is %s\n", audio_driver ? audio_driver : "not initialized"); - const float latency = options.audio_latency(); - m_max_frames = (latency > 0.0f) ? latency + 3 : 8; + if(options.audio_latency() > 0.0f) + osd_printf_verbose("SDL Audio: %s module does not support audio_latency option\n", name()); int dev_count = 0; SDL_AudioSpec spec; @@ -350,7 +349,7 @@ void sound_sdl3::stream_sink_update(uint32_t id, const int16_t *buffer, int samp const stream_info *stream = si->second.get(); const auto queue_size = SDL_GetAudioStreamQueued(stream->m_sdl_stream); - if (queue_size < m_max_frames * samples_this_frame) + if (queue_size <= 8 * samples_this_frame) { SDL_PutAudioStreamData(stream->m_sdl_stream, (void *)buffer, samples_this_frame * sizeof(int16_t) * stream->m_buffer.channels()); } From 2c7c8534b6cb0da6d146365515203cda0fa3de92 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sat, 21 Mar 2026 16:01:20 +0200 Subject: [PATCH 345/351] ymz770: add sample rate auto selection --- src/devices/sound/ymz770.cpp | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index 15756948c09..31f485c3d39 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -14,7 +14,7 @@ TODO: both /SEL and /CS pins goes low - will be run SAC with number set at data bus. It can not be used in CV1K (/SEL pin is NC, internally pulled to VCC), probably not used in PGM2 too. -- Configurable sample clock divider (currently hardcoded) +- Configurable sample clock divider needs more research 770: - Sequencer timers are implemented but seem unused, presumably because of design flaws or bugs, likely due to lack of automatic adding of sequencer # to register @@ -239,7 +239,7 @@ retry: if (channel.is_playing) { // next block - int sample_rate, channel_count; + int sample_rate = m_sclock, channel_count; if (!channel.decoder->decode_buffer(channel.pptr, m_rom.bytes()*8, channel.output_data, channel.output_remaining, sample_rate, channel_count, channel.atbl) || channel.output_remaining == 0) { channel.is_playing = !channel.last_block; // detect infinite retry loop @@ -248,6 +248,14 @@ retry: goto retry; } + // it's not clear how exactly clock divider selection works, so far we simply set sample rate as per AMM header, + // in theory may cause problems if samples will have it wrong or use several rates. + if (sample_rate != m_sclock) + { + m_sclock = sample_rate; + m_stream->set_sample_rate(m_sclock); + } + channel.last_block = channel.output_remaining < 1152; channel.output_remaining--; channel.output_ptr = 1; From 420030e0e672f07b29a0c1b0d46409455f992e6d Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sat, 21 Mar 2026 16:16:48 +0200 Subject: [PATCH 346/351] yms770: fix prev --- src/devices/sound/ymz770.cpp | 3 ++- src/devices/sound/ymz770.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index 31f485c3d39..b5d13047aef 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -84,7 +84,8 @@ ymz770_device::ymz770_device(const machine_config &mconfig, device_type type, co void ymz770_device::device_start() { // create the stream - m_stream = stream_alloc(0, 2, clock() / m_divider); + m_sclock = clock() / m_divider; + m_stream = stream_alloc(0, 2, m_sclock); for (auto & channel : m_channels) { diff --git a/src/devices/sound/ymz770.h b/src/devices/sound/ymz770.h index 1d81b5eb675..e04a8a2269a 100644 --- a/src/devices/sound/ymz770.h +++ b/src/devices/sound/ymz770.h @@ -45,6 +45,7 @@ protected: sound_stream *m_stream; uint32_t m_divider; + uint32_t m_sclock; // data uint8_t m_cur_reg; From 237d736a31062763d8d24658a52a1fc52e944dc5 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 22 Mar 2026 01:27:52 +1100 Subject: [PATCH 347/351] -emu/dislot.cpp: Cleaned up interface. * Added a helper for the common operation of replacing all options, setting default, and setting whether the slot is fixed (reduced boilerplate in slot devices a bit). * Fixed a bug where slot options copied the supplied name but also required the string to remain valid for their lifetime. * Use std::string_view for strings that should never be null. * Reduced some duplication. -dynax/ddenlovr.cpp: Allow a mahjong panel to be connected for all hanafuda games with slotted control panels. This is how the games were operated most of the time, and all mahjong controls are displayed in input tests. Also cleaned up some DIP switch settings. -emu/inpttype.h: Got rid of IPT_GAMBLE_SERVICE. -bus/bk/parallel.h: Fixed a bug where the supplied options and default weren't actually used. -emu/debug/debugcmd.cpp: Use C++ file stream for dumping address maps. -frontend/mame/clifront.cpp: Use osd_printf_info output for interactive verbs. -jaleco/ms32.cpp: Simplified mahjong panel column permutation. -capcom/cps1bl_5205.cpp, mattel/juicebox.cpp, sun/sun2.cpp, sun/sun3.cpp: Cleaned up logging. -emu/xtal.cpp: Reduced temporary objects and duplicated code. --- src/devices/bus/a2bus/a2bus.h | 5 +- src/devices/bus/a2bus/a2eauxslot.h | 5 +- src/devices/bus/a2kbd/a2kbd.h | 5 +- src/devices/bus/a7800/a78_slot.h | 5 +- src/devices/bus/amiga/keyboard/keyboard.h | 5 +- src/devices/bus/amiga/zorro/zorro.h | 5 +- src/devices/bus/applepp/applepp.h | 5 +- src/devices/bus/astrocde/accessory.h | 5 +- src/devices/bus/bbc/analogue/analogue.h | 5 +- src/devices/bus/bbc/analogue/quinkey.h | 5 +- src/devices/bus/bbc/cart/slot.h | 5 +- src/devices/bus/bbc/fdc/fdc.h | 5 +- src/devices/bus/bbc/joyport/joyport.h | 5 +- src/devices/bus/bbc/modem/modem.h | 5 +- src/devices/bus/bbc/tube/tube.h | 5 +- src/devices/bus/bbc/vsp/slot.h | 5 +- src/devices/bus/bk/parallel.h | 5 +- src/devices/bus/bml3/bml3bus.h | 5 +- src/devices/bus/c64/exp.h | 5 +- src/devices/bus/cbmiec/cbmiec.h | 5 +- src/devices/bus/chanf/slot.h | 5 +- src/devices/bus/coleco/cartridge/exp.h | 5 +- src/devices/bus/coleco/controller/ctrl.h | 5 +- src/devices/bus/coleco/expansion/expansion.h | 5 +- src/devices/bus/cpc/cpcexp.h | 5 +- src/devices/bus/dmv/dmvbus.h | 5 +- src/devices/bus/electron/exp.h | 5 +- src/devices/bus/epson_qx/keyboard/keyboard.h | 5 +- src/devices/bus/gameboy/mdslot.h | 5 +- src/devices/bus/heathzenith/h89/h89bus.h | 21 +- .../bus/heathzenith/intr_cntrl/intr_cntrl.h | 5 +- src/devices/bus/hp_ipc_io/hp_ipc_io.h | 5 +- src/devices/bus/idpartner/bus.h | 5 +- src/devices/bus/imi7000/imi7000.h | 5 +- src/devices/bus/interpro/mouse/mouse.h | 11 +- src/devices/bus/intv/slot.h | 5 +- src/devices/bus/intv_ctrl/ctrl.h | 5 +- src/devices/bus/iq151/iq151.h | 5 +- src/devices/bus/isa/isa.h | 10 +- src/devices/bus/jakks_gamekey/slot.h | 5 +- src/devices/bus/jvs/jvs.h | 5 +- src/devices/bus/kc/kc.h | 14 +- src/devices/bus/lpci/pci.h | 5 +- src/devices/bus/mm2/exp.h | 5 +- src/devices/bus/mtx/exp.h | 5 +- src/devices/bus/nes/aladdin.h | 5 +- src/devices/bus/nes/datach.h | 5 +- src/devices/bus/nes/karastudio.h | 5 +- src/devices/bus/nubus/nubus.h | 4 +- src/devices/bus/oricext/oricext.h | 5 +- src/devices/bus/pc1512/mouse.h | 5 +- src/devices/bus/pc8801/pc8801_exp.h | 5 +- src/devices/bus/pc98_cbus/slot.h | 5 +- src/devices/bus/pc_kbd/pc_kbdc.h | 19 +- src/devices/bus/pce/pce_slot.h | 7 +- src/devices/bus/pce_ctrl/pcectrl.h | 5 +- src/devices/bus/pci/pci_slot.h | 5 +- src/devices/bus/pencil2/slot.h | 5 +- src/devices/bus/pet/cass.h | 5 +- src/devices/bus/pet/user.h | 7 +- src/devices/bus/pofo/exp.h | 5 +- src/devices/bus/psi_kbd/psi_kbd.h | 9 +- src/devices/bus/psion/honda/slot.h | 5 +- src/devices/bus/psx/ctlrport.h | 5 +- src/devices/bus/rs232/rs232.h | 5 +- src/devices/bus/saitek_osa/expansion.h | 5 +- .../bus/samcoupe/expansion/expansion.h | 5 +- src/devices/bus/samcoupe/mouse/mouseport.h | 5 +- src/devices/bus/saturn/sat_slot.h | 5 +- src/devices/bus/sega8/sega8_slot.h | 40 +-- src/devices/bus/segaai/segaai_exp.h | 5 +- src/devices/bus/sg1000_exp/sg1000exp.h | 9 +- src/devices/bus/sg1000_exp/sk1100prn.h | 5 +- src/devices/bus/sms_exp/smsexp.h | 9 +- src/devices/bus/snes/snes_slot.h | 17 +- src/devices/bus/snes_ctrl/ctrl.h | 5 +- src/devices/bus/ss50/interface.h | 9 +- src/devices/bus/sunmouse/sunmouse.h | 5 +- src/devices/bus/tanbus/keyboard/keyboard.h | 9 +- src/devices/bus/tanbus/tanbus.h | 5 +- .../bus/technics/kn5000/kn5000_extension.h | 5 +- src/devices/bus/ti99/joyport/joyport.h | 5 +- src/devices/bus/ti99/peb/peribox.h | 5 +- src/devices/bus/tmc600/euro.h | 5 +- src/devices/bus/tvc/tvc.h | 9 +- src/devices/bus/vcs/vcs_slot.h | 7 +- src/devices/bus/vic10/exp.h | 5 +- src/devices/bus/vic20/exp.h | 5 +- src/devices/bus/vtech/ioexp/ioexp.h | 5 +- src/devices/bus/wswan/slot.h | 5 +- src/devices/bus/wysekbd/wysekbd.h | 9 +- src/devices/imagedev/floppy.h | 5 +- src/devices/machine/nscsi_bus.h | 5 +- src/emu/debug/debugcmd.cpp | 68 +++--- src/emu/dislot.cpp | 131 +++++----- src/emu/dislot.h | 95 +++++--- src/emu/emuopts.cpp | 44 ++-- src/emu/emuopts.h | 21 +- src/emu/inpttype.h | 1 - src/emu/inpttype.ipp | 1 - src/emu/mconfig.cpp | 2 +- src/emu/validity.cpp | 10 +- src/emu/xtal.cpp | 24 +- src/emu/xtal.h | 10 +- src/frontend/mame/clifront.cpp | 58 ++--- src/frontend/mame/infoxml.cpp | 2 +- src/frontend/mame/luaengine.cpp | 2 +- src/frontend/mame/luaengine.h | 3 +- src/frontend/mame/luaengine.ipp | 12 + src/frontend/mame/luaengine_debug.cpp | 2 +- src/frontend/mame/luaengine_input.cpp | 2 +- src/frontend/mame/luaengine_mem.cpp | 6 +- src/frontend/mame/ui/devopt.cpp | 6 +- src/frontend/mame/ui/slotopt.cpp | 14 +- src/mame/aristocrat/aristmk4.cpp | 12 +- src/mame/capcom/cps1bl_5205.cpp | 4 +- src/mame/dynax/ddenlovr.cpp | 229 +++++++----------- src/mame/dynax/mjdipsw.h | 7 + src/mame/excellent/d9final.cpp | 2 +- src/mame/excellent/lastbank.cpp | 2 +- src/mame/f32/f-32.cpp | 2 +- src/mame/funworld/snookr10.cpp | 8 +- src/mame/gaelco/atvtrack.cpp | 12 +- src/mame/gametron/gatron.cpp | 2 +- src/mame/ibm/rtpc_kbd.h | 3 +- src/mame/ibm/rtpc_kbdc.h | 5 +- src/mame/igs/goldstar.cpp | 90 +++---- src/mame/jaleco/ms32.cpp | 21 +- src/mame/konami/konendev.cpp | 4 +- src/mame/mattel/juicebox.cpp | 92 ++++--- src/mame/merit/mgames.cpp | 2 +- src/mame/midway/mcr.cpp | 2 +- src/mame/misc/ampoker2.cpp | 10 +- src/mame/misc/amusco.cpp | 2 +- src/mame/misc/boramz80.cpp | 2 +- src/mame/misc/calomega.cpp | 30 +-- src/mame/misc/cb2001.cpp | 17 +- src/mame/misc/gluck2.cpp | 6 +- src/mame/misc/goldnpkr.cpp | 2 +- src/mame/misc/hotchili.cpp | 2 +- src/mame/misc/jackhouse.cpp | 2 +- src/mame/misc/kingpin.cpp | 2 +- src/mame/misc/magicfly.cpp | 18 +- src/mame/misc/multfish.cpp | 2 +- src/mame/misc/norautp.cpp | 6 +- src/mame/misc/truco.cpp | 2 +- src/mame/sega/9h0-0008_iox.h | 5 +- src/mame/sega/bingoct.cpp | 2 +- src/mame/sega/saturn_v.cpp | 2 +- src/mame/sega/segajw.cpp | 2 +- src/mame/sega/segasm1.cpp | 5 +- src/mame/seta/thedealr.cpp | 2 +- src/mame/shared/mahjong.cpp | 36 +++ src/mame/shared/mahjong.h | 5 +- src/mame/shared/xbox_usb.h | 5 +- src/mame/sigma/sigmab52.cpp | 2 +- src/mame/skeleton/dm7000.cpp | 4 +- src/mame/skeleton/seoul88.cpp | 2 +- src/mame/subsino/subsino.cpp | 26 +- src/mame/sun/sun2.cpp | 85 ++++--- src/mame/sun/sun3.cpp | 116 ++++----- src/mame/taito/taito_o.cpp | 4 +- src/mame/toaplan/sunwise.cpp | 4 +- src/mame/wing/lucky74.cpp | 2 +- src/mame/wing/slotcarn.cpp | 16 +- 165 files changed, 864 insertions(+), 1172 deletions(-) diff --git a/src/devices/bus/a2bus/a2bus.h b/src/devices/bus/a2bus/a2bus.h index 14f05b43563..1bf569b1601 100644 --- a/src/devices/bus/a2bus/a2bus.h +++ b/src/devices/bus/a2bus/a2bus.h @@ -40,10 +40,7 @@ public: a2bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&a2bus_tag, U &&opts, const char *dflt) : a2bus_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); m_a2bus.set_tag(std::forward(a2bus_tag)); } a2bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/a2bus/a2eauxslot.h b/src/devices/bus/a2bus/a2eauxslot.h index 9d6ccfb7036..fb7b2936c29 100644 --- a/src/devices/bus/a2bus/a2eauxslot.h +++ b/src/devices/bus/a2bus/a2eauxslot.h @@ -33,10 +33,7 @@ public: a2eauxslot_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slottag, U &&opts, char const *dflt) : a2eauxslot_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); m_a2eauxslot.set_tag(std::forward(slottag)); } diff --git a/src/devices/bus/a2kbd/a2kbd.h b/src/devices/bus/a2kbd/a2kbd.h index 31f31632d15..a2a57420b26 100644 --- a/src/devices/bus/a2kbd/a2kbd.h +++ b/src/devices/bus/a2kbd/a2kbd.h @@ -33,10 +33,7 @@ public: a2kbd_connector_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : a2kbd_connector_device(mconfig, tag, owner, 0U) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } // standard options diff --git a/src/devices/bus/a7800/a78_slot.h b/src/devices/bus/a7800/a78_slot.h index c3f6c5c6833..bb8a846841a 100644 --- a/src/devices/bus/a7800/a78_slot.h +++ b/src/devices/bus/a7800/a78_slot.h @@ -92,10 +92,7 @@ public: a78_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&opts, char const *dflt) : a78_cart_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } a78_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~a78_cart_slot_device(); diff --git a/src/devices/bus/amiga/keyboard/keyboard.h b/src/devices/bus/amiga/keyboard/keyboard.h index 9eee49da5b2..febc979b3cf 100644 --- a/src/devices/bus/amiga/keyboard/keyboard.h +++ b/src/devices/bus/amiga/keyboard/keyboard.h @@ -35,10 +35,7 @@ public: amiga_keyboard_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : amiga_keyboard_bus_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } amiga_keyboard_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0U); virtual ~amiga_keyboard_bus_device(); diff --git a/src/devices/bus/amiga/zorro/zorro.h b/src/devices/bus/amiga/zorro/zorro.h index 2662a3e9356..a9de1e7d5d9 100644 --- a/src/devices/bus/amiga/zorro/zorro.h +++ b/src/devices/bus/amiga/zorro/zorro.h @@ -153,10 +153,7 @@ public: zorro2_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : zorro2_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } protected: diff --git a/src/devices/bus/applepp/applepp.h b/src/devices/bus/applepp/applepp.h index 8baf7a52ac6..cadabbe4967 100644 --- a/src/devices/bus/applepp/applepp.h +++ b/src/devices/bus/applepp/applepp.h @@ -20,10 +20,7 @@ public: applepp_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, bool fixed = false) : applepp_connector(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } applepp_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/astrocde/accessory.h b/src/devices/bus/astrocde/accessory.h index 00d4c55abd8..117d33abea8 100644 --- a/src/devices/bus/astrocde/accessory.h +++ b/src/devices/bus/astrocde/accessory.h @@ -30,10 +30,7 @@ public: : astrocade_accessory_port_device(mconfig, tag, owner, 0U) { m_screen.set_tag(std::forward(screen_tag)); - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } astrocade_accessory_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0U); virtual ~astrocade_accessory_port_device(); diff --git a/src/devices/bus/bbc/analogue/analogue.h b/src/devices/bus/bbc/analogue/analogue.h index 772a5028a1e..feef542f6e2 100644 --- a/src/devices/bus/bbc/analogue/analogue.h +++ b/src/devices/bus/bbc/analogue/analogue.h @@ -50,10 +50,7 @@ public: bbc_analogue_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : bbc_analogue_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bbc_analogue_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/bbc/analogue/quinkey.h b/src/devices/bus/bbc/analogue/quinkey.h index 44e1b0da34a..cc4c4f55fd1 100644 --- a/src/devices/bus/bbc/analogue/quinkey.h +++ b/src/devices/bus/bbc/analogue/quinkey.h @@ -54,10 +54,7 @@ public: bbc_quinkey_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : bbc_quinkey_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bbc_quinkey_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/bbc/cart/slot.h b/src/devices/bus/bbc/cart/slot.h index 69e5b5f69a5..f91ac40d9bf 100644 --- a/src/devices/bus/bbc/cart/slot.h +++ b/src/devices/bus/bbc/cart/slot.h @@ -126,10 +126,7 @@ public: bbc_cartslot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&slot_options, const char *default_option) : electron_cartslot_device(mconfig, tag, owner, clock) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bbc_cartslot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/bbc/fdc/fdc.h b/src/devices/bus/bbc/fdc/fdc.h index e8d20ebee94..1a28919771c 100644 --- a/src/devices/bus/bbc/fdc/fdc.h +++ b/src/devices/bus/bbc/fdc/fdc.h @@ -29,10 +29,7 @@ public: bbc_fdc_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&slot_options, const char *default_option) : bbc_fdc_slot_device(mconfig, tag, owner, clock) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); set_insert_rom(true); } diff --git a/src/devices/bus/bbc/joyport/joyport.h b/src/devices/bus/bbc/joyport/joyport.h index 0cd1e735d5d..106283ad9b4 100644 --- a/src/devices/bus/bbc/joyport/joyport.h +++ b/src/devices/bus/bbc/joyport/joyport.h @@ -49,10 +49,7 @@ public: bbc_joyport_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : bbc_joyport_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bbc_joyport_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/bbc/modem/modem.h b/src/devices/bus/bbc/modem/modem.h index 8d8ed91681f..f697596af30 100644 --- a/src/devices/bus/bbc/modem/modem.h +++ b/src/devices/bus/bbc/modem/modem.h @@ -53,10 +53,7 @@ public: bbc_modem_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&slot_options, const char *default_option) : bbc_modem_slot_device(mconfig, tag, owner, clock) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bbc_modem_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/bbc/tube/tube.h b/src/devices/bus/bbc/tube/tube.h index 49f5025df4b..d23fc94f025 100644 --- a/src/devices/bus/bbc/tube/tube.h +++ b/src/devices/bus/bbc/tube/tube.h @@ -53,10 +53,7 @@ public: bbc_tube_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, char const *default_option) : bbc_tube_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); set_insert_rom(true); } diff --git a/src/devices/bus/bbc/vsp/slot.h b/src/devices/bus/bbc/vsp/slot.h index a6707d5a901..e87dce9f895 100644 --- a/src/devices/bus/bbc/vsp/slot.h +++ b/src/devices/bus/bbc/vsp/slot.h @@ -29,10 +29,7 @@ public: bbc_vsp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : bbc_vsp_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bbc_vsp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/bk/parallel.h b/src/devices/bus/bk/parallel.h index 7546e9e43d7..4edf7af7e8e 100644 --- a/src/devices/bus/bk/parallel.h +++ b/src/devices/bus/bk/parallel.h @@ -63,10 +63,7 @@ public: bk_parallel_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&slot_options, const char *default_option) : bk_parallel_slot_device(mconfig, tag, owner, clock) { - option_reset(); - bk_parallel_devices(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } bk_parallel_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~bk_parallel_slot_device(); diff --git a/src/devices/bus/bml3/bml3bus.h b/src/devices/bus/bml3/bml3bus.h index cdafbb3d33f..6b85ce793a6 100644 --- a/src/devices/bus/bml3/bml3bus.h +++ b/src/devices/bus/bml3/bml3bus.h @@ -34,10 +34,7 @@ public: bml3bus_slot_device(machine_config const &mconfig, const char *tag, device_t *owner, T &&nbtag, U &&opts, const char *dflt) : bml3bus_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); set_bml3bus_slot(std::forward(nbtag), tag); } diff --git a/src/devices/bus/c64/exp.h b/src/devices/bus/c64/exp.h index a775b9529d6..cc27c306e5c 100644 --- a/src/devices/bus/c64/exp.h +++ b/src/devices/bus/c64/exp.h @@ -58,10 +58,7 @@ public: c64_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt) : c64_expansion_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } c64_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/cbmiec/cbmiec.h b/src/devices/bus/cbmiec/cbmiec.h index fafea819abb..f1c924ffc7a 100644 --- a/src/devices/bus/cbmiec/cbmiec.h +++ b/src/devices/bus/cbmiec/cbmiec.h @@ -126,10 +126,7 @@ public: cbm_iec_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, int address, T &&opts, char const *dflt) : cbm_iec_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); set_address(address); } cbm_iec_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/chanf/slot.h b/src/devices/bus/chanf/slot.h index 01235a7595b..0e2edaf4eb3 100644 --- a/src/devices/bus/chanf/slot.h +++ b/src/devices/bus/chanf/slot.h @@ -68,10 +68,7 @@ public: channelf_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : channelf_cart_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } channelf_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/coleco/cartridge/exp.h b/src/devices/bus/coleco/cartridge/exp.h index 2c396794a63..e420e34ccfb 100644 --- a/src/devices/bus/coleco/cartridge/exp.h +++ b/src/devices/bus/coleco/cartridge/exp.h @@ -57,10 +57,7 @@ public: colecovision_cartridge_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : colecovision_cartridge_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } colecovision_cartridge_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/coleco/controller/ctrl.h b/src/devices/bus/coleco/controller/ctrl.h index 6862f4d1380..0359d0eac3c 100644 --- a/src/devices/bus/coleco/controller/ctrl.h +++ b/src/devices/bus/coleco/controller/ctrl.h @@ -52,10 +52,7 @@ public: colecovision_control_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : colecovision_control_port_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } colecovision_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/coleco/expansion/expansion.h b/src/devices/bus/coleco/expansion/expansion.h index 0c38f42f514..71158c6cef1 100644 --- a/src/devices/bus/coleco/expansion/expansion.h +++ b/src/devices/bus/coleco/expansion/expansion.h @@ -65,10 +65,7 @@ public: coleco_expansion_device(machine_config const &mconfig, char const *tag, device_t *owner, const char *dflt) : coleco_expansion_device(mconfig, tag, owner, uint32_t(0)) { - option_reset(); - coleco_expansion_cards(*this); - set_default_option(dflt); - set_fixed(false); + set_options(coleco_expansion_cards, dflt, false); } coleco_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/cpc/cpcexp.h b/src/devices/bus/cpc/cpcexp.h index 7fed2af89e4..8b00dc5cb59 100644 --- a/src/devices/bus/cpc/cpcexp.h +++ b/src/devices/bus/cpc/cpcexp.h @@ -97,10 +97,7 @@ public: cpc_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt) : cpc_expansion_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } virtual ~cpc_expansion_slot_device(); diff --git a/src/devices/bus/dmv/dmvbus.h b/src/devices/bus/dmv/dmvbus.h index 593925f4e12..6cad99c49fc 100644 --- a/src/devices/bus/dmv/dmvbus.h +++ b/src/devices/bus/dmv/dmvbus.h @@ -30,10 +30,7 @@ public: dmvcart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : dmvcart_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } dmvcart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~dmvcart_slot_device(); diff --git a/src/devices/bus/electron/exp.h b/src/devices/bus/electron/exp.h index d36a9c75034..86205f5c7c4 100644 --- a/src/devices/bus/electron/exp.h +++ b/src/devices/bus/electron/exp.h @@ -106,10 +106,7 @@ public: electron_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt) : electron_expansion_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } electron_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/epson_qx/keyboard/keyboard.h b/src/devices/bus/epson_qx/keyboard/keyboard.h index f260cd4849d..86d82526ee9 100644 --- a/src/devices/bus/epson_qx/keyboard/keyboard.h +++ b/src/devices/bus/epson_qx/keyboard/keyboard.h @@ -31,10 +31,7 @@ public: keyboard_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : keyboard_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } keyboard_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0U); diff --git a/src/devices/bus/gameboy/mdslot.h b/src/devices/bus/gameboy/mdslot.h index d78ac6f906c..f1694c0f733 100644 --- a/src/devices/bus/gameboy/mdslot.h +++ b/src/devices/bus/gameboy/mdslot.h @@ -45,10 +45,7 @@ public: megaduck_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : megaduck_cart_slot_device(mconfig, tag, owner, 0U) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } megaduck_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); diff --git a/src/devices/bus/heathzenith/h89/h89bus.h b/src/devices/bus/heathzenith/h89/h89bus.h index 7eebad284e6..baf30fd74bb 100644 --- a/src/devices/bus/heathzenith/h89/h89bus.h +++ b/src/devices/bus/heathzenith/h89/h89bus.h @@ -204,9 +204,7 @@ public: h89bus_left_slot_device(const machine_config &mconfig, T &&tag, device_t *owner, const char *sltag, U &&opts, const char *dflt) : h89bus_left_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); + set_options(std::forward(opts), dflt, false); set_h89bus_slot(std::forward(sltag), tag); } @@ -232,7 +230,7 @@ protected: const char *m_h89bus_slottag; }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(H89BUS_LEFT_SLOT, h89bus_left_slot_device) class h89bus_right_slot_device : public device_t, public device_single_card_slot_interface @@ -243,9 +241,7 @@ public: h89bus_right_slot_device(const machine_config &mconfig, T &&tag, device_t *owner, const char *sltag, U &&opts, const char *dflt) : h89bus_right_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); + set_options(std::forward(opts), dflt, false); set_h89bus_slot(std::forward(sltag), tag); } @@ -277,7 +273,7 @@ protected: bool m_p506_signals; }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(H89BUS_RIGHT_SLOT, h89bus_right_slot_device) @@ -349,6 +345,7 @@ protected: required_region_ptr m_decode_prom; }; +// device type declaration DECLARE_DEVICE_TYPE(H89BUS_IO_DECODER_444_43, heath_io_decoder_444_43) DECLARE_DEVICE_TYPE(H89BUS_IO_DECODER_444_61, heath_io_decoder_444_61) DECLARE_DEVICE_TYPE(H89BUS_IO_DECODER_MMS_61C, heath_io_decoder_mms_61c) @@ -363,10 +360,7 @@ public: heath_io_decoder_socket(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, bool fixed = false) : heath_io_decoder_socket(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } heath_io_decoder_socket(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -379,6 +373,7 @@ protected: virtual void device_start() override ATTR_COLD; }; +// device type declaration DECLARE_DEVICE_TYPE(H89BUS_IO_DECODER_SOCKET, heath_io_decoder_socket) @@ -494,7 +489,7 @@ inline void device_h89bus_right_card_interface::set_slot_wait(int state) h89bus().set_wait_line(state); } -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(H89BUS, h89bus_device) #endif // MAME_BUS_HEATHZENITH_H89_H89BUS_H diff --git a/src/devices/bus/heathzenith/intr_cntrl/intr_cntrl.h b/src/devices/bus/heathzenith/intr_cntrl/intr_cntrl.h index 0eee01945a3..cfe5d4b2df3 100644 --- a/src/devices/bus/heathzenith/intr_cntrl/intr_cntrl.h +++ b/src/devices/bus/heathzenith/intr_cntrl/intr_cntrl.h @@ -131,10 +131,7 @@ public: heath_intr_socket(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, bool fixed = false) : heath_intr_socket(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } heath_intr_socket(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); diff --git a/src/devices/bus/hp_ipc_io/hp_ipc_io.h b/src/devices/bus/hp_ipc_io/hp_ipc_io.h index 079242c9554..d2f94b72230 100644 --- a/src/devices/bus/hp_ipc_io/hp_ipc_io.h +++ b/src/devices/bus/hp_ipc_io/hp_ipc_io.h @@ -25,10 +25,7 @@ public: hp_ipc_io_slot_device(machine_config const &mconfig, char const *tag, device_t *owner) : hp_ipc_io_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - hp_ipc_io_slot_devices(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(hp_ipc_io_slot_devices, nullptr, false); } hp_ipc_io_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/idpartner/bus.h b/src/devices/bus/idpartner/bus.h index fd27bf5472f..7a2272c2004 100644 --- a/src/devices/bus/idpartner/bus.h +++ b/src/devices/bus/idpartner/bus.h @@ -63,10 +63,7 @@ public: bus_connector_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&bus_tag, U &&opts, const char *dflt) : bus_connector_device(mconfig, tag, owner) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); m_bus.set_tag(std::forward(bus_tag)); } diff --git a/src/devices/bus/imi7000/imi7000.h b/src/devices/bus/imi7000/imi7000.h index 5a35f82708a..30dbc0050ba 100644 --- a/src/devices/bus/imi7000/imi7000.h +++ b/src/devices/bus/imi7000/imi7000.h @@ -54,10 +54,7 @@ public: imi7000_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : imi7000_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } imi7000_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/interpro/mouse/mouse.h b/src/devices/bus/interpro/mouse/mouse.h index 72d1bc816b7..9fc7082ba91 100644 --- a/src/devices/bus/interpro/mouse/mouse.h +++ b/src/devices/bus/interpro/mouse/mouse.h @@ -16,10 +16,7 @@ public: interpro_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : interpro_mouse_port_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } interpro_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); @@ -28,9 +25,9 @@ public: auto state_func() { return m_state_func.bind(); } protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; - virtual void device_config_complete() override; + virtual void device_config_complete() override ATTR_COLD; private: devcb_write32 m_state_func; @@ -73,7 +70,7 @@ public: DECLARE_INPUT_CHANGED_MEMBER(mouse_y); protected: - // device overrides + // device_t implementation virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; diff --git a/src/devices/bus/intv/slot.h b/src/devices/bus/intv/slot.h index 1cd770836d3..101edab554f 100644 --- a/src/devices/bus/intv/slot.h +++ b/src/devices/bus/intv/slot.h @@ -102,10 +102,7 @@ public: intv_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : intv_cart_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } intv_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/intv_ctrl/ctrl.h b/src/devices/bus/intv_ctrl/ctrl.h index 71106e7d9f5..f3c728e977c 100644 --- a/src/devices/bus/intv_ctrl/ctrl.h +++ b/src/devices/bus/intv_ctrl/ctrl.h @@ -44,10 +44,7 @@ public: intv_control_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : intv_control_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } intv_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/iq151/iq151.h b/src/devices/bus/iq151/iq151.h index 452165761a1..a027cec001d 100644 --- a/src/devices/bus/iq151/iq151.h +++ b/src/devices/bus/iq151/iq151.h @@ -91,10 +91,7 @@ public: iq151cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : iq151cart_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } iq151cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/isa/isa.h b/src/devices/bus/isa/isa.h index 225663a4da1..12660c93639 100644 --- a/src/devices/bus/isa/isa.h +++ b/src/devices/bus/isa/isa.h @@ -84,10 +84,7 @@ public: isa8_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&isa_tag, U &&opts, const char *dflt, bool fixed) : isa8_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); m_isa_bus.set_tag(std::forward(isa_tag)); } isa8_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -283,10 +280,7 @@ public: isa16_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&isa_tag, U &&opts, const char *dflt, bool fixed) : isa16_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); m_isa_bus.set_tag(std::forward(isa_tag)); } isa16_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/jakks_gamekey/slot.h b/src/devices/bus/jakks_gamekey/slot.h index 5dc328ce853..99e627d2eee 100644 --- a/src/devices/bus/jakks_gamekey/slot.h +++ b/src/devices/bus/jakks_gamekey/slot.h @@ -60,10 +60,7 @@ public: jakks_gamekey_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt) : jakks_gamekey_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } virtual ~jakks_gamekey_slot_device(); diff --git a/src/devices/bus/jvs/jvs.h b/src/devices/bus/jvs/jvs.h index 66b62c26ba9..011901e77a0 100644 --- a/src/devices/bus/jvs/jvs.h +++ b/src/devices/bus/jvs/jvs.h @@ -19,10 +19,7 @@ public: jvs_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : jvs_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } jvs_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/kc/kc.h b/src/devices/bus/kc/kc.h index 37cb6ee8f2a..60f6879665d 100644 --- a/src/devices/bus/kc/kc.h +++ b/src/devices/bus/kc/kc.h @@ -51,10 +51,7 @@ public: kcexp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : kcexp_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } kcexp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~kcexp_slot_device(); @@ -83,8 +80,8 @@ public: protected: kcexp_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); - // device-level overrides - virtual void device_validity_check(validity_checker &valid) const override; + // device_t implementation + virtual void device_validity_check(validity_checker &valid) const override ATTR_COLD; virtual void device_start() override ATTR_COLD; device_kcexp_interface* m_cart; @@ -102,10 +99,7 @@ public: kccart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : kccart_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } kccart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~kccart_slot_device(); diff --git a/src/devices/bus/lpci/pci.h b/src/devices/bus/lpci/pci.h index ab96eb3de74..8e971321ce8 100644 --- a/src/devices/bus/lpci/pci.h +++ b/src/devices/bus/lpci/pci.h @@ -47,10 +47,7 @@ public: pci_connector_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt, bool fixed) : pci_connector_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } pci_connector_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~pci_connector_device(); diff --git a/src/devices/bus/mm2/exp.h b/src/devices/bus/mm2/exp.h index 7a4f1284e99..64451ce2ed6 100644 --- a/src/devices/bus/mm2/exp.h +++ b/src/devices/bus/mm2/exp.h @@ -132,10 +132,7 @@ public: mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&bus_tag, U &&opts, const char *dflt, bool fixed) : mikromikko2_expansion_bus_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); m_bus.set_tag(std::forward(bus_tag)); } mikromikko2_expansion_bus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/mtx/exp.h b/src/devices/bus/mtx/exp.h index 0f180d16f4a..923dfa30bc0 100644 --- a/src/devices/bus/mtx/exp.h +++ b/src/devices/bus/mtx/exp.h @@ -32,10 +32,7 @@ public: mtx_exp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : mtx_exp_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } mtx_exp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/nes/aladdin.h b/src/devices/bus/nes/aladdin.h index b97be914218..bfbcdd84dd0 100644 --- a/src/devices/bus/nes/aladdin.h +++ b/src/devices/bus/nes/aladdin.h @@ -54,10 +54,7 @@ public: nes_aladdin_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts) : nes_aladdin_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(opts), nullptr, false); } nes_aladdin_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/nes/datach.h b/src/devices/bus/nes/datach.h index 8059d234564..91feea1dc4a 100644 --- a/src/devices/bus/nes/datach.h +++ b/src/devices/bus/nes/datach.h @@ -56,10 +56,7 @@ public: nes_datach_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&opts) : nes_datach_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(opts), nullptr, false); } nes_datach_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~nes_datach_slot_device(); diff --git a/src/devices/bus/nes/karastudio.h b/src/devices/bus/nes/karastudio.h index b76f8b7f035..81aa4ddf177 100644 --- a/src/devices/bus/nes/karastudio.h +++ b/src/devices/bus/nes/karastudio.h @@ -53,10 +53,7 @@ public: nes_kstudio_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts) : nes_kstudio_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(opts), nullptr, false); } nes_kstudio_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/nubus/nubus.h b/src/devices/bus/nubus/nubus.h index bd3bfaa4384..715a2c70563 100644 --- a/src/devices/bus/nubus/nubus.h +++ b/src/devices/bus/nubus/nubus.h @@ -73,9 +73,7 @@ public: nubus_slot_device(const machine_config &mconfig, T &&tag, device_t *owner, const char *nbtag, U &&opts, const char *dflt) : nubus_slot_device(mconfig, tag, owner, (u32)0) { - option_reset(); - opts(*this); - set_default_option(dflt); + set_options(std::forward(opts), dflt, false); set_nubus_slot(std::forward(nbtag), tag); } diff --git a/src/devices/bus/oricext/oricext.h b/src/devices/bus/oricext/oricext.h index e442cfdc4ac..8ee2fc4d041 100644 --- a/src/devices/bus/oricext/oricext.h +++ b/src/devices/bus/oricext/oricext.h @@ -24,10 +24,7 @@ public: oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : oricext_connector(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } oricext_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/pc1512/mouse.h b/src/devices/bus/pc1512/mouse.h index 64c6f9479b1..9d510673c6e 100644 --- a/src/devices/bus/pc1512/mouse.h +++ b/src/devices/bus/pc1512/mouse.h @@ -58,10 +58,7 @@ public: pc1512_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : pc1512_mouse_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pc1512_mouse_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/pc8801/pc8801_exp.h b/src/devices/bus/pc8801/pc8801_exp.h index b393fc8c40a..f3900a8a682 100644 --- a/src/devices/bus/pc8801/pc8801_exp.h +++ b/src/devices/bus/pc8801/pc8801_exp.h @@ -18,10 +18,7 @@ public: pc8801_exp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : pc8801_exp_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pc8801_exp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~pc8801_exp_slot_device(); diff --git a/src/devices/bus/pc98_cbus/slot.h b/src/devices/bus/pc98_cbus/slot.h index 61ad9523a31..5bb5fd6729a 100644 --- a/src/devices/bus/pc98_cbus/slot.h +++ b/src/devices/bus/pc98_cbus/slot.h @@ -157,10 +157,7 @@ public: pc98_cbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cbus_tag, U &&opts, const char *dflt, bool fixed = false) : pc98_cbus_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); m_bus.set_tag(std::forward(cbus_tag)); } pc98_cbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/pc_kbd/pc_kbdc.h b/src/devices/bus/pc_kbd/pc_kbdc.h index 78e683b1d5b..f0eb9ad76ab 100644 --- a/src/devices/bus/pc_kbd/pc_kbdc.h +++ b/src/devices/bus/pc_kbd/pc_kbdc.h @@ -31,10 +31,7 @@ public: pc_kbdc_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : pc_kbdc_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pc_kbdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -52,7 +49,7 @@ public: void data_write_from_kb(int state); protected: - // device-level overrides + // device_t implementation virtual void device_resolve_objects() override ATTR_COLD; virtual void device_start() override ATTR_COLD; @@ -74,7 +71,7 @@ protected: }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(PC_KBDC, pc_kbdc_device) @@ -88,15 +85,13 @@ public: void set_pc_kbdc_device(); - // - // Override the clock_write and data_write methods in a keyboard implementation - // - virtual void clock_write(int state); - virtual void data_write(int state); - // inline configuration void set_pc_kbdc(device_t *kbdc_device) { m_pc_kbdc = dynamic_cast(kbdc_device); } + // Override the clock_write and data_write methods in a keyboard implementation + virtual void clock_write(int state); + virtual void data_write(int state); + protected: device_pc_kbd_interface(const machine_config &mconfig, device_t &device); diff --git a/src/devices/bus/pce/pce_slot.h b/src/devices/bus/pce/pce_slot.h index cb022445335..371c1a5b5c4 100644 --- a/src/devices/bus/pce/pce_slot.h +++ b/src/devices/bus/pce/pce_slot.h @@ -70,10 +70,7 @@ public: pce_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt, const char *interface) : pce_cart_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); set_intf(interface); } @@ -111,7 +108,7 @@ protected: -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(PCE_CART_SLOT, pce_cart_slot_device) #endif // MAME_BUS_PCE_PCE_SLOT_H diff --git a/src/devices/bus/pce_ctrl/pcectrl.h b/src/devices/bus/pce_ctrl/pcectrl.h index ac3aa841fbb..5e0715eeea5 100644 --- a/src/devices/bus/pce_ctrl/pcectrl.h +++ b/src/devices/bus/pce_ctrl/pcectrl.h @@ -29,10 +29,7 @@ public: pce_control_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : pce_control_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pce_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); diff --git a/src/devices/bus/pci/pci_slot.h b/src/devices/bus/pci/pci_slot.h index 3d63159437c..34b34265f04 100644 --- a/src/devices/bus/pci/pci_slot.h +++ b/src/devices/bus/pci/pci_slot.h @@ -22,10 +22,7 @@ public: pci_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, u8 slot, u8 irqa, u8 irqb, u8 irqc, u8 irqd, const char *dflt) : pci_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); m_slot = slot; m_irq[0] = irqa; m_irq[1] = irqb; diff --git a/src/devices/bus/pencil2/slot.h b/src/devices/bus/pencil2/slot.h index 161437380e8..f26fdcf2804 100644 --- a/src/devices/bus/pencil2/slot.h +++ b/src/devices/bus/pencil2/slot.h @@ -26,10 +26,7 @@ public: pencil2_memexp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : pencil2_memexp_slot_device(mconfig, tag, owner) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pencil2_memexp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); diff --git a/src/devices/bus/pet/cass.h b/src/devices/bus/pet/cass.h index c0f53276733..8645c878cd7 100644 --- a/src/devices/bus/pet/cass.h +++ b/src/devices/bus/pet/cass.h @@ -46,10 +46,7 @@ public: pet_datassette_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : pet_datassette_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pet_datassette_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/pet/user.h b/src/devices/bus/pet/user.h index 99a2e76cf4f..250f03f5129 100644 --- a/src/devices/bus/pet/user.h +++ b/src/devices/bus/pet/user.h @@ -40,10 +40,7 @@ public: pet_user_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : pet_user_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } pet_user_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); @@ -88,7 +85,7 @@ public: void write_m(int state); protected: - // device-level overrides + // device_t implementation virtual void device_config_complete() override; virtual void device_start() override ATTR_COLD; diff --git a/src/devices/bus/pofo/exp.h b/src/devices/bus/pofo/exp.h index 9dd1dbe9ffa..39f9b95b274 100644 --- a/src/devices/bus/pofo/exp.h +++ b/src/devices/bus/pofo/exp.h @@ -92,10 +92,7 @@ public: portfolio_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&opts, char const *dflt) : portfolio_expansion_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } portfolio_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/psi_kbd/psi_kbd.h b/src/devices/bus/psi_kbd/psi_kbd.h index e2ba0f6f642..a428f7452a4 100644 --- a/src/devices/bus/psi_kbd/psi_kbd.h +++ b/src/devices/bus/psi_kbd/psi_kbd.h @@ -48,10 +48,7 @@ public: psi_keyboard_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, const char *dflt) : psi_keyboard_bus_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - psi_keyboard_devices(*this); - set_default_option(dflt); - set_fixed(false); + set_options(psi_keyboard_devices, dflt, false); } psi_keyboard_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~psi_keyboard_bus_device(); @@ -70,7 +67,7 @@ public: uint8_t key_data_r() { return m_key_data; } protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; @@ -99,7 +96,7 @@ protected: psi_keyboard_bus_device *m_host; }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(PSI_KEYBOARD_INTERFACE, psi_keyboard_bus_device) #endif // MAME_BUS_PSI_KBD_PSI_KBD_H diff --git a/src/devices/bus/psion/honda/slot.h b/src/devices/bus/psion/honda/slot.h index 5f7eeef0165..196de522abd 100644 --- a/src/devices/bus/psion/honda/slot.h +++ b/src/devices/bus/psion/honda/slot.h @@ -48,10 +48,7 @@ public: psion_honda_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : psion_honda_slot_device(mconfig, tag, owner) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } psion_honda_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/psx/ctlrport.h b/src/devices/bus/psx/ctlrport.h index 24e65ecedb0..486c68c7dad 100644 --- a/src/devices/bus/psx/ctlrport.h +++ b/src/devices/bus/psx/ctlrport.h @@ -114,10 +114,7 @@ public: psx_controller_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : psx_controller_port_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } psx_controller_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/rs232/rs232.h b/src/devices/bus/rs232/rs232.h index 56fb07e69ee..296a528ee8f 100644 --- a/src/devices/bus/rs232/rs232.h +++ b/src/devices/bus/rs232/rs232.h @@ -116,10 +116,7 @@ public: rs232_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : rs232_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } rs232_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~rs232_port_device(); diff --git a/src/devices/bus/saitek_osa/expansion.h b/src/devices/bus/saitek_osa/expansion.h index 3646e663bad..d7a25d39863 100644 --- a/src/devices/bus/saitek_osa/expansion.h +++ b/src/devices/bus/saitek_osa/expansion.h @@ -50,10 +50,7 @@ public: saitekosa_expansion_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts) : saitekosa_expansion_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(opts), nullptr, false); } saitekosa_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); diff --git a/src/devices/bus/samcoupe/expansion/expansion.h b/src/devices/bus/samcoupe/expansion/expansion.h index c052de71741..a38fe1c791e 100644 --- a/src/devices/bus/samcoupe/expansion/expansion.h +++ b/src/devices/bus/samcoupe/expansion/expansion.h @@ -63,10 +63,7 @@ public: samcoupe_expansion_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts) : samcoupe_expansion_device(mconfig, tag, owner, uint32_t(0)) { - option_reset(); - opts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(opts), nullptr, false); } samcoupe_expansion_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/samcoupe/mouse/mouseport.h b/src/devices/bus/samcoupe/mouse/mouseport.h index f7b188e5e56..bf56a527bf5 100644 --- a/src/devices/bus/samcoupe/mouse/mouseport.h +++ b/src/devices/bus/samcoupe/mouse/mouseport.h @@ -39,10 +39,7 @@ public: samcoupe_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts) : samcoupe_mouse_port_device(mconfig, tag, owner, uint32_t(0)) { - option_reset(); - opts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(std::forward(opts), nullptr, false); } samcoupe_mouse_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/saturn/sat_slot.h b/src/devices/bus/saturn/sat_slot.h index 261042a1ab1..4708c0f431a 100644 --- a/src/devices/bus/saturn/sat_slot.h +++ b/src/devices/bus/saturn/sat_slot.h @@ -71,10 +71,7 @@ public: sat_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : sat_cart_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sat_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~sat_cart_slot_device(); diff --git a/src/devices/bus/sega8/sega8_slot.h b/src/devices/bus/sega8/sega8_slot.h index 7f320b4fc42..7aa5251dad5 100644 --- a/src/devices/bus/sega8/sega8_slot.h +++ b/src/devices/bus/sega8/sega8_slot.h @@ -186,10 +186,7 @@ public: sg1000_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sg1000_cart_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sg1000_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sg1000_cart"; } @@ -206,10 +203,7 @@ public: omv_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : omv_cart_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } omv_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sg1000_cart"; } @@ -226,10 +220,7 @@ public: sc3000_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sc3000_cart_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sc3000_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sg1000_cart"; } @@ -246,10 +237,7 @@ public: sg1000mk3_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sg1000mk3_cart_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sg1000mk3_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sms_cart,sg1000_cart"; } @@ -266,10 +254,7 @@ public: sms_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sms_cart_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sms_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sms_cart"; } @@ -286,10 +271,7 @@ public: gamegear_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : gamegear_cart_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } gamegear_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "gamegear_cart"; } @@ -307,10 +289,7 @@ public: sms_card_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sms_card_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sms_card_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sms_card"; } @@ -327,10 +306,7 @@ public: sg1000_card_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sg1000_card_slot_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sg1000_card_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "sg1000_cart"; } diff --git a/src/devices/bus/segaai/segaai_exp.h b/src/devices/bus/segaai/segaai_exp.h index 2eef6014261..db6714999ef 100644 --- a/src/devices/bus/segaai/segaai_exp.h +++ b/src/devices/bus/segaai/segaai_exp.h @@ -19,10 +19,7 @@ public: segaai_exp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, T &&opts, const char *dflt) : segaai_exp_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } segaai_exp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); virtual ~segaai_exp_slot_device(); diff --git a/src/devices/bus/sg1000_exp/sg1000exp.h b/src/devices/bus/sg1000_exp/sg1000exp.h index 53c1c486338..6bab57564e1 100644 --- a/src/devices/bus/sg1000_exp/sg1000exp.h +++ b/src/devices/bus/sg1000_exp/sg1000exp.h @@ -31,10 +31,7 @@ public: sg1000_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt, bool const fixed) : sg1000_expansion_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } sg1000_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); @@ -46,7 +43,7 @@ public: bool is_writeable(uint8_t offset); protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; private: @@ -76,7 +73,7 @@ protected: }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(SG1000_EXPANSION_SLOT, sg1000_expansion_slot_device) diff --git a/src/devices/bus/sg1000_exp/sk1100prn.h b/src/devices/bus/sg1000_exp/sk1100prn.h index 9dfcfca5a6c..37c99682881 100644 --- a/src/devices/bus/sg1000_exp/sk1100prn.h +++ b/src/devices/bus/sg1000_exp/sk1100prn.h @@ -31,10 +31,7 @@ public: sk1100_printer_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : sk1100_printer_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sk1100_printer_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); diff --git a/src/devices/bus/sms_exp/smsexp.h b/src/devices/bus/sms_exp/smsexp.h index 88a1b4aa613..042a946ba34 100644 --- a/src/devices/bus/sms_exp/smsexp.h +++ b/src/devices/bus/sms_exp/smsexp.h @@ -52,10 +52,7 @@ public: sms_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : sms_expansion_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sms_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~sms_expansion_slot_device(); @@ -72,14 +69,14 @@ public: bool device_present() const { return bool(m_device); } protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; device_sms_expansion_slot_interface *m_device; }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(SMS_EXPANSION_SLOT, sms_expansion_slot_device) diff --git a/src/devices/bus/snes/snes_slot.h b/src/devices/bus/snes/snes_slot.h index 59f920fa900..f8fdc8ec0f3 100644 --- a/src/devices/bus/snes/snes_slot.h +++ b/src/devices/bus/snes/snes_slot.h @@ -256,10 +256,7 @@ public: sns_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt) : sns_cart_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sns_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "snes_cart"; } @@ -276,10 +273,7 @@ public: sns_sufami_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sns_sufami_cart_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sns_sufami_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "st_cart"; } @@ -296,10 +290,7 @@ public: sns_bsx_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : sns_bsx_cart_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sns_bsx_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual const char *image_interface() const noexcept override { return "bspack"; } @@ -307,7 +298,7 @@ public: }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(SNS_CART_SLOT, sns_cart_slot_device) DECLARE_DEVICE_TYPE(SNS_SUFAMI_CART_SLOT, sns_sufami_cart_slot_device) DECLARE_DEVICE_TYPE(SNS_BSX_CART_SLOT, sns_bsx_cart_slot_device) diff --git a/src/devices/bus/snes_ctrl/ctrl.h b/src/devices/bus/snes_ctrl/ctrl.h index 3b9ed59844d..9f427b67805 100644 --- a/src/devices/bus/snes_ctrl/ctrl.h +++ b/src/devices/bus/snes_ctrl/ctrl.h @@ -54,10 +54,7 @@ public: snes_control_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : snes_control_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } snes_control_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~snes_control_port_device(); diff --git a/src/devices/bus/ss50/interface.h b/src/devices/bus/ss50/interface.h index efffd46e7f0..df53cfc5a66 100644 --- a/src/devices/bus/ss50/interface.h +++ b/src/devices/bus/ss50/interface.h @@ -31,10 +31,7 @@ public: ss50_interface_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : ss50_interface_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } ss50_interface_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); @@ -55,7 +52,7 @@ public: void f600_1200_w(int state); protected: - // device-specific overrides + // device_t implementation virtual void device_resolve_objects() override ATTR_COLD; virtual void device_start() override ATTR_COLD; @@ -100,7 +97,7 @@ private: }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(SS50_INTERFACE, ss50_interface_port_device) void ss50_default_2rs_devices(device_slot_interface &device); diff --git a/src/devices/bus/sunmouse/sunmouse.h b/src/devices/bus/sunmouse/sunmouse.h index e36e94bd6fb..12f6cd98603 100644 --- a/src/devices/bus/sunmouse/sunmouse.h +++ b/src/devices/bus/sunmouse/sunmouse.h @@ -20,10 +20,7 @@ public: sun_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : sun_mouse_port_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } sun_mouse_port_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock = 0); virtual ~sun_mouse_port_device(); diff --git a/src/devices/bus/tanbus/keyboard/keyboard.h b/src/devices/bus/tanbus/keyboard/keyboard.h index cb4020f22b3..e9f8f7e6261 100644 --- a/src/devices/bus/tanbus/keyboard/keyboard.h +++ b/src/devices/bus/tanbus/keyboard/keyboard.h @@ -28,10 +28,7 @@ public: microtan_kbd_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&slot_options, const char *default_option) : microtan_kbd_slot_device(mconfig, tag, owner, 0) { - option_reset(); - slot_options(*this); - set_default_option(default_option); - set_fixed(false); + set_options(std::forward(slot_options), default_option, false); } microtan_kbd_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0); @@ -47,7 +44,7 @@ public: void reset_w(int state) { m_reset_handler(state); } protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; private: @@ -73,7 +70,7 @@ protected: }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(MICROTAN_KBD_SLOT, microtan_kbd_slot_device) void microtan_kbd_devices(device_slot_interface &device); diff --git a/src/devices/bus/tanbus/tanbus.h b/src/devices/bus/tanbus/tanbus.h index d8dfe06c95e..7783dc8e3ea 100644 --- a/src/devices/bus/tanbus/tanbus.h +++ b/src/devices/bus/tanbus/tanbus.h @@ -35,10 +35,7 @@ public: tanbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, int num, T &&opts, const char *dflt) : tanbus_slot_device(mconfig, tag, owner, DERIVED_CLOCK(1, 1)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); set_tanbus_slot(num); } tanbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/technics/kn5000/kn5000_extension.h b/src/devices/bus/technics/kn5000/kn5000_extension.h index d8befdd9961..823dd8a1fe3 100644 --- a/src/devices/bus/technics/kn5000/kn5000_extension.h +++ b/src/devices/bus/technics/kn5000/kn5000_extension.h @@ -17,10 +17,7 @@ public: kn5000_extension_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : kn5000_extension_connector(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } kn5000_extension_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/ti99/joyport/joyport.h b/src/devices/bus/ti99/joyport/joyport.h index 85d2f8acb53..bf431c94197 100644 --- a/src/devices/bus/ti99/joyport/joyport.h +++ b/src/devices/bus/ti99/joyport/joyport.h @@ -62,10 +62,7 @@ public: joyport_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, U &&opts, const char *dflt) : joyport_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } joyport_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/ti99/peb/peribox.h b/src/devices/bus/ti99/peb/peribox.h index 7d9c0b6f9e9..3f4c04a6ae7 100644 --- a/src/devices/bus/ti99/peb/peribox.h +++ b/src/devices/bus/ti99/peb/peribox.h @@ -231,10 +231,7 @@ public: peribox_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, int slot, U &&opts, const char *dflt) : peribox_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); m_slotnumber = slot; } diff --git a/src/devices/bus/tmc600/euro.h b/src/devices/bus/tmc600/euro.h index bf2e95ded78..648b9ab5048 100644 --- a/src/devices/bus/tmc600/euro.h +++ b/src/devices/bus/tmc600/euro.h @@ -79,10 +79,7 @@ public: tmc600_eurobus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : tmc600_eurobus_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } tmc600_eurobus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); diff --git a/src/devices/bus/tvc/tvc.h b/src/devices/bus/tvc/tvc.h index 840cb9ef717..0ca1ba8cfe9 100644 --- a/src/devices/bus/tvc/tvc.h +++ b/src/devices/bus/tvc/tvc.h @@ -94,10 +94,7 @@ public: tvcexp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : tvcexp_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } tvcexp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); @@ -116,7 +113,7 @@ public: void io_write(offs_t offset, uint8_t data); protected: - // device-level overrides + // device_t implementation virtual void device_start() override ATTR_COLD; devcb_write_line m_out_irq_cb; @@ -125,7 +122,7 @@ protected: device_tvcexp_interface* m_cart; }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(TVCEXP_SLOT, tvcexp_slot_device) diff --git a/src/devices/bus/vcs/vcs_slot.h b/src/devices/bus/vcs/vcs_slot.h index 333784e3637..ba153b42cde 100644 --- a/src/devices/bus/vcs/vcs_slot.h +++ b/src/devices/bus/vcs/vcs_slot.h @@ -21,10 +21,7 @@ public: vcs_cart_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : vcs_cart_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } vcs_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~vcs_cart_slot_device(); @@ -101,7 +98,7 @@ protected: }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(VCS_CART_SLOT, vcs_cart_slot_device) #endif // MAME_BUS_VCS_VCS_SLOT_H diff --git a/src/devices/bus/vic10/exp.h b/src/devices/bus/vic10/exp.h index fdfb96408d1..045c6724d1c 100644 --- a/src/devices/bus/vic10/exp.h +++ b/src/devices/bus/vic10/exp.h @@ -57,10 +57,7 @@ public: vic10_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&opts, char const *dflt) : vic10_expansion_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } vic10_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/vic20/exp.h b/src/devices/bus/vic20/exp.h index 02ae3e73dde..b27d44f0d08 100644 --- a/src/devices/bus/vic20/exp.h +++ b/src/devices/bus/vic20/exp.h @@ -57,10 +57,7 @@ public: vic20_expansion_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock, T &&opts, char const *dflt) : vic20_expansion_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } vic20_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/vtech/ioexp/ioexp.h b/src/devices/bus/vtech/ioexp/ioexp.h index 1df488770cd..c104c904c66 100644 --- a/src/devices/bus/vtech/ioexp/ioexp.h +++ b/src/devices/bus/vtech/ioexp/ioexp.h @@ -49,10 +49,7 @@ public: vtech_ioexp_slot_device(machine_config const &mconfig, char const *tag, device_t *owner) : vtech_ioexp_slot_device(mconfig, tag, owner, (uint32_t)0) { - option_reset(); - vtech_ioexp_slot_carts(*this); - set_default_option(nullptr); - set_fixed(false); + set_options(vtech_ioexp_slot_carts, nullptr, false); } vtech_ioexp_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); virtual ~vtech_ioexp_slot_device(); diff --git a/src/devices/bus/wswan/slot.h b/src/devices/bus/wswan/slot.h index 308fedf97a3..a344e371ab5 100644 --- a/src/devices/bus/wswan/slot.h +++ b/src/devices/bus/wswan/slot.h @@ -137,10 +137,7 @@ public: ws_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, T &&opts, const char *dflt) : ws_cart_slot_device(mconfig, tag, owner, clock) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } ws_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); virtual ~ws_cart_slot_device(); diff --git a/src/devices/bus/wysekbd/wysekbd.h b/src/devices/bus/wysekbd/wysekbd.h index f9372419a07..a1b4a107d3e 100644 --- a/src/devices/bus/wysekbd/wysekbd.h +++ b/src/devices/bus/wysekbd/wysekbd.h @@ -30,10 +30,7 @@ public: wyse_keyboard_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt) : wyse_keyboard_port_device(mconfig, tag, owner, 0U) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } // line handlers @@ -41,7 +38,7 @@ public: int data_r(); protected: - // device-level overrides + // device_t implementation virtual void device_config_complete() override; virtual void device_start() override ATTR_COLD; @@ -65,7 +62,7 @@ protected: virtual void wysekbd_write_cmd(bool state) = 0; }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(WYSE_KEYBOARD, wyse_keyboard_port_device) // standard options diff --git a/src/devices/imagedev/floppy.h b/src/devices/imagedev/floppy.h index b7d1a467565..ab199bcb058 100644 --- a/src/devices/imagedev/floppy.h +++ b/src/devices/imagedev/floppy.h @@ -445,10 +445,7 @@ public: floppy_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, U &&formats, bool fixed = false) : floppy_connector(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); set_formats(std::forward(formats)); } diff --git a/src/devices/machine/nscsi_bus.h b/src/devices/machine/nscsi_bus.h index 539b25b569b..9d5d5f27651 100644 --- a/src/devices/machine/nscsi_bus.h +++ b/src/devices/machine/nscsi_bus.h @@ -58,10 +58,7 @@ public: nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, bool fixed = false) : nscsi_connector(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); virtual ~nscsi_connector(); diff --git a/src/emu/debug/debugcmd.cpp b/src/emu/debug/debugcmd.cpp index f27684f08f9..6d79a264534 100644 --- a/src/emu/debug/debugcmd.cpp +++ b/src/emu/debug/debugcmd.cpp @@ -614,7 +614,7 @@ bool debugger_commands::mini_printf(std::ostream &stream, const std::vectortranslate(spacenum, device_memory_interface::TR_READ, taddress = address, tspace); address++) + for (offs_t address = offs_t(number), taddress; mintf->translate(spacenum, device_memory_interface::TR_READ, taddress = address, tspace); address++) { u8 const data = tspace->read_byte(taddress); @@ -4591,57 +4591,51 @@ void debugger_commands::execute_memdump(const std::vector &par using namespace std::literals; std::string filename = params.empty() ? "memdump.log"s : std::string(params[0]); - FILE *const file = fopen(filename.c_str(), "w"); - if (!file) + std::ofstream file(filename); + if (!file.good()) { m_console.printf("Error opening file %s\n", filename); return; } + file.imbue(std::locale::classic()); m_console.printf("Dumping memory maps to %s\n", filename); - try + memory_interface_enumerator iter(*root); + std::vector entries[2]; + for (device_memory_interface &memory : iter) { - memory_interface_enumerator iter(*root); - std::vector entries[2]; - for (device_memory_interface &memory : iter) + for (int space = 0; space != memory.max_space_count(); space++) { - for (int space = 0; space != memory.max_space_count(); space++) - if (memory.has_space(space)) - { - address_space &sp = memory.space(space); - bool octal = sp.is_octal(); - int nc = octal ? (sp.addr_width() + 2) / 3 : (sp.addr_width() + 3) / 4; + if (memory.has_space(space)) + { + address_space &sp = memory.space(space); + bool octal = sp.is_octal(); + int nc = octal ? (sp.addr_width() + 2) / 3 : (sp.addr_width() + 3) / 4; - sp.dump_maps(entries[0], entries[1]); - for (int mode = 0; mode < 2; mode ++) + sp.dump_maps(entries[0], entries[1]); + for (int mode = 0; mode < 2; mode ++) + { + util::stream_format(file, " %s '%s' space %s %s:\n", memory.device().type().fullname(), memory.device().tag(), sp.name(), mode ? "write" : "read"); + for (memory_entry &entry : entries[mode]) { - fprintf(file, " %s '%s' space %s %s:\n", memory.device().type().fullname(), memory.device().tag(), sp.name(), mode ? "write" : "read"); - for (memory_entry &entry : entries[mode]) - { - if (octal) - fprintf(file, "%0*o - %0*o:", nc, entry.start, nc, entry.end); + if (octal) + util::stream_format(file, "%0*o - %0*o:", nc, entry.start, nc, entry.end); + else + util::stream_format(file, "%0*x - %0*x:", nc, entry.start, nc, entry.end); + for (const auto &c : entry.context) + if (c.disabled) + util::stream_format(file, " %s[off]", c.view->name()); else - fprintf(file, "%0*x - %0*x:", nc, entry.start, nc, entry.end); - for (const auto &c : entry.context) - if (c.disabled) - fprintf(file, " %s[off]", c.view->name().c_str()); - else - fprintf(file, " %s[%d]", c.view->name().c_str(), c.slot); - fprintf(file, " %s\n", entry.entry->name().c_str()); - } - fprintf(file, "\n"); + util::stream_format(file, " %s[%d]", c.view->name(), c.slot); + util::stream_format(file, " %s\n", entry.entry->name()); } - entries[0].clear(); - entries[1].clear(); + util::stream_format(file, "\n"); } + entries[0].clear(); + entries[1].clear(); + } } - fclose(file); - } - catch (...) - { - fclose(file); - throw; } } diff --git a/src/emu/dislot.cpp b/src/emu/dislot.cpp index 43d2ed96cdd..23e5992b7a1 100644 --- a/src/emu/dislot.cpp +++ b/src/emu/dislot.cpp @@ -14,7 +14,36 @@ #include "zippath.h" -device_slot_interface::device_slot_interface(const machine_config &mconfig, device_t &device) : + +//************************************************************************** +// device_slot_interface::slot_option +//************************************************************************** + +device_slot_interface::slot_option::slot_option(std::string_view name, device_type devtype, bool selectable) : + m_name(name), + m_devtype(devtype), + m_selectable(selectable), + m_default_bios(nullptr), + m_machine_config(nullptr), + m_input_device_defaults(nullptr), + m_clock(0) +{ +} + +device_slot_interface::slot_option &device_slot_interface::slot_option::clock(XTAL clock) +{ + clock.validate(util::string_format("Configuring slot option %s", m_name)); + m_clock = clock.value(); + return *this; +} + + + +//************************************************************************** +// device_slot_interface +//************************************************************************** + +device_slot_interface::device_slot_interface(machine_config const &mconfig, device_t &device) : device_interface(device, "slot"), m_default_clock(DERIVED_CLOCK(1, 1)), m_default_option(nullptr), @@ -28,92 +57,62 @@ device_slot_interface::~device_slot_interface() } -device_slot_interface::slot_option::slot_option(const char *name, device_type devtype, bool selectable) : - m_name(name), - m_devtype(devtype), - m_selectable(selectable), - m_default_bios(nullptr), - m_machine_config(nullptr), - m_input_device_defaults(nullptr), - m_clock(0) -{ -} - - void device_slot_interface::interface_validity_check(validity_checker &valid) const { + // TODO: cast m_default_option to std::string_view when we have C++20 if (m_default_option && (m_options.find(m_default_option) == m_options.end())) osd_printf_error("Default option '%s' does not correspond to any configured option\n", m_default_option); } -device_slot_interface::slot_option &device_slot_interface::option_add(const char *name, device_type devtype) +device_slot_interface::slot_option &device_slot_interface::do_add_option(std::string_view name, device_type devtype, bool selectable) { - if (!name || !*name) + if (name.empty()) throw emu_fatalerror("slot '%s' attempt to add option without name\n", device().tag()); - const slot_option *const existing = option(name); + slot_option const *const existing = option(name); if (existing) throw emu_fatalerror("slot '%s' duplicate option '%s'\n", device().tag(), name); - return m_options.emplace(name, std::make_unique(name, devtype, true)).first->second->clock(m_default_clock); + auto const ins = m_options.emplace(name, slot_option_ptr()); + assert(ins.second); + ins.first->second = std::make_unique(ins.first->first, devtype, selectable); + return ins.first->second->clock(m_default_clock); } -device_slot_interface::slot_option &device_slot_interface::option_add_internal(const char *name, device_type devtype) +device_slot_interface::slot_option &device_slot_interface::do_replace_option(std::string_view name, device_type devtype, bool selectable) { - if (!name || !*name) - throw emu_fatalerror("slot '%s' attempt to add option without name\n", device().tag()); - - const slot_option *const existing = option(name); - if (existing) - throw emu_fatalerror("slot '%s' duplicate option '%s'\n", device().tag(), name); - - return m_options.emplace(name, std::make_unique(name, devtype, false)).first->second->clock(m_default_clock); -} - - -device_slot_interface::slot_option &device_slot_interface::option_replace(const char *name, device_type devtype) -{ - if (!name || !*name) + if (name.empty()) throw emu_fatalerror("slot '%s' attempt to replace option without name\n", device().tag()); - auto search = m_options.find(name); - if (search == m_options.end()) + // TODO: get rid of temporary std::string when we have C++20 + auto const found = m_options.find(std::string(name)); + if (found == m_options.end()) throw emu_fatalerror("slot '%s' attempt to replace nonexistent option '%s'\n", device().tag(), name); - return (search->second = std::make_unique(name, devtype, true))->clock(m_default_clock); + found->second = std::make_unique(found->first, devtype, selectable); + return found->second->clock(m_default_clock); } -device_slot_interface::slot_option &device_slot_interface::option_replace_internal(const char *name, device_type devtype) +void device_slot_interface::option_remove(std::string_view name) { - if (!name || !*name) - throw emu_fatalerror("slot '%s' attempt to replace option without name\n", device().tag()); - - auto search = m_options.find(name); - if (search == m_options.end()) - throw emu_fatalerror("slot '%s' attempt to replace nonexistent option '%s'\n", device().tag(), name); - - return (search->second = std::make_unique(name, devtype, false))->clock(m_default_clock); -} - - -void device_slot_interface::option_remove(const char *name) -{ - if (!name || !*name) + if (name.empty()) throw emu_fatalerror("slot '%s' attempt to remove option without name\n", device().tag()); - if (m_options.erase(name) == 0) + // TODO: get rid of temporary std::string when we have C++20 + if (m_options.erase(std::string(name)) == 0) throw emu_fatalerror("slot '%s' attempt to remove nonexistent option '%s'\n", device().tag(), name); } -device_slot_interface::slot_option *device_slot_interface::config_option(const char *name) +device_slot_interface::slot_option &device_slot_interface::config_option(std::string_view name) { - auto const search = m_options.find(name); - if (search != m_options.end()) - return search->second.get(); + // TODO: get rid of temporary std::string when we have C++20 + auto const found = m_options.find(std::string(name)); + if (found != m_options.end()) + return *found->second; throw emu_fatalerror("slot '%s' has no option '%s'\n", device().tag(), name); } @@ -124,26 +123,32 @@ bool device_slot_interface::has_selectable_options() const if (!fixed()) { for (auto &option : option_list()) + { if (option.second->selectable()) return true; + } } return false; } -const device_slot_interface::slot_option *device_slot_interface::option(const char *name) const +device_slot_interface::slot_option const *device_slot_interface::option(std::string_view name) const { - if (name) - { - auto const search = m_options.find(name); - if (search != m_options.end()) - return search->second.get(); - } + // TODO: get rid of temporary std::string when we have C++20 + auto const found = m_options.find(std::string(name)); + if (found != m_options.end()) + return found->second.get(); + return nullptr; } -get_default_card_software_hook::get_default_card_software_hook(const std::string &path, std::function &&get_hashfile_extrainfo) + +//************************************************************************** +// get_default_card_software_hook +//************************************************************************** + +get_default_card_software_hook::get_default_card_software_hook(std::string const &path, get_hashfile_extrainfo_func &&get_hashfile_extrainfo) : m_get_hashfile_extrainfo(std::move(get_hashfile_extrainfo)) , m_called_get_hashfile_extrainfo(false) , m_has_hash_extrainfo(false) diff --git a/src/emu/dislot.h b/src/emu/dislot.h index f6e1f86fcb3..75308b42ce0 100644 --- a/src/emu/dislot.h +++ b/src/emu/dislot.h @@ -9,6 +9,13 @@ #ifndef MAME_EMU_DISLOT_H #define MAME_EMU_DISLOT_H +#include +#include +#include +#include +#include + + //************************************************************************** // TYPE DEFINITIONS //************************************************************************** @@ -17,7 +24,9 @@ class get_default_card_software_hook { // goofy "hook" to pass to device_slot_interface::get_default_card_software public: - get_default_card_software_hook(const std::string &path, std::function &&get_hashfile_extrainfo); + using get_hashfile_extrainfo_func = std::function; + + get_default_card_software_hook(std::string const &path, get_hashfile_extrainfo_func &&get_hashfile_extrainfo); // accesses the image file to be scrutinized by get_default_card_software(); is // nullptr in the case of images loaded by software list @@ -30,12 +39,12 @@ public: bool hashfile_extrainfo(std::string &extrainfo); private: - util::core_file::ptr m_image_file; - std::string m_file_type; - std::function m_get_hashfile_extrainfo; - bool m_called_get_hashfile_extrainfo; - bool m_has_hash_extrainfo; - std::string m_hash_extrainfo; + util::core_file::ptr m_image_file; + std::string m_file_type; + get_hashfile_extrainfo_func m_get_hashfile_extrainfo; + bool m_called_get_hashfile_extrainfo; + bool m_has_hash_extrainfo; + std::string m_hash_extrainfo; }; @@ -46,9 +55,9 @@ public: class slot_option { public: - slot_option(char const *name, device_type devtype, bool selectable); + slot_option(std::string_view name, device_type devtype, bool selectable); - char const *name() const { return m_name; } + std::string_view name() const { return m_name; } device_type devtype() const { return m_devtype; } bool selectable() const { return m_selectable; } char const *default_bios() const { return m_default_bios; } @@ -60,11 +69,11 @@ public: template slot_option &machine_config(Object &&cb) { m_machine_config = std::forward(cb); return *this; } slot_option &input_device_defaults(input_device_default const *dev_inp_def) { m_input_device_defaults = dev_inp_def; return *this; } slot_option &clock(u32 clock) { m_clock = clock; return *this; } - slot_option &clock(XTAL clock) { clock.validate(std::string("Configuring slot option ") + m_name); m_clock = clock.value(); return *this; } + slot_option &clock(XTAL clock); private: // internal state - char const *const m_name; + std::string_view const m_name; device_type const m_devtype; bool const m_selectable; char const *m_default_bios; @@ -73,6 +82,9 @@ public: u32 m_clock; }; + using slot_option_ptr = std::unique_ptr; + using slot_option_map = std::unordered_map; + virtual ~device_slot_interface(); /// \brief Set whether slot is fixed @@ -97,7 +109,7 @@ public: /// valid for the lifetime of the device (or until another default /// option is configured). /// \sa default_option - device_slot_interface &set_default_option(const char *option) { m_default_option = option; return *this; } + device_slot_interface &set_default_option(char const *option) { m_default_option = option; return *this; } /// \brief Clear options /// @@ -116,7 +128,7 @@ public: /// description is used in the user interface. /// \return A reference to the added option for additional /// configuration. - slot_option &option_add(char const *option, device_type devtype); + slot_option &option_add(std::string_view option, device_type devtype) { return do_add_option(option, devtype, true); } /// \brief Add an internal option /// @@ -130,15 +142,42 @@ public: /// description is used in the user interface. /// \return A reference to the added option for additional /// configuration. - slot_option &option_add_internal(const char *option, device_type devtype); + slot_option &option_add_internal(std::string_view option, device_type devtype) { return do_add_option(option, devtype, false); } - slot_option &option_replace(const char *option, device_type devtype); - slot_option &option_replace_internal(const char *option, device_type devtype); - void option_remove(const char *option); + slot_option &option_replace(std::string_view option, device_type devtype) { return do_replace_option(option, devtype, true); } + slot_option &option_replace_internal(std::string_view option, device_type devtype) { return do_replace_option(option, devtype, false); } + void option_remove(std::string_view option); - void set_option_default_bios(const char *option, const char *default_bios) { config_option(option)->default_bios(default_bios); } - template void set_option_machine_config(const char *option, T &&machine_config) { config_option(option)->machine_config(std::forward(machine_config)); } - void set_option_device_input_defaults(const char *option, const input_device_default *default_input) { config_option(option)->input_device_defaults(default_input); } + /// \brief Set options + /// + /// Removes all previously added options, calls a functoid to add + /// options, sets the default option, and sets whether the slot can + /// only be configured programmatically. + /// \param [in] options The functoid to call to add options, with a + /// reference to the slot interface passed as the only argument. + /// Should call #option_add or #option_add_internal to add + /// options. + /// \param [in] default_option The name of the default option. This + /// must be correspond to an option added using #option_add or + /// #option_add_internal, or be nullptr to not load any card + /// device by default. The string is not copied and must remain + /// valid for the lifetime of the device (or until another default + /// option is configured). + /// \param [in] fixed True to mark the slot as fixed, or false to + /// mark it user-configurable. + /// \sa option_add option_add_internal set_default_option set_fixed + template + void set_options(Object &&options, char const *default_option, bool fixed) + { + option_reset(); + std::forward(options)(*this); + set_default_option(default_option); + set_fixed(fixed); + } + + void set_option_default_bios(std::string_view option, char const *default_bios) { config_option(option).default_bios(default_bios); } + template void set_option_machine_config(std::string_view option, T &&machine_config) { config_option(option).machine_config(std::forward(machine_config)); } + void set_option_device_input_defaults(std::string_view option, input_device_default const *default_input) { config_option(option).input_device_defaults(default_input); } /// \brief Returns whether the slot is fixed /// @@ -159,14 +198,14 @@ public: /// otherwise. bool has_selectable_options() const; - const char *default_option() const { return m_default_option; } - const std::unordered_map> &option_list() const { return m_options; } - const slot_option *option(const char *name) const; + char const *default_option() const { return m_default_option; } + slot_option_map const &option_list() const { return m_options; } + slot_option const *option(std::string_view name) const; virtual std::string get_default_card_software(get_default_card_software_hook &hook) const { return std::string(); } device_t *get_card_device() const { return m_card_device; } void set_card_device(device_t *dev) { m_card_device = dev; } - const char *slot_name() const { return device().tag() + 1; } - slot_option &option_set(const char *tag, device_type devtype) { m_default_option = tag; m_fixed = true; return option_add_internal(tag, devtype); } + std::string_view slot_name() const { return device().tag() + 1; } + slot_option &option_set(char const *tag, device_type devtype) { m_default_option = tag; m_fixed = true; return option_add_internal(tag, devtype); } protected: device_slot_interface(machine_config const &mconfig, device_t &device); @@ -175,13 +214,15 @@ protected: private: // internal state - std::unordered_map> m_options; + slot_option_map m_options; u32 m_default_clock; char const *m_default_option; bool m_fixed; device_t *m_card_device; - slot_option *config_option(char const *option); + slot_option &do_add_option(std::string_view option, device_type devtype, bool selectable); + slot_option &do_replace_option(std::string_view option, device_type devtype, bool selectable); + slot_option &config_option(std::string_view option); }; diff --git a/src/emu/emuopts.cpp b/src/emu/emuopts.cpp index fa75c885c6d..8f9177e6d4b 100644 --- a/src/emu/emuopts.cpp +++ b/src/emu/emuopts.cpp @@ -291,8 +291,8 @@ namespace class slot_option_entry : public core_options::entry { public: - slot_option_entry(const char *name, slot_option &host) - : entry(name) + slot_option_entry(std::string &&name, slot_option &host) + : entry(std::move(name)) , m_host(host) { } @@ -566,7 +566,7 @@ bool emu_options::add_and_remove_slot_options() for (const device_slot_interface &slot : slot_interface_enumerator(config.root_device())) { // come up with the canonical name of the slot - const char *slot_option_name = slot.slot_name(); + const std::string_view slot_option_name = slot.slot_name(); // erase this option from existing (so we don't purge it later) existing.remove(slot_option_name); @@ -588,7 +588,7 @@ bool emu_options::add_and_remove_slot_options() add_header(header); // create a new entry in the options - auto new_entry = new_option.setup_option_entry(slot_option_name); + auto new_entry = new_option.setup_option_entry(std::string(slot_option_name)); // and add it add_entry(std::move(new_entry), header); @@ -1025,16 +1025,18 @@ emu_options::software_options emu_options::evaluate_initial_softlist_options(con // find_slot_option //------------------------------------------------- -const slot_option *emu_options::find_slot_option(const std::string &device_name) const +const slot_option *emu_options::find_slot_option(std::string_view device_name) const { - auto iter = m_slot_options.find(device_name); - return iter != m_slot_options.end() ? &iter->second : nullptr; + // TODO: get rid of temporary std::string when we have C++20 + auto const iter = m_slot_options.find(std::string(device_name)); + return (iter != m_slot_options.end()) ? &iter->second : nullptr; } -slot_option *emu_options::find_slot_option(const std::string &device_name) +slot_option *emu_options::find_slot_option(std::string_view device_name) { - auto iter = m_slot_options.find(device_name); - return iter != m_slot_options.end() ? &iter->second : nullptr; + // TODO: get rid of temporary std::string when we have C++20 + auto const iter = m_slot_options.find(std::string(device_name)); + return (iter != m_slot_options.end()) ? &iter->second : nullptr; } @@ -1043,16 +1045,16 @@ slot_option *emu_options::find_slot_option(const std::string &device_name) // slot_option //------------------------------------------------- -const slot_option &emu_options::slot_option(const std::string &device_name) const +const slot_option &emu_options::slot_option(std::string_view device_name) const { - const ::slot_option *opt = find_slot_option(device_name); + ::slot_option const *const opt = find_slot_option(device_name); assert(opt && "Attempt to access non-existent slot option"); return *opt; } -slot_option &emu_options::slot_option(const std::string &device_name) +slot_option &emu_options::slot_option(std::string_view device_name) { - ::slot_option *opt = find_slot_option(device_name); + ::slot_option *const opt = find_slot_option(device_name); assert(opt && "Attempt to access non-existent slot option"); return *opt; } @@ -1062,16 +1064,18 @@ slot_option &emu_options::slot_option(const std::string &device_name) // image_option //------------------------------------------------- -const image_option &emu_options::image_option(const std::string &device_name) const +const image_option &emu_options::image_option(std::string_view device_name) const { - auto iter = m_image_options.find(device_name); + // TODO: get rid of temporary std::string when we have C++20 + auto const iter = m_image_options.find(std::string(device_name)); assert(iter != m_image_options.end() && "Attempt to access non-existent image option"); return *iter->second; } -image_option &emu_options::image_option(const std::string &device_name) +image_option &emu_options::image_option(std::string_view device_name) { - auto iter = m_image_options.find(device_name); + // TODO: get rid of temporary std::string when we have C++20 + auto const iter = m_image_options.find(std::string(device_name)); assert(iter != m_image_options.end() && "Attempt to access non-existent image option"); return *iter->second; } @@ -1266,13 +1270,13 @@ void slot_option::set_bios(std::string &&text) // slot_option::setup_option_entry //------------------------------------------------- -core_options::entry::shared_ptr slot_option::setup_option_entry(const char *name) +core_options::entry::shared_ptr slot_option::setup_option_entry(std::string &&name) { // this should only be called once assert(m_entry.expired()); // create the entry and return it - core_options::entry::shared_ptr entry = std::make_shared(name, *this); + auto entry = std::make_shared(std::move(name), *this); m_entry = entry; return entry; } diff --git a/src/emu/emuopts.h b/src/emu/emuopts.h index 2d72580a759..10fdbb771d6 100644 --- a/src/emu/emuopts.h +++ b/src/emu/emuopts.h @@ -228,7 +228,7 @@ public: void set_default_card_software(std::string &&s); // instantiates an option entry (don't call outside of emuopts.cpp) - core_options::entry::shared_ptr setup_option_entry(const char *name); + core_options::entry::shared_ptr setup_option_entry(std::string &&name); private: void possibly_changed(const std::string &old_value); @@ -483,16 +483,15 @@ public: short http_port() const { return int_value(OPTION_HTTP_PORT); } const char *http_root() const { return value(OPTION_HTTP_ROOT); } - // slots and devices - the values for these are stored outside of the core_options - // structure - const ::slot_option &slot_option(const std::string &device_name) const; - ::slot_option &slot_option(const std::string &device_name); - const ::slot_option *find_slot_option(const std::string &device_name) const; - ::slot_option *find_slot_option(const std::string &device_name); - bool has_slot_option(const std::string &device_name) const { return find_slot_option(device_name) ? true : false; } - const ::image_option &image_option(const std::string &device_name) const; - ::image_option &image_option(const std::string &device_name); - bool has_image_option(const std::string &device_name) const { return m_image_options.find(device_name) != m_image_options.end(); } + // slots and devices - the values for these are stored outside of the core_options structure + const ::slot_option &slot_option(std::string_view device_name) const; + ::slot_option &slot_option(std::string_view device_name); + const ::slot_option *find_slot_option(std::string_view device_name) const; + ::slot_option *find_slot_option(std::string_view device_name); + bool has_slot_option(std::string_view device_name) const { return bool(find_slot_option(std::string(device_name))); } // TODO: get rid of temporary std::string when we have C++20 + const ::image_option &image_option(std::string_view device_name) const; + ::image_option &image_option(std::string_view device_name); + bool has_image_option(std::string_view device_name) const { return m_image_options.find(std::string(device_name)) != m_image_options.end(); } // TODO: get rid of temporary std::string when we have C++20 protected: virtual void command_argument_processed() override; diff --git a/src/emu/inpttype.h b/src/emu/inpttype.h index e2ed418ca72..e21b9dfd2fc 100644 --- a/src/emu/inpttype.h +++ b/src/emu/inpttype.h @@ -170,7 +170,6 @@ enum ioport_type : osd::u32 IPT_GAMBLE_KEYIN, // attendant IPT_GAMBLE_KEYOUT, // attendant - IPT_GAMBLE_SERVICE, // attendant IPT_GAMBLE_BOOK, // attendant IPT_GAMBLE_PAYOUT, // player diff --git a/src/emu/inpttype.ipp b/src/emu/inpttype.ipp index 35c859a9da0..460e6465a07 100644 --- a/src/emu/inpttype.ipp +++ b/src/emu/inpttype.ipp @@ -102,7 +102,6 @@ namespace { CORE_INPUT_TYPES_BEGIN(gamble) \ INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_KEYIN, N_p("input-name", "Key In"), input_seq(KEYCODE_Q) ) \ INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_KEYOUT, N_p("input-name", "Key Out"), input_seq(KEYCODE_W) ) \ - INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_SERVICE, N_p("input-name", "Service"), input_seq(KEYCODE_9) ) \ INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_BOOK, N_p("input-name", "Bookkeeping"), input_seq(KEYCODE_0) ) \ INPUT_PORT_DIGITAL_TYPE( 1, OTHER, GAMBLE_PAYOUT, N_p("input-name", "Payout"), input_seq(KEYCODE_4) ) \ INPUT_PORT_DIGITAL_TYPE( 1, PLAYER1, GAMBLE_BET, N_p("input-name", "Bet"), input_seq(KEYCODE_M) ) \ diff --git a/src/emu/mconfig.cpp b/src/emu/mconfig.cpp index ba88b6c289d..06a3f787072 100644 --- a/src/emu/mconfig.cpp +++ b/src/emu/mconfig.cpp @@ -83,7 +83,7 @@ machine_config::machine_config(const game_driver &gamedrv, emu_options &options) { // create the device token const tok(begin_configuration(owner)); - device_t *const new_dev = device_add(option->name(), option->devtype(), option->clock()); + device_t *const new_dev = device_add(std::string(option->name()).c_str(), option->devtype(), option->clock()); // TODO: support string_view tags slot.set_card_device(new_dev); char const *const default_bios = option->default_bios(); diff --git a/src/emu/validity.cpp b/src/emu/validity.cpp index c2e9ac23443..595413a71e1 100644 --- a/src/emu/validity.cpp +++ b/src/emu/validity.cpp @@ -2730,7 +2730,7 @@ void validity_checker::validate_devices(machine_config &config) device_t *card; { machine_config::token const tok(config.begin_configuration(slot->device())); - card = config.device_add(option.second->name(), option.second->devtype(), option.second->clock()); + card = config.device_add(std::string(option.second->name()).c_str(), option.second->devtype(), option.second->clock()); // TODO: support string_view tags const char *const def_bios = option.second->default_bios(); if (def_bios) @@ -2745,14 +2745,14 @@ void validity_checker::validate_devices(machine_config &config) for (device_slot_interface &subslot : slot_interface_enumerator(*card)) { - if (subslot.fixed()) + if (subslot.fixed() && subslot.default_option()) { // TODO: make this self-contained so it can apply itself - device_slot_interface::slot_option const *suboption = subslot.option(subslot.default_option()); + device_slot_interface::slot_option const *const suboption = subslot.option(subslot.default_option()); if (suboption) { machine_config::token const tok(config.begin_configuration(subslot.device())); - device_t *const sub_card = config.device_add(suboption->name(), suboption->devtype(), suboption->clock()); + device_t *const sub_card = config.device_add(std::string(suboption->name()).c_str(), suboption->devtype(), suboption->clock()); // TODO: support string_view tags const char *const sub_bios = suboption->default_bios(); if (sub_bios) sub_card->set_default_bios_tag(sub_bios); @@ -2778,7 +2778,7 @@ void validity_checker::validate_devices(machine_config &config) } machine_config::token const tok(config.begin_configuration(slot->device())); - config.device_remove(option.second->name()); + config.device_remove(std::string(option.second->name()).c_str()); // TODO: support string_view tags m_checking_card = false; } } diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp index bbed8cd4a8d..e76d6d6d4da 100644 --- a/src/emu/xtal.cpp +++ b/src/emu/xtal.cpp @@ -50,6 +50,8 @@ #include #include +#include +#include // This array *must* stay in order, it's binary-searched @@ -597,25 +599,21 @@ bool XTAL::validate(double base_clock) return false; } -void XTAL::validate(const char *message) const +void XTAL::validate(std::string_view message) const { if(!validate(m_base_clock)) fail(m_base_clock, message); } -void XTAL::validate(const std::string &message) const +void XTAL::fail(double base_clock, std::string_view message) { - if(!validate(m_base_clock)) - fail(m_base_clock, message); -} - -void XTAL::fail(double base_clock, const std::string &message) -{ - std::string full_message = util::string_format("Unknown crystal value %.0f. ", base_clock); + std::ostringstream full_message; + full_message.imbue(std::locale::classic()); + util::stream_format(full_message, "Unknown crystal value %.0f. ", base_clock); if(xtal_error_low && xtal_error_high) - full_message += util::string_format(" Did you mean %.0f or %.0f?", xtal_error_low, xtal_error_high); + util::stream_format(full_message, " Did you mean %.0f or %.0f?", xtal_error_low, xtal_error_high); else - full_message += util::string_format(" Did you mean %.0f?", xtal_error_low ? xtal_error_low : xtal_error_high); - full_message += util::string_format(" Context: %s\n", message); - fatalerror("%s\n", full_message); + util::stream_format(full_message, " Did you mean %.0f?", xtal_error_low ? xtal_error_low : xtal_error_high); + util::stream_format(full_message, " Context: %s\n", message); + fatalerror("%s", std::move(full_message).str()); } diff --git a/src/emu/xtal.h b/src/emu/xtal.h index 356ca6eb308..69cfbe90433 100644 --- a/src/emu/xtal.h +++ b/src/emu/xtal.h @@ -39,9 +39,12 @@ Usage: #ifndef MAME_EMU_XTAL_H #define MAME_EMU_XTAL_H +#pragma once + #include "emucore.h" -#pragma once +#include + class XTAL { @@ -59,8 +62,7 @@ public: friend constexpr XTAL operator *(unsigned int mult, const XTAL &xtal); friend constexpr XTAL operator *(double mult, const XTAL &xtal); - void validate(const char *message) const; - void validate(const std::string &message) const; + void validate(std::string_view message) const; private: double m_base_clock, m_current_clock; @@ -69,7 +71,7 @@ private: static const double known_xtals[]; static double last_correct_value, xtal_error_low, xtal_error_high; - static void fail(double base_clock, const std::string &message); + static void fail(double base_clock, std::string_view message); static bool validate(double base_clock); static void check_ordering(); }; diff --git a/src/frontend/mame/clifront.cpp b/src/frontend/mame/clifront.cpp index da9900ff680..9db3ef61eca 100644 --- a/src/frontend/mame/clifront.cpp +++ b/src/frontend/mame/clifront.cpp @@ -662,7 +662,7 @@ void cli_frontend::listbios(const std::vector &args) if (firstsystem) firstsystem = false; else - printf("\n"); + osd_printf_info("\n"); // print system BIOS options if there are any bool firstbios = true; @@ -670,13 +670,13 @@ void cli_frontend::listbios(const std::vector &args) { if (firstbios) { - printf("BIOS options for system %s (%s):\n", root.name(), root.shortname()); + osd_printf_info("BIOS options for system %s (%s):\n", root.name(), root.shortname()); firstbios = false; } - printf(" %-16s %s\n", bios.get_name(), bios.get_description()); + osd_printf_info(" %-16s %s\n", bios.get_name(), bios.get_description()); } if (firstbios) - printf("No BIOS options for system %s (%s)\n", root.name(), root.shortname()); + osd_printf_info("No BIOS options for system %s (%s)\n", root.name(), root.shortname()); // iterate over slots for (const device_slot_interface &slot : slot_interface_enumerator(root)) @@ -692,10 +692,10 @@ void cli_frontend::listbios(const std::vector &args) { if (firstcard) { - printf("\n BIOS options for device %s (-%s %s):\n", card->name(), slot.device().tag() + 1, card->basetag()); + osd_printf_info("\n BIOS options for device %s (-%s %s):\n", card->name(), slot.device().tag() + 1, card->basetag()); firstcard = false; } - printf(" %-16s %s\n", bios.get_name(), bios.get_description()); + osd_printf_info(" %-16s %s\n", bios.get_name(), bios.get_description()); } } } @@ -762,9 +762,9 @@ void cli_frontend::listdevices(const std::vector &args) { // print a header if (!first) - printf("\n"); + osd_printf_info("\n"); first = false; - printf("Driver %s (%s):\n", drivlist.driver().name, drivlist.driver().type.fullname()); + osd_printf_info("Driver %s (%s):\n", drivlist.driver().name, drivlist.driver().type.fullname()); // build a list of devices std::vector device_list; @@ -808,20 +808,20 @@ void cli_frontend::listdevices(const std::vector &args) depth++; } } - printf(" %*s%-*s %s", depth * 2, "", 30 - depth * 2, tag, device->name()); + osd_printf_info(" %*s%-*s %s", depth * 2, "", 30 - depth * 2, tag, device->name()); // add more information uint32_t clock = device->clock(); if (clock >= 1000000000) - printf(" @ %d.%02d GHz\n", clock / 1000000000, (clock / 10000000) % 100); + osd_printf_info(" @ %d.%02d GHz\n", clock / 1000000000, (clock / 10000000) % 100); else if (clock >= 1000000) - printf(" @ %d.%02d MHz\n", clock / 1000000, (clock / 10000) % 100); + osd_printf_info(" @ %d.%02d MHz\n", clock / 1000000, (clock / 10000) % 100); else if (clock >= 1000) - printf(" @ %d.%02d kHz\n", clock / 1000, (clock / 10) % 100); + osd_printf_info(" @ %d.%02d kHz\n", clock / 1000, (clock / 10) % 100); else if (clock > 0) - printf(" @ %d Hz\n", clock); + osd_printf_info(" @ %d Hz\n", clock); else - printf("\n"); + osd_printf_info("\n"); } } } @@ -842,8 +842,8 @@ void cli_frontend::listslots(const std::vector &args) throw emu_fatalerror(EMU_ERR_NO_SUCH_SYSTEM, "No matching systems found for '%s'", gamename); // print header - printf("%-16s %-16s %-16s %s\n", "SYSTEM", "SLOT NAME", "SLOT OPTIONS", "SLOT DEVICE NAME"); - printf("%s %s %s %s\n", std::string(16,'-').c_str(), std::string(16,'-').c_str(), std::string(16,'-').c_str(), std::string(28,'-').c_str()); + osd_printf_info("%-16s %-16s %-16s %s\n", "SYSTEM", "SLOT NAME", "SLOT OPTIONS", "SLOT DEVICE NAME"); + osd_printf_info("%s %s %s %s\n", std::string(16,'-'), std::string(16,'-'), std::string(16,'-'), std::string(28,'-')); // iterate over drivers while (drivlist.next()) @@ -867,12 +867,12 @@ void cli_frontend::listslots(const std::vector &args) option_list.end(), [] (device_slot_interface::slot_option const *opt1, device_slot_interface::slot_option const *opt2) { - return strcmp(opt1->name(), opt2->name()) < 0; + return opt1->name() < opt2->name(); }); // output the line, up to the list of extensions - printf("%-16s %-16s ", first ? drivlist.driver().name : "", slot.device().tag()+1); + osd_printf_info("%-16s %-16s ", first ? drivlist.driver().name : "", slot.device().tag()+1); bool first_option = true; @@ -880,22 +880,22 @@ void cli_frontend::listslots(const std::vector &args) for (device_slot_interface::slot_option const *opt : option_list) { if (first_option) - printf("%-16s %s\n", opt->name(), opt->devtype().fullname()); + osd_printf_info("%-16s %s\n", opt->name(), opt->devtype().fullname()); else - printf("%-34s%-16s %s\n", "", opt->name(), opt->devtype().fullname()); + osd_printf_info("%-34s%-16s %s\n", "", opt->name(), opt->devtype().fullname()); first_option = false; } if (first_option) - printf("%-16s %s\n", "[none]","No options available"); + osd_printf_info("%-16s %s\n", "[none]","No options available"); // end the line - printf("\n"); + osd_printf_info("\n"); first = false; } // if we didn't get any at all, just print a none line if (first) - printf("%-16s (none)\n", drivlist.driver().name); + osd_printf_info("%-16s (none)\n", drivlist.driver().name); } } @@ -915,8 +915,8 @@ void cli_frontend::listmedia(const std::vector &args) throw emu_fatalerror(EMU_ERR_NO_SUCH_SYSTEM, "No matching systems found for '%s'", gamename); // print header - printf("%-16s %-16s %-10s %s\n", "SYSTEM", "MEDIA NAME", "(brief)", "IMAGE FILE EXTENSIONS SUPPORTED"); - printf("%s %s-%s %s\n", std::string(16,'-').c_str(), std::string(16,'-').c_str(), std::string(10,'-').c_str(), std::string(31,'-').c_str()); + osd_printf_info("%-16s %-16s %-10s %s\n", "SYSTEM", "MEDIA NAME", "(brief)", "IMAGE FILE EXTENSIONS SUPPORTED"); + osd_printf_info("%s %s-%s %s\n", std::string(16,'-'), std::string(16,'-'), std::string(10,'-'), std::string(31,'-')); // iterate over drivers while (drivlist.next()) @@ -932,26 +932,26 @@ void cli_frontend::listmedia(const std::vector &args) std::string paren_shortname = string_format("(%s)", imagedev.brief_instance_name()); // output the line, up to the list of extensions - printf("%-16s %-16s %-10s ", drivlist.driver().name, imagedev.instance_name().c_str(), paren_shortname.c_str()); + osd_printf_info("%-16s %-16s %-10s ", drivlist.driver().name, imagedev.instance_name(), paren_shortname); // get the extensions and print them std::string extensions(imagedev.file_extensions()); for (int start = 0, end = extensions.find_first_of(',');; start = end + 1, end = extensions.find_first_of(',', start)) { std::string curext(extensions, start, (end == -1) ? extensions.length() - start : end - start); - printf(".%-5s", curext.c_str()); + osd_printf_info(".%-5s", curext); if (end == -1) break; } // end the line - printf("\n"); + osd_printf_info("\n"); first = false; } // if we didn't get any at all, just print a none line if (first) - printf("%-16s (none)\n", drivlist.driver().name); + osd_printf_info("%-16s (none)\n", drivlist.driver().name); } } diff --git a/src/frontend/mame/infoxml.cpp b/src/frontend/mame/infoxml.cpp index fec2eebbf47..9da194d36de 100644 --- a/src/frontend/mame/infoxml.cpp +++ b/src/frontend/mame/infoxml.cpp @@ -2173,7 +2173,7 @@ void output_slots(std::ostream &out, machine_config &config, device_t &device, c { util::stream_format(out, "\t\t\tname())); util::stream_format(out, " devname=\"%s\"", normalize_string(dev->shortname())); - if (slot.default_option() && !strcmp(slot.default_option(), option.second->name())) + if (slot.default_option() && (slot.default_option() == option.second->name())) out << " default=\"yes\""; out << "/>\n"; } diff --git a/src/frontend/mame/luaengine.cpp b/src/frontend/mame/luaengine.cpp index d0c01053c55..3e3e848ecc2 100644 --- a/src/frontend/mame/luaengine.cpp +++ b/src/frontend/mame/luaengine.cpp @@ -2146,7 +2146,7 @@ void lua_engine::initialize() slot_type["fixed"] = sol::property(&device_slot_interface::fixed); slot_type["has_selectable_options"] = sol::property(&device_slot_interface::has_selectable_options); slot_type["default_option"] = sol::property(&device_slot_interface::default_option); - slot_type["options"] = sol::property([] (device_slot_interface const &slot) { return standard_tag_object_ptr_map(slot.option_list()); }); + slot_type["options"] = sol::property([] (device_slot_interface const &slot) { return make_tag_object_ptr_map(slot.option_list()); }); slot_type["device"] = sol::property(static_cast(&device_slot_interface::device)); diff --git a/src/frontend/mame/luaengine.h b/src/frontend/mame/luaengine.h index ac166974e50..c3acd5501fb 100644 --- a/src/frontend/mame/luaengine.h +++ b/src/frontend/mame/luaengine.h @@ -40,7 +40,6 @@ public: template struct devenum; template struct simple_list_wrapper; template struct tag_object_ptr_map; - template using standard_tag_object_ptr_map = tag_object_ptr_map > >; template struct immutable_container_helper; template struct immutable_collection_helper; template struct immutable_sequence_helper; @@ -181,6 +180,8 @@ private: std::vector m_update_tasks; std::vector m_frame_tasks; + template + static auto make_tag_object_ptr_map(T &map); template auto make_notifier_adder(util::notifier ¬ifier, const char *desc); template diff --git a/src/frontend/mame/luaengine.ipp b/src/frontend/mame/luaengine.ipp index e08f267538e..53c4ba1a105 100644 --- a/src/frontend/mame/luaengine.ipp +++ b/src/frontend/mame/luaengine.ipp @@ -574,6 +574,18 @@ private: }; +//------------------------------------------------- +// make_tag_object_ptr_map - make a wrapper for a +// tag to object pointer map +//------------------------------------------------- + +template +auto lua_engine::make_tag_object_ptr_map(T &map) +{ + return tag_object_ptr_map >(map); +} + + //------------------------------------------------- // make_notifier_adder - make a function for // subscribing to a notifier diff --git a/src/frontend/mame/luaengine_debug.cpp b/src/frontend/mame/luaengine_debug.cpp index 992a9cc791a..994f61adbfb 100644 --- a/src/frontend/mame/luaengine_debug.cpp +++ b/src/frontend/mame/luaengine_debug.cpp @@ -339,7 +339,7 @@ void lua_engine::initialize_debug(sol::table &emu) }); symbol_table_type.set_function("read_memory", &symbol_table_wrapper::read_memory); symbol_table_type.set_function("write_memory", &symbol_table_wrapper::write_memory); - symbol_table_type["entries"] = sol::property([] (symbol_table_wrapper const &st) { return standard_tag_object_ptr_map(st.table().entries()); }); + symbol_table_type["entries"] = sol::property([] (symbol_table_wrapper const &st) { return make_tag_object_ptr_map(st.table().entries()); }); symbol_table_type["parent"] = sol::property(&symbol_table_wrapper::parent); diff --git a/src/frontend/mame/luaengine_input.cpp b/src/frontend/mame/luaengine_input.cpp index 82d8ad1c2cc..93d0cfff2d7 100644 --- a/src/frontend/mame/luaengine_input.cpp +++ b/src/frontend/mame/luaengine_input.cpp @@ -199,7 +199,7 @@ void lua_engine::initialize_input(sol::table &emu) &ioport_manager::input_type_to_token, [] (ioport_manager &im, ioport_type type) { return im.input_type_to_token(type, 0); }); ioport_manager_type["types"] = sol::property(&ioport_manager::types); - ioport_manager_type["ports"] = sol::property([] (ioport_manager &im) { return tag_object_ptr_map(im.ports()); }); + ioport_manager_type["ports"] = sol::property([] (ioport_manager &im) { return make_tag_object_ptr_map(im.ports()); }); auto natkeyboard_type = sol().registry().new_usertype("natkeyboard", sol::no_constructor); diff --git a/src/frontend/mame/luaengine_mem.cpp b/src/frontend/mame/luaengine_mem.cpp index ff2f406828b..deff4843ba7 100644 --- a/src/frontend/mame/luaengine_mem.cpp +++ b/src/frontend/mame/luaengine_mem.cpp @@ -725,9 +725,9 @@ void lua_engine::initialize_memory(sol::table &emu) auto memory_type = sol().registry().new_usertype("memory", sol::no_constructor); - memory_type["banks"] = sol::property([] (memory_manager &mm) { return standard_tag_object_ptr_map(mm.banks()); }); - memory_type["regions"] = sol::property([] (memory_manager &mm) { return standard_tag_object_ptr_map(mm.regions()); }); - memory_type["shares"] = sol::property([] (memory_manager &mm) { return standard_tag_object_ptr_map(mm.shares()); }); + memory_type["banks"] = sol::property([] (memory_manager &mm) { return make_tag_object_ptr_map(mm.banks()); }); + memory_type["regions"] = sol::property([] (memory_manager &mm) { return make_tag_object_ptr_map(mm.regions()); }); + memory_type["shares"] = sol::property([] (memory_manager &mm) { return make_tag_object_ptr_map(mm.shares()); }); auto bank_type = sol().registry().new_usertype("membank", sol::no_constructor); diff --git a/src/frontend/mame/ui/devopt.cpp b/src/frontend/mame/ui/devopt.cpp index 0abba28c592..9ff99ad3bf6 100644 --- a/src/frontend/mame/ui/devopt.cpp +++ b/src/frontend/mame/ui/devopt.cpp @@ -54,10 +54,12 @@ void menu_device_config::populate_text(std::optional &layout, float machine_config &mconfig(const_cast(machine().config())); machine_config::token const tok(mconfig.begin_configuration(mconfig.root_device())); - device_t *const dev = mconfig.device_add(m_option->name(), m_option->devtype(), 0); + device_t *const dev = mconfig.device_add(std::string(m_option->name()).c_str(), m_option->devtype(), 0); // TODO: support string_view tags for (device_t &d : device_enumerator(*dev)) + { if (!d.configured()) d.config_complete(); + } // get decimal separator std::string point; @@ -393,7 +395,7 @@ void menu_device_config::populate_text(std::optional &layout, float + input + input_mj + input_hana + input_gamble + input_analog + input_adjust + input_keypad + input_keyboard) == 0) layout->add_text(_("[None]\n"), color); - mconfig.device_remove(m_option->name()); + mconfig.device_remove(std::string(m_option->name()).c_str()); // TODO: support string_view tags lines = layout->lines(); } width = layout->actual_width(); diff --git a/src/frontend/mame/ui/slotopt.cpp b/src/frontend/mame/ui/slotopt.cpp index 10fbeed03c6..8cd38a2e6f9 100644 --- a/src/frontend/mame/ui/slotopt.cpp +++ b/src/frontend/mame/ui/slotopt.cpp @@ -68,7 +68,7 @@ device_slot_interface::slot_option const *menu_slot_devices::get_current_option( if (!slot.fixed()) { - char const *const slot_option_name = slot.slot_name(); + auto const slot_option_name = slot.slot_name(); current = machine().options().slot_option(slot_option_name).value(); } else @@ -78,7 +78,7 @@ device_slot_interface::slot_option const *menu_slot_devices::get_current_option( current.assign(slot.default_option()); } - return slot.option(current.c_str()); + return slot.option(current); } @@ -99,7 +99,7 @@ void menu_slot_devices::set_slot_device(device_slot_interface &slot, std::string opt.specify(val); // erase this from our recorded options list - this is the slot we're trying to change! - m_slot_options.erase(slot.slot_name()); + m_slot_options.erase(std::string(slot.slot_name())); // TODO: get rid of temporary std::string when we have C++20 // refresh any options that we might have annotated earlier while (try_refresh_current_options()) @@ -126,7 +126,7 @@ void menu_slot_devices::record_current_options() const slot_option &opt(machine().options().slot_option(slot.slot_name())); // and record the value in our local cache - m_slot_options[slot.slot_name()] = opt.specified_value(); + m_slot_options[std::string(slot.slot_name())] = opt.specified_value(); // TODO: get rid of temporary std::string if possible when we have C++20 } } } @@ -198,7 +198,7 @@ void menu_slot_devices::populate() ? FLAG_LEFT_ARROW | FLAG_RIGHT_ARROW : FLAG_DISABLE; - item_append(slot.slot_name(), opt_name, item_flags, (void *)&slot); + item_append(std::string(slot.slot_name()), std::move(opt_name), item_flags, (void *)&slot); } item_append(menu_item_type::SEPARATOR); item_append(_("Reset System"), 0, ITEMREF_RESET); @@ -293,11 +293,11 @@ void menu_slot_devices::rotate_slot_device(device_slot_interface &slot, menu_slo std::sort(m_current_option_list.begin(), m_current_option_list.end()); // find the current position - char const *const target = current ? current->name() : ""; + std::string_view const target = current ? current->name() : std::string_view(); m_current_option_list_iter = std::find_if( m_current_option_list.begin(), m_current_option_list.end(), - [target] (const std::string &opt_value) + [target] (std::string const &opt_value) { return opt_value == target; }); diff --git a/src/mame/aristocrat/aristmk4.cpp b/src/mame/aristocrat/aristmk4.cpp index efec04c9f2d..aa5b2c3d66c 100644 --- a/src/mame/aristocrat/aristmk4.cpp +++ b/src/mame/aristocrat/aristmk4.cpp @@ -1268,7 +1268,7 @@ static INPUT_PORTS_START(aristmk4) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("5 Credits Per Line") PORT_CODE(KEYCODE_T) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("10 Credits Per Line") PORT_CODE(KEYCODE_Y) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Reserve") PORT_CODE(KEYCODE_A) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Reserve") PORT_CODE(KEYCODE_A) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_NAME("Gamble") PORT_CODE(KEYCODE_U) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_NAME("Take Win") PORT_CODE(KEYCODE_J) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_NAME("0-7 UNUSED") @@ -1527,7 +1527,7 @@ static INPUT_PORTS_START(eforestu) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("Play 7 Lines") PORT_CODE(KEYCODE_T) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("Play 9 Lines / Black") PORT_CODE(KEYCODE_Y) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Cashout") PORT_CODE(KEYCODE_Q) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_CODE(KEYCODE_A) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_CODE(KEYCODE_A) PORT_MODIFY("500e") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Play 1 Line / Red") PORT_CODE(KEYCODE_W) @@ -1661,7 +1661,7 @@ static INPUT_PORTS_START(topgear) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_NAME("0-1 UNUSED") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_NAME("0-2 UNUSED") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Change") PORT_CODE(KEYCODE_A) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Change") PORT_CODE(KEYCODE_A) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_NAME("0-5 UNUSED") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_NAME("0-6 UNUSED") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_NAME("0-7 UNUSED") @@ -1693,7 +1693,7 @@ static INPUT_PORTS_START(gunnrose) PORT_MODIFY("500e") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_NAME("Half Gamble") PORT_CODE(KEYCODE_E) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Reserve") PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Reserve") PORT_CODE(KEYCODE_Q) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_NAME("Full Gamble") PORT_CODE(KEYCODE_W) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Bet 1 / Hold 1") PORT_CODE(KEYCODE_S) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Bet 5 / Hold 5") PORT_CODE(KEYCODE_H) @@ -1706,7 +1706,7 @@ static INPUT_PORTS_START(wildone) PORT_INCLUDE(aristmk4) PORT_MODIFY("500d") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_CODE(KEYCODE_D) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_CODE(KEYCODE_D) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_CODE(KEYCODE_H) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Bet 2 / Hold 2") PORT_CODE(KEYCODE_E) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Bet 3 / Hold 3") PORT_CODE(KEYCODE_R) @@ -1737,7 +1737,7 @@ static INPUT_PORTS_START(gldnpkr) PORT_MODIFY("500e") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_CODE(KEYCODE_W) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Change") PORT_CODE(KEYCODE_A) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Change") PORT_CODE(KEYCODE_A) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 / Red") PORT_CODE(KEYCODE_S) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5 / Black") PORT_CODE(KEYCODE_H) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_CODE(KEYCODE_G) diff --git a/src/mame/capcom/cps1bl_5205.cpp b/src/mame/capcom/cps1bl_5205.cpp index 4a16c8031c4..ef9d55f0141 100644 --- a/src/mame/capcom/cps1bl_5205.cpp +++ b/src/mame/capcom/cps1bl_5205.cpp @@ -227,7 +227,7 @@ void cps1bl_5205_state::knightsb_layer_w(offs_t offset, uint16_t data) data = 0x1380; break; default: - printf ("Unknown control word = %X\n",data); + logerror("Unknown control word = %X\n", data); data = 0x12c0; } m_cps_b_regs[m_layer_enable_reg / 2] = data; @@ -271,7 +271,7 @@ void cps1bl_5205_state::sf2b_layer_w(offs_t offset, uint16_t data) m_cps_b_regs[m_layer_enable_reg / 2] = data; break; default: - printf("%X:%X ",offset,data); + logerror("%X:%X ", offset,data); } } diff --git a/src/mame/dynax/ddenlovr.cpp b/src/mame/dynax/ddenlovr.cpp index ee0468e5981..8a7f7278948 100644 --- a/src/mame/dynax/ddenlovr.cpp +++ b/src/mame/dynax/ddenlovr.cpp @@ -258,11 +258,6 @@ void mahjong_medal_panel(device_slot_interface &device) device.option_add("mj", MAHJONG_MEDAL_PANEL); } -void hanafuda_medal_panel(device_slot_interface &device) -{ - device.option_add("hf", HANAFUDA_MEDAL_PANEL); -} - void medal_panels(device_slot_interface &device) { device.option_add("mj", MAHJONG_MEDAL_PANEL); @@ -4745,8 +4740,8 @@ void htengoku_state::htengoku(machine_config &config) m_mainlatch->q_out_cb<2>().set(FUNC(htengoku_state::layer_half2_w)); // m_mainlatch->q_out_cb<5>().set(FUNC(htengoku_state::blitter_ack_w)); // Blitter IRQ Ack - MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], hanafuda_medal_panel, "hf", true); - MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], hanafuda_medal_panel, "hf", false); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[0], medal_panels, "hf", false); + MAHJONG_PANEL_CONNECTOR(config, m_key_matrix[1], medal_panels, "hf", false); HOPPER(config, m_hopper, attotime::from_msec(50)); @@ -6634,56 +6629,44 @@ static INPUT_PORTS_START( jongtei ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN) PORT_START("DSW1") - PORT_DIPNAME( 0x0f, 0x07, "Pay Out Rate (%)" ) - PORT_DIPSETTING( 0x00, "50" ) - PORT_DIPSETTING( 0x01, "53" ) - PORT_DIPSETTING( 0x02, "56" ) - PORT_DIPSETTING( 0x03, "59" ) - PORT_DIPSETTING( 0x04, "62" ) - PORT_DIPSETTING( 0x05, "65" ) - PORT_DIPSETTING( 0x06, "68" ) - PORT_DIPSETTING( 0x07, "71" ) - PORT_DIPSETTING( 0x08, "75" ) - PORT_DIPSETTING( 0x09, "78" ) - PORT_DIPSETTING( 0x0a, "81" ) - PORT_DIPSETTING( 0x0b, "84" ) - PORT_DIPSETTING( 0x0c, "87" ) - PORT_DIPSETTING( 0x0d, "90" ) - PORT_DIPSETTING( 0x0e, "93" ) - PORT_DIPSETTING( 0x0f, "96" ) - PORT_DIPNAME( 0x30, 0x30, "Odds Rate" ) - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) - PORT_DIPNAME( 0xc0, 0xc0, "Max Rate" ) + MAHJONG_PAYOUT_RATE(0, "DIP1:1,2,3,4") + MAHJONG_ODDS_RATE_NS(4, "DIP1:5,6") + PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP1:7,8") PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) PORT_DIPSETTING( 0x40, "10" ) PORT_DIPSETTING( 0x00, "20" ) PORT_START("DSW2") - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_10C ) ) - PORT_DIPNAME( 0x0c, 0x0c, "Min Rate To Play" ) + MAHJONG_COINAGE(0, "DIP2:1,2") + PORT_DIPNAME( 0x0c, 0x0c, "Minimum Bet" ) PORT_DIPLOCATION("DIP2:3,4") PORT_DIPSETTING( 0x0c, "1" ) PORT_DIPSETTING( 0x08, "2" ) PORT_DIPSETTING( 0x04, "3" ) PORT_DIPSETTING( 0x00, "5" ) - PORT_DIPNAME( 0x30, 0x30, "Payout" ) - PORT_DIPSETTING( 0x30, "300" ) - PORT_DIPSETTING( 0x20, "500" ) - PORT_DIPSETTING( 0x10, "700" ) - PORT_DIPSETTING( 0x00, "1000" ) - PORT_DIPNAME( 0x40, 0x40, "W-BET" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "Last Chance" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x30, 0x00, "Credit Limit" ) PORT_DIPLOCATION("DIP2:5,6") + PORT_DIPSETTING( 0x30, "300" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 300 + PORT_DIPSETTING( 0x30, "600" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x30, "1500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x30, "3000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPSETTING( 0x20, "500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 500 + PORT_DIPSETTING( 0x20, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x20, "2500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x20, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPSETTING( 0x10, "700" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 700 + PORT_DIPSETTING( 0x10, "1400" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x10, "3500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x10, "7000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPSETTING( 0x00, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 1000 + PORT_DIPSETTING( 0x00, "2000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x00, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x00, "10000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPNAME( 0x40, 0x00, "Double Bet" ) PORT_DIPLOCATION("DIP2:7") + PORT_DIPSETTING( 0x40, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) + PORT_DIPNAME( 0x80, 0x00, "Last Chance" ) PORT_DIPLOCATION("DIP2:8") + PORT_DIPSETTING( 0x80, DEF_STR(Off) ) + PORT_DIPSETTING( 0x00, DEF_STR(On) ) PORT_START("DSW3") PORT_DIPNAME( 0x07, 0x07, "YAKUMAN Bonus" ) @@ -6714,7 +6697,7 @@ static INPUT_PORTS_START( jongtei ) PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "In Game Music" ) + PORT_DIPNAME( 0x02, 0x00, "In-Game Music" ) PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x04, 0x00, "Girls" ) @@ -6778,15 +6761,10 @@ static INPUT_PORTS_START( mjgnight ) PORT_INCLUDE(jongtei) PORT_MODIFY("DSW2") - PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) - PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) ) - PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) - PORT_DIPSETTING( 0x01, DEF_STR( 1C_5C ) ) - PORT_DIPSETTING( 0x00, DEF_STR( 1C_10C ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DIP2:3") PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x38, 0x38, "Min Rate To Play" ) + PORT_DIPNAME( 0x38, 0x38, "Minimum Bet" ) PORT_DIPLOCATION("DIP2:4,5,6") PORT_DIPSETTING( 0x38, "1" ) PORT_DIPSETTING( 0x30, "2" ) PORT_DIPSETTING( 0x28, "3" ) @@ -6795,19 +6773,25 @@ static INPUT_PORTS_START( mjgnight ) PORT_DIPSETTING( 0x10, "6" ) PORT_DIPSETTING( 0x08, "7" ) PORT_DIPSETTING( 0x00, "8" ) - PORT_DIPNAME( 0xc0, 0xc0, "Payout" ) - PORT_DIPSETTING( 0xc0, "300" ) - PORT_DIPSETTING( 0x80, "500" ) - PORT_DIPSETTING( 0x40, "700" ) - PORT_DIPSETTING( 0x00, "1000" ) + PORT_DIPNAME( 0xc0, 0x00, "Credit Limit" ) PORT_DIPLOCATION("DIP2:7,8") + PORT_DIPSETTING( 0xc0, "300" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 300 + PORT_DIPSETTING( 0xc0, "600" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0xc0, "1500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0xc0, "3000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPSETTING( 0x80, "500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 500 + PORT_DIPSETTING( 0x80, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x80, "2500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x80, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPSETTING( 0x40, "700" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 700 + PORT_DIPSETTING( 0x40, "1400" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x40, "3500" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x40, "7000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) + PORT_DIPSETTING( 0x00, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03 ) // 1000 + PORT_DIPSETTING( 0x00, "2000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02 ) + PORT_DIPSETTING( 0x00, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01 ) + PORT_DIPSETTING( 0x00, "10000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00 ) PORT_MODIFY("DSW4") - PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "In Game Music" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -7259,11 +7243,7 @@ static INPUT_PORTS_START( mjmyster ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "SW1:1,2,3,4") // PAY-OUT 管理 - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("SW1:5,6") // ODDS 設定 - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "SW1:5,6") // ODDS 設定 PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("SW1:7,8") // BET-MAX PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -7478,22 +7458,22 @@ static INPUT_PORTS_START( hginga ) PORT_DIPSETTING( 0x04, "Active Low" ) // Low Active PORT_DIPSETTING( 0x00, "Active High" ) // High Active PORT_DIPNAME( 0x18, 0x08, "Credit Limit" ) PORT_DIPLOCATION("SW3:4,5") // クレジット・リミット - PORT_DIPSETTING( 0x18, "1000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 1000クレジット - PORT_DIPSETTING( 0x18, "2000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) - PORT_DIPSETTING( 0x18, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) - PORT_DIPSETTING( 0x18, "10000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) - PORT_DIPSETTING( 0x10, "2000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 2000クレジット - PORT_DIPSETTING( 0x10, "4000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) - PORT_DIPSETTING( 0x10, "10000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) - PORT_DIPSETTING( 0x10, "20000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) - PORT_DIPSETTING( 0x08, "3000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 3000クレジット - PORT_DIPSETTING( 0x08, "6000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) - PORT_DIPSETTING( 0x08, "15000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) - PORT_DIPSETTING( 0x08, "30000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) - PORT_DIPSETTING( 0x00, "5000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 5000クレジット - PORT_DIPSETTING( 0x00, "10000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) - PORT_DIPSETTING( 0x00, "25000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) - PORT_DIPSETTING( 0x00, "50000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x18, "1,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 1000クレジット + PORT_DIPSETTING( 0x18, "2,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x18, "5,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x18, "10,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x10, "2,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 2000クレジット + PORT_DIPSETTING( 0x10, "4,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x10, "10,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x10, "20,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x08, "3,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 3000クレジット + PORT_DIPSETTING( 0x08, "6,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x08, "15,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x08, "30,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) + PORT_DIPSETTING( 0x00, "5,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x03) // 5000クレジット + PORT_DIPSETTING( 0x00, "10,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x02) + PORT_DIPSETTING( 0x00, "25,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x01) + PORT_DIPSETTING( 0x00, "50,000" ) PORT_CONDITION("DSW2", 0x03, EQUALS, 0x00) PORT_DIPNAME( 0x20, 0x20, "Hanaroku Hopper" ) PORT_DIPLOCATION("SW3:6") // 花六ホッパー PORT_DIPSETTING( 0x20, "Manual" ) // 手動 PORT_DIPSETTING( 0x00, "Automatic" ) // 自動 @@ -7746,11 +7726,7 @@ static INPUT_PORTS_START( mjmyornt ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "SW 1:1,2,3,4") // ＰＡＹ－ＯＵＴ　管理 - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("SW 1:5,6") // ＯＤＤＳ　設定 - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "SW 1:5,6") // ＯＤＤＳ　設定 PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("SW 1:7,8") // ＢＥＴ－ＭＡＸ PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -8361,11 +8337,7 @@ static INPUT_PORTS_START( seljan2 ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP-SW1:1,2,3,4") // PAY OUT RATE - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ODDS RATE - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "DIP-SW1:5,6") // ODDS RATE PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP-SW1:7,8") // BET-MAX PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -8571,11 +8543,7 @@ static INPUT_PORTS_START( janshinp ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP1:1,2,3,4") - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP1:5,6") - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "DIP1:5,6") PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP1:7,8") PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -8721,11 +8689,7 @@ static INPUT_PORTS_START( dtoyoken ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP-SW1:1,2,3,4") // PAY OUT RATE - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ODDS RATE - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "DIP-SW1:5,6") // ODDS RATE PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP-SW1:7,8") // BET-MAX PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -8860,11 +8824,7 @@ static INPUT_PORTS_START( daimyojn ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE(0, "DIP-SW1:1,2,3,4") // ＰＡＹ　ＯＵＴ　ＲＡＴＥ - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ＯＤＤＳ　ＲＡＴＥ no effect in "Credit timer" mode, always uses 1 2 4 8 12 16 24 32 - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "DIP-SW1:5,6") // ＯＤＤＳ　ＲＡＴＥ no effect in "Credit timer" mode, always uses 1 2 4 8 12 16 24 32 PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP-SW1:7,8") // ＢＥＴ　ＭＡＸ PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -8999,11 +8959,7 @@ static INPUT_PORTS_START( mjnigiri ) PORT_START("DSW1") MAHJONG_PAYOUT_RATE_DFLT(0, 0x06, "DIP-SW1:1,2,3,4") // PAY OUT RATE - PORT_DIPNAME( 0x30, 0x00, "Odds Rate" ) PORT_DIPLOCATION("DIP-SW1:5,6") // ODDS RATE no effect in "Credit timer" mode, always uses 1 2 4 8 12 16 24 32 - PORT_DIPSETTING( 0x30, "1 2 4 8 12 16 24 32" ) - PORT_DIPSETTING( 0x00, "1 2 3 5 8 15 30 50" ) - PORT_DIPSETTING( 0x20, "2 3 6 8 12 15 30 50" ) - PORT_DIPSETTING( 0x10, "1 2 3 5 10 25 50 100" ) + MAHJONG_ODDS_RATE_NS(4, "DIP-SW1:5,6") // ODDS RATE no effect in "Credit timer" mode, always uses 1 2 4 8 12 16 24 32 PORT_DIPNAME( 0xc0, 0x40, "Maximum Bet" ) PORT_DIPLOCATION("DIP-SW1:7,8") // BET-MAX PORT_DIPSETTING( 0xc0, "1" ) PORT_DIPSETTING( 0x80, "5" ) @@ -9860,14 +9816,8 @@ void hanakanz_state::mjreach1(machine_config &config) { hanakanz(config); - m_key_matrix[0]->option_reset(); - mahjong_medal_panel(*m_key_matrix[0]); - m_key_matrix[0]->set_default_option("mj"); - m_key_matrix[0]->set_fixed(true); - - m_key_matrix[1]->option_reset(); - mahjong_medal_panel(*m_key_matrix[1]); - m_key_matrix[1]->set_default_option("mj"); + m_key_matrix[0]->set_options(mahjong_medal_panel, "mj", true); + m_key_matrix[1]->set_options(mahjong_medal_panel, "mj", false); // basic machine hardware m_maincpu->set_addrmap(AS_IO, &hanakanz_state::mjreach1_portmap); @@ -9895,14 +9845,8 @@ void hanakanz_state::mjchuuka(machine_config &config) tmpz.out_pa_callback().set(FUNC(hanakanz_state::hanakanz_rombank_w)); tmpz.out_pb_callback().set(FUNC(hanakanz_state::mjchuuka_oki_bank_w)); - m_key_matrix[0]->option_reset(); - mahjong_medal_panel(*m_key_matrix[0]); - m_key_matrix[0]->set_default_option("mj"); - m_key_matrix[0]->set_fixed(true); - - m_key_matrix[1]->option_reset(); - mahjong_medal_panel(*m_key_matrix[1]); - m_key_matrix[1]->set_default_option("mj"); + m_key_matrix[0]->set_options(mahjong_medal_panel, "mj", true); + m_key_matrix[1]->set_options(mahjong_medal_panel, "mj", false); m_screen->screen_vblank().set("maincpu", FUNC(tmpz84c015_device::trg0)); @@ -10346,13 +10290,8 @@ void hanakanz_state::htsubaki(machine_config &config) { jongtei(config); - m_key_matrix[0]->option_reset(); - hanafuda_medal_panel(*m_key_matrix[0]); - m_key_matrix[0]->set_default_option("hf"); - - m_key_matrix[1]->option_reset(); - hanafuda_medal_panel(*m_key_matrix[1]); - m_key_matrix[1]->set_default_option("hf"); + m_key_matrix[0]->set_options(medal_panels, "hf", false); + m_key_matrix[1]->set_options(medal_panels, "hf", false); } /*************************************************************************** @@ -10621,14 +10560,8 @@ void hanakanz_state::hnrose(machine_config &config) m_maincpu->set_addrmap(AS_IO, &hanakanz_state::hnrose_portmap); - m_key_matrix[0]->option_reset(); - standard_panels(*m_key_matrix[0]); - m_key_matrix[0]->set_default_option("hf"); - m_key_matrix[0]->set_fixed(false); - - m_key_matrix[1]->option_reset(); - standard_panels(*m_key_matrix[1]); - m_key_matrix[1]->set_default_option("hf"); + m_key_matrix[0]->set_options(standard_panels, "hf", false); + m_key_matrix[1]->set_options(standard_panels, "hf", false); } /*************************************************************************** diff --git a/src/mame/dynax/mjdipsw.h b/src/mame/dynax/mjdipsw.h index f27db3d21b4..d9b7e42e6b9 100644 --- a/src/mame/dynax/mjdipsw.h +++ b/src/mame/dynax/mjdipsw.h @@ -39,6 +39,13 @@ PORT_DIPSETTING( 0x01 << shift, "1 2 3 5 10 25 50 100" ) \ PORT_DIPSETTING( 0x02 << shift, "1 2 3 5 10 50 100 200" ) +#define MAHJONG_ODDS_RATE_NS(shift, loc) \ + PORT_DIPNAME( 0x03 << shift, 0x00 << shift, "Odds Rate" ) PORT_DIPLOCATION(loc) \ + PORT_DIPSETTING( 0x03 << shift, "1 2 4 8 12 16 24 32" ) \ + PORT_DIPSETTING( 0x00 << shift, "1 2 3 5 8 15 30 50" ) \ + PORT_DIPSETTING( 0x02 << shift, "2 3 6 8 12 15 30 50" ) \ + PORT_DIPSETTING( 0x01 << shift, "1 2 3 5 10 25 50 100" ) + #define MAHJONG_COINAGE(shift, loc) \ PORT_DIPNAME( 0x03 << shift, 0x03 << shift, DEF_STR(Coinage) ) PORT_DIPLOCATION(loc) /* ＣＯＩＮ　ＲＡＴＥ */ \ PORT_DIPSETTING( 0x03 << shift, DEF_STR(1C_1C) ) /* １コイン　　１プレイ */ \ diff --git a/src/mame/excellent/d9final.cpp b/src/mame/excellent/d9final.cpp index 0074708833f..3851406d95d 100644 --- a/src/mame/excellent/d9final.cpp +++ b/src/mame/excellent/d9final.cpp @@ -188,7 +188,7 @@ static INPUT_PORTS_START( d9final ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_START("IN1") diff --git a/src/mame/excellent/lastbank.cpp b/src/mame/excellent/lastbank.cpp index 41d69540966..f5c38f608b5 100644 --- a/src/mame/excellent/lastbank.cpp +++ b/src/mame/excellent/lastbank.cpp @@ -257,7 +257,7 @@ static INPUT_PORTS_START( lastbank ) PORT_START("SPECIAL") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(hopper_device::line_r)) PORT_DIPNAME( 0x08, 0x08, "Hopper Empty" ) PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) diff --git a/src/mame/f32/f-32.cpp b/src/mame/f32/f-32.cpp index 4a8d01fd0c2..6dfb7057dad 100644 --- a/src/mame/f32/f-32.cpp +++ b/src/mame/f32/f-32.cpp @@ -303,7 +303,7 @@ static INPUT_PORTS_START( royalpk2 ) PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Credit Pay Out") PORT_CODE(KEYCODE_E) PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Income") PORT_CODE(KEYCODE_R) PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("Income Clear") PORT_CODE(KEYCODE_T) - PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("screen", FUNC(screen_device::vblank)) PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_COIN2 ) diff --git a/src/mame/funworld/snookr10.cpp b/src/mame/funworld/snookr10.cpp index 08cddb6baf5..2026b2f20c4 100644 --- a/src/mame/funworld/snookr10.cpp +++ b/src/mame/funworld/snookr10.cpp @@ -815,13 +815,13 @@ void snookr10_state::crystalc_map(address_map &map) static INPUT_PORTS_START( snookr10 ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Remote x100") PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_NAME("Remote x100") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1") // Input Test in stats mode PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancella (Cancel) / Play / Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start (Deal) / Raddoppio (Double-Up)") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Stop 5 / Risk (Half Gamble) / Super Game") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Estatistica (Stats)") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Management") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Management") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Stop 4 / Alta (High)") PORT_START("IN1") @@ -939,13 +939,13 @@ INPUT_PORTS_END static INPUT_PORTS_START( crystalc ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Remote x100") PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_NAME("Remote x100") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop 1") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancella (Cancel) / Play / Bet") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start (Deal) / Raddoppio (Double-Up)") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Stop 5 / Risk (Half Gamble) / Super Game") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Statistica (Stats)") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Management") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Management") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Stop 4 / Alta (High)") PORT_START("IN1") diff --git a/src/mame/gaelco/atvtrack.cpp b/src/mame/gaelco/atvtrack.cpp index 31699243af5..01c4b93055b 100644 --- a/src/mame/gaelco/atvtrack.cpp +++ b/src/mame/gaelco/atvtrack.cpp @@ -208,9 +208,7 @@ inline u32 atvtrack_state::decode64_32(offs_t offset64, u64 data, u64 mem_mask, u64 atvtrack_state::control_r(offs_t offset, u64 mem_mask) { - u32 addr; - - addr = 0; + offs_t addr = 0; decode64_32(offset, 0, mem_mask, addr); if (addr == (0x00020000-0x00020000)/4) return -1; @@ -221,11 +219,9 @@ u64 atvtrack_state::control_r(offs_t offset, u64 mem_mask) void atvtrack_state::control_w(offs_t offset, u64 data, u64 mem_mask) { - u32 addr, dat; //, old; - - addr = 0; - dat = decode64_32(offset, data, mem_mask, addr); -// old = m_area1_data[addr]; + offs_t addr = 0; + u32 dat = decode64_32(offset, data, mem_mask, addr); + //u32 old = m_area1_data[addr]; m_area1_data[addr] = dat; if (addr == (0x00020000-0x00020000)/4) { if ((data & 4) && m_slaverun) diff --git a/src/mame/gametron/gatron.cpp b/src/mame/gametron/gatron.cpp index 4cea174cc3c..6af97ad2afb 100644 --- a/src/mame/gametron/gatron.cpp +++ b/src/mame/gametron/gatron.cpp @@ -551,7 +551,7 @@ static INPUT_PORTS_START( poker41 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Service 2 (Test Mode Out / Coin Stuck)") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Payout? */ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service 1 (Test/Settings)") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service 1 (Test/Settings)") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Discard 1 / Low") INPUT_PORTS_END diff --git a/src/mame/ibm/rtpc_kbd.h b/src/mame/ibm/rtpc_kbd.h index c0a80c8476c..11ae076fa3b 100644 --- a/src/mame/ibm/rtpc_kbd.h +++ b/src/mame/ibm/rtpc_kbd.h @@ -6,9 +6,10 @@ #pragma once +#include "rtpc_kbdc.h" + #include "cpu/mcs48/mcs48.h" -#include "rtpc_kbdc.h" class rtpc_kbd_device : public device_t diff --git a/src/mame/ibm/rtpc_kbdc.h b/src/mame/ibm/rtpc_kbdc.h index a2a1f536b78..b87809b9def 100644 --- a/src/mame/ibm/rtpc_kbdc.h +++ b/src/mame/ibm/rtpc_kbdc.h @@ -17,10 +17,7 @@ public: rtpc_kbdc_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) : rtpc_kbdc_device(mconfig, tag, owner, 0U) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(false); + set_options(std::forward(opts), dflt, false); } rtpc_kbdc_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0U); diff --git a/src/mame/igs/goldstar.cpp b/src/mame/igs/goldstar.cpp index b7f59eec93c..71a1c04bb10 100644 --- a/src/mame/igs/goldstar.cpp +++ b/src/mame/igs/goldstar.cpp @@ -5313,7 +5313,7 @@ static INPUT_PORTS_START( cmv4_service ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // on some sets a DSW must be on/off to access this menu INPUT_PORTS_END @@ -5677,7 +5677,7 @@ static INPUT_PORTS_START( animalhs ) PORT_MODIFY("IN2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("custom battery supervisor line") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings / Port Test") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings / Port Test") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Girls Test") PORT_MODIFY("DSW1") @@ -7207,7 +7207,7 @@ static INPUT_PORTS_START( cmast99 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("Test: 4-Pad") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("Test: 5-Pad") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("Test: 6-Pad") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings / Port Test") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings / Port Test") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Palette Test") */ PORT_INCLUDE( cmv4_player ) @@ -7361,7 +7361,7 @@ static INPUT_PORTS_START( goldstar ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_INCLUDE( cb3_dsw1 ) @@ -7749,7 +7749,7 @@ static INPUT_PORTS_START( wcherry ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("Start") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("Bet P1") // player 1 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("Small / Info") PORT_START("IN1") @@ -7814,7 +7814,7 @@ static INPUT_PORTS_START( super9 ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("IN2") // nadaaa @@ -8314,7 +8314,7 @@ static INPUT_PORTS_START( pkrmast ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin C") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Coin D") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT) @@ -8526,7 +8526,7 @@ static INPUT_PORTS_START( jkrmast ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) PORT_NAME("Coin C") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) PORT_NAME("Coin D") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT) @@ -8920,7 +8920,7 @@ static INPUT_PORTS_START( lucky8 ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -9153,7 +9153,7 @@ static INPUT_PORTS_START( ns8linew ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -9303,7 +9303,7 @@ static INPUT_PORTS_START( ns8linwa ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -10107,7 +10107,7 @@ static INPUT_PORTS_START( superdrg ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -10197,7 +10197,7 @@ static INPUT_PORTS_START( nd8lines ) // TODO: need to be done once palette is f PORT_START("IN3") // b810 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings / Test Mode") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings / Test Mode") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) // C or B? PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // B or C? @@ -10446,7 +10446,7 @@ static INPUT_PORTS_START( ladylinr ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_J) PORT_NAME("Hopper Voll (Hopper Fill)") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_NAME("Abschreib (Payout)") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Aufsteller (Supervisor)") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Aufsteller (Supervisor)") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Buchhaltung (Bookkeeping)") PORT_START("IN2") @@ -10617,7 +10617,7 @@ static INPUT_PORTS_START( bingowng ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -10790,18 +10790,18 @@ static INPUT_PORTS_START( mbstar ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_5) PORT_NAME("Coin 1") PORT_IMPULSE(2) // coin 1 - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_6) PORT_NAME("Coin 2") PORT_IMPULSE(2) // coin 2 + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // coin 1 + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // coin 2 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_7) PORT_NAME("Note") // note acceptor - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_Q) PORT_NAME("Remote") // remote credits - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8) PORT_NAME("Coin 3 (tokens)") // coin 3 (tokens) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_NAME("Remote") // remote credits + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3) PORT_CODE(KEYCODE_8) PORT_NAME("Coin 3 (tokens)") // coin 3 (tokens) PORT_START("IN4") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Operator Bookkeeping") // operator bookkeeping PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) // grull - Set 2025 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_W) PORT_NAME("Keyout") // payout? + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Keyout") // payout? PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Supervisor Bookkeeping") // supervisor bookkeeping @@ -10960,7 +10960,7 @@ static INPUT_PORTS_START( magodds ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -11097,7 +11097,7 @@ static INPUT_PORTS_START( schery97 ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // doesn't work in v352c4 PORT_START("DSW1") @@ -11269,7 +11269,7 @@ static INPUT_PORTS_START( nfb96 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings / Confirm") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings / Confirm") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -11460,7 +11460,7 @@ static INPUT_PORTS_START( nfb96tx ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused keyout? PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -11625,7 +11625,7 @@ static INPUT_PORTS_START( fb2010 ) // hit 'start1' to init NVRAM for first time PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused keyout? PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -11805,7 +11805,7 @@ static INPUT_PORTS_START( roypok96 ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -11985,7 +11985,7 @@ static INPUT_PORTS_START( pokonl97 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -12402,7 +12402,7 @@ static INPUT_PORTS_START( nfm ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // display ticket value? PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // keyin? tied to ticket clear value - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // DSW4-1 must be on to access account menu PORT_MODIFY( "DSW2" ) @@ -12434,7 +12434,7 @@ static INPUT_PORTS_START( amaztsk ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // display ticket value? PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // keyin? tied to ticket clear value - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // DSW4-1 must be on to access account menu PORT_MODIFY("DSW1") @@ -12563,7 +12563,7 @@ static INPUT_PORTS_START( unkch_controls ) PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) INPUT_PORTS_END @@ -12587,7 +12587,7 @@ static INPUT_PORTS_START( unkch_controls_alt ) PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) PORT_CODE(KEYCODE_N) PORT_NAME("Start / Stop All") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) INPUT_PORTS_END @@ -13513,7 +13513,7 @@ static INPUT_PORTS_START( megaline ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -13699,13 +13699,13 @@ static INPUT_PORTS_START( bonusch ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) //PORT_CODE(KEYCODE_K) PORT_NAME("COINS:IN2-8") PORT_START("IN3") // service - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Reset") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("tickets", FUNC(ticket_dispenser_device::line_r)) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("IN4") @@ -13870,13 +13870,13 @@ static INPUT_PORTS_START( feverch ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) PORT_NAME("Coin A - Exchange Out") PORT_START("IN4") // service - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("Reset") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Reset") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_NAME("Service Coin") PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) // 1 coin - 100 credits PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) // Hopper presence detection PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Hopper Payout") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1") @@ -14018,7 +14018,7 @@ static INPUT_PORTS_START( star100 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper Limited Payout") PORT_CODE(KEYCODE_H) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings / Test Mode") PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings / Test Mode") PORT_TOGGLE PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Statistics") PORT_START("IN3") // reflected in test mode @@ -14558,12 +14558,12 @@ INPUT_PORTS_END static INPUT_PORTS_START( flam7_w4 ) PORT_START("IN0") // b800 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("Button Lockout") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 - Big") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 / Big") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 - Double-Up") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 - Take Score") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 / Double Up") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 / Take Score") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Bet 1") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2 - Low") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2 / Low") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") PORT_START("IN1") // b801 @@ -14604,8 +14604,8 @@ static INPUT_PORTS_START( flam7_w4 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN4-4 Active") // This one is active in real PCB. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN4-5") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Collect") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Books / Stats / Setup") PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Reset") + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Books / Stats / Setup") PORT_TOGGLE PORT_START("DSW1") PORT_DIPNAME( 0x03, 0x03, "Payout" ) PORT_DIPLOCATION("DSW1:1,2") @@ -14754,8 +14754,8 @@ static INPUT_PORTS_START( flaming7 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN4-4 Active") // this one is active in real PCB. PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN4-5") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Collect") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Books / Stats / Setup") PORT_TOGGLE + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Reset") + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Books / Stats / Setup") PORT_TOGGLE PORT_START("DSW1") PORT_DIPNAME( 0x03, 0x01, "Credits Out" ) PORT_DIPLOCATION("DSW1:1,2") diff --git a/src/mame/jaleco/ms32.cpp b/src/mame/jaleco/ms32.cpp index 2ce093b2357..e637b63ddc0 100644 --- a/src/mame/jaleco/ms32.cpp +++ b/src/mame/jaleco/ms32.cpp @@ -486,7 +486,7 @@ Notes from Charles MacDonald ioport_value ms32_state::mahjong_ctrl_r() { - u32 mj_input = 0xff; + u32 mj_input = 0x3f; for (int i = 0; i < m_io_mj.size(); i++) { @@ -494,7 +494,8 @@ ioport_value ms32_state::mahjong_ctrl_r() mj_input &= m_io_mj[i]->read(); } - return bitswap<8>(mj_input, 6, 5, 4, 2, 3, 1, 0, 7); + // rotated one bit left so the Start column is the least significant bit + return bitswap<6>(mj_input, 4, 2, 3, 1, 0, 5) | 0xc0; } void ms32_base_state::sound_command_w(u32 data) @@ -963,22 +964,6 @@ static INPUT_PORTS_START( ms32_mahjong ) PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_INCLUDE(mahjong_matrix_1p) - - PORT_MODIFY("KEY0") - PORT_BIT( 0x00000060, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_START1 ) // rotated into LSB - - PORT_MODIFY("KEY1") - PORT_BIT( 0x000000c0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("KEY2") - PORT_BIT( 0x000000c0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("KEY3") - PORT_BIT( 0x000000c0, IP_ACTIVE_LOW, IPT_UNUSED ) - - PORT_MODIFY("KEY4") - PORT_BIT( 0x000000c0, IP_ACTIVE_LOW, IPT_UNUSED ) INPUT_PORTS_END /************************************* diff --git a/src/mame/konami/konendev.cpp b/src/mame/konami/konendev.cpp index e5129174301..31882d0cbb7 100644 --- a/src/mame/konami/konendev.cpp +++ b/src/mame/konami/konendev.cpp @@ -280,7 +280,7 @@ Play 30 Lines: 2/4/6 (2:1 odds), black static INPUT_PORTS_START( konendev ) PORT_START("IN0") PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_CODE(KEYCODE_3) PORT_NAME("Help") + PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_CODE(KEYCODE_3) PORT_NAME("Help") PORT_BIT( 0x0000fe00, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Q) PORT_NAME("Bet 1 Credit") PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_W) PORT_NAME("Bet 2 Credits") @@ -289,7 +289,7 @@ static INPUT_PORTS_START( konendev ) PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_T) PORT_NAME("Bet 10 Credits") PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_Y) PORT_NAME("Bet 20 Credits") PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_CODE(KEYCODE_1) PORT_NAME("Collect") - PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_CODE(KEYCODE_2) PORT_NAME("Reserve") + PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_CODE(KEYCODE_2) PORT_NAME("Reserve") PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_A) PORT_NAME("Play 1 Line / Red") PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_CODE(KEYCODE_S) PORT_NAME("Play 5 Lines") PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_CODE(KEYCODE_D) PORT_NAME("Play 10 Lines") diff --git a/src/mame/mattel/juicebox.cpp b/src/mame/mattel/juicebox.cpp index fea7715a7b7..c3a201b5f3d 100644 --- a/src/mame/mattel/juicebox.cpp +++ b/src/mame/mattel/juicebox.cpp @@ -9,16 +9,19 @@ *******************************************************************************/ #include "emu.h" + #include "cpu/arm7/arm7.h" #include "machine/s3c44b0.h" #include "machine/smartmed.h" #include "sound/dac.h" + #include "emupal.h" #include "screen.h" #include "softlist_dev.h" #include "speaker.h" -#include +//#define VERBOSE 1 +#include "logmacro.h" namespace { @@ -39,9 +42,9 @@ public: , m_port_g(*this, "PORTG") { } - void juicebox(machine_config &config); + void juicebox(machine_config &config) ATTR_COLD; - void init_juicebox(); + void init_juicebox() ATTR_COLD; DECLARE_INPUT_CHANGED_MEMBER(port_changed); @@ -50,13 +53,6 @@ protected: virtual void machine_reset() override ATTR_COLD; private: - required_device m_maincpu; - required_device m_s3c44b0; - required_device m_smartmedia; - required_ioport m_port_g; - - uint32_t port[9]; - struct jb_smc_t { int add_latch; @@ -64,14 +60,21 @@ private: int busy; }; + required_device m_maincpu; + required_device m_s3c44b0; + required_device m_smartmedia; + required_ioport m_port_g; + + uint32_t port[9]; + jb_smc_t smc; - #if defined(JUICEBOX_ENTER_DEBUG_MENU) || defined(JUICEBOX_DISPLAY_ROM_ID) +#if defined(JUICEBOX_ENTER_DEBUG_MENU) || defined(JUICEBOX_DISPLAY_ROM_ID) int port_g_read_count; - #endif +#endif + uint32_t juicebox_nand_r(offs_t offset, uint32_t mem_mask = ~0); void juicebox_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - inline void verboselog(int n_level, const char *s_fmt, ...) ATTR_PRINTF(3,4); void smc_reset(); void smc_init(); uint8_t smc_read(); @@ -82,19 +85,6 @@ private: void juicebox_map(address_map &map) ATTR_COLD; }; -inline void juicebox_state::verboselog(int n_level, const char *s_fmt, ...) -{ - if (VERBOSE_LEVEL >= n_level) - { - va_list v; - char buf[32768]; - va_start( v, s_fmt); - vsprintf( buf, s_fmt, v); - va_end( v); - logerror( "%s: %s", machine().describe_context(), buf); - } -} - /*************************************************************************** MACHINE HARDWARE @@ -105,7 +95,7 @@ inline void juicebox_state::verboselog(int n_level, const char *s_fmt, ...) void juicebox_state::smc_reset( ) { - verboselog(5, "smc_reset\n"); + LOG("smc_reset\n"); smc.add_latch = 0; smc.cmd_latch = 0; smc.busy = 0; @@ -113,7 +103,7 @@ void juicebox_state::smc_reset( ) void juicebox_state::smc_init( ) { - verboselog(5, "smc_init\n"); + LOG("smc_init\n"); smc_reset(); } @@ -126,30 +116,30 @@ uint8_t juicebox_state::smc_read( ) } else { - data = 0xFF; + data = 0xff; } - verboselog(5, "smc_read %08X\n", data); + LOG("smc_read %08X\n", data); return data; } void juicebox_state::smc_write( uint8_t data) { - verboselog(5, "smc_write %08X\n", data); + LOG("smc_write %08X\n", data); if (m_smartmedia->is_present()) { if (smc.cmd_latch) { - verboselog(5, "smartmedia_command_w %08X\n", data); + LOG("smartmedia_command_w %08X\n", data); m_smartmedia->command_w(data); } else if (smc.add_latch) { - verboselog(5, "smartmedia_address_w %08X\n", data); + LOG("smartmedia_address_w %08X\n", data); m_smartmedia->address_w(data); } else { - verboselog(5, "smartmedia_data_w %08X\n", data); + LOG("smartmedia_data_w %08X\n", data); m_smartmedia->data_w(data); } } @@ -174,7 +164,7 @@ uint32_t juicebox_state::s3c44b0_gpio_port_r(offs_t offset) { // 0C0062C4 -> bit 8 is turned on //data |= 1 << 13; - data = 0x0000FF15; + data = 0x0000ff15; data &= (1 << 2) | (1 << 9) | (1 << 10) | (1 << 11); data |= (1 << 2) | (1 << 9) | (1 << 10) | (1 << 11); } @@ -186,14 +176,14 @@ uint32_t juicebox_state::s3c44b0_gpio_port_r(offs_t offset) break; case S3C44B0_GPIO_PORT_E : { - data = 0x000000DF; + data = 0x000000df; } break; case S3C44B0_GPIO_PORT_F : { data = data | (0 << 7); - data = 0x0000009F; - data &= ~0xE0; + data = 0x0000009f; + data &= ~0xe0; if (smc.cmd_latch) data = data | 0x00000020; if (smc.add_latch) data = data | 0x00000040; if (!smc.busy) data = data | 0x00000080; @@ -201,8 +191,8 @@ uint32_t juicebox_state::s3c44b0_gpio_port_r(offs_t offset) break; case S3C44B0_GPIO_PORT_G : { - data = 0x0000009F; - data = (data & ~0x1F) | (m_port_g->read() & 0x1F); + data = 0x0000009f; + data = (data & ~0x1f) | (m_port_g->read() & 0x1f); #if defined(JUICEBOX_ENTER_DEBUG_MENU) if (port_g_read_count++ < 1) { @@ -211,13 +201,13 @@ uint32_t juicebox_state::s3c44b0_gpio_port_r(offs_t offset) #elif defined(JUICEBOX_DISPLAY_ROM_ID) if (port_g_read_count++ < 3) { - data = 0x0000008A; // RETURN + FORWARD + STAR + data = 0x0000008a; // RETURN + FORWARD + STAR } #endif } break; } -// data = ((machine().rand() & 0xFF) << 24) | ((machine().rand() & 0xFF) << 16) | ((machine().rand() & 0xFF) << 8) | ((machine().rand() & 0xFF) << 0); + //data = ((machine().rand() & 0xff) << 24) | ((machine().rand() & 0xff) << 16) | ((machine().rand() & 0xff) << 8) | ((machine().rand() & 0xff) << 0); return data; } @@ -230,7 +220,7 @@ void juicebox_state::s3c44b0_gpio_port_w(offs_t offset, uint32_t data) { smc.cmd_latch = ((data & 0x00000020) != 0); smc.add_latch = ((data & 0x00000040) != 0); - verboselog( 5, "s3c44b0_gpio_port_w - nand cle %d ale %d\n", (data & 0x20) ? 1 : 0, (data & 0x40) ? 1 : 0); + LOG("s3c44b0_gpio_port_w - nand cle %d ale %d\n", (data & 0x20) ? 1 : 0, (data & 0x40) ? 1 : 0); } break; } @@ -245,17 +235,17 @@ uint32_t juicebox_state::juicebox_nand_r(offs_t offset, uint32_t mem_mask) if (ACCESSING_BITS_8_15) data = data | (smc_read() << 8); if (ACCESSING_BITS_16_23) data = data | (smc_read() << 16); if (ACCESSING_BITS_24_31) data = data | (smc_read() << 24); - verboselog( 5, "juicebox_nand_r %08X %08X %08X\n", offset, mem_mask, data); + LOG("juicebox_nand_r %08X %08X %08X\n", offset, mem_mask, data); return data; } void juicebox_state::juicebox_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - verboselog( 5, "juicebox_nand_w %08X %08X %08X\n", offset, mem_mask, data); - if (ACCESSING_BITS_0_7) smc_write((data >> 0) & 0xFF); - if (ACCESSING_BITS_8_15) smc_write((data >> 8) & 0xFF); - if (ACCESSING_BITS_16_23) smc_write((data >> 16) & 0xFF); - if (ACCESSING_BITS_24_31) smc_write((data >> 24) & 0xFF); + LOG("juicebox_nand_w %08X %08X %08X\n", offset, mem_mask, data); + if (ACCESSING_BITS_0_7) smc_write((data >> 0) & 0xff); + if (ACCESSING_BITS_8_15) smc_write((data >> 8) & 0xff); + if (ACCESSING_BITS_16_23) smc_write((data >> 16) & 0xff); + if (ACCESSING_BITS_24_31) smc_write((data >> 24) & 0xff); } // ... @@ -365,9 +355,9 @@ ROM_START( juicebox ) ROM_SYSTEM_BIOS( 0, "juicebox", "Juice Box v.28 08242004" ) ROMX_LOAD( "juicebox.rom", 0, 0x800000, CRC(ac731197) SHA1(8278891c3531b3b6b5fec2a97a3ef6f0de1ac81d), ROM_BIOS(0) ) ROM_SYSTEM_BIOS( 1, "uclinuxp", "uClinux 2.4.24-uc0 (patched)" ) - ROMX_LOAD( "newboot.rom", 0, 0x1A0800, CRC(443f48b7) SHA1(38f0dc07b5cf02b972a851aa9e87f5d93d03f629), ROM_BIOS(1) ) + ROMX_LOAD( "newboot.rom", 0, 0x1a0800, CRC(443f48b7) SHA1(38f0dc07b5cf02b972a851aa9e87f5d93d03f629), ROM_BIOS(1) ) ROM_SYSTEM_BIOS( 2, "uclinux", "uClinux 2.4.24-uc0" ) - ROMX_LOAD( "image.rom", 0, 0x19E400, CRC(6c0308bf) SHA1(5fe21a38a4cd0d86bb60920eb100138b0e924d90), ROM_BIOS(2) ) + ROMX_LOAD( "image.rom", 0, 0x19e400, CRC(6c0308bf) SHA1(5fe21a38a4cd0d86bb60920eb100138b0e924d90), ROM_BIOS(2) ) ROM_END } // Anonymous namespace diff --git a/src/mame/merit/mgames.cpp b/src/mame/merit/mgames.cpp index 46b077b0a15..94382ccffad 100644 --- a/src/mame/merit/mgames.cpp +++ b/src/mame/merit/mgames.cpp @@ -572,7 +572,7 @@ static INPUT_PORTS_START( mgames ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) diff --git a/src/mame/midway/mcr.cpp b/src/mame/midway/mcr.cpp index 4e5c457b474..3718d0b312d 100644 --- a/src/mame/midway/mcr.cpp +++ b/src/mame/midway/mcr.cpp @@ -1036,7 +1036,7 @@ static INPUT_PORTS_START( dpoker ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ? ARM HIT PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW ) // will only work after opening a door - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ? XTMSG (ON/OFF) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ? EXTLKT (ON/OFF) diff --git a/src/mame/misc/ampoker2.cpp b/src/mame/misc/ampoker2.cpp index ec4f2b06b61..7dabf589b07 100644 --- a/src/mame/misc/ampoker2.cpp +++ b/src/mame/misc/ampoker2.cpp @@ -706,7 +706,7 @@ static INPUT_PORTS_START( ampoker2 ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Operator Key") PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Operator Key") PORT_TOGGLE PORT_DIPNAME( 0x08, 0x08, "Remote Mode" ) PORT_DIPSETTING( 0x08, "Mode 1" ) PORT_DIPSETTING( 0x00, "Mode 2" ) @@ -791,7 +791,7 @@ static INPUT_PORTS_START( ampkr95 ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Operator Key") PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Operator Key") PORT_TOGGLE PORT_DIPNAME( 0x08, 0x08, "Remote Mode" ) PORT_DIPSETTING( 0x08, "Mode 1" ) PORT_DIPSETTING( 0x00, "Mode 2" ) @@ -876,7 +876,7 @@ static INPUT_PORTS_START( sigmapkr ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Operator Key") PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Operator Key") PORT_TOGGLE PORT_DIPNAME( 0x08, 0x08, "Remote Mode" ) PORT_DIPSETTING( 0x08, "Mode 1" ) PORT_DIPSETTING( 0x00, "Mode 2" ) @@ -960,7 +960,7 @@ static INPUT_PORTS_START( sigma2k ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Operator Key") PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Operator Key") PORT_TOGGLE PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -1059,7 +1059,7 @@ static INPUT_PORTS_START( piccolop ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal/Take") - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Operator Key") PORT_TOGGLE + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Operator Key") PORT_TOGGLE PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) diff --git a/src/mame/misc/amusco.cpp b/src/mame/misc/amusco.cpp index 7b6fbd76615..dff54b058c7 100644 --- a/src/mame/misc/amusco.cpp +++ b/src/mame/misc/amusco.cpp @@ -436,7 +436,7 @@ static INPUT_PORTS_START( amusco ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("Cash Door") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("Logic Door") diff --git a/src/mame/misc/boramz80.cpp b/src/mame/misc/boramz80.cpp index a2347d5b8e8..7f018bfef52 100644 --- a/src/mame/misc/boramz80.cpp +++ b/src/mame/misc/boramz80.cpp @@ -323,7 +323,7 @@ static INPUT_PORTS_START( pkboram ) PORT_START("IN4") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_GAMBLE_BOOK ) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_GAMBLE_KEYOUT ) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_GAMBLE_PAYOUT ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // not shown is input test diff --git a/src/mame/misc/calomega.cpp b/src/mame/misc/calomega.cpp index 5db16a66fa5..8bbfecd0beb 100644 --- a/src/mame/misc/calomega.cpp +++ b/src/mame/misc/calomega.cpp @@ -1260,7 +1260,7 @@ static INPUT_PORTS_START( keno_903 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN0-3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clear Credits") PORT_CODE(KEYCODE_8) // "8" + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Credits") // "F1" PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -1610,7 +1610,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( gdrwpkrd ) PORT_START("IN0-0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // credits - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Collect") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel Discards") @@ -1752,7 +1752,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( gdrwpkrh ) PORT_START("IN0-0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Collect") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel Holds") @@ -2118,7 +2118,7 @@ INPUT_PORTS_END static INPUT_PORTS_START( comg074 ) PORT_START("IN0-0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // credits - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Collect") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel Discards") @@ -2290,7 +2290,7 @@ static INPUT_PORTS_START( comg076 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN0-3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clear Credits") PORT_CODE(KEYCODE_8) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Credits") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") @@ -2431,7 +2431,7 @@ static INPUT_PORTS_START( biggame ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN0-3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clear Credits") PORT_CODE(KEYCODE_8) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Credits") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -2575,7 +2575,7 @@ static INPUT_PORTS_START( nudgensw ) // nudge bingo PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN0-3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clear Credits") PORT_CODE(KEYCODE_8) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Credits") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play (Bet)") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -2715,7 +2715,7 @@ static INPUT_PORTS_START( hotline ) // nudge bingo PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_NAME("Credits") PORT_IMPULSE(2) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Learn") PORT_CODE(KEYCODE_0) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clear Data") PORT_CODE(KEYCODE_8) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Data") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Audit") PORT_CODE(KEYCODE_9) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // connected to SW2-5 @@ -3199,7 +3199,7 @@ static INPUT_PORTS_START( comg170 ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play (Bet)") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Learn") PORT_CODE(KEYCODE_8) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clr Data") PORT_CODE(KEYCODE_0) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Data") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Audit") PORT_CODE(KEYCODE_9) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -3280,7 +3280,7 @@ static INPUT_PORTS_START( comg172 ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play (Bet)") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Learn") PORT_CODE(KEYCODE_8) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clr Data") PORT_CODE(KEYCODE_0) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Data") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Audit") PORT_CODE(KEYCODE_9) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -3360,7 +3360,7 @@ static INPUT_PORTS_START( elgrande ) PORT_START("IN0-1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -3467,7 +3467,7 @@ static INPUT_PORTS_START( jjpoker ) PORT_START("IN0-1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -3574,7 +3574,7 @@ static INPUT_PORTS_START( ssipkr ) PORT_START("IN0-1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -3681,7 +3681,7 @@ static INPUT_PORTS_START( comg204 ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Learn") PORT_CODE(KEYCODE_8) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clr Data") PORT_CODE(KEYCODE_0) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Data") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Audit") PORT_CODE(KEYCODE_9) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -4089,7 +4089,7 @@ static INPUT_PORTS_START( pixels ) // sys905 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Play/Bet") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Go/Start") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Learn") PORT_CODE(KEYCODE_0) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Clear Data") PORT_CODE(KEYCODE_8) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Clear Data") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Audit") PORT_CODE(KEYCODE_9) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) diff --git a/src/mame/misc/cb2001.cpp b/src/mame/misc/cb2001.cpp index 1dd769eb241..7a77ddeea86 100644 --- a/src/mame/misc/cb2001.cpp +++ b/src/mame/misc/cb2001.cpp @@ -635,9 +635,10 @@ void cb2001_state::cb5_io_map(address_map &map) } static INPUT_PORTS_START( cb2001 ) + // TODO: resolve conflicting input types PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop 2 / Big") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop 1 / D-UP") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All / Take") @@ -662,7 +663,7 @@ static INPUT_PORTS_START( cb2001 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1-2") @@ -795,9 +796,10 @@ static INPUT_PORTS_START( cb2001 ) INPUT_PORTS_END static INPUT_PORTS_START( scherrymp ) + // TODO: resolve conflicting input types PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop 2 / Big") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop 1 / D-UP") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All / Take") @@ -822,7 +824,7 @@ static INPUT_PORTS_START( scherrymp ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1-2") @@ -1045,7 +1047,7 @@ static INPUT_PORTS_START( cb5 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_START("DSW1") @@ -1180,9 +1182,10 @@ static INPUT_PORTS_START( cb5 ) INPUT_PORTS_END static INPUT_PORTS_START( ndongmul2 ) + // TODO: resolve conflicting input types PORT_START("IN0") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) PORT_NAME("Stop 2 / Big") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) PORT_NAME("Stop 1 / D-UP") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SLOT_STOP_ALL ) PORT_NAME("Stop All / Take") @@ -1207,7 +1210,7 @@ static INPUT_PORTS_START( ndongmul2 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_NAME("Key Out / Attendant") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") PORT_START("DSW1-2") diff --git a/src/mame/misc/gluck2.cpp b/src/mame/misc/gluck2.cpp index 50d7dbebf6a..d588d314ec2 100644 --- a/src/mame/misc/gluck2.cpp +++ b/src/mame/misc/gluck2.cpp @@ -388,7 +388,7 @@ static INPUT_PORTS_START( gluck2 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -399,7 +399,7 @@ static INPUT_PORTS_START( gluck2 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Reset") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("SW1") // 2000 @@ -495,7 +495,7 @@ static INPUT_PORTS_START( sise7 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("PAD 3") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("PAD 4") diff --git a/src/mame/misc/goldnpkr.cpp b/src/mame/misc/goldnpkr.cpp index cf4559e242a..d7f17689d2b 100644 --- a/src/mame/misc/goldnpkr.cpp +++ b/src/mame/misc/goldnpkr.cpp @@ -4789,7 +4789,7 @@ static INPUT_PORTS_START( megadpkr ) PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN0-3") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Menu") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Menu") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // not used? PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Note") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_NAME("Credit") diff --git a/src/mame/misc/hotchili.cpp b/src/mame/misc/hotchili.cpp index 3237bb62868..b33b79fcc03 100644 --- a/src/mame/misc/hotchili.cpp +++ b/src/mame/misc/hotchili.cpp @@ -304,7 +304,7 @@ void hotchili_state::hc_map(address_map &map) static INPUT_PORTS_START( hotchili ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("All Clear / Configuration") // pressed on startup + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("All Clear / Configuration") // pressed on startup PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unknown PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) // active: enables RNG and read inputs on secondary buffer (inputs with special timing) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Meter Reading Key") PORT_TOGGLE diff --git a/src/mame/misc/jackhouse.cpp b/src/mame/misc/jackhouse.cpp index 7cba3681d45..ed643f97816 100644 --- a/src/mame/misc/jackhouse.cpp +++ b/src/mame/misc/jackhouse.cpp @@ -524,7 +524,7 @@ static INPUT_PORTS_START( jackhouse ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("2-4") PORT_CODE(KEYCODE_M) // unknown PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // attendant pay key PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // hopper payout button - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Confirm / Test Mode") // confirm / test mode + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Confirm / Test Mode") // confirm / test mode PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Record Mode") // books-record / color test PORT_START("IN3") diff --git a/src/mame/misc/kingpin.cpp b/src/mame/misc/kingpin.cpp index 7888171fe84..03e427de3eb 100644 --- a/src/mame/misc/kingpin.cpp +++ b/src/mame/misc/kingpin.cpp @@ -181,7 +181,7 @@ static INPUT_PORTS_START( kingpin ) PORT_BIT ( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_SERVICE_NO_TOGGLE( 0x20, IP_ACTIVE_LOW ) PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) - PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) // switches to next screen in attract mode + PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) // switches to next screen in attract mode PORT_START("DSW1") PORT_DIPNAME( 0x01, 0x01, "Setup (1 of 4)" ) PORT_DIPLOCATION("S1:1") diff --git a/src/mame/misc/magicfly.cpp b/src/mame/misc/magicfly.cpp index 3fe4a235eb5..b48aa235bfc 100644 --- a/src/mame/misc/magicfly.cpp +++ b/src/mame/misc/magicfly.cpp @@ -798,7 +798,7 @@ static INPUT_PORTS_START( magicfly ) PORT_START("IN0-3") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Deal / Last Bet") PORT_CODE(KEYCODE_C) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Cancel") PORT_CODE(KEYCODE_V) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Bet10") PORT_CODE(KEYCODE_X) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Bet1/Select") PORT_CODE(KEYCODE_Z) @@ -839,10 +839,10 @@ static INPUT_PORTS_START( 7mezzo ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN0-1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Big") PORT_CODE(KEYCODE_A) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Small") PORT_CODE(KEYCODE_S) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Payout") PORT_CODE(KEYCODE_Q) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Take") PORT_CODE(KEYCODE_V) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) // present in the input test PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -861,10 +861,10 @@ static INPUT_PORTS_START( 7mezzo ) PORT_START("IN0-3") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Deal / Last Bet") PORT_CODE(KEYCODE_Z) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Stand") PORT_CODE(KEYCODE_X) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Double") PORT_CODE(KEYCODE_C) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Bet") PORT_CODE(KEYCODE_1) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) @@ -935,7 +935,7 @@ static INPUT_PORTS_START( bchance ) PORT_START("IN0-3") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") // input test R4C1 (start/deal) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) // input test R4C2 (cancel) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) // input test R4C3 (service/test) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) // input test R4C3 (service/test) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) // input test R4C4 (d-up) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) // input test R4C5 (bet) diff --git a/src/mame/misc/multfish.cpp b/src/mame/misc/multfish.cpp index 3504e717ca0..6b6268f2c58 100644 --- a/src/mame/misc/multfish.cpp +++ b/src/mame/misc/multfish.cpp @@ -829,7 +829,7 @@ static INPUT_PORTS_START( rollfr ) PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN5") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) //Service SW (20 B) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) //Service SW (20 B) PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("IN6") diff --git a/src/mame/misc/norautp.cpp b/src/mame/misc/norautp.cpp index 85dadc2c9f3..15dde9e4b8c 100644 --- a/src/mame/misc/norautp.cpp +++ b/src/mame/misc/norautp.cpp @@ -1556,7 +1556,7 @@ static INPUT_PORTS_START( norautp ) PORT_START("IN2") // Only 3 lines: PPI-2; PC0-PC2 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("IN2-1") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Readout") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Readout") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("Low Level Hopper") PORT_START("DSW1") @@ -1594,7 +1594,7 @@ static INPUT_PORTS_START( norautrh ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Bet / Change Card") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // Coin A PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // Coin B - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Readout") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Readout") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Hi") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Lo") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) @@ -1652,7 +1652,7 @@ static INPUT_PORTS_START( norautpn ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Bet / Change Card") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // Coin A PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // Coin B - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Readout") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Readout") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Hi") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Lo") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) diff --git a/src/mame/misc/truco.cpp b/src/mame/misc/truco.cpp index ffd34b8ba4b..c22c487d403 100644 --- a/src/mame/misc/truco.cpp +++ b/src/mame/misc/truco.cpp @@ -497,7 +497,7 @@ void truco_state::main_map(address_map &map) static INPUT_PORTS_START( truco ) PORT_START("P1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Keyout enable Key") // Connected to JAMMA S17 (P2 START) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Keyout enable Key") // Connected to JAMMA S17 (P2 START) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) // Connected to JAMMA S14 (SERVICE SW) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_NAME("P1-4")PORT_CODE(KEYCODE_D) // still not clear... Connected to JAMMA C26 (P2 SELECT) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN) // Connected to JAMMA S16 (COIN2) diff --git a/src/mame/sega/9h0-0008_iox.h b/src/mame/sega/9h0-0008_iox.h index 212ade14a20..b47a85317a4 100644 --- a/src/mame/sega/9h0-0008_iox.h +++ b/src/mame/sega/9h0-0008_iox.h @@ -23,10 +23,7 @@ public: sega_9h0_0008_iox_slot_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt, bool const fixed) : sega_9h0_0008_iox_slot_device(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } sega_9h0_0008_iox_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0); virtual ~sega_9h0_0008_iox_slot_device(); diff --git a/src/mame/sega/bingoct.cpp b/src/mame/sega/bingoct.cpp index 224c0dbd110..630fb66b304 100644 --- a/src/mame/sega/bingoct.cpp +++ b/src/mame/sega/bingoct.cpp @@ -172,7 +172,7 @@ static INPUT_PORTS_START( terminal ) PORT_START("in1") PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_SERVICE) PORT_NAME("Test") PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT) PORT_NAME("Key") - PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE) PORT_NAME("Service") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_SERVICE1) PORT_NAME("Service") PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_COIN1) PORT_NAME("Coin") PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED) PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_CUSTOM) PORT_NAME("Hopper Pool Sensor") diff --git a/src/mame/sega/saturn_v.cpp b/src/mame/sega/saturn_v.cpp index de55fe34473..b2ac19bd442 100644 --- a/src/mame/sega/saturn_v.cpp +++ b/src/mame/sega/saturn_v.cpp @@ -428,7 +428,7 @@ void saturn_state::vdp1_regs_w(offs_t offset, uint16_t data, uint16_t mem_mask) if ( VDP1_LOG ) logerror( "VDP1: Draw forced termination register write: %08X %08X\n", offset*2, data ); break; default: - printf("Warning: write to unknown VDP1 reg %08x %08x\n",offset*2,data); + logerror("Warning: write to unknown VDP1 reg %08x %08x\n",offset*2,data); break; } diff --git a/src/mame/sega/segajw.cpp b/src/mame/sega/segajw.cpp index dffaba0d998..34e2ded3b19 100644 --- a/src/mame/sega/segajw.cpp +++ b/src/mame/sega/segajw.cpp @@ -239,7 +239,7 @@ static INPUT_PORTS_START( segajw ) PORT_BIT( 0x0d, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("IN2") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Meter") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Meter") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Last Game") PORT_CODE(KEYCODE_T) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("M-Door") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("D-Door") diff --git a/src/mame/sega/segasm1.cpp b/src/mame/sega/segasm1.cpp index d469b915e9e..2575af3432f 100644 --- a/src/mame/sega/segasm1.cpp +++ b/src/mame/sega/segasm1.cpp @@ -332,10 +332,9 @@ static INPUT_PORTS_START( tinkerbl ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Analyzer") PORT_START("IN1_PD") - // Following can't be IPT_SERVICE1, it will collide with IPT_GAMBLE_SERVICE // TODO: verify what's for (doesn't increment credits) - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Service Switch") - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("All Reset") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service Switch") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("All Reset") PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) diff --git a/src/mame/seta/thedealr.cpp b/src/mame/seta/thedealr.cpp index c4abf68cf21..fd2c8cf34f2 100644 --- a/src/mame/seta/thedealr.cpp +++ b/src/mame/seta/thedealr.cpp @@ -270,7 +270,7 @@ static INPUT_PORTS_START( thedealr ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) // HL5 (hold 5) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HALF ) // 1/2 (half gamble) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") // SML (small) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Attendant Reset") // RST (reset: clears tilt condition) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Attendant Reset") // RST (reset: clears tilt condition) PORT_START("IOX1") PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) diff --git a/src/mame/shared/mahjong.cpp b/src/mame/shared/mahjong.cpp index 9fc8cfaedca..0edded8cdb5 100644 --- a/src/mame/shared/mahjong.cpp +++ b/src/mame/shared/mahjong.cpp @@ -37,6 +37,42 @@ Reach * * * * Ron * * * * + + "Standard" mahjong keyboards use a 4*6 matrix. Gambling controls add an additional row. + + A E I M Kan Start + B F J N Reach Bet + C G K Chi Ron - + D H L Pon - - + Last Take W-Up F.Flop Big Small + + Hanafuda keyboards use a subset of the matrix. + These are rare. A mahjong panel with additional labels would usually be used. + + 1 5 - Yes - Start + 2 6 - No - Bet + 3 7 - - - - + 4 8 - - - - + - Take W-Up F.Flop Big Small + + Rarest of all is the 6-button hanafuda (or "hanaroku") keyboard, using a 6*6 matrix. + This has controls for two player positions in one matrix. + + 1P 1 1P 2 1P 3 1P 4 Payout F.Flop + 1P 5 1P No 1P Yes 1P 6 - - + - 1P Start 1P Bet - - - + 2P 1 2P 2 2P 3 2P 4 - - + 2P 5 2P No 2P Yes 2P 6 - - + - 2P Start 2P Bet - - - + + Columns are usually wired from left to right from least significant to most significant bit. + Nichibutsu wires the bits in the opposite order. + The Jaleco MegaSystem 32 has the columns rotated by one position so the Start column is the least significant bit. + + Note that non-standard mahjong/hanafuda keyboards exist: + * Some Nichibutsu hanafuda games use the Reach/Ron positions for Yes/No (rather than M/N). + * SNK Neo Geo mahjong keyboards use a non-standard 3*7 matrix. + */ #include "emu.h" #include "mahjong.h" diff --git a/src/mame/shared/mahjong.h b/src/mame/shared/mahjong.h index 04b4b9d4e77..600948f1a0d 100644 --- a/src/mame/shared/mahjong.h +++ b/src/mame/shared/mahjong.h @@ -31,10 +31,7 @@ public: bool const fixed) : mahjong_panel_connector_device(mconfig, tag, owner, u32(0)) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } mahjong_panel_connector_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); virtual ~mahjong_panel_connector_device(); diff --git a/src/mame/shared/xbox_usb.h b/src/mame/shared/xbox_usb.h index e69c310d386..98d5fc450f4 100644 --- a/src/mame/shared/xbox_usb.h +++ b/src/mame/shared/xbox_usb.h @@ -475,10 +475,7 @@ public: ohci_usb_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, bool fixed) : ohci_usb_connector(mconfig, tag, owner, 0) { - option_reset(); - opts(*this); - set_default_option(dflt); - set_fixed(fixed); + set_options(std::forward(opts), dflt, fixed); } ohci_usb_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/mame/sigma/sigmab52.cpp b/src/mame/sigma/sigmab52.cpp index 7bb912b5794..b5d900084b5 100644 --- a/src/mame/sigma/sigmab52.cpp +++ b/src/mame/sigma/sigmab52.cpp @@ -461,7 +461,7 @@ static INPUT_PORTS_START( jwildb52 ) PORT_START("IN1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CODE(KEYCODE_1_PAD) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Meter") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Meter") PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("Reset") PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("Last") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_DOOR ) PORT_NAME("Machine Door") diff --git a/src/mame/skeleton/dm7000.cpp b/src/mame/skeleton/dm7000.cpp index 0692a7da716..2433f82b7fa 100644 --- a/src/mame/skeleton/dm7000.cpp +++ b/src/mame/skeleton/dm7000.cpp @@ -355,7 +355,7 @@ uint32_t dm7000_state::screen_update_dm7000(screen_device &screen, bitmap_rgb32 uint32_t dm7000_state::dcr_r(offs_t offset) { osd_printf_debug("DCR %03X read\n", offset); - if(offset>=1024) {printf("get %04X\n", offset); return 0;} else + if(offset>=1024) {logerror("get %04X\n", offset); return 0;} else switch(offset) { case DCRSTB045_CMD_STAT: return 0; // assume that video dev is always ready @@ -368,7 +368,7 @@ uint32_t dm7000_state::dcr_r(offs_t offset) void dm7000_state::dcr_w(offs_t offset, uint32_t data) { osd_printf_debug("DCR %03X write = %08X\n", offset, data); - if(offset>=1024) {printf("get %04X\n", offset); } else + if(offset>=1024) {logerror("get %04X\n", offset); } else dcr[offset] = data; } diff --git a/src/mame/skeleton/seoul88.cpp b/src/mame/skeleton/seoul88.cpp index 8190743a25c..8393db66757 100644 --- a/src/mame/skeleton/seoul88.cpp +++ b/src/mame/skeleton/seoul88.cpp @@ -176,7 +176,7 @@ static INPUT_PORTS_START( seoul88 ) // there are 3 8-dip banks on PCB but test m PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_START("DSW1") diff --git a/src/mame/subsino/subsino.cpp b/src/mame/subsino/subsino.cpp index 208868896c3..e7f08c09517 100644 --- a/src/mame/subsino/subsino.cpp +++ b/src/mame/subsino/subsino.cpp @@ -1325,7 +1325,7 @@ static INPUT_PORTS_START( victor21 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(3) // coin 2 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(3) // coin 3 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // no payout? PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out @@ -1433,7 +1433,7 @@ static INPUT_PORTS_START( victor5 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out @@ -1569,7 +1569,7 @@ static INPUT_PORTS_START( tisub ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Current settings. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Current settings. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out @@ -1744,7 +1744,7 @@ static INPUT_PORTS_START( stbsub ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Current settings. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Current settings. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out @@ -1880,7 +1880,7 @@ static INPUT_PORTS_START( tesorone ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Current settings. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Current settings. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out @@ -2015,7 +2015,7 @@ static INPUT_PORTS_START( crsbingo ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out @@ -2107,7 +2107,7 @@ static INPUT_PORTS_START( sharkpy ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout? PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out? @@ -2215,7 +2215,7 @@ static INPUT_PORTS_START( sharkpye ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) @@ -2311,7 +2311,7 @@ static INPUT_PORTS_START( smoto16 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) // hopper sensor PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out? @@ -2407,7 +2407,7 @@ static INPUT_PORTS_START( smoto20 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", FUNC(ticket_dispenser_device::line_r)) // hopper sensor PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // payout PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // key out? @@ -2515,7 +2515,7 @@ static INPUT_PORTS_START( victor6 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) @@ -2623,7 +2623,7 @@ static INPUT_PORTS_START( victor6a ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) @@ -2731,7 +2731,7 @@ static INPUT_PORTS_START( victor6b ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats / Test") // Bookkeeping. - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") // Game Rate & others. + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") // Game Rate & others. PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) diff --git a/src/mame/sun/sun2.cpp b/src/mame/sun/sun2.cpp index 139b7193ad0..3d3f084540b 100644 --- a/src/mame/sun/sun2.cpp +++ b/src/mame/sun/sun2.cpp @@ -120,17 +120,22 @@ How the architecture works: ****************************************************************************/ #include "emu.h" -#include "cpu/m68000/m68010.h" -#include "machine/ram.h" -#include "machine/am9513.h" -#include "machine/i82586.h" -#include "machine/mm58167.h" -#include "machine/z80scc.h" -#include "machine/bankdev.h" -#include "machine/input_merger.h" + #include "bus/rs232/rs232.h" +#include "cpu/m68000/m68010.h" +#include "machine/am9513.h" +#include "machine/bankdev.h" +#include "machine/i82586.h" +#include "machine/input_merger.h" +#include "machine/mm58167.h" +#include "machine/ram.h" +#include "machine/z80scc.h" + #include "screen.h" +//#define VERBOSE 1 +#include "logmacro.h" + namespace { @@ -240,19 +245,19 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) switch (offset & 7) { case 4: - //printf("sun2: Read IDPROM @ %x (PC=%x)\n", offset<<1, m_maincpu->pc()); + LOG("sun2: Read IDPROM @ %x (PC=%x)\n", offset<<1, m_maincpu->pc()); return m_idprom_ptr[(offset>>10) & 0x1f]<<8; case 5: - //printf("sun2: Read diag reg\n"); + LOG("sun2: Read diag reg\n"); return m_diagreg; case 6: - //printf("sun2: Read bus error @ PC %x\n", m_maincpu->pc()); + LOG("sun2: Read bus error @ PC %x\n", m_maincpu->pc()); return m_buserror; case 7: - //printf("sun2: Read sysenable\n"); + LOG("sun2: Read sysenable\n"); return m_sysenable; } } @@ -267,7 +272,7 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) page = m_segmap[m_context & 7][offset >> 14] << 4; page += ((offset >> 10) & 0xf); - //printf("sun2: Read page map at %x (entry %d)\n", offset<<1, page); + LOG("sun2: Read page map at %x (entry %d)\n", offset<<1, page); if (offset & 1) // low-order 16 bits { return m_pagemap[page] & 0xffff; @@ -275,11 +280,11 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) return m_pagemap[page] >> 16; case 2: // segment map - //printf("sun2: Read segment map at %x (entry %d, user ctx %d)\n", offset<<1, offset>>14, m_context & 7); + LOG("sun2: Read segment map at %x (entry %d, user ctx %d)\n", offset<<1, offset>>14, m_context & 7); return m_segmap[m_context & 7][offset >> 14]; case 3: // context reg - //printf("sun2: Read context reg\n"); + LOG("sun2: Read context reg\n"); return m_context; } } @@ -302,7 +307,7 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) uint8_t pmeg = m_segmap[context][offset >> 14]; uint32_t entry = (pmeg << 4) + ((offset >> 10) & 0xf); - // printf("sun2: Context = %d, pmeg = %d, offset >> 14 = %x, entry = %d, page = %d\n", context, pmeg, offset >> 14, entry, (offset >> 10) & 0xf); + LOG("sun2: Context = %d, pmeg = %d, offset >> 14 = %x, entry = %d, page = %d\n", context, pmeg, offset >> 14, entry, (offset >> 10) & 0xf); if (m_pagemap[entry] & PM_VALID) { @@ -312,8 +317,8 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) uint32_t tmp = (m_pagemap[entry] & 0xfff) << 10; tmp |= (offset & 0x3ff); - // if (!machine().side_effects_disabled()) - // printf("sun2: Translated addr: %08x, type %d (page %d page entry %08x, orig virt %08x, FC %d)\n", tmp << 1, (m_pagemap[entry] >> 22) & 7, entry, m_pagemap[entry], offset<<1, fc); + if (!machine().side_effects_disabled()) + LOG("sun2: Translated addr: %08x, type %d (page %d page entry %08x, orig virt %08x, FC %d)\n", tmp << 1, (m_pagemap[entry] >> 22) & 7, entry, m_pagemap[entry], offset<<1, fc); switch ((m_pagemap[entry] >> 22) & 7) { @@ -343,7 +348,7 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) } } - //printf("read device space @ %x\n", tmp<<1); + LOG("read device space @ %x\n", tmp<<1); return m_type1space->read16(tmp, mem_mask); case 2: // type 2 space @@ -355,10 +360,12 @@ uint16_t sun2_state::tl_mmu_r(uint8_t fc, offs_t offset, uint16_t mem_mask) } else { - if (!machine().side_effects_disabled()) printf("sun2: pagemap entry not valid!\n"); + if (!machine().side_effects_disabled()) + logerror("sun2: pagemap entry not valid!\n"); } - if (!machine().side_effects_disabled()) printf("sun2: Unmapped read @ %08x (FC %d, mask %04x, PC=%x, seg %x)\n", offset<<1, fc, mem_mask, m_maincpu->pc(), offset>>15); + if (!machine().side_effects_disabled()) + logerror("sun2: Unmapped read @ %08x (FC %d, mask %04x, PC=%x, seg %x)\n", offset<<1, fc, mem_mask, m_maincpu->pc(), offset>>15); return 0xffff; } @@ -370,7 +377,7 @@ void sun2_state::mmu_w(offs_t offset, uint16_t data, uint16_t mem_mask) void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem_mask) { - //printf("sun2: Write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); + LOG("sun2: Write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); if (fc == 3) { @@ -379,33 +386,33 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem switch (offset & 7) { case 4: - //printf("sun2: Write? IDPROM @ %x\n", offset<<1); + LOG("sun2: Write? IDPROM @ %x\n", offset<<1); return; case 5: // XOR to match Table 2-1 in the 2/50 Field Service Manual - printf("sun2: CPU LEDs to %02x (PC=%x) => ", (data & 0xff) ^ 0xff, m_maincpu->pc()); + osd_printf_info("sun2: CPU LEDs to %02x (PC=%x) => ", (data & 0xff) ^ 0xff, m_maincpu->pc()); m_diagreg = data & 0xff; for (int i = 0; i < 8; i++) { if (m_diagreg & (1<<(7-i))) { - printf("*"); + osd_printf_info("*"); } else { - printf("O"); + osd_printf_info("O"); } } - printf("\n"); + osd_printf_info("\n"); return; case 6: - //printf("sun2: Write %04x to bus error not allowed\n", data); + LOG("sun2: Write %04x to bus error not allowed\n", data); return; case 7: - //printf("sun2: Write %04x to system enable\n", data); + LOG("sun2: Write %04x to system enable\n", data); COMBINE_DATA(&m_sysenable); return; } @@ -421,7 +428,7 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem page = m_segmap[m_context & 7][offset >> 14] << 4; page += ((offset >> 10) & 0xf); - //printf("sun2: Write %04x to page map at %x (entry %d), ", data, offset<<1, page); + LOG("sun2: Write %04x to page map at %x (entry %d), ", data, offset<<1, page); if (offset & 1) // low-order 16 bits { m_pagemap[page] &= 0xffff0000; @@ -432,16 +439,16 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem m_pagemap[page] &= 0x0000ffff; m_pagemap[page] |= (data<<16); } - //printf("entry now %08x (adr %08x PC=%x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 11, m_maincpu->pc()); + LOG("entry now %08x (adr %08x PC=%x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 11, m_maincpu->pc()); return; case 2: // segment map - //printf("sun2: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x)\n", data & 0xff, offset<<1, offset>>14, m_context & 7, m_maincpu->pc()); + LOG("sun2: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x)\n", data & 0xff, offset<<1, offset>>14, m_context & 7, m_maincpu->pc()); m_segmap[m_context & 7][offset >> 14] = data & 0xff; return; case 3: // context reg - //printf("sun2: Write %04x to context\n", data); + LOG("sun2: Write %04x to context\n", data); COMBINE_DATA(&m_context); return; } @@ -461,7 +468,8 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem uint32_t tmp = (m_pagemap[entry] & 0xfff) << 10; tmp |= (offset & 0x3ff); - //if (!machine().side_effects_disabled()) printf("sun2: Translated addr: %08x, type %d (page entry %08x, orig virt %08x)\n", tmp << 1, (m_pagemap[entry] >> 22) & 7, m_pagemap[entry], offset<<1); + if (!machine().side_effects_disabled()) + LOG("sun2: Translated addr: %08x, type %d (page entry %08x, orig virt %08x)\n", tmp << 1, (m_pagemap[entry] >> 22) & 7, m_pagemap[entry], offset<<1); switch ((m_pagemap[entry] >> 22) & 7) { @@ -470,7 +478,7 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem return; case 1: // type 1 - //printf("write device space @ %x\n", tmp<<1); + LOG("write device space @ %x\n", tmp<<1); m_type1space->write16(tmp, data, mem_mask); return; @@ -485,10 +493,11 @@ void sun2_state::tl_mmu_w(uint8_t fc, offs_t offset, uint16_t data, uint16_t mem } else { - if (!machine().side_effects_disabled()) printf("sun2: pagemap entry not valid!\n"); + if (!machine().side_effects_disabled()) + logerror("sun2: pagemap entry not valid!\n"); } - printf("sun2: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); + logerror("sun2: Unmapped write %04x (FC %d, mask %04x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); } // BW2 video control @@ -499,7 +508,7 @@ uint16_t sun2_state::video_ctrl_r() void sun2_state::video_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask) { - //printf("sun2: BW2: %x to video_ctrl\n", data); + LOG("sun2: BW2: %x to video_ctrl\n", data); COMBINE_DATA(&m_bw2_ctrl); } diff --git a/src/mame/sun/sun3.cpp b/src/mame/sun/sun3.cpp index 128a8ec3332..3ad78471bcf 100644 --- a/src/mame/sun/sun3.cpp +++ b/src/mame/sun/sun3.cpp @@ -180,26 +180,28 @@ fefc34a - start of mem_size, which queries ECC registers for each memory board #include "emu.h" +#include "bus/nscsi/cd.h" +#include "bus/nscsi/hd.h" +#include "bus/nscsi/tape.h" +#include "bus/rs232/rs232.h" +#include "bus/sunkbd/sunkbd.h" +#include "bus/sunmouse/sunmouse.h" #include "cpu/m68000/m68020.h" +#include "machine/am79c90.h" #include "machine/am9516.h" #include "machine/bankdev.h" +#include "machine/ncr5380.h" #include "machine/nvram.h" #include "machine/ram.h" #include "machine/timekpr.h" #include "machine/timer.h" #include "machine/z80scc.h" -#include "machine/am79c90.h" -#include "machine/ncr5380.h" -#include "bus/nscsi/cd.h" -#include "bus/nscsi/hd.h" -#include "bus/nscsi/tape.h" - -#include "bus/rs232/rs232.h" -#include "bus/sunkbd/sunkbd.h" -#include "bus/sunmouse/sunmouse.h" #include "screen.h" +//#define VERBOSE 1 +#include "logmacro.h" + namespace { @@ -337,7 +339,7 @@ uint32_t sun3_state::ram_r(offs_t offset) { if (m_ecc[0] == 0x10c00000) { - //printf("ECC testing, RAM read ofs %x\n", offset); + LOG("ECC testing, RAM read ofs %x\n", offset); m_ecc[1] &= 0x00ffffff; if (m_ecc[2] == 0x01000000) // single-bit error test @@ -359,8 +361,7 @@ uint32_t sun3_state::ram_r(offs_t offset) if (!m_bInBusErr) { - //printf("ram_r: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc()); - //fflush(stdout); + LOG("ram_r: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc()); m_buserr = BE_TIMEOUT; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); @@ -377,7 +378,7 @@ void sun3_state::ram_w(offs_t offset, uint32_t data, uint32_t mem_mask) !(m_bInBusErr)) { m_parregs[1] = offset<<2; - //printf("Generating parity error, mem_mask %08x\n", mem_mask); + LOG("Generating parity error, mem_mask %08x\n", mem_mask); switch (mem_mask) { case 0xff000000: @@ -432,7 +433,7 @@ void sun3_state::ram_w(offs_t offset, uint32_t data, uint32_t mem_mask) if (!m_bInBusErr) { - //printf("ram_w: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc()); + LOG("ram_w: bus error on timeout, access to invalid addr %08x, PC=%x\n", offset<<2, m_maincpu->pc()); fflush(stdout); m_buserr = BE_TIMEOUT; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); @@ -451,21 +452,21 @@ uint32_t sun3_state::tl_mmu_r(offs_t offset, uint32_t mem_mask) switch (offset >> 26) { case 0: // IDPROM - //printf("sun3: Read IDPROM at %x (mask %08x)\n", offset, mem_mask); + LOG("sun3: Read IDPROM at %x (mask %08x)\n", offset, mem_mask); return m_idprom_ptr[(offset*4)] << 24 | m_idprom_ptr[(offset*4)+1]<<16 | m_idprom_ptr[(offset*4)+2]<<8 | m_idprom_ptr[(offset*4)+3]; case 1: // page map page = m_segmap[m_context & 7][(offset >> 15) & 0x7ff] << 4; page += (offset >> 11) & 0xf; - //printf("sun3: Read page map at %x (entry %d)\n", offset<<1, page); + LOG("sun3: Read page map at %x (entry %d)\n", offset<<1, page); return m_pagemap[page]; case 2: // segment map - //printf("sun3: Read segment map at %x (entry %d, user ctx %d mask %x)\n", offset<<2, (offset & ~0x3c000000) >> 15, m_context & 7, mem_mask); + LOG("sun3: Read segment map at %x (entry %d, user ctx %d mask %x)\n", offset<<2, (offset & ~0x3c000000) >> 15, m_context & 7, mem_mask); return m_segmap[m_context & 7][(offset >> 15) & 0x7ff]<<24; case 3: // context reg - //printf("sun3: Read context reg\n"); + LOG("sun3: Read context reg\n"); return m_context<<24; case 4: // enable reg @@ -476,29 +477,29 @@ uint32_t sun3_state::tl_mmu_r(offs_t offset, uint32_t mem_mask) case 6: // bus error m_bInBusErr = false; - //printf("Reading bus error: %02x\n", m_buserr); + LOG("Reading bus error: %02x\n", m_buserr); return m_buserr<<24; case 7: // diagnostic reg return 0; case 8: // cache tags - //printf("sun3: read cache tags @ %x, PC = %x\n", offset, m_maincpu->pc()); + LOG("sun3: read cache tags @ %x, PC = %x\n", offset, m_maincpu->pc()); return m_cache_tags[(offset & 0x3fff) >> 2]; case 9: // cache data - //printf("sun3: read cache data @ %x, PC = %x\n", offset, m_maincpu->pc()); + LOG("sun3: read cache data @ %x, PC = %x\n", offset, m_maincpu->pc()); return m_cache_data[(offset & 0x3fff)]; case 10: // flush cache return 0xffffffff; case 11: // block copy - printf("sun3: read block copy @ %x, PC = %x\n", offset, m_maincpu->pc()); + logerror("sun3: read block copy @ %x, PC = %x\n", offset, m_maincpu->pc()); return 0xffffffff; case 15: // UART bypass - //printf("sun3: read UART bypass @ %x, PC = %x, mask = %08x\n", offset, m_maincpu->pc(), mem_mask); + LOG("sun3: read UART bypass @ %x, PC = %x, mask = %08x\n", offset, m_maincpu->pc(), mem_mask); return 0xffffffff; } } @@ -519,7 +520,7 @@ uint32_t sun3_state::tl_mmu_r(offs_t offset, uint32_t mem_mask) uint8_t pmeg = m_segmap[m_context & 7][(offset >> 15) & 0x7ff]; uint32_t entry = (pmeg << 4) + ((offset >> 11) & 0xf); - //printf("sun3: Context = %d, pmeg = %d, offset >> 15 = %x, entry = %d, page = %d\n", m_context&7, pmeg, (offset >> 15) & 0x7ff, entry, (offset >> 11) & 0xf); + LOG("sun3: Context = %d, pmeg = %d, offset >> 15 = %x, entry = %d, page = %d\n", m_context&7, pmeg, (offset >> 15) & 0x7ff, entry, (offset >> 11) & 0xf); if (m_pagemap[entry] & PM_VALID) { @@ -537,10 +538,10 @@ uint32_t sun3_state::tl_mmu_r(offs_t offset, uint32_t mem_mask) uint32_t tmp = (m_pagemap[entry] & 0x7ffff) << 11; tmp |= (offset & 0x7ff); - //printf("pmeg %d, entry %d = %08x, virt %08x => tmp %08x\n", pmeg, entry, m_pagemap[entry], offset << 2, tmp); + LOG("pmeg %d, entry %d = %08x, virt %08x => tmp %08x\n", pmeg, entry, m_pagemap[entry], offset << 2, tmp); - // if (!machine().side_effects_disabled()) - //printf("sun3: Translated addr: %08x, type %d (page %d page entry %08x, orig virt %08x, FC %d)\n", tmp << 2, (m_pagemap[entry] >> 26) & 3, entry, m_pagemap[entry], offset<<2, fc); + if (!machine().side_effects_disabled()) + LOG("sun3: Translated addr: %08x, type %d (page %d page entry %08x, orig virt %08x, FC %d)\n", tmp << 2, (m_pagemap[entry] >> 26) & 3, entry, m_pagemap[entry], offset<<2, fc); switch ((m_pagemap[entry] >> 26) & 3) { @@ -564,7 +565,8 @@ uint32_t sun3_state::tl_mmu_r(offs_t offset, uint32_t mem_mask) } else { -// if (!machine().side_effects_disabled()) printf("sun3: pagemap entry not valid! (PC=%x)\n", m_maincpu->pc()); + if (!machine().side_effects_disabled()) + LOG("sun3: pagemap entry not valid! (PC=%x)\n", m_maincpu->pc()); m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); m_buserr = BE_INVALID; @@ -581,7 +583,7 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) { uint8_t fc = m_maincpu->get_fc(); - //printf("sun3: Write %08x (FC %d, mask %08x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); + LOG("sun3: Write %08x (FC %d, mask %08x, PC=%x) to %08x\n", data, fc, mem_mask, m_maincpu->pc(), offset<<1); if (fc == 3) // control space { @@ -594,28 +596,28 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) case 1: // page map fefaf32 page = m_segmap[m_context & 7][(offset >> 15) & 0x7ff] << 4; - //printf("context = %d, segment = %d, PMEG = %d, add = %d\n", m_context & 7, (offset >> 15) & 0x7ff, page, (offset >> 11) & 0xf); + LOG("context = %d, segment = %d, PMEG = %d, add = %d\n", m_context & 7, (offset >> 15) & 0x7ff, page, (offset >> 11) & 0xf); page += (offset >> 11) & 0xf; - //printf("sun3: Write %04x to page map at %x (entry %d), ", data, offset<<2, page); + LOG("sun3: Write %04x to page map at %x (entry %d), ", data, offset<<2, page); COMBINE_DATA(&m_pagemap[page]); - //printf("entry now %08x (adr %08x PC=%x mask %x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 13, m_maincpu->pc(), mem_mask); + LOG("entry now %08x (adr %08x PC=%x mask %x)\n", m_pagemap[page], (m_pagemap[page] & 0xfffff) << 13, m_maincpu->pc(), mem_mask); return; case 2: // segment map - //printf("sun3: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x mask %x)\n", (data>>24) & 0xff, offset<<2, (offset & ~0x3c000000)>>15, m_context & 7, m_maincpu->pc(), mem_mask); + LOG("sun3: Write %02x to segment map at %x (entry %d, user ctx %d PC=%x mask %x)\n", (data>>24) & 0xff, offset<<2, (offset & ~0x3c000000)>>15, m_context & 7, m_maincpu->pc(), mem_mask); m_segmap[m_context & 7][(offset >> 15) & 0x7ff] = (data>>24) & 0xff; - //printf("segment map[%d][%d] now %x\n", m_context & 7, (offset & ~0x3c000000) >> 15, m_segmap[m_context & 7][(offset & ~0x3c000000) >> 15] = (data>>24) & 0xff); + LOG("segment map[%d][%d] now %x\n", m_context & 7, (offset & ~0x3c000000) >> 15, m_segmap[m_context & 7][(offset & ~0x3c000000) >> 15] = (data>>24) & 0xff); return; case 3: // context reg - //printf("sun3: Write (%x) %x to context\n", data, data>>24); + LOG("sun3: Write (%x) %x to context\n", data, data>>24); m_context = data >> 24; return; case 4: // enable reg - //printf("sun3: Write %x to enable, PC=%x\n", data, m_maincpu->pc()); + LOG("sun3: Write %x to enable, PC=%x\n", data, m_maincpu->pc()); COMBINE_DATA(&m_enable); return; @@ -629,29 +631,29 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) case 7: // diagnostic reg m_diag = data >> 24; #if 0 - printf("sun3: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc()); + osd_printf_info("sun3: CPU LEDs to %02x (PC=%x) => ", ((data>>24) & 0xff) ^ 0xff, m_maincpu->pc()); for (int i = 0; i < 8; i++) { if (m_diag & (1<pc(), mem_mask); + LOG("sun3: %08x to cache tags @ %x, PC = %x, mask = %08x\n", data, offset, m_maincpu->pc(), mem_mask); m_cache_tags[(offset & 0x3fff) >> 2] = data; return; case 9: // cache data - //printf("sun3: %08x to cache data @ %x, PC = %x, mask = %08x\n", data, offset, m_maincpu->pc(), mem_mask); + LOG("sun3: %08x to cache data @ %x, PC = %x, mask = %08x\n", data, offset, m_maincpu->pc(), mem_mask); m_cache_data[(offset & 0x3fff)] = data; return; @@ -659,11 +661,11 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) return; case 11: // block copy - printf("sun3: %08x to block copy @ %x, PC = %x\n", data, offset, m_maincpu->pc()); + logerror("sun3: %08x to block copy @ %x, PC = %x\n", data, offset, m_maincpu->pc()); return; case 15: // UART bypass - //printf("sun3: %08x to UART bypass @ %x, PC = %x\n", data, offset, m_maincpu->pc()); + LOG("sun3: %08x to UART bypass @ %x, PC = %x\n", data, offset, m_maincpu->pc()); return; } } @@ -677,7 +679,7 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) if ((!(m_pagemap[entry] & PM_WRITEMASK)) || ((m_pagemap[entry] & PM_SYSMASK) && (fc < M68K_FC_SUPERVISOR_DATA))) { - //printf("sun3: write protect MMU error (PC=%x)\n", m_maincpu->pc()); + LOG("sun3: write protect MMU error (PC=%x)\n", m_maincpu->pc()); m_buserr = BE_PROTERR; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); @@ -690,7 +692,8 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) uint32_t tmp = (m_pagemap[entry] & 0x7ffff) << 11; tmp |= (offset & 0x7ff); - //if (!machine().side_effects_disabled()) printf("sun3: Translated addr: %08x, type %d (page entry %08x, orig virt %08x)\n", tmp << 2, (m_pagemap[entry] >> 26) & 3, m_pagemap[entry], offset<<2); + if (!machine().side_effects_disabled()) + LOG("sun3: Translated addr: %08x, type %d (page entry %08x, orig virt %08x)\n", tmp << 2, (m_pagemap[entry] >> 26) & 3, m_pagemap[entry], offset<<2); switch ((m_pagemap[entry] >> 26) & 3) { @@ -699,7 +702,7 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) return; case 1: // type 1 - //printf("write device space @ %x\n", tmp<<1); + LOG("write device space @ %x\n", tmp<<1); m_type1space->write32(tmp, data, mem_mask); return; @@ -714,7 +717,8 @@ void sun3_state::tl_mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask) } else { - //if (!machine().side_effects_disabled()) printf("sun3: pagemap entry not valid!\n"); + if (!machine().side_effects_disabled()) + LOG("sun3: pagemap entry not valid!\n"); m_buserr = BE_INVALID; m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE); m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE); @@ -740,7 +744,7 @@ uint32_t sun3_state::parity_r(offs_t offset) void sun3_state::parity_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - //printf("sun3: %08x to parity registers @ %x (mask %08x)\n", data, offset, mem_mask); + LOG("sun3: %08x to parity registers @ %x (mask %08x)\n", data, offset, mem_mask); if (offset == 0) { @@ -820,7 +824,7 @@ uint32_t sun3_state::irqctrl_r() void sun3_state::irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - //printf("sun3: %08x to interrupt control (mask %08x)\n", data, mem_mask); + LOG("sun3: %08x to interrupt control (mask %08x)\n", data, mem_mask); COMBINE_DATA(&m_irqctrl); if (data & 0x01000000) @@ -852,14 +856,14 @@ void sun3_state::irqctrl_w(offs_t offset, uint32_t data, uint32_t mem_mask) uint8_t sun3_state::rtc7170_r(offs_t offset) { - //printf("read 7170 @ %x, PC=%x\n", offset, m_maincpu->pc()); + LOG("read 7170 @ %x, PC=%x\n", offset, m_maincpu->pc()); return 0xff; } void sun3_state::rtc7170_w(offs_t offset, uint8_t data) { - //printf("%02x to 7170 @ %x\n", data, offset); + LOG("%02x to 7170 @ %x\n", data, offset); if ((offset == 0x11) && (data == 0x1c)) { @@ -888,12 +892,12 @@ void sun3_state::scsictrl_w(uint16_t data) uint32_t sun3_state::ecc_r(offs_t offset) { - //printf("read ECC @ %x, PC=%x\n", offset, m_maincpu->pc()); + LOG("read ECC @ %x, PC=%x\n", offset, m_maincpu->pc()); // fefc34a int mbram = (m_ram_size / (1024*1024)); int beoff = (mbram / 32) * 0x10; - //printf("offset %x MB %d beoff %x\n", offset, mbram, beoff); + LOG("offset %x MB %d beoff %x\n", offset, mbram, beoff); if (offset >= beoff) { @@ -911,7 +915,7 @@ uint32_t sun3_state::ecc_r(offs_t offset) void sun3_state::ecc_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - //printf("%08x to ecc @ %x, mask %08x\n", data, offset, mem_mask); + LOG("%08x to ecc @ %x, mask %08x\n", data, offset, mem_mask); offset &= 0xf; m_ecc[offset] = data; @@ -921,7 +925,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(sun3_state::sun3_timer) { if ((m_irqctrl & 0x81000000) == 0x81000000) { - //printf("NMI tick\n"); + LOG("NMI tick\n"); m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE); m_maincpu->set_input_line(M68K_IRQ_7, ASSERT_LINE); } diff --git a/src/mame/taito/taito_o.cpp b/src/mame/taito/taito_o.cpp index e43da38558f..3a027538ae3 100644 --- a/src/mame/taito/taito_o.cpp +++ b/src/mame/taito/taito_o.cpp @@ -276,7 +276,7 @@ static INPUT_PORTS_START( parentj ) PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper Over") // hopper overload sensor to activate diverter coil PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("opto2", FUNC(taitoio_opto_device::opto_h_r)) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("opto2", FUNC(taitoio_opto_device::opto_l_r)) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("All Clear SW") + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("All Clear SW") PORT_SERVICE_NO_TOGGLE(0x0010, IP_ACTIVE_LOW ) PORT_BIT( 0x00e0, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // battery error if '1' @@ -344,7 +344,7 @@ static INPUT_PORTS_START( eibise ) PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper Over") // hopper overload sensor to activate diverter coil PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("opto2", FUNC(taitoio_opto_device::opto_h_r)) PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("opto2", FUNC(taitoio_opto_device::opto_l_r)) - PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("All Clear SW") + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MEMORY_RESET ) PORT_NAME("All Clear SW") PORT_SERVICE_NO_TOGGLE(0x0010, IP_ACTIVE_LOW ) PORT_BIT( 0x00e0, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // battery error if '1' diff --git a/src/mame/toaplan/sunwise.cpp b/src/mame/toaplan/sunwise.cpp index 88ff7d0b3b3..97df6a3ea47 100644 --- a/src/mame/toaplan/sunwise.cpp +++ b/src/mame/toaplan/sunwise.cpp @@ -189,7 +189,7 @@ static INPUT_PORTS_START( pwrkick ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_NAME(u8"Coin Exchange (¥100)") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_GAMBLE_BOOK ) PORT_BIT( 0x30, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_GAMBLE_SERVICE ) PORT_NAME("Attendant Key") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Attendant Key") PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_NAME("Coin 1 (Medal)") // The specific "Payout" button shown on the test screen and diagnostic menu does not exist. @@ -273,7 +273,7 @@ static INPUT_PORTS_START( burgkids ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_NAME(u8"Coin Exchange (¥100)") PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_GAMBLE_BOOK ) PORT_BIT( 0x30, IP_ACTIVE_HIGH, IPT_UNUSED ) - PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_GAMBLE_SERVICE ) PORT_NAME("Attendant Key") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Attendant Key") PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_NAME("Coin 1 (Medal)") INPUT_PORTS_END diff --git a/src/mame/wing/lucky74.cpp b/src/mame/wing/lucky74.cpp index 68c92e9ee08..442d9bb7f2f 100644 --- a/src/mame/wing/lucky74.cpp +++ b/src/mame/wing/lucky74.cpp @@ -1065,7 +1065,7 @@ static INPUT_PORTS_START( lucky74 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // Coin B PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) // Coin C - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) diff --git a/src/mame/wing/slotcarn.cpp b/src/mame/wing/slotcarn.cpp index efe0e43bfd6..1d7e99bc0ff 100644 --- a/src/mame/wing/slotcarn.cpp +++ b/src/mame/wing/slotcarn.cpp @@ -213,7 +213,7 @@ static INPUT_PORTS_START( slotcarn ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_Q) PORT_NAME("Key In") + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_N) PORT_NAME("Start") PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_M) PORT_NAME("Cancel") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_B) PORT_NAME("Select") @@ -221,8 +221,8 @@ static INPUT_PORTS_START( slotcarn ) PORT_START("IN1") /* b801 (ppi8255) */ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1) PORT_IMPULSE(2) /* Coin A */ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2) PORT_IMPULSE(2) /* Coin B */ - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Stats") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Settings") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3) PORT_IMPULSE(2) /* Coin C */ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN4) PORT_IMPULSE(2) /* Coin D */ @@ -235,10 +235,10 @@ static INPUT_PORTS_START( slotcarn ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_C) PORT_NAME("Double-Up") - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_V) PORT_NAME("Take Score") - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Z) PORT_NAME("Bet") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_W) PORT_NAME("Payout") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_H) PORT_NAME("Empty Hopper") PORT_START("IN4") /* bc01 (ppi8255) */ @@ -363,7 +363,7 @@ static INPUT_PORTS_START( spielbud ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1) PORT_IMPULSE(2) /* Coin A */ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2) PORT_IMPULSE(2) /* Coin B */ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Settings") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Settings") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3) PORT_IMPULSE(2) /* Coin C */ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN4) PORT_IMPULSE(2) /* Coin D */ From 8e783b477c6b9fdddbd000b7957477c5d0941f33 Mon Sep 17 00:00:00 2001 From: MetalliC <0vetal0@gmail.com> Date: Sat, 21 Mar 2026 16:53:17 +0200 Subject: [PATCH 348/351] ymz770: more to prev --- src/devices/sound/ymz770.cpp | 7 ++++++- src/devices/sound/ymz770.h | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/devices/sound/ymz770.cpp b/src/devices/sound/ymz770.cpp index b5d13047aef..4a72dc38949 100644 --- a/src/devices/sound/ymz770.cpp +++ b/src/devices/sound/ymz770.cpp @@ -98,6 +98,7 @@ void ymz770_device::device_start() sqc.is_playing = false; // register for save states + save_item(NAME(m_sclock)); save_item(NAME(m_cur_reg)); save_item(NAME(m_mute)); save_item(NAME(m_doen)); @@ -184,6 +185,10 @@ void ymz770_device::device_reset() } } +TIMER_CALLBACK_MEMBER(ymz770_device::update_sample_rate) +{ + m_stream->set_sample_rate(m_sclock); +} //------------------------------------------------- // sound_stream_update - handle update requests for @@ -254,7 +259,7 @@ retry: if (sample_rate != m_sclock) { m_sclock = sample_rate; - m_stream->set_sample_rate(m_sclock); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(ymz770_device::update_sample_rate), this)); } channel.last_block = channel.output_remaining < 1152; diff --git a/src/devices/sound/ymz770.h b/src/devices/sound/ymz770.h index e04a8a2269a..d25078ba886 100644 --- a/src/devices/sound/ymz770.h +++ b/src/devices/sound/ymz770.h @@ -32,7 +32,7 @@ protected: // device-level overrides virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; - + TIMER_CALLBACK_MEMBER(update_sample_rate); virtual void sound_stream_update(sound_stream &stream) override; virtual void internal_reg_write(uint8_t reg, uint8_t data); From 8e0db28ef03bd60595f605d16d2a89b556d02826 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 22 Mar 2026 01:57:10 +1100 Subject: [PATCH 349/351] Ran srcclean across the source. --- hash/nes.xml | 6 +- src/devices/bus/a2bus/a2sic.cpp | 2 +- src/devices/bus/abcbus/lux4105.cpp | 2 +- src/devices/bus/centronics/neomania_adapter.h | 10 +-- src/devices/bus/isa/tiga_spea.cpp | 4 +- src/devices/bus/isa/wss.h | 2 +- src/devices/bus/mm2/mm2kb.cpp | 10 +-- src/devices/bus/pc98_cbus/pcfxga.h | 2 +- src/devices/bus/pci/clgd543x_alpine.cpp | 16 ++-- src/devices/bus/pci/clgd543x_alpine.h | 2 +- src/devices/bus/pci/trident_4dwavedx.cpp | 84 +++++++++--------- src/devices/bus/pci/trident_4dwavedx.h | 2 +- src/devices/bus/vme/mvme328.cpp | 4 +- src/devices/cpu/i86/i186.cpp | 6 +- src/devices/cpu/m68000/m68008.h | 2 +- src/devices/cpu/tlcs900/tmp94c241.cpp | 4 +- src/devices/machine/i82091aa.cpp | 4 +- src/devices/machine/i82091aa.h | 4 +- src/devices/machine/i82425ex_psc.h | 2 +- src/devices/machine/i82426ex_ib.cpp | 18 ++-- src/devices/machine/it8671f.cpp | 2 +- src/devices/machine/sis630_host.cpp | 2 +- src/devices/machine/sis950_acpi.cpp | 2 +- src/devices/machine/vrender0.cpp | 4 +- src/devices/machine/vt82c586b_acpi.cpp | 2 +- src/devices/machine/vt82c586b_acpi.h | 4 +- src/devices/machine/z8536.cpp | 10 +-- src/devices/sound/ac97_stac9704.h | 4 +- src/devices/video/pc_vga_sis.cpp | 86 +++++++++---------- src/devices/video/x1_020_dx_101.cpp | 2 +- src/mame/adp/adp.cpp | 32 +++---- src/mame/adp/stellafr.cpp | 60 ++++++------- src/mame/akai/mpc2000.cpp | 2 +- src/mame/bfm/bfm_cobra3.cpp | 4 +- src/mame/capcom/gng.cpp | 2 +- src/mame/gridcomp/gridcomp.cpp | 4 +- src/mame/intel/i420ex.cpp | 4 +- src/mame/kaneko/galpani3.cpp | 2 +- src/mame/luxor/abc1600.cpp | 4 +- src/mame/luxor/abc1600_mmu.cpp | 24 +++--- src/mame/luxor/abc1600_mmu.h | 76 ++++++++-------- src/mame/luxor/abc1600_v.h | 2 +- src/mame/namco/namcos23.cpp | 24 +++--- src/mame/nec/pc9821.cpp | 24 +++--- src/mame/nec/pc9821.h | 4 +- src/mame/nokia/mikromikko2.cpp | 12 +-- src/mame/pc/agro.cpp | 2 +- src/mame/pc/pcipc.cpp | 4 +- src/mame/sega/model3.cpp | 2 +- src/mame/sinclair/specnext.cpp | 2 +- src/mame/sinclair/specnext_uart.cpp | 2 +- src/mame/success/skopro.cpp | 2 +- src/mame/ti/tipc.cpp | 16 ++-- src/mame/unico/unianapc.cpp | 4 +- src/osd/sdl3/window.cpp | 4 +- 55 files changed, 311 insertions(+), 311 deletions(-) diff --git a/hash/nes.xml b/hash/nes.xml index daa2ceadc36..85848a4274a 100644 --- a/hash/nes.xml +++ b/hash/nes.xml @@ -13848,7 +13848,7 @@ Entirely different from Namco's port. The CHR ROM to this prototype is lost. - + @@ -29455,7 +29455,7 @@ The EEPROM chip that contained the sequence data for the music and sound effects - + @@ -29466,7 +29466,7 @@ The EEPROM chip that contained the sequence data for the music and sound effects - + Magical Puzzle Popils (prototype, with recreated sound) 1989 diff --git a/src/devices/bus/a2bus/a2sic.cpp b/src/devices/bus/a2bus/a2sic.cpp index c5ecb0a0404..24fe04ca240 100644 --- a/src/devices/bus/a2bus/a2sic.cpp +++ b/src/devices/bus/a2bus/a2sic.cpp @@ -93,7 +93,7 @@ void a2sic_device::device_reset() u8 a2sic_device::read_c0nx(u8 offset) { u8 result = m_switches->read() | m_rs232->rxd_r() << 7; - + // clock A0 into 74LS109 flip-flop (inverted output) if (!machine().side_effects_disabled()) m_rs232->write_txd(!BIT(offset, 0)); diff --git a/src/devices/bus/abcbus/lux4105.cpp b/src/devices/bus/abcbus/lux4105.cpp index 9bb3c990af3..c59b18a17ab 100644 --- a/src/devices/bus/abcbus/lux4105.cpp +++ b/src/devices/bus/abcbus/lux4105.cpp @@ -290,7 +290,7 @@ void luxor_4105_device::scsi_ctrl_changed() m_scsi_bus->data_w(m_scsi_refid, 0); else m_scsi_bus->data_w(m_scsi_refid, m_data_out); - + update_ack(); update_dma(); } diff --git a/src/devices/bus/centronics/neomania_adapter.h b/src/devices/bus/centronics/neomania_adapter.h index 6ed81a5bb6b..970c0978e49 100644 --- a/src/devices/bus/centronics/neomania_adapter.h +++ b/src/devices/bus/centronics/neomania_adapter.h @@ -24,12 +24,12 @@ public: virtual void input_data5(int state) override { if (state) m_ddr |= 0x20; else m_ddr &= ~0x20; } virtual void input_data6(int state) override { if (state) m_ddr |= 0x40; else m_ddr &= ~0x40; } virtual void input_data7(int state) override { if (state) m_ddr |= 0x80; else m_ddr &= ~0x80; } -// virtual void input_ack(int state) override { printf("input_ack %d\n", state); } -// virtual void input_busy(int state) override { printf("input_busy %d\n", state); } -// virtual void input_perror(int state) override { printf("input_perror %d\n", state); } -// virtual void input_select(int state) override { printf("input_select %d\n", state); } +// virtual void input_ack(int state) override { printf("input_ack %d\n", state); } +// virtual void input_busy(int state) override { printf("input_busy %d\n", state); } +// virtual void input_perror(int state) override { printf("input_perror %d\n", state); } +// virtual void input_select(int state) override { printf("input_select %d\n", state); } virtual void input_autofd(int state) override; -// virtual void input_fault(int state) override { printf("input_fault %d\n", state); } +// virtual void input_fault(int state) override { printf("input_fault %d\n", state); } virtual void input_init(int state) override; virtual void input_select_in(int state) override; diff --git a/src/devices/bus/isa/tiga_spea.cpp b/src/devices/bus/isa/tiga_spea.cpp index 516d0223d42..283cbec3e98 100644 --- a/src/devices/bus/isa/tiga_spea.cpp +++ b/src/devices/bus/isa/tiga_spea.cpp @@ -44,8 +44,8 @@ void isa16_fga4he_device::device_add_mconfig(machine_config &config) HT208_VIDEO7_VGA(config, m_vga, 0); m_vga->set_screen("screen"); m_vga->set_vram_size(256*1024); -// m_vga->setup_rom_bank_cb().set([this] (u8 data) { printf("%02x\n", data); }); -// m_vga->vsync_cb().set([this](int state) { m_isa->irq2_w(state); }); +// m_vga->setup_rom_bank_cb().set([this] (u8 data) { printf("%02x\n", data); }); +// m_vga->vsync_cb().set([this](int state) { m_isa->irq2_w(state); }); // TODO: TMS34020-32 + Bt459 + Spea "VEMU" // 2MB VRAM + 4MB of DRAM, dual monitor with separate DB9 connector diff --git a/src/devices/bus/isa/wss.h b/src/devices/bus/isa/wss.h index 1fa951a33e3..24da7dfb24f 100644 --- a/src/devices/bus/isa/wss.h +++ b/src/devices/bus/isa/wss.h @@ -11,7 +11,7 @@ #include "sound/ymopl.h" class isa16_wss_device : public device_t, - public device_isa16_card_interface + public device_isa16_card_interface { public: isa16_wss_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/mm2/mm2kb.cpp b/src/devices/bus/mm2/mm2kb.cpp index 5a639f0db3e..4a360b256ff 100644 --- a/src/devices/bus/mm2/mm2kb.cpp +++ b/src/devices/bus/mm2/mm2kb.cpp @@ -37,7 +37,7 @@ void mm2_keyboard_device::device_add_mconfig(machine_config &config) static INPUT_PORTS_START( mm2_keyboard ) PORT_START("Y0") PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') @@ -84,7 +84,7 @@ static INPUT_PORTS_START( mm2_keyboard ) PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('@') PORT_CHAR('*') PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) - PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') @@ -132,7 +132,7 @@ static INPUT_PORTS_START( mm2_keyboard ) PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ESC") PORT_CODE(KEYCODE_ESC) PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("BS") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Left TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') - PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right TAB") + PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Right TAB") PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CAPS LOCK") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CTRL") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RET") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r') @@ -158,9 +158,9 @@ static INPUT_PORTS_START( mm2_keyboard ) PORT_START("Y10") PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2191") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // U+2191 = ↑ PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad INS") - PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad DEL") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) + PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad DEL") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2190") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // U+2190 = ← - PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2193") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // U+2193 = ↓ + PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2193") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // U+2193 = ↓ PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(u8"\u2192") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // U+2192 = → PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad ERASE") PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) diff --git a/src/devices/bus/pc98_cbus/pcfxga.h b/src/devices/bus/pc98_cbus/pcfxga.h index dce13f83deb..5fadfaa683b 100644 --- a/src/devices/bus/pc98_cbus/pcfxga.h +++ b/src/devices/bus/pc98_cbus/pcfxga.h @@ -9,7 +9,7 @@ #include "slot.h" class pcfxga_cbus_device : public device_t - , public device_pc98_cbus_slot_interface + , public device_pc98_cbus_slot_interface { public: pcfxga_cbus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/pci/clgd543x_alpine.cpp b/src/devices/bus/pci/clgd543x_alpine.cpp index 0b591ce6dd5..830d2af8b4a 100644 --- a/src/devices/bus/pci/clgd543x_alpine.cpp +++ b/src/devices/bus/pci/clgd543x_alpine.cpp @@ -40,14 +40,14 @@ ROM_START( gd5434 ) ROM_REGION32_LE( 0x8000, "bios", ROMREGION_ERASEFF ) ROM_DEFAULT_BIOS("122") // doesn't boot, bad? - ROM_SYSTEM_BIOS(0, "100e", "PCI VGA BIOS Version 1.00e") - ROMX_LOAD("cirrus5434.bin", 0x00000, 0x8000, CRC(bc271648) SHA1(08afd4468c4c1a1630a200de1007b1671f109b3c), ROM_BIOS(0) ) - ROM_SYSTEM_BIOS(1, "122", "PCI VGA BIOS Version 1.22 (01/18/95)") - ROMX_LOAD("gd5434pci.bin", 0x00000, 0x8000, CRC(fa76dabf) SHA1(0310ef02df941e7d35e1d832400e2e4dd07d6309), ROM_BIOS(1) ) + ROM_SYSTEM_BIOS(0, "100e", "PCI VGA BIOS Version 1.00e") + ROMX_LOAD("cirrus5434.bin", 0x00000, 0x8000, CRC(bc271648) SHA1(08afd4468c4c1a1630a200de1007b1671f109b3c), ROM_BIOS(0) ) + ROM_SYSTEM_BIOS(1, "122", "PCI VGA BIOS Version 1.22 (01/18/95)") + ROMX_LOAD("gd5434pci.bin", 0x00000, 0x8000, CRC(fa76dabf) SHA1(0310ef02df941e7d35e1d832400e2e4dd07d6309), ROM_BIOS(1) ) // 1ST AND 2ND HALF IDENTICAL crc="1d8d54e3" sha1="3e3b67dee603f8afaf17d3ccdf9439e742983bab" - ROM_SYSTEM_BIOS(2, "110b", "PCI VGA BIOS Version 1.10B (06/28/94)") - ROMX_LOAD("gd5434.bin", 0x00000, 0x8000, CRC(403020a4) SHA1(1ee70f6cc3c7b9a9afb402a1bc939f9f2e0cc739), ROM_BIOS(2) ) - ROM_IGNORE( 0x8000 ) + ROM_SYSTEM_BIOS(2, "110b", "PCI VGA BIOS Version 1.10B (06/28/94)") + ROMX_LOAD("gd5434.bin", 0x00000, 0x8000, CRC(403020a4) SHA1(1ee70f6cc3c7b9a9afb402a1bc939f9f2e0cc739), ROM_BIOS(2) ) + ROM_IGNORE( 0x8000 ) // same as above with 1xxxxxxxxxxxxxxx = 0xFF instead // ROM_SYSTEM_BIOS(3, "110b_jap", "PCI VGA BIOS Version 1.10B Japan chip (06/28/94)") // ROMX_LOAD("japan.bin", 0x00000, 0x8000, CRC(46fe9efa) SHA1(58712b00faf102509c4129c0babeb98df2b6e042), ROM_BIOS(3) ) @@ -84,7 +84,7 @@ void cirrus_gd5434_pci_device::device_start() // TODO: can be M_PREF in '30/'40 add_map( 4*1024*1024, M_MEM, FUNC(cirrus_gd5434_pci_device::vram_aperture_map)); // TODO: BAR1 available on '30/'40 with pull-down option in MD51 -// add_map( 512, M_MEM, FUNC(cirrus_gd5434_pci_device::mmio_map)); +// add_map( 512, M_MEM, FUNC(cirrus_gd5434_pci_device::mmio_map)); add_rom((u8 *)m_bios->base(), 0x8000); expansion_rom_base = 0xc0000; diff --git a/src/devices/bus/pci/clgd543x_alpine.h b/src/devices/bus/pci/clgd543x_alpine.h index 6245442c5dc..e027913f72d 100644 --- a/src/devices/bus/pci/clgd543x_alpine.h +++ b/src/devices/bus/pci/clgd543x_alpine.h @@ -28,7 +28,7 @@ protected: virtual void config_map(address_map &map) override ATTR_COLD; -// virtual void mmio_map(address_map &map) ATTR_COLD; +// virtual void mmio_map(address_map &map) ATTR_COLD; void vram_aperture_map(address_map &map) ATTR_COLD; private: required_device m_vga; diff --git a/src/devices/bus/pci/trident_4dwavedx.cpp b/src/devices/bus/pci/trident_4dwavedx.cpp index b4043748415..e10b9a233a1 100644 --- a/src/devices/bus/pci/trident_4dwavedx.cpp +++ b/src/devices/bus/pci/trident_4dwavedx.cpp @@ -65,7 +65,7 @@ void trident_4dwavedx_device::device_add_mconfig(machine_config &config) irq_pin_w(0, state); //irq_pin_w(0, 0); //if (state) - // irq_pin_w(0, 1); + // irq_pin_w(0, 1); }); m_pcm->add_route(0, m_ac97, 1.00, 0); m_pcm->add_route(1, m_ac97, 1.00, 1); @@ -155,9 +155,9 @@ void trident_4dwavedx_device::config_map(address_map &map) , m_ddma_config & ~0xf, BIT(m_ddma_config, 3), BIT(m_ddma_config, 0)); }) ); -// map(0x44, 0x44) Legacy I/O Base -// map(0x45, 0x45) Legacy DMA -// map(0x46, 0x46) Legacy Control +// map(0x44, 0x44) Legacy I/O Base +// map(0x45, 0x45) Legacy DMA +// map(0x46, 0x46) Legacy Control map(0x44, 0x47).lrw32( NAME([this] (offs_t offset, u32 mem_mask) { LOG("PCI 44h: Legacy control read (mask %08x)\n", mem_mask); @@ -211,22 +211,22 @@ void trident_4dwavedx_device::config_map(address_map &map) void trident_4dwavedx_device::io_map(address_map &map) { -// map(0x00, 0x0f) Legacy DMA -// map(0x10, 0x1f) Legacy SB mapping +// map(0x00, 0x0f) Legacy DMA +// map(0x10, 0x1f) Legacy SB mapping -// map(0x20, 0x23) Legacy MPU-401 +// map(0x20, 0x23) Legacy MPU-401 -// map(0x30, 0x31) Legacy Game Port -// map(0x34, 0x37) Enhanced Game Port 1 -// map(0x38, 0x3b) Enhanced Game Port 2 +// map(0x30, 0x31) Legacy Game Port +// map(0x34, 0x37) Enhanced Game Port 1 +// map(0x38, 0x3b) Enhanced Game Port 2 map(0x40, 0x43).rw(m_ac97, FUNC(ac97_stac9704_device::codec_write_r), FUNC(ac97_stac9704_device::codec_write_w)); map(0x44, 0x47).rw(m_ac97, FUNC(ac97_stac9704_device::codec_read_r), FUNC(ac97_stac9704_device::codec_read_w)); -// map(0x48, 0x4b) AC'97 Command/Status +// map(0x48, 0x4b) AC'97 Command/Status -// map(0x50, 0x50) 4DWAVE-DX Status (r/o) -// map(0x54, 0x55) Legacy SB Frequency (r/o) -// map(0x57, 0x57) Legacy SB Time Constant (r/o) +// map(0x50, 0x50) 4DWAVE-DX Status (r/o) +// map(0x54, 0x55) Legacy SB Frequency (r/o) +// map(0x57, 0x57) Legacy SB Time Constant (r/o) map(0x58, 0x5b).lrw32( NAME([this] (offs_t offset) { return m_asr3; @@ -255,46 +255,46 @@ void trident_4dwavedx_device::io_map(address_map &map) } }) ); -// map(0x60, 0x63) OPL3 Emulation Channel Key on/off Trace +// map(0x60, 0x63) OPL3 Emulation Channel Key on/off Trace -// map(0x70, 0x73) Record Channel index 2 (chorus) / 1 (reverb) / 0 (mixer) -// map(0x78, 0x7b) Bank A PCI Stream Buffer Valid flags (testing only) -// map(0x7c, 0x7f) Bank B PCI Stream Buffer Valid flags (testing only) +// map(0x70, 0x73) Record Channel index 2 (chorus) / 1 (reverb) / 0 (mixer) +// map(0x78, 0x7b) Bank A PCI Stream Buffer Valid flags (testing only) +// map(0x7c, 0x7f) Bank B PCI Stream Buffer Valid flags (testing only) -// map(0x80, 0xff) Wave Engine +// map(0x80, 0xff) Wave Engine map(0x80, 0x83).rw(m_pcm, FUNC(t4dwave_pcm_device::banka_status_r), FUNC(t4dwave_pcm_device::starta_w)); map(0x84, 0x87).rw(m_pcm, FUNC(t4dwave_pcm_device::banka_status_r), FUNC(t4dwave_pcm_device::stopa_w)); -// map(0x88, 0x8b) DLYA -// map(0x8c, 0x8f) SIGNCSOA -// map(0x90, 0x93) CSPFA -// map(0x94, 0x97) CEBCA +// map(0x88, 0x8b) DLYA +// map(0x8c, 0x8f) SIGNCSOA +// map(0x90, 0x93) CSPFA +// map(0x94, 0x97) CEBCA map(0x98, 0x9b).rw(m_pcm, FUNC(t4dwave_pcm_device::aina_r), FUNC(t4dwave_pcm_device::aina_w)); -// map(0x9c, 0x9f) EINTA +// map(0x9c, 0x9f) EINTA map(0xa0, 0xa3).rw(m_pcm, FUNC(t4dwave_pcm_device::global_control_r), FUNC(t4dwave_pcm_device::global_control_w)); map(0xa4, 0xa7).rw(m_pcm, FUNC(t4dwave_pcm_device::aintena_r), FUNC(t4dwave_pcm_device::aintena_w)); map(0xa8, 0xab).rw(m_pcm, FUNC(t4dwave_pcm_device::wavevol_r), FUNC(t4dwave_pcm_device::wavevol_w)); -// map(0xac, 0xaf) DELTAR +// map(0xac, 0xaf) DELTAR map(0xb0, 0xb3).rw(m_pcm, FUNC(t4dwave_pcm_device::miscint_r), FUNC(t4dwave_pcm_device::miscint_w)); map(0xb4, 0xb7).rw(m_pcm, FUNC(t4dwave_pcm_device::bankb_status_r), FUNC(t4dwave_pcm_device::startb_w)); map(0xb8, 0xbb).rw(m_pcm, FUNC(t4dwave_pcm_device::bankb_status_r), FUNC(t4dwave_pcm_device::stopb_w)); -// map(0xbc, 0xbf) CSPFB -// map(0xc0, 0xc3) SBBL/SBCL -// map(0xc4, 0xc7) SBE2R/SBDD/SBCTRL -// map(0xc8, 0xcb) STIMER (r/o) -// map(0xcc, 0xcd) ROM Test -// map(0xce, 0xcf) LFOB -// map(0xd0, 0xd3) Test Mixer FIFO -// map(0xd4, 0xd7) Test Mixer Accumulator +// map(0xbc, 0xbf) CSPFB +// map(0xc0, 0xc3) SBBL/SBCL +// map(0xc4, 0xc7) SBE2R/SBDD/SBCTRL +// map(0xc8, 0xcb) STIMER (r/o) +// map(0xcc, 0xcd) ROM Test +// map(0xce, 0xcf) LFOB +// map(0xd0, 0xd3) Test Mixer FIFO +// map(0xd4, 0xd7) Test Mixer Accumulator map(0xd8, 0xdb).rw(m_pcm, FUNC(t4dwave_pcm_device::ainb_r), FUNC(t4dwave_pcm_device::ainb_w)); map(0xdc, 0xdf).rw(m_pcm, FUNC(t4dwave_pcm_device::aintenb_r), FUNC(t4dwave_pcm_device::aintenb_w)); map(0xe0, 0xe3).rw(m_pcm, FUNC(t4dwave_pcm_device::cso_r), FUNC(t4dwave_pcm_device::cso_w)); map(0xe4, 0xe7).w(m_pcm, FUNC(t4dwave_pcm_device::lba_w)); map(0xe8, 0xeb).rw(m_pcm, FUNC(t4dwave_pcm_device::eso_r), FUNC(t4dwave_pcm_device::eso_w)); -// map(0xec, 0xef) FMC/RVOL/CVOL +// map(0xec, 0xef) FMC/RVOL/CVOL map(0xf0, 0xf3).rw(m_pcm, FUNC(t4dwave_pcm_device::gvsel_r), FUNC(t4dwave_pcm_device::gvsel_w)); -// map(0xf4, 0xf7) EBUF1 (bank A only) -// map(0xf8, 0xfb) EBUF2 (bank A only) +// map(0xf4, 0xf7) EBUF1 (bank A only) +// map(0xf8, 0xfb) EBUF2 (bank A only) } void trident_4dwavedx_device::mmio_map(address_map &map) @@ -393,9 +393,9 @@ void t4dwave_pcm_device::device_start() save_item(STRUCT_MEMBER(m_channel, pan_vol)); save_item(STRUCT_MEMBER(m_channel, vol)); save_item(STRUCT_MEMBER(m_channel, play_mode)); -// save_item(STRUCT_MEMBER(m_channel, is_16bit)); -// save_item(STRUCT_MEMBER(m_channel, is_stereo)); -// save_item(STRUCT_MEMBER(m_channel, is_signed)); +// save_item(STRUCT_MEMBER(m_channel, is_16bit)); +// save_item(STRUCT_MEMBER(m_channel, is_stereo)); +// save_item(STRUCT_MEMBER(m_channel, is_signed)); save_item(STRUCT_MEMBER(m_channel, loop_enable)); save_item(STRUCT_MEMBER(m_channel, ec_envelope)); save_item(STRUCT_MEMBER(m_channel, pci_buf)); @@ -646,9 +646,9 @@ void t4dwave_pcm_device::gvsel_w(offs_t offset, u32 data, u32 mem_mask) channel.pan_vol = (channel.gvsel_cache >> 24) & 0x3f; channel.vol = (channel.gvsel_cache >> 16) & 0xff; channel.play_mode = (channel.gvsel_cache >> 13) & 7; -// channel.is_16bit = !!BIT(channel.gvsel_cache, 15); -// channel.is_stereo = !!BIT(channel.gvsel_cache, 14); -// channel.is_signed = !!BIT(channel.gvsel_cache, 13); +// channel.is_16bit = !!BIT(channel.gvsel_cache, 15); +// channel.is_stereo = !!BIT(channel.gvsel_cache, 14); +// channel.is_signed = !!BIT(channel.gvsel_cache, 13); channel.loop_enable = !!BIT(channel.gvsel_cache, 12); channel.ec_envelope = channel.gvsel_cache & 0xfff; diff --git a/src/devices/bus/pci/trident_4dwavedx.h b/src/devices/bus/pci/trident_4dwavedx.h index e39f1df05a5..66589324e58 100644 --- a/src/devices/bus/pci/trident_4dwavedx.h +++ b/src/devices/bus/pci/trident_4dwavedx.h @@ -59,7 +59,7 @@ private: }; class t4dwave_pcm_device : public device_t - , public device_sound_interface + , public device_sound_interface { public: t4dwave_pcm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/bus/vme/mvme328.cpp b/src/devices/bus/vme/mvme328.cpp index d4569548f92..239c3c72b98 100644 --- a/src/devices/bus/vme/mvme328.cpp +++ b/src/devices/bus/vme/mvme328.cpp @@ -183,7 +183,7 @@ void vme_mvme328_device::device_add_mconfig(machine_config &config) m_sts |= 1U << 6; else m_sts &= ~(1U << 6); - + m_cpu->set_input_line(INPUT_LINE_IRQ6, state); }); @@ -205,7 +205,7 @@ void vme_mvme328_device::device_add_mconfig(machine_config &config) m_sts |= 1U << 5; else m_sts &= ~(1U << 5); - + m_cpu->set_input_line(INPUT_LINE_IRQ5, state); }); diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp index 979f5caace9..4442253a476 100644 --- a/src/devices/cpu/i86/i186.cpp +++ b/src/devices/cpu/i86/i186.cpp @@ -1076,7 +1076,7 @@ void i80186_cpu_device::update_interrupt_state() const int irq_map[2] = {0x08, 0x04}; irq = irq_map[int_num]; } - + /* if we're already servicing something at this level, don't generate anything new */ if (m_intr.in_service & irq) return; @@ -1162,7 +1162,7 @@ void i80186_cpu_device::handle_eoi(int data) { int level = data & 0x07; - for (int int_num = 0; int_num < 3 && !handled; int_num++) + for (int int_num = 0; int_num < 3 && !handled; int_num++) { const int irq_map[3] = {0x01, 0x10, 0x20}; const int mask = irq_map[int_num]; @@ -1174,7 +1174,7 @@ void i80186_cpu_device::handle_eoi(int data) handled = true; } } - + for (int int_num = 0; int_num < 2 && !handled; int_num++) { const int irq_map[2] = {0x08, 0x04}; diff --git a/src/devices/cpu/m68000/m68008.h b/src/devices/cpu/m68000/m68008.h index 27d14bb9fd3..a1ccf8d32a4 100644 --- a/src/devices/cpu/m68000/m68008.h +++ b/src/devices/cpu/m68000/m68008.h @@ -31,7 +31,7 @@ public: // device-level overrides virtual void device_start() override ATTR_COLD; - + virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override; protected: diff --git a/src/devices/cpu/tlcs900/tmp94c241.cpp b/src/devices/cpu/tlcs900/tmp94c241.cpp index af12dd06000..bd3d68e2242 100644 --- a/src/devices/cpu/tlcs900/tmp94c241.cpp +++ b/src/devices/cpu/tlcs900/tmp94c241.cpp @@ -32,7 +32,7 @@ const tmp94c241_device::irq_vector_entry tmp94c241_device::irq_vector_map[] = { INTE45, 0x80, 0x30, 0x0c}, // INT5 Pin { INTE67, 0x08, 0x34, 0x0d}, // INT6 Pin { INTE67, 0x80, 0x38, 0x0e}, // INT7 Pin - // 0x3c - reserved + // 0x3c - reserved { INTE89, 0x08, 0x40, 0x10}, // INT8 Pin { INTE89, 0x80, 0x44, 0x11}, // INT9 Pin { INTEAB, 0x08, 0x48, 0x12}, // INTA Pin @@ -62,7 +62,7 @@ const tmp94c241_device::irq_vector_entry tmp94c241_device::irq_vector_map[] = { INTETC45, 0x80, 0xa8, 0x2a}, // INTTC5: micro-DMA completion Ch.5 { INTETC67, 0x08, 0xac, 0x2b}, // INTTC6: micro-DMA completion Ch.6 { INTETC67, 0x80, 0xb0, 0x2c}, // INTTC7: micro-DMA completion Ch.7 - /* 0xb4 ... 0xfc (Reserved) */ + /* 0xb4 ... 0xfc (Reserved) */ }; diff --git a/src/devices/machine/i82091aa.cpp b/src/devices/machine/i82091aa.cpp index 9c147fc16ad..679f61f4858 100644 --- a/src/devices/machine/i82091aa.cpp +++ b/src/devices/machine/i82091aa.cpp @@ -178,8 +178,8 @@ void i82091aa_device::config_map(address_map &map) return 0x00; }) ); -// map(0x02, 0x02) AIPCFG1 AIP Configuration 1 -// map(0x03, 0x03) AIPCFG2 AIP Configuration 2 +// map(0x02, 0x02) AIPCFG1 AIP Configuration 1 +// map(0x03, 0x03) AIPCFG2 AIP Configuration 2 map(0x10, 0x10).lrw8( NAME([this] (offs_t offset) { return m_fcfg1; diff --git a/src/devices/machine/i82091aa.h b/src/devices/machine/i82091aa.h index ff30fb175bf..c6072feeaea 100644 --- a/src/devices/machine/i82091aa.h +++ b/src/devices/machine/i82091aa.h @@ -13,8 +13,8 @@ #include "machine/upd765.h" class i82091aa_device : public device_t, - public device_isa16_card_interface, - public device_memory_interface + public device_isa16_card_interface, + public device_memory_interface { public: i82091aa_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); diff --git a/src/devices/machine/i82425ex_psc.h b/src/devices/machine/i82425ex_psc.h index 6946e7c2941..82d7ad3b851 100644 --- a/src/devices/machine/i82425ex_psc.h +++ b/src/devices/machine/i82425ex_psc.h @@ -34,7 +34,7 @@ public: auto ide1_irq_w() { return m_ide1_irq.bind(); } auto ide2_irq_w() { return m_ide2_irq.bind(); } -// void smi_act_w(int state); +// void smi_act_w(int state); protected: i82425ex_psc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/machine/i82426ex_ib.cpp b/src/devices/machine/i82426ex_ib.cpp index b37c183dd75..998417de379 100644 --- a/src/devices/machine/i82426ex_ib.cpp +++ b/src/devices/machine/i82426ex_ib.cpp @@ -131,8 +131,8 @@ void i82426ex_ib_device::device_reset() m_dma_channel = -1; m_nmi_mask = 1; -// m_dma[0]->set_unscaled_clock(2'500'000); -// m_dma[1]->set_unscaled_clock(2'500'000); +// m_dma[0]->set_unscaled_clock(2'500'000); +// m_dma[1]->set_unscaled_clock(2'500'000); } void i82426ex_ib_device::device_reset_after_children() @@ -178,16 +178,16 @@ void i82426ex_ib_device::io_map(address_map &map) NAME([this] (offs_t offset, u8 data) { m_dma_page[offset] = data; }) ); map(0x00a0, 0x00a1).rw(m_intc[1], FUNC(pic8259_device::read), FUNC(pic8259_device::write)); -// map(0x00b2, 0x00b2) APMC -// map(0x00b3, 0x00b3) APMS +// map(0x00b2, 0x00b2) APMC +// map(0x00b3, 0x00b3) APMS map(0x00c0, 0x00df).lrw8( NAME([this] (offs_t offset) { return m_dma[1]->read(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_dma[1]->write(offset >> 1, data); }) ); -// map(0x00f0, 0x00f0) Coprocessor Error -// map(0x0480, 0x048f) DMA high page (not all of it) -// map(0x04d0, 0x04d0) INT-1 Edge/Level Control -// map(0x04d1, 0x04d1) INT-2 Edge/Level Control +// map(0x00f0, 0x00f0) Coprocessor Error +// map(0x0480, 0x048f) DMA high page (not all of it) +// map(0x04d0, 0x04d0) INT-1 Edge/Level Control +// map(0x04d1, 0x04d1) INT-2 Edge/Level Control } u8 i82426ex_ib_device::portb_r() @@ -217,7 +217,7 @@ void i82426ex_ib_device::portb_w(u8 data) if (!BIT(m_portb, 1)) m_write_spkr(0); -// m_write_spkr(BIT(m_portb, 1)); +// m_write_spkr(BIT(m_portb, 1)); // clear channel check latch? if (BIT(m_portb, 3)) diff --git a/src/devices/machine/it8671f.cpp b/src/devices/machine/it8671f.cpp index abc3ae853c0..7914b522731 100644 --- a/src/devices/machine/it8671f.cpp +++ b/src/devices/machine/it8671f.cpp @@ -645,7 +645,7 @@ template void it8661f_device::iorange_check_w(offs_t offset, u8 dat , BIT(data, 1) , BIT(data, 0) ? 0x55 : 0xaa ); - // remap(AS_IO, 0, 0xfff); + // remap(AS_IO, 0, 0xfff); } } diff --git a/src/devices/machine/sis630_host.cpp b/src/devices/machine/sis630_host.cpp index 165dc168092..40b5d69641d 100644 --- a/src/devices/machine/sis630_host.cpp +++ b/src/devices/machine/sis630_host.cpp @@ -195,7 +195,7 @@ void sis630_host_device::smi_act_w(int state) m_smiact = 1; if (m_smiact == 0) - machine().debug_break(); + machine().debug_break(); remap_cb(); } diff --git a/src/devices/machine/sis950_acpi.cpp b/src/devices/machine/sis950_acpi.cpp index f05cc1bfc54..3c82f3dd39e 100644 --- a/src/devices/machine/sis950_acpi.cpp +++ b/src/devices/machine/sis950_acpi.cpp @@ -26,7 +26,7 @@ DEFINE_DEVICE_TYPE(SIS950_ACPI, sis950_acpi_device, "sis950_acpi", "SiS 950 ACPI sis950_acpi_device::sis950_acpi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : lpc_device(mconfig, SIS950_ACPI, tag, owner, clock) , m_write_smi(*this) -// , m_write_sci(*this) +// , m_write_sci(*this) { } diff --git a/src/devices/machine/vrender0.cpp b/src/devices/machine/vrender0.cpp index e830f793d38..4682b06288e 100644 --- a/src/devices/machine/vrender0.cpp +++ b/src/devices/machine/vrender0.cpp @@ -429,8 +429,8 @@ void vrender0soc_device::dmac_w(offs_t offset, u32 data, u32 mem_mask) vr0_dma &dma = m_dma[Which]; // Control register format: (per DMA controller) // Bit Description - // 1111 1111 1111 1111 0000 0000 0000 0000 - // fedc ba98 7654 3210 fedc ba98 7654 3210 + // 1111 1111 1111 1111 0000 0000 0000 0000 + // fedc ba98 7654 3210 fedc ba98 7654 3210 // xxxx xxxx xxxx xxxx xxxx x--- ---- ---- Reserved // ---- ---- ---- ---- ---- -x-- ---- ---- DMA enable // ---- ---- ---- ---- ---- --x- ---- ---- DMA request active polarity (0: high, 1: low) diff --git a/src/devices/machine/vt82c586b_acpi.cpp b/src/devices/machine/vt82c586b_acpi.cpp index e9aaba6a48a..d81744ddfcd 100644 --- a/src/devices/machine/vt82c586b_acpi.cpp +++ b/src/devices/machine/vt82c586b_acpi.cpp @@ -190,7 +190,7 @@ void vt82c586b_acpi_device::map_extra( { if (BIT(m_general_config, 7)) { -// io_space->install_device(m_iobase & 0xfffe, m_iobase | 0xff, *m_acpi, &acpi_pipc_device::map); +// io_space->install_device(m_iobase & 0xfffe, m_iobase | 0xff, *m_acpi, &acpi_pipc_device::map); m_acpi->map_device(memory_window_start, memory_window_end, 0, memory_space, io_window_start, io_window_end, m_iobase, io_space); } } diff --git a/src/devices/machine/vt82c586b_acpi.h b/src/devices/machine/vt82c586b_acpi.h index 3aec290ca19..57eaf86856b 100644 --- a/src/devices/machine/vt82c586b_acpi.h +++ b/src/devices/machine/vt82c586b_acpi.h @@ -44,7 +44,7 @@ private: }; class acpi_pipc_device : public lpc_device - , public device_memory_interface + , public device_memory_interface { public: acpi_pipc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = XTAL(3'579'545).value()); @@ -100,7 +100,7 @@ private: void gp_sci_enable_w(offs_t offset, u8 data); void check_smi(); -// void check_sci(); +// void check_sci(); }; DECLARE_DEVICE_TYPE(VT82C586B_ACPI, vt82c586b_acpi_device) diff --git a/src/devices/machine/z8536.cpp b/src/devices/machine/z8536.cpp index caa77cf8edf..d34a49f3a89 100644 --- a/src/devices/machine/z8536.cpp +++ b/src/devices/machine/z8536.cpp @@ -172,7 +172,7 @@ u8 cio_base_device::acknowledge_interrupt() else if ((m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] & (CTCS_IP | CTCS_IE | CTCS_IUS)) == (CTCS_IP | CTCS_IE)) { data = get_timer_vector(ct_vis); - + m_register[COUNTER_TIMER_3_COMMAND_AND_STATUS] |= CTCS_IUS; LOG("%s: Z8536 Counter/Timer 3 Interrupt Acknowledge with Vector %02x\n", machine().describe_context(), data); @@ -243,7 +243,7 @@ void cio_base_device::check_interrupt() } } - if (ip_level > ius_level) + if (ip_level > ius_level) { state = ASSERT_LINE; } @@ -276,7 +276,7 @@ u8 cio_base_device::read_register(offs_t offset) case PORT_B_INTERRUPT_VECTOR: data = get_port_b_vector(mie); break; - + case COUNTER_TIMER_INTERRUPT_VECTOR: data = get_timer_vector(mie); break; @@ -861,7 +861,7 @@ void cio_base_device::match_pattern(int port) { u8 pms = m_register[PORT_A_MODE_SPECIFICATION + (port << 3)]; u8 ddr = m_register[PORT_A_DATA_DIRECTION + (port << 3)]; - + u8 pm = m_register[PORT_A_PATTERN_MASK + (port << 3)]; u8 pt = m_register[PORT_A_PATTERN_TRANSITION + (port << 3)]; u8 pp = m_register[PORT_A_PATTERN_POLARITY + (port << 3)]; @@ -887,7 +887,7 @@ void cio_base_device::match_pattern(int port) case PMS_DISABLE: m_match[port] = 0; return; - + case PMS_OR_PEV: m_match[port] = match; diff --git a/src/devices/sound/ac97_stac9704.h b/src/devices/sound/ac97_stac9704.h index 6da4c293e76..248d0205138 100644 --- a/src/devices/sound/ac97_stac9704.h +++ b/src/devices/sound/ac97_stac9704.h @@ -6,8 +6,8 @@ #pragma once class ac97_stac9704_device : public device_t - , public device_mixer_interface - , public device_memory_interface + , public device_mixer_interface + , public device_memory_interface { public: ac97_stac9704_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp index c424e38b0a2..84af4c8853e 100644 --- a/src/devices/video/pc_vga_sis.cpp +++ b/src/devices/video/pc_vga_sis.cpp @@ -577,43 +577,43 @@ void sis6326_vga_device::crtc_map(address_map &map) ); }) ); -// map(0x99, 0x99) Video Control Misc. 1 -// map(0x9a, 0x9a) Video Chroma B/Y Low -// map(0x9b, 0x9b) Video Chroma G/U Low -// map(0x9c, 0x9c) Video Chroma R/V Low +// map(0x99, 0x99) Video Control Misc. 1 +// map(0x9a, 0x9a) Video Chroma B/Y Low +// map(0x9b, 0x9b) Video Chroma G/U Low +// map(0x9c, 0x9c) Video Chroma R/V Low // NOTE: there's no Video Control Misc. 2 -// map(0x9d, 0x9d) Video Control Misc. 3 -// map(0x9e, 0x9e) Video Playback Threshold Low -// map(0x9f, 0x9f) Video Playback Threshold High -// map(0xa0, 0xa0) Line Buffer Size -// map(0xa1, 0xa1) Color Key Blue High -// map(0xa2, 0xa2) Color Key Green High -// map(0xa3, 0xa3) Color Key Red High -// map(0xa4, 0xa4) Video Chroma B/Y High -// map(0xa5, 0xa5) Video Chroma G/U High -// map(0xa6, 0xa6) Video Chroma R/V High -// map(0xa7, 0xa7) Graphics Data Alpha -// map(0xa8, 0xa8) Video Data Alpha -// map(0xa9, 0xa9) Key Overlay Op Mode -// map(0xaa, 0xaa) Video Capture Horizontal Start -// map(0xab, 0xab) Video Capture Horizontal End -// map(0xac, 0xac) Video Capture Vertical Start -// map(0xad, 0xad) Video Capture Vertical End -// map(0xae, 0xae) Video Capture Horizontal Overflow -// map(0xaf, 0xaf) Video Capture Vertical Overflow (+ Input Delay Compensation) -// map(0xb0, 0xb1) System Memory Video FB Setting 1/2 () -// map(0xb2, 0xb2) System Memory Video FB Setting 3 and Video Control -// map(0xb3, 0xb3) Contrast Enhancement Mean Value Sampling Rate Factor -// map(0xb4, 0xb4) Brightness -// map(0xb5, 0xb5) Contrast Enhancement Control -// map(0xb6, 0xb6) Video Control Misc. 4 -// map(0xb7, 0xb7) Video U Plane Starting Address Low -// map(0xb8, 0xb8) Video U Plane Starting Address Middle -// map(0xb9, 0xb9) Video UV Plane Starting Address High -// map(0xba, 0xba) Video V Plane Starting Address Low -// map(0xbb, 0xbb) Video V Plane Starting Address Middle -// map(0xbc, 0xbc) Video UV Plane Offset Low -// map(0xbd, 0xbd) Video UV Plane Offset High +// map(0x9d, 0x9d) Video Control Misc. 3 +// map(0x9e, 0x9e) Video Playback Threshold Low +// map(0x9f, 0x9f) Video Playback Threshold High +// map(0xa0, 0xa0) Line Buffer Size +// map(0xa1, 0xa1) Color Key Blue High +// map(0xa2, 0xa2) Color Key Green High +// map(0xa3, 0xa3) Color Key Red High +// map(0xa4, 0xa4) Video Chroma B/Y High +// map(0xa5, 0xa5) Video Chroma G/U High +// map(0xa6, 0xa6) Video Chroma R/V High +// map(0xa7, 0xa7) Graphics Data Alpha +// map(0xa8, 0xa8) Video Data Alpha +// map(0xa9, 0xa9) Key Overlay Op Mode +// map(0xaa, 0xaa) Video Capture Horizontal Start +// map(0xab, 0xab) Video Capture Horizontal End +// map(0xac, 0xac) Video Capture Vertical Start +// map(0xad, 0xad) Video Capture Vertical End +// map(0xae, 0xae) Video Capture Horizontal Overflow +// map(0xaf, 0xaf) Video Capture Vertical Overflow (+ Input Delay Compensation) +// map(0xb0, 0xb1) System Memory Video FB Setting 1/2 () +// map(0xb2, 0xb2) System Memory Video FB Setting 3 and Video Control +// map(0xb3, 0xb3) Contrast Enhancement Mean Value Sampling Rate Factor +// map(0xb4, 0xb4) Brightness +// map(0xb5, 0xb5) Contrast Enhancement Control +// map(0xb6, 0xb6) Video Control Misc. 4 +// map(0xb7, 0xb7) Video U Plane Starting Address Low +// map(0xb8, 0xb8) Video U Plane Starting Address Middle +// map(0xb9, 0xb9) Video UV Plane Starting Address High +// map(0xba, 0xba) Video V Plane Starting Address Low +// map(0xbb, 0xbb) Video V Plane Starting Address Middle +// map(0xbc, 0xbc) Video UV Plane Offset Low +// map(0xbd, 0xbd) Video UV Plane Offset High map(0xe0, 0xe0).lrw8( NAME([this] (offs_t offset) -> u8 { @@ -1533,13 +1533,13 @@ u32 sis6326_vga_device::yuvtorgb32(u8 y, u8 u, u8 v) void sis6326_vga_device::draw_overlay(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { -// popmessage("(H %d %d V %d %d) %08x %d %06x" -// , m_overlay.h_display_start, m_overlay.h_display_end -// , m_overlay.v_display_start, m_overlay.v_display_end -// , m_overlay.display_fb_addr -// , m_overlay.fb_offset -// , m_overlay.color_key -// ); +// popmessage("(H %d %d V %d %d) %08x %d %06x" +// , m_overlay.h_display_start, m_overlay.h_display_end +// , m_overlay.v_display_start, m_overlay.v_display_end +// , m_overlay.display_fb_addr +// , m_overlay.fb_offset +// , m_overlay.color_key +// ); for (int y = 0; y < 240; y++) { diff --git a/src/devices/video/x1_020_dx_101.cpp b/src/devices/video/x1_020_dx_101.cpp index 1ea98610836..732bf381d7a 100644 --- a/src/devices/video/x1_020_dx_101.cpp +++ b/src/devices/video/x1_020_dx_101.cpp @@ -847,7 +847,7 @@ void x1_020_dx_101_device::draw_sprites_line(bitmap_ind16 &bitmap, const rectang } // see myangel, myangel2 and grdians - int basecode = (code &= ~((sizex + 1) * (sizey + 1) - 1)) + + int basecode = (code &= ~((sizex + 1) * (sizey + 1) - 1)) + ((flipy ? (sizey - y) : y) * (sizex + 1)) + (flipx ? sizex : 0); const int code_inc = flipx ? -1 : 1; diff --git a/src/mame/adp/adp.cpp b/src/mame/adp/adp.cpp index 81d5ee60783..fad73fde722 100644 --- a/src/mame/adp/adp.cpp +++ b/src/mame/adp/adp.cpp @@ -640,9 +640,9 @@ ROM_START( quickjac ) ROM_END ROM_START(sbsoli) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "skat_bierskat_solitaire_f2_i.u2", 0x00000, 0x20000, CRC(314390cf) SHA1(86c2f4e120235eba379ec54f2afea59e68c94e7e)) - ROM_LOAD16_BYTE( "skat_bierskat_solitaire_f2_ii.u6", 0x00001, 0x20000, CRC(6e7f88cc) SHA1(07e306222cbd94ab7a39be2685941d12c82645fb)) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "skat_bierskat_solitaire_f2_i.u2", 0x00000, 0x20000, CRC(314390cf) SHA1(86c2f4e120235eba379ec54f2afea59e68c94e7e)) + ROM_LOAD16_BYTE( "skat_bierskat_solitaire_f2_ii.u6", 0x00001, 0x20000, CRC(6e7f88cc) SHA1(07e306222cbd94ab7a39be2685941d12c82645fb)) ROM_REGION16_BE( 0x100000, "gfx1", 0 ) ROM_LOAD16_BYTE( "skat_bier_solitaire_video_f1_i.u2", 0x00000, 0x80000, CRC(3726a21e) SHA1(63fd2f01ce6103ef9a2c585f1045091dfc4b3408)) @@ -745,19 +745,19 @@ ROM_START( funlddlx4 ) ROM_END ROM_START( fstation7 ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_i.u2", 0x00000, 0x80000, CRC(bbf4bbd9) SHA1(80e785cb04213f8cc2f580b523e20b4825ba45e5)) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_ii.u6", 0x00001, 0x80000, CRC(cd8ab9e3) SHA1(cb9206d0367f00bec278cee0a4115594ba715fcd)) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_i.u2", 0x00000, 0x80000, CRC(bbf4bbd9) SHA1(80e785cb04213f8cc2f580b523e20b4825ba45e5)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_f1_ii.u6", 0x00001, 0x80000, CRC(cd8ab9e3) SHA1(cb9206d0367f00bec278cee0a4115594ba715fcd)) - ROM_REGION16_BE( 0x100000, "gfx1", 0) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_video_f1_i.u2", 0x00000, 0x80000, CRC(dcddb25a) SHA1(7c54bd7a368fd57e3eb995a26462b3d2d589b0db)) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_video_f1_ii.u5", 0x00001, 0x80000, CRC(400f9b8f) SHA1(4c4a9f46016eee805653b5fae65680225ac71436)) + ROM_REGION16_BE( 0x100000, "gfx1", 0) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_video_f1_i.u2", 0x00000, 0x80000, CRC(dcddb25a) SHA1(7c54bd7a368fd57e3eb995a26462b3d2d589b0db)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_7_sp_video_f1_ii.u5", 0x00001, 0x80000, CRC(400f9b8f) SHA1(4c4a9f46016eee805653b5fae65680225ac71436)) ROM_END ROM_START( fstation8 ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_8_sp_f1_i.u2", 0x00000, 0x80000, CRC(f9c792ab) SHA1(30ab7352cce22340be87ddae80e4b3c2f69ea778)) - ROM_LOAD16_BYTE("m27c4001_spielekoffer_8_sp_f1_ii.u5", 0x00001, 0x80000, CRC(0cb7b719) SHA1(e87bc67da903d9514dd97a6abf2d4e2171e15dbd)) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_8_sp_f1_i.u2", 0x00000, 0x80000, CRC(f9c792ab) SHA1(30ab7352cce22340be87ddae80e4b3c2f69ea778)) + ROM_LOAD16_BYTE("m27c4001_spielekoffer_8_sp_f1_ii.u5", 0x00001, 0x80000, CRC(0cb7b719) SHA1(e87bc67da903d9514dd97a6abf2d4e2171e15dbd)) ROM_REGION16_BE( 0x100000, "gfx1", 0 ) ROM_LOAD16_BYTE( "spielekoffer_8_sp_video_1.u2", 0x00000, 0x80000, NO_DUMP ) @@ -775,9 +775,9 @@ ROM_START( fstation ) ROM_END ROM_START(trumpfas) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "trumpf_as_dm_f2_pr1.u2", 0x00000, 0x20000, CRC(542b1517) SHA1(fcddb31b4b429c8d67161037d356861413567bb8)) - ROM_LOAD16_BYTE( "trumpf_as_dm_f2_pr2.u6", 0x00001, 0x20000, CRC(d39bbd88) SHA1(64f47fd0076845ed3f9f3e84aca3504c110ad8ad)) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "trumpf_as_dm_f2_pr1.u2", 0x00000, 0x20000, CRC(542b1517) SHA1(fcddb31b4b429c8d67161037d356861413567bb8)) + ROM_LOAD16_BYTE( "trumpf_as_dm_f2_pr2.u6", 0x00001, 0x20000, CRC(d39bbd88) SHA1(64f47fd0076845ed3f9f3e84aca3504c110ad8ad)) ROM_REGION16_BE( 0x40000, "gfx1", 0 ) ROM_LOAD16_BYTE( "trumpf_as_video_1.u2", 0x00000, 0x20000, NO_DUMP ) @@ -789,7 +789,7 @@ ROM_END GAME( 1993, quickjac, 0, quickjac, quickjac, adp_state, empty_init, ROT0, "ADP", "Quick Jack", 0 ) GAME( 1994, skattv, 0, skattv, skattv, adp_state, empty_init, ROT0, "ADP", "Skat TV", 0 ) -GAME( 1994, trumpfas, skattv, skattv, skattv, adp_state, empty_init, ROT0, "ADP", "Trumpf As", MACHINE_NOT_WORKING ) // throws FOUL error on startup +GAME( 1994, trumpfas, skattv, skattv, skattv, adp_state, empty_init, ROT0, "ADP", "Trumpf As", MACHINE_NOT_WORKING ) // throws FOUL error on startup GAME( 1995, skattva, skattv, skattva, skattva, adp_state, empty_init, ROT0, "ADP", "Skat TV (version TS3)", 0 ) GAME( 1997, fashiong, 0, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Fashion Gambler (set 1)", 0 ) GAME( 1997, fashiong2, fashiong, fashiong, skattv, adp_state, empty_init, ROT0, "ADP", "Fashion Gambler (set 2)", 0 ) diff --git a/src/mame/adp/stellafr.cpp b/src/mame/adp/stellafr.cpp index 39022bcf5a5..3624ae71144 100644 --- a/src/mame/adp/stellafr.cpp +++ b/src/mame/adp/stellafr.cpp @@ -418,9 +418,9 @@ ROM_START( bigjkpot ) ROM_END ROM_START( bigwinnr ) - ROM_REGION(0x100000, "maincpu", 0) - ROM_LOAD16_BYTE("big_winner_f1_1_m27c1001.u2", 0x00000, 0x20000, CRC(3abc347b) SHA1(7f6c570cecdab8e7db070c744b9222f725c7af66)) - ROM_LOAD16_BYTE("big_winner_f1_2_m27c1001.u6", 0x00001, 0x20000, CRC(7c4f8a70) SHA1(da797544f897ce8ebbc4c3c5277a6fe83c274a9a)) + ROM_REGION(0x100000, "maincpu", 0) + ROM_LOAD16_BYTE("big_winner_f1_1_m27c1001.u2", 0x00000, 0x20000, CRC(3abc347b) SHA1(7f6c570cecdab8e7db070c744b9222f725c7af66)) + ROM_LOAD16_BYTE("big_winner_f1_2_m27c1001.u6", 0x00001, 0x20000, CRC(7c4f8a70) SHA1(da797544f897ce8ebbc4c3c5277a6fe83c274a9a)) ROM_END ROM_START( disc4000 ) @@ -454,9 +454,9 @@ ROM_START( dscjkpot ) ROM_END ROM_START( gjubil ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "m27c1001_goldenjubilar_f1_1.u2", 0x00000, 0x20000, CRC(5babe5f7) SHA1(75e99203e86c8977fe8363c17dab8324133fe0a8) ) - ROM_LOAD16_BYTE( "m27c1001_goldenjubilar_f1_2.u6", 0x00001, 0x20000, CRC(25b8691f) SHA1(f28cd4523b387880175b66ee71276f977293b06d) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_goldenjubilar_f1_1.u2", 0x00000, 0x20000, CRC(5babe5f7) SHA1(75e99203e86c8977fe8363c17dab8324133fe0a8) ) + ROM_LOAD16_BYTE( "m27c1001_goldenjubilar_f1_2.u6", 0x00001, 0x20000, CRC(25b8691f) SHA1(f28cd4523b387880175b66ee71276f977293b06d) ) ROM_END ROM_START( grandhnd ) @@ -466,15 +466,15 @@ ROM_START( grandhnd ) ROM_END ROM_START( grnada ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "m27c1001_granada_f1.u2", 0x00000, 0x20000, CRC(45d080b8) SHA1(1543ee5bb3f0d490744d0d0df852914797902198) ) - ROM_LOAD16_BYTE( "m27c1001_granada_f1.u6", 0x00001, 0x20000, CRC(8016fc9b) SHA1(3c438701bdb221ab373f3356d95911d8a6568d9a) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_granada_f1.u2", 0x00000, 0x20000, CRC(45d080b8) SHA1(1543ee5bb3f0d490744d0d0df852914797902198) ) + ROM_LOAD16_BYTE( "m27c1001_granada_f1.u6", 0x00001, 0x20000, CRC(8016fc9b) SHA1(3c438701bdb221ab373f3356d95911d8a6568d9a) ) ROM_END ROM_START( jack4000 ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "m27c512_jackpot4000_f2_1.u2", 0x00000, 0x10000, CRC(5abc4d8c) SHA1(87ca16fd23724629b7882068475fe0d479f885bd) ) - ROM_LOAD16_BYTE( "m27c512_jackpot4000_f2_2.u6", 0x00001, 0x10000, CRC(efcb85e4) SHA1(b6de892cf097fd027a3d7c4bf2d00912fe3e97aa) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c512_jackpot4000_f2_1.u2", 0x00000, 0x10000, CRC(5abc4d8c) SHA1(87ca16fd23724629b7882068475fe0d479f885bd) ) + ROM_LOAD16_BYTE( "m27c512_jackpot4000_f2_2.u6", 0x00001, 0x10000, CRC(efcb85e4) SHA1(b6de892cf097fd027a3d7c4bf2d00912fe3e97aa) ) ROM_END ROM_START( jkrpoker ) @@ -526,9 +526,9 @@ ROM_START( mdouble ) ROM_END ROM_START( moneyf1 ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "m27c1001_money_f1_ic1", 0x00000, 0x20000, CRC(5ca79bfa) SHA1(c52b7d2ecd649ccde3457bc922ad05e734fba862) ) - ROM_LOAD16_BYTE( "m27c1001_money_f1_ic2", 0x00001, 0x20000, CRC(ad95ffc4) SHA1(1062be41a3822efd1d4c848c8ec50488dde42a78) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_money_f1_ic1", 0x00000, 0x20000, CRC(5ca79bfa) SHA1(c52b7d2ecd649ccde3457bc922ad05e734fba862) ) + ROM_LOAD16_BYTE( "m27c1001_money_f1_ic2", 0x00001, 0x20000, CRC(ad95ffc4) SHA1(1062be41a3822efd1d4c848c8ec50488dde42a78) ) ROM_END ROM_START( multmult ) @@ -541,33 +541,33 @@ ROM_START( multmult ) ROM_END ROM_START( multprim ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "m27c1001_multi_prima_f1_i.u2", 0x00000, 0x20000, CRC(b873f300) SHA1(4c605ea6337ab3c8eed818b23a9d9979a5047750) ) - ROM_LOAD16_BYTE( "m27c1001_multi_prima_f1_ii.u6", 0x00001, 0x20000, CRC(2a4e371c) SHA1(02494cab0ff7e4c169383a335169edf76501ed1a) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "m27c1001_multi_prima_f1_i.u2", 0x00000, 0x20000, CRC(b873f300) SHA1(4c605ea6337ab3c8eed818b23a9d9979a5047750) ) + ROM_LOAD16_BYTE( "m27c1001_multi_prima_f1_ii.u6", 0x00001, 0x20000, CRC(2a4e371c) SHA1(02494cab0ff7e4c169383a335169edf76501ed1a) ) ROM_END ROM_START( multstar ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "multi_star_f2_pr_1.u2", 0x00000, 0x20000, CRC(8f63fd16) SHA1(d9b8ef2e1f7616bc0569768af26794fa6166cc0d) ) - ROM_LOAD16_BYTE( "multi_star_f2_pr_2.u6", 0x00001, 0x20000, CRC(26952bd7) SHA1(20de0d890a91e728776278fb9c8d6de3b65f8703) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "multi_star_f2_pr_1.u2", 0x00000, 0x20000, CRC(8f63fd16) SHA1(d9b8ef2e1f7616bc0569768af26794fa6166cc0d) ) + ROM_LOAD16_BYTE( "multi_star_f2_pr_2.u6", 0x00001, 0x20000, CRC(26952bd7) SHA1(20de0d890a91e728776278fb9c8d6de3b65f8703) ) ROM_END ROM_START( mystjack ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "mystery_jackpot_f4_i.u2", 0x00000, 0x80000, CRC(4ff3ddd7) SHA1(6765628c4858ba78898bad5d3aed6e2e8e651264) ) - ROM_LOAD16_BYTE( "mystery_jackpot_f4_ii.u6", 0x00001, 0x80000, CRC(96523e1a) SHA1(4f53b454790dab4ce45b1db78bd033c40ce47179) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "mystery_jackpot_f4_i.u2", 0x00000, 0x80000, CRC(4ff3ddd7) SHA1(6765628c4858ba78898bad5d3aed6e2e8e651264) ) + ROM_LOAD16_BYTE( "mystery_jackpot_f4_ii.u6", 0x00001, 0x80000, CRC(96523e1a) SHA1(4f53b454790dab4ce45b1db78bd033c40ce47179) ) ROM_END ROM_START( nunran ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "nun_ran_f1_nr1.u2", 0x00000, 0x20000, CRC(d8eed6de) SHA1(937cf33694a3d3baf1cc0577cef6974e1d99a6c4) ) - ROM_LOAD16_BYTE( "nun_ran_f1_nr2.u6", 0x00001, 0x20000, CRC(2a7b9cf2) SHA1(bf30d41dd75b4d316f2f24d11886126484b10415) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "nun_ran_f1_nr1.u2", 0x00000, 0x20000, CRC(d8eed6de) SHA1(937cf33694a3d3baf1cc0577cef6974e1d99a6c4) ) + ROM_LOAD16_BYTE( "nun_ran_f1_nr2.u6", 0x00001, 0x20000, CRC(2a7b9cf2) SHA1(bf30d41dd75b4d316f2f24d11886126484b10415) ) ROM_END ROM_START( suprdisc ) - ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) - ROM_LOAD16_BYTE( "super_disc_f2_pr1.bin", 0x00000, 0x10000, CRC(0e3d67f9) SHA1(19e081ac8e3f0d8d16f67be032ebc788dcb53b26) ) - ROM_LOAD16_BYTE( "super_disc_f2_pr2.bin", 0x00001, 0x10000, CRC(f5c5f6a4) SHA1(9a19dc12027e1b26160fa20cbd53f96ecd679576) ) + ROM_REGION( 0x100000, "maincpu", ROMREGION_ERASEFF ) + ROM_LOAD16_BYTE( "super_disc_f2_pr1.bin", 0x00000, 0x10000, CRC(0e3d67f9) SHA1(19e081ac8e3f0d8d16f67be032ebc788dcb53b26) ) + ROM_LOAD16_BYTE( "super_disc_f2_pr2.bin", 0x00001, 0x10000, CRC(f5c5f6a4) SHA1(9a19dc12027e1b26160fa20cbd53f96ecd679576) ) ROM_END ROM_START( st_ohla ) diff --git a/src/mame/akai/mpc2000.cpp b/src/mame/akai/mpc2000.cpp index af7619e30b4..f5df6b04c9c 100644 --- a/src/mame/akai/mpc2000.cpp +++ b/src/mame/akai/mpc2000.cpp @@ -697,7 +697,7 @@ void mpc2000_state::mpc2000(machine_config &config) scsi.set_external_device(7, spc); spc.out_irq_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ2); spc.out_dreq_callback().set(m_maincpu, FUNC(v53a_device::dreq_w<0>)); - + TIMER(config, "dialtimer").configure_periodic(FUNC(mpc2000_state::dial_timer_tick), attotime::from_hz(60.0)); SPEAKER(config, "speaker", 2).front(); diff --git a/src/mame/bfm/bfm_cobra3.cpp b/src/mame/bfm/bfm_cobra3.cpp index 188b10d0607..9e12664e2a1 100644 --- a/src/mame/bfm/bfm_cobra3.cpp +++ b/src/mame/bfm/bfm_cobra3.cpp @@ -380,7 +380,7 @@ void bfm_cobra3_state::machine_start() void bfm_cobra3_state::dma1_drq(int state) { -// m_maincpu->dma_dreq1_w(state); +// m_maincpu->dma_dreq1_w(state); } void bfm_cobra3_state::scc66470_irq(int state) @@ -488,7 +488,7 @@ void bfm_cobra3_state::bfm_cobra3(machine_config &config) scsi.set_external_device(6, m_scsic); m_scsic->drq_handler().set(DEVICE_SELF, FUNC(bfm_cobra3_state::dma1_drq)); - WATCHDOG_TIMER(config, "watchdog").set_time(PERIOD_OF_555_MONOSTABLE(120000,100e-9)); //TODO: Check timings + WATCHDOG_TIMER(config, "watchdog").set_time(PERIOD_OF_555_MONOSTABLE(120000,100e-9)); //TODO: Check timings METERS(config, m_meters, 0).set_number(4); } diff --git a/src/mame/capcom/gng.cpp b/src/mame/capcom/gng.cpp index 2edcd395d3d..a812e77a202 100644 --- a/src/mame/capcom/gng.cpp +++ b/src/mame/capcom/gng.cpp @@ -675,7 +675,7 @@ ROM_END The ROM configuration is set with a jumpers bank at 1F. Mask ROMs: EPROMs (eg. gngb): - J2 = Short Open + J2 = Short Open J3 = Short Open J4 = Open Short J5 = Short Open diff --git a/src/mame/gridcomp/gridcomp.cpp b/src/mame/gridcomp/gridcomp.cpp index a287575a8c8..68b84cd3341 100644 --- a/src/mame/gridcomp/gridcomp.cpp +++ b/src/mame/gridcomp/gridcomp.cpp @@ -40,9 +40,9 @@ to do: - - EAROM, RTC + - EAROM, RTC - serial port (incomplete), modem (incl. DTMF generator) - - keyboard MCU emulation + - keyboard MCU emulation - proper custom DMA logic timing - loading ROMs for Compass II diff --git a/src/mame/intel/i420ex.cpp b/src/mame/intel/i420ex.cpp index a0b5be0dfb8..b905d1f97d5 100644 --- a/src/mame/intel/i420ex.cpp +++ b/src/mame/intel/i420ex.cpp @@ -127,7 +127,7 @@ void i420ex_state::i420ex(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &i420ex_state::main_map); m_maincpu->set_addrmap(AS_IO, &i420ex_state::main_io); m_maincpu->set_irq_acknowledge_callback("ib:intc1", FUNC(pic8259_device::inta_cb)); -// m_maincpu->smiact().set("pci:05.0", FUNC(i82425ex_psc_device::smi_act_w)); +// m_maincpu->smiact().set("pci:05.0", FUNC(i82425ex_psc_device::smi_act_w)); i82426ex_ib_device &ib(I82426EX_IB(config, "ib", XTAL(14'318'181), "maincpu", "keybc")); ib.intr().set_inputline("maincpu", INPUT_LINE_IRQ0); @@ -155,7 +155,7 @@ void i420ex_state::i420ex(machine_config &config) ps2_keyboard_controller_device &keybc(PS2_KEYBOARD_CONTROLLER(config, "keybc", XTAL(12'000'000))); // TODO: use its own BIOS // Detection fails with Compaq -// keybc.set_default_bios_tag("compaq"); +// keybc.set_default_bios_tag("compaq"); keybc.hot_res().set_inputline("maincpu", INPUT_LINE_RESET); keybc.gate_a20().set_inputline("maincpu", INPUT_LINE_A20); keybc.kbd_irq().set("ib:intc1", FUNC(pic8259_device::ir1_w)); diff --git a/src/mame/kaneko/galpani3.cpp b/src/mame/kaneko/galpani3.cpp index b9b8190dbda..29086cbe49d 100644 --- a/src/mame/kaneko/galpani3.cpp +++ b/src/mame/kaneko/galpani3.cpp @@ -202,7 +202,7 @@ u32 galpani3_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c const u8 pridat = priline[prioffs]; - auto const sprite_draw_pixel = + auto const sprite_draw_pixel = [paldata] (u32 &dst, u16 sprdat, u16 pri) { if (((sprdat & 0xc000) == pri) && ((sprdat & 0xff) != 0)) diff --git a/src/mame/luxor/abc1600.cpp b/src/mame/luxor/abc1600.cpp index 58632c1b792..52f2ed8b20d 100644 --- a/src/mame/luxor/abc1600.cpp +++ b/src/mame/luxor/abc1600.cpp @@ -24,7 +24,7 @@ mf(2,0) abcenix loadsys1 -wt micr1325a -we sa40 -bs 512 - loadsys + loadsys ABCenix <= D-NIX <= AT&T Unix System V @@ -34,7 +34,7 @@ TODO: - - write to floppy fails with status 0x04 (lost byte) after commit 339bb2758640202e5378a1c2b1c19b2ef46fa1d9 + - write to floppy fails with status 0x04 (lost byte) after commit 339bb2758640202e5378a1c2b1c19b2ef46fa1d9 - systest1600 failures - CIO timer (works if CIO clock is 4219000) - DMA (expects to read 0xff from 0x18000..) diff --git a/src/mame/luxor/abc1600_mmu.cpp b/src/mame/luxor/abc1600_mmu.cpp index e39332518b6..7606b84e34f 100644 --- a/src/mame/luxor/abc1600_mmu.cpp +++ b/src/mame/luxor/abc1600_mmu.cpp @@ -75,7 +75,7 @@ void abc1600_mmu_device::mac_w(offs_t offset, uint8_t data) } abc1600_mmu_device::abc1600_mmu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) : - device_t(mconfig, LUXOR_ABC1600_MMU, tag, owner, clock), + device_t(mconfig, LUXOR_ABC1600_MMU, tag, owner, clock), device_memory_interface(mconfig, *this), device_state_interface(mconfig, *this), m_read_tren(*this, 0xff), @@ -92,12 +92,12 @@ abc1600_mmu_device::abc1600_mmu_device(machine_config const &mconfig, char const } abc1600_mmu_device::mmu::mmu(m68008_device *maincpu, address_space &boot, address_space &program, address_space &cpu_space, address_space &mac_space, u8 *segment_ram, u16 *page_ram) : - m_maincpu(maincpu), + m_maincpu(maincpu), m_segment_ram(segment_ram), m_page_ram(page_ram), m_a_boot(boot), - m_a_program(program), - m_a_cpu_space(cpu_space), + m_a_program(program), + m_a_cpu_space(cpu_space), m_a_mac_space(mac_space), m_super(false), m_boote(0), @@ -145,8 +145,8 @@ device_memory_interface::space_config_vector abc1600_mmu_device::memory_space_co { return space_config_vector { std::make_pair(AS_BOOT, &m_boot_config), - std::make_pair(AS_PROGRAM, &m_program_config), - std::make_pair(m68000_base_device::AS_CPU_SPACE, &m_cpu_space_config), + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(m68000_base_device::AS_CPU_SPACE, &m_cpu_space_config), std::make_pair(AS_MAC, &m_s_program_config) }; } @@ -165,9 +165,9 @@ bool abc1600_mmu_device::mmu::ifc2(int intention) const bool abc1600_mmu_device::mmu::force_task0(offs_t logical, int intention) const { - const bool a19 = BIT(logical, 19); + const bool a19 = BIT(logical, 19); - return !(a19 || ifc2(intention)); + return !(a19 || ifc2(intention)); } int abc1600_mmu_device::mmu::get_task(offs_t logical, int intention) const @@ -206,16 +206,16 @@ offs_t abc1600_mmu_device::mmu::get_physical_address(offs_t logical, int intenti bool abc1600_mmu_device::mmu::translate(int spacenum, int intention, offs_t &address, address_space *&target_space) { - if (spacenum == m68000_base_device::AS_CPU_SPACE) { + if (spacenum == m68000_base_device::AS_CPU_SPACE) { target_space = &m_a_cpu_space; return true; } - if (spacenum != AS_PROGRAM) + if (spacenum != AS_PROGRAM) return false; if (!m_boote && (intention != TR_WRITE) && (address < 0x20000)) { - target_space = &m_a_boot; + target_space = &m_a_boot; return true; } @@ -237,7 +237,7 @@ bool abc1600_mmu_device::mmu::translate(int spacenum, int intention, offs_t &add u8 abc1600_mmu_device::mmu::mmu_read(offs_t logical, int intention) { if (!m_boote && (logical < 0x20000)) - return m_boot.read_interruptible(logical); + return m_boot.read_interruptible(logical); if (!ifc2(intention) && BIT(logical, 19)) return m_s_program.read_interruptible(logical); diff --git a/src/mame/luxor/abc1600_mmu.h b/src/mame/luxor/abc1600_mmu.h index f04870d4bb9..634e3d2f232 100644 --- a/src/mame/luxor/abc1600_mmu.h +++ b/src/mame/luxor/abc1600_mmu.h @@ -17,18 +17,18 @@ class abc1600_mmu_device : public device_t, public device_memory_interface, public device_state_interface { public: - abc1600_mmu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0); + abc1600_mmu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock = 0); template void set_cpu(T &&tag) { m_maincpu.set_tag(std::forward(tag)); } template auto in_tren_cb() { return m_read_tren[N].bind(); } template auto out_tren_cb() { return m_write_tren[N].bind(); } - void partst_w(int state) { m_partst = state; } + void partst_w(int state) { m_partst = state; } void rstbut_w(int state) { m_rstbut = state; } - void dmamap_w(offs_t offset, uint8_t data); + void dmamap_w(offs_t offset, uint8_t data); - uint8_t dma0_mreq_r(offs_t offset) { return dma_mreq_r(0, DMAMAP_R0_LO, offset); } + uint8_t dma0_mreq_r(offs_t offset) { return dma_mreq_r(0, DMAMAP_R0_LO, offset); } void dma0_mreq_w(offs_t offset, uint8_t data) { dma_mreq_w(0, DMAMAP_R0_LO, offset, data); } uint8_t dma0_iorq_r(offs_t offset) { return dma_iorq_r(DMAMAP_R0_LO, offset); } void dma0_iorq_w(offs_t offset, uint8_t data) { dma_iorq_w(DMAMAP_R0_LO, offset, data); } @@ -47,11 +47,11 @@ protected: // device_t implementation virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD; - - // device_memory_interface implementation + + // device_memory_interface implementation space_config_vector memory_space_config() const override ATTR_COLD; - // optional information overrides + // optional information overrides virtual void device_add_mconfig(machine_config &config) override ATTR_COLD; virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD; @@ -60,10 +60,10 @@ private: enum { AS_BOOT = 7, - AS_MAC = 8 + AS_MAC = 8 }; - enum { + enum { DMAMAP_R2_LO = 0, DMAMAP_R2_HI, DMAMAP_R1_LO = 4, @@ -73,48 +73,48 @@ private: }; class mmu : public m68008_device::mmu8 - { - friend class abc1600_mmu_device; + { + friend class abc1600_mmu_device; - public: + public: mmu(m68008_device *maincpu, address_space &boot, address_space &program, address_space &cpu_space, address_space &mac_space, u8 *segment_ram, u16 *page_ram); virtual ~mmu() = default; - virtual u8 read_program(offs_t addr) override; - virtual void write_program(offs_t addr, u8 data) override; - virtual u8 read_data(offs_t addr) override; - virtual void write_data(offs_t addr, u8 data) override; - virtual u8 read_cpu(offs_t addr) override; - virtual void set_super(bool super) override; - virtual bool translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override; + virtual u8 read_program(offs_t addr) override; + virtual void write_program(offs_t addr, u8 data) override; + virtual u8 read_data(offs_t addr) override; + virtual void write_data(offs_t addr, u8 data) override; + virtual u8 read_cpu(offs_t addr) override; + virtual void set_super(bool super) override; + virtual bool translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override; - private: + private: m68008_device *m_maincpu; u8 *m_segment_ram; u16 *m_page_ram; - address_space &m_a_boot, &m_a_program, &m_a_cpu_space, &m_a_mac_space; + address_space &m_a_boot, &m_a_program, &m_a_cpu_space, &m_a_mac_space; memory_access<17, 0, 0, ENDIANNESS_BIG>::specific m_boot; memory_access<21, 0, 0, ENDIANNESS_BIG>::specific m_program; memory_access<20, 0, 0, ENDIANNESS_BIG>::specific m_cpu_space; memory_access<20, 0, 0, ENDIANNESS_BIG>::specific m_s_program; - void reset(); + void reset(); bool ifc2(int intention) const; offs_t get_segment_address(offs_t logical, int intention) const; bool force_task0(offs_t logical, int intention) const; int get_task(offs_t logical, int intention) const; - offs_t get_physical_address(offs_t logical, int task, bool &nonx, bool &wp); - u8 mmu_read(offs_t logical, int intention); - void mmu_write(offs_t logical, u8 data); + offs_t get_physical_address(offs_t logical, int task, bool &nonx, bool &wp); + u8 mmu_read(offs_t logical, int intention); + void mmu_write(offs_t logical, u8 data); - bool m_super = false; - bool m_boote = 0; - bool m_magic = 0; - int m_task = 0; - u8 m_cause = 0; - }; + bool m_super = false; + bool m_boote = 0; + bool m_magic = 0; + int m_task = 0; + u8 m_cause = 0; + }; - devcb_read8::array<3> m_read_tren; + devcb_read8::array<3> m_read_tren; devcb_write8::array<3> m_write_tren; required_device m_maincpu; @@ -124,12 +124,12 @@ private: memory_share_creator m_segment_ram; memory_share_creator m_page_ram; - void boot_map(address_map &map) ATTR_COLD; + void boot_map(address_map &map) ATTR_COLD; void mac_map(address_map &map) ATTR_COLD; uint8_t mac_r(offs_t offset); void mac_w(offs_t offset, uint8_t data); - + uint8_t cause_r(); void task_w(offs_t offset, uint8_t data); uint8_t segment_r(offs_t offset); @@ -139,16 +139,16 @@ private: uint8_t page_hi_r(offs_t offset); void page_hi_w(offs_t offset, uint8_t data); - offs_t get_dma_address(int index, offs_t logical, bool &rw); + offs_t get_dma_address(int index, offs_t logical, bool &rw); uint8_t dma_mreq_r(int index, int dmamap, offs_t offset); void dma_mreq_w(int index, int dmamap, offs_t offset, uint8_t data); uint8_t dma_iorq_r(int dmamap, offs_t offset); void dma_iorq_w(int dmamap, offs_t offset, uint8_t data); - bool m_rstbut = 0; - bool m_partst = 0; + bool m_rstbut = 0; + bool m_partst = 0; - u8 m_dmamap[8]; + u8 m_dmamap[8]; }; DECLARE_DEVICE_TYPE(LUXOR_ABC1600_MMU, abc1600_mmu_device) diff --git a/src/mame/luxor/abc1600_v.h b/src/mame/luxor/abc1600_v.h index 0ac2ff6c7df..87fe538506f 100644 --- a/src/mame/luxor/abc1600_v.h +++ b/src/mame/luxor/abc1600_v.h @@ -42,7 +42,7 @@ public: virtual void iowr2_map(address_map &map) ATTR_COLD; void mover_map(address_map &map) ATTR_COLD; - + protected: // device-level overrides virtual void device_start() override ATTR_COLD; diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp index 6426e7e048d..15d3b4796f1 100644 --- a/src/mame/namco/namcos23.cpp +++ b/src/mame/namco/namcos23.cpp @@ -4249,18 +4249,18 @@ void namcos23_state::render_model(const namcos23_render_entry *re) } int zsort = 0; - switch (h & 0x300) - { - case 0x000: - zsort = minz + 0.5f; - break; - case 0x100: - zsort = maxz + 0.5f; - break; - default: - zsort = 0.5f * (minz + maxz) + 0.5f; - break; - } + switch (h & 0x300) + { + case 0x000: + zsort = minz + 0.5f; + break; + case 0x100: + zsort = maxz + 0.5f; + break; + default: + zsort = 0.5f * (minz + maxz) + 0.5f; + break; + } if (zsort > 0x1fffff) zsort = 0x1fffff; int absolute_priority = re->absolute_priority & 7; diff --git a/src/mame/nec/pc9821.cpp b/src/mame/nec/pc9821.cpp index 6ae1aa2d0d4..9e1c75224ce 100644 --- a/src/mame/nec/pc9821.cpp +++ b/src/mame/nec/pc9821.cpp @@ -317,7 +317,7 @@ uint16_t pc9821_state::pc9821_grcg_gvram_r(offs_t offset, uint16_t mem_mask) { int bank_idx = offset >> 14; if (bank_idx > 1) return 0xffff; - + u8 *ext_gvram = (u8 *)m_ext_gvram.target(); if (m_pegc.packed_mode) @@ -393,7 +393,7 @@ void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t me { int bank_idx = offset >> 14; if (bank_idx > 1) return; - + u8 *ext_gvram = (u8 *)m_ext_gvram.target(); if (m_pegc.packed_mode) @@ -410,7 +410,7 @@ void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t me u8 plane_mask = m_pegc.regs[0x04]; u16 rop = m_pegc.regs[0x08] | (m_pegc.regs[0x09] << 8); u32 pixel_mask = m_pegc.regs[0x0c] | (m_pegc.regs[0x0d] << 8) | (m_pegc.regs[0x0e] << 16) | (m_pegc.regs[0x0f] << 24); - + bool cpu_data = BIT(rop, 8); bool shift_dir = BIT(rop, 9); u8 ropmethod = (rop >> 10) & 3; @@ -432,11 +432,11 @@ void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t me { u32 src_shift = m_pegc.first_process_w ? (m_pegc.regs[0x12] & 0x1f) : 0; int push_count = m_pegc.first_process_w ? (16 - src_shift) : 16; - + for (int i = 0; i < push_count; i++) { int orig_i = i + src_shift; - int bit_idx = ((orig_i / 8) * 8) + (7 - (orig_i % 8)); - + int bit_idx = ((orig_i / 8) * 8) + (7 - (orig_i % 8)); + if (m_pegc.shift_cnt < sizeof(m_pegc.shift_buffer)) { m_pegc.shift_buffer[m_pegc.shift_cnt++] = (data & (1 << bit_idx)) ? 0xff : 0x00; } @@ -451,7 +451,7 @@ void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t me for (int i = 0; i < process_count; i++) { u32 tmp = (shift_dir ? (addr + 15 - dst_shift - i) : (addr + dst_shift + i)) & 0x7ffff; - + int p_idx = i + dst_shift; u32 pixel_mask_pos = 1 << ((p_idx / 8) * 8 + (7 - (p_idx & 7))); @@ -465,9 +465,9 @@ void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t me ext_gvram[tmp] &= plane_mask; u8 c4 = 0, c8 = 0; - if (ropmethod == 0) { c4 = c8 = m_pegc.pattern[tmp & m_pegc.pattern_mask]; } - else if (ropmethod == 1) { c4 = c8 = pal2; } - else if (ropmethod == 2) { c4 = c8 = pal1; } + if (ropmethod == 0) { c4 = c8 = m_pegc.pattern[tmp & m_pegc.pattern_mask]; } + else if (ropmethod == 1) { c4 = c8 = pal2; } + else if (ropmethod == 2) { c4 = c8 = pal1; } else { c4 = pal1; c8 = pal2; } u8 res = 0; @@ -511,7 +511,7 @@ void pc9821_state::pc9821_grcg_gvram_w(offs_t offset, uint16_t data, uint16_t me m_pegc.shift_cnt = 0; } else { m_pegc.first_process_w = false; - + int remaining_shift = m_pegc.shift_cnt - process_count; for (int i = 0; i < remaining_shift; i++) { m_pegc.shift_buffer[i] = m_pegc.shift_buffer[i + process_count]; @@ -617,7 +617,7 @@ void pc9821_state::pegc_mmio_map(address_map &map) { // Mode 1: 1 palette x 32 pixels int pix_idx = offset; - + if (pix_idx < 32 && ACCESSING_BITS_0_7) { m_pegc.pattern[pix_idx] = data & 0xff; } diff --git a/src/mame/nec/pc9821.h b/src/mame/nec/pc9821.h index 167603c4bfb..26ae6cf72b3 100644 --- a/src/mame/nec/pc9821.h +++ b/src/mame/nec/pc9821.h @@ -64,14 +64,14 @@ private: uint8_t r[0x100]{}, g[0x100]{}, b[0x100]{}; uint16_t bank[2]{}; bool packed_mode = false; - + uint8_t regs[0x100]{}; uint8_t lastdata[64]{}; uint8_t pattern[32]{}; uint32_t pattern_mask = 31; int32_t lastdatalen = 0; uint32_t remain = 0; - + bool first_process_w = true; bool first_process_r = true; uint8_t shift_buffer[64]{}; diff --git a/src/mame/nokia/mikromikko2.cpp b/src/mame/nokia/mikromikko2.cpp index 6cc370baa9a..223cab5cd19 100644 --- a/src/mame/nokia/mikromikko2.cpp +++ b/src/mame/nokia/mikromikko2.cpp @@ -35,13 +35,13 @@ /* Installing MS-DOS to hard disk - ------------------------------ + ------------------------------ $ ./chdman createhd -chs 306,6,17 -ss 512 -o st412.chd - $ printf '\x0f%.0s' {1..256} > nvram/mm2m35d/x2212 - $ ./mame mm2m35d -rs232b terminal -flop1 msdos221 -hard st412.chd + $ printf '\x0f%.0s' {1..256} > nvram/mm2m35d/x2212 + $ ./mame mm2m35d -rs232b terminal -flop1 msdos221 -hard st412.chd - Select terminal keyboard in input settings + Select terminal keyboard in input settings Monitor: @@ -49,7 +49,7 @@ A (abort) C (continue) - Select computer keyboard in input settings + Select computer keyboard in input settings DOS: @@ -82,7 +82,7 @@ TODO: - keyboard ROM is not dumped - - MPSC (DMA and interrupts) + - MPSC (DMA and interrupts) - CRTC186 video using CRT9007 - IOE186 card diff --git a/src/mame/pc/agro.cpp b/src/mame/pc/agro.cpp index f1e2163fc3f..7484a1f74d9 100644 --- a/src/mame/pc/agro.cpp +++ b/src/mame/pc/agro.cpp @@ -75,7 +75,7 @@ ROM_START( agro ) ROM_REGION32_LE( 0x100000, "bios", 0 ) // BADADDR -x-xxxxxxxxxxxxxxxxx, oversized? ROM_LOAD( "du98504.u38", 0, 0x100000, CRC(f0d44dbe) SHA1(e66e1c4839ef6595e4ced6ac0f3651291abb0b28) ) -// ROM_LOAD( "5901202s.rom", 0xe0000, 0x20000, CRC(2ccdef7a) SHA1(ce2a62540e253679c31dbebd0a9bee7ff0afdeec) ) +// ROM_LOAD( "5901202s.rom", 0xe0000, 0x20000, CRC(2ccdef7a) SHA1(ce2a62540e253679c31dbebd0a9bee7ff0afdeec) ) DISK_REGION( "pci:07.0:ide1:0:cdrom" ) DISK_IMAGE( "agro", 0, SHA1(edf27fd243944c0ff1468b532874f15346f74442) ) diff --git a/src/mame/pc/pcipc.cpp b/src/mame/pc/pcipc.cpp index db4af1684ce..b8328ee2fc0 100644 --- a/src/mame/pc/pcipc.cpp +++ b/src/mame/pc/pcipc.cpp @@ -675,7 +675,7 @@ void pcipc_state::pcipctx(machine_config &config) // Socket 7 / PGA321 pentium_device &maincpu(PENTIUM(config, "maincpu", 60000000)); maincpu.set_irq_acknowledge_callback("pci:07.0:pic8259_master", FUNC(pic8259_device::inta_cb)); -// maincpu.smiact().set("pci:00.0", FUNC(i82439tx_host_device::smi_act_w)); +// maincpu.smiact().set("pci:00.0", FUNC(i82439tx_host_device::smi_act_w)); PCI_ROOT(config, "pci", 0); I82439TX(config, "pci:00.0", 0, "maincpu", 256*1024*1024); @@ -684,7 +684,7 @@ void pcipc_state::pcipctx(machine_config &config) // IT8680F claims to have an RTC but it doesn't seem enabled, assume internal RTC used instead. i82371eb_isa_device &isa(I82371EB_ISA(config, "pci:07.0", 0, "maincpu", true)); isa.boot_state_hook().set(FUNC(pcipc_state::boot_state_award_w)); -// isa.smi().set_inputline("maincpu", INPUT_LINE_SMI); +// isa.smi().set_inputline("maincpu", INPUT_LINE_SMI); isa.a20m().set_inputline("maincpu", INPUT_LINE_A20); i82371eb_ide_device &ide(I82371EB_IDE(config, "pci:07.1", 0, "maincpu")); diff --git a/src/mame/sega/model3.cpp b/src/mame/sega/model3.cpp index 71fa952b73a..0381a834f38 100644 --- a/src/mame/sega/model3.cpp +++ b/src/mame/sega/model3.cpp @@ -16,7 +16,7 @@ Game status: vf3/vf3a/vf3tb - crashes sometimes, performance dips at startup (illegal polygons filling the - pipeline?), runs too slow during gameplay + pipeline?), runs too slow during gameplay getbassur - works basssdx/getbass/getbassdx - I/O board error (?) diff --git a/src/mame/sinclair/specnext.cpp b/src/mame/sinclair/specnext.cpp index 7b020273136..b48fe737fb1 100644 --- a/src/mame/sinclair/specnext.cpp +++ b/src/mame/sinclair/specnext.cpp @@ -3236,7 +3236,7 @@ INPUT_PORTS_START(specnext) PORT_MODIFY("LINE7") PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("SYMBOL SHIFT") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) - + PORT_START("VIDEO") PORT_CONFNAME(0x01, 0x00, "Captured Video Resolution" ) diff --git a/src/mame/sinclair/specnext_uart.cpp b/src/mame/sinclair/specnext_uart.cpp index 29213b58b0d..f79fa4223bb 100644 --- a/src/mame/sinclair/specnext_uart.cpp +++ b/src/mame/sinclair/specnext_uart.cpp @@ -73,7 +73,7 @@ u8 specnext_uart_device::status_reg_r() { // TODO: //o_cpu_d <= uart0_status_rx_err_break & uart0_status_rx_err_framing & (uart0_rx_o(8) and uart0_status_rx_avail) & uart0_status_tx_empty & - // uart0_status_rx_near_full & uart0_status_rx_err_overflow & uart0_status_tx_full & uart0_status_rx_avail; + // uart0_status_rx_near_full & uart0_status_rx_err_overflow & uart0_status_tx_full & uart0_status_rx_avail; const bool rx_overflow = !m_rx_empty && (m_rx_head == m_rx_tail); const u8 status = (fifo_empty() << 4) diff --git a/src/mame/success/skopro.cpp b/src/mame/success/skopro.cpp index 1e48aaeb7dd..2a7e4c56add 100644 --- a/src/mame/success/skopro.cpp +++ b/src/mame/success/skopro.cpp @@ -11,7 +11,7 @@ Hitachi Deskstar HDS721680PLA320 80 GB EGIS2JVS V1.2 card Windows XP embedded - TODO: north/southbridge? + TODO: north/southbridge? The system was meant to be modular, but only 2 titles are said to have been actually released. diff --git a/src/mame/ti/tipc.cpp b/src/mame/ti/tipc.cpp index e707efcd193..1c234a6ea5d 100644 --- a/src/mame/ti/tipc.cpp +++ b/src/mame/ti/tipc.cpp @@ -367,14 +367,14 @@ void tipc_state::vsync_changed(int state) /* * attribute bits (TechRef p. 2-42) * - * 0 intensity level 1 (blue) - * 1 intensity level 2 (red) - * 2 intensity level 3 (green) - * 3 character enable - * 4 reverse - * 5 underline - * 6 blink - * 7 alt character set + * 0 intensity level 1 (blue) + * 1 intensity level 2 (red) + * 2 intensity level 3 (green) + * 3 character enable + * 4 reverse + * 5 underline + * 6 blink + * 7 alt character set * * attribute priority, from high to low (p. 2-55) * diff --git a/src/mame/unico/unianapc.cpp b/src/mame/unico/unianapc.cpp index 30f8f1f7f92..a4824e0d697 100644 --- a/src/mame/unico/unianapc.cpp +++ b/src/mame/unico/unianapc.cpp @@ -9,8 +9,8 @@ Intel Celeron CPU, 1.70GHz MSI MS-6566E VER: 2 motherboard - Intel RG82845E (MCH) - Intel FW82801BA (ICH2) + Intel RG82845E (MCH) + Intel FW82801BA (ICH2) Samsung 256MB DDR PC2100 CL2.5 RAM Inside TNC 128MB(?) VGA Graphics Video Card E-G012-01-1247 <- seems to be a Korean OEM for nVidia GeForce2 MX400 (NV11) -AS Dynamic 4281 Rev. A sound card by Jin Information Technology with Crystal CS4281 sound chip diff --git a/src/osd/sdl3/window.cpp b/src/osd/sdl3/window.cpp index cc48c349fbd..a2a20b2d3fd 100644 --- a/src/osd/sdl3/window.cpp +++ b/src/osd/sdl3/window.cpp @@ -304,8 +304,8 @@ void sdl_window_info::update_cursor_state() int sdl_window_info::xy_to_render_target(int x, int y, int *xt, int *yt) { - osd_dim const logical = get_size(); - osd_dim const pixel = get_size_pixels(); + osd_dim const logical = get_size(); + osd_dim const pixel = get_size_pixels(); float const x_scale = pixel.width() / logical.width(); float const y_scale = pixel.height() / logical.height(); x = std::lround(x * x_scale); From ded80654008db2e86a8b853db171a317bc5efda3 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 29 Mar 2026 04:58:26 +1100 Subject: [PATCH 350/351] -astrocorp/astrocorp.cpp: Demoted game to not working to match commit message. -adp/stella8085.cpp: Tidied metadata. --- src/mame/adp/stella8085.cpp | 4 ++-- src/mame/astrocorp/astrcorp.cpp | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mame/adp/stella8085.cpp b/src/mame/adp/stella8085.cpp index 441b650b726..27be91334ec 100644 --- a/src/mame/adp/stella8085.cpp +++ b/src/mame/adp/stella8085.cpp @@ -919,8 +919,8 @@ GAMEL( 1987, sprmlti, sprmltib, dicemstr, dicemstr, stella8085_state, empty_in GAMEL( 1987, sprmltib, 0, doppelpot, dicemstr, stella8085_state, empty_init, ROT0, "Venus", "Super Multi (DOB)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) GAMEL( 1988, extrbltt, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Extrablatt", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) GAMEL( 1988, juwel, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Juwel", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1988, mastro, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Merkur Astro", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) -GAMEL( 1988, sherzas, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Merkur", "Super Herz AS", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1988, mastro, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "ADP", "Astro (Merkur)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) +GAMEL( 1988, sherzas, 0, dicemstr, dicemstr, stella8085_state, empty_init, ROT0, "Merkur", "Super Herz As", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) GAMEL( 1989, disc3000, 0, doppelpot, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc 3000", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) GAMEL( 1989, disciip, 0, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc II Plus", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_adpservice ) GAMEL( 1989, discryl, discrylb, dicemstr, disc, stella8085_state, empty_init, ROT0, "ADP", "Disc Royal", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING | MACHINE_MECHANICAL | MACHINE_REQUIRES_ARTWORK, layout_disc2000 ) diff --git a/src/mame/astrocorp/astrcorp.cpp b/src/mame/astrocorp/astrcorp.cpp index 280c06f4d1b..27eb13d087e 100644 --- a/src/mame/astrocorp/astrcorp.cpp +++ b/src/mame/astrocorp/astrcorp.cpp @@ -4619,7 +4619,7 @@ void astoneag_state::interleave_sprites_16x32() // YEAR NAME PARENT MACHINE INPUTS STATE INIT ROT COMPANY FULLNAME FLAGS LAYOUT // unencrypted -GAME( 1999, luckys99, 0, luckys99, luckys99, astrocorp_state, init_showhand, ROT0, "Astro Corp.", "Lucky Spin 1999 (Ver. A.1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1999, luckys99, 0, luckys99, luckys99, astrocorp_state, init_showhand, ROT0, "Astro Corp.", "Lucky Spin 1999 (Ver. A.1)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) GAMEL( 2000, showhand, 0, showhand, showhand, astrocorp_state, init_showhand, ROT0, "Astro Corp.", "Show Hand (Italy)", MACHINE_SUPPORTS_SAVE, layout_showhand ) GAMEL( 2000, showhandc, showhand, showhandc, showhandc, astrocorp_state, init_showhandc, ROT0, "Astro Corp.", "Wangpai Duijue (China)", MACHINE_SUPPORTS_SAVE, layout_showhandc ) GAMEL( 2002, skilldrp, 0, skilldrp, skilldrp, astrocorp_state, empty_init, ROT0, "Astro Corp.", "Skill Drop Georgia (Ver. G1.01S, Oct 1 2002)", MACHINE_SUPPORTS_SAVE, layout_skilldrp ) // Oct 1 2002 09:42:32 From e776c98438a465d3486c367cbad3777a6eb7902e Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Sun, 29 Mar 2026 23:00:42 +1100 Subject: [PATCH 351/351] Bumped version to 0.287 --- android-project/app/src/main/AndroidManifest.xml | 4 ++-- docs/source/conf.py | 4 ++-- makefile | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/android-project/app/src/main/AndroidManifest.xml b/android-project/app/src/main/AndroidManifest.xml index 816c84ea9de..7a1ac5316c5 100644 --- a/android-project/app/src/main/AndroidManifest.xml +++ b/android-project/app/src/main/AndroidManifest.xml @@ -4,8 +4,8 @@ --> diff --git a/docs/source/conf.py b/docs/source/conf.py index 28ec464d485..040b36d1cfb 100644 --- a/docs/source/conf.py +++ b/docs/source/conf.py @@ -63,9 +63,9 @@ copyright = u'1997-2026, MAMEdev and contributors' # built documents. # # The short X.Y version. -version = '0.286' +version = '0.287' # The full version, including alpha/beta/rc tags. -release = '0.286' +release = '0.287' # The language for content autogenerated by Sphinx. Refer to documentation # for a list of supported languages. diff --git a/makefile b/makefile index e86f7c7b772..b55f0aab91c 100644 --- a/makefile +++ b/makefile @@ -1537,7 +1537,7 @@ endif ifeq (posix,$(SHELLTYPE)) $(GENDIR)/version.cpp: makefile $(GENDIR)/git_desc | $(GEN_FOLDERS) - @echo '#define BARE_BUILD_VERSION "0.286"' > $@ + @echo '#define BARE_BUILD_VERSION "0.287"' > $@ @echo '#define BARE_VCS_REVISION "$(NEW_GIT_VERSION)"' >> $@ @echo 'extern const char bare_build_version[];' >> $@ @echo 'extern const char bare_vcs_revision[];' >> $@ @@ -1547,7 +1547,7 @@ $(GENDIR)/version.cpp: makefile $(GENDIR)/git_desc | $(GEN_FOLDERS) @echo 'const char build_version[] = BARE_BUILD_VERSION " (" BARE_VCS_REVISION ")";' >> $@ else $(GENDIR)/version.cpp: makefile $(GENDIR)/git_desc | $(GEN_FOLDERS) - @echo #define BARE_BUILD_VERSION "0.286" > $@ + @echo #define BARE_BUILD_VERSION "0.287" > $@ @echo #define BARE_VCS_REVISION "$(NEW_GIT_VERSION)" >> $@ @echo extern const char bare_build_version[]; >> $@ @echo extern const char bare_vcs_revision[]; >> $@